diff options
Diffstat (limited to 'sys/dev/pci/pcivar.h')
| -rw-r--r-- | sys/dev/pci/pcivar.h | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h index d1b7d28eae91..4abb5e977346 100644 --- a/sys/dev/pci/pcivar.h +++ b/sys/dev/pci/pcivar.h @@ -497,24 +497,39 @@ pci_is_vga_memory_range(rman_res_t start, rman_res_t end) /* * PCI power states are as defined by ACPI: * - * D0 State in which device is on and running. It is receiving full - * power from the system and delivering full functionality to the user. - * D1 Class-specific low-power state in which device context may or may not - * be lost. Buses in D1 cannot do anything to the bus that would force - * devices on that bus to lose context. - * D2 Class-specific low-power state in which device context may or may - * not be lost. Attains greater power savings than D1. Buses in D2 - * can cause devices on that bus to lose some context. Devices in D2 - * must be prepared for the bus to be in D2 or higher. - * D3 State in which the device is off and not running. Device context is - * lost. Power can be removed from the device. + * D0 State in which device is on and running. It is receiving full + * power from the system and delivering full functionality to the user. + * D1 Class-specific low-power state in which device context may or may not + * be lost. Buses in D1 cannot do anything to the bus that would force + * devices on that bus to lose context. + * D2 Class-specific low-power state in which device context may or may + * not be lost. Attains greater power savings than D1. Buses in D2 + * can cause devices on that bus to lose some context. Devices in D2 + * must be prepared for the bus to be in D2 or higher. + * D3hot State in which the device is off and not running. Device context is + * lost. Power can be removed from the device. + * D3cold Same as D3hot, but power has been removed from the device. */ #define PCI_POWERSTATE_D0 0 #define PCI_POWERSTATE_D1 1 #define PCI_POWERSTATE_D2 2 -#define PCI_POWERSTATE_D3 3 +#define PCI_POWERSTATE_D3_HOT 3 +#define PCI_POWERSTATE_D3_COLD 4 +#define PCI_POWERSTATE_D3 PCI_POWERSTATE_D3_COLD +#define PCI_POWERSTATE_MAX PCI_POWERSTATE_D3_COLD +#define PCI_POWERSTATE_COUNT 5 #define PCI_POWERSTATE_UNKNOWN -1 +static __inline const char * +pci_powerstate_to_str(int state) +{ + const char *strs[PCI_POWERSTATE_COUNT] = {"D0", "D1", "D2", "D3hot", + "D3cold"}; + + MPASS(state >= PCI_POWERSTATE_D0 && state <= PCI_POWERSTATE_MAX); + return (strs[state]); +} + static __inline int pci_set_powerstate(device_t dev, int state) { |