diff options
Diffstat (limited to 'sys')
227 files changed, 11651 insertions, 13882 deletions
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 96ed0a2cc3ba..61f1bdb6f942 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -344,7 +344,6 @@ start_all_aps(void) u_char mpbiosreason; amd64_mp_alloc_pcpu(); - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); MPASS(bootMP_size <= PAGE_SIZE); m_boottramp = vm_page_alloc_noobj_contig(0, 1, 0, diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index ef7ce215474e..38b6dccb3579 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -324,7 +324,8 @@ device bpf # Berkeley packet filter # random(4) device rdrand_rng # Intel Bull Mountain RNG -device tpm # Trusted Platform Module +# Disabled for now since tpm(4) breaks suspend/resume. +#device tpm # Trusted Platform Module options RANDOM_ENABLE_TPM # enable entropy from TPM 2.0 options RANDOM_ENABLE_KBD options RANDOM_ENABLE_MOUSE diff --git a/sys/amd64/conf/MINIMAL b/sys/amd64/conf/MINIMAL index 8df3349b4c34..9f80fe2f42d5 100644 --- a/sys/amd64/conf/MINIMAL +++ b/sys/amd64/conf/MINIMAL @@ -122,7 +122,8 @@ device bpf # Berkeley packet filter # random(4) device rdrand_rng # Intel Bull Mountain RNG -device tpm # Trusted Platform Module +# Disabled for now since tpm(4) breaks suspend/resume. +#device tpm # Trusted Platform Module options RANDOM_ENABLE_TPM # enable entropy from TPM 2.0 options RANDOM_ENABLE_KBD options RANDOM_ENABLE_MOUSE diff --git a/sys/amd64/conf/NOTES b/sys/amd64/conf/NOTES index d48fd10c0e62..efcc03623c05 100644 --- a/sys/amd64/conf/NOTES +++ b/sys/amd64/conf/NOTES @@ -43,9 +43,6 @@ cpu HAMMER # aka K8, aka Opteron & Athlon64 # Optional devices: # -# vt(4) drivers. -device vt_efifb # EFI framebuffer - # 3Dfx Voodoo Graphics, Voodoo II /dev/3dfx CDEV support. This will create # the /dev/3dfx0 device to work with glide implementations. This should get # linked to /dev/3dfx and /dev/voodoo. Note that this is not the same as @@ -116,6 +113,10 @@ device efidev # EFI RTC device efirtc +# Apple System Management Controller (SMC) +device asmc +options ASMC_DEBUG # Enable asmc(4)-specific debug logic. + # # Intel QuickAssist driver with OpenCrypto support # diff --git a/sys/amd64/include/vmm.h b/sys/amd64/include/vmm.h index 5cf1ae2d769c..eef8e6760fd6 100644 --- a/sys/amd64/include/vmm.h +++ b/sys/amd64/include/vmm.h @@ -123,6 +123,33 @@ enum x2apic_state { #define VM_INTINFO_SWINTR (4 << 8) #ifdef _KERNEL +#define VMM_VCPU_MD_FIELDS \ + struct vlapic *vlapic; /* (i) APIC device model */ \ + enum x2apic_state x2apic_state; /* (i) APIC mode */ \ + uint64_t exitintinfo; /* (i) events pending at VM exit */ \ + int nmi_pending; /* (i) NMI pending */ \ + int extint_pending; /* (i) INTR pending */ \ + int exception_pending; /* (i) exception pending */ \ + int exc_vector; /* (x) exception collateral */ \ + int exc_errcode_valid; \ + uint32_t exc_errcode; \ + struct savefpu *guestfpu; /* (a,i) guest fpu state */ \ + uint64_t guest_xcr0; /* (i) guest %xcr0 register */ \ + struct vm_exit exitinfo; /* (x) exit reason and collateral */ \ + cpuset_t exitinfo_cpuset; /* (x) storage for vmexit handlers */ \ + uint64_t nextrip; /* (x) next instruction to execute */ \ + uint64_t tsc_offset /* (o) TSC offsetting */ + +#define VMM_VM_MD_FIELDS \ + cpuset_t startup_cpus; /* (i) [r] waiting for startup */ \ + void *iommu; /* (x) iommu-specific data */ \ + struct vioapic *vioapic; /* (i) virtual ioapic */ \ + struct vatpic *vatpic; /* (i) virtual atpic */ \ + struct vatpit *vatpit; /* (i) virtual atpit */ \ + struct vpmtmr *vpmtmr; /* (i) virtual ACPI PM timer */ \ + struct vrtc *vrtc; /* (o) virtual RTC */ \ + struct vhpet *vhpet /* (i) virtual HPET */ + struct vm; struct vm_exception; struct vm_mem; @@ -133,17 +160,12 @@ struct vhpet; struct vioapic; struct vlapic; struct vmspace; +struct vm_eventinfo; struct vm_object; struct vm_guest_paging; struct pmap; enum snapshot_req; -struct vm_eventinfo { - cpuset_t *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ -}; - #define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ typedef ret_type (*vmmops_##opname##_t) args; \ ret_type vmmops_##opname args @@ -206,20 +228,6 @@ struct vmm_ops { extern const struct vmm_ops vmm_ops_intel; extern const struct vmm_ops vmm_ops_amd; -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); - int vm_map_mmio(struct vm *vm, vm_paddr_t gpa, size_t len, vm_paddr_t hpa); int vm_unmap_mmio(struct vm *vm, vm_paddr_t gpa, size_t len); int vm_assign_pptdev(struct vm *vm, int bus, int slot, int func); @@ -232,16 +240,12 @@ int vm_get_seg_desc(struct vcpu *vcpu, int reg, int vm_set_seg_desc(struct vcpu *vcpu, int reg, struct seg_desc *desc); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); int vm_inject_nmi(struct vcpu *vcpu); int vm_nmi_pending(struct vcpu *vcpu); void vm_nmi_clear(struct vcpu *vcpu); int vm_inject_extint(struct vcpu *vcpu); int vm_extint_pending(struct vcpu *vcpu); void vm_extint_clear(struct vcpu *vcpu); -int vcpu_vcpuid(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); struct vlapic *vm_lapic(struct vcpu *vcpu); struct vioapic *vm_ioapic(struct vm *vm); struct vhpet *vm_hpet(struct vm *vm); @@ -250,9 +254,6 @@ int vm_set_capability(struct vcpu *vcpu, int type, int val); int vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state); int vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state); int vm_apicid2vcpuid(struct vm *vm, int apicid); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_restart_instruction(struct vcpu *vcpu); struct vm_exit *vm_exitinfo(struct vcpu *vcpu); cpuset_t *vm_exitinfo_cpuset(struct vcpu *vcpu); @@ -265,57 +266,10 @@ int vm_snapshot_req(struct vm *vm, struct vm_snapshot_meta *meta); int vm_restore_time(struct vm *vm); #ifdef _SYS__CPUSET_H_ -/* - * Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'. - * The rendezvous 'func(arg)' is not allowed to do anything that will - * cause the thread to be put to sleep. - * - * The caller cannot hold any locks when initiating the rendezvous. - * - * The implementation of this API may cause vcpus other than those specified - * by 'dest' to be stalled. The caller should not rely on any vcpus making - * forward progress when the rendezvous is in progress. - */ -typedef void (*vm_rendezvous_func_t)(struct vcpu *vcpu, void *arg); -int vm_smp_rendezvous(struct vcpu *vcpu, cpuset_t dest, - vm_rendezvous_func_t func, void *arg); - -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); cpuset_t vm_start_cpus(struct vm *vm, const cpuset_t *tostart); void vm_await_start(struct vm *vm, const cpuset_t *waiting); #endif /* _SYS__CPUSET_H_ */ -static __inline int -vcpu_rendezvous_pending(struct vcpu *vcpu, struct vm_eventinfo *info) -{ - /* - * This check isn't done with atomic operations or under a lock because - * there's no need to. If the vcpuid bit is set, the vcpu is part of a - * rendezvous and the bit won't be cleared until the vcpu enters the - * rendezvous. On rendezvous exit, the cpuset is cleared and the vcpu - * will see an empty cpuset. So, the races are harmless. - */ - return (CPU_ISSET(vcpu_vcpuid(vcpu), info->rptr)); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -static __inline int -vcpu_reqidle(struct vm_eventinfo *info) -{ - - return (*info->iptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - /* * Return true if device indicated by bus/slot/func is supposed to be a * pci passthrough device. @@ -326,38 +280,7 @@ bool vmm_is_pptdev(int bus, int slot, int func); void *vm_iommu_domain(struct vm *vm); -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -int vcpu_set_state_all(struct vm *vm, enum vcpu_state state); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); void vcpu_notify_lapic(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); struct vatpic *vm_atpic(struct vm *vm); struct vatpit *vm_atpit(struct vm *vm); struct vpmtmr *vm_pmtmr(struct vm *vm); diff --git a/sys/amd64/vmm/amd/svm.c b/sys/amd64/vmm/amd/svm.c index 2fe6a5bc3584..37c950cfbc5f 100644 --- a/sys/amd64/vmm/amd/svm.c +++ b/sys/amd64/vmm/amd/svm.c @@ -50,12 +50,12 @@ #include <machine/specialreg.h> #include <machine/smp.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_stat.h" diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 4189c1214b40..7a2d0de6beff 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -53,13 +53,13 @@ #include <machine/vmparam.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_host.h" diff --git a/sys/amd64/vmm/io/vhpet.c b/sys/amd64/vmm/io/vhpet.c index 88063f2952e5..b01736a56c00 100644 --- a/sys/amd64/vmm/io/vhpet.c +++ b/sys/amd64/vmm/io/vhpet.c @@ -38,11 +38,13 @@ #include <sys/systm.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_snapshot.h> #include <dev/acpica/acpi_hpet.h> + +#include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vatpic.h" diff --git a/sys/amd64/vmm/io/vioapic.c b/sys/amd64/vmm/io/vioapic.c index 7df6193d6dc0..a3956785d049 100644 --- a/sys/amd64/vmm/io/vioapic.c +++ b/sys/amd64/vmm/io/vioapic.c @@ -43,6 +43,7 @@ #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vlapic.h" diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c index afd5045de574..6849ef7aa589 100644 --- a/sys/amd64/vmm/io/vlapic.c +++ b/sys/amd64/vmm/io/vlapic.c @@ -47,6 +47,7 @@ #include <machine/vmm_snapshot.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_lapic.h" #include "vmm_stat.h" diff --git a/sys/amd64/vmm/vmm.c b/sys/amd64/vmm/vmm.c index f3f9717129c9..6312fafa2975 100644 --- a/sys/amd64/vmm/vmm.c +++ b/sys/amd64/vmm/vmm.c @@ -71,6 +71,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_ioport.h" #include "vmm_host.h" @@ -91,88 +92,6 @@ struct vlapic; -/* - * Initialization: - * (a) allocated when vcpu is created - * (i) initialized when vcpu is created and when it is reinitialized - * (o) initialized the first time the vcpu is created - * (x) initialized before use - */ -struct vcpu { - struct mtx mtx; /* (o) protects 'state' and 'hostcpu' */ - enum vcpu_state state; /* (o) vcpu state */ - int vcpuid; /* (o) */ - int hostcpu; /* (o) vcpu's host cpu */ - int reqidle; /* (i) request vcpu to idle */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct vlapic *vlapic; /* (i) APIC device model */ - enum x2apic_state x2apic_state; /* (i) APIC mode */ - uint64_t exitintinfo; /* (i) events pending at VM exit */ - int nmi_pending; /* (i) NMI pending */ - int extint_pending; /* (i) INTR pending */ - int exception_pending; /* (i) exception pending */ - int exc_vector; /* (x) exception collateral */ - int exc_errcode_valid; - uint32_t exc_errcode; - struct savefpu *guestfpu; /* (a,i) guest fpu state */ - uint64_t guest_xcr0; /* (i) guest %xcr0 register */ - void *stats; /* (a,i) statistics */ - struct vm_exit exitinfo; /* (x) exit reason and collateral */ - cpuset_t exitinfo_cpuset; /* (x) storage for vmexit handlers */ - uint64_t nextrip; /* (x) next instruction to execute */ - uint64_t tsc_offset; /* (o) TSC offsetting */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - * - * Locking: - * [m] mem_segs_lock - * [r] rendezvous_mtx - * [v] reads require one frozen vcpu, writes require freezing all vcpus - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - void *iommu; /* (x) iommu-specific data */ - struct vhpet *vhpet; /* (i) virtual HPET */ - struct vioapic *vioapic; /* (i) virtual ioapic */ - struct vatpic *vatpic; /* (i) virtual atpic */ - struct vatpit *vatpit; /* (i) virtual atpit */ - struct vpmtmr *vpmtmr; /* (i) virtual ACPI PM timer */ - struct vrtc *vrtc; /* (o) virtual RTC */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ - cpuset_t startup_cpus; /* (i) [r] waiting for startup */ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - cpuset_t rendezvous_req_cpus; /* (x) [r] rendezvous requested */ - cpuset_t rendezvous_done_cpus; /* (x) [r] rendezvous finished */ - void *rendezvous_arg; /* (x) [r] rendezvous func/arg */ - vm_rendezvous_func_t rendezvous_func; - struct mtx rendezvous_mtx; /* (o) rendezvous lock */ - struct vm_mem mem; /* (i) [m+v] guest memory */ - char name[VM_MAX_NAMELEN+1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (o) guest vcpus */ - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - #define VMM_CTR0(vcpu, format) \ VCPU_CTR0((vcpu)->vm, (vcpu)->vcpuid, format) @@ -242,8 +161,7 @@ static MALLOC_DEFINE(M_VM, "vm", "vm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, - NULL); +SYSCTL_DECL(_hw_vmm); /* * Halt the guest if all vcpus are executing a HLT instruction with @@ -254,10 +172,6 @@ SYSCTL_INT(_hw_vmm, OID_AUTO, halt_detection, CTLFLAG_RDTUN, &halt_detection_enabled, 0, "Halt VM if all vcpus execute HLT with interrupts disabled"); -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - static int trace_guest_exceptions; SYSCTL_INT(_hw_vmm, OID_AUTO, trace_guest_exceptions, CTLFLAG_RDTUN, &trace_guest_exceptions, 0, @@ -267,8 +181,6 @@ static int trap_wbinvd; SYSCTL_INT(_hw_vmm, OID_AUTO, trap_wbinvd, CTLFLAG_RDTUN, &trap_wbinvd, 0, "WBINVD triggers a VM-exit"); -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VCPU_MIGRATIONS, "vcpu migration across host cpus"); VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); @@ -365,7 +277,6 @@ vcpu_init(struct vcpu *vcpu) int vcpu_trace_exceptions(struct vcpu *vcpu) { - return (trace_guest_exceptions); } @@ -445,14 +356,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -483,18 +386,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -524,35 +415,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus __unused) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -601,29 +463,11 @@ vm_destroy(struct vm *vm) free(vm, M_VM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -891,210 +735,6 @@ save_guest_fpustate(struct vcpu *vcpu) static VMM_STAT(VCPU_IDLE_TICKS, "number of ticks vcpu was idle"); -/* - * Invoke the rendezvous function on the specified vcpu if applicable. Return - * true if the rendezvous is finished, false otherwise. - */ -static bool -vm_rendezvous(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - int vcpuid; - - mtx_assert(&vcpu->vm->rendezvous_mtx, MA_OWNED); - KASSERT(vcpu->vm->rendezvous_func != NULL, - ("vm_rendezvous: no rendezvous pending")); - - /* 'rendezvous_req_cpus' must be a subset of 'active_cpus' */ - CPU_AND(&vm->rendezvous_req_cpus, &vm->rendezvous_req_cpus, - &vm->active_cpus); - - vcpuid = vcpu->vcpuid; - if (CPU_ISSET(vcpuid, &vm->rendezvous_req_cpus) && - !CPU_ISSET(vcpuid, &vm->rendezvous_done_cpus)) { - VMM_CTR0(vcpu, "Calling rendezvous func"); - (*vm->rendezvous_func)(vcpu, vm->rendezvous_arg); - CPU_SET(vcpuid, &vm->rendezvous_done_cpus); - } - if (CPU_CMP(&vm->rendezvous_req_cpus, - &vm->rendezvous_done_cpus) == 0) { - VMM_CTR0(vcpu, "Rendezvous completed"); - CPU_ZERO(&vm->rendezvous_req_cpus); - vm->rendezvous_func = NULL; - wakeup(&vm->rendezvous_func); - return (true); - } - return (false); -} - -static void -vcpu_wait_idle(struct vcpu *vcpu) -{ - KASSERT(vcpu->state != VCPU_IDLE, ("vcpu already idle")); - - vcpu->reqidle = 1; - vcpu_notify_event_locked(vcpu); - VMM_CTR1(vcpu, "vcpu state change from %s to " - "idle requested", vcpu_state2str(vcpu->state)); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); -} - -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) - vcpu_wait_idle(vcpu); - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - VMM_CTR2(vcpu, "vcpu state changed from %s to %s", - vcpu_state2str(vcpu->state), vcpu_state2str(newstate)); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} - -/* - * Try to lock all of the vCPUs in the VM while taking care to avoid deadlocks - * with vm_smp_rendezvous(). - * - * The complexity here suggests that the rendezvous mechanism needs a rethink. - */ -int -vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) -{ - cpuset_t locked; - struct vcpu *vcpu; - int error, i; - uint16_t maxcpus; - - KASSERT(newstate != VCPU_IDLE, - ("vcpu_set_state_all: invalid target state %d", newstate)); - - error = 0; - CPU_ZERO(&locked); - maxcpus = vm->maxcpus; - - mtx_lock(&vm->rendezvous_mtx); -restart: - if (vm->rendezvous_func != NULL) { - /* - * If we have a pending rendezvous, then the initiator may be - * blocked waiting for other vCPUs to execute the callback. The - * current thread may be a vCPU thread so we must not block - * waiting for the initiator, otherwise we get a deadlock. - * Thus, execute the callback on behalf of any idle vCPUs. - */ - for (i = 0; i < maxcpus; i++) { - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - vcpu_lock(vcpu); - if (vcpu->state == VCPU_IDLE) { - (void)vcpu_set_state_locked(vcpu, VCPU_FROZEN, - true); - CPU_SET(i, &locked); - } - if (CPU_ISSET(i, &locked)) { - /* - * We can safely execute the callback on this - * vCPU's behalf. - */ - vcpu_unlock(vcpu); - (void)vm_rendezvous(vcpu); - vcpu_lock(vcpu); - } - vcpu_unlock(vcpu); - } - } - - /* - * Now wait for remaining vCPUs to become idle. This may include the - * initiator of a rendezvous that is currently blocked on the rendezvous - * mutex. - */ - CPU_FOREACH_ISCLR(i, &locked) { - if (i >= maxcpus) - break; - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - vcpu_lock(vcpu); - while (vcpu->state != VCPU_IDLE) { - mtx_unlock(&vm->rendezvous_mtx); - vcpu_wait_idle(vcpu); - vcpu_unlock(vcpu); - mtx_lock(&vm->rendezvous_mtx); - if (vm->rendezvous_func != NULL) - goto restart; - vcpu_lock(vcpu); - } - error = vcpu_set_state_locked(vcpu, newstate, true); - vcpu_unlock(vcpu); - if (error != 0) { - /* Roll back state changes. */ - CPU_FOREACH_ISSET(i, &locked) - (void)vcpu_set_state(vcpu, VCPU_IDLE, false); - break; - } - CPU_SET(i, &locked); - } - mtx_unlock(&vm->rendezvous_mtx); - return (error); -} - static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) { @@ -1113,37 +753,6 @@ vcpu_require_state_locked(struct vcpu *vcpu, enum vcpu_state newstate) panic("Error %d setting state to %d", error, newstate); } -static int -vm_handle_rendezvous(struct vcpu *vcpu) -{ - struct vm *vm; - struct thread *td; - - td = curthread; - vm = vcpu->vm; - - mtx_lock(&vm->rendezvous_mtx); - while (vm->rendezvous_func != NULL) { - if (vm_rendezvous(vcpu)) - break; - - VMM_CTR0(vcpu, "Wait for rendezvous completion"); - mtx_sleep(&vm->rendezvous_func, &vm->rendezvous_mtx, 0, - "vmrndv", hz); - if (td_ast_pending(td, TDA_SUSPEND)) { - int error; - - mtx_unlock(&vm->rendezvous_mtx); - error = thread_check_susp(td, true); - if (error != 0) - return (error); - mtx_lock(&vm->rendezvous_mtx); - } - } - mtx_unlock(&vm->rendezvous_mtx); - return (0); -} - /* * Emulate a guest 'hlt' by sleeping until the vcpu is ready to run. */ @@ -1467,33 +1076,6 @@ vm_handle_db(struct vcpu *vcpu, struct vm_exit *vme, bool *retu) return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t rip) { @@ -2033,24 +1615,6 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - return (vcpu->vcpuid); -} - -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - return (vm->vcpu[vcpuid]); -} - struct vlapic * vm_lapic(struct vcpu *vcpu) { @@ -2120,107 +1684,6 @@ vm_iommu_domain(struct vm *vm) return (vm->iommu); } -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - VMM_CTR0(vcpu, "activated"); - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - /* * Returns the subset of vCPUs in tostart that are awaiting startup. * These vCPUs are also marked as no longer awaiting startup. @@ -2245,13 +1708,6 @@ vm_await_start(struct vm *vm, const cpuset_t *waiting) mtx_unlock(&vm->rendezvous_mtx); } -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - int vm_get_x2apic_state(struct vcpu *vcpu, enum x2apic_state *state) { @@ -2273,47 +1729,6 @@ vm_set_x2apic_state(struct vcpu *vcpu, enum x2apic_state state) return (0); } -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - void vcpu_notify_lapic(struct vcpu *vcpu) { @@ -2325,12 +1740,6 @@ vcpu_notify_lapic(struct vcpu *vcpu) vcpu_unlock(vcpu); } -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - int vm_apicid2vcpuid(struct vm *vm, int apicid) { diff --git a/sys/amd64/vmm/vmm_ioport.c b/sys/amd64/vmm/vmm_ioport.c index 8aab28f5e68e..65710c8de717 100644 --- a/sys/amd64/vmm/vmm_ioport.c +++ b/sys/amd64/vmm/vmm_ioport.c @@ -33,6 +33,7 @@ #include <machine/vmm_instruction_emul.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vatpic.h" #include "vatpit.h" diff --git a/sys/amd64/vmm/vmm_lapic.c b/sys/amd64/vmm/vmm_lapic.c index 63bdee69bb59..44bae5da31e5 100644 --- a/sys/amd64/vmm/vmm_lapic.c +++ b/sys/amd64/vmm/vmm_lapic.c @@ -34,6 +34,7 @@ #include <x86/apicreg.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include <machine/vmm.h> #include "vmm_lapic.h" diff --git a/sys/amd64/vmm/x86.c b/sys/amd64/vmm/x86.c index 2e2224595ab4..f32107124eb8 100644 --- a/sys/amd64/vmm/x86.c +++ b/sys/amd64/vmm/x86.c @@ -39,6 +39,7 @@ #include <machine/vmm.h> #include <dev/vmm/vmm_ktr.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_host.h" #include "vmm_util.h" diff --git a/sys/arm64/arm64/exec_machdep.c b/sys/arm64/arm64/exec_machdep.c index 7c50dc93fdb4..207e10ede96c 100644 --- a/sys/arm64/arm64/exec_machdep.c +++ b/sys/arm64/arm64/exec_machdep.c @@ -60,6 +60,10 @@ #include <machine/vfp.h> #endif +#define CTX_SIZE_SVE(buf_size) \ + roundup2(sizeof(struct sve_context) + (buf_size), \ + _Alignof(struct sve_context)) + _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect"); _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect"); _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect"); @@ -585,8 +589,7 @@ set_mcontext(struct thread *td, mcontext_t *mcp) buf_size = sve_buf_size(td); /* Check the size is valid */ - if (ctx.ctx_size != - (sizeof(sve_ctx) + buf_size)) + if (ctx.ctx_size != CTX_SIZE_SVE(buf_size)) return (EINVAL); memset(pcb->pcb_svesaved, 0, @@ -729,7 +732,7 @@ sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp) { struct sve_context ctx; struct pcb *pcb; - size_t buf_size; + size_t buf_size, ctx_size; vm_offset_t ctx_addr; pcb = td->td_pcb; @@ -740,14 +743,15 @@ sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp) MPASS(pcb->pcb_svesaved != NULL); buf_size = sve_buf_size(td); + ctx_size = CTX_SIZE_SVE(buf_size); /* Address for the full context */ - *addrp -= sizeof(ctx) + buf_size; + *addrp -= ctx_size; ctx_addr = *addrp; memset(&ctx, 0, sizeof(ctx)); ctx.sve_ctx.ctx_id = ARM64_CTX_SVE; - ctx.sve_ctx.ctx_size = sizeof(ctx) + buf_size; + ctx.sve_ctx.ctx_size = ctx_size; ctx.sve_vector_len = pcb->pcb_sve_len; ctx.sve_flags = 0; diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index c22d5fe76468..46d3bac576e8 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -997,7 +997,7 @@ LEND(link_l2_pagetable) * VA start (x8) modulo L3C_SIZE must equal PA start (x9) modulo L3C_SIZE. */ LENTRY(build_l3_page_pagetable) - cbz x10, 2f + cbz x10, 4f /* * Build the L3 table entry. */ @@ -1037,7 +1037,7 @@ LENTRY(build_l3_page_pagetable) add x11, x11, #1 add x9, x9, #1 cbnz x10, 1b -2: +4: ret LEND(build_l3_page_pagetable) diff --git a/sys/arm64/include/vmm.h b/sys/arm64/include/vmm.h index e67540eac66d..f076bd07f323 100644 --- a/sys/arm64/include/vmm.h +++ b/sys/arm64/include/vmm.h @@ -107,7 +107,39 @@ enum vm_reg_name { #define VM_GUEST_BASE_IPA 0x80000000UL /* Guest kernel start ipa */ #ifdef _KERNEL +#include <machine/vmm_instruction_emul.h> + +#define VMM_VCPU_MD_FIELDS \ + struct vm_exit exitinfo; \ + uint64_t nextpc; /* (x) next instruction to execute */ \ + struct vfpstate *guestfpu /* (a,i) guest fpu state */ + +#define VMM_VM_MD_FIELDS \ + struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; \ + struct vmm_special_reg special_reg[VM_MAX_SPECIAL_REGS] + +struct vmm_mmio_region { + uint64_t start; + uint64_t end; + mem_region_read_t read; + mem_region_write_t write; +}; +#define VM_MAX_MMIO_REGIONS 4 + +struct vmm_special_reg { + uint32_t esr_iss; + uint32_t esr_mask; + reg_read_t reg_read; + reg_write_t reg_write; + void *arg; +}; +#define VM_MAX_SPECIAL_REGS 16 + +#define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ + ret_type vmmops_##opname args + struct vm; +struct vm_eventinfo; struct vm_exception; struct vm_exit; struct vm_run; @@ -116,15 +148,6 @@ struct vm_guest_paging; struct vm_vgic_descr; struct pmap; -struct vm_eventinfo { - void *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ -}; - -#define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ - ret_type vmmops_##opname args - DECLARE_VMMOPS_FUNC(int, modinit, (int ipinum)); DECLARE_VMMOPS_FUNC(int, modcleanup, (void)); DECLARE_VMMOPS_FUNC(void *, init, (struct vm *vm, struct pmap *pmap)); @@ -153,34 +176,13 @@ DECLARE_VMMOPS_FUNC(int, restore_tsc, (void *vcpui, uint64_t now)); #endif #endif -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); - -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval); int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); void* vm_get_cookie(struct vm *vm); -int vcpu_vcpuid(struct vcpu *vcpu); void *vcpu_get_cookie(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); int vm_get_capability(struct vcpu *vcpu, int type, int *val); int vm_set_capability(struct vcpu *vcpu, int type, int val); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_inject_exception(struct vcpu *vcpu, uint64_t esr, uint64_t far); int vm_attach_vgic(struct vm *vm, struct vm_vgic_descr *descr); int vm_assert_irq(struct vm *vm, uint32_t irq); @@ -190,62 +192,8 @@ int vm_raise_msi(struct vm *vm, uint64_t msg, uint64_t addr, int bus, int slot, struct vm_exit *vm_exitinfo(struct vcpu *vcpu); void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc); void vm_exit_debug(struct vcpu *vcpu, uint64_t pc); -void vm_exit_rendezvous(struct vcpu *vcpu, uint64_t pc); void vm_exit_astpending(struct vcpu *vcpu, uint64_t pc); -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); - -static __inline int -vcpu_rendezvous_pending(struct vm_eventinfo *info) -{ - - return (*((uintptr_t *)(info->rptr)) != 0); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); - -enum vm_reg_name vm_segment_name(int seg_encoding); - struct vm_copyinfo { uint64_t gpa; size_t len; diff --git a/sys/arm64/include/vmm_instruction_emul.h b/sys/arm64/include/vmm_instruction_emul.h index a295f7cce127..dc281f442543 100644 --- a/sys/arm64/include/vmm_instruction_emul.h +++ b/sys/arm64/include/vmm_instruction_emul.h @@ -27,6 +27,14 @@ #ifndef _VMM_INSTRUCTION_EMUL_H_ #define _VMM_INSTRUCTION_EMUL_H_ +#include <sys/types.h> + +struct vcpu; +struct vm; +struct vie; +struct vre; +struct vm_guest_paging; + /* * Callback functions to read and write memory regions. */ diff --git a/sys/arm64/spe/arm_spe_backend.c b/sys/arm64/spe/arm_spe_backend.c index b4e1132f9cbc..c8d7de8f0c8c 100644 --- a/sys/arm64/spe/arm_spe_backend.c +++ b/sys/arm64/spe/arm_spe_backend.c @@ -91,11 +91,13 @@ #include <sys/module.h> #include <sys/mutex.h> #include <sys/proc.h> +#include <sys/queue.h> #include <sys/rman.h> #include <sys/rwlock.h> #include <sys/smp.h> #include <sys/sysctl.h> #include <sys/systm.h> +#include <sys/taskqueue.h> #include <machine/bus.h> @@ -123,13 +125,12 @@ static struct hwt_backend backend = { .kva_req = 1, }; -static struct arm_spe_info *spe_info; +/* Pointers to current info structure per CPU. This points to either a per-CPU + * structure (for CPU mode) or a per-thread structure (for thread mode). + */ +static struct arm_spe_info **spe_info; -static int -spe_backend_init_thread(struct hwt_context *ctx) -{ - return (ENOTSUP); -} +static struct arm_spe_info *spe_info_cpu; static void spe_backend_init_cpu(struct hwt_context *ctx) @@ -140,13 +141,12 @@ spe_backend_init_cpu(struct hwt_context *ctx) char *tmp = "Arm SPE lock/cpu/"; int cpu_id; - spe_info = malloc(sizeof(struct arm_spe_info) * mp_ncpus, + spe_info_cpu = malloc(sizeof(struct arm_spe_info) * mp_ncpus, M_ARM_SPE, M_WAITOK | M_ZERO); - sc->spe_info = spe_info; CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; + info = &spe_info_cpu[cpu_id]; info->sc = sc; info->ident = cpu_id; info->buf_info[0].info = info; @@ -155,6 +155,8 @@ spe_backend_init_cpu(struct hwt_context *ctx) info->buf_info[1].buf_idx = 1; snprintf(lock_name, sizeof(lock_name), "%s%d", tmp, cpu_id); mtx_init(&info->lock, lock_name, NULL, MTX_SPIN); + + spe_info[cpu_id] = info; } } @@ -183,9 +185,11 @@ spe_backend_init(struct hwt_context *ctx) sc->kqueue_fd = ctx->kqueue_fd; sc->hwt_td = ctx->hwt_td; - if (ctx->mode == HWT_MODE_THREAD) - error = spe_backend_init_thread(ctx); - else + spe_info = malloc(sizeof(struct arm_spe_info *) * mp_ncpus, + M_ARM_SPE, M_WAITOK | M_ZERO); + sc->spe_info = spe_info; + + if (ctx->mode == HWT_MODE_CPU) spe_backend_init_cpu(ctx); return (error); @@ -218,19 +222,30 @@ spe_backend_deinit(struct hwt_context *ctx) { #ifdef ARM_SPE_DEBUG struct arm_spe_info *info; + struct hwt_thread *thr; int cpu_id; - CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; - hex_dump((void *)info->kvaddr, 128); - hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + if (ctx->mode == HWT_MODE_CPU) { + CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { + info = &spe_info_cpu[cpu_id]; + printf("CPU %u:\n", cpu_id); + hex_dump((void *)info->kvaddr, 128); + hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + } + } else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + info = (struct arm_spe_info *)thr->private; + printf("TID %u:\n", thr->thread_id); + hex_dump((void *)info->kvaddr, 128); + hex_dump((void *)(info->kvaddr + (info->buf_size/2)), 128); + } } #endif - if (ctx->state == CTX_STATE_RUNNING) { - spe_backend_disable_smp(ctx); - ctx->state = CTX_STATE_STOPPED; - } + spe_backend_disable_smp(ctx); + + if (ctx->mode == HWT_MODE_CPU) + free(spe_info_cpu, M_ARM_SPE); free(spe_info, M_ARM_SPE); @@ -279,14 +294,31 @@ arm_spe_set_interval(struct arm_spe_info *info, uint64_t interval) } static int -spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) +spe_backend_configure(struct hwt_context *ctx, int cpu_id, int thread_id) { - struct arm_spe_info *info = &spe_info[cpu_id]; + struct arm_spe_info *info = NULL; struct arm_spe_config *cfg; + struct hwt_thread *thr = NULL; int err = 0; + if (ctx->mode == HWT_MODE_CPU) + info = &spe_info_cpu[cpu_id]; + else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + if (thr->thread_id != thread_id) + continue; + info = (struct arm_spe_info *)thr->private; + break; + } + if (info == NULL) + return (ENOENT); + } + mtx_lock_spin(&info->lock); - info->ident = cpu_id; + if (ctx->mode == HWT_MODE_CPU) + info->ident = cpu_id; + else + info->ident = thread_id; /* Set defaults */ info->pmsfcr = 0; info->pmsevfr = 0xFFFFFFFFFFFFFFFFUL; @@ -311,6 +343,13 @@ spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) info->ctx_field = cfg->ctx_field; } else err = (EINVAL); + + if (ctx->mode == HWT_MODE_THREAD) { + info->kvaddr = thr->vm->kvaddr; + info->buf_size = ctx->bufsize; + } + + spe_info[cpu_id] = info; mtx_unlock_spin(&info->lock); return (err); @@ -320,13 +359,20 @@ spe_backend_configure(struct hwt_context *ctx, int cpu_id, int session_id) static void arm_spe_enable(void *arg __unused) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)]; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + struct hwt_context *ctx = info->sc->ctx; uint64_t base, limit; dprintf("%s on cpu:%d\n", __func__, PCPU_GET(cpuid)); mtx_lock_spin(&info->lock); + if (info->stopped) { + mtx_unlock_spin(&info->lock); + return; + } + if (info->ctx_field == ARM_SPE_CTX_CPU_ID) WRITE_SPECIALREG(CONTEXTIDR_EL1_REG, PCPU_GET(cpuid)); @@ -342,13 +388,19 @@ arm_spe_enable(void *arg __unused) WRITE_SPECIALREG(PMSICR_EL1_REG, info->pmsicr); isb(); - base = info->kvaddr; + base = buf_start_addr(info->buf_idx, info); limit = base + (info->buf_size/2); /* Enable the buffer */ limit &= PMBLIMITR_LIMIT_MASK; /* Zero lower 12 bits */ limit |= PMBLIMITR_E; - /* Set the base and limit */ - WRITE_SPECIALREG(PMBPTR_EL1_REG, base); + /* Set the base and limit. Restore base pointer if sampling has previously + * been enabled for this thread. + */ + if (buf->pmbptr == 0) { + WRITE_SPECIALREG(PMBPTR_EL1_REG, base); + } else { + WRITE_SPECIALREG(PMBPTR_EL1_REG, buf->pmbptr); + } WRITE_SPECIALREG(PMBLIMITR_EL1_REG, limit); isb(); @@ -358,6 +410,9 @@ arm_spe_enable(void *arg __unused) info->enabled = true; + if (ctx->mode == HWT_MODE_THREAD) + CPU_SET(PCPU_GET(cpuid), &ctx->cpu_map); + mtx_unlock_spin(&info->lock); } @@ -368,11 +423,13 @@ spe_backend_enable_smp(struct hwt_context *ctx) struct hwt_vm *vm; int cpu_id; + KASSERT(ctx->mode == HWT_MODE_CPU, ("%s: should only be called for CPU mode", __func__)); + HWT_CTX_LOCK(ctx); CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { vm = hwt_cpu_get(ctx, cpu_id)->vm; - - info = &spe_info[cpu_id]; + KASSERT(spe_info[cpu_id] == &spe_info_cpu[cpu_id], ("%s: spe_info mismatch for cpu_id=%u", __func__, cpu_id)); + info = &spe_info_cpu[cpu_id]; mtx_lock_spin(&info->lock); info->kvaddr = vm->kvaddr; @@ -382,7 +439,8 @@ spe_backend_enable_smp(struct hwt_context *ctx) HWT_CTX_UNLOCK(ctx); cpu_id = CPU_FFS(&ctx->cpu_map) - 1; - info = &spe_info[cpu_id]; + KASSERT(spe_info[cpu_id] == &spe_info_cpu[cpu_id], ("%s: spe_info mismatch for cpu_id=%u", __func__, cpu_id)); + info = spe_info[cpu_id]; if (info->ctx_field == ARM_SPE_CTX_PID) arm64_pid_in_contextidr = true; else @@ -394,11 +452,12 @@ spe_backend_enable_smp(struct hwt_context *ctx) return (0); } -void -arm_spe_disable(void *arg __unused) +static void +arm_spe_disable_nolock(void) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)]; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + struct hwt_context *ctx = info->sc->ctx; if (!info->enabled) return; @@ -423,9 +482,20 @@ arm_spe_disable(void *arg __unused) /* Clear PID/CPU_ID from context ID reg */ WRITE_SPECIALREG(CONTEXTIDR_EL1_REG, 0); - mtx_lock_spin(&info->lock); buf->pmbptr = READ_SPECIALREG(PMBPTR_EL1_REG); info->enabled = false; + + if (ctx->mode == HWT_MODE_THREAD) + CPU_CLR(PCPU_GET(cpuid), &ctx->cpu_map); +} + +void +arm_spe_disable(void *arg __unused) +{ + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + + mtx_lock_spin(&info->lock); + arm_spe_disable_nolock(); mtx_unlock_spin(&info->lock); } @@ -438,14 +508,16 @@ spe_backend_disable_smp(struct hwt_context *ctx) int cpu_id; int ret; - /* Disable and send out remaining data in bufs */ - smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, - arm_spe_disable, smp_no_rendezvous_barrier, NULL); + if (!CPU_EMPTY(&ctx->cpu_map)) { + /* Disable and send out remaining data in bufs */ + smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, + arm_spe_disable, smp_no_rendezvous_barrier, NULL); - CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { - info = &spe_info[cpu_id]; - buf = &info->buf_info[info->buf_idx]; - arm_spe_send_buffer(buf, 0); + CPU_FOREACH_ISSET(cpu_id, &ctx->cpu_map) { + info = spe_info[cpu_id]; + buf = &info->buf_info[info->buf_idx]; + arm_spe_send_buffer(buf, 0); + } } arm64_pid_in_contextidr = false; @@ -463,15 +535,96 @@ spe_backend_disable_smp(struct hwt_context *ctx) } static void +spe_backend_enable(struct hwt_context *ctx, int cpu_id) +{ + struct arm_spe_info *info; + + if (ctx->mode == HWT_MODE_CPU) + return; + KASSERT(curcpu == cpu_id, ("%s: attempting to enable SPE on another cpu", __func__)); + + info = spe_info[cpu_id]; + + KASSERT(info != NULL, ("%s: info=NULL", __func__)); + + if (info->ctx_field == ARM_SPE_CTX_PID) + arm64_pid_in_contextidr = true; + else + arm64_pid_in_contextidr = false; + + arm_spe_enable(NULL); +} + +static void +spe_backend_disable(struct hwt_context *ctx, int cpu_id) +{ + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; + + if (ctx->mode == HWT_MODE_CPU) + return; + + KASSERT(curcpu == cpu_id, ("%s: attempting to disable SPE on another cpu", __func__)); + + mtx_lock_spin(&info->lock); + + if (!info->stopped) + arm_spe_disable_nolock(); + + mtx_unlock_spin(&info->lock); +} + +static void +arm_spe_flush(void *arg, int pending __unused) +{ + struct arm_spe_info *info = arg; + struct arm_spe_buf_info *buf = &info->buf_info[info->buf_idx]; + + arm_spe_send_buffer(buf, 0); +} + +static void spe_backend_stop(struct hwt_context *ctx) { + struct arm_spe_info *info; + struct hwt_thread *thr; + + HWT_CTX_LOCK(ctx); + + if (ctx->mode == HWT_MODE_THREAD) { + ctx->state = CTX_STATE_STOPPED; + + TAILQ_FOREACH(thr, &ctx->threads, next) { + info = (struct arm_spe_info *)thr->private; + + mtx_lock_spin(&info->lock); + + info->stopped = true; + + if (!info->enabled) { + /* Not currently tracing. Enqueue buffer for sending */ + TASK_INIT(&info->flush_task, 0, (task_fn_t *)arm_spe_flush, info); + taskqueue_enqueue(taskqueue_arm_spe, &info->flush_task); + } + /* Otherwise tracing currently active. As this thread has been + * marked as stopped, buffer will be sent on next disable + */ + + mtx_unlock_spin(&info->lock); + } + + } + + HWT_CTX_UNLOCK(ctx); + + taskqueue_drain_all(taskqueue_arm_spe); + spe_backend_disable_smp(ctx); } static void arm_spe_reenable(void *arg __unused) { - struct arm_spe_info *info = &spe_info[PCPU_GET(cpuid)];; + struct arm_spe_info *info = spe_info[PCPU_GET(cpuid)]; WRITE_SPECIALREG(PMSCR_EL1_REG, info->pmscr); isb(); @@ -481,9 +634,10 @@ static int spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, int data_version) { - struct arm_spe_info *info; + struct arm_spe_info *info = NULL; struct arm_spe_buf_info *buf; struct arm_spe_svc_buf *s; + struct hwt_thread *thr; int err = 0; cpuset_t cpu_set; @@ -496,15 +650,29 @@ spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, s = (struct arm_spe_svc_buf *)data; if (s->buf_idx > 1) return (ENODEV); - if (s->ident >= mp_ncpus) - return (EINVAL); - info = &spe_info[s->ident]; + if (ctx->mode == HWT_MODE_CPU) { + if (s->ident >= mp_ncpus) + return (EINVAL); + + info = spe_info[s->ident]; + } else { + TAILQ_FOREACH(thr, &ctx->threads, next) { + if (thr->thread_id != s->ident) + continue; + info = (struct arm_spe_info *)thr->private; + break; + } + + if (info == NULL) + return (ENOENT); + } + mtx_lock_spin(&info->lock); buf = &info->buf_info[s->buf_idx]; - if (!info->enabled) { + if (!info->enabled && ctx->mode == HWT_MODE_CPU) { err = ENXIO; goto end; } @@ -513,7 +681,7 @@ spe_backend_svc_buf(struct hwt_context *ctx, void *data, size_t data_size, buf->buf_svc = false; /* Re-enable profiling if we've been waiting for this notification */ - if (buf->buf_wait) { + if (buf->buf_wait && !info->stopped) { CPU_SETOF(s->ident, &cpu_set); mtx_unlock_spin(&info->lock); @@ -563,6 +731,38 @@ error: return (0); } +static int +spe_backend_thread_alloc(struct hwt_thread *thr) +{ + struct arm_spe_softc *sc = device_get_softc(spe_dev); + char lock_name[32]; + struct arm_spe_info *info; + + info = malloc(sizeof(*info), M_ARM_SPE, M_WAITOK | M_ZERO); + + info->sc = sc; + info->buf_info[0].info = info; + info->buf_info[0].buf_idx = 0; + info->buf_info[1].info = info; + info->buf_info[1].buf_idx = 1; + snprintf(lock_name, sizeof(lock_name), "Arm SPE lock/thr/%d", thr->thread_id); + mtx_init(&info->lock, lock_name, NULL, MTX_SPIN); + + thr->private = info; + + return (0); +} + +static void +spe_backend_thread_free(struct hwt_thread *thr) +{ + struct arm_spe_info *info; + + info = (struct arm_spe_info *)thr->private; + + free(info, M_ARM_SPE); +} + static struct hwt_backend_ops spe_ops = { .hwt_backend_init = spe_backend_init, .hwt_backend_deinit = spe_backend_deinit, @@ -571,10 +771,16 @@ static struct hwt_backend_ops spe_ops = { .hwt_backend_svc_buf = spe_backend_svc_buf, .hwt_backend_stop = spe_backend_stop, + .hwt_backend_enable = spe_backend_enable, + .hwt_backend_disable = spe_backend_disable, + .hwt_backend_enable_smp = spe_backend_enable_smp, .hwt_backend_disable_smp = spe_backend_disable_smp, .hwt_backend_read = spe_backend_read, + + .hwt_backend_thread_alloc = spe_backend_thread_alloc, + .hwt_backend_thread_free = spe_backend_thread_free, }; int diff --git a/sys/arm64/spe/arm_spe_dev.c b/sys/arm64/spe/arm_spe_dev.c index 8a834197eeef..61c0b5cc16c4 100644 --- a/sys/arm64/spe/arm_spe_dev.c +++ b/sys/arm64/spe/arm_spe_dev.c @@ -131,7 +131,7 @@ arm_spe_intr(void *arg) uint64_t pmbsr; uint64_t base, limit; uint8_t ec; - struct arm_spe_info *info = &sc->spe_info[cpu_id]; + struct arm_spe_info *info = sc->spe_info[cpu_id]; uint8_t i = info->buf_idx; struct arm_spe_buf_info *buf = &info->buf_info[i]; struct arm_spe_buf_info *prev_buf = &info->buf_info[!i]; @@ -311,8 +311,9 @@ arm_spe_error(void *arg, int pending __unused) struct kevent kev; int ret; - smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, - arm_spe_disable, smp_no_rendezvous_barrier, NULL); + if (!CPU_EMPTY(&ctx->cpu_map)) + smp_rendezvous_cpus(ctx->cpu_map, smp_no_rendezvous_barrier, + arm_spe_disable, smp_no_rendezvous_barrier, NULL); EV_SET(&kev, ARM_SPE_KQ_SHUTDOWN, EVFILT_USER, 0, NOTE_TRIGGER, 0, NULL); ret = kqfd_register(ctx->kqueue_fd, &kev, ctx->hwt_td, M_WAITOK); diff --git a/sys/arm64/spe/arm_spe_dev.h b/sys/arm64/spe/arm_spe_dev.h index df88d98ef1c0..ed1727b5b090 100644 --- a/sys/arm64/spe/arm_spe_dev.h +++ b/sys/arm64/spe/arm_spe_dev.h @@ -80,7 +80,7 @@ struct arm_spe_softc { int64_t sc_pmsidr; int kqueue_fd; struct thread *hwt_td; - struct arm_spe_info *spe_info; + struct arm_spe_info **spe_info; struct hwt_context *ctx; STAILQ_HEAD(, arm_spe_queue) pending; uint64_t npending; @@ -105,7 +105,9 @@ struct arm_spe_info { struct mtx lock; struct arm_spe_softc *sc; struct task task[2]; + struct task flush_task; bool enabled : 1; + bool stopped : 1; /* buffer is split in half as a ping-pong buffer */ vm_object_t bufobj; diff --git a/sys/arm64/vmm/io/vgic_v3.c b/sys/arm64/vmm/io/vgic_v3.c index 023406c64182..22cd06b09d7d 100644 --- a/sys/arm64/vmm/io/vgic_v3.c +++ b/sys/arm64/vmm/io/vgic_v3.c @@ -57,7 +57,6 @@ #include <machine/vmparam.h> #include <machine/intr.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/vmm_instruction_emul.h> #include <arm/arm/gic_common.h> @@ -69,6 +68,9 @@ #include <arm64/vmm/arm64.h> #include <arm64/vmm/vmm_handlers.h> +#include <dev/vmm/vmm_dev.h> +#include <dev/vmm/vmm_vm.h> + #include "vgic.h" #include "vgic_v3.h" #include "vgic_v3_reg.h" diff --git a/sys/arm64/vmm/io/vtimer.c b/sys/arm64/vmm/io/vtimer.c index 7c7fbb49e691..d1c489463882 100644 --- a/sys/arm64/vmm/io/vtimer.c +++ b/sys/arm64/vmm/io/vtimer.c @@ -47,6 +47,8 @@ #include <arm64/vmm/arm64.h> +#include <dev/vmm/vmm_vm.h> + #include "vgic.h" #include "vtimer.h" diff --git a/sys/arm64/vmm/vmm.c b/sys/arm64/vmm/vmm.c index 31d2fb3f516b..031400f3f1d0 100644 --- a/sys/arm64/vmm/vmm.c +++ b/sys/arm64/vmm/vmm.c @@ -40,7 +40,6 @@ #include <sys/rwlock.h> #include <sys/sched.h> #include <sys/smp.h> -#include <sys/sysctl.h> #include <vm/vm.h> #include <vm/vm_object.h> @@ -61,10 +60,12 @@ #include <machine/vmm_instruction_emul.h> #include <dev/pci/pcireg.h> + #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> #include <dev/vmm/vmm_stat.h> +#include <dev/vmm/vmm_vm.h> #include "arm64.h" #include "mmu.h" @@ -72,85 +73,11 @@ #include "io/vgic.h" #include "io/vtimer.h" -struct vcpu { - int flags; - enum vcpu_state state; - struct mtx mtx; - int hostcpu; /* host cpuid this vcpu last ran on */ - int vcpuid; - void *stats; - struct vm_exit exitinfo; - uint64_t nextpc; /* (x) next instruction to execute */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct vfpstate *guestfpu; /* (a,i) guest fpu state */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -struct vmm_mmio_region { - uint64_t start; - uint64_t end; - mem_region_read_t read; - mem_region_write_t write; -}; -#define VM_MAX_MMIO_REGIONS 4 - -struct vmm_special_reg { - uint32_t esr_iss; - uint32_t esr_mask; - reg_read_t reg_read; - reg_write_t reg_write; - void *arg; -}; -#define VM_MAX_SPECIAL_REGS 16 - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - struct vm_mem mem; /* (i) guest memory */ - char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (i) guest vcpus */ - struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; - /* (o) guest MMIO regions */ - struct vmm_special_reg special_reg[VM_MAX_SPECIAL_REGS]; - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - -static int vm_handle_wfi(struct vcpu *vcpu, - struct vm_exit *vme, bool *retu); - static MALLOC_DEFINE(M_VMM, "vmm", "vmm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW, NULL, NULL); - -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - struct vmm_regs { uint64_t id_aa64afr0; uint64_t id_aa64afr1; @@ -205,8 +132,6 @@ static const struct vmm_regs vmm_arch_regs_masks = { /* Host registers masked by vmm_arch_regs_masks. */ static struct vmm_regs vmm_arch_regs; -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); VMM_STAT(VMEXIT_UNKNOWN, "number of vmexits for the unknown exception"); @@ -357,14 +282,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -401,18 +318,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -426,6 +331,7 @@ vm_create(const char *name, struct vm **retvm) return (error); } strcpy(vm->name, name); + mtx_init(&vm->rendezvous_mtx, "vm rendezvous lock", 0, MTX_DEF); sx_init(&vm->vcpus_init_lock, "vm vcpus"); vm->sockets = 1; @@ -442,35 +348,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -515,29 +392,11 @@ vm_destroy(struct vm *vm) free(vm, M_VMM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -828,33 +687,6 @@ out_user: return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc) { @@ -882,136 +714,6 @@ vm_exit_debug(struct vcpu *vcpu, uint64_t pc) vmexit->exitcode = VM_EXITCODE_DEBUG; } -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); - -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - - -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - static void restore_guest_fpustate(struct vcpu *vcpu) { @@ -1047,71 +749,6 @@ save_guest_fpustate(struct vcpu *vcpu) KASSERT(PCPU_GET(fpcurthread) == NULL, ("%s: fpcurthread set with guest registers", __func__)); } -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) { - vcpu_notify_event_locked(vcpu); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); - } - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) @@ -1149,56 +786,12 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - return (vcpu->vcpuid); -} - void * vcpu_get_cookie(struct vcpu *vcpu) { return (vcpu->cookie); } -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - return (vm->vcpu[vcpuid]); -} - -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval) { diff --git a/sys/arm64/vmm/vmm_arm64.c b/sys/arm64/vmm/vmm_arm64.c index aa1361049f49..d529f000b828 100644 --- a/sys/arm64/vmm/vmm_arm64.c +++ b/sys/arm64/vmm/vmm_arm64.c @@ -52,12 +52,12 @@ #include <machine/cpu.h> #include <machine/machdep.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/atomic.h> #include <machine/hypervisor.h> #include <machine/pmap.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "mmu.h" #include "arm64.h" diff --git a/sys/arm64/vmm/vmm_reset.c b/sys/arm64/vmm/vmm_reset.c index 0e4910ea87b4..06ac6dec5af8 100644 --- a/sys/arm64/vmm/vmm_reset.c +++ b/sys/arm64/vmm/vmm_reset.c @@ -34,6 +34,8 @@ #include <machine/cpu.h> #include <machine/hypervisor.h> +#include <dev/vmm/vmm_vm.h> + #include "arm64.h" #include "reset.h" diff --git a/sys/cam/cam.c b/sys/cam/cam.c index 917197542edc..8e70aacba9a9 100644 --- a/sys/cam/cam.c +++ b/sys/cam/cam.c @@ -30,9 +30,13 @@ #include <sys/param.h> #ifdef _KERNEL +#include "opt_kdtrace.h" + #include <sys/systm.h> #include <sys/kernel.h> #include <sys/memdesc.h> +#include <sys/queue.h> +#include <sys/sdt.h> #include <sys/sysctl.h> #else /* _KERNEL */ #include <stdlib.h> @@ -55,6 +59,7 @@ FEATURE(scbus, "SCSI devices support"); +SDT_PROVIDER_DEFINE(cam); #endif static int camstatusentrycomp(const void *key, const void *member); diff --git a/sys/cam/cam.h b/sys/cam/cam.h index 83c1fc7b35ca..4d12debdd86f 100644 --- a/sys/cam/cam.h +++ b/sys/cam/cam.h @@ -33,6 +33,9 @@ #ifdef _KERNEL #include "opt_cam.h" +/* Only need the hooks here so no opt_kdtrace.h */ +#include <sys/queue.h> +#include <sys/sdt.h> #endif #ifndef _KERNEL @@ -374,6 +377,17 @@ extern const struct cam_status_entry cam_status_table[]; extern const int num_cam_status_entries; #ifdef _KERNEL extern int cam_sort_io_queues; +#ifdef SDT_PROVIDER_DECLARE +SDT_PROVIDER_DECLARE(cam); +#endif +#define CAM_PROBE1(group, probe, arg0) \ + SDT_PROBE1(cam, , group, probe, arg0) +#define CAM_PROBE2(group, probe, arg0, arg1) \ + SDT_PROBE2(cam, , group, probe, arg0, arg1) +#define CAM_PROBE3(group, probe, arg0, arg1, arg2) \ + SDT_PROBE3(cam, , group, probe, arg0, arg1, arg2) +#define CAM_PROBE4(group, probe, arg0, arg1, arg2, arg3) \ + SDT_PROBE4(cam, , group, probe, arg0, arg1, arg2, arg3) #endif union ccb; struct sbuf; diff --git a/sys/cam/cam_ccb.h b/sys/cam/cam_ccb.h index bb23c6bed26f..cedb3a9ad61c 100644 --- a/sys/cam/cam_ccb.h +++ b/sys/cam/cam_ccb.h @@ -160,12 +160,14 @@ typedef enum { /* Path statistics (error counts, etc.) */ XPT_GDEV_STATS = 0x0c, /* Device statistics (error counts, etc.) */ + + /* 0x0d unused */ XPT_DEV_ADVINFO = 0x0e, /* Get/Set Device advanced information */ XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB | XPT_FC_XPT_ONLY, /* Asynchronous event */ -/* SCSI Control Functions: 0x10->0x1F */ +/* SCSI, NVME, and ATA Control Functions: 0x10->0x1F */ XPT_ABORT = 0x10, /* Abort the specified CCB */ XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY, @@ -199,14 +201,10 @@ typedef enum { XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */ XPT_SET_SIM_KNOB = 0x19, - /* - * Set SIM specific knob values. - */ + /* Set SIM specific knob values. */ XPT_GET_SIM_KNOB = 0x1a, - /* - * Get SIM specific knob values. - */ + /* Get SIM specific knob values. */ XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED, /* Serial Management Protocol */ @@ -250,8 +248,11 @@ typedef enum { XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB, /* Query device capacity and notify GEOM */ +/* More common commands: 0x40-0x7f */ XPT_MMC_SET_TRAN_SETTINGS = 0x40 | XPT_FC_DEV_QUEUED, + /* Queued MMC/SD set transmit settings */ XPT_MMC_GET_TRAN_SETTINGS = 0x41 | XPT_FC_DEV_QUEUED, + /* Queued MMC/SD get transmit settings */ /* Vendor Unique codes: 0x80->0x8F */ XPT_VUNIQUE = 0x80 diff --git a/sys/cam/cam_xpt.c b/sys/cam/cam_xpt.c index ecf06045ed90..8b42fb2ca6c5 100644 --- a/sys/cam/cam_xpt.c +++ b/sys/cam/cam_xpt.c @@ -70,6 +70,12 @@ #include <cam/scsi/scsi_pass.h> +/* SDT Probes */ +SDT_PROBE_DEFINE1(cam, , xpt, action, "union ccb *"); +SDT_PROBE_DEFINE1(cam, , xpt, done, "union ccb *"); +SDT_PROBE_DEFINE4(cam, , xpt, async__cb, "void *", "uint32_t", + "struct cam_path *", "void *"); + /* Wild guess based on not wanting to grow the stack too much */ #define XPT_PRINT_MAXLEN 512 #ifdef PRINTF_BUFR_SIZE @@ -2479,6 +2485,8 @@ xptsetasyncfunc(struct cam_ed *device, void *arg) device->target->target_id, device->lun_id); xpt_gdev_type(&cgd, &path); + CAM_PROBE4(xpt, async__cb, csa->callback_arg, + AC_FOUND_DEVICE, &path, &cgd); csa->callback(csa->callback_arg, AC_FOUND_DEVICE, &path, &cgd); @@ -2500,6 +2508,8 @@ xptsetasyncbusfunc(struct cam_eb *bus, void *arg) CAM_LUN_WILDCARD); xpt_path_lock(&path); xpt_path_inq(&cpi, &path); + CAM_PROBE4(xpt, async__cb, csa->callback_arg, + AC_PATH_REGISTERED, &path, &cpi); csa->callback(csa->callback_arg, AC_PATH_REGISTERED, &path, &cpi); @@ -2526,6 +2536,7 @@ xpt_action(union ccb *start_ccb) start_ccb->ccb_h.pinfo.priority != CAM_PRIORITY_NONE, ("%s: queued ccb and CAM_PRIORITY_NONE illegal.", __func__)); + CAM_PROBE1(xpt, action, start_ccb); start_ccb->ccb_h.status = CAM_REQ_INPROG; (*(start_ccb->ccb_h.path->bus->xport->ops->action))(start_ccb); } @@ -4260,6 +4271,8 @@ xpt_async_bcast(struct async_list *async_head, path->device->sim->mtx : NULL; if (mtx) mtx_lock(mtx); + CAM_PROBE4(xpt, async__cb, cur_entry->callback_arg, + async_code, path, async_arg); cur_entry->callback(cur_entry->callback_arg, async_code, path, async_arg); @@ -4499,8 +4512,10 @@ xpt_done(union ccb *done_ccb) done_ccb->ccb_h.func_code, xpt_action_name(done_ccb->ccb_h.func_code), done_ccb->ccb_h.status)); - if ((done_ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0) + if ((done_ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0) { + CAM_PROBE1(xpt, done, done_ccb); return; + } /* Store the time the ccb was in the sim */ done_ccb->ccb_h.qos.periph_data = cam_iosched_delta_t(done_ccb->ccb_h.qos.periph_data); @@ -5376,6 +5391,11 @@ xpt_done_process(struct ccb_hdr *ccb_h) } } + /* + * Call as late as possible. Do we want an early one too before the + * unfreeze / releases above? + */ + CAM_PROBE1(xpt, done, (union ccb *)ccb_h); /* container_of? */ /* Call the peripheral driver's callback */ ccb_h->pinfo.index = CAM_UNQUEUED_INDEX; (*ccb_h->cbfcnp)(ccb_h->path->periph, (union ccb *)ccb_h); diff --git a/sys/cam/scsi/scsi_all.c b/sys/cam/scsi/scsi_all.c index 4ea2ab7d4acd..d8bba97e79bc 100644 --- a/sys/cam/scsi/scsi_all.c +++ b/sys/cam/scsi/scsi_all.c @@ -3711,13 +3711,12 @@ scsi_command_string(struct cam_device *device, struct ccb_scsiio *csio, xpt_gdev_type(cgd, csio->ccb_h.path); /* - * If the device is unconfigured, just pretend that it is a hard - * drive. scsi_op_desc() needs this. + * If the device is unconfigured, the inq data is invalid. */ if (cgd->ccb_h.status == CAM_DEV_NOT_THERE) - cgd->inq_data.device = T_DIRECT; - - inq_data = &cgd->inq_data; + inq_data = NULL; + else + inq_data = &cgd->inq_data; #else /* !_KERNEL */ @@ -5170,13 +5169,12 @@ scsi_sense_sbuf(struct cam_device *device, struct ccb_scsiio *csio, xpt_gdev_type(cgd, csio->ccb_h.path); /* - * If the device is unconfigured, just pretend that it is a hard - * drive. scsi_op_desc() needs this. + * If the device is unconfigured, the inq data is invalid. */ if (cgd->ccb_h.status == CAM_DEV_NOT_THERE) - cgd->inq_data.device = T_DIRECT; - - inq_data = &cgd->inq_data; + inq_data = NULL; + else + inq_data = &cgd->inq_data; #else /* !_KERNEL */ diff --git a/sys/cam/scsi/scsi_da.c b/sys/cam/scsi/scsi_da.c index 773a786d08f7..3f18817030c1 100644 --- a/sys/cam/scsi/scsi_da.c +++ b/sys/cam/scsi/scsi_da.c @@ -2059,8 +2059,9 @@ dainit(void) status = xpt_register_async(AC_FOUND_DEVICE, daasync, NULL, NULL); if (status != CAM_REQ_CMP) { - printf("da: Failed to attach master async callback " - "due to status 0x%x!\n", status); + printf( + "da: Failed to attach master async callback due to status 0x%x!\n", + status); } else if (da_send_ordered) { /* Register our shutdown event handler */ if ((EVENTHANDLER_REGISTER(shutdown_post_sync, dashutdown, @@ -2186,10 +2187,10 @@ daasync(void *callback_arg, uint32_t code, path, daasync, AC_FOUND_DEVICE, cgd); - if (status != CAM_REQ_CMP - && status != CAM_REQ_INPROG) - printf("daasync: Unable to attach to new device " - "due to status 0x%x\n", status); + if (status != CAM_REQ_CMP && status != CAM_REQ_INPROG) + printf( + "daasync: Unable to attach to new device due to status 0x%x\n", + status); return; } case AC_ADVINFO_CHANGED: /* Doesn't touch periph */ @@ -2372,8 +2373,7 @@ dasysctlinit(void *context, int pending) SYSCTL_CHILDREN(softc->sysctl_tree), OID_AUTO, "optimal_nonseq_zones", CTLFLAG_RD, &softc->optimal_nonseq_zones, - "Optimal Number of Non-Sequentially Written Sequential Write " - "Preferred Zones"); + "Optimal Number of Non-Sequentially Written Sequential Write Preferred Zones"); SYSCTL_ADD_UQUAD(&softc->sysctl_ctx, SYSCTL_CHILDREN(softc->sysctl_tree), OID_AUTO, "max_seq_zones", CTLFLAG_RD, &softc->max_seq_zones, @@ -2859,8 +2859,8 @@ daregister(struct cam_periph *periph, void *arg) M_NOWAIT|M_ZERO); if (softc == NULL) { - printf("daregister: Unable to probe new device. " - "Unable to allocate softc\n"); + printf( + "daregister: Unable to probe new device. Unable to allocate softc\n"); return(CAM_REQ_CMP_ERR); } @@ -3035,8 +3035,8 @@ daregister(struct cam_periph *periph, void *arg) if (cam_iosched_init(&softc->cam_iosched, periph, softc->disk, daschedule) != 0) { - printf("daregister: Unable to probe new device. " - "Unable to allocate iosched memory\n"); + printf( + "daregister: Unable to probe new device. Unable to allocate iosched memory\n"); free(softc, M_DEVBUF); return(CAM_REQ_CMP_ERR); } @@ -3115,8 +3115,9 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, zone_sa = da_zone_bio_to_scsi(bp->bio_zone.zone_cmd); if (zone_sa == -1) { - xpt_print(periph->path, "Cannot translate zone " - "cmd %#x to SCSI\n", bp->bio_zone.zone_cmd); + xpt_print(periph->path, + "Cannot translate zone cmd %#x to SCSI\n", + bp->bio_zone.zone_cmd); error = EINVAL; goto bailout; } @@ -3180,8 +3181,7 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, if (error != 0) { error = EINVAL; xpt_print(periph->path, - "scsi_ata_zac_mgmt_out() returned an " - "error!"); + "scsi_ata_zac_mgmt_out() returned an error!"); goto bailout; } } @@ -3198,8 +3198,8 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, num_entries = rep->entries_allocated; if (num_entries == 0) { - xpt_print(periph->path, "No entries allocated for " - "Report Zones request\n"); + xpt_print(periph->path, + "No entries allocated for Report Zones request\n"); error = EINVAL; goto bailout; } @@ -3208,8 +3208,8 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, alloc_size = min(alloc_size, softc->disk->d_maxsize); rz_ptr = malloc(alloc_size, M_SCSIDA, M_NOWAIT | M_ZERO); if (rz_ptr == NULL) { - xpt_print(periph->path, "Unable to allocate memory " - "for Report Zones request\n"); + xpt_print(periph->path, + "Unable to allocate memory for Report Zones request\n"); error = ENOMEM; goto bailout; } @@ -3266,8 +3266,7 @@ da_zone_cmd(struct cam_periph *periph, union ccb *ccb, struct bio *bp, if (error != 0) { error = EINVAL; xpt_print(periph->path, - "scsi_ata_zac_mgmt_in() returned an " - "error!"); + "scsi_ata_zac_mgmt_in() returned an error!"); goto bailout; } } @@ -3599,8 +3598,8 @@ out: mode_buf_len = 192; mode_buf = malloc(mode_buf_len, M_SCSIDA, M_NOWAIT); if (mode_buf == NULL) { - xpt_print(periph->path, "Unable to send mode sense - " - "malloc failure\n"); + xpt_print(periph->path, + "Unable to send mode sense - malloc failure\n"); if ((softc->flags & DA_FLAG_CAN_RC16) != 0) softc->state = DA_STATE_PROBE_RC16; else @@ -3882,8 +3881,7 @@ out: log_dir = malloc(sizeof(*log_dir), M_SCSIDA, M_NOWAIT|M_ZERO); if (log_dir == NULL) { - xpt_print(periph->path, "Couldn't malloc log_dir " - "data\n"); + xpt_print(periph->path, "Couldn't malloc log_dir data\n"); daprobedone(periph, start_ccb); break; } @@ -3932,8 +3930,7 @@ out: id_dir = malloc(sizeof(*id_dir), M_SCSIDA, M_NOWAIT | M_ZERO); if (id_dir == NULL) { - xpt_print(periph->path, "Couldn't malloc id_dir " - "data\n"); + xpt_print(periph->path, "Couldn't malloc id_dir data\n"); daprobedone(periph, start_ccb); break; } @@ -3981,8 +3978,7 @@ out: sup_cap = malloc(sizeof(*sup_cap), M_SCSIDA, M_NOWAIT|M_ZERO); if (sup_cap == NULL) { - xpt_print(periph->path, "Couldn't malloc sup_cap " - "data\n"); + xpt_print(periph->path, "Couldn't malloc sup_cap data\n"); daprobedone(periph, start_ccb); break; } @@ -4032,8 +4028,7 @@ out: ata_zone = malloc(sizeof(*ata_zone), M_SCSIDA, M_NOWAIT|M_ZERO); if (ata_zone == NULL) { - xpt_print(periph->path, "Couldn't malloc ata_zone " - "data\n"); + xpt_print(periph->path, "Couldn't malloc ata_zone data\n"); daprobedone(periph, start_ccb); break; } @@ -4084,8 +4079,7 @@ out: if (bdc == NULL) { xpt_release_ccb(start_ccb); - xpt_print(periph->path, "Couldn't malloc zone VPD " - "data\n"); + xpt_print(periph->path, "Couldn't malloc zone VPD data\n"); break; } scsi_inquiry(&start_ccb->csio, @@ -4201,8 +4195,7 @@ da_delete_unmap(struct cam_periph *periph, union ccb *ccb, struct bio *bp) if (totalcount + c > softc->unmap_max_lba || ranges >= softc->unmap_max_ranges) { xpt_print(periph->path, - "%s issuing short delete %ld > %ld" - "|| %d >= %d", + "%s issuing short delete %ld > %ld || %d >= %d", da_delete_method_desc[softc->delete_method], totalcount + c, softc->unmap_max_lba, ranges, softc->unmap_max_ranges); @@ -4483,8 +4476,8 @@ cmd6workaround(union ccb *ccb) (*cdb != READ_6 && *cdb != WRITE_6)) return 0; - xpt_print(ccb->ccb_h.path, "READ(6)/WRITE(6) not supported, " - "increasing minimum_cmd_size to 10.\n"); + xpt_print(ccb->ccb_h.path, + "READ(6)/WRITE(6) not supported, increasing minimum_cmd_size to 10.\n"); softc->minimum_cmd_size = 10; bcopy(cdb, &cmd6, sizeof(struct scsi_rw_6)); @@ -5124,8 +5117,7 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) &cgd.inq_data, &sense_key_desc, &asc_desc); snprintf(announce_buf, DA_ANNOUNCETMP_SZ, - "Attempt to query device " - "size failed: %s, %s", + "Attempt to query device size failed: %s, %s", sense_key_desc, asc_desc); } else { if (have_sense) @@ -5135,9 +5127,8 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) "got CAM status %#x\n", done_ccb->ccb_h.status); } - - xpt_print(periph->path, "fatal error, " - "failed to attach to device\n"); + xpt_print(periph->path, + "fatal error, failed to attach to device\n"); announce_buf = NULL; @@ -5171,8 +5162,8 @@ dadone_proberc(struct cam_periph *periph, union ccb *done_ccb) &softc->sysctl_task); } else { /* XXX This message is useless! */ - xpt_print(periph->path, "fatal error, " - "could not acquire reference count\n"); + xpt_print(periph->path, + "fatal error, could not acquire reference count\n"); } } @@ -5410,8 +5401,7 @@ dadone_probebdc(struct cam_periph *periph, union ccb *done_ccb) DA_ZONE_IF_ATA_SAT : DA_ZONE_IF_SCSI; } else if ((bdc->flags & SVPD_ZBC_MASK) != SVPD_ZBC_NR) { - xpt_print(periph->path, "Unknown zoned " - "type %#x", + xpt_print(periph->path, "Unknown zoned type %#x", bdc->flags & SVPD_ZBC_MASK); } } @@ -6516,8 +6506,9 @@ dasetgeom(struct cam_periph *periph, uint32_t block_len, uint64_t maxsector, if ((cdai.ccb_h.status & CAM_DEV_QFRZN) != 0) cam_release_devq(cdai.ccb_h.path, 0, 0, 0, FALSE); if (cdai.ccb_h.status != CAM_REQ_CMP) { - xpt_print(periph->path, "%s: failed to set read " - "capacity advinfo\n", __func__); + xpt_print(periph->path, + "%s: failed to set read capacity advinfo\n", + __func__); /* Use cam_error_print() to decode the status */ cam_error_print((union ccb *)&cdai, CAM_ESF_CAM_STATUS, CAM_EPF_ALL); diff --git a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c b/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c deleted file mode 100644 index a31eac8cf0b8..000000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ - -/* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - - -/* - * XXX: Placeholder for MIPS fasttrap code - */ diff --git a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h b/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h deleted file mode 100644 index eb99752ce415..000000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _FASTTRAP_ISA_H -#define _FASTTRAP_ISA_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include <sys/types.h> - -#ifdef __cplusplus -extern "C" { -#endif -/* - * XXXDTRACE: placehodler for MIPS fasttrap stuff - */ - -typedef uint32_t fasttrap_instr_t; -#define FASTTRAP_SUNWDTRACE_SIZE 64 - -#ifdef __cplusplus -} -#endif - -#endif /* _FASTTRAP_ISA_H */ diff --git a/sys/compat/linux/linux_timer.c b/sys/compat/linux/linux_timer.c index ed9133359302..230be9572b85 100644 --- a/sys/compat/linux/linux_timer.c +++ b/sys/compat/linux/linux_timer.c @@ -131,7 +131,7 @@ linux_timer_settime(struct thread *td, struct linux_timer_settime_args *uap) return (error); error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp); if (error == 0 && uap->old != NULL) { - error = native_to_linux_itimerspec(&l_val, &val); + error = native_to_linux_itimerspec(&l_oval, &oval); if (error == 0) error = copyout(&l_oval, uap->old, sizeof(l_oval)); } @@ -158,7 +158,7 @@ linux_timer_settime64(struct thread *td, struct linux_timer_settime64_args *uap) return (error); error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp); if (error == 0 && uap->old != NULL) { - error = native_to_linux_itimerspec64(&l_val, &val); + error = native_to_linux_itimerspec64(&l_oval, &oval); if (error == 0) error = copyout(&l_oval, uap->old, sizeof(l_oval)); } diff --git a/sys/compat/linuxkpi/common/include/asm/unaligned.h b/sys/compat/linuxkpi/common/include/asm/unaligned.h index e45846a3b543..6778e9fcede1 100644 --- a/sys/compat/linuxkpi/common/include/asm/unaligned.h +++ b/sys/compat/linuxkpi/common/include/asm/unaligned.h @@ -48,6 +48,13 @@ get_unaligned_le32(const void *p) return (le32_to_cpup((const __le32 *)p)); } +static __inline uint64_t +get_unaligned_le64(const void *p) +{ + + return (le64_to_cpup((const __le64 *)p)); +} + static __inline void put_unaligned_le16(__le16 v, void *p) { diff --git a/sys/compat/linuxkpi/common/include/linux/bitops.h b/sys/compat/linuxkpi/common/include/linux/bitops.h index 8fac80820f30..ebe9aa120094 100644 --- a/sys/compat/linuxkpi/common/include/linux/bitops.h +++ b/sys/compat/linuxkpi/common/include/linux/bitops.h @@ -437,4 +437,16 @@ sign_extend32(uint32_t value, int index) return ((int32_t)(value << shift) >> shift); } +static inline uint64_t +rol64(uint64_t word, unsigned int shift) +{ + return ((word << (shift & 63)) | (word >> ((-shift) & 63))); +} + +static inline uint32_t +rol32(uint32_t word, unsigned int shift) +{ + return ((word << (shift & 31)) | (word >> ((-shift) & 31))); +} + #endif /* _LINUXKPI_LINUX_BITOPS_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/cec-funcs.h b/sys/compat/linuxkpi/common/include/linux/cec-funcs.h new file mode 100644 index 000000000000..1107b04e4e08 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/cec-funcs.h @@ -0,0 +1,16 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_CEC_FUNCS_H_ +#define _LINUXKPI_LINUX_CEC_FUNCS_H_ + +#include <linux/cec.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/cec.h b/sys/compat/linuxkpi/common/include/linux/cec.h index e0854d87d85c..b08d891537a9 100644 --- a/sys/compat/linuxkpi/common/include/linux/cec.h +++ b/sys/compat/linuxkpi/common/include/linux/cec.h @@ -3,6 +3,9 @@ #ifndef _LINUXKPI_LINUX_CEC_H_ #define _LINUXKPI_LINUX_CEC_H_ +#include <linux/types.h> +#include <linux/string.h> + #define CEC_PHYS_ADDR_INVALID 0xffff #endif /* _LINUXKPI_LINUX_CEC_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/cgroup.h b/sys/compat/linuxkpi/common/include/linux/cgroup.h index a9dd22fd0f4c..c75404fd6cf3 100644 --- a/sys/compat/linuxkpi/common/include/linux/cgroup.h +++ b/sys/compat/linuxkpi/common/include/linux/cgroup.h @@ -29,6 +29,15 @@ #ifndef _LINUXKPI_LINUX_CGROUP_H_ #define _LINUXKPI_LINUX_CGROUP_H_ +#include <linux/sched.h> +#include <linux/nodemask.h> +#include <linux/list.h> +#include <linux/rculist.h> +#include <linux/fs.h> +#include <linux/seq_file.h> +#include <linux/jump_label.h> +#include <linux/types.h> +#include <linux/refcount.h> #include <linux/kernel_stat.h> #endif /* _LINUXKPI_LINUX_CGROUP_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/compiler.h b/sys/compat/linuxkpi/common/include/linux/compiler.h index 4146c829b936..90d907dd4d45 100644 --- a/sys/compat/linuxkpi/common/include/linux/compiler.h +++ b/sys/compat/linuxkpi/common/include/linux/compiler.h @@ -33,48 +33,18 @@ #include <sys/cdefs.h> #include <sys/endian.h> -#define __user -#define __kernel -#define __safe -#define __force -#define __nocast -#define __iomem -#define __chk_user_ptr(x) ((void)0) -#define __chk_io_ptr(x) ((void)0) -#define __builtin_warning(x, y...) (1) -#define __acquires(x) -#define __releases(x) -#define __acquire(x) do { } while (0) -#define __release(x) do { } while (0) -#define __cond_lock(x,c) (c) +#include <compat/linuxkpi/common/include/linux/compiler_types.h> + #define __bitwise #define __devinitdata -#ifndef __deprecated -#define __deprecated -#endif #define __init #define __initconst #define __devinit #define __devexit #define __exit -#define __rcu -#define __percpu -#define __weak __weak_symbol -#define __malloc -#define __attribute_const__ __attribute__((__const__)) -#undef __always_inline -#define __always_inline inline -#define noinline __noinline -#define noinline_for_stack __noinline #define ____cacheline_aligned __aligned(CACHE_LINE_SIZE) #define ____cacheline_aligned_in_smp __aligned(CACHE_LINE_SIZE) -#define fallthrough /* FALLTHROUGH */ do { } while(0) -#if __has_attribute(__nonstring__) -#define __nonstring __attribute__((__nonstring__)) -#else -#define __nonstring -#endif #if __has_attribute(__counted_by__) #define __counted_by(_x) __attribute__((__counted_by__(_x))) #else @@ -93,24 +63,12 @@ #define typeof(x) __typeof(x) #define uninitialized_var(x) x = x -#define __maybe_unused __unused -#define __always_unused __unused -#define __must_check __result_use_check - -#define __printf(a,b) __printflike(a,b) - -#define __diag_push() -#define __diag_pop() -#define __diag_ignore_all(...) #define barrier() __asm__ __volatile__("": : :"memory") #define lower_32_bits(n) ((u32)(n)) #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) -#define ___PASTE(a,b) a##b -#define __PASTE(a,b) ___PASTE(a,b) - #define WRITE_ONCE(x,v) do { \ barrier(); \ (*(volatile __typeof(x) *)(uintptr_t)&(x)) = (v); \ @@ -129,8 +87,6 @@ #define lockless_dereference(p) READ_ONCE(p) #define _AT(T,X) ((T)(X)) - -#define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) #define __must_be_array(a) __same_type(a, &(a)[0]) #define sizeof_field(_s, _m) sizeof(((_s *)0)->_m) diff --git a/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h b/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h new file mode 100644 index 000000000000..42908bb6c2b5 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/compiler_attributes.h @@ -0,0 +1,49 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2010 Isilon Systems, Inc. + * Copyright (c) 2010 iX Systems, Inc. + * Copyright (c) 2010 Panasas, Inc. + * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. + * Copyright (c) 2015 François Tigeot + * All rights reserved. + */ + +#ifndef _LINUXKPI_LINUX_COMPILER_ATTRIBUTES_H_ +#define _LINUXKPI_LINUX_COMPILER_ATTRIBUTES_H_ + +#include <sys/cdefs.h> + +#define __attribute_const__ __attribute__((__const__)) + +#ifndef __deprecated +#define __deprecated +#endif + +#define fallthrough /* FALLTHROUGH */ do { } while(0) + +#undef __always_inline +#define __always_inline inline + +#define __printf(a,b) __printflike(a,b) + +#define __malloc + +#define noinline __noinline + +#if __has_attribute(__nonstring__) +#define __nonstring __attribute__((__nonstring__)) +#else +#define __nonstring +#endif + +#define noinline_for_stack __noinline + +#define __maybe_unused __unused +#define __always_unused __unused + +#define __must_check __result_use_check + +#define __weak __weak_symbol + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/compiler_types.h b/sys/compat/linuxkpi/common/include/linux/compiler_types.h new file mode 100644 index 000000000000..7151c03de690 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/compiler_types.h @@ -0,0 +1,45 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2010 Isilon Systems, Inc. + * Copyright (c) 2010 iX Systems, Inc. + * Copyright (c) 2010 Panasas, Inc. + * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. + * Copyright (c) 2015 François Tigeot + * All rights reserved. + */ + +#ifndef _LINUXKPI_LINUX_COMPILER_TYPES_H_ +#define _LINUXKPI_LINUX_COMPILER_TYPES_H_ + +#include <sys/cdefs.h> + +#include <compat/linuxkpi/common/include/linux/compiler_attributes.h> + +#define __kernel +#define __user +#define __iomem +#define __percpu +#define __rcu +#define __chk_user_ptr(x) ((void)0) +#define __chk_io_ptr(x) ((void)0) +#define __acquires(x) +#define __releases(x) +#define __acquire(x) do { } while (0) +#define __release(x) do { } while (0) +#define __cond_lock(x,c) (c) +#define __force +#define __nocast +#define __safe +#define __builtin_warning(x, y...) (1) + +#define ___PASTE(a,b) a##b +#define __PASTE(a,b) ___PASTE(a,b) + +#define __diag_push() +#define __diag_pop() +#define __diag_ignore_all(...) + +#define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/file.h b/sys/compat/linuxkpi/common/include/linux/file.h index f6e988c2d88e..be12d5f1bccf 100644 --- a/sys/compat/linuxkpi/common/include/linux/file.h +++ b/sys/compat/linuxkpi/common/include/linux/file.h @@ -39,6 +39,11 @@ #include <linux/fs.h> #include <linux/slab.h> +#include <linux/compiler.h> +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/cleanup.h> + struct linux_file; #undef file diff --git a/sys/compat/linuxkpi/common/include/linux/font.h b/sys/compat/linuxkpi/common/include/linux/font.h new file mode 100644 index 000000000000..45daa00b61f0 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/font.h @@ -0,0 +1,33 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_FONT_H_ +#define _LINUXKPI_LINUX_FONT_H_ + +#include <linux/types.h> + +struct font_desc { + const char *name; + const void *data; + int idx; + unsigned int width; + unsigned int height; + unsigned int charcount; + int pref; +}; + +static inline const struct font_desc * +get_default_font(int xres, int yres, unsigned long *font_w, + unsigned long *font_h) +{ + return (NULL); +} + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/i2c.h b/sys/compat/linuxkpi/common/include/linux/i2c.h index f24d282586f6..a6a4ee85d584 100644 --- a/sys/compat/linuxkpi/common/include/linux/i2c.h +++ b/sys/compat/linuxkpi/common/include/linux/i2c.h @@ -31,7 +31,14 @@ #include <sys/errno.h> #include <sys/systm.h> +#include <linux/bits.h> +#include <linux/mod_devicetable.h> #include <linux/device.h> +#include <linux/sched.h> +#include <linux/mutex.h> +#include <linux/regulator/consumer.h> +#include <linux/irqdomain.h> +#include <linux/of.h> #define I2C_MAX_ADAPTER_NAME_LENGTH 32 diff --git a/sys/compat/linuxkpi/common/include/linux/kfifo.h b/sys/compat/linuxkpi/common/include/linux/kfifo.h index d2f570781661..fbe16e22683e 100644 --- a/sys/compat/linuxkpi/common/include/linux/kfifo.h +++ b/sys/compat/linuxkpi/common/include/linux/kfifo.h @@ -33,8 +33,26 @@ #include <linux/slab.h> #include <linux/gfp.h> -#define INIT_KFIFO(x) 0 -#define DECLARE_KFIFO(x, y, z) +/* + * INIT_KFIFO() is used to initialize the structure declared with + * DECLARE_KFIFO(). It doesn't work with DECLARE_KFIFO_PTR(). + */ +#define INIT_KFIFO(_kf) \ + ({ \ + (_kf).total = nitems((_kf).head); \ + (_kf).count = 0; \ + (_kf).first = 0; \ + (_kf).last = 0; \ + }) + +#define DECLARE_KFIFO(_name, _type, _size) \ + struct kfifo_ ## _name { \ + size_t total; \ + size_t count; \ + size_t first; \ + size_t last; \ + _type head[_size]; \ + } _name #define DECLARE_KFIFO_PTR(_name, _type) \ struct kfifo_ ## _name { \ diff --git a/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h b/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h new file mode 100644 index 000000000000..25f96b304f59 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/kmsg_dump.h @@ -0,0 +1,51 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_KMSG_DUMP_H_ +#define _LINUXKPI_LINUX_KMSG_DUMP_H_ + +#include <linux/errno.h> +#include <linux/list.h> + +#include <linux/kernel.h> /* For pr_debug() */ + +enum kmsg_dump_reason { + KMSG_DUMP_UNDEF, + KMSG_DUMP_PANIC, + KMSG_DUMP_OOPS, + KMSG_DUMP_EMERG, + KMSG_DUMP_SHUTDOWN, + KMSG_DUMP_MAX +}; + +struct kmsg_dumper { + struct list_head list; + void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason); + enum kmsg_dump_reason max_reason; + bool registered; +}; + +static inline int +kmsg_dump_register(struct kmsg_dumper *dumper) +{ + pr_debug("TODO"); + + return (-EINVAL); +} + +static inline int +kmsg_dump_unregister(struct kmsg_dumper *dumper) +{ + pr_debug("TODO"); + + return (-EINVAL); +} + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/kstrtox.h b/sys/compat/linuxkpi/common/include/linux/kstrtox.h index 5da99de24197..05bf94dd375d 100644 --- a/sys/compat/linuxkpi/common/include/linux/kstrtox.h +++ b/sys/compat/linuxkpi/common/include/linux/kstrtox.h @@ -74,14 +74,17 @@ static inline int kstrtoul(const char *cp, unsigned int base, unsigned long *res) { char *end; + unsigned long temp; - *res = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = temp; return (0); } @@ -89,14 +92,17 @@ static inline int kstrtol(const char *cp, unsigned int base, long *res) { char *end; + long temp; - *res = strtol(cp, &end, base); + temp = strtol(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = temp; return (0); } @@ -106,7 +112,7 @@ kstrtoint(const char *cp, unsigned int base, int *res) char *end; long temp; - *res = temp = strtol(cp, &end, base); + temp = strtol(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -115,6 +121,8 @@ kstrtoint(const char *cp, unsigned int base, int *res) return (-EINVAL); if (temp != (int)temp) return (-ERANGE); + + *res = (int)temp; return (0); } @@ -124,7 +132,7 @@ kstrtouint(const char *cp, unsigned int base, unsigned int *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -133,6 +141,8 @@ kstrtouint(const char *cp, unsigned int base, unsigned int *res) return (-EINVAL); if (temp != (unsigned int)temp) return (-ERANGE); + + *res = (unsigned int)temp; return (0); } @@ -142,7 +152,7 @@ kstrtou8(const char *cp, unsigned int base, uint8_t *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -151,6 +161,8 @@ kstrtou8(const char *cp, unsigned int base, uint8_t *res) return (-EINVAL); if (temp != (uint8_t)temp) return (-ERANGE); + + *res = (uint8_t)temp; return (0); } @@ -160,7 +172,7 @@ kstrtou16(const char *cp, unsigned int base, uint16_t *res) char *end; unsigned long temp; - *res = temp = strtoul(cp, &end, base); + temp = strtoul(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') @@ -169,20 +181,20 @@ kstrtou16(const char *cp, unsigned int base, uint16_t *res) return (-EINVAL); if (temp != (uint16_t)temp) return (-ERANGE); + + *res = (uint16_t)temp; return (0); } static inline int kstrtou32(const char *cp, unsigned int base, uint32_t *res) { - return (kstrtouint(cp, base, res)); } static inline int kstrtos32(const char *cp, unsigned int base, int32_t *res) { - return (kstrtoint(cp, base, res)); } @@ -190,14 +202,17 @@ static inline int kstrtos64(const char *cp, unsigned int base, int64_t *res) { char *end; + quad_t temp; - *res = strtoq(cp, &end, base); + temp = strtoq(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = (int64_t)temp; return (0); } @@ -208,17 +223,20 @@ kstrtoll(const char *cp, unsigned int base, long long *res) } static inline int -kstrtou64(const char *cp, unsigned int base, u64 *res) +kstrtou64(const char *cp, unsigned int base, uint64_t *res) { char *end; + u_quad_t temp; - *res = strtouq(cp, &end, base); + temp = strtouq(cp, &end, base); /* skip newline character, if any */ if (*end == '\n') end++; if (*cp == 0 || *end != 0) return (-EINVAL); + + *res = (uint64_t)temp; return (0); } @@ -231,22 +249,16 @@ kstrtoull(const char *cp, unsigned int base, unsigned long long *res) static inline int kstrtobool(const char *s, bool *res) { - int len; - - if (s == NULL || (len = strlen(s)) == 0 || res == NULL) + if (s == NULL || *s == '\0') return (-EINVAL); - /* skip newline character, if any */ - if (s[len - 1] == '\n') - len--; - - if (len == 1 && strchr("yY1", s[0]) != NULL) + if (strchr("eEtTyY1", s[0]) != NULL) *res = true; - else if (len == 1 && strchr("nN0", s[0]) != NULL) + else if (strchr("dDfFnN0", s[0]) != NULL) *res = false; - else if (strncasecmp("on", s, len) == 0) + else if (strncasecmp("on", s, 2) == 0) *res = true; - else if (strncasecmp("off", s, len) == 0) + else if (strncasecmp("of", s, 2) == 0) *res = false; else return (-EINVAL); @@ -302,7 +314,6 @@ static inline int kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, unsigned int *p) { - return (kstrtouint_from_user(s, count, base, p)); } diff --git a/sys/compat/linuxkpi/common/include/linux/memcontrol.h b/sys/compat/linuxkpi/common/include/linux/memcontrol.h new file mode 100644 index 000000000000..57fadf9af60f --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/memcontrol.h @@ -0,0 +1,43 @@ +/*- + * Copyright (c) 2025 The FreeBSD Foundation + * Copyright (c) 2025 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + + +#ifndef _LINUXKPI_LINUX_MEMCONTROL_H_ +#define _LINUXKPI_LINUX_MEMCONTROL_H_ + +#include <linux/cgroup.h> +#include <linux/hardirq.h> +#include <linux/jump_label.h> +#include <linux/kernel.h> +#include <linux/eventfd.h> +#include <linux/mm.h> +#include <linux/page-flags.h> +#include <linux/shrinker.h> + +#endif /* defined(_LINUXKPI_LINUX_MEMCONTROL_H_) */ diff --git a/sys/compat/linuxkpi/common/include/linux/notifier.h b/sys/compat/linuxkpi/common/include/linux/notifier.h index 9302a1ce4606..4fe43255c648 100644 --- a/sys/compat/linuxkpi/common/include/linux/notifier.h +++ b/sys/compat/linuxkpi/common/include/linux/notifier.h @@ -32,6 +32,11 @@ #include <sys/types.h> #include <sys/eventhandler.h> +#include <linux/errno.h> +#include <linux/mutex.h> +#include <linux/rwsem.h> +#include <linux/srcu.h> + #define NOTIFY_DONE 0 #define NOTIFY_OK 0x0001 #define NOTIFY_STOP_MASK 0x8000 diff --git a/sys/compat/linuxkpi/common/include/linux/pci.h b/sys/compat/linuxkpi/common/include/linux/pci.h index 06336bf963d6..8fe09554aed2 100644 --- a/sys/compat/linuxkpi/common/include/linux/pci.h +++ b/sys/compat/linuxkpi/common/include/linux/pci.h @@ -253,6 +253,20 @@ extern const char *pci_power_names[6]; #define PCI_IRQ_LEGACY PCI_IRQ_INTX #endif +/* + * Linux PCI code uses `PCI_SET_ERROR_RESPONSE()` to indicate to the caller of + * a `pci_read_*()` function that the read failed. An example of failure is + * whether the device was disconnected. It is a bit weird because Linux + * `pci_read_*()` can return an error value, as the read value is stored in a + * integer passed by pointer. + * + * We don't set PCI_ERROR_RESPONSE anywhere as of this commit, but the DRM + * drivers started to use `PCI_POSSIBLE_ERROR()`. + */ +#define PCI_ERROR_RESPONSE (~0ULL) +#define PCI_SET_ERROR_RESPONSE(val) (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE)) +#define PCI_POSSIBLE_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE)) + struct pci_dev; struct pci_driver { diff --git a/sys/compat/linuxkpi/common/include/linux/printk.h b/sys/compat/linuxkpi/common/include/linux/printk.h index d2d197682782..066ec900f04e 100644 --- a/sys/compat/linuxkpi/common/include/linux/printk.h +++ b/sys/compat/linuxkpi/common/include/linux/printk.h @@ -48,7 +48,13 @@ int __lkpi_hexdump_printf(void *, const char *, ...) __printflike(2, 3); void lkpi_hex_dump(int(*)(void *, const char *, ...), void *arg1, const char *, const char *, const int, const int, const int, - const void *, size_t, const bool); + const void *, size_t, const bool, const bool); + +#define hex_dump_to_buffer(buf, len, rowsize, groupsize, linebuf, linebuflen, ascii) \ + lkpi_hex_dump_to_buffer((buf), (len), (rowsize), (groupsize), (linebuf), (linebuflen), (ascii)) + +int lkpi_hex_dump_to_buffer(const void *buf, size_t len, int rowsize, + int groupsize, char *linebuf, size_t linebuflen, bool ascii); static inline void print_hex_dump(const char *level, const char *prefix_str, @@ -56,7 +62,7 @@ print_hex_dump(const char *level, const char *prefix_str, const void *buf, size_t len, const bool ascii) { lkpi_hex_dump(__lkpi_hexdump_printf, NULL, level, prefix_str, prefix_type, - rowsize, groupsize, buf, len, ascii); + rowsize, groupsize, buf, len, ascii, true); } static inline void diff --git a/sys/compat/linuxkpi/common/include/linux/radix-tree.h b/sys/compat/linuxkpi/common/include/linux/radix-tree.h index 1019697303db..55f0fc949807 100644 --- a/sys/compat/linuxkpi/common/include/linux/radix-tree.h +++ b/sys/compat/linuxkpi/common/include/linux/radix-tree.h @@ -68,6 +68,12 @@ struct radix_tree_iter { for ((iter)->index = (start); \ radix_tree_iter_find(root, iter, &(slot)); (iter)->index++) +static inline void * +radix_tree_deref_slot(void **slot) +{ + return (*slot); +} + static inline int radix_tree_exception(void *arg) { diff --git a/sys/compat/linuxkpi/common/include/linux/ratelimit.h b/sys/compat/linuxkpi/common/include/linux/ratelimit.h index 9585b4b994d7..fdef57c7882d 100644 --- a/sys/compat/linuxkpi/common/include/linux/ratelimit.h +++ b/sys/compat/linuxkpi/common/include/linux/ratelimit.h @@ -14,4 +14,11 @@ struct ratelimit_state { #define ratelimit_state_init(x, y, z) #define ratelimit_set_flags(x, y) +#define WARN_RATELIMIT(condition, ...) ({ \ + bool __ret_warn_on = (condition); \ + if (unlikely(__ret_warn_on)) \ + pr_warn_ratelimited(__VA_ARGS__); \ + unlikely(__ret_warn_on); \ +}) + #endif diff --git a/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h b/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h new file mode 100644 index 000000000000..d6c23575bc83 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/regulator/consumer.h @@ -0,0 +1,17 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_LINUX_REGULATOR_CONSUMER_H_ +#define _LINUXKPI_LINUX_REGULATOR_CONSUMER_H_ + +#include <linux/err.h> +#include <linux/suspend.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/linux/seq_file.h b/sys/compat/linuxkpi/common/include/linux/seq_file.h index 47da16ab8688..3c7862890c67 100644 --- a/sys/compat/linuxkpi/common/include/linux/seq_file.h +++ b/sys/compat/linuxkpi/common/include/linux/seq_file.h @@ -115,7 +115,7 @@ seq_hex_dump(struct seq_file *m, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii) { lkpi_hex_dump(__lkpi_hexdump_sbuf_printf, m->buf, NULL, prefix_str, prefix_type, - rowsize, groupsize, buf, len, ascii); + rowsize, groupsize, buf, len, ascii, true); } #define file linux_file diff --git a/sys/compat/linuxkpi/common/include/linux/siphash.h b/sys/compat/linuxkpi/common/include/linux/siphash.h new file mode 100644 index 000000000000..9153e77382e1 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/linux/siphash.h @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ +/* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. + * + * SipHash: a fast short-input PRF + * https://131002.net/siphash/ + * + * This implementation is specifically for SipHash2-4 for a secure PRF + * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for + * hashtables. + */ + +#ifndef _LINUX_SIPHASH_H +#define _LINUX_SIPHASH_H + +#include <linux/types.h> +#include <linux/kernel.h> + +#define SIPHASH_ALIGNMENT __alignof__(u64) +typedef struct { + u64 key[2]; +} siphash_key_t; + +#define siphash_aligned_key_t siphash_key_t __aligned(16) + +static inline bool siphash_key_is_zero(const siphash_key_t *key) +{ + return !(key->key[0] | key->key[1]); +} + +u64 __siphash_aligned(const void *data, size_t len, const siphash_key_t *key); +u64 __siphash_unaligned(const void *data, size_t len, const siphash_key_t *key); + +u64 siphash_1u64(const u64 a, const siphash_key_t *key); +u64 siphash_2u64(const u64 a, const u64 b, const siphash_key_t *key); +u64 siphash_3u64(const u64 a, const u64 b, const u64 c, + const siphash_key_t *key); +u64 siphash_4u64(const u64 a, const u64 b, const u64 c, const u64 d, + const siphash_key_t *key); +u64 siphash_1u32(const u32 a, const siphash_key_t *key); +u64 siphash_3u32(const u32 a, const u32 b, const u32 c, + const siphash_key_t *key); + +static inline u64 siphash_2u32(const u32 a, const u32 b, + const siphash_key_t *key) +{ + return siphash_1u64((u64)b << 32 | a, key); +} +static inline u64 siphash_4u32(const u32 a, const u32 b, const u32 c, + const u32 d, const siphash_key_t *key) +{ + return siphash_2u64((u64)b << 32 | a, (u64)d << 32 | c, key); +} + + +static inline u64 ___siphash_aligned(const __le64 *data, size_t len, + const siphash_key_t *key) +{ + if (__builtin_constant_p(len) && len == 4) + return siphash_1u32(le32_to_cpup((const __le32 *)data), key); + if (__builtin_constant_p(len) && len == 8) + return siphash_1u64(le64_to_cpu(data[0]), key); + if (__builtin_constant_p(len) && len == 16) + return siphash_2u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + key); + if (__builtin_constant_p(len) && len == 24) + return siphash_3u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + le64_to_cpu(data[2]), key); + if (__builtin_constant_p(len) && len == 32) + return siphash_4u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), + le64_to_cpu(data[2]), le64_to_cpu(data[3]), + key); + return __siphash_aligned(data, len, key); +} + +/** + * siphash - compute 64-bit siphash PRF value + * @data: buffer to hash + * @size: size of @data + * @key: the siphash key + */ +static inline u64 siphash(const void *data, size_t len, + const siphash_key_t *key) +{ + if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || + !IS_ALIGNED((unsigned long)data, SIPHASH_ALIGNMENT)) + return __siphash_unaligned(data, len, key); + return ___siphash_aligned(data, len, key); +} + +#define HSIPHASH_ALIGNMENT __alignof__(unsigned long) +typedef struct { + unsigned long key[2]; +} hsiphash_key_t; + +u32 __hsiphash_aligned(const void *data, size_t len, + const hsiphash_key_t *key); +u32 __hsiphash_unaligned(const void *data, size_t len, + const hsiphash_key_t *key); + +u32 hsiphash_1u32(const u32 a, const hsiphash_key_t *key); +u32 hsiphash_2u32(const u32 a, const u32 b, const hsiphash_key_t *key); +u32 hsiphash_3u32(const u32 a, const u32 b, const u32 c, + const hsiphash_key_t *key); +u32 hsiphash_4u32(const u32 a, const u32 b, const u32 c, const u32 d, + const hsiphash_key_t *key); + +static inline u32 ___hsiphash_aligned(const __le32 *data, size_t len, + const hsiphash_key_t *key) +{ + if (__builtin_constant_p(len) && len == 4) + return hsiphash_1u32(le32_to_cpu(data[0]), key); + if (__builtin_constant_p(len) && len == 8) + return hsiphash_2u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + key); + if (__builtin_constant_p(len) && len == 12) + return hsiphash_3u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + le32_to_cpu(data[2]), key); + if (__builtin_constant_p(len) && len == 16) + return hsiphash_4u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), + le32_to_cpu(data[2]), le32_to_cpu(data[3]), + key); + return __hsiphash_aligned(data, len, key); +} + +/** + * hsiphash - compute 32-bit hsiphash PRF value + * @data: buffer to hash + * @size: size of @data + * @key: the hsiphash key + */ +static inline u32 hsiphash(const void *data, size_t len, + const hsiphash_key_t *key) +{ + if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || + !IS_ALIGNED((unsigned long)data, HSIPHASH_ALIGNMENT)) + return __hsiphash_unaligned(data, len, key); + return ___hsiphash_aligned(data, len, key); +} + +/* + * These macros expose the raw SipHash and HalfSipHash permutations. + * Do not use them directly! If you think you have a use for them, + * be sure to CC the maintainer of this file explaining why. + */ + +#define SIPHASH_PERMUTATION(a, b, c, d) ( \ + (a) += (b), (b) = rol64((b), 13), (b) ^= (a), (a) = rol64((a), 32), \ + (c) += (d), (d) = rol64((d), 16), (d) ^= (c), \ + (a) += (d), (d) = rol64((d), 21), (d) ^= (a), \ + (c) += (b), (b) = rol64((b), 17), (b) ^= (c), (c) = rol64((c), 32)) + +#define SIPHASH_CONST_0 0x736f6d6570736575ULL +#define SIPHASH_CONST_1 0x646f72616e646f6dULL +#define SIPHASH_CONST_2 0x6c7967656e657261ULL +#define SIPHASH_CONST_3 0x7465646279746573ULL + +#define HSIPHASH_PERMUTATION(a, b, c, d) ( \ + (a) += (b), (b) = rol32((b), 5), (b) ^= (a), (a) = rol32((a), 16), \ + (c) += (d), (d) = rol32((d), 8), (d) ^= (c), \ + (a) += (d), (d) = rol32((d), 7), (d) ^= (a), \ + (c) += (b), (b) = rol32((b), 13), (b) ^= (c), (c) = rol32((c), 16)) + +#define HSIPHASH_CONST_0 0U +#define HSIPHASH_CONST_1 0U +#define HSIPHASH_CONST_2 0x6c796765U +#define HSIPHASH_CONST_3 0x74656462U + +#endif /* _LINUX_SIPHASH_H */ diff --git a/sys/compat/linuxkpi/common/include/linux/spinlock.h b/sys/compat/linuxkpi/common/include/linux/spinlock.h index dc10b0457153..341e89b6feed 100644 --- a/sys/compat/linuxkpi/common/include/linux/spinlock.h +++ b/sys/compat/linuxkpi/common/include/linux/spinlock.h @@ -178,4 +178,24 @@ _atomic_dec_and_lock_irqsave(atomic_t *cnt, spinlock_t *lock, return (0); } +/* + * struct raw_spinlock + */ + +typedef struct raw_spinlock { + struct mtx lock; +} raw_spinlock_t; + +#define raw_spin_lock_init(rlock) \ + mtx_init(&(rlock)->lock, spin_lock_name("lnxspin_raw"), \ + NULL, MTX_DEF | MTX_NOWITNESS | MTX_NEW) + +#define raw_spin_lock(rl) spin_lock(&(rl)->lock) +#define raw_spin_trylock(rl) spin_trylock(&(rl)->lock) +#define raw_spin_unlock(rl) spin_unlock(&(rl)->lock) + +#define raw_spin_lock_irqsave(rl, f) spin_lock_irqsave(&(rl)->lock, (f)) +#define raw_spin_trylock_irqsave(rl, f) spin_trylock_irqsave(&(rl)->lock, (f)) +#define raw_spin_unlock_irqrestore(rl, f) spin_unlock_irqrestore(&(rl)->lock, (f)) + #endif /* _LINUXKPI_LINUX_SPINLOCK_H_ */ diff --git a/sys/compat/linuxkpi/common/include/linux/suspend.h b/sys/compat/linuxkpi/common/include/linux/suspend.h index dacecbebdc08..3d5d5d594127 100644 --- a/sys/compat/linuxkpi/common/include/linux/suspend.h +++ b/sys/compat/linuxkpi/common/include/linux/suspend.h @@ -3,6 +3,12 @@ #ifndef _LINUXKPI_LINUX_SUSPEND_H_ #define _LINUXKPI_LINUX_SUSPEND_H_ +#include <linux/swap.h> +#include <linux/notifier.h> +#include <linux/init.h> +#include <linux/pm.h> +#include <linux/mm.h> + typedef int suspend_state_t; extern suspend_state_t pm_suspend_target_state; diff --git a/sys/compat/linuxkpi/common/include/linux/swap.h b/sys/compat/linuxkpi/common/include/linux/swap.h index 5828db7ae392..9c1db9677f9e 100644 --- a/sys/compat/linuxkpi/common/include/linux/swap.h +++ b/sys/compat/linuxkpi/common/include/linux/swap.h @@ -37,7 +37,14 @@ #include <vm/swap_pager.h> #include <vm/vm_pageout.h> +#include <linux/spinlock.h> +#include <linux/mmzone.h> +#include <linux/list.h> +#include <linux/memcontrol.h> +#include <linux/sched.h> +#include <linux/fs.h> #include <linux/pagemap.h> +#include <linux/atomic.h> #include <linux/page-flags.h> static inline long diff --git a/sys/compat/linuxkpi/common/include/media/cec-notifier.h b/sys/compat/linuxkpi/common/include/media/cec-notifier.h new file mode 100644 index 000000000000..8d6fc452b907 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/media/cec-notifier.h @@ -0,0 +1,17 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_MEDIA_CEC_NOTIFIER_H_ +#define _LINUXKPI_MEDIA_CEC_NOTIFIER_H_ + +#include <linux/err.h> +#include <media/cec.h> + +#endif diff --git a/sys/compat/linuxkpi/common/include/media/cec.h b/sys/compat/linuxkpi/common/include/media/cec.h new file mode 100644 index 000000000000..c96b57868e23 --- /dev/null +++ b/sys/compat/linuxkpi/common/include/media/cec.h @@ -0,0 +1,23 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025-2026 The FreeBSD Foundation + * Copyright (c) 2025-2026 Jean-Sébastien Pédron <dumbbell@FreeBSD.org> + * + * This software was developed by Jean-Sébastien Pédron under sponsorship + * from the FreeBSD Foundation. + */ + +#ifndef _LINUXKPI_MEDIA_CEC_H_ +#define _LINUXKPI_MEDIA_CEC_H_ + +#include <linux/poll.h> +#include <linux/fs.h> +#include <linux/debugfs.h> +#include <linux/device.h> +#include <linux/cdev.h> +#include <linux/kthread.h> +#include <linux/timer.h> +#include <linux/cec-funcs.h> + +#endif diff --git a/sys/compat/linuxkpi/common/src/linux_80211.c b/sys/compat/linuxkpi/common/src/linux_80211.c index 02724433d89d..1ac28dfef448 100644 --- a/sys/compat/linuxkpi/common/src/linux_80211.c +++ b/sys/compat/linuxkpi/common/src/linux_80211.c @@ -282,7 +282,7 @@ lkpi_nl80211_sta_info_to_str(struct sbuf *s, const char *prefix, } static void -lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) +lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s, bool dump_queues) { struct lkpi_hw *lhw; struct ieee80211_hw *hw; @@ -292,6 +292,7 @@ lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) struct ieee80211_sta *sta; struct station_info sinfo; int error; + uint8_t tid; vif = LVIF_TO_VIF(lvif); vap = LVIF_TO_VAP(lvif); @@ -376,6 +377,39 @@ lkpi_80211_dump_lvif_stas(struct lkpi_vif *lvif, struct sbuf *s) sbuf_printf(s, " he_dcm %u he_gi %u he_ru_alloc %u eht_gi %u\n", sinfo.txrate.he_dcm, sinfo.txrate.he_gi, sinfo.txrate.he_ru_alloc, sinfo.txrate.eht_gi); + + if (!dump_queues) + continue; + + /* Dump queue information. */ + sbuf_printf(s, " Queue information:\n"); + sbuf_printf(s, " frms direct tx %ju\n", lsta->frms_tx); + for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) { + struct lkpi_txq *ltxq; + + if (sta->txq[tid] == NULL) { + sbuf_printf(s, " tid %-2u NOQ\n", tid); + continue; + } + + ltxq = TXQ_TO_LTXQ(sta->txq[tid]); +#ifdef __notyet__ + sbuf_printf(s, " tid %-2u flags: %b " + "txq_generation %u skbq len %d\n", + tid, ltxq->flags, LKPI_TXQ_FLAGS_BITS, + ltxq->txq_generation, + skb_queue_len_lockless(<xq->skbq)); +#else + sbuf_printf(s, " tid %-2u " + "txq_generation %u skbq len %d\n", + tid, + ltxq->txq_generation, + skb_queue_len_lockless(<xq->skbq)); +#endif + sbuf_printf(s, " frms_enqueued %ju frms_dequeued %ju " + "frms_tx %ju\n", + ltxq->frms_enqueued, ltxq->frms_dequeued, ltxq->frms_tx); + } } wiphy_unlock(hw->wiphy); } @@ -393,7 +427,28 @@ lkpi_80211_dump_stas(SYSCTL_HANDLER_ARGS) sbuf_new_for_sysctl(&s, NULL, 1024, req); - lkpi_80211_dump_lvif_stas(lvif, &s); + lkpi_80211_dump_lvif_stas(lvif, &s, false); + + sbuf_finish(&s); + sbuf_delete(&s); + + return (0); +} + +static int +lkpi_80211_dump_sta_queues(SYSCTL_HANDLER_ARGS) +{ + struct lkpi_vif *lvif; + struct sbuf s; + + if (req->newptr) + return (EPERM); + + lvif = (struct lkpi_vif *)arg1; + + sbuf_new_for_sysctl(&s, NULL, 1024, req); + + lkpi_80211_dump_lvif_stas(lvif, &s, true); sbuf_finish(&s); sbuf_delete(&s); @@ -638,7 +693,8 @@ skip_bw: sta = IEEE80211_VHT_MCS_NOT_SUPPORTED; else { sta = MIN(sta, card); - rx_nss = i + 1; + if (rx_nss == 0) + rx_nss = i + 1; } } rx_map |= (sta << (2 * i)); @@ -4173,6 +4229,11 @@ lkpi_ic_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], SYSCTL_CHILDREN(node), OID_AUTO, "dump_stas", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, lvif, 0, lkpi_80211_dump_stas, "A", "Dump sta statistics of this vif"); + SYSCTL_ADD_PROC(&lvif->sysctl_ctx, + SYSCTL_CHILDREN(node), OID_AUTO, "dump_stas_queues", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE | CTLFLAG_SKIP, lvif, 0, + lkpi_80211_dump_sta_queues, "A", + "Dump queue statistics for any sta of this vif"); IMPROVE(); @@ -5513,6 +5574,8 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) #endif ni = lsta->ni; + ieee80211_output_seqno_assign(ni, -1, m); + k = NULL; keyix = IEEE80211_KEYIX_NONE; wh = mtod(m, struct ieee80211_frame *); @@ -5667,6 +5730,8 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) dev_kfree_skb(skb); return; } + /* Reset header as data might have moved. */ + hdr = (void *)skb->data; } #endif @@ -5690,6 +5755,7 @@ lkpi_80211_txq_tx_one(struct lkpi_sta *lsta, struct mbuf *m) LKPI_80211_LTXQ_LOCK(ltxq); skb_queue_tail(<xq->skbq, skb); + ltxq->frms_enqueued++; #ifdef LINUXKPI_DEBUG_80211 if (linuxkpi_debug_80211 & D80211_TRACE_TX) printf("%s:%d mo_wake_tx_queue :: %d %lu lsta %p sta %p " @@ -5719,6 +5785,7 @@ ops_tx: control.sta = sta; wiphy_lock(hw->wiphy); lkpi_80211_mo_tx(hw, &control, skb); + lsta->frms_tx++; wiphy_unlock(hw->wiphy); } @@ -8121,6 +8188,8 @@ linuxkpi_ieee80211_tx_dequeue(struct ieee80211_hw *hw, LKPI_80211_LTXQ_LOCK(ltxq); skb = skb_dequeue(<xq->skbq); + if (skb != NULL) + ltxq->frms_dequeued++; LKPI_80211_LTXQ_UNLOCK(ltxq); stopped: @@ -8769,18 +8838,21 @@ linuxkpi_ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq) { struct lkpi_hw *lhw; - struct ieee80211_txq *ntxq; - struct ieee80211_tx_control control; - struct sk_buff *skb; lhw = HW_TO_LHW(hw); LKPI_80211_LHW_TXQ_LOCK(lhw); ieee80211_txq_schedule_start(hw, txq->ac); do { + struct lkpi_txq *ltxq; + struct ieee80211_txq *ntxq; + struct ieee80211_tx_control control; + struct sk_buff *skb; + ntxq = ieee80211_next_txq(hw, txq->ac); if (ntxq == NULL) break; + ltxq = TXQ_TO_LTXQ(ntxq); memset(&control, 0, sizeof(control)); control.sta = ntxq->sta; @@ -8788,6 +8860,7 @@ linuxkpi_ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw, skb = linuxkpi_ieee80211_tx_dequeue(hw, ntxq); if (skb == NULL) break; + ltxq->frms_tx++; lkpi_80211_mo_tx(hw, &control, skb); } while(1); diff --git a/sys/compat/linuxkpi/common/src/linux_80211.h b/sys/compat/linuxkpi/common/src/linux_80211.h index fcbef46fc6de..d4f18fcafbba 100644 --- a/sys/compat/linuxkpi/common/src/linux_80211.h +++ b/sys/compat/linuxkpi/common/src/linux_80211.h @@ -154,6 +154,9 @@ struct lkpi_txq { bool stopped; uint32_t txq_generation; struct sk_buff_head skbq; + uint64_t frms_enqueued; + uint64_t frms_dequeued; + uint64_t frms_tx; /* Must be last! */ struct ieee80211_txq txq __aligned(CACHE_LINE_SIZE); @@ -180,6 +183,7 @@ struct lkpi_sta { bool in_mgd; /* XXX-BZ should this be per-vif? */ struct station_info sinfo; /* statistics */ + uint64_t frms_tx; /* (*tx) */ /* Must be last! */ struct ieee80211_sta sta __aligned(CACHE_LINE_SIZE); diff --git a/sys/compat/linuxkpi/common/src/linux_compat.c b/sys/compat/linuxkpi/common/src/linux_compat.c index 35430daf311d..8fc644241d79 100644 --- a/sys/compat/linuxkpi/common/src/linux_compat.c +++ b/sys/compat/linuxkpi/common/src/linux_compat.c @@ -1894,56 +1894,168 @@ void lkpi_hex_dump(int(*_fpf)(void *, const char *, ...), void *arg1, const char *level, const char *prefix_str, const int prefix_type, const int rowsize, const int groupsize, - const void *buf, size_t len, const bool ascii) + const void *buf, size_t len, const bool ascii, const bool trailing_newline) { typedef const struct { long long value; } __packed *print_64p_t; typedef const struct { uint32_t value; } __packed *print_32p_t; typedef const struct { uint16_t value; } __packed *print_16p_t; const void *buf_old = buf; - int row; + int row, linelen, ret; while (len > 0) { - if (level != NULL) - _fpf(arg1, "%s", level); - if (prefix_str != NULL) - _fpf(arg1, "%s ", prefix_str); + linelen = 0; + if (level != NULL) { + ret = _fpf(arg1, "%s", level); + if (ret < 0) + break; + linelen += ret; + } + if (prefix_str != NULL) { + ret = _fpf( + arg1, "%s%s", linelen ? " " : "", prefix_str); + if (ret < 0) + break; + linelen += ret; + } switch (prefix_type) { case DUMP_PREFIX_ADDRESS: - _fpf(arg1, "[%p] ", buf); + ret = _fpf( + arg1, "%s[%p]", linelen ? " " : "", buf); + if (ret < 0) + return; + linelen += ret; break; case DUMP_PREFIX_OFFSET: - _fpf(arg1, "[%#tx] ", ((const char *)buf - - (const char *)buf_old)); + ret = _fpf( + arg1, "%s[%#tx]", linelen ? " " : "", + ((const char *)buf - (const char *)buf_old)); + if (ret < 0) + return; + linelen += ret; break; default: break; } for (row = 0; row != rowsize; row++) { if (groupsize == 8 && len > 7) { - _fpf(arg1, "%016llx ", ((print_64p_t)buf)->value); + ret = _fpf( + arg1, "%s%016llx", linelen ? " " : "", + ((print_64p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 8; len -= 8; } else if (groupsize == 4 && len > 3) { - _fpf(arg1, "%08x ", ((print_32p_t)buf)->value); + ret = _fpf( + arg1, "%s%08x", linelen ? " " : "", + ((print_32p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 4; len -= 4; } else if (groupsize == 2 && len > 1) { - _fpf(arg1, "%04x ", ((print_16p_t)buf)->value); + ret = _fpf( + arg1, "%s%04x", linelen ? " " : "", + ((print_16p_t)buf)->value); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 2; len -= 2; } else if (len > 0) { - _fpf(arg1, "%02x ", *(const uint8_t *)buf); + ret = _fpf( + arg1, "%s%02x", linelen ? " " : "", + *(const uint8_t *)buf); + if (ret < 0) + return; + linelen += ret; buf = (const uint8_t *)buf + 1; len--; } else { break; } } - _fpf(arg1, "\n"); + if (len > 0 && trailing_newline) { + ret = _fpf(arg1, "\n"); + if (ret < 0) + break; + } } } +struct hdtb_context { + char *linebuf; + size_t linebuflen; + int written; +}; + +static int +hdtb_cb(void *arg, const char *format, ...) +{ + struct hdtb_context *context; + int written; + va_list args; + + context = arg; + + va_start(args, format); + written = vsnprintf( + context->linebuf, context->linebuflen, format, args); + va_end(args); + + if (written < 0) + return (written); + + /* + * Linux' hex_dump_to_buffer() function has the same behaviour as + * snprintf() basically. Therefore, it returns the number of bytes it + * would have written if the destination buffer was large enough. + * + * If the destination buffer was exhausted, lkpi_hex_dump() will + * continue to call this callback but it will only compute the bytes it + * would have written but write nothing to that buffer. + */ + context->written += written; + + if (written < context->linebuflen) { + context->linebuf += written; + context->linebuflen -= written; + } else { + context->linebuf += context->linebuflen; + context->linebuflen = 0; + } + + return (written); +} + +int +lkpi_hex_dump_to_buffer(const void *buf, size_t len, int rowsize, + int groupsize, char *linebuf, size_t linebuflen, bool ascii) +{ + int written; + struct hdtb_context context; + + context.linebuf = linebuf; + context.linebuflen = linebuflen; + context.written = 0; + + if (rowsize != 16 && rowsize != 32) + rowsize = 16; + + len = min(len, rowsize); + + lkpi_hex_dump( + hdtb_cb, &context, NULL, NULL, DUMP_PREFIX_NONE, + rowsize, groupsize, buf, len, ascii, false); + + written = context.written; + + return (written); +} + static void linux_timer_callback_wrapper(void *context) { diff --git a/sys/compat/linuxkpi/common/src/linux_siphash.c b/sys/compat/linuxkpi/common/src/linux_siphash.c new file mode 100644 index 000000000000..b4842a8250e1 --- /dev/null +++ b/sys/compat/linuxkpi/common/src/linux_siphash.c @@ -0,0 +1,546 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. + * + * SipHash: a fast short-input PRF + * https://131002.net/siphash/ + * + * This implementation is specifically for SipHash2-4 for a secure PRF + * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for + * hashtables. + */ + +#include <linux/siphash.h> +#include <asm/unaligned.h> + +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 +#include <linux/dcache.h> +#include <asm/word-at-a-time.h> +#endif + +#define EXPORT_SYMBOL(name) + +#define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3) + +#define PREAMBLE(len) \ + u64 v0 = SIPHASH_CONST_0; \ + u64 v1 = SIPHASH_CONST_1; \ + u64 v2 = SIPHASH_CONST_2; \ + u64 v3 = SIPHASH_CONST_3; \ + u64 b = ((u64)(len)) << 56; \ + v3 ^= key->key[1]; \ + v2 ^= key->key[0]; \ + v1 ^= key->key[1]; \ + v0 ^= key->key[0]; + +#define POSTAMBLE \ + v3 ^= b; \ + SIPROUND; \ + SIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + SIPROUND; \ + SIPROUND; \ + SIPROUND; \ + SIPROUND; \ + return (v0 ^ v1) ^ (v2 ^ v3); + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u64 __siphash_aligned(const void *_data, size_t len, const siphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + PREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = le64_to_cpup(data); + v3 ^= m; + SIPROUND; + SIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= le32_to_cpup(data); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } +#endif + POSTAMBLE +} +EXPORT_SYMBOL(__siphash_aligned); +#endif + +u64 __siphash_unaligned(const void *_data, size_t len, const siphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + PREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = get_unaligned_le64(data); + v3 ^= m; + SIPROUND; + SIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= get_unaligned_le32(end); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } +#endif + POSTAMBLE +} +EXPORT_SYMBOL(__siphash_unaligned); + +/** + * siphash_1u64 - compute 64-bit siphash PRF value of a u64 + * @first: first u64 + * @key: the siphash key + */ +u64 siphash_1u64(const u64 first, const siphash_key_t *key) +{ + PREAMBLE(8) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_1u64); + +/** + * siphash_2u64 - compute 64-bit siphash PRF value of 2 u64 + * @first: first u64 + * @second: second u64 + * @key: the siphash key + */ +u64 siphash_2u64(const u64 first, const u64 second, const siphash_key_t *key) +{ + PREAMBLE(16) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_2u64); + +/** + * siphash_3u64 - compute 64-bit siphash PRF value of 3 u64 + * @first: first u64 + * @second: second u64 + * @third: third u64 + * @key: the siphash key + */ +u64 siphash_3u64(const u64 first, const u64 second, const u64 third, + const siphash_key_t *key) +{ + PREAMBLE(24) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + v3 ^= third; + SIPROUND; + SIPROUND; + v0 ^= third; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_3u64); + +/** + * siphash_4u64 - compute 64-bit siphash PRF value of 4 u64 + * @first: first u64 + * @second: second u64 + * @third: third u64 + * @forth: forth u64 + * @key: the siphash key + */ +u64 siphash_4u64(const u64 first, const u64 second, const u64 third, + const u64 forth, const siphash_key_t *key) +{ + PREAMBLE(32) + v3 ^= first; + SIPROUND; + SIPROUND; + v0 ^= first; + v3 ^= second; + SIPROUND; + SIPROUND; + v0 ^= second; + v3 ^= third; + SIPROUND; + SIPROUND; + v0 ^= third; + v3 ^= forth; + SIPROUND; + SIPROUND; + v0 ^= forth; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_4u64); + +u64 siphash_1u32(const u32 first, const siphash_key_t *key) +{ + PREAMBLE(4) + b |= first; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_1u32); + +u64 siphash_3u32(const u32 first, const u32 second, const u32 third, + const siphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + PREAMBLE(12) + v3 ^= combined; + SIPROUND; + SIPROUND; + v0 ^= combined; + b |= third; + POSTAMBLE +} +EXPORT_SYMBOL(siphash_3u32); + +#if BITS_PER_LONG == 64 +/* Note that on 64-bit, we make HalfSipHash1-3 actually be SipHash1-3, for + * performance reasons. On 32-bit, below, we actually implement HalfSipHash1-3. + */ + +#define HSIPROUND SIPROUND +#define HPREAMBLE(len) PREAMBLE(len) +#define HPOSTAMBLE \ + v3 ^= b; \ + HSIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + HSIPROUND; \ + HSIPROUND; \ + HSIPROUND; \ + return (v0 ^ v1) ^ (v2 ^ v3); + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = le64_to_cpup(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= le32_to_cpup(data); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } +#endif + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_aligned); +#endif + +u32 __hsiphash_unaligned(const void *_data, size_t len, + const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u64)); + const u8 left = len & (sizeof(u64) - 1); + u64 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u64)) { + m = get_unaligned_le64(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } +#if defined(CONFIG_DCACHE_WORD_ACCESS) && BITS_PER_LONG == 64 + if (left) + b |= le64_to_cpu((__force __le64)(load_unaligned_zeropad(data) & + bytemask_from_count(left))); +#else + switch (left) { + case 7: b |= ((u64)end[6]) << 48; fallthrough; + case 6: b |= ((u64)end[5]) << 40; fallthrough; + case 5: b |= ((u64)end[4]) << 32; fallthrough; + case 4: b |= get_unaligned_le32(end); break; + case 3: b |= ((u64)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } +#endif + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_unaligned); + +/** + * hsiphash_1u32 - compute 64-bit hsiphash PRF value of a u32 + * @first: first u32 + * @key: the hsiphash key + */ +u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key) +{ + HPREAMBLE(4) + b |= first; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_1u32); + +/** + * hsiphash_2u32 - compute 32-bit hsiphash PRF value of 2 u32 + * @first: first u32 + * @second: second u32 + * @key: the hsiphash key + */ +u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(8) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_2u32); + +/** + * hsiphash_3u32 - compute 32-bit hsiphash PRF value of 3 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @key: the hsiphash key + */ +u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third, + const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(12) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + b |= third; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_3u32); + +/** + * hsiphash_4u32 - compute 32-bit hsiphash PRF value of 4 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @forth: forth u32 + * @key: the hsiphash key + */ +u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third, + const u32 forth, const hsiphash_key_t *key) +{ + u64 combined = (u64)second << 32 | first; + HPREAMBLE(16) + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + combined = (u64)forth << 32 | third; + v3 ^= combined; + HSIPROUND; + v0 ^= combined; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_4u32); +#else +#define HSIPROUND HSIPHASH_PERMUTATION(v0, v1, v2, v3) + +#define HPREAMBLE(len) \ + u32 v0 = HSIPHASH_CONST_0; \ + u32 v1 = HSIPHASH_CONST_1; \ + u32 v2 = HSIPHASH_CONST_2; \ + u32 v3 = HSIPHASH_CONST_3; \ + u32 b = ((u32)(len)) << 24; \ + v3 ^= key->key[1]; \ + v2 ^= key->key[0]; \ + v1 ^= key->key[1]; \ + v0 ^= key->key[0]; + +#define HPOSTAMBLE \ + v3 ^= b; \ + HSIPROUND; \ + v0 ^= b; \ + v2 ^= 0xff; \ + HSIPROUND; \ + HSIPROUND; \ + HSIPROUND; \ + return v1 ^ v3; + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u32)); + const u8 left = len & (sizeof(u32) - 1); + u32 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u32)) { + m = le32_to_cpup(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } + switch (left) { + case 3: b |= ((u32)end[2]) << 16; fallthrough; + case 2: b |= le16_to_cpup(data); break; + case 1: b |= end[0]; + } + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_aligned); +#endif + +u32 __hsiphash_unaligned(const void *_data, size_t len, + const hsiphash_key_t *key) +{ + const u8 *data = _data; + const u8 *end = data + len - (len % sizeof(u32)); + const u8 left = len & (sizeof(u32) - 1); + u32 m; + HPREAMBLE(len) + for (; data != end; data += sizeof(u32)) { + m = get_unaligned_le32(data); + v3 ^= m; + HSIPROUND; + v0 ^= m; + } + switch (left) { + case 3: b |= ((u32)end[2]) << 16; fallthrough; + case 2: b |= get_unaligned_le16(end); break; + case 1: b |= end[0]; + } + HPOSTAMBLE +} +EXPORT_SYMBOL(__hsiphash_unaligned); + +/** + * hsiphash_1u32 - compute 32-bit hsiphash PRF value of a u32 + * @first: first u32 + * @key: the hsiphash key + */ +u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key) +{ + HPREAMBLE(4) + v3 ^= first; + HSIPROUND; + v0 ^= first; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_1u32); + +/** + * hsiphash_2u32 - compute 32-bit hsiphash PRF value of 2 u32 + * @first: first u32 + * @second: second u32 + * @key: the hsiphash key + */ +u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key) +{ + HPREAMBLE(8) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_2u32); + +/** + * hsiphash_3u32 - compute 32-bit hsiphash PRF value of 3 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @key: the hsiphash key + */ +u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third, + const hsiphash_key_t *key) +{ + HPREAMBLE(12) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + v3 ^= third; + HSIPROUND; + v0 ^= third; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_3u32); + +/** + * hsiphash_4u32 - compute 32-bit hsiphash PRF value of 4 u32 + * @first: first u32 + * @second: second u32 + * @third: third u32 + * @forth: forth u32 + * @key: the hsiphash key + */ +u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third, + const u32 forth, const hsiphash_key_t *key) +{ + HPREAMBLE(16) + v3 ^= first; + HSIPROUND; + v0 ^= first; + v3 ^= second; + HSIPROUND; + v0 ^= second; + v3 ^= third; + HSIPROUND; + v0 ^= third; + v3 ^= forth; + HSIPROUND; + v0 ^= forth; + HPOSTAMBLE +} +EXPORT_SYMBOL(hsiphash_4u32); +#endif diff --git a/sys/compat/linuxkpi/dummy/include/media/cec-notifier.h b/sys/compat/linuxkpi/dummy/include/linux/fpu.h index e69de29bb2d1..e69de29bb2d1 100644 --- a/sys/compat/linuxkpi/dummy/include/media/cec-notifier.h +++ b/sys/compat/linuxkpi/dummy/include/linux/fpu.h diff --git a/sys/compat/linuxkpi/dummy/include/linux/kdebug.h b/sys/compat/linuxkpi/dummy/include/linux/kdebug.h new file mode 100644 index 000000000000..e69de29bb2d1 --- /dev/null +++ b/sys/compat/linuxkpi/dummy/include/linux/kdebug.h diff --git a/sys/conf/files b/sys/conf/files index 474f337e569a..d0c4ea5f544d 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -3199,7 +3199,6 @@ dev/sound/pcm/feeder_volume.c optional sound \ dependency "snd_fxdiv_gen.h" dev/sound/pcm/mixer.c optional sound dev/sound/pcm/mixer_if.m optional sound -dev/sound/pcm/sndstat.c optional sound dev/sound/pcm/sound.c optional sound dev/sound/pcm/vchan.c optional sound dev/sound/usb/uaudio.c optional snd_uaudio usb @@ -3208,6 +3207,7 @@ dev/sound/midi/midi.c optional sound dev/sound/midi/mpu401.c optional sound dev/sound/midi/mpu_if.m optional sound dev/sound/midi/mpufoi_if.m optional sound +dev/sound/sndstat.c optional sound dev/spibus/acpi_spibus.c optional acpi spibus dev/spibus/ofw_spibus.c optional fdt spibus dev/spibus/spibus.c optional spibus \ @@ -4704,6 +4704,8 @@ compat/linuxkpi/common/src/linux_shmemfs.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_shrinker.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" +compat/linuxkpi/common/src/linux_siphash.c optional compat_linuxkpi \ + compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_skbuff.c optional compat_linuxkpi \ compile-with "${LINUXKPI_C}" compat/linuxkpi/common/src/linux_slab.c optional compat_linuxkpi \ diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk index cef4dd11ba58..81b117492916 100644 --- a/sys/conf/kern.opts.mk +++ b/sys/conf/kern.opts.mk @@ -56,6 +56,7 @@ __DEFAULT_NO_OPTIONS = \ KERNEL_RETPOLINE \ RATELIMIT \ REPRODUCIBLE_BUILD \ + REPRODUCIBLE_PATHS \ VERIEXEC # Some options are totally broken on some architectures. We disable them. If you diff --git a/sys/conf/kern.post.mk b/sys/conf/kern.post.mk index 7cdfd17778db..343abc5853f7 100644 --- a/sys/conf/kern.post.mk +++ b/sys/conf/kern.post.mk @@ -372,7 +372,7 @@ _ILINKS+= x86 _ILINKS+= i386 .endif -.if ${MK_REPRODUCIBLE_BUILD} != "no" +.if ${MK_REPRODUCIBLE_PATHS} != "no" PREFIX_SYSDIR=/usr/src/sys PREFIX_OBJDIR=/usr/obj/usr/src/${MACHINE}.${MACHINE_CPUARCH}/sys/${KERN_IDENT} CFLAGS+= -ffile-prefix-map=${SYSDIR}=${PREFIX_SYSDIR} diff --git a/sys/conf/kmod.mk b/sys/conf/kmod.mk index 6e20dce0653f..edc311348971 100644 --- a/sys/conf/kmod.mk +++ b/sys/conf/kmod.mk @@ -303,7 +303,7 @@ all: ${PROG} beforedepend: ${_ILINKS} beforebuild: ${_ILINKS} -.if ${MK_REPRODUCIBLE_BUILD} != "no" +.if ${MK_REPRODUCIBLE_PATHS} != "no" PREFIX_SYSDIR=/usr/src/sys CFLAGS+= -ffile-prefix-map=${SYSDIR}=${PREFIX_SYSDIR} .if defined(KERNBUILDDIR) diff --git a/sys/conf/options.amd64 b/sys/conf/options.amd64 index df18abfa8e1e..a3a735731438 100644 --- a/sys/conf/options.amd64 +++ b/sys/conf/options.amd64 @@ -68,3 +68,6 @@ MPTABLE_LINUX_BUG_COMPAT # x86 specific uart options UART_NS8250_EARLY_PORT opt_uart.h + +# Enable asmc(4)-specific debug logic. +ASMC_DEBUG opt_asmc.h diff --git a/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h b/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h index 93dd1196d977..fa55b3917669 100644 --- a/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h +++ b/sys/contrib/openzfs/include/os/freebsd/spl/sys/cmn_err.h @@ -52,28 +52,28 @@ extern "C" { #ifndef _ASM extern void cmn_err(int, const char *, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vzcmn_err(zoneid_t, int, const char *, __va_list) - __attribute__((format(printf, 3, 0))); + __attribute__((format(__printf__, 3, 0))); extern void vcmn_err(int, const char *, __va_list) - __attribute__((format(printf, 2, 0))); + __attribute__((format(__printf__, 2, 0))); extern void zcmn_err(zoneid_t, int, const char *, ...) - __attribute__((format(printf, 3, 4))); + __attribute__((format(__printf__, 3, 4))); extern void vzprintf(zoneid_t, const char *, __va_list) - __attribute__((format(printf, 2, 0))); + __attribute__((format(__printf__, 2, 0))); extern void zprintf(zoneid_t, const char *, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vuprintf(const char *, __va_list) - __attribute__((format(printf, 1, 0))); + __attribute__((format(__printf__, 1, 0))); extern void panic(const char *, ...) - __attribute__((format(printf, 1, 2), __noreturn__)); + __attribute__((format(__printf__, 1, 2), __noreturn__)); #define cmn_err_once(ce, ...) \ do { \ diff --git a/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h b/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h index a9619d7d0219..4ae96c91a5f3 100644 --- a/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h +++ b/sys/contrib/openzfs/include/os/freebsd/spl/sys/kmem.h @@ -55,9 +55,9 @@ MALLOC_DECLARE(M_SOLARIS); typedef struct vmem vmem_t; extern char *kmem_asprintf(const char *, ...) - __attribute__((format(printf, 1, 2))); + __attribute__((format(__printf__, 1, 2))); extern char *kmem_vasprintf(const char *fmt, va_list ap) - __attribute__((format(printf, 1, 0))); + __attribute__((format(__printf__, 1, 0))); extern int kmem_scnprintf(char *restrict str, size_t size, const char *restrict fmt, ...); diff --git a/sys/contrib/openzfs/include/sys/spa.h b/sys/contrib/openzfs/include/sys/spa.h index 2a4cc60c4aa8..db30b5a066de 100644 --- a/sys/contrib/openzfs/include/sys/spa.h +++ b/sys/contrib/openzfs/include/sys/spa.h @@ -1127,9 +1127,9 @@ extern void spa_set_allocator(spa_t *spa, const char *allocator); /* Miscellaneous support routines */ extern void spa_load_failed(spa_t *spa, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void spa_load_note(spa_t *spa, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void spa_activate_mos_feature(spa_t *spa, const char *feature, dmu_tx_t *tx); extern void spa_deactivate_mos_feature(spa_t *spa, const char *feature); diff --git a/sys/contrib/openzfs/include/sys/vdev.h b/sys/contrib/openzfs/include/sys/vdev.h index 510474d6c085..86f2235f03ac 100644 --- a/sys/contrib/openzfs/include/sys/vdev.h +++ b/sys/contrib/openzfs/include/sys/vdev.h @@ -54,7 +54,7 @@ extern int zfs_nocacheflush; typedef boolean_t vdev_open_children_func_t(vdev_t *vd); extern void vdev_dbgmsg(vdev_t *vd, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __attribute__((format(__printf__, 2, 3))); extern void vdev_dbgmsg_print_tree(vdev_t *, int); extern int vdev_open(vdev_t *); extern void vdev_open_children(vdev_t *); diff --git a/sys/contrib/openzfs/include/sys/zfs_debug.h b/sys/contrib/openzfs/include/sys/zfs_debug.h index 0f021d15157b..6fe5cf062c17 100644 --- a/sys/contrib/openzfs/include/sys/zfs_debug.h +++ b/sys/contrib/openzfs/include/sys/zfs_debug.h @@ -68,7 +68,7 @@ extern int zfs_dbgmsg_enable; extern void __set_error(const char *file, const char *func, int line, int err); extern void __zfs_dbgmsg(char *buf); extern void __dprintf(boolean_t dprint, const char *file, const char *func, - int line, const char *fmt, ...) __attribute__((format(printf, 5, 6))); + int line, const char *fmt, ...) __attribute__((format(__printf__, 5, 6))); /* * Some general principles for using zfs_dbgmsg(): diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S index 3d1b045127e2..76ced8ebad3d 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S @@ -1316,7 +1316,7 @@ SET_SIZE(aes_gcm_dec_update_vaes_avx2) #endif /* !_WIN32 || _KERNEL */ /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S index 49671f1fc46a..2e0a88ec8cef 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/aesni-gcm-x86_64.S @@ -1275,7 +1275,7 @@ SECTION_STATIC #endif /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S index 319caa4e190b..6c5bbf0fb272 100644 --- a/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S +++ b/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ghash-x86_64.S @@ -714,7 +714,7 @@ SET_OBJ(.Lrem_8bit) .balign 64 /* Mark the stack non-executable. */ -#if defined(__linux__) && defined(__ELF__) +#ifdef __ELF__ .section .note.GNU-stack,"",%progbits #endif diff --git a/sys/crypto/chacha20/chacha.c b/sys/crypto/chacha20/chacha.c index cb06003b0ecf..0509b05cab22 100644 --- a/sys/crypto/chacha20/chacha.c +++ b/sys/crypto/chacha20/chacha.c @@ -50,8 +50,8 @@ typedef struct chacha_ctx chacha_ctx; a = PLUS(a,b); d = ROTATE(XOR(d,a), 8); \ c = PLUS(c,d); b = ROTATE(XOR(b,c), 7); -static const char sigma[16] = "expand 32-byte k"; -static const char tau[16] = "expand 16-byte k"; +static const char sigma[16] __nonstring = "expand 32-byte k"; +static const char tau[16] __nonstring = "expand 16-byte k"; LOCAL void chacha_keysetup(chacha_ctx *x,const u8 *k,u32 kbits) diff --git a/sys/dev/acpica/Osd/OsdSchedule.c b/sys/dev/acpica/Osd/OsdSchedule.c index f0464709e8ad..0c5eadb87687 100644 --- a/sys/dev/acpica/Osd/OsdSchedule.c +++ b/sys/dev/acpica/Osd/OsdSchedule.c @@ -35,6 +35,7 @@ #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/cpuset.h> #include <sys/kernel.h> #include <sys/kthread.h> #include <sys/malloc.h> @@ -109,10 +110,13 @@ static void acpi_taskq_init(void *arg) { int i; + /* XXX Currently assuming BSP is CPU0. */ + cpuset_t just_bsp = CPUSET_T_INITIALIZER(0x1); acpi_taskq = taskqueue_create_fast("acpi_task", M_NOWAIT, &taskqueue_thread_enqueue, &acpi_taskq); - taskqueue_start_threads(&acpi_taskq, acpi_max_threads, PWAIT, "acpi_task"); + taskqueue_start_threads_cpuset(&acpi_taskq, acpi_max_threads, PWAIT, + &just_bsp, "acpi_task"); if (acpi_task_count > 0) { if (bootverbose) printf("AcpiOsExecute: enqueue %d pending tasks\n", diff --git a/sys/dev/aq/aq_common.h b/sys/dev/aq/aq_common.h index 5f52ce915bc5..af59ecf7af1e 100644 --- a/sys/dev/aq/aq_common.h +++ b/sys/dev/aq/aq_common.h @@ -37,14 +37,6 @@ #include <sys/types.h> -#define s8 __int8_t -#define u8 __uint8_t -#define u16 __uint16_t -#define s16 __int16_t -#define u32 __uint32_t -#define u64 __uint64_t -#define s64 __int64_t -#define s32 int #define ETIME ETIMEDOUT #define EOK 0 @@ -59,18 +51,18 @@ #endif #define AQ_HW_WAIT_FOR(_B_, _US_, _N_) \ - do { \ +do { \ unsigned int i; \ - for (i = _N_; (!(_B_)) && i; --i) { \ - usec_delay(_US_); \ - } \ - if (!i) { \ - err = -1; \ - } \ - } while (0) + for (i = _N_; (!(_B_)) && i; --i) { \ + usec_delay(_US_); \ + } \ + if (!i) { \ + err = -1; \ + } \ +} while (0) -#define LOWORD(a) ((u16)(a)) +#define LOWORD(a) ((uint16_t)(a)) #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) #define AQ_VER "0.0.5" diff --git a/sys/dev/aq/aq_dbg.c b/sys/dev/aq/aq_dbg.c index 5340fc46a223..495991fafbdc 100644 --- a/sys/dev/aq/aq_dbg.c +++ b/sys/dev/aq/aq_dbg.c @@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$"); const aq_debug_level dbg_level_ = lvl_detail; -const u32 dbg_categories_ = dbg_init | dbg_config | dbg_fw; +const uint32_t dbg_categories_ = dbg_init | dbg_config | dbg_fw; @@ -55,24 +55,25 @@ const u32 dbg_categories_ = dbg_init | dbg_config | dbg_fw; (BIT(BIT_BEGIN - BIT_END + 1) -1)) #define __field(TYPE, VAR) TYPE VAR; -void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 struct __entry{ __field(unsigned int, ring_idx) __field(unsigned int, pointer) /* Tx Descriptor */ - __field(u64, data_buf_addr) - __field(u32, pay_len) - __field(u8, ct_en) - __field(u8, ct_idx) - __field(u16, rsvd2) - __field(u8, tx_cmd) - __field(u8, eop) - __field(u8, dd) - __field(u16, buf_len) - __field(u8, rsvd1) - __field(u8, des_typ) + __field(uint64_t, data_buf_addr) + __field(uint32_t, pay_len) + __field(uint8_t, ct_en) + __field(uint8_t, ct_idx) + __field(uint16_t, rsvd2) + __field(uint8_t, tx_cmd) + __field(uint8_t, eop) + __field(uint8_t, dd) + __field(uint16_t, buf_len) + __field(uint8_t, rsvd1) + __field(uint8_t, des_typ) } entry; entry.ring_idx = ring_idx; @@ -98,27 +99,28 @@ void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2] #endif } -void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 - u8 dd; - u8 eop; - u8 rx_stat; - u8 rx_estat; - u8 rsc_cnt; - u16 pkt_len; - u16 next_desp; - u16 vlan_tag; - - u8 rss_type; - u8 pkt_type; - u8 rdm_err; - u8 avb_ts; - u8 rsvd; - u8 rx_cntl; - u8 sph; - u16 hdr_len; - u32 rss_hash; + uint8_t dd; + uint8_t eop; + uint8_t rx_stat; + uint8_t rx_estat; + uint8_t rsc_cnt; + uint16_t pkt_len; + uint16_t next_desp; + uint16_t vlan_tag; + + uint8_t rss_type; + uint8_t pkt_type; + uint8_t rdm_err; + uint8_t avb_ts; + uint8_t rsvd; + uint8_t rx_cntl; + uint8_t sph; + uint16_t hdr_len; + uint32_t rss_hash; rss_hash = DESCR_FIELD(descr[0], 63, 32); hdr_len = DESCR_FIELD(descr[0], 31, 22); @@ -149,24 +151,26 @@ void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2] #endif } -void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]) +void +trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, + volatile uint64_t descr[2]) { #if AQ_CFG_DEBUG_LVL > 2 struct __entry_s{ __field(unsigned int, ring_idx) __field(unsigned int, pointer) /* Tx Context Descriptor */ - __field(u16, out_len) - __field(u8, tun_len) - __field(u64, resvd3) - __field(u16, mss_len) - __field(u8, l4_len) - __field(u8, l3_len) - __field(u8, l2_len) - __field(u8, ct_cmd) - __field(u16, vlan_tag) - __field(u8, ct_idx) - __field(u8, des_typ) + __field(uint16_t, out_len) + __field(uint8_t, tun_len) + __field(uint64_t, resvd3) + __field(uint16_t, mss_len) + __field(uint8_t, l4_len) + __field(uint8_t, l3_len) + __field(uint8_t, l2_len) + __field(uint8_t, ct_cmd) + __field(uint16_t, vlan_tag) + __field(uint8_t, ct_idx) + __field(uint8_t, des_typ) } entry; struct __entry_s *__entry = &entry; __entry->ring_idx = ring_idx; @@ -192,7 +196,8 @@ void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 #endif } -void DumpHex(const void* data, size_t size) { +void +DumpHex(const void* data, size_t size) { #if AQ_CFG_DEBUG_LVL > 3 char ascii[17]; size_t i, j; @@ -234,4 +239,4 @@ void DumpHex(const void* data, size_t size) { } } #endif -}
\ No newline at end of file +} diff --git a/sys/dev/aq/aq_dbg.h b/sys/dev/aq/aq_dbg.h index 8d02f483b2f7..d90a8599e085 100644 --- a/sys/dev/aq/aq_dbg.h +++ b/sys/dev/aq/aq_dbg.h @@ -38,8 +38,8 @@ #ifndef AQ_DBG_H #define AQ_DBG_H -#include <sys/syslog.h> #include <sys/systm.h> +#include <sys/syslog.h> /* Debug levels: 0 - no debug @@ -78,10 +78,10 @@ Debug levels: #if AQ_CFG_DEBUG_LVL > 2 #define AQ_DBG_DUMP_DESC(desc) { \ - volatile u8 *raw = (volatile u8*)(desc); \ - printf( "07-00 %02X%02X%02X%02X %02X%02X%02X%02X 15-08 %02X%02X%02X%02X %02X%02X%02X%02X\n", \ - raw[7], raw[6], raw[5], raw[4], raw[3], raw[2], raw[1], raw[0], \ - raw[15], raw[14], raw[13], raw[12], raw[11], raw[10], raw[9], raw[8]); \ + volatile uint8_t *raw = (volatile uint8_t*)(desc); \ + printf( "07-00 %02X%02X%02X%02X %02X%02X%02X%02X 15-08 %02X%02X%02X%02X %02X%02X%02X%02X\n", \ + raw[7], raw[6], raw[5], raw[4], raw[3], raw[2], raw[1], raw[0], \ + raw[15], raw[14], raw[13], raw[12], raw[11], raw[10], raw[9], raw[8]); \ }\ #else @@ -90,27 +90,27 @@ Debug levels: typedef enum aq_debug_level { - lvl_error = LOG_ERR, - lvl_warn = LOG_WARNING, - lvl_trace = LOG_NOTICE, - lvl_detail = LOG_INFO, + lvl_error = LOG_ERR, + lvl_warn = LOG_WARNING, + lvl_trace = LOG_NOTICE, + lvl_detail = LOG_INFO, } aq_debug_level; typedef enum aq_debug_category { - dbg_init = 1, - dbg_config = 1 << 1, - dbg_tx = 1 << 2, - dbg_rx = 1 << 3, - dbg_intr = 1 << 4, - dbg_fw = 1 << 5, + dbg_init = 1, + dbg_config = 1 << 1, + dbg_tx = 1 << 2, + dbg_rx = 1 << 3, + dbg_intr = 1 << 4, + dbg_fw = 1 << 5, } aq_debug_category; #define __FILENAME__ (__builtin_strrchr(__FILE__, '/') ? __builtin_strrchr(__FILE__, '/') + 1 : __FILE__) extern const aq_debug_level dbg_level_; -extern const u32 dbg_categories_; +extern const uint32_t dbg_categories_; #define log_base_(_lvl, _fmt, args...) printf( "atlantic: " _fmt "\n", ##args) @@ -130,9 +130,9 @@ extern const u32 dbg_categories_; #define trace(_cat, _fmt, args...) trace_base_(lvl_trace, _cat, _fmt, ##args) #define trace_detail(_cat, _fmt, args...) trace_base_(lvl_detail, _cat, _fmt, ##args) -void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); -void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); -void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile u64 descr[2]); +void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); +void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); +void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]); void DumpHex(const void* data, size_t size); #endif // AQ_DBG_H diff --git a/sys/dev/aq/aq_device.h b/sys/dev/aq/aq_device.h index 2c0d8df77cb9..2b170f710840 100644 --- a/sys/dev/aq/aq_device.h +++ b/sys/dev/aq/aq_device.h @@ -54,40 +54,40 @@ enum aq_media_type { AQ_LINK_10G ) struct aq_stats_s { - u64 prc; - u64 uprc; - u64 mprc; - u64 bprc; - u64 cprc; - u64 erpr; - u64 dpc; - u64 brc; - u64 ubrc; - u64 mbrc; - u64 bbrc; - - u64 ptc; - u64 uptc; - u64 mptc; - u64 bptc; - u64 erpt; - u64 btc; - u64 ubtc; - u64 mbtc; - u64 bbtc; + uint64_t prc; + uint64_t uprc; + uint64_t mprc; + uint64_t bprc; + uint64_t cprc; + uint64_t erpr; + uint64_t dpc; + uint64_t brc; + uint64_t ubrc; + uint64_t mbrc; + uint64_t bbrc; + + uint64_t ptc; + uint64_t uptc; + uint64_t mptc; + uint64_t bptc; + uint64_t erpt; + uint64_t btc; + uint64_t ubtc; + uint64_t mbtc; + uint64_t bbtc; }; enum aq_dev_state_e { - AQ_DEV_STATE_UNLOAD, - AQ_DEV_STATE_PCI_STOP, - AQ_DEV_STATE_DOWN, - AQ_DEV_STATE_UP, + AQ_DEV_STATE_UNLOAD, + AQ_DEV_STATE_PCI_STOP, + AQ_DEV_STATE_DOWN, + AQ_DEV_STATE_UP, }; struct aq_rx_filters { - unsigned int rule_cnt; - struct aq_rx_filter_vlan vlan_filters[AQ_HW_VLAN_MAX_FILTERS]; - struct aq_rx_filter_l2 etype_filters[AQ_HW_ETYPE_MAX_FILTERS]; + unsigned int rule_cnt; + struct aq_rx_filter_vlan vlan_filters[AQ_HW_VLAN_MAX_FILTERS]; + struct aq_rx_filter_l2 etype_filters[AQ_HW_ETYPE_MAX_FILTERS]; }; struct aq_vlan_tag { @@ -102,7 +102,7 @@ struct aq_dev { if_shared_ctx_t sctx; struct ifmedia * media; - struct aq_hw hw; + struct aq_hw hw; enum aq_media_type media_type; uint32_t link_speeds; @@ -142,7 +142,7 @@ int aq_update_hw_stats(aq_dev_t *aq_dev); void aq_initmedia(aq_dev_t *aq_dev); int aq_linkstat_isr(void *arg); int aq_isr_rx(void *arg); -void aq_mediastatus_update(aq_dev_t *aq_dev, u32 link_speed, const struct aq_hw_fc_info *fc_neg); +void aq_mediastatus_update(aq_dev_t *aq_dev, uint32_t link_speed, const struct aq_hw_fc_info *fc_neg); void aq_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr); int aq_mediachange(struct ifnet *ifp); void aq_if_update_admin_status(if_ctx_t ctx); diff --git a/sys/dev/aq/aq_fw.c b/sys/dev/aq/aq_fw.c index 3596074dbafc..fac720ba2327 100644 --- a/sys/dev/aq/aq_fw.c +++ b/sys/dev/aq/aq_fw.c @@ -55,10 +55,10 @@ __FBSDID("$FreeBSD$"); typedef enum aq_fw_bootloader_mode { - boot_mode_unknown = 0, - boot_mode_flb, - boot_mode_rbl_flash, - boot_mode_rbl_host_bootload, + boot_mode_unknown = 0, + boot_mode_flb, + boot_mode_rbl_flash, + boot_mode_rbl_host_bootload, } aq_fw_bootloader_mode; #define AQ_CFG_HOST_BOOT_DISABLE 0 @@ -67,22 +67,22 @@ typedef enum aq_fw_bootloader_mode #define MAC_FW_START_TIMEOUT_MS 10000 #define FW_LOADER_START_TIMEOUT_MS 10000 -const u32 NO_RESET_SCRATCHPAD_ADDRESS = 0; -const u32 NO_RESET_SCRATCHPAD_LEN_RES = 1; -const u32 NO_RESET_SCRATCHPAD_RBL_STATUS = 2; -const u32 NO_RESET_SCRATCHPAD_RBL_STATUS_2 = 3; -const u32 WRITE_DATA_COMPLETE = 0x55555555; -const u32 WRITE_DATA_CHUNK_DONE = 0xaaaaaaaa; -const u32 WRITE_DATA_FAIL_WRONG_ADDRESS = 0x66666666; +const uint32_t NO_RESET_SCRATCHPAD_ADDRESS = 0; +const uint32_t NO_RESET_SCRATCHPAD_LEN_RES = 1; +const uint32_t NO_RESET_SCRATCHPAD_RBL_STATUS = 2; +const uint32_t NO_RESET_SCRATCHPAD_RBL_STATUS_2 = 3; +const uint32_t WRITE_DATA_COMPLETE = 0x55555555; +const uint32_t WRITE_DATA_CHUNK_DONE = 0xaaaaaaaa; +const uint32_t WRITE_DATA_FAIL_WRONG_ADDRESS = 0x66666666; -const u32 WAIT_WRITE_TIMEOUT = 1; -const u32 WAIT_WRITE_TIMEOUT_COUNT = 1000; +const uint32_t WAIT_WRITE_TIMEOUT = 1; +const uint32_t WAIT_WRITE_TIMEOUT_COUNT = 1000; -const u32 RBL_STATUS_SUCCESS = 0xabba; -const u32 RBL_STATUS_FAILURE = 0xbad; -const u32 RBL_STATUS_HOST_BOOT = 0xf1a7; +const uint32_t RBL_STATUS_SUCCESS = 0xabba; +const uint32_t RBL_STATUS_FAILURE = 0xbad; +const uint32_t RBL_STATUS_HOST_BOOT = 0xf1a7; -const u32 SCRATCHPAD_FW_LOADER_STATUS = (0x40 / sizeof(u32)); +const uint32_t SCRATCHPAD_FW_LOADER_STATUS = (0x40 / sizeof(uint32_t)); extern struct aq_firmware_ops aq_fw1x_ops; @@ -95,258 +95,268 @@ int mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode); int wait_init_mac_firmware_(struct aq_hw* hw); -int aq_fw_reset(struct aq_hw* hw) +int +aq_fw_reset(struct aq_hw* hw) { - int ver = AQ_READ_REG(hw, 0x18); - u32 bootExitCode = 0; - int k; - - for (k = 0; k < 1000; ++k) { - u32 flbStatus = reg_glb_daisy_chain_status1_get(hw); - bootExitCode = AQ_READ_REG(hw, 0x388); - if (flbStatus != 0x06000000 || bootExitCode != 0) - break; - } - - if (k == 1000) { - aq_log_error("Neither RBL nor FLB started"); - return (-EBUSY); - } - - hw->rbl_enabled = bootExitCode != 0; - - trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled); - - /* Having FW version 0 is an indicator that cold start - * is in progress. This means two things: - * 1) Driver have to wait for FW/HW to finish boot (500ms giveup) - * 2) Driver may skip reset sequence and save time. - */ - if (hw->fast_start_enabled && !ver) { - int err = wait_init_mac_firmware_(hw); - /* Skip reset as it just completed */ - if (!err) - return (0); - } - - aq_fw_bootloader_mode mode = boot_mode_unknown; - int err = mac_soft_reset_(hw, &mode); - if (err < 0) { - aq_log_error("MAC reset failed: %d", err); - return (err); - } - - switch (mode) { - case boot_mode_flb: - aq_log("FLB> F/W successfully loaded from flash."); - hw->flash_present = true; - return wait_init_mac_firmware_(hw); - - case boot_mode_rbl_flash: - aq_log("RBL> F/W loaded from flash. Host Bootload disabled."); - hw->flash_present = true; - return wait_init_mac_firmware_(hw); - - case boot_mode_unknown: - aq_log_error("F/W bootload error: unknown bootloader type"); - return (-ENOTSUP); - - case boot_mode_rbl_host_bootload: + int ver = AQ_READ_REG(hw, 0x18); + uint32_t bootExitCode = 0; + int k; + + for (k = 0; k < 1000; ++k) { + uint32_t flbStatus = reg_glb_daisy_chain_status1_get(hw); + bootExitCode = AQ_READ_REG(hw, 0x388); + if (flbStatus != 0x06000000 || bootExitCode != 0) + break; + } + + if (k == 1000) { + aq_log_error("Neither RBL nor FLB started"); + return (-EBUSY); + } + + hw->rbl_enabled = bootExitCode != 0; + + trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled); + + /* Having FW version 0 is an indicator that cold start + * is in progress. This means two things: + * 1) Driver have to wait for FW/HW to finish boot (500ms giveup) + * 2) Driver may skip reset sequence and save time. + */ + if (hw->fast_start_enabled && !ver) { + int err = wait_init_mac_firmware_(hw); + /* Skip reset as it just completed */ + if (!err) + return (0); + } + + aq_fw_bootloader_mode mode = boot_mode_unknown; + int err = mac_soft_reset_(hw, &mode); + if (err < 0) { + aq_log_error("MAC reset failed: %d", err); + return (err); + } + + switch (mode) { + case boot_mode_flb: + aq_log("FLB> F/W successfully loaded from flash."); + hw->flash_present = true; + return wait_init_mac_firmware_(hw); + + case boot_mode_rbl_flash: + aq_log("RBL> F/W loaded from flash. Host Bootload disabled."); + hw->flash_present = true; + return wait_init_mac_firmware_(hw); + + case boot_mode_unknown: + aq_log_error("F/W bootload error: unknown bootloader type"); + return (-ENOTSUP); + + case boot_mode_rbl_host_bootload: #if AQ_CFG_HOST_BOOT_DISABLE - aq_log_error("RBL> Host Bootload mode: this driver does not support Host Boot"); - return (-ENOTSUP); + aq_log_error("RBL> Host Bootload mode: this driver does not support Host Boot"); + return (-ENOTSUP); #else - trace(dbg_init, "RBL> Host Bootload mode"); - break; + trace(dbg_init, "RBL> Host Bootload mode"); + break; #endif // HOST_BOOT_DISABLE - } + } - /* - * #todo: Host Boot - */ - aq_log_error("RBL> F/W Host Bootload not implemented"); + /* + * #todo: Host Boot + */ + aq_log_error("RBL> F/W Host Bootload not implemented"); - return (-ENOTSUP); + return (-ENOTSUP); } -int aq_fw_ops_init(struct aq_hw* hw) +int +aq_fw_ops_init(struct aq_hw* hw) { - if (hw->fw_version.raw == 0) - hw->fw_version.raw = AQ_READ_REG(hw, 0x18); - - aq_log("MAC F/W version is %d.%d.%d", - hw->fw_version.major_version, hw->fw_version.minor_version, - hw->fw_version.build_number); - - if (hw->fw_version.major_version == 1) { - trace(dbg_init, "using F/W ops v1.x"); - hw->fw_ops = &aq_fw1x_ops; - return (EOK); - } else if (hw->fw_version.major_version >= 2) { - trace(dbg_init, "using F/W ops v2.x"); - hw->fw_ops = &aq_fw2x_ops; - return (EOK); - } - - aq_log_error("aq_fw_ops_init(): invalid F/W version %#x", hw->fw_version.raw); - return (-ENOTSUP); + if (hw->fw_version.raw == 0) + hw->fw_version.raw = AQ_READ_REG(hw, 0x18); + + aq_log("MAC F/W version is %d.%d.%d", + hw->fw_version.major_version, hw->fw_version.minor_version, + hw->fw_version.build_number); + + if (hw->fw_version.major_version == 1) { + trace(dbg_init, "using F/W ops v1.x"); + hw->fw_ops = &aq_fw1x_ops; + return (EOK); + } else if (hw->fw_version.major_version >= 2) { + trace(dbg_init, "using F/W ops v2.x"); + hw->fw_ops = &aq_fw2x_ops; + return (EOK); + } + + aq_log_error("aq_fw_ops_init(): invalid F/W version %#x", + hw->fw_version.raw); + return (-ENOTSUP); } -int mac_soft_reset_(struct aq_hw* hw, aq_fw_bootloader_mode* mode /*= nullptr*/) +int +mac_soft_reset_(struct aq_hw* hw, aq_fw_bootloader_mode* mode /*= nullptr*/) { - if (hw->rbl_enabled) { - return mac_soft_reset_rbl_(hw, mode); - } else { - if (mode) - *mode = boot_mode_flb; - - return mac_soft_reset_flb_(hw); - } + if (hw->rbl_enabled) { + return mac_soft_reset_rbl_(hw, mode); + } else { + if (mode) + *mode = boot_mode_flb; + + return mac_soft_reset_flb_(hw); + } } -int mac_soft_reset_flb_(struct aq_hw* hw) +int +mac_soft_reset_flb_(struct aq_hw* hw) { - int k; - - reg_global_ctl2_set(hw, 0x40e1); - // Let Felicity hardware to complete SMBUS transaction before Global software reset. - msec_delay(50); - - /* - * If SPI burst transaction was interrupted(before running the script), global software - * reset may not clear SPI interface. Clean it up manually before global reset. - */ - reg_glb_nvr_provisioning2_set(hw, 0xa0); - reg_glb_nvr_interface1_set(hw, 0x9f); - reg_glb_nvr_interface1_set(hw, 0x809f); - msec_delay(50); - - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - // Kickstart. - reg_global_ctl2_set(hw, 0x80e0); - reg_mif_power_gating_enable_control_set(hw, 0); - if (!hw->fast_start_enabled) - reg_glb_general_provisioning9_set(hw, 1); - - /* - * For the case SPI burst transaction was interrupted (by MCP reset above), - * wait until it is completed by hardware. - */ - msec_delay(50); // Sleep for 10 ms. - - /* MAC Kickstart */ - if (!hw->fast_start_enabled) { - reg_global_ctl2_set(hw, 0x180e0); - - u32 flb_status = 0; - int k; - for (k = 0; k < 1000; ++k) { - flb_status = reg_glb_daisy_chain_status1_get(hw) & 0x10; - if (flb_status != 0) - break; - msec_delay(10); // Sleep for 10 ms. - } - - if (flb_status == 0) { - trace_error(dbg_init, "FLB> MAC kickstart failed: timed out"); - return (false); - } - - trace(dbg_init, "FLB> MAC kickstart done, %d ms", k); - /* FW reset */ - reg_global_ctl2_set(hw, 0x80e0); - // Let Felicity hardware complete SMBUS transaction before Global software reset. - msec_delay(50); - } - reg_glb_cpu_sem_set(hw, 1, 0); - - // PHY Kickstart: #undone - - // Global software reset - rx_rx_reg_res_dis_set(hw, 0); - tx_tx_reg_res_dis_set(hw, 0); - mpi_tx_reg_res_dis_set(hw, 0); - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - bool restart_completed = false; - for (k = 0; k < 1000; ++k) { - restart_completed = reg_glb_fw_image_id1_get(hw) != 0; - if (restart_completed) - break; - msec_delay(10); - } - - if (!restart_completed) { - trace_error(dbg_init, "FLB> Global Soft Reset failed"); - return (false); - } - - trace(dbg_init, "FLB> F/W restart: %d ms", k * 10); - return (true); + int k; + + reg_global_ctl2_set(hw, 0x40e1); + // Let Felicity hardware to complete SMBUS transaction before Global software reset. + msec_delay(50); + + /* + * If SPI burst transaction was interrupted(before running the script), global software + * reset may not clear SPI interface. Clean it up manually before global reset. + */ + reg_glb_nvr_provisioning2_set(hw, 0xa0); + reg_glb_nvr_interface1_set(hw, 0x9f); + reg_glb_nvr_interface1_set(hw, 0x809f); + msec_delay(50); + + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + // Kickstart. + reg_global_ctl2_set(hw, 0x80e0); + reg_mif_power_gating_enable_control_set(hw, 0); + if (!hw->fast_start_enabled) + reg_glb_general_provisioning9_set(hw, 1); + + /* + * For the case SPI burst transaction was interrupted (by MCP reset above), + * wait until it is completed by hardware. + */ + msec_delay(50); // Sleep for 10 ms. + + /* MAC Kickstart */ + if (!hw->fast_start_enabled) { + reg_global_ctl2_set(hw, 0x180e0); + + uint32_t flb_status = 0; + int k; + for (k = 0; k < 1000; ++k) { + flb_status = reg_glb_daisy_chain_status1_get(hw) & 0x10; + if (flb_status != 0) + break; + msec_delay(10); // Sleep for 10 ms. + } + + if (flb_status == 0) { + trace_error(dbg_init, + "FLB> MAC kickstart failed: timed out"); + return (false); + } + + trace(dbg_init, "FLB> MAC kickstart done, %d ms", k); + /* FW reset */ + reg_global_ctl2_set(hw, 0x80e0); + // Let Felicity hardware complete SMBUS transaction before Global software reset. + msec_delay(50); + } + reg_glb_cpu_sem_set(hw, 1, 0); + + // PHY Kickstart: #undone + + // Global software reset + rx_rx_reg_res_dis_set(hw, 0); + tx_tx_reg_res_dis_set(hw, 0); + mpi_tx_reg_res_dis_set(hw, 0); + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + bool restart_completed = false; + for (k = 0; k < 1000; ++k) { + restart_completed = reg_glb_fw_image_id1_get(hw) != 0; + if (restart_completed) + break; + msec_delay(10); + } + + if (!restart_completed) { + trace_error(dbg_init, "FLB> Global Soft Reset failed"); + return (false); + } + + trace(dbg_init, "FLB> F/W restart: %d ms", k * 10); + return (true); } -int mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode) +int +mac_soft_reset_rbl_(struct aq_hw* hw, aq_fw_bootloader_mode* mode) { - trace(dbg_init, "RBL> MAC reset STARTED!"); - - reg_global_ctl2_set(hw, 0x40e1); - reg_glb_cpu_sem_set(hw, 1, 0); - reg_mif_power_gating_enable_control_set(hw, 0); - - // MAC FW will reload PHY FW if 1E.1000.3 was cleaned - #undone - - reg_glb_cpu_no_reset_scratchpad_set(hw, 0xDEAD, NO_RESET_SCRATCHPAD_RBL_STATUS); - - // Global software reset - rx_rx_reg_res_dis_set(hw, 0); - tx_tx_reg_res_dis_set(hw, 0); - mpi_tx_reg_res_dis_set(hw, 0); - reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); - - reg_global_ctl2_set(hw, 0x40e0); - - // Wait for RBL to finish boot process. - u16 rbl_status = 0; - for (int k = 0; k < RBL_TIMEOUT_MS; ++k) { - rbl_status = LOWORD(reg_glb_cpu_no_reset_scratchpad_get(hw, NO_RESET_SCRATCHPAD_RBL_STATUS)); - if (rbl_status != 0 && rbl_status != 0xDEAD) - break; - - msec_delay(1); - } - - if (rbl_status == 0 || rbl_status == 0xDEAD) { - trace_error(dbg_init, "RBL> RBL restart failed: timeout"); - return (-EBUSY); - } - - if (rbl_status == RBL_STATUS_SUCCESS) { - if (mode) - *mode = boot_mode_rbl_flash; - trace(dbg_init, "RBL> reset complete! [Flash]"); - } else if (rbl_status == RBL_STATUS_HOST_BOOT) { - if (mode) - *mode = boot_mode_rbl_host_bootload; - trace(dbg_init, "RBL> reset complete! [Host Bootload]"); - } else { - trace_error(dbg_init, "unknown RBL status 0x%x", rbl_status); - return (-EBUSY); - } - - return (EOK); + trace(dbg_init, "RBL> MAC reset STARTED!"); + + reg_global_ctl2_set(hw, 0x40e1); + reg_glb_cpu_sem_set(hw, 1, 0); + reg_mif_power_gating_enable_control_set(hw, 0); + + // MAC FW will reload PHY FW if 1E.1000.3 was cleaned - #undone + + reg_glb_cpu_no_reset_scratchpad_set(hw, 0xDEAD, + NO_RESET_SCRATCHPAD_RBL_STATUS); + + // Global software reset + rx_rx_reg_res_dis_set(hw, 0); + tx_tx_reg_res_dis_set(hw, 0); + mpi_tx_reg_res_dis_set(hw, 0); + reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk); + + reg_global_ctl2_set(hw, 0x40e0); + + // Wait for RBL to finish boot process. + uint16_t rbl_status = 0; + for (int k = 0; k < RBL_TIMEOUT_MS; ++k) { + rbl_status = LOWORD(reg_glb_cpu_no_reset_scratchpad_get(hw, NO_RESET_SCRATCHPAD_RBL_STATUS)); + if (rbl_status != 0 && rbl_status != 0xDEAD) + break; + + msec_delay(1); + } + + if (rbl_status == 0 || rbl_status == 0xDEAD) { + trace_error(dbg_init, "RBL> RBL restart failed: timeout"); + return (-EBUSY); + } + + if (rbl_status == RBL_STATUS_SUCCESS) { + if (mode) + *mode = boot_mode_rbl_flash; + trace(dbg_init, "RBL> reset complete! [Flash]"); + } else if (rbl_status == RBL_STATUS_HOST_BOOT) { + if (mode) + *mode = boot_mode_rbl_host_bootload; + trace(dbg_init, "RBL> reset complete! [Host Bootload]"); + } else { + trace_error(dbg_init, "unknown RBL status 0x%x", rbl_status); + return (-EBUSY); + } + + return (EOK); } -int wait_init_mac_firmware_(struct aq_hw* hw) +int +wait_init_mac_firmware_(struct aq_hw* hw) { - for (int i = 0; i < MAC_FW_START_TIMEOUT_MS; ++i) { - if ((hw->fw_version.raw = AQ_READ_REG(hw, 0x18)) != 0) - return (EOK); + for (int i = 0; i < MAC_FW_START_TIMEOUT_MS; ++i) { + if ((hw->fw_version.raw = AQ_READ_REG(hw, 0x18)) != 0) + return (EOK); - msec_delay(1); - } + msec_delay(1); + } - trace_error(dbg_init, "timeout waiting for reg 0x18. MAC f/w NOT READY"); - return (-EBUSY); + trace_error(dbg_init, + "timeout waiting for reg 0x18. MAC f/w NOT READY"); + return (-EBUSY); } diff --git a/sys/dev/aq/aq_fw.h b/sys/dev/aq/aq_fw.h index 7ffb60b29421..ea2c37b6c92c 100644 --- a/sys/dev/aq/aq_fw.h +++ b/sys/dev/aq/aq_fw.h @@ -38,35 +38,36 @@ struct aq_hw; typedef enum aq_fw_link_speed { - aq_fw_none = 0, - aq_fw_100M = (1 << 0), - aq_fw_1G = (1 << 1), - aq_fw_2G5 = (1 << 2), - aq_fw_5G = (1 << 3), - aq_fw_10G = (1 << 4), + aq_fw_none = 0, + aq_fw_100M = (1 << 0), + aq_fw_1G = (1 << 1), + aq_fw_2G5 = (1 << 2), + aq_fw_5G = (1 << 3), + aq_fw_10G = (1 << 4), } aq_fw_link_speed_t; typedef enum aq_fw_link_fc { - aq_fw_fc_none = 0, - aq_fw_fc_ENABLE_RX = BIT(0), - aq_fw_fc_ENABLE_TX = BIT(1), - aq_fw_fc_ENABLE_ALL = aq_fw_fc_ENABLE_RX | aq_fw_fc_ENABLE_TX, + aq_fw_fc_none = 0, + aq_fw_fc_ENABLE_RX = BIT(0), + aq_fw_fc_ENABLE_TX = BIT(1), + aq_fw_fc_ENABLE_ALL = aq_fw_fc_ENABLE_RX | aq_fw_fc_ENABLE_TX, } aq_fw_link_fc_t; -#define aq_fw_speed_auto (aq_fw_100M | aq_fw_1G | aq_fw_2G5 | aq_fw_5G | aq_fw_10G) +#define aq_fw_speed_auto \ + (aq_fw_100M | aq_fw_1G | aq_fw_2G5 | aq_fw_5G | aq_fw_10G) struct aq_firmware_ops { - int (*reset)(struct aq_hw* hal); + int (*reset)(struct aq_hw* hal); - int (*set_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); - int (*get_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); + int (*set_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); + int (*get_mode)(struct aq_hw* hal, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); - int (*get_mac_addr)(struct aq_hw* hal, u8* mac_addr); - int (*get_stats)(struct aq_hw* hal, struct aq_hw_stats_s* stats); + int (*get_mac_addr)(struct aq_hw* hal, uint8_t* mac_addr); + int (*get_stats)(struct aq_hw* hal, struct aq_hw_stats_s* stats); - int (*led_control)(struct aq_hw* hal, u32 mode); + int (*led_control)(struct aq_hw* hal, uint32_t mode); }; diff --git a/sys/dev/aq/aq_fw1x.c b/sys/dev/aq/aq_fw1x.c index 2aec2cc6f0a5..10328fdbb01c 100644 --- a/sys/dev/aq/aq_fw1x.c +++ b/sys/dev/aq/aq_fw1x.c @@ -31,7 +31,7 @@ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); @@ -50,264 +50,275 @@ __FBSDID("$FreeBSD$"); typedef enum fw1x_mode { - FW1X_MPI_DEINIT = 0, - FW1X_MPI_RESERVED = 1, - FW1X_MPI_INIT = 2, - FW1X_MPI_POWER = 4, + FW1X_MPI_DEINIT = 0, + FW1X_MPI_RESERVED = 1, + FW1X_MPI_INIT = 2, + FW1X_MPI_POWER = 4, } fw1x_mode; typedef enum aq_fw1x_rate { - FW1X_RATE_10G = 1 << 0, - FW1X_RATE_5G = 1 << 1, - FW1X_RATE_5GSR = 1 << 2, - FW1X_RATE_2G5 = 1 << 3, - FW1X_RATE_1G = 1 << 4, - FW1X_RATE_100M = 1 << 5, - FW1X_RATE_INVALID = 1 << 6, + FW1X_RATE_10G = 1 << 0, + FW1X_RATE_5G = 1 << 1, + FW1X_RATE_5GSR = 1 << 2, + FW1X_RATE_2G5 = 1 << 3, + FW1X_RATE_1G = 1 << 4, + FW1X_RATE_100M = 1 << 5, + FW1X_RATE_INVALID = 1 << 6, } aq_fw1x_rate; typedef union fw1x_state_reg { - u32 val; - struct { - u8 mode; - u8 reserved1; - u8 speed; - u8 reserved2 : 1; - u8 disableDirtyWake : 1; - u8 reserved3 : 2; - u8 downshift : 4; - }; + uint32_t val; + struct { + uint8_t mode; + uint8_t reserved1; + uint8_t speed; + uint8_t reserved2 : 1; + uint8_t disableDirtyWake : 1; + uint8_t reserved3 : 2; + uint8_t downshift : 4; + }; } fw1x_state_reg; int fw1x_reset(struct aq_hw* hw); -int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); -int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); -int fw1x_get_mac_addr(struct aq_hw* hw, u8* mac_addr); +int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed); +int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); +int fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac_addr); int fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats); -static -fw1x_mode mpi_mode_to_fw1x_(enum aq_hw_fw_mpi_state_e mode) +static fw1x_mode +mpi_mode_to_fw1x_(enum aq_hw_fw_mpi_state_e mode) { - switch (mode) { - case MPI_DEINIT: - return (FW1X_MPI_DEINIT); + switch (mode) { + case MPI_DEINIT: + return (FW1X_MPI_DEINIT); - case MPI_INIT: - return (FW1X_MPI_INIT); + case MPI_INIT: + return (FW1X_MPI_INIT); - case MPI_POWER: - return (FW1X_MPI_POWER); + case MPI_POWER: + return (FW1X_MPI_POWER); - case MPI_RESET: - return (FW1X_MPI_RESERVED); - } + case MPI_RESET: + return (FW1X_MPI_RESERVED); + } - /* - * We shouldn't get here. - */ + /* + * We shouldn't get here. + */ - return (FW1X_MPI_RESERVED); + return (FW1X_MPI_RESERVED); } -static -aq_fw1x_rate link_speed_mask_to_fw1x_(u32 /*aq_fw_link_speed*/ speed) +static aq_fw1x_rate +link_speed_mask_to_fw1x_(uint32_t /*aq_fw_link_speed*/ speed) { - u32 rate = 0; - if (speed & aq_fw_10G) - rate |= FW1X_RATE_10G; + uint32_t rate = 0; + if (speed & aq_fw_10G) + rate |= FW1X_RATE_10G; - if (speed & aq_fw_5G) { - rate |= FW1X_RATE_5G; - rate |= FW1X_RATE_5GSR; - } + if (speed & aq_fw_5G) { + rate |= FW1X_RATE_5G; + rate |= FW1X_RATE_5GSR; + } - if (speed & aq_fw_2G5) - rate |= FW1X_RATE_2G5; + if (speed & aq_fw_2G5) + rate |= FW1X_RATE_2G5; - if (speed & aq_fw_1G) - rate |= FW1X_RATE_1G; + if (speed & aq_fw_1G) + rate |= FW1X_RATE_1G; - if (speed & aq_fw_100M) - rate |= FW1X_RATE_100M; + if (speed & aq_fw_100M) + rate |= FW1X_RATE_100M; - return ((aq_fw1x_rate)rate); + return ((aq_fw1x_rate)rate); } -static -aq_fw_link_speed_t fw1x_rate_to_link_speed_(aq_fw1x_rate rate) +static aq_fw_link_speed_t +fw1x_rate_to_link_speed_(aq_fw1x_rate rate) { - switch (rate) { - case FW1X_RATE_10G: - return (aq_fw_10G); - case FW1X_RATE_5G: - case FW1X_RATE_5GSR: - return (aq_fw_5G); - case FW1X_RATE_2G5: - return (aq_fw_2G5); - case FW1X_RATE_1G: - return (aq_fw_1G); - case FW1X_RATE_100M: - return (aq_fw_100M); - case FW1X_RATE_INVALID: - return (aq_fw_none); - } - - /* - * We should never get here. - */ - - return (aq_fw_none); + switch (rate) { + case FW1X_RATE_10G: + return (aq_fw_10G); + case FW1X_RATE_5G: + case FW1X_RATE_5GSR: + return (aq_fw_5G); + case FW1X_RATE_2G5: + return (aq_fw_2G5); + case FW1X_RATE_1G: + return (aq_fw_1G); + case FW1X_RATE_100M: + return (aq_fw_100M); + case FW1X_RATE_INVALID: + return (aq_fw_none); + } + + /* + * We should never get here. + */ + + return (aq_fw_none); } -int fw1x_reset(struct aq_hw* hal) +int +fw1x_reset(struct aq_hw* hal) { - u32 tid0 = ~0u; /*< Initial value of MBOX transactionId. */ - struct aq_hw_fw_mbox mbox; - const int retryCount = 1000; - - for (int i = 0; i < retryCount; ++i) { - // Read the beginning of Statistics structure to capture the Transaction ID. - aq_hw_fw_downld_dwords(hal, hal->mbox_addr, (u32*)&mbox, - (u32)((char*)&mbox.stats - (char*)&mbox) / sizeof(u32)); - - // Successfully read the stats. - if (tid0 == ~0U) { - // We have read the initial value. - tid0 = mbox.transaction_id; - continue; - } else if (mbox.transaction_id != tid0) { - /* - * Compare transaction ID to initial value. - * If it's different means f/w is alive. We're done. - */ - - return (EOK); - } - - /* - * Transaction ID value haven't changed since last time. - * Try reading the stats again. - */ - usec_delay(10); - } - - trace_error(dbg_init, "F/W 1.x reset finalize timeout"); - return (-EBUSY); + uint32_t tid0 = ~0u; /*< Initial value of MBOX transactionId. */ + struct aq_hw_fw_mbox mbox; + const int retryCount = 1000; + + for (int i = 0; i < retryCount; ++i) { + // Read the beginning of Statistics structure to capture the Transaction ID. + aq_hw_fw_downld_dwords(hal, hal->mbox_addr, (uint32_t*)&mbox, + (uint32_t)((char*)&mbox.stats - (char*)&mbox) / sizeof(uint32_t)); + + // Successfully read the stats. + if (tid0 == ~0U) { + // We have read the initial value. + tid0 = mbox.transaction_id; + continue; + } else if (mbox.transaction_id != tid0) { + /* + * Compare transaction ID to initial value. + * If it's different means f/w is alive. We're done. + */ + + return (EOK); + } + + /* + * Transaction ID value haven't changed since last time. + * Try reading the stats again. + */ + usec_delay(10); + } + + trace_error(dbg_init, "F/W 1.x reset finalize timeout"); + return (-EBUSY); } -int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed) +int +fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed) { - union fw1x_state_reg state = {0}; - state.mode = mpi_mode_to_fw1x_(mode); - state.speed = link_speed_mask_to_fw1x_(speed); + union fw1x_state_reg state = {0}; + state.mode = mpi_mode_to_fw1x_(mode); + state.speed = link_speed_mask_to_fw1x_(speed); - trace(dbg_init, "fw1x> set mode %d, rate mask = %#x; raw = %#x", state.mode, state.speed, state.val); + trace(dbg_init, "fw1x> set mode %d, rate mask = %#x; raw = %#x", + state.mode, state.speed, state.val); - AQ_WRITE_REG(hw, FW1X_MPI_CONTROL_ADR, state.val); + AQ_WRITE_REG(hw, FW1X_MPI_CONTROL_ADR, state.val); - return (EOK); + return (EOK); } -int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc) +int +fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc) { - union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) }; - - trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x", state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR)); - - enum aq_hw_fw_mpi_state_e md = MPI_DEINIT; - - switch (state.mode) { - case FW1X_MPI_DEINIT: - md = MPI_DEINIT; - break; - case FW1X_MPI_RESERVED: - md = MPI_RESET; - break; - case FW1X_MPI_INIT: - md = MPI_INIT; - break; - case FW1X_MPI_POWER: - md = MPI_POWER; - break; - } - - if (mode) - *mode = md; - - if (speed) - *speed = fw1x_rate_to_link_speed_(state.speed); - - *fc = aq_fw_fc_none; - - AQ_DBG_EXIT(EOK); - return (EOK); + union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) }; + + trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x", + state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR)); + + enum aq_hw_fw_mpi_state_e md = MPI_DEINIT; + + switch (state.mode) { + case FW1X_MPI_DEINIT: + md = MPI_DEINIT; + break; + case FW1X_MPI_RESERVED: + md = MPI_RESET; + break; + case FW1X_MPI_INIT: + md = MPI_INIT; + break; + case FW1X_MPI_POWER: + md = MPI_POWER; + break; + } + + if (mode) + *mode = md; + + if (speed) + *speed = fw1x_rate_to_link_speed_(state.speed); + + *fc = aq_fw_fc_none; + + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw1x_get_mac_addr(struct aq_hw* hw, u8* mac) +int +fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac) { - int err = -EFAULT; - u32 mac_addr[2]; + int err = -EFAULT; + uint32_t mac_addr[2]; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - u32 efuse_shadow_addr = AQ_READ_REG(hw, 0x374); - if (efuse_shadow_addr == 0) { - trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); - AQ_DBG_EXIT(-EFAULT); - return (-EFAULT); - } + uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x374); + if (efuse_shadow_addr == 0) { + trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); + AQ_DBG_EXIT(-EFAULT); + return (-EFAULT); + } - err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), - mac_addr, ARRAY_SIZE(mac_addr)); - if (err < 0) { - mac_addr[0] = 0; - mac_addr[1] = 0; - AQ_DBG_EXIT(err); - return (err); - } + err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), + mac_addr, ARRAY_SIZE(mac_addr)); + if (err < 0) { + mac_addr[0] = 0; + mac_addr[1] = 0; + AQ_DBG_EXIT(err); + return (err); + } - mac_addr[0] = bswap32(mac_addr[0]); - mac_addr[1] = bswap32(mac_addr[1]); + mac_addr[0] = bswap32(mac_addr[0]); + mac_addr[1] = bswap32(mac_addr[1]); - memcpy(mac, (u8*)mac_addr, ETHER_ADDR_LEN); + memcpy(mac, (uint8_t*)mac_addr, ETHER_ADDR_LEN); - trace(dbg_init, "fw1x> eFUSE MAC addr -> %02x-%02x-%02x-%02x-%02x-%02x", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + trace(dbg_init, "fw1x> eFUSE MAC addr -> %02x-%02x-%02x-%02x-%02x-%02x", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - AQ_DBG_EXIT(EOK); - return (EOK); + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) +int +fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); - err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr, (u32*)(void*)&hw->mbox, - sizeof hw->mbox / sizeof(u32)); + AQ_DBG_ENTER(); + err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr, + (uint32_t*)(void*)&hw->mbox, sizeof hw->mbox / sizeof(uint32_t)); - if (err >= 0) { - if (stats != &hw->mbox.stats) - memcpy(stats, &hw->mbox.stats, sizeof *stats); + if (err >= 0) { + if (stats != &hw->mbox.stats) + memcpy(stats, &hw->mbox.stats, sizeof *stats); - stats->dpc = reg_rx_dma_stat_counter7get(hw); - } + stats->dpc = reg_rx_dma_stat_counter7get(hw); + } - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } struct aq_firmware_ops aq_fw1x_ops = { - .reset = fw1x_reset, + .reset = fw1x_reset, - .set_mode = fw1x_set_mode, - .get_mode = fw1x_get_mode, + .set_mode = fw1x_set_mode, + .get_mode = fw1x_get_mode, - .get_mac_addr = fw1x_get_mac_addr, - .get_stats = fw1x_get_stats, + .get_mac_addr = fw1x_get_mac_addr, + .get_stats = fw1x_get_stats, }; diff --git a/sys/dev/aq/aq_fw2x.c b/sys/dev/aq/aq_fw2x.c index 19de3b7a2746..7a39a0ddc7e6 100644 --- a/sys/dev/aq/aq_fw2x.c +++ b/sys/dev/aq/aq_fw2x.c @@ -52,112 +52,112 @@ __FBSDID("$FreeBSD$"); #include "aq_dbg.h" typedef enum { - CAPS_LO_10BASET_HD = 0x00, - CAPS_LO_10BASET_FD, - CAPS_LO_100BASETX_HD, - CAPS_LO_100BASET4_HD, - CAPS_LO_100BASET2_HD, - CAPS_LO_100BASETX_FD, - CAPS_LO_100BASET2_FD, - CAPS_LO_1000BASET_HD, - CAPS_LO_1000BASET_FD, - CAPS_LO_2P5GBASET_FD, - CAPS_LO_5GBASET_FD, - CAPS_LO_10GBASET_FD, + CAPS_LO_10BASET_HD = 0x00, + CAPS_LO_10BASET_FD, + CAPS_LO_100BASETX_HD, + CAPS_LO_100BASET4_HD, + CAPS_LO_100BASET2_HD, + CAPS_LO_100BASETX_FD, + CAPS_LO_100BASET2_FD, + CAPS_LO_1000BASET_HD, + CAPS_LO_1000BASET_FD, + CAPS_LO_2P5GBASET_FD, + CAPS_LO_5GBASET_FD, + CAPS_LO_10GBASET_FD, } fw2x_caps_lo; typedef enum { - CAPS_HI_RESERVED1 = 0x00, - CAPS_HI_10BASET_EEE, - CAPS_HI_RESERVED2, - CAPS_HI_PAUSE, - CAPS_HI_ASYMMETRIC_PAUSE, - CAPS_HI_100BASETX_EEE, - CAPS_HI_RESERVED3, - CAPS_HI_RESERVED4, - CAPS_HI_1000BASET_FD_EEE, - CAPS_HI_2P5GBASET_FD_EEE, - CAPS_HI_5GBASET_FD_EEE, - CAPS_HI_10GBASET_FD_EEE, - CAPS_HI_RESERVED5, - CAPS_HI_RESERVED6, - CAPS_HI_RESERVED7, - CAPS_HI_RESERVED8, - CAPS_HI_RESERVED9, - CAPS_HI_CABLE_DIAG, - CAPS_HI_TEMPERATURE, - CAPS_HI_DOWNSHIFT, - CAPS_HI_PTP_AVB_EN, - CAPS_HI_MEDIA_DETECT, - CAPS_HI_LINK_DROP, - CAPS_HI_SLEEP_PROXY, - CAPS_HI_WOL, - CAPS_HI_MAC_STOP, - CAPS_HI_EXT_LOOPBACK, - CAPS_HI_INT_LOOPBACK, - CAPS_HI_EFUSE_AGENT, - CAPS_HI_WOL_TIMER, - CAPS_HI_STATISTICS, - CAPS_HI_TRANSACTION_ID, + CAPS_HI_RESERVED1 = 0x00, + CAPS_HI_10BASET_EEE, + CAPS_HI_RESERVED2, + CAPS_HI_PAUSE, + CAPS_HI_ASYMMETRIC_PAUSE, + CAPS_HI_100BASETX_EEE, + CAPS_HI_RESERVED3, + CAPS_HI_RESERVED4, + CAPS_HI_1000BASET_FD_EEE, + CAPS_HI_2P5GBASET_FD_EEE, + CAPS_HI_5GBASET_FD_EEE, + CAPS_HI_10GBASET_FD_EEE, + CAPS_HI_RESERVED5, + CAPS_HI_RESERVED6, + CAPS_HI_RESERVED7, + CAPS_HI_RESERVED8, + CAPS_HI_RESERVED9, + CAPS_HI_CABLE_DIAG, + CAPS_HI_TEMPERATURE, + CAPS_HI_DOWNSHIFT, + CAPS_HI_PTP_AVB_EN, + CAPS_HI_MEDIA_DETECT, + CAPS_HI_LINK_DROP, + CAPS_HI_SLEEP_PROXY, + CAPS_HI_WOL, + CAPS_HI_MAC_STOP, + CAPS_HI_EXT_LOOPBACK, + CAPS_HI_INT_LOOPBACK, + CAPS_HI_EFUSE_AGENT, + CAPS_HI_WOL_TIMER, + CAPS_HI_STATISTICS, + CAPS_HI_TRANSACTION_ID, } fw2x_caps_hi; typedef enum aq_fw2x_rate { - FW2X_RATE_100M = 0x20, - FW2X_RATE_1G = 0x100, - FW2X_RATE_2G5 = 0x200, - FW2X_RATE_5G = 0x400, - FW2X_RATE_10G = 0x800, + FW2X_RATE_100M = 0x20, + FW2X_RATE_1G = 0x100, + FW2X_RATE_2G5 = 0x200, + FW2X_RATE_5G = 0x400, + FW2X_RATE_10G = 0x800, } aq_fw2x_rate; typedef struct fw2x_msm_statistics { - uint32_t uprc; - uint32_t mprc; - uint32_t bprc; - uint32_t erpt; - uint32_t uptc; - uint32_t mptc; - uint32_t bptc; - uint32_t erpr; - uint32_t mbtc; - uint32_t bbtc; - uint32_t mbrc; - uint32_t bbrc; - uint32_t ubrc; - uint32_t ubtc; - uint32_t ptc; - uint32_t prc; + uint32_t uprc; + uint32_t mprc; + uint32_t bprc; + uint32_t erpt; + uint32_t uptc; + uint32_t mptc; + uint32_t bptc; + uint32_t erpr; + uint32_t mbtc; + uint32_t bbtc; + uint32_t mbrc; + uint32_t bbrc; + uint32_t ubrc; + uint32_t ubtc; + uint32_t ptc; + uint32_t prc; } fw2x_msm_statistics; typedef struct fw2x_phy_cable_diag_data { - u32 lane_data[4]; + uint32_t lane_data[4]; } fw2x_phy_cable_diag_data; typedef struct fw2x_capabilities { - u32 caps_lo; - u32 caps_hi; + uint32_t caps_lo; + uint32_t caps_hi; } fw2x_capabilities; typedef struct fw2x_mailbox // struct fwHostInterface { - u32 version; - u32 transaction_id; - s32 error; - fw2x_msm_statistics msm; // msmStatistics_t msm; - u16 phy_h_bit; - u16 phy_fault_code; - s16 phy_temperature; - u8 cable_len; - u8 reserved1; - fw2x_phy_cable_diag_data diag_data; - u32 reserved[8]; - - fw2x_capabilities caps; - - /* ... */ + uint32_t version; + uint32_t transaction_id; + int32_t error; + fw2x_msm_statistics msm; // msmStatistics_t msm; + uint16_t phy_h_bit; + uint16_t phy_fault_code; + int16_t phy_temperature; + uint8_t cable_len; + uint8_t reserved1; + fw2x_phy_cable_diag_data diag_data; + uint32_t reserved[8]; + + fw2x_capabilities caps; + + /* ... */ } fw2x_mailbox; @@ -196,303 +196,331 @@ typedef struct fw2x_mailbox // struct fwHostInterface //@{ int fw2x_reset(struct aq_hw* hw); -int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed); -int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); +int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed); +int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* speed, aq_fw_link_fc_t* fc); -int fw2x_get_mac_addr(struct aq_hw* hw, u8* mac); +int fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac); int fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats); //@} -static u64 read64_(struct aq_hw* hw, u32 addr) +static uint64_t +read64_(struct aq_hw* hw, uint32_t addr) { - u64 lo = AQ_READ_REG(hw, addr); - u64 hi = AQ_READ_REG(hw, addr + 4); - return (lo | (hi << 32)); + uint64_t lo = AQ_READ_REG(hw, addr); + uint64_t hi = AQ_READ_REG(hw, addr + 4); + return (lo | (hi << 32)); } -static uint64_t get_mpi_ctrl_(struct aq_hw* hw) +static uint64_t +get_mpi_ctrl_(struct aq_hw* hw) { - return read64_(hw, FW2X_MPI_CONTROL_ADDR); + return read64_(hw, FW2X_MPI_CONTROL_ADDR); } -static uint64_t get_mpi_state_(struct aq_hw* hw) +static uint64_t +get_mpi_state_(struct aq_hw* hw) { - return read64_(hw, FW2X_MPI_STATE_ADDR); + return read64_(hw, FW2X_MPI_STATE_ADDR); } -static void set_mpi_ctrl_(struct aq_hw* hw, u64 value) +static void +set_mpi_ctrl_(struct aq_hw* hw, uint64_t value) { - AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR, (u32)value); - AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR + 4, (u32)(value >> 32)); + AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR, (uint32_t)value); + AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR + 4, (uint32_t)(value >> 32)); } -int fw2x_reset(struct aq_hw* hw) +int +fw2x_reset(struct aq_hw* hw) { - fw2x_capabilities caps = {0}; - AQ_DBG_ENTER(); - int err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr + offsetof(fw2x_mailbox, caps), (u32*)&caps, sizeof caps/sizeof(u32)); - if (err == EOK) { - hw->fw_caps = caps.caps_lo | ((u64)caps.caps_hi << 32); - trace(dbg_init, "fw2x> F/W capabilities mask = %llx", (unsigned long long)hw->fw_caps); - } else { - trace_error(dbg_init, "fw2x> can't get F/W capabilities mask, error %d", err); - } + fw2x_capabilities caps = {0}; + AQ_DBG_ENTER(); + int err = aq_hw_fw_downld_dwords(hw, + hw->mbox_addr + offsetof(fw2x_mailbox, caps), + (uint32_t*)&caps, sizeof caps/sizeof(uint32_t)); + if (err == EOK) { + hw->fw_caps = caps.caps_lo | ((uint64_t)caps.caps_hi << 32); + trace(dbg_init, + "fw2x> F/W capabilities mask = %llx", + (unsigned long long)hw->fw_caps); + } else { + trace_error(dbg_init, + "fw2x> can't get F/W capabilities mask, error %d", err); + } AQ_DBG_EXIT(EOK); return (EOK); } -static -aq_fw2x_rate link_speed_mask_to_fw2x_(u32 speed) +static aq_fw2x_rate +link_speed_mask_to_fw2x_(uint32_t speed) { - u32 rate = 0; + uint32_t rate = 0; - AQ_DBG_ENTER(); - if (speed & aq_fw_10G) - rate |= FW2X_RATE_10G; + AQ_DBG_ENTER(); + if (speed & aq_fw_10G) + rate |= FW2X_RATE_10G; - if (speed & aq_fw_5G) - rate |= FW2X_RATE_5G; + if (speed & aq_fw_5G) + rate |= FW2X_RATE_5G; - if (speed & aq_fw_2G5) - rate |= FW2X_RATE_2G5; + if (speed & aq_fw_2G5) + rate |= FW2X_RATE_2G5; - if (speed & aq_fw_1G) - rate |= FW2X_RATE_1G; + if (speed & aq_fw_1G) + rate |= FW2X_RATE_1G; - if (speed & aq_fw_100M) - rate |= FW2X_RATE_100M; + if (speed & aq_fw_100M) + rate |= FW2X_RATE_100M; - AQ_DBG_EXIT(rate); - return ((aq_fw2x_rate)rate); + AQ_DBG_EXIT(rate); + return ((aq_fw2x_rate)rate); } -int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, aq_fw_link_speed_t speed) +int +fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e mode, + aq_fw_link_speed_t speed) { - u64 mpi_ctrl = get_mpi_ctrl_(hw); - - AQ_DBG_ENTERA("speed=%d", speed); - switch (mode) { - case MPI_INIT: - mpi_ctrl &= ~FW2X_RATE_MASK; - mpi_ctrl |= link_speed_mask_to_fw2x_(speed); - mpi_ctrl &= ~FW2X_CAP_LINK_DROP; + uint64_t mpi_ctrl = get_mpi_ctrl_(hw); + + AQ_DBG_ENTERA("speed=%d", speed); + switch (mode) { + case MPI_INIT: + mpi_ctrl &= ~FW2X_RATE_MASK; + mpi_ctrl |= link_speed_mask_to_fw2x_(speed); + mpi_ctrl &= ~FW2X_CAP_LINK_DROP; #if 0 // #todo #flowcontrol #pause #eee - if (pHal->pCfg->eee) - mpi_ctrl |= FW2X_EEE_MASK; + if (pHal->pCfg->eee) + mpi_ctrl |= FW2X_EEE_MASK; #endif - if (hw->fc.fc_rx) - mpi_ctrl |= FW2X_FW_CAP_PAUSE; - if (hw->fc.fc_tx) - mpi_ctrl |= FW2X_FW_CAP_ASYM_PAUSE; - break; - - case MPI_DEINIT: - mpi_ctrl &= ~(FW2X_RATE_MASK | FW2X_EEE_MASK); - mpi_ctrl &= ~(FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE); - break; - - default: - trace_error(dbg_init, "fw2x> unknown MPI state %d", mode); - return (-EINVAL); - } - - set_mpi_ctrl_(hw, mpi_ctrl); - AQ_DBG_EXIT(EOK); - return (EOK); + if (hw->fc.fc_rx) + mpi_ctrl |= FW2X_FW_CAP_PAUSE; + if (hw->fc.fc_tx) + mpi_ctrl |= FW2X_FW_CAP_ASYM_PAUSE; + break; + + case MPI_DEINIT: + mpi_ctrl &= ~(FW2X_RATE_MASK | FW2X_EEE_MASK); + mpi_ctrl &= ~(FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE); + break; + + default: + trace_error(dbg_init, "fw2x> unknown MPI state %d", mode); + return (-EINVAL); + } + + set_mpi_ctrl_(hw, mpi_ctrl); + AQ_DBG_EXIT(EOK); + return (EOK); } -int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, aq_fw_link_speed_t* link_speed, aq_fw_link_fc_t* fc) +int +fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state_e* mode, + aq_fw_link_speed_t* link_speed, aq_fw_link_fc_t* fc) { - u64 mpi_state = get_mpi_state_(hw); - u32 rates = mpi_state & FW2X_RATE_MASK; + uint64_t mpi_state = get_mpi_state_(hw); + uint32_t rates = mpi_state & FW2X_RATE_MASK; // AQ_DBG_ENTER(); - if (mode) { - u64 mpi_ctrl = get_mpi_ctrl_(hw); - if (mpi_ctrl & FW2X_RATE_MASK) - *mode = MPI_INIT; - else - *mode = MPI_DEINIT; - } - - aq_fw_link_speed_t speed = aq_fw_none; - - if (rates & FW2X_RATE_10G) - speed = aq_fw_10G; - else if (rates & FW2X_RATE_5G) - speed = aq_fw_5G; - else if (rates & FW2X_RATE_2G5) - speed = aq_fw_2G5; - else if (rates & FW2X_RATE_1G) - speed = aq_fw_1G; - else if (rates & FW2X_RATE_100M) - speed = aq_fw_100M; - - if (link_speed) - *link_speed = speed; - - *fc = (mpi_state & (FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE)) >> (32 + CAPS_HI_PAUSE); - + if (mode) { + uint64_t mpi_ctrl = get_mpi_ctrl_(hw); + if (mpi_ctrl & FW2X_RATE_MASK) + *mode = MPI_INIT; + else + *mode = MPI_DEINIT; + } + + aq_fw_link_speed_t speed = aq_fw_none; + + if (rates & FW2X_RATE_10G) + speed = aq_fw_10G; + else if (rates & FW2X_RATE_5G) + speed = aq_fw_5G; + else if (rates & FW2X_RATE_2G5) + speed = aq_fw_2G5; + else if (rates & FW2X_RATE_1G) + speed = aq_fw_1G; + else if (rates & FW2X_RATE_100M) + speed = aq_fw_100M; + + if (link_speed) + *link_speed = speed; + + *fc = (mpi_state & (FW2X_FW_CAP_PAUSE | FW2X_FW_CAP_ASYM_PAUSE)) >> + (32 + CAPS_HI_PAUSE); // AQ_DBG_EXIT(0); - return (EOK); + return (EOK); } -int fw2x_get_mac_addr(struct aq_hw* hw, u8* mac) +int +fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac) { - int err = -EFAULT; - u32 mac_addr[2]; - - AQ_DBG_ENTER(); - - u32 efuse_shadow_addr = AQ_READ_REG(hw, 0x364); - if (efuse_shadow_addr == 0) { - trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); - AQ_DBG_EXIT(-EFAULT); - return (-EFAULT); - } - - err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), - mac_addr, ARRAY_SIZE(mac_addr)); - if (err < 0) { - mac_addr[0] = 0; - mac_addr[1] = 0; - AQ_DBG_EXIT(err); - return (err); - } - - mac_addr[0] = bswap32(mac_addr[0]); - mac_addr[1] = bswap32(mac_addr[1]); - - memcpy(mac, (u8*)mac_addr, ETHER_ADDR_LEN); - - AQ_DBG_EXIT(EOK); - return (EOK); + int err = -EFAULT; + uint32_t mac_addr[2]; + + AQ_DBG_ENTER(); + + uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x364); + if (efuse_shadow_addr == 0) { + trace_error(dbg_init, "couldn't read eFUSE Shadow Address"); + AQ_DBG_EXIT(-EFAULT); + return (-EFAULT); + } + + err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), mac_addr, + ARRAY_SIZE(mac_addr)); + if (err < 0) { + mac_addr[0] = 0; + mac_addr[1] = 0; + AQ_DBG_EXIT(err); + return (err); + } + + mac_addr[0] = bswap32(mac_addr[0]); + mac_addr[1] = bswap32(mac_addr[1]); + + memcpy(mac, (uint8_t*)mac_addr, ETHER_ADDR_LEN); + + AQ_DBG_EXIT(EOK); + return (EOK); } -static inline -void fw2x_stats_to_fw_stats_(struct aq_hw_stats_s* dst, const fw2x_msm_statistics* src) +static inline void +fw2x_stats_to_fw_stats_(struct aq_hw_stats_s* dst, + const fw2x_msm_statistics* src) { - dst->uprc = src->uprc; - dst->mprc = src->mprc; - dst->bprc = src->bprc; - dst->erpt = src->erpt; - dst->uptc = src->uptc; - dst->mptc = src->mptc; - dst->bptc = src->bptc; - dst->erpr = src->erpr; - dst->mbtc = src->mbtc; - dst->bbtc = src->bbtc; - dst->mbrc = src->mbrc; - dst->bbrc = src->bbrc; - dst->ubrc = src->ubrc; - dst->ubtc = src->ubtc; - dst->ptc = src->ptc; - dst->prc = src->prc; + dst->uprc = src->uprc; + dst->mprc = src->mprc; + dst->bprc = src->bprc; + dst->erpt = src->erpt; + dst->uptc = src->uptc; + dst->mptc = src->mptc; + dst->bptc = src->bptc; + dst->erpr = src->erpr; + dst->mbtc = src->mbtc; + dst->bbtc = src->bbtc; + dst->mbrc = src->mbrc; + dst->bbrc = src->bbrc; + dst->ubrc = src->ubrc; + dst->ubtc = src->ubtc; + dst->ptc = src->ptc; + dst->prc = src->prc; } -static bool toggle_mpi_ctrl_and_wait_(struct aq_hw* hw, u64 mask, u32 timeout_ms, u32 try_count) +static bool +toggle_mpi_ctrl_and_wait_(struct aq_hw* hw, uint64_t mask, uint32_t timeout_ms, + uint32_t try_count) { - u64 ctrl = get_mpi_ctrl_(hw); - u64 state = get_mpi_state_(hw); + uint64_t ctrl = get_mpi_ctrl_(hw); + uint64_t state = get_mpi_state_(hw); // AQ_DBG_ENTER(); - // First, check that control and state values are consistent - if ((ctrl & mask) != (state & mask)) { - trace_warn(dbg_fw, "fw2x> MPI control (%#llx) and state (%#llx) are not consistent for mask %#llx!", - (unsigned long long)ctrl, (unsigned long long)state, (unsigned long long)mask); + // First, check that control and state values are consistent + if ((ctrl & mask) != (state & mask)) { + trace_warn(dbg_fw, + "fw2x> MPI control (%#llx) and state (%#llx) are not consistent for mask %#llx!", + (unsigned long long)ctrl, (unsigned long long)state, + (unsigned long long)mask); AQ_DBG_EXIT(false); - return (false); - } + return (false); + } - // Invert bits (toggle) in control register - ctrl ^= mask; - set_mpi_ctrl_(hw, ctrl); + // Invert bits (toggle) in control register + ctrl ^= mask; + set_mpi_ctrl_(hw, ctrl); - // Clear all bits except masked - ctrl &= mask; + // Clear all bits except masked + ctrl &= mask; - // Wait for FW reflecting change in state register - while (try_count-- != 0) { - if ((get_mpi_state_(hw) & mask) == ctrl) + // Wait for FW reflecting change in state register + while (try_count-- != 0) { + if ((get_mpi_state_(hw) & mask) == ctrl) { // AQ_DBG_EXIT(true); - return (true); + return (true); } - msec_delay(timeout_ms); - } + msec_delay(timeout_ms); + } - trace_detail(dbg_fw, "f/w2x> timeout while waiting for response in state register for bit %#llx!", (unsigned long long)mask); + trace_detail(dbg_fw, + "f/w2x> timeout while waiting for response in state register for bit %#llx!", + (unsigned long long)mask); // AQ_DBG_EXIT(false); - return (false); + return (false); } -int fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) +int +fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats_s* stats) { - int err = 0; - fw2x_msm_statistics fw2x_stats = {0}; + int err = 0; + fw2x_msm_statistics fw2x_stats = {0}; // AQ_DBG_ENTER(); - if ((hw->fw_caps & FW2X_CAP_STATISTICS) == 0) { - trace_warn(dbg_fw, "fw2x> statistics not supported by F/W"); - return (-ENOTSUP); - } + if ((hw->fw_caps & FW2X_CAP_STATISTICS) == 0) { + trace_warn(dbg_fw, "fw2x> statistics not supported by F/W"); + return (-ENOTSUP); + } - // Say to F/W to update the statistics - if (!toggle_mpi_ctrl_and_wait_(hw, FW2X_CAP_STATISTICS, 1, 25)) { - trace_error(dbg_fw, "fw2x> statistics update timeout"); + // Say to F/W to update the statistics + if (!toggle_mpi_ctrl_and_wait_(hw, FW2X_CAP_STATISTICS, 1, 25)) { + trace_error(dbg_fw, "fw2x> statistics update timeout"); AQ_DBG_EXIT(-ETIME); - return (-ETIME); - } + return (-ETIME); + } - err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr + offsetof(fw2x_mailbox, msm), - (u32*)&fw2x_stats, sizeof fw2x_stats/sizeof(u32)); + err = aq_hw_fw_downld_dwords(hw, + hw->mbox_addr + offsetof(fw2x_mailbox, msm), + (uint32_t*)&fw2x_stats, sizeof fw2x_stats/sizeof(uint32_t)); - fw2x_stats_to_fw_stats_(stats, &fw2x_stats); + fw2x_stats_to_fw_stats_(stats, &fw2x_stats); - if (err != EOK) - trace_error(dbg_fw, "fw2x> download statistics data FAILED, error %d", err); + if (err != EOK) + trace_error(dbg_fw, + "fw2x> download statistics data FAILED, error %d", err); // AQ_DBG_EXIT(err); - return (err); + return (err); } -static int fw2x_led_control(struct aq_hw* hw, u32 onoff) +static int +fw2x_led_control(struct aq_hw* hw, uint32_t onoff) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - aq_hw_fw_version ver_expected = { .raw = FW2X_FW_MIN_VER_LED}; - if (aq_hw_ver_match(&ver_expected, &hw->fw_version)) - AQ_WRITE_REG(hw, FW2X_MPI_LED_ADDR, (onoff)? - ((FW2X_LED_BLINK) | (FW2X_LED_BLINK << 2) | (FW2X_LED_BLINK << 4)): - (FW2X_LED_DEFAULT)); + aq_hw_fw_version ver_expected = { .raw = FW2X_FW_MIN_VER_LED}; + if (aq_hw_ver_match(&ver_expected, &hw->fw_version)) + AQ_WRITE_REG(hw, FW2X_MPI_LED_ADDR, + (onoff) ? ((FW2X_LED_BLINK) | (FW2X_LED_BLINK << 2) | (FW2X_LED_BLINK << 4)): + (FW2X_LED_DEFAULT)); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } struct aq_firmware_ops aq_fw2x_ops = { - .reset = fw2x_reset, + .reset = fw2x_reset, - .set_mode = fw2x_set_mode, - .get_mode = fw2x_get_mode, + .set_mode = fw2x_set_mode, + .get_mode = fw2x_get_mode, - .get_mac_addr = fw2x_get_mac_addr, - .get_stats = fw2x_get_stats, + .get_mac_addr = fw2x_get_mac_addr, + .get_stats = fw2x_get_stats, - .led_control = fw2x_led_control, + .led_control = fw2x_led_control, }; diff --git a/sys/dev/aq/aq_hw.c b/sys/dev/aq/aq_hw.c index f5f84203588c..fe48e255254a 100644 --- a/sys/dev/aq/aq_hw.c +++ b/sys/dev/aq/aq_hw.c @@ -32,11 +32,11 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <sys/endian.h> #include <sys/param.h> #include <sys/systm.h> -#include <machine/cpu.h> +#include <sys/endian.h> #include <sys/socket.h> +#include <machine/cpu.h> #include <net/if.h> #include "aq_hw.h" @@ -48,700 +48,707 @@ #define AQ_CFG_FW_MIN_VER_EXPECTED 0x01050006U -int aq_hw_err_from_flags(struct aq_hw *hw) +int +aq_hw_err_from_flags(struct aq_hw *hw) { - return (0); + return (0); } -static void aq_hw_chip_features_init(struct aq_hw *hw, u32 *p) +static void +aq_hw_chip_features_init(struct aq_hw *hw, uint32_t *p) { - u32 chip_features = 0U; - u32 val = reg_glb_mif_id_get(hw); - u32 mif_rev = val & 0xFFU; - - if ((0xFU & mif_rev) == 1U) { - chip_features |= AQ_HW_CHIP_REVISION_A0 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS; - } else if ((0xFU & mif_rev) == 2U) { - chip_features |= AQ_HW_CHIP_REVISION_B0 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS | - AQ_HW_CHIP_TPO2 | - AQ_HW_CHIP_RPF2; - } else if ((0xFU & mif_rev) == 0xAU) { - chip_features |= AQ_HW_CHIP_REVISION_B1 | - AQ_HW_CHIP_MPI_AQ | - AQ_HW_CHIP_MIPS | - AQ_HW_CHIP_TPO2 | - AQ_HW_CHIP_RPF2; - } - - *p = chip_features; + uint32_t chip_features = 0U; + uint32_t val = reg_glb_mif_id_get(hw); + uint32_t mif_rev = val & 0xFFU; + + if ((0xFU & mif_rev) == 1U) { + chip_features |= AQ_HW_CHIP_REVISION_A0 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS; + } else if ((0xFU & mif_rev) == 2U) { + chip_features |= AQ_HW_CHIP_REVISION_B0 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS | AQ_HW_CHIP_TPO2 | AQ_HW_CHIP_RPF2; + } else if ((0xFU & mif_rev) == 0xAU) { + chip_features |= AQ_HW_CHIP_REVISION_B1 | AQ_HW_CHIP_MPI_AQ | + AQ_HW_CHIP_MIPS | AQ_HW_CHIP_TPO2 | AQ_HW_CHIP_RPF2; + } + + *p = chip_features; } -int aq_hw_fw_downld_dwords(struct aq_hw *hw, u32 a, u32 *p, u32 cnt) +int +aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt) { - int err = 0; + int err = 0; // AQ_DBG_ENTER(); - AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, - AQ_HW_FW_SM_RAM) == 1U, - 1U, 10000U); + AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM) == 1U, 1U, + 10000U); - if (err < 0) { - bool is_locked; + if (err < 0) { + bool is_locked; - reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); - is_locked = reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM); - if (!is_locked) { - err = -ETIME; - goto err_exit; - } - } + reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); + is_locked = reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM); + if (!is_locked) { + err = -ETIME; + goto err_exit; + } + } - mif_mcp_up_mailbox_addr_set(hw, a); + mif_mcp_up_mailbox_addr_set(hw, a); - for (++cnt; --cnt && !err;) { - mif_mcp_up_mailbox_execute_operation_set(hw, 1); + for (++cnt; --cnt && !err;) { + mif_mcp_up_mailbox_execute_operation_set(hw, 1); - if (IS_CHIP_FEATURE(hw, REVISION_B1)) - AQ_HW_WAIT_FOR(a != mif_mcp_up_mailbox_addr_get(hw), 1U, 1000U); - else - AQ_HW_WAIT_FOR(!mif_mcp_up_mailbox_busy_get(hw), 1, 1000U); + if (IS_CHIP_FEATURE(hw, REVISION_B1)) + AQ_HW_WAIT_FOR(a != mif_mcp_up_mailbox_addr_get(hw), + 1U, 1000U); + else + AQ_HW_WAIT_FOR(!mif_mcp_up_mailbox_busy_get(hw), 1, + 1000U); - *(p++) = mif_mcp_up_mailbox_data_get(hw); - } + *(p++) = mif_mcp_up_mailbox_data_get(hw); + } - reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); + reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM); err_exit: // AQ_DBG_EXIT(err); - return (err); + return (err); } -int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, const aq_hw_fw_version* ver_actual) +int +aq_hw_ver_match(const aq_hw_fw_version* ver_expected, + const aq_hw_fw_version* ver_actual) { - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - if (ver_actual->major_version >= ver_expected->major_version) - return (true); - if (ver_actual->minor_version >= ver_expected->minor_version) - return (true); - if (ver_actual->build_number >= ver_expected->build_number) - return (true); + if (ver_actual->major_version >= ver_expected->major_version) + return (true); + if (ver_actual->minor_version >= ver_expected->minor_version) + return (true); + if (ver_actual->build_number >= ver_expected->build_number) + return (true); - return (false); + return (false); } -static int aq_hw_init_ucp(struct aq_hw *hw) +static int +aq_hw_init_ucp(struct aq_hw *hw) { - int err = 0; - AQ_DBG_ENTER(); + int err = 0; + AQ_DBG_ENTER(); - hw->fw_version.raw = 0; + hw->fw_version.raw = 0; - err = aq_fw_reset(hw); - if (err != EOK) { - aq_log_error("aq_hw_init_ucp(): F/W reset failed, err %d", err); - return (err); - } + err = aq_fw_reset(hw); + if (err != EOK) { + aq_log_error("aq_hw_init_ucp(): F/W reset failed, err %d", err); + return (err); + } - aq_hw_chip_features_init(hw, &hw->chip_features); - err = aq_fw_ops_init(hw); - if (err < 0) { - aq_log_error("could not initialize F/W ops, err %d", err); - return (-1); - } + aq_hw_chip_features_init(hw, &hw->chip_features); + err = aq_fw_ops_init(hw); + if (err < 0) { + aq_log_error("could not initialize F/W ops, err %d", err); + return (-1); + } - if (hw->fw_version.major_version == 1) { - if (!AQ_READ_REG(hw, 0x370)) { - unsigned int rnd = 0; - unsigned int ucp_0x370 = 0; + if (hw->fw_version.major_version == 1) { + if (!AQ_READ_REG(hw, 0x370)) { + unsigned int rnd = 0; + unsigned int ucp_0x370 = 0; - rnd = arc4random(); + rnd = arc4random(); - ucp_0x370 = 0x02020202 | (0xFEFEFEFE & rnd); - AQ_WRITE_REG(hw, AQ_HW_UCP_0X370_REG, ucp_0x370); - } + ucp_0x370 = 0x02020202 | (0xFEFEFEFE & rnd); + AQ_WRITE_REG(hw, AQ_HW_UCP_0X370_REG, ucp_0x370); + } - reg_glb_cpu_scratch_scp_set(hw, 0, 25); - } + reg_glb_cpu_scratch_scp_set(hw, 0, 25); + } - /* check 10 times by 1ms */ - AQ_HW_WAIT_FOR((hw->mbox_addr = AQ_READ_REG(hw, 0x360)) != 0, 400U, 20); + /* check 10 times by 1ms */ + AQ_HW_WAIT_FOR((hw->mbox_addr = AQ_READ_REG(hw, 0x360)) != 0, 400U, 20); - aq_hw_fw_version ver_expected = { .raw = AQ_CFG_FW_MIN_VER_EXPECTED }; - if (!aq_hw_ver_match(&ver_expected, &hw->fw_version)) - aq_log_error("atlantic: aq_hw_init_ucp(), wrong FW version: expected:%x actual:%x", - AQ_CFG_FW_MIN_VER_EXPECTED, hw->fw_version.raw); + aq_hw_fw_version ver_expected = { .raw = AQ_CFG_FW_MIN_VER_EXPECTED }; + if (!aq_hw_ver_match(&ver_expected, &hw->fw_version)) + aq_log_error("atlantic: aq_hw_init_ucp(), wrong FW version: expected:%x actual:%x", + AQ_CFG_FW_MIN_VER_EXPECTED, hw->fw_version.raw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mpi_create(struct aq_hw *hw) +int +aq_hw_mpi_create(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); - err = aq_hw_init_ucp(hw); - if (err < 0) - goto err_exit; + AQ_DBG_ENTER(); + err = aq_hw_init_ucp(hw); + if (err < 0) + goto err_exit; err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox) +int +aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox) { - int err = 0; + int err = 0; // AQ_DBG_ENTER(); - if (hw->fw_ops && hw->fw_ops->get_stats) { - err = hw->fw_ops->get_stats(hw, &pmbox->stats); - } else { - err = -ENOTSUP; - aq_log_error("get_stats() not supported by F/W"); - } + if (hw->fw_ops && hw->fw_ops->get_stats) { + err = hw->fw_ops->get_stats(hw, &pmbox->stats); + } else { + err = -ENOTSUP; + aq_log_error("get_stats() not supported by F/W"); + } - if (err == EOK) { - pmbox->stats.dpc = reg_rx_dma_stat_counter7get(hw); - pmbox->stats.cprc = stats_rx_lro_coalesced_pkt_count0_get(hw); - } + if (err == EOK) { + pmbox->stats.dpc = reg_rx_dma_stat_counter7get(hw); + pmbox->stats.cprc = stats_rx_lro_coalesced_pkt_count0_get(hw); + } // AQ_DBG_EXIT(err); - return (err); + return (err); } -static int aq_hw_mpi_set(struct aq_hw *hw, - enum aq_hw_fw_mpi_state_e state, u32 speed) +static int +aq_hw_mpi_set(struct aq_hw *hw, enum aq_hw_fw_mpi_state_e state, uint32_t speed) { - int err = -ENOTSUP; - AQ_DBG_ENTERA("speed %d", speed); + int err = -ENOTSUP; + AQ_DBG_ENTERA("speed %d", speed); - if (hw->fw_ops && hw->fw_ops->set_mode) { - err = hw->fw_ops->set_mode(hw, state, speed); - } else { - aq_log_error("set_mode() not supported by F/W"); - } + if (hw->fw_ops && hw->fw_ops->set_mode) { + err = hw->fw_ops->set_mode(hw, state, speed); + } else { + aq_log_error("set_mode() not supported by F/W"); + } - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_set_link_speed(struct aq_hw *hw, u32 speed) +int +aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed) { - return aq_hw_mpi_set(hw, MPI_INIT, speed); + return aq_hw_mpi_set(hw, MPI_INIT, speed); } -int aq_hw_get_link_state(struct aq_hw *hw, u32 *link_speed, struct aq_hw_fc_info *fc_neg) +int +aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed, struct aq_hw_fc_info *fc_neg) { - int err = EOK; + int err = EOK; // AQ_DBG_ENTER(); - enum aq_hw_fw_mpi_state_e mode; - aq_fw_link_speed_t speed = aq_fw_none; - aq_fw_link_fc_t fc; + enum aq_hw_fw_mpi_state_e mode; + aq_fw_link_speed_t speed = aq_fw_none; + aq_fw_link_fc_t fc; - if (hw->fw_ops && hw->fw_ops->get_mode) { - err = hw->fw_ops->get_mode(hw, &mode, &speed, &fc); - } else { - aq_log_error("get_mode() not supported by F/W"); + if (hw->fw_ops && hw->fw_ops->get_mode) { + err = hw->fw_ops->get_mode(hw, &mode, &speed, &fc); + } else { + aq_log_error("get_mode() not supported by F/W"); AQ_DBG_EXIT(-ENOTSUP); - return (-ENOTSUP); - } + return (-ENOTSUP); + } - if (err < 0) { - aq_log_error("get_mode() failed, err %d", err); + if (err < 0) { + aq_log_error("get_mode() failed, err %d", err); AQ_DBG_EXIT(err); - return (err); - } + return (err); + } *link_speed = 0; - if (mode != MPI_INIT) - return (0); + if (mode != MPI_INIT) + return (0); + + switch (speed) { + case aq_fw_10G: + *link_speed = 10000U; + break; + case aq_fw_5G: + *link_speed = 5000U; + break; + case aq_fw_2G5: + *link_speed = 2500U; + break; + case aq_fw_1G: + *link_speed = 1000U; + break; + case aq_fw_100M: + *link_speed = 100U; + break; + default: + *link_speed = 0U; + break; + } - switch (speed) { - case aq_fw_10G: - *link_speed = 10000U; - break; + fc_neg->fc_rx = !!(fc & aq_fw_fc_ENABLE_RX); + fc_neg->fc_tx = !!(fc & aq_fw_fc_ENABLE_TX); - case aq_fw_5G: - *link_speed = 5000U; - break; + // AQ_DBG_EXIT(0); + return (0); +} - case aq_fw_2G5: - *link_speed = 2500U; - break; +int +aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac) +{ + int err = -ENOTSUP; + AQ_DBG_ENTER(); - case aq_fw_1G: - *link_speed = 1000U; - break; + if (hw->fw_ops && hw->fw_ops->get_mac_addr) + err = hw->fw_ops->get_mac_addr(hw, mac); - case aq_fw_100M: - *link_speed = 100U; - break; + /* Couldn't get MAC address from HW. Use auto-generated one. */ + if ((mac[0] & 1) || ((mac[0] | mac[1] | mac[2]) == 0)) { + uint16_t rnd; + uint32_t h = 0; + uint32_t l = 0; - default: - *link_speed = 0U; - break; - } + printf("atlantic: HW MAC address %x:%x:%x:%x:%x:%x is multicast or empty MAC", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + printf("atlantic: Use random MAC address"); - fc_neg->fc_rx = !!(fc & aq_fw_fc_ENABLE_RX); - fc_neg->fc_tx = !!(fc & aq_fw_fc_ENABLE_TX); + rnd = arc4random(); - // AQ_DBG_EXIT(0); - return (0); -} + /* chip revision */ + l = 0xE3000000U | (0xFFFFU & rnd) | (0x00 << 16); + h = 0x8001300EU; -int aq_hw_get_mac_permanent(struct aq_hw *hw, u8 *mac) -{ - int err = -ENOTSUP; - AQ_DBG_ENTER(); - - if (hw->fw_ops && hw->fw_ops->get_mac_addr) - err = hw->fw_ops->get_mac_addr(hw, mac); - - /* Couldn't get MAC address from HW. Use auto-generated one. */ - if ((mac[0] & 1) || ((mac[0] | mac[1] | mac[2]) == 0)) { - u16 rnd; - u32 h = 0; - u32 l = 0; - - printf("atlantic: HW MAC address %x:%x:%x:%x:%x:%x is multicast or empty MAC", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - printf("atlantic: Use random MAC address"); - - rnd = arc4random(); - - /* chip revision */ - l = 0xE3000000U - | (0xFFFFU & rnd) - | (0x00 << 16); - h = 0x8001300EU; - - mac[5] = (u8)(0xFFU & l); - l >>= 8; - mac[4] = (u8)(0xFFU & l); - l >>= 8; - mac[3] = (u8)(0xFFU & l); - l >>= 8; - mac[2] = (u8)(0xFFU & l); - mac[1] = (u8)(0xFFU & h); - h >>= 8; - mac[0] = (u8)(0xFFU & h); - - err = EOK; - } - - AQ_DBG_EXIT(err); - return (err); + mac[5] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[4] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[3] = (uint8_t)(0xFFU & l); + l >>= 8; + mac[2] = (uint8_t)(0xFFU & l); + mac[1] = (uint8_t)(0xFFU & h); + h >>= 8; + mac[0] = (uint8_t)(0xFFU & h); + + err = EOK; + } + + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_deinit(struct aq_hw *hw) +int +aq_hw_deinit(struct aq_hw *hw) { - AQ_DBG_ENTER(); - aq_hw_mpi_set(hw, MPI_DEINIT, 0); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTER(); + aq_hw_mpi_set(hw, MPI_DEINIT, 0); + AQ_DBG_EXIT(0); + return (0); } -int aq_hw_set_power(struct aq_hw *hw, unsigned int power_state) +int +aq_hw_set_power(struct aq_hw *hw, unsigned int power_state) { - AQ_DBG_ENTER(); - aq_hw_mpi_set(hw, MPI_POWER, 0); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTER(); + aq_hw_mpi_set(hw, MPI_POWER, 0); + AQ_DBG_EXIT(0); + return (0); } /* HW NIC functions */ -int aq_hw_reset(struct aq_hw *hw) +int +aq_hw_reset(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - err = aq_fw_reset(hw); - if (err < 0) - goto err_exit; + err = aq_fw_reset(hw); + if (err < 0) + goto err_exit; - itr_irq_reg_res_dis_set(hw, 0); - itr_res_irq_set(hw, 1); + itr_irq_reg_res_dis_set(hw, 0); + itr_res_irq_set(hw, 1); - /* check 10 times by 1ms */ - AQ_HW_WAIT_FOR(itr_res_irq_get(hw) == 0, 1000, 10); - if (err < 0) { - printf("atlantic: IRQ reset failed: %d", err); - goto err_exit; - } + /* check 10 times by 1ms */ + AQ_HW_WAIT_FOR(itr_res_irq_get(hw) == 0, 1000, 10); + if (err < 0) { + printf("atlantic: IRQ reset failed: %d", err); + goto err_exit; + } - if (hw->fw_ops && hw->fw_ops->reset) - hw->fw_ops->reset(hw); + if (hw->fw_ops && hw->fw_ops->reset) + hw->fw_ops->reset(hw); - err = aq_hw_err_from_flags(hw); + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_qos_set(struct aq_hw *hw) +static int +aq_hw_qos_set(struct aq_hw *hw) { - u32 tc = 0U; - u32 buff_size = 0U; - unsigned int i_priority = 0U; - int err = 0; - - AQ_DBG_ENTER(); - /* TPS Descriptor rate init */ - tps_tx_pkt_shed_desc_rate_curr_time_res_set(hw, 0x0U); - tps_tx_pkt_shed_desc_rate_lim_set(hw, 0xA); - - /* TPS VM init */ - tps_tx_pkt_shed_desc_vm_arb_mode_set(hw, 0U); - - /* TPS TC credits init */ - tps_tx_pkt_shed_desc_tc_arb_mode_set(hw, 0U); - tps_tx_pkt_shed_data_arb_mode_set(hw, 0U); - - tps_tx_pkt_shed_tc_data_max_credit_set(hw, 0xFFF, 0U); - tps_tx_pkt_shed_tc_data_weight_set(hw, 0x64, 0U); - tps_tx_pkt_shed_desc_tc_max_credit_set(hw, 0x50, 0U); - tps_tx_pkt_shed_desc_tc_weight_set(hw, 0x1E, 0U); - - /* Tx buf size */ - buff_size = AQ_HW_TXBUF_MAX; - - tpb_tx_pkt_buff_size_per_tc_set(hw, buff_size, tc); - tpb_tx_buff_hi_threshold_per_tc_set(hw, - (buff_size * (1024 / 32U) * 66U) / - 100U, tc); - tpb_tx_buff_lo_threshold_per_tc_set(hw, - (buff_size * (1024 / 32U) * 50U) / - 100U, tc); - - /* QoS Rx buf size per TC */ - tc = 0; - buff_size = AQ_HW_RXBUF_MAX; - - rpb_rx_pkt_buff_size_per_tc_set(hw, buff_size, tc); - rpb_rx_buff_hi_threshold_per_tc_set(hw, - (buff_size * - (1024U / 32U) * 66U) / - 100U, tc); - rpb_rx_buff_lo_threshold_per_tc_set(hw, - (buff_size * - (1024U / 32U) * 50U) / - 100U, tc); - - /* QoS 802.1p priority -> TC mapping */ - for (i_priority = 8U; i_priority--;) - rpf_rpb_user_priority_tc_map_set(hw, i_priority, 0U); - - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + uint32_t tc = 0U; + uint32_t buff_size = 0U; + unsigned int i_priority = 0U; + int err = 0; + + AQ_DBG_ENTER(); + /* TPS Descriptor rate init */ + tps_tx_pkt_shed_desc_rate_curr_time_res_set(hw, 0x0U); + tps_tx_pkt_shed_desc_rate_lim_set(hw, 0xA); + + /* TPS VM init */ + tps_tx_pkt_shed_desc_vm_arb_mode_set(hw, 0U); + + /* TPS TC credits init */ + tps_tx_pkt_shed_desc_tc_arb_mode_set(hw, 0U); + tps_tx_pkt_shed_data_arb_mode_set(hw, 0U); + + tps_tx_pkt_shed_tc_data_max_credit_set(hw, 0xFFF, 0U); + tps_tx_pkt_shed_tc_data_weight_set(hw, 0x64, 0U); + tps_tx_pkt_shed_desc_tc_max_credit_set(hw, 0x50, 0U); + tps_tx_pkt_shed_desc_tc_weight_set(hw, 0x1E, 0U); + + /* Tx buf size */ + buff_size = AQ_HW_TXBUF_MAX; + + tpb_tx_pkt_buff_size_per_tc_set(hw, buff_size, tc); + tpb_tx_buff_hi_threshold_per_tc_set(hw, + (buff_size * (1024 / 32U) * 66U) / 100U, tc); + tpb_tx_buff_lo_threshold_per_tc_set(hw, + (buff_size * (1024 / 32U) * 50U) / 100U, tc); + + /* QoS Rx buf size per TC */ + tc = 0; + buff_size = AQ_HW_RXBUF_MAX; + + rpb_rx_pkt_buff_size_per_tc_set(hw, buff_size, tc); + rpb_rx_buff_hi_threshold_per_tc_set(hw, + (buff_size * (1024U / 32U) * 66U) / 100U, tc); + rpb_rx_buff_lo_threshold_per_tc_set(hw, + (buff_size * (1024U / 32U) * 50U) / 100U, tc); + + /* QoS 802.1p priority -> TC mapping */ + for (i_priority = 8U; i_priority--;) + rpf_rpb_user_priority_tc_map_set(hw, i_priority, 0U); + + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_offload_set(struct aq_hw *hw) +static int +aq_hw_offload_set(struct aq_hw *hw) { - int err = 0; - - AQ_DBG_ENTER(); - /* TX checksums offloads*/ - tpo_ipv4header_crc_offload_en_set(hw, 1); - tpo_tcp_udp_crc_offload_en_set(hw, 1); - if (err < 0) - goto err_exit; - - /* RX checksums offloads*/ - rpo_ipv4header_crc_offload_en_set(hw, 1); - rpo_tcp_udp_crc_offload_en_set(hw, 1); - if (err < 0) - goto err_exit; - - /* LSO offloads*/ - tdm_large_send_offload_en_set(hw, 0xFFFFFFFFU); - if (err < 0) - goto err_exit; - -/* LRO offloads */ - { - u32 i = 0; - u32 val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U : - ((4U < HW_ATL_B0_LRO_RXD_MAX) ? 0x2U : - ((2U < HW_ATL_B0_LRO_RXD_MAX) ? 0x1U : 0x0)); + int err = 0; - for (i = 0; i < HW_ATL_B0_RINGS_MAX; i++) - rpo_lro_max_num_of_descriptors_set(hw, val, i); + AQ_DBG_ENTER(); + /* TX checksums offloads*/ + tpo_ipv4header_crc_offload_en_set(hw, 1); + tpo_tcp_udp_crc_offload_en_set(hw, 1); + if (err < 0) + goto err_exit; + + /* RX checksums offloads*/ + rpo_ipv4header_crc_offload_en_set(hw, 1); + rpo_tcp_udp_crc_offload_en_set(hw, 1); + if (err < 0) + goto err_exit; + + /* LSO offloads*/ + tdm_large_send_offload_en_set(hw, 0xFFFFFFFFU); + if (err < 0) + goto err_exit; - rpo_lro_time_base_divider_set(hw, 0x61AU); - rpo_lro_inactive_interval_set(hw, 0); - /* the LRO timebase divider is 5 uS (0x61a), - * to get a maximum coalescing interval of 250 uS, - * we need to multiply by 50(0x32) to get - * the default value 250 uS - */ - rpo_lro_max_coalescing_interval_set(hw, 50); +/* LRO offloads */ + { + uint32_t i = 0; + uint32_t val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U : + ((4U < HW_ATL_B0_LRO_RXD_MAX) ? 0x2U : + ((2U < HW_ATL_B0_LRO_RXD_MAX) ? 0x1U : 0x0)); + + for (i = 0; i < HW_ATL_B0_RINGS_MAX; i++) + rpo_lro_max_num_of_descriptors_set(hw, val, i); + + rpo_lro_time_base_divider_set(hw, 0x61AU); + rpo_lro_inactive_interval_set(hw, 0); + /* the LRO timebase divider is 5 uS (0x61a), + * to get a maximum coalescing interval of 250 uS, + * we need to multiply by 50(0x32) to get + * the default value 250 uS + */ + rpo_lro_max_coalescing_interval_set(hw, 50); - rpo_lro_qsessions_lim_set(hw, 1U); + rpo_lro_qsessions_lim_set(hw, 1U); - rpo_lro_total_desc_lim_set(hw, 2U); + rpo_lro_total_desc_lim_set(hw, 2U); - rpo_lro_patch_optimization_en_set(hw, 0U); + rpo_lro_patch_optimization_en_set(hw, 0U); - rpo_lro_min_pay_of_first_pkt_set(hw, 10U); + rpo_lro_min_pay_of_first_pkt_set(hw, 10U); - rpo_lro_pkt_lim_set(hw, 1U); + rpo_lro_pkt_lim_set(hw, 1U); - rpo_lro_en_set(hw, (hw->lro_enabled ? 0xFFFFFFFFU : 0U)); - } + rpo_lro_en_set(hw, (hw->lro_enabled ? 0xFFFFFFFFU : 0U)); + } - err = aq_hw_err_from_flags(hw); + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_init_tx_path(struct aq_hw *hw) +static int +aq_hw_init_tx_path(struct aq_hw *hw) { - int err = 0; + int err = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - /* Tx TC/RSS number config */ - tpb_tx_tc_mode_set(hw, 1U); + /* Tx TC/RSS number config */ + tpb_tx_tc_mode_set(hw, 1U); - thm_lso_tcp_flag_of_first_pkt_set(hw, 0x0FF6U); - thm_lso_tcp_flag_of_middle_pkt_set(hw, 0x0FF6U); - thm_lso_tcp_flag_of_last_pkt_set(hw, 0x0F7FU); + thm_lso_tcp_flag_of_first_pkt_set(hw, 0x0FF6U); + thm_lso_tcp_flag_of_middle_pkt_set(hw, 0x0FF6U); + thm_lso_tcp_flag_of_last_pkt_set(hw, 0x0F7FU); - /* Tx interrupts */ - tdm_tx_desc_wr_wb_irq_en_set(hw, 1U); + /* Tx interrupts */ + tdm_tx_desc_wr_wb_irq_en_set(hw, 1U); - /* misc */ - AQ_WRITE_REG(hw, 0x00007040U, 0x00010000U);//IS_CHIP_FEATURE(TPO2) ? 0x00010000U : 0x00000000U); - tdm_tx_dca_en_set(hw, 0U); - tdm_tx_dca_mode_set(hw, 0U); + /* misc */ + AQ_WRITE_REG(hw, 0x00007040U, 0x00010000U);//IS_CHIP_FEATURE(TPO2) ? 0x00010000U : 0x00000000U); + tdm_tx_dca_en_set(hw, 0U); + tdm_tx_dca_mode_set(hw, 0U); - tpb_tx_path_scp_ins_en_set(hw, 1U); + tpb_tx_path_scp_ins_en_set(hw, 1U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static int aq_hw_init_rx_path(struct aq_hw *hw) +static int +aq_hw_init_rx_path(struct aq_hw *hw) { - //struct aq_nic_cfg_s *cfg = hw->aq_nic_cfg; - unsigned int control_reg_val = 0U; - int i; - int err; + //struct aq_nic_cfg_s *cfg = hw->aq_nic_cfg; + unsigned int control_reg_val = 0U; + int i; + int err; - AQ_DBG_ENTER(); - /* Rx TC/RSS number config */ - rpb_rpf_rx_traf_class_mode_set(hw, 1U); + AQ_DBG_ENTER(); + /* Rx TC/RSS number config */ + rpb_rpf_rx_traf_class_mode_set(hw, 1U); - /* Rx flow control */ - rpb_rx_flow_ctl_mode_set(hw, 1U); + /* Rx flow control */ + rpb_rx_flow_ctl_mode_set(hw, 1U); - /* RSS Ring selection */ - reg_rx_flr_rss_control1set(hw, 0xB3333333U); + /* RSS Ring selection */ + reg_rx_flr_rss_control1set(hw, 0xB3333333U); - /* Multicast filters */ - for (i = AQ_HW_MAC_MAX; i--;) { - rpfl2_uc_flr_en_set(hw, (i == 0U) ? 1U : 0U, i); - rpfl2unicast_flr_act_set(hw, 1U, i); - } + /* Multicast filters */ + for (i = AQ_HW_MAC_MAX; i--;) { + rpfl2_uc_flr_en_set(hw, (i == 0U) ? 1U : 0U, i); + rpfl2unicast_flr_act_set(hw, 1U, i); + } - reg_rx_flr_mcst_flr_msk_set(hw, 0x00000000U); - reg_rx_flr_mcst_flr_set(hw, 0x00010FFFU, 0U); + reg_rx_flr_mcst_flr_msk_set(hw, 0x00000000U); + reg_rx_flr_mcst_flr_set(hw, 0x00010FFFU, 0U); - /* Vlan filters */ - rpf_vlan_outer_etht_set(hw, 0x88A8U); - rpf_vlan_inner_etht_set(hw, 0x8100U); + /* Vlan filters */ + rpf_vlan_outer_etht_set(hw, 0x88A8U); + rpf_vlan_inner_etht_set(hw, 0x8100U); rpf_vlan_accept_untagged_packets_set(hw, true); rpf_vlan_untagged_act_set(hw, HW_ATL_RX_HOST); - rpf_vlan_prom_mode_en_set(hw, 1); - - /* Rx Interrupts */ - rdm_rx_desc_wr_wb_irq_en_set(hw, 1U); + rpf_vlan_prom_mode_en_set(hw, 1); + + /* Rx Interrupts */ + rdm_rx_desc_wr_wb_irq_en_set(hw, 1U); - /* misc */ - control_reg_val = 0x000F0000U; //RPF2 + /* misc */ + control_reg_val = 0x000F0000U; //RPF2 - /* RSS hash type set for IP/TCP */ - control_reg_val |= 0x1EU; + /* RSS hash type set for IP/TCP */ + control_reg_val |= 0x1EU; - AQ_WRITE_REG(hw, 0x00005040U, control_reg_val); + AQ_WRITE_REG(hw, 0x00005040U, control_reg_val); - rpfl2broadcast_en_set(hw, 1U); - rpfl2broadcast_flr_act_set(hw, 1U); - rpfl2broadcast_count_threshold_set(hw, 0xFFFFU & (~0U / 256U)); + rpfl2broadcast_en_set(hw, 1U); + rpfl2broadcast_flr_act_set(hw, 1U); + rpfl2broadcast_count_threshold_set(hw, 0xFFFFU & (~0U / 256U)); - rdm_rx_dca_en_set(hw, 0U); - rdm_rx_dca_mode_set(hw, 0U); + rdm_rx_dca_en_set(hw, 0U); + rdm_rx_dca_mode_set(hw, 0U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_mac_addr_set(struct aq_hw *hw, u8 *mac_addr, u8 index) +int +aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index) { - int err = 0; - unsigned int h = 0U; - unsigned int l = 0U; - - AQ_DBG_ENTER(); - if (!mac_addr) { - err = -EINVAL; - goto err_exit; - } - h = (mac_addr[0] << 8) | (mac_addr[1]); - l = (mac_addr[2] << 24) | (mac_addr[3] << 16) | - (mac_addr[4] << 8) | mac_addr[5]; - - rpfl2_uc_flr_en_set(hw, 0U, index); - rpfl2unicast_dest_addresslsw_set(hw, l, index); - rpfl2unicast_dest_addressmsw_set(hw, h, index); - rpfl2_uc_flr_en_set(hw, 1U, index); - - err = aq_hw_err_from_flags(hw); + int err = 0; + unsigned int h = 0U; + unsigned int l = 0U; + + AQ_DBG_ENTER(); + if (!mac_addr) { + err = -EINVAL; + goto err_exit; + } + h = (mac_addr[0] << 8) | (mac_addr[1]); + l = (mac_addr[2] << 24) | (mac_addr[3] << 16) | (mac_addr[4] << 8) | + mac_addr[5]; + + rpfl2_uc_flr_en_set(hw, 0U, index); + rpfl2unicast_dest_addresslsw_set(hw, l, index); + rpfl2unicast_dest_addressmsw_set(hw, h, index); + rpfl2_uc_flr_en_set(hw, 1U, index); + + err = aq_hw_err_from_flags(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_init(struct aq_hw *hw, u8 *mac_addr, u8 adm_irq, bool msix) +int +aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix) { - int err = 0; - u32 val = 0; + int err = 0; + uint32_t val = 0; - AQ_DBG_ENTER(); + AQ_DBG_ENTER(); - /* Force limit MRRS on RDM/TDM to 2K */ - val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR); - AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR, (val & ~0x707) | 0x404); + /* Force limit MRRS on RDM/TDM to 2K */ + val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR); + AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR, (val & ~0x707) | 0x404); - /* TX DMA total request limit. B0 hardware is not capable to - * handle more than (8K-MRRS) incoming DMA data. - * Value 24 in 256byte units - */ - AQ_WRITE_REG(hw, AQ_HW_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24); + /* TX DMA total request limit. B0 hardware is not capable to + * handle more than (8K-MRRS) incoming DMA data. + * Value 24 in 256byte units + */ + AQ_WRITE_REG(hw, AQ_HW_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24); - aq_hw_init_tx_path(hw); - aq_hw_init_rx_path(hw); + aq_hw_init_tx_path(hw); + aq_hw_init_rx_path(hw); - aq_hw_mac_addr_set(hw, mac_addr, AQ_HW_MAC); + aq_hw_mac_addr_set(hw, mac_addr, AQ_HW_MAC); - aq_hw_mpi_set(hw, MPI_INIT, hw->link_rate); + aq_hw_mpi_set(hw, MPI_INIT, hw->link_rate); - aq_hw_qos_set(hw); + aq_hw_qos_set(hw); - err = aq_hw_err_from_flags(hw); - if (err < 0) - goto err_exit; + err = aq_hw_err_from_flags(hw); + if (err < 0) + goto err_exit; - /* Interrupts */ - //Enable interrupt - itr_irq_status_cor_en_set(hw, 0); //Disable clear-on-read for status - itr_irq_auto_mask_clr_en_set(hw, 1); // Enable auto-mask clear. + /* Interrupts */ + //Enable interrupt + itr_irq_status_cor_en_set(hw, 0); //Disable clear-on-read for status + itr_irq_auto_mask_clr_en_set(hw, 1); // Enable auto-mask clear. if (msix) itr_irq_mode_set(hw, 0x6); //MSIX + multi vector else itr_irq_mode_set(hw, 0x5); //MSI + multi vector - reg_gen_irq_map_set(hw, 0x80 | adm_irq, 3); + reg_gen_irq_map_set(hw, 0x80 | adm_irq, 3); - aq_hw_offload_set(hw); + aq_hw_offload_set(hw); err_exit: - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_start(struct aq_hw *hw) +int +aq_hw_start(struct aq_hw *hw) { - int err; - - AQ_DBG_ENTER(); - tpb_tx_buff_en_set(hw, 1U); - rpb_rx_buff_en_set(hw, 1U); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + int err; + + AQ_DBG_ENTER(); + tpb_tx_buff_en_set(hw, 1U); + rpb_rx_buff_en_set(hw, 1U); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_hw_interrupt_moderation_set(struct aq_hw *hw) +int +aq_hw_interrupt_moderation_set(struct aq_hw *hw) { - static unsigned int AQ_HW_NIC_timers_table_rx_[][2] = { - {80, 120},//{0x6U, 0x38U},/* 10Gbit */ - {0xCU, 0x70U},/* 5Gbit */ - {0xCU, 0x70U},/* 5Gbit 5GS */ - {0x18U, 0xE0U},/* 2.5Gbit */ - {0x30U, 0x80U},/* 1Gbit */ - {0x4U, 0x50U},/* 100Mbit */ - }; - static unsigned int AQ_HW_NIC_timers_table_tx_[][2] = { - {0x4fU, 0x1ff},//{0xffU, 0xffU}, /* 10Gbit */ - {0x4fU, 0xffU}, /* 5Gbit */ - {0x4fU, 0xffU}, /* 5Gbit 5GS */ - {0x4fU, 0xffU}, /* 2.5Gbit */ - {0x4fU, 0xffU}, /* 1Gbit */ - {0x4fU, 0xffU}, /* 100Mbit */ - }; - - u32 speed_index = 0U; //itr settings for 10 g - u32 itr_rx = 2U; - u32 itr_tx = 2U; - int custom_itr = hw->itr; - int active = custom_itr != 0; - int err; - - - AQ_DBG_ENTER(); - - if (custom_itr == -1) { - itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][0] << 0x8U; /* set min timer value */ - itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][1] << 0x10U; /* set max timer value */ - - itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][0] << 0x8U; /* set min timer value */ - itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][1] << 0x10U; /* set max timer value */ - }else{ - if (custom_itr > 0x1FF) - custom_itr = 0x1FF; - - itr_rx |= (custom_itr/2) << 0x8U; /* set min timer value */ - itr_rx |= custom_itr << 0x10U; /* set max timer value */ - - itr_tx |= (custom_itr/2) << 0x8U; /* set min timer value */ - itr_tx |= custom_itr << 0x10U; /* set max timer value */ - } - - tdm_tx_desc_wr_wb_irq_en_set(hw, !active); - tdm_tdm_intr_moder_en_set(hw, active); - rdm_rx_desc_wr_wb_irq_en_set(hw, !active); - rdm_rdm_intr_moder_en_set(hw, active); - - for (int i = HW_ATL_B0_RINGS_MAX; i--;) { - reg_tx_intr_moder_ctrl_set(hw, itr_tx, i); - reg_rx_intr_moder_ctrl_set(hw, itr_rx, i); - } - - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + static unsigned int AQ_HW_NIC_timers_table_rx_[][2] = { + {80, 120},//{0x6U, 0x38U},/* 10Gbit */ + {0xCU, 0x70U},/* 5Gbit */ + {0xCU, 0x70U},/* 5Gbit 5GS */ + {0x18U, 0xE0U},/* 2.5Gbit */ + {0x30U, 0x80U},/* 1Gbit */ + {0x4U, 0x50U},/* 100Mbit */ + }; + static unsigned int AQ_HW_NIC_timers_table_tx_[][2] = { + {0x4fU, 0x1ff},//{0xffU, 0xffU}, /* 10Gbit */ + {0x4fU, 0xffU}, /* 5Gbit */ + {0x4fU, 0xffU}, /* 5Gbit 5GS */ + {0x4fU, 0xffU}, /* 2.5Gbit */ + {0x4fU, 0xffU}, /* 1Gbit */ + {0x4fU, 0xffU}, /* 100Mbit */ + }; + + uint32_t speed_index = 0U; //itr settings for 10 g + uint32_t itr_rx = 2U; + uint32_t itr_tx = 2U; + int custom_itr = hw->itr; + int active = custom_itr != 0; + int err; + + + AQ_DBG_ENTER(); + + if (custom_itr == -1) { + /* set min timer value */ + itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][0] << 0x8U; + /* set max timer value */ + itr_rx |= AQ_HW_NIC_timers_table_rx_[speed_index][1] << 0x10U; + + /* set min timer value */ + itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][0] << 0x8U; + /* set max timer value */ + itr_tx |= AQ_HW_NIC_timers_table_tx_[speed_index][1] << 0x10U; + } else { + if (custom_itr > 0x1FF) + custom_itr = 0x1FF; + + itr_rx |= (custom_itr/2) << 0x8U; /* set min timer value */ + itr_rx |= custom_itr << 0x10U; /* set max timer value */ + + itr_tx |= (custom_itr/2) << 0x8U; /* set min timer value */ + itr_tx |= custom_itr << 0x10U; /* set max timer value */ + } + + tdm_tx_desc_wr_wb_irq_en_set(hw, !active); + tdm_tdm_intr_moder_en_set(hw, active); + rdm_rx_desc_wr_wb_irq_en_set(hw, !active); + rdm_rdm_intr_moder_en_set(hw, active); + + for (int i = HW_ATL_B0_RINGS_MAX; i--;) { + reg_tx_intr_moder_ctrl_set(hw, itr_tx, i); + reg_rx_intr_moder_ctrl_set(hw, itr_rx, i); + } + + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } /** @@ -754,8 +761,8 @@ int aq_hw_interrupt_moderation_set(struct aq_hw *hw) * @param aq_rx_filter_vlan VLAN filter configuration * @return 0 - OK, <0 - error */ -int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, - struct aq_rx_filter_vlan *aq_vlans) +int +hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, struct aq_rx_filter_vlan *aq_vlans) { int i; @@ -780,14 +787,16 @@ int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, return aq_hw_err_from_flags(self); } -int hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc) +int +hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc) { hw_atl_rpf_vlan_prom_mode_en_set(self, promisc); return aq_hw_err_from_flags(self); } -void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc) +void +aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc) { AQ_DBG_ENTERA("promisc %d, vlan_promisc %d, allmulti %d", l2_promisc, vlan_promisc, mc_promisc); @@ -801,11 +810,12 @@ void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, AQ_DBG_EXIT(0); } -int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]) +int +aq_hw_rss_hash_set(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]) { - u32 rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; - u32 addr = 0U; - u32 i = 0U; + uint32_t rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; + uint32_t addr = 0U; + uint32_t i = 0U; int err = 0; AQ_DBG_ENTER(); @@ -813,7 +823,7 @@ int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE] memcpy(rss_key_dw, rss_key, HW_ATL_RSS_HASHKEY_SIZE); for (i = 10, addr = 0U; i--; ++addr) { - u32 key_data = bswap32(rss_key_dw[i]); + uint32_t key_data = bswap32(rss_key_dw[i]); rpf_rss_key_wr_data_set(self, key_data); rpf_rss_key_addr_set(self, addr); rpf_rss_key_wr_en_set(self, 1U); @@ -830,11 +840,12 @@ err_exit: return (err); } -int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]) +int +aq_hw_rss_hash_get(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]) { - u32 rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; - u32 addr = 0U; - u32 i = 0U; + uint32_t rss_key_dw[HW_ATL_RSS_HASHKEY_SIZE / 4]; + uint32_t addr = 0U; + uint32_t i = 0U; int err = 0; AQ_DBG_ENTER(); @@ -851,17 +862,18 @@ int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE] return (err); } -int aq_hw_rss_set(struct aq_hw_s *self, u8 rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]) +int +aq_hw_rss_set(struct aq_hw_s *self, uint8_t rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]) { - u16 bitary[(HW_ATL_RSS_INDIRECTION_TABLE_MAX * + uint16_t bitary[(HW_ATL_RSS_INDIRECTION_TABLE_MAX * 3 / 16U)]; int err = 0; - u32 i = 0U; + uint32_t i = 0U; memset(bitary, 0, sizeof(bitary)); for (i = HW_ATL_RSS_INDIRECTION_TABLE_MAX; i--;) { - (*(u32 *)(bitary + ((i * 3U) / 16U))) |= + (*(uint32_t *)(bitary + ((i * 3U) / 16U))) |= ((rss_table[i]) << ((i * 3U) & 0xFU)); } @@ -881,10 +893,11 @@ err_exit: return (err); } -int aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable) +int +aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable) { int err = 0; - if(!enable) { + if (!enable) { /* HW bug workaround: * Disable RSS for UDP using rx flow filter 0. * HW does not track RSS stream for fragmenged UDP, diff --git a/sys/dev/aq/aq_hw.h b/sys/dev/aq/aq_hw.h index 86689fce832e..fb07f7c8b838 100644 --- a/sys/dev/aq/aq_hw.h +++ b/sys/dev/aq/aq_hw.h @@ -43,24 +43,25 @@ #include "aq_common.h" #define AQ_WRITE_REG(hw, reg, value) writel(((hw)->hw_addr + (reg)), htole32(value)) - + #define AQ_READ_REG(hw, reg) le32toh(readl((hw)->hw_addr + reg)) #define AQ_WRITE_REG_BIT(hw, reg, msk, shift, value) do { \ - if (msk ^ ~0) { \ - u32 reg_old, reg_new = 0U; \ - reg_old = AQ_READ_REG(hw, reg); \ - reg_new = (reg_old & (~msk)) | (value << shift); \ - if (reg_old != reg_new) \ - AQ_WRITE_REG(hw, reg, reg_new); \ - } else { \ - AQ_WRITE_REG(hw, reg, value); \ - } } while(0) + if (msk ^ ~0) { \ + uint32_t reg_old, reg_new = 0U; \ + reg_old = AQ_READ_REG(hw, reg); \ + reg_new = (reg_old & (~msk)) | (value << shift); \ + if (reg_old != reg_new) \ + AQ_WRITE_REG(hw, reg, reg_new); \ + } else { \ + AQ_WRITE_REG(hw, reg, value); \ + } \ +} while(0) #define AQ_READ_REG_BIT(a, reg, msk, shift) ( \ - ((AQ_READ_REG(a, reg) & msk) >> shift)) + ((AQ_READ_REG(a, reg) & msk) >> shift)) #define AQ_HW_FLUSH() { (void)AQ_READ_REG(hw, 0x10); } @@ -70,104 +71,104 @@ /* Statistics */ struct aq_hw_stats { - u64 crcerrs; + uint64_t crcerrs; }; struct aq_hw_stats_s { - u32 uprc; - u32 mprc; - u32 bprc; - u32 erpt; - u32 uptc; - u32 mptc; - u32 bptc; - u32 erpr; - u32 mbtc; - u32 bbtc; - u32 mbrc; - u32 bbrc; - u32 ubrc; - u32 ubtc; - u32 ptc; - u32 prc; - u32 dpc; - u32 cprc; + uint32_t uprc; + uint32_t mprc; + uint32_t bprc; + uint32_t erpt; + uint32_t uptc; + uint32_t mptc; + uint32_t bptc; + uint32_t erpr; + uint32_t mbtc; + uint32_t bbtc; + uint32_t mbrc; + uint32_t bbrc; + uint32_t ubrc; + uint32_t ubtc; + uint32_t ptc; + uint32_t prc; + uint32_t dpc; + uint32_t cprc; } __attribute__((__packed__)); union ip_addr { - struct { - u8 addr[16]; - } v6; - struct { - u8 padding[12]; - u8 addr[4]; - } v4; + struct { + uint8_t addr[16]; + } v6; + struct { + uint8_t padding[12]; + uint8_t addr[4]; + } v4; } __attribute__((__packed__)); struct aq_hw_fw_mbox { - u32 version; - u32 transaction_id; - int error; - struct aq_hw_stats_s stats; + uint32_t version; + uint32_t transaction_id; + int error; + struct aq_hw_stats_s stats; } __attribute__((__packed__)); typedef struct aq_hw_fw_version { - union { - struct { - u16 build_number; - u8 minor_version; - u8 major_version; - }; - u32 raw; - }; + union { + struct { + uint16_t build_number; + uint8_t minor_version; + uint8_t major_version; + }; + uint32_t raw; + }; } aq_hw_fw_version; enum aq_hw_irq_type { - aq_irq_invalid = 0, - aq_irq_legacy = 1, - aq_irq_msi = 2, - aq_irq_msix = 3, + aq_irq_invalid = 0, + aq_irq_legacy = 1, + aq_irq_msi = 2, + aq_irq_msix = 3, }; struct aq_hw_fc_info { - bool fc_rx; - bool fc_tx; + bool fc_rx; + bool fc_tx; }; struct aq_hw { - void *aq_dev; - u8 *hw_addr; - u32 regs_size; - - u8 mac_addr[ETHER_ADDR_LEN]; - - enum aq_hw_irq_type irq_type; - - struct aq_hw_fc_info fc; - u16 link_rate; - - u16 device_id; - u16 subsystem_vendor_id; - u16 subsystem_device_id; - u16 vendor_id; - u8 revision_id; - - /* Interrupt Moderation value. */ - int itr; - - /* Firmware-related stuff. */ - aq_hw_fw_version fw_version; - const struct aq_firmware_ops* fw_ops; - bool rbl_enabled; - bool fast_start_enabled; - bool flash_present; - u32 chip_features; - u64 fw_caps; + void *aq_dev; + uint8_t *hw_addr; + uint32_t regs_size; + + uint8_t mac_addr[ETHER_ADDR_LEN]; + + enum aq_hw_irq_type irq_type; + + struct aq_hw_fc_info fc; + uint16_t link_rate; + + uint16_t device_id; + uint16_t subsystem_vendor_id; + uint16_t subsystem_device_id; + uint16_t vendor_id; + uint8_t revision_id; + + /* Interrupt Moderation value. */ + int itr; + + /* Firmware-related stuff. */ + aq_hw_fw_version fw_version; + const struct aq_firmware_ops* fw_ops; + bool rbl_enabled; + bool fast_start_enabled; + bool flash_present; + uint32_t chip_features; + uint64_t fw_caps; bool lro_enabled; - u32 mbox_addr; - struct aq_hw_fw_mbox mbox; + uint32_t mbox_addr; + struct aq_hw_fw_mbox mbox; }; #define aq_hw_s aq_hw @@ -217,7 +218,7 @@ struct aq_hw { #define AQ_HW_CHIP_REVISION_B0 0x02000000U #define AQ_HW_CHIP_REVISION_B1 0x04000000U #define IS_CHIP_FEATURE(HW, _F_) (AQ_HW_CHIP_##_F_ & \ - (HW)->chip_features) + (HW)->chip_features) #define AQ_HW_FW_VER_EXPECTED 0x01050006U @@ -238,22 +239,22 @@ enum hw_atl_rx_action_with_traffic { }; struct aq_rx_filter_vlan { - u8 enable; - u8 location; - u16 vlan_id; - u8 queue; + uint8_t enable; + uint8_t location; + uint16_t vlan_id; + uint8_t queue; }; #define AQ_HW_VLAN_MAX_FILTERS 16U #define AQ_HW_ETYPE_MAX_FILTERS 16U struct aq_rx_filter_l2 { - u8 enable; - s8 queue; - u8 location; - u8 user_priority_en; - u8 user_priority; - u16 ethertype; + uint8_t enable; + int8_t queue; + uint8_t location; + uint8_t user_priority_en; + uint8_t user_priority; + uint16_t ethertype; }; enum hw_atl_rx_ctrl_registers_l2 { @@ -262,12 +263,12 @@ enum hw_atl_rx_ctrl_registers_l2 { }; struct aq_rx_filter_l3l4 { - u32 cmd; - u8 location; - u32 ip_dst[4]; - u32 ip_src[4]; - u16 p_dst; - u16 p_src; + uint32_t cmd; + uint8_t location; + uint32_t ip_dst[4]; + uint32_t ip_src[4]; + uint16_t p_dst; + uint16_t p_src; bool is_ipv6; }; @@ -301,22 +302,23 @@ enum hw_atl_rx_ctrl_registers_l3l4 { ((location) - AQ_RX_FIRST_LOC_FL3L4) enum aq_hw_fw_mpi_state_e { - MPI_DEINIT = 0, - MPI_RESET = 1, - MPI_INIT = 2, - MPI_POWER = 4, + MPI_DEINIT = 0, + MPI_RESET = 1, + MPI_INIT = 2, + MPI_POWER = 4, }; -int aq_hw_get_mac_permanent(struct aq_hw *hw, u8 *mac); +int aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac); -int aq_hw_mac_addr_set(struct aq_hw *hw, u8 *mac_addr, u8 index); +int aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index); /* link speed in mbps. "0" - no link detected */ -int aq_hw_get_link_state(struct aq_hw *hw, u32 *link_speed, struct aq_hw_fc_info *fc_neg); +int aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed, + struct aq_hw_fc_info *fc_neg); -int aq_hw_set_link_speed(struct aq_hw *hw, u32 speed); +int aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed); -int aq_hw_fw_downld_dwords(struct aq_hw *hw, u32 a, u32 *p, u32 cnt); +int aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt); int aq_hw_reset(struct aq_hw *hw); @@ -324,19 +326,21 @@ int aq_hw_mpi_create(struct aq_hw *hw); int aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_fw_mbox *pmbox); -int aq_hw_init(struct aq_hw *hw, u8 *mac_addr, u8 adm_irq, bool msix); +int aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix); int aq_hw_start(struct aq_hw *hw); int aq_hw_interrupt_moderation_set(struct aq_hw *hw); -int aq_hw_get_fw_version(struct aq_hw *hw, u32 *fw_version); +int aq_hw_get_fw_version(struct aq_hw *hw, uint32_t *fw_version); int aq_hw_deinit(struct aq_hw *hw); -int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, const aq_hw_fw_version* ver_actual); +int aq_hw_ver_match(const aq_hw_fw_version* ver_expected, + const aq_hw_fw_version* ver_actual); -void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, bool mc_promisc); +void aq_hw_set_promisc(struct aq_hw_s *self, bool l2_promisc, bool vlan_promisc, + bool mc_promisc); int aq_hw_set_power(struct aq_hw *hw, unsigned int power_state); @@ -345,11 +349,11 @@ int aq_hw_err_from_flags(struct aq_hw *hw); int hw_atl_b0_hw_vlan_promisc_set(struct aq_hw_s *self, bool promisc); int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, - struct aq_rx_filter_vlan *aq_vlans); + struct aq_rx_filter_vlan *aq_vlans); -int aq_hw_rss_hash_set(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]); -int aq_hw_rss_hash_get(struct aq_hw_s *self, u8 rss_key[HW_ATL_RSS_HASHKEY_SIZE]); -int aq_hw_rss_set(struct aq_hw_s *self, u8 rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]); +int aq_hw_rss_hash_set(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]); +int aq_hw_rss_hash_get(struct aq_hw_s *self, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]); +int aq_hw_rss_set(struct aq_hw_s *self, uint8_t rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]); int aq_hw_udp_rss_enable(struct aq_hw_s *self, bool enable); #endif //_AQ_HW_H_ diff --git a/sys/dev/aq/aq_hw_llh.c b/sys/dev/aq/aq_hw_llh.c index b5e91829c3be..87384ad46618 100644 --- a/sys/dev/aq/aq_hw_llh.c +++ b/sys/dev/aq/aq_hw_llh.c @@ -43,896 +43,956 @@ /* global */ -void reg_glb_fw_image_id1_set(struct aq_hw* hw, u32 value) +void +reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_fw_image_id1_adr, value); + AQ_WRITE_REG(hw, glb_fw_image_id1_adr, value); } -u32 reg_glb_fw_image_id1_get(struct aq_hw* hw) +uint32_t +reg_glb_fw_image_id1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_fw_image_id1_adr); + return AQ_READ_REG(hw, glb_fw_image_id1_adr); } -void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, u32 sem_value, u32 sem_index) +void +reg_glb_cpu_sem_set(struct aq_hw *aq_hw, uint32_t sem_value, uint32_t sem_index) { - AQ_WRITE_REG(aq_hw, glb_cpu_sem_adr(sem_index), sem_value); + AQ_WRITE_REG(aq_hw, glb_cpu_sem_adr(sem_index), sem_value); } -u32 reg_glb_cpu_sem_get(struct aq_hw *aq_hw, u32 sem_index) +uint32_t +reg_glb_cpu_sem_get(struct aq_hw *aq_hw, uint32_t sem_index) { - return AQ_READ_REG(aq_hw, glb_cpu_sem_adr(sem_index)); + return AQ_READ_REG(aq_hw, glb_cpu_sem_adr(sem_index)); } -u32 reg_glb_standard_ctl1_get(struct aq_hw* hw) +uint32_t +reg_glb_standard_ctl1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_standard_ctl1_adr); + return AQ_READ_REG(hw, glb_standard_ctl1_adr); } -void reg_glb_standard_ctl1_set(struct aq_hw* hw, u32 glb_standard_ctl1) +void +reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1) { - AQ_WRITE_REG(hw, glb_standard_ctl1_adr, glb_standard_ctl1); + AQ_WRITE_REG(hw, glb_standard_ctl1_adr, glb_standard_ctl1); } -void reg_global_ctl2_set(struct aq_hw* hw, u32 global_ctl2) +void +reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2) { - AQ_WRITE_REG(hw, glb_ctl2_adr, global_ctl2); + AQ_WRITE_REG(hw, glb_ctl2_adr, global_ctl2); } -u32 reg_global_ctl2_get(struct aq_hw* hw) +uint32_t +reg_global_ctl2_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_ctl2_adr); + return AQ_READ_REG(hw, glb_ctl2_adr); } -void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, u32 glb_daisy_chain_status1) +void +reg_glb_daisy_chain_status1_set(struct aq_hw* hw, uint32_t glb_daisy_chain_status1) { - AQ_WRITE_REG(hw, glb_daisy_chain_status1_adr, glb_daisy_chain_status1); + AQ_WRITE_REG(hw, glb_daisy_chain_status1_adr, glb_daisy_chain_status1); } -u32 reg_glb_daisy_chain_status1_get(struct aq_hw* hw) +uint32_t +reg_glb_daisy_chain_status1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_daisy_chain_status1_adr); + return AQ_READ_REG(hw, glb_daisy_chain_status1_adr); } -void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, u32 glb_reg_res_dis) +void +glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t glb_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, glb_reg_res_dis_adr, - glb_reg_res_dis_msk, - glb_reg_res_dis_shift, - glb_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, glb_reg_res_dis_adr, glb_reg_res_dis_msk, + glb_reg_res_dis_shift, glb_reg_res_dis); } -void glb_soft_res_set(struct aq_hw *aq_hw, u32 soft_res) +void +glb_soft_res_set(struct aq_hw *aq_hw, uint32_t soft_res) { - AQ_WRITE_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, - glb_soft_res_shift, soft_res); + AQ_WRITE_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, + glb_soft_res_shift, soft_res); } -u32 glb_soft_res_get(struct aq_hw *aq_hw) +uint32_t +glb_soft_res_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, glb_soft_res_adr, - glb_soft_res_msk, - glb_soft_res_shift); + return AQ_READ_REG_BIT(aq_hw, glb_soft_res_adr, glb_soft_res_msk, + glb_soft_res_shift); } -u32 reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw) +uint32_t +reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rx_dma_stat_counter7_adr); + return AQ_READ_REG(aq_hw, rx_dma_stat_counter7_adr); } -u32 reg_glb_mif_id_get(struct aq_hw *aq_hw) +uint32_t +reg_glb_mif_id_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, glb_mif_id_adr); + return AQ_READ_REG(aq_hw, glb_mif_id_adr); } -void mpi_tx_reg_res_dis_set(struct aq_hw* hw, u32 mpi_tx_reg_res_dis) +void +mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis) { - AQ_WRITE_REG_BIT(hw, mpi_tx_reg_res_dis_adr, - mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift, mpi_tx_reg_res_dis); + AQ_WRITE_REG_BIT(hw, mpi_tx_reg_res_dis_adr, mpi_tx_reg_res_dis_msk, + mpi_tx_reg_res_dis_shift, mpi_tx_reg_res_dis); } -u32 mpi_tx_reg_res_dis_get(struct aq_hw* hw) +uint32_t +mpi_tx_reg_res_dis_get(struct aq_hw* hw) { - return AQ_READ_REG_BIT(hw, mpi_tx_reg_res_dis_adr, - mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift); + return AQ_READ_REG_BIT(hw, mpi_tx_reg_res_dis_adr, + mpi_tx_reg_res_dis_msk, mpi_tx_reg_res_dis_shift); } /* stats */ -u32 rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw) +uint32_t +rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rpb_rx_dma_drop_pkt_cnt_adr); + return AQ_READ_REG(aq_hw, rpb_rx_dma_drop_pkt_cnt_adr); } -u32 stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_counterlsw__adr); } -u32 stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_counterlsw__adr); } -u32 stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_counterlsw__adr); } -u32 stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_counterlsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_counterlsw__adr); } -u32 stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_octet_countermsw__adr); } -u32 stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_rx_dma_good_pkt_countermsw__adr); } -u32 stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_octet_countermsw__adr); } -u32 stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) +uint32_t +stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_countermsw__adr); + return AQ_READ_REG(aq_hw, stats_tx_dma_good_pkt_countermsw__adr); } -u32 stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw) +uint32_t +stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, stats_rx_lo_coalesced_pkt_count0__addr); + return AQ_READ_REG(aq_hw, stats_rx_lo_coalesced_pkt_count0__addr); } /* interrupt */ -void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, u32 irq_auto_masklsw) +void +itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, uint32_t irq_auto_masklsw) { - AQ_WRITE_REG(aq_hw, itr_iamrlsw_adr, irq_auto_masklsw); + AQ_WRITE_REG(aq_hw, itr_iamrlsw_adr, irq_auto_masklsw); } -void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, u32 irq_map_en_rx, u32 rx) +void +itr_irq_map_en_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_rx, uint32_t rx) { /* register address for bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_rxren_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_msk[32] = { - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, - 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U - }; + static uint32_t itr_imr_rxren_msk[32] = { + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U, + 0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U + }; /* lower bit position of bitfield imr_rx{r}_en */ - static u32 itr_imr_rxren_shift[32] = { - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, - 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U - }; + static uint32_t itr_imr_rxren_shift[32] = { + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U, + 15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxren_adr[rx], - itr_imr_rxren_msk[rx], - itr_imr_rxren_shift[rx], - irq_map_en_rx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxren_adr[rx], itr_imr_rxren_msk[rx], + itr_imr_rxren_shift[rx], irq_map_en_rx); } -void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, u32 irq_map_en_tx, u32 tx) +void +itr_irq_map_en_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_tx, uint32_t tx) { /* register address for bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_txten_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_msk[32] = { - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, - 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U - }; + static uint32_t itr_imr_txten_msk[32] = { + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U, + 0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U + }; /* lower bit position of bitfield imr_tx{t}_en */ - static u32 itr_imr_txten_shift[32] = { - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, - 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U - }; + static uint32_t itr_imr_txten_shift[32] = { + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U, + 31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_txten_adr[tx], - itr_imr_txten_msk[tx], - itr_imr_txten_shift[tx], - irq_map_en_tx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_txten_adr[tx], itr_imr_txten_msk[tx], + itr_imr_txten_shift[tx], irq_map_en_tx); } -void itr_irq_map_rx_set(struct aq_hw *aq_hw, u32 irq_map_rx, u32 rx) +void +itr_irq_map_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_rx, uint32_t rx) { /* register address for bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_rxr_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_msk[32] = { - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, - 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU - }; + static uint32_t itr_imr_rxr_msk[32] = { + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU, + 0x00001f00U, 0x0000001fU, 0x00001f00U, 0x0000001fU + }; /* lower bit position of bitfield imr_rx{r}[4:0] */ - static u32 itr_imr_rxr_shift[32] = { - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, - 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U - }; + static uint32_t itr_imr_rxr_shift[32] = { + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, + 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxr_adr[rx], - itr_imr_rxr_msk[rx], - itr_imr_rxr_shift[rx], - irq_map_rx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_rxr_adr[rx], itr_imr_rxr_msk[rx], + itr_imr_rxr_shift[rx], irq_map_rx); } -void itr_irq_map_tx_set(struct aq_hw *aq_hw, u32 irq_map_tx, u32 tx) +void +itr_irq_map_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_tx, uint32_t tx) { /* register address for bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_adr[32] = { - 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, - 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, - 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, - 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, - 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, - 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, - 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, - 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU - }; + static uint32_t itr_imr_txt_adr[32] = { + 0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U, + 0x00002108U, 0x00002108U, 0x0000210cU, 0x0000210cU, + 0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U, + 0x00002118U, 0x00002118U, 0x0000211cU, 0x0000211cU, + 0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U, + 0x00002128U, 0x00002128U, 0x0000212cU, 0x0000212cU, + 0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U, + 0x00002138U, 0x00002138U, 0x0000213cU, 0x0000213cU + }; /* bitmask for bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_msk[32] = { - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, - 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U - }; + static uint32_t itr_imr_txt_msk[32] = { + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U, + 0x1f000000U, 0x001f0000U, 0x1f000000U, 0x001f0000U + }; /* lower bit position of bitfield imr_tx{t}[4:0] */ - static u32 itr_imr_txt_shift[32] = { - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, - 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U - }; + static uint32_t itr_imr_txt_shift[32] = { + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U, + 24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U + }; - AQ_WRITE_REG_BIT(aq_hw, itr_imr_txt_adr[tx], - itr_imr_txt_msk[tx], - itr_imr_txt_shift[tx], - irq_map_tx); + AQ_WRITE_REG_BIT(aq_hw, itr_imr_txt_adr[tx], itr_imr_txt_msk[tx], + itr_imr_txt_shift[tx], irq_map_tx); } -void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, u32 irq_msk_clearlsw) +void +itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_clearlsw) { - AQ_WRITE_REG(aq_hw, itr_imcrlsw_adr, irq_msk_clearlsw); + AQ_WRITE_REG(aq_hw, itr_imcrlsw_adr, irq_msk_clearlsw); } -void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, u32 irq_msk_setlsw) +void +itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_setlsw) { - AQ_WRITE_REG(aq_hw, itr_imsrlsw_adr, irq_msk_setlsw); + AQ_WRITE_REG(aq_hw, itr_imsrlsw_adr, irq_msk_setlsw); } -void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, u32 irq_reg_res_dis) +void +itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t irq_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, itr_reg_res_dsbl_adr, - itr_reg_res_dsbl_msk, - itr_reg_res_dsbl_shift, irq_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, itr_reg_res_dsbl_adr, itr_reg_res_dsbl_msk, + itr_reg_res_dsbl_shift, irq_reg_res_dis); } -void itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, - u32 irq_status_clearlsw) +void +itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_status_clearlsw) { - AQ_WRITE_REG(aq_hw, itr_iscrlsw_adr, irq_status_clearlsw); + AQ_WRITE_REG(aq_hw, itr_iscrlsw_adr, irq_status_clearlsw); } -u32 itr_irq_statuslsw_get(struct aq_hw *aq_hw) +uint32_t +itr_irq_statuslsw_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, itr_isrlsw_adr); + return AQ_READ_REG(aq_hw, itr_isrlsw_adr); } -u32 itr_res_irq_get(struct aq_hw *aq_hw) +uint32_t +itr_res_irq_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, - itr_res_shift); + return AQ_READ_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, itr_res_shift); } -void itr_res_irq_set(struct aq_hw *aq_hw, u32 res_irq) +void +itr_res_irq_set(struct aq_hw *aq_hw, uint32_t res_irq) { - AQ_WRITE_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, - itr_res_shift, res_irq); + AQ_WRITE_REG_BIT(aq_hw, itr_res_adr, itr_res_msk, itr_res_shift, + res_irq); } -void itr_link_int_map_en_set(struct aq_hw *aq_hw, u32 link_int_en_map_en) +void +itr_link_int_map_en_set(struct aq_hw *aq_hw, uint32_t link_int_en_map_en) { - AQ_WRITE_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, itrImrLinkEn_SHIFT, link_int_en_map_en); + AQ_WRITE_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, + itrImrLinkEn_SHIFT, link_int_en_map_en); } -u32 itr_link_int_map_en_get(struct aq_hw *aq_hw) +uint32_t +itr_link_int_map_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, itrImrLinkEn_SHIFT); + return AQ_READ_REG_BIT(aq_hw, itrImrLinkEn_ADR, itrImrLinkEn_MSK, + itrImrLinkEn_SHIFT); } -void itr_link_int_map_set(struct aq_hw *aq_hw, u32 link_int_map) +void +itr_link_int_map_set(struct aq_hw *aq_hw, uint32_t link_int_map) { - AQ_WRITE_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, itrImrLink_SHIFT, link_int_map); + AQ_WRITE_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, + itrImrLink_SHIFT, link_int_map); } -u32 itr_link_int_map_get(struct aq_hw *aq_hw) +uint32_t +itr_link_int_map_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, itrImrLink_SHIFT); + return AQ_READ_REG_BIT(aq_hw, itrImrLink_ADR, itrImrLink_MSK, + itrImrLink_SHIFT); } -void itr_mif_int_map_en_set(struct aq_hw *aq_hw, u32 mifInterruptMappingEnable, u32 mif) +void +itr_mif_int_map_en_set(struct aq_hw *aq_hw, uint32_t mifInterruptMappingEnable, + uint32_t mif) { - AQ_WRITE_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif), mifInterruptMappingEnable); + AQ_WRITE_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), + itrImrMifMEn_SHIFT(mif), mifInterruptMappingEnable); } -u32 itr_mif_int_map_en_get(struct aq_hw *aq_hw, u32 mif) +uint32_t +itr_mif_int_map_en_get(struct aq_hw *aq_hw, uint32_t mif) { - return AQ_READ_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif)); + return AQ_READ_REG_BIT(aq_hw, itrImrMifMEn_ADR(mif), + itrImrMifMEn_MSK(mif), itrImrMifMEn_SHIFT(mif)); } -void itr_mif_int_map_set(struct aq_hw *aq_hw, u32 mifInterruptMapping, u32 mif) +void +itr_mif_int_map_set(struct aq_hw *aq_hw, uint32_t mifInterruptMapping, uint32_t mif) { - AQ_WRITE_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), itrImrMifM_SHIFT(mif), mifInterruptMapping); + AQ_WRITE_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), + itrImrMifM_SHIFT(mif), mifInterruptMapping); } -u32 itr_mif_int_map_get(struct aq_hw *aq_hw, u32 mif) +uint32_t +itr_mif_int_map_get(struct aq_hw *aq_hw, uint32_t mif) { - return AQ_READ_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), itrImrMifM_SHIFT(mif)); -} + return AQ_READ_REG_BIT(aq_hw, itrImrMifM_ADR(mif), itrImrMifM_MSK(mif), + itrImrMifM_SHIFT(mif)); +} -void itr_irq_mode_set(struct aq_hw *aq_hw, u32 irq_mode) +void +itr_irq_mode_set(struct aq_hw *aq_hw, uint32_t irq_mode) { - AQ_WRITE_REG_BIT(aq_hw, itrIntMode_ADR, itrIntMode_MSK, itrIntMode_SHIFT, irq_mode); + AQ_WRITE_REG_BIT(aq_hw, itrIntMode_ADR, itrIntMode_MSK, + itrIntMode_SHIFT, irq_mode); } -void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, u32 irq_status_cor_en) +void +itr_irq_status_cor_en_set(struct aq_hw *aq_hw, uint32_t irq_status_cor_en) { - AQ_WRITE_REG_BIT(aq_hw, itrIsrCorEn_ADR, itrIsrCorEn_MSK, itrIsrCorEn_SHIFT, irq_status_cor_en); + AQ_WRITE_REG_BIT(aq_hw, itrIsrCorEn_ADR, itrIsrCorEn_MSK, + itrIsrCorEn_SHIFT, irq_status_cor_en); } -void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, u32 irq_auto_mask_clr_en) +void +itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, uint32_t irq_auto_mask_clr_en) { - AQ_WRITE_REG_BIT(aq_hw, itrIamrClrEn_ADR, itrIamrClrEn_MSK, itrIamrClrEn_SHIFT, irq_auto_mask_clr_en); + AQ_WRITE_REG_BIT(aq_hw, itrIamrClrEn_ADR, itrIamrClrEn_MSK, + itrIamrClrEn_SHIFT, irq_auto_mask_clr_en); } /* rdm */ -void rdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca) +void +rdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadcpuid_adr(dca), - rdm_dcadcpuid_msk, - rdm_dcadcpuid_shift, cpuid); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadcpuid_adr(dca), rdm_dcadcpuid_msk, + rdm_dcadcpuid_shift, cpuid); } -void rdm_rx_dca_en_set(struct aq_hw *aq_hw, u32 rx_dca_en) +void +rdm_rx_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_dca_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dca_en_adr, rdm_dca_en_msk, - rdm_dca_en_shift, rx_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dca_en_adr, rdm_dca_en_msk, + rdm_dca_en_shift, rx_dca_en); } -void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, u32 rx_dca_mode) +void +rdm_rx_dca_mode_set(struct aq_hw *aq_hw, uint32_t rx_dca_mode) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dca_mode_adr, rdm_dca_mode_msk, - rdm_dca_mode_shift, rx_dca_mode); + AQ_WRITE_REG_BIT(aq_hw, rdm_dca_mode_adr, rdm_dca_mode_msk, + rdm_dca_mode_shift, rx_dca_mode); } -void rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_data_buff_size, u32 descriptor) +void +rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, uint32_t rx_desc_data_buff_size, + uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descddata_size_adr(descriptor), - rdm_descddata_size_msk, - rdm_descddata_size_shift, - rx_desc_data_buff_size); + AQ_WRITE_REG_BIT(aq_hw, rdm_descddata_size_adr(descriptor), + rdm_descddata_size_msk, rdm_descddata_size_shift, + rx_desc_data_buff_size); } -void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, u32 rx_desc_dca_en, u32 dca) +void +rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcaddesc_en_adr(dca), - rdm_dcaddesc_en_msk, - rdm_dcaddesc_en_shift, - rx_desc_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcaddesc_en_adr(dca), rdm_dcaddesc_en_msk, + rdm_dcaddesc_en_shift, rx_desc_dca_en); } -void rdm_rx_desc_en_set(struct aq_hw *aq_hw, u32 rx_desc_en, u32 descriptor) +void +rdm_rx_desc_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_en, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descden_adr(descriptor), - rdm_descden_msk, - rdm_descden_shift, - rx_desc_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_descden_adr(descriptor), rdm_descden_msk, + rdm_descden_shift, rx_desc_en); } -void rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_head_buff_size, u32 descriptor) +void +rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, + uint32_t rx_desc_head_buff_size, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_size_adr(descriptor), - rdm_descdhdr_size_msk, - rdm_descdhdr_size_shift, - rx_desc_head_buff_size); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_size_adr(descriptor), + rdm_descdhdr_size_msk, rdm_descdhdr_size_shift, + rx_desc_head_buff_size); } -void rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, - u32 rx_desc_head_splitting, u32 descriptor) +void +rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, + uint32_t rx_desc_head_splitting, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_split_adr(descriptor), - rdm_descdhdr_split_msk, - rdm_descdhdr_split_shift, - rx_desc_head_splitting); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdhdr_split_adr(descriptor), + rdm_descdhdr_split_msk, rdm_descdhdr_split_shift, + rx_desc_head_splitting); } -u32 rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG_BIT(aq_hw, rdm_descdhd_adr(descriptor), - rdm_descdhd_msk, rdm_descdhd_shift); + return AQ_READ_REG_BIT(aq_hw, rdm_descdhd_adr(descriptor), + rdm_descdhd_msk, rdm_descdhd_shift); } -void rdm_rx_desc_len_set(struct aq_hw *aq_hw, u32 rx_desc_len, u32 descriptor) +void +rdm_rx_desc_len_set(struct aq_hw *aq_hw, uint32_t rx_desc_len, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdlen_adr(descriptor), - rdm_descdlen_msk, rdm_descdlen_shift, - rx_desc_len); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdlen_adr(descriptor), rdm_descdlen_msk, + rdm_descdlen_shift, rx_desc_len); } -void rdm_rx_desc_res_set(struct aq_hw *aq_hw, u32 rx_desc_res, u32 descriptor) +void +rdm_rx_desc_res_set(struct aq_hw *aq_hw, uint32_t rx_desc_res, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rdm_descdreset_adr(descriptor), - rdm_descdreset_msk, rdm_descdreset_shift, - rx_desc_res); + AQ_WRITE_REG_BIT(aq_hw, rdm_descdreset_adr(descriptor), + rdm_descdreset_msk, rdm_descdreset_shift, rx_desc_res); } -void rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 rx_desc_wr_wb_irq_en) +void +rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, + uint32_t rx_desc_wr_wb_irq_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_int_desc_wrb_en_adr, - rdm_int_desc_wrb_en_msk, - rdm_int_desc_wrb_en_shift, - rx_desc_wr_wb_irq_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_int_desc_wrb_en_adr, + rdm_int_desc_wrb_en_msk, rdm_int_desc_wrb_en_shift, + rx_desc_wr_wb_irq_en); } -void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, u32 rx_head_dca_en, u32 dca) +void +rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_head_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadhdr_en_adr(dca), - rdm_dcadhdr_en_msk, - rdm_dcadhdr_en_shift, - rx_head_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadhdr_en_adr(dca), rdm_dcadhdr_en_msk, + rdm_dcadhdr_en_shift, rx_head_dca_en); } -void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, u32 rx_pld_dca_en, u32 dca) +void +rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_pld_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, rdm_dcadpay_en_adr(dca), - rdm_dcadpay_en_msk, rdm_dcadpay_en_shift, - rx_pld_dca_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_dcadpay_en_adr(dca), rdm_dcadpay_en_msk, + rdm_dcadpay_en_shift, rx_pld_dca_en); } -void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, u32 rdm_intr_moder_en) +void +rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t rdm_intr_moder_en) { - AQ_WRITE_REG_BIT(aq_hw, rdm_int_rim_en_adr, - rdm_int_rim_en_msk, - rdm_int_rim_en_shift, - rdm_intr_moder_en); + AQ_WRITE_REG_BIT(aq_hw, rdm_int_rim_en_adr, rdm_int_rim_en_msk, + rdm_int_rim_en_shift, rdm_intr_moder_en); } /* reg */ -void reg_gen_irq_map_set(struct aq_hw *aq_hw, u32 gen_intr_map, u32 regidx) +void +reg_gen_irq_map_set(struct aq_hw *aq_hw, uint32_t gen_intr_map, uint32_t regidx) { - AQ_WRITE_REG(aq_hw, gen_intr_map_adr(regidx), gen_intr_map); + AQ_WRITE_REG(aq_hw, gen_intr_map_adr(regidx), gen_intr_map); } -u32 reg_gen_irq_status_get(struct aq_hw *aq_hw) +uint32_t +reg_gen_irq_status_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, gen_intr_stat_adr); + return AQ_READ_REG(aq_hw, gen_intr_stat_adr); } -void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, u32 intr_glb_ctl) +void +reg_irq_glb_ctl_set(struct aq_hw *aq_hw, uint32_t intr_glb_ctl) { - AQ_WRITE_REG(aq_hw, intr_glb_ctl_adr, intr_glb_ctl); + AQ_WRITE_REG(aq_hw, intr_glb_ctl_adr, intr_glb_ctl); } -void reg_irq_thr_set(struct aq_hw *aq_hw, u32 intr_thr, u32 throttle) +void +reg_irq_thr_set(struct aq_hw *aq_hw, uint32_t intr_thr, uint32_t throttle) { - AQ_WRITE_REG(aq_hw, intr_thr_adr(throttle), intr_thr); + AQ_WRITE_REG(aq_hw, intr_thr_adr(throttle), intr_thr); } -void reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrlsw, - u32 descriptor) +void +reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_base_addrlsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrlsw_adr(descriptor), - rx_dma_desc_base_addrlsw); + AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrlsw_adr(descriptor), + rx_dma_desc_base_addrlsw); } -void reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrmsw, - u32 descriptor) +void +reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_base_addrmsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrmsw_adr(descriptor), - rx_dma_desc_base_addrmsw); + AQ_WRITE_REG(aq_hw, rx_dma_desc_base_addrmsw_adr(descriptor), + rx_dma_desc_base_addrmsw); } -u32 reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, rx_dma_desc_stat_adr(descriptor)); + return AQ_READ_REG(aq_hw, rx_dma_desc_stat_adr(descriptor)); } -void reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 rx_dma_desc_tail_ptr, u32 descriptor) +void +reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, + uint32_t rx_dma_desc_tail_ptr, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor), - rx_dma_desc_tail_ptr); + AQ_WRITE_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor), + rx_dma_desc_tail_ptr); } -u32 reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor)); + return AQ_READ_REG(aq_hw, rx_dma_desc_tail_ptr_adr(descriptor)); } -void reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr_msk) +void +reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr_msk) { - AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_msk_adr, rx_flr_mcst_flr_msk); + AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_msk_adr, rx_flr_mcst_flr_msk); } -void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr, - u32 filter) +void +reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr, + uint32_t filter) { - AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_adr(filter), rx_flr_mcst_flr); + AQ_WRITE_REG(aq_hw, rx_flr_mcst_flr_adr(filter), rx_flr_mcst_flr); } -void reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, u32 rx_flr_rss_control1) +void +reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, uint32_t rx_flr_rss_control1) { - AQ_WRITE_REG(aq_hw, rx_flr_rss_control1_adr, rx_flr_rss_control1); + AQ_WRITE_REG(aq_hw, rx_flr_rss_control1_adr, rx_flr_rss_control1); } -void reg_rx_flr_control2_set(struct aq_hw *aq_hw, u32 rx_filter_control2) +void +reg_rx_flr_control2_set(struct aq_hw *aq_hw, uint32_t rx_filter_control2) { - AQ_WRITE_REG(aq_hw, rx_flr_control2_adr, rx_filter_control2); + AQ_WRITE_REG(aq_hw, rx_flr_control2_adr, rx_filter_control2); } -void reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 rx_intr_moderation_ctl, - u32 queue) +void +reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, + uint32_t rx_intr_moderation_ctl, uint32_t queue) { - AQ_WRITE_REG(aq_hw, rx_intr_moderation_ctl_adr(queue), - rx_intr_moderation_ctl); + AQ_WRITE_REG(aq_hw, rx_intr_moderation_ctl_adr(queue), + rx_intr_moderation_ctl); } -void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, u32 tx_dma_debug_ctl) +void +reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, uint32_t tx_dma_debug_ctl) { - AQ_WRITE_REG(aq_hw, tx_dma_debug_ctl_adr, tx_dma_debug_ctl); + AQ_WRITE_REG(aq_hw, tx_dma_debug_ctl_adr, tx_dma_debug_ctl); } -void reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrlsw, - u32 descriptor) +void +reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_base_addrlsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrlsw_adr(descriptor), - tx_dma_desc_base_addrlsw); + AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrlsw_adr(descriptor), + tx_dma_desc_base_addrlsw); } -void reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrmsw, - u32 descriptor) +void +reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_base_addrmsw, uint32_t descriptor) { - AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrmsw_adr(descriptor), - tx_dma_desc_base_addrmsw); + AQ_WRITE_REG(aq_hw, tx_dma_desc_base_addrmsw_adr(descriptor), + tx_dma_desc_base_addrmsw); } -void reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 tx_dma_desc_tail_ptr, u32 descriptor) +void +reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, + uint32_t tx_dma_desc_tail_ptr, uint32_t descriptor) { - //wmb(); + //wmb(); - AQ_WRITE_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor), - tx_dma_desc_tail_ptr); + AQ_WRITE_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor), + tx_dma_desc_tail_ptr); } -u32 reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor)); + return AQ_READ_REG(aq_hw, tx_dma_desc_tail_ptr_adr(descriptor)); } -void reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 tx_intr_moderation_ctl, - u32 queue) +void +reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, + uint32_t tx_intr_moderation_ctl, uint32_t queue) { - AQ_WRITE_REG(aq_hw, tx_intr_moderation_ctl_adr(queue), - tx_intr_moderation_ctl); + AQ_WRITE_REG(aq_hw, tx_intr_moderation_ctl_adr(queue), + tx_intr_moderation_ctl); } /* RPB: rx packet buffer */ -void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, u32 dma_sys_lbk) +void +rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, uint32_t dma_sys_lbk) { - AQ_WRITE_REG_BIT(aq_hw, rpb_dma_sys_lbk_adr, - rpb_dma_sys_lbk_msk, - rpb_dma_sys_lbk_shift, dma_sys_lbk); + AQ_WRITE_REG_BIT(aq_hw, rpb_dma_sys_lbk_adr, rpb_dma_sys_lbk_msk, + rpb_dma_sys_lbk_shift, dma_sys_lbk); } -void rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, - u32 rx_traf_class_mode) +void +rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, + uint32_t rx_traf_class_mode) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rpf_rx_tc_mode_adr, - rpb_rpf_rx_tc_mode_msk, - rpb_rpf_rx_tc_mode_shift, - rx_traf_class_mode); + AQ_WRITE_REG_BIT(aq_hw, rpb_rpf_rx_tc_mode_adr, rpb_rpf_rx_tc_mode_msk, + rpb_rpf_rx_tc_mode_shift, rx_traf_class_mode); } -void rpb_rx_buff_en_set(struct aq_hw *aq_hw, u32 rx_buff_en) +void +rpb_rx_buff_en_set(struct aq_hw *aq_hw, uint32_t rx_buff_en) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rx_buf_en_adr, rpb_rx_buf_en_msk, - rpb_rx_buf_en_shift, rx_buff_en); + AQ_WRITE_REG_BIT(aq_hw, rpb_rx_buf_en_adr, rpb_rx_buf_en_msk, + rpb_rx_buf_en_shift, rx_buff_en); } -void rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_hi_threshold_per_tc, - u32 buffer) +void +rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_buff_hi_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbhi_thresh_adr(buffer), - rpb_rxbhi_thresh_msk, rpb_rxbhi_thresh_shift, - rx_buff_hi_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbhi_thresh_adr(buffer), + rpb_rxbhi_thresh_msk, rpb_rxbhi_thresh_shift, + rx_buff_hi_threshold_per_tc); } -void rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_lo_threshold_per_tc, - u32 buffer) +void +rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_buff_lo_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxblo_thresh_adr(buffer), - rpb_rxblo_thresh_msk, - rpb_rxblo_thresh_shift, - rx_buff_lo_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxblo_thresh_adr(buffer), + rpb_rxblo_thresh_msk, rpb_rxblo_thresh_shift, + rx_buff_lo_threshold_per_tc); } -void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, u32 rx_flow_ctl_mode) +void +rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, uint32_t rx_flow_ctl_mode) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rx_fc_mode_adr, - rpb_rx_fc_mode_msk, - rpb_rx_fc_mode_shift, rx_flow_ctl_mode); + AQ_WRITE_REG_BIT(aq_hw, rpb_rx_fc_mode_adr, rpb_rx_fc_mode_msk, + rpb_rx_fc_mode_shift, rx_flow_ctl_mode); } -void rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 rx_pkt_buff_size_per_tc, u32 buffer) +void +rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, + uint32_t rx_pkt_buff_size_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbbuf_size_adr(buffer), - rpb_rxbbuf_size_msk, rpb_rxbbuf_size_shift, - rx_pkt_buff_size_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbbuf_size_adr(buffer), + rpb_rxbbuf_size_msk, rpb_rxbbuf_size_shift, + rx_pkt_buff_size_per_tc); } -void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, u32 rx_xoff_en_per_tc, - u32 buffer) +void +rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, uint32_t rx_xoff_en_per_tc, + uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, rpb_rxbxoff_en_adr(buffer), - rpb_rxbxoff_en_msk, rpb_rxbxoff_en_shift, - rx_xoff_en_per_tc); + AQ_WRITE_REG_BIT(aq_hw, rpb_rxbxoff_en_adr(buffer), + rpb_rxbxoff_en_msk, rpb_rxbxoff_en_shift, rx_xoff_en_per_tc); } /* rpf */ -void rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, - u32 l2broadcast_count_threshold) +void +rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, + uint32_t l2broadcast_count_threshold) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_thresh_adr, - rpfl2bc_thresh_msk, - rpfl2bc_thresh_shift, - l2broadcast_count_threshold); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_thresh_adr, rpfl2bc_thresh_msk, + rpfl2bc_thresh_shift, l2broadcast_count_threshold); } -void rpfl2broadcast_en_set(struct aq_hw *aq_hw, u32 l2broadcast_en) +void +rpfl2broadcast_en_set(struct aq_hw *aq_hw, uint32_t l2broadcast_en) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_en_adr, rpfl2bc_en_msk, - rpfl2bc_en_shift, l2broadcast_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_en_adr, rpfl2bc_en_msk, + rpfl2bc_en_shift, l2broadcast_en); } -void rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, u32 l2broadcast_flr_act) +void +rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2broadcast_flr_act) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_act_adr, rpfl2bc_act_msk, - rpfl2bc_act_shift, l2broadcast_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpfl2bc_act_adr, rpfl2bc_act_msk, + rpfl2bc_act_shift, l2broadcast_flr_act); } -void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, u32 l2multicast_flr_en, - u32 filter) +void +rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, uint32_t l2multicast_flr_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_enf_adr(filter), - rpfl2mc_enf_msk, - rpfl2mc_enf_shift, l2multicast_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_enf_adr(filter), rpfl2mc_enf_msk, + rpfl2mc_enf_shift, l2multicast_flr_en); } -void rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, - u32 l2promiscuous_mode_en) +void +rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, + uint32_t l2promiscuous_mode_en) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2promis_mode_adr, - rpfl2promis_mode_msk, - rpfl2promis_mode_shift, - l2promiscuous_mode_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2promis_mode_adr, rpfl2promis_mode_msk, + rpfl2promis_mode_shift, l2promiscuous_mode_en); } -void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, u32 l2unicast_flr_act, - u32 filter) +void +rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_act, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_actf_adr(filter), - rpfl2uc_actf_msk, rpfl2uc_actf_shift, - l2unicast_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_actf_adr(filter), rpfl2uc_actf_msk, + rpfl2uc_actf_shift, l2unicast_flr_act); } -void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, u32 l2unicast_flr_en, - u32 filter) +void +rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_enf_adr(filter), - rpfl2uc_enf_msk, - rpfl2uc_enf_shift, l2unicast_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_enf_adr(filter), rpfl2uc_enf_msk, + rpfl2uc_enf_shift, l2unicast_flr_en); } -void rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addresslsw, - u32 filter) +void +rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, + uint32_t l2unicast_dest_addresslsw, uint32_t filter) { - AQ_WRITE_REG(aq_hw, rpfl2uc_daflsw_adr(filter), - l2unicast_dest_addresslsw); + AQ_WRITE_REG(aq_hw, rpfl2uc_daflsw_adr(filter), + l2unicast_dest_addresslsw); } -void rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addressmsw, - u32 filter) +void +rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, + uint32_t l2unicast_dest_addressmsw, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_dafmsw_adr(filter), - rpfl2uc_dafmsw_msk, rpfl2uc_dafmsw_shift, - l2unicast_dest_addressmsw); + AQ_WRITE_REG_BIT(aq_hw, rpfl2uc_dafmsw_adr(filter), rpfl2uc_dafmsw_msk, + rpfl2uc_dafmsw_shift, l2unicast_dest_addressmsw); } -void rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, - u32 l2_accept_all_mc_packets) +void +rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, + uint32_t l2_accept_all_mc_packets) { - AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_accept_all_adr, - rpfl2mc_accept_all_msk, - rpfl2mc_accept_all_shift, - l2_accept_all_mc_packets); + AQ_WRITE_REG_BIT(aq_hw, rpfl2mc_accept_all_adr, rpfl2mc_accept_all_msk, + rpfl2mc_accept_all_shift, l2_accept_all_mc_packets); } -void rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, - u32 user_priority_tc_map, u32 tc) +void +rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, + uint32_t user_priority_tc_map, uint32_t tc) { /* register address for bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_adr[8] = { - 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U, - 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U - }; + static uint32_t rpf_rpb_rx_tc_upt_adr[8] = { + 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U, + 0x000054c4U, 0x000054c4U, 0x000054c4U, 0x000054c4U + }; /* bitmask for bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_msk[8] = { - 0x00000007U, 0x00000070U, 0x00000700U, 0x00007000U, - 0x00070000U, 0x00700000U, 0x07000000U, 0x70000000U - }; + static uint32_t rpf_rpb_rx_tc_upt_msk[8] = { + 0x00000007U, 0x00000070U, 0x00000700U, 0x00007000U, + 0x00070000U, 0x00700000U, 0x07000000U, 0x70000000U + }; /* lower bit position of bitfield rx_tc_up{t}[2:0] */ - static u32 rpf_rpb_rx_tc_upt_shft[8] = { - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U - }; + static uint32_t rpf_rpb_rx_tc_upt_shft[8] = { + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U + }; - AQ_WRITE_REG_BIT(aq_hw, rpf_rpb_rx_tc_upt_adr[tc], - rpf_rpb_rx_tc_upt_msk[tc], - rpf_rpb_rx_tc_upt_shft[tc], - user_priority_tc_map); + AQ_WRITE_REG_BIT(aq_hw, rpf_rpb_rx_tc_upt_adr[tc], + rpf_rpb_rx_tc_upt_msk[tc], rpf_rpb_rx_tc_upt_shft[tc], + user_priority_tc_map); } -void rpf_rss_key_addr_set(struct aq_hw *aq_hw, u32 rss_key_addr) +void +rpf_rss_key_addr_set(struct aq_hw *aq_hw, uint32_t rss_key_addr) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_addr_adr, - rpf_rss_key_addr_msk, - rpf_rss_key_addr_shift, - rss_key_addr); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_addr_adr, rpf_rss_key_addr_msk, + rpf_rss_key_addr_shift, rss_key_addr); } -void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, u32 rss_key_wr_data) +void +rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_data) { - AQ_WRITE_REG(aq_hw, rpf_rss_key_wr_data_adr, - rss_key_wr_data); + AQ_WRITE_REG(aq_hw, rpf_rss_key_wr_data_adr, rss_key_wr_data); } -u32 rpf_rss_key_rd_data_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_key_rd_data_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, rpf_rss_key_rd_data_adr); + return AQ_READ_REG(aq_hw, rpf_rss_key_rd_data_adr); } -u32 rpf_rss_key_wr_en_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_key_wr_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, - rpf_rss_key_wr_eni_msk, - rpf_rss_key_wr_eni_shift); + return AQ_READ_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, + rpf_rss_key_wr_eni_msk, rpf_rss_key_wr_eni_shift); } -void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, u32 rss_key_wr_en) +void +rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, - rpf_rss_key_wr_eni_msk, - rpf_rss_key_wr_eni_shift, - rss_key_wr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_key_wr_eni_adr, + rpf_rss_key_wr_eni_msk, rpf_rss_key_wr_eni_shift, + rss_key_wr_en); } -void rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, u32 rss_redir_tbl_addr) +void +rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, uint32_t rss_redir_tbl_addr) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_addr_adr, - rpf_rss_redir_addr_msk, - rpf_rss_redir_addr_shift, rss_redir_tbl_addr); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_addr_adr, rpf_rss_redir_addr_msk, + rpf_rss_redir_addr_shift, rss_redir_tbl_addr); } -void rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_wr_data) +void +rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_redir_tbl_wr_data) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_data_adr, - rpf_rss_redir_wr_data_msk, - rpf_rss_redir_wr_data_shift, - rss_redir_tbl_wr_data); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_data_adr, + rpf_rss_redir_wr_data_msk, rpf_rss_redir_wr_data_shift, + rss_redir_tbl_wr_data); } -u32 rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw) +uint32_t +rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, - rpf_rss_redir_wr_eni_msk, - rpf_rss_redir_wr_eni_shift); + return AQ_READ_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, + rpf_rss_redir_wr_eni_msk, rpf_rss_redir_wr_eni_shift); } -void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, u32 rss_redir_wr_en) +void +rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_redir_wr_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, - rpf_rss_redir_wr_eni_msk, - rpf_rss_redir_wr_eni_shift, rss_redir_wr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_rss_redir_wr_eni_adr, + rpf_rss_redir_wr_eni_msk, rpf_rss_redir_wr_eni_shift, + rss_redir_wr_en); } -void rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, u32 tpo_to_rpf_sys_lbk) +void +rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, uint32_t tpo_to_rpf_sys_lbk) { - AQ_WRITE_REG_BIT(aq_hw, rpf_tpo_rpf_sys_lbk_adr, - rpf_tpo_rpf_sys_lbk_msk, - rpf_tpo_rpf_sys_lbk_shift, - tpo_to_rpf_sys_lbk); + AQ_WRITE_REG_BIT(aq_hw, rpf_tpo_rpf_sys_lbk_adr, + rpf_tpo_rpf_sys_lbk_msk, rpf_tpo_rpf_sys_lbk_shift, + tpo_to_rpf_sys_lbk); } -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht) +void +hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, uint32_t vlan_inner_etht) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_INNER_TPID_ADR, HW_ATL_RPF_VL_INNER_TPID_MSK, @@ -940,7 +1000,8 @@ void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht) vlan_inner_etht); } -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht) +void +hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, uint32_t vlan_outer_etht) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_OUTER_TPID_ADR, HW_ATL_RPF_VL_OUTER_TPID_MSK, @@ -948,8 +1009,8 @@ void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht) vlan_outer_etht); } -void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, - u32 vlan_prom_mode_en) +void +hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, uint32_t vlan_prom_mode_en) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR, HW_ATL_RPF_VL_PROMIS_MODE_MSK, @@ -957,8 +1018,9 @@ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw, vlan_prom_mode_en); } -void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, - u32 vlan_acc_untagged_packets) +void +hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, + uint32_t vlan_acc_untagged_packets) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSK, @@ -966,8 +1028,8 @@ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw, vlan_acc_untagged_packets); } -void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, - u32 vlan_untagged_act) +void +hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, uint32_t vlan_untagged_act) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_UNTAGGED_ACT_ADR, HW_ATL_RPF_VL_UNTAGGED_ACT_MSK, @@ -975,8 +1037,8 @@ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw, vlan_untagged_act); } -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en, - u32 filter) +void +hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, uint32_t vlan_flr_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_EN_F_ADR(filter), HW_ATL_RPF_VL_EN_F_MSK, @@ -984,8 +1046,8 @@ void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en, vlan_flr_en); } -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_flr_act, - u32 filter) +void +hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, uint32_t vlan_flr_act, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACT_F_ADR(filter), HW_ATL_RPF_VL_ACT_F_MSK, @@ -993,8 +1055,8 @@ void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_flr_act, vlan_flr_act); } -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr, - u32 filter) +void +hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_id_flr, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ID_F_ADR(filter), HW_ATL_RPF_VL_ID_F_MSK, @@ -1002,8 +1064,9 @@ void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr, vlan_id_flr); } -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en, - u32 filter) +void +hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter), HW_ATL_RPF_VL_RXQ_EN_F_MSK, @@ -1011,8 +1074,8 @@ void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en, vlan_rxq_en); } -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq, - u32 filter) +void +hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, uint32_t vlan_rxq, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_F_ADR(filter), HW_ATL_RPF_VL_RXQ_F_MSK, @@ -1020,25 +1083,26 @@ void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq, vlan_rxq); }; -void hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, u32 etht_flr_en, - u32 filter) +void +hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, uint32_t etht_flr_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ENF_ADR(filter), HW_ATL_RPF_ET_ENF_MSK, HW_ATL_RPF_ET_ENF_SHIFT, etht_flr_en); } -void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw, - u32 etht_user_priority_en, u32 filter) +void +hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw, + uint32_t etht_user_priority_en, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPFEN_ADR(filter), HW_ATL_RPF_ET_UPFEN_MSK, HW_ATL_RPF_ET_UPFEN_SHIFT, etht_user_priority_en); } -void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, - u32 etht_rx_queue_en, - u32 filter) +void +hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQFEN_ADR(filter), HW_ATL_RPF_ET_RXQFEN_MSK, @@ -1046,25 +1110,27 @@ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw, etht_rx_queue_en); } -void hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw, - u32 etht_user_priority, - u32 filter) +void +hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw, uint32_t etht_user_priority, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPF_ADR(filter), HW_ATL_RPF_ET_UPF_MSK, HW_ATL_RPF_ET_UPF_SHIFT, etht_user_priority); } -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, u32 etht_rx_queue, - u32 filter) +void +hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, uint32_t etht_rx_queue, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQF_ADR(filter), HW_ATL_RPF_ET_RXQF_MSK, HW_ATL_RPF_ET_RXQF_SHIFT, etht_rx_queue); } -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue, - u32 filter) +void +hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_MNG_RXQF_ADR(filter), HW_ATL_RPF_ET_MNG_RXQF_MSK, @@ -1072,915 +1138,925 @@ void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue, etht_mgt_queue); } -void hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, u32 etht_flr_act, - u32 filter) +void +hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, uint32_t etht_flr_act, + uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ACTF_ADR(filter), HW_ATL_RPF_ET_ACTF_MSK, HW_ATL_RPF_ET_ACTF_SHIFT, etht_flr_act); } -void hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, u32 etht_flr, u32 filter) +void +hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, uint32_t etht_flr, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_VALF_ADR(filter), HW_ATL_RPF_ET_VALF_MSK, HW_ATL_RPF_ET_VALF_SHIFT, etht_flr); } -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ENF_ADR(filter), HW_ATL_RPF_L3_L4_ENF_MSK, HW_ATL_RPF_L3_L4_ENF_SHIFT, val); } -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_v6_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_V6_ENF_ADR(filter), HW_ATL_RPF_L3_V6_ENF_MSK, HW_ATL_RPF_L3_V6_ENF_SHIFT, val); } -void hw_atl_rpf_l3_saf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_saf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_SAF_EN_ADR(filter), HW_ATL_RPF_L3_SAF_EN_MSK, HW_ATL_RPF_L3_SAF_EN_SHIFT, val); } -void hw_atl_rpf_l3_daf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_daf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_DAF_EN_ADR(filter), HW_ATL_RPF_L3_DAF_EN_MSK, HW_ATL_RPF_L3_DAF_EN_SHIFT, val); } -void hw_atl_rpf_l4_spf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_spf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPF_EN_ADR(filter), HW_ATL_RPF_L4_SPF_EN_MSK, HW_ATL_RPF_L4_SPF_EN_SHIFT, val); } -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_dpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPF_EN_ADR(filter), HW_ATL_RPF_L4_DPF_EN_MSK, HW_ATL_RPF_L4_DPF_EN_SHIFT, val); } -void hw_atl_rpf_l4_protf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_protf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_EN_ADR(filter), HW_ATL_RPF_L4_PROTF_EN_MSK, HW_ATL_RPF_L4_PROTF_EN_SHIFT, val); } -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_arpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_ARPF_EN_ADR(filter), HW_ATL_RPF_L3_ARPF_EN_MSK, HW_ATL_RPF_L3_ARPF_EN_SHIFT, val); } -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_EN_ADR(filter), HW_ATL_RPF_L3_L4_RXQF_EN_MSK, HW_ATL_RPF_L3_L4_RXQF_EN_SHIFT, val); } -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_MNG_RXQF_ADR(filter), HW_ATL_RPF_L3_L4_MNG_RXQF_MSK, HW_ATL_RPF_L3_L4_MNG_RXQF_SHIFT, val); } -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_actf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ACTF_ADR(filter), HW_ATL_RPF_L3_L4_ACTF_MSK, HW_ATL_RPF_L3_L4_ACTF_SHIFT, val); } -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_ADR(filter), HW_ATL_RPF_L3_L4_RXQF_MSK, HW_ATL_RPF_L3_L4_RXQF_SHIFT, val); } -void hw_atl_rpf_l4_protf_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_protf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_ADR(filter), HW_ATL_RPF_L4_PROTF_MSK, HW_ATL_RPF_L4_PROTF_SHIFT, val); } -void hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPD_ADR(filter), HW_ATL_RPF_L4_SPD_MSK, HW_ATL_RPF_L4_SPD_SHIFT, val); } -void hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter) +void +hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter) { aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPD_ADR(filter), HW_ATL_RPF_L4_DPD_MSK, HW_ATL_RPF_L4_DPD_SHIFT, val); } -void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht) +void +rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, uint32_t vlan_inner_etht) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_inner_tpid_adr, - rpf_vl_inner_tpid_msk, - rpf_vl_inner_tpid_shift, - vlan_inner_etht); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_inner_tpid_adr, rpf_vl_inner_tpid_msk, + rpf_vl_inner_tpid_shift, vlan_inner_etht); } -void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht) +void +rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, uint32_t vlan_outer_etht) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_outer_tpid_adr, - rpf_vl_outer_tpid_msk, - rpf_vl_outer_tpid_shift, - vlan_outer_etht); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_outer_tpid_adr, rpf_vl_outer_tpid_msk, + rpf_vl_outer_tpid_shift, vlan_outer_etht); } -void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, u32 vlan_prom_mode_en) +void +rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, uint32_t vlan_prom_mode_en) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_promis_mode_adr, - rpf_vl_promis_mode_msk, - rpf_vl_promis_mode_shift, - vlan_prom_mode_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_promis_mode_adr, rpf_vl_promis_mode_msk, + rpf_vl_promis_mode_shift, vlan_prom_mode_en); } -void rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_accept_untagged_packets) +void +rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, + uint32_t vlan_accept_untagged_packets) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_accept_untagged_mode_adr, - rpf_vl_accept_untagged_mode_msk, - rpf_vl_accept_untagged_mode_shift, - vlan_accept_untagged_packets); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_accept_untagged_mode_adr, + rpf_vl_accept_untagged_mode_msk, rpf_vl_accept_untagged_mode_shift, + vlan_accept_untagged_packets); } -void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, u32 vlan_untagged_act) +void +rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, uint32_t vlan_untagged_act) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_untagged_act_adr, - rpf_vl_untagged_act_msk, - rpf_vl_untagged_act_shift, - vlan_untagged_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_untagged_act_adr, + rpf_vl_untagged_act_msk, rpf_vl_untagged_act_shift, + vlan_untagged_act); } -void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, u32 filter) +void +rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_en_f_adr(filter), - rpf_vl_en_f_msk, - rpf_vl_en_f_shift, - vlan_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_en_f_adr(filter), rpf_vl_en_f_msk, + rpf_vl_en_f_shift, vlan_flr_en); } -void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_flr_act, u32 filter) +void +rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_flr_act, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_act_f_adr(filter), - rpf_vl_act_f_msk, - rpf_vl_act_f_shift, - vlan_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_act_f_adr(filter), rpf_vl_act_f_msk, + rpf_vl_act_f_shift, vlan_flr_act); } -void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, u32 filter) +void +rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_vl_id_f_adr(filter), - rpf_vl_id_f_msk, - rpf_vl_id_f_shift, - vlan_id_flr); + AQ_WRITE_REG_BIT(aq_hw, rpf_vl_id_f_adr(filter), rpf_vl_id_f_msk, + rpf_vl_id_f_shift, vlan_id_flr); } -void rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, u32 filter) +void +rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_enf_adr(filter), - rpf_et_enf_msk, - rpf_et_enf_shift, etht_flr_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_enf_adr(filter), rpf_et_enf_msk, + rpf_et_enf_shift, etht_flr_en); } -void rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, u32 filter) +void +rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, + uint32_t etht_user_priority_en, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_upfen_adr(filter), - rpf_et_upfen_msk, rpf_et_upfen_shift, - etht_user_priority_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_upfen_adr(filter), rpf_et_upfen_msk, + rpf_et_upfen_shift, etht_user_priority_en); } -void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, u32 etht_rx_queue_en, - u32 filter) +void +rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqfen_adr(filter), - rpf_et_rxqfen_msk, rpf_et_rxqfen_shift, - etht_rx_queue_en); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqfen_adr(filter), rpf_et_rxqfen_msk, + rpf_et_rxqfen_shift, etht_rx_queue_en); } -void rpf_etht_user_priority_set(struct aq_hw *aq_hw, u32 etht_user_priority, - u32 filter) +void +rpf_etht_user_priority_set(struct aq_hw *aq_hw, uint32_t etht_user_priority, + uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_upf_adr(filter), - rpf_et_upf_msk, - rpf_et_upf_shift, etht_user_priority); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_upf_adr(filter), rpf_et_upf_msk, + rpf_et_upf_shift, etht_user_priority); } -void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter) +void +rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqf_adr(filter), - rpf_et_rxqf_msk, - rpf_et_rxqf_shift, etht_rx_queue); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_rxqf_adr(filter), rpf_et_rxqf_msk, + rpf_et_rxqf_shift, etht_rx_queue); } -void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter) +void +rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_mng_rxqf_adr(filter), - rpf_et_mng_rxqf_msk, rpf_et_mng_rxqf_shift, - etht_mgt_queue); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_mng_rxqf_adr(filter), + rpf_et_mng_rxqf_msk, rpf_et_mng_rxqf_shift, etht_mgt_queue); } -void rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, u32 filter) +void +rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_actf_adr(filter), - rpf_et_actf_msk, - rpf_et_actf_shift, etht_flr_act); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_actf_adr(filter), rpf_et_actf_msk, + rpf_et_actf_shift, etht_flr_act); } -void rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter) +void +rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, uint32_t filter) { - AQ_WRITE_REG_BIT(aq_hw, rpf_et_valf_adr(filter), - rpf_et_valf_msk, - rpf_et_valf_shift, etht_flr); + AQ_WRITE_REG_BIT(aq_hw, rpf_et_valf_adr(filter), rpf_et_valf_msk, + rpf_et_valf_shift, etht_flr); } /* RPO: rx packet offload */ -void rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en) +void +rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t ipv4header_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, rpo_ipv4chk_en_adr, - rpo_ipv4chk_en_msk, - rpo_ipv4chk_en_shift, - ipv4header_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, rpo_ipv4chk_en_adr, rpo_ipv4chk_en_msk, + rpo_ipv4chk_en_shift, ipv4header_crc_offload_en); } -void rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, - u32 rx_desc_vlan_stripping, u32 descriptor) +void +rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, + uint32_t rx_desc_vlan_stripping, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, rpo_descdvl_strip_adr(descriptor), - rpo_descdvl_strip_msk, - rpo_descdvl_strip_shift, - rx_desc_vlan_stripping); + AQ_WRITE_REG_BIT(aq_hw, rpo_descdvl_strip_adr(descriptor), + rpo_descdvl_strip_msk, rpo_descdvl_strip_shift, + rx_desc_vlan_stripping); } -void rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en) +void +rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t tcp_udp_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, rpol4chk_en_adr, rpol4chk_en_msk, - rpol4chk_en_shift, tcp_udp_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, rpol4chk_en_adr, rpol4chk_en_msk, + rpol4chk_en_shift, tcp_udp_crc_offload_en); } -void rpo_lro_en_set(struct aq_hw *aq_hw, u32 lro_en) +void +rpo_lro_en_set(struct aq_hw *aq_hw, uint32_t lro_en) { - AQ_WRITE_REG(aq_hw, rpo_lro_en_adr, lro_en); + AQ_WRITE_REG(aq_hw, rpo_lro_en_adr, lro_en); } -void rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, - u32 lro_patch_optimization_en) +void +rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, + uint32_t lro_patch_optimization_en) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ptopt_en_adr, - rpo_lro_ptopt_en_msk, - rpo_lro_ptopt_en_shift, - lro_patch_optimization_en); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ptopt_en_adr, rpo_lro_ptopt_en_msk, + rpo_lro_ptopt_en_shift, lro_patch_optimization_en); } -void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, - u32 lro_qsessions_lim) +void +rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, uint32_t lro_qsessions_lim) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_qses_lmt_adr, - rpo_lro_qses_lmt_msk, - rpo_lro_qses_lmt_shift, - lro_qsessions_lim); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_qses_lmt_adr, rpo_lro_qses_lmt_msk, + rpo_lro_qses_lmt_shift, lro_qsessions_lim); } -void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, u32 lro_total_desc_lim) +void +rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, uint32_t lro_total_desc_lim) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tot_dsc_lmt_adr, - rpo_lro_tot_dsc_lmt_msk, - rpo_lro_tot_dsc_lmt_shift, - lro_total_desc_lim); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tot_dsc_lmt_adr, + rpo_lro_tot_dsc_lmt_msk, rpo_lro_tot_dsc_lmt_shift, + lro_total_desc_lim); } -void rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lro_min_pld_of_first_pkt) +void +rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, + uint32_t lro_min_pld_of_first_pkt) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_pkt_min_adr, - rpo_lro_pkt_min_msk, - rpo_lro_pkt_min_shift, - lro_min_pld_of_first_pkt); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_pkt_min_adr, rpo_lro_pkt_min_msk, + rpo_lro_pkt_min_shift, lro_min_pld_of_first_pkt); } -void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, u32 lro_pkt_lim) +void +rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, uint32_t lro_pkt_lim) { - AQ_WRITE_REG(aq_hw, rpo_lro_rsc_max_adr, lro_pkt_lim); + AQ_WRITE_REG(aq_hw, rpo_lro_rsc_max_adr, lro_pkt_lim); } -void rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, - u32 lro_max_number_of_descriptors, - u32 lro) +void +rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, + uint32_t lro_max_number_of_descriptors, uint32_t lro) { /* Register address for bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_adr[32] = { - 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, - 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, - 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, - 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, - 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, - 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, - 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU, - 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU - }; + static uint32_t rpo_lro_ldes_max_adr[32] = { + 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, + 0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U, + 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, + 0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U, + 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, + 0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U, + 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU, + 0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU + }; /* Bitmask for bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_msk[32] = { - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, - 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, - 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U - }; + static uint32_t rpo_lro_ldes_max_msk[32] = { + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U, + 0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U, + 0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U + }; /* Lower bit position of bitfield lro{L}_des_max[1:0] */ - static u32 rpo_lro_ldes_max_shift[32] = { - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, - 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U - }; + static uint32_t rpo_lro_ldes_max_shift[32] = { + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, + 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U + }; - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ldes_max_adr[lro], - rpo_lro_ldes_max_msk[lro], - rpo_lro_ldes_max_shift[lro], - lro_max_number_of_descriptors); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ldes_max_adr[lro], + rpo_lro_ldes_max_msk[lro], rpo_lro_ldes_max_shift[lro], + lro_max_number_of_descriptors); } -void rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, - u32 lro_time_base_divider) +void +rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, + uint32_t lro_time_base_divider) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tb_div_adr, - rpo_lro_tb_div_msk, - rpo_lro_tb_div_shift, - lro_time_base_divider); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_tb_div_adr, rpo_lro_tb_div_msk, + rpo_lro_tb_div_shift, lro_time_base_divider); } -void rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, - u32 lro_inactive_interval) +void +rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, + uint32_t lro_inactive_interval) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ina_ival_adr, - rpo_lro_ina_ival_msk, - rpo_lro_ina_ival_shift, - lro_inactive_interval); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_ina_ival_adr, rpo_lro_ina_ival_msk, + rpo_lro_ina_ival_shift, lro_inactive_interval); } -void rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, - u32 lro_max_coalescing_interval) +void +rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, + uint32_t lro_max_coalescing_interval) { - AQ_WRITE_REG_BIT(aq_hw, rpo_lro_max_ival_adr, - rpo_lro_max_ival_msk, - rpo_lro_max_ival_shift, - lro_max_coalescing_interval); + AQ_WRITE_REG_BIT(aq_hw, rpo_lro_max_ival_adr, rpo_lro_max_ival_msk, + rpo_lro_max_ival_shift, lro_max_coalescing_interval); } /* rx */ -void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, u32 rx_reg_res_dis) +void +rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t rx_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, rx_reg_res_dsbl_adr, - rx_reg_res_dsbl_msk, - rx_reg_res_dsbl_shift, - rx_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, rx_reg_res_dsbl_adr, rx_reg_res_dsbl_msk, + rx_reg_res_dsbl_shift, rx_reg_res_dis); } /* tdm */ -void tdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca) +void +tdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dcadcpuid_adr(dca), - tdm_dcadcpuid_msk, - tdm_dcadcpuid_shift, cpuid); + AQ_WRITE_REG_BIT(aq_hw, tdm_dcadcpuid_adr(dca), tdm_dcadcpuid_msk, + tdm_dcadcpuid_shift, cpuid); } -void tdm_large_send_offload_en_set(struct aq_hw *aq_hw, - u32 large_send_offload_en) +void +tdm_large_send_offload_en_set(struct aq_hw *aq_hw, + uint32_t large_send_offload_en) { - AQ_WRITE_REG(aq_hw, tdm_lso_en_adr, large_send_offload_en); + AQ_WRITE_REG(aq_hw, tdm_lso_en_adr, large_send_offload_en); } -void tdm_tx_dca_en_set(struct aq_hw *aq_hw, u32 tx_dca_en) +void +tdm_tx_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_dca_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dca_en_adr, tdm_dca_en_msk, - tdm_dca_en_shift, tx_dca_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_dca_en_adr, tdm_dca_en_msk, + tdm_dca_en_shift, tx_dca_en); } -void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, u32 tx_dca_mode) +void +tdm_tx_dca_mode_set(struct aq_hw *aq_hw, uint32_t tx_dca_mode) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dca_mode_adr, tdm_dca_mode_msk, - tdm_dca_mode_shift, tx_dca_mode); + AQ_WRITE_REG_BIT(aq_hw, tdm_dca_mode_adr, tdm_dca_mode_msk, + tdm_dca_mode_shift, tx_dca_mode); } -void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, u32 tx_desc_dca_en, u32 dca) +void +tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_dca_en, uint32_t dca) { - AQ_WRITE_REG_BIT(aq_hw, tdm_dcaddesc_en_adr(dca), - tdm_dcaddesc_en_msk, tdm_dcaddesc_en_shift, - tx_desc_dca_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_dcaddesc_en_adr(dca), tdm_dcaddesc_en_msk, + tdm_dcaddesc_en_shift, tx_desc_dca_en); } -void tdm_tx_desc_en_set(struct aq_hw *aq_hw, u32 tx_desc_en, u32 descriptor) +void +tdm_tx_desc_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_en, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descden_adr(descriptor), - tdm_descden_msk, - tdm_descden_shift, - tx_desc_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_descden_adr(descriptor), tdm_descden_msk, + tdm_descden_shift, tx_desc_en); } -u32 tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor) +uint32_t +tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor) { - return AQ_READ_REG_BIT(aq_hw, tdm_descdhd_adr(descriptor), - tdm_descdhd_msk, tdm_descdhd_shift); + return AQ_READ_REG_BIT(aq_hw, tdm_descdhd_adr(descriptor), + tdm_descdhd_msk, tdm_descdhd_shift); } -void tdm_tx_desc_len_set(struct aq_hw *aq_hw, u32 tx_desc_len, - u32 descriptor) +void +tdm_tx_desc_len_set(struct aq_hw *aq_hw, uint32_t tx_desc_len, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descdlen_adr(descriptor), - tdm_descdlen_msk, - tdm_descdlen_shift, - tx_desc_len); + AQ_WRITE_REG_BIT(aq_hw, tdm_descdlen_adr(descriptor), tdm_descdlen_msk, + tdm_descdlen_shift, tx_desc_len); } -void tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_irq_en) +void +tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_wr_wb_irq_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_int_desc_wrb_en_adr, - tdm_int_desc_wrb_en_msk, - tdm_int_desc_wrb_en_shift, - tx_desc_wr_wb_irq_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_int_desc_wrb_en_adr, + tdm_int_desc_wrb_en_msk, tdm_int_desc_wrb_en_shift, + tx_desc_wr_wb_irq_en); } -void tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_threshold, - u32 descriptor) +void +tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, + uint32_t tx_desc_wr_wb_threshold, uint32_t descriptor) { - AQ_WRITE_REG_BIT(aq_hw, tdm_descdwrb_thresh_adr(descriptor), - tdm_descdwrb_thresh_msk, - tdm_descdwrb_thresh_shift, - tx_desc_wr_wb_threshold); + AQ_WRITE_REG_BIT(aq_hw, tdm_descdwrb_thresh_adr(descriptor), + tdm_descdwrb_thresh_msk, tdm_descdwrb_thresh_shift, + tx_desc_wr_wb_threshold); } -void tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, - u32 tdm_irq_moderation_en) +void +tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t tdm_irq_moderation_en) { - AQ_WRITE_REG_BIT(aq_hw, tdm_int_mod_en_adr, - tdm_int_mod_en_msk, - tdm_int_mod_en_shift, - tdm_irq_moderation_en); + AQ_WRITE_REG_BIT(aq_hw, tdm_int_mod_en_adr, tdm_int_mod_en_msk, + tdm_int_mod_en_shift, tdm_irq_moderation_en); } /* thm */ -void thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_first_pkt) +void +thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_first_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_first_adr, - thm_lso_tcp_flag_first_msk, - thm_lso_tcp_flag_first_shift, - lso_tcp_flag_of_first_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_first_adr, + thm_lso_tcp_flag_first_msk, thm_lso_tcp_flag_first_shift, + lso_tcp_flag_of_first_pkt); } -void thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_last_pkt) +void +thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_last_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_last_adr, - thm_lso_tcp_flag_last_msk, - thm_lso_tcp_flag_last_shift, - lso_tcp_flag_of_last_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_last_adr, + thm_lso_tcp_flag_last_msk, thm_lso_tcp_flag_last_shift, + lso_tcp_flag_of_last_pkt); } -void thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_middle_pkt) +void +thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, + uint32_t lso_tcp_flag_of_middle_pkt) { - AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_mid_adr, - thm_lso_tcp_flag_mid_msk, - thm_lso_tcp_flag_mid_shift, - lso_tcp_flag_of_middle_pkt); + AQ_WRITE_REG_BIT(aq_hw, thm_lso_tcp_flag_mid_adr, + thm_lso_tcp_flag_mid_msk, thm_lso_tcp_flag_mid_shift, + lso_tcp_flag_of_middle_pkt); } /* TPB: tx packet buffer */ -void tpb_tx_buff_en_set(struct aq_hw *aq_hw, u32 tx_buff_en) +void +tpb_tx_buff_en_set(struct aq_hw *aq_hw, uint32_t tx_buff_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_buf_en_adr, tpb_tx_buf_en_msk, - tpb_tx_buf_en_shift, tx_buff_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_buf_en_adr, tpb_tx_buf_en_msk, + tpb_tx_buf_en_shift, tx_buff_en); } -void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, u32 tc_mode) +void +tpb_tx_tc_mode_set(struct aq_hw *aq_hw, uint32_t tc_mode) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_tc_mode_adr, tpb_tx_tc_mode_msk, - tpb_tx_tc_mode_shift, tc_mode); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_tc_mode_adr, tpb_tx_tc_mode_msk, + tpb_tx_tc_mode_shift, tc_mode); } -void tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_hi_threshold_per_tc, - u32 buffer) +void +tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_buff_hi_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txbhi_thresh_adr(buffer), - tpb_txbhi_thresh_msk, tpb_txbhi_thresh_shift, - tx_buff_hi_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txbhi_thresh_adr(buffer), + tpb_txbhi_thresh_msk, tpb_txbhi_thresh_shift, + tx_buff_hi_threshold_per_tc); } -void tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_lo_threshold_per_tc, - u32 buffer) +void +tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_buff_lo_threshold_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txblo_thresh_adr(buffer), - tpb_txblo_thresh_msk, tpb_txblo_thresh_shift, - tx_buff_lo_threshold_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txblo_thresh_adr(buffer), + tpb_txblo_thresh_msk, tpb_txblo_thresh_shift, + tx_buff_lo_threshold_per_tc); } -void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_dma_sys_lbk_en) +void +tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_dma_sys_lbk_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_dma_sys_lbk_adr, - tpb_dma_sys_lbk_msk, - tpb_dma_sys_lbk_shift, - tx_dma_sys_lbk_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_dma_sys_lbk_adr, tpb_dma_sys_lbk_msk, + tpb_dma_sys_lbk_shift, tx_dma_sys_lbk_en); } -void rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw) +void +rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw) { - AQ_WRITE_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, - rdm_rx_dma_desc_cache_init_msk, - rdm_rx_dma_desc_cache_init_shift, - AQ_READ_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, - rdm_rx_dma_desc_cache_init_msk, - rdm_rx_dma_desc_cache_init_shift) ^ 1 - ); + AQ_WRITE_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, + rdm_rx_dma_desc_cache_init_msk, rdm_rx_dma_desc_cache_init_shift, + AQ_READ_REG_BIT(aq_hw, rdm_rx_dma_desc_cache_init_adr, + rdm_rx_dma_desc_cache_init_msk, + rdm_rx_dma_desc_cache_init_shift) ^ 1 + ); } -void tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 tx_pkt_buff_size_per_tc, u32 buffer) +void +tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_buff_size_per_tc, uint32_t buffer) { - AQ_WRITE_REG_BIT(aq_hw, tpb_txbbuf_size_adr(buffer), - tpb_txbbuf_size_msk, - tpb_txbbuf_size_shift, - tx_pkt_buff_size_per_tc); + AQ_WRITE_REG_BIT(aq_hw, tpb_txbbuf_size_adr(buffer), + tpb_txbbuf_size_msk, tpb_txbbuf_size_shift, + tx_pkt_buff_size_per_tc); } -void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, u32 tx_path_scp_ins_en) +void +tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, uint32_t tx_path_scp_ins_en) { - AQ_WRITE_REG_BIT(aq_hw, tpb_tx_scp_ins_en_adr, - tpb_tx_scp_ins_en_msk, - tpb_tx_scp_ins_en_shift, - tx_path_scp_ins_en); + AQ_WRITE_REG_BIT(aq_hw, tpb_tx_scp_ins_en_adr, tpb_tx_scp_ins_en_msk, + tpb_tx_scp_ins_en_shift, tx_path_scp_ins_en); } /* TPO: tx packet offload */ -void tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en) +void +tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, + uint32_t ipv4header_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, tpo_ipv4chk_en_adr, - tpo_ipv4chk_en_msk, - tpo_ipv4chk_en_shift, - ipv4header_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, tpo_ipv4chk_en_adr, tpo_ipv4chk_en_msk, + tpo_ipv4chk_en_shift, ipv4header_crc_offload_en); } -void tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en) +void +tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, uint32_t tcp_udp_crc_offload_en) { - AQ_WRITE_REG_BIT(aq_hw, tpol4chk_en_adr, - tpol4chk_en_msk, - tpol4chk_en_shift, - tcp_udp_crc_offload_en); + AQ_WRITE_REG_BIT(aq_hw, tpol4chk_en_adr, tpol4chk_en_msk, + tpol4chk_en_shift, tcp_udp_crc_offload_en); } -void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_pkt_sys_lbk_en) +void +tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_pkt_sys_lbk_en) { - AQ_WRITE_REG_BIT(aq_hw, tpo_pkt_sys_lbk_adr, - tpo_pkt_sys_lbk_msk, - tpo_pkt_sys_lbk_shift, - tx_pkt_sys_lbk_en); + AQ_WRITE_REG_BIT(aq_hw, tpo_pkt_sys_lbk_adr, tpo_pkt_sys_lbk_msk, + tpo_pkt_sys_lbk_shift, tx_pkt_sys_lbk_en); } /* TPS: tx packet scheduler */ -void tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_data_arb_mode) +void +tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_data_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tc_arb_mode_adr, - tps_data_tc_arb_mode_msk, - tps_data_tc_arb_mode_shift, - tx_pkt_shed_data_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tc_arb_mode_adr, + tps_data_tc_arb_mode_msk, tps_data_tc_arb_mode_shift, + tx_pkt_shed_data_arb_mode); } -void tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, - u32 curr_time_res) +void +tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, + uint32_t curr_time_res) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_ta_rst_adr, - tps_desc_rate_ta_rst_msk, - tps_desc_rate_ta_rst_shift, - curr_time_res); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_ta_rst_adr, + tps_desc_rate_ta_rst_msk, tps_desc_rate_ta_rst_shift, + curr_time_res); } -void tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_rate_lim) +void +tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_rate_lim) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_lim_adr, - tps_desc_rate_lim_msk, - tps_desc_rate_lim_shift, - tx_pkt_shed_desc_rate_lim); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_rate_lim_adr, tps_desc_rate_lim_msk, + tps_desc_rate_lim_shift, tx_pkt_shed_desc_rate_lim); } -void tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_arb_mode) +void +tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tc_arb_mode_adr, - tps_desc_tc_arb_mode_msk, - tps_desc_tc_arb_mode_shift, - tx_pkt_shed_desc_tc_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tc_arb_mode_adr, + tps_desc_tc_arb_mode_msk, tps_desc_tc_arb_mode_shift, + tx_pkt_shed_desc_tc_arb_mode); } -void tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_max_credit, - u32 tc) +void +tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_max_credit, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctcredit_max_adr(tc), - tps_desc_tctcredit_max_msk, - tps_desc_tctcredit_max_shift, - tx_pkt_shed_desc_tc_max_credit); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctcredit_max_adr(tc), + tps_desc_tctcredit_max_msk, tps_desc_tctcredit_max_shift, + tx_pkt_shed_desc_tc_max_credit); } -void tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_weight, u32 tc) +void +tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_tc_weight, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctweight_adr(tc), - tps_desc_tctweight_msk, - tps_desc_tctweight_shift, - tx_pkt_shed_desc_tc_weight); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_tctweight_adr(tc), + tps_desc_tctweight_msk, tps_desc_tctweight_shift, + tx_pkt_shed_desc_tc_weight); } -void tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_vm_arb_mode) +void +tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_desc_vm_arb_mode) { - AQ_WRITE_REG_BIT(aq_hw, tps_desc_vm_arb_mode_adr, - tps_desc_vm_arb_mode_msk, - tps_desc_vm_arb_mode_shift, - tx_pkt_shed_desc_vm_arb_mode); + AQ_WRITE_REG_BIT(aq_hw, tps_desc_vm_arb_mode_adr, + tps_desc_vm_arb_mode_msk, tps_desc_vm_arb_mode_shift, + tx_pkt_shed_desc_vm_arb_mode); } -void tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_max_credit, - u32 tc) +void +tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_tc_data_max_credit, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tctcredit_max_adr(tc), - tps_data_tctcredit_max_msk, - tps_data_tctcredit_max_shift, - tx_pkt_shed_tc_data_max_credit); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tctcredit_max_adr(tc), + tps_data_tctcredit_max_msk, tps_data_tctcredit_max_shift, + tx_pkt_shed_tc_data_max_credit); } -void tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_weight, u32 tc) +void +tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, + uint32_t tx_pkt_shed_tc_data_weight, uint32_t tc) { - AQ_WRITE_REG_BIT(aq_hw, tps_data_tctweight_adr(tc), - tps_data_tctweight_msk, - tps_data_tctweight_shift, - tx_pkt_shed_tc_data_weight); + AQ_WRITE_REG_BIT(aq_hw, tps_data_tctweight_adr(tc), + tps_data_tctweight_msk, tps_data_tctweight_shift, + tx_pkt_shed_tc_data_weight); } /* tx */ -void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, u32 tx_reg_res_dis) +void +tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t tx_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, tx_reg_res_dsbl_adr, - tx_reg_res_dsbl_msk, - tx_reg_res_dsbl_shift, tx_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, tx_reg_res_dsbl_adr, tx_reg_res_dsbl_msk, + tx_reg_res_dsbl_shift, tx_reg_res_dis); } /* msm */ -u32 msm_reg_access_status_get(struct aq_hw *aq_hw) +uint32_t +msm_reg_access_status_get(struct aq_hw *aq_hw) { - return AQ_READ_REG_BIT(aq_hw, msm_reg_access_busy_adr, - msm_reg_access_busy_msk, - msm_reg_access_busy_shift); + return AQ_READ_REG_BIT(aq_hw, msm_reg_access_busy_adr, + msm_reg_access_busy_msk, msm_reg_access_busy_shift); } -void msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, - u32 reg_addr_for_indirect_addr) +void +msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, + uint32_t reg_addr_for_indirect_addr) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_addr_adr, - msm_reg_addr_msk, - msm_reg_addr_shift, - reg_addr_for_indirect_addr); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_addr_adr, msm_reg_addr_msk, + msm_reg_addr_shift, reg_addr_for_indirect_addr); } -void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, u32 reg_rd_strobe) +void +msm_reg_rd_strobe_set(struct aq_hw *aq_hw, uint32_t reg_rd_strobe) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_rd_strobe_adr, - msm_reg_rd_strobe_msk, - msm_reg_rd_strobe_shift, - reg_rd_strobe); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_rd_strobe_adr, msm_reg_rd_strobe_msk, + msm_reg_rd_strobe_shift, reg_rd_strobe); } -u32 msm_reg_rd_data_get(struct aq_hw *aq_hw) +uint32_t +msm_reg_rd_data_get(struct aq_hw *aq_hw) { - return AQ_READ_REG(aq_hw, msm_reg_rd_data_adr); + return AQ_READ_REG(aq_hw, msm_reg_rd_data_adr); } -void msm_reg_wr_data_set(struct aq_hw *aq_hw, u32 reg_wr_data) +void +msm_reg_wr_data_set(struct aq_hw *aq_hw, uint32_t reg_wr_data) { - AQ_WRITE_REG(aq_hw, msm_reg_wr_data_adr, reg_wr_data); + AQ_WRITE_REG(aq_hw, msm_reg_wr_data_adr, reg_wr_data); } -void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, u32 reg_wr_strobe) +void +msm_reg_wr_strobe_set(struct aq_hw *aq_hw, uint32_t reg_wr_strobe) { - AQ_WRITE_REG_BIT(aq_hw, msm_reg_wr_strobe_adr, - msm_reg_wr_strobe_msk, - msm_reg_wr_strobe_shift, - reg_wr_strobe); + AQ_WRITE_REG_BIT(aq_hw, msm_reg_wr_strobe_adr, msm_reg_wr_strobe_msk, + msm_reg_wr_strobe_shift, reg_wr_strobe); } /* pci */ -void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, u32 pci_reg_res_dis) +void +pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t pci_reg_res_dis) { - AQ_WRITE_REG_BIT(aq_hw, pci_reg_res_dsbl_adr, - pci_reg_res_dsbl_msk, - pci_reg_res_dsbl_shift, - pci_reg_res_dis); + AQ_WRITE_REG_BIT(aq_hw, pci_reg_res_dsbl_adr, pci_reg_res_dsbl_msk, + pci_reg_res_dsbl_shift, pci_reg_res_dis); } -u32 reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, u32 glb_cpu_scratch_scp_idx) +uint32_t +reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, uint32_t glb_cpu_scratch_scp_idx) { - return AQ_READ_REG(hw, glb_cpu_scratch_scp_adr(glb_cpu_scratch_scp_idx)); + return AQ_READ_REG(hw, glb_cpu_scratch_scp_adr(glb_cpu_scratch_scp_idx)); } -void reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, u32 glb_cpu_scratch_scp, - u32 scratch_scp) +void +reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, uint32_t glb_cpu_scratch_scp, + uint32_t scratch_scp) { - AQ_WRITE_REG(aq_hw, glb_cpu_scratch_scp_adr(scratch_scp), - glb_cpu_scratch_scp); + AQ_WRITE_REG(aq_hw, glb_cpu_scratch_scp_adr(scratch_scp), + glb_cpu_scratch_scp); } -u32 reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw *hw, u32 index) +uint32_t +reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw *hw, uint32_t index) { - return AQ_READ_REG(hw, glb_cpu_no_reset_scratchpad_adr(index)); + return AQ_READ_REG(hw, glb_cpu_no_reset_scratchpad_adr(index)); } -void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* hw, u32 value, u32 index) +void +reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* hw, uint32_t value, uint32_t index) { - AQ_WRITE_REG(hw, glb_cpu_no_reset_scratchpad_adr(index), value); + AQ_WRITE_REG(hw, glb_cpu_no_reset_scratchpad_adr(index), value); } -void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, u32 value) +void +reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, mif_power_gating_enable_control_adr, value); + AQ_WRITE_REG(hw, mif_power_gating_enable_control_adr, value); } -u32 reg_mif_power_gating_enable_control_get(struct aq_hw* hw) +uint32_t +reg_mif_power_gating_enable_control_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, mif_power_gating_enable_control_adr); + return AQ_READ_REG(hw, mif_power_gating_enable_control_adr); } -void reg_glb_general_provisioning9_set(struct aq_hw* hw, u32 value) +void +reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_general_provisioning9_adr, value); + AQ_WRITE_REG(hw, glb_general_provisioning9_adr, value); } -u32 reg_glb_general_provisioning9_get(struct aq_hw* hw) +uint32_t +reg_glb_general_provisioning9_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_general_provisioning9_adr); + return AQ_READ_REG(hw, glb_general_provisioning9_adr); } -void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, u32 value) +void +reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_nvr_provisioning2_adr, value); + AQ_WRITE_REG(hw, glb_nvr_provisioning2_adr, value); } -u32 reg_glb_nvr_provisioning2_get(struct aq_hw* hw) +uint32_t +reg_glb_nvr_provisioning2_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_nvr_provisioning2_adr); + return AQ_READ_REG(hw, glb_nvr_provisioning2_adr); } -void reg_glb_nvr_interface1_set(struct aq_hw* hw, u32 value) +void +reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG(hw, glb_nvr_interface1_adr, value); + AQ_WRITE_REG(hw, glb_nvr_interface1_adr, value); } -u32 reg_glb_nvr_interface1_get(struct aq_hw* hw) +uint32_t +reg_glb_nvr_interface1_get(struct aq_hw* hw) { - return AQ_READ_REG(hw, glb_nvr_interface1_adr); + return AQ_READ_REG(hw, glb_nvr_interface1_adr); } /* get mif up mailbox busy */ -u32 mif_mcp_up_mailbox_busy_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_busy_get(struct aq_hw *hw) { - return AQ_READ_REG_BIT(hw, mif_mcp_up_mailbox_busy_adr, - mif_mcp_up_mailbox_busy_msk, - mif_mcp_up_mailbox_busy_shift); + return AQ_READ_REG_BIT(hw, mif_mcp_up_mailbox_busy_adr, + mif_mcp_up_mailbox_busy_msk, mif_mcp_up_mailbox_busy_shift); } /* set mif up mailbox execute operation */ -void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, u32 value) +void +mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value) { - AQ_WRITE_REG_BIT(hw, mif_mcp_up_mailbox_execute_operation_adr, - mif_mcp_up_mailbox_execute_operation_msk, - mif_mcp_up_mailbox_execute_operation_shift, - value); + AQ_WRITE_REG_BIT(hw, mif_mcp_up_mailbox_execute_operation_adr, + mif_mcp_up_mailbox_execute_operation_msk, + mif_mcp_up_mailbox_execute_operation_shift, value); } /* get mif uP mailbox address */ -u32 mif_mcp_up_mailbox_addr_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_addr_get(struct aq_hw *hw) { - return AQ_READ_REG(hw, mif_mcp_up_mailbox_addr_adr); + return AQ_READ_REG(hw, mif_mcp_up_mailbox_addr_adr); } /* set mif uP mailbox address */ -void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, u32 value) +void +mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value) { - AQ_WRITE_REG(hw, mif_mcp_up_mailbox_addr_adr, value); + AQ_WRITE_REG(hw, mif_mcp_up_mailbox_addr_adr, value); } /* get mif uP mailbox data */ -u32 mif_mcp_up_mailbox_data_get(struct aq_hw *hw) +uint32_t +mif_mcp_up_mailbox_data_get(struct aq_hw *hw) { - return AQ_READ_REG(hw, mif_mcp_up_mailbox_data_adr); + return AQ_READ_REG(hw, mif_mcp_up_mailbox_data_adr); } -void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, uint8_t location) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), 0U); } -void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), - 0U); + HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), 0U); } -void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, u8 location) +void +hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, uint8_t location) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), - 0U); + HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), 0U); } -void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 ipv4_dest) +void +hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t ipv4_dest) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), - ipv4_dest); + ipv4_dest); } -void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 ipv4_src) +void +hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t ipv4_src) { - aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), - ipv4_src); + aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), + ipv4_src); } -void hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, u8 location, u32 cmd) +void +hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, uint8_t location, uint32_t cmd) { aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), cmd); } -void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 *ipv6_src) +void +hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t *ipv6_src) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), - ipv6_src[i]); + HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), ipv6_src[i]); } -void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, - u32 *ipv6_dest) +void +hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, uint8_t location, + uint32_t *ipv6_dest) { int i; for (i = 0; i < 4; ++i) aq_hw_write_reg(aq_hw, - HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), - ipv6_dest[i]); + HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), ipv6_dest[i]); } diff --git a/sys/dev/aq/aq_hw_llh.h b/sys/dev/aq/aq_hw_llh.h index 8d014481cca4..68cc666be1a3 100644 --- a/sys/dev/aq/aq_hw_llh.h +++ b/sys/dev/aq/aq_hw_llh.h @@ -46,1131 +46,1164 @@ struct aq_hw; /* global */ -void reg_glb_fw_image_id1_set(struct aq_hw* hw, u32 value); -u32 reg_glb_fw_image_id1_get(struct aq_hw* hw); +void reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value); +uint32_t reg_glb_fw_image_id1_get(struct aq_hw* hw); /* set global microprocessor semaphore */ -void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, u32 sem_value, u32 sem_index); +void reg_glb_cpu_sem_set(struct aq_hw *aq_hw, uint32_t sem_value, + uint32_t sem_index); /* get global microprocessor semaphore */ -u32 reg_glb_cpu_sem_get(struct aq_hw *aq_hw, u32 sem_index); +uint32_t reg_glb_cpu_sem_get(struct aq_hw *aq_hw, uint32_t sem_index); /* -* \brief Get Global Standard Control 1 -* \return GlobalStandardControl1 -*/ -u32 reg_glb_standard_ctl1_get(struct aq_hw* hw); + * \brief Get Global Standard Control 1 + * \return GlobalStandardControl1 + */ +uint32_t reg_glb_standard_ctl1_get(struct aq_hw* hw); /* -* \brief Set Global Standard Control 1 -*/ -void reg_glb_standard_ctl1_set(struct aq_hw* hw, u32 glb_standard_ctl1); + * \brief Set Global Standard Control 1 + */ +void reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1); /* -* \brief Set Global Control 2 -*/ -void reg_global_ctl2_set(struct aq_hw* hw, u32 global_ctl2); + * \brief Set Global Control 2 + */ +void reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2); /* -* \brief Get Global Control 2 -* \return GlobalControl2 -*/ -u32 reg_global_ctl2_get(struct aq_hw* hw); + * \brief Get Global Control 2 + * \return GlobalControl2 + */ +uint32_t reg_global_ctl2_get(struct aq_hw* hw); /* -* \brief Set Global Daisy Chain Status 1 -*/ -void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, u32 glb_daisy_chain_status1); + * \brief Set Global Daisy Chain Status 1 + */ +void reg_glb_daisy_chain_status1_set(struct aq_hw* hw, + uint32_t glb_daisy_chain_status1); /* -* \brief Get Global Daisy Chain Status 1 -* \return glb_daisy_chain_status1 -*/ -u32 reg_glb_daisy_chain_status1_get(struct aq_hw* hw); + * \brief Get Global Daisy Chain Status 1 + * \return glb_daisy_chain_status1 + */ +uint32_t reg_glb_daisy_chain_status1_get(struct aq_hw* hw); /* -* \brief Set Global General Provisioning 9 -*/ -void reg_glb_general_provisioning9_set(struct aq_hw* hw, u32 value); + * \brief Set Global General Provisioning 9 + */ +void reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global General Provisioning 9 -* \return GlobalGeneralProvisioning9 -*/ -u32 reg_glb_general_provisioning9_get(struct aq_hw* hw); + * \brief Get Global General Provisioning 9 + * \return GlobalGeneralProvisioning9 + */ +uint32_t reg_glb_general_provisioning9_get(struct aq_hw* hw); /* -* \brief Set Global NVR Provisioning 2 -*/ -void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, u32 value); + * \brief Set Global NVR Provisioning 2 + */ +void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global NVR Provisioning 2 -* \return GlobalNvrProvisioning2 -*/ -u32 reg_glb_nvr_provisioning2_get(struct aq_hw* hw); + * \brief Get Global NVR Provisioning 2 + * \return GlobalNvrProvisioning2 + */ +uint32_t reg_glb_nvr_provisioning2_get(struct aq_hw* hw); /* -* \brief Set Global NVR Interface 1 -*/ -void reg_glb_nvr_interface1_set(struct aq_hw* hw, u32 value); + * \brief Set Global NVR Interface 1 + */ +void reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get Global NVR Interface 1 -* \return GlobalNvrInterface1 -*/ -u32 reg_glb_nvr_interface1_get(struct aq_hw* hw); + * \brief Get Global NVR Interface 1 + * \return GlobalNvrInterface1 + */ +uint32_t reg_glb_nvr_interface1_get(struct aq_hw* hw); /* set global register reset disable */ -void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, u32 glb_reg_res_dis); +void glb_glb_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t glb_reg_res_dis); /* set soft reset */ -void glb_soft_res_set(struct aq_hw *aq_hw, u32 soft_res); +void glb_soft_res_set(struct aq_hw *aq_hw, uint32_t soft_res); /* get soft reset */ -u32 glb_soft_res_get(struct aq_hw *aq_hw); +uint32_t glb_soft_res_get(struct aq_hw *aq_hw); /* stats */ -u32 rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw); +uint32_t rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw *aq_hw); /* get rx dma good octet counter lsw */ -u32 stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); /* get rx dma good packet counter lsw */ -u32 stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); /* get tx dma good octet counter lsw */ -u32 stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_octet_counterlsw_get(struct aq_hw *aq_hw); /* get tx dma good packet counter lsw */ -u32 stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw *aq_hw); /* get rx dma good octet counter msw */ -u32 stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); /* get rx dma good packet counter msw */ -u32 stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_rx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); /* get tx dma good octet counter msw */ -u32 stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_octet_countermsw_get(struct aq_hw *aq_hw); /* get tx dma good packet counter msw */ -u32 stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); +uint32_t stats_tx_dma_good_pkt_countermsw_get(struct aq_hw *aq_hw); /* get rx lro coalesced packet count lsw */ -u32 stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw); +uint32_t stats_rx_lro_coalesced_pkt_count0_get(struct aq_hw *aq_hw); /* get msm rx errors counter register */ -u32 reg_mac_msm_rx_errs_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_errs_cnt_get(struct aq_hw *aq_hw); /* get msm rx unicast frames counter register */ -u32 reg_mac_msm_rx_ucst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_ucst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx multicast frames counter register */ -u32 reg_mac_msm_rx_mcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_mcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx broadcast frames counter register */ -u32 reg_mac_msm_rx_bcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_bcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm rx broadcast octets counter register 1 */ -u32 reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm rx unicast octets counter register 0 */ -u32 reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw *aq_hw); /* get rx dma statistics counter 7 */ -u32 reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw); +uint32_t reg_rx_dma_stat_counter7get(struct aq_hw *aq_hw); /* get msm tx errors counter register */ -u32 reg_mac_msm_tx_errs_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_errs_cnt_get(struct aq_hw *aq_hw); /* get msm tx unicast frames counter register */ -u32 reg_mac_msm_tx_ucst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_ucst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx multicast frames counter register */ -u32 reg_mac_msm_tx_mcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_mcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx broadcast frames counter register */ -u32 reg_mac_msm_tx_bcst_frm_cnt_get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_bcst_frm_cnt_get(struct aq_hw *aq_hw); /* get msm tx multicast octets counter register 1 */ -u32 reg_mac_msm_tx_mcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_mcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm tx broadcast octets counter register 1 */ -u32 reg_mac_msm_tx_bcst_octets_counter1get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_bcst_octets_counter1get(struct aq_hw *aq_hw); /* get msm tx unicast octets counter register 0 */ -u32 reg_mac_msm_tx_ucst_octets_counter0get(struct aq_hw *aq_hw); +uint32_t reg_mac_msm_tx_ucst_octets_counter0get(struct aq_hw *aq_hw); /* get global mif identification */ -u32 reg_glb_mif_id_get(struct aq_hw *aq_hw); +uint32_t reg_glb_mif_id_get(struct aq_hw *aq_hw); /** \brief Set Tx Register Reset Disable -* \param txRegisterResetDisable 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers -* \note Default value: 0x1 -* \note PORT="pif_mpi_reg_reset_dsbl_i" -*/ -void mpi_tx_reg_res_dis_set(struct aq_hw* hw, u32 mpi_tx_reg_res_dis); + * \param txRegisterResetDisable 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers + * \note Default value: 0x1 + * \note PORT="pif_mpi_reg_reset_dsbl_i" + */ +void mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis); /** \brief Get Tx Register Reset Disable -* \return 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers -* \note Default value: 0x1 -* \note PORT="pif_mpi_reg_reset_dsbl_i" -*/ -u32 mpi_tx_reg_res_dis_get(struct aq_hw* hw); + * \return 1 = Disable the S/W reset to MAC-PHY registers, 0 = Enable the S/W reset to MAC-PHY registers + * \note Default value: 0x1 + * \note PORT="pif_mpi_reg_reset_dsbl_i" + */ +uint32_t mpi_tx_reg_res_dis_get(struct aq_hw* hw); /* interrupt */ /* set interrupt auto mask lsw */ -void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, u32 irq_auto_masklsw); +void itr_irq_auto_masklsw_set(struct aq_hw *aq_hw, uint32_t irq_auto_masklsw); /* set interrupt mapping enable rx */ -void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, u32 irq_map_en_rx, u32 rx); +void itr_irq_map_en_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_rx, + uint32_t rx); /* set interrupt mapping enable tx */ -void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, u32 irq_map_en_tx, u32 tx); +void itr_irq_map_en_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_en_tx, + uint32_t tx); /* set interrupt mapping rx */ -void itr_irq_map_rx_set(struct aq_hw *aq_hw, u32 irq_map_rx, u32 rx); +void itr_irq_map_rx_set(struct aq_hw *aq_hw, uint32_t irq_map_rx, uint32_t rx); /* set interrupt mapping tx */ -void itr_irq_map_tx_set(struct aq_hw *aq_hw, u32 irq_map_tx, u32 tx); +void itr_irq_map_tx_set(struct aq_hw *aq_hw, uint32_t irq_map_tx, uint32_t tx); /* set interrupt mask clear lsw */ -void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, u32 irq_msk_clearlsw); +void itr_irq_msk_clearlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_clearlsw); /* set interrupt mask set lsw */ -void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, u32 irq_msk_setlsw); +void itr_irq_msk_setlsw_set(struct aq_hw *aq_hw, uint32_t irq_msk_setlsw); /* set interrupt register reset disable */ -void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, u32 irq_reg_res_dis); +void itr_irq_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t irq_reg_res_dis); /* set interrupt status clear lsw */ void itr_irq_status_clearlsw_set(struct aq_hw *aq_hw, - u32 irq_status_clearlsw); + uint32_t irq_status_clearlsw); /* get interrupt status lsw */ -u32 itr_irq_statuslsw_get(struct aq_hw *aq_hw); +uint32_t itr_irq_statuslsw_get(struct aq_hw *aq_hw); /* get reset interrupt */ -u32 itr_res_irq_get(struct aq_hw *aq_hw); +uint32_t itr_res_irq_get(struct aq_hw *aq_hw); /* set reset interrupt */ -void itr_res_irq_set(struct aq_hw *aq_hw, u32 res_irq); +void itr_res_irq_set(struct aq_hw *aq_hw, uint32_t res_irq); -void itr_irq_mode_set(struct aq_hw *aq_hw, u32 irq_mode); +void itr_irq_mode_set(struct aq_hw *aq_hw, uint32_t irq_mode); /* Set Link Interrupt Mapping Enable */ -void itr_link_int_map_en_set(struct aq_hw *aq_hw, u32 link_int_en_map_en); +void itr_link_int_map_en_set(struct aq_hw *aq_hw, uint32_t link_int_en_map_en); /* Get Link Interrupt Mapping Enable */ -u32 itr_link_int_map_en_get(struct aq_hw *aq_hw); +uint32_t itr_link_int_map_en_get(struct aq_hw *aq_hw); /* Set Link Interrupt Mapping */ -void itr_link_int_map_set(struct aq_hw *aq_hw, u32 link_int_map); +void itr_link_int_map_set(struct aq_hw *aq_hw, uint32_t link_int_map); /* Get Link Interrupt Mapping */ -u32 itr_link_int_map_get(struct aq_hw *aq_hw); +uint32_t itr_link_int_map_get(struct aq_hw *aq_hw); /* Set MIF Interrupt Mapping Enable */ -void itr_mif_int_map_en_set(struct aq_hw *aq_hw, u32 mif_int_map_en, u32 mif); +void itr_mif_int_map_en_set(struct aq_hw *aq_hw, uint32_t mif_int_map_en, + uint32_t mif); /* Get MIF Interrupt Mapping Enable */ -u32 itr_mif_int_map_en_get(struct aq_hw *aq_hw, u32 mif); +uint32_t itr_mif_int_map_en_get(struct aq_hw *aq_hw, uint32_t mif); /* Set MIF Interrupt Mapping */ -void itr_mif_int_map_set(struct aq_hw *aq_hw, u32 mif_int_map, u32 mif); +void itr_mif_int_map_set(struct aq_hw *aq_hw, uint32_t mif_int_map, + uint32_t mif); /* Get MIF Interrupt Mapping */ -u32 itr_mif_int_map_get(struct aq_hw *aq_hw, u32 mif); +uint32_t itr_mif_int_map_get(struct aq_hw *aq_hw, uint32_t mif); -void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, u32 irq_status_cor_enable); +void itr_irq_status_cor_en_set(struct aq_hw *aq_hw, + uint32_t irq_status_cor_enable); -void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, u32 irq_auto_mask_clr_en); +void itr_irq_auto_mask_clr_en_set(struct aq_hw *aq_hw, + uint32_t irq_auto_mask_clr_en); /* rdm */ /* set cpu id */ -void rdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca); +void rdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca); /* set rx dca enable */ -void rdm_rx_dca_en_set(struct aq_hw *aq_hw, u32 rx_dca_en); +void rdm_rx_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_dca_en); /* set rx dca mode */ -void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, u32 rx_dca_mode); +void rdm_rx_dca_mode_set(struct aq_hw *aq_hw, uint32_t rx_dca_mode); /* set rx descriptor data buffer size */ void rdm_rx_desc_data_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_data_buff_size, - u32 descriptor); + uint32_t rx_desc_data_buff_size, uint32_t descriptor); /* set rx descriptor dca enable */ -void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, u32 rx_desc_dca_en, - u32 dca); +void rdm_rx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_dca_en, + uint32_t dca); /* set rx descriptor enable */ -void rdm_rx_desc_en_set(struct aq_hw *aq_hw, u32 rx_desc_en, - u32 descriptor); +void rdm_rx_desc_en_set(struct aq_hw *aq_hw, uint32_t rx_desc_en, + uint32_t descriptor); /* set rx descriptor header splitting */ void rdm_rx_desc_head_splitting_set(struct aq_hw *aq_hw, - u32 rx_desc_head_splitting, - u32 descriptor); + uint32_t rx_desc_head_splitting, uint32_t descriptor); /* get rx descriptor head pointer */ -u32 rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t rdm_rx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx descriptor length */ -void rdm_rx_desc_len_set(struct aq_hw *aq_hw, u32 rx_desc_len, - u32 descriptor); +void rdm_rx_desc_len_set(struct aq_hw *aq_hw, uint32_t rx_desc_len, + uint32_t descriptor); /* set rx descriptor write-back interrupt enable */ void rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 rx_desc_wr_wb_irq_en); + uint32_t rx_desc_wr_wb_irq_en); /* set rx header dca enable */ -void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, u32 rx_head_dca_en, - u32 dca); +void rdm_rx_head_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_head_dca_en, + uint32_t dca); /* set rx payload dca enable */ -void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, u32 rx_pld_dca_en, u32 dca); +void rdm_rx_pld_dca_en_set(struct aq_hw *aq_hw, uint32_t rx_pld_dca_en, + uint32_t dca); /* set rx descriptor header buffer size */ void rdm_rx_desc_head_buff_size_set(struct aq_hw *aq_hw, - u32 rx_desc_head_buff_size, - u32 descriptor); + uint32_t rx_desc_head_buff_size, uint32_t descriptor); /* set rx descriptor reset */ -void rdm_rx_desc_res_set(struct aq_hw *aq_hw, u32 rx_desc_res, - u32 descriptor); +void rdm_rx_desc_res_set(struct aq_hw *aq_hw, uint32_t rx_desc_res, + uint32_t descriptor); /* Set RDM Interrupt Moderation Enable */ -void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, u32 rdm_intr_moder_en); +void rdm_rdm_intr_moder_en_set(struct aq_hw *aq_hw, uint32_t rdm_intr_moder_en); /* reg */ /* set general interrupt mapping register */ -void reg_gen_irq_map_set(struct aq_hw *aq_hw, u32 gen_intr_map, u32 regidx); +void reg_gen_irq_map_set(struct aq_hw *aq_hw, uint32_t gen_intr_map, + uint32_t regidx); /* get general interrupt status register */ -u32 reg_gen_irq_status_get(struct aq_hw *aq_hw); +uint32_t reg_gen_irq_status_get(struct aq_hw *aq_hw); /* set interrupt global control register */ -void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, u32 intr_glb_ctl); +void reg_irq_glb_ctl_set(struct aq_hw *aq_hw, uint32_t intr_glb_ctl); /* set interrupt throttle register */ -void reg_irq_thr_set(struct aq_hw *aq_hw, u32 intr_thr, u32 throttle); +void reg_irq_thr_set(struct aq_hw *aq_hw, uint32_t intr_thr, uint32_t throttle); /* set rx dma descriptor base address lsw */ void reg_rx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrlsw, - u32 descriptor); + uint32_t rx_dma_desc_base_addrlsw, uint32_t descriptor); /* set rx dma descriptor base address msw */ void reg_rx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 rx_dma_desc_base_addrmsw, - u32 descriptor); + uint32_t rx_dma_desc_base_addrmsw, uint32_t descriptor); /* get rx dma descriptor status register */ -u32 reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_rx_dma_desc_status_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx dma descriptor tail pointer register */ void reg_rx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 rx_dma_desc_tail_ptr, - u32 descriptor); + uint32_t rx_dma_desc_tail_ptr, uint32_t descriptor); /* get rx dma descriptor tail pointer register */ -u32 reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_rx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set rx filter multicast filter mask register */ void reg_rx_flr_mcst_flr_msk_set(struct aq_hw *aq_hw, - u32 rx_flr_mcst_flr_msk); + uint32_t rx_flr_mcst_flr_msk); /* set rx filter multicast filter register */ -void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, u32 rx_flr_mcst_flr, - u32 filter); +void reg_rx_flr_mcst_flr_set(struct aq_hw *aq_hw, uint32_t rx_flr_mcst_flr, + uint32_t filter); /* set rx filter rss control register 1 */ void reg_rx_flr_rss_control1set(struct aq_hw *aq_hw, - u32 rx_flr_rss_control1); + uint32_t rx_flr_rss_control1); /* Set RX Filter Control Register 2 */ -void reg_rx_flr_control2_set(struct aq_hw *aq_hw, u32 rx_flr_control2); +void reg_rx_flr_control2_set(struct aq_hw *aq_hw, uint32_t rx_flr_control2); /* Set RX Interrupt Moderation Control Register */ void reg_rx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 rx_intr_moderation_ctl, - u32 queue); + uint32_t rx_intr_moderation_ctl, uint32_t queue); /* set tx dma debug control */ -void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, u32 tx_dma_debug_ctl); +void reg_tx_dma_debug_ctl_set(struct aq_hw *aq_hw, uint32_t tx_dma_debug_ctl); /* set tx dma descriptor base address lsw */ void reg_tx_dma_desc_base_addresslswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrlsw, - u32 descriptor); + uint32_t tx_dma_desc_base_addrlsw, uint32_t descriptor); /* set tx dma descriptor base address msw */ void reg_tx_dma_desc_base_addressmswset(struct aq_hw *aq_hw, - u32 tx_dma_desc_base_addrmsw, - u32 descriptor); + uint32_t tx_dma_desc_base_addrmsw, uint32_t descriptor); /* set tx dma descriptor tail pointer register */ void reg_tx_dma_desc_tail_ptr_set(struct aq_hw *aq_hw, - u32 tx_dma_desc_tail_ptr, - u32 descriptor); + uint32_t tx_dma_desc_tail_ptr, uint32_t descriptor); /* get tx dma descriptor tail pointer register */ -u32 reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t reg_tx_dma_desc_tail_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* Set TX Interrupt Moderation Control Register */ void reg_tx_intr_moder_ctrl_set(struct aq_hw *aq_hw, - u32 tx_intr_moderation_ctl, - u32 queue); + uint32_t tx_intr_moderation_ctl, uint32_t queue); /* get global microprocessor scratch pad */ -u32 reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, u32 glb_cpu_scratch_scp_idx); +uint32_t reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, + uint32_t glb_cpu_scratch_scp_idx); /* set global microprocessor scratch pad */ void reg_glb_cpu_scratch_scp_set(struct aq_hw *aq_hw, - u32 glb_cpu_scratch_scp, u32 scratch_scp); + uint32_t glb_cpu_scratch_scp, uint32_t scratch_scp); /* get global microprocessor no reset scratch pad */ -u32 reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw* hw, u32 index); +uint32_t reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw* hw, uint32_t index); /* set global microprocessor no reset scratch pad */ -void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* aq_hw, u32 value, - u32 index); +void reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* aq_hw, uint32_t value, + uint32_t index); /* rpb */ /* set dma system loopback */ -void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, u32 dma_sys_lbk); +void rpb_dma_sys_lbk_set(struct aq_hw *aq_hw, uint32_t dma_sys_lbk); /* set rx traffic class mode */ void rpb_rpf_rx_traf_class_mode_set(struct aq_hw *aq_hw, - u32 rx_traf_class_mode); + uint32_t rx_traf_class_mode); /* set rx buffer enable */ -void rpb_rx_buff_en_set(struct aq_hw *aq_hw, u32 rx_buff_en); +void rpb_rx_buff_en_set(struct aq_hw *aq_hw, uint32_t rx_buff_en); /* set rx buffer high threshold (per tc) */ void rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_hi_threshold_per_tc, - u32 buffer); + uint32_t rx_buff_hi_threshold_per_tc, uint32_t buffer); /* set rx buffer low threshold (per tc) */ void rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 rx_buff_lo_threshold_per_tc, - u32 buffer); + uint32_t rx_buff_lo_threshold_per_tc, uint32_t buffer); /* set rx flow control mode */ -void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, u32 rx_flow_ctl_mode); +void rpb_rx_flow_ctl_mode_set(struct aq_hw *aq_hw, uint32_t rx_flow_ctl_mode); /* set rx packet buffer size (per tc) */ void rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 rx_pkt_buff_size_per_tc, - u32 buffer); + uint32_t rx_pkt_buff_size_per_tc, uint32_t buffer); /* set rx xoff enable (per tc) */ -void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, u32 rx_xoff_en_per_tc, - u32 buffer); +void rpb_rx_xoff_en_per_tc_set(struct aq_hw *aq_hw, uint32_t rx_xoff_en_per_tc, + uint32_t buffer); /* rpf */ /* set l2 broadcast count threshold */ void rpfl2broadcast_count_threshold_set(struct aq_hw *aq_hw, - u32 l2broadcast_count_threshold); + uint32_t l2broadcast_count_threshold); /* set l2 broadcast enable */ -void rpfl2broadcast_en_set(struct aq_hw *aq_hw, u32 l2broadcast_en); +void rpfl2broadcast_en_set(struct aq_hw *aq_hw, uint32_t l2broadcast_en); /* set l2 broadcast filter action */ void rpfl2broadcast_flr_act_set(struct aq_hw *aq_hw, - u32 l2broadcast_flr_act); + uint32_t l2broadcast_flr_act); /* set l2 multicast filter enable */ -void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, u32 l2multicast_flr_en, - u32 filter); +void rpfl2multicast_flr_en_set(struct aq_hw *aq_hw, uint32_t l2multicast_flr_en, + uint32_t filter); /* set l2 promiscuous mode enable */ void rpfl2promiscuous_mode_en_set(struct aq_hw *aq_hw, - u32 l2promiscuous_mode_en); + uint32_t l2promiscuous_mode_en); /* set l2 unicast filter action */ -void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, u32 l2unicast_flr_act, - u32 filter); +void rpfl2unicast_flr_act_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_act, + uint32_t filter); /* set l2 unicast filter enable */ -void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, u32 l2unicast_flr_en, - u32 filter); +void rpfl2_uc_flr_en_set(struct aq_hw *aq_hw, uint32_t l2unicast_flr_en, + uint32_t filter); /* set l2 unicast destination address lsw */ void rpfl2unicast_dest_addresslsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addresslsw, - u32 filter); + uint32_t l2unicast_dest_addresslsw, uint32_t filter); /* set l2 unicast destination address msw */ void rpfl2unicast_dest_addressmsw_set(struct aq_hw *aq_hw, - u32 l2unicast_dest_addressmsw, - u32 filter); + uint32_t l2unicast_dest_addressmsw, uint32_t filter); /* Set L2 Accept all Multicast packets */ void rpfl2_accept_all_mc_packets_set(struct aq_hw *aq_hw, - u32 l2_accept_all_mc_packets); + uint32_t l2_accept_all_mc_packets); /* set user-priority tc mapping */ void rpf_rpb_user_priority_tc_map_set(struct aq_hw *aq_hw, - u32 user_priority_tc_map, u32 tc); + uint32_t user_priority_tc_map, uint32_t tc); /* set rss key address */ -void rpf_rss_key_addr_set(struct aq_hw *aq_hw, u32 rss_key_addr); +void rpf_rss_key_addr_set(struct aq_hw *aq_hw, uint32_t rss_key_addr); /* set rss key write data */ -void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, u32 rss_key_wr_data); +void rpf_rss_key_wr_data_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_data); /* get rss key read data */ -u32 rpf_rss_key_rd_data_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_key_rd_data_get(struct aq_hw *aq_hw); /* get rss key write enable */ -u32 rpf_rss_key_wr_en_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_key_wr_en_get(struct aq_hw *aq_hw); /* set rss key write enable */ -void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, u32 rss_key_wr_en); +void rpf_rss_key_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_key_wr_en); /* set rss redirection table address */ void rpf_rss_redir_tbl_addr_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_addr); + uint32_t rss_redir_tbl_addr); /* set rss redirection table write data */ void rpf_rss_redir_tbl_wr_data_set(struct aq_hw *aq_hw, - u32 rss_redir_tbl_wr_data); + uint32_t rss_redir_tbl_wr_data); /* get rss redirection write enable */ -u32 rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw); +uint32_t rpf_rss_redir_wr_en_get(struct aq_hw *aq_hw); /* set rss redirection write enable */ -void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, u32 rss_redir_wr_en); +void rpf_rss_redir_wr_en_set(struct aq_hw *aq_hw, uint32_t rss_redir_wr_en); /* set tpo to rpf system loopback */ void rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw *aq_hw, - u32 tpo_to_rpf_sys_lbk); + uint32_t tpo_to_rpf_sys_lbk); /* set vlan inner ethertype */ -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, - u32 vlan_prom_mode_en); + uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, - u32 vlan_untagged_act); + uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_acc_untagged_packets); + uint32_t vlan_acc_untagged_packets); /* Set VLAN filter enable */ -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, - u32 filter); +void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, - u32 filter); +void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* Set VLAN RX queue assignment enable */ -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq_en, - u32 filter); +void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter); /* Set VLAN RX queue */ -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq, - u32 filter); +void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq, + uint32_t filter); /* set ethertype filter enable */ -void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, - u32 filter); +void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, - u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, - u32 etht_rx_queue_en, - u32 filter); + uint32_t etht_rx_queue_en, uint32_t filter); /* set ethertype rx queue */ -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ void hw_atl_rpf_etht_user_priority_set(struct aq_hw *aq_hw, - u32 etht_user_priority, - u32 filter); + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, + uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set vlan inner ethertype */ -void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ -void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, u32 vlan_prom_mode_en); +void rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ -void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, u32 vlan_untagged_act); +void rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_accept_untagged_packets); + uint32_t vlan_accept_untagged_packets); /* Set VLAN filter enable */ -void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, u32 filter); +void rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, u32 filter); +void rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* set ethertype filter enable */ -void rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, u32 filter); +void rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ -void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, u32 etht_rx_queue_en, - u32 filter); +void rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue_en, + uint32_t filter); /* set ethertype rx queue */ -void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ -void rpf_etht_user_priority_set(struct aq_hw *aq_hw, u32 etht_user_priority, - u32 filter); +void rpf_etht_user_priority_set(struct aq_hw *aq_hw, + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* rpo */ /* set ipv4 header checksum offload enable */ void rpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en); + uint32_t ipv4header_crc_offload_en); /* set rx descriptor vlan stripping */ void rpo_rx_desc_vlan_stripping_set(struct aq_hw *aq_hw, - u32 rx_desc_vlan_stripping, - u32 descriptor); + uint32_t rx_desc_vlan_stripping, uint32_t descriptor); /* set tcp/udp checksum offload enable */ void rpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en); + uint32_t tcp_udp_crc_offload_en); /* Set LRO Patch Optimization Enable. */ void rpo_lro_patch_optimization_en_set(struct aq_hw *aq_hw, - u32 lro_patch_optimization_en); + uint32_t lro_patch_optimization_en); /* Set Large Receive Offload Enable */ -void rpo_lro_en_set(struct aq_hw *aq_hw, u32 lro_en); +void rpo_lro_en_set(struct aq_hw *aq_hw, uint32_t lro_en); /* Set LRO Q Sessions Limit */ -void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, u32 lro_qsessions_lim); +void rpo_lro_qsessions_lim_set(struct aq_hw *aq_hw, uint32_t lro_qsessions_lim); /* Set LRO Total Descriptor Limit */ -void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, u32 lro_total_desc_lim); +void rpo_lro_total_desc_lim_set(struct aq_hw *aq_hw, + uint32_t lro_total_desc_lim); /* Set LRO Min Payload of First Packet */ void rpo_lro_min_pay_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lro_min_pld_of_first_pkt); + uint32_t lro_min_pld_of_first_pkt); /* Set LRO Packet Limit */ -void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, u32 lro_packet_lim); +void rpo_lro_pkt_lim_set(struct aq_hw *aq_hw, uint32_t lro_packet_lim); /* Set LRO Max Number of Descriptors */ void rpo_lro_max_num_of_descriptors_set(struct aq_hw *aq_hw, - u32 lro_max_desc_num, u32 lro); + uint32_t lro_max_desc_num, uint32_t lro); /* Set LRO Time Base Divider */ void rpo_lro_time_base_divider_set(struct aq_hw *aq_hw, - u32 lro_time_base_divider); - + uint32_t lro_time_base_divider); /*Set LRO Inactive Interval */ void rpo_lro_inactive_interval_set(struct aq_hw *aq_hw, - u32 lro_inactive_interval); + uint32_t lro_inactive_interval); /*Set LRO Max Coalescing Interval */ void rpo_lro_max_coalescing_interval_set(struct aq_hw *aq_hw, - u32 lro_max_coalescing_interval); + uint32_t lro_max_coalescing_interval); /* rx */ /* set rx register reset disable */ -void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, u32 rx_reg_res_dis); +void rx_rx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t rx_reg_res_dis); /* tdm */ /* set cpu id */ -void tdm_cpu_id_set(struct aq_hw *aq_hw, u32 cpuid, u32 dca); +void tdm_cpu_id_set(struct aq_hw *aq_hw, uint32_t cpuid, uint32_t dca); /* set large send offload enable */ void tdm_large_send_offload_en_set(struct aq_hw *aq_hw, - u32 large_send_offload_en); + uint32_t large_send_offload_en); /* set tx descriptor enable */ -void tdm_tx_desc_en_set(struct aq_hw *aq_hw, u32 tx_desc_en, u32 descriptor); +void tdm_tx_desc_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_en, + uint32_t descriptor); /* set tx dca enable */ -void tdm_tx_dca_en_set(struct aq_hw *aq_hw, u32 tx_dca_en); +void tdm_tx_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_dca_en); /* set tx dca mode */ -void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, u32 tx_dca_mode); +void tdm_tx_dca_mode_set(struct aq_hw *aq_hw, uint32_t tx_dca_mode); /* set tx descriptor dca enable */ -void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, u32 tx_desc_dca_en, u32 dca); +void tdm_tx_desc_dca_en_set(struct aq_hw *aq_hw, uint32_t tx_desc_dca_en, + uint32_t dca); /* get tx descriptor head pointer */ -u32 tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, u32 descriptor); +uint32_t tdm_tx_desc_head_ptr_get(struct aq_hw *aq_hw, uint32_t descriptor); /* set tx descriptor length */ -void tdm_tx_desc_len_set(struct aq_hw *aq_hw, u32 tx_desc_len, - u32 descriptor); +void tdm_tx_desc_len_set(struct aq_hw *aq_hw, uint32_t tx_desc_len, + uint32_t descriptor); /* set tx descriptor write-back interrupt enable */ void tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_irq_en); + uint32_t tx_desc_wr_wb_irq_en); /* set tx descriptor write-back threshold */ void tdm_tx_desc_wr_wb_threshold_set(struct aq_hw *aq_hw, - u32 tx_desc_wr_wb_threshold, - u32 descriptor); + uint32_t tx_desc_wr_wb_threshold, uint32_t descriptor); /* Set TDM Interrupt Moderation Enable */ void tdm_tdm_intr_moder_en_set(struct aq_hw *aq_hw, - u32 tdm_irq_moderation_en); + uint32_t tdm_irq_moderation_en); /* thm */ /* set lso tcp flag of first packet */ void thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_first_pkt); + uint32_t lso_tcp_flag_of_first_pkt); /* set lso tcp flag of last packet */ void thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_last_pkt); + uint32_t lso_tcp_flag_of_last_pkt); /* set lso tcp flag of middle packet */ void thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw *aq_hw, - u32 lso_tcp_flag_of_middle_pkt); + uint32_t lso_tcp_flag_of_middle_pkt); /* tpb */ /* set tx buffer enable */ -void tpb_tx_buff_en_set(struct aq_hw *aq_hw, u32 tx_buff_en); +void tpb_tx_buff_en_set(struct aq_hw *aq_hw, uint32_t tx_buff_en); /* set tx tc mode */ -void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, u32 tc_mode); +void tpb_tx_tc_mode_set(struct aq_hw *aq_hw, uint32_t tc_mode); /* set tx buffer high threshold (per tc) */ void tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_hi_threshold_per_tc, - u32 buffer); + uint32_t tx_buff_hi_threshold_per_tc, uint32_t buffer); /* set tx buffer low threshold (per tc) */ void tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw *aq_hw, - u32 tx_buff_lo_threshold_per_tc, - u32 buffer); + uint32_t tx_buff_lo_threshold_per_tc, uint32_t buffer); /* set tx dma system loopback enable */ -void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_dma_sys_lbk_en); +void tpb_tx_dma_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_dma_sys_lbk_en); /* set tx packet buffer size (per tc) */ void tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw *aq_hw, - u32 tx_pkt_buff_size_per_tc, u32 buffer); + uint32_t tx_pkt_buff_size_per_tc, uint32_t buffer); /* toggle rdm rx dma descriptor cache init */ void rdm_rx_dma_desc_cache_init_tgl(struct aq_hw *aq_hw); /* set tx path pad insert enable */ -void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, u32 tx_path_scp_ins_en); +void tpb_tx_path_scp_ins_en_set(struct aq_hw *aq_hw, + uint32_t tx_path_scp_ins_en); /* tpo */ /* set ipv4 header checksum offload enable */ void tpo_ipv4header_crc_offload_en_set(struct aq_hw *aq_hw, - u32 ipv4header_crc_offload_en); + uint32_t ipv4header_crc_offload_en); /* set tcp/udp checksum offload enable */ void tpo_tcp_udp_crc_offload_en_set(struct aq_hw *aq_hw, - u32 tcp_udp_crc_offload_en); + uint32_t tcp_udp_crc_offload_en); /* set tx pkt system loopback enable */ -void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, u32 tx_pkt_sys_lbk_en); +void tpo_tx_pkt_sys_lbk_en_set(struct aq_hw *aq_hw, uint32_t tx_pkt_sys_lbk_en); /* tps */ /* set tx packet scheduler data arbitration mode */ void tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_data_arb_mode); + uint32_t tx_pkt_shed_data_arb_mode); /* set tx packet scheduler descriptor rate current time reset */ void tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw *aq_hw, - u32 curr_time_res); + uint32_t curr_time_res); /* set tx packet scheduler descriptor rate limit */ void tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_rate_lim); + uint32_t tx_pkt_shed_desc_rate_lim); /* set tx packet scheduler descriptor tc arbitration mode */ void tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_arb_mode); + uint32_t tx_pkt_shed_desc_tc_arb_mode); /* set tx packet scheduler descriptor tc max credit */ void tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_max_credit, - u32 tc); + uint32_t tx_pkt_shed_desc_tc_max_credit, uint32_t tc); /* set tx packet scheduler descriptor tc weight */ void tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_tc_weight, - u32 tc); + uint32_t tx_pkt_shed_desc_tc_weight, uint32_t tc); /* set tx packet scheduler descriptor vm arbitration mode */ void tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_desc_vm_arb_mode); + uint32_t tx_pkt_shed_desc_vm_arb_mode); /* set tx packet scheduler tc data max credit */ void tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_max_credit, - u32 tc); + uint32_t tx_pkt_shed_tc_data_max_credit, uint32_t tc); /* set tx packet scheduler tc data weight */ void tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw *aq_hw, - u32 tx_pkt_shed_tc_data_weight, - u32 tc); + uint32_t tx_pkt_shed_tc_data_weight, uint32_t tc); /* tx */ /* set tx register reset disable */ -void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, u32 tx_reg_res_dis); +void tx_tx_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t tx_reg_res_dis); /* msm */ /* get register access status */ -u32 msm_reg_access_status_get(struct aq_hw *aq_hw); +uint32_t msm_reg_access_status_get(struct aq_hw *aq_hw); /* set register address for indirect address */ void msm_reg_addr_for_indirect_addr_set(struct aq_hw *aq_hw, - u32 reg_addr_for_indirect_addr); + uint32_t reg_addr_for_indirect_addr); /* set register read strobe */ -void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, u32 reg_rd_strobe); +void msm_reg_rd_strobe_set(struct aq_hw *aq_hw, uint32_t reg_rd_strobe); /* get register read data */ -u32 msm_reg_rd_data_get(struct aq_hw *aq_hw); +uint32_t msm_reg_rd_data_get(struct aq_hw *aq_hw); /* set register write data */ -void msm_reg_wr_data_set(struct aq_hw *aq_hw, u32 reg_wr_data); +void msm_reg_wr_data_set(struct aq_hw *aq_hw, uint32_t reg_wr_data); /* set register write strobe */ -void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, u32 reg_wr_strobe); +void msm_reg_wr_strobe_set(struct aq_hw *aq_hw, uint32_t reg_wr_strobe); /* pci */ /* set pci register reset disable */ -void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, u32 pci_reg_res_dis); +void pci_pci_reg_res_dis_set(struct aq_hw *aq_hw, uint32_t pci_reg_res_dis); /* -* \brief Set MIF Power Gating Enable Control -*/ -void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, u32 value); + * \brief Set MIF Power Gating Enable Control + */ +void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value); /* -* \brief Get MIF Power Gating Enable Control -* \return MifPowerGatingEnableControl -*/ -u32 reg_mif_power_gating_enable_control_get(struct aq_hw* hw); + * \brief Get MIF Power Gating Enable Control + * \return MifPowerGatingEnableControl + */ +uint32_t reg_mif_power_gating_enable_control_get(struct aq_hw* hw); /* get mif up mailbox busy */ -u32 mif_mcp_up_mailbox_busy_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_busy_get(struct aq_hw *aq_hw); /* set mif up mailbox execute operation */ -void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, u32 value); +void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value); /* get mif uP mailbox address */ -u32 mif_mcp_up_mailbox_addr_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_addr_get(struct aq_hw *aq_hw); /* set mif uP mailbox address */ -void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, u32 value); +void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value); /* get mif uP mailbox data */ -u32 mif_mcp_up_mailbox_data_get(struct aq_hw *aq_hw); +uint32_t mif_mcp_up_mailbox_data_get(struct aq_hw *aq_hw); /* clear ipv4 filter destination address */ -void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv4 filter source address */ -void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear command for filter l3-l4 */ -void hw_atl_rpfl3l4_cmd_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_cmd_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv6 filter destination address */ -void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* clear ipv6 filter source address */ -void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw *aq_hw, u8 location); +void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw *aq_hw, uint8_t location); /* set ipv4 filter destination address */ -void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw *aq_hw, u8 location, - u32 ipv4_dest); +void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t ipv4_dest); /* set ipv4 filter source address */ -void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw *aq_hw, u8 location, - u32 ipv4_src); +void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t ipv4_src); /* set command for filter l3-l4 */ -void hw_atl_rpfl3l4_cmd_set(struct aq_hw *aq_hw, u8 location, u32 cmd); +void hw_atl_rpfl3l4_cmd_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t cmd); /* set ipv6 filter source address */ -void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw *aq_hw, u8 location, - u32 *ipv6_src); +void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t *ipv6_src); /* set ipv6 filter destination address */ -void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw *aq_hw, u8 location, - u32 *ipv6_dest); +void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw *aq_hw, uint8_t location, + uint32_t *ipv6_dest); /* set vlan inner ethertype */ -void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, u32 vlan_inner_etht); +void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_inner_etht); /* set vlan outer ethertype */ -void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, u32 vlan_outer_etht); +void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, + uint32_t vlan_outer_etht); /* set vlan promiscuous mode enable */ void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw, - u32 vlan_prom_mode_en); + uint32_t vlan_prom_mode_en); /* Set VLAN untagged action */ void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw *aq_hw, - u32 vlan_untagged_act); + uint32_t vlan_untagged_act); /* Set VLAN accept untagged packets */ void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw, - u32 vlan_acc_untagged_packets); + uint32_t vlan_acc_untagged_packets); /* Set VLAN filter enable */ -void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, u32 vlan_flr_en, - u32 filter); +void hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en, + uint32_t filter); /* Set VLAN Filter Action */ -void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, u32 vlan_filter_act, - u32 filter); +void hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_filter_act, + uint32_t filter); /* Set VLAN ID Filter */ -void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, u32 vlan_id_flr, - u32 filter); +void hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr, + uint32_t filter); /* Set VLAN RX queue assignment enable */ -void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq_en, - u32 filter); +void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq_en, + uint32_t filter); /* Set VLAN RX queue */ -void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, u32 vlan_rxq, - u32 filter); +void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq, + uint32_t filter); /* set ethertype filter enable */ -void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, u32 etht_flr_en, - u32 filter); +void hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en, + uint32_t filter); /* set ethertype user-priority enable */ void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw *aq_hw, - u32 etht_user_priority_en, - u32 filter); + uint32_t etht_user_priority_en, uint32_t filter); /* set ethertype rx queue enable */ void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw, - u32 etht_rx_queue_en, - u32 filter); + uint32_t etht_rx_queue_en, uint32_t filter); /* set ethertype rx queue */ -void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, u32 etht_rx_queue, - u32 filter); +void hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue, + uint32_t filter); /* set ethertype user-priority */ void hw_atl_rpf_etht_user_priority_set(struct aq_hw *aq_hw, - u32 etht_user_priority, - u32 filter); + uint32_t etht_user_priority, uint32_t filter); /* set ethertype management queue */ -void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, u32 etht_mgt_queue, - u32 filter); +void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue, + uint32_t filter); /* set ethertype filter action */ -void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, u32 etht_flr_act, - u32 filter); +void hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act, + uint32_t filter); /* set ethertype filter */ -void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, u32 etht_flr, u32 filter); +void hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr, + uint32_t filter); /* set L3/L4 filter enable */ -void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 IPv6 enable */ -void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 source address enable */ -void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 destination address enable */ -void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port enable */ -void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 destination port enable */ -void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol enable */ -void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3 ARP filter enable */ -void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue enable */ -void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 management queue */ -void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 filter action */ -void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L3/L4 rx queue */ -void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 protocol value */ -void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, + uint32_t filter); /* set L4 source port */ -void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); /* set L4 destination port */ -void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, u32 val, u32 filter); +void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter); #endif /* HW_ATL_LLH_H */ diff --git a/sys/dev/aq/aq_hw_llh_internal.h b/sys/dev/aq/aq_hw_llh_internal.h index 4a5b234a6e91..bad3c1640cf8 100644 --- a/sys/dev/aq/aq_hw_llh_internal.h +++ b/sys/dev/aq/aq_hw_llh_internal.h @@ -3248,7 +3248,7 @@ /* tx dma descriptor base address msw definitions */ #define tx_dma_desc_base_addrmsw_adr(descriptor) \ - (0x00007c04u + (descriptor) * 0x40) + (0x00007c04u + (descriptor) * 0x40) /* tx interrupt moderation control register definitions * Preprocessor definitions for TX Interrupt Moderation Control Register diff --git a/sys/dev/aq/aq_irq.c b/sys/dev/aq/aq_irq.c index 4ffccc00ea98..6338a7777dee 100644 --- a/sys/dev/aq/aq_irq.c +++ b/sys/dev/aq/aq_irq.c @@ -37,14 +37,14 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include "aq_common.h" @@ -54,60 +54,60 @@ __FBSDID("$FreeBSD$"); #include "aq_hw.h" #include "aq_hw_llh.h" -int aq_update_hw_stats(aq_dev_t *aq_dev) +int +aq_update_hw_stats(aq_dev_t *aq_dev) { - struct aq_hw *hw = &aq_dev->hw; - struct aq_hw_fw_mbox mbox; + struct aq_hw *hw = &aq_dev->hw; + struct aq_hw_fw_mbox mbox; - aq_hw_mpi_read_stats(hw, &mbox); + aq_hw_mpi_read_stats(hw, &mbox); #define AQ_SDELTA(_N_) (aq_dev->curr_stats._N_ += \ - mbox.stats._N_ - aq_dev->last_stats._N_) - if (aq_dev->linkup) { - AQ_SDELTA(uprc); - AQ_SDELTA(mprc); - AQ_SDELTA(bprc); - AQ_SDELTA(cprc); - AQ_SDELTA(erpt); - - AQ_SDELTA(uptc); - AQ_SDELTA(mptc); - AQ_SDELTA(bptc); - AQ_SDELTA(erpr); - - AQ_SDELTA(ubrc); - AQ_SDELTA(ubtc); - AQ_SDELTA(mbrc); - AQ_SDELTA(mbtc); - AQ_SDELTA(bbrc); - AQ_SDELTA(bbtc); - - AQ_SDELTA(ptc); - AQ_SDELTA(prc); - - AQ_SDELTA(dpc); - - aq_dev->curr_stats.brc = aq_dev->curr_stats.ubrc + - aq_dev->curr_stats.mbrc + - aq_dev->curr_stats.bbrc; - aq_dev->curr_stats.btc = aq_dev->curr_stats.ubtc + - aq_dev->curr_stats.mbtc + - aq_dev->curr_stats.bbtc; - - } + mbox.stats._N_ - aq_dev->last_stats._N_) + if (aq_dev->linkup) { + AQ_SDELTA(uprc); + AQ_SDELTA(mprc); + AQ_SDELTA(bprc); + AQ_SDELTA(cprc); + AQ_SDELTA(erpt); + + AQ_SDELTA(uptc); + AQ_SDELTA(mptc); + AQ_SDELTA(bptc); + AQ_SDELTA(erpr); + + AQ_SDELTA(ubrc); + AQ_SDELTA(ubtc); + AQ_SDELTA(mbrc); + AQ_SDELTA(mbtc); + AQ_SDELTA(bbrc); + AQ_SDELTA(bbtc); + + AQ_SDELTA(ptc); + AQ_SDELTA(prc); + + AQ_SDELTA(dpc); + + aq_dev->curr_stats.brc = aq_dev->curr_stats.ubrc + + aq_dev->curr_stats.mbrc + aq_dev->curr_stats.bbrc; + aq_dev->curr_stats.btc = aq_dev->curr_stats.ubtc + + aq_dev->curr_stats.mbtc + aq_dev->curr_stats.bbtc; + + } #undef AQ_SDELTA - memcpy(&aq_dev->last_stats, &mbox.stats, sizeof(mbox.stats)); + memcpy(&aq_dev->last_stats, &mbox.stats, sizeof(mbox.stats)); - return (0); + return (0); } -void aq_if_update_admin_status(if_ctx_t ctx) +void +aq_if_update_admin_status(if_ctx_t ctx) { aq_dev_t *aq_dev = iflib_get_softc(ctx); struct aq_hw *hw = &aq_dev->hw; - u32 link_speed; + uint32_t link_speed; // AQ_DBG_ENTER(); @@ -156,7 +156,8 @@ void aq_if_update_admin_status(if_ctx_t ctx) /**************************************************************************/ /* interrupt service routine (Top half) */ /**************************************************************************/ -int aq_isr_rx(void *arg) +int +aq_isr_rx(void *arg) { struct aq_ring *ring = arg; struct aq_dev *aq_dev = ring->dev; @@ -171,7 +172,8 @@ int aq_isr_rx(void *arg) /**************************************************************************/ /* interrupt service routine (Top half) */ /**************************************************************************/ -int aq_linkstat_isr(void *arg) +int +aq_linkstat_isr(void *arg) { aq_dev_t *aq_dev = arg; struct aq_hw *hw = &aq_dev->hw; diff --git a/sys/dev/aq/aq_main.c b/sys/dev/aq/aq_main.c index 48f8305fcd15..2ed9bd050780 100644 --- a/sys/dev/aq/aq_main.c +++ b/sys/dev/aq/aq_main.c @@ -32,23 +32,26 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); +#include "opt_inet.h" +#include "opt_inet6.h" +#include "opt_rss.h" + #include <sys/param.h> -#include <sys/malloc.h> -#include <sys/socket.h> -#include <sys/kernel.h> +#include <sys/bitstring.h> #include <sys/bus.h> +#include <sys/endian.h> +#include <sys/kernel.h> +#include <sys/malloc.h> #include <sys/module.h> +#include <sys/priv.h> #include <sys/rman.h> -#include <sys/endian.h> +#include <sys/sbuf.h> +#include <sys/socket.h> #include <sys/sockio.h> -#include <sys/priv.h> #include <sys/sysctl.h> -#include <sys/sbuf.h> -#include <sys/bitstring.h> #include <machine/bus.h> #include <machine/resource.h> @@ -56,18 +59,14 @@ __FBSDID("$FreeBSD$"); #include <dev/pci/pcireg.h> #include <dev/pci/pcivar.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include <net/rss_config.h> -#include "opt_inet.h" -#include "opt_inet6.h" -#include "opt_rss.h" - #include "ifdi_if.h" #include "aq_device.h" @@ -110,25 +109,41 @@ char aq_driver_version[] = AQ_VER; #define AQ_DEVICE_ID_AQC112S 0x92B1 static pci_vendor_info_t aq_vendor_info_array[] = { - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_0001, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D107, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D108, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D109, "Aquantia AQtion 2.5Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100, "Aquantia AQtion 10Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107S, "Aquantia AQtion 10Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108S, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109S, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100S, "Aquantia AQtion 10Gbit Network Adapter"), - - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112, "Aquantia AQtion 2.5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111S, "Aquantia AQtion 5Gbit Network Adapter"), - PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112S, "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_0001, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D107, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D108, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_D109, + "Aquantia AQtion 2.5Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100, + "Aquantia AQtion 10Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC107S, + "Aquantia AQtion 10Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC108S, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC109S, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC100S, + "Aquantia AQtion 10Gbit Network Adapter"), + + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112, + "Aquantia AQtion 2.5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC111S, + "Aquantia AQtion 5Gbit Network Adapter"), + PVID(AQUANTIA_VENDOR_ID, AQ_DEVICE_ID_AQC112S, + "Aquantia AQtion 2.5Gbit Network Adapter"), PVID_END }; @@ -292,19 +307,21 @@ static struct if_shared_ctx aq_sctx_init = { static SYSCTL_NODE(_hw, OID_AUTO, aq, CTLFLAG_RD, 0, "Atlantic driver parameters"); /* UDP Receive-Side Scaling */ static int aq_enable_rss_udp = 1; -SYSCTL_INT(_hw_aq, OID_AUTO, enable_rss_udp, CTLFLAG_RDTUN, &aq_enable_rss_udp, 0, - "Enable Receive-Side Scaling (RSS) for UDP"); +SYSCTL_INT(_hw_aq, OID_AUTO, enable_rss_udp, CTLFLAG_RDTUN, &aq_enable_rss_udp, + 0, "Enable Receive-Side Scaling (RSS) for UDP"); /* * Device Methods */ -static void *aq_register(device_t dev) +static void * +aq_register(device_t dev) { return (&aq_sctx_init); } -static int aq_if_attach_pre(if_ctx_t ctx) +static int +aq_if_attach_pre(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -335,7 +352,7 @@ static int aq_if_attach_pre(if_ctx_t ctx) softc->mmio_tag = rman_get_bustag(softc->mmio_res); softc->mmio_handle = rman_get_bushandle(softc->mmio_res); softc->mmio_size = rman_get_size(softc->mmio_res); - softc->hw.hw_addr = (u8*) softc->mmio_handle; + softc->hw.hw_addr = (uint8_t*) softc->mmio_handle; hw = &softc->hw; hw->link_rate = aq_fw_speed_auto; hw->itr = -1; @@ -371,22 +388,21 @@ static int aq_if_attach_pre(if_ctx_t ctx) #endif scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO; #if __FreeBSD__ >= 12 - scctx->isc_capabilities = IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | IFCAP_TSO | - IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | - IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | - IFCAP_VLAN_HWCSUM; + scctx->isc_capabilities = IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | + IFCAP_TSO | IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | IFCAP_VLAN_MTU | + IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM; scctx->isc_capenable = scctx->isc_capabilities; #else if_t ifp; ifp = iflib_get_ifp(ctx); - if_setcapenable(ifp, IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | IFCAP_TSO | - IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | - IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | - IFCAP_VLAN_HWCSUM; + if_setcapenable(ifp, IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_HWCSUM | + IFCAP_TSO | IFCAP_JUMBO_MTU | IFCAP_VLAN_HWFILTER | IFCAP_VLAN_MTU | + IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM; #endif scctx->isc_tx_nsegments = 31, scctx->isc_tx_tso_segments_max = 31; - scctx->isc_tx_tso_size_max = HW_ATL_B0_TSO_SIZE - sizeof(struct ether_vlan_header); + scctx->isc_tx_tso_size_max = + HW_ATL_B0_TSO_SIZE - sizeof(struct ether_vlan_header); scctx->isc_tx_tso_segsize_max = HW_ATL_B0_MTU_JUMBO; scctx->isc_min_frame_size = 52; scctx->isc_txrx = &aq_txrx; @@ -415,7 +431,8 @@ fail: } -static int aq_if_attach_post(if_ctx_t ctx) +static int +aq_if_attach_post(if_ctx_t ctx) { struct aq_dev *softc; int rc; @@ -434,7 +451,7 @@ static int aq_if_attach_post(if_ctx_t ctx) case IFLIB_INTR_LEGACY: rc = EOPNOTSUPP; goto exit; - goto exit; + goto exit; break; case IFLIB_INTR_MSI: break; @@ -458,7 +475,8 @@ exit: } -static int aq_if_detach(if_ctx_t ctx) +static int +aq_if_detach(if_ctx_t ctx) { struct aq_dev *softc; int i; @@ -483,7 +501,8 @@ static int aq_if_detach(if_ctx_t ctx) return (0); } -static int aq_if_shutdown(if_ctx_t ctx) +static int +aq_if_shutdown(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -494,7 +513,8 @@ static int aq_if_shutdown(if_ctx_t ctx) return (0); } -static int aq_if_suspend(if_ctx_t ctx) +static int +aq_if_suspend(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -504,7 +524,8 @@ static int aq_if_suspend(if_ctx_t ctx) return (0); } -static int aq_if_resume(if_ctx_t ctx) +static int +aq_if_resume(if_ctx_t ctx) { AQ_DBG_ENTER(); @@ -515,8 +536,9 @@ static int aq_if_resume(if_ctx_t ctx) } /* Soft queue setup and teardown */ -static int aq_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, - uint64_t *paddrs, int ntxqs, int ntxqsets) +static int +aq_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, + int ntxqs, int ntxqsets) { struct aq_dev *softc; struct aq_ring *ring; @@ -553,8 +575,9 @@ fail: return (rc); } -static int aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, - uint64_t *paddrs, int nrxqs, int nrxqsets) +static int +aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, + int nrxqs, int nrxqsets) { struct aq_dev *softc; struct aq_ring *ring; @@ -568,7 +591,8 @@ static int aq_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, M_AQ, M_NOWAIT | M_ZERO); if (!ring){ rc = ENOMEM; - device_printf(softc->dev, "atlantic: rx_ring malloc fail\n"); + device_printf(softc->dev, + "atlantic: rx_ring malloc fail\n"); goto fail; } @@ -601,7 +625,8 @@ fail: return (rc); } -static void aq_if_queues_free(if_ctx_t ctx) +static void +aq_if_queues_free(if_ctx_t ctx) { struct aq_dev *softc; int i; @@ -629,7 +654,8 @@ static void aq_if_queues_free(if_ctx_t ctx) } /* Device configuration */ -static void aq_if_init(if_ctx_t ctx) +static void +aq_if_init(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -641,7 +667,7 @@ static void aq_if_init(if_ctx_t ctx) hw = &softc->hw; err = aq_hw_init(&softc->hw, softc->hw.mac_addr, softc->msix, - softc->scctx->isc_intr == IFLIB_INTR_MSIX); + softc->scctx->isc_intr == IFLIB_INTR_MSIX); if (err != EOK) { device_printf(softc->dev, "atlantic: aq_hw_init: %d", err); } @@ -654,22 +680,26 @@ static void aq_if_init(if_ctx_t ctx) struct aq_ring *ring = softc->tx_rings[i]; err = aq_ring_tx_init(&softc->hw, ring); if (err) { - device_printf(softc->dev, "atlantic: aq_ring_tx_init: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_tx_init: %d", err); } err = aq_ring_tx_start(hw, ring); if (err != EOK) { - device_printf(softc->dev, "atlantic: aq_ring_tx_start: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_tx_start: %d", err); } } for (i = 0; i < softc->rx_rings_count; i++) { struct aq_ring *ring = softc->rx_rings[i]; err = aq_ring_rx_init(&softc->hw, ring); if (err) { - device_printf(softc->dev, "atlantic: aq_ring_rx_init: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_rx_init: %d", err); } err = aq_ring_rx_start(hw, ring); if (err != EOK) { - device_printf(softc->dev, "atlantic: aq_ring_rx_start: %d", err); + device_printf(softc->dev, + "atlantic: aq_ring_rx_start: %d", err); } aq_if_rx_queue_intr_enable(ctx, i); } @@ -685,7 +715,8 @@ static void aq_if_init(if_ctx_t ctx) } -static void aq_if_stop(if_ctx_t ctx) +static void +aq_if_stop(if_ctx_t ctx) { struct aq_dev *softc; struct aq_hw *hw; @@ -715,7 +746,8 @@ static void aq_if_stop(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static uint64_t aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) +static uint64_t +aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -733,11 +765,12 @@ static uint64_t aq_if_get_counter(if_ctx_t ctx, ift_counter cnt) } #if __FreeBSD_version >= 1300054 -static u_int aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) +static u_int +aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) { struct aq_dev *softc = arg; struct aq_hw *hw = &softc->hw; - u8 *mac_addr = NULL; + uint8_t *mac_addr = NULL; if (count == AQ_HW_MAC_MAX) return (0); @@ -749,11 +782,12 @@ static u_int aq_mc_filter_apply(void *arg, struct sockaddr_dl *dl, u_int count) return (1); } #else -static int aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) +static int +aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) { struct aq_dev *softc = arg; struct aq_hw *hw = &softc->hw; - u8 *mac_addr = NULL; + uint8_t *mac_addr = NULL; if (ifma->ifma_addr->sa_family != AF_LINK) return (0); @@ -768,12 +802,14 @@ static int aq_mc_filter_apply(void *arg, struct ifmultiaddr *ifma, int count) } #endif -static bool aq_is_mc_promisc_required(struct aq_dev *softc) +static bool +aq_is_mc_promisc_required(struct aq_dev *softc) { return (softc->mcnt >= AQ_HW_MAC_MAX); } -static void aq_if_multi_set(if_ctx_t ctx) +static void +aq_if_multi_set(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -784,12 +820,11 @@ static void aq_if_multi_set(if_ctx_t ctx) #else softc->mcnt = if_multiaddr_count(iflib_get_ifp(ctx), AQ_HW_MAC_MAX); #endif - if (softc->mcnt >= AQ_HW_MAC_MAX) - { + if (softc->mcnt >= AQ_HW_MAC_MAX) { aq_hw_set_promisc(hw, !!(if_getflags(ifp) & IFF_PROMISC), - aq_is_vlan_promisc_required(softc), - !!(if_getflags(ifp) & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); - }else{ + aq_is_vlan_promisc_required(softc), + !!(if_getflags(ifp) & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); + } else { #if __FreeBSD_version >= 1300054 if_foreach_llmaddr(iflib_get_ifp(ctx), &aq_mc_filter_apply, softc); #else @@ -799,7 +834,8 @@ static void aq_if_multi_set(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static int aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) +static int +aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) { int err = 0; AQ_DBG_ENTER(); @@ -808,7 +844,8 @@ static int aq_if_mtu_set(if_ctx_t ctx, uint32_t mtu) return (err); } -static void aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) +static void +aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) { if_t ifp; @@ -821,7 +858,8 @@ static void aq_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) AQ_DBG_EXIT(0); } -static int aq_if_media_change(if_ctx_t ctx) +static int +aq_if_media_change(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); if_t ifp = iflib_get_ifp(ctx); @@ -844,7 +882,8 @@ exit: return (rc); } -static int aq_if_promisc_set(if_ctx_t ctx, int flags) +static int +aq_if_promisc_set(if_ctx_t ctx, int flags) { struct aq_dev *softc; @@ -853,14 +892,15 @@ static int aq_if_promisc_set(if_ctx_t ctx, int flags) softc = iflib_get_softc(ctx); aq_hw_set_promisc(&softc->hw, !!(flags & IFF_PROMISC), - aq_is_vlan_promisc_required(softc), - !!(flags & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); + aq_is_vlan_promisc_required(softc), + !!(flags & IFF_ALLMULTI) || aq_is_mc_promisc_required(softc)); AQ_DBG_EXIT(0); return (0); } -static void aq_if_timer(if_ctx_t ctx, uint16_t qid) +static void +aq_if_timer(if_ctx_t ctx, uint16_t qid) { struct aq_dev *softc; uint64_t ticks_now; @@ -882,7 +922,8 @@ static void aq_if_timer(if_ctx_t ctx, uint16_t qid) } /* Interrupt enable / disable */ -static void aq_if_enable_intr(if_ctx_t ctx) +static void +aq_if_enable_intr(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -895,7 +936,8 @@ static void aq_if_enable_intr(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static void aq_if_disable_intr(if_ctx_t ctx) +static void +aq_if_disable_intr(if_ctx_t ctx) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -908,7 +950,8 @@ static void aq_if_disable_intr(if_ctx_t ctx) AQ_DBG_EXIT(0); } -static int aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) +static int +aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -921,7 +964,8 @@ static int aq_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) return (0); } -static int aq_if_msix_intr_assign(if_ctx_t ctx, int msix) +static int +aq_if_msix_intr_assign(if_ctx_t ctx, int msix) { struct aq_dev *softc; int i, vector = 0, rc; @@ -952,22 +996,22 @@ static int aq_if_msix_intr_assign(if_ctx_t ctx, int msix) for (i = 0; i < softc->tx_rings_count; i++, vector++) { snprintf(irq_name, sizeof(irq_name), "txq%d", i); - iflib_softirq_alloc_generic(ctx, &softc->rx_rings[i]->irq, IFLIB_INTR_TX, - softc->tx_rings[i], i, irq_name); + iflib_softirq_alloc_generic(ctx, &softc->rx_rings[i]->irq, + IFLIB_INTR_TX, softc->tx_rings[i], i, irq_name); softc->tx_rings[i]->msix = (vector % softc->rx_rings_count); device_printf(softc->dev, "Assign IRQ %u to tx ring %u\n", - softc->tx_rings[i]->msix, softc->tx_rings[i]->index); + softc->tx_rings[i]->msix, softc->tx_rings[i]->index); } rc = iflib_irq_alloc_generic(ctx, &softc->irq, rx_vectors + 1, - IFLIB_INTR_ADMIN, aq_linkstat_isr, - softc, 0, "aq"); + IFLIB_INTR_ADMIN, aq_linkstat_isr, softc, 0, "aq"); softc->msix = rx_vectors; device_printf(softc->dev, "Assign IRQ %u to admin proc \n", - rx_vectors); + rx_vectors); if (rc) { - device_printf(iflib_get_dev(ctx), "Failed to register admin handler"); + device_printf(iflib_get_dev(ctx), + "Failed to register admin handler"); i = softc->rx_rings_count; goto fail; } @@ -981,7 +1025,8 @@ fail: return (rc); } -static bool aq_is_vlan_promisc_required(struct aq_dev *softc) +static bool +aq_is_vlan_promisc_required(struct aq_dev *softc) { int vlan_tag_count; @@ -994,7 +1039,8 @@ static bool aq_is_vlan_promisc_required(struct aq_dev *softc) } -static void aq_update_vlan_filters(struct aq_dev *softc) +static void +aq_update_vlan_filters(struct aq_dev *softc) { struct aq_rx_filter_vlan aq_vlans[AQ_HW_VLAN_MAX_FILTERS]; struct aq_hw *hw = &softc->hw; @@ -1021,7 +1067,8 @@ static void aq_update_vlan_filters(struct aq_dev *softc) } /* VLAN support */ -static void aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) +static void +aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) { struct aq_dev *softc = iflib_get_softc(ctx); @@ -1034,7 +1081,8 @@ static void aq_if_vlan_register(if_ctx_t ctx, uint16_t vtag) AQ_DBG_EXIT(0); } -static void aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) +static void +aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) { struct aq_dev *softc = iflib_get_softc(ctx); @@ -1047,7 +1095,8 @@ static void aq_if_vlan_unregister(if_ctx_t ctx, uint16_t vtag) AQ_DBG_EXIT(0); } -static void aq_if_led_func(if_ctx_t ctx, int onoff) +static void +aq_if_led_func(if_ctx_t ctx, int onoff) { struct aq_dev *softc = iflib_get_softc(ctx); struct aq_hw *hw = &softc->hw; @@ -1059,7 +1108,8 @@ static void aq_if_led_func(if_ctx_t ctx, int onoff) AQ_DBG_EXIT(0); } -static int aq_hw_capabilities(struct aq_dev *softc) +static int +aq_hw_capabilities(struct aq_dev *softc) { if (pci_get_vendor(softc->dev) != AQUANTIA_VENDOR_ID) @@ -1106,7 +1156,8 @@ static int aq_hw_capabilities(struct aq_dev *softc) return (0); } -static int aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) { struct aq_dev *softc = (struct aq_dev *)arg1; device_t dev = softc->dev; @@ -1142,7 +1193,8 @@ static int aq_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1160,7 +1212,8 @@ static int aq_sysctl_print_tx_head(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1178,7 +1231,8 @@ static int aq_sysctl_print_tx_tail(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1196,7 +1250,8 @@ static int aq_sysctl_print_rx_head(SYSCTL_HANDLER_ARGS) return (0); } -static int aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) +static int +aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) { struct aq_ring *ring = arg1; int error = 0; @@ -1214,116 +1269,117 @@ static int aq_sysctl_print_rx_tail(SYSCTL_HANDLER_ARGS) return (0); } -static void aq_add_stats_sysctls(struct aq_dev *softc) +static void +aq_add_stats_sysctls(struct aq_dev *softc) { - device_t dev = softc->dev; - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); - struct sysctl_oid *tree = device_get_sysctl_tree(dev); - struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); - struct aq_stats_s *stats = &softc->curr_stats; - struct sysctl_oid *stat_node, *queue_node; - struct sysctl_oid_list *stat_list, *queue_list; + device_t dev = softc->dev; + struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); + struct sysctl_oid *tree = device_get_sysctl_tree(dev); + struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); + struct aq_stats_s *stats = &softc->curr_stats; + struct sysctl_oid *stat_node, *queue_node; + struct sysctl_oid_list *stat_list, *queue_list; #define QUEUE_NAME_LEN 32 - char namebuf[QUEUE_NAME_LEN]; + char namebuf[QUEUE_NAME_LEN]; /* RSS configuration */ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", - CTLTYPE_STRING | CTLFLAG_RD, softc, 0, - aq_sysctl_print_rss_config, "A", "Prints RSS Configuration"); - - /* Driver Statistics */ - for (int i = 0; i < softc->tx_rings_count; i++) { - struct aq_ring *ring = softc->tx_rings[i]; - snprintf(namebuf, QUEUE_NAME_LEN, "tx_queue%d", i); - queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, - CTLFLAG_RD, NULL, "Queue Name"); - queue_list = SYSCTL_CHILDREN(queue_node); - - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_pkts", - CTLFLAG_RD, &(ring->stats.tx_pkts), "TX Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_bytes", - CTLFLAG_RD, &(ring->stats.tx_bytes), "TX Octets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_drops", - CTLFLAG_RD, &(ring->stats.tx_drops), "TX Drops"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_queue_full", - CTLFLAG_RD, &(ring->stats.tx_queue_full), "TX Queue Full"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_head", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, - aq_sysctl_print_tx_head, "IU", "ring head pointer"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_tail", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + CTLTYPE_STRING | CTLFLAG_RD, softc, 0, + aq_sysctl_print_rss_config, "A", "Prints RSS Configuration"); + + /* Driver Statistics */ + for (int i = 0; i < softc->tx_rings_count; i++) { + struct aq_ring *ring = softc->tx_rings[i]; + snprintf(namebuf, QUEUE_NAME_LEN, "tx_queue%d", i); + queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RD, NULL, "Queue Name"); + queue_list = SYSCTL_CHILDREN(queue_node); + + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_pkts", + CTLFLAG_RD, &(ring->stats.tx_pkts), "TX Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_bytes", + CTLFLAG_RD, &(ring->stats.tx_bytes), "TX Octets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_drops", + CTLFLAG_RD, &(ring->stats.tx_drops), "TX Drops"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_queue_full", + CTLFLAG_RD, &(ring->stats.tx_queue_full), "TX Queue Full"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_head", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + aq_sysctl_print_tx_head, "IU", "ring head pointer"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "tx_tail", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_tx_tail, "IU", "ring tail pointer"); - } - - for (int i = 0; i < softc->rx_rings_count; i++) { - struct aq_ring *ring = softc->rx_rings[i]; - snprintf(namebuf, QUEUE_NAME_LEN, "rx_queue%d", i); - queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, - CTLFLAG_RD, NULL, "Queue Name"); - queue_list = SYSCTL_CHILDREN(queue_node); - - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_pkts", - CTLFLAG_RD, &(ring->stats.rx_pkts), "RX Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", - CTLFLAG_RD, &(ring->stats.rx_bytes), "TX Octets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "jumbo_pkts", - CTLFLAG_RD, &(ring->stats.jumbo_pkts), "Jumbo Packets"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_err", - CTLFLAG_RD, &(ring->stats.rx_err), "RX Errors"); - SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irq", - CTLFLAG_RD, &(ring->stats.irq), "RX interrupts"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_head", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + } + + for (int i = 0; i < softc->rx_rings_count; i++) { + struct aq_ring *ring = softc->rx_rings[i]; + snprintf(namebuf, QUEUE_NAME_LEN, "rx_queue%d", i); + queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RD, NULL, "Queue Name"); + queue_list = SYSCTL_CHILDREN(queue_node); + + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_pkts", + CTLFLAG_RD, &(ring->stats.rx_pkts), "RX Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", + CTLFLAG_RD, &(ring->stats.rx_bytes), "TX Octets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "jumbo_pkts", + CTLFLAG_RD, &(ring->stats.jumbo_pkts), "Jumbo Packets"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_err", + CTLFLAG_RD, &(ring->stats.rx_err), "RX Errors"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irq", + CTLFLAG_RD, &(ring->stats.irq), "RX interrupts"); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_head", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_rx_head, "IU", "ring head pointer"); - SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_tail", - CTLTYPE_UINT | CTLFLAG_RD, ring, 0, + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rx_tail", + CTLTYPE_UINT | CTLFLAG_RD, ring, 0, aq_sysctl_print_rx_tail, "IU", " ring tail pointer"); - } - - stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac", - CTLFLAG_RD, NULL, "Statistics (read from HW registers)"); - stat_list = SYSCTL_CHILDREN(stat_node); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", - CTLFLAG_RD, &stats->prc, "Good Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_rcvd", - CTLFLAG_RD, &stats->uprc, "Unicast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", - CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", - CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rsc_pkts_rcvd", - CTLFLAG_RD, &stats->cprc, "Coalesced Packets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_rcvd", - CTLFLAG_RD, &stats->erpr, "Errors of Packet Receive"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "drop_pkts_dma", - CTLFLAG_RD, &stats->dpc, "Dropped Packets in DMA"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", - CTLFLAG_RD, &stats->brc, "Good Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_rcvd", - CTLFLAG_RD, &stats->ubrc, "Unicast Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_rcvd", - CTLFLAG_RD, &stats->mbrc, "Multicast Octets Received"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_rcvd", - CTLFLAG_RD, &stats->bbrc, "Broadcast Octets Received"); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", - CTLFLAG_RD, &stats->ptc, "Good Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_txd", - CTLFLAG_RD, &stats->uptc, "Unicast Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", - CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", - CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); - - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_txd", - CTLFLAG_RD, &stats->erpt, "Errors of Packet Transmit"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", - CTLFLAG_RD, &stats->btc, "Good Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_txd", - CTLFLAG_RD, &stats->ubtc, "Unicast Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_txd", - CTLFLAG_RD, &stats->mbtc, "Multicast Octets Transmitted"); - SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_txd", - CTLFLAG_RD, &stats->bbtc, "Broadcast Octets Transmitted"); + } + + stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac", + CTLFLAG_RD, NULL, "Statistics (read from HW registers)"); + stat_list = SYSCTL_CHILDREN(stat_node); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", + CTLFLAG_RD, &stats->prc, "Good Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_rcvd", + CTLFLAG_RD, &stats->uprc, "Unicast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", + CTLFLAG_RD, &stats->mprc, "Multicast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", + CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rsc_pkts_rcvd", + CTLFLAG_RD, &stats->cprc, "Coalesced Packets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_rcvd", + CTLFLAG_RD, &stats->erpr, "Errors of Packet Receive"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "drop_pkts_dma", + CTLFLAG_RD, &stats->dpc, "Dropped Packets in DMA"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", + CTLFLAG_RD, &stats->brc, "Good Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_rcvd", + CTLFLAG_RD, &stats->ubrc, "Unicast Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_rcvd", + CTLFLAG_RD, &stats->mbrc, "Multicast Octets Received"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_rcvd", + CTLFLAG_RD, &stats->bbrc, "Broadcast Octets Received"); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", + CTLFLAG_RD, &stats->ptc, "Good Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_pkts_txd", + CTLFLAG_RD, &stats->uptc, "Unicast Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", + CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", + CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted"); + + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "err_pkts_txd", + CTLFLAG_RD, &stats->erpt, "Errors of Packet Transmit"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", + CTLFLAG_RD, &stats->btc, "Good Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ucast_octets_txd", + CTLFLAG_RD, &stats->ubtc, "Unicast Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_octets_txd", + CTLFLAG_RD, &stats->mbtc, "Multicast Octets Transmitted"); + SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_octets_txd", + CTLFLAG_RD, &stats->bbtc, "Broadcast Octets Transmitted"); } diff --git a/sys/dev/aq/aq_media.c b/sys/dev/aq/aq_media.c index fdf7ef38d2dc..9cdc0236bb60 100644 --- a/sys/dev/aq/aq_media.c +++ b/sys/dev/aq/aq_media.c @@ -36,14 +36,14 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <net/ethernet.h> #include <net/if.h> #include <net/if_media.h> #include <net/if_var.h> #include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include "aq_device.h" @@ -53,48 +53,46 @@ __FBSDID("$FreeBSD$"); #define AQ_HW_SUPPORT_SPEED(softc, s) ((softc)->link_speeds & s) -void aq_mediastatus_update(aq_dev_t *aq_dev, u32 link_speed, const struct aq_hw_fc_info *fc_neg) +void +aq_mediastatus_update(aq_dev_t *aq_dev, uint32_t link_speed, +const struct aq_hw_fc_info *fc_neg) { struct aq_hw *hw = &aq_dev->hw; aq_dev->media_active = 0; if (fc_neg->fc_rx) - aq_dev->media_active |= IFM_ETH_RXPAUSE; + aq_dev->media_active |= IFM_ETH_RXPAUSE; if (fc_neg->fc_tx) - aq_dev->media_active |= IFM_ETH_TXPAUSE; + aq_dev->media_active |= IFM_ETH_TXPAUSE; switch(link_speed) { case 100: aq_dev->media_active |= IFM_100_TX | IFM_FDX; - break; - + break; case 1000: aq_dev->media_active |= IFM_1000_T | IFM_FDX; - break; - + break; case 2500: aq_dev->media_active |= IFM_2500_T | IFM_FDX; - break; - + break; case 5000: aq_dev->media_active |= IFM_5000_T | IFM_FDX; - break; - + break; case 10000: aq_dev->media_active |= IFM_10G_T | IFM_FDX; - break; - + break; case 0: default: aq_dev->media_active |= IFM_NONE; - break; + break; } if (hw->link_rate == aq_fw_speed_auto) aq_dev->media_active |= IFM_AUTO; } -void aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) +void +aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) { aq_dev_t *aq_dev = iflib_get_softc(if_getsoftc(ifp)); @@ -107,7 +105,8 @@ void aq_mediastatus(if_t ifp, struct ifmediareq *ifmr) ifmr->ifm_active |= aq_dev->media_active; } -int aq_mediachange(if_t ifp) +int +aq_mediachange(if_t ifp) { aq_dev_t *aq_dev = iflib_get_softc(if_getsoftc(ifp)); struct aq_hw *hw = &aq_dev->hw; @@ -172,7 +171,8 @@ int aq_mediachange(if_t ifp) if (!(if_getflags(ifp) & IFF_UP)) return (0); - if ((media_rate != old_media_rate) || (hw->link_rate != old_link_speed)) { + if ((media_rate != old_media_rate) || + (hw->link_rate != old_link_speed)) { // re-initialize hardware with new parameters aq_hw_set_link_speed(hw, hw->link_rate); } @@ -181,17 +181,20 @@ int aq_mediachange(if_t ifp) return (0); } -static void aq_add_media_types(aq_dev_t *aq_dev, int media_link_speed) +static void +aq_add_media_types(aq_dev_t *aq_dev, int media_link_speed) { - ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX, 0, NULL); + ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX, 0, + NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE, 0, NULL); + IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE, 0, NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_RXPAUSE, 0, NULL); + IFM_ETH_RXPAUSE, 0, NULL); ifmedia_add(aq_dev->media, IFM_ETHER | media_link_speed | IFM_FDX | - IFM_ETH_TXPAUSE, 0, NULL); + IFM_ETH_TXPAUSE, 0, NULL); } -void aq_initmedia(aq_dev_t *aq_dev) +void +aq_initmedia(aq_dev_t *aq_dev) { AQ_DBG_ENTER(); @@ -213,7 +216,8 @@ void aq_initmedia(aq_dev_t *aq_dev) aq_add_media_types(aq_dev, IFM_10G_T); // link is initially autoselect - ifmedia_set(aq_dev->media, IFM_ETHER | IFM_AUTO | IFM_FDX | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); + ifmedia_set(aq_dev->media, + IFM_ETHER | IFM_AUTO | IFM_FDX | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); AQ_DBG_EXIT(0); } diff --git a/sys/dev/aq/aq_ring.c b/sys/dev/aq/aq_ring.c index ca0391a6d61b..40128cbb72b8 100644 --- a/sys/dev/aq/aq_ring.c +++ b/sys/dev/aq/aq_ring.c @@ -36,15 +36,15 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> -#include <machine/param.h> +#include <sys/bitstring.h> #include <sys/kernel.h> #include <sys/socket.h> -#include <sys/bitstring.h> +#include <machine/param.h> +#include <net/ethernet.h> #include <net/if.h> +#include <net/if_dl.h> #include <net/if_media.h> #include <net/if_var.h> -#include <net/if_dl.h> -#include <net/ethernet.h> #include <net/iflib.h> #include <netinet/in.h> @@ -80,151 +80,159 @@ struct if_txrx aq_txrx = { static inline uint32_t aq_next(uint32_t i, uint32_t lim) { - return (i == lim) ? 0 : i + 1; + return (i == lim) ? 0 : i + 1; } -int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring) /* uint64_t ring_addr, - u32 ring_size, - u32 ring_idx, - u32 interrupt_cause, - u32 cpu_idx) */ + uint32_t ring_size, + uint32_t ring_idx, + uint32_t interrupt_cause, + uint32_t cpu_idx) */ { - int err; - u32 dma_desc_addr_lsw = (u32)ring->rx_descs_phys & 0xffffffff; - u32 dma_desc_addr_msw = (u32)(ring->rx_descs_phys >> 32); + int err; + uint32_t dma_desc_addr_lsw = (uint32_t)ring->rx_descs_phys & 0xffffffff; + uint32_t dma_desc_addr_msw = (uint32_t)(ring->rx_descs_phys >> 32); - AQ_DBG_ENTERA("[%d]", ring->index); + AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, false, ring->index); + rdm_rx_desc_en_set(hw, false, ring->index); - rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); + rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); - reg_rx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); + reg_rx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); - reg_rx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); + reg_rx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); - rdm_rx_desc_len_set(hw, ring->rx_size / 8U, ring->index); + rdm_rx_desc_len_set(hw, ring->rx_size / 8U, ring->index); - device_printf(ring->dev->dev, "ring %d: __PAGESIZE=%d MCLBYTES=%d hw->max_frame_size=%d\n", + device_printf(ring->dev->dev, "ring %d: __PAGESIZE=%d MCLBYTES=%d hw->max_frame_size=%d\n", ring->index, PAGE_SIZE, MCLBYTES, ring->rx_max_frame_size); - rdm_rx_desc_data_buff_size_set(hw, ring->rx_max_frame_size / 1024U, ring->index); + rdm_rx_desc_data_buff_size_set(hw, ring->rx_max_frame_size / 1024U, ring->index); - rdm_rx_desc_head_buff_size_set(hw, 0U, ring->index); - rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); - rpo_rx_desc_vlan_stripping_set(hw, 0U, ring->index); + rdm_rx_desc_head_buff_size_set(hw, 0U, ring->index); + rdm_rx_desc_head_splitting_set(hw, 0U, ring->index); + rpo_rx_desc_vlan_stripping_set(hw, 0U, ring->index); - /* Rx ring set mode */ + /* Rx ring set mode */ - /* Mapping interrupt vector */ - itr_irq_map_rx_set(hw, ring->msix, ring->index); - itr_irq_map_en_rx_set(hw, true, ring->index); + /* Mapping interrupt vector */ + itr_irq_map_rx_set(hw, ring->msix, ring->index); + itr_irq_map_en_rx_set(hw, true, ring->index); - rdm_cpu_id_set(hw, 0, ring->index); - rdm_rx_desc_dca_en_set(hw, 0U, ring->index); - rdm_rx_head_dca_en_set(hw, 0U, ring->index); - rdm_rx_pld_dca_en_set(hw, 0U, ring->index); + rdm_cpu_id_set(hw, 0, ring->index); + rdm_rx_desc_dca_en_set(hw, 0U, ring->index); + rdm_rx_head_dca_en_set(hw, 0U, ring->index); + rdm_rx_pld_dca_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring) /* uint64_t ring_addr, - u32 ring_size, - u32 ring_idx, - u32 interrupt_cause, - u32 cpu_idx) */ + uint32_t ring_size, + uint32_t ring_idx, + uint32_t interrupt_cause, + uint32_t cpu_idx) */ { - int err; - u32 dma_desc_addr_lsw = (u32)ring->tx_descs_phys & 0xffffffff; - u32 dma_desc_addr_msw = (u64)(ring->tx_descs_phys >> 32); + int err; + uint32_t dma_desc_addr_lsw = (uint32_t)ring->tx_descs_phys & 0xffffffff; + uint32_t dma_desc_addr_msw = (uint64_t)(ring->tx_descs_phys >> 32); - AQ_DBG_ENTERA("[%d]", ring->index); + AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 0U, ring->index); + tdm_tx_desc_en_set(hw, 0U, ring->index); - reg_tx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); + reg_tx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index); - reg_tx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); + reg_tx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index); - tdm_tx_desc_len_set(hw, ring->tx_size / 8U, ring->index); + tdm_tx_desc_len_set(hw, ring->tx_size / 8U, ring->index); - aq_ring_tx_tail_update(hw, ring, 0U); + aq_ring_tx_tail_update(hw, ring, 0U); - /* Set Tx threshold */ - tdm_tx_desc_wr_wb_threshold_set(hw, 0U, ring->index); + /* Set Tx threshold */ + tdm_tx_desc_wr_wb_threshold_set(hw, 0U, ring->index); - /* Mapping interrupt vector */ - itr_irq_map_tx_set(hw, ring->msix, ring->index); - itr_irq_map_en_tx_set(hw, true, ring->index); + /* Mapping interrupt vector */ + itr_irq_map_tx_set(hw, ring->msix, ring->index); + itr_irq_map_en_tx_set(hw, true, ring->index); - tdm_cpu_id_set(hw, 0, ring->index); - tdm_tx_desc_dca_en_set(hw, 0U, ring->index); + tdm_cpu_id_set(hw, 0, ring->index); + tdm_tx_desc_dca_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, u32 tail) +int +aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail) { - AQ_DBG_ENTERA("[%d]", ring->index); - reg_tx_dma_desc_tail_ptr_set(hw, tail, ring->index); - AQ_DBG_EXIT(0); - return (0); + AQ_DBG_ENTERA("[%d]", ring->index); + reg_tx_dma_desc_tail_ptr_set(hw, tail, ring->index); + AQ_DBG_EXIT(0); + return (0); } -int aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 1U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + tdm_tx_desc_en_set(hw, 1U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, 1U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + rdm_rx_desc_en_set(hw, 1U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring) { - int err; + int err; - AQ_DBG_ENTERA("[%d]", ring->index); - tdm_tx_desc_en_set(hw, 0U, ring->index); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + AQ_DBG_ENTERA("[%d]", ring->index); + tdm_tx_desc_en_set(hw, 0U, ring->index); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring) +int +aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring) { - int err; - - AQ_DBG_ENTERA("[%d]", ring->index); - rdm_rx_desc_en_set(hw, 0U, ring->index); - /* Invalidate Descriptor Cache to prevent writing to the cached - * descriptors and to the data pointer of those descriptors - */ - rdm_rx_dma_desc_cache_init_tgl(hw); - err = aq_hw_err_from_flags(hw); - AQ_DBG_EXIT(err); - return (err); + int err; + + AQ_DBG_ENTERA("[%d]", ring->index); + rdm_rx_desc_en_set(hw, 0U, ring->index); + /* Invalidate Descriptor Cache to prevent writing to the cached + * descriptors and to the data pointer of those descriptors + */ + rdm_rx_dma_desc_cache_init_tgl(hw); + err = aq_hw_err_from_flags(hw); + AQ_DBG_EXIT(err); + return (err); } -static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) +static void +aq_ring_rx_refill(void* arg, if_rxd_update_t iru) { aq_dev_t *aq_dev = arg; aq_rx_desc_t *rx_desc; @@ -232,7 +240,7 @@ static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) qidx_t i, pidx; AQ_DBG_ENTERA("ring=%d iru_pidx=%d iru_count=%d iru->iru_buf_size=%d", - iru->iru_qsidx, iru->iru_pidx, iru->iru_count, iru->iru_buf_size); + iru->iru_qsidx, iru->iru_pidx, iru->iru_count, iru->iru_buf_size); ring = aq_dev->rx_rings[iru->iru_qsidx]; pidx = iru->iru_pidx; @@ -248,8 +256,8 @@ static void aq_ring_rx_refill(void* arg, if_rxd_update_t iru) AQ_DBG_EXIT(0); } -static void aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, - qidx_t pidx) +static void +aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[rxqid]; @@ -259,7 +267,8 @@ static void aq_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, AQ_DBG_EXIT(0); } -static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) +static int +aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[rxqid]; @@ -268,8 +277,9 @@ static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t bu AQ_DBG_ENTERA("[%d] head=%u, budget %d", ring->index, idx, budget); - for (iter = 0, cnt = 0, i = idx; iter < ring->rx_size && cnt <= budget;) { - trace_aq_rx_descr(ring->index, i, (volatile u64*)&rx_desc[i]); + for (iter = 0, cnt = 0, i = idx; + iter < ring->rx_size && cnt <= budget;) { + trace_aq_rx_descr(ring->index, i, (volatile uint64_t*)&rx_desc[i]); if (!rx_desc[i].wb.dd) break; @@ -296,7 +306,8 @@ static int aq_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t bu return (cnt); } -static void aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) +static void +aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) { if ((rx_desc->wb.pkt_type & 0x3) == 0) { //IPv4 if (rx_desc->wb.rx_cntl & BIT(0)){ // IPv4 csum checked @@ -316,17 +327,18 @@ static void aq_rx_set_cso_flags(aq_rx_desc_t *rx_desc, if_rxd_info_t ri) } static uint8_t bsd_rss_type[16] = { - [AQ_RX_RSS_TYPE_IPV4]=M_HASHTYPE_RSS_IPV4, - [AQ_RX_RSS_TYPE_IPV6]=M_HASHTYPE_RSS_IPV6, - [AQ_RX_RSS_TYPE_IPV4_TCP]=M_HASHTYPE_RSS_TCP_IPV4, - [AQ_RX_RSS_TYPE_IPV6_TCP]=M_HASHTYPE_RSS_TCP_IPV6, - [AQ_RX_RSS_TYPE_IPV4_UDP]=M_HASHTYPE_RSS_UDP_IPV4, - [AQ_RX_RSS_TYPE_IPV6_UDP]=M_HASHTYPE_RSS_UDP_IPV6, + [AQ_RX_RSS_TYPE_IPV4] = M_HASHTYPE_RSS_IPV4, + [AQ_RX_RSS_TYPE_IPV6] = M_HASHTYPE_RSS_IPV6, + [AQ_RX_RSS_TYPE_IPV4_TCP] = M_HASHTYPE_RSS_TCP_IPV4, + [AQ_RX_RSS_TYPE_IPV6_TCP] = M_HASHTYPE_RSS_TCP_IPV6, + [AQ_RX_RSS_TYPE_IPV4_UDP] = M_HASHTYPE_RSS_UDP_IPV4, + [AQ_RX_RSS_TYPE_IPV6_UDP] = M_HASHTYPE_RSS_UDP_IPV6, }; -static int aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) +static int +aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->rx_rings[ri->iri_qsidx]; @@ -343,7 +355,7 @@ static int aq_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) do { rx_desc = (aq_rx_desc_t *) &ring->rx_descs[cidx]; - trace_aq_rx_descr(ring->index, cidx, (volatile u64*)rx_desc); + trace_aq_rx_descr(ring->index, cidx, (volatile uint64_t*)rx_desc); if ((rx_desc->wb.rx_stat & BIT(0)) != 0) { ring->stats.rx_err++; @@ -393,20 +405,24 @@ exit: /* */ /*****************************************************************************/ -static void aq_setup_offloads(aq_dev_t *aq_dev, if_pkt_info_t pi, aq_tx_desc_t *txd, u32 tx_cmd) +static void +aq_setup_offloads(aq_dev_t *aq_dev, if_pkt_info_t pi, aq_tx_desc_t *txd, + uint32_t tx_cmd) { - AQ_DBG_ENTER(); - txd->cmd |= tx_desc_cmd_fcs; - txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP|CSUM_TSO)) ? tx_desc_cmd_ipv4 : 0; - txd->cmd |= (pi->ipi_csum_flags & - (CSUM_IP_TCP | CSUM_IP6_TCP | CSUM_IP_UDP | CSUM_IP6_UDP) - ) ? tx_desc_cmd_l4cs : 0; - txd->cmd |= (pi->ipi_flags & IPI_TX_INTR) ? tx_desc_cmd_wb : 0; - txd->cmd |= tx_cmd; - AQ_DBG_EXIT(0); + AQ_DBG_ENTER(); + txd->cmd |= tx_desc_cmd_fcs; + txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP|CSUM_TSO)) ? + tx_desc_cmd_ipv4 : 0; + txd->cmd |= (pi->ipi_csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP | + CSUM_IP_UDP | CSUM_IP6_UDP)) ? tx_desc_cmd_l4cs : 0; + txd->cmd |= (pi->ipi_flags & IPI_TX_INTR) ? tx_desc_cmd_wb : 0; + txd->cmd |= tx_cmd; + AQ_DBG_EXIT(0); } -static int aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrlen, aq_txc_desc_t *txc) +static int +aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrlen, + aq_txc_desc_t *txc) { uint32_t tx_cmd = 0; @@ -448,7 +464,8 @@ static int aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrle return (tx_cmd); } -static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) +static int +aq_isc_txd_encap(void *arg, if_pkt_info_t pi) { aq_dev_t *aq_dev = arg; struct aq_ring *ring; @@ -477,7 +494,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) AQ_DBG_PRINT("tx_cmd = 0x%x", tx_cmd); if (tx_cmd) { - trace_aq_tx_context_descr(ring->index, pidx, (volatile void*)txc); + trace_aq_tx_context_descr(ring->index, pidx, + (volatile void*)txc); /* We've consumed the first desc, adjust counters */ pidx = aq_next(pidx, ring->tx_size - 1); @@ -515,7 +533,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) txd->len = segs[i].ds_len; txd->pay_len = pay_len; if (i < pi->ipi_nsegs - 1) - trace_aq_tx_descr(ring->index, pidx, (volatile void*)txd); + trace_aq_tx_descr(ring->index, pidx, + (volatile void*)txd); pidx = aq_next(pidx, ring->tx_size - 1); @@ -537,7 +556,8 @@ static int aq_isc_txd_encap(void *arg, if_pkt_info_t pi) return (0); } -static void aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) +static void +aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->tx_rings[txqid]; @@ -549,12 +569,14 @@ static void aq_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) } -static inline unsigned int aq_avail_desc(int a, int b, int size) +static inline unsigned int +aq_avail_desc(int a, int b, int size) { - return (((b >= a)) ? ((size ) - b + a) : (a - b)); + return (((b >= a)) ? ((size) - b + a) : (a - b)); } -static int aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) +static int +aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) { aq_dev_t *aq_dev = arg; struct aq_ring *ring = aq_dev->tx_rings[txqid]; @@ -567,7 +589,7 @@ static int aq_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) AQ_DBG_PRINT("swhead %d hwhead %d", ring->tx_head, head); if (ring->tx_head == head) { - avail = 0; //ring->tx_size; + avail = 0; // ring->tx_size; goto done; } diff --git a/sys/dev/aq/aq_ring.h b/sys/dev/aq/aq_ring.h index d6ab3804cf84..2d3740802213 100644 --- a/sys/dev/aq/aq_ring.h +++ b/sys/dev/aq/aq_ring.h @@ -41,130 +41,130 @@ typedef volatile struct { - u32 rss_type:4; - u32 pkt_type:8; - u32 rdm_err:1; - u32 rsvd:6; - u32 rx_cntl:2; - u32 sph:1; - u32 hdr_len:10; - u32 rss_hash; - u16 dd:1; - u16 eop:1; - u16 rx_stat:4; - u16 rx_estat:6; - u16 rsc_cnt:4; - u16 pkt_len; - u16 next_desp; - u16 vlan; + uint32_t rss_type:4; + uint32_t pkt_type:8; + uint32_t rdm_err:1; + uint32_t rsvd:6; + uint32_t rx_cntl:2; + uint32_t sph:1; + uint32_t hdr_len:10; + uint32_t rss_hash; + uint16_t dd:1; + uint16_t eop:1; + uint16_t rx_stat:4; + uint16_t rx_estat:6; + uint16_t rsc_cnt:4; + uint16_t pkt_len; + uint16_t next_desp; + uint16_t vlan; } __attribute__((__packed__)) aq_rx_wb_t; typedef volatile struct { - union { - /* HW RX descriptor */ - struct __packed { - u64 buf_addr; - u64 hdr_addr; - } read; - - /* HW RX descriptor writeback */ - aq_rx_wb_t wb; - }; + union { + /* HW RX descriptor */ + struct __packed { + uint64_t buf_addr; + uint64_t hdr_addr; + } read; + + /* HW RX descriptor writeback */ + aq_rx_wb_t wb; + }; } __attribute__((__packed__)) aq_rx_desc_t; /* Hardware tx descriptor */ typedef volatile struct { - u64 buf_addr; - - union { - struct { - u32 type:3; - u32 :1; - u32 len:16; - u32 dd:1; - u32 eop:1; - u32 cmd:8; - u32 :14; - u32 ct_idx:1; - u32 ct_en:1; - u32 pay_len:18; - } __attribute__((__packed__)); - u64 flags; - }; + uint64_t buf_addr; + + union { + struct { + uint32_t type:3; + uint32_t :1; + uint32_t len:16; + uint32_t dd:1; + uint32_t eop:1; + uint32_t cmd:8; + uint32_t :14; + uint32_t ct_idx:1; + uint32_t ct_en:1; + uint32_t pay_len:18; + } __attribute__((__packed__)); + uint64_t flags; + }; } __attribute__((__packed__)) aq_tx_desc_t; enum aq_tx_desc_type { - tx_desc_type_desc = 1, - tx_desc_type_ctx = 2, + tx_desc_type_desc = 1, + tx_desc_type_ctx = 2, }; enum aq_tx_desc_cmd { - tx_desc_cmd_vlan = 1, - tx_desc_cmd_fcs = 2, - tx_desc_cmd_ipv4 = 4, - tx_desc_cmd_l4cs = 8, - tx_desc_cmd_lso = 0x10, - tx_desc_cmd_wb = 0x20, + tx_desc_cmd_vlan = 1, + tx_desc_cmd_fcs = 2, + tx_desc_cmd_ipv4 = 4, + tx_desc_cmd_l4cs = 8, + tx_desc_cmd_lso = 0x10, + tx_desc_cmd_wb = 0x20, }; /* Hardware tx context descriptor */ typedef volatile union { - struct __packed { - u64 flags1; - u64 flags2; - }; - - struct __packed { - u64 :40; - u32 tun_len:8; - u32 out_len:16; - u32 type:3; - u32 idx:1; - u32 vlan_tag:16; - u32 cmd:4; - u32 l2_len:7; - u32 l3_len:9; - u32 l4_len:8; - u32 mss_len:16; - }; + struct __packed { + uint64_t flags1; + uint64_t flags2; + }; + + struct __packed { + uint64_t :40; + uint32_t tun_len:8; + uint32_t out_len:16; + uint32_t type:3; + uint32_t idx:1; + uint32_t vlan_tag:16; + uint32_t cmd:4; + uint32_t l2_len:7; + uint32_t l3_len:9; + uint32_t l4_len:8; + uint32_t mss_len:16; + }; } __attribute__((__packed__)) aq_txc_desc_t; struct aq_ring_stats { - u64 rx_pkts; - u64 rx_bytes; - u64 jumbo_pkts; - u64 rx_err; - u64 irq; - - u64 tx_pkts; - u64 tx_bytes; - u64 tx_drops; - u64 tx_queue_full; + uint64_t rx_pkts; + uint64_t rx_bytes; + uint64_t jumbo_pkts; + uint64_t rx_err; + uint64_t irq; + + uint64_t tx_pkts; + uint64_t tx_bytes; + uint64_t tx_drops; + uint64_t tx_queue_full; }; struct aq_dev; struct aq_ring { - struct aq_dev *dev; - int index; + struct aq_dev *dev; + int index; - struct if_irq irq; - int msix; + struct if_irq irq; + int msix; /* RX */ - qidx_t rx_size; - int rx_max_frame_size; - void *rx_desc_area_ptr; - aq_rx_desc_t *rx_descs; - uint64_t rx_descs_phys; + qidx_t rx_size; + int rx_max_frame_size; + void *rx_desc_area_ptr; + aq_rx_desc_t *rx_descs; + uint64_t rx_descs_phys; /* TX */ - int tx_head, tx_tail; - qidx_t tx_size; - void *tx_desc_area_ptr; - aq_tx_desc_t *tx_descs; - uint64_t tx_descs_phys; + int tx_head, tx_tail; + qidx_t tx_size; + void *tx_desc_area_ptr; + aq_tx_desc_t *tx_descs; + uint64_t tx_descs_phys; - struct aq_ring_stats stats; + struct aq_ring_stats stats; }; int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring); @@ -175,7 +175,7 @@ int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring); int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring); int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring); -int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, u32 tail); +int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail); extern struct if_txrx aq_txrx; diff --git a/sys/dev/asmc/asmc.c b/sys/dev/asmc/asmc.c index d99c1d56e67c..5d3b97a065c9 100644 --- a/sys/dev/asmc/asmc.c +++ b/sys/dev/asmc/asmc.c @@ -34,6 +34,8 @@ * Inspired by the Linux applesmc driver. */ +#include "opt_asmc.h" + #include <sys/param.h> #include <sys/bus.h> #include <sys/conf.h> @@ -83,7 +85,7 @@ static void asmc_sms_calibrate(device_t dev); static int asmc_sms_intrfast(void *arg); static void asmc_sms_printintr(device_t dev, uint8_t); static void asmc_sms_task(void *arg, int pending); -#ifdef DEBUG +#ifdef ASMC_DEBUG void asmc_dumpall(device_t); static int asmc_key_dump(device_t, int); #endif @@ -97,6 +99,7 @@ static int asmc_mb_sysctl_fansafespeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fanminspeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fanmaxspeed(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_fantargetspeed(SYSCTL_HANDLER_ARGS); +static int asmc_mb_sysctl_fanmanual(SYSCTL_HANDLER_ARGS); static int asmc_temp_sysctl(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_sms_x(SYSCTL_HANDLER_ARGS); static int asmc_mb_sysctl_sms_y(SYSCTL_HANDLER_ARGS); @@ -514,7 +517,7 @@ static driver_t asmc_driver = { */ #define _COMPONENT ACPI_OEM ACPI_MODULE_NAME("ASMC") -#ifdef DEBUG +#ifdef ASMC_DEBUG #define ASMC_DPRINTF(str) device_printf(dev, str) #else #define ASMC_DPRINTF(str) @@ -656,6 +659,13 @@ asmc_attach(device_t dev) CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, dev, j, model->smc_fan_targetspeed, "I", "Fan target speed in RPM"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sc->sc_fan_tree[i]), + OID_AUTO, "manual", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, + dev, j, asmc_mb_sysctl_fanmanual, "I", + "Fan manual mode (0=auto, 1=manual)"); } /* @@ -820,13 +830,19 @@ asmc_resume(device_t dev) return (0); } -#ifdef DEBUG +#ifdef ASMC_DEBUG void asmc_dumpall(device_t dev) { + struct asmc_softc *sc = device_get_softc(dev); int i; - /* XXX magic number */ - for (i=0; i < 0x100; i++) + if (sc->sc_nkeys == 0) { + device_printf(dev, "asmc_dumpall: key count not available\n"); + return; + } + + device_printf(dev, "asmc_dumpall: dumping %d keys\n", sc->sc_nkeys); + for (i = 0; i < sc->sc_nkeys; i++) asmc_key_dump(dev, i); } #endif @@ -914,15 +930,18 @@ nosms: sc->sc_nfan = ASMC_MAXFANS; } - if (bootverbose) { - /* - * The number of keys is a 32 bit buffer - */ - asmc_key_read(dev, ASMC_NKEYS, buf, 4); - device_printf(dev, "number of keys: %d\n", ntohl(*(uint32_t*)buf)); + /* + * Read and cache the number of SMC keys (32 bit buffer) + */ + if (asmc_key_read(dev, ASMC_NKEYS, buf, 4) == 0) { + sc->sc_nkeys = be32dec(buf); + if (bootverbose) + device_printf(dev, "number of keys: %d\n", sc->sc_nkeys); + } else { + sc->sc_nkeys = 0; } -#ifdef DEBUG +#ifdef ASMC_DEBUG asmc_dumpall(dev); #endif @@ -957,19 +976,19 @@ asmc_wait_ack(device_t dev, uint8_t val, int amount) static int asmc_wait(device_t dev, uint8_t val) { -#ifdef DEBUG +#ifdef ASMC_DEBUG struct asmc_softc *sc; #endif if (asmc_wait_ack(dev, val, 1000) == 0) return (0); -#ifdef DEBUG +#ifdef ASMC_DEBUG sc = device_get_softc(dev); #endif val = val & ASMC_STATUS_MASK; -#ifdef DEBUG +#ifdef ASMC_DEBUG device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val, ASMC_CMDPORT_READ(sc)); #endif @@ -992,7 +1011,7 @@ asmc_command(device_t dev, uint8_t command) { } } -#ifdef DEBUG +#ifdef ASMC_DEBUG device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, command, ASMC_CMDPORT_READ(sc)); #endif @@ -1038,7 +1057,7 @@ out: return (error); } -#ifdef DEBUG +#ifdef ASMC_DEBUG static int asmc_key_dump(device_t dev, int number) { @@ -1338,6 +1357,53 @@ asmc_mb_sysctl_fantargetspeed(SYSCTL_HANDLER_ARGS) return (error); } +static int +asmc_mb_sysctl_fanmanual(SYSCTL_HANDLER_ARGS) +{ + device_t dev = (device_t) arg1; + int fan = arg2; + int error; + int32_t v; + uint8_t buf[2]; + uint16_t val; + + /* Read current FS! bitmask (asmc_key_read locks internally) */ + error = asmc_key_read(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + if (error != 0) + return (error); + + /* Extract manual bit for this fan (big-endian) */ + val = (buf[0] << 8) | buf[1]; + v = (val >> fan) & 0x01; + + /* Let sysctl handle the value */ + error = sysctl_handle_int(oidp, &v, 0, req); + + if (error == 0 && req->newptr != NULL) { + /* Validate input (0 = auto, 1 = manual) */ + if (v != 0 && v != 1) + return (EINVAL); + /* Read-modify-write of FS! bitmask */ + error = asmc_key_read(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + if (error == 0) { + val = (buf[0] << 8) | buf[1]; + + /* Modify single bit */ + if (v) + val |= (1 << fan); /* Set to manual */ + else + val &= ~(1 << fan); /* Set to auto */ + + /* Write back */ + buf[0] = val >> 8; + buf[1] = val & 0xff; + error = asmc_key_write(dev, ASMC_KEY_FANMANUAL, buf, sizeof(buf)); + } + } + + return (error); +} + /* * Temperature functions. */ diff --git a/sys/dev/asmc/asmcvar.h b/sys/dev/asmc/asmcvar.h index d40dc1e7c8ff..b6d8686d9670 100644 --- a/sys/dev/asmc/asmcvar.h +++ b/sys/dev/asmc/asmcvar.h @@ -33,6 +33,7 @@ struct asmc_softc { device_t sc_dev; struct mtx sc_mtx; int sc_nfan; + int sc_nkeys; int16_t sms_rest_x; int16_t sms_rest_y; int16_t sms_rest_z; diff --git a/sys/dev/bnxt/bnxt_en/if_bnxt.c b/sys/dev/bnxt/bnxt_en/if_bnxt.c index 471e26a4b252..fa37d04e0884 100644 --- a/sys/dev/bnxt/bnxt_en/if_bnxt.c +++ b/sys/dev/bnxt/bnxt_en/if_bnxt.c @@ -4295,7 +4295,7 @@ bnxt_i2c_req(if_ctx_t ctx, struct ifi2creq *i2c) return -EOPNOTSUPP; - rc = bnxt_read_sfp_module_eeprom_info(softc, I2C_DEV_ADDR_A0, 0, 0, 0, + rc = bnxt_read_sfp_module_eeprom_info(softc, i2c->dev_addr, 0, 0, 0, i2c->offset, i2c->len, data); return rc; diff --git a/sys/dev/ixl/ixl_txrx.c b/sys/dev/ixl/ixl_txrx.c index f971a3073265..04b8279bdc59 100644 --- a/sys/dev/ixl/ixl_txrx.c +++ b/sys/dev/ixl/ixl_txrx.c @@ -661,7 +661,7 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) struct ixl_rx_queue *que = &vsi->rx_queues[ri->iri_qsidx]; struct rx_ring *rxr = &que->rxr; union i40e_rx_desc *cur; - u32 status, error; + u32 status, error, fltstat; u16 plen; u64 qword; u8 ptype; @@ -717,8 +717,12 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) if ((scctx->isc_capenable & IFCAP_RXCSUM) != 0) rxr->csum_errs += ixl_rx_checksum(ri, status, error, ptype); - ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); - ri->iri_rsstype = ixl_ptype_to_hash(ptype); + fltstat = (status >> I40E_RX_DESC_STATUS_FLTSTAT_SHIFT); + if ((fltstat & I40E_RX_DESC_FLTSTAT_RSS_HASH) == + I40E_RX_DESC_FLTSTAT_RSS_HASH) { + ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); + ri->iri_rsstype = ixl_ptype_to_hash(ptype); + } if (status & (1 << I40E_RX_DESC_STATUS_L2TAG1P_SHIFT)) { ri->iri_vtag = le16toh(cur->wb.qword0.lo_dword.l2tag1); ri->iri_flags |= M_VLANTAG; diff --git a/sys/dev/mfi/mfi_pci.c b/sys/dev/mfi/mfi_pci.c index 65e8e30bf994..b150138452db 100644 --- a/sys/dev/mfi/mfi_pci.c +++ b/sys/dev/mfi/mfi_pci.c @@ -131,6 +131,7 @@ struct mfi_ident { {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"}, {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"}, {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"}, + {0x1000, 0x005b, 0x1734, 0x11d3, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)"}, {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"}, {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"}, {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"}, diff --git a/sys/dev/ocs_fc/ocs_ddump.h b/sys/dev/ocs_fc/ocs_ddump.h index b7d7eefad813..3cffff6d9670 100644 --- a/sys/dev/ocs_fc/ocs_ddump.h +++ b/sys/dev/ocs_fc/ocs_ddump.h @@ -46,8 +46,7 @@ extern void ocs_ddump_startfile(ocs_textbuf_t *textbuf); extern void ocs_ddump_endfile(ocs_textbuf_t *textbuf); extern void ocs_ddump_section(ocs_textbuf_t *textbuf, const char *name, uint32_t instance); extern void ocs_ddump_endsection(ocs_textbuf_t *textbuf, const char *name, uint32_t instance); -__attribute__((format(printf,3,4))) -extern void ocs_ddump_value(ocs_textbuf_t *textbuf, const char *name, const char *fmt, ...); +extern void ocs_ddump_value(ocs_textbuf_t *textbuf, const char *name, const char *fmt, ...) __printflike(3, 4); extern void ocs_ddump_buffer(ocs_textbuf_t *textbuf, const char *name, uint32_t instance, void *buffer, uint32_t size); extern int32_t ocs_save_ddump(ocs_t *ocs, uint32_t flags, uint32_t qentries); extern int32_t ocs_get_saved_ddump(ocs_t *ocs, ocs_textbuf_t *textbuf); diff --git a/sys/dev/ocs_fc/ocs_mgmt.h b/sys/dev/ocs_fc/ocs_mgmt.h index 7b59a3916ca8..9781aec18462 100644 --- a/sys/dev/ocs_fc/ocs_mgmt.h +++ b/sys/dev/ocs_fc/ocs_mgmt.h @@ -95,8 +95,7 @@ extern void ocs_mgmt_end_section(ocs_textbuf_t *textbuf, const char *name, int i extern void ocs_mgmt_end_unnumbered_section(ocs_textbuf_t *textbuf, const char *name); extern void ocs_mgmt_emit_property_name(ocs_textbuf_t *textbuf, int access, const char *name); extern void ocs_mgmt_emit_string(ocs_textbuf_t *textbuf, int access, const char *name, const char *value); -__attribute__((format(printf,4,5))) -extern void ocs_mgmt_emit_int(ocs_textbuf_t *textbuf, int access, const char *name, const char *fmt, ...); +extern void ocs_mgmt_emit_int(ocs_textbuf_t *textbuf, int access, const char *name, const char *fmt, ...) __printflike(4, 5); extern void ocs_mgmt_emit_boolean(ocs_textbuf_t *textbuf, int access, const char *name, const int value); extern int parse_wwn(char *wwn_in, uint64_t *wwn_out); diff --git a/sys/dev/ocs_fc/ocs_os.h b/sys/dev/ocs_fc/ocs_os.h index 331d5b07aecd..55ee98b3cc58 100644 --- a/sys/dev/ocs_fc/ocs_os.h +++ b/sys/dev/ocs_fc/ocs_os.h @@ -711,7 +711,7 @@ typedef struct { * @return returns 0 for success, a negative error code value for failure. */ -extern int ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...) __attribute__((format(printf, 3, 4))); +extern int ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...) __printflike(3, 4); /** * @brief execute a P (decrement) operation diff --git a/sys/dev/ocs_fc/ocs_utils.h b/sys/dev/ocs_fc/ocs_utils.h index e3a952e0cf26..7c9c9ae85b74 100644 --- a/sys/dev/ocs_fc/ocs_utils.h +++ b/sys/dev/ocs_fc/ocs_utils.h @@ -103,10 +103,8 @@ extern int32_t ocs_textbuf_init(ocs_t *ocs, ocs_textbuf_t *textbuf, void *buffer extern void ocs_textbuf_free(ocs_t *ocs, ocs_textbuf_t *textbuf); extern void ocs_textbuf_putc(ocs_textbuf_t *textbuf, uint8_t c); extern void ocs_textbuf_puts(ocs_textbuf_t *textbuf, char *s); -__attribute__((format(printf,2,3))) -extern void ocs_textbuf_printf(ocs_textbuf_t *textbuf, const char *fmt, ...); -__attribute__((format(printf,2,0))) -extern void ocs_textbuf_vprintf(ocs_textbuf_t *textbuf, const char *fmt, va_list ap); +extern void ocs_textbuf_printf(ocs_textbuf_t *textbuf, const char *fmt, ...) __printflike(2, 3); +extern void ocs_textbuf_vprintf(ocs_textbuf_t *textbuf, const char *fmt, va_list ap) __printflike(2, 0); extern void ocs_textbuf_buffer(ocs_textbuf_t *textbuf, uint8_t *buffer, uint32_t buffer_length); extern void ocs_textbuf_copy(ocs_textbuf_t *textbuf, uint8_t *buffer, uint32_t buffer_length); extern int32_t ocs_textbuf_remaining(ocs_textbuf_t *textbuf); @@ -325,10 +323,8 @@ typedef struct ocs_ramlog_s ocs_ramlog_t; extern ocs_ramlog_t *ocs_ramlog_init(ocs_t *ocs, uint32_t buffer_len, uint32_t buffer_count); extern void ocs_ramlog_free(ocs_t *ocs, ocs_ramlog_t *ramlog); extern void ocs_ramlog_clear(ocs_t *ocs, ocs_ramlog_t *ramlog, int clear_start_of_day, int clear_recent); -__attribute__((format(printf,2,3))) -extern int32_t ocs_ramlog_printf(void *os, const char *fmt, ...); -__attribute__((format(printf,2,0))) -extern int32_t ocs_ramlog_vprintf(ocs_ramlog_t *ramlog, const char *fmt, va_list ap); +extern int32_t ocs_ramlog_printf(void *os, const char *fmt, ...) __printflike(2, 3); +extern int32_t ocs_ramlog_vprintf(ocs_ramlog_t *ramlog, const char *fmt, va_list ap) __printflike(2, 0); extern int32_t ocs_ddump_ramlog(ocs_textbuf_t *textbuf, ocs_ramlog_t *ramlog); #endif diff --git a/sys/dev/qlnx/qlnxe/qlnx_os.c b/sys/dev/qlnx/qlnxe/qlnx_os.c index 9963f472c615..99110e5e2d8f 100644 --- a/sys/dev/qlnx/qlnxe/qlnx_os.c +++ b/sys/dev/qlnx/qlnxe/qlnx_os.c @@ -2539,7 +2539,7 @@ qlnx_hw_set_multi(qlnx_host_t *ha, uint8_t *mta, uint32_t mcnt, break; } - mta += ETHER_HDR_LEN; + mta += ETHER_ADDR_LEN; } return; } @@ -2552,7 +2552,7 @@ qlnx_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) if (mcnt == QLNX_MAX_NUM_MULTICAST_ADDRS) return (0); - bcopy(LLADDR(sdl), &mta[mcnt * ETHER_HDR_LEN], ETHER_HDR_LEN); + bcopy(LLADDR(sdl), &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN); return (1); } @@ -2560,7 +2560,7 @@ qlnx_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) static int qlnx_set_multi(qlnx_host_t *ha, uint32_t add_multi) { - uint8_t mta[QLNX_MAX_NUM_MULTICAST_ADDRS * ETHER_HDR_LEN]; + uint8_t mta[QLNX_MAX_NUM_MULTICAST_ADDRS * ETHER_ADDR_LEN]; if_t ifp = ha->ifp; u_int mcnt; diff --git a/sys/dev/rge/if_rge.c b/sys/dev/rge/if_rge.c index 41a39f5bfb60..fde8e9df31fe 100644 --- a/sys/dev/rge/if_rge.c +++ b/sys/dev/rge/if_rge.c @@ -415,8 +415,12 @@ rge_attach(device_t dev) // device_printf(dev, "RTL8125B\n"); break; case 0x64900000: - sc->rge_type = MAC_R26; -// device_printf(dev, "RTL8126\n"); + sc->rge_type = MAC_R26_1; +// device_printf(dev, "RTL8126_1\n"); + break; + case 0x64a00000: + sc->rge_type = MAC_R26_2; +// device_printf(dev, "RTL8126_2\n"); break; case 0x68800000: sc->rge_type = MAC_R25D; @@ -1165,7 +1169,7 @@ rge_init_locked(struct rge_softc *sc) val = rge_read_csi(sc, 0x70c) & ~0x3f000000; rge_write_csi(sc, 0x70c, val | 0x27000000); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { /* Disable L1 timeout. */ val = rge_read_csi(sc, 0x890) & ~0x00000001; rge_write_csi(sc, 0x890, val); @@ -1184,7 +1188,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_SETBIT(sc, 0xeb58, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0xd8, 0x02); if (sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0x20e4, 0x04); @@ -1199,7 +1203,7 @@ rge_init_locked(struct rge_softc *sc) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else if (sc->rge_type == MAC_R25B) rge_write_mac_ocp(sc, 0xe614, val | 0x0200); - else if (sc->rge_type == MAC_R26) + else if (RGE_TYPE_R26(sc)) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else rge_write_mac_ocp(sc, 0xe614, val | 0x0f00); @@ -1252,7 +1256,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); } - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304); else RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004); @@ -1282,12 +1286,12 @@ rge_init_locked(struct rge_softc *sc) RGE_WRITE_4(sc, RGE_TIMERINT3, 0); num_miti = - (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R26) ? 32 : 64; + (sc->rge_type == MAC_R25B || RGE_TYPE_R26(sc)) ? 32 : 64; /* Clear interrupt moderation timer. */ for (i = 0; i < num_miti; i++) RGE_WRITE_4(sc, RGE_INTMITI(i), 0); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_TIMEOUT_BYPASS | RGE_INT_CFG0_RDU_BYPASS_8126 | RGE_INT_CFG0_MITIGATION_BYPASS); @@ -1439,7 +1443,7 @@ rge_ifmedia_upd(if_t ifp) /* Disable Gigabit Lite. */ RGE_PHY_CLRBIT(sc, 0xa428, 0x0200); RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0007); val = rge_read_phy_ocp(sc, 0xa5d4); @@ -1447,7 +1451,8 @@ rge_ifmedia_upd(if_t ifp) case MAC_R27: val &= ~RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val &= ~RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -1461,7 +1466,7 @@ rge_ifmedia_upd(if_t ifp) switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: val |= RGE_ADV_2500TFDX; - if (sc->rge_type == MAC_R26) + if (RGE_TYPE_R26(sc)) val |= RGE_ADV_5000TFDX; else if (sc->rge_type == MAC_R27) val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX; @@ -1543,8 +1548,6 @@ rge_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) ifmr->ifm_active |= IFM_2500_T; else if (status & RGE_PHYSTAT_5000MBPS) ifmr->ifm_active |= IFM_5000_T; - else if (status & RGE_PHYSTAT_5000MBPS) - ifmr->ifm_active |= IFM_5000_T; else if (status & RGE_PHYSTAT_10000MBPS) ifmr->ifm_active |= IFM_10G_T; } @@ -2453,7 +2456,7 @@ rge_add_media_types(struct rge_softc *sc) ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T | IFM_FDX, 0, NULL); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T | IFM_FDX, 0, NULL); diff --git a/sys/dev/rge/if_rge_hw.c b/sys/dev/rge/if_rge_hw.c index 17edad950f72..ccd6580b2cfc 100644 --- a/sys/dev/rge/if_rge_hw.c +++ b/sys/dev/rge/if_rge_hw.c @@ -67,13 +67,15 @@ static int rge_reset(struct rge_softc *sc); static void rge_set_phy_power(struct rge_softc *sc, int on); -static uint64_t rge_mcu_get_bin_version(uint16_t entries); +static void rge_mac_config_ext_mcu(struct rge_softc *, enum rge_mac_type); +static uint64_t rge_mcu_get_bin_version(const uint16_t *, uint16_t); static void rge_mcu_set_version(struct rge_softc *sc, uint64_t mcodever); static void rge_ephy_config_mac_r25(struct rge_softc *sc); static void rge_ephy_config_mac_r25b(struct rge_softc *sc); static void rge_ephy_config_mac_r27(struct rge_softc *sc); static void rge_phy_config_mac_r27(struct rge_softc *sc); -static void rge_phy_config_mac_r26(struct rge_softc *sc); +static void rge_phy_config_mac_r26_1(struct rge_softc *sc); +static void rge_phy_config_mac_r26_2(struct rge_softc *sc); static void rge_phy_config_mac_r25(struct rge_softc *sc); static void rge_phy_config_mac_r25b(struct rge_softc *sc); static void rge_phy_config_mac_r25d(struct rge_softc *sc); @@ -104,18 +106,7 @@ rge_reset(struct rge_softc *sc) RGE_SETBIT_1(sc, RGE_PPSW, 0x08); RGE_SETBIT_1(sc, RGE_CMD, RGE_CMD_STOPREQ); - if (sc->rge_type == MAC_R25) { - for (i = 0; i < 20; i++) { - DELAY(10); - if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_STOPREQ)) - break; - } - if (i == 20) { - RGE_PRINT_ERROR(sc, "failed to stop all requests\n"); - return ETIMEDOUT; - } - } else - DELAY(200); + DELAY(200); for (i = 0; i < 3000; i++) { DELAY(50); @@ -197,7 +188,6 @@ rge_set_phy_power(struct rge_softc *sc, int on) void rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) { - uint64_t mcodever; uint16_t reg; int i, npages; @@ -278,19 +268,82 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x14a2); rge_write_mac_ocp(sc, 0xfc48, 0x0001); + } +} + +void +rge_mac_config_ext_mcu(struct rge_softc *sc, enum rge_mac_type type) +{ + const struct rge_mac_bps *bps; + uint64_t mcodever = 0; + int i; + + /* Read microcode version. */ + rge_switch_mcu_ram_page(sc, 2); + sc->rge_mcodever = 0; + for (i = 0; i < 8; i += 2) { + sc->rge_mcodever <<= 16; + sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); + } + rge_switch_mcu_ram_page(sc, 0); + + if (type == MAC_R26_1) { + bps = &rtl8126_1_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_1_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x2360); + rge_write_mac_ocp(sc, 0xfc2E, 0x14a4); + rge_write_mac_ocp(sc, 0xfc30, 0x415e); + rge_write_mac_ocp(sc, 0xfc32, 0x41e4); + rge_write_mac_ocp(sc, 0xfc34, 0x4280); + rge_write_mac_ocp(sc, 0xfc36, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x00fc); + } else if (type == MAC_R26_2) { + bps = &rtl8126_2_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_2_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < 256; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + /* Switch to page 1. */ + rge_switch_mcu_ram_page(sc, 1); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x14a4); + rge_write_mac_ocp(sc, 0xfc2e, 0x4176); + rge_write_mac_ocp(sc, 0xfc30, 0x41fc); + rge_write_mac_ocp(sc, 0xfc32, 0x4298); + rge_write_mac_ocp(sc, 0xfc3a, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x023c); } else if (type == MAC_R27) { - mcodever = rge_mcu_get_bin_version(nitems(rtl8127_mac_bps)); + bps = &rtl8127_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8127_mac_bps_vals, bps->count); if (sc->rge_mcodever != mcodever) { /* Switch to page 0. */ rge_switch_mcu_ram_page(sc, 0); for (i = 0; i < 256; i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); /* Switch to page 1. */ rge_switch_mcu_ram_page(sc, 1); - for (; i < nitems(rtl8127_mac_bps); i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); } rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x1520); @@ -302,21 +355,21 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc34, 0x1a6a); rge_write_mac_ocp(sc, 0xfc36, 0x1a2c); rge_write_mac_ocp(sc, 0xfc48, 0x00ff); - - /* Write microcode version. */ - rge_mcu_set_version(sc, mcodever); } -} + + /* Write microcode version. */ + rge_mcu_set_version(sc, mcodever); +}; static uint64_t -rge_mcu_get_bin_version(uint16_t entries) +rge_mcu_get_bin_version(const uint16_t *mac_bps, uint16_t entries) { uint64_t binver = 0; int i; for (i = 0; i < 4; i++) { binver <<= 16; - binver |= rtl8127_mac_bps[entries - 4 + i].val; + binver |= mac_bps[entries - 4 + i]; } return binver; @@ -423,7 +476,8 @@ rge_phy_config(struct rge_softc *sc) case MAC_R27: val |= RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val |= RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -457,8 +511,11 @@ rge_phy_config(struct rge_softc *sc) case MAC_R25D: rge_phy_config_mac_r25d(sc); break; - case MAC_R26: - rge_phy_config_mac_r26(sc); + case MAC_R26_1: + rge_phy_config_mac_r26_1(sc); + break; + case MAC_R26_2: + rge_phy_config_mac_r26_2(sc); break; case MAC_R27: rge_phy_config_mac_r27(sc); @@ -479,7 +536,7 @@ rge_phy_config(struct rge_softc *sc) RGE_PHY_CLRBIT(sc, 0xa5d0, (sc->rge_type == MAC_R27) ? 0x000e : 0x0006); RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0002); RGE_PHY_CLRBIT(sc, 0xa6d8, 0x0010); RGE_PHY_CLRBIT(sc, 0xa428, 0x0080); @@ -764,7 +821,7 @@ rge_phy_config_mac_r27(struct rge_softc *sc) } static void -rge_phy_config_mac_r26(struct rge_softc *sc) +rge_phy_config_mac_r26_1(struct rge_softc *sc) { uint16_t val; int i; @@ -781,7 +838,7 @@ rge_phy_config_mac_r26(struct rge_softc *sc) 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; - rge_phy_config_mcu(sc, RGE_MAC_R26_RCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R26_1_RCODE_VER); RGE_PHY_SETBIT(sc, 0xa442, 0x0800); rge_write_phy_ocp(sc, 0xa436, 0x80bf); @@ -1044,6 +1101,147 @@ rge_phy_config_mac_r26(struct rge_softc *sc) } static void +rge_phy_config_mac_r26_2(struct rge_softc *sc) +{ + uint16_t val; + int i; + static const uint16_t mac_cfg3_b87e_value[] = + { 0x03ed, 0x03ff, 0x0009, 0x03fe, 0x000b, 0x0021, 0x03f7, + 0x03b8, 0x03e0, 0x0049, 0x0049, 0x03e0, 0x03b8, 0x03f7, + 0x0021, 0x000b, 0x03fe, 0x0009, 0x03ff, 0x03ed, 0x82a0, + 0x000e, 0x03fe, 0x03ed, 0x0006, 0x001a, 0x03f1, 0x03d8, + 0x0023, 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, + 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; + + rge_phy_config_mcu(sc, RGE_MAC_R26_2_RCODE_VER); + + RGE_PHY_SETBIT(sc, 0xa442, 0x0800); + rge_write_phy_ocp(sc, 0xa436, 0x8183); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x5900); + RGE_PHY_SETBIT(sc, 0xa654, 0x0800); + RGE_PHY_SETBIT(sc, 0xb648, 0x4000); + RGE_PHY_SETBIT(sc, 0xad2c, 0x8000); + RGE_PHY_SETBIT(sc, 0xad94, 0x0020); + RGE_PHY_SETBIT(sc, 0xada0, 0x0002); + val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00; + rge_write_phy_ocp(sc, 0xae06, val | 0x7c00); + rge_write_phy_ocp(sc, 0xb87c, 0x8647); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0xe600); + rge_write_phy_ocp(sc, 0xb87c, 0x8036); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x8078); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x89e9); + RGE_PHY_SETBIT(sc, 0xb87e, 0xff00); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffd); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffe); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0200); + rge_write_phy_ocp(sc, 0xb87c, 0x8fff); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0400); + rge_write_phy_ocp(sc, 0xa436, 0x8018); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x7700); + rge_write_phy_ocp(sc, 0xa436, 0x8f9c); + rge_write_phy_ocp(sc, 0xa438, 0x0005); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x00ed); + rge_write_phy_ocp(sc, 0xa438, 0x0502); + rge_write_phy_ocp(sc, 0xa438, 0x0b00); + rge_write_phy_ocp(sc, 0xa438, 0xd401); + rge_write_phy_ocp(sc, 0xa436, 0x8fa8); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x2900); + rge_write_phy_ocp(sc, 0xb87c, 0x814b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00); + rge_write_phy_ocp(sc, 0xb87c, 0x8142); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8144); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8150); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8118); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811a); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0500); + rge_write_phy_ocp(sc, 0xb87c, 0x810f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8111); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x811d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + RGE_PHY_SETBIT(sc, 0xad1c, 0x0100); + val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0; + rge_write_phy_ocp(sc, 0xade8, val | 0x1400); + rge_write_phy_ocp(sc, 0xb87c, 0x864b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00); + rge_write_phy_ocp(sc, 0xb87c, 0x862c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1200); + rge_write_phy_ocp(sc, 0xa436, 0x8566); + rge_write_phy_ocp(sc, 0xa438, 0x003f); + rge_write_phy_ocp(sc, 0xa438, 0x3f02); + rge_write_phy_ocp(sc, 0xa438, 0x023c); + rge_write_phy_ocp(sc, 0xa438, 0x3b0a); + rge_write_phy_ocp(sc, 0xa438, 0x1c00); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + RGE_PHY_SETBIT(sc, 0xad9c, 0x0020); + rge_write_phy_ocp(sc, 0xb87c, 0x8122); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + rge_write_phy_ocp(sc, 0xb87c, 0x82c8); + for (i = 0; i < 20; i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + rge_write_phy_ocp(sc, 0xb87c, 0x80ef); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + for (; i < nitems(mac_cfg3_b87e_value); i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + RGE_PHY_SETBIT(sc, 0xa430, 0x0003); + val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0; + rge_write_phy_ocp(sc, 0xb54c, val | 0x3700); + RGE_PHY_SETBIT(sc, 0xb648, 0x0040); + rge_write_phy_ocp(sc, 0xb87c, 0x8082); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5d00); + rge_write_phy_ocp(sc, 0xb87c, 0x807c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); + rge_write_phy_ocp(sc, 0xb87c, 0x809d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); +} + +static void rge_phy_config_mac_r25(struct rge_softc *sc) { uint16_t val; @@ -1404,10 +1602,20 @@ rge_phy_config_mcu(struct rge_softc *sc, uint16_t rcodever) for (; i < nitems(mac_r25d_mcu); i++) rge_write_phy_ocp(sc, mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); - } else if (sc->rge_type == MAC_R26) { - for (i = 0; i < nitems(mac_r26_mcu); i++) + } else if (sc->rge_type == MAC_R26_1) { + for (i = 0; i < 6989; i++) + rge_write_phy_ocp(sc, + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + rge_patch_phy_mcu(sc, 0); + + rge_patch_phy_mcu(sc, 1); + for (; i < nitems(mac_r26_1_mcu); i++) rge_write_phy_ocp(sc, - mac_r26_mcu[i].reg, mac_r26_mcu[i].val); + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + } else if (sc->rge_type == MAC_R26_2) { + for (i = 0; i < nitems(mac_r26_2_mcu); i++) + rge_write_phy_ocp(sc, + mac_r26_2_mcu[i].reg, mac_r26_2_mcu[i].val); } else if (sc->rge_type == MAC_R27) { for (i = 0; i < 1887; i++) rge_write_phy_ocp(sc, @@ -1472,7 +1680,6 @@ static void rge_hw_init(struct rge_softc *sc) { uint16_t reg; - int i; RGE_ASSERT_LOCKED(sc); @@ -1490,16 +1697,10 @@ rge_hw_init(struct rge_softc *sc) DELAY(3000); rge_write_mac_ocp(sc, 0xfc26, 0); - /* Read microcode version. */ - rge_switch_mcu_ram_page(sc, 2); - sc->rge_mcodever = 0; - for (i = 0; i < 8; i += 2) { - sc->rge_mcodever <<= 16; - sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); - } - rge_switch_mcu_ram_page(sc, 0); - - rge_mac_config_mcu(sc, sc->rge_type); + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) + rge_mac_config_ext_mcu(sc, sc->rge_type); + else + rge_mac_config_mcu(sc, sc->rge_type); /* Disable PHY power saving. */ if (sc->rge_type == MAC_R25) @@ -1588,7 +1789,7 @@ rge_disable_aspm_clkreq(struct rge_softc *sc) if (unlock) RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_CLRBIT_1(sc, RGE_INT_CFG0, 0x08); else RGE_CLRBIT_1(sc, RGE_CFG2, RGE_CFG2_CLKREQ_EN); diff --git a/sys/dev/rge/if_rge_microcode.h b/sys/dev/rge/if_rge_microcode.h index e81dc8b96a35..f2803b869e3f 100644 --- a/sys/dev/rge/if_rge_microcode.h +++ b/sys/dev/rge/if_rge_microcode.h @@ -166,114 +166,298 @@ static const struct rge_hw_regaddr_array rtl8125b_mac_bps[] = { { 0xfc30, 0x4a20 }, { 0xfc32, 0x47a0 }, { 0xfc48, 0x003f } }; -static const struct rge_hw_regaddr_array rtl8127_mac_bps[] = { - { 0xf800, 0xe010 }, { 0xf802, 0xe023 }, { 0xf804, 0xe036 }, - { 0xf806, 0xe049 }, { 0xf808, 0xe05c }, { 0xf80a, 0xe075 }, - { 0xf80c, 0xe0b1 }, { 0xf80e, 0xe117 }, { 0xf810, 0xe11b }, - { 0xf812, 0xe11d }, { 0xf814, 0xe11f }, { 0xf816, 0xe121 }, - { 0xf818, 0xe123 }, { 0xf81a, 0xe125 }, { 0xf81c, 0xe127 }, - { 0xf81e, 0xe129 }, { 0xf820, 0x7020 }, { 0xf822, 0xb405 }, - { 0xf824, 0xb404 }, { 0xf826, 0xc50f }, { 0xf828, 0x74a0 }, - { 0xf82a, 0xc50e }, { 0xf82c, 0x4025 }, { 0xf82e, 0xf005 }, - { 0xf830, 0x4850 }, { 0xf832, 0x4025 }, { 0xf834, 0xf002 }, - { 0xf836, 0xe002 }, { 0xf838, 0x4809 }, { 0xf83a, 0xb004 }, - { 0xf83c, 0xb005 }, { 0xf83e, 0xc502 }, { 0xf840, 0xbd00 }, - { 0xf842, 0x1522 }, { 0xf844, 0xd006 }, { 0xf846, 0x0004 }, - { 0xf848, 0x7760 }, { 0xf84a, 0xb405 }, { 0xf84c, 0xb404 }, - { 0xf84e, 0xc50f }, { 0xf850, 0x74a0 }, { 0xf852, 0xc50e }, - { 0xf854, 0x4025 }, { 0xf856, 0xf005 }, { 0xf858, 0x4850 }, - { 0xf85a, 0x4025 }, { 0xf85c, 0xf002 }, { 0xf85e, 0xe002 }, - { 0xf860, 0x4879 }, { 0xf862, 0xb004 }, { 0xf864, 0xb005 }, - { 0xf866, 0xc002 }, { 0xf868, 0xb800 }, { 0xf86a, 0x41e2 }, - { 0xf86c, 0xd006 }, { 0xf86e, 0x0004 }, { 0xf870, 0x7160 }, - { 0xf872, 0xb405 }, { 0xf874, 0xb404 }, { 0xf876, 0xc50f }, - { 0xf878, 0x74a0 }, { 0xf87a, 0xc50e }, { 0xf87c, 0x4025 }, - { 0xf87e, 0xf005 }, { 0xf880, 0x4850 }, { 0xf882, 0x4025 }, - { 0xf884, 0xf002 }, { 0xf886, 0xe002 }, { 0xf888, 0x4819 }, - { 0xf88a, 0xb004 }, { 0xf88c, 0xb005 }, { 0xf88e, 0xc302 }, - { 0xf890, 0xbb00 }, { 0xf892, 0x508e }, { 0xf894, 0xd006 }, - { 0xf896, 0x0004 }, { 0xf898, 0x7720 }, { 0xf89a, 0xb405 }, - { 0xf89c, 0xb404 }, { 0xf89e, 0xc50f }, { 0xf8a0, 0x74a0 }, - { 0xf8a2, 0xc50e }, { 0xf8a4, 0x4025 }, { 0xf8a6, 0xf005 }, - { 0xf8a8, 0x4850 }, { 0xf8aa, 0x4025 }, { 0xf8ac, 0xf002 }, - { 0xf8ae, 0xe002 }, { 0xf8b0, 0x4879 }, { 0xf8b2, 0xb004 }, - { 0xf8b4, 0xb005 }, { 0xf8b6, 0xc102 }, { 0xf8b8, 0xb900 }, - { 0xf8ba, 0x50f8 }, { 0xf8bc, 0xd006 }, { 0xf8be, 0x0004 }, - { 0xf8c0, 0x61a9 }, { 0xf8c2, 0xb403 }, { 0xf8c4, 0xb404 }, - { 0xf8c6, 0xc313 }, { 0xf8c8, 0x7460 }, { 0xf8ca, 0xc312 }, - { 0xf8cc, 0x4023 }, { 0xf8ce, 0xf005 }, { 0xf8d0, 0x4830 }, - { 0xf8d2, 0x4023 }, { 0xf8d4, 0xf002 }, { 0xf8d6, 0xe003 }, - { 0xf8d8, 0x4997 }, { 0xf8da, 0xf003 }, { 0xf8dc, 0xc00a }, - { 0xf8de, 0xe002 }, { 0xf8e0, 0xc009 }, { 0xf8e2, 0xb004 }, - { 0xf8e4, 0xb003 }, { 0xf8e6, 0xc102 }, { 0xf8e8, 0xb900 }, - { 0xf8ea, 0x34fc }, { 0xf8ec, 0xd006 }, { 0xf8ee, 0x0004 }, - { 0xf8f0, 0x02af }, { 0xf8f2, 0x041f }, { 0xf8f4, 0xb407 }, - { 0xf8f6, 0xb406 }, { 0xf8f8, 0xb405 }, { 0xf8fa, 0xb404 }, - { 0xf8fc, 0xb403 }, { 0xf8fe, 0xb402 }, { 0xf900, 0xb401 }, - { 0xf902, 0xb400 }, { 0xf904, 0x49d2 }, { 0xf906, 0xf116 }, - { 0xf908, 0xc62f }, { 0xf90a, 0x77c0 }, { 0xf90c, 0x49f9 }, - { 0xf90e, 0xf020 }, { 0xf910, 0x49fa }, { 0xf912, 0xf11e }, - { 0xf914, 0x49f2 }, { 0xf916, 0xf102 }, { 0xf918, 0xe01b }, - { 0xf91a, 0x48f2 }, { 0xf91c, 0x9fc0 }, { 0xf91e, 0xc625 }, - { 0xf920, 0x75c2 }, { 0xf922, 0x4852 }, { 0xf924, 0x9dc2 }, - { 0xf926, 0xc122 }, { 0xf928, 0x7020 }, { 0xf92a, 0x4801 }, - { 0xf92c, 0x4802 }, { 0xf92e, 0x9820 }, { 0xf930, 0xe00f }, - { 0xf932, 0xc61a }, { 0xf934, 0x77c0 }, { 0xf936, 0x49f2 }, - { 0xf938, 0xf10b }, { 0xf93a, 0xc618 }, { 0xf93c, 0x77c0 }, - { 0xf93e, 0x49f2 }, { 0xf940, 0xf007 }, { 0xf942, 0x48f2 }, - { 0xf944, 0x9fc0 }, { 0xf946, 0xc611 }, { 0xf948, 0x75c2 }, - { 0xf94a, 0x48d2 }, { 0xf94c, 0x9dc2 }, { 0xf94e, 0xb000 }, - { 0xf950, 0xb001 }, { 0xf952, 0xb002 }, { 0xf954, 0xb003 }, - { 0xf956, 0xb004 }, { 0xf958, 0xb005 }, { 0xf95a, 0xb006 }, - { 0xf95c, 0xb007 }, { 0xf95e, 0x9d6c }, { 0xf960, 0xc502 }, - { 0xf962, 0xbd00 }, { 0xf964, 0x0168 }, { 0xf966, 0xe024 }, - { 0xf968, 0xc010 }, { 0xf96a, 0xd410 }, { 0xf96c, 0xd460 }, - { 0xf96e, 0xb407 }, { 0xf970, 0xb406 }, { 0xf972, 0xb405 }, - { 0xf974, 0xb404 }, { 0xf976, 0xb403 }, { 0xf978, 0xb402 }, - { 0xf97a, 0xb401 }, { 0xf97c, 0xb400 }, { 0xf97e, 0xc152 }, - { 0xf980, 0x7020 }, { 0xf982, 0x4981 }, { 0xf984, 0xf043 }, - { 0xf986, 0xc050 }, { 0xf988, 0x7100 }, { 0xf98a, 0xb401 }, - { 0xf98c, 0xc14c }, { 0xf98e, 0x489e }, { 0xf990, 0x481d }, - { 0xf992, 0x9900 }, { 0xf994, 0xc24a }, { 0xf996, 0x7340 }, - { 0xf998, 0x49b7 }, { 0xf99a, 0xf135 }, { 0xf99c, 0xc144 }, - { 0xf99e, 0x9900 }, { 0xf9a0, 0xc245 }, { 0xf9a2, 0x7340 }, - { 0xf9a4, 0xc447 }, { 0xf9a6, 0x401c }, { 0xf9a8, 0xf109 }, - { 0xf9aa, 0x734c }, { 0xf9ac, 0x1301 }, { 0xf9ae, 0xf12b }, - { 0xf9b0, 0xc343 }, { 0xf9b2, 0x9b40 }, { 0xf9b4, 0xc33e }, - { 0xf9b6, 0x9b40 }, { 0xf9b8, 0xe022 }, { 0xf9ba, 0xc63a }, - { 0xf9bc, 0x77c0 }, { 0xf9be, 0x48f4 }, { 0xf9c0, 0x48f5 }, - { 0xf9c2, 0x48f9 }, { 0xf9c4, 0x48fa }, { 0xf9c6, 0x9fc0 }, - { 0xf9c8, 0xc231 }, { 0xf9ca, 0x7344 }, { 0xf9cc, 0x48b4 }, - { 0xf9ce, 0x9b44 }, { 0xf9d0, 0xc22e }, { 0xf9d2, 0x7340 }, - { 0xf9d4, 0x4830 }, { 0xf9d6, 0x48b1 }, { 0xf9d8, 0x4832 }, - { 0xf9da, 0x483c }, { 0xf9dc, 0x48bd }, { 0xf9de, 0x48be }, - { 0xf9e0, 0x48bf }, { 0xf9e2, 0x9b40 }, { 0xf9e4, 0xc223 }, - { 0xf9e6, 0xc32a }, { 0xf9e8, 0x9b48 }, { 0xf9ea, 0xc327 }, - { 0xf9ec, 0x9b46 }, { 0xf9ee, 0xc324 }, { 0xf9f0, 0x9b40 }, - { 0xf9f2, 0xc321 }, { 0xf9f4, 0x9b42 }, { 0xf9f6, 0xc31e }, - { 0xf9f8, 0x9b40 }, { 0xf9fa, 0xe005 }, { 0xf9fc, 0xc113 }, - { 0xf9fe, 0x7020 }, { 0xf800, 0x4881 }, { 0xf802, 0x9820 }, - { 0xf804, 0xb001 }, { 0xf806, 0xc010 }, { 0xf808, 0x9900 }, - { 0xf80a, 0xb000 }, { 0xf80c, 0xb001 }, { 0xf80e, 0xb002 }, - { 0xf810, 0xb003 }, { 0xf812, 0xb004 }, { 0xf814, 0xb005 }, - { 0xf816, 0xb006 }, { 0xf818, 0xb007 }, { 0xf81a, 0x2125 }, - { 0xf81c, 0xc102 }, { 0xf81e, 0xb900 }, { 0xf820, 0x1a6c }, - { 0xf822, 0xd410 }, { 0xf824, 0xc000 }, { 0xf826, 0xe86c }, - { 0xf828, 0xb600 }, { 0xf82a, 0xb800 }, { 0xf82c, 0xb40a }, - { 0xf82e, 0xe024 }, { 0xf830, 0x5a00 }, { 0xf832, 0x5a81 }, - { 0xf834, 0x0073 }, { 0xf836, 0x5a80 }, { 0xf838, 0x0042 }, - { 0xf83a, 0x0001 }, { 0xf83c, 0xc104 }, { 0xf83e, 0xc202 }, - { 0xf840, 0xba00 }, { 0xf842, 0x1a2e }, { 0xf844, 0xc896 }, - { 0xf846, 0xc302 }, { 0xf848, 0xbb00 }, { 0xf84a, 0x0000 }, - { 0xf84c, 0xc002 }, { 0xf84e, 0xb800 }, { 0xf850, 0x0000 }, - { 0xf852, 0xc002 }, { 0xf854, 0xb800 }, { 0xf856, 0x0000 }, - { 0xf858, 0xc502 }, { 0xf85a, 0xbd00 }, { 0xf85c, 0x0000 }, - { 0xf85e, 0xc102 }, { 0xf860, 0xb900 }, { 0xf862, 0x0000 }, - { 0xf864, 0xc102 }, { 0xf866, 0xb900 }, { 0xf868, 0x0000 }, - { 0xf86a, 0xc602 }, { 0xf86c, 0xbe00 }, { 0xf86e, 0x0000 }, - { 0xf870, 0xc602 }, { 0xf872, 0xbe00 }, { 0xf874, 0x0000 }, - { 0xf876, 0x6961 }, { 0xf878, 0x0019 }, { 0xf87a, 0x050c }, - { 0xf87c, 0x140c } +struct rge_mac_bps { + int count; + const uint16_t *regs; + const uint16_t *vals; +}; + +static const uint16_t rtl8126_1_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0 +}; + +static const uint16_t rtl8126_1_mac_bps_vals[] = { + 0xe010, 0xe02c, 0xe04e, 0xe0a4, 0xe0a8, 0xe0ab, 0xe0ae, + 0xe0b1, 0xe0b5, 0xe0b7, 0xe0b9, 0xe0bb, 0xe0bd, 0xe0bf, + 0xe0c1, 0xe0c3, 0xc716, 0xc616, 0x9ee0, 0xc616, 0x65c0, + 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, 0xc611, + 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, 0xc608, + 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, 0xb404, + 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, 0x63a4, + 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, 0x4821, + 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, 0xc411, + 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, 0x6380, + 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, 0xbb00, + 0x4a18, 0xc070, 0xe022, 0xc054, 0x7102, 0x4992, 0xf149, + 0x4893, 0x9902, 0x1b1f, 0xc74e, 0x72e0, 0x2521, 0x48a5, + 0x0b01, 0x1c4f, 0x9c00, 0x2121, 0x1d01, 0x41aa, 0x2521, + 0x9de0, 0x4856, 0x9de0, 0x1ccf, 0xe839, 0x48d6, 0x9de0, + 0x7102, 0x4996, 0xf1fe, 0x4814, 0x9902, 0x1cff, 0x0c01, + 0x1400, 0xf00c, 0x7102, 0x4996, 0xf0fb, 0x7102, 0x4990, + 0xf0fe, 0x1c1f, 0xe826, 0x7102, 0x4992, 0xf004, 0x4813, + 0x9902, 0xe01d, 0x1300, 0xf104, 0x4817, 0x9902, 0xe018, + 0x4894, 0x9902, 0x4995, 0xf00b, 0x121f, 0xf0f3, 0x131e, + 0xf003, 0x4998, 0xf0ef, 0x0201, 0x4818, 0x9902, 0xe7c9, + 0x1200, 0xf0e9, 0x4998, 0xf002, 0x1b01, 0x0a01, 0x4898, + 0x9902, 0xe7c0, 0xc00a, 0xc606, 0xbe00, 0x0c01, 0x1400, + 0xf1fe, 0xff80, 0x2362, 0xd456, 0xd404, 0xe400, 0x4166, + 0x9cf6, 0xc002, 0xb800, 0x14a6, 0x49d1, 0xc602, 0xbe00, + 0x4160, 0x49d1, 0xc602, 0xbe00, 0x41e6, 0x49d1, 0xc602, + 0xbe00, 0x4282, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, + 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, + 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0xc602, 0xbe00, 0x0000, 0x6847, 0x0019, 0x041c, 0x1322 +}; + +static const struct rge_mac_bps rtl8126_1_mac_bps = { + nitems(rtl8126_1_mac_bps_regs), + rtl8126_1_mac_bps_regs, + rtl8126_1_mac_bps_vals +}; + +static const uint16_t rtl8126_2_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c, 0xf87e, 0xf880, 0xf882, + 0xf884, 0xf886, 0xf888, 0xf88a, 0xf88c, 0xf88e, 0xf890, + 0xf892, 0xf894, 0xf896, 0xf898, 0xf89a, 0xf89c, 0xf89e, + 0xf8a0, 0xf8a2, 0xf8a4 +}; + +static const uint16_t rtl8126_2_mac_bps_vals[] = { + 0xe00a, 0xe026, 0xe048, 0xe04c, 0xe04f, 0xe052, 0xe055, + 0xe0ab, 0xe0f8, 0xe141, 0xc716, 0xc616, 0x9ee0, 0xc616, + 0x65c0, 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, + 0xc611, 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, + 0xc608, 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, + 0xb404, 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, + 0x63a4, 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, + 0x4821, 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, + 0xc411, 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, + 0x6380, 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, + 0xbb00, 0x55e2, 0xc070, 0xe022, 0x4166, 0x9cf6, 0xc602, + 0xbe00, 0x14a6, 0x49d1, 0xc602, 0xbe00, 0x4178, 0x49d1, + 0xc602, 0xbe00, 0x41fe, 0x49d1, 0xc602, 0xbe00, 0x429a, + 0xc74b, 0x76e2, 0xc54a, 0x402e, 0xf034, 0x76e0, 0x402e, + 0xf006, 0xc503, 0xc403, 0xbc00, 0xc0bc, 0x0aae, 0x76f0, + 0x1601, 0xf023, 0xc741, 0x1e04, 0x9ee0, 0x1e40, 0x9ee4, + 0xc63d, 0x9ee8, 0xc73d, 0x76e0, 0x4863, 0x9ee0, 0xc73a, + 0x76e0, 0x48ea, 0x48eb, 0x9ee0, 0xc736, 0x1e01, 0x9ee2, + 0xc72d, 0x76e0, 0x486f, 0x9ee0, 0xc72d, 0x76e0, 0x48e3, + 0x9ee0, 0xc728, 0x1e0e, 0x9ee0, 0xc71d, 0x1e01, 0x9ee4, + 0xe00d, 0x1e00, 0x9ef0, 0x1e05, 0xc715, 0x9ee0, 0xe00a, + 0x1e00, 0x9ee2, 0xc614, 0x75cc, 0x48d2, 0x9dcc, 0x1e04, + 0xc70b, 0x9ee0, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0xffc0, 0xe428, 0xd3c0, 0xbeef, + 0x5b4a, 0xdc46, 0xe0cc, 0xe84e, 0xc0a2, 0x0100, 0xc010, + 0xe85a, 0xe812, 0xc0b4, 0xc5f4, 0x74a0, 0xc6f3, 0x4026, + 0xf107, 0x74a2, 0xc6ef, 0x4026, 0xf107, 0xc6ed, 0xbe00, + 0x753a, 0xc602, 0xbe00, 0x5a3a, 0x7520, 0x49de, 0xf102, + 0xe7f9, 0xc6a1, 0x67c6, 0x7520, 0x22d2, 0x26dd, 0x1500, + 0xf002, 0xe7f1, 0x7532, 0x26d5, 0x0530, 0x0d6c, 0xc42d, + 0x308d, 0x7540, 0x4025, 0xf11e, 0x7542, 0x4025, 0xf11b, + 0x7544, 0x4025, 0xf118, 0xc423, 0x7546, 0x4025, 0xf114, + 0x7548, 0x4025, 0xf111, 0x754a, 0x4025, 0xf10e, 0xc5c0, + 0xc4c0, 0x9ca2, 0xc6c0, 0x75cc, 0x4852, 0x9dcc, 0xc6b8, + 0x1d7d, 0x9dc2, 0x1d01, 0x9dc0, 0xe7c9, 0xc40b, 0x7546, + 0x4025, 0xf1fc, 0x7548, 0x4025, 0xf1f9, 0x754a, 0x4025, + 0xf1f6, 0xe7c0, 0xffff, 0xeeee, 0xc2a6, 0x7340, 0xc2a5, + 0x4013, 0xf013, 0xc2ac, 0x7340, 0x4835, 0x9b40, 0xc240, + 0x7358, 0x48b7, 0x48b2, 0x9b58, 0x7346, 0x48b7, 0x48b2, + 0x9b46, 0x7340, 0x48b7, 0x48b2, 0x9b40, 0xe012, 0xc29a, + 0x7340, 0x48b5, 0x9b40, 0xc22e, 0x7358, 0x4837, 0x4832, + 0x9b58, 0x7346, 0x4837, 0x4832, 0x9b46, 0x7340, 0x4837, + 0x4832, 0x9b40, 0xc283, 0x7340, 0x49bf, 0xf010, 0xc21b, + 0x7344, 0x1300, 0xf104, 0x1b00, 0xc217, 0x9b40, 0x1b01, + 0xc213, 0x9b44, 0xc213, 0x734c, 0x48b7, 0x9b4c, 0xe008, + 0xc20c, 0x1b00, 0x9b44, 0xc20b, 0x734c, 0x4837, 0x9b4c, + 0xc204, 0xc302, 0xbb00, 0x2384, 0xe092, 0xd3c0, 0xe428, + 0xdc46, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, 0x6847, + 0x0119, 0x041c, 0x1134 +}; + +static const struct rge_mac_bps rtl8126_2_mac_bps = { + nitems(rtl8126_2_mac_bps_regs), + rtl8126_2_mac_bps_regs, + rtl8126_2_mac_bps_vals +}; + +static const uint16_t rtl8127_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c +}; + +static const uint16_t rtl8127_mac_bps_vals[] = { + 0xe010, 0xe023, 0xe036, 0xe049, 0xe05c, 0xe075, 0xe0b1, + 0xe117, 0xe11b, 0xe11d, 0xe11f, 0xe121, 0xe123, 0xe125, + 0xe127, 0xe129, 0x7020, 0xb405, 0xb404, 0xc50f, 0x74a0, + 0xc50e, 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, + 0x4809, 0xb004, 0xb005, 0xc502, 0xbd00, 0x1522, 0xd006, + 0x0004, 0x7760, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, + 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, + 0xb004, 0xb005, 0xc002, 0xb800, 0x41e2, 0xd006, 0x0004, + 0x7160, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, + 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4819, 0xb004, + 0xb005, 0xc302, 0xbb00, 0x508e, 0xd006, 0x0004, 0x7720, + 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, 0xf005, + 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, 0xb004, 0xb005, + 0xc102, 0xb900, 0x50f8, 0xd006, 0x0004, 0x61a9, 0xb403, + 0xb404, 0xc313, 0x7460, 0xc312, 0x4023, 0xf005, 0x4830, + 0x4023, 0xf002, 0xe003, 0x4997, 0xf003, 0xc00a, 0xe002, + 0xc009, 0xb004, 0xb003, 0xc102, 0xb900, 0x34fc, 0xd006, + 0x0004, 0x02af, 0x041f, 0xb407, 0xb406, 0xb405, 0xb404, + 0xb403, 0xb402, 0xb401, 0xb400, 0x49d2, 0xf116, 0xc62f, + 0x77c0, 0x49f9, 0xf020, 0x49fa, 0xf11e, 0x49f2, 0xf102, + 0xe01b, 0x48f2, 0x9fc0, 0xc625, 0x75c2, 0x4852, 0x9dc2, + 0xc122, 0x7020, 0x4801, 0x4802, 0x9820, 0xe00f, 0xc61a, + 0x77c0, 0x49f2, 0xf10b, 0xc618, 0x77c0, 0x49f2, 0xf007, + 0x48f2, 0x9fc0, 0xc611, 0x75c2, 0x48d2, 0x9dc2, 0xb000, + 0xb001, 0xb002, 0xb003, 0xb004, 0xb005, 0xb006, 0xb007, + 0x9d6c, 0xc502, 0xbd00, 0x0168, 0xe024, 0xc010, 0xd410, + 0xd460, 0xb407, 0xb406, 0xb405, 0xb404, 0xb403, 0xb402, + 0xb401, 0xb400, 0xc152, 0x7020, 0x4981, 0xf043, 0xc050, + 0x7100, 0xb401, 0xc14c, 0x489e, 0x481d, 0x9900, 0xc24a, + 0x7340, 0x49b7, 0xf135, 0xc144, 0x9900, 0xc245, 0x7340, + 0xc447, 0x401c, 0xf109, 0x734c, 0x1301, 0xf12b, 0xc343, + 0x9b40, 0xc33e, 0x9b40, 0xe022, 0xc63a, 0x77c0, 0x48f4, + 0x48f5, 0x48f9, 0x48fa, 0x9fc0, 0xc231, 0x7344, 0x48b4, + 0x9b44, 0xc22e, 0x7340, 0x4830, 0x48b1, 0x4832, 0x483c, + 0x48bd, 0x48be, 0x48bf, 0x9b40, 0xc223, 0xc32a, 0x9b48, + 0xc327, 0x9b46, 0xc324, 0x9b40, 0xc321, 0x9b42, 0xc31e, + 0x9b40, 0xe005, 0xc113, 0x7020, 0x4881, 0x9820, 0xb001, + 0xc010, 0x9900, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0x2125, 0xc102, 0xb900, 0x1a6c, + 0xd410, 0xc000, 0xe86c, 0xb600, 0xb800, 0xb40a, 0xe024, + 0x5a00, 0x5a81, 0x0073, 0x5a80, 0x0042, 0x0001, 0xc104, + 0xc202, 0xba00, 0x1a2e, 0xc896, 0xc302, 0xbb00, 0x0000, + 0xc002, 0xb800, 0x0000, 0xc002, 0xb800, 0x0000, 0xc502, + 0xbd00, 0x0000, 0xc102, 0xb900, 0x0000, 0xc102, 0xb900, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0x6961, 0x0019, 0x050c, 0x140c +}; + +static const struct rge_mac_bps rtl8127_mac_bps = { + nitems(rtl8127_mac_bps_regs), + rtl8127_mac_bps_regs, + rtl8127_mac_bps_vals }; static const struct rge_hw_regaddr_array mac_r25_ephy[] = { @@ -305,6 +489,3220 @@ static const struct rge_hw_regaddr_array mac_r27_ephy[] = { { 0x941c, 0x0190 }, { 0x981c, 0x0140 }, { 0x9c1c, 0x0140 } }; +static const struct rge_hw_regaddr_array mac_r26_1_mcu[] = { + { 0xa436, 0x8023 }, { 0xa438, 0x4700 }, { 0xa436, 0xb82e }, + { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, + { 0xa438, 0x0000 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8025 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8033 }, { 0xa438, 0x1800 }, { 0xa438, 0x8037 }, + { 0xa438, 0x1800 }, { 0xa438, 0x803c }, { 0xa438, 0x1800 }, + { 0xa438, 0x8044 }, { 0xa438, 0x1800 }, { 0xa438, 0x8054 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8059 }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9b5 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4070 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0xd504 }, { 0xa438, 0xc994 }, { 0xa438, 0xd500 }, + { 0xa438, 0xd707 }, { 0xa438, 0x60d0 }, { 0xa438, 0xd701 }, + { 0xa438, 0x252d }, { 0xa438, 0x8023 }, { 0xa438, 0x1800 }, + { 0xa438, 0x1064 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0x1800 }, { 0xa438, 0x1052 }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9d0 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x60d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x252d }, + { 0xa438, 0x8031 }, { 0xa438, 0x1800 }, { 0xa438, 0x1171 }, + { 0xa438, 0x1800 }, { 0xa438, 0x1187 }, { 0xa438, 0x1800 }, + { 0xa438, 0x116a }, { 0xa438, 0xc0ff }, { 0xa438, 0xcaff }, + { 0xa438, 0x1800 }, { 0xa438, 0x00d6 }, { 0xa438, 0xd504 }, + { 0xa438, 0xa001 }, { 0xa438, 0xd704 }, { 0xa438, 0x1800 }, + { 0xa438, 0x128b }, { 0xa438, 0xd707 }, { 0xa438, 0x2005 }, + { 0xa438, 0x8042 }, { 0xa438, 0xd75e }, { 0xa438, 0x1800 }, + { 0xa438, 0x137a }, { 0xa438, 0x1800 }, { 0xa438, 0x13ed }, + { 0xa438, 0x61d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x60a5 }, + { 0xa438, 0xd504 }, { 0xa438, 0xc9b2 }, { 0xa438, 0xd500 }, + { 0xa438, 0xf004 }, { 0xa438, 0xd504 }, { 0xa438, 0xc9b1 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, { 0xa438, 0x6070 }, + { 0xa438, 0x1800 }, { 0xa438, 0x10a8 }, { 0xa438, 0x1800 }, + { 0xa438, 0x10bd }, { 0xa438, 0xd500 }, { 0xa438, 0xc492 }, + { 0xa438, 0xd501 }, { 0xa438, 0x1800 }, { 0xa438, 0x13c1 }, + { 0xa438, 0xa980 }, { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, + { 0xa438, 0x143b }, { 0xa436, 0xa026 }, { 0xa438, 0x143a }, + { 0xa436, 0xa024 }, { 0xa438, 0x13c0 }, { 0xa436, 0xa022 }, + { 0xa438, 0x10bc }, { 0xa436, 0xa020 }, { 0xa438, 0x1379 }, + { 0xa436, 0xa006 }, { 0xa438, 0x128a }, { 0xa436, 0xa004 }, + { 0xa438, 0x00d5 }, { 0xa436, 0xa002 }, { 0xa438, 0x1182 }, + { 0xa436, 0xa000 }, { 0xa438, 0x1075 }, { 0xa436, 0xa008 }, + { 0xa438, 0xff00 }, { 0xa436, 0xa016 }, { 0xa438, 0x0010 }, + { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, { 0xa436, 0xa014 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8015 }, { 0xa438, 0x1800 }, { 0xa438, 0x801a }, + { 0xa438, 0x1800 }, { 0xa438, 0x801e }, { 0xa438, 0x1800 }, + { 0xa438, 0x8027 }, { 0xa438, 0x1800 }, { 0xa438, 0x8027 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8027 }, { 0xa438, 0x1800 }, + { 0xa438, 0x8027 }, { 0xa438, 0x0c0f }, { 0xa438, 0x0505 }, + { 0xa438, 0xba01 }, { 0xa438, 0x1800 }, { 0xa438, 0x015e }, + { 0xa438, 0x0c0f }, { 0xa438, 0x0506 }, { 0xa438, 0xba02 }, + { 0xa438, 0x1800 }, { 0xa438, 0x017c }, { 0xa438, 0x9910 }, + { 0xa438, 0x9a03 }, { 0xa438, 0x1800 }, { 0xa438, 0x02d4 }, + { 0xa438, 0x8580 }, { 0xa438, 0xc090 }, { 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}, { 0xa438, 0x06bf }, { 0xa438, 0x8b12 }, + { 0xa438, 0x0272 }, { 0xa438, 0xdca2 }, { 0xa438, 0x0206 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1502 }, { 0xa438, 0x72dc }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1802 }, { 0xa438, 0x72dc }, + { 0xa438, 0xbf8f }, { 0xa438, 0x7b1a }, { 0xa438, 0x92dd }, + { 0xa438, 0xffef }, { 0xa438, 0x97ff }, { 0xa438, 0xfefd }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf9f8 }, { 0xa438, 0xfbef }, + { 0xa438, 0x79fb }, { 0xa438, 0x028a }, { 0xa438, 0xa0bf }, + { 0xa438, 0x8b1b }, { 0xa438, 0x0272 }, { 0xa438, 0x9a16 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x1e02 }, { 0xa438, 0x72dc }, + { 0xa438, 0xac28 }, { 0xa438, 0x02ae }, { 0xa438, 0xf4d6 }, + { 0xa438, 0x0000 }, { 0xa438, 0xbf8b }, { 0xa438, 0x1b02 }, + { 0xa438, 0x7291 }, { 0xa438, 0xae03 }, { 0xa438, 0x028a }, + { 0xa438, 0x8ad2 }, { 0xa438, 0x00d7 }, { 0xa438, 0x0000 }, + { 0xa438, 0xe18f }, { 0xa438, 0x8f1b }, { 0xa438, 0x12a1 }, + { 0xa438, 0x0004 }, { 0xa438, 0xef67 }, { 0xa438, 0xae1d }, + { 0xa438, 0xef12 }, { 0xa438, 0xbf8b }, { 0xa438, 0x2102 }, + { 0xa438, 0x72bd }, { 0xa438, 0x12bf }, { 0xa438, 0x8b24 }, + { 0xa438, 0x0272 }, { 0xa438, 0xdcef }, { 0xa438, 0x64ad }, + { 0xa438, 0x4f04 }, { 0xa438, 0x7eff }, { 0xa438, 0xff16 }, + { 0xa438, 0x0271 }, { 0xa438, 0xccae }, { 0xa438, 0xd7bf }, + { 0xa438, 0x8b2d }, { 0xa438, 0x0272 }, { 0xa438, 0x91ff }, + { 0xa438, 0xef97 }, { 0xa438, 0xfffc }, { 0xa438, 0xfd04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xef69 }, { 0xa438, 0xd104 }, + { 0xa438, 0xbf8f }, { 0xa438, 0x92d8 }, { 0xa438, 0x10dc }, + { 0xa438, 0x1981 }, { 0xa438, 0x9ff9 }, { 0xa438, 0xef96 }, + { 0xa438, 0xfefc }, { 0xa438, 0x04f8 }, { 0xa438, 0xfbfa }, + { 0xa438, 0xef69 }, { 0xa438, 0xbf8f }, { 0xa438, 0x87d0 }, + { 0xa438, 0x08d1 }, { 0xa438, 0xff02 }, { 0xa438, 0x8a7c }, + { 0xa438, 0xef96 }, { 0xa438, 0xfeff }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xef69 }, { 0xa438, 0xdd19 }, + { 0xa438, 0x809f }, { 0xa438, 0xfbef }, { 0xa438, 0x96fe }, + { 0xa438, 0xfc04 }, { 0xa438, 0xf8e0 }, { 0xa438, 0x8044 }, + { 0xa438, 0xf624 }, { 0xa438, 0xe480 }, { 0xa438, 0x44fc }, + { 0xa438, 0x04f8 }, { 0xa438, 0xe080 }, { 0xa438, 0x4ff6 }, + { 0xa438, 0x24e4 }, { 0xa438, 0x804f }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8fa }, { 0xa438, 0xfbef }, { 0xa438, 0x79fb }, + { 0xa438, 0xbf8b }, { 0xa438, 0x2a02 }, { 0xa438, 0x7291 }, + { 0xa438, 0xbf8b }, { 0xa438, 0x3302 }, { 0xa438, 0x7291 }, + { 0xa438, 0xd68b }, { 0xa438, 0x2dd7 }, { 0xa438, 0x8b30 }, + { 0xa438, 0x0116 }, { 0xa438, 0xad50 }, { 0xa438, 0x0cbf }, + { 0xa438, 0x8b2a }, { 0xa438, 0x0272 }, { 0xa438, 0x9abf }, + { 0xa438, 0x8b33 }, { 0xa438, 0x0272 }, { 0xa438, 0x9aff }, + { 0xa438, 0xef97 }, { 0xa438, 0xfffe }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8f9 }, { 0xa438, 0xfaef }, { 0xa438, 0x49f8 }, + { 0xa438, 0xccf8 }, { 0xa438, 0xef96 }, { 0xa438, 0x0272 }, + { 0xa438, 0x9a1f }, { 0xa438, 0x22c7 }, { 0xa438, 0xbd02 }, + { 0xa438, 0x72dc }, { 0xa438, 0xac28 }, { 0xa438, 0x16ac }, + { 0xa438, 0x3008 }, { 0xa438, 0x0271 }, { 0xa438, 0xe4ef }, + { 0xa438, 0x6712 }, { 0xa438, 0xaeee }, { 0xa438, 0xd700 }, + { 0xa438, 0x0202 }, { 0xa438, 0x71ff }, { 0xa438, 0xac50 }, + { 0xa438, 0x05ae }, { 0xa438, 0xe3d7 }, { 0xa438, 0x0000 }, + { 0xa438, 0xfcc4 }, { 0xa438, 0xfcef }, { 0xa438, 0x94fe }, + { 0xa438, 0xfdfc }, { 0xa438, 0x04cc }, { 0xa438, 0xc010 }, + { 0xa438, 0x44ac }, { 0xa438, 0x0030 }, { 0xa438, 0xbce0 }, + { 0xa438, 0x74bc }, { 0xa438, 0xe0b8 }, { 0xa438, 0xbce0 }, + { 0xa438, 0xfcbc }, { 0xa438, 0xe011 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xddac }, { 0xa438, 0xb6fa }, { 0xa438, 0xacb4 }, + { 0xa438, 0xf0ac }, { 0xa438, 0xba92 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xffac }, { 0xa438, 0x5600 }, { 0xa438, 0xacb4 }, + { 0xa438, 0xccac }, { 0xa438, 0xb6ff }, { 0xa438, 0xb034 }, + { 0xa436, 0xb818 }, { 0xa438, 0x2ae4 }, { 0xa436, 0xb81a }, + { 0xa438, 0x380a }, { 0xa436, 0xb81c }, { 0xa438, 0x3edd }, + { 0xa436, 0xb81e }, { 0xa438, 0x41a3 }, { 0xa436, 0xb850 }, + { 0xa438, 0x0684 }, { 0xa436, 0xb852 }, { 0xa438, 0x1c02 }, + { 0xa436, 0xb878 }, { 0xa438, 0x1b70 }, { 0xa436, 0xb884 }, + { 0xa438, 0x0633 }, { 0xa436, 0xb832 }, { 0xa438, 0x00ff }, + { 0xa436, 0xacfc }, { 0xa438, 0x0100 }, { 0xa436, 0xacfe }, + { 0xa438, 0x8000 }, { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3c67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3e67 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3067 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x000f }, { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3267 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0xa7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3467 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3667 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x000f }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3867 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x000f }, { 0xa436, 0xad00 }, + { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, { 0xa438, 0x3a67 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x000f }, + { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3ce7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3ee7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, { 0xa438, 0x30e7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x32e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xafff }, + { 0xa436, 0xad02 }, { 0xa438, 0x34e7 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1008 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x36ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x1048 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff5 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x38ff }, { 0xa436, 0xad04 }, { 0xa438, 0x1088 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3aff }, { 0xa436, 0xad04 }, + { 0xa438, 0x10c8 }, { 0xa436, 0xad06 }, { 0xa438, 0xf417 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0x1109 }, { 0xa436, 0xad06 }, + { 0xa438, 0xf434 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0207 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x1149 }, + { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x2227 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1189 }, { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4247 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x11c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6267 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x1209 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1249 }, { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2027 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x1289 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4047 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x12c9 }, + { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x6067 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x1309 }, { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x8087 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x1349 }, { 0xa436, 0xad06 }, + { 0xa438, 0x0555 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xa0a7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x1389 }, + { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xc0c7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x13c9 }, { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe0e7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x140b }, { 0xa436, 0xad06 }, + { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0107 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x144b }, + { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x2127 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x148b }, { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4147 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x14cb }, { 0xa436, 0xad06 }, + { 0xa438, 0x2417 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6167 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x5109 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x8287 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x5149 }, { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xa2a7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x5189 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xc2c7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x51c9 }, + { 0xa436, 0xad06 }, { 0xa438, 0x2417 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xe2e7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x5009 }, { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x0a0f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x5049 }, { 0xa436, 0xad06 }, + { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x2a2f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x5089 }, + { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x4a4f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x50c9 }, { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x6a6f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x5209 }, { 0xa436, 0xad06 }, + { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x080f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x5249 }, + { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x282f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x5289 }, { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x484f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x52c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x686f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x5309 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x888f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0x5349 }, { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xa8af }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x5389 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xc8cf }, { 0xa436, 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}, + { 0xa438, 0x696f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x9209 }, { 0xa436, 0xad06 }, + { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x8a8f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x9249 }, + { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xaaaf }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x9289 }, { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xcacf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x92c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2417 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xeaef }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x9009 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x1217 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x9049 }, { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3237 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x9089 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5257 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x90c9 }, + { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x7277 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x9109 }, { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x1017 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x9149 }, { 0xa436, 0xad06 }, + { 0xa438, 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}, { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xd0d7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0x93c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xf0f7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0x960b }, + { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x1117 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x964b }, { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3137 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x968b }, { 0xa436, 0xad06 }, + { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5157 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x96cb }, + { 0xa436, 0xad06 }, { 0xa438, 0x2417 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x7177 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd309 }, { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9297 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd349 }, { 0xa436, 0xad06 }, + { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb2b7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0xd389 }, + { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xd2d7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd3c9 }, { 0xa436, 0xad06 }, { 0xa438, 0x2417 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf2f7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd009 }, { 0xa436, 0xad06 }, + { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x1a1f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0xd049 }, + { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x3a3f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd089 }, { 0xa436, 0xad06 }, { 0xa438, 0x1476 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x5a5f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd0c9 }, { 0xa436, 0xad06 }, + { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x7a7f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0xd109 }, + { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x181f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd149 }, { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x383f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd189 }, { 0xa436, 0xad06 }, + { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x585f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0xd1c9 }, + { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x787f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd209 }, { 0xa436, 0xad06 }, { 0xa438, 0x3534 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x989f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd249 }, { 0xa436, 0xad06 }, + { 0xa438, 0x0555 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb8bf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, { 0xa438, 0xd289 }, + { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xd8df }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd2c9 }, { 0xa436, 0xad06 }, { 0xa438, 0x2517 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf8ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe0 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd70b }, { 0xa436, 0xad06 }, + { 0xa438, 0x3534 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x191f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xd74b }, + { 0xa436, 0xad06 }, { 0xa438, 0x0555 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x393f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd78b }, { 0xa436, 0xad06 }, { 0xa438, 0x1576 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x595f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd7cb }, { 0xa436, 0xad06 }, + { 0xa438, 0x2417 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x797f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x000d }, + { 0xa436, 0xad06 }, { 0xa438, 0x3434 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x9a9f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x004d }, { 0xa436, 0xad06 }, { 0xa438, 0x0455 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xbabf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, + { 0xa436, 0xad04 }, { 0xa438, 0x008d }, { 0xa436, 0xad06 }, + { 0xa438, 0x1476 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xdadf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, { 0xa438, 0x00cd }, + { 0xa436, 0xad06 }, { 0xa438, 0x2c17 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xfaf8 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe2 }, { 0xa436, 0xad04 }, + { 0xa438, 0x400d }, { 0xa436, 0xad06 }, { 0xa438, 0x3c34 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x8187 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x404d }, { 0xa436, 0xad06 }, + { 0xa438, 0x0c55 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xa1a7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x408d }, + { 0xa436, 0xad06 }, { 0xa438, 0x1c76 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xc1c7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x40cd }, { 0xa436, 0xad06 }, { 0xa438, 0x2c97 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe1e7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x800d }, { 0xa436, 0xad06 }, + { 0xa438, 0x3cb4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0x898f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0x804d }, + { 0xa436, 0xad06 }, { 0xa438, 0x0cd5 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xa9af }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0x808d }, { 0xa436, 0xad06 }, { 0xa438, 0x1cf6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc9cf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0x80cd }, { 0xa436, 0xad06 }, + { 0xa438, 0x2d17 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe9ef }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xc00d }, + { 0xa436, 0xad06 }, { 0xa438, 0x3d34 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0x9197 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xc04d }, { 0xa436, 0xad06 }, { 0xa438, 0x0d55 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xb1b7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xc08d }, { 0xa436, 0xad06 }, + { 0xa438, 0x1d76 }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd1d7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xc0cd }, + { 0xa436, 0xad06 }, { 0xa438, 0x2d97 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xf1f7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x3dbf }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0x999f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x0ddf }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb9bf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x1dff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, { 0xa438, 0xd9df }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf9ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe1 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0002 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe7 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3d67 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3f67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x3167 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3367 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3567 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x3767 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3967 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x3b67 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x3de7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3fe7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x31e7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, { 0xa438, 0x33e7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x35e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x37e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x39e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x3be6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2066 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2264 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2464 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2664 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0064 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0264 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0464 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0664 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0864 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0a65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0c65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0e65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1065 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1266 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1466 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xc7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1666 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2866 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2a66 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2c66 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, { 0xa438, 0x2e66 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x20e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x22e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, { 0xa438, 0x24e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x26e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x00e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x8fff }, { 0xa436, 0xad02 }, { 0xa438, 0x02e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xafff }, { 0xa436, 0xad02 }, + { 0xa438, 0x04e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x06e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xefff }, { 0xa436, 0xad02 }, { 0xa438, 0x08e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0ae5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0ce5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, { 0xa438, 0x0ee5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x10e5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x12e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xafff }, { 0xa436, 0xad02 }, { 0xa438, 0x14e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x16e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x28e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2ae6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2ce6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2ee6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2166 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2364 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2564 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x57ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2764 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0164 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0364 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xb7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0564 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0764 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0964 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x0b65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0d65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0f65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1165 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1366 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1566 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xd7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1766 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xf7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2966 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2b66 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x2d66 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2f66 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x21e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x1fff }, { 0xa436, 0xad02 }, { 0xa438, 0x23e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x25e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x27e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x7fff }, { 0xa436, 0xad02 }, { 0xa438, 0x01e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x03e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x05e4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x07e4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x09e4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x0be5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x0de5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x0fe5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x11e5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, { 0xa438, 0x13e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x15e6 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xdfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x17e6 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x29e6 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x87ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x2be5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xa7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x2de5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x2fe5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1865 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x8fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1a65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xafff }, { 0xa436, 0xad02 }, { 0xa438, 0x1c65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcfff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1e65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xefff }, + { 0xa436, 0xad02 }, { 0xa438, 0x18e5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x97ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1ae5 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1ce5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xd7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1ee5 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xf7ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1965 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x9fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1b65 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xbfff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1d65 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xdfff }, { 0xa436, 0xad02 }, { 0xa438, 0x1f65 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x19e5 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x1b9c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x27ff }, { 0xa436, 0xad02 }, { 0xa438, 0x1d9c }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x1f9c }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x2fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x589c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5c9c }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x599c }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5d9c }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3fff }, { 0xa436, 0xad02 }, { 0xa438, 0x5a9c }, + { 0xa436, 0xad04 }, { 0xa438, 0x100e }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5eff }, { 0xa436, 0xad04 }, { 0xa438, 0x104e }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5bff }, { 0xa436, 0xad04 }, + { 0xa438, 0x110e }, { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x5fff }, + { 0xa436, 0xad04 }, { 0xa438, 0x114e }, { 0xa436, 0xad06 }, + { 0xa438, 0xf817 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0x120f }, + { 0xa436, 0xad06 }, { 0xa438, 0xf836 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xc3c7 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x124f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xe3e7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x130f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x0307 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x134f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x2327 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x510f }, { 0xa436, 0xad06 }, { 0xa438, 0x5936 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x4347 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x514f }, { 0xa436, 0xad06 }, + { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x6367 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x500f }, + { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x8387 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x504f }, { 0xa436, 0xad06 }, { 0xa438, 0x4817 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xa3a7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x520f }, { 0xa436, 0xad06 }, + { 0xa438, 0x5836 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xcbcf }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x524f }, + { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xebef }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x530f }, { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x0b0f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x534f }, { 0xa436, 0xad06 }, + { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x2b2f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x920f }, + { 0xa436, 0xad06 }, { 0xa438, 0x5936 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x4b4f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x924f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x6b6f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x900f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x8b8f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x904f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4817 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xabaf }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x910f }, { 0xa436, 0xad06 }, { 0xa438, 0x5836 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xd3d7 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0x914f }, { 0xa436, 0xad06 }, + { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xf3f7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0x930f }, + { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x1317 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0x934f }, { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x3337 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd30f }, { 0xa436, 0xad06 }, + { 0xa438, 0x5936 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x5357 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd34f }, + { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x7377 }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd00f }, { 0xa436, 0xad06 }, { 0xa438, 0x19b6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x9397 }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd04f }, { 0xa436, 0xad06 }, + { 0xa438, 0x4817 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0xb3b7 }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd10f }, + { 0xa436, 0xad06 }, { 0xa438, 0x5836 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0xdbdf }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xd14f }, { 0xa436, 0xad06 }, { 0xa438, 0x0997 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xfbff }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xd20f }, { 0xa436, 0xad06 }, + { 0xa438, 0x19b6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x1b1f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xd24f }, + { 0xa436, 0xad06 }, { 0xa438, 0x4917 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x3b3f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x593f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0x5b5f }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x099f }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x7b7f }, { 0xa436, 0xad02 }, + { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x19bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, { 0xa438, 0x9b9f }, + { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, { 0xa436, 0xad00 }, + { 0xa438, 0xbbbf }, { 0xa436, 0xad02 }, { 0xa438, 0xffe3 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0004 }, + { 0xa436, 0xad00 }, { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffa4 }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x27ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffa4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x47ff }, { 0xa436, 0xad02 }, { 0xa438, 0xffa4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x67ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x58a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x0fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5ca4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x2fff }, { 0xa436, 0xad02 }, { 0xa438, 0x50a4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x4fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x54a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x6fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x59a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x17ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5da4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x37ff }, { 0xa436, 0xad02 }, + { 0xa438, 0x51a4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x57ff }, + { 0xa436, 0xad02 }, { 0xa438, 0x55a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x77ff }, { 0xa436, 0xad02 }, { 0xa438, 0x5aa4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x1fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5ea4 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0x3fff }, + { 0xa436, 0xad02 }, { 0xa438, 0x52a4 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad02 }, { 0xa438, 0x56a4 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0x7fff }, { 0xa436, 0xad02 }, + { 0xa438, 0x5ba4 }, { 0xa436, 0xad04 }, { 0xa438, 0x2a06 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0x5fff }, { 0xa436, 0xad04 }, + { 0xa438, 0x2b06 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0x53ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x2a06 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0x57ff }, { 0xa436, 0xad04 }, { 0xa438, 0x2b06 }, + { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x069f }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xd0ff }, + { 0xa436, 0xad04 }, { 0xa438, 0x6a46 }, { 0xa436, 0xad06 }, + { 0xa438, 0x5ff6 }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd4ff }, { 0xa436, 0xad04 }, { 0xa438, 0x6b46 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd8ff }, { 0xa436, 0xad04 }, + { 0xa438, 0x6a46 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xdcff }, + { 0xa436, 0xad04 }, { 0xa438, 0x6b46 }, { 0xa436, 0xad06 }, + { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x069f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd1ff }, { 0xa436, 0xad04 }, + { 0xa438, 0xaa86 }, { 0xa436, 0xad06 }, { 0xa438, 0x5ff6 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xd5ff }, + { 0xa436, 0xad04 }, { 0xa438, 0xab86 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff7 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd9ff }, { 0xa436, 0xad04 }, { 0xa438, 0xaa86 }, + { 0xa436, 0xad06 }, { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xddff }, { 0xa436, 0xad04 }, + { 0xa438, 0xab86 }, { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0xf63f }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x069f }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, + { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x4fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0003 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd2ff }, { 0xa436, 0xad04 }, { 0xa438, 0xeac6 }, + { 0xa436, 0xad06 }, { 0xa438, 0x5ff6 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0003 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xd6ff }, { 0xa436, 0xad04 }, + { 0xa438, 0xebc6 }, { 0xa436, 0xad06 }, { 0xa438, 0xfff7 }, + { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xdaff }, + { 0xa436, 0xad04 }, { 0xa438, 0xeac6 }, { 0xa436, 0xad06 }, + { 0xa438, 0xfff4 }, { 0xa436, 0xad08 }, { 0xa438, 0x0007 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xdeff }, { 0xa436, 0xad04 }, { 0xa438, 0xebc6 }, + { 0xa436, 0xad06 }, { 0xa438, 0xf615 }, { 0xa436, 0xad08 }, + { 0xa438, 0x0007 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0xf63f }, + { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, + { 0xa438, 0xffff }, { 0xa436, 0xad02 }, { 0xa438, 0xffff }, + { 0xa436, 0xad04 }, { 0xa438, 0xffff }, { 0xa436, 0xad06 }, + { 0xa438, 0x069f }, { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, + { 0xa436, 0xad00 }, { 0xa438, 0xffff }, { 0xa436, 0xad02 }, + { 0xa438, 0xffff }, { 0xa436, 0xad04 }, { 0xa438, 0xffff }, + { 0xa436, 0xad06 }, { 0xa438, 0x16bf }, { 0xa436, 0xad08 }, + { 0xa438, 0x0013 }, { 0xa436, 0xad00 }, { 0xa438, 0xffff }, + { 0xa436, 0xad02 }, { 0xa438, 0xffff }, { 0xa436, 0xad04 }, + { 0xa438, 0xffff }, { 0xa436, 0xad06 }, { 0xa438, 0x4fff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, { 0xa436, 0xad00 }, + { 0xa438, 0xfffa }, { 0xa436, 0xad02 }, { 0xa438, 0xd3ff }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0x5fff }, { 0xa436, 0xad08 }, { 0xa438, 0x0013 }, + { 0xa436, 0xad00 }, { 0xa438, 0xc7ff }, { 0xa436, 0xad02 }, + { 0xa438, 0xd7e7 }, { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, + { 0xa436, 0xad06 }, { 0xa438, 0xffff }, { 0xa436, 0xad08 }, + { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, { 0xa438, 0xe7ff }, + { 0xa436, 0xad02 }, { 0xa438, 0xdbe7 }, { 0xa436, 0xad04 }, + { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, { 0xa438, 0xffff }, + { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, { 0xa436, 0xad00 }, + { 0xa438, 0x07ff }, { 0xa436, 0xad02 }, { 0xa438, 0xdfe7 }, + { 0xa436, 0xad04 }, { 0xa438, 0xfffe }, { 0xa436, 0xad06 }, + { 0xa438, 0xffff }, { 0xa436, 0xad08 }, { 0xa438, 0x0017 }, + { 0xa436, 0xacfc }, { 0xa438, 0x0000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2000 }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2001 }, { 0xa436, 0xacce }, + { 0xa438, 0x6008 }, { 0xa436, 0xaccc }, { 0xa438, 0x2002 }, + { 0xa436, 0xacce }, { 0xa438, 0x6010 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2003 }, { 0xa436, 0xacce }, { 0xa438, 0x6020 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2004 }, { 0xa436, 0xacce }, + { 0xa438, 0x6060 }, { 0xa436, 0xaccc }, { 0xa438, 0x2005 }, + { 0xa436, 0xacce }, { 0xa438, 0x60a0 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2006 }, { 0xa436, 0xacce }, { 0xa438, 0x60e0 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2007 }, { 0xa436, 0xacce }, + { 0xa438, 0x6128 }, { 0xa436, 0xaccc }, { 0xa438, 0x2008 }, + { 0xa436, 0xacce }, { 0xa438, 0x6178 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2009 }, { 0xa436, 0xacce }, { 0xa438, 0x61a8 }, + { 0xa436, 0xaccc }, { 0xa438, 0x200a }, { 0xa436, 0xacce }, + { 0xa438, 0x61f0 }, { 0xa436, 0xaccc }, { 0xa438, 0x200b }, + { 0xa436, 0xacce }, { 0xa438, 0x6248 }, { 0xa436, 0xaccc }, + { 0xa438, 0x200c }, { 0xa436, 0xacce }, { 0xa438, 0x6258 }, + { 0xa436, 0xaccc }, { 0xa438, 0x200d }, { 0xa436, 0xacce }, + { 0xa438, 0x6268 }, { 0xa436, 0xaccc }, { 0xa438, 0x200e }, + { 0xa436, 0xacce }, { 0xa438, 0x6270 }, { 0xa436, 0xaccc }, + { 0xa438, 0x200f }, { 0xa436, 0xacce }, { 0xa438, 0x6274 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2010 }, { 0xa436, 0xacce }, + { 0xa438, 0x627c }, { 0xa436, 0xaccc }, { 0xa438, 0x2011 }, + { 0xa436, 0xacce }, { 0xa438, 0x6284 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2012 }, { 0xa436, 0xacce }, { 0xa438, 0x6294 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2013 }, { 0xa436, 0xacce }, + { 0xa438, 0x629c }, { 0xa436, 0xaccc }, { 0xa438, 0x2014 }, + { 0xa436, 0xacce }, { 0xa438, 0x62ac }, { 0xa436, 0xaccc }, + { 0xa438, 0x2015 }, { 0xa436, 0xacce }, { 0xa438, 0x62bc }, + { 0xa436, 0xaccc }, { 0xa438, 0x2016 }, { 0xa436, 0xacce }, + { 0xa438, 0x62c4 }, { 0xa436, 0xaccc }, { 0xa438, 0x2017 }, + { 0xa436, 0xacce }, { 0xa438, 0x7000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x2018 }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x2019 }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, { 0xa438, 0x201a }, + { 0xa436, 0xacce }, { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x201b }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x201c }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, { 0xa438, 0x201d }, + { 0xa436, 0xacce }, { 0xa438, 0x6000 }, { 0xa436, 0xaccc }, + { 0xa438, 0x201e }, { 0xa436, 0xacce }, { 0xa438, 0x6000 }, + { 0xa436, 0xaccc }, { 0xa438, 0x201f }, { 0xa436, 0xacce }, + { 0xa438, 0x6000 }, { 0xa436, 0xacce }, { 0xa438, 0x0000 }, + { 0xa436, 0x0000 }, { 0xa438, 0x0000 }, { 0xb82e, 0x0000 }, + { 0xa436, 0x8023 }, { 0xa438, 0x0000 }, { 0xa436, 0x801e }, + { 0xa438, 0x0027 }, { 0xb820, 0x0000 }, { 0xb892, 0x0000 }, + { 0xb88e, 0xc15c }, { 0xb890, 0x0303 }, { 0xb890, 0x0506 }, + { 0xb890, 0x0807 }, { 0xb890, 0x090b }, { 0xb890, 0x0e12 }, + { 0xb890, 0x1617 }, { 0xb890, 0x1c24 }, { 0xb890, 0x2b37 }, + { 0xb890, 0x0203 }, { 0xb890, 0x0304 }, { 0xb890, 0x0504 }, + { 0xb890, 0x0506 }, { 0xb890, 0x0708 }, { 0xb890, 0x090a }, + { 0xb890, 0x0b0e }, { 0xb890, 0x1013 }, { 0xb890, 0x1519 }, + { 0xb890, 0x1d22 }, { 0xb890, 0x282e }, { 0xb890, 0x363e }, + { 0xb890, 0x474b }, { 0xb88e, 0xc196 }, { 0xb890, 0x3f5e }, + { 0xb890, 0xf834 }, { 0xb890, 0x6c01 }, { 0xb890, 0xa67f }, + { 0xb890, 0xa06c }, { 0xb890, 0x043b }, { 0xb890, 0x6190 }, + { 0xb890, 0x88db }, { 0xb890, 0x9ecd }, { 0xb890, 0x4dbc }, + { 0xb890, 0x6e0e }, { 0xb890, 0x9f2d }, { 0xb890, 0x2c18 }, + { 0xb890, 0x5e8c }, { 0xb890, 0x5bfe }, { 0xb890, 0x183c }, + { 0xb890, 0x23c9 }, { 0xb890, 0x3e84 }, { 0xb890, 0x3c20 }, + { 0xb890, 0xcc56 }, { 0xb890, 0x3480 }, { 0xb890, 0x0040 }, + { 0xb88e, 0xc00f }, { 0xb890, 0x3502 }, { 0xb890, 0x0203 }, + { 0xb890, 0x0303 }, { 0xb890, 0x0404 }, { 0xb890, 0x0506 }, + { 0xb890, 0x0607 }, { 0xb890, 0x080a }, { 0xb890, 0x0b0d }, + { 0xb890, 0x0e10 }, { 0xb890, 0x1114 }, { 0xb890, 0x171b }, + { 0xb890, 0x1f22 }, { 0xb890, 0x2832 }, { 0xb890, 0x0101 }, + { 0xb890, 0x0101 }, { 0xb890, 0x0202 }, { 0xb890, 0x0303 }, + { 0xb890, 0x0404 }, { 0xb890, 0x0506 }, { 0xb890, 0x0709 }, + { 0xb890, 0x0a0d }, { 0xb88e, 0xc047 }, { 0xb890, 0x365f }, + { 0xb890, 0xbe10 }, { 0xb890, 0x84e4 }, { 0xb890, 0x60e9 }, + { 0xb890, 0xa86a }, { 0xb890, 0xf1e3 }, { 0xb890, 0xf73f }, + { 0xb890, 0x5c02 }, { 0xb890, 0x9547 }, { 0xb890, 0xc30c }, + { 0xb890, 0xb064 }, { 0xb890, 0x079a }, { 0xb890, 0x1e23 }, + { 0xb890, 0x1b5d }, { 0xb890, 0x92e7 }, { 0xb890, 0x4baf }, + { 0xb890, 0x2386 }, { 0xb890, 0x01b6 }, { 0xb890, 0x6f82 }, + { 0xb890, 0xdc1c }, { 0xb890, 0x8c92 }, { 0xb88e, 0xc110 }, + { 0xb890, 0x0c7f }, { 0xb890, 0x1014 }, { 0xb890, 0x231d }, + { 0xb890, 0x2023 }, { 0xb890, 0x2628 }, { 0xb890, 0x2a2d }, + { 0xb890, 0x2d2c }, { 0xb890, 0x2c2e }, { 0xb890, 0x320d }, + { 0xb88e, 0xc186 }, { 0xb890, 0x0306 }, { 0xb890, 0x0804 }, + { 0xb890, 0x0406 }, { 0xb890, 0x0707 }, { 0xb890, 0x0709 }, + { 0xb890, 0x0b0f }, { 0xb890, 0x161d }, { 0xb890, 0x202a }, + { 0xb890, 0x3f5e }, { 0xb88e, 0xc1c1 }, { 0xb890, 0x0040 }, + { 0xb890, 0x5920 }, { 0xb890, 0x88cd }, { 0xb890, 0x1ca1 }, + { 0xb890, 0x3d20 }, { 0xb890, 0x3ae4 }, { 0xb890, 0x6a43 }, + { 0xb890, 0x30af }, { 0xb890, 0xdd16 }, { 0xb88e, 0xc283 }, + { 0xb890, 0x1611 }, { 0xb890, 0x161c }, { 0xb890, 0x2127 }, + { 0xb890, 0x2c32 }, { 0xb890, 0x373d }, { 0xb890, 0x4247 }, + { 0xb890, 0x4d52 }, { 0xb890, 0x585a }, { 0xb890, 0x0004 }, + { 0xb890, 0x080c }, { 0xb890, 0x1014 }, { 0xb890, 0x181b }, + { 0xb890, 0x1f23 }, { 0xb890, 0x272b }, { 0xb890, 0x2f33 }, + { 0xb890, 0x363a }, { 0xb890, 0x3e42 }, { 0xb890, 0x464a }, + { 0xb890, 0x4d51 }, { 0xb890, 0x5559 }, { 0xb890, 0x5d65 }, + { 0xb890, 0xe769 }, { 0xb890, 0xeb56 }, { 0xb890, 0xc04b }, + { 0xb890, 0xd502 }, { 0xb890, 0x2fb1 }, { 0xb890, 0x33b5 }, + { 0xb890, 0x37f8 }, { 0xb890, 0xbb98 }, { 0xb890, 0x7450 }, + { 0xb890, 0x4c48 }, { 0xb890, 0x12dc }, { 0xb890, 0xdcdc }, + { 0xb890, 0x934a }, { 0xb890, 0x3e33 }, { 0xb890, 0xe496 }, + { 0xb890, 0x724e }, { 0xb890, 0x2b07 }, { 0xb890, 0xe4c0 }, + { 0xb890, 0x9c79 }, { 0xb890, 0x5512 }, { 0xb88e, 0xc212 }, + { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, + { 0xb890, 0x2020 }, { 0xb890, 0x2020 }, { 0xb890, 0x2019 }, + { 0xb88e, 0xc24d }, { 0xb890, 0x8400 }, { 0xb890, 0x0000 }, + { 0xb890, 0x0000 }, { 0xb890, 0x0000 }, { 0xb890, 0x0000 }, + { 0xb890, 0x0000 }, { 0xb88e, 0xc2d3 }, { 0xb890, 0x5524 }, + { 0xb890, 0x2526 }, { 0xb890, 0x2728 }, { 0xb88e, 0xc2e3 }, + { 0xb890, 0x3323 }, { 0xb890, 0x2324 }, { 0xb890, 0x2425 } +}; + +static const struct rge_hw_regaddr_array mac_r26_2_mcu[] = { + { 0xa436, 0x8023 }, { 0xa438, 0x4701 }, { 0xa436, 0xb82e }, + { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, + { 0xa438, 0x0000 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, + { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0x1800 }, + { 0xa438, 0x802a }, { 0xa438, 0x1800 }, { 0xa438, 0x8032 }, + { 0xa438, 0x1800 }, { 0xa438, 0x803a }, { 0xa438, 0x1800 }, + { 0xa438, 0x803e }, { 0xa438, 0x1800 }, { 0xa438, 0x8044 }, + { 0xa438, 0x1800 }, { 0xa438, 0x804b }, { 0xa438, 0xd504 }, + { 0xa438, 0xc9b5 }, { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4070 }, { 0xa438, 0x1800 }, { 0xa438, 0x1082 }, + { 0xa438, 0xd504 }, { 0xa438, 0x1800 }, { 0xa438, 0x107a }, + { 0xa438, 0x61d0 }, { 0xa438, 0xd701 }, { 0xa438, 0x60a5 }, + { 0xa438, 0xd504 }, { 0xa438, 0xc9b2 }, { 0xa438, 0xd500 }, + { 0xa438, 0xf004 }, { 0xa438, 0xd504 }, { 0xa438, 0xc9b1 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd707 }, { 0xa438, 0x6070 }, + { 0xa438, 0x1800 }, { 0xa438, 0x10b0 }, { 0xa438, 0x1800 }, + { 0xa438, 0x10c5 }, { 0xa438, 0xd707 }, { 0xa438, 0x2005 }, + { 0xa438, 0x8030 }, { 0xa438, 0xd75e }, { 0xa438, 0x1800 }, + { 0xa438, 0x138c }, { 0xa438, 0x1800 }, { 0xa438, 0x13ff }, + { 0xa438, 0xc504 }, { 0xa438, 0xce20 }, { 0xa438, 0xcf01 }, + { 0xa438, 0xd70a }, { 0xa438, 0x4005 }, { 0xa438, 0xcf02 }, + { 0xa438, 0x1800 }, { 0xa438, 0x1b99 }, { 0xa438, 0xa980 }, + { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, { 0xa438, 0x144d }, + { 0xa438, 0x907f }, { 0xa438, 0x91a3 }, { 0xa438, 0x9306 }, + { 0xa438, 0xb118 }, { 0xa438, 0x1800 }, { 0xa438, 0x2147 }, + { 0xa438, 0x907f }, { 0xa438, 0x9209 }, { 0xa438, 0x91a3 }, + { 0xa438, 0x9306 }, { 0xa438, 0xb118 }, { 0xa438, 0x1800 }, + { 0xa438, 0x203c }, { 0xa438, 0xd707 }, { 0xa438, 0x4121 }, + { 0xa438, 0xd706 }, { 0xa438, 0x40fc }, { 0xa438, 0xd70a }, + { 0xa438, 0x40b5 }, { 0xa438, 0xd028 }, { 0xa438, 0xd1c1 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8057 }, { 0xa438, 0xd07b }, + { 0xa438, 0xd1c5 }, { 0xa438, 0xd503 }, { 0xa438, 0xa108 }, + { 0xa438, 0xd505 }, { 0xa438, 0x8103 }, { 0xa438, 0xd504 }, + { 0xa438, 0xa002 }, { 0xa438, 0xa302 }, { 0xa438, 0xd707 }, + { 0xa438, 0x4061 }, { 0xa438, 0xd503 }, { 0xa438, 0x8b01 }, + { 0xa438, 0xd500 }, { 0xa438, 0xc48a }, { 0xa438, 0xd503 }, + { 0xa438, 0xcc09 }, { 0xa438, 0xcd58 }, { 0xa438, 0xaf01 }, + { 0xa438, 0xd500 }, { 0xa438, 0xbe10 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, { 0xa438, 0x606c }, + { 0xa438, 0xd704 }, { 0xa438, 0x645c }, { 0xa438, 0xd75e }, + { 0xa438, 0x604d }, { 0xa438, 0xfff8 }, { 0xa438, 0x9e10 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, + { 0xa438, 0x606c }, { 0xa438, 0xd704 }, { 0xa438, 0x631c }, + { 0xa438, 0xd75e }, { 0xa438, 0x404d }, { 0xa438, 0xfff8 }, + { 0xa438, 0xd504 }, { 0xa438, 0xaa18 }, { 0xa438, 0xa001 }, + { 0xa438, 0xa1e0 }, { 0xa438, 0xd500 }, { 0xa438, 0x1000 }, + { 0xa438, 0x1739 }, { 0xa438, 0xd719 }, { 0xa438, 0x7fac }, + { 0xa438, 0xd504 }, { 0xa438, 0xa001 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd704 }, + { 0xa438, 0x5f5c }, { 0xa438, 0xd719 }, { 0xa438, 0x3aaf }, + { 0xa438, 0x8091 }, { 0xa438, 0xf016 }, { 0xa438, 0xd707 }, + { 0xa438, 0x6121 }, { 0xa438, 0x1000 }, { 0xa438, 0x16d8 }, + { 0xa438, 0xd503 }, { 0xa438, 0xcd59 }, { 0xa438, 0xaf01 }, + { 0xa438, 0xd500 }, { 0xa438, 0x1800 }, { 0xa438, 0x0ddc }, + { 0xa438, 0xd503 }, { 0xa438, 0x8040 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x16d8 }, { 0xa438, 0xd503 }, + { 0xa438, 0xcd5a }, { 0xa438, 0xaf01 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1800 }, { 0xa438, 0x0dbf }, { 0xa438, 0xd504 }, + { 0xa438, 0xa008 }, { 0xa438, 0xa204 }, { 0xa438, 0xd500 }, + { 0xa438, 0x1000 }, { 0xa438, 0x1739 }, { 0xa438, 0xd701 }, + { 0xa438, 0x5fa0 }, { 0xa438, 0xd503 }, { 0xa438, 0xa082 }, + { 0xa438, 0xd500 }, { 0xa438, 0xd71e }, { 0xa438, 0x4097 }, + { 0xa438, 0xd078 }, { 0xa438, 0xd1aa }, { 0xa438, 0xf003 }, + { 0xa438, 0xd078 }, { 0xa438, 0xd1aa }, { 0xa438, 0xd707 }, + { 0xa438, 0x40c1 }, { 0xa438, 0xd706 }, { 0xa438, 0x409c }, + { 0xa438, 0xd70a }, { 0xa438, 0x4055 }, { 0xa438, 0xf010 }, + { 0xa438, 0xd706 }, { 0xa438, 0x6065 }, { 0xa438, 0xcc89 }, + { 0xa438, 0xf002 }, { 0xa438, 0xcc8b }, { 0xa438, 0x1000 }, + { 0xa438, 0x0b7b }, { 0xa438, 0xd705 }, { 0xa438, 0x2ad0 }, + { 0xa438, 0x80ca }, { 0xa438, 0xf003 }, { 0xa438, 0x1000 }, + { 0xa438, 0x0b81 }, { 0xa438, 0x1000 }, { 0xa438, 0x0b87 }, + { 0xa438, 0x1000 }, { 0xa438, 0x0c53 }, { 0xa438, 0x1800 }, + { 0xa438, 0x12d7 }, { 0xa436, 0xa026 }, { 0xa438, 0x125d }, + { 0xa436, 0xa024 }, { 0xa438, 0x2033 }, { 0xa436, 0xa022 }, + { 0xa438, 0x213f }, { 0xa436, 0xa020 }, { 0xa438, 0x144c }, + { 0xa436, 0xa006 }, { 0xa438, 0x1b98 }, { 0xa436, 0xa004 }, + { 0xa438, 0x138b }, { 0xa436, 0xa002 }, { 0xa438, 0x10c4 }, + { 0xa436, 0xa000 }, { 0xa438, 0x1079 }, { 0xa436, 0xa008 }, + { 0xa438, 0xff00 }, { 0xa436, 0xa016 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa012 }, { 0xa438, 0x0ff8 }, { 0xa436, 0xa014 }, + { 0xa438, 0xd04d }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, + { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, + { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa436, 0xa152 }, + { 0xa438, 0x12dc }, { 0xa436, 0xa154 }, { 0xa438, 0x3fff }, + { 0xa436, 0xa156 }, { 0xa438, 0x3fff }, { 0xa436, 0xa158 }, + { 0xa438, 0x3fff }, { 0xa436, 0xa15a }, { 0xa438, 0x3fff }, + { 0xa436, 0xa15c }, { 0xa438, 0x3fff }, { 0xa436, 0xa15e }, + { 0xa438, 0x3fff }, { 0xa436, 0xa160 }, { 0xa438, 0x3fff }, + { 0xa436, 0xa150 }, { 0xa438, 0x0001 }, { 0xa436, 0xa016 }, + { 0xa438, 0x0020 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, + { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, + { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0x1800 }, + { 0xa438, 0x8022 }, { 0xa438, 0x1800 }, { 0xa438, 0x8233 }, + { 0xa438, 0x1800 }, { 0xa438, 0x8332 }, { 0xa438, 0x1800 }, + { 0xa438, 0x855f }, { 0xa438, 0x1800 }, { 0xa438, 0x8619 }, + { 0xa438, 0x1800 }, { 0xa438, 0x86af }, { 0xa438, 0xd706 }, + { 0xa438, 0x60a9 }, { 0xa438, 0xd700 }, { 0xa438, 0x60a1 }, + { 0xa438, 0x1800 }, { 0xa438, 0x0962 }, { 0xa438, 0x1800 }, + { 0xa438, 0x0962 }, { 0xa438, 0x1800 }, { 0xa438, 0x0982 }, + { 0xa438, 0x800a }, { 0xa438, 0x0c1f }, { 0xa438, 0x0d00 }, + { 0xa438, 0x8dc0 }, { 0xa438, 0x1000 }, { 0xa438, 0x12b5 }, + { 0xa438, 0x1800 }, { 0xa438, 0x0f99 }, { 0xa438, 0xd702 }, + { 0xa438, 0x6201 }, { 0xa438, 0xd702 }, { 0xa438, 0x40a0 }, + { 0xa438, 0xd70d }, { 0xa438, 0x419d }, { 0xa438, 0x1800 }, + { 0xa438, 0x802c }, { 0xa438, 0xd701 }, { 0xa438, 0x611a }, + { 0xa438, 0x8710 }, { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, + { 0xa438, 0x8280 }, { 0xa438, 0x8780 }, { 0xa438, 0x9503 }, + { 0xa438, 0xf002 }, { 0xa438, 0xa710 }, { 0xa438, 0x9580 }, + { 0xa438, 0x0c03 }, { 0xa438, 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}, + { 0xa438, 0xfc04 }, { 0xa438, 0xf8f9 }, { 0xa438, 0xef79 }, + { 0xa438, 0xfbbf }, { 0xa438, 0x87f7 }, { 0xa438, 0x0278 }, + { 0xa438, 0x385c }, { 0xa438, 0x2000 }, { 0xa438, 0x0d4d }, + { 0xa438, 0xa100 }, { 0xa438, 0x20bf }, { 0xa438, 0x87f7 }, + { 0xa438, 0x0278 }, { 0xa438, 0x385c }, { 0xa438, 0x0600 }, + { 0xa438, 0x0d49 }, { 0xa438, 0xe38f }, { 0xa438, 0xa31b }, + { 0xa438, 0x319f }, { 0xa438, 0x0ebf }, { 0xa438, 0x8800 }, + { 0xa438, 0x0277 }, { 0xa438, 0xf6bf }, { 0xa438, 0x8806 }, + { 0xa438, 0x0277 }, { 0xa438, 0xf6ae }, { 0xa438, 0x0cbf }, + { 0xa438, 0x8800 }, { 0xa438, 0x0277 }, { 0xa438, 0xedbf }, + { 0xa438, 0x8806 }, { 0xa438, 0x0277 }, { 0xa438, 0xedee }, + { 0xa438, 0x8f9c }, { 0xa438, 0x00ff }, { 0xa438, 0xef97 }, + { 0xa438, 0xfdfc }, { 0xa438, 0x04f8 }, { 0xa438, 0xf9ef }, + { 0xa438, 0x79fb }, { 0xa438, 0xbf87 }, { 0xa438, 0xf702 }, + { 0xa438, 0x7838 }, { 0xa438, 0x5c20 }, { 0xa438, 0x000d }, + { 0xa438, 0x4da1 }, { 0xa438, 0x014a }, { 0xa438, 0xbf87 }, + { 0xa438, 0xf702 }, { 0xa438, 0x7838 }, { 0xa438, 0x5c07 }, + { 0xa438, 0xffe3 }, { 0xa438, 0x8fa4 }, { 0xa438, 0x1b31 }, + { 0xa438, 0x9f3a }, { 0xa438, 0x0d48 }, { 0xa438, 0xe38f }, + { 0xa438, 0xa51b }, { 0xa438, 0x319f }, { 0xa438, 0x31bf }, + { 0xa438, 0x87fa }, { 0xa438, 0x0278 }, { 0xa438, 0x38e3 }, + { 0xa438, 0x8fa6 }, { 0xa438, 0x1b31 }, { 0xa438, 0x9f24 }, + { 0xa438, 0x0d48 }, { 0xa438, 0xe38f }, { 0xa438, 0xa71b }, + { 0xa438, 0x319f }, { 0xa438, 0x1bbf }, { 0xa438, 0x87fd }, + { 0xa438, 0x0278 }, { 0xa438, 0x38e3 }, { 0xa438, 0x8fa8 }, + { 0xa438, 0x1b31 }, { 0xa438, 0x9f0e }, { 0xa438, 0xbf88 }, + { 0xa438, 0x0302 }, { 0xa438, 0x77f6 }, { 0xa438, 0xbf88 }, + { 0xa438, 0x0902 }, { 0xa438, 0x77f6 }, { 0xa438, 0xae00 }, + { 0xa438, 0xffef }, { 0xa438, 0x97fd }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8ef }, { 0xa438, 0x79fb }, { 0xa438, 0xe080 }, + { 0xa438, 0x18ad }, { 0xa438, 0x261c }, { 0xa438, 0xee8f }, + { 0xa438, 0x9c00 }, { 0xa438, 0xbf88 }, { 0xa438, 0x0002 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0602 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0302 }, + { 0xa438, 0x77ed }, { 0xa438, 0xbf88 }, { 0xa438, 0x0902 }, + { 0xa438, 0x77ed }, { 0xa438, 0xffef }, { 0xa438, 0x97fc }, + { 0xa438, 0x04f8 }, { 0xa438, 0xe080 }, { 0xa438, 0x40f6 }, + { 0xa438, 0x25e4 }, { 0xa438, 0x8040 }, { 0xa438, 0xfc04 }, + { 0xa438, 0xf8e0 }, { 0xa438, 0x804c }, { 0xa438, 0xf625 }, + { 0xa438, 0xe480 }, { 0xa438, 0x4cfc }, { 0xa438, 0x0455 }, + { 0xa438, 0xa4ba }, { 0xa438, 0xf0a6 }, { 0xa438, 0x4af0 }, + { 0xa438, 0xa64c }, { 0xa438, 0xf0a6 }, { 0xa438, 0x4e66 }, + { 0xa438, 0xa4b6 }, { 0xa438, 0x55a4 }, { 0xa438, 0xb600 }, + { 0xa438, 0xac56 }, { 0xa438, 0x11ac }, { 0xa438, 0x56ee }, + { 0xa438, 0x804c }, { 0xa438, 0x3aaf }, { 0xa438, 0x0627 }, + { 0xa438, 0xbf88 }, { 0xa438, 0x4802 }, { 0xa438, 0x77ed }, + { 0xa438, 0xd203 }, { 0xa438, 0xe083 }, { 0xa438, 0x8a0d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0182 }, { 0xa438, 0xe083 }, { 0xa438, 0x890d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0182 }, { 0xa438, 0xe083 }, { 0xa438, 0x880d }, + { 0xa438, 0x01f6 }, { 0xa438, 0x271b }, { 0xa438, 0x03aa }, + { 0xa438, 0x0782 }, { 0xa438, 0xbf88 }, { 0xa438, 0x4802 }, + { 0xa438, 0x77f6 }, { 0xa438, 0xaf16 }, { 0xa438, 0x1500 }, + { 0xa438, 0xa86a }, { 0xa436, 0xb818 }, { 0xa438, 0x1d84 }, + { 0xa436, 0xb81a }, { 0xa438, 0x1060 }, { 0xa436, 0xb81c }, + { 0xa438, 0x0623 }, { 0xa436, 0xb81e }, { 0xa438, 0x15ef }, + { 0xa436, 0xb850 }, { 0xa438, 0xffff }, { 0xa436, 0xb852 }, + { 0xa438, 0xffff }, { 0xa436, 0xb878 }, { 0xa438, 0xffff }, + { 0xa436, 0xb884 }, { 0xa438, 0xffff }, { 0xa436, 0xb832 }, + { 0xa438, 0x000f }, { 0xa436, 0x0000 }, { 0xa438, 0x0000 }, + { 0xb82e, 0x0000 }, { 0xa436, 0x8023 }, { 0xa438, 0x0000 }, + { 0xb820, 0x0000 } +}; + static const struct rge_hw_regaddr_array mac_r27_mcu[] = { { 0xa436, 0x8023 }, { 0xa438, 0x6100 }, { 0xa436, 0xb82e }, { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 }, @@ -6209,7181 +9607,6 @@ static const struct rge_hw_regaddr_array mac_r27_mcu[] = { { 0xa438, 0x0000 }, \ { 0xb820, 0x0000 } -#define MAC_R26_MCU \ - { 0xa436, 0x8023 }, \ - { 0xa438, 0x4700 }, \ - { 0xa436, 0xb82e }, \ - { 0xa438, 0x0001 }, \ - { 0xb820, 0x0090 }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8025 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8033 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8037 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x803c }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8044 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8054 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8059 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b5 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x4070 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x107a }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc994 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x60d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x252d }, \ - { 0xa438, 0x8023 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1064 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x107a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1052 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9d0 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x60d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x252d }, \ - { 0xa438, 0x8031 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1171 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x1187 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x116a }, \ - { 0xa438, 0xc0ff }, \ - { 0xa438, 0xcaff }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x00d6 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xa001 }, \ - { 0xa438, 0xd704 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x128b }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x2005 }, \ - { 0xa438, 0x8042 }, \ - { 0xa438, 0xd75e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x137a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x13ed }, \ - { 0xa438, 0x61d0 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x60a5 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b2 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xf004 }, \ - { 0xa438, 0xd504 }, \ - { 0xa438, 0xc9b1 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xd707 }, \ - { 0xa438, 0x6070 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x10a8 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x10bd }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0xc492 }, \ - { 0xa438, 0xd501 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x13c1 }, \ - { 0xa438, 0xa980 }, \ - { 0xa438, 0xd500 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x143b }, \ - { 0xa436, 0xa026 }, \ - { 0xa438, 0x143a }, \ - { 0xa436, 0xa024 }, \ - { 0xa438, 0x13c0 }, \ - { 0xa436, 0xa022 }, \ - { 0xa438, 0x10bc }, \ - { 0xa436, 0xa020 }, \ - { 0xa438, 0x1379 }, \ - { 0xa436, 0xa006 }, \ - { 0xa438, 0x128a }, \ - { 0xa436, 0xa004 }, \ - { 0xa438, 0x00d5 }, \ - { 0xa436, 0xa002 }, \ - { 0xa438, 0x1182 }, \ - { 0xa436, 0xa000 }, \ - { 0xa438, 0x1075 }, \ - { 0xa436, 0xa008 }, \ - { 0xa438, 0xff00 }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0010 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8015 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x801a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x801e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8027 }, \ - { 0xa438, 0x0c0f }, \ - { 0xa438, 0x0505 }, \ - { 0xa438, 0xba01 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x015e }, \ - { 0xa438, 0x0c0f }, \ - { 0xa438, 0x0506 }, \ - { 0xa438, 0xba02 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x017c }, \ - { 0xa438, 0x9910 }, \ - { 0xa438, 0x9a03 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x02d4 }, \ - { 0xa438, 0x8580 }, \ - { 0xa438, 0xc090 }, \ - { 0xa438, 0x9a03 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x02c9 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fa3 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x0067 }, \ - { 0xa436, 0xa08e }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa08c }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa08a }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa088 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xa086 }, \ - { 0xa438, 0x018c }, \ - { 0xa436, 0xa084 }, \ - { 0xa438, 0x02d3 }, \ - { 0xa436, 0xa082 }, \ - { 0xa438, 0x017a }, \ - { 0xa436, 0xa080 }, \ - { 0xa438, 0x015c }, \ - { 0xa436, 0xa090 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xa016 }, \ - { 0xa438, 0x0020 }, \ - { 0xa436, 0xa012 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xa014 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8010 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8023 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8313 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x831a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8489 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x86b9 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x86c1 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x87ad }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x124e }, \ - { 0xa438, 0x9308 }, \ - { 0xa438, 0xb201 }, \ - { 0xa438, 0xb301 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x5fe0 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa438, 0xb302 }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0xb201 }, \ - { 0xa438, 0xb309 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x5fe0 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa438, 0xb302 }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x0025 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x6069 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x6421 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x43ab }, \ - { 0xa438, 0x800a }, \ - { 0xa438, 0x8190 }, \ - { 0xa438, 0x8204 }, \ - { 0xa438, 0xa280 }, \ - { 0xa438, 0x8406 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0xa108 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0f19 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x5fb3 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x8f1f }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x7f33 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x11bd }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x81aa }, \ - { 0xa438, 0x8710 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x33b1 }, \ - { 0xa438, 0x8051 }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x60b5 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x6069 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8056 }, \ - { 0xa438, 0xa00a }, \ - { 0xa438, 0xa280 }, \ - { 0xa438, 0xa404 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f3 }, \ - { 0xa438, 0xd173 }, \ - { 0xa438, 0xd04d }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0xd173 }, \ - { 0xa438, 0xd05d }, \ - { 0xa438, 0xd10d }, \ - { 0xa438, 0xd049 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x64f5 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5ee7 }, \ - { 0xa438, 0xb920 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fb4 }, \ - { 0xa438, 0x9920 }, \ - { 0xa438, 0xcb3c }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7d94 }, \ - { 0xa438, 0x6045 }, \ - { 0xa438, 0xfffa }, \ - { 0xa438, 0xb820 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fa5 }, \ - { 0xa438, 0x9820 }, \ - { 0xa438, 0xcb3d }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x60b5 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7bb4 }, \ - { 0xa438, 0x61b6 }, \ - { 0xa438, 0xfff8 }, \ - { 0xa438, 0xbb80 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0x9b80 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x60e7 }, \ - { 0xa438, 0xcb3f }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8094 }, \ - { 0xa438, 0xcb3e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x810f }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f3 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0xae04 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x8e04 }, \ - { 0xa438, 0x9503 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x65fe }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0d04 }, \ - { 0xa438, 0x8dc0 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x11bd }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x414b }, \ - { 0xa438, 0x0cc0 }, \ - { 0xa438, 0x0040 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x0102 }, \ - { 0xa438, 0x0ce0 }, \ - { 0xa438, 0x03e0 }, \ - { 0xa438, 0xccce }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80b7 }, \ - { 0xa438, 0x0cc0 }, \ - { 0xa438, 0x0040 }, \ - { 0xa438, 0x0c03 }, \ - { 0xa438, 0x0100 }, \ - { 0xa438, 0x0ce0 }, \ - { 0xa438, 0x0380 }, \ - { 0xa438, 0xcc9c }, \ - { 0xa438, 0x8710 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1118 }, \ - { 0xa438, 0xa104 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8104 }, \ - { 0xa438, 0xa202 }, \ - { 0xa438, 0xa140 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8140 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1121 }, \ - { 0xa438, 0xaa0f }, \ - { 0xa438, 0xa130 }, \ - { 0xa438, 0xaa2f }, \ - { 0xa438, 0xa2d5 }, \ - { 0xa438, 0xa405 }, \ - { 0xa438, 0xa720 }, \ - { 0xa438, 0xa00a }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f3 }, \ - { 0xa438, 0xd704 }, \ - { 0xa438, 0x3cf1 }, \ - { 0xa438, 0x80d5 }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0d02 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80d7 }, \ - { 0xa438, 0x0c1f }, \ - { 0xa438, 0x0d01 }, \ - { 0xa438, 0x0cc0 }, \ - { 0xa438, 0x0d40 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x11bd }, \ - { 0xa438, 0x8710 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1118 }, \ - { 0xa438, 0xa108 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8108 }, \ - { 0xa438, 0xa203 }, \ - { 0xa438, 0x8a2f }, \ - { 0xa438, 0xa130 }, \ - { 0xa438, 0x8204 }, \ - { 0xa438, 0xa140 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8140 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1121 }, \ - { 0xa438, 0xd17a }, \ - { 0xa438, 0xd04b }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fb4 }, \ - { 0xa438, 0xa204 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fa7 }, \ - { 0xa438, 0xb920 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fb4 }, \ - { 0xa438, 0x9920 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x6125 }, \ - { 0xa438, 0x6054 }, \ - { 0xa438, 0xfffb }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x5fa7 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x80f7 }, \ - { 0xa438, 0xb820 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1175 }, \ - { 0xa438, 0xd71f }, \ - { 0xa438, 0x7fa5 }, \ - { 0xa438, 0x9820 }, \ - { 0xa438, 0x9b01 }, \ - { 0xa438, 0xd402 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x110d }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x33b1 }, \ - { 0xa438, 0x811c }, \ - { 0xa438, 0xd701 }, \ - { 0xa438, 0x60b5 }, \ - { 0xa438, 0xd706 }, \ - { 0xa438, 0x6069 }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x811e }, \ - { 0xa438, 0x1800 }, \ - { 0xa438, 0x8183 }, \ - { 0xa438, 0xd70c }, \ - { 0xa438, 0x40ab }, \ - { 0xa438, 0x800a }, \ - { 0xa438, 0x8110 }, \ - { 0xa438, 0x8284 }, \ - { 0xa438, 0x8404 }, \ - { 0xa438, 0xa710 }, \ - { 0xa438, 0x8120 }, \ - { 0xa438, 0x8241 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1118 }, \ - { 0xa438, 0xa104 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x112a }, \ - { 0xa438, 0x8104 }, \ - { 0xa438, 0x1000 }, \ - { 0xa438, 0x1121 }, \ - { 0xa438, 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0xa438, 0x8f91 }, \ - { 0xa438, 0x77ef }, \ - { 0xa438, 0x96fe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x69e1 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x0f02 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x93bf }, \ - { 0xa438, 0x8b12 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbde1 }, \ - { 0xa438, 0x8f94 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x95bf }, \ - { 0xa438, 0x8b18 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x71e4 }, \ - { 0xa438, 0xef47 }, \ - { 0xa438, 0xe484 }, \ - { 0xa438, 0x57e5 }, \ - { 0xa438, 0x8458 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8e0 }, \ - { 0xa438, 0x8018 }, \ - { 0xa438, 0xad25 }, \ - { 0xa438, 0x15ee }, \ - { 0xa438, 0x8f96 }, \ - { 0xa438, 0x00d0 }, \ - { 0xa438, 0x08e4 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xe48f }, \ - { 0xa438, 0x93e4 }, \ - { 0xa438, 0x8f94 }, \ - { 0xa438, 0xe48f }, \ - { 0xa438, 0x9502 }, \ - { 0xa438, 0x888e }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf9e2 }, \ - { 0xa438, 0x845d }, \ - { 0xa438, 0xe38f }, \ - { 0xa438, 0x910d }, \ - { 0xa438, 0x345b }, \ - { 0xa438, 0x0f1a }, \ - { 0xa438, 0x32ac }, \ - { 0xa438, 0x3c09 }, \ - { 0xa438, 0x0c34 }, \ - { 0xa438, 0x5bf0 }, \ - { 0xa438, 0xe784 }, \ - { 0xa438, 0xf7ae }, \ - { 0xa438, 0x04ee }, \ - { 0xa438, 0x84f7 }, \ - { 0xa438, 0xf0e3 }, \ - { 0xa438, 0x8f91 }, \ - { 0xa438, 0x5b0f }, \ - { 0xa438, 0x1b23 }, \ - { 0xa438, 0xac37 }, \ - { 0xa438, 0x0ae3 }, \ - { 0xa438, 0x84f7 }, \ - { 0xa438, 0x1e32 }, \ - { 0xa438, 0xe784 }, \ - { 0xa438, 0xf7ae }, \ - { 0xa438, 0x00fd }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xfaef }, \ - { 0xa438, 0x69fa }, \ - { 0xa438, 0xfbd2 }, \ - { 0xa438, 0x01d3 }, \ - { 0xa438, 0x04d6 }, \ - { 0xa438, 0x8f92 }, \ - { 0xa438, 0xd78f }, \ - { 0xa438, 0x7bef }, \ - { 0xa438, 0x97d9 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xd81b }, \ - { 0xa438, 0x109e }, \ - { 0xa438, 0x0480 }, \ - { 0xa438, 0xdcd2 }, \ - { 0xa438, 0x0016 }, \ - { 0xa438, 0x1783 }, \ - { 0xa438, 0x9fed }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xf9fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0xcffb }, \ - { 0xa438, 0xd200 }, \ - { 0xa438, 0xbe00 }, \ - { 0xa438, 0x00ef }, \ - { 0xa438, 0x1229 }, \ - { 0xa438, 0x40d0 }, \ - { 0xa438, 0x041c }, \ - { 0xa438, 0x081a }, \ - { 0xa438, 0x10bf }, \ - { 0xa438, 0x8b27 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x89ee }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x7fef }, \ - { 0xa438, 0x1249 }, \ - { 0xa438, 0x021a }, \ - { 0xa438, 0x91d8 }, \ - { 0xa438, 0x19d9 }, \ - { 0xa438, 0xef74 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xccef }, \ - { 0xa438, 0x47dd }, \ - { 0xa438, 0x89dc }, \ - { 0xa438, 0x18a8 }, \ - { 0xa438, 0x0002 }, \ - { 0xa438, 0xd202 }, \ - { 0xa438, 0x8990 }, \ - { 0xa438, 0x12a2 }, \ - { 0xa438, 0x04c8 }, \ - { 0xa438, 0xffc7 }, \ - { 0xa438, 0xffef }, \ - { 0xa438, 0x97ff }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8f9 }, \ - { 0xa438, 0xfafb }, \ - { 0xa438, 0xef79 }, \ - { 0xa438, 0xfbbf }, \ - { 0xa438, 0x8f7f }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0x4902 }, \ - { 0xa438, 0x1a91 }, \ - { 0xa438, 0xd819 }, \ - { 0xa438, 0xd9ef }, \ - { 0xa438, 0x64bf }, \ - { 0xa438, 0x8f87 }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0x4902 }, \ - { 0xa438, 0x1a91 }, \ - { 0xa438, 0xd819 }, \ - { 0xa438, 0xd9ef }, \ - { 0xa438, 0x7489 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xb1ad }, \ - { 0xa438, 0x502c }, \ - { 0xa438, 0xef46 }, \ - { 0xa438, 0xdc19 }, \ - { 0xa438, 0xdda2 }, \ - { 0xa438, 0x0006 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x0f02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xa201 }, \ - { 0xa438, 0x06bf }, \ - { 0xa438, 0x8b12 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xdca2 }, \ - { 0xa438, 0x0206 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1502 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1802 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x7b1a }, \ - { 0xa438, 0x92dd }, \ - { 0xa438, 0xffef }, \ - { 0xa438, 0x97ff }, \ - { 0xa438, 0xfefd }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf9f8 }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0x028a }, \ - { 0xa438, 0xa0bf }, \ - { 0xa438, 0x8b1b }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9a16 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1e02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xac28 }, \ - { 0xa438, 0x02ae }, \ - { 0xa438, 0xf4d6 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x1b02 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xae03 }, \ - { 0xa438, 0x028a }, \ - { 0xa438, 0x8ad2 }, \ - { 0xa438, 0x00d7 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xe18f }, \ - { 0xa438, 0x8f1b }, \ - { 0xa438, 0x12a1 }, \ - { 0xa438, 0x0004 }, \ - { 0xa438, 0xef67 }, \ - { 0xa438, 0xae1d }, \ - { 0xa438, 0xef12 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x2102 }, \ - { 0xa438, 0x72bd }, \ - { 0xa438, 0x12bf }, \ - { 0xa438, 0x8b24 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0xdcef }, \ - { 0xa438, 0x64ad }, \ - { 0xa438, 0x4f04 }, \ - { 0xa438, 0x7eff }, \ - { 0xa438, 0xff16 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xccae }, \ - { 0xa438, 0xd7bf }, \ - { 0xa438, 0x8b2d }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x91ff }, \ - { 0xa438, 0xef97 }, \ - { 0xa438, 0xfffc }, \ - { 0xa438, 0xfd04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xd104 }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x92d8 }, \ - { 0xa438, 0x10dc }, \ - { 0xa438, 0x1981 }, \ - { 0xa438, 0x9ff9 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfefc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xfbfa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xbf8f }, \ - { 0xa438, 0x87d0 }, \ - { 0xa438, 0x08d1 }, \ - { 0xa438, 0xff02 }, \ - { 0xa438, 0x8a7c }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0xfeff }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xef69 }, \ - { 0xa438, 0xdd19 }, \ - { 0xa438, 0x809f }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x96fe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8e0 }, \ - { 0xa438, 0x8044 }, \ - { 0xa438, 0xf624 }, \ - { 0xa438, 0xe480 }, \ - { 0xa438, 0x44fc }, \ - { 0xa438, 0x04f8 }, \ - { 0xa438, 0xe080 }, \ - { 0xa438, 0x4ff6 }, \ - { 0xa438, 0x24e4 }, \ - { 0xa438, 0x804f }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8fa }, \ - { 0xa438, 0xfbef }, \ - { 0xa438, 0x79fb }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x2a02 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xbf8b }, \ - { 0xa438, 0x3302 }, \ - { 0xa438, 0x7291 }, \ - { 0xa438, 0xd68b }, \ - { 0xa438, 0x2dd7 }, \ - { 0xa438, 0x8b30 }, \ - { 0xa438, 0x0116 }, \ - { 0xa438, 0xad50 }, \ - { 0xa438, 0x0cbf }, \ - { 0xa438, 0x8b2a }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9abf }, \ - { 0xa438, 0x8b33 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9aff }, \ - { 0xa438, 0xef97 }, \ - { 0xa438, 0xfffe }, \ - { 0xa438, 0xfc04 }, \ - { 0xa438, 0xf8f9 }, \ - { 0xa438, 0xfaef }, \ - { 0xa438, 0x49f8 }, \ - { 0xa438, 0xccf8 }, \ - { 0xa438, 0xef96 }, \ - { 0xa438, 0x0272 }, \ - { 0xa438, 0x9a1f }, \ - { 0xa438, 0x22c7 }, \ - { 0xa438, 0xbd02 }, \ - { 0xa438, 0x72dc }, \ - { 0xa438, 0xac28 }, \ - { 0xa438, 0x16ac }, \ - { 0xa438, 0x3008 }, \ - { 0xa438, 0x0271 }, \ - { 0xa438, 0xe4ef }, \ - { 0xa438, 0x6712 }, \ - { 0xa438, 0xaeee }, \ - { 0xa438, 0xd700 }, \ - { 0xa438, 0x0202 }, \ - { 0xa438, 0x71ff }, \ - { 0xa438, 0xac50 }, \ - { 0xa438, 0x05ae }, \ - { 0xa438, 0xe3d7 }, \ - { 0xa438, 0x0000 }, \ - { 0xa438, 0xfcc4 }, \ - { 0xa438, 0xfcef }, \ - { 0xa438, 0x94fe }, \ - { 0xa438, 0xfdfc }, \ - { 0xa438, 0x04cc }, \ - { 0xa438, 0xc010 }, \ - { 0xa438, 0x44ac }, \ - { 0xa438, 0x0030 }, \ - { 0xa438, 0xbce0 }, \ - { 0xa438, 0x74bc }, \ - { 0xa438, 0xe0b8 }, \ - { 0xa438, 0xbce0 }, \ - { 0xa438, 0xfcbc }, \ - { 0xa438, 0xe011 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xddac }, \ - { 0xa438, 0xb6fa }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xf0ac }, \ - { 0xa438, 0xba92 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xffac }, \ - { 0xa438, 0x5600 }, \ - { 0xa438, 0xacb4 }, \ - { 0xa438, 0xccac }, \ - { 0xa438, 0xb6ff }, \ - { 0xa438, 0xb034 }, \ - { 0xa436, 0xb818 }, \ - { 0xa438, 0x2ae4 }, \ - { 0xa436, 0xb81a }, \ - { 0xa438, 0x380a }, \ - { 0xa436, 0xb81c }, \ - { 0xa438, 0x3edd }, \ - { 0xa436, 0xb81e }, \ - { 0xa438, 0x41a3 }, \ - { 0xa436, 0xb850 }, \ - { 0xa438, 0x0684 }, \ - { 0xa436, 0xb852 }, \ - { 0xa438, 0x1c02 }, \ - { 0xa436, 0xb878 }, \ - { 0xa438, 0x1b70 }, \ - { 0xa436, 0xb884 }, \ - { 0xa438, 0x0633 }, \ - { 0xa436, 0xb832 }, \ - { 0xa438, 0x00ff }, \ - { 0xa436, 0xacfc }, \ - { 0xa438, 0x0100 }, \ - { 0xa436, 0xacfe }, \ - { 0xa438, 0x8000 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3c67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3e67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3067 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3267 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3467 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3667 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3867 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3a67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x000f }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3ce7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3ee7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x30e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x32e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x34e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1008 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x36ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1048 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff5 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x38ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1088 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3aff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x10c8 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0207 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x1149 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0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf2f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd009 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1a1f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd049 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3a3f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd089 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5a5f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd0c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7a7f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd109 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x181f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd149 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x383f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd189 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x585f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd1c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x787f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd209 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x989f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd249 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb8bf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd289 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd8df }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd2c9 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2517 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf8ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe0 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd70b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3534 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x191f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd74b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0555 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x393f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd78b }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1576 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x595f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd7cb }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2417 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x797f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x000d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3434 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9a9f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x004d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0455 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbabf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x008d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1476 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdadf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x00cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2c17 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfaf8 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe2 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x400d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3c34 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8187 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x404d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0c55 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa1a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x408d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1c76 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc1c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x40cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2c97 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe1e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x800d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3cb4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x898f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x804d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0cd5 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa9af }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x808d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1cf6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc9cf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x80cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2d17 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe9ef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc00d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3d34 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9197 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc04d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0d55 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb1b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc08d }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1d76 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd1d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xc0cd }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2d97 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf1f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3dbf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x999f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0ddf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb9bf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x1dff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd9df }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf9ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe1 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0002 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3d67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3f67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3167 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3367 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3567 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3767 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3967 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3b67 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3de7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3fe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x31e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x33e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x35e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x37e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x39e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x3be6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2066 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2264 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2464 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2664 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0064 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0264 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0464 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0664 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0864 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0a65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0c65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0e65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1065 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1266 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1466 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1666 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2866 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2a66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2c66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2e66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x20e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x22e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x24e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x26e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x00e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x02e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x04e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x06e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x08e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ae5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ce5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0ee5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x10e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x12e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x14e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x16e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x28e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ae6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ce6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2ee6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2166 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2364 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2564 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2764 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0164 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0364 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0564 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0764 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0964 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0b65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0d65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0f65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1165 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1366 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1566 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1766 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2966 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2b66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2d66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2f66 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x21e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x23e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x25e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x27e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x01e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x03e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x05e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x07e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x09e4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0be5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0de5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x0fe5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x11e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x13e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x15e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x17e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x29e6 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x87ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2be5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2de5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x2fe5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1865 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1a65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xafff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1c65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1e65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xefff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x18e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x97ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ae5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ce5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1ee5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1965 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1b65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1d65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdfff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1f65 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x19e5 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1b9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1d9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x1f9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x589c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5c9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x599c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5d9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5a9c }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x100e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5eff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x104e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5bff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x110e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x114e }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x120f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc3c7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x124f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe3e7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x130f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0307 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x134f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2327 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x510f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4347 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x514f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6367 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x500f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8387 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x504f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xa3a7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x520f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xcbcf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x524f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xebef }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x530f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0b0f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x534f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2b2f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x920f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4b4f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x924f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6b6f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x900f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x8b8f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x904f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xabaf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x910f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xd3d7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x914f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xf3f7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x930f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1317 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x934f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3337 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd30f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5936 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5357 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd34f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7377 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd00f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9397 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd04f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4817 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xb3b7 }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd10f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5836 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xdbdf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd14f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x0997 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfbff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd20f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19b6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1b1f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xd24f }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4917 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3b3f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x593f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5b5f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x099f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7b7f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x19bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x9b9f }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xbbbf }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffe3 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0004 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x27ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x47ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x67ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x58a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x0fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ca4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x2fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x50a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x54a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x6fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x59a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x17ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5da4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x37ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x51a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x55a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x77ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5aa4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x1fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ea4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x3fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x52a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x56a4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x7fff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5ba4 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2a06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2b06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x53ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2a06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0x57ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x2b06 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd0ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6a46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd4ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6b46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd8ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6a46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdcff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0x6b46 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd1ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xaa86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd5ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xab86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd9ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xaa86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xddff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xab86 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd2ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xeac6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5ff6 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0003 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd6ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xebc6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff7 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdaff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xeac6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xfff4 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdeff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xebc6 }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf615 }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0007 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xf63f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x069f }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x16bf }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x4fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xfffa }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd3ff }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0x5fff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0013 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xc7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xd7e7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0xe7ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdbe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xad00 }, \ - { 0xa438, 0x07ff }, \ - { 0xa436, 0xad02 }, \ - { 0xa438, 0xdfe7 }, \ - { 0xa436, 0xad04 }, \ - { 0xa438, 0xfffe }, \ - { 0xa436, 0xad06 }, \ - { 0xa438, 0xffff }, \ - { 0xa436, 0xad08 }, \ - { 0xa438, 0x0017 }, \ - { 0xa436, 0xacfc }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2000 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2001 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6008 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2002 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6010 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2003 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6020 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2004 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6060 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2005 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x60a0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2006 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x60e0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2007 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6128 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2008 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6178 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2009 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x61a8 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200a }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x61f0 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200b }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6248 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200c }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6258 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200d }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6268 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200e }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6270 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x200f }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6274 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2010 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x627c }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2011 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6284 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2012 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6294 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2013 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x629c }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2014 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62ac }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2015 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62bc }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2016 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x62c4 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2017 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x7000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2018 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x2019 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201a }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201b }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201c }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201d }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201e }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xaccc }, \ - { 0xa438, 0x201f }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x6000 }, \ - { 0xa436, 0xacce }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0x0000 }, \ - { 0xa438, 0x0000 }, \ - { 0xb82e, 0x0000 }, \ - { 0xa436, 0x8023 }, \ - { 0xa438, 0x0000 }, \ - { 0xa436, 0x801e }, \ - { 0xa438, 0x0027 }, \ - { 0xb820, 0x0000 }, \ - { 0xb892, 0x0000 }, \ - { 0xb88e, 0xc15c }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0807 }, \ - { 0xb890, 0x090b }, \ - { 0xb890, 0x0e12 }, \ - { 0xb890, 0x1617 }, \ - { 0xb890, 0x1c24 }, \ - { 0xb890, 0x2b37 }, \ - { 0xb890, 0x0203 }, \ - { 0xb890, 0x0304 }, \ - { 0xb890, 0x0504 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0708 }, \ - { 0xb890, 0x090a }, \ - { 0xb890, 0x0b0e }, \ - { 0xb890, 0x1013 }, \ - { 0xb890, 0x1519 }, \ - { 0xb890, 0x1d22 }, \ - { 0xb890, 0x282e }, \ - { 0xb890, 0x363e }, \ - { 0xb890, 0x474b }, \ - { 0xb88e, 0xc196 }, \ - { 0xb890, 0x3f5e }, \ - { 0xb890, 0xf834 }, \ - { 0xb890, 0x6c01 }, \ - { 0xb890, 0xa67f }, \ - { 0xb890, 0xa06c }, \ - { 0xb890, 0x043b }, \ - { 0xb890, 0x6190 }, \ - { 0xb890, 0x88db }, \ - { 0xb890, 0x9ecd }, \ - { 0xb890, 0x4dbc }, \ - { 0xb890, 0x6e0e }, \ - { 0xb890, 0x9f2d }, \ - { 0xb890, 0x2c18 }, \ - { 0xb890, 0x5e8c }, \ - { 0xb890, 0x5bfe }, \ - { 0xb890, 0x183c }, \ - { 0xb890, 0x23c9 }, \ - { 0xb890, 0x3e84 }, \ - { 0xb890, 0x3c20 }, \ - { 0xb890, 0xcc56 }, \ - { 0xb890, 0x3480 }, \ - { 0xb890, 0x0040 }, \ - { 0xb88e, 0xc00f }, \ - { 0xb890, 0x3502 }, \ - { 0xb890, 0x0203 }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0404 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0607 }, \ - { 0xb890, 0x080a }, \ - { 0xb890, 0x0b0d }, \ - { 0xb890, 0x0e10 }, \ - { 0xb890, 0x1114 }, \ - { 0xb890, 0x171b }, \ - { 0xb890, 0x1f22 }, \ - { 0xb890, 0x2832 }, \ - { 0xb890, 0x0101 }, \ - { 0xb890, 0x0101 }, \ - { 0xb890, 0x0202 }, \ - { 0xb890, 0x0303 }, \ - { 0xb890, 0x0404 }, \ - { 0xb890, 0x0506 }, \ - { 0xb890, 0x0709 }, \ - { 0xb890, 0x0a0d }, \ - { 0xb88e, 0xc047 }, \ - { 0xb890, 0x365f }, \ - { 0xb890, 0xbe10 }, \ - { 0xb890, 0x84e4 }, \ - { 0xb890, 0x60e9 }, \ - { 0xb890, 0xa86a }, \ - { 0xb890, 0xf1e3 }, \ - { 0xb890, 0xf73f }, \ - { 0xb890, 0x5c02 }, \ - { 0xb890, 0x9547 }, \ - { 0xb890, 0xc30c }, \ - { 0xb890, 0xb064 }, \ - { 0xb890, 0x079a }, \ - { 0xb890, 0x1e23 }, \ - { 0xb890, 0x1b5d }, \ - { 0xb890, 0x92e7 }, \ - { 0xb890, 0x4baf }, \ - { 0xb890, 0x2386 }, \ - { 0xb890, 0x01b6 }, \ - { 0xb890, 0x6f82 }, \ - { 0xb890, 0xdc1c }, \ - { 0xb890, 0x8c92 }, \ - { 0xb88e, 0xc110 }, \ - { 0xb890, 0x0c7f }, \ - { 0xb890, 0x1014 }, \ - { 0xb890, 0x231d }, \ - { 0xb890, 0x2023 }, \ - { 0xb890, 0x2628 }, \ - { 0xb890, 0x2a2d }, \ - { 0xb890, 0x2d2c }, \ - { 0xb890, 0x2c2e }, \ - { 0xb890, 0x320d }, \ - { 0xb88e, 0xc186 }, \ - { 0xb890, 0x0306 }, \ - { 0xb890, 0x0804 }, \ - { 0xb890, 0x0406 }, \ - { 0xb890, 0x0707 }, \ - { 0xb890, 0x0709 }, \ - { 0xb890, 0x0b0f }, \ - { 0xb890, 0x161d }, \ - { 0xb890, 0x202a }, \ - { 0xb890, 0x3f5e }, \ - { 0xb88e, 0xc1c1 }, \ - { 0xb890, 0x0040 }, \ - { 0xb890, 0x5920 }, \ - { 0xb890, 0x88cd }, \ - { 0xb890, 0x1ca1 }, \ - { 0xb890, 0x3d20 }, \ - { 0xb890, 0x3ae4 }, \ - { 0xb890, 0x6a43 }, \ - { 0xb890, 0x30af }, \ - { 0xb890, 0xdd16 }, \ - { 0xb88e, 0xc283 }, \ - { 0xb890, 0x1611 }, \ - { 0xb890, 0x161c }, \ - { 0xb890, 0x2127 }, \ - { 0xb890, 0x2c32 }, \ - { 0xb890, 0x373d }, \ - { 0xb890, 0x4247 }, \ - { 0xb890, 0x4d52 }, \ - { 0xb890, 0x585a }, \ - { 0xb890, 0x0004 }, \ - { 0xb890, 0x080c }, \ - { 0xb890, 0x1014 }, \ - { 0xb890, 0x181b }, \ - { 0xb890, 0x1f23 }, \ - { 0xb890, 0x272b }, \ - { 0xb890, 0x2f33 }, \ - { 0xb890, 0x363a }, \ - { 0xb890, 0x3e42 }, \ - { 0xb890, 0x464a }, \ - { 0xb890, 0x4d51 }, \ - { 0xb890, 0x5559 }, \ - { 0xb890, 0x5d65 }, \ - { 0xb890, 0xe769 }, \ - { 0xb890, 0xeb56 }, \ - { 0xb890, 0xc04b }, \ - { 0xb890, 0xd502 }, \ - { 0xb890, 0x2fb1 }, \ - { 0xb890, 0x33b5 }, \ - { 0xb890, 0x37f8 }, \ - { 0xb890, 0xbb98 }, \ - { 0xb890, 0x7450 }, \ - { 0xb890, 0x4c48 }, \ - { 0xb890, 0x12dc }, \ - { 0xb890, 0xdcdc }, \ - { 0xb890, 0x934a }, \ - { 0xb890, 0x3e33 }, \ - { 0xb890, 0xe496 }, \ - { 0xb890, 0x724e }, \ - { 0xb890, 0x2b07 }, \ - { 0xb890, 0xe4c0 }, \ - { 0xb890, 0x9c79 }, \ - { 0xb890, 0x5512 }, \ - { 0xb88e, 0xc212 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2020 }, \ - { 0xb890, 0x2019 }, \ - { 0xb88e, 0xc24d }, \ - { 0xb890, 0x8400 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb890, 0x0000 }, \ - { 0xb88e, 0xc2d3 }, \ - { 0xb890, 0x5524 }, \ - { 0xb890, 0x2526 }, \ - { 0xb890, 0x2728 }, \ - { 0xb88e, 0xc2e3 }, \ - { 0xb890, 0x3323 }, \ - { 0xb890, 0x2324 }, \ - { 0xb890, 0x2425 } - static const struct { uint16_t reg; uint16_t val; @@ -13393,8 +9616,6 @@ static const struct { MAC_R25B_MCU }, mac_r25d_mcu[] = { MAC_R25D_MCU -}, mac_r26_mcu[] = { - MAC_R26_MCU }; diff --git a/sys/dev/rge/if_rgereg.h b/sys/dev/rge/if_rgereg.h index 5bec9c023cca..7b34e3cefbe6 100644 --- a/sys/dev/rge/if_rgereg.h +++ b/sys/dev/rge/if_rgereg.h @@ -366,11 +366,15 @@ struct rge_hw_mac_stats { /* Ram version */ #define RGE_MAC_R25D_RCODE_VER 0x0027 -#define RGE_MAC_R26_RCODE_VER 0x0033 +#define RGE_MAC_R26_1_RCODE_VER 0x0033 +#define RGE_MAC_R26_2_RCODE_VER 0x0060 #define RGE_MAC_R27_RCODE_VER 0x0036 #define RGE_MAC_R25_RCODE_VER 0x0b33 #define RGE_MAC_R25B_RCODE_VER 0x0b99 +#define RGE_TYPE_R26(sc) \ + ((sc)->rge_type == MAC_R26_1 || (sc)->rge_type == MAC_R26_2) + #define RGE_TIMEOUT 100 #define RGE_JUMBO_FRAMELEN 9216 diff --git a/sys/dev/rge/if_rgevar.h b/sys/dev/rge/if_rgevar.h index 4b85043f7553..504d56cba423 100644 --- a/sys/dev/rge/if_rgevar.h +++ b/sys/dev/rge/if_rgevar.h @@ -31,7 +31,8 @@ enum rge_mac_type { MAC_R25, MAC_R25B, MAC_R25D, - MAC_R26, + MAC_R26_1, + MAC_R26_2, MAC_R27 }; diff --git a/sys/dev/sdhci/sdhci_pci.c b/sys/dev/sdhci/sdhci_pci.c index 4cd007db904a..4f9bbfec50fb 100644 --- a/sys/dev/sdhci/sdhci_pci.c +++ b/sys/dev/sdhci/sdhci_pci.c @@ -171,7 +171,7 @@ SYSCTL_INT(_hw_sdhci, OID_AUTO, enable_msi, CTLFLAG_RDTUN, &sdhci_enable_msi, 0, "Enable MSI interrupts"); static uint8_t -sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -181,8 +181,8 @@ sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint8_t val) +sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint8_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -192,7 +192,7 @@ sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot __unused, } static uint16_t -sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -202,8 +202,8 @@ sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint16_t val) +sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint16_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -213,7 +213,7 @@ sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot __unused, } static uint32_t -sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) +sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -223,8 +223,8 @@ sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off) } static void -sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t val) +sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t val) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -234,8 +234,8 @@ sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot __unused, } static void -sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t *data, bus_size_t count) +sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t *data, bus_size_t count) { struct sdhci_pci_softc *sc = device_get_softc(dev); @@ -243,8 +243,8 @@ sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot __unused, } static void -sdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot __unused, - bus_size_t off, uint32_t *data, bus_size_t count) +sdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, + uint32_t *data, bus_size_t count) { struct sdhci_pci_softc *sc = device_get_softc(dev); diff --git a/sys/dev/sound/dummy.c b/sys/dev/sound/dummy.c index 74ca1d0c924c..91a198e3d9f6 100644 --- a/sys/dev/sound/dummy.c +++ b/sys/dev/sound/dummy.c @@ -40,7 +40,10 @@ #endif #include <dev/sound/pcm/sound.h> +#include <dev/sound/midi/mpu401.h> + #include <mixer_if.h> +#include <mpufoi_if.h> #define DUMMY_NPCHAN 1 #define DUMMY_NRCHAN 1 @@ -66,6 +69,8 @@ struct dummy_softc { struct callout callout; struct mtx lock; bool stopped; + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; }; static bool @@ -93,6 +98,9 @@ dummy_chan_io(void *arg) struct dummy_chan *ch; int i = 0; + if (sc->mpu_intr) + (sc->mpu_intr)(sc->mpu); + if (sc->stopped) return; @@ -124,8 +132,7 @@ dummy_chan_free(kobj_t obj, void *data) uint8_t *buf; buf = ch->buf->buf; - if (buf != NULL) - free(buf, M_DEVBUF); + free(buf, M_DEVBUF); return (0); } @@ -294,6 +301,39 @@ static kobj_method_t dummy_mixer_methods[] = { MIXER_DECLARE(dummy_mixer); +static uint8_t +dummy_mpu_read(struct mpu401 *arg, void *sc, int reg) +{ + return (0); +} + +static void +dummy_mpu_write(struct mpu401 *arg, void *sc, int reg, unsigned char b) +{ +} + +static int +dummy_mpu_uninit(struct mpu401 *arg, void *cookie) +{ + struct dummy_softc *sc = cookie; + + mtx_lock(&sc->lock); + sc->mpu_intr = NULL; + sc->mpu = NULL; + mtx_unlock(&sc->lock); + + return (0); +} + +static kobj_method_t dummy_mpu_methods[] = { + KOBJMETHOD(mpufoi_read, dummy_mpu_read), + KOBJMETHOD(mpufoi_write, dummy_mpu_write), + KOBJMETHOD(mpufoi_uninit, dummy_mpu_uninit), + KOBJMETHOD_END +}; + +static DEFINE_CLASS(dummy_mpu, dummy_mpu_methods, 0); + static void dummy_identify(driver_t *driver, device_t parent) { @@ -354,6 +394,11 @@ dummy_attach(device_t dev) */ make_dev_alias(sc->info.dsp_dev, "dsp.dummy"); + sc->mpu = mpu401_init(&dummy_mpu_class, sc, dummy_chan_io, + &sc->mpu_intr); + if (sc->mpu == NULL) + return (ENXIO); + return (0); } @@ -368,6 +413,7 @@ dummy_detach(device_t dev) mtx_unlock(&sc->lock); callout_drain(&sc->callout); err = pcm_unregister(dev); + mpu401_uninit(sc->mpu); mtx_destroy(&sc->lock); return (err); diff --git a/sys/dev/sound/fdt/audio_soc.c b/sys/dev/sound/fdt/audio_soc.c index 84867cb3d781..33269dc302fa 100644 --- a/sys/dev/sound/fdt/audio_soc.c +++ b/sys/dev/sound/fdt/audio_soc.c @@ -250,8 +250,7 @@ audio_soc_chan_free(kobj_t obj, void *data) ausoc_chan = (struct audio_soc_channel *)data; buffer = ausoc_chan->buf->buf; - if (buffer) - free(buffer, M_DEVBUF); + free(buffer, M_DEVBUF); return (0); } @@ -508,8 +507,7 @@ audio_soc_detach(device_t dev) struct audio_soc_aux_node *aux; sc = device_get_softc(dev); - if (sc->name) - free(sc->name, M_DEVBUF); + free(sc->name, M_DEVBUF); while ((aux = SLIST_FIRST(&sc->aux_devs)) != NULL) { SLIST_REMOVE_HEAD(&sc->aux_devs, link); diff --git a/sys/dev/sound/midi/midi.c b/sys/dev/sound/midi/midi.c index cca7b93abf5f..c86f5fb41b14 100644 --- a/sys/dev/sound/midi/midi.c +++ b/sys/dev/sound/midi/midi.c @@ -4,6 +4,10 @@ * Copyright (c) 2003 Mathew Kanner * Copyright (c) 1998 The NetBSD Foundation, Inc. * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * This code is derived from software contributed to The NetBSD Foundation * by Lennart Augustsson (augustss@netbsd.org). @@ -36,14 +40,11 @@ #include <sys/fcntl.h> #include <sys/kernel.h> #include <sys/kobj.h> +#include <sys/limits.h> #include <sys/lock.h> -#include <sys/module.h> #include <sys/mutex.h> #include <sys/poll.h> -#include <sys/queue.h> #include <sys/selinfo.h> -#include <sys/sx.h> -#include <sys/sysctl.h> #include <sys/uio.h> #ifdef HAVE_KERNEL_OPTION_HEADERS @@ -60,29 +61,21 @@ MALLOC_DEFINE(M_MIDI, "midi buffers", "Midi data allocation area"); #define MIDI_NAMELEN 16 struct snd_midi { KOBJ_FIELDS; - struct mtx lock; /* Protects all but queues */ + struct mtx lock; void *cookie; - int unit; /* Should only be used in midistat */ - int channel; /* Should only be used in midistat */ + int unit; + int channel; - int busy; int flags; /* File flags */ - char name[MIDI_NAMELEN]; - struct mtx qlock; /* Protects inq, outq and flags */ MIDIQ_HEAD(, char) inq, outq; int rchan, wchan; struct selinfo rsel, wsel; int hiwat; /* QLEN(outq)>High-water -> disable * writes from userland */ struct cdev *dev; - TAILQ_ENTRY(snd_midi) link; }; -TAILQ_HEAD(, snd_midi) midi_devs; - -struct sx mstat_lock; - static d_open_t midi_open; static d_close_t midi_close; static d_ioctl_t midi_ioctl; @@ -98,207 +91,98 @@ static struct cdevsw midi_cdevsw = { .d_write = midi_write, .d_ioctl = midi_ioctl, .d_poll = midi_poll, - .d_name = "rmidi", + .d_name = "midi", }; -static int midi_destroy(struct snd_midi *, int); -static int midi_load(void); -static int midi_unload(void); - -SYSCTL_NODE(_hw, OID_AUTO, midi, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Midi driver"); - -int midi_debug; -/* XXX: should this be moved into debug.midi? */ -SYSCTL_INT(_hw_midi, OID_AUTO, debug, CTLFLAG_RW, &midi_debug, 0, ""); - -#define MIDI_DEBUG(l,a) if(midi_debug>=l) a - -void -midistat_lock(void) -{ - sx_xlock(&mstat_lock); -} - -void -midistat_unlock(void) -{ - sx_xunlock(&mstat_lock); -} - -void -midistat_lockassert(void) -{ - sx_assert(&mstat_lock, SA_XLOCKED); -} +struct unrhdr *dev_unr = NULL; +struct unrhdr *chn_unr = NULL; /* - * Register a new rmidi device. cls midi_if interface unit == 0 means - * auto-assign new unit number unit != 0 already assigned a unit number, eg. - * not the first channel provided by this device. channel, sub-unit - * cookie is passed back on MPU calls Typical device drivers will call with - * unit=0, channel=1..(number of channels) and cookie=soft_c and won't care - * what unit number is used. + * Register a new midi device. * - * It is an error to call midi_init with an already used unit/channel combo. + * "cookie" is passed to the MPU calls, and is normally set to the driver's + * softc. */ struct snd_midi * -midi_init(kobj_class_t cls, int unit, int channel, void *cookie) +midi_init(kobj_class_t cls, void *cookie) { struct snd_midi *m; - int i; int inqsize, outqsize; - uint8_t *buf; - - MIDI_DEBUG(1, printf("midiinit: unit %d/%d.\n", unit, channel)); - midistat_lock(); - /* - * Protect against call with existing unit/channel or auto-allocate a - * new unit number. - */ - i = -1; - TAILQ_FOREACH(m, &midi_devs, link) { - mtx_lock(&m->lock); - if (unit != 0) { - if (m->unit == unit && m->channel == channel) { - mtx_unlock(&m->lock); - goto err0; - } - } else { - /* - * Find a better unit number - */ - if (m->unit > i) - i = m->unit; - } - mtx_unlock(&m->lock); - } + uint8_t *ibuf = NULL; + uint8_t *obuf = NULL; - if (unit == 0) - unit = i + 1; - - MIDI_DEBUG(1, printf("midiinit #2: unit %d/%d.\n", unit, channel)); m = malloc(sizeof(*m), M_MIDI, M_WAITOK | M_ZERO); kobj_init((kobj_t)m, cls); inqsize = MPU_INQSIZE(m, cookie); outqsize = MPU_OUTQSIZE(m, cookie); - MIDI_DEBUG(1, printf("midiinit queues %d/%d.\n", inqsize, outqsize)); if (!inqsize && !outqsize) goto err1; mtx_init(&m->lock, "raw midi", NULL, 0); - mtx_init(&m->qlock, "q raw midi", NULL, 0); - - mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (inqsize) - buf = malloc(sizeof(uint8_t) * inqsize, M_MIDI, M_NOWAIT); - else - buf = NULL; + ibuf = malloc(inqsize, M_MIDI, M_WAITOK); + if (outqsize) + obuf = malloc(outqsize, M_MIDI, M_WAITOK); - MIDIQ_INIT(m->inq, buf, inqsize); + mtx_lock(&m->lock); - if (outqsize) - buf = malloc(sizeof(uint8_t) * outqsize, M_MIDI, M_NOWAIT); - else - buf = NULL; m->hiwat = outqsize / 2; - MIDIQ_INIT(m->outq, buf, outqsize); - - if ((inqsize && !MIDIQ_BUF(m->inq)) || - (outqsize && !MIDIQ_BUF(m->outq))) - goto err2; + MIDIQ_INIT(m->inq, ibuf, inqsize); + MIDIQ_INIT(m->outq, obuf, outqsize); - m->busy = 0; m->flags = 0; - m->unit = unit; - m->channel = channel; + m->unit = alloc_unr(dev_unr); + m->channel = alloc_unr(chn_unr); m->cookie = cookie; if (MPU_INIT(m, cookie)) goto err2; mtx_unlock(&m->lock); - mtx_unlock(&m->qlock); - TAILQ_INSERT_TAIL(&midi_devs, m, link); - - midistat_unlock(); - - m->dev = make_dev(&midi_cdevsw, unit, UID_ROOT, GID_WHEEL, 0666, - "midi%d.%d", unit, channel); + m->dev = make_dev(&midi_cdevsw, m->unit, UID_ROOT, GID_WHEEL, 0666, + "midi%d.%d", m->unit, m->channel); m->dev->si_drv1 = m; return m; err2: - mtx_destroy(&m->qlock); mtx_destroy(&m->lock); - if (MIDIQ_BUF(m->inq)) - free(MIDIQ_BUF(m->inq), M_MIDI); - if (MIDIQ_BUF(m->outq)) - free(MIDIQ_BUF(m->outq), M_MIDI); + free(MIDIQ_BUF(m->inq), M_MIDI); + free(MIDIQ_BUF(m->outq), M_MIDI); err1: free(m, M_MIDI); -err0: - midistat_unlock(); - MIDI_DEBUG(1, printf("midi_init ended in error\n")); return NULL; } -/* - * midi_uninit does not call MIDI_UNINIT, as since this is the implementors - * entry point. midi_uninit if fact, does not send any methods. A call to - * midi_uninit is a defacto promise that you won't manipulate ch anymore - */ int midi_uninit(struct snd_midi *m) { - int err; - - err = EBUSY; - midistat_lock(); mtx_lock(&m->lock); - if (m->busy) { - if (!(m->rchan || m->wchan)) - goto err; - - if (m->rchan) { - wakeup(&m->rchan); - m->rchan = 0; - } - if (m->wchan) { - wakeup(&m->wchan); - m->wchan = 0; - } + if (m->rchan) { + wakeup(&m->rchan); + m->rchan = 0; + } + if (m->wchan) { + wakeup(&m->wchan); + m->wchan = 0; } - err = midi_destroy(m, 0); - if (!err) - goto exit; - -err: mtx_unlock(&m->lock); -exit: - midistat_unlock(); - return err; -} - -#ifdef notdef -static int midi_lengths[] = {2, 2, 2, 2, 1, 1, 2, 0}; - -#endif /* notdef */ -/* Number of bytes in a MIDI command */ -#define MIDI_LENGTH(d) (midi_lengths[((d) >> 4) & 7]) -#define MIDI_ACK 0xfe -#define MIDI_IS_STATUS(d) ((d) >= 0x80) -#define MIDI_IS_COMMON(d) ((d) >= 0xf0) + MPU_UNINIT(m, m->cookie); + destroy_dev(m->dev); + free_unr(dev_unr, m->unit); + free_unr(chn_unr, m->channel); + free(MIDIQ_BUF(m->inq), M_MIDI); + free(MIDIQ_BUF(m->outq), M_MIDI); + mtx_destroy(&m->lock); + free(m, M_MIDI); -#define MIDI_SYSEX_START 0xF0 -#define MIDI_SYSEX_END 0xF7 + return (0); +} /* * midi_in: process all data until the queue is full, then discards the rest. @@ -311,26 +195,21 @@ midi_in(struct snd_midi *m, uint8_t *buf, int size) { int used; - MIDI_DEBUG(5, printf("midi_in: m=%p size=%d\n", m, size)); + mtx_lock(&m->lock); -/* - * XXX: locking flub - */ - if (!(m->flags & M_RX)) - return size; + if (!(m->flags & M_RX)) { + /* We should return 0 but this may stop receiving/sending. */ + mtx_unlock(&m->lock); + return (size); + } used = 0; - mtx_lock(&m->qlock); - MIDI_DEBUG(6, printf("midi_in: len %jd avail %jd\n", - (intmax_t)MIDIQ_LEN(m->inq), - (intmax_t)MIDIQ_AVAIL(m->inq))); if (MIDIQ_AVAIL(m->inq) > size) { used = size; MIDIQ_ENQ(m->inq, buf, size); } else { - MIDI_DEBUG(4, printf("midi_in: Discarding data qu\n")); - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return 0; } if (m->rchan) { @@ -338,7 +217,7 @@ midi_in(struct snd_midi *m, uint8_t *buf, int size) m->rchan = 0; } selwakeup(&m->rsel); - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return used; } @@ -350,21 +229,19 @@ midi_out(struct snd_midi *m, uint8_t *buf, int size) { int used; -/* - * XXX: locking flub - */ - if (!(m->flags & M_TXEN)) - return 0; + mtx_lock(&m->lock); + + if (!(m->flags & M_TXEN)) { + mtx_unlock(&m->lock); + return (0); + } - MIDI_DEBUG(2, printf("midi_out: %p\n", m)); - mtx_lock(&m->qlock); used = MIN(size, MIDIQ_LEN(m->outq)); - MIDI_DEBUG(3, printf("midi_out: used %d\n", used)); if (used) MIDIQ_DEQ(m->outq, buf, used); if (MIDIQ_EMPTY(m->outq)) { m->flags &= ~M_TXEN; - MPU_CALLBACKP(m, m->cookie, m->flags); + MPU_CALLBACK(m, m->cookie, m->flags); } if (used && MIDIQ_AVAIL(m->outq) > m->hiwat) { if (m->wchan) { @@ -373,7 +250,7 @@ midi_out(struct snd_midi *m, uint8_t *buf, int size) } selwakeup(&m->wsel); } - mtx_unlock(&m->qlock); + mtx_unlock(&m->lock); return used; } @@ -383,13 +260,10 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) struct snd_midi *m = i_dev->si_drv1; int retval; - MIDI_DEBUG(1, printf("midiopen %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; mtx_lock(&m->lock); - mtx_lock(&m->qlock); retval = 0; @@ -409,7 +283,6 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) if (retval) goto err; } - m->busy++; m->rchan = 0; m->wchan = 0; @@ -428,9 +301,7 @@ midi_open(struct cdev *i_dev, int flags, int mode, struct thread *td) MPU_CALLBACK(m, m->cookie, m->flags); - MIDI_DEBUG(2, printf("midi_open: opened.\n")); - -err: mtx_unlock(&m->qlock); +err: mtx_unlock(&m->lock); return retval; } @@ -442,21 +313,16 @@ midi_close(struct cdev *i_dev, int flags, int mode, struct thread *td) int retval; int oldflags; - MIDI_DEBUG(1, printf("midi_close %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); - if (m == NULL) return ENXIO; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if ((flags & FREAD && !(m->flags & M_RX)) || (flags & FWRITE && !(m->flags & M_TX))) { retval = ENXIO; goto err; } - m->busy--; oldflags = m->flags; @@ -468,9 +334,6 @@ midi_close(struct cdev *i_dev, int flags, int mode, struct thread *td) if ((m->flags & (M_TXEN | M_RXEN)) != (oldflags & (M_RXEN | M_TXEN))) MPU_CALLBACK(m, m->cookie, m->flags); - MIDI_DEBUG(1, printf("midi_close: closed, busy = %d.\n", m->busy)); - - mtx_unlock(&m->qlock); mtx_unlock(&m->lock); retval = 0; err: return retval; @@ -489,16 +352,12 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) int used; char buf[MIDI_RSIZE]; - MIDI_DEBUG(5, printf("midiread: count=%lu\n", - (unsigned long)uio->uio_resid)); - retval = EIO; if (m == NULL) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (!(m->flags & M_RX)) goto err1; @@ -508,9 +367,8 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) retval = EWOULDBLOCK; if (ioflag & O_NONBLOCK) goto err1; - mtx_unlock(&m->lock); m->rchan = 1; - retval = msleep(&m->rchan, &m->qlock, + retval = msleep(&m->rchan, &m->lock, PCATCH | PDROP, "midi RX", 0); /* * We slept, maybe things have changed since last @@ -520,16 +378,11 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) goto err0; if (m != i_dev->si_drv1) retval = ENXIO; - /* if (retval && retval != ERESTART) */ if (retval) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); m->rchan = 0; - if (!m->busy) - goto err1; } - MIDI_DEBUG(6, printf("midi_read start\n")); /* * At this point, it is certain that m->inq has data */ @@ -537,7 +390,6 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) used = MIN(MIDIQ_LEN(m->inq), uio->uio_resid); used = MIN(used, MIDI_RSIZE); - MIDI_DEBUG(6, printf("midiread: uiomove cc=%d\n", used)); MIDIQ_DEQ(m->inq, buf, used); retval = uiomove(buf, used, uio); if (retval) @@ -548,9 +400,9 @@ midi_read(struct cdev *i_dev, struct uio *uio, int ioflag) * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: mtx_unlock(&m->lock); -err0: MIDI_DEBUG(4, printf("midi_read: ret %d\n", retval)); +err0: return retval; } @@ -567,13 +419,11 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) int used; char buf[MIDI_WSIZE]; - MIDI_DEBUG(4, printf("midi_write\n")); retval = 0; if (m == NULL) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (!(m->flags & M_TX)) goto err1; @@ -583,10 +433,8 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) retval = EWOULDBLOCK; if (ioflag & O_NONBLOCK) goto err1; - mtx_unlock(&m->lock); m->wchan = 1; - MIDI_DEBUG(3, printf("midi_write msleep\n")); - retval = msleep(&m->wchan, &m->qlock, + retval = msleep(&m->wchan, &m->lock, PCATCH | PDROP, "midi TX", 0); /* * We slept, maybe things have changed since last @@ -599,10 +447,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) if (retval) goto err0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); m->wchan = 0; - if (!m->busy) - goto err1; } /* @@ -611,11 +456,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) used = MIN(MIDIQ_AVAIL(m->outq), uio->uio_resid); used = MIN(used, MIDI_WSIZE); - MIDI_DEBUG(5, printf("midiout: resid %zd len %jd avail %jd\n", - uio->uio_resid, (intmax_t)MIDIQ_LEN(m->outq), - (intmax_t)MIDIQ_AVAIL(m->outq))); - MIDI_DEBUG(5, printf("midi_write: uiomove cc=%d\n", used)); retval = uiomove(buf, used, uio); if (retval) goto err1; @@ -632,7 +473,7 @@ midi_write(struct cdev *i_dev, struct uio *uio, int ioflag) * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: mtx_unlock(&m->lock); err0: return retval; } @@ -656,7 +497,6 @@ midi_poll(struct cdev *i_dev, int events, struct thread *td) revents = 0; mtx_lock(&m->lock); - mtx_lock(&m->qlock); if (events & (POLLIN | POLLRDNORM)) { if (!MIDIQ_EMPTY(m->inq)) @@ -672,97 +512,24 @@ midi_poll(struct cdev *i_dev, int events, struct thread *td) } mtx_unlock(&m->lock); - mtx_unlock(&m->qlock); return (revents); } -/* - * Single point of midi destructions. - */ -static int -midi_destroy(struct snd_midi *m, int midiuninit) -{ - midistat_lockassert(); - mtx_assert(&m->lock, MA_OWNED); - - MIDI_DEBUG(3, printf("midi_destroy\n")); - m->dev->si_drv1 = NULL; - mtx_unlock(&m->lock); /* XXX */ - destroy_dev(m->dev); - TAILQ_REMOVE(&midi_devs, m, link); - if (midiuninit) - MPU_UNINIT(m, m->cookie); - free(MIDIQ_BUF(m->inq), M_MIDI); - free(MIDIQ_BUF(m->outq), M_MIDI); - mtx_destroy(&m->qlock); - mtx_destroy(&m->lock); - free(m, M_MIDI); - return 0; -} - -static int -midi_load(void) +static void +midi_sysinit(void *data __unused) { - sx_init(&mstat_lock, "midistat lock"); - TAILQ_INIT(&midi_devs); - - return 0; + dev_unr = new_unrhdr(0, INT_MAX, NULL); + chn_unr = new_unrhdr(0, INT_MAX, NULL); } +SYSINIT(midi_sysinit, SI_SUB_DRIVERS, SI_ORDER_FIRST, midi_sysinit, NULL); -static int -midi_unload(void) +static void +midi_sysuninit(void *data __unused) { - struct snd_midi *m, *tmp; - int retval; - - MIDI_DEBUG(1, printf("midi_unload()\n")); - retval = EBUSY; - midistat_lock(); - TAILQ_FOREACH_SAFE(m, &midi_devs, link, tmp) { - mtx_lock(&m->lock); - if (m->busy) - retval = EBUSY; - else - retval = midi_destroy(m, 1); - if (retval) - goto exit; - } - midistat_unlock(); - - sx_destroy(&mstat_lock); - return 0; - -exit: - mtx_unlock(&m->lock); - midistat_unlock(); - if (retval) - MIDI_DEBUG(2, printf("midi_unload: failed\n")); - return retval; + if (dev_unr != NULL) + delete_unrhdr(dev_unr); + if (chn_unr != NULL) + delete_unrhdr(chn_unr); } - -static int -midi_modevent(module_t mod, int type, void *data) -{ - int retval; - - retval = 0; - - switch (type) { - case MOD_LOAD: - retval = midi_load(); - break; - - case MOD_UNLOAD: - retval = midi_unload(); - break; - - default: - break; - } - - return retval; -} - -DEV_MODULE(midi, midi_modevent, NULL); -MODULE_VERSION(midi, 1); +SYSUNINIT(midi_sysuninit, SI_SUB_DRIVERS, SI_ORDER_ANY, midi_sysuninit, NULL); diff --git a/sys/dev/sound/midi/midi.h b/sys/dev/sound/midi/midi.h index 286e84264ef3..c012a9d96da6 100644 --- a/sys/dev/sound/midi/midi.h +++ b/sys/dev/sound/midi/midi.h @@ -3,6 +3,10 @@ * * Copyright (c) 2003 Mathew Kanner * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -41,12 +45,7 @@ MALLOC_DECLARE(M_MIDI); struct snd_midi; -void midistat_lock(void); -void midistat_unlock(void); -void midistat_lockassert(void); - -struct snd_midi * -midi_init(kobj_class_t _mpu_cls, int _unit, int _channel, void *cookie); +struct snd_midi *midi_init(kobj_class_t _mpu_cls, void *cookie); int midi_uninit(struct snd_midi *_m); int midi_out(struct snd_midi *_m, uint8_t *_buf, int _size); int midi_in(struct snd_midi *_m, uint8_t *_buf, int _size); diff --git a/sys/dev/sound/midi/midiq.h b/sys/dev/sound/midi/midiq.h index 17def1805363..80825974283e 100644 --- a/sys/dev/sound/midi/midiq.h +++ b/sys/dev/sound/midi/midiq.h @@ -52,38 +52,23 @@ struct name { \ #define MIDIQ_FULL(head) ((head).h == -1) #define MIDIQ_AVAIL(head) (MIDIQ_FULL(head) ? 0 : (head).s - MIDIQ_LENBASE(head)) #define MIDIQ_LEN(head) ((head).s - MIDIQ_AVAIL(head)) -#define MIDIQ_DEBUG 0 /* * No protection against overflow, underflow */ #define MIDIQ_ENQ(head, buf, size) do { \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", \ - &(head).b[(head).h], (buf), \ - (intmax_t)(sizeof(*(head).b) * \ - MIN( (size), (head).s - (head).h) ), \ - (size), (head).h, (head).t); \ MIDIQ_MOVE(&(head).b[(head).h], (buf), sizeof(*(head).b) * MIN((size), (head).s - (head).h)); \ if( (head).s - (head).h < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).h, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ MIDIQ_MOVE((head).b, (buf) + (head).s - (head).h, sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ } \ (head).h+=(size); \ (head).h%=(head).s; \ if(MIDIQ_EMPTY(head)) (head).h=-1; \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ } while (0) #define MIDIQ_DEQ_I(head, buf, size, move, update) do { \ if(MIDIQ_FULL(head)) (head).h=(head).t; \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", &(head).b[(head).t], (buf), (intmax_t)sizeof(*(head).b) * MIN((size), (head).s - (head).t), (size), (head).h, (head).t); \ if (move) MIDIQ_MOVE((buf), &(head).b[(head).t], sizeof(*(head).b) * MIN((size), (head).s - (head).t)); \ if( (head).s - (head).t < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).t, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ if (move) MIDIQ_MOVE((buf) + (head).s - (head).t, (head).b, sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ } \ if (update) { \ @@ -92,15 +77,11 @@ struct name { \ } else { \ if (MIDIQ_EMPTY(head)) (head).h=-1; \ } \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ } while (0) #define MIDIQ_SIZE(head) ((head).s) #define MIDIQ_CLEAR(head) ((head).h = (head).t = 0) #define MIDIQ_BUF(head) ((head).b) #define MIDIQ_DEQ(head, buf, size) MIDIQ_DEQ_I(head, buf, size, 1, 1) -#define MIDIQ_PEEK(head, buf, size) MIDIQ_DEQ_I(head, buf, size, 1, 0) -#define MIDIQ_POP(head, size) MIDIQ_DEQ_I(head, &head, size, 0, 1) #endif diff --git a/sys/dev/sound/midi/mpu401.c b/sys/dev/sound/midi/mpu401.c index 7d3edb6323ef..d3fb6b214d3e 100644 --- a/sys/dev/sound/midi/mpu401.c +++ b/sys/dev/sound/midi/mpu401.c @@ -76,7 +76,6 @@ static int mpu401_muninit(struct snd_midi *, void *); static int mpu401_minqsize(struct snd_midi *, void *); static int mpu401_moutqsize(struct snd_midi *, void *); static void mpu401_mcallback(struct snd_midi *, void *, int); -static void mpu401_mcallbackp(struct snd_midi *, void *, int); static kobj_method_t mpu401_methods[] = { KOBJMETHOD(mpu_init, mpu401_minit), @@ -84,7 +83,6 @@ static kobj_method_t mpu401_methods[] = { KOBJMETHOD(mpu_inqsize, mpu401_minqsize), KOBJMETHOD(mpu_outqsize, mpu401_moutqsize), KOBJMETHOD(mpu_callback, mpu401_mcallback), - KOBJMETHOD(mpu_callbackp, mpu401_mcallbackp), KOBJMETHOD_END }; @@ -144,10 +142,7 @@ mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, struct mpu401 *m; *cb = NULL; - m = malloc(sizeof(*m), M_MIDI, M_NOWAIT | M_ZERO); - - if (!m) - return NULL; + m = malloc(sizeof(*m), M_MIDI, M_WAITOK | M_ZERO); kobj_init((kobj_t)m, cls); @@ -157,7 +152,7 @@ mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, m->cookie = cookie; m->flags = 0; - m->mid = midi_init(&mpu401_class, 0, 0, m); + m->mid = midi_init(&mpu401_class, m); if (!m->mid) goto err; *cb = mpu401_intr; @@ -205,7 +200,7 @@ mpu401_minit(struct snd_midi *sm, void *arg) return 1; } -int +static int mpu401_muninit(struct snd_midi *sm, void *arg) { struct mpu401 *m = arg; @@ -213,13 +208,13 @@ mpu401_muninit(struct snd_midi *sm, void *arg) return MPUFOI_UNINIT(m, m->cookie); } -int +static int mpu401_minqsize(struct snd_midi *sm, void *arg) { return 128; } -int +static int mpu401_moutqsize(struct snd_midi *sm, void *arg) { return 128; @@ -235,9 +230,3 @@ mpu401_mcallback(struct snd_midi *sm, void *arg, int flags) } m->flags = flags; } - -static void -mpu401_mcallbackp(struct snd_midi *sm, void *arg, int flags) -{ - mpu401_mcallback(sm, arg, flags); -} diff --git a/sys/dev/sound/midi/mpu_if.m b/sys/dev/sound/midi/mpu_if.m index 835d887f703a..07371a0dd726 100644 --- a/sys/dev/sound/midi/mpu_if.m +++ b/sys/dev/sound/midi/mpu_if.m @@ -44,12 +44,6 @@ METHOD int init { void *_cookie; }; -METHOD void callbackp { - struct snd_midi *_kobj; - void *_cookie; - int _flags; -}; - METHOD void callback { struct snd_midi *_kobj; void *_cookie; diff --git a/sys/dev/sound/pci/atiixp.c b/sys/dev/sound/pci/atiixp.c index 12906ecc6253..0d2228ee16cd 100644 --- a/sys/dev/sound/pci/atiixp.c +++ b/sys/dev/sound/pci/atiixp.c @@ -804,7 +804,6 @@ atiixp_chan_trigger(kobj_t obj, void *data, int go) default: atiixp_unlock(sc); return (0); - break; } /* Update bus busy status */ diff --git a/sys/dev/sound/pci/cmi.c b/sys/dev/sound/pci/cmi.c index 99925d236c08..b5465fed5a8b 100644 --- a/sys/dev/sound/pci/cmi.c +++ b/sys/dev/sound/pci/cmi.c @@ -1009,8 +1009,7 @@ cmi_attach(device_t dev) if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, sc->regid, sc->reg); mtx_destroy(&sc->lock); - if (sc) - free(sc, M_DEVBUF); + free(sc, M_DEVBUF); return ENXIO; } diff --git a/sys/dev/sound/pci/envy24.c b/sys/dev/sound/pci/envy24.c index 3adb22254b72..50864a9067fd 100644 --- a/sys/dev/sound/pci/envy24.c +++ b/sys/dev/sound/pci/envy24.c @@ -1611,10 +1611,8 @@ envy24chan_free(kobj_t obj, void *data) device_printf(sc->dev, "envy24chan_free()\n"); #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_ENVY24); - ch->data = NULL; - } + free(ch->data, M_ENVY24); + ch->data = NULL; mtx_unlock(&sc->lock); return 0; diff --git a/sys/dev/sound/pci/envy24ht.c b/sys/dev/sound/pci/envy24ht.c index 2396a340cd84..3aca8f92f708 100644 --- a/sys/dev/sound/pci/envy24ht.c +++ b/sys/dev/sound/pci/envy24ht.c @@ -1522,10 +1522,8 @@ envy24htchan_free(kobj_t obj, void *data) device_printf(sc->dev, "envy24htchan_free()\n"); #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_ENVY24HT); - ch->data = NULL; - } + free(ch->data, M_ENVY24HT); + ch->data = NULL; mtx_unlock(&sc->lock); return 0; diff --git a/sys/dev/sound/pci/es137x.c b/sys/dev/sound/pci/es137x.c index 4e8c7911e95e..45b953efc3fc 100644 --- a/sys/dev/sound/pci/es137x.c +++ b/sys/dev/sound/pci/es137x.c @@ -1886,8 +1886,7 @@ bad: if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); mtx_destroy(&es->lock); - if (es) - free(es, M_DEVBUF); + free(es, M_DEVBUF); return (ENXIO); } diff --git a/sys/dev/sound/pci/hda/hdac.c b/sys/dev/sound/pci/hda/hdac.c index d1de81e7ba29..d397e98b4be3 100644 --- a/sys/dev/sound/pci/hda/hdac.c +++ b/sys/dev/sound/pci/hda/hdac.c @@ -545,9 +545,12 @@ hdac_get_capabilities(struct hdac_softc *sc) HDAC_CORBSIZE_CORBSZCAP_2) sc->corb_size = 2; else { - device_printf(sc->dev, "%s: Invalid corb size (%x)\n", + device_printf(sc->dev, "%s: Hardware reports invalid corb size " + "(%x), defaulting to 256\n", __func__, corbsize); - return (ENXIO); + sc->corb_size = 256; + corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256); + HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize); } rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE); @@ -561,9 +564,12 @@ hdac_get_capabilities(struct hdac_softc *sc) HDAC_RIRBSIZE_RIRBSZCAP_2) sc->rirb_size = 2; else { - device_printf(sc->dev, "%s: Invalid rirb size (%x)\n", + device_printf(sc->dev, "%s: Hardware reports invalid rirb size " + "(%x), defaulting to 256\n", __func__, rirbsize); - return (ENXIO); + sc->rirb_size = 256; + rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256); + HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize); } HDA_BOOTVERBOSE( diff --git a/sys/dev/sound/pci/hdsp-pcm.c b/sys/dev/sound/pci/hdsp-pcm.c index b64cec281388..5a8f2ab57d6c 100644 --- a/sys/dev/sound/pci/hdsp-pcm.c +++ b/sys/dev/sound/pci/hdsp-pcm.c @@ -677,14 +677,10 @@ hdspchan_free(kobj_t obj, void *data) #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_HDSP); - ch->data = NULL; - } - if (ch->caps != NULL) { - free(ch->caps, M_HDSP); - ch->caps = NULL; - } + free(ch->data, M_HDSP); + ch->data = NULL; + free(ch->caps, M_HDSP); + ch->caps = NULL; mtx_unlock(&sc->lock); return (0); diff --git a/sys/dev/sound/pci/hdspe-pcm.c b/sys/dev/sound/pci/hdspe-pcm.c index d78820732639..678693960e5e 100644 --- a/sys/dev/sound/pci/hdspe-pcm.c +++ b/sys/dev/sound/pci/hdspe-pcm.c @@ -668,14 +668,10 @@ hdspechan_free(kobj_t obj, void *data) #endif mtx_lock(&sc->lock); - if (ch->data != NULL) { - free(ch->data, M_HDSPE); - ch->data = NULL; - } - if (ch->caps != NULL) { - free(ch->caps, M_HDSPE); - ch->caps = NULL; - } + free(ch->data, M_HDSPE); + ch->data = NULL; + free(ch->caps, M_HDSPE); + ch->caps = NULL; mtx_unlock(&sc->lock); return (0); diff --git a/sys/dev/sound/pci/via8233.c b/sys/dev/sound/pci/via8233.c index 6c59397756e0..90e966b864e3 100644 --- a/sys/dev/sound/pci/via8233.c +++ b/sys/dev/sound/pci/via8233.c @@ -1385,8 +1385,7 @@ bad: if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat); mtx_destroy(&via->lock); - if (via) - free(via, M_DEVBUF); + free(via, M_DEVBUF); return (ENXIO); } diff --git a/sys/dev/sound/pci/via82c686.c b/sys/dev/sound/pci/via82c686.c index fe34583b1a25..144f0ff21fb6 100644 --- a/sys/dev/sound/pci/via82c686.c +++ b/sys/dev/sound/pci/via82c686.c @@ -601,7 +601,7 @@ bad: if (via->sgd_table) bus_dmamem_free(via->sgd_dmat, via->sgd_table, via->sgd_dmamap); if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat); mtx_destroy(&via->lock); - if (via) free(via, M_DEVBUF); + free(via, M_DEVBUF); return ENXIO; } diff --git a/sys/dev/sound/pcm/buffer.c b/sys/dev/sound/pcm/buffer.c index eb2cbe667bf3..1db9e5661dc8 100644 --- a/sys/dev/sound/pcm/buffer.c +++ b/sys/dev/sound/pcm/buffer.c @@ -129,11 +129,8 @@ sndbuf_setup(struct snd_dbuf *b, void *buf, unsigned int size) void sndbuf_free(struct snd_dbuf *b) { - if (b->tmpbuf) - free(b->tmpbuf, M_DEVBUF); - - if (b->shadbuf) - free(b->shadbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); + free(b->shadbuf, M_DEVBUF); if (b->buf) { if (b->flags & SNDBUF_F_MANAGED) { @@ -188,8 +185,7 @@ sndbuf_resize(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) printf("%s(): b=%p %p -> %p [%d -> %d : %d]\n", __func__, b, b->tmpbuf, tmpbuf, b->allocsize, allocsize, bufsize); - if (b->tmpbuf != NULL) - free(b->tmpbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); b->tmpbuf = tmpbuf; b->allocsize = allocsize; } else if (snd_verbose > 3) @@ -225,14 +221,11 @@ sndbuf_remalloc(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) tmpbuf = malloc(allocsize, M_DEVBUF, M_WAITOK); shadbuf = malloc(allocsize, M_DEVBUF, M_WAITOK); CHN_LOCK(b->channel); - if (b->buf != NULL) - free(b->buf, M_DEVBUF); + free(b->buf, M_DEVBUF); b->buf = buf; - if (b->tmpbuf != NULL) - free(b->tmpbuf, M_DEVBUF); + free(b->tmpbuf, M_DEVBUF); b->tmpbuf = tmpbuf; - if (b->shadbuf != NULL) - free(b->shadbuf, M_DEVBUF); + free(b->shadbuf, M_DEVBUF); b->shadbuf = shadbuf; if (snd_verbose > 3) printf("%s(): b=%p %d -> %d [%d]\n", diff --git a/sys/dev/sound/pcm/channel.c b/sys/dev/sound/pcm/channel.c index 7c3f0e3dc9f0..011dc1427c2e 100644 --- a/sys/dev/sound/pcm/channel.c +++ b/sys/dev/sound/pcm/channel.c @@ -581,30 +581,14 @@ chn_read(struct pcm_channel *c, struct uio *buf) } void -chn_intr_locked(struct pcm_channel *c) +chn_intr(struct pcm_channel *c) { - - CHN_LOCKASSERT(c); - + CHN_LOCK(c); c->interrupts++; - if (c->direction == PCMDIR_PLAY) chn_wrintr(c); else chn_rdintr(c); -} - -void -chn_intr(struct pcm_channel *c) -{ - - if (CHN_LOCKOWNED(c)) { - chn_intr_locked(c); - return; - } - - CHN_LOCK(c); - chn_intr_locked(c); CHN_UNLOCK(c); } diff --git a/sys/dev/sound/pcm/channel.h b/sys/dev/sound/pcm/channel.h index 0b17c4a130a7..6415f5c88984 100644 --- a/sys/dev/sound/pcm/channel.h +++ b/sys/dev/sound/pcm/channel.h @@ -298,7 +298,6 @@ int chn_oss_setorder(struct pcm_channel *, unsigned long long *); int chn_oss_getmask(struct pcm_channel *, uint32_t *); void chn_resetbuf(struct pcm_channel *c); -void chn_intr_locked(struct pcm_channel *c); void chn_intr(struct pcm_channel *c); int chn_abort(struct pcm_channel *c); diff --git a/sys/dev/sound/pcm/dsp.c b/sys/dev/sound/pcm/dsp.c index 62db4592f206..c1e836691ac7 100644 --- a/sys/dev/sound/pcm/dsp.c +++ b/sys/dev/sound/pcm/dsp.c @@ -2582,8 +2582,7 @@ dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_syncgr out: if (ret != 0) { - if (smrd != NULL) - free(smrd, M_DEVBUF); + free(smrd, M_DEVBUF); if ((sg != NULL) && SLIST_EMPTY(&sg->members)) { sg_ids[2] = sg->id; SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, link); diff --git a/sys/dev/sound/pcm/feeder.c b/sys/dev/sound/pcm/feeder.c index fa4e4e16a133..2a7f54e5d30f 100644 --- a/sys/dev/sound/pcm/feeder.c +++ b/sys/dev/sound/pcm/feeder.c @@ -75,9 +75,8 @@ feeder_create(struct feeder_class *fc, struct pcm_feederdesc *desc) return NULL; f->class = fc; - f->desc = &(f->desc_static); if (desc != NULL) - *(f->desc) = *desc; + f->desc = *desc; err = FEEDER_INIT(f); if (err) { diff --git a/sys/dev/sound/pcm/feeder.h b/sys/dev/sound/pcm/feeder.h index f1c96d86fda0..1f106787ee83 100644 --- a/sys/dev/sound/pcm/feeder.h +++ b/sys/dev/sound/pcm/feeder.h @@ -4,6 +4,10 @@ * Copyright (c) 2005-2009 Ariff Abdullah <ariff@FreeBSD.org> * Copyright (c) 1999 Cameron Grant <cg@FreeBSD.org> * All rights reserved. + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -50,12 +54,10 @@ struct feeder_class { struct pcm_feeder { KOBJ_FIELDS; - int align; - struct pcm_feederdesc *desc, desc_static; + struct pcm_feederdesc desc; void *data; struct feeder_class *class; struct pcm_feeder *source, *parent; - }; void feeder_register(void *p); diff --git a/sys/dev/sound/pcm/feeder_chain.c b/sys/dev/sound/pcm/feeder_chain.c index 32dd4ca14faf..4ec50d810253 100644 --- a/sys/dev/sound/pcm/feeder_chain.c +++ b/sys/dev/sound/pcm/feeder_chain.c @@ -473,8 +473,8 @@ feeder_build_root(struct pcm_channel *c, struct feeder_chain_desc *cdesc) c->feederflags |= 1 << FEEDER_ROOT; - c->feeder->desc->in = cdesc->current.afmt; - c->feeder->desc->out = cdesc->current.afmt; + c->feeder->desc.in = cdesc->current.afmt; + c->feeder->desc.out = cdesc->current.afmt; return (0); } diff --git a/sys/dev/sound/pcm/feeder_eq.c b/sys/dev/sound/pcm/feeder_eq.c index 3838328fb0bb..4cf9d4f6695f 100644 --- a/sys/dev/sound/pcm/feeder_eq.c +++ b/sys/dev/sound/pcm/feeder_eq.c @@ -275,16 +275,16 @@ feed_eq_init(struct pcm_feeder *f) { struct feed_eq_info *info; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->fmt = AFMT_ENCODING(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); - info->align = info->channels * AFMT_BPS(f->desc->in); + info->fmt = AFMT_ENCODING(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); + info->align = info->channels * AFMT_BPS(f->desc.in); info->rate = FEEDEQ_RATE_MIN; info->treble.gain = FEEDEQ_L2GAIN(50); @@ -309,7 +309,7 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) if (value < SND_CHN_MIN || value > SND_CHN_MAX) return (EINVAL); info->channels = (uint32_t)value; - info->align = info->channels * AFMT_BPS(f->desc->in); + info->align = info->channels * AFMT_BPS(f->desc.in); feed_eq_reset(info); break; case FEEDEQ_RATE: @@ -319,7 +319,6 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) if (info->state == FEEDEQ_UNKNOWN) info->state = FEEDEQ_ENABLE; return (feed_eq_setup(info)); - break; case FEEDEQ_TREBLE: case FEEDEQ_BASS: if (value < 0 || value > 100) @@ -343,7 +342,6 @@ feed_eq_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (0); @@ -355,8 +353,7 @@ feed_eq_free(struct pcm_feeder *f) struct feed_eq_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; diff --git a/sys/dev/sound/pcm/feeder_format.c b/sys/dev/sound/pcm/feeder_format.c index d2c4d7618ab4..0747b54cbbae 100644 --- a/sys/dev/sound/pcm/feeder_format.c +++ b/sys/dev/sound/pcm/feeder_format.c @@ -61,23 +61,23 @@ feed_format_init(struct pcm_feeder *f) { struct feed_format_info *info; - if (f->desc->in == f->desc->out || - AFMT_CHANNEL(f->desc->in) != AFMT_CHANNEL(f->desc->out)) + if (f->desc.in == f->desc.out || + AFMT_CHANNEL(f->desc.in) != AFMT_CHANNEL(f->desc.out)) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->channels = AFMT_CHANNEL(f->desc->in); + info->channels = AFMT_CHANNEL(f->desc.in); - info->ibps = AFMT_BPS(f->desc->in); + info->ibps = AFMT_BPS(f->desc.in); info->ialign = info->ibps * info->channels; - info->rdfmt = AFMT_ENCODING(f->desc->in); + info->rdfmt = AFMT_ENCODING(f->desc.in); - info->obps = AFMT_BPS(f->desc->out); + info->obps = AFMT_BPS(f->desc.out); info->oalign = info->obps * info->channels; - info->wrfmt = AFMT_ENCODING(f->desc->out); + info->wrfmt = AFMT_ENCODING(f->desc.out); f->data = info; @@ -90,8 +90,7 @@ feed_format_free(struct pcm_feeder *f) struct feed_format_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -115,7 +114,6 @@ feed_format_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (0); diff --git a/sys/dev/sound/pcm/feeder_matrix.c b/sys/dev/sound/pcm/feeder_matrix.c index 2c7a3e04690d..cba537c84efd 100644 --- a/sys/dev/sound/pcm/feeder_matrix.c +++ b/sys/dev/sound/pcm/feeder_matrix.c @@ -283,15 +283,15 @@ feed_matrix_init(struct pcm_feeder *f) struct pcmchan_matrix *m_in, *m_out; int ret; - if (AFMT_ENCODING(f->desc->in) != AFMT_ENCODING(f->desc->out)) + if (AFMT_ENCODING(f->desc.in) != AFMT_ENCODING(f->desc.out)) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->in = f->desc->in; - info->out = f->desc->out; + info->in = f->desc.in; + info->out = f->desc.out; info->fmt = AFMT_ENCODING(info->in); info->bps = AFMT_BPS(info->in); info->ialign = AFMT_ALIGN(info->in); @@ -317,8 +317,7 @@ feed_matrix_free(struct pcm_feeder *f) struct feed_matrix_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -413,8 +412,7 @@ feeder_matrix_setup(struct pcm_feeder *f, struct pcmchan_matrix *m_in, struct pcmchan_matrix *m_out) { - if (f == NULL || f->desc == NULL || f->class->type != FEEDER_MATRIX || - f->data == NULL) + if (f == NULL || f->class->type != FEEDER_MATRIX || f->data == NULL) return (EINVAL); return (feed_matrix_setup(f->data, m_in, m_out)); diff --git a/sys/dev/sound/pcm/feeder_mixer.c b/sys/dev/sound/pcm/feeder_mixer.c index 10de42ba727a..8c58e1c8ef33 100644 --- a/sys/dev/sound/pcm/feeder_mixer.c +++ b/sys/dev/sound/pcm/feeder_mixer.c @@ -78,16 +78,16 @@ feed_mixer_init(struct pcm_feeder *f) { struct feed_mixer_info *info; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->format = AFMT_ENCODING(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); - info->bps = AFMT_BPS(f->desc->in); + info->format = AFMT_ENCODING(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); + info->bps = AFMT_BPS(f->desc.in); f->data = info; @@ -100,8 +100,7 @@ feed_mixer_free(struct pcm_feeder *f) struct feed_mixer_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -321,7 +320,7 @@ feed_mixer_feed(struct pcm_feeder *f, struct pcm_channel *c, uint8_t *b, if (mcnt != 0) { memset(b + rcnt, sndbuf_zerodata( - f->desc->out), mcnt); + f->desc.out), mcnt); mcnt = 0; } switch (info->format) { diff --git a/sys/dev/sound/pcm/feeder_rate.c b/sys/dev/sound/pcm/feeder_rate.c index c2c232a97177..aee164840c4a 100644 --- a/sys/dev/sound/pcm/feeder_rate.c +++ b/sys/dev/sound/pcm/feeder_rate.c @@ -714,10 +714,8 @@ z_resampler_reset(struct z_info *info) info->z_size = 1; info->z_coeff = NULL; info->z_dcoeff = NULL; - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; info->z_scale = Z_ONE; info->z_dx = Z_FULL_ONE; info->z_dy = Z_FULL_ONE; @@ -1029,10 +1027,8 @@ z_resampler_build_polyphase(struct z_info *info) int32_t alpha, c, i, z, idx; /* Let this be here first. */ - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; if (feeder_rate_polyphase_max < 1) return (ENOTSUP); @@ -1109,7 +1105,7 @@ z_resampler_setup(struct pcm_feeder *f) if (!(Z_FACTOR_SAFE(info->z_gx) && Z_FACTOR_SAFE(info->z_gy))) return (EINVAL); - format = f->desc->in; + format = f->desc.in; adaptive = 0; z_scale = 0; @@ -1154,10 +1150,8 @@ z_resampler_setup(struct pcm_feeder *f) * adaptive mode. */ z_setup_adaptive_sinc: - if (info->z_pcoeff != NULL) { - free(info->z_pcoeff, M_DEVBUF); - info->z_pcoeff = NULL; - } + free(info->z_pcoeff, M_DEVBUF); + info->z_pcoeff = NULL; if (adaptive == 0) { info->z_dy = z_scale << Z_DRIFT_SHIFT; @@ -1333,8 +1327,7 @@ z_setup_adaptive_sinc: if (info->z_delay == NULL || info->z_alloc < i || i <= (info->z_alloc >> 1)) { - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); + free(info->z_delay, M_DEVBUF); info->z_delay = malloc(i, M_DEVBUF, M_NOWAIT | M_ZERO); if (info->z_delay == NULL) return (ENOMEM); @@ -1344,7 +1337,7 @@ z_setup_adaptive_sinc: /* * Zero out head of buffer to avoid pops and clicks. */ - memset(info->z_delay, sndbuf_zerodata(f->desc->out), + memset(info->z_delay, sndbuf_zerodata(f->desc.out), info->z_pos * align); #ifdef Z_DIAGNOSTIC @@ -1469,7 +1462,6 @@ z_resampler_set(struct pcm_feeder *f, int what, int32_t value) break; default: return (EINVAL); - break; } return (z_resampler_setup(f)); @@ -1485,18 +1477,12 @@ z_resampler_get(struct pcm_feeder *f, int what) switch (what) { case Z_RATE_SRC: return (info->rsrc); - break; case Z_RATE_DST: return (info->rdst); - break; case Z_RATE_QUALITY: return (info->quality); - break; case Z_RATE_CHANNELS: return (info->channels); - break; - default: - break; } return (-1); @@ -1508,7 +1494,7 @@ z_resampler_init(struct pcm_feeder *f) struct z_info *info; int ret; - if (f->desc->in != f->desc->out) + if (f->desc.in != f->desc.out) return (EINVAL); info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); @@ -1518,16 +1504,14 @@ z_resampler_init(struct pcm_feeder *f) info->rsrc = Z_RATE_DEFAULT; info->rdst = Z_RATE_DEFAULT; info->quality = feeder_rate_quality; - info->channels = AFMT_CHANNEL(f->desc->in); + info->channels = AFMT_CHANNEL(f->desc.in); f->data = info; ret = z_resampler_setup(f); if (ret != 0) { - if (info->z_pcoeff != NULL) - free(info->z_pcoeff, M_DEVBUF); - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); + free(info->z_pcoeff, M_DEVBUF); + free(info->z_delay, M_DEVBUF); free(info, M_DEVBUF); f->data = NULL; } @@ -1541,13 +1525,9 @@ z_resampler_free(struct pcm_feeder *f) struct z_info *info; info = f->data; - if (info != NULL) { - if (info->z_pcoeff != NULL) - free(info->z_pcoeff, M_DEVBUF); - if (info->z_delay != NULL) - free(info->z_delay, M_DEVBUF); - free(info, M_DEVBUF); - } + free(info->z_pcoeff, M_DEVBUF); + free(info->z_delay, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; diff --git a/sys/dev/sound/pcm/feeder_volume.c b/sys/dev/sound/pcm/feeder_volume.c index 101cc7ba003b..fc4ed1bbb0a5 100644 --- a/sys/dev/sound/pcm/feeder_volume.c +++ b/sys/dev/sound/pcm/feeder_volume.c @@ -151,20 +151,20 @@ feed_volume_init(struct pcm_feeder *f) uint32_t i; int ret; - if (f->desc->in != f->desc->out || - AFMT_CHANNEL(f->desc->in) > SND_CHN_MAX) + if (f->desc.in != f->desc.out || + AFMT_CHANNEL(f->desc.in) > SND_CHN_MAX) return (EINVAL); for (i = 0; i < FEEDVOLUME_TAB_SIZE; i++) { - if (AFMT_ENCODING(f->desc->in) == + if (AFMT_ENCODING(f->desc.in) == feed_volume_info_tab[i].format) { info = malloc(sizeof(*info), M_DEVBUF, M_NOWAIT | M_ZERO); if (info == NULL) return (ENOMEM); - info->bps = AFMT_BPS(f->desc->in); - info->channels = AFMT_CHANNEL(f->desc->in); + info->bps = AFMT_BPS(f->desc.in); + info->channels = AFMT_CHANNEL(f->desc.in); info->apply = feed_volume_info_tab[i].apply; info->volume_class = SND_VOL_C_PCM; info->state = FEEDVOLUME_ENABLE; @@ -193,8 +193,7 @@ feed_volume_free(struct pcm_feeder *f) struct feed_volume_info *info; info = f->data; - if (info != NULL) - free(info, M_DEVBUF); + free(info, M_DEVBUF); f->data = NULL; @@ -232,7 +231,6 @@ feed_volume_set(struct pcm_feeder *f, int what, int value) break; default: return (EINVAL); - break; } return (ret); @@ -332,8 +330,8 @@ feeder_volume_apply_matrix(struct pcm_feeder *f, struct pcmchan_matrix *m) struct feed_volume_info *info; uint32_t i; - if (f == NULL || f->desc == NULL || f->class->type != FEEDER_VOLUME || - f->data == NULL || m == NULL || m->channels < SND_CHN_MIN || + if (f == NULL || f->class->type != FEEDER_VOLUME || f->data == NULL || + m == NULL || m->channels < SND_CHN_MIN || m->channels > SND_CHN_MAX) return (EINVAL); diff --git a/sys/dev/sound/pcm/mixer.c b/sys/dev/sound/pcm/mixer.c index f6eb669010b5..55b61ccb4911 100644 --- a/sys/dev/sound/pcm/mixer.c +++ b/sys/dev/sound/pcm/mixer.c @@ -1071,7 +1071,6 @@ mixer_ioctl_channel(struct cdev *dev, u_long cmd, caddr_t arg, int mode, break; default: return (-1); - break; } pid = td->td_proc->p_pid; diff --git a/sys/dev/sound/pcm/sound.c b/sys/dev/sound/pcm/sound.c index 29dac6b576ae..8ce369bfce5e 100644 --- a/sys/dev/sound/pcm/sound.c +++ b/sys/dev/sound/pcm/sound.c @@ -41,6 +41,7 @@ #include <dev/sound/pcm/ac97.h> #include <dev/sound/pcm/vchan.h> #include <dev/sound/pcm/dsp.h> +#include <dev/sound/sndstat.h> #include <sys/limits.h> #include <sys/sysctl.h> @@ -426,7 +427,7 @@ pcm_register(device_t dev, char *str) else if (snd_unit_auto == 1) snd_unit = pcm_best_unit(snd_unit); - sndstat_register(dev, d->status); + sndstat_register(dev, SNDST_TYPE_PCM, d->status); return (dsp_make_dev(dev)); } diff --git a/sys/dev/sound/pcm/sound.h b/sys/dev/sound/pcm/sound.h index 3ba6eb3692ee..de9af6bd5324 100644 --- a/sys/dev/sound/pcm/sound.h +++ b/sys/dev/sound/pcm/sound.h @@ -66,7 +66,6 @@ #include <sys/poll.h> #include <sys/sbuf.h> #include <sys/soundcard.h> -#include <sys/sndstat.h> #include <sys/sysctl.h> #include <sys/kobj.h> #include <vm/vm.h> @@ -167,9 +166,6 @@ void *pcm_getdevinfo(device_t dev); int snd_setup_intr(device_t dev, struct resource *res, int flags, driver_intr_t hand, void *param, void **cookiep); -int sndstat_register(device_t dev, char *str); -int sndstat_unregister(device_t dev); - /* These are the function codes assigned to the children of sound cards. */ enum { SCF_PCM, diff --git a/sys/dev/sound/pcm/sndstat.c b/sys/dev/sound/sndstat.c index a7c53ac85eb8..b0ac7f7d0824 100644 --- a/sys/dev/sound/pcm/sndstat.c +++ b/sys/dev/sound/sndstat.c @@ -40,19 +40,18 @@ #endif #include <sys/param.h> +#include <sys/dnv.h> #include <sys/lock.h> #include <sys/malloc.h> #include <sys/nv.h> -#include <sys/dnv.h> +#include <sys/sndstat.h> #include <sys/sx.h> #include <dev/sound/pcm/sound.h> +#include <dev/sound/sndstat.h> #include "feeder_if.h" -#define SS_TYPE_PCM 1 -#define SS_TYPE_MIDI 2 - static d_open_t sndstat_open; static void sndstat_close(void *); static d_read_t sndstat_read; @@ -73,7 +72,8 @@ struct sndstat_entry { TAILQ_ENTRY(sndstat_entry) link; device_t dev; char *str; - int type, unit; + enum sndstat_type type; + int unit; }; struct sndstat_userdev { @@ -534,24 +534,24 @@ sndstat_build_sound4_nvlist(struct snddev_info *d, nvlist_t **dip) while (f != NULL) { sbuf_printf(&sb, "%s", f->class->name); if (f->class->type == FEEDER_FORMAT) { - snd_afmt2str(f->desc->in, buf, sizeof(buf)); + snd_afmt2str(f->desc.in, buf, sizeof(buf)); sbuf_printf(&sb, "(%s -> ", buf); - snd_afmt2str(f->desc->out, buf, sizeof(buf)); + snd_afmt2str(f->desc.out, buf, sizeof(buf)); sbuf_printf(&sb, "%s)", buf); } else if (f->class->type == FEEDER_MATRIX) { sbuf_printf(&sb, "(%d.%dch -> %d.%dch)", - AFMT_CHANNEL(f->desc->in) - - AFMT_EXTCHANNEL(f->desc->in), - AFMT_EXTCHANNEL(f->desc->in), - AFMT_CHANNEL(f->desc->out) - - AFMT_EXTCHANNEL(f->desc->out), - AFMT_EXTCHANNEL(f->desc->out)); + AFMT_CHANNEL(f->desc.in) - + AFMT_EXTCHANNEL(f->desc.in), + AFMT_EXTCHANNEL(f->desc.in), + AFMT_CHANNEL(f->desc.out) - + AFMT_EXTCHANNEL(f->desc.out), + AFMT_EXTCHANNEL(f->desc.out)); } else if (f->class->type == FEEDER_RATE) { sbuf_printf(&sb, "(%d -> %d)", FEEDER_GET(f, FEEDRATE_SRC), FEEDER_GET(f, FEEDRATE_DST)); } else { - snd_afmt2str(f->desc->out, buf, sizeof(buf)); + snd_afmt2str(f->desc.out, buf, sizeof(buf)); sbuf_printf(&sb, "(%s)", buf); } sbuf_printf(&sb, " -> "); @@ -686,22 +686,26 @@ sndstat_create_devs_nvlist(nvlist_t **nvlp) return (ENOMEM); TAILQ_FOREACH(ent, &sndstat_devlist, link) { - struct snddev_info *d; - nvlist_t *di; + if (ent->type == SNDST_TYPE_PCM) { + struct snddev_info *d; + nvlist_t *di; - d = device_get_softc(ent->dev); - if (!PCM_REGISTERED(d)) - continue; + d = device_get_softc(ent->dev); + if (!PCM_REGISTERED(d)) + continue; - err = sndstat_build_sound4_nvlist(d, &di); - if (err) - goto done; + err = sndstat_build_sound4_nvlist(d, &di); + if (err) + goto done; - nvlist_append_nvlist_array(nvl, SNDST_DSPS, di); - nvlist_destroy(di); - err = nvlist_error(nvl); - if (err) - goto done; + nvlist_append_nvlist_array(nvl, SNDST_DSPS, di); + nvlist_destroy(di); + err = nvlist_error(nvl); + if (err) + goto done; + } else if (ent->type == SNDST_TYPE_MIDI) { + /* TODO */ + } } TAILQ_FOREACH(pf, &sndstat_filelist, entry) { @@ -1152,22 +1156,14 @@ fail: /************************************************************************/ -int -sndstat_register(device_t dev, char *str) +void +sndstat_register(device_t dev, enum sndstat_type type, char *str) { struct sndstat_entry *ent; struct sndstat_entry *pre; - const char *devtype; - int type, unit; + int unit; unit = device_get_unit(dev); - devtype = device_get_name(dev); - if (!strcmp(devtype, "pcm")) - type = SS_TYPE_PCM; - else if (!strcmp(devtype, "midi")) - type = SS_TYPE_MIDI; - else - return (EINVAL); ent = malloc(sizeof *ent, M_DEVBUF, M_WAITOK | M_ZERO); ent->dev = dev; @@ -1193,8 +1189,6 @@ sndstat_register(device_t dev, char *str) TAILQ_INSERT_BEFORE(pre, ent, link); } SNDSTAT_UNLOCK(); - - return (0); } int @@ -1330,25 +1324,25 @@ sndstat_prepare_pcm(struct sbuf *s, device_t dev, int verbose) sbuf_printf(s, "%s", f->class->name); if (f->class->type == FEEDER_FORMAT) { sbuf_printf(s, "(0x%08x -> 0x%08x)", - f->desc->in, f->desc->out); + f->desc.in, f->desc.out); } else if (f->class->type == FEEDER_MATRIX) { sbuf_printf(s, "(%d.%d -> %d.%d)", - AFMT_CHANNEL(f->desc->in) - - AFMT_EXTCHANNEL(f->desc->in), - AFMT_EXTCHANNEL(f->desc->in), - AFMT_CHANNEL(f->desc->out) - - AFMT_EXTCHANNEL(f->desc->out), - AFMT_EXTCHANNEL(f->desc->out)); + AFMT_CHANNEL(f->desc.in) - + AFMT_EXTCHANNEL(f->desc.in), + AFMT_EXTCHANNEL(f->desc.in), + AFMT_CHANNEL(f->desc.out) - + AFMT_EXTCHANNEL(f->desc.out), + AFMT_EXTCHANNEL(f->desc.out)); } else if (f->class->type == FEEDER_RATE) { sbuf_printf(s, "(0x%08x q:%d %d -> %d)", - f->desc->out, + f->desc.out, FEEDER_GET(f, FEEDRATE_QUALITY), FEEDER_GET(f, FEEDRATE_SRC), FEEDER_GET(f, FEEDRATE_DST)); } else { sbuf_printf(s, "(0x%08x)", - f->desc->out); + f->desc.out); } sbuf_printf(s, " -> "); f = f->parent; @@ -1386,20 +1380,24 @@ sndstat_prepare(struct sndstat_file *pf_self) /* generate list of installed devices */ k = 0; TAILQ_FOREACH(ent, &sndstat_devlist, link) { - d = device_get_softc(ent->dev); - if (!PCM_REGISTERED(d)) - continue; - if (!k++) - sbuf_printf(s, "Installed devices:\n"); - sbuf_printf(s, "%s:", device_get_nameunit(ent->dev)); - sbuf_printf(s, " <%s>", device_get_desc(ent->dev)); - if (snd_verbose > 0) - sbuf_printf(s, " %s", ent->str); - /* XXX Need Giant magic entry ??? */ - PCM_ACQUIRE_QUICK(d); - sndstat_prepare_pcm(s, ent->dev, snd_verbose); - PCM_RELEASE_QUICK(d); - sbuf_printf(s, "\n"); + if (ent->type == SNDST_TYPE_PCM) { + d = device_get_softc(ent->dev); + if (!PCM_REGISTERED(d)) + continue; + if (!k++) + sbuf_printf(s, "Installed devices:\n"); + sbuf_printf(s, "%s:", device_get_nameunit(ent->dev)); + sbuf_printf(s, " <%s>", device_get_desc(ent->dev)); + if (snd_verbose > 0) + sbuf_printf(s, " %s", ent->str); + /* XXX Need Giant magic entry ??? */ + PCM_ACQUIRE_QUICK(d); + sndstat_prepare_pcm(s, ent->dev, snd_verbose); + PCM_RELEASE_QUICK(d); + sbuf_printf(s, "\n"); + } else if (ent->type == SNDST_TYPE_MIDI) { + /* TODO */ + } } if (k == 0) sbuf_printf(s, "No devices installed.\n"); diff --git a/sys/dev/sound/sndstat.h b/sys/dev/sound/sndstat.h new file mode 100644 index 000000000000..3ac0cf48f5a8 --- /dev/null +++ b/sys/dev/sound/sndstat.h @@ -0,0 +1,42 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025 The FreeBSD Foundation + * + * Portions of this software were developed by Christos Margiolis + * <christos@FreeBSD.org> under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _SNDSTAT_H_ +#define _SNDSTAT_H_ + +enum sndstat_type { + SNDST_TYPE_PCM, + SNDST_TYPE_MIDI, +}; + +void sndstat_register(device_t dev, enum sndstat_type type, char *str); +int sndstat_unregister(device_t dev); + +#endif /* _SNDSTAT_H_ */ diff --git a/sys/dev/sound/usb/uaudio.c b/sys/dev/sound/usb/uaudio.c index 65c1327ee0f2..0987ca12d933 100644 --- a/sys/dev/sound/usb/uaudio.c +++ b/sys/dev/sound/usb/uaudio.c @@ -232,7 +232,7 @@ struct uaudio_chan { struct pcmchan_caps pcm_cap; /* capabilities */ struct uaudio_chan_alt usb_alt[CHAN_MAX_ALT]; struct snd_dbuf *pcm_buf; - struct mtx *pcm_mtx; /* lock protecting this structure */ + struct mtx lock; /* lock protecting this structure */ struct uaudio_softc *priv_sc; struct pcm_channel *pcm_ch; struct usb_xfer *xfer[UAUDIO_NCHANBUFS + 1]; @@ -1390,9 +1390,9 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, /* Unsetup prior USB transfers, if any. */ usbd_transfer_unsetup(chan->xfer, UAUDIO_NCHANBUFS + 1); - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = CHAN_MAX_ALT; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); /* * The first alternate setting is typically used for @@ -1415,9 +1415,9 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, return; } - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); next_alt = chan->set_alt; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); chan_alt = chan->usb_alt + next_alt; @@ -1474,7 +1474,7 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, } } if (usbd_transfer_setup(sc->sc_udev, &chan_alt->iface_index, chan->xfer, - chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, chan->pcm_mtx)) { + chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, &chan->lock)) { DPRINTF("could not allocate USB transfers!\n"); goto error; } @@ -1527,18 +1527,18 @@ uaudio_configure_msg_sub(struct uaudio_softc *sc, #error "Please update code below!" #endif - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = next_alt; usbd_transfer_start(chan->xfer[0]); usbd_transfer_start(chan->xfer[1]); - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); return; error: usbd_transfer_unsetup(chan->xfer, UAUDIO_NCHANBUFS + 1); - mtx_lock(chan->pcm_mtx); + mtx_lock(&chan->lock); chan->cur_alt = CHAN_MAX_ALT; - mtx_unlock(chan->pcm_mtx); + mtx_unlock(&chan->lock); } static void @@ -2664,7 +2664,7 @@ uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, /* store mutex and PCM channel */ ch->pcm_ch = c; - ch->pcm_mtx = &c->lock; + mtx_init(&ch->lock, "uaudio_chan lock", NULL, MTX_DEF); /* compute worst case buffer */ @@ -2690,10 +2690,6 @@ uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, ch->pcm_buf = b; ch->max_buf = buf_size; - if (ch->pcm_mtx == NULL) { - DPRINTF("ERROR: PCM channels does not have a mutex!\n"); - goto error; - } return (ch); error: @@ -2704,11 +2700,10 @@ error: int uaudio_chan_free(struct uaudio_chan *ch) { - if (ch->buf != NULL) { - free(ch->buf, M_DEVBUF); - ch->buf = NULL; - } + free(ch->buf, M_DEVBUF); + ch->buf = NULL; usbd_transfer_unsetup(ch->xfer, UAUDIO_NCHANBUFS + 1); + mtx_destroy(&ch->lock); ch->num_alt = 0; diff --git a/sys/dev/ufshci/ufshci_ctrlr.c b/sys/dev/ufshci/ufshci_ctrlr.c index ce0da4cab907..f011d03189e0 100644 --- a/sys/dev/ufshci/ufshci_ctrlr.c +++ b/sys/dev/ufshci/ufshci_ctrlr.c @@ -17,12 +17,8 @@ ufshci_ctrlr_fail(struct ufshci_controller *ctrlr) { ctrlr->is_failed = true; - ufshci_req_queue_fail(ctrlr, - ctrlr->task_mgmt_req_queue.qops.get_hw_queue( - &ctrlr->task_mgmt_req_queue)); - ufshci_req_queue_fail(ctrlr, - ctrlr->transfer_req_queue.qops.get_hw_queue( - &ctrlr->transfer_req_queue)); + ufshci_req_queue_fail(ctrlr, &ctrlr->task_mgmt_req_queue); + ufshci_req_queue_fail(ctrlr, &ctrlr->transfer_req_queue); } static void @@ -430,24 +426,15 @@ ufshci_ctrlr_submit_task_mgmt_request(struct ufshci_controller *ctrlr, struct ufshci_request *req) { return ( - ufshci_req_queue_submit_request(&ctrlr->task_mgmt_req_queue, req, - /*is_admin*/ false)); + ufshci_req_queue_submit_request(&ctrlr->task_mgmt_req_queue, req)); } int -ufshci_ctrlr_submit_admin_request(struct ufshci_controller *ctrlr, +ufshci_ctrlr_submit_transfer_request(struct ufshci_controller *ctrlr, struct ufshci_request *req) { - return (ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req, - /*is_admin*/ true)); -} - -int -ufshci_ctrlr_submit_io_request(struct ufshci_controller *ctrlr, - struct ufshci_request *req) -{ - return (ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req, - /*is_admin*/ false)); + return ( + ufshci_req_queue_submit_request(&ctrlr->transfer_req_queue, req)); } int diff --git a/sys/dev/ufshci/ufshci_ctrlr_cmd.c b/sys/dev/ufshci/ufshci_ctrlr_cmd.c index 253f31a93c2e..cac01894c062 100644 --- a/sys/dev/ufshci/ufshci_ctrlr_cmd.c +++ b/sys/dev/ufshci/ufshci_ctrlr_cmd.c @@ -44,12 +44,13 @@ ufshci_ctrlr_cmd_send_nop(struct ufshci_controller *ctrlr, ufshci_cb_fn_t cb_fn, req->request_size = sizeof(struct ufshci_nop_out_upiu); req->response_size = sizeof(struct ufshci_nop_in_upiu); + req->is_admin = true; upiu = (struct ufshci_nop_out_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); upiu->header.trans_type = UFSHCI_UPIU_TRANSACTION_CODE_NOP_OUT; - ufshci_ctrlr_submit_admin_request(ctrlr, req); + ufshci_ctrlr_submit_transfer_request(ctrlr, req); } void @@ -63,6 +64,7 @@ ufshci_ctrlr_cmd_send_query_request(struct ufshci_controller *ctrlr, req->request_size = sizeof(struct ufshci_query_request_upiu); req->response_size = sizeof(struct ufshci_query_response_upiu); + req->is_admin = true; upiu = (struct ufshci_query_request_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); @@ -75,5 +77,5 @@ ufshci_ctrlr_cmd_send_query_request(struct ufshci_controller *ctrlr, upiu->value_64 = param.value; upiu->length = param.desc_size; - ufshci_ctrlr_submit_admin_request(ctrlr, req); + ufshci_ctrlr_submit_transfer_request(ctrlr, req); } diff --git a/sys/dev/ufshci/ufshci_dev.c b/sys/dev/ufshci/ufshci_dev.c index 38c6de9731a4..406130c537a7 100644 --- a/sys/dev/ufshci/ufshci_dev.c +++ b/sys/dev/ufshci/ufshci_dev.c @@ -33,7 +33,8 @@ ufshci_dev_read_descriptor(struct ufshci_controller *ctrlr, &status, param); ufshci_completion_poll(&status); if (status.error) { - ufshci_printf(ctrlr, "ufshci_dev_read_descriptor failed!\n"); + ufshci_printf(ctrlr, + "Failed to send Read Descriptor query request!\n"); return (ENXIO); } diff --git a/sys/dev/ufshci/ufshci_private.h b/sys/dev/ufshci/ufshci_private.h index bcb2bcef0230..b57142bf58fc 100644 --- a/sys/dev/ufshci/ufshci_private.h +++ b/sys/dev/ufshci/ufshci_private.h @@ -451,9 +451,7 @@ void ufshci_ctrlr_poll(struct ufshci_controller *ctrlr); int ufshci_ctrlr_submit_task_mgmt_request(struct ufshci_controller *ctrlr, struct ufshci_request *req); -int ufshci_ctrlr_submit_admin_request(struct ufshci_controller *ctrlr, - struct ufshci_request *req); -int ufshci_ctrlr_submit_io_request(struct ufshci_controller *ctrlr, +int ufshci_ctrlr_submit_transfer_request(struct ufshci_controller *ctrlr, struct ufshci_request *req); int ufshci_ctrlr_send_nop(struct ufshci_controller *ctrlr); @@ -499,9 +497,9 @@ int ufshci_utmr_req_queue_enable(struct ufshci_controller *ctrlr); void ufshci_utr_req_queue_disable(struct ufshci_controller *ctrlr); int ufshci_utr_req_queue_enable(struct ufshci_controller *ctrlr); void ufshci_req_queue_fail(struct ufshci_controller *ctrlr, - struct ufshci_hw_queue *hwq); + struct ufshci_req_queue *req_queue); int ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, - struct ufshci_request *req, bool is_admin); + struct ufshci_request *req); void ufshci_req_queue_complete_tracker(struct ufshci_tracker *tr); /* Request Single Doorbell Queue */ diff --git a/sys/dev/ufshci/ufshci_req_queue.c b/sys/dev/ufshci/ufshci_req_queue.c index df7e4b159278..4c82b79d0e26 100644 --- a/sys/dev/ufshci/ufshci_req_queue.c +++ b/sys/dev/ufshci/ufshci_req_queue.c @@ -199,11 +199,10 @@ ufshci_req_queue_manual_complete_request(struct ufshci_req_queue *req_queue, void ufshci_req_queue_fail(struct ufshci_controller *ctrlr, - struct ufshci_hw_queue *hwq) + struct ufshci_req_queue *req_queue) { - struct ufshci_req_queue *req_queue; + struct ufshci_hw_queue *hwq = req_queue->qops.get_hw_queue(req_queue); struct ufshci_tracker *tr; - struct ufshci_request *req; int i; if (!mtx_initialized(&hwq->qlock)) @@ -211,16 +210,13 @@ ufshci_req_queue_fail(struct ufshci_controller *ctrlr, mtx_lock(&hwq->qlock); - req_queue = &ctrlr->transfer_req_queue; - - for (i = 0; i < req_queue->num_entries; i++) { + for (i = 0; i < req_queue->num_trackers; i++) { tr = hwq->act_tr[i]; - req = tr->req; if (tr->slot_state == UFSHCI_SLOT_STATE_RESERVED) { mtx_unlock(&hwq->qlock); - ufshci_req_queue_manual_complete_request(req_queue, req, - UFSHCI_DESC_ABORTED, + ufshci_req_queue_manual_complete_request(req_queue, + tr->req, UFSHCI_DESC_ABORTED, UFSHCI_RESPONSE_CODE_GENERAL_FAILURE); mtx_lock(&hwq->qlock); } else if (tr->slot_state == UFSHCI_SLOT_STATE_SCHEDULED) { @@ -272,9 +268,8 @@ ufshci_req_queue_complete_tracker(struct ufshci_tracker *tr) error = ufshci_req_queue_response_is_error(req_queue, ocs, &cpl.response_upiu); - /* TODO: Implement retry */ - // retriable = ufshci_completion_is_retry(cpl); - retriable = false; + /* Retry for admin commands */ + retriable = req->is_admin; retry = error && retriable && req->retries < req_queue->ctrlr->retry_count; if (retry) @@ -782,7 +777,7 @@ _ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, int ufshci_req_queue_submit_request(struct ufshci_req_queue *req_queue, - struct ufshci_request *req, bool is_admin) + struct ufshci_request *req) { struct ufshci_hw_queue *hwq; uint32_t error; diff --git a/sys/dev/ufshci/ufshci_sim.c b/sys/dev/ufshci/ufshci_sim.c index 1589e7475ad4..bee1fff858ff 100644 --- a/sys/dev/ufshci/ufshci_sim.c +++ b/sys/dev/ufshci/ufshci_sim.c @@ -165,6 +165,7 @@ ufshchi_sim_scsiio(struct cam_sim *sim, union ccb *ccb) data_direction = UFSHCI_DATA_DIRECTION_NO_DATA_TRANSFER; } req->data_direction = data_direction; + req->is_admin = false; upiu = (struct ufshci_cmd_command_upiu *)&req->request_upiu; memset(upiu, 0, req->request_size); @@ -191,7 +192,7 @@ ufshchi_sim_scsiio(struct cam_sim *sim, union ccb *ccb) } memcpy(upiu->cdb, cdb, csio->cdb_len); - error = ufshci_ctrlr_submit_io_request(ctrlr, req); + error = ufshci_ctrlr_submit_transfer_request(ctrlr, req); if (error == EBUSY) { ccb->ccb_h.status = CAM_SCSI_BUSY; xpt_done(ccb); diff --git a/sys/dev/vmm/vmm_dev.c b/sys/dev/vmm/vmm_dev.c index 840e810a39fb..a5322f05d28f 100644 --- a/sys/dev/vmm/vmm_dev.c +++ b/sys/dev/vmm/vmm_dev.c @@ -33,6 +33,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_mem.h> #include <dev/vmm/vmm_stat.h> +#include <dev/vmm/vmm_vm.h> #ifdef __amd64__ #ifdef COMPAT_FREEBSD12 @@ -140,38 +141,6 @@ vcpu_unlock_one(struct vcpu *vcpu) vcpu_set_state(vcpu, VCPU_IDLE, false); } -#ifndef __amd64__ -static int -vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) -{ - struct vcpu *vcpu; - int error; - uint16_t i, j, maxcpus; - - error = 0; - maxcpus = vm_get_maxcpus(vm); - for (i = 0; i < maxcpus; i++) { - vcpu = vm_vcpu(vm, i); - if (vcpu == NULL) - continue; - error = vcpu_lock_one(vcpu); - if (error) - break; - } - - if (error) { - for (j = 0; j < i; j++) { - vcpu = vm_vcpu(vm, j); - if (vcpu == NULL) - continue; - vcpu_unlock_one(vcpu); - } - } - - return (error); -} -#endif - static int vcpu_lock_all(struct vmmdev_softc *sc) { diff --git a/sys/dev/vmm/vmm_ktr.h b/sys/dev/vmm/vmm_ktr.h index 20370a229530..afd9831e4225 100644 --- a/sys/dev/vmm/vmm_ktr.h +++ b/sys/dev/vmm/vmm_ktr.h @@ -30,7 +30,9 @@ #define _VMM_KTR_H_ #include <sys/ktr.h> -#include <sys/pcpu.h> +#ifdef KTR +#include <dev/vmm/vmm_vm.h> +#endif #ifndef KTR_VMM #define KTR_VMM KTR_GEN diff --git a/sys/dev/vmm/vmm_mem.c b/sys/dev/vmm/vmm_mem.c index 5ae944713c81..5a73cbf7fc5b 100644 --- a/sys/dev/vmm/vmm_mem.c +++ b/sys/dev/vmm/vmm_mem.c @@ -23,6 +23,7 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> static void vm_free_memmap(struct vm *vm, int ident); diff --git a/sys/dev/vmm/vmm_mem.h b/sys/dev/vmm/vmm_mem.h index f3d22058c7b8..64bb29352a55 100644 --- a/sys/dev/vmm/vmm_mem.h +++ b/sys/dev/vmm/vmm_mem.h @@ -34,7 +34,10 @@ enum { #include <sys/types.h> #include <sys/_sx.h> +struct domainset; +struct vcpu; struct vm; +struct vm_guest_paging; struct vm_object; struct vmspace; diff --git a/sys/dev/vmm/vmm_stat.h b/sys/dev/vmm/vmm_stat.h index 471afd0dd827..469d8ef54829 100644 --- a/sys/dev/vmm/vmm_stat.h +++ b/sys/dev/vmm/vmm_stat.h @@ -32,6 +32,8 @@ #ifndef _DEV_VMM_STAT_H_ #define _DEV_VMM_STAT_H_ +#include <dev/vmm/vmm_vm.h> + struct vm; #define MAX_VMM_STAT_ELEMS 64 /* arbitrary */ diff --git a/sys/dev/vmm/vmm_vm.c b/sys/dev/vmm/vmm_vm.c new file mode 100644 index 000000000000..7941038ed671 --- /dev/null +++ b/sys/dev/vmm/vmm_vm.c @@ -0,0 +1,476 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + */ + +#include <sys/param.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mutex.h> +#include <sys/proc.h> +#include <sys/sx.h> +#include <sys/sysctl.h> + +#include <machine/smp.h> + +#include <dev/vmm/vmm_vm.h> + +SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, NULL); + +int vmm_ipinum; +SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, + "IPI vector used for vcpu notifications"); + +/* + * Invoke the rendezvous function on the specified vcpu if applicable. Return + * true if the rendezvous is finished, false otherwise. + */ +static bool +vm_rendezvous(struct vcpu *vcpu) +{ + struct vm *vm = vcpu->vm; + int vcpuid; + + mtx_assert(&vcpu->vm->rendezvous_mtx, MA_OWNED); + KASSERT(vcpu->vm->rendezvous_func != NULL, + ("vm_rendezvous: no rendezvous pending")); + + /* 'rendezvous_req_cpus' must be a subset of 'active_cpus' */ + CPU_AND(&vm->rendezvous_req_cpus, &vm->rendezvous_req_cpus, + &vm->active_cpus); + + vcpuid = vcpu->vcpuid; + if (CPU_ISSET(vcpuid, &vm->rendezvous_req_cpus) && + !CPU_ISSET(vcpuid, &vm->rendezvous_done_cpus)) { + (*vm->rendezvous_func)(vcpu, vm->rendezvous_arg); + CPU_SET(vcpuid, &vm->rendezvous_done_cpus); + } + if (CPU_CMP(&vm->rendezvous_req_cpus, &vm->rendezvous_done_cpus) == 0) { + CPU_ZERO(&vm->rendezvous_req_cpus); + vm->rendezvous_func = NULL; + wakeup(&vm->rendezvous_func); + return (true); + } + return (false); +} + +int +vm_handle_rendezvous(struct vcpu *vcpu) +{ + struct vm *vm; + struct thread *td; + + td = curthread; + vm = vcpu->vm; + + mtx_lock(&vm->rendezvous_mtx); + while (vm->rendezvous_func != NULL) { + if (vm_rendezvous(vcpu)) + break; + + mtx_sleep(&vm->rendezvous_func, &vm->rendezvous_mtx, 0, + "vmrndv", hz); + if (td_ast_pending(td, TDA_SUSPEND)) { + int error; + + mtx_unlock(&vm->rendezvous_mtx); + error = thread_check_susp(td, true); + if (error != 0) + return (error); + mtx_lock(&vm->rendezvous_mtx); + } + } + mtx_unlock(&vm->rendezvous_mtx); + return (0); +} + +static void +vcpu_wait_idle(struct vcpu *vcpu) +{ + KASSERT(vcpu->state != VCPU_IDLE, ("vcpu already idle")); + + vcpu->reqidle = 1; + vcpu_notify_event_locked(vcpu); + msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); +} + +int +vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, + bool from_idle) +{ + int error; + + vcpu_assert_locked(vcpu); + + /* + * State transitions from the vmmdev_ioctl() must always begin from + * the VCPU_IDLE state. This guarantees that there is only a single + * ioctl() operating on a vcpu at any point. + */ + if (from_idle) { + while (vcpu->state != VCPU_IDLE) + vcpu_wait_idle(vcpu); + } else { + KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " + "vcpu idle state")); + } + + if (vcpu->state == VCPU_RUNNING) { + KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " + "mismatch for running vcpu", curcpu, vcpu->hostcpu)); + } else { + KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " + "vcpu that is not running", vcpu->hostcpu)); + } + + /* + * The following state transitions are allowed: + * IDLE -> FROZEN -> IDLE + * FROZEN -> RUNNING -> FROZEN + * FROZEN -> SLEEPING -> FROZEN + */ + switch (vcpu->state) { + case VCPU_IDLE: + case VCPU_RUNNING: + case VCPU_SLEEPING: + error = (newstate != VCPU_FROZEN); + break; + case VCPU_FROZEN: + error = (newstate == VCPU_FROZEN); + break; + default: + error = 1; + break; + } + + if (error) + return (EBUSY); + + vcpu->state = newstate; + if (newstate == VCPU_RUNNING) + vcpu->hostcpu = curcpu; + else + vcpu->hostcpu = NOCPU; + + if (newstate == VCPU_IDLE) + wakeup(&vcpu->state); + + return (0); +} + +/* + * Try to lock all of the vCPUs in the VM while taking care to avoid deadlocks + * with vm_smp_rendezvous(). + * + * The complexity here suggests that the rendezvous mechanism needs a rethink. + */ +int +vcpu_set_state_all(struct vm *vm, enum vcpu_state newstate) +{ + cpuset_t locked; + struct vcpu *vcpu; + int error, i; + uint16_t maxcpus; + + KASSERT(newstate != VCPU_IDLE, + ("vcpu_set_state_all: invalid target state %d", newstate)); + + error = 0; + CPU_ZERO(&locked); + maxcpus = vm->maxcpus; + + mtx_lock(&vm->rendezvous_mtx); +restart: + if (vm->rendezvous_func != NULL) { + /* + * If we have a pending rendezvous, then the initiator may be + * blocked waiting for other vCPUs to execute the callback. The + * current thread may be a vCPU thread so we must not block + * waiting for the initiator, otherwise we get a deadlock. + * Thus, execute the callback on behalf of any idle vCPUs. + */ + for (i = 0; i < maxcpus; i++) { + vcpu = vm_vcpu(vm, i); + if (vcpu == NULL) + continue; + vcpu_lock(vcpu); + if (vcpu->state == VCPU_IDLE) { + (void)vcpu_set_state_locked(vcpu, VCPU_FROZEN, + true); + CPU_SET(i, &locked); + } + if (CPU_ISSET(i, &locked)) { + /* + * We can safely execute the callback on this + * vCPU's behalf. + */ + vcpu_unlock(vcpu); + (void)vm_rendezvous(vcpu); + vcpu_lock(vcpu); + } + vcpu_unlock(vcpu); + } + } + + /* + * Now wait for remaining vCPUs to become idle. This may include the + * initiator of a rendezvous that is currently blocked on the rendezvous + * mutex. + */ + CPU_FOREACH_ISCLR(i, &locked) { + if (i >= maxcpus) + break; + vcpu = vm_vcpu(vm, i); + if (vcpu == NULL) + continue; + vcpu_lock(vcpu); + while (vcpu->state != VCPU_IDLE) { + mtx_unlock(&vm->rendezvous_mtx); + vcpu_wait_idle(vcpu); + vcpu_unlock(vcpu); + mtx_lock(&vm->rendezvous_mtx); + if (vm->rendezvous_func != NULL) + goto restart; + vcpu_lock(vcpu); + } + error = vcpu_set_state_locked(vcpu, newstate, true); + vcpu_unlock(vcpu); + if (error != 0) { + /* Roll back state changes. */ + CPU_FOREACH_ISSET(i, &locked) + (void)vcpu_set_state(vcpu, VCPU_IDLE, false); + break; + } + CPU_SET(i, &locked); + } + mtx_unlock(&vm->rendezvous_mtx); + return (error); +} + + +int +vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) +{ + int error; + + vcpu_lock(vcpu); + error = vcpu_set_state_locked(vcpu, newstate, from_idle); + vcpu_unlock(vcpu); + + return (error); +} + +enum vcpu_state +vcpu_get_state(struct vcpu *vcpu, int *hostcpu) +{ + enum vcpu_state state; + + vcpu_lock(vcpu); + state = vcpu->state; + if (hostcpu != NULL) + *hostcpu = vcpu->hostcpu; + vcpu_unlock(vcpu); + + return (state); +} + +/* + * This function is called to ensure that a vcpu "sees" a pending event + * as soon as possible: + * - If the vcpu thread is sleeping then it is woken up. + * - If the vcpu is running on a different host_cpu then an IPI will be directed + * to the host_cpu to cause the vcpu to trap into the hypervisor. + */ +void +vcpu_notify_event_locked(struct vcpu *vcpu) +{ + int hostcpu; + + hostcpu = vcpu->hostcpu; + if (vcpu->state == VCPU_RUNNING) { + KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); + if (hostcpu != curcpu) { + ipi_cpu(hostcpu, vmm_ipinum); + } else { + /* + * If the 'vcpu' is running on 'curcpu' then it must + * be sending a notification to itself (e.g. SELF_IPI). + * The pending event will be picked up when the vcpu + * transitions back to guest context. + */ + } + } else { + KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " + "with hostcpu %d", vcpu->state, hostcpu)); + if (vcpu->state == VCPU_SLEEPING) + wakeup_one(vcpu); + } +} + +void +vcpu_notify_event(struct vcpu *vcpu) +{ + vcpu_lock(vcpu); + vcpu_notify_event_locked(vcpu); + vcpu_unlock(vcpu); +} + +int +vcpu_debugged(struct vcpu *vcpu) +{ + return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); +} + +void +vm_lock_vcpus(struct vm *vm) +{ + sx_xlock(&vm->vcpus_init_lock); +} + +void +vm_unlock_vcpus(struct vm *vm) +{ + sx_unlock(&vm->vcpus_init_lock); +} + +void +vm_disable_vcpu_creation(struct vm *vm) +{ + sx_xlock(&vm->vcpus_init_lock); + vm->dying = true; + sx_xunlock(&vm->vcpus_init_lock); +} + +uint16_t +vm_get_maxcpus(struct vm *vm) +{ + return (vm->maxcpus); +} + +void +vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, + uint16_t *threads, uint16_t *maxcpus) +{ + *sockets = vm->sockets; + *cores = vm->cores; + *threads = vm->threads; + *maxcpus = vm->maxcpus; +} + +int +vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, + uint16_t threads, uint16_t maxcpus __unused) +{ + /* Ignore maxcpus. */ + if (sockets * cores * threads > vm->maxcpus) + return (EINVAL); + vm->sockets = sockets; + vm->cores = cores; + vm->threads = threads; + return (0); +} + +int +vm_suspend(struct vm *vm, enum vm_suspend_how how) +{ + int i; + + if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) + return (EINVAL); + + if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) + return (EALREADY); + + /* + * Notify all active vcpus that they are now suspended. + */ + for (i = 0; i < vm->maxcpus; i++) { + if (CPU_ISSET(i, &vm->active_cpus)) + vcpu_notify_event(vm_vcpu(vm, i)); + } + + return (0); +} + +int +vm_reinit(struct vm *vm) +{ + int error; + + /* + * A virtual machine can be reset only if all vcpus are suspended. + */ + if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { + vm_reset(vm); + error = 0; + } else { + error = EBUSY; + } + + return (error); +} + +int +vm_activate_cpu(struct vcpu *vcpu) +{ + struct vm *vm = vcpu->vm; + + if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) + return (EBUSY); + + CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); + return (0); +} + +int +vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) +{ + if (vcpu == NULL) { + vm->debug_cpus = vm->active_cpus; + for (int i = 0; i < vm->maxcpus; i++) { + if (CPU_ISSET(i, &vm->active_cpus)) + vcpu_notify_event(vm_vcpu(vm, i)); + } + } else { + if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) + return (EINVAL); + + CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); + vcpu_notify_event(vcpu); + } + return (0); +} + +int +vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) +{ + if (vcpu == NULL) { + CPU_ZERO(&vm->debug_cpus); + } else { + if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) + return (EINVAL); + + CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); + } + return (0); +} + +cpuset_t +vm_active_cpus(struct vm *vm) +{ + return (vm->active_cpus); +} + +cpuset_t +vm_debug_cpus(struct vm *vm) +{ + return (vm->debug_cpus); +} + +cpuset_t +vm_suspended_cpus(struct vm *vm) +{ + return (vm->suspended_cpus); +} diff --git a/sys/dev/vmm/vmm_vm.h b/sys/dev/vmm/vmm_vm.h new file mode 100644 index 000000000000..66d3545d1dd5 --- /dev/null +++ b/sys/dev/vmm/vmm_vm.h @@ -0,0 +1,233 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + */ + +#ifndef _DEV_VMM_VM_H_ +#define _DEV_VMM_VM_H_ + +#ifdef _KERNEL +#include <sys/_cpuset.h> + +#include <machine/vmm.h> + +#include <dev/vmm/vmm_param.h> +#include <dev/vmm/vmm_mem.h> + +struct vcpu; + +enum vcpu_state { + VCPU_IDLE, + VCPU_FROZEN, + VCPU_RUNNING, + VCPU_SLEEPING, +}; + +/* + * Initialization: + * (a) allocated when vcpu is created + * (i) initialized when vcpu is created and when it is reinitialized + * (o) initialized the first time the vcpu is created + * (x) initialized before use + */ +struct vcpu { + struct mtx mtx; /* (o) protects 'state' and 'hostcpu' */ + enum vcpu_state state; /* (o) vcpu state */ + int vcpuid; /* (o) */ + int hostcpu; /* (o) vcpu's host cpu */ + int reqidle; /* (i) request vcpu to idle */ + struct vm *vm; /* (o) */ + void *cookie; /* (i) cpu-specific data */ + void *stats; /* (a,i) statistics */ + + VMM_VCPU_MD_FIELDS; +}; + +#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) +#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) +#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) +#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) +#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) + +extern int vmm_ipinum; + +int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); +int vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, + bool from_idle); +int vcpu_set_state_all(struct vm *vm, enum vcpu_state state); +enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); +void vcpu_notify_event(struct vcpu *vcpu); +void vcpu_notify_event_locked(struct vcpu *vcpu); +int vcpu_debugged(struct vcpu *vcpu); + +static inline void * +vcpu_stats(struct vcpu *vcpu) +{ + return (vcpu->stats); +} + +static inline struct vm * +vcpu_vm(struct vcpu *vcpu) +{ + return (vcpu->vm); +} + +static inline int +vcpu_vcpuid(struct vcpu *vcpu) +{ + return (vcpu->vcpuid); +} + +static int __inline +vcpu_is_running(struct vcpu *vcpu, int *hostcpu) +{ + return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); +} + +#ifdef _SYS_PROC_H_ +static int __inline +vcpu_should_yield(struct vcpu *vcpu) +{ + struct thread *td; + + td = curthread; + return (td->td_ast != 0 || td->td_owepreempt != 0); +} +#endif + +typedef void (*vm_rendezvous_func_t)(struct vcpu *vcpu, void *arg); +int vm_handle_rendezvous(struct vcpu *vcpu); + +/* + * Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'. + * The rendezvous 'func(arg)' is not allowed to do anything that will + * cause the thread to be put to sleep. + * + * The caller cannot hold any locks when initiating the rendezvous. + * + * The implementation of this API may cause vcpus other than those specified + * by 'dest' to be stalled. The caller should not rely on any vcpus making + * forward progress when the rendezvous is in progress. + */ +int vm_smp_rendezvous(struct vcpu *vcpu, cpuset_t dest, + vm_rendezvous_func_t func, void *arg); + +/* + * Initialization: + * (o) initialized the first time the VM is created + * (i) initialized when VM is created and when it is reinitialized + * (x) initialized before use + * + * Locking: + * [m] mem_segs_lock + * [r] rendezvous_mtx + * [v] reads require one frozen vcpu, writes require freezing all vcpus + */ +struct vm { + void *cookie; /* (i) cpu-specific data */ + struct vcpu **vcpu; /* (o) guest vcpus */ + struct vm_mem mem; /* (i) [m+v] guest memory */ + + char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ + struct sx vcpus_init_lock; /* (o) */ + + bool dying; /* (o) is dying */ + int suspend; /* (i) stop VM execution */ + + volatile cpuset_t active_cpus; /* (i) active vcpus */ + volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug */ + volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ + volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ + + cpuset_t rendezvous_req_cpus; /* (x) [r] rendezvous requested */ + cpuset_t rendezvous_done_cpus; /* (x) [r] rendezvous finished */ + void *rendezvous_arg; /* (x) [r] rendezvous func/arg */ + vm_rendezvous_func_t rendezvous_func; + struct mtx rendezvous_mtx; /* (o) rendezvous lock */ + + uint16_t sockets; /* (o) num of sockets */ + uint16_t cores; /* (o) num of cores/socket */ + uint16_t threads; /* (o) num of threads/core */ + uint16_t maxcpus; /* (o) max pluggable cpus */ + + VMM_VM_MD_FIELDS; +}; + +int vm_create(const char *name, struct vm **retvm); +struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); +void vm_destroy(struct vm *vm); +int vm_reinit(struct vm *vm); +void vm_reset(struct vm *vm); + +void vm_lock_vcpus(struct vm *vm); +void vm_unlock_vcpus(struct vm *vm); +void vm_disable_vcpu_creation(struct vm *vm); + +int vm_suspend(struct vm *vm, enum vm_suspend_how how); +int vm_activate_cpu(struct vcpu *vcpu); +int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); +int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); + +cpuset_t vm_active_cpus(struct vm *vm); +cpuset_t vm_debug_cpus(struct vm *vm); +cpuset_t vm_suspended_cpus(struct vm *vm); + +uint16_t vm_get_maxcpus(struct vm *vm); +void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, + uint16_t *threads, uint16_t *maxcpus); +int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, + uint16_t threads, uint16_t maxcpus); + +static inline const char * +vm_name(struct vm *vm) +{ + return (vm->name); +} + +static inline struct vm_mem * +vm_mem(struct vm *vm) +{ + return (&vm->mem); +} + +static inline struct vcpu * +vm_vcpu(struct vm *vm, int vcpuid) +{ + return (vm->vcpu[vcpuid]); +} + +struct vm_eventinfo { + cpuset_t *rptr; /* rendezvous cookie */ + int *sptr; /* suspend cookie */ + int *iptr; /* reqidle cookie */ +}; + +static inline int +vcpu_rendezvous_pending(struct vcpu *vcpu, struct vm_eventinfo *info) +{ + /* + * This check isn't done with atomic operations or under a lock because + * there's no need to. If the vcpuid bit is set, the vcpu is part of a + * rendezvous and the bit won't be cleared until the vcpu enters the + * rendezvous. On rendezvous exit, the cpuset is cleared and the vcpu + * will see an empty cpuset. So, the races are harmless. + */ + return (CPU_ISSET(vcpu_vcpuid(vcpu), info->rptr)); +} + +static inline int +vcpu_suspended(struct vm_eventinfo *info) +{ + return (*info->sptr); +} + +static inline int +vcpu_reqidle(struct vm_eventinfo *info) +{ + return (*info->iptr); +} +#endif /* _KERNEL */ + +#endif /* !_DEV_VMM_VM_H_ */ diff --git a/sys/dev/xen/blkback/blkback.c b/sys/dev/xen/blkback/blkback.c index c6cba729b991..dcfdcafa9351 100644 --- a/sys/dev/xen/blkback/blkback.c +++ b/sys/dev/xen/blkback/blkback.c @@ -152,7 +152,7 @@ struct xbb_softc; struct xbb_xen_req; static void xbb_attach_failed(struct xbb_softc *xbb, int err, const char *fmt, - ...) __attribute__((format(printf, 3, 4))); + ...) __printflike(3, 4); static int xbb_shutdown(struct xbb_softc *xbb); /*------------------------------ Data Structures -----------------------------*/ diff --git a/sys/fs/fuse/fuse_device.c b/sys/fs/fuse/fuse_device.c index cee477865c42..41387de3ce71 100644 --- a/sys/fs/fuse/fuse_device.c +++ b/sys/fs/fuse/fuse_device.c @@ -82,7 +82,7 @@ #include <sys/sysctl.h> #include <sys/poll.h> #include <sys/selinfo.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_DEVICE #include <sys/exterrvar.h> #include "fuse.h" diff --git a/sys/fs/fuse/fuse_vfsops.c b/sys/fs/fuse/fuse_vfsops.c index b617925c4e5f..0ff79913128a 100644 --- a/sys/fs/fuse/fuse_vfsops.c +++ b/sys/fs/fuse/fuse_vfsops.c @@ -81,7 +81,7 @@ #include <sys/mount.h> #include <sys/sysctl.h> #include <sys/fcntl.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_VFS #include <sys/exterrvar.h> #include "fuse.h" diff --git a/sys/fs/fuse/fuse_vnops.c b/sys/fs/fuse/fuse_vnops.c index ef5aee5de34c..0e049b1f07a9 100644 --- a/sys/fs/fuse/fuse_vnops.c +++ b/sys/fs/fuse/fuse_vnops.c @@ -89,7 +89,7 @@ #include <sys/buf.h> #include <sys/sysctl.h> #include <sys/vmmeter.h> -#define EXTERR_CATEGORY EXTERR_CAT_FUSE +#define EXTERR_CATEGORY EXTERR_CAT_FUSE_VNOPS #include <sys/exterrvar.h> #include <vm/vm.h> diff --git a/sys/fs/nfsclient/nfs_clvnops.c b/sys/fs/nfsclient/nfs_clvnops.c index 7484a5a7e082..1bd77ab27ced 100644 --- a/sys/fs/nfsclient/nfs_clvnops.c +++ b/sys/fs/nfsclient/nfs_clvnops.c @@ -3779,7 +3779,8 @@ nfs_getacl(struct vop_getacl_args *ap) return (EINVAL); error = nfsrpc_getacl(ap->a_vp, ap->a_type, ap->a_cred, ap->a_td, ap->a_aclp); - if (error == 0 && ap->a_aclp->acl_cnt == 0) + if (error == 0 && ap->a_aclp->acl_cnt == 0 && + ap->a_type != ACL_TYPE_DEFAULT) return (EOPNOTSUPP); if (error > NFSERR_STALE) { (void) nfscl_maperr(ap->a_td, error, (uid_t)0, (gid_t)0); diff --git a/sys/fs/nfsserver/nfs_nfsdport.c b/sys/fs/nfsserver/nfs_nfsdport.c index 7d64f211b058..1e215b52e835 100644 --- a/sys/fs/nfsserver/nfs_nfsdport.c +++ b/sys/fs/nfsserver/nfs_nfsdport.c @@ -1977,6 +1977,7 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, struct nfsexstuff nes; struct thread *p = curthread; uint32_t oldrepstat; + u_long savflags; if (ndp->ni_vp == NULL) { /* @@ -1991,6 +1992,15 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, } if (!nd->nd_repstat) { if (ndp->ni_vp == NULL) { + /* + * Most file systems ignore va_flags for + * VOP_CREATE(), however setting va_flags + * for VOP_CREATE() causes problems for ZFS. + * So disable them and let nfsrv_fixattr() + * do them, as required. + */ + savflags = nvap->na_flags; + nvap->na_flags = VNOVAL; nd->nd_repstat = VOP_CREATE(ndp->ni_dvp, &ndp->ni_vp, &ndp->ni_cnd, &nvap->na_vattr); /* For a pNFS server, create the data file on a DS. */ @@ -2003,6 +2013,7 @@ nfsvno_open(struct nfsrv_descript *nd, struct nameidata *ndp, nfsrv_pnfscreate(ndp->ni_vp, &nvap->na_vattr, cred, p); } + nvap->na_flags = savflags; VOP_VPUT_PAIR(ndp->ni_dvp, nd->nd_repstat == 0 ? &ndp->ni_vp : NULL, false); nfsvno_relpathbuf(ndp); diff --git a/sys/fs/nfsserver/nfs_nfsdsubs.c b/sys/fs/nfsserver/nfs_nfsdsubs.c index ea8382e4282a..c8c78d98be72 100644 --- a/sys/fs/nfsserver/nfs_nfsdsubs.c +++ b/sys/fs/nfsserver/nfs_nfsdsubs.c @@ -1697,6 +1697,44 @@ nfsrv_fixattr(struct nfsrv_descript *nd, vnode_t vp, NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_OWNERGROUP); } } + + /* + * For archive, ZFS sets it by default for new files, + * so if specified, it must be set or cleared. + * For hidden and system, no file system sets them + * by default upon creation, so they only need to be + * set and not cleared. + */ + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_ARCHIVE)) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + if ((nvap->na_flags & UF_ARCHIVE) != 0) + nva.na_flags |= UF_ARCHIVE; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_ARCHIVE); + } + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_HIDDEN)) { + if ((nvap->na_flags & UF_HIDDEN) != 0) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + nva.na_flags |= UF_HIDDEN; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_HIDDEN); + } else { + NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_HIDDEN); + } + } + if (NFSISSET_ATTRBIT(attrbitp, NFSATTRBIT_SYSTEM)) { + if ((nvap->na_flags & UF_SYSTEM) != 0) { + if (nva.na_flags == VNOVAL) + nva.na_flags = 0; + nva.na_flags |= UF_SYSTEM; + change++; + NFSSETBIT_ATTRBIT(&nattrbits, NFSATTRBIT_SYSTEM); + } else { + NFSCLRBIT_ATTRBIT(attrbitp, NFSATTRBIT_SYSTEM); + } + } if (change) { error = nfsvno_setattr(vp, &nva, nd->nd_cred, p, exp); if (error) { diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index f7d9289b1848..18ec0d83fad3 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -369,8 +369,6 @@ start_all_aps(void) u_int32_t mpbioswarmvec; int apic_id, cpu; - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); - pmap_remap_lower(true); /* install the AP 1st level boot code */ diff --git a/sys/kern/kern_syscalls.c b/sys/kern/kern_syscalls.c index a93d711e7597..7ddc28ed4e26 100644 --- a/sys/kern/kern_syscalls.c +++ b/sys/kern/kern_syscalls.c @@ -161,8 +161,14 @@ kern_syscall_deregister(struct sysent *sysents, int offset, { struct sysent *se; - if (offset == 0) - return (0); /* XXX? */ + if (offset == 0) { + /* + * Syscall #0 is reserved and is not dynamically registered. + * Treat deregistration as a no-op to simplify module unload + * paths. + */ + return (0); + } se = &sysents[offset]; if ((se->sy_thrcnt & SY_THR_STATIC) != 0) diff --git a/sys/kern/link_elf.c b/sys/kern/link_elf.c index ebd203858b66..45edd186e6ce 100644 --- a/sys/kern/link_elf.c +++ b/sys/kern/link_elf.c @@ -155,7 +155,7 @@ static int link_elf_search_symbol(linker_file_t, caddr_t, c_linker_sym_t *, long *); static void link_elf_unload_file(linker_file_t); -static void link_elf_unload_preload(linker_file_t); +static void link_elf_unload_preload(elf_file_t); static int link_elf_lookup_set(linker_file_t, const char *, void ***, void ***, int *); static int link_elf_each_function_name(linker_file_t, @@ -799,10 +799,10 @@ parse_vnet(elf_file_t ef) /* * Apply the specified protection to the loadable segments of a preloaded linker - * file. + * file. If "reset" is not set, the original segment protections are ORed in. */ static int -preload_protect(elf_file_t ef, vm_prot_t prot) +preload_protect1(elf_file_t ef, vm_prot_t prot, bool reset) { #if defined(__aarch64__) || defined(__amd64__) Elf_Ehdr *hdr; @@ -818,13 +818,16 @@ preload_protect(elf_file_t ef, vm_prot_t prot) if (phdr->p_type != PT_LOAD) continue; - nprot = prot | VM_PROT_READ; - if ((phdr->p_flags & PF_W) != 0) - nprot |= VM_PROT_WRITE; - if ((phdr->p_flags & PF_X) != 0) - nprot |= VM_PROT_EXECUTE; + nprot = VM_PROT_NONE; + if (!reset) { + nprot = VM_PROT_READ; + if ((phdr->p_flags & PF_W) != 0) + nprot |= VM_PROT_WRITE; + if ((phdr->p_flags & PF_X) != 0) + nprot |= VM_PROT_EXECUTE; + } error = pmap_change_prot((vm_offset_t)ef->address + - phdr->p_vaddr, round_page(phdr->p_memsz), nprot); + phdr->p_vaddr, round_page(phdr->p_memsz), prot | nprot); if (error != 0) break; } @@ -834,6 +837,18 @@ preload_protect(elf_file_t ef, vm_prot_t prot) #endif } +static int +preload_protect(elf_file_t ef, vm_prot_t prot) +{ + return (preload_protect1(ef, prot, false)); +} + +static int +preload_protect_reset(elf_file_t ef, vm_prot_t prot) +{ + return (preload_protect1(ef, prot, true)); +} + #ifdef __arm__ /* * Locate the ARM exception/unwind table info for DDB and stack(9) use by @@ -1396,7 +1411,7 @@ link_elf_unload_file(linker_file_t file) elf_cpu_unload_file(file); if (ef->preloaded) { - link_elf_unload_preload(file); + link_elf_unload_preload(ef); return; } @@ -1417,11 +1432,16 @@ link_elf_unload_file(linker_file_t file) } static void -link_elf_unload_preload(linker_file_t file) +link_elf_unload_preload(elf_file_t ef) { + /* + * Reset mapping protections to their original state. This affects the + * direct map alias of the module mapping as well. + */ + preload_protect_reset(ef, VM_PROT_RW); - if (file->pathname != NULL) - preload_delete_name(file->pathname); + if (ef->lf.pathname != NULL) + preload_delete_name(ef->lf.pathname); } static const char * diff --git a/sys/kern/link_elf_obj.c b/sys/kern/link_elf_obj.c index a3a53a39bfd6..4128baa5a909 100644 --- a/sys/kern/link_elf_obj.c +++ b/sys/kern/link_elf_obj.c @@ -1305,6 +1305,20 @@ link_elf_unload_file(linker_file_t file) vnet_data_free(ef->progtab[i].addr, ef->progtab[i].size); #endif + else if (ef->preloaded) { + vm_offset_t start, end; + + start = (vm_offset_t)ef->progtab[i].addr; + end = start + ef->progtab[i].size; + + /* + * Reset mapping protections to their original + * state. This affects the direct map alias of + * the module mapping as well. + */ + link_elf_protect_range(ef, trunc_page(start), + round_page(end), VM_PROT_RW); + } } } if (ef->preloaded) { diff --git a/sys/kern/tty.c b/sys/kern/tty.c index 067471eb949a..9297fc81df5e 100644 --- a/sys/kern/tty.c +++ b/sys/kern/tty.c @@ -1036,7 +1036,7 @@ static bool ttydevsw_defbusy(struct tty *tp __unused) { - return (FALSE); + return (false); } /* diff --git a/sys/modules/asmc/Makefile b/sys/modules/asmc/Makefile index f1b4a981ad24..4ba45a4625d8 100644 --- a/sys/modules/asmc/Makefile +++ b/sys/modules/asmc/Makefile @@ -1,6 +1,6 @@ .PATH: ${SRCTOP}/sys/dev/asmc KMOD= asmc -SRCS= asmc.c opt_acpi.h acpi_if.h bus_if.h device_if.h +SRCS= asmc.c opt_acpi.h opt_asmc.h acpi_if.h bus_if.h device_if.h .include <bsd.kmod.mk> diff --git a/sys/modules/linux/Makefile b/sys/modules/linux/Makefile index eb4e17ec706b..8904e8005416 100644 --- a/sys/modules/linux/Makefile +++ b/sys/modules/linux/Makefile @@ -76,6 +76,7 @@ SRCS+= imgact_linux.c \ .if ${MACHINE_CPUARCH} == "i386" EXPORT_SYMS= +EXPORT_SYMS+= linux_device_register_handler EXPORT_SYMS+= linux_get_osname EXPORT_SYMS+= linux_get_osrelease EXPORT_SYMS+= linux_ioctl_register_handler diff --git a/sys/modules/linux_common/Makefile b/sys/modules/linux_common/Makefile index 291fc6d25f8c..1fa740b8b823 100644 --- a/sys/modules/linux_common/Makefile +++ b/sys/modules/linux_common/Makefile @@ -13,6 +13,7 @@ SRCS+= linux_x86.c linux_vdso_selector_x86.c .endif EXPORT_SYMS= +EXPORT_SYMS+= linux_device_register_handler EXPORT_SYMS+= linux_get_osname EXPORT_SYMS+= linux_get_osrelease diff --git a/sys/modules/linuxkpi/Makefile b/sys/modules/linuxkpi/Makefile index a662f5dffbb6..c465c76a7626 100644 --- a/sys/modules/linuxkpi/Makefile +++ b/sys/modules/linuxkpi/Makefile @@ -28,6 +28,7 @@ SRCS= linux_compat.c \ linux_shmemfs.c \ linux_shrinker.c \ linux_simple_attr.c \ + linux_siphash.c \ linux_skbuff.c \ linux_slab.c \ linux_tasklet.c \ diff --git a/sys/modules/qat/qat_api/Makefile b/sys/modules/qat/qat_api/Makefile index 24fbcb46a987..22802c87758d 100644 --- a/sys/modules/qat/qat_api/Makefile +++ b/sys/modules/qat/qat_api/Makefile @@ -84,7 +84,7 @@ opt_qat.h: @echo "#define QAT_DISABLE_SAFE_DC_MODE 1" >> ${.TARGET} .endif .endif - +EXPORT_SYMS=YES .include <bsd.kmod.mk> CWARNFLAGS+= -Wno-cast-qual diff --git a/sys/modules/qat/qat_common/Makefile b/sys/modules/qat/qat_common/Makefile index af8ce86d6be2..541a5da91d40 100644 --- a/sys/modules/qat/qat_common/Makefile +++ b/sys/modules/qat/qat_common/Makefile @@ -40,5 +40,5 @@ opt_qat.h: @echo "#define QAT_DISABLE_SAFE_DC_MODE 1" >> ${.TARGET} .endif .endif - +EXPORT_SYMS=YES .include <bsd.kmod.mk> diff --git a/sys/modules/sound/driver/dummy/Makefile b/sys/modules/sound/driver/dummy/Makefile index fb4127d35073..41dec7c83b4d 100644 --- a/sys/modules/sound/driver/dummy/Makefile +++ b/sys/modules/sound/driver/dummy/Makefile @@ -1,7 +1,7 @@ .PATH: ${SRCTOP}/sys/dev/sound KMOD= snd_dummy -SRCS= bus_if.h device_if.h +SRCS= bus_if.h device_if.h mpufoi_if.h SRCS+= dummy.c .include <bsd.kmod.mk> diff --git a/sys/modules/sound/sound/Makefile b/sys/modules/sound/sound/Makefile index 169b1a2730ec..4b38e614f689 100644 --- a/sys/modules/sound/sound/Makefile +++ b/sys/modules/sound/sound/Makefile @@ -15,8 +15,9 @@ SRCS+= feeder_eq_gen.h feeder_rate_gen.h snd_fxdiv_gen.h SRCS+= mpu_if.h mpufoi_if.h SRCS+= mpu_if.c mpufoi_if.c SRCS+= ac97.c buffer.c channel.c dsp.c -SRCS+= mixer.c sndstat.c sound.c vchan.c +SRCS+= mixer.c sound.c vchan.c SRCS+= midi.c mpu401.c +SRCS+= sndstat.c feeder_eq_gen.h: ${SYSDIR}/tools/sound/feeder_eq_mkfilter.awk ${AWK} -f ${SYSDIR}/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > ${.TARGET} diff --git a/sys/modules/vmm/Makefile b/sys/modules/vmm/Makefile index 066b4d814348..dcb401d2026d 100644 --- a/sys/modules/vmm/Makefile +++ b/sys/modules/vmm/Makefile @@ -18,7 +18,8 @@ SRCS+= vmm.c \ vmm_dev_machdep.c \ vmm_instruction_emul.c \ vmm_mem.c \ - vmm_stat.c + vmm_stat.c \ + vmm_vm.c .if ${MACHINE_CPUARCH} == "aarch64" CFLAGS+= -I${SRCTOP}/sys/${MACHINE}/vmm/io diff --git a/sys/net/if_bridge.c b/sys/net/if_bridge.c index 9a468a8eb462..5bdd8613245e 100644 --- a/sys/net/if_bridge.c +++ b/sys/net/if_bridge.c @@ -1990,9 +1990,6 @@ bridge_ioctl_sifvlanset(struct bridge_softc *sc, void *arg) struct ifbif_vlan_req *req = arg; struct bridge_iflist *bif; - if ((sc->sc_flags & IFBRF_VLANFILTER) == 0) - return (EXTERROR(EINVAL, "VLAN filtering not enabled")); - bif = bridge_lookup_member(sc, req->bv_ifname); if (bif == NULL) return (EXTERROR(ENOENT, "Interface is not a bridge member")); diff --git a/sys/net/iflib.c b/sys/net/iflib.c index bd0bfe4742df..fcd847ab6f7a 100644 --- a/sys/net/iflib.c +++ b/sys/net/iflib.c @@ -202,6 +202,7 @@ struct iflib_ctx { uint16_t ifc_sysctl_extra_msix_vectors; bool ifc_cpus_are_physical_cores; bool ifc_sysctl_simple_tx; + bool ifc_sysctl_tx_defer_mfree; uint16_t ifc_sysctl_tx_reclaim_thresh; uint16_t ifc_sysctl_tx_reclaim_ticks; @@ -298,6 +299,8 @@ typedef struct iflib_sw_tx_desc_array { bus_dmamap_t *ifsd_map; /* bus_dma maps for packet */ bus_dmamap_t *ifsd_tso_map; /* bus_dma maps for TSO packet */ struct mbuf **ifsd_m; /* pkthdr mbufs */ + struct mbuf **ifsd_m_defer; /* deferred mbuf ptr */ + struct mbuf **ifsd_m_deferb;/* deferred mbuf backing ptr */ } if_txsd_vec_t; /* magic number that should be high enough for any hardware */ @@ -318,6 +321,20 @@ typedef struct iflib_sw_tx_desc_array { #define IFLIB_RESTART_BUDGET 8 + +/* + * Encode TSO or !TSO in the low bits of the tx ifsd_m pointer so as + * to avoid defref'ing the mbuf to determine the correct busdma resources + * to release + */ +#define IFLIB_TSO (1ULL << 0) +#define IFLIB_NO_TSO (2ULL << 0) +#define IFLIB_FLAGS_MASK (0x3ULL) +#define IFLIB_SAVE_MBUF(mbuf, flags) ((void *)(((uintptr_t)mbuf) | flags)) +#define IFLIB_GET_FLAGS(a) ((uintptr_t)a & IFLIB_FLAGS_MASK) +#define IFLIB_GET_MBUF(a) ((struct mbuf *)((uintptr_t)a & ~IFLIB_FLAGS_MASK)) + + #define IFC_LEGACY 0x001 #define IFC_QFLUSH 0x002 #define IFC_MULTISEG 0x004 @@ -343,7 +360,9 @@ struct iflib_txq { qidx_t ift_cidx_processed; qidx_t ift_pidx; uint8_t ift_gen; - uint8_t ift_br_offset; + uint8_t ift_br_offset:1, + ift_defer_mfree:1, + ift_spare_bits0:6; uint16_t ift_npending; uint16_t ift_db_pending; uint16_t ift_rs_pending; @@ -735,7 +754,8 @@ static void iflib_free_intr_mem(if_ctx_t ctx); #ifndef __NO_STRICT_ALIGNMENT static struct mbuf *iflib_fixup_rx(struct mbuf *m); #endif -static __inline int iflib_completed_tx_reclaim(iflib_txq_t txq); +static __inline int iflib_completed_tx_reclaim(iflib_txq_t txq, + struct mbuf **m_defer); static SLIST_HEAD(cpu_offset_list, cpu_offset) cpu_offsets = SLIST_HEAD_INITIALIZER(cpu_offsets); @@ -1786,7 +1806,16 @@ iflib_txsd_alloc(iflib_txq_t txq) err = ENOMEM; goto fail; } - + if (ctx->ifc_sysctl_simple_tx) { + if (!(txq->ift_sds.ifsd_m_defer = + (struct mbuf **) malloc(sizeof(struct mbuf *) * + scctx->isc_ntxd[txq->ift_br_offset], M_IFLIB, M_NOWAIT | M_ZERO))) { + device_printf(dev, "Unable to allocate TX mbuf map memory\n"); + err = ENOMEM; + goto fail; + } + } + txq->ift_sds.ifsd_m_deferb = txq->ift_sds.ifsd_m_defer; /* * Create the DMA maps for TX buffers. */ @@ -1879,6 +1908,10 @@ iflib_txq_destroy(iflib_txq_t txq) free(txq->ift_sds.ifsd_m, M_IFLIB); txq->ift_sds.ifsd_m = NULL; } + if (txq->ift_sds.ifsd_m_defer != NULL) { + free(txq->ift_sds.ifsd_m_defer, M_IFLIB); + txq->ift_sds.ifsd_m_defer = NULL; + } if (txq->ift_buf_tag != NULL) { bus_dma_tag_destroy(txq->ift_buf_tag); txq->ift_buf_tag = NULL; @@ -1895,10 +1928,10 @@ iflib_txq_destroy(iflib_txq_t txq) static void iflib_txsd_free(if_ctx_t ctx, iflib_txq_t txq, int i) { - struct mbuf **mp; + struct mbuf *m; - mp = &txq->ift_sds.ifsd_m[i]; - if (*mp == NULL) + m = IFLIB_GET_MBUF(txq->ift_sds.ifsd_m[i]); + if (m == NULL) return; if (txq->ift_sds.ifsd_map != NULL) { @@ -1912,9 +1945,8 @@ iflib_txsd_free(if_ctx_t ctx, iflib_txq_t txq, int i) bus_dmamap_unload(txq->ift_tso_buf_tag, txq->ift_sds.ifsd_tso_map[i]); } - m_freem(*mp); + m_freem(m); DBG_COUNTER_INC(tx_frees); - *mp = NULL; } static int @@ -3440,7 +3472,7 @@ iflib_remove_mbuf(iflib_txq_t txq) ntxd = txq->ift_size; pidx = txq->ift_pidx & (ntxd - 1); ifsd_m = txq->ift_sds.ifsd_m; - m = ifsd_m[pidx]; + m = IFLIB_GET_MBUF(ifsd_m[pidx]); ifsd_m[pidx] = NULL; bus_dmamap_unload(txq->ift_buf_tag, txq->ift_sds.ifsd_map[pidx]); if (txq->ift_sds.ifsd_tso_map != NULL) @@ -3507,6 +3539,7 @@ iflib_encap(iflib_txq_t txq, struct mbuf **m_headp) struct mbuf *m_head, **ifsd_m; bus_dmamap_t map; struct if_pkt_info pi; + uintptr_t flags; int remap = 0; int err, nsegs, ndesc, max_segs, pidx; @@ -3530,10 +3563,12 @@ iflib_encap(iflib_txq_t txq, struct mbuf **m_headp) map = txq->ift_sds.ifsd_tso_map[pidx]; MPASS(buf_tag != NULL); MPASS(max_segs > 0); + flags = IFLIB_TSO; } else { buf_tag = txq->ift_buf_tag; max_segs = scctx->isc_tx_nsegments; map = txq->ift_sds.ifsd_map[pidx]; + flags = IFLIB_NO_TSO; } if ((sctx->isc_flags & IFLIB_NEED_ETHER_PAD) && __predict_false(m_head->m_pkthdr.len < scctx->isc_min_frame_size)) { @@ -3606,7 +3641,7 @@ defrag: DBG_COUNTER_INC(encap_txd_encap_fail); return (err); } - ifsd_m[pidx] = m_head; + ifsd_m[pidx] = IFLIB_SAVE_MBUF(m_head, flags); if (m_head->m_pkthdr.csum_flags & CSUM_SND_TAG) pi.ipi_mbuf = m_head; else @@ -3617,7 +3652,7 @@ defrag: * cxgb */ if (__predict_false(nsegs > TXQ_AVAIL(txq))) { - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); if (__predict_false(nsegs > TXQ_AVAIL(txq))) { txq->ift_no_desc_avail++; bus_dmamap_unload(buf_tag, map); @@ -3707,19 +3742,22 @@ defrag_failed: } static void -iflib_tx_desc_free(iflib_txq_t txq, int n) +iflib_tx_desc_free(iflib_txq_t txq, int n, struct mbuf **m_defer) { uint32_t qsize, cidx, gen; struct mbuf *m, **ifsd_m; + uintptr_t flags; cidx = txq->ift_cidx; gen = txq->ift_gen; qsize = txq->ift_size; - ifsd_m = txq->ift_sds.ifsd_m; + ifsd_m =txq->ift_sds.ifsd_m; while (n-- > 0) { - if ((m = ifsd_m[cidx]) != NULL) { - if (m->m_pkthdr.csum_flags & CSUM_TSO) { + if ((m = IFLIB_GET_MBUF(ifsd_m[cidx])) != NULL) { + flags = IFLIB_GET_FLAGS(ifsd_m[cidx]); + MPASS(flags != 0); + if (flags & IFLIB_TSO) { bus_dmamap_sync(txq->ift_tso_buf_tag, txq->ift_sds.ifsd_tso_map[cidx], BUS_DMASYNC_POSTWRITE); @@ -3734,7 +3772,12 @@ iflib_tx_desc_free(iflib_txq_t txq, int n) } /* XXX we don't support any drivers that batch packets yet */ MPASS(m->m_nextpkt == NULL); - m_freem(m); + if (m_defer == NULL) { + m_freem(m); + } else if (m != NULL) { + *m_defer = m; + m_defer++; + } ifsd_m[cidx] = NULL; #if MEMORY_LOGGING txq->ift_dequeued++; @@ -3751,28 +3794,20 @@ iflib_tx_desc_free(iflib_txq_t txq, int n) } static __inline int -iflib_completed_tx_reclaim(iflib_txq_t txq) +iflib_txq_can_reclaim(iflib_txq_t txq) { int reclaim, thresh; - uint32_t now; - if_ctx_t ctx = txq->ift_ctx; thresh = txq->ift_reclaim_thresh; KASSERT(thresh >= 0, ("invalid threshold to reclaim")); MPASS(thresh /*+ MAX_TX_DESC(txq->ift_ctx) */ < txq->ift_size); - now = ticks; - if (now <= (txq->ift_last_reclaim + txq->ift_reclaim_ticks) && + if (ticks <= (txq->ift_last_reclaim + txq->ift_reclaim_ticks) && txq->ift_in_use < thresh) - return (0); - txq->ift_last_reclaim = now; - /* - * Need a rate-limiting check so that this isn't called every time - */ - iflib_tx_credits_update(ctx, txq); + return (false); + iflib_tx_credits_update(txq->ift_ctx, txq); reclaim = DESC_RECLAIMABLE(txq); - - if (reclaim <= thresh /* + MAX_TX_DESC(txq->ift_ctx) */) { + if (reclaim <= thresh) { #ifdef INVARIANTS if (iflib_verbose_debug) { printf("%s processed=%ju cleaned=%ju tx_nsegments=%d reclaim=%d thresh=%d\n", __func__, @@ -3782,10 +3817,27 @@ iflib_completed_tx_reclaim(iflib_txq_t txq) #endif return (0); } - iflib_tx_desc_free(txq, reclaim); + return (reclaim); +} + +static __inline void +_iflib_completed_tx_reclaim(iflib_txq_t txq, struct mbuf **m_defer, int reclaim) +{ + txq->ift_last_reclaim = ticks; + iflib_tx_desc_free(txq, reclaim, m_defer); txq->ift_cleaned += reclaim; txq->ift_in_use -= reclaim; +} + +static __inline int +iflib_completed_tx_reclaim(iflib_txq_t txq, struct mbuf **m_defer) +{ + int reclaim; + reclaim = iflib_txq_can_reclaim(txq); + if (reclaim == 0) + return (0); + _iflib_completed_tx_reclaim(txq, m_defer, reclaim); return (reclaim); } @@ -3846,7 +3898,7 @@ iflib_txq_drain(struct ifmp_ring *r, uint32_t cidx, uint32_t pidx) DBG_COUNTER_INC(txq_drain_notready); return (0); } - reclaimed = iflib_completed_tx_reclaim(txq); + reclaimed = iflib_completed_tx_reclaim(txq, NULL); rang = iflib_txd_db_check(txq, reclaimed && txq->ift_db_pending); avail = IDXDIFF(pidx, cidx, r->size); @@ -4005,7 +4057,7 @@ _task_fn_tx(void *context) #endif if (ctx->ifc_sysctl_simple_tx) { mtx_lock(&txq->ift_mtx); - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); mtx_unlock(&txq->ift_mtx); goto skip_ifmp; } @@ -6817,6 +6869,34 @@ iflib_handle_tx_reclaim_ticks(SYSCTL_HANDLER_ARGS) return (err); } +static int +iflib_handle_tx_defer_mfree(SYSCTL_HANDLER_ARGS) +{ + if_ctx_t ctx = (void *)arg1; + iflib_txq_t txq; + int i, err; + int defer; + + defer = ctx->ifc_sysctl_tx_defer_mfree; + err = sysctl_handle_int(oidp, &defer, arg2, req); + if (err != 0) { + return err; + } + + if (defer == ctx->ifc_sysctl_tx_defer_mfree) + return 0; + + ctx->ifc_sysctl_tx_defer_mfree = defer; + if (ctx->ifc_txqs == NULL) + return (err); + + txq = &ctx->ifc_txqs[0]; + for (i = 0; i < NTXQSETS(ctx); i++, txq++) { + txq->ift_defer_mfree = defer; + } + return (err); +} + #define NAME_BUFLEN 32 static void iflib_add_device_sysctl_pre(if_ctx_t ctx) @@ -6915,6 +6995,11 @@ iflib_add_device_sysctl_post(if_ctx_t ctx) 0, iflib_handle_tx_reclaim_ticks, "I", "Number of ticks before a TX reclaim is forced"); + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "tx_defer_mfree", + CTLTYPE_INT | CTLFLAG_RWTUN, ctx, + 0, iflib_handle_tx_defer_mfree, "I", + "Free completed transmits outside of TX ring lock"); + if (scctx->isc_ntxqsets > 100) qfmt = "txq%03d"; else if (scctx->isc_ntxqsets > 10) @@ -7162,7 +7247,7 @@ iflib_debugnet_poll(if_t ifp, int count) return (EBUSY); txq = &ctx->ifc_txqs[0]; - (void)iflib_completed_tx_reclaim(txq); + (void)iflib_completed_tx_reclaim(txq, NULL); NET_EPOCH_ENTER(et); for (i = 0; i < scctx->isc_nrxqsets; i++) @@ -7190,7 +7275,8 @@ iflib_simple_transmit(if_t ifp, struct mbuf *m) { if_ctx_t ctx; iflib_txq_t txq; - int error; + struct mbuf **m_defer; + int error, i, reclaimable; int bytes_sent = 0, pkt_sent = 0, mcast_sent = 0; @@ -7216,8 +7302,34 @@ iflib_simple_transmit(if_t ifp, struct mbuf *m) else if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); } - (void)iflib_completed_tx_reclaim(txq); + m_defer = NULL; + reclaimable = iflib_txq_can_reclaim(txq); + if (reclaimable != 0) { + /* + * Try to set m_defer to the deferred mbuf reclaim array. If + * we can, the frees will happen outside the tx lock. If we + * can't, it means another thread is still proccessing frees. + */ + if (txq->ift_defer_mfree && + atomic_cmpset_acq_ptr((uintptr_t *)&txq->ift_sds.ifsd_m_defer, + (uintptr_t )txq->ift_sds.ifsd_m_deferb, 0)) { + m_defer = txq->ift_sds.ifsd_m_deferb; + } + _iflib_completed_tx_reclaim(txq, m_defer, reclaimable); + } mtx_unlock(&txq->ift_mtx); + + /* + * Process mbuf frees outside the tx lock + */ + if (m_defer != NULL) { + for (i = 0; m_defer[i] != NULL; i++) { + m_freem(m_defer[i]); + m_defer[i] = NULL; + } + atomic_store_rel_ptr((uintptr_t *)&txq->ift_sds.ifsd_m_defer, + (uintptr_t)m_defer); + } if_inc_counter(ifp, IFCOUNTER_OBYTES, bytes_sent); if_inc_counter(ifp, IFCOUNTER_OPACKETS, pkt_sent); if (mcast_sent) diff --git a/sys/net/pfvar.h b/sys/net/pfvar.h index daaa2d3cddf7..6582250879ca 100644 --- a/sys/net/pfvar.h +++ b/sys/net/pfvar.h @@ -2600,7 +2600,7 @@ int pfi_clear_flags(const char *, int); int pf_match_tag(struct mbuf *, struct pf_krule *, int *, int); int pf_tag_packet(struct pf_pdesc *, int); -int pf_addr_cmp(struct pf_addr *, struct pf_addr *, +int pf_addr_cmp(const struct pf_addr *, const struct pf_addr *, sa_family_t); uint8_t* pf_find_tcpopt(u_int8_t *, u_int8_t *, size_t, diff --git a/sys/netgraph/ng_tty.c b/sys/netgraph/ng_tty.c index 0e3230a66f66..200a72336110 100644 --- a/sys/netgraph/ng_tty.c +++ b/sys/netgraph/ng_tty.c @@ -489,7 +489,8 @@ ngt_rint(struct tty *tp, char c, int flags) m->m_pkthdr.len++; /* Ship off mbuf if it's time */ - if (sc->hotchar == -1 || c == sc->hotchar || m->m_len >= MHLEN) { + if (sc->hotchar == -1 || (u_char)c == sc->hotchar || + m->m_len >= MHLEN) { sc->m = NULL; NG_SEND_DATA_ONLY(error, sc->hook, m); /* Will queue */ } diff --git a/sys/netinet/tcp_stacks/rack.c b/sys/netinet/tcp_stacks/rack.c index 76bf8f2e3b17..f55abbf919b7 100644 --- a/sys/netinet/tcp_stacks/rack.c +++ b/sys/netinet/tcp_stacks/rack.c @@ -204,6 +204,7 @@ static int32_t rack_dnd_default = 0; /* For rr_conf = 3, what is the default fo static int32_t rack_rxt_controls = 0; static int32_t rack_fill_cw_state = 0; static uint8_t rack_req_measurements = 1; +static uint32_t rack_rtt_divisor = 2; static int32_t rack_enable_hw_pacing = 0; /* Due to CCSP keep it off by default */ static int32_t rack_hw_rate_caps = 0; /* 1; */ static int32_t rack_hw_rate_cap_per = 0; /* 0 -- off */ @@ -497,7 +498,7 @@ static uint64_t rack_get_gp_est(struct tcp_rack *rack); static void rack_log_sack_passed(struct tcpcb *tp, struct tcp_rack *rack, - struct rack_sendmap *rsm, uint32_t cts); + struct rack_sendmap *rsm, uint32_t cts, int line); static void rack_log_to_event(struct tcp_rack *rack, int32_t to_num, struct rack_sendmap *rsm); static int32_t rack_output(struct tcpcb *tp); @@ -1351,6 +1352,11 @@ rack_init_sysctls(void) "When doing recovery -> rto -> recovery do we reset SSthresh?"); SYSCTL_ADD_U32(&rack_sysctl_ctx, SYSCTL_CHILDREN(rack_timers), + OID_AUTO, "rtt_divisor", CTLFLAG_RW, + &rack_rtt_divisor, 2, + "When calculating the rtt threshold what 1/N is a rtt that indicates reordering"); + SYSCTL_ADD_U32(&rack_sysctl_ctx, + SYSCTL_CHILDREN(rack_timers), OID_AUTO, "scoreboard_thresh", CTLFLAG_RW, &rack_rxt_scoreboard_clear_thresh, 2, "How many RTO's are allowed before we clear the scoreboard"); @@ -2663,6 +2669,8 @@ rack_log_map_chg(struct tcpcb *tp, struct tcp_rack *rack, log.u_bbr.cur_del_rate = (uintptr_t)prev; log.u_bbr.delRate = (uintptr_t)rsm; log.u_bbr.rttProp = (uintptr_t)next; + if (rsm) + log.u_bbr.flex1 = rsm->r_flags; log.u_bbr.flex7 = 0; if (prev) { log.u_bbr.flex1 = prev->r_start; @@ -5584,6 +5592,7 @@ rack_cong_signal(struct tcpcb *tp, uint32_t type, uint32_t ack, int line) rack->r_ctl.rc_prr_delivered = 0; rack->r_ctl.rc_prr_out = 0; rack->r_fast_output = 0; + rack->r_ctl.recovery_rxt_cnt = 0; if (rack->rack_no_prr == 0) { rack->r_ctl.rc_prr_sndcnt = ctf_fixed_maxseg(tp); rack_log_to_prr(rack, 2, in_rec_at_entry, line); @@ -7416,6 +7425,7 @@ rack_remxt_tmr(struct tcpcb *tp) */ TAILQ_INIT(&rack->r_ctl.rc_tmap); + rack->r_ctl.recovery_rxt_cnt = 0; TQHASH_FOREACH(rsm, rack->r_ctl.tqh) { rsm->r_dupack = 0; if (rack_verbose_logging) @@ -8042,6 +8052,7 @@ rack_update_rsm(struct tcpcb *tp, struct tcp_rack *rack, /* We have retransmitted due to the SACK pass */ rsm->r_flags &= ~RACK_SACK_PASSED; rsm->r_flags |= RACK_WAS_SACKPASS; + rack->r_ctl.recovery_rxt_cnt += (rsm->r_end - rsm->r_start); } } @@ -8948,7 +8959,7 @@ ts_not_found: */ static void rack_log_sack_passed(struct tcpcb *tp, - struct tcp_rack *rack, struct rack_sendmap *rsm, uint32_t cts) + struct tcp_rack *rack, struct rack_sendmap *rsm, uint32_t cts, int line) { struct rack_sendmap *nrsm; uint32_t thresh; @@ -8997,6 +9008,7 @@ rack_log_sack_passed(struct tcpcb *tp, */ break; } + rack_log_dsack_event(rack, 12, __LINE__, nrsm->r_start, nrsm->r_end); nrsm->r_flags |= RACK_SACK_PASSED; nrsm->r_flags &= ~RACK_WAS_SACKPASS; } @@ -9172,6 +9184,39 @@ is_rsm_inside_declared_tlp_block(struct tcp_rack *rack, struct rack_sendmap *rsm return (1); } + +static int +rack_check_reorder_ack(struct tcpcb *tp, struct tcp_rack *rack, struct rack_sendmap *rsm, int the_end, uint32_t cts, int can_exit_recovery, int line) +{ + if ((rack_rtt_divisor > 0) && + (rsm->r_rtr_cnt == 2) && + IN_RECOVERY(tp->t_flags) && + (rsm->r_flags & RACK_WAS_SACKPASS)){ + uint32_t fractional, snt_to_ack; + + fractional = (tp->t_srtt / rack_rtt_divisor); + if (fractional == 0) + fractional = 1; + snt_to_ack = cts - (uint32_t)rsm->r_tim_lastsent[(rsm->r_rtr_cnt - 1)]; + if (snt_to_ack <= fractional) { + rack->r_ctl.rc_reorder_ts = cts; + KASSERT((rack->r_ctl.recovery_rxt_cnt >= (the_end - rsm->r_start)), + ("rsm:%p rack:%p recovery_rxt_cnt would go negative recovery_rxt_cnt:%u sub:%u", rsm, rack, rack->r_ctl.recovery_rxt_cnt, (the_end - rsm->r_start))); + rack->r_ctl.recovery_rxt_cnt -= (the_end - rsm->r_start); + rack_log_to_prr(rack, 18, rack->r_ctl.recovery_rxt_cnt, line); + if (can_exit_recovery && (rack->r_ctl.recovery_rxt_cnt == 0)) { + tp->snd_ssthresh = rack->r_ctl.rc_ssthresh_at_erec; + rack_exit_recovery(tp, rack, 4); + rack->r_might_revert = 0; + rack->r_ctl.retran_during_recovery = 0; + rack_log_to_prr(rack, 17, snt_to_ack, line); + } + return (1); + } + } + return (0); +} + static uint32_t rack_proc_sack_blk(struct tcpcb *tp, struct tcp_rack *rack, struct sackblk *sack, struct tcpopt *to, struct rack_sendmap **prsm, uint32_t cts, @@ -9183,6 +9228,7 @@ rack_proc_sack_blk(struct tcpcb *tp, struct tcp_rack *rack, struct sackblk *sack int insret __diagused; int32_t used_ref = 1; int can_use_hookery = 0; + int prohibit_marking = 0; start = sack->start; end = sack->end; @@ -9273,6 +9319,8 @@ do_rest_ofb: (rsm->bindex == next->bindex) && ((rsm->r_flags & RACK_STRADDLE) == 0) && ((next->r_flags & RACK_STRADDLE) == 0) && + ((rsm->r_flags & RACK_WAS_SACKPASS) == 0) && + ((next->r_flags & RACK_WAS_SACKPASS) == 0) && ((rsm->r_flags & RACK_IS_PCM) == 0) && ((next->r_flags & RACK_IS_PCM) == 0) && (rsm->r_flags & RACK_IN_GP_WIN) && @@ -9345,6 +9393,8 @@ do_rest_ofb: rack_log_retran_reason(rack, rsm, __LINE__, 0, 2); /* Now lets make sure our fudge block is right */ nrsm->r_start = start; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* Now lets update all the stats and such */ rack_update_rtt(tp, rack, nrsm, to, cts, SACKED, 0); if (rack->app_limited_needs_set) @@ -9388,8 +9438,8 @@ do_rest_ofb: * Now that we have the next * one walk backwards from there. */ - if (nrsm && nrsm->r_in_tmap) - rack_log_sack_passed(tp, rack, nrsm, cts); + if (nrsm && nrsm->r_in_tmap && (prohibit_marking == 0)) + rack_log_sack_passed(tp, rack, nrsm, cts, __LINE__); } /* Now are we done? */ if (SEQ_LT(end, next->r_end) || @@ -9445,6 +9495,8 @@ do_rest_ofb: } rack_log_map_chg(tp, rack, NULL, rsm, nrsm, MAP_SACK_M2, end, __LINE__); rsm->r_flags &= (~RACK_HAS_FIN); + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* Position us to point to the new nrsm that starts the sack blk */ rsm = nrsm; } @@ -9521,6 +9573,8 @@ do_rest_ofb: } rack_update_rtt(tp, rack, rsm, to, cts, SACKED, 0); changed += (rsm->r_end - rsm->r_start); + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, rsm, rsm->r_end, cts, 0, __LINE__); /* You get a count for acking a whole segment or more */ if (rsm->r_flags & RACK_WAS_LOST) { /* @@ -9530,8 +9584,9 @@ do_rest_ofb: rack_mark_nolonger_lost(rack, rsm); } rack->r_ctl.rc_sacked += (rsm->r_end - rsm->r_start); - if (rsm->r_in_tmap) /* should be true */ - rack_log_sack_passed(tp, rack, rsm, cts); + if (rsm->r_in_tmap && (prohibit_marking == 0)) /* should be true */ + rack_log_sack_passed(tp, rack, rsm, cts, __LINE__); + /* Is Reordering occuring? */ if (rsm->r_flags & RACK_SACK_PASSED) { rsm->r_flags &= ~RACK_SACK_PASSED; @@ -9620,6 +9675,8 @@ do_rest_ofb: (rsm->bindex == prev->bindex) && ((rsm->r_flags & RACK_STRADDLE) == 0) && ((prev->r_flags & RACK_STRADDLE) == 0) && + ((prev->r_flags & RACK_WAS_SACKPASS) == 0) && + ((rsm->r_flags & RACK_WAS_SACKPASS) == 0) && ((rsm->r_flags & RACK_IS_PCM) == 0) && ((prev->r_flags & RACK_IS_PCM) == 0) && (rsm->r_flags & RACK_IN_GP_WIN) && @@ -9658,6 +9715,8 @@ do_rest_ofb: */ nrsm->r_end = end; rsm->r_dupack = 0; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); /* * Which timestamp do we keep? It is rather * important in GP measurements to have the @@ -9807,6 +9866,8 @@ do_rest_ofb: nrsm->r_in_tmap = 1; } nrsm->r_dupack = 0; + /* Check if the ack was too soon i.e. reordering + ack arrives too quickly */ + prohibit_marking = rack_check_reorder_ack(tp, rack, nrsm, nrsm->r_end, cts, 0, __LINE__); rack_log_retran_reason(rack, nrsm, __LINE__, 0, 2); rack_update_rtt(tp, rack, rsm, to, cts, SACKED, 0); changed += (rsm->r_end - rsm->r_start); @@ -9818,8 +9879,8 @@ do_rest_ofb: } rack->r_ctl.rc_sacked += (rsm->r_end - rsm->r_start); - if (rsm->r_in_tmap) /* should be true */ - rack_log_sack_passed(tp, rack, rsm, cts); + if (rsm->r_in_tmap && (prohibit_marking == 0)) /* should be true */ + rack_log_sack_passed(tp, rack, rsm, cts, __LINE__); /* Is Reordering occuring? */ if (rsm->r_flags & RACK_SACK_PASSED) { rsm->r_flags &= ~RACK_SACK_PASSED; @@ -9857,6 +9918,10 @@ out: ((rsm->r_flags & RACK_IN_GP_WIN) == 0)) { break; } + /* We can't merge retransmitted with sack-pass set */ + if ((rsm->r_flags & RACK_WAS_SACKPASS) || + (next->r_flags & RACK_WAS_SACKPASS)) + break; if ((rsm->r_flags & RACK_IN_GP_WIN) && ((next->r_flags & RACK_IN_GP_WIN) == 0)) { break; @@ -9888,6 +9953,10 @@ out: ((rsm->r_flags & RACK_IN_GP_WIN) == 0)) { break; } + /* We can't merge retransmitted with sack-pass set */ + if ((rsm->r_flags & RACK_WAS_SACKPASS) || + (prev->r_flags & RACK_WAS_SACKPASS)) + break; if ((rsm->r_flags & RACK_IN_GP_WIN) && ((prev->r_flags & RACK_IN_GP_WIN) == 0)) { break; @@ -10254,6 +10323,7 @@ more: } rack_update_pcm_ack(rack, 1, rsm->r_start, rsm->r_end); } else { + (void)rack_check_reorder_ack(tp, rack, rsm, rsm->r_end, cts, 1, __LINE__); rack_update_pcm_ack(rack, 1, rsm->r_start, rsm->r_end); } if ((rsm->r_flags & RACK_TO_REXT) && @@ -10354,6 +10424,14 @@ more: } rsm->soff += (th_ack - rsm->r_start); rack_rsm_sender_update(rack, tp, rsm, 5); + + /* + * Handle the special case where we retransmitted part of a segment we + * in this case pass in th_ack which is shorter than r_end. + */ + if (rsm->r_flags & RACK_WAS_SACKPASS) { + rack_check_reorder_ack(tp, rack, rsm, th_ack, cts, 1, __LINE__); + } /* The trim will move th_ack into r_start for us */ tqhash_trim(rack->r_ctl.tqh, th_ack); /* Now do we need to move the mbuf fwd too? */ diff --git a/sys/netinet/tcp_stacks/tcp_rack.h b/sys/netinet/tcp_stacks/tcp_rack.h index cac17d9aeb50..2e2ced089f67 100644 --- a/sys/netinet/tcp_stacks/tcp_rack.h +++ b/sys/netinet/tcp_stacks/tcp_rack.h @@ -539,6 +539,7 @@ struct rack_control { uint32_t last_rcv_tstmp_for_rtt; uint32_t last_time_of_arm_rcv; uint32_t rto_ssthresh; + uint32_t recovery_rxt_cnt; uint32_t rc_saved_beta; uint32_t rc_saved_beta_ecn; /* * For newreno cc: rc_saved_beta and diff --git a/sys/netinet/tcp_syncache.c b/sys/netinet/tcp_syncache.c index 6a3c5a5c9310..8c58be63cd5a 100644 --- a/sys/netinet/tcp_syncache.c +++ b/sys/netinet/tcp_syncache.c @@ -35,7 +35,6 @@ #include "opt_inet.h" #include "opt_inet6.h" #include "opt_ipsec.h" -#include "opt_rss.h" #include <sys/param.h> #include <sys/systm.h> @@ -882,7 +881,6 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) if (sc->sc_flowtype != M_HASHTYPE_NONE) { inp->inp_flowid = sc->sc_flowid; inp->inp_flowtype = sc->sc_flowtype; -#ifdef RSS } else { /* assign flowid by software RSS hash */ #ifdef INET6 @@ -897,6 +895,7 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) } else #endif /* INET6 */ { +#ifdef INET rss_proto_software_hash_v4(inp->inp_faddr, inp->inp_laddr, inp->inp_fport, @@ -904,8 +903,8 @@ syncache_socket(struct syncache *sc, struct socket *lso, struct mbuf *m) IPPROTO_TCP, &inp->inp_flowid, &inp->inp_flowtype); +#endif /* INET */ } -#endif /* RSS */ } #ifdef NUMA inp->inp_numa_domain = sc->sc_numa_domain; diff --git a/sys/netpfil/ipfw/ip_fw2.c b/sys/netpfil/ipfw/ip_fw2.c index c27b6bc274fb..4e13e6e55f1d 100644 --- a/sys/netpfil/ipfw/ip_fw2.c +++ b/sys/netpfil/ipfw/ip_fw2.c @@ -3692,7 +3692,7 @@ vnet_ipfw_init(const void *unused) rule->cmd[0].len = 1; rule->cmd[0].opcode = default_to_accept ? O_ACCEPT : O_DENY; chain->default_rule = rule; - ipfw_add_protected_rule(chain, rule, 0); + ipfw_add_protected_rule(chain, rule); ipfw_eaction_init(chain, first); ipfw_init_skipto_cache(chain); diff --git a/sys/netpfil/ipfw/ip_fw_dynamic.c b/sys/netpfil/ipfw/ip_fw_dynamic.c index cfb686594c7c..d454024ac5cb 100644 --- a/sys/netpfil/ipfw/ip_fw_dynamic.c +++ b/sys/netpfil/ipfw/ip_fw_dynamic.c @@ -734,28 +734,44 @@ dyn_destroy(struct ip_fw_chain *ch, struct named_object *no) static struct opcode_obj_rewrite dyn_opcodes[] = { { - O_KEEP_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_KEEP_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_CHECK_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_CHECK_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_PROBE_STATE, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_PROBE_STATE, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, { - O_LIMIT, IPFW_TLV_STATE_NAME, - dyn_classify, dyn_update, - dyn_findbyname, dyn_findbykidx, - dyn_create, dyn_destroy + .opcode = O_LIMIT, + .etlv = IPFW_TLV_STATE_NAME, + .classifier = dyn_classify, + .update = dyn_update, + .find_byname = dyn_findbyname, + .find_bykidx = dyn_findbykidx, + .create_object = dyn_create, + .destroy_object = dyn_destroy, }, }; @@ -3175,7 +3191,7 @@ dyn_add_protected_rule(struct ip_fw_chain *chain) cmd->opcode = O_COUNT; rule->act_ofs = cmd - rule->cmd; rule->cmd_len = rule->act_ofs + 1; - ipfw_add_protected_rule(chain, rule, 0); + ipfw_add_protected_rule(chain, rule); } void diff --git a/sys/netpfil/ipfw/ip_fw_private.h b/sys/netpfil/ipfw/ip_fw_private.h index c60b7aa47e94..582bdf8b1c2c 100644 --- a/sys/netpfil/ipfw/ip_fw_private.h +++ b/sys/netpfil/ipfw/ip_fw_private.h @@ -646,8 +646,7 @@ void ipfw_destroy_skipto_cache(struct ip_fw_chain *chain); void ipfw_enable_skipto_cache(struct ip_fw_chain *chain); int ipfw_find_rule(struct ip_fw_chain *chain, uint32_t key, uint32_t id); int ipfw_ctl3(struct sockopt *sopt); -int ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule, - int locked); +int ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule); void ipfw_reap_add(struct ip_fw_chain *chain, struct ip_fw **head, struct ip_fw *rule); void ipfw_reap_rules(struct ip_fw *head); @@ -741,8 +740,6 @@ void ipfw_destroy_obj_rewriter(void); void ipfw_add_obj_rewriter(struct opcode_obj_rewrite *rw, size_t count); int ipfw_del_obj_rewriter(struct opcode_obj_rewrite *rw, size_t count); -int create_objects_compat(struct ip_fw_chain *ch, ipfw_insn *cmd, - struct obj_idx *oib, struct obj_idx *pidx, struct tid_info *ti); void update_opcode_kidx(ipfw_insn *cmd, uint32_t idx); int classify_opcode_kidx(ipfw_insn *cmd, uint32_t *puidx); void ipfw_init_srv(struct ip_fw_chain *ch); diff --git a/sys/netpfil/ipfw/ip_fw_sockopt.c b/sys/netpfil/ipfw/ip_fw_sockopt.c index a91fb2e84da9..4e87865e966e 100644 --- a/sys/netpfil/ipfw/ip_fw_sockopt.c +++ b/sys/netpfil/ipfw/ip_fw_sockopt.c @@ -568,12 +568,11 @@ ipfw_commit_rules(struct ip_fw_chain *chain, struct rule_check_info *rci, } int -ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule, - int locked) +ipfw_add_protected_rule(struct ip_fw_chain *chain, struct ip_fw *rule) { struct ip_fw **map; - map = get_map(chain, 1, locked); + map = get_map(chain, 1, 0); if (map == NULL) return (ENOMEM); if (chain->n_rules > 0) @@ -2036,7 +2035,7 @@ ipfw_check_object_name_generic(const char *name) * * Return 0 on success. */ -int +static int create_objects_compat(struct ip_fw_chain *ch, ipfw_insn *cmd, struct obj_idx *oib, struct obj_idx *pidx, struct tid_info *ti) { diff --git a/sys/netpfil/pf/pf.c b/sys/netpfil/pf/pf.c index 8219aacd20de..60ca9039e9ce 100644 --- a/sys/netpfil/pf/pf.c +++ b/sys/netpfil/pf/pf.c @@ -570,7 +570,7 @@ pf_sctp_checksum(struct mbuf *m, int off) } int -pf_addr_cmp(struct pf_addr *a, struct pf_addr *b, sa_family_t af) +pf_addr_cmp(const struct pf_addr *a, const struct pf_addr *b, sa_family_t af) { switch (af) { diff --git a/sys/netpfil/pf/pf_nl.c b/sys/netpfil/pf/pf_nl.c index 6bd858373bd2..1c8a1f95b650 100644 --- a/sys/netpfil/pf/pf_nl.c +++ b/sys/netpfil/pf/pf_nl.c @@ -100,6 +100,7 @@ static bool dump_state_peer(struct nl_writer *nw, int attr, const struct pf_state_peer *peer) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -129,6 +130,7 @@ static bool dump_state_key(struct nl_writer *nw, int attr, const struct pf_state_key *key) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -160,8 +162,6 @@ dump_state(struct nlpcb *nlp, const struct nlmsghdr *hdr, struct pf_kstate *s, struct genlmsghdr *ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETSTATES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_ST_VERSION, PF_STATE_VERSION); @@ -324,8 +324,6 @@ dump_creatorid(struct nlpcb *nlp, const struct nlmsghdr *hdr, uint32_t creator, struct genlmsghdr *ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETCREATORS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_ST_CREATORID, htonl(creator)); @@ -434,6 +432,9 @@ nlattr_add_addr_wrap(struct nl_writer *nw, int attrtype, struct pf_addr_wrap *a) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_in6_addr(nw, PF_AT_ADDR, &a->v.a.addr.v6); nlattr_add_in6_addr(nw, PF_AT_MASK, &a->v.a.mask.v6); nlattr_add_u8(nw, PF_AT_TYPE, a->type); @@ -469,6 +470,9 @@ nlattr_add_rule_addr(struct nl_writer *nw, int attrtype, struct pf_rule_addr *r) struct pf_addr_wrap aw = {0}; int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + bcopy(&(r->addr), &aw, sizeof(struct pf_addr_wrap)); pf_addr_copyout(&aw); @@ -497,6 +501,9 @@ nlattr_add_mape_portset(struct nl_writer *nw, int attrtype, const struct pf_mape { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_u8(nw, PF_MET_OFFSET, m->offset); nlattr_add_u8(nw, PF_MET_PSID_LEN, m->psidlen); nlattr_add_u16(nw, PF_MET_PSID, m->psid); @@ -559,6 +566,9 @@ nlattr_add_labels(struct nl_writer *nw, int attrtype, const struct pf_krule *r) int off = nlattr_add_nested(nw, attrtype); int i = 0; + if (off == 0) + return (false); + while (r->label[i][0] != 0 && i < PF_RULE_MAX_LABEL_COUNT) { nlattr_add_string(nw, PF_LT_LABEL, r->label[i]); @@ -588,6 +598,9 @@ nlattr_add_pool(struct nl_writer *nw, int attrtype, const struct pf_kpool *pool) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add(nw, PF_PT_KEY, sizeof(struct pf_poolhashkey), &pool->key); nlattr_add_in6_addr(nw, PF_PT_COUNTER, (const struct in6_addr *)&pool->counter); nlattr_add_u32(nw, PF_PT_TBLIDX, pool->tblidx); @@ -615,6 +628,9 @@ nlattr_add_rule_uid(struct nl_writer *nw, int attrtype, const struct pf_rule_uid { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_RUT_UID_LOW, u->uid[0]); nlattr_add_u32(nw, PF_RUT_UID_HIGH, u->uid[1]); nlattr_add_u8(nw, PF_RUT_OP, u->op); @@ -675,6 +691,9 @@ nlattr_add_timeout(struct nl_writer *nw, int attrtype, uint32_t *timeout) { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + for (int i = 0; i < PFTM_MAX; i++) nlattr_add_u32(nw, PF_RT_TIMEOUT, timeout[i]); @@ -832,8 +851,6 @@ pf_handle_getrules(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETRULES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; error = pf_ioctl_getrules(&attrs); if (error != 0) @@ -894,8 +911,6 @@ pf_handle_getrule(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GETRULE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; PF_RULES_WLOCK(); ruleset = pf_find_kruleset(attrs.anchor); @@ -1085,8 +1100,6 @@ pf_handle_killclear_states(struct nlmsghdr *hdr, struct nl_pstate *npt, int cmd) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = cmd; - ghdr_new->version = 0; - ghdr_new->reserved = 0; NET_EPOCH_ENTER(et); if (cmd == PFNL_CMD_KILLSTATES) @@ -1154,6 +1167,10 @@ nlattr_add_counters(struct nl_writer *nw, int attr, size_t number, char **names, { for (int i = 0; i < number; i++) { int off = nlattr_add_nested(nw, attr); + + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_C_ID, i); nlattr_add_string(nw, PF_C_NAME, names[i]); nlattr_add_u64(nw, PF_C_COUNTER, counter_u64_fetch(counters[i])); @@ -1169,6 +1186,10 @@ nlattr_add_fcounters(struct nl_writer *nw, int attr, size_t number, char **names { for (int i = 0; i < number; i++) { int off = nlattr_add_nested(nw, attr); + + if (off == 0) + return (false); + nlattr_add_u32(nw, PF_C_ID, i); nlattr_add_string(nw, PF_C_NAME, names[i]); nlattr_add_u64(nw, PF_C_COUNTER, pf_counter_u64_fetch(&counters[i])); @@ -1183,6 +1204,9 @@ nlattr_add_u64_array(struct nl_writer *nw, int attr, size_t number, const uint64 { int off = nlattr_add_nested(nw, attr); + if (off == 0) + return (false); + for (size_t i = 0; i < number; i++) nlattr_add_u64(nw, 0, array[i]); @@ -1210,8 +1234,6 @@ pf_handle_get_status(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_STATUS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; since = time_second - (time_uptime - V_pf_status.since); @@ -1301,8 +1323,6 @@ pf_handle_natlook(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_NATLOOK; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_in6_addr(nw, PF_NL_SRC_ADDR, &attrs.rsaddr.v6); nlattr_add_in6_addr(nw, PF_NL_DST_ADDR, &attrs.rdaddr.v6); @@ -1392,8 +1412,6 @@ pf_handle_get_timeout(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_TIMEOUT; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TO_SECONDS, attrs.seconds); @@ -1452,8 +1470,6 @@ pf_handle_get_limit(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_LIMIT; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_LI_LIMIT, attrs.limit); @@ -1482,8 +1498,6 @@ pf_handle_begin_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_BEGIN_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_BA_TICKET, ticket); @@ -1502,6 +1516,9 @@ nlattr_add_pool_addr(struct nl_writer *nw, int attrtype, struct pf_pooladdr *a) off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_addr_wrap(nw, PF_PA_ADDR, &a->addr); nlattr_add_string(nw, PF_PA_IFNAME, a->ifname); @@ -1576,8 +1593,6 @@ pf_handle_get_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_AA_NR, attrs.nr); @@ -1613,8 +1628,6 @@ pf_handle_get_addr(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_AA_ACTION, attrs.action); nlattr_add_u32(nw, PF_AA_TICKET, attrs.ticket); @@ -1663,8 +1676,6 @@ pf_handle_get_rulesets(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_RULESETS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_RS_NR, attrs.nr); @@ -1697,8 +1708,6 @@ pf_handle_get_ruleset(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_RULESET; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_string(nw, PF_RS_NAME, attrs.name); @@ -1717,6 +1726,9 @@ nlattr_add_pf_threshold(struct nl_writer *nw, int attrtype, int off = nlattr_add_nested(nw, attrtype); int conn_rate_count = 0; + if (off == 0) + return (false); + /* Adjust the connection rate estimate. */ if (t->cr != NULL) conn_rate_count = counter_rate_get(t->cr); @@ -1759,8 +1771,6 @@ pf_handle_get_srcnodes(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_SRCNODES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_in6_addr(nw, PF_SN_ADDR, &n->addr.v6); nlattr_add_in6_addr(nw, PF_SN_RADDR, &n->raddr.v6); @@ -1832,8 +1842,6 @@ pf_handle_clear_tables(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLEAR_TABLES; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_DELETED, ndel); @@ -1869,8 +1877,6 @@ pf_handle_add_table(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_ADD_TABLE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_ADDED, attrs.pfrio_nadd); @@ -1906,8 +1912,6 @@ pf_handle_del_table(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_DEL_TABLE; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_T_NBR_DELETED, attrs.pfrio_ndel); @@ -1925,6 +1929,9 @@ nlattr_add_pfr_table(struct nl_writer *nw, int attrtype, { int off = nlattr_add_nested(nw, attrtype); + if (off == 0) + return (false); + nlattr_add_string(nw, PF_T_ANCHOR, t->pfrt_anchor); nlattr_add_string(nw, PF_T_NAME, t->pfrt_name); nlattr_add_u32(nw, PF_T_TABLE_FLAGS, t->pfrt_flags); @@ -1986,8 +1993,6 @@ pf_handle_get_tstats(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_GET_TSTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_pfr_table(nw, PF_TS_TABLE, &pfrtstats[i].pfrts_t); @@ -2054,8 +2059,6 @@ pf_handle_clear_tstats(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLR_TSTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_TS_NZERO, nzero); @@ -2091,8 +2094,6 @@ pf_handle_clear_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_CLR_ADDRS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u64(nw, PF_T_NBR_DELETED, ndel); @@ -2176,8 +2177,6 @@ pf_handle_table_add_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_ADD_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_ADDED, attrs.nadd); @@ -2209,8 +2208,6 @@ pf_handle_table_del_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_DEL_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_DELETED, attrs.ndel); @@ -2243,8 +2240,6 @@ pf_handle_table_set_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_SET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; nlattr_add_u32(nw, PF_TA_NBR_ADDED, attrs.nadd); nlattr_add_u32(nw, PF_TA_NBR_DELETED, attrs.ndel); @@ -2260,6 +2255,7 @@ static int nlattr_add_pfr_addr(struct nl_writer *nw, int attr, const struct pfr_addr *a) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -2318,8 +2314,6 @@ pf_handle_table_get_addrs(struct nlmsghdr *hdr, struct nl_pstate *npt) } ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_GET_ADDR; - ghdr_new->version = 0; - ghdr_new->reserved = 0; if (i == 0) nlattr_add_u32(nw, PF_TA_ADDR_COUNT, size); @@ -2341,6 +2335,7 @@ static int nlattr_add_pfr_astats(struct nl_writer *nw, int attr, const struct pfr_astats *a) { int off = nlattr_add_nested(nw, attr); + if (off == 0) return (false); @@ -2416,8 +2411,6 @@ pf_handle_table_get_astats(struct nlmsghdr *hdr, struct nl_pstate *npt) } ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); ghdr_new->cmd = PFNL_CMD_TABLE_GET_ASTATS; - ghdr_new->version = 0; - ghdr_new->reserved = 0; if (i == 0) nlattr_add_u32(nw, PF_TAS_ASTATS_COUNT, size); @@ -2434,6 +2427,37 @@ out: free(pfrastats, M_PF); return (error); } +static int +pf_handle_table_clear_astats(struct nlmsghdr *hdr, struct nl_pstate *npt) +{ + struct nl_parsed_table_addrs attrs = { 0 }; + struct nl_writer *nw = npt->nw; + struct genlmsghdr *ghdr_new; + int error; + + error = nl_parse_nlmsg(hdr, &table_addr_parser, npt, &attrs); + if (error != 0) + return (error); + + PF_RULES_WLOCK(); + error = pfr_clr_astats(&attrs.table, &attrs.addrs[0], + attrs.addr_count, &attrs.nchange, + attrs.flags | PFR_FLAG_USERIOCTL); + PF_RULES_WUNLOCK(); + + if (!nlmsg_reply(nw, hdr, sizeof(struct genlmsghdr))) + return (ENOMEM); + + ghdr_new = nlmsg_reserve_object(nw, struct genlmsghdr); + ghdr_new->cmd = PFNL_CMD_TABLE_CLEAR_ASTATS; + + nlattr_add_u32(nw, PF_TAS_ASTATS_ZEROED, attrs.nchange); + + if (!nlmsg_end(nw)) + return (ENOMEM); + + return (error); +} static const struct nlhdr_parser *all_parsers[] = { &state_parser, @@ -2708,6 +2732,13 @@ static const struct genl_cmd pf_cmds[] = { .cmd_flags = GENL_CMD_CAP_DUMP | GENL_CMD_CAP_HASPOL, .cmd_priv = PRIV_NETINET_PF, }, + { + .cmd_num = PFNL_CMD_TABLE_CLEAR_ASTATS, + .cmd_name = "TABLE_CLEAR_ASTATS", + .cmd_cb = pf_handle_table_clear_astats, + .cmd_flags = GENL_CMD_CAP_DUMP | GENL_CMD_CAP_HASPOL, + .cmd_priv = PRIV_NETINET_PF, + }, }; void diff --git a/sys/netpfil/pf/pf_nl.h b/sys/netpfil/pf/pf_nl.h index 5ca14758932a..216f3d13db32 100644 --- a/sys/netpfil/pf/pf_nl.h +++ b/sys/netpfil/pf/pf_nl.h @@ -72,6 +72,7 @@ enum { PFNL_CMD_TABLE_SET_ADDR = 34, PFNL_CMD_TABLE_GET_ADDR = 35, PFNL_CMD_TABLE_GET_ASTATS = 36, + PFNL_CMD_TABLE_CLEAR_ASTATS = 37, __PFNL_CMD_MAX, }; #define PFNL_CMD_MAX (__PFNL_CMD_MAX -1) @@ -504,6 +505,7 @@ enum pf_table_astats_t { PF_TAS_ASTATS = 2, /* nested, pfr_astats_t */ PF_TAS_FLAGS = 3, /* u32 */ PF_TAS_ASTATS_COUNT = 4, /* u32 */ + PF_TAS_ASTATS_ZEROED = 5, /* u32 */ }; #ifdef _KERNEL diff --git a/sys/powerpc/powerpc/swtch32.S b/sys/powerpc/powerpc/swtch32.S index 547e1c5a201b..ef1a397bf74d 100644 --- a/sys/powerpc/powerpc/swtch32.S +++ b/sys/powerpc/powerpc/swtch32.S @@ -141,8 +141,8 @@ cpu_switchin: blocked_loop: lwz %r7,TD_LOCK(%r2) cmpw %r6,%r7 - beq- blocked_loop isync + beq- blocked_loop #endif lwz %r17,TD_PCB(%r2) /* Get new current PCB */ diff --git a/sys/powerpc/powerpc/swtch64.S b/sys/powerpc/powerpc/swtch64.S index 5f80751c8a10..ba37274d32bb 100644 --- a/sys/powerpc/powerpc/swtch64.S +++ b/sys/powerpc/powerpc/swtch64.S @@ -194,8 +194,8 @@ cpu_switchin: blocked_loop: ld %r7,TD_LOCK(%r13) cmpd %r6,%r7 - beq- blocked_loop isync + beq- blocked_loop #endif ld %r17,TD_PCB(%r13) /* Get new PCB */ diff --git a/sys/riscv/include/vmm.h b/sys/riscv/include/vmm.h index 361140834805..c346f09cc28c 100644 --- a/sys/riscv/include/vmm.h +++ b/sys/riscv/include/vmm.h @@ -104,8 +104,18 @@ enum vm_reg_name { #define VM_INTINFO_SWINTR (4 << 8) #ifdef _KERNEL +#include <machine/vmm_instruction_emul.h> + +#define VMM_VCPU_MD_FIELDS \ + struct vm_exit exitinfo; \ + uint64_t nextpc; /* (x) next instruction to execute */ \ + struct fpreg *guestfpu /* (a,i) guest fpu state */ + +#define VMM_VM_MD_FIELDS \ + struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS] struct vm; +struct vm_eventinfo; struct vm_exception; struct vm_exit; struct vm_run; @@ -114,11 +124,13 @@ struct vm_guest_paging; struct vm_aplic_descr; struct pmap; -struct vm_eventinfo { - void *rptr; /* rendezvous cookie */ - int *sptr; /* suspend cookie */ - int *iptr; /* reqidle cookie */ +struct vmm_mmio_region { + uint64_t start; + uint64_t end; + mem_region_read_t read; + mem_region_write_t write; }; +#define VM_MAX_MMIO_REGIONS 4 #define DECLARE_VMMOPS_FUNC(ret_type, opname, args) \ ret_type vmmops_##opname args @@ -143,34 +155,13 @@ DECLARE_VMMOPS_FUNC(struct vmspace *, vmspace_alloc, (vm_offset_t min, vm_offset_t max)); DECLARE_VMMOPS_FUNC(void, vmspace_free, (struct vmspace *vmspace)); -int vm_create(const char *name, struct vm **retvm); -struct vcpu *vm_alloc_vcpu(struct vm *vm, int vcpuid); -void vm_disable_vcpu_creation(struct vm *vm); -void vm_lock_vcpus(struct vm *vm); -void vm_unlock_vcpus(struct vm *vm); -void vm_destroy(struct vm *vm); -int vm_reinit(struct vm *vm); -const char *vm_name(struct vm *vm); - -uint16_t vm_get_maxcpus(struct vm *vm); -void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus); -int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus); int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval); int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val); int vm_run(struct vcpu *vcpu); -int vm_suspend(struct vm *vm, enum vm_suspend_how how); -void* vm_get_cookie(struct vm *vm); -int vcpu_vcpuid(struct vcpu *vcpu); +void *vm_get_cookie(struct vm *vm); void *vcpu_get_cookie(struct vcpu *vcpu); -struct vm *vcpu_vm(struct vcpu *vcpu); -struct vcpu *vm_vcpu(struct vm *vm, int cpu); int vm_get_capability(struct vcpu *vcpu, int type, int *val); int vm_set_capability(struct vcpu *vcpu, int type, int val); -int vm_activate_cpu(struct vcpu *vcpu); -int vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu); -int vm_resume_cpu(struct vm *vm, struct vcpu *vcpu); int vm_inject_exception(struct vcpu *vcpu, uint64_t scause); int vm_attach_aplic(struct vm *vm, struct vm_aplic_descr *descr); int vm_assert_irq(struct vm *vm, uint32_t irq); @@ -180,62 +171,7 @@ int vm_raise_msi(struct vm *vm, uint64_t msg, uint64_t addr, int bus, int slot, struct vm_exit *vm_exitinfo(struct vcpu *vcpu); void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc); void vm_exit_debug(struct vcpu *vcpu, uint64_t pc); -void vm_exit_rendezvous(struct vcpu *vcpu, uint64_t pc); void vm_exit_astpending(struct vcpu *vcpu, uint64_t pc); - -cpuset_t vm_active_cpus(struct vm *vm); -cpuset_t vm_debug_cpus(struct vm *vm); -cpuset_t vm_suspended_cpus(struct vm *vm); - -static __inline int -vcpu_rendezvous_pending(struct vm_eventinfo *info) -{ - - return (*((uintptr_t *)(info->rptr)) != 0); -} - -static __inline int -vcpu_suspended(struct vm_eventinfo *info) -{ - - return (*info->sptr); -} - -int vcpu_debugged(struct vcpu *vcpu); - -enum vcpu_state { - VCPU_IDLE, - VCPU_FROZEN, - VCPU_RUNNING, - VCPU_SLEEPING, -}; - -int vcpu_set_state(struct vcpu *vcpu, enum vcpu_state state, bool from_idle); -enum vcpu_state vcpu_get_state(struct vcpu *vcpu, int *hostcpu); - -static int __inline -vcpu_is_running(struct vcpu *vcpu, int *hostcpu) -{ - return (vcpu_get_state(vcpu, hostcpu) == VCPU_RUNNING); -} - -#ifdef _SYS_PROC_H_ -static int __inline -vcpu_should_yield(struct vcpu *vcpu) -{ - struct thread *td; - - td = curthread; - return (td->td_ast != 0 || td->td_owepreempt != 0); -} -#endif - -void *vcpu_stats(struct vcpu *vcpu); -void vcpu_notify_event(struct vcpu *vcpu); -struct vm_mem *vm_mem(struct vm *vm); - -enum vm_reg_name vm_segment_name(int seg_encoding); - #endif /* _KERNEL */ #define VM_DIR_READ 0 diff --git a/sys/riscv/include/vmm_instruction_emul.h b/sys/riscv/include/vmm_instruction_emul.h index bee63d2f86ba..5041b10569f5 100644 --- a/sys/riscv/include/vmm_instruction_emul.h +++ b/sys/riscv/include/vmm_instruction_emul.h @@ -29,6 +29,12 @@ #ifndef _VMM_INSTRUCTION_EMUL_H_ #define _VMM_INSTRUCTION_EMUL_H_ +struct vcpu; +struct vie; +struct vre; +struct vm; +struct vm_guest_paging; + /* * Callback functions to read and write memory regions. */ diff --git a/sys/riscv/vmm/vmm.c b/sys/riscv/vmm/vmm.c index 23b57ad3b7aa..1546bde87b41 100644 --- a/sys/riscv/vmm/vmm.c +++ b/sys/riscv/vmm/vmm.c @@ -45,7 +45,6 @@ #include <sys/rwlock.h> #include <sys/sched.h> #include <sys/smp.h> -#include <sys/sysctl.h> #include <vm/vm.h> #include <vm/vm_object.h> @@ -71,80 +70,18 @@ #include <dev/vmm/vmm_dev.h> #include <dev/vmm/vmm_ktr.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "vmm_stat.h" #include "riscv.h" #include "vmm_aplic.h" -struct vcpu { - int flags; - enum vcpu_state state; - struct mtx mtx; - int hostcpu; /* host cpuid this vcpu last ran on */ - int vcpuid; - void *stats; - struct vm_exit exitinfo; - uint64_t nextpc; /* (x) next instruction to execute */ - struct vm *vm; /* (o) */ - void *cookie; /* (i) cpu-specific data */ - struct fpreg *guestfpu; /* (a,i) guest fpu state */ -}; - -#define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN) -#define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx)) -#define vcpu_lock(v) mtx_lock_spin(&((v)->mtx)) -#define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx)) -#define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED) - -struct vmm_mmio_region { - uint64_t start; - uint64_t end; - mem_region_read_t read; - mem_region_write_t write; -}; -#define VM_MAX_MMIO_REGIONS 4 - -/* - * Initialization: - * (o) initialized the first time the VM is created - * (i) initialized when VM is created and when it is reinitialized - * (x) initialized before use - */ -struct vm { - void *cookie; /* (i) cpu-specific data */ - volatile cpuset_t active_cpus; /* (i) active vcpus */ - volatile cpuset_t debug_cpus; /* (i) vcpus stopped for debug*/ - int suspend; /* (i) stop VM execution */ - bool dying; /* (o) is dying */ - volatile cpuset_t suspended_cpus; /* (i) suspended vcpus */ - volatile cpuset_t halted_cpus; /* (x) cpus in a hard halt */ - struct vm_mem mem; /* (i) [m+v] guest memory */ - char name[VM_MAX_NAMELEN + 1]; /* (o) virtual machine name */ - struct vcpu **vcpu; /* (i) guest vcpus */ - struct vmm_mmio_region mmio_region[VM_MAX_MMIO_REGIONS]; - /* (o) guest MMIO regions */ - /* The following describe the vm cpu topology */ - uint16_t sockets; /* (o) num of sockets */ - uint16_t cores; /* (o) num of cores/socket */ - uint16_t threads; /* (o) num of threads/core */ - uint16_t maxcpus; /* (o) max pluggable cpus */ - struct sx vcpus_init_lock; /* (o) */ -}; - static MALLOC_DEFINE(M_VMM, "vmm", "vmm"); /* statistics */ static VMM_STAT(VCPU_TOTAL_RUNTIME, "vcpu total runtime"); -SYSCTL_NODE(_hw, OID_AUTO, vmm, CTLFLAG_RW, NULL, NULL); - -static int vmm_ipinum; -SYSCTL_INT(_hw_vmm, OID_AUTO, ipinum, CTLFLAG_RD, &vmm_ipinum, 0, - "IPI vector used for vcpu notifications"); - -static void vcpu_notify_event_locked(struct vcpu *vcpu); - /* global statistics */ VMM_STAT(VMEXIT_COUNT, "total number of vm exits"); VMM_STAT(VMEXIT_IRQ, "number of vmexits for an irq"); @@ -233,14 +170,6 @@ vm_init(struct vm *vm, bool create) } } -void -vm_disable_vcpu_creation(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); - vm->dying = true; - sx_xunlock(&vm->vcpus_init_lock); -} - struct vcpu * vm_alloc_vcpu(struct vm *vm, int vcpuid) { @@ -271,18 +200,6 @@ vm_alloc_vcpu(struct vm *vm, int vcpuid) return (vcpu); } -void -vm_lock_vcpus(struct vm *vm) -{ - sx_xlock(&vm->vcpus_init_lock); -} - -void -vm_unlock_vcpus(struct vm *vm) -{ - sx_unlock(&vm->vcpus_init_lock); -} - int vm_create(const char *name, struct vm **retvm) { @@ -296,6 +213,7 @@ vm_create(const char *name, struct vm **retvm) return (error); } strcpy(vm->name, name); + mtx_init(&vm->rendezvous_mtx, "vm rendezvous lock", 0, MTX_DEF); sx_init(&vm->vcpus_init_lock, "vm vcpus"); vm->sockets = 1; @@ -312,35 +230,6 @@ vm_create(const char *name, struct vm **retvm) return (0); } -void -vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, - uint16_t *threads, uint16_t *maxcpus) -{ - *sockets = vm->sockets; - *cores = vm->cores; - *threads = vm->threads; - *maxcpus = vm->maxcpus; -} - -uint16_t -vm_get_maxcpus(struct vm *vm) -{ - return (vm->maxcpus); -} - -int -vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, - uint16_t threads, uint16_t maxcpus) -{ - /* Ignore maxcpus. */ - if ((sockets * cores * threads) > vm->maxcpus) - return (EINVAL); - vm->sockets = sockets; - vm->cores = cores; - vm->threads = threads; - return(0); -} - static void vm_cleanup(struct vm *vm, bool destroy) { @@ -372,35 +261,15 @@ vm_cleanup(struct vm *vm, bool destroy) void vm_destroy(struct vm *vm) { - vm_cleanup(vm, true); - free(vm, M_VMM); } -int -vm_reinit(struct vm *vm) -{ - int error; - - /* - * A virtual machine can be reset only if all vcpus are suspended. - */ - if (CPU_CMP(&vm->suspended_cpus, &vm->active_cpus) == 0) { - vm_cleanup(vm, false); - vm_init(vm, false); - error = 0; - } else { - error = EBUSY; - } - - return (error); -} - -const char * -vm_name(struct vm *vm) +void +vm_reset(struct vm *vm) { - return (vm->name); + vm_cleanup(vm, false); + vm_init(vm, false); } int @@ -491,33 +360,6 @@ out_user: return (0); } -int -vm_suspend(struct vm *vm, enum vm_suspend_how how) -{ - int i; - - if (how <= VM_SUSPEND_NONE || how >= VM_SUSPEND_LAST) - return (EINVAL); - - if (atomic_cmpset_int(&vm->suspend, 0, how) == 0) { - VM_CTR2(vm, "virtual machine already suspended %d/%d", - vm->suspend, how); - return (EALREADY); - } - - VM_CTR1(vm, "virtual machine successfully suspended %d", how); - - /* - * Notify all active vcpus that they are now suspended. - */ - for (i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - - return (0); -} - void vm_exit_suspended(struct vcpu *vcpu, uint64_t pc) { @@ -545,136 +387,6 @@ vm_exit_debug(struct vcpu *vcpu, uint64_t pc) vmexit->exitcode = VM_EXITCODE_DEBUG; } -int -vm_activate_cpu(struct vcpu *vcpu) -{ - struct vm *vm = vcpu->vm; - - if (CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EBUSY); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->active_cpus); - return (0); - -} - -int -vm_suspend_cpu(struct vm *vm, struct vcpu *vcpu) -{ - if (vcpu == NULL) { - vm->debug_cpus = vm->active_cpus; - for (int i = 0; i < vm->maxcpus; i++) { - if (CPU_ISSET(i, &vm->active_cpus)) - vcpu_notify_event(vm_vcpu(vm, i)); - } - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->active_cpus)) - return (EINVAL); - - CPU_SET_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - vcpu_notify_event(vcpu); - } - return (0); -} - -int -vm_resume_cpu(struct vm *vm, struct vcpu *vcpu) -{ - - if (vcpu == NULL) { - CPU_ZERO(&vm->debug_cpus); - } else { - if (!CPU_ISSET(vcpu->vcpuid, &vm->debug_cpus)) - return (EINVAL); - - CPU_CLR_ATOMIC(vcpu->vcpuid, &vm->debug_cpus); - } - return (0); -} - -int -vcpu_debugged(struct vcpu *vcpu) -{ - - return (CPU_ISSET(vcpu->vcpuid, &vcpu->vm->debug_cpus)); -} - -cpuset_t -vm_active_cpus(struct vm *vm) -{ - - return (vm->active_cpus); -} - -cpuset_t -vm_debug_cpus(struct vm *vm) -{ - - return (vm->debug_cpus); -} - -cpuset_t -vm_suspended_cpus(struct vm *vm) -{ - - return (vm->suspended_cpus); -} - - -void * -vcpu_stats(struct vcpu *vcpu) -{ - - return (vcpu->stats); -} - -/* - * This function is called to ensure that a vcpu "sees" a pending event - * as soon as possible: - * - If the vcpu thread is sleeping then it is woken up. - * - If the vcpu is running on a different host_cpu then an IPI will be directed - * to the host_cpu to cause the vcpu to trap into the hypervisor. - */ -static void -vcpu_notify_event_locked(struct vcpu *vcpu) -{ - int hostcpu; - - hostcpu = vcpu->hostcpu; - if (vcpu->state == VCPU_RUNNING) { - KASSERT(hostcpu != NOCPU, ("vcpu running on invalid hostcpu")); - if (hostcpu != curcpu) { - ipi_cpu(hostcpu, vmm_ipinum); - } else { - /* - * If the 'vcpu' is running on 'curcpu' then it must - * be sending a notification to itself (e.g. SELF_IPI). - * The pending event will be picked up when the vcpu - * transitions back to guest context. - */ - } - } else { - KASSERT(hostcpu == NOCPU, ("vcpu state %d not consistent " - "with hostcpu %d", vcpu->state, hostcpu)); - if (vcpu->state == VCPU_SLEEPING) - wakeup_one(vcpu); - } -} - -void -vcpu_notify_event(struct vcpu *vcpu) -{ - vcpu_lock(vcpu); - vcpu_notify_event_locked(vcpu); - vcpu_unlock(vcpu); -} - -struct vm_mem * -vm_mem(struct vm *vm) -{ - return (&vm->mem); -} - static void restore_guest_fpustate(struct vcpu *vcpu) { @@ -709,72 +421,6 @@ save_guest_fpustate(struct vcpu *vcpu) ("%s: fpcurthread set with guest registers", __func__)); } -static int -vcpu_set_state_locked(struct vcpu *vcpu, enum vcpu_state newstate, - bool from_idle) -{ - int error; - - vcpu_assert_locked(vcpu); - - /* - * State transitions from the vmmdev_ioctl() must always begin from - * the VCPU_IDLE state. This guarantees that there is only a single - * ioctl() operating on a vcpu at any point. - */ - if (from_idle) { - while (vcpu->state != VCPU_IDLE) { - vcpu_notify_event_locked(vcpu); - msleep_spin(&vcpu->state, &vcpu->mtx, "vmstat", hz); - } - } else { - KASSERT(vcpu->state != VCPU_IDLE, ("invalid transition from " - "vcpu idle state")); - } - - if (vcpu->state == VCPU_RUNNING) { - KASSERT(vcpu->hostcpu == curcpu, ("curcpu %d and hostcpu %d " - "mismatch for running vcpu", curcpu, vcpu->hostcpu)); - } else { - KASSERT(vcpu->hostcpu == NOCPU, ("Invalid hostcpu %d for a " - "vcpu that is not running", vcpu->hostcpu)); - } - - /* - * The following state transitions are allowed: - * IDLE -> FROZEN -> IDLE - * FROZEN -> RUNNING -> FROZEN - * FROZEN -> SLEEPING -> FROZEN - */ - switch (vcpu->state) { - case VCPU_IDLE: - case VCPU_RUNNING: - case VCPU_SLEEPING: - error = (newstate != VCPU_FROZEN); - break; - case VCPU_FROZEN: - error = (newstate == VCPU_FROZEN); - break; - default: - error = 1; - break; - } - - if (error) - return (EBUSY); - - vcpu->state = newstate; - if (newstate == VCPU_RUNNING) - vcpu->hostcpu = curcpu; - else - vcpu->hostcpu = NOCPU; - - if (newstate == VCPU_IDLE) - wakeup(&vcpu->state); - - return (0); -} - static void vcpu_require_state(struct vcpu *vcpu, enum vcpu_state newstate) { @@ -813,20 +459,6 @@ vm_set_capability(struct vcpu *vcpu, int type, int val) return (vmmops_setcap(vcpu->cookie, type, val)); } -struct vm * -vcpu_vm(struct vcpu *vcpu) -{ - - return (vcpu->vm); -} - -int -vcpu_vcpuid(struct vcpu *vcpu) -{ - - return (vcpu->vcpuid); -} - void * vcpu_get_cookie(struct vcpu *vcpu) { @@ -834,39 +466,6 @@ vcpu_get_cookie(struct vcpu *vcpu) return (vcpu->cookie); } -struct vcpu * -vm_vcpu(struct vm *vm, int vcpuid) -{ - - return (vm->vcpu[vcpuid]); -} - -int -vcpu_set_state(struct vcpu *vcpu, enum vcpu_state newstate, bool from_idle) -{ - int error; - - vcpu_lock(vcpu); - error = vcpu_set_state_locked(vcpu, newstate, from_idle); - vcpu_unlock(vcpu); - - return (error); -} - -enum vcpu_state -vcpu_get_state(struct vcpu *vcpu, int *hostcpu) -{ - enum vcpu_state state; - - vcpu_lock(vcpu); - state = vcpu->state; - if (hostcpu != NULL) - *hostcpu = vcpu->hostcpu; - vcpu_unlock(vcpu); - - return (state); -} - int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval) { diff --git a/sys/riscv/vmm/vmm_aplic.c b/sys/riscv/vmm/vmm_aplic.c index 74cb4fef4273..7c1cd260d352 100644 --- a/sys/riscv/vmm/vmm_aplic.c +++ b/sys/riscv/vmm/vmm_aplic.c @@ -46,7 +46,9 @@ #include <riscv/vmm/vmm_aplic.h> #include <machine/vmm_instruction_emul.h> -#include <machine/vmm_dev.h> + +#include <dev/vmm/vmm_dev.h> +#include <dev/vmm/vmm_vm.h> MALLOC_DEFINE(M_APLIC, "RISC-V VMM APLIC", "RISC-V AIA APLIC"); diff --git a/sys/riscv/vmm/vmm_fence.c b/sys/riscv/vmm/vmm_fence.c index f8b69aac77a9..ff7eabdb3d50 100644 --- a/sys/riscv/vmm/vmm_fence.c +++ b/sys/riscv/vmm/vmm_fence.c @@ -39,6 +39,10 @@ #include <sys/mutex.h> #include <sys/bus.h> +#include <machine/vmm.h> + +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #include "vmm_fence.h" @@ -145,7 +149,6 @@ vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence) struct vcpu *vcpu; uint16_t maxcpus; int hostcpu; - int state; bool enq; int i; @@ -193,8 +196,7 @@ vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence) mb(); - state = vcpu_get_state(vcpu, &hostcpu); - if (state == VCPU_RUNNING) + if (vcpu_is_running(vcpu, &hostcpu)) CPU_SET(hostcpu, &running_cpus); } diff --git a/sys/riscv/vmm/vmm_riscv.c b/sys/riscv/vmm/vmm_riscv.c index 0e46aca60fdf..cfd3decd8cfa 100644 --- a/sys/riscv/vmm/vmm_riscv.c +++ b/sys/riscv/vmm/vmm_riscv.c @@ -59,7 +59,6 @@ #include <machine/cpu.h> #include <machine/machdep.h> #include <machine/vmm.h> -#include <machine/vmm_dev.h> #include <machine/atomic.h> #include <machine/pmap.h> #include <machine/intr.h> @@ -67,6 +66,7 @@ #include <machine/db_machdep.h> #include <dev/vmm/vmm_mem.h> +#include <dev/vmm/vmm_vm.h> #include "riscv.h" #include "vmm_aplic.h" diff --git a/sys/riscv/vmm/vmm_sbi.c b/sys/riscv/vmm/vmm_sbi.c index 426276444357..c1e6022097e3 100644 --- a/sys/riscv/vmm/vmm_sbi.c +++ b/sys/riscv/vmm/vmm_sbi.c @@ -36,6 +36,8 @@ #include <machine/sbi.h> +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #include "vmm_fence.h" diff --git a/sys/riscv/vmm/vmm_vtimer.c b/sys/riscv/vmm/vmm_vtimer.c index 0dadc962114f..cb2ca878116c 100644 --- a/sys/riscv/vmm/vmm_vtimer.c +++ b/sys/riscv/vmm/vmm_vtimer.c @@ -39,6 +39,8 @@ #include <dev/ofw/ofw_bus_subr.h> #include <dev/ofw/openfirm.h> +#include <dev/vmm/vmm_vm.h> + #include "riscv.h" #define VTIMER_DEFAULT_FREQ 1000000 diff --git a/sys/sys/copyright.h b/sys/sys/copyright.h index 8c89adf7f885..1d660dd60646 100644 --- a/sys/sys/copyright.h +++ b/sys/sys/copyright.h @@ -1,7 +1,7 @@ /*- * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 1992-2025 The FreeBSD Project. All rights reserved. + * Copyright (C) 1992-2026 The FreeBSD Project. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,7 +35,7 @@ /* FreeBSD */ #define COPYRIGHT_FreeBSD \ - "Copyright (c) 1992-2025 The FreeBSD Project.\n" + "Copyright (c) 1992-2026 The FreeBSD Project.\n" /* Foundation */ #define TRADEMARK_Foundation \ diff --git a/sys/sys/exterr_cat.h b/sys/sys/exterr_cat.h index 318e774542ca..24f07539fe35 100644 --- a/sys/sys/exterr_cat.h +++ b/sys/sys/exterr_cat.h @@ -8,6 +8,17 @@ * under sponsorship from the FreeBSD Foundation. */ +/* + * The category identifiers for the extended errors. + * The ids participate in ABI between kernel and libc, so they must + * never be reused or changed. Only new ids can be added. + * + * After adding a new category id, run + * tools/build/make_libc_exterr_cat_filenames.sh + * from the top of the source tree, and commit updated file + * lib/libc/gen/exterr_cat_filenames.h + */ + #ifndef _SYS_EXTERR_CAT_H_ #define _SYS_EXTERR_CAT_H_ @@ -15,7 +26,7 @@ #define EXTERR_CAT_FILEDESC 2 #define EXTERR_KTRACE 3 /* To allow inclusion of this file into kern_ktrace.c */ -#define EXTERR_CAT_FUSE 4 +#define EXTERR_CAT_FUSE_VNOPS 4 #define EXTERR_CAT_INOTIFY 5 #define EXTERR_CAT_GENIO 6 #define EXTERR_CAT_BRIDGE 7 @@ -24,6 +35,8 @@ #define EXTERR_CAT_VFSBIO 10 #define EXTERR_CAT_GEOMVFS 11 #define EXTERR_CAT_GEOM 12 +#define EXTERR_CAT_FUSE_VFS 13 +#define EXTERR_CAT_FUSE_DEVICE 14 #endif diff --git a/sys/vm/vm_kern.c b/sys/vm/vm_kern.c index ac327aa37b72..626632b74add 100644 --- a/sys/vm/vm_kern.c +++ b/sys/vm/vm_kern.c @@ -953,14 +953,6 @@ kmem_bootstrap_free(vm_offset_t start, vm_size_t size) end = trunc_page(start + size); start = round_page(start); -#ifdef __amd64__ - /* - * Preloaded files do not have execute permissions by default on amd64. - * Restore the default permissions to ensure that the direct map alias - * is updated. - */ - pmap_change_prot(start, end - start, VM_PROT_RW); -#endif for (va = start; va < end; va += PAGE_SIZE) { pa = pmap_kextract(va); m = PHYS_TO_VM_PAGE(pa); diff --git a/sys/vm/vm_map.c b/sys/vm/vm_map.c index 6b09552c5fee..68dcadd2b2f1 100644 --- a/sys/vm/vm_map.c +++ b/sys/vm/vm_map.c @@ -1620,6 +1620,7 @@ vm_map_insert1(vm_map_t map, vm_object_t object, vm_ooffset_t offset, vm_inherit_t inheritance; u_long bdry; u_int bidx; + int cflags; VM_MAP_ASSERT_LOCKED(map); KASSERT(object != kernel_object || @@ -1696,20 +1697,36 @@ vm_map_insert1(vm_map_t map, vm_object_t object, vm_ooffset_t offset, } cred = NULL; - if ((cow & (MAP_ACC_NO_CHARGE | MAP_NOFAULT | MAP_CREATE_GUARD)) != 0) - goto charged; - if ((cow & MAP_ACC_CHARGED) || ((prot & VM_PROT_WRITE) && - ((protoeflags & MAP_ENTRY_NEEDS_COPY) || object == NULL))) { - if (!(cow & MAP_ACC_CHARGED) && !swap_reserve(end - start)) - return (KERN_RESOURCE_SHORTAGE); - KASSERT(object == NULL || - (protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || - object->cred == NULL, - ("overcommit: vm_map_insert o %p", object)); - cred = curthread->td_ucred; + if ((cow & (MAP_ACC_NO_CHARGE | MAP_NOFAULT | MAP_CREATE_GUARD)) != 0) { + cflags = OBJCO_NO_CHARGE; + } else { + cflags = 0; + if ((cow & MAP_ACC_CHARGED) != 0 || + ((prot & VM_PROT_WRITE) != 0 && + ((protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || + object == NULL))) { + if ((cow & MAP_ACC_CHARGED) == 0) { + if (!swap_reserve(end - start)) + return (KERN_RESOURCE_SHORTAGE); + + /* + * Only inform vm_object_coalesce() + * that the object was charged if + * there is no need for CoW, so the + * swap amount reserved is applicable + * to the prev_entry->object. + */ + if ((protoeflags & MAP_ENTRY_NEEDS_COPY) == 0) + cflags |= OBJCO_CHARGED; + } + KASSERT(object == NULL || + (protoeflags & MAP_ENTRY_NEEDS_COPY) != 0 || + object->cred == NULL, + ("overcommit: vm_map_insert o %p", object)); + cred = curthread->td_ucred; + } } -charged: /* Expand the kernel pmap, if necessary. */ if (map == kernel_map && end > kernel_vm_end) { int rv; @@ -1741,8 +1758,7 @@ charged: vm_object_coalesce(prev_entry->object.vm_object, prev_entry->offset, (vm_size_t)(prev_entry->end - prev_entry->start), - (vm_size_t)(end - prev_entry->end), cred != NULL && - (protoeflags & MAP_ENTRY_NEEDS_COPY) == 0)) { + (vm_size_t)(end - prev_entry->end), cflags)) { /* * We were able to extend the object. Determine if we * can extend the previous map entry to include the diff --git a/sys/vm/vm_mmap.c b/sys/vm/vm_mmap.c index 501ace32bd11..234586893b59 100644 --- a/sys/vm/vm_mmap.c +++ b/sys/vm/vm_mmap.c @@ -197,12 +197,14 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) check_fp_fn = mrp->mr_check_fp_fn; if ((prot & ~(_PROT_ALL | PROT_MAX(_PROT_ALL))) != 0) { - return (EXTERROR(EINVAL, "unknown PROT bits")); + return (EXTERROR(EINVAL, "unknown PROT bits %#jx", prot)); } max_prot = PROT_MAX_EXTRACT(prot); prot = PROT_EXTRACT(prot); if (max_prot != 0 && (max_prot & prot) != prot) { - return (EXTERROR(ENOTSUP, "prot is not subset of max_prot")); + return (EXTERROR(ENOTSUP, + "prot %#jx is not subset of max_prot %#jx", + prot, max_prot)); } p = td->td_proc; @@ -236,7 +238,7 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if ((len == 0 && p->p_osrel >= P_OSREL_MAP_ANON) || ((flags & MAP_ANON) != 0 && (fd != -1 || pos != 0))) { return (EXTERROR(EINVAL, - "offset not zero/fd not -1 for MAP_ANON", + "offset %#jd not zero/fd %#jd not -1 for MAP_ANON", fd, pos)); } } else { @@ -247,8 +249,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if (flags & MAP_STACK) { if ((fd != -1) || ((prot & (PROT_READ | PROT_WRITE)) != (PROT_READ | PROT_WRITE))) { - return (EXTERROR(EINVAL, "MAP_STACK with prot < rw", - prot)); + return (EXTERROR(EINVAL, + "MAP_STACK with prot %#jx < rw", prot)); } flags |= MAP_ANON; pos = 0; @@ -257,18 +259,21 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) MAP_STACK | MAP_NOSYNC | MAP_ANON | MAP_EXCL | MAP_NOCORE | MAP_PREFAULT_READ | MAP_GUARD | MAP_32BIT | MAP_ALIGNMENT_MASK)) != 0) { - return (EXTERROR(EINVAL, "reserved flag set")); + return (EXTERROR(EINVAL, "reserved flag set (flags %#jx)", + flags)); } if ((flags & (MAP_EXCL | MAP_FIXED)) == MAP_EXCL) { - return (EXTERROR(EINVAL, "EXCL without FIXED")); + return (EXTERROR(EINVAL, "EXCL without FIXED (flags %#jx)", + flags)); } if ((flags & (MAP_SHARED | MAP_PRIVATE)) == (MAP_SHARED | MAP_PRIVATE)) { - return (EXTERROR(EINVAL, "both SHARED and PRIVATE set")); + return (EXTERROR(EINVAL, + "both SHARED and PRIVATE set (flags %#jx)", flags)); } if (prot != PROT_NONE && (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC)) != 0) { - return (EXTERROR(EINVAL, "invalid prot", prot)); + return (EXTERROR(EINVAL, "invalid prot %#jx", prot)); } if ((flags & MAP_GUARD) != 0 && (prot != PROT_NONE || fd != -1 || pos != 0 || (flags & ~(MAP_FIXED | MAP_GUARD | MAP_EXCL | @@ -295,7 +300,7 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) if (align != 0 && align != MAP_ALIGNED_SUPER && (align >> MAP_ALIGNMENT_SHIFT >= sizeof(void *) * NBBY || align >> MAP_ALIGNMENT_SHIFT < PAGE_SHIFT)) { - return (EXTERROR(EINVAL, "bad alignment", align)); + return (EXTERROR(EINVAL, "bad alignment %#jx", align)); } /* @@ -310,8 +315,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) */ addr -= pageoff; if ((addr & PAGE_MASK) != 0) { - return (EXTERROR(EINVAL, "fixed mapping not aligned", - addr)); + return (EXTERROR(EINVAL, + "fixed mapping at %#jx not aligned", addr)); } /* Address range must be all in user VM space. */ @@ -321,7 +326,8 @@ kern_mmap(struct thread *td, const struct mmap_req *mrp) } if (flags & MAP_32BIT && addr + size > MAP_32BIT_MAX_ADDR) { return (EXTERROR(EINVAL, - "fixed 32bit mapping does not fit into 4G")); + "fixed 32bit mapping of [%#jx %#jx] does not fit into 4G", + addr, addr + size)); } } else if (flags & MAP_32BIT) { /* @@ -1495,7 +1501,7 @@ vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, handle, &foff, &object, &writecounted); break; default: - error = EXTERROR(EINVAL, "unsupported backing obj type", + error = EXTERROR(EINVAL, "unsupported backing obj type %jd", handle_type); break; } @@ -1578,7 +1584,7 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, * exec). */ if ((foff & PAGE_MASK) != 0) { - return (EXTERROR(EINVAL, "offset not page-aligned", foff)); + return (EXTERROR(EINVAL, "offset %#jx not page-aligned", foff)); } if ((flags & MAP_FIXED) == 0) { @@ -1587,7 +1593,8 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, } else { if (*addr != trunc_page(*addr)) { return (EXTERROR(EINVAL, - "non-fixed mapping address not aligned", *addr)); + "non-fixed mapping address %#jx not aligned", + *addr)); } fitit = false; } @@ -1599,7 +1606,7 @@ vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, } if (foff != 0) { return (EXTERROR(EINVAL, - "anon mapping with non-zero offset")); + "anon mapping with non-zero offset %#jx", foff)); } docow = 0; } else if (flags & MAP_PREFAULT_READ) @@ -1702,6 +1709,6 @@ vm_mmap_to_errno(int rv) } if ((curthread->td_pflags2 & (TDP2_UEXTERR | TDP2_EXTERR)) == TDP2_UEXTERR) - EXTERROR(error, "mach error", rv); + EXTERROR(error, "mach error %jd", rv); return (error); } diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c index 117900135ac3..f4c54ba91742 100644 --- a/sys/vm/vm_object.c +++ b/sys/vm/vm_object.c @@ -2161,9 +2161,9 @@ vm_object_populate(vm_object_t object, vm_pindex_t start, vm_pindex_t end) */ boolean_t vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, - vm_size_t prev_size, vm_size_t next_size, boolean_t reserved) + vm_size_t prev_size, vm_size_t next_size, int cflags) { - vm_pindex_t next_pindex; + vm_pindex_t next_end, next_pindex; if (prev_object == NULL) return (TRUE); @@ -2197,10 +2197,12 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, return (FALSE); } + next_end = next_pindex + next_size; + /* * Account for the charge. */ - if (prev_object->cred != NULL) { + if (prev_object->cred != NULL && (cflags & OBJCO_NO_CHARGE) == 0) { /* * If prev_object was charged, then this mapping, * although not charged now, may become writable @@ -2211,38 +2213,50 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, * entry, and swap reservation for this entry is * managed in appropriate time. */ - if (!reserved && !swap_reserve_by_cred(ptoa(next_size), - prev_object->cred)) { - VM_OBJECT_WUNLOCK(prev_object); - return (FALSE); + if (next_end > prev_object->size) { + vm_size_t charge = ptoa(next_end - prev_object->size); + + if ((cflags & OBJCO_CHARGED) == 0) { + if (!swap_reserve_by_cred(charge, + prev_object->cred)) { + VM_OBJECT_WUNLOCK(prev_object); + return (FALSE); + } + } else if (prev_object->size > next_pindex) { + /* + * The caller charged, but: + * - the object has already accounted for the + * space, + * - and the object end is between previous + * mapping end and next_end. + */ + swap_release_by_cred(ptoa(prev_object->size - + next_pindex), prev_object->cred); + } + prev_object->charge += charge; + } else if ((cflags & OBJCO_CHARGED) != 0) { + /* + * The caller charged, but the object has + * already accounted for the space. Whole new + * mapping charge should be released, + */ + swap_release_by_cred(ptoa(next_size), + prev_object->cred); } - prev_object->charge += ptoa(next_size); } /* * Remove any pages that may still be in the object from a previous * deallocation. */ - if (next_pindex < prev_object->size) { - vm_object_page_remove(prev_object, next_pindex, next_pindex + - next_size, 0); -#if 0 - if (prev_object->cred != NULL) { - KASSERT(prev_object->charge >= - ptoa(prev_object->size - next_pindex), - ("object %p overcharged 1 %jx %jx", prev_object, - (uintmax_t)next_pindex, (uintmax_t)next_size)); - prev_object->charge -= ptoa(prev_object->size - - next_pindex); - } -#endif - } + if (next_pindex < prev_object->size) + vm_object_page_remove(prev_object, next_pindex, next_end, 0); /* * Extend the object if necessary. */ - if (next_pindex + next_size > prev_object->size) - prev_object->size = next_pindex + next_size; + if (next_end > prev_object->size) + prev_object->size = next_end; #ifdef INVARIANTS /* @@ -2254,7 +2268,7 @@ vm_object_coalesce(vm_object_t prev_object, vm_ooffset_t prev_offset, vm_pindex_t pidx; pidx = swap_pager_seek_data(prev_object, next_pindex); - KASSERT(pidx >= next_pindex + next_size, + KASSERT(pidx >= next_end, ("found obj %p pindex %#jx e %#jx %#jx %#jx", prev_object, pidx, (uintmax_t)prev_offset, (uintmax_t)prev_size, (uintmax_t)next_size)); diff --git a/sys/vm/vm_object.h b/sys/vm/vm_object.h index e58fae5f0090..ca88adc12c24 100644 --- a/sys/vm/vm_object.h +++ b/sys/vm/vm_object.h @@ -197,8 +197,8 @@ struct vm_object { #define OBJ_SPLIT 0x00000400 /* object is being split */ #define OBJ_COLLAPSING 0x00000800 /* Parent of collapse. */ #define OBJ_COLORED 0x00001000 /* pg_color is defined */ -#define OBJ_ONEMAPPING 0x00002000 /* One USE (a single, non-forked) - mapping flag */ +#define OBJ_ONEMAPPING 0x00002000 /* Each page has at most one managed + mapping, all in the same vm_map */ #define OBJ_PAGERPRIV1 0x00004000 /* Pager private */ #define OBJ_PAGERPRIV2 0x00008000 /* Pager private */ #define OBJ_SYSVSHM 0x00010000 /* SysV SHM */ @@ -228,6 +228,12 @@ struct vm_object { #define OBJPR_NOTMAPPED 0x2 /* Don't unmap pages. */ #define OBJPR_VALIDONLY 0x4 /* Ignore invalid pages. */ +/* + * Options for vm_object_coalesce(). + */ +#define OBJCO_CHARGED 0x1 /* The next_size was charged already */ +#define OBJCO_NO_CHARGE 0x2 /* Do not do swap accounting at all */ + TAILQ_HEAD(object_q, vm_object); extern struct object_q vm_object_list; /* list of allocated objects */ @@ -354,7 +360,7 @@ vm_object_t vm_object_allocate_anon(vm_pindex_t, vm_object_t, struct ucred *, vm_size_t); vm_object_t vm_object_allocate_dyn(objtype_t, vm_pindex_t, u_short); boolean_t vm_object_coalesce(vm_object_t, vm_ooffset_t, vm_size_t, vm_size_t, - boolean_t); + int); void vm_object_collapse (vm_object_t); void vm_object_deallocate (vm_object_t); void vm_object_destroy (vm_object_t); diff --git a/sys/vm/vnode_pager.c b/sys/vm/vnode_pager.c index 040b4037df15..3504c90821e5 100644 --- a/sys/vm/vnode_pager.c +++ b/sys/vm/vnode_pager.c @@ -1523,49 +1523,47 @@ void vnode_pager_undirty_pages(vm_page_t *ma, int *rtvals, int written, off_t eof, int lpos) { - int i, pos, pos_devb; + int i, npages, pos; - if (written == 0 && eof >= lpos) - return; - for (i = 0, pos = 0; pos < written; i++, pos += PAGE_SIZE) { - if (pos < trunc_page(written)) { - rtvals[i] = VM_PAGER_OK; - vm_page_undirty(ma[i]); - } else { - /* Partially written page. */ - rtvals[i] = VM_PAGER_AGAIN; - vm_page_clear_dirty(ma[i], 0, written & PAGE_MASK); - } + /* Process pages up to round_page(written) */ + pos = written & PAGE_MASK; + npages = atop(written); + for (i = 0; i < npages; i++) { + rtvals[i] = VM_PAGER_OK; + vm_page_undirty(ma[i]); + } + if (pos != 0) { + /* Partially written page. */ + rtvals[i] = VM_PAGER_AGAIN; + vm_page_clear_dirty(ma[i], 0, pos); } - if (eof >= lpos) /* avoid truncation */ - return; - for (pos = eof, i = OFF_TO_IDX(trunc_page(pos)); pos < lpos; i++) { - if (pos != trunc_page(pos)) { - /* - * The page contains the last valid byte in - * the vnode, mark the rest of the page as - * clean, potentially making the whole page - * clean. - */ - pos_devb = roundup2(pos & PAGE_MASK, DEV_BSIZE); - vm_page_clear_dirty(ma[i], pos_devb, PAGE_SIZE - - pos_devb); - /* - * If the page was cleaned, report the pageout - * on it as successful. msync() no longer - * needs to write out the page, endlessly - * creating write requests and dirty buffers. - */ - if (ma[i]->dirty == 0) - rtvals[i] = VM_PAGER_OK; + /* Process pages from trunc_page(eof) to round_page(lpos) */ + pos = eof & PAGE_MASK; + i = atop(eof); + npages = atop(lpos); + if (i < npages && pos != 0) { + /* + * The page contains the last valid byte in the + * vnode, mark the rest of the page as clean, + * potentially making the whole page clean. + */ + pos = roundup2(pos, DEV_BSIZE); + vm_page_clear_dirty(ma[i], pos, PAGE_SIZE - pos); - pos = round_page(pos); - } else { - /* vm_pageout_flush() clears dirty */ - rtvals[i] = VM_PAGER_BAD; - pos += PAGE_SIZE; - } + /* + * If the page was cleaned, report the pageout on it + * as successful. msync() no longer needs to write + * out the page, endlessly creating write requests + * and dirty buffers. + */ + if (ma[i]->dirty == 0) + rtvals[i] = VM_PAGER_OK; + i++; + } + for (; i < npages; i++) { + /* vm_pageout_flush() clears dirty */ + rtvals[i] = VM_PAGER_BAD; } } diff --git a/sys/x86/cpufreq/hwpstate_amd.c b/sys/x86/cpufreq/hwpstate_amd.c index fc948dc90a15..ce0e0f6dd47a 100644 --- a/sys/x86/cpufreq/hwpstate_amd.c +++ b/sys/x86/cpufreq/hwpstate_amd.c @@ -8,6 +8,7 @@ * Copyright (c) 2009 Michael Reifenberger * Copyright (c) 2009 Norikatsu Shigemura * Copyright (c) 2008-2009 Gen Otsuji + * Copyright (c) 2025 ShengYi Hung * * This code is depending on kern_cpu.c, est.c, powernow.c, p4tcc.c, smist.c * in various parts. The authors of these files are Nate Lawson, @@ -55,6 +56,7 @@ #include <sys/malloc.h> #include <sys/proc.h> #include <sys/pcpu.h> +#include <sys/sbuf.h> #include <sys/smp.h> #include <sys/sched.h> @@ -74,6 +76,15 @@ #define MSR_AMD_10H_11H_STATUS 0xc0010063 #define MSR_AMD_10H_11H_CONFIG 0xc0010064 +#define MSR_AMD_CPPC_CAPS_1 0xc00102b0 +#define MSR_AMD_CPPC_ENABLE 0xc00102b1 +#define MSR_AMD_CPPC_CAPS_2 0xc00102b2 +#define MSR_AMD_CPPC_REQUEST 0xc00102b3 +#define MSR_AMD_CPPC_STATUS 0xc00102b4 + +#define MSR_AMD_PWR_ACC 0xc001007a +#define MSR_AMD_PWR_ACC_MX 0xc001007b + #define AMD_10H_11H_MAX_STATES 16 /* for MSR_AMD_10H_11H_LIMIT C001_0061 */ @@ -92,6 +103,23 @@ #define AMD_1AH_CUR_FID(msr) ((msr) & 0xFFF) +#define AMD_CPPC_CAPS_1_HIGH_PERF_BITS 0xff000000 +#define AMD_CPPC_CAPS_1_NOMINAL_PERF_BITS 0x00ff0000 +#define AMD_CPPC_CAPS_1_LOW_NONLIN_PERF_BITS 0x0000ff00 +#define AMD_CPPC_CAPS_1_LOW_PERF_BITS 0x000000ff + +#define AMD_CPPC_REQUEST_ENERGY_PERF_BITS 0xff000000 +#define AMD_CPPC_REQUEST_DES_PERF_BITS 0x00ff0000 +#define AMD_CPPC_REQUEST_MIN_PERF_BITS 0x0000ff00 +#define AMD_CPPC_REQUEST_MAX_PERF_BITS 0x000000ff + +#define HWP_AMD_CLASSNAME "hwpstate_amd" + +#define BITS_VALUE(bits, num) (((num) & (bits)) >> (ffsll((bits)) - 1)) +#define BITS_WITH_VALUE(bits, val) ((uintmax_t)(val) << (ffsll((bits)) - 1)) +#define SET_BITS_VALUE(var, bits, val) \ + ((var) = ((var) & ~(bits)) | BITS_WITH_VALUE((bits), (val))) + #define HWPSTATE_DEBUG(dev, msg...) \ do { \ if (hwpstate_verbose) \ @@ -106,10 +134,16 @@ struct hwpstate_setting { int pstate_id; /* P-State id */ }; +enum hwpstate_flags { + PSTATE_CPPC = 1, +}; + struct hwpstate_softc { device_t dev; - struct hwpstate_setting hwpstate_settings[AMD_10H_11H_MAX_STATES]; + struct hwpstate_setting hwpstate_settings[AMD_10H_11H_MAX_STATES]; int cfnum; + uint32_t flags; + uint64_t req; }; static void hwpstate_identify(driver_t *driver, device_t parent); @@ -140,6 +174,11 @@ SYSCTL_BOOL(_debug, OID_AUTO, hwpstate_pstate_limit, CTLFLAG_RWTUN, "If enabled (1), limit administrative control of P-states to the value in " "CurPstateLimit"); +static bool hwpstate_pkg_ctrl_enable = true; +SYSCTL_BOOL(_machdep, OID_AUTO, hwpstate_pkg_ctrl, CTLFLAG_RDTUN, + &hwpstate_pkg_ctrl_enable, 0, + "Set 1 (default) to enable package-level control, 0 to disable"); + static device_method_t hwpstate_methods[] = { /* Device interface */ DEVMETHOD(device_identify, hwpstate_identify), @@ -159,8 +198,154 @@ static device_method_t hwpstate_methods[] = { {0, 0} }; +static int +amdhwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS) +{ + device_t dev; + struct pcpu *pc; + struct sbuf *sb; + struct hwpstate_softc *sc; + uint64_t data; + int ret; + + sc = (struct hwpstate_softc *)arg1; + dev = sc->dev; + + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + sb = sbuf_new(NULL, NULL, 1024, SBUF_FIXEDLEN | SBUF_INCLUDENUL); + sbuf_putc(sb, '\n'); + thread_lock(curthread); + sched_bind(curthread, pc->pc_cpuid); + thread_unlock(curthread); + + rdmsr_safe(MSR_AMD_CPPC_ENABLE, &data); + sbuf_printf(sb, "CPU%d: HWP %sabled\n", pc->pc_cpuid, + ((data & 1) ? "En" : "Dis")); + + if (data == 0) { + ret = 0; + goto out; + } + + rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &data); + sbuf_printf(sb, "\tHighest Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_HIGH_PERF_BITS, data)); + sbuf_printf(sb, "\tGuaranteed Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_NOMINAL_PERF_BITS, data)); + sbuf_printf(sb, "\tEfficient Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_NONLIN_PERF_BITS, data)); + sbuf_printf(sb, "\tLowest Performance: %03ju\n", + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_PERF_BITS, data)); + sbuf_putc(sb, '\n'); + + rdmsr_safe(MSR_AMD_CPPC_REQUEST, &data); + +#define pkg_print(name, offset) \ + do { \ + sbuf_printf(sb, "\t%s: %03u\n", name, \ + (unsigned)(data >> offset) & 0xff); \ + } while (0) + + pkg_print("Requested Efficiency Performance Preference", 24); + pkg_print("Requested Desired Performance", 16); + pkg_print("Requested Maximum Performance", 8); + pkg_print("Requested Minimum Performance", 0); +#undef pkg_print + + sbuf_putc(sb, '\n'); + +out: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + ret = sbuf_finish(sb); + if (ret == 0) + ret = SYSCTL_OUT(req, sbuf_data(sb), sbuf_len(sb)); + sbuf_delete(sb); + + return (ret); +} + +static bool +sysctl_epp_select_per_core(const device_t hwp_device, uint32_t val) +{ + struct hwpstate_softc *sc; + bool success = true; + int ret, cpuid; + + cpuid = cpu_get_pcpu(hwp_device)->pc_cpuid; + thread_lock(curthread); + sched_bind(curthread, cpuid); + thread_unlock(curthread); + sc = device_get_softc(hwp_device); + if (BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, sc->req) == val) + goto end; + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_ENERGY_PERF_BITS, val); + ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req); + if (ret != 0) { + success = false; + device_printf(hwp_device, "Failed to set EPP to %u", val); + goto end; + } + +end: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + return (success); +} + +static int +sysctl_epp_select(SYSCTL_HANDLER_ARGS) +{ + device_t dev, hwp_dev; + struct hwpstate_softc *sc; + const uint32_t max_energy_perf = + BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, (uint64_t)-1); + devclass_t dc; + uint32_t val; + int ret = 0; + int cpu; + + dev = oidp->oid_arg1; + sc = device_get_softc(dev); + + if (!(sc->flags & PSTATE_CPPC)) + return (ENODEV); + + val = BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, sc->req) * 100 / + max_energy_perf; + ret = sysctl_handle_int(oidp, &val, 0, req); + if (ret != 0 || req->newptr == NULL) + goto end; + if (val > 100) { + ret = EINVAL; + goto end; + } + val = (val * max_energy_perf) / 100; + + if (hwpstate_pkg_ctrl_enable) { + dc = devclass_find(HWP_AMD_CLASSNAME); + KASSERT(dc != NULL, + (HWP_AMD_CLASSNAME ": devclass cannot be null")); + CPU_FOREACH(cpu) { + hwp_dev = devclass_get_device(dc, cpu); + sysctl_epp_select_per_core(hwp_dev, val); + } + } else + sysctl_epp_select_per_core(dev, val); + +end: + return (ret); +} + static driver_t hwpstate_driver = { - "hwpstate", + HWP_AMD_CLASSNAME, hwpstate_methods, sizeof(struct hwpstate_softc), }; @@ -269,6 +454,8 @@ hwpstate_set(device_t dev, const struct cf_setting *cf) if (cf == NULL) return (EINVAL); sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) + return (EOPNOTSUPP); set = sc->hwpstate_settings; for (i = 0; i < sc->cfnum; i++) if (CPUFREQ_CMP(cf->freq, set[i].freq)) @@ -284,21 +471,38 @@ hwpstate_get(device_t dev, struct cf_setting *cf) { struct hwpstate_softc *sc; struct hwpstate_setting set; + struct pcpu *pc; uint64_t msr; + uint64_t rate; + int ret; sc = device_get_softc(dev); if (cf == NULL) return (EINVAL); - msr = rdmsr(MSR_AMD_10H_11H_STATUS); - if (msr >= sc->cfnum) - return (EINVAL); - set = sc->hwpstate_settings[msr]; - cf->freq = set.freq; - cf->volts = set.volts; - cf->power = set.power; - cf->lat = set.lat; - cf->dev = dev; + if (sc->flags & PSTATE_CPPC) { + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf)); + cf->dev = dev; + if ((ret = cpu_est_clockrate(pc->pc_cpuid, &rate))) + return (ret); + cf->freq = rate / 1000000; + } else { + msr = rdmsr(MSR_AMD_10H_11H_STATUS); + if (msr >= sc->cfnum) + return (EINVAL); + set = sc->hwpstate_settings[msr]; + + cf->freq = set.freq; + cf->volts = set.volts; + cf->power = set.power; + cf->lat = set.lat; + cf->dev = dev; + } + return (0); } @@ -312,6 +516,9 @@ hwpstate_settings(device_t dev, struct cf_setting *sets, int *count) if (sets == NULL || count == NULL) return (EINVAL); sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) + return (EOPNOTSUPP); + if (*count < sc->cfnum) return (E2BIG); for (i = 0; i < sc->cfnum; i++, sets++) { @@ -330,19 +537,24 @@ hwpstate_settings(device_t dev, struct cf_setting *sets, int *count) static int hwpstate_type(device_t dev, int *type) { + struct hwpstate_softc *sc; if (type == NULL) return (EINVAL); + sc = device_get_softc(dev); *type = CPUFREQ_TYPE_ABSOLUTE; + *type |= sc->flags & PSTATE_CPPC ? + CPUFREQ_FLAG_INFO_ONLY | CPUFREQ_FLAG_UNCACHED : + 0; return (0); } static void hwpstate_identify(driver_t *driver, device_t parent) { - - if (device_find_child(parent, "hwpstate", DEVICE_UNIT_ANY) != NULL) + if (device_find_child(parent, HWP_AMD_CLASSNAME, DEVICE_UNIT_ANY) != + NULL) return; if ((cpu_vendor_id != CPU_VENDOR_AMD || CPUID_TO_FAMILY(cpu_id) < 0x10) && @@ -357,15 +569,83 @@ hwpstate_identify(driver_t *driver, device_t parent) return; } - if (resource_disabled("hwpstate", 0)) + if (resource_disabled(HWP_AMD_CLASSNAME, 0)) return; - if (BUS_ADD_CHILD(parent, 10, "hwpstate", device_get_unit(parent)) - == NULL) + if (BUS_ADD_CHILD(parent, 10, HWP_AMD_CLASSNAME, + device_get_unit(parent)) == NULL) device_printf(parent, "hwpstate: add child failed\n"); } static int +amd_set_autonomous_hwp(struct hwpstate_softc *sc) +{ + struct pcpu *pc; + device_t dev; + uint64_t caps; + int ret; + + dev = sc->dev; + pc = cpu_get_pcpu(dev); + if (pc == NULL) + return (ENXIO); + + thread_lock(curthread); + sched_bind(curthread, pc->pc_cpuid); + thread_unlock(curthread); + + ret = wrmsr_safe(MSR_AMD_CPPC_ENABLE, 1); + if (ret != 0) { + device_printf(dev, "Failed to enable cppc for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + ret = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &sc->req); + if (ret != 0) { + device_printf(dev, + "Failed to read CPPC request MSR for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + ret = rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &caps); + if (ret != 0) { + device_printf(dev, + "Failed to read HWP capabilities MSR for cpu%d (%d)\n", + pc->pc_cpuid, ret); + goto out; + } + + /* + * In Intel's reference manual, the default value of EPP is 0x80u which + * is the balanced mode. For consistency, we set the same value in AMD's + * CPPC driver. + */ + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_ENERGY_PERF_BITS, 0x80); + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MIN_PERF_BITS, + BITS_VALUE(AMD_CPPC_CAPS_1_LOW_PERF_BITS, caps)); + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MAX_PERF_BITS, + BITS_VALUE(AMD_CPPC_CAPS_1_HIGH_PERF_BITS, caps)); + /* enable autonomous mode by setting desired performance to 0 */ + SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_DES_PERF_BITS, 0); + + ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req); + if (ret) { + device_printf(dev, + "Failed to setup autonomous HWP for cpu%d\n", + pc->pc_cpuid); + goto out; + } +out: + thread_lock(curthread); + sched_unbind(curthread); + thread_unlock(curthread); + + return (ret); +} + +static int hwpstate_probe(device_t dev) { struct hwpstate_softc *sc; @@ -373,15 +653,25 @@ hwpstate_probe(device_t dev) uint64_t msr; int error, type; - /* - * Only hwpstate0. - * It goes well with acpi_throttle. - */ - if (device_get_unit(dev) != 0) - return (ENXIO); - sc = device_get_softc(dev); + + if (amd_extended_feature_extensions & AMDFEID_CPPC) { + sc->flags |= PSTATE_CPPC; + device_set_desc(dev, + "AMD Collaborative Processor Performance Control (CPPC)"); + } else { + /* + * No CPPC support. Only keep hwpstate0, it goes well with + * acpi_throttle. + */ + if (device_get_unit(dev) != 0) + return (ENXIO); + device_set_desc(dev, "Cool`n'Quiet 2.0"); + } + sc->dev = dev; + if (sc->flags & PSTATE_CPPC) + return (0); /* * Check if acpi_perf has INFO only flag. @@ -433,14 +723,32 @@ hwpstate_probe(device_t dev) if (error) return (error); - device_set_desc(dev, "Cool`n'Quiet 2.0"); return (0); } static int hwpstate_attach(device_t dev) { + struct hwpstate_softc *sc; + int res; + sc = device_get_softc(dev); + if (sc->flags & PSTATE_CPPC) { + if ((res = amd_set_autonomous_hwp(sc))) + return res; + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_STATIC_CHILDREN(_debug), OID_AUTO, + device_get_nameunit(dev), + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE, + sc, 0, amdhwp_dump_sysctl_handler, "A", ""); + + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "epp", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, dev, 0, + sysctl_epp_select, "I", + "Efficiency/Performance Preference " + "(range from 0, most performant, through 100, most efficient)"); + } return (cpufreq_register(dev)); } @@ -584,8 +892,11 @@ out: static int hwpstate_detach(device_t dev) { + struct hwpstate_softc *sc; - hwpstate_goto_pstate(dev, 0); + sc = device_get_softc(dev); + if (!(sc->flags & PSTATE_CPPC)) + hwpstate_goto_pstate(dev, 0); return (cpufreq_unregister(dev)); } diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index e9dde5c3b46a..3e5f598cd82a 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -418,6 +418,7 @@ #define AMDPM_HW_PSTATE 0x00000080 #define AMDPM_TSC_INVARIANT 0x00000100 #define AMDPM_CPB 0x00000200 +#define AMDPM_PWR_REPORT 0x00001000 /* * AMD extended function 8000_0008h ebx info (amd_extended_feature_extensions) diff --git a/sys/x86/include/x86_smp.h b/sys/x86/include/x86_smp.h index f5015e9d8a24..045beb3b0f9a 100644 --- a/sys/x86/include/x86_smp.h +++ b/sys/x86/include/x86_smp.h @@ -35,7 +35,6 @@ extern char *bootSTK; extern void *bootstacks[]; extern unsigned int bootMP_size; extern volatile int aps_ready; -extern struct mtx ap_boot_mtx; extern int cpu_logical; extern int cpu_cores; extern volatile uint32_t smp_tlb_generation; diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c index 6b1715853763..0c32657290a0 100644 --- a/sys/x86/x86/mp_x86.c +++ b/sys/x86/x86/mp_x86.c @@ -124,7 +124,7 @@ volatile cpuset_t resuming_cpus; volatile cpuset_t toresume_cpus; /* used to hold the AP's until we are ready to release them */ -struct mtx ap_boot_mtx; +static int ap_boot_lock; /* Set to 1 once we're ready to let the APs out of the pen. */ volatile int aps_ready = 0; @@ -1086,8 +1086,6 @@ init_secondary_tail(void) PCPU_SET(curthread, PCPU_GET(idlethread)); schedinit_ap(); - mtx_lock_spin(&ap_boot_mtx); - mca_init(); /* Init local apic for irq's */ @@ -1096,6 +1094,15 @@ init_secondary_tail(void) /* Set memory range attributes for this CPU to match the BSP */ mem_range_AP_init(); + /* + * Use naive spinning lock instead of the real spinlock, since + * printfs() below might take a very long time and trigger + * spinlock timeout panics. This is the only use of the + * ap_boot_lock anyway. + */ + while (atomic_cmpset_acq_int(&ap_boot_lock, 0, 1) == 0) + ia32_pause(); + smp_cpus++; CTR1(KTR_SMP, "SMP: AP CPU #%d Launched", cpuid); @@ -1117,6 +1124,8 @@ init_secondary_tail(void) atomic_store_rel_int(&smp_started, 1); } + atomic_store_rel_int(&ap_boot_lock, 0); + #ifdef __amd64__ if (pmap_pcid_enabled) load_cr4(rcr4() | CR4_PCIDE); @@ -1125,8 +1134,6 @@ init_secondary_tail(void) load_fs(_ufssel); #endif - mtx_unlock_spin(&ap_boot_mtx); - /* Wait until all the AP's are up. */ while (atomic_load_acq_int(&smp_started) == 0) ia32_pause(); diff --git a/sys/xen/xen_intr.h b/sys/xen/xen_intr.h index 75c3dc7c6060..4965928cc8b4 100644 --- a/sys/xen/xen_intr.h +++ b/sys/xen/xen_intr.h @@ -182,7 +182,7 @@ void xen_intr_unbind(xen_intr_handle_t *handle); */ int xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...) - __attribute__((format(printf, 2, 3))); + __printflike(2, 3); /** * Signal the remote peer of an interrupt source associated with an diff --git a/sys/xen/xenbus/xenbusvar.h b/sys/xen/xenbus/xenbusvar.h index ee444c132c0c..0f4168f17e6a 100644 --- a/sys/xen/xenbus/xenbusvar.h +++ b/sys/xen/xenbus/xenbusvar.h @@ -151,7 +151,7 @@ int xenbus_grant_ring(device_t dev, unsigned long ring_mfn, grant_ref_t *refp); * printf arguments. */ void xenbus_dev_error(device_t dev, int err, const char *fmt, ...) - __attribute__((format(printf, 3, 4))); + __printflike(3, 4); /** * va_list version of xenbus_dev_error(). @@ -162,7 +162,7 @@ void xenbus_dev_error(device_t dev, int err, const char *fmt, ...) * \param ap Va_list of printf arguments. */ void xenbus_dev_verror(device_t dev, int err, const char *fmt, va_list ap) - __attribute__((format(printf, 3, 0))); + __printflike(3, 0); /** * Equivalent to xenbus_dev_error(), followed by @@ -174,7 +174,7 @@ void xenbus_dev_verror(device_t dev, int err, const char *fmt, va_list ap) * printf arguments. */ void xenbus_dev_fatal(device_t dev, int err, const char *fmt, ...) - __attribute__((format(printf, 3, 4))); + __printflike(3, 4); /** * va_list version of xenbus_dev_fatal(). @@ -185,7 +185,7 @@ void xenbus_dev_fatal(device_t dev, int err, const char *fmt, ...) * \param ap Va_list of printf arguments. */ void xenbus_dev_vfatal(device_t dev, int err, const char *fmt, va_list) - __attribute__((format(printf, 3, 0))); + __printflike(3, 0); /** * Convert a member of the xenbus_state enum into an ASCII string. diff --git a/sys/xen/xenstore/xenstorevar.h b/sys/xen/xenstore/xenstorevar.h index 8b02262396e8..f34ad375bc3a 100644 --- a/sys/xen/xenstore/xenstorevar.h +++ b/sys/xen/xenstore/xenstorevar.h @@ -270,7 +270,7 @@ int xs_scanf(struct xs_transaction t, */ int xs_printf(struct xs_transaction t, const char *dir, const char *node, const char *fmt, ...) - __attribute__((format(printf, 4, 5))); + __printflike(4, 5); /** * va_list version of xenbus_printf(). |