diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll b/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll index 9edf55cbc69f..0c4a77964d15 100644 --- a/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll +++ b/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll @@ -16,8 +16,8 @@ ; GCN: buffer_load_dword [[U:v[0-9]+]] ; GCN: buffer_load_dword [[V:v[0-9]+]] -; GCN-FLUSH: v_mac_f32_e32 [[Z]], [[V]], [[U]] -; GCN-FLUSH-NEXT: v_mac_f32_e32 [[Z]], [[Y]], [[X]] +; GCN-FLUSH: v_mac_f32_e32 [[Z]], [[U]], [[V]] +; GCN-FLUSH-NEXT: v_mac_f32_e32 [[Z]], [[X]], [[Y]] ; GCN-FLUSH-NEXT: buffer_store_dword [[Z]] ; GCN-FASTFMA: v_fma_f32 [[FMA0:v[0-9]+]], [[U]], [[V]], [[Z]] @@ -49,7 +49,7 @@ define amdgpu_kernel void @fast_add_fmuladd_fmul() #0 { ; GCN: buffer_load_dword [[V:v[0-9]+]] ; GCN-FLUSH: v_mad_f32 [[TMP:v[0-9]]], [[U]], [[V]], -[[Z]] -; GCN-FLUSH-NEXT: v_mac_f32_e32 [[TMP]], [[Y]], [[X]] +; GCN-FLUSH-NEXT: v_mac_f32_e32 [[TMP]], [[X]], [[Y]] ; GCN-FLUSH-NEXT: buffer_store_dword [[Z]] ; GCN-FASTFMA: v_fma_f32 [[FMA0:v[0-9]+]], [[U]], [[V]], -[[Z]] @@ -75,13 +75,13 @@ define amdgpu_kernel void @fast_sub_fmuladd_fmul() #0 { ; GCN: buffer_load_dword [[U:v[0-9]+]] ; GCN: buffer_load_dword [[V:v[0-9]+]] -; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] -; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[Y]], [[X]] -; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[U]] +; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] +; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[X]], [[Y]] +; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[U]], [[Z]] -; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] +; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] ; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[MUL]] -; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[FMA1]] +; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[FMA1]], [[Z]] ; GCN-SLOWFMA: v_mul_f32_e32 ; GCN-SLOWFMA: v_mul_f32_e32 @@ -108,13 +108,13 @@ define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_mul() #0 { ; GCN: buffer_load_dword [[U:v[0-9]+]] ; GCN: buffer_load_dword [[V:v[0-9]+]] -; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] -; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[Y]], [[X]] -; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[U]], [[Z]] +; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] +; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[X]], [[Y]] +; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[U]] -; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] +; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] ; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[MUL]] -; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[FMA1]], [[Z]] +; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[FMA1]] ; GCN-SLOWFMA: v_mul_f32_e32 ; GCN-SLOWFMA: v_mul_f32_e32 @@ -191,17 +191,17 @@ define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_fmuladd_commute() #0 ; GCN: buffer_load_dword [[U:v[0-9]+]] ; GCN: buffer_load_dword [[V:v[0-9]+]] -; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] +; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] -; GCN-FLUSH: v_mad_f32 [[MAD:v[0-9]+]], [[Y]], [[X]], [[MUL]] -; GCN-FLUSH: v_subrev_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[MAD]] +; GCN-FLUSH: v_mad_f32 [[MAD:v[0-9]+]], [[X]], [[Y]], [[MUL]] +; GCN-FLUSH: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MAD]], [[Z]] ; GCN-FASTFMA: v_fma_f32 [[MAD:v[0-9]+]], [[X]], [[Y]], [[MUL]] -; GCN-FASTFMA: v_subrev_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[MAD]] +; GCN-FASTFMA: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MAD]], [[Z]] -; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[Y]], [[X]] +; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]] ; GCN-SLOWFMA: v_add_f32_e32 -; GCN-SLOWFMA: v_subrev_f32_e32 [[MAD:v[0-9]+]] +; GCN-SLOWFMA: v_sub_f32_e32 [[MAD:v[0-9]+]] ; GCN: buffer_store_dword [[MUL]] ; GCN: buffer_store_dword [[MAD]] @@ -226,21 +226,21 @@ define amdgpu_kernel void @fast_sub_fmuladd_fmul_multi_use_mul() #0 { ; GCN: buffer_load_dword [[U:v[0-9]+]] ; GCN: buffer_load_dword [[V:v[0-9]+]] -; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[V]], [[U]] +; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]] -; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[Y]], [[X]] -; GCN-FLUSH-NEXT: v_subrev_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[MUL]] +; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[X]], [[Y]] +; GCN-FLUSH-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MUL]], [[Z]] ; GCN-FLUSH-NEXT: buffer_store_dword [[MUL]] ; GCN-FLUSH-NEXT: buffer_store_dword [[SUB]] ; GCN-FASTFMA-NEXT: v_fma_f32 [[FMA:v[0-9]+]], [[X]], [[Y]], [[U]] -; GCN-FASTFMA-NEXT: v_subrev_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[FMA]] +; GCN-FASTFMA-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[FMA]], [[Z]] ; GCN-FASTFMA-NEXT: buffer_store_dword [[FMA]] ; GCN-FASTFMA-NEXT: buffer_store_dword [[SUB]] -; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[Y]], [[X]] +; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]] ; GCN-SLOWFMA: v_add_f32_e32 -; GCN-SLOWFMA: v_subrev_f32_e32 +; GCN-SLOWFMA: v_sub_f32_e32 define amdgpu_kernel void @fast_sub_fmuladd_fmul_multi_use_fmuladd() #0 { %x = load volatile float, float addrspace(1)* undef %y = load volatile float, float addrspace(1)* undef |