diff options
Diffstat (limited to 'test/CodeGen/ARM/ldm-stm-i256.ll')
| -rw-r--r-- | test/CodeGen/ARM/ldm-stm-i256.ll | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/test/CodeGen/ARM/ldm-stm-i256.ll b/test/CodeGen/ARM/ldm-stm-i256.ll deleted file mode 100644 index 7b4151dabf6d..000000000000 --- a/test/CodeGen/ARM/ldm-stm-i256.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llc -mtriple=armv7--eabi -verify-machineinstrs < %s | FileCheck %s - -; Check the way we schedule/merge a bunch of loads and stores. -; Originally test/CodeGen/ARM/2011-07-07-ScheduleDAGCrash.ll ; now -; being used as a test of optimizations related to ldm/stm. - -; FIXME: We could merge more loads/stores with regalloc hints. -; FIXME: Fix scheduling so we don't have 16 live registers. - -define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) nounwind uwtable noinline ssp { -entry: - %c = load i256, i256* %cc - %d = load i256, i256* %dd - %add = add nsw i256 %c, %d - store i256 %add, i256* %a, align 8 - %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376 - %add6 = add nsw i256 %or, %d - store i256 %add6, i256* %b, align 8 - ret void - ; CHECK-DAG: ldm r3 - ; CHECK-DAG: ldm r2 - ; CHECK-DAG: ldr {{.*}}, [r3, #20] - ; CHECK-DAG: ldr {{.*}}, [r3, #16] - ; CHECK-DAG: ldr {{.*}}, [r3, #28] - ; CHECK-DAG: ldr {{.*}}, [r3, #24] - ; CHECK-DAG: ldr {{.*}}, [r2, #20] - ; CHECK-DAG: ldr {{.*}}, [r2, #16] - ; CHECK-DAG: ldr {{.*}}, [r2, #28] - ; CHECK-DAG: ldr {{.*}}, [r2, #24] - ; CHECK-DAG: stmib r0 - ; CHECK-DAG: str {{.*}}, [r0] - ; CHECK-DAG: str {{.*}}, [r0, #24] - ; CHECK-DAG: str {{.*}}, [r0, #28] - ; CHECK-DAG: str {{.*}}, [r1] - ; CHECK-DAG: stmib r1 - ; CHECK-DAG: str {{.*}}, [r1, #24] - ; CHECK-DAG: str {{.*}}, [r1, #28] -} |
