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-rw-r--r--test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll32
-rw-r--r--test/CodeGen/MSP430/2009-05-17-Rot.ll17
-rw-r--r--test/CodeGen/MSP430/2009-05-17-Shift.ll15
-rw-r--r--test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll11
-rw-r--r--test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll30
-rw-r--r--test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll22
-rw-r--r--test/CodeGen/MSP430/2009-10-10-OrImpDef.ll14
-rw-r--r--test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll22
-rw-r--r--test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll64
-rw-r--r--test/CodeGen/MSP430/2009-11-20-NewNode.ll36
-rw-r--r--test/CodeGen/MSP430/2009-12-21-FrameAddr.ll13
-rw-r--r--test/CodeGen/MSP430/2009-12-22-InlineAsm.ll29
-rw-r--r--test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll27
-rw-r--r--test/CodeGen/MSP430/AddrMode-bis-rx.ll74
-rw-r--r--test/CodeGen/MSP430/AddrMode-bis-xr.ll81
-rw-r--r--test/CodeGen/MSP430/AddrMode-mov-rx.ll67
-rw-r--r--test/CodeGen/MSP430/AddrMode-mov-xr.ll67
-rw-r--r--test/CodeGen/MSP430/BranchSelector.ll588
-rw-r--r--test/CodeGen/MSP430/DbgValueOtherTargets.test1
-rw-r--r--test/CodeGen/MSP430/Inst16mi.ll48
-rw-r--r--test/CodeGen/MSP430/Inst16mm.ll69
-rw-r--r--test/CodeGen/MSP430/Inst16mr.ll58
-rw-r--r--test/CodeGen/MSP430/Inst16ri.ll37
-rw-r--r--test/CodeGen/MSP430/Inst16rm.ll46
-rw-r--r--test/CodeGen/MSP430/Inst16rr.ll45
-rw-r--r--test/CodeGen/MSP430/Inst8mi.ll48
-rw-r--r--test/CodeGen/MSP430/Inst8mm.ll55
-rw-r--r--test/CodeGen/MSP430/Inst8mr.ll58
-rw-r--r--test/CodeGen/MSP430/Inst8ri.ll37
-rw-r--r--test/CodeGen/MSP430/Inst8rm.ll46
-rw-r--r--test/CodeGen/MSP430/Inst8rr.ll46
-rw-r--r--test/CodeGen/MSP430/asm-clobbers.ll13
-rw-r--r--test/CodeGen/MSP430/bit.ll166
-rw-r--r--test/CodeGen/MSP430/byval.ll26
-rw-r--r--test/CodeGen/MSP430/cc_args.ll139
-rw-r--r--test/CodeGen/MSP430/cc_ret.ll61
-rw-r--r--test/CodeGen/MSP430/flt_rounds.ll10
-rw-r--r--test/CodeGen/MSP430/fp.ll29
-rw-r--r--test/CodeGen/MSP430/indirectbr.ll41
-rw-r--r--test/CodeGen/MSP430/indirectbr2.ll29
-rw-r--r--test/CodeGen/MSP430/inline-asm.ll26
-rw-r--r--test/CodeGen/MSP430/jumptable.ll54
-rw-r--r--test/CodeGen/MSP430/lit.local.cfg3
-rw-r--r--test/CodeGen/MSP430/memset.ll22
-rw-r--r--test/CodeGen/MSP430/misched-msp430.ll20
-rw-r--r--test/CodeGen/MSP430/mult-alt-generic-msp430.ll323
-rw-r--r--test/CodeGen/MSP430/postinc.ll114
-rw-r--r--test/CodeGen/MSP430/setcc.ll114
-rw-r--r--test/CodeGen/MSP430/shifts.ll51
-rw-r--r--test/CodeGen/MSP430/spill-to-stack.ll40
-rw-r--r--test/CodeGen/MSP430/struct-return.ll23
-rw-r--r--test/CodeGen/MSP430/transient-stack-alignment.ll17
-rw-r--r--test/CodeGen/MSP430/umulo-16.ll32
-rw-r--r--test/CodeGen/MSP430/vararg.ll50
54 files changed, 0 insertions, 3206 deletions
diff --git a/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll b/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
deleted file mode 100644
index 38e9832f526d..000000000000
--- a/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; RUN: llc < %s
-; PR4136
-
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-unknown-linux-gnu"
-@uip_len = external global i16 ; <i16*> [#uses=2]
-
-define void @uip_arp_arpin() nounwind {
-entry:
- %tmp = load volatile i16, i16* @uip_len ; <i16> [#uses=1]
- %cmp = icmp ult i16 %tmp, 42 ; <i1> [#uses=1]
- store volatile i16 0, i16* @uip_len
- br i1 %cmp, label %if.then, label %if.end
-
-if.then: ; preds = %entry
- ret void
-
-if.end: ; preds = %entry
- switch i16 0, label %return [
- i16 256, label %sw.bb
- i16 512, label %sw.bb18
- ]
-
-sw.bb: ; preds = %if.end
- ret void
-
-sw.bb18: ; preds = %if.end
- ret void
-
-return: ; preds = %if.end
- ret void
-}
diff --git a/test/CodeGen/MSP430/2009-05-17-Rot.ll b/test/CodeGen/MSP430/2009-05-17-Rot.ll
deleted file mode 100644
index 30b373990a75..000000000000
--- a/test/CodeGen/MSP430/2009-05-17-Rot.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llc < %s -march=msp430
-
-define i16 @rol1u16(i16 %x.arg) nounwind {
- %retval = alloca i16
- %x = alloca i16
- store i16 %x.arg, i16* %x
- %1 = load i16, i16* %x
- %2 = shl i16 %1, 1
- %3 = load i16, i16* %x
- %4 = lshr i16 %3, 15
- %5 = or i16 %2, %4
- store i16 %5, i16* %retval
- br label %return
-return:
- %6 = load i16, i16* %retval
- ret i16 %6
-}
diff --git a/test/CodeGen/MSP430/2009-05-17-Shift.ll b/test/CodeGen/MSP430/2009-05-17-Shift.ll
deleted file mode 100644
index 2e3dd5593ff0..000000000000
--- a/test/CodeGen/MSP430/2009-05-17-Shift.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc < %s -march=msp430 | grep rra | count 1
-
-define i16 @lsr2u16(i16 %x.arg) nounwind {
- %retval = alloca i16
- %x = alloca i16
- store i16 %x.arg, i16* %x
- %1 = load i16, i16* %x
- %2 = lshr i16 %1, 2
- store i16 %2, i16* %retval
- br label %return
-return:
- %3 = load i16, i16* %retval
- ret i16 %3
-
-}
diff --git a/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll b/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
deleted file mode 100644
index 54eb7ff5c0bf..000000000000
--- a/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
+++ /dev/null
@@ -1,11 +0,0 @@
-; RUN: llc < %s -march=msp430
-
-define i16 @test(double %d) nounwind {
-entry:
- %add = fadd double %d, 1.000000e+00
- %call = tail call i16 @funct(double %add) nounwind
- ret i16 %call
-}
-
-declare i16 @funct(double)
-
diff --git a/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll b/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
deleted file mode 100644
index ca54ff0c3b48..000000000000
--- a/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; RUN: llc < %s
-; PR4769
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define i16 @foo() nounwind readnone {
-entry:
- %result = alloca i16, align 1 ; <i16*> [#uses=2]
- store volatile i16 0, i16* %result
- %tmp = load volatile i16, i16* %result ; <i16> [#uses=1]
- ret i16 %tmp
-}
-
-define i16 @main() nounwind {
-entry:
- br label %while.cond
-
-while.cond: ; preds = %while.cond, %entry
- %call = call i16 @bar() nounwind ; <i16> [#uses=1]
- %tobool = icmp eq i16 %call, 0 ; <i1> [#uses=1]
- br i1 %tobool, label %while.end, label %while.cond
-
-while.end: ; preds = %while.cond
- %result.i = alloca i16, align 1 ; <i16*> [#uses=2]
- store volatile i16 0, i16* %result.i
- %tmp.i = load volatile i16, i16* %result.i ; <i16> [#uses=0]
- ret i16 0
-}
-
-declare i16 @bar()
diff --git a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
deleted file mode 100644
index 72ba335b54e1..000000000000
--- a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
+++ /dev/null
@@ -1,22 +0,0 @@
-; RUN: llc < %s | grep 0x0021 | count 2
-; PR4776
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-unknown-unknown"
-
-@"\010x0021" = external global i8, align 1 ; <i8*> [#uses=2]
-
-define zeroext i8 @foo(i8 zeroext %x) nounwind {
-entry:
- %retval = alloca i8 ; <i8*> [#uses=2]
- %x.addr = alloca i8 ; <i8*> [#uses=2]
- %tmp = alloca i8, align 1 ; <i8*> [#uses=2]
- store i8 %x, i8* %x.addr
- %tmp1 = load volatile i8, i8* @"\010x0021" ; <i8> [#uses=1]
- store i8 %tmp1, i8* %tmp
- %tmp2 = load i8, i8* %x.addr ; <i8> [#uses=1]
- store volatile i8 %tmp2, i8* @"\010x0021"
- %tmp3 = load i8, i8* %tmp ; <i8> [#uses=1]
- store i8 %tmp3, i8* %retval
- %0 = load i8, i8* %retval ; <i8> [#uses=1]
- ret i8 %0
-}
diff --git a/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll b/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
deleted file mode 100644
index 6dfbbfc03e90..000000000000
--- a/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
+++ /dev/null
@@ -1,14 +0,0 @@
-; RUN: llc -march=msp430 < %s
-; PR4779
-define void @foo() nounwind {
-entry:
- %r = alloca i8 ; <i8*> [#uses=2]
- %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- load volatile i8, i8* %r, align 1 ; <i8>:0 [#uses=1]
- or i8 %0, 1 ; <i8>:1 [#uses=1]
- store volatile i8 %1, i8* %r, align 1
- br label %return
-
-return: ; preds = %entry
- ret void
-}
diff --git a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
deleted file mode 100644
index dce9d25ca87a..000000000000
--- a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
+++ /dev/null
@@ -1,22 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-elf"
-
-@g_29 = common global i8 0, align 1 ; <i8*> [#uses=0]
-
-define signext i8 @foo(i8 signext %_si1, i8 signext %_si2) nounwind readnone {
-entry:
-; CHECK-LABEL: foo:
-; CHECK: call #__mulqi3
- %mul = mul i8 %_si2, %_si1 ; <i8> [#uses=1]
- ret i8 %mul
-}
-
-define void @uint81(i16* nocapture %p_32) nounwind {
-entry:
- %call = tail call i16 @bar(i8* bitcast (i8 (i8, i8)* @foo to i8*)) nounwind ; <i16> [#uses=0]
- ret void
-}
-
-declare i16 @bar(i8*)
diff --git a/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll b/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
deleted file mode 100644
index 04b087e95363..000000000000
--- a/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
+++ /dev/null
@@ -1,64 +0,0 @@
-; RUN: llc < %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-elf"
-
-%struct.httpd_fs_file = type { i8*, i16 }
-%struct.psock = type { %struct.pt, %struct.pt, i8*, i8*, i8*, i16, i16, %struct.httpd_fs_file, i16, i8, i8 }
-%struct.pt = type { i16 }
-
-@foo = external global i8*
-
-define signext i8 @psock_readto(%struct.psock* nocapture %psock, i8 zeroext %c) nounwind {
-entry:
- switch i16 undef, label %sw.epilog [
- i16 0, label %sw.bb
- i16 283, label %if.else.i
- ]
-
-sw.bb: ; preds = %entry
- br label %do.body
-
-do.body: ; preds = %while.cond36.i, %while.end.i, %sw.bb
- br label %while.cond.i
-
-if.else.i: ; preds = %entry
- br i1 undef, label %psock_newdata.exit, label %if.else11.i
-
-if.else11.i: ; preds = %if.else.i
- ret i8 0
-
-psock_newdata.exit: ; preds = %if.else.i
- ret i8 0
-
-while.cond.i: ; preds = %while.body.i, %do.body
- br i1 undef, label %while.end.i, label %while.body.i
-
-while.body.i: ; preds = %while.cond.i
- br i1 undef, label %do.end41, label %while.cond.i
-
-while.end.i: ; preds = %while.cond.i
- br i1 undef, label %do.body, label %while.cond36.i.preheader
-
-while.cond36.i.preheader: ; preds = %while.end.i
- br label %while.cond36.i
-
-while.cond36.i: ; preds = %while.body41.i, %while.cond36.i.preheader
- br i1 undef, label %do.body, label %while.body41.i
-
-while.body41.i: ; preds = %while.cond36.i
- %tmp43.i = load i8*, i8** @foo ; <i8*> [#uses=2]
- %tmp44.i = load i8, i8* %tmp43.i ; <i8> [#uses=1]
- %ptrincdec50.i = getelementptr inbounds i8, i8* %tmp43.i, i16 1 ; <i8*> [#uses=1]
- store i8* %ptrincdec50.i, i8** @foo
- %cmp55.i = icmp eq i8 %tmp44.i, %c ; <i1> [#uses=1]
- br i1 %cmp55.i, label %do.end41, label %while.cond36.i
-
-do.end41: ; preds = %while.body41.i, %while.body.i
- br i1 undef, label %if.then46, label %sw.epilog
-
-if.then46: ; preds = %do.end41
- ret i8 0
-
-sw.epilog: ; preds = %do.end41, %entry
- ret i8 2
-}
diff --git a/test/CodeGen/MSP430/2009-11-20-NewNode.ll b/test/CodeGen/MSP430/2009-11-20-NewNode.ll
deleted file mode 100644
index 887c7d6fa24e..000000000000
--- a/test/CodeGen/MSP430/2009-11-20-NewNode.ll
+++ /dev/null
@@ -1,36 +0,0 @@
-; RUN: llc -march=msp430 < %s
-; PR5558
-
-define i64 @_strtoll_r(i16 %base) nounwind {
-entry:
- br i1 undef, label %if.then, label %if.end27
-
-if.then: ; preds = %do.end
- br label %if.end27
-
-if.end27: ; preds = %if.then, %do.end
- %cond66 = select i1 undef, i64 -9223372036854775808, i64 9223372036854775807 ; <i64> [#uses=3]
- %conv69 = sext i16 %base to i64 ; <i64> [#uses=1]
- %div = udiv i64 %cond66, %conv69 ; <i64> [#uses=1]
- br label %for.cond
-
-for.cond: ; preds = %if.end116, %if.end27
- br i1 undef, label %if.then152, label %if.then93
-
-if.then93: ; preds = %for.cond
- br i1 undef, label %if.end116, label %if.then152
-
-if.end116: ; preds = %if.then93
- %cmp123 = icmp ugt i64 undef, %div ; <i1> [#uses=1]
- %or.cond = or i1 undef, %cmp123 ; <i1> [#uses=0]
- br label %for.cond
-
-if.then152: ; preds = %if.then93, %for.cond
- br i1 undef, label %if.end182, label %if.then172
-
-if.then172: ; preds = %if.then152
- ret i64 %cond66
-
-if.end182: ; preds = %if.then152
- ret i64 %cond66
-}
diff --git a/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll b/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll
deleted file mode 100644
index c3d69c7c0db5..000000000000
--- a/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llc < %s
-; PR5703
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-unknown-linux-gnu"
-
-define msp430_intrcc void @foo() nounwind {
-entry:
- %fa = call i8* @llvm.frameaddress(i32 0)
- store i8 0, i8* %fa
- ret void
-}
-
-declare i8* @llvm.frameaddress(i32)
diff --git a/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll b/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll
deleted file mode 100644
index fa9d0c8e46cb..000000000000
--- a/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: llc < %s
-; PR 5570
-; ModuleID = 'test.c'
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
-target triple = "msp430-unknown-unknown"
-
-@buf = common global [10 x i8] zeroinitializer, align 1 ; <[10 x i8]*> [#uses=2]
-
-define i16 @main() noreturn nounwind {
-entry:
- %0 = tail call i8* asm "", "=r,0"(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @buf, i16 0, i16 0)) nounwind ; <i8*> [#uses=1]
- %sub.ptr = getelementptr inbounds i8, i8* %0, i16 1 ; <i8*> [#uses=1]
- %sub.ptr.lhs.cast = ptrtoint i8* %sub.ptr to i16 ; <i16> [#uses=1]
- %sub.ptr.sub = sub i16 %sub.ptr.lhs.cast, ptrtoint ([10 x i8]* @buf to i16) ; <i16> [#uses=1]
- %cmp = icmp eq i16 %sub.ptr.sub, 1 ; <i1> [#uses=1]
- br i1 %cmp, label %bar.exit, label %if.then.i
-
-if.then.i: ; preds = %entry
- tail call void @abort() nounwind
- br label %bar.exit
-
-bar.exit: ; preds = %entry, %if.then.i
- tail call void @exit(i16 0) nounwind
- unreachable
-}
-
-declare void @exit(i16) noreturn
-
-declare void @abort()
diff --git a/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll b/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
deleted file mode 100644
index 907d6abe9921..000000000000
--- a/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
+++ /dev/null
@@ -1,27 +0,0 @@
-; RUN: llc < %s
-; PR7001
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430-elf"
-
-define i16 @main() nounwind {
-entry:
- br label %while.cond
-
-while.cond: ; preds = %while.body, %entry
- br i1 undef, label %land.rhs, label %land.end
-
-land.rhs: ; preds = %while.cond
- br label %land.end
-
-land.end: ; preds = %land.rhs, %while.cond
- %0 = phi i1 [ false, %while.cond ], [ undef, %land.rhs ] ; <i1> [#uses=1]
- br i1 %0, label %while.body, label %while.end
-
-while.body: ; preds = %land.end
- %tmp4 = load i16, i16* undef ; <i16> [#uses=0]
- br label %while.cond
-
-while.end: ; preds = %land.end
- ret i16 undef
-}
diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
deleted file mode 100644
index f4cb30f2d014..000000000000
--- a/test/CodeGen/MSP430/AddrMode-bis-rx.ll
+++ /dev/null
@@ -1,74 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
-target triple = "msp430-generic-generic"
-
-define i16 @am1(i16 %x, i16* %a) nounwind {
- %1 = load i16, i16* %a
- %2 = or i16 %1,%x
- ret i16 %2
-}
-; CHECK-LABEL: am1:
-; CHECK: bis.w 0(r13), r12
-
-@foo = external global i16
-
-define i16 @am2(i16 %x) nounwind {
- %1 = load i16, i16* @foo
- %2 = or i16 %1,%x
- ret i16 %2
-}
-; CHECK-LABEL: am2:
-; CHECK: bis.w &foo, r12
-
-@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
-
-define i8 @am3(i8 %x, i16 %n) nounwind {
- %1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %n
- %2 = load i8, i8* %1
- %3 = or i8 %2,%x
- ret i8 %3
-}
-; CHECK-LABEL: am3:
-; CHECK: bis.b bar(r13), r12
-
-define i16 @am4(i16 %x) nounwind {
- %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
- %2 = or i16 %1,%x
- ret i16 %2
-}
-; CHECK-LABEL: am4:
-; CHECK: bis.w &32, r12
-
-define i16 @am5(i16 %x, i16* %a) nounwind {
- %1 = getelementptr i16, i16* %a, i16 2
- %2 = load i16, i16* %1
- %3 = or i16 %2,%x
- ret i16 %3
-}
-; CHECK-LABEL: am5:
-; CHECK: bis.w 4(r13), r12
-
-%S = type { i16, i16 }
-@baz = common global %S zeroinitializer, align 1
-
-define i16 @am6(i16 %x) nounwind {
- %1 = load i16, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
- %2 = or i16 %1,%x
- ret i16 %2
-}
-; CHECK-LABEL: am6:
-; CHECK: bis.w &baz+2, r12
-
-%T = type { i16, [2 x i8] }
-@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
-
-define i8 @am7(i8 %x, i16 %n) nounwind {
- %1 = getelementptr %T, %T* @duh, i32 0, i32 1
- %2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3= load i8, i8* %2
- %4 = or i8 %3,%x
- ret i8 %4
-}
-; CHECK-LABEL: am7:
-; CHECK: bis.b duh+2(r13), r12
-
diff --git a/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/test/CodeGen/MSP430/AddrMode-bis-xr.ll
deleted file mode 100644
index 1e150f382062..000000000000
--- a/test/CodeGen/MSP430/AddrMode-bis-xr.ll
+++ /dev/null
@@ -1,81 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16"
-target triple = "msp430-generic-generic"
-
-define void @am1(i16* %a, i16 %x) nounwind {
- %1 = load i16, i16* %a
- %2 = or i16 %x, %1
- store i16 %2, i16* %a
- ret void
-}
-; CHECK-LABEL: am1:
-; CHECK: bis.w r13, 0(r12)
-
-@foo = external global i16
-
-define void @am2(i16 %x) nounwind {
- %1 = load i16, i16* @foo
- %2 = or i16 %x, %1
- store i16 %2, i16* @foo
- ret void
-}
-; CHECK-LABEL: am2:
-; CHECK: bis.w r12, &foo
-
-@bar = external global [2 x i8]
-
-define void @am3(i16 %i, i8 %x) nounwind {
- %1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %i
- %2 = load i8, i8* %1
- %3 = or i8 %x, %2
- store i8 %3, i8* %1
- ret void
-}
-; CHECK-LABEL: am3:
-; CHECK: bis.b r13, bar(r12)
-
-define void @am4(i16 %x) nounwind {
- %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
- %2 = or i16 %x, %1
- store volatile i16 %2, i16* inttoptr(i16 32 to i16*)
- ret void
-}
-; CHECK-LABEL: am4:
-; CHECK: bis.w r12, &32
-
-define void @am5(i16* %a, i16 %x) readonly {
- %1 = getelementptr inbounds i16, i16* %a, i16 2
- %2 = load i16, i16* %1
- %3 = or i16 %x, %2
- store i16 %3, i16* %1
- ret void
-}
-; CHECK-LABEL: am5:
-; CHECK: bis.w r13, 4(r12)
-
-%S = type { i16, i16 }
-@baz = common global %S zeroinitializer
-
-define void @am6(i16 %x) nounwind {
- %1 = load i16, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
- %2 = or i16 %x, %1
- store i16 %2, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
- ret void
-}
-; CHECK-LABEL: am6:
-; CHECK: bis.w r12, &baz+2
-
-%T = type { i16, [2 x i8] }
-@duh = external global %T
-
-define void @am7(i16 %n, i8 %x) nounwind {
- %1 = getelementptr %T, %T* @duh, i32 0, i32 1
- %2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3 = load i8, i8* %2
- %4 = or i8 %x, %3
- store i8 %4, i8* %2
- ret void
-}
-; CHECK-LABEL: am7:
-; CHECK: bis.b r13, duh+2(r12)
-
diff --git a/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/test/CodeGen/MSP430/AddrMode-mov-rx.ll
deleted file mode 100644
index 808aca0ea10b..000000000000
--- a/test/CodeGen/MSP430/AddrMode-mov-rx.ll
+++ /dev/null
@@ -1,67 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
-target triple = "msp430-generic-generic"
-
-define i16 @am1(i16* %a) nounwind {
- %1 = load i16, i16* %a
- ret i16 %1
-}
-; CHECK-LABEL: am1:
-; CHECK: mov.w 0(r12), r12
-
-@foo = external global i16
-
-define i16 @am2() nounwind {
- %1 = load i16, i16* @foo
- ret i16 %1
-}
-; CHECK-LABEL: am2:
-; CHECK: mov.w &foo, r12
-
-@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
-
-define i8 @am3(i16 %n) nounwind {
- %1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %n
- %2 = load i8, i8* %1
- ret i8 %2
-}
-; CHECK-LABEL: am3:
-; CHECK: mov.b bar(r12), r12
-
-define i16 @am4() nounwind {
- %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
- ret i16 %1
-}
-; CHECK-LABEL: am4:
-; CHECK: mov.w &32, r12
-
-define i16 @am5(i16* %a) nounwind {
- %1 = getelementptr i16, i16* %a, i16 2
- %2 = load i16, i16* %1
- ret i16 %2
-}
-; CHECK-LABEL: am5:
-; CHECK: mov.w 4(r12), r12
-
-%S = type { i16, i16 }
-@baz = common global %S zeroinitializer, align 1
-
-define i16 @am6() nounwind {
- %1 = load i16, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
- ret i16 %1
-}
-; CHECK-LABEL: am6:
-; CHECK: mov.w &baz+2, r12
-
-%T = type { i16, [2 x i8] }
-@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
-
-define i8 @am7(i16 %n) nounwind {
- %1 = getelementptr %T, %T* @duh, i32 0, i32 1
- %2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3= load i8, i8* %2
- ret i8 %3
-}
-; CHECK-LABEL: am7:
-; CHECK: mov.b duh+2(r12), r12
-
diff --git a/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/test/CodeGen/MSP430/AddrMode-mov-xr.ll
deleted file mode 100644
index c336289a60d7..000000000000
--- a/test/CodeGen/MSP430/AddrMode-mov-xr.ll
+++ /dev/null
@@ -1,67 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
-target triple = "msp430-generic-generic"
-
-define void @am1(i16* %a, i16 %b) nounwind {
- store i16 %b, i16* %a
- ret void
-}
-; CHECK-LABEL: am1:
-; CHECK: mov.w r13, 0(r12)
-
-@foo = external global i16
-
-define void @am2(i16 %a) nounwind {
- store i16 %a, i16* @foo
- ret void
-}
-; CHECK-LABEL: am2:
-; CHECK: mov.w r12, &foo
-
-@bar = external global [2 x i8]
-
-define void @am3(i16 %i, i8 %a) nounwind {
- %1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %i
- store i8 %a, i8* %1
- ret void
-}
-; CHECK-LABEL: am3:
-; CHECK: mov.b r13, bar(r12)
-
-define void @am4(i16 %a) nounwind {
- store volatile i16 %a, i16* inttoptr(i16 32 to i16*)
- ret void
-}
-; CHECK-LABEL: am4:
-; CHECK: mov.w r12, &32
-
-define void @am5(i16* nocapture %p, i16 %a) nounwind readonly {
- %1 = getelementptr inbounds i16, i16* %p, i16 2
- store i16 %a, i16* %1
- ret void
-}
-; CHECK-LABEL: am5:
-; CHECK: mov.w r13, 4(r12)
-
-%S = type { i16, i16 }
-@baz = common global %S zeroinitializer, align 1
-
-define void @am6(i16 %a) nounwind {
- store i16 %a, i16* getelementptr (%S, %S* @baz, i32 0, i32 1)
- ret void
-}
-; CHECK-LABEL: am6:
-; CHECK: mov.w r12, &baz+2
-
-%T = type { i16, [2 x i8] }
-@duh = external global %T
-
-define void @am7(i16 %n, i8 %a) nounwind {
- %1 = getelementptr %T, %T* @duh, i32 0, i32 1
- %2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- store i8 %a, i8* %2
- ret void
-}
-; CHECK-LABEL: am7:
-; CHECK: mov.b r13, duh+2(r12)
-
diff --git a/test/CodeGen/MSP430/BranchSelector.ll b/test/CodeGen/MSP430/BranchSelector.ll
deleted file mode 100644
index 4dfd95bf41af..000000000000
--- a/test/CodeGen/MSP430/BranchSelector.ll
+++ /dev/null
@@ -1,588 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
-target triple = "msp430"
-
-@reg = common global i16 0, align 2
-
-define void @WriteBurstPATable(i16 %count) #0 {
-entry:
- br label %while.cond
-
-while.cond:
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- %v0 = load volatile i16, i16* @reg, align 2
- %lnot = icmp eq i16 %v0, 0
-
-; This BB should be split and all branches should be expanded.
-; CHECK-LABEL: .LBB0_1:
-; CHECK: jne .LBB0_2
-; CHECK: br #.LBB0_1
-; CHECK: .LBB0_2:
-; CHECK: br #.LBB0_4
-; CHECK: .LBB0_3:
-
- br i1 %lnot, label %while.cond, label %while.end
-
-while.end:
- %i.0.i.0.1822 = load volatile i16, i16* @reg, align 1
- %cmp23 = icmp ult i16 %i.0.i.0.1822, %count
- br i1 %cmp23, label %for.body, label %for.end
-
-for.body:
- br label %while.cond6
-
-while.cond6:
- %0 = load volatile i16, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 19, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- br label %for.inc
-
-for.inc:
- %1 = load volatile i16, i16* @reg, align 2
- %cmp = icmp ult i16 %1, %count
-
-; This branch should be expanded.
-; CHECK-LABEL: .LBB0_4:
-; CHECK: jhs .LBB0_5
-; CHECK: br #.LBB0_3
-; CHECK: .LBB0_5:
-
- br i1 %cmp, label %for.body, label %for.end
-
-for.end:
- ret void
-}
-
-define void @WriteSinglePATable() #0 {
-entry:
- br label %begin
-begin:
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- store volatile i16 13, i16* @reg, align 2
- store volatile i16 17, i16* @reg, align 2
- store volatile i16 11, i16* @reg, align 2
- %v2 = load volatile i16, i16* @reg, align 2
- %lnot = icmp eq i16 %v2, 0
-
-; This branch should not be expanded
-; CHECK-LABEL: .LBB1_1:
-; CHECK: jeq .LBB1_1
-; CHECK: BB#2:
-; CHECK: ret
- br i1 %lnot, label %begin, label %end
-
-end:
- ret void
-}
diff --git a/test/CodeGen/MSP430/DbgValueOtherTargets.test b/test/CodeGen/MSP430/DbgValueOtherTargets.test
deleted file mode 100644
index 7adfbcafa35b..000000000000
--- a/test/CodeGen/MSP430/DbgValueOtherTargets.test
+++ /dev/null
@@ -1 +0,0 @@
-RUN: llc -O0 -march=msp430 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/test/CodeGen/MSP430/Inst16mi.ll b/test/CodeGen/MSP430/Inst16mi.ll
deleted file mode 100644
index 38c16f2ba235..000000000000
--- a/test/CodeGen/MSP430/Inst16mi.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i16 0, align 2
-
-define void @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.w #2, &foo
- store i16 2, i16 * @foo
- ret void
-}
-
-define void @add() nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w #2, &foo
- %1 = load i16, i16* @foo
- %2 = add i16 %1, 2
- store i16 %2, i16 * @foo
- ret void
-}
-
-define void @and() nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w #2, &foo
- %1 = load i16, i16* @foo
- %2 = and i16 %1, 2
- store i16 %2, i16 * @foo
- ret void
-}
-
-define void @bis() nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w #2, &foo
- %1 = load i16, i16* @foo
- %2 = or i16 %1, 2
- store i16 %2, i16 * @foo
- ret void
-}
-
-define void @xor() nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w #2, &foo
- %1 = load i16, i16* @foo
- %2 = xor i16 %1, 2
- store i16 %2, i16 * @foo
- ret void
-}
diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll
deleted file mode 100644
index a48d8592c1a6..000000000000
--- a/test/CodeGen/MSP430/Inst16mm.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i16 0, align 2
-@bar = common global i16 0, align 2
-
-define void @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.w &bar, &foo
- %1 = load i16, i16* @bar
- store i16 %1, i16* @foo
- ret void
-}
-
-define void @add() nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w &bar, &foo
- %1 = load i16, i16* @bar
- %2 = load i16, i16* @foo
- %3 = add i16 %2, %1
- store i16 %3, i16* @foo
- ret void
-}
-
-define void @and() nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w &bar, &foo
- %1 = load i16, i16* @bar
- %2 = load i16, i16* @foo
- %3 = and i16 %2, %1
- store i16 %3, i16* @foo
- ret void
-}
-
-define void @bis() nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w &bar, &foo
- %1 = load i16, i16* @bar
- %2 = load i16, i16* @foo
- %3 = or i16 %2, %1
- store i16 %3, i16* @foo
- ret void
-}
-
-define void @xor() nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w &bar, &foo
- %1 = load i16, i16* @bar
- %2 = load i16, i16* @foo
- %3 = xor i16 %2, %1
- store i16 %3, i16* @foo
- ret void
-}
-
-define i16 @mov2() nounwind {
-entry:
- %retval = alloca i16 ; <i16*> [#uses=3]
- %x = alloca i32, align 2 ; <i32*> [#uses=1]
- %y = alloca i32, align 2 ; <i32*> [#uses=1]
- store i16 0, i16* %retval
- %tmp = load i32, i32* %y ; <i32> [#uses=1]
- store i32 %tmp, i32* %x
- store i16 0, i16* %retval
- %0 = load i16, i16* %retval ; <i16> [#uses=1]
- ret i16 %0
-; CHECK-LABEL: mov2:
-; CHECK: mov.w 2(r1), 6(r1)
-; CHECK: mov.w 0(r1), 4(r1)
-}
diff --git a/test/CodeGen/MSP430/Inst16mr.ll b/test/CodeGen/MSP430/Inst16mr.ll
deleted file mode 100644
index 847c093f4088..000000000000
--- a/test/CodeGen/MSP430/Inst16mr.ll
+++ /dev/null
@@ -1,58 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i16 0, align 2
-
-define void @mov(i16 %a) nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.w r12, &foo
- store i16 %a, i16* @foo
- ret void
-}
-
-define void @add(i16 %a) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w r12, &foo
- %1 = load i16, i16* @foo
- %2 = add i16 %a, %1
- store i16 %2, i16* @foo
- ret void
-}
-
-define void @and(i16 %a) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w r12, &foo
- %1 = load i16, i16* @foo
- %2 = and i16 %a, %1
- store i16 %2, i16* @foo
- ret void
-}
-
-define void @bis(i16 %a) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w r12, &foo
- %1 = load i16, i16* @foo
- %2 = or i16 %a, %1
- store i16 %2, i16* @foo
- ret void
-}
-
-define void @bic(i16 zeroext %m) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.w r12, &foo
- %1 = xor i16 %m, -1
- %2 = load i16, i16* @foo
- %3 = and i16 %2, %1
- store i16 %3, i16* @foo
- ret void
-}
-
-define void @xor(i16 %a) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w r12, &foo
- %1 = load i16, i16* @foo
- %2 = xor i16 %a, %1
- store i16 %2, i16* @foo
- ret void
-}
-
diff --git a/test/CodeGen/MSP430/Inst16ri.ll b/test/CodeGen/MSP430/Inst16ri.ll
deleted file mode 100644
index 3a4bb6a93d99..000000000000
--- a/test/CodeGen/MSP430/Inst16ri.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define i16 @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.w #1, r12
- ret i16 1
-}
-
-define i16 @add(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w #1, r12
- %1 = add i16 %a, 1
- ret i16 %1
-}
-
-define i16 @and(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w #1, r12
- %1 = and i16 %a, 1
- ret i16 %1
-}
-
-define i16 @bis(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w #1, r12
- %1 = or i16 %a, 1
- ret i16 %1
-}
-
-define i16 @xor(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w #1, r12
- %1 = xor i16 %a, 1
- ret i16 %1
-}
diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll
deleted file mode 100644
index 44b8f39d8fa6..000000000000
--- a/test/CodeGen/MSP430/Inst16rm.ll
+++ /dev/null
@@ -1,46 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i16 0, align 2
-
-define i16 @add(i16 %a) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w &foo, r12
- %1 = load i16, i16* @foo
- %2 = add i16 %a, %1
- ret i16 %2
-}
-
-define i16 @and(i16 %a) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w &foo, r12
- %1 = load i16, i16* @foo
- %2 = and i16 %a, %1
- ret i16 %2
-}
-
-define i16 @bis(i16 %a) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w &foo, r12
- %1 = load i16, i16* @foo
- %2 = or i16 %a, %1
- ret i16 %2
-}
-
-define i16 @bic(i16 %a) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.w &foo, r12
- %1 = load i16, i16* @foo
- %2 = xor i16 %1, -1
- %3 = and i16 %a, %2
- ret i16 %3
-}
-
-define i16 @xor(i16 %a) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w &foo, r12
- %1 = load i16, i16* @foo
- %2 = xor i16 %a, %1
- ret i16 %2
-}
-
diff --git a/test/CodeGen/MSP430/Inst16rr.ll b/test/CodeGen/MSP430/Inst16rr.ll
deleted file mode 100644
index 75440ca2b403..000000000000
--- a/test/CodeGen/MSP430/Inst16rr.ll
+++ /dev/null
@@ -1,45 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define i16 @mov(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.w r13, r12
- ret i16 %b
-}
-
-define i16 @add(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.w r13, r12
- %1 = add i16 %a, %b
- ret i16 %1
-}
-
-define i16 @and(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w r13, r12
- %1 = and i16 %a, %b
- ret i16 %1
-}
-
-define i16 @bis(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w r13, r12
- %1 = or i16 %a, %b
- ret i16 %1
-}
-
-define i16 @bic(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.w r13, r12
- %1 = xor i16 %b, -1
- %2 = and i16 %a, %1
- ret i16 %2
-}
-
-define i16 @xor(i16 %a, i16 %b) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w r13, r12
- %1 = xor i16 %a, %b
- ret i16 %1
-}
diff --git a/test/CodeGen/MSP430/Inst8mi.ll b/test/CodeGen/MSP430/Inst8mi.ll
deleted file mode 100644
index ff22d7e1eb3d..000000000000
--- a/test/CodeGen/MSP430/Inst8mi.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i8 0, align 1
-
-define void @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.b #2, &foo
- store i8 2, i8 * @foo
- ret void
-}
-
-define void @add() nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b #2, &foo
- %1 = load i8, i8* @foo
- %2 = add i8 %1, 2
- store i8 %2, i8 * @foo
- ret void
-}
-
-define void @and() nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.b #2, &foo
- %1 = load i8, i8* @foo
- %2 = and i8 %1, 2
- store i8 %2, i8 * @foo
- ret void
-}
-
-define void @bis() nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.b #2, &foo
- %1 = load i8, i8* @foo
- %2 = or i8 %1, 2
- store i8 %2, i8 * @foo
- ret void
-}
-
-define void @xor() nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.b #2, &foo
- %1 = load i8, i8* @foo
- %2 = xor i8 %1, 2
- store i8 %2, i8 * @foo
- ret void
-}
-
diff --git a/test/CodeGen/MSP430/Inst8mm.ll b/test/CodeGen/MSP430/Inst8mm.ll
deleted file mode 100644
index b9848dc12303..000000000000
--- a/test/CodeGen/MSP430/Inst8mm.ll
+++ /dev/null
@@ -1,55 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-@foo = common global i8 0, align 1
-@bar = common global i8 0, align 1
-
-define void @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.b &bar, &foo
- %1 = load i8, i8* @bar
- store i8 %1, i8* @foo
- ret void
-}
-
-define void @add() nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b &bar, &foo
- %1 = load i8, i8* @bar
- %2 = load i8, i8* @foo
- %3 = add i8 %2, %1
- store i8 %3, i8* @foo
- ret void
-}
-
-define void @and() nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.b &bar, &foo
- %1 = load i8, i8* @bar
- %2 = load i8, i8* @foo
- %3 = and i8 %2, %1
- store i8 %3, i8* @foo
- ret void
-}
-
-define void @bis() nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.b &bar, &foo
- %1 = load i8, i8* @bar
- %2 = load i8, i8* @foo
- %3 = or i8 %2, %1
- store i8 %3, i8* @foo
- ret void
-}
-
-define void @xor() nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.b &bar, &foo
- %1 = load i8, i8* @bar
- %2 = load i8, i8* @foo
- %3 = xor i8 %2, %1
- store i8 %3, i8* @foo
- ret void
-}
-
diff --git a/test/CodeGen/MSP430/Inst8mr.ll b/test/CodeGen/MSP430/Inst8mr.ll
deleted file mode 100644
index 7fbdff257fe7..000000000000
--- a/test/CodeGen/MSP430/Inst8mr.ll
+++ /dev/null
@@ -1,58 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i8 0, align 1
-
-define void @mov(i8 %a) nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.b r12, &foo
- store i8 %a, i8* @foo
- ret void
-}
-
-define void @and(i8 %a) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.b r12, &foo
- %1 = load i8, i8* @foo
- %2 = and i8 %a, %1
- store i8 %2, i8* @foo
- ret void
-}
-
-define void @add(i8 %a) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b r12, &foo
- %1 = load i8, i8* @foo
- %2 = add i8 %a, %1
- store i8 %2, i8* @foo
- ret void
-}
-
-define void @bis(i8 %a) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.b r12, &foo
- %1 = load i8, i8* @foo
- %2 = or i8 %a, %1
- store i8 %2, i8* @foo
- ret void
-}
-
-define void @bic(i8 zeroext %m) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.b r12, &foo
- %1 = xor i8 %m, -1
- %2 = load i8, i8* @foo
- %3 = and i8 %2, %1
- store i8 %3, i8* @foo
- ret void
-}
-
-define void @xor(i8 %a) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.b r12, &foo
- %1 = load i8, i8* @foo
- %2 = xor i8 %a, %1
- store i8 %2, i8* @foo
- ret void
-}
-
diff --git a/test/CodeGen/MSP430/Inst8ri.ll b/test/CodeGen/MSP430/Inst8ri.ll
deleted file mode 100644
index 0e50f17f2a55..000000000000
--- a/test/CodeGen/MSP430/Inst8ri.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define i8 @mov() nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.b #1, r12
- ret i8 1
-}
-
-define i8 @add(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b #1, r12
- %1 = add i8 %a, 1
- ret i8 %1
-}
-
-define i8 @and(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.b #1, r12
- %1 = and i8 %a, 1
- ret i8 %1
-}
-
-define i8 @bis(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.b #1, r12
- %1 = or i8 %a, 1
- ret i8 %1
-}
-
-define i8 @xor(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.b #1, r12
- %1 = xor i8 %a, 1
- ret i8 %1
-}
diff --git a/test/CodeGen/MSP430/Inst8rm.ll b/test/CodeGen/MSP430/Inst8rm.ll
deleted file mode 100644
index 826a3c65ec94..000000000000
--- a/test/CodeGen/MSP430/Inst8rm.ll
+++ /dev/null
@@ -1,46 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-@foo = common global i8 0, align 1
-
-define i8 @add(i8 %a) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b &foo, r12
- %1 = load i8, i8* @foo
- %2 = add i8 %a, %1
- ret i8 %2
-}
-
-define i8 @and(i8 %a) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.b &foo, r12
- %1 = load i8, i8* @foo
- %2 = and i8 %a, %1
- ret i8 %2
-}
-
-define i8 @bis(i8 %a) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.b &foo, r12
- %1 = load i8, i8* @foo
- %2 = or i8 %a, %1
- ret i8 %2
-}
-
-define i8 @bic(i8 %a) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.b &foo, r12
- %1 = load i8, i8* @foo
- %2 = xor i8 %1, -1
- %3 = and i8 %a, %2
- ret i8 %3
-}
-
-define i8 @xor(i8 %a) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.b &foo, r12
- %1 = load i8, i8* @foo
- %2 = xor i8 %a, %1
- ret i8 %2
-}
-
diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll
deleted file mode 100644
index f37bc32a28fe..000000000000
--- a/test/CodeGen/MSP430/Inst8rr.ll
+++ /dev/null
@@ -1,46 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define i8 @mov(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: mov:
-; CHECK: mov.{{[bw]}} r13, r12
- ret i8 %b
-}
-
-define i8 @add(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: add:
-; CHECK: add.b
- %1 = add i8 %a, %b
- ret i8 %1
-}
-
-define i8 @and(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: and:
-; CHECK: and.w r13, r12
- %1 = and i8 %a, %b
- ret i8 %1
-}
-
-define i8 @bis(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: bis:
-; CHECK: bis.w r13, r12
- %1 = or i8 %a, %b
- ret i8 %1
-}
-
-define i8 @bic(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: bic:
-; CHECK: bic.b r13, r12
- %1 = xor i8 %b, -1
- %2 = and i8 %a, %1
- ret i8 %2
-}
-
-define i8 @xor(i8 %a, i8 %b) nounwind {
-; CHECK-LABEL: xor:
-; CHECK: xor.w r13, r12
- %1 = xor i8 %a, %b
- ret i8 %1
-}
-
diff --git a/test/CodeGen/MSP430/asm-clobbers.ll b/test/CodeGen/MSP430/asm-clobbers.ll
deleted file mode 100644
index 216a3fe40189..000000000000
--- a/test/CodeGen/MSP430/asm-clobbers.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
-target triple = "msp430---elf"
-
-define void @test() {
-entry:
-; CHECK-LABEL: test:
-; CHECK: push.w r10
- call void asm sideeffect "", "~{r10}"()
-; CHECK: pop.w r10
- ret void
-}
diff --git a/test/CodeGen/MSP430/bit.ll b/test/CodeGen/MSP430/bit.ll
deleted file mode 100644
index 172822fbb5fe..000000000000
--- a/test/CodeGen/MSP430/bit.ll
+++ /dev/null
@@ -1,166 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
-target triple = "msp430-generic-generic"
-
-@foo8 = external global i8
-@bar8 = external global i8
-
-define i8 @bitbrr(i8 %a, i8 %b) nounwind {
- %t1 = and i8 %a, %b
- %t2 = icmp ne i8 %t1, 0
- %t3 = zext i1 %t2 to i8
- ret i8 %t3
-}
-; CHECK-LABEL: bitbrr:
-; CHECK: bit.b r13, r12
-
-define i8 @bitbri(i8 %a) nounwind {
- %t1 = and i8 %a, 15
- %t2 = icmp ne i8 %t1, 0
- %t3 = zext i1 %t2 to i8
- ret i8 %t3
-}
-; CHECK-LABEL: bitbri:
-; CHECK: bit.b #15, r12
-
-define i8 @bitbir(i8 %a) nounwind {
- %t1 = and i8 15, %a
- %t2 = icmp ne i8 %t1, 0
- %t3 = zext i1 %t2 to i8
- ret i8 %t3
-}
-; CHECK-LABEL: bitbir:
-; CHECK: bit.b #15, r12
-
-define i8 @bitbmi() nounwind {
- %t1 = load i8, i8* @foo8
- %t2 = and i8 %t1, 15
- %t3 = icmp ne i8 %t2, 0
- %t4 = zext i1 %t3 to i8
- ret i8 %t4
-}
-; CHECK-LABEL: bitbmi:
-; CHECK: bit.b #15, &foo8
-
-define i8 @bitbim() nounwind {
- %t1 = load i8, i8* @foo8
- %t2 = and i8 15, %t1
- %t3 = icmp ne i8 %t2, 0
- %t4 = zext i1 %t3 to i8
- ret i8 %t4
-}
-; CHECK-LABEL: bitbim:
-; CHECK: bit.b #15, &foo8
-
-define i8 @bitbrm(i8 %a) nounwind {
- %t1 = load i8, i8* @foo8
- %t2 = and i8 %a, %t1
- %t3 = icmp ne i8 %t2, 0
- %t4 = zext i1 %t3 to i8
- ret i8 %t4
-}
-; CHECK-LABEL: bitbrm:
-; CHECK: bit.b &foo8, r12
-
-define i8 @bitbmr(i8 %a) nounwind {
- %t1 = load i8, i8* @foo8
- %t2 = and i8 %t1, %a
- %t3 = icmp ne i8 %t2, 0
- %t4 = zext i1 %t3 to i8
- ret i8 %t4
-}
-; CHECK-LABEL: bitbmr:
-; CHECK: bit.b r12, &foo8
-
-define i8 @bitbmm() nounwind {
- %t1 = load i8, i8* @foo8
- %t2 = load i8, i8* @bar8
- %t3 = and i8 %t1, %t2
- %t4 = icmp ne i8 %t3, 0
- %t5 = zext i1 %t4 to i8
- ret i8 %t5
-}
-; CHECK-LABEL: bitbmm:
-; CHECK: bit.b &bar8, &foo8
-
-@foo16 = external global i16
-@bar16 = external global i16
-
-define i16 @bitwrr(i16 %a, i16 %b) nounwind {
- %t1 = and i16 %a, %b
- %t2 = icmp ne i16 %t1, 0
- %t3 = zext i1 %t2 to i16
- ret i16 %t3
-}
-; CHECK-LABEL: bitwrr:
-; CHECK: bit.w r13, r12
-
-define i16 @bitwri(i16 %a) nounwind {
- %t1 = and i16 %a, 4080
- %t2 = icmp ne i16 %t1, 0
- %t3 = zext i1 %t2 to i16
- ret i16 %t3
-}
-; CHECK-LABEL: bitwri:
-; CHECK: bit.w #4080, r12
-
-define i16 @bitwir(i16 %a) nounwind {
- %t1 = and i16 4080, %a
- %t2 = icmp ne i16 %t1, 0
- %t3 = zext i1 %t2 to i16
- ret i16 %t3
-}
-; CHECK-LABEL: bitwir:
-; CHECK: bit.w #4080, r12
-
-define i16 @bitwmi() nounwind {
- %t1 = load i16, i16* @foo16
- %t2 = and i16 %t1, 4080
- %t3 = icmp ne i16 %t2, 0
- %t4 = zext i1 %t3 to i16
- ret i16 %t4
-}
-; CHECK-LABEL: bitwmi:
-; CHECK: bit.w #4080, &foo16
-
-define i16 @bitwim() nounwind {
- %t1 = load i16, i16* @foo16
- %t2 = and i16 4080, %t1
- %t3 = icmp ne i16 %t2, 0
- %t4 = zext i1 %t3 to i16
- ret i16 %t4
-}
-; CHECK-LABEL: bitwim:
-; CHECK: bit.w #4080, &foo16
-
-define i16 @bitwrm(i16 %a) nounwind {
- %t1 = load i16, i16* @foo16
- %t2 = and i16 %a, %t1
- %t3 = icmp ne i16 %t2, 0
- %t4 = zext i1 %t3 to i16
- ret i16 %t4
-}
-; CHECK-LABEL: bitwrm:
-; CHECK: bit.w &foo16, r12
-
-define i16 @bitwmr(i16 %a) nounwind {
- %t1 = load i16, i16* @foo16
- %t2 = and i16 %t1, %a
- %t3 = icmp ne i16 %t2, 0
- %t4 = zext i1 %t3 to i16
- ret i16 %t4
-}
-; CHECK-LABEL: bitwmr:
-; CHECK: bit.w r12, &foo16
-
-define i16 @bitwmm() nounwind {
- %t1 = load i16, i16* @foo16
- %t2 = load i16, i16* @bar16
- %t3 = and i16 %t1, %t2
- %t4 = icmp ne i16 %t3, 0
- %t5 = zext i1 %t4 to i16
- ret i16 %t5
-}
-; CHECK-LABEL: bitwmm:
-; CHECK: bit.w &bar16, &foo16
-
diff --git a/test/CodeGen/MSP430/byval.ll b/test/CodeGen/MSP430/byval.ll
deleted file mode 100644
index 401896b43c20..000000000000
--- a/test/CodeGen/MSP430/byval.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-%struct.Foo = type { i16, i16, i16 }
-@foo = global %struct.Foo { i16 1, i16 2, i16 3 }, align 2
-
-define i16 @callee(%struct.Foo* byval %f) nounwind {
-entry:
-; CHECK-LABEL: callee:
-; CHECK: mov.w 2(r1), r12
- %0 = getelementptr inbounds %struct.Foo, %struct.Foo* %f, i32 0, i32 0
- %1 = load i16, i16* %0, align 2
- ret i16 %1
-}
-
-define void @caller() nounwind {
-entry:
-; CHECK-LABEL: caller:
-; CHECK: mov.w &foo+4, 4(r1)
-; CHECK-NEXT: mov.w &foo+2, 2(r1)
-; CHECK-NEXT: mov.w &foo, 0(r1)
- %call = call i16 @callee(%struct.Foo* byval @foo)
- ret void
-}
diff --git a/test/CodeGen/MSP430/cc_args.ll b/test/CodeGen/MSP430/cc_args.ll
deleted file mode 100644
index 70ac901f7e4e..000000000000
--- a/test/CodeGen/MSP430/cc_args.ll
+++ /dev/null
@@ -1,139 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
-target triple = "msp430---elf"
-
-define void @test() #0 {
-entry:
-; CHECK: test:
-
-; CHECK: mov.w #1, r12
-; CHECK: call #f_i16
- call void @f_i16(i16 1)
-
-; CHECK: mov.w #772, r12
-; CHECK: mov.w #258, r13
-; CHECK: call #f_i32
- call void @f_i32(i32 16909060)
-
-; CHECK: mov.w #1800, r12
-; CHECK: mov.w #1286, r13
-; CHECK: mov.w #772, r14
-; CHECK: mov.w #258, r15
-; CHECK: call #f_i64
- call void @f_i64(i64 72623859790382856)
-
-; CHECK: mov.w #772, r12
-; CHECK: mov.w #258, r13
-; CHECK: mov.w #1800, r14
-; CHECK: mov.w #1286, r15
-; CHECK: call #f_i32_i32
- call void @f_i32_i32(i32 16909060, i32 84281096)
-
-; CHECK: mov.w #1, r12
-; CHECK: mov.w #772, r13
-; CHECK: mov.w #258, r14
-; CHECK: mov.w #2, r15
-; CHECK: call #f_i16_i32_i16
- call void @f_i16_i32_i16(i16 1, i32 16909060, i16 2)
-
-; CHECK: mov.w #1286, 0(r1)
-; CHECK: mov.w #1, r12
-; CHECK: mov.w #772, r13
-; CHECK: mov.w #258, r14
-; CHECK: mov.w #1800, r15
-; CHECK: call #f_i16_i32_i32
- call void @f_i16_i32_i32(i16 1, i32 16909060, i32 84281096)
-
-; CHECK: mov.w #258, 6(r1)
-; CHECK: mov.w #772, 4(r1)
-; CHECK: mov.w #1286, 2(r1)
-; CHECK: mov.w #1800, 0(r1)
-; CHECK: mov.w #1, r12
-; CHECK: mov.w #2, r13
-; CHECK: call #f_i16_i64_i16
- call void @f_i16_i64_i16(i16 1, i64 72623859790382856, i16 2)
-
- ret void
-}
-
-@g_i16 = common global i16 0, align 2
-@g_i32 = common global i32 0, align 2
-@g_i64 = common global i64 0, align 2
-
-define void @f_i16(i16 %a) #0 {
-; CHECK: f_i16:
-; CHECK: mov.w r12, &g_i16
- store volatile i16 %a, i16* @g_i16, align 2
- ret void
-}
-
-define void @f_i32(i32 %a) #0 {
-; CHECK: f_i32:
-; CHECK: mov.w r13, &g_i32+2
-; CHECK: mov.w r12, &g_i32
- store volatile i32 %a, i32* @g_i32, align 2
- ret void
-}
-
-define void @f_i64(i64 %a) #0 {
-; CHECK: f_i64:
-; CHECK: mov.w r15, &g_i64+6
-; CHECK: mov.w r14, &g_i64+4
-; CHECK: mov.w r13, &g_i64+2
-; CHECK: mov.w r12, &g_i64
- store volatile i64 %a, i64* @g_i64, align 2
- ret void
-}
-
-define void @f_i32_i32(i32 %a, i32 %b) #0 {
-; CHECK: f_i32_i32:
-; CHECK: mov.w r13, &g_i32+2
-; CHECK: mov.w r12, &g_i32
- store volatile i32 %a, i32* @g_i32, align 2
-; CHECK: mov.w r15, &g_i32+2
-; CHECK: mov.w r14, &g_i32
- store volatile i32 %b, i32* @g_i32, align 2
- ret void
-}
-
-define void @f_i16_i32_i32(i16 %a, i32 %b, i32 %c) #0 {
-; CHECK: f_i16_i32_i32:
-; CHECK: mov.w r12, &g_i16
- store volatile i16 %a, i16* @g_i16, align 2
-; CHECK: mov.w r14, &g_i32+2
-; CHECK: mov.w r13, &g_i32
- store volatile i32 %b, i32* @g_i32, align 2
-; CHECK: mov.w r15, &g_i32
-; CHECK: mov.w 4(r4), &g_i32+2
- store volatile i32 %c, i32* @g_i32, align 2
- ret void
-}
-
-define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
-; CHECK: f_i16_i32_i16:
-; CHECK: mov.w r12, &g_i16
- store volatile i16 %a, i16* @g_i16, align 2
-; CHECK: mov.w r14, &g_i32+2
-; CHECK: mov.w r13, &g_i32
- store volatile i32 %b, i32* @g_i32, align 2
-; CHECK: mov.w r15, &g_i16
- store volatile i16 %c, i16* @g_i16, align 2
- ret void
-}
-
-define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
-; CHECK: f_i16_i64_i16:
-; CHECK: mov.w r12, &g_i16
- store volatile i16 %a, i16* @g_i16, align 2
-;CHECK: mov.w 10(r4), &g_i64+6
-;CHECK: mov.w 8(r4), &g_i64+4
-;CHECK: mov.w 6(r4), &g_i64+2
-;CHECK: mov.w 4(r4), &g_i64
- store volatile i64 %b, i64* @g_i64, align 2
-;CHECK: mov.w r13, &g_i16
- store volatile i16 %c, i16* @g_i16, align 2
- ret void
-}
-
-attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/test/CodeGen/MSP430/cc_ret.ll b/test/CodeGen/MSP430/cc_ret.ll
deleted file mode 100644
index 937db6dbf3bf..000000000000
--- a/test/CodeGen/MSP430/cc_ret.ll
+++ /dev/null
@@ -1,61 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
-target triple = "msp430---elf"
-
-define void @test() #0 {
-entry:
-; CHECK: test:
-
-; CHECK: call #f_i16
-; CHECK: mov.w r12, &g_i16
- %0 = call i16 @f_i16()
- store volatile i16 %0, i16* @g_i16
-
-; CHECK: call #f_i32
-; CHECK: mov.w r13, &g_i32+2
-; CHECK: mov.w r12, &g_i32
- %1 = call i32 @f_i32()
- store volatile i32 %1, i32* @g_i32
-
-; CHECK: call #f_i64
-; CHECK: mov.w r15, &g_i64+6
-; CHECK: mov.w r14, &g_i64+4
-; CHECK: mov.w r13, &g_i64+2
-; CHECK: mov.w r12, &g_i64
- %2 = call i64 @f_i64()
- store volatile i64 %2, i64* @g_i64
-
- ret void
-}
-
-@g_i16 = common global i16 0, align 2
-@g_i32 = common global i32 0, align 2
-@g_i64 = common global i64 0, align 2
-
-define i16 @f_i16() #0 {
-; CHECK: f_i16:
-; CHECK: mov.w #1, r12
-; CHECK: ret
- ret i16 1
-}
-
-define i32 @f_i32() #0 {
-; CHECK: f_i32:
-; CHECK: mov.w #772, r12
-; CHECK: mov.w #258, r13
-; CHECK: ret
- ret i32 16909060
-}
-
-define i64 @f_i64() #0 {
-; CHECK: f_i64:
-; CHECK: mov.w #1800, r12
-; CHECK: mov.w #1286, r13
-; CHECK: mov.w #772, r14
-; CHECK: mov.w #258, r15
-; CHECK: ret
- ret i64 72623859790382856
-}
-
-attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/test/CodeGen/MSP430/flt_rounds.ll b/test/CodeGen/MSP430/flt_rounds.ll
deleted file mode 100644
index fb89363d4d0a..000000000000
--- a/test/CodeGen/MSP430/flt_rounds.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc -verify-machineinstrs < %s -march=msp430
-
-define i16 @foo() {
-entry:
- %0 = call i32 @llvm.flt.rounds()
- %1 = trunc i32 %0 to i16
- ret i16 %1
-}
-
-declare i32 @llvm.flt.rounds() nounwind
diff --git a/test/CodeGen/MSP430/fp.ll b/test/CodeGen/MSP430/fp.ll
deleted file mode 100644
index 2559e23ae1f5..000000000000
--- a/test/CodeGen/MSP430/fp.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: llc -O0 -disable-fp-elim < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-define void @fp() nounwind {
-entry:
-; CHECK-LABEL: fp:
-; CHECK: push.w r4
-; CHECK: mov.w r1, r4
-; CHECK: sub.w #2, r1
- %i = alloca i16, align 2
-; CHECK: mov.w #0, -2(r4)
- store i16 0, i16* %i, align 2
-; CHECK: pop.w r4
- ret void
-}
-
-; Due to FPB not being marked as reserved, the register allocator used to select
-; r4 as the register for the "r" constraint below. This test verifies that this
-; does not happen anymore. Note that the only reason an ISR is used here is that
-; the register allocator selects r4 first instead of fifth in a normal function.
-define msp430_intrcc void @fpb_alloced() #0 {
-; CHECK-LABEL: fpb_alloced:
-; CHECK-NOT: mov.b #0, r4
-; CHECK: nop
- call void asm sideeffect "nop", "r"(i8 0)
- ret void
-}
diff --git a/test/CodeGen/MSP430/indirectbr.ll b/test/CodeGen/MSP430/indirectbr.ll
deleted file mode 100644
index af1a466b3c78..000000000000
--- a/test/CodeGen/MSP430/indirectbr.ll
+++ /dev/null
@@ -1,41 +0,0 @@
-; RUN: llc -march=msp430 < %s
-
-@nextaddr = global i8* null ; <i8**> [#uses=2]
-@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
-
-define internal i16 @foo(i16 %i) nounwind {
-entry:
- %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2]
- %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
- br i1 %1, label %bb3, label %bb2
-
-bb2: ; preds = %bb3, %entry
- %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
- indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
-
-bb3: ; preds = %entry
- %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i16 0, i16 %i ; <i8**> [#uses=1]
- %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1]
- br label %bb2
-
-L5: ; preds = %bb2
- br label %L4
-
-L4: ; preds = %L5, %bb2
- %res.0 = phi i16 [ 385, %L5 ], [ 35, %bb2 ] ; <i16> [#uses=1]
- br label %L3
-
-L3: ; preds = %L4, %bb2
- %res.1 = phi i16 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i16> [#uses=1]
- br label %L2
-
-L2: ; preds = %L3, %bb2
- %res.2 = phi i16 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i16> [#uses=1]
- %phitmp = mul i16 %res.2, 6 ; <i16> [#uses=1]
- br label %L1
-
-L1: ; preds = %L2, %bb2
- %res.3 = phi i16 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i16> [#uses=1]
- store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
- ret i16 %res.3
-}
diff --git a/test/CodeGen/MSP430/indirectbr2.ll b/test/CodeGen/MSP430/indirectbr2.ll
deleted file mode 100644
index b0b4f1cbfd24..000000000000
--- a/test/CodeGen/MSP430/indirectbr2.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
-
-define internal i16 @foo(i16 %i) nounwind {
-entry:
- %tmp1 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i16 0, i16 %i ; <i8**> [#uses=1]
- %gotovar.4.0 = load i8*, i8** %tmp1, align 4 ; <i8*> [#uses=1]
-; CHECK: br .LC.0.2070(r12)
- indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
-
-L5: ; preds = %bb2
- br label %L4
-
-L4: ; preds = %L5, %bb2
- %res.0 = phi i16 [ 385, %L5 ], [ 35, %entry ] ; <i16> [#uses=1]
- br label %L3
-
-L3: ; preds = %L4, %bb2
- %res.1 = phi i16 [ %res.0, %L4 ], [ 5, %entry ] ; <i16> [#uses=1]
- br label %L2
-
-L2: ; preds = %L3, %bb2
- %res.2 = phi i16 [ %res.1, %L3 ], [ 1, %entry ] ; <i16> [#uses=1]
- br label %L1
-
-L1: ; preds = %L2, %bb2
- %res.3 = phi i16 [ %res.2, %L2 ], [ 2, %entry ] ; <i16> [#uses=1]
- ret i16 %res.3
-}
diff --git a/test/CodeGen/MSP430/inline-asm.ll b/test/CodeGen/MSP430/inline-asm.ll
deleted file mode 100644
index a2f13235b1d3..000000000000
--- a/test/CodeGen/MSP430/inline-asm.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc < %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430-generic-generic"
-
-define void @imm() nounwind {
- call void asm sideeffect "bic\09$0,r2", "i"(i16 32) nounwind
- ret void
-}
-
-define void @reg(i16 %a) nounwind {
- call void asm sideeffect "bic\09$0,r2", "r"(i16 %a) nounwind
- ret void
-}
-
-@foo = global i16 0, align 2
-
-define void @immmem() nounwind {
- call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16, i16* @foo, i32 1)) nounwind
- ret void
-}
-
-define void @mem() nounwind {
- %fooval = load i16, i16* @foo
- call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
- ret void
-}
diff --git a/test/CodeGen/MSP430/jumptable.ll b/test/CodeGen/MSP430/jumptable.ll
deleted file mode 100644
index 5ccdbb701db1..000000000000
--- a/test/CodeGen/MSP430/jumptable.ll
+++ /dev/null
@@ -1,54 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-; Function Attrs: nounwind
-define i16 @test(i16 %i) #0 {
-entry:
-; CHECK-LABEL: test:
- %retval = alloca i16, align 2
- %i.addr = alloca i16, align 2
- store i16 %i, i16* %i.addr, align 2
- %0 = load i16, i16* %i.addr, align 2
-; CHECK: mov.w #2, r13
-; CHECK: call #__mulhi3hw_noint
-; CHECK: br .LJTI0_0(r12)
- switch i16 %0, label %sw.default [
- i16 0, label %sw.bb
- i16 1, label %sw.bb1
- i16 2, label %sw.bb2
- i16 3, label %sw.bb3
- ]
-
-sw.bb: ; preds = %entry
- store i16 0, i16* %retval
- br label %return
-
-sw.bb1: ; preds = %entry
- store i16 1, i16* %retval
- br label %return
-
-sw.bb2: ; preds = %entry
- store i16 2, i16* %retval
- br label %return
-
-sw.bb3: ; preds = %entry
- store i16 3, i16* %retval
- br label %return
-
-sw.default: ; preds = %entry
- store i16 2, i16* %retval
- br label %return
-
-return: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
- %1 = load i16, i16* %retval
- ret i16 %1
-; CHECK: ret
-}
-
-; CHECK: .LJTI0_0:
-; CHECK-NEXT: .short .LBB0_2
-; CHECK-NEXT: .short .LBB0_4
-; CHECK-NEXT: .short .LBB0_3
-; CHECK-NEXT: .short .LBB0_5
diff --git a/test/CodeGen/MSP430/lit.local.cfg b/test/CodeGen/MSP430/lit.local.cfg
deleted file mode 100644
index b1cf1fbd21d7..000000000000
--- a/test/CodeGen/MSP430/lit.local.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-if not 'MSP430' in config.root.targets:
- config.unsupported = True
-
diff --git a/test/CodeGen/MSP430/memset.ll b/test/CodeGen/MSP430/memset.ll
deleted file mode 100644
index a24bfafc2005..000000000000
--- a/test/CodeGen/MSP430/memset.ll
+++ /dev/null
@@ -1,22 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-@buf = external global i8*
-
-; Function Attrs: nounwind
-define void @test() nounwind {
-entry:
-; CHECK-LABEL: test:
- %0 = load i8*, i8** @buf, align 2
-; CHECK: mov.w &buf, r12
-; CHECK-NEXT: mov.w #5, r13
-; CHECK-NEXT: mov.w #128, r14
-; CHECK-NEXT: call #memset
- call void @llvm.memset.p0i8.i16(i8* %0, i8 5, i16 128, i32 1, i1 false)
- ret void
-}
-
-; Function Attrs: nounwind
-declare void @llvm.memset.p0i8.i16(i8* nocapture, i8, i16, i32, i1) nounwind
-
diff --git a/test/CodeGen/MSP430/misched-msp430.ll b/test/CodeGen/MSP430/misched-msp430.ll
deleted file mode 100644
index 3d18fa005a6b..000000000000
--- a/test/CodeGen/MSP430/misched-msp430.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -mtriple=msp430-unknown-unknown -enable-misched | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-
-@y = common global i16 0, align 2
-@x = common global i16 0, align 2
-
-; Test that the MI Scheduler's initPolicy does not crash when i32 is
-; unsupported. The content of the asm check below is unimportant. It
-; only verifies that the code generator ran successfully.
-;
-; CHECK-LABEL: @f
-; CHECK: mov.w &y, &x
-; CHECK: ret
-define void @f() {
-entry:
- %0 = load i16, i16* @y, align 2
- store i16 %0, i16* @x, align 2
- ret void
-}
diff --git a/test/CodeGen/MSP430/mult-alt-generic-msp430.ll b/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
deleted file mode 100644
index 8cf83879b090..000000000000
--- a/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
+++ /dev/null
@@ -1,323 +0,0 @@
-; RUN: llc < %s -march=msp430
-; ModuleID = 'mult-alt-generic.c'
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430"
-
-@mout0 = common global i16 0, align 2
-@min1 = common global i16 0, align 2
-@marray = common global [2 x i16] zeroinitializer, align 2
-
-define void @single_m() nounwind {
-entry:
- call void asm "foo $1,$0", "=*m,*m"(i16* @mout0, i16* @min1) nounwind
- ret void
-}
-
-define void @single_o() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %index = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %index, align 2
- ret void
-}
-
-define void @single_V() nounwind {
-entry:
- ret void
-}
-
-define void @single_lt() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r,<r"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* %in1, align 2
- %1 = call i16 asm "foo $1,$0", "=r,r<"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- ret void
-}
-
-define void @single_gt() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r,>r"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* %in1, align 2
- %1 = call i16 asm "foo $1,$0", "=r,r>"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- ret void
-}
-
-define void @single_r() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r,r"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @single_i() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r,i"(i16 1) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @single_n() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r,n"(i16 1) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @single_E() nounwind {
-entry:
- %out0 = alloca double, align 8
- store double 0.000000e+000, double* %out0, align 8
-; No lowering support.
-; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind
-; store double %0, double* %out0, align 8
- ret void
-}
-
-define void @single_F() nounwind {
-entry:
- %out0 = alloca double, align 8
- store double 0.000000e+000, double* %out0, align 8
-; No lowering support.
-; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind
-; store double %0, double* %out0, align 8
- ret void
-}
-
-define void @single_s() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- ret void
-}
-
-define void @single_g() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* @min1, align 2
- %1 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- %2 = call i16 asm "foo $1,$0", "=r,imr"(i16 1) nounwind
- store i16 %2, i16* %out0, align 2
- ret void
-}
-
-define void @single_X() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* @min1, align 2
- %1 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- %2 = call i16 asm "foo $1,$0", "=r,X"(i16 1) nounwind
- store i16 %2, i16* %out0, align 2
- %3 = call i16 asm "foo $1,$0", "=r,X"(i16* getelementptr inbounds ([2 x i16], [2 x i16]* @marray, i32 0, i32 0)) nounwind
- store i16 %3, i16* %out0, align 2
-; No lowering support.
-; %4 = call i16 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind
-; store i16 %4, i16* %out0, align 2
-; %5 = call i16 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind
-; store i16 %5, i16* %out0, align 2
- ret void
-}
-
-define void @single_p() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r,r"(i16* getelementptr inbounds ([2 x i16], [2 x i16]* @marray, i32 0, i32 0)) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @multi_m() nounwind {
-entry:
- %tmp = load i16, i16* @min1, align 2
- call void asm "foo $1,$0", "=*m|r,m|r"(i16* @mout0, i16 %tmp) nounwind
- ret void
-}
-
-define void @multi_o() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %index = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %index, align 2
- ret void
-}
-
-define void @multi_V() nounwind {
-entry:
- ret void
-}
-
-define void @multi_lt() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|<r"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* %in1, align 2
- %1 = call i16 asm "foo $1,$0", "=r|r,r|r<"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- ret void
-}
-
-define void @multi_gt() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|>r"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* %in1, align 2
- %1 = call i16 asm "foo $1,$0", "=r|r,r|r>"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- ret void
-}
-
-define void @multi_r() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|m"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @multi_i() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|i"(i16 1) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @multi_n() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|n"(i16 1) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
-
-define void @multi_E() nounwind {
-entry:
- %out0 = alloca double, align 8
- store double 0.000000e+000, double* %out0, align 8
-; No lowering support.
-; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind
-; store double %0, double* %out0, align 8
- ret void
-}
-
-define void @multi_F() nounwind {
-entry:
- %out0 = alloca double, align 8
- store double 0.000000e+000, double* %out0, align 8
-; No lowering support.
-; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind
-; store double %0, double* %out0, align 8
- ret void
-}
-
-define void @multi_s() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- ret void
-}
-
-define void @multi_g() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* @min1, align 2
- %1 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- %2 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 1) nounwind
- store i16 %2, i16* %out0, align 2
- ret void
-}
-
-define void @multi_X() nounwind {
-entry:
- %out0 = alloca i16, align 2
- %in1 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- store i16 1, i16* %in1, align 2
- %tmp = load i16, i16* %in1, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp) nounwind
- store i16 %0, i16* %out0, align 2
- %tmp1 = load i16, i16* @min1, align 2
- %1 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp1) nounwind
- store i16 %1, i16* %out0, align 2
- %2 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 1) nounwind
- store i16 %2, i16* %out0, align 2
- %3 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16* getelementptr inbounds ([2 x i16], [2 x i16]* @marray, i32 0, i32 0)) nounwind
- store i16 %3, i16* %out0, align 2
-; No lowering support.
-; %4 = call i16 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind
-; store i16 %4, i16* %out0, align 2
-; %5 = call i16 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind
-; store i16 %5, i16* %out0, align 2
- ret void
-}
-
-define void @multi_p() nounwind {
-entry:
- %out0 = alloca i16, align 2
- store i16 0, i16* %out0, align 2
- %0 = call i16 asm "foo $1,$0", "=r|r,r|r"(i16* getelementptr inbounds ([2 x i16], [2 x i16]* @marray, i32 0, i32 0)) nounwind
- store i16 %0, i16* %out0, align 2
- ret void
-}
diff --git a/test/CodeGen/MSP430/postinc.ll b/test/CodeGen/MSP430/postinc.ll
deleted file mode 100644
index 75a927f33fce..000000000000
--- a/test/CodeGen/MSP430/postinc.ll
+++ /dev/null
@@ -1,114 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
-target triple = "msp430"
-
-define zeroext i16 @add(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
-entry:
- %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
- br i1 %cmp8, label %for.end, label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
- %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- %arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
-; CHECK-LABEL: add:
-; CHECK: add.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
- %add = add i16 %tmp4, %sum.09 ; <i16> [#uses=2]
- %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
- %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body, %entry
- %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- ret i16 %sum.0.lcssa
-}
-
-define zeroext i16 @sub(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
-entry:
- %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
- br i1 %cmp8, label %for.end, label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
- %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- %arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
-; CHECK-LABEL: sub:
-; CHECK: sub.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
- %add = sub i16 %tmp4, %sum.09 ; <i16> [#uses=2]
- %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
- %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body, %entry
- %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- ret i16 %sum.0.lcssa
-}
-
-define zeroext i16 @or(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
-entry:
- %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
- br i1 %cmp8, label %for.end, label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
- %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- %arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
-; CHECK-LABEL: or:
-; CHECK: bis.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
- %add = or i16 %tmp4, %sum.09 ; <i16> [#uses=2]
- %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
- %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body, %entry
- %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- ret i16 %sum.0.lcssa
-}
-
-define zeroext i16 @xor(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
-entry:
- %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
- br i1 %cmp8, label %for.end, label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
- %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- %arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
-; CHECK-LABEL: xor:
-; CHECK: xor.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
- %add = xor i16 %tmp4, %sum.09 ; <i16> [#uses=2]
- %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
- %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body, %entry
- %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- ret i16 %sum.0.lcssa
-}
-
-define zeroext i16 @and(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
-entry:
- %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
- br i1 %cmp8, label %for.end, label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
- %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- %arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
-; CHECK-LABEL: and:
-; CHECK: and.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
- %add = and i16 %tmp4, %sum.09 ; <i16> [#uses=2]
- %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
- %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body, %entry
- %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
- ret i16 %sum.0.lcssa
-}
-
diff --git a/test/CodeGen/MSP430/setcc.ll b/test/CodeGen/MSP430/setcc.ll
deleted file mode 100644
index 6e2ec8ea3ea1..000000000000
--- a/test/CodeGen/MSP430/setcc.ll
+++ /dev/null
@@ -1,114 +0,0 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
-target triple = "msp430-generic-generic"
-
-define i16 @sccweqand(i16 %a, i16 %b) nounwind {
- %t1 = and i16 %a, %b
- %t2 = icmp eq i16 %t1, 0
- %t3 = zext i1 %t2 to i16
- ret i16 %t3
-}
-; CHECK-LABEL: sccweqand:
-; CHECK: bit.w r13, r12
-; CHECK: mov.w r2, r12
-; CHECK: rra.w r12
-; CHECK: and.w #1, r12
-
-define i16 @sccwneand(i16 %a, i16 %b) nounwind {
- %t1 = and i16 %a, %b
- %t2 = icmp ne i16 %t1, 0
- %t3 = zext i1 %t2 to i16
- ret i16 %t3
-}
-; CHECK-LABEL: sccwneand:
-; CHECK: bit.w r13, r12
-; CHECK: mov.w r2, r12
-; CHECK: and.w #1, r12
-
-define i16 @sccwne(i16 %a, i16 %b) nounwind {
- %t1 = icmp ne i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccwne:
-; CHECK: cmp.w r13, r12
-; CHECK: mov.w r2, r13
-; CHECK: rra.w r13
-; CHECK: mov.w #1, r12
-; CHECK: bic.w r13, r12
-
-define i16 @sccweq(i16 %a, i16 %b) nounwind {
- %t1 = icmp eq i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccweq:
-; CHECK: cmp.w r13, r12
-; CHECK: mov.w r2, r12
-; CHECK: rra.w r12
-; CHECK: and.w #1, r12
-
-define i16 @sccwugt(i16 %a, i16 %b) nounwind {
- %t1 = icmp ugt i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccwugt:
-; CHECK: cmp.w r12, r13
-; CHECK: mov.w #1, r12
-; CHECK: bic.w r2, r12
-
-define i16 @sccwuge(i16 %a, i16 %b) nounwind {
- %t1 = icmp uge i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccwuge:
-; CHECK: cmp.w r13, r12
-; CHECK: mov.w r2, r12
-; CHECK: and.w #1, r12
-
-define i16 @sccwult(i16 %a, i16 %b) nounwind {
- %t1 = icmp ult i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccwult:
-; CHECK: cmp.w r13, r12
-; CHECK: mov.w #1, r12
-; CHECK: bic.w r2, r12
-
-define i16 @sccwule(i16 %a, i16 %b) nounwind {
- %t1 = icmp ule i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-; CHECK-LABEL:sccwule:
-; CHECK: cmp.w r12, r13
-; CHECK: mov.w r2, r12
-; CHECK: and.w #1, r12
-
-define i16 @sccwsgt(i16 %a, i16 %b) nounwind {
- %t1 = icmp sgt i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-
-define i16 @sccwsge(i16 %a, i16 %b) nounwind {
- %t1 = icmp sge i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-
-define i16 @sccwslt(i16 %a, i16 %b) nounwind {
- %t1 = icmp slt i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-
-define i16 @sccwsle(i16 %a, i16 %b) nounwind {
- %t1 = icmp sle i16 %a, %b
- %t2 = zext i1 %t1 to i16
- ret i16 %t2
-}
-
diff --git a/test/CodeGen/MSP430/shifts.ll b/test/CodeGen/MSP430/shifts.ll
deleted file mode 100644
index 22ae59ef4b0f..000000000000
--- a/test/CodeGen/MSP430/shifts.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
-target triple = "msp430-elf"
-
-define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK-LABEL: lshr8:
-; CHECK: rrc.b
- %shr = lshr i8 %a, %cnt
- ret i8 %shr
-}
-
-define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK-LABEL: ashr8:
-; CHECK: rra.b
- %shr = ashr i8 %a, %cnt
- ret i8 %shr
-}
-
-define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK: shl8
-; CHECK: rla.b
- %shl = shl i8 %a, %cnt
- ret i8 %shl
-}
-
-define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK-LABEL: lshr16:
-; CHECK: rrc.w
- %shr = lshr i16 %a, %cnt
- ret i16 %shr
-}
-
-define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK-LABEL: ashr16:
-; CHECK: rra.w
- %shr = ashr i16 %a, %cnt
- ret i16 %shr
-}
-
-define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
-entry:
-; CHECK-LABEL: shl16:
-; CHECK: rla.w
- %shl = shl i16 %a, %cnt
- ret i16 %shl
-}
diff --git a/test/CodeGen/MSP430/spill-to-stack.ll b/test/CodeGen/MSP430/spill-to-stack.ll
deleted file mode 100644
index d925bc91b72d..000000000000
--- a/test/CodeGen/MSP430/spill-to-stack.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; RUN: llc -march=msp430 < %s
-%VeryLarge = type { i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
-
-; intentionally cause a spill
-define void @inc(%VeryLarge* byval align 1 %s) {
-entry:
- %p0 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 0
- %0 = load i8, i8* %p0
- %p1 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 1
- %1 = load i32, i32* %p1
- %p2 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 2
- %2 = load i32, i32* %p2
- %p3 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 3
- %3 = load i32, i32* %p3
- %p4 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 4
- %4 = load i32, i32* %p4
- %p5 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 5
- %5 = load i32, i32* %p5
- %p6 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 6
- %6 = load i32, i32* %p6
- %p7 = getelementptr inbounds %VeryLarge, %VeryLarge* %s, i32 0, i32 7
- %7 = load i32, i32* %p7
- %add = add i8 %0, 1
- store i8 %add, i8* %p0
- %add2 = add i32 %1, 2
- store i32 %add2, i32* %p1
- %add3 = add i32 %2, 3
- store i32 %add3, i32* %p2
- %add4 = add i32 %3, 4
- store i32 %add4, i32* %p3
- %add5 = add i32 %4, 5
- store i32 %add5, i32* %p4
- %add6 = add i32 %5, 6
- store i32 %add6, i32* %p5
- %add7 = add i32 %6, 7
- store i32 %add7, i32* %p6
- %add8 = add i32 %7, 8
- store i32 %add8, i32* %p7
- ret void
-}
diff --git a/test/CodeGen/MSP430/struct-return.ll b/test/CodeGen/MSP430/struct-return.ll
deleted file mode 100644
index c28bf06af439..000000000000
--- a/test/CodeGen/MSP430/struct-return.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-; Allow simple structures to be returned by value.
-
-%s = type { i64, i64 }
-
-define %s @fred() #0 {
-; CHECK-LABEL: fred:
-; CHECK: mov.w #2314, 14(r12)
-; CHECK: mov.w #2828, 12(r12)
-; CHECK: mov.w #3342, 10(r12)
-; CHECK: mov.w #3840, 8(r12)
-; CHECK: mov.w #258, 6(r12)
-; CHECK: mov.w #772, 4(r12)
-; CHECK: mov.w #1286, 2(r12)
-; CHECK: mov.w #1800, 0(r12)
- ret %s {i64 72623859790382856, i64 651345242494996224}
-}
-
-attributes #0 = { nounwind }
diff --git a/test/CodeGen/MSP430/transient-stack-alignment.ll b/test/CodeGen/MSP430/transient-stack-alignment.ll
deleted file mode 100644
index cca83509cf4c..000000000000
--- a/test/CodeGen/MSP430/transient-stack-alignment.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
-target triple = "msp430---elf"
-
-define void @test() #0 {
-; CHECK-LABEL: test:
-; CHECK: sub.w #2, r1
- %1 = alloca i8, align 1
-; CHECK-NEXT: mov.b #0, 1(r1)
- store i8 0, i8* %1, align 1
-; CHECK-NEXT: add.w #2, r1
-; CHECK-NEXT: ret
- ret void
-}
-
-attributes #0 = { nounwind "no-frame-pointer-elim"="false" }
diff --git a/test/CodeGen/MSP430/umulo-16.ll b/test/CodeGen/MSP430/umulo-16.ll
deleted file mode 100644
index bd421379147e..000000000000
--- a/test/CodeGen/MSP430/umulo-16.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; RUN: llc < %s -march=msp430 | FileCheck %s
-target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
-target triple = "msp430"
-
-define void @foo(i16 %arg) unnamed_addr {
-entry-block:
- br i1 undef, label %bb2, label %bb3
-
-bb2: ; preds = %entry-block
- unreachable
-
-bb3: ; preds = %entry-block
- %0 = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 undef, i16 %arg)
-; CHECK: call
- %1 = extractvalue { i16, i1 } %0, 1
- %2 = call i1 @llvm.expect.i1(i1 %1, i1 false)
- br i1 %2, label %panic, label %bb5
-
-bb5: ; preds = %bb3
- unreachable
-
-panic: ; preds = %bb3
- unreachable
-}
-
-; Function Attrs: nounwind readnone
-declare i1 @llvm.expect.i1(i1, i1) #0
-
-; Function Attrs: nounwind readnone
-declare { i16, i1 } @llvm.umul.with.overflow.i16(i16, i16) #0
-
-attributes #0 = { nounwind readnone }
diff --git a/test/CodeGen/MSP430/vararg.ll b/test/CodeGen/MSP430/vararg.ll
deleted file mode 100644
index 6c8bceff5de9..000000000000
--- a/test/CodeGen/MSP430/vararg.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
-target triple = "msp430---elf"
-
-declare void @llvm.va_start(i8*) nounwind
-declare void @llvm.va_end(i8*) nounwind
-declare void @llvm.va_copy(i8*, i8*) nounwind
-
-define void @va_start(i16 %a, ...) nounwind {
-entry:
-; CHECK-LABEL: va_start:
-; CHECK: sub.w #2, r1
- %vl = alloca i8*, align 2
- %vl1 = bitcast i8** %vl to i8*
-; CHECK-NEXT: mov.w r1, [[REG:r[0-9]+]]
-; CHECK-NEXT: add.w #6, [[REG]]
-; CHECK-NEXT: mov.w [[REG]], 0(r1)
- call void @llvm.va_start(i8* %vl1)
- call void @llvm.va_end(i8* %vl1)
- ret void
-}
-
-define i16 @va_arg(i8* %vl) nounwind {
-entry:
-; CHECK-LABEL: va_arg:
- %vl.addr = alloca i8*, align 2
-; CHECK: mov.w r12, 0(r1)
- store i8* %vl, i8** %vl.addr, align 2
-; CHECK: mov.w r12, [[REG:r[0-9]+]]
-; CHECK-NEXT: add.w #2, [[REG]]
-; CHECK-NEXT: mov.w [[REG]], 0(r1)
- %0 = va_arg i8** %vl.addr, i16
-; CHECK-NEXT: mov.w 0(r12), r12
- ret i16 %0
-}
-
-define void @va_copy(i8* %vl) nounwind {
-entry:
-; CHECK-LABEL: va_copy:
- %vl.addr = alloca i8*, align 2
- %vl2 = alloca i8*, align 2
-; CHECK: mov.w r12, 2(r1)
- store i8* %vl, i8** %vl.addr, align 2
- %0 = bitcast i8** %vl2 to i8*
- %1 = bitcast i8** %vl.addr to i8*
-; CHECK-NEXT: mov.w r12, 0(r1)
- call void @llvm.va_copy(i8* %0, i8* %1)
- ret void
-}