aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/XCore
diff options
context:
space:
mode:
Diffstat (limited to 'test/CodeGen/XCore')
-rw-r--r--test/CodeGen/XCore/2008-11-17-Shl64.ll6
-rw-r--r--test/CodeGen/XCore/2009-01-08-Crash.ll12
-rw-r--r--test/CodeGen/XCore/2009-01-14-Remat-Crash.ll18
-rw-r--r--test/CodeGen/XCore/2009-03-27-v2f64-param.ll6
-rw-r--r--test/CodeGen/XCore/2009-07-15-store192.ll7
-rw-r--r--test/CodeGen/XCore/2010-02-25-LSR-Crash.ll26
-rw-r--r--test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll10
-rw-r--r--test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll20
-rw-r--r--test/CodeGen/XCore/DbgValueOtherTargets.test1
-rw-r--r--test/CodeGen/XCore/addsub64.ll59
-rw-r--r--test/CodeGen/XCore/aliases.ll34
-rw-r--r--test/CodeGen/XCore/align.ll15
-rw-r--r--test/CodeGen/XCore/alignment.ll9
-rw-r--r--test/CodeGen/XCore/ashr.ll76
-rw-r--r--test/CodeGen/XCore/atomic.ll91
-rw-r--r--test/CodeGen/XCore/basictest.ll6
-rw-r--r--test/CodeGen/XCore/bigstructret.ll74
-rw-r--r--test/CodeGen/XCore/byVal.ll73
-rw-r--r--test/CodeGen/XCore/call.ll10
-rw-r--r--test/CodeGen/XCore/codemodel.ll213
-rw-r--r--test/CodeGen/XCore/constants.ll19
-rw-r--r--test/CodeGen/XCore/dwarf_debug.ll37
-rw-r--r--test/CodeGen/XCore/epilogue_prologue.ll263
-rw-r--r--test/CodeGen/XCore/events.ll44
-rw-r--r--test/CodeGen/XCore/exception.ll125
-rw-r--r--test/CodeGen/XCore/float-intrinsics.ll171
-rw-r--r--test/CodeGen/XCore/fneg.ll9
-rw-r--r--test/CodeGen/XCore/getid.ll10
-rw-r--r--test/CodeGen/XCore/globals.ll129
-rw-r--r--test/CodeGen/XCore/indirectbr.ll45
-rw-r--r--test/CodeGen/XCore/inline-asm.ll53
-rw-r--r--test/CodeGen/XCore/ladd_lsub_combine.ll67
-rw-r--r--test/CodeGen/XCore/licm-ldwcp.ll18
-rw-r--r--test/CodeGen/XCore/linkage.ll49
-rw-r--r--test/CodeGen/XCore/lit.local.cfg3
-rw-r--r--test/CodeGen/XCore/llvm-intrinsics.ll361
-rw-r--r--test/CodeGen/XCore/load.ll50
-rw-r--r--test/CodeGen/XCore/memcpy.ll32
-rw-r--r--test/CodeGen/XCore/misc-intrinsics.ll75
-rw-r--r--test/CodeGen/XCore/mkmsk.ll11
-rw-r--r--test/CodeGen/XCore/mul64.ll50
-rw-r--r--test/CodeGen/XCore/offset_folding.ll42
-rw-r--r--test/CodeGen/XCore/private.ll21
-rw-r--r--test/CodeGen/XCore/ps-intrinsics.ll18
-rw-r--r--test/CodeGen/XCore/resources.ll257
-rw-r--r--test/CodeGen/XCore/resources_combine.ll93
-rw-r--r--test/CodeGen/XCore/scavenging.ll117
-rw-r--r--test/CodeGen/XCore/section-name.ll9
-rw-r--r--test/CodeGen/XCore/sext.ll32
-rw-r--r--test/CodeGen/XCore/shedulingPreference.ll25
-rw-r--r--test/CodeGen/XCore/sr-intrinsics.ll18
-rw-r--r--test/CodeGen/XCore/store.ll37
-rw-r--r--test/CodeGen/XCore/switch.ll24
-rw-r--r--test/CodeGen/XCore/switch_long.ll132
-rw-r--r--test/CodeGen/XCore/threads.ll145
-rw-r--r--test/CodeGen/XCore/tls.ll20
-rw-r--r--test/CodeGen/XCore/trampoline.ll39
-rw-r--r--test/CodeGen/XCore/trap.ll12
-rw-r--r--test/CodeGen/XCore/unaligned_load.ll34
-rw-r--r--test/CodeGen/XCore/unaligned_store.ll20
-rw-r--r--test/CodeGen/XCore/unaligned_store_combine.ll13
-rw-r--r--test/CodeGen/XCore/varargs.ll55
-rw-r--r--test/CodeGen/XCore/zext.ll10
-rw-r--r--test/CodeGen/XCore/zextfree.ll15
64 files changed, 0 insertions, 3575 deletions
diff --git a/test/CodeGen/XCore/2008-11-17-Shl64.ll b/test/CodeGen/XCore/2008-11-17-Shl64.ll
deleted file mode 100644
index 04b1b5a0016e..000000000000
--- a/test/CodeGen/XCore/2008-11-17-Shl64.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: llc < %s -march=xcore > %t1.s
-; PR3080
-define i64 @test(i64 %a) {
- %result = shl i64 %a, 1
- ret i64 %result
-}
diff --git a/test/CodeGen/XCore/2009-01-08-Crash.ll b/test/CodeGen/XCore/2009-01-08-Crash.ll
deleted file mode 100644
index 5eddbc33761c..000000000000
--- a/test/CodeGen/XCore/2009-01-08-Crash.ll
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: llc < %s -march=xcore > %t1.s
-;; This caused a compilation failure since the
-;; address arithmetic was folded into the LDWSP instruction,
-;; resulting in a negative offset which eliminateFrameIndex was
-;; unable to eliminate.
-define i32 @test(i32 %bar) nounwind readnone {
-entry:
- %bar_addr = alloca i32
- %0 = getelementptr i32, i32* %bar_addr, i32 -1
- %1 = load i32, i32* %0, align 4
- ret i32 %1
-}
diff --git a/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll b/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
deleted file mode 100644
index b2bbcb1183d1..000000000000
--- a/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=xcore > %t1.s
-; PR3324
-define double @f1(double %a, double %b, double %c, double %d, double %e, double %f, double %g) nounwind {
-entry:
- br i1 false, label %bb113, label %bb129
-
-bb113: ; preds = %entry
- ret double 0.000000e+00
-
-bb129: ; preds = %entry
- %tmp134 = fsub double %b, %a ; <double> [#uses=1]
- %tmp136 = fsub double %tmp134, %c ; <double> [#uses=1]
- %tmp138 = fadd double %tmp136, %d ; <double> [#uses=1]
- %tmp140 = fsub double %tmp138, %e ; <double> [#uses=1]
- %tmp142 = fadd double %tmp140, %f ; <double> [#uses=1]
- %tmp.0 = fmul double %tmp142, 0.000000e+00 ; <double> [#uses=1]
- ret double %tmp.0
-}
diff --git a/test/CodeGen/XCore/2009-03-27-v2f64-param.ll b/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
deleted file mode 100644
index e35a36a8a159..000000000000
--- a/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: llc < %s -march=xcore
-; PR3898
-
-define i32 @vector_param(<2 x double> %x) nounwind {
- ret i32 1
-}
diff --git a/test/CodeGen/XCore/2009-07-15-store192.ll b/test/CodeGen/XCore/2009-07-15-store192.ll
deleted file mode 100644
index 5278af8ac229..000000000000
--- a/test/CodeGen/XCore/2009-07-15-store192.ll
+++ /dev/null
@@ -1,7 +0,0 @@
-; RUN: llc < %s -march=xcore > %t1.s
-define void @store32(i8* %p) nounwind {
-entry:
- %0 = bitcast i8* %p to i192*
- store i192 0, i192* %0, align 4
- ret void
-}
diff --git a/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll b/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
deleted file mode 100644
index 693e6f0f136b..000000000000
--- a/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc < %s -march=xcore
-target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
-target triple = "xcore-xmos-elf"
-
-%0 = type { i32 }
-%struct.dwarf_fde = type <{ i32, i32, [0 x i8] }>
-%struct.object = type { i8*, i8*, i8*, %union.anon, %0, %struct.object* }
-%union.anon = type { %struct.dwarf_fde* }
-
-define %struct.dwarf_fde* @search_object(%struct.object* %ob, i8* %pc) {
-entry:
- br i1 undef, label %bb3.i15.i.i, label %bb2
-
-bb3.i15.i.i: ; preds = %bb3.i15.i.i, %entry
- %indvar.i.i.i = phi i32 [ %indvar.next.i.i.i, %bb3.i15.i.i ], [ 0, %entry ] ; <i32> [#uses=2]
- %tmp137 = sub i32 0, %indvar.i.i.i ; <i32> [#uses=1]
- %scevgep13.i.i.i = getelementptr i32, i32* undef, i32 %tmp137 ; <i32*> [#uses=2]
- %scevgep1314.i.i.i = bitcast i32* %scevgep13.i.i.i to %struct.dwarf_fde** ; <%struct.dwarf_fde**> [#uses=1]
- %0 = load %struct.dwarf_fde*, %struct.dwarf_fde** %scevgep1314.i.i.i, align 4 ; <%struct.dwarf_fde*> [#uses=0]
- store i32 undef, i32* %scevgep13.i.i.i
- %indvar.next.i.i.i = add i32 %indvar.i.i.i, 1 ; <i32> [#uses=1]
- br label %bb3.i15.i.i
-
-bb2: ; preds = %entry
- ret %struct.dwarf_fde* undef
-}
diff --git a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
deleted file mode 100644
index 40c9654371fd..000000000000
--- a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=xcore
-%struct.st = type <{ i8, i32, i8, i32, i8, i32 }>
-
-@x = external global %struct.st, align 4
-
-define i32 @test_entry() nounwind {
-entry:
- %0 = load i32, i32* getelementptr inbounds (%struct.st, %struct.st* @x, i32 0, i32 3), align 2
- ret i32 %0
-}
diff --git a/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll b/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
deleted file mode 100644
index 2a049639ce7e..000000000000
--- a/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-declare void @g()
-declare i8* @llvm.stacksave() nounwind
-declare void @llvm.stackrestore(i8*) nounwind
-
-define void @f(i32** %p, i32 %size) {
-allocas:
- %0 = call i8* @llvm.stacksave()
- %a = alloca i32, i32 %size
- store i32* %a, i32** %p
- call void @g()
- call void @llvm.stackrestore(i8* %0)
- ret void
-}
-; CHECK-LABEL: f:
-; CHECK: ldaw [[REGISTER:r[0-9]+]], {{r[0-9]+}}[-r1]
-; CHECK: set sp, [[REGISTER]]
-; CHECK: extsp 1
-; CHECK: bl g
diff --git a/test/CodeGen/XCore/DbgValueOtherTargets.test b/test/CodeGen/XCore/DbgValueOtherTargets.test
deleted file mode 100644
index 7c2ecd0312c6..000000000000
--- a/test/CodeGen/XCore/DbgValueOtherTargets.test
+++ /dev/null
@@ -1 +0,0 @@
-RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/test/CodeGen/XCore/addsub64.ll b/test/CodeGen/XCore/addsub64.ll
deleted file mode 100644
index 89271cea3338..000000000000
--- a/test/CodeGen/XCore/addsub64.ll
+++ /dev/null
@@ -1,59 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-define i64 @add64(i64 %a, i64 %b) {
- %result = add i64 %a, %b
- ret i64 %result
-}
-; CHECK: add64
-; CHECK: ldc r11, 0
-; CHECK-NEXT: ladd r2, r0, r0, r2, r11
-; CHECK-NEXT: ladd r2, r1, r1, r3, r2
-; CHECK-NEXT: retsp 0
-
-define i64 @sub64(i64 %a, i64 %b) {
- %result = sub i64 %a, %b
- ret i64 %result
-}
-; CHECK: sub64
-; CHECK: ldc r11, 0
-; CHECK-NEXT: lsub r2, r0, r0, r2, r11
-; CHECK-NEXT: lsub r2, r1, r1, r3, r2
-; CHECK-NEXT: retsp 0
-
-define i64 @maccu(i64 %a, i32 %b, i32 %c) {
-entry:
- %0 = zext i32 %b to i64
- %1 = zext i32 %c to i64
- %2 = mul i64 %1, %0
- %3 = add i64 %2, %a
- ret i64 %3
-}
-; CHECK-LABEL: maccu:
-; CHECK: maccu r1, r0, r3, r2
-; CHECK-NEXT: retsp 0
-
-define i64 @maccs(i64 %a, i32 %b, i32 %c) {
-entry:
- %0 = sext i32 %b to i64
- %1 = sext i32 %c to i64
- %2 = mul i64 %1, %0
- %3 = add i64 %2, %a
- ret i64 %3
-}
-; CHECK-LABEL: maccs:
-; CHECK: maccs r1, r0, r3, r2
-; CHECK-NEXT: retsp 0
-
-define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
-entry:
- %0 = zext i32 %a to i64
- %1 = zext i32 %b to i64
- %2 = zext i32 %c to i64
- %3 = zext i32 %d to i64
- %4 = mul i64 %1, %0
- %5 = add i64 %4, %2
- %6 = add i64 %5, %3
- ret i64 %6
-}
-; CHECK-LABEL: lmul:
-; CHECK: lmul r1, r0, r1, r0, r2, r3
-; CHECK-NEXT: retsp 0
diff --git a/test/CodeGen/XCore/aliases.ll b/test/CodeGen/XCore/aliases.ll
deleted file mode 100644
index 62427dad9b7c..000000000000
--- a/test/CodeGen/XCore/aliases.ll
+++ /dev/null
@@ -1,34 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-define void @a_val() nounwind {
- ret void
-}
-@b_val = constant i32 42, section ".cp.rodata"
-@c_val = global i32 42
-
-@a = alias void (), void ()* @a_val
-@b = alias i32, i32* @b_val
-@c = alias i32, i32* @c_val
-
-; CHECK-LABEL: a_addr:
-; CHECK: ldap r11, a
-; CHECK: retsp
-define void ()* @a_addr() nounwind {
-entry:
- ret void ()* @a
-}
-
-; CHECK-LABEL: b_addr:
-; CHECK: ldaw r11, cp[b]
-; CHECK: retsp
-define i32 *@b_addr() nounwind {
-entry:
- ret i32* @b
-}
-
-; CHECK-LABEL: c_addr:
-; CHECK: ldaw r0, dp[c]
-; CHECK: retsp
-define i32 *@c_addr() nounwind {
-entry:
- ret i32* @c
-}
diff --git a/test/CodeGen/XCore/align.ll b/test/CodeGen/XCore/align.ll
deleted file mode 100644
index 53efa3962909..000000000000
--- a/test/CodeGen/XCore/align.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; CHECK: .p2align 2
-; CHECK-LABEL: f:
-define void @f() nounwind {
-entry:
- ret void
-}
-
-; CHECK: .p2align 1
-; CHECK-LABEL: g:
-define void @g() nounwind optsize {
-entry:
- ret void
-}
diff --git a/test/CodeGen/XCore/alignment.ll b/test/CodeGen/XCore/alignment.ll
deleted file mode 100644
index 28bdf3b74208..000000000000
--- a/test/CodeGen/XCore/alignment.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
-
-; CHECK: emitPrologue unsupported alignment: 8
-define void @f() nounwind {
-entry:
- %BadAlignment = alloca i64, align 8
- ret void
-}
-
diff --git a/test/CodeGen/XCore/ashr.ll b/test/CodeGen/XCore/ashr.ll
deleted file mode 100644
index 78cb1440cc05..000000000000
--- a/test/CodeGen/XCore/ashr.ll
+++ /dev/null
@@ -1,76 +0,0 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
-define i32 @ashr(i32 %a, i32 %b) nounwind {
- %1 = ashr i32 %a, %b
- ret i32 %1
-}
-; CHECK-LABEL: ashr:
-; CHECK-NEXT: ashr r0, r0, r1
-
-define i32 @ashri1(i32 %a) nounwind {
- %1 = ashr i32 %a, 24
- ret i32 %1
-}
-; CHECK-LABEL: ashri1:
-; CHECK-NEXT: ashr r0, r0, 24
-
-define i32 @ashri2(i32 %a) nounwind {
- %1 = ashr i32 %a, 31
- ret i32 %1
-}
-; CHECK-LABEL: ashri2:
-; CHECK-NEXT: ashr r0, r0, 32
-
-define i32 @f1(i32 %a) nounwind nounwind {
- %1 = icmp slt i32 %a, 0
- br i1 %1, label %less, label %not_less
-less:
- ret i32 10
-not_less:
- ret i32 17
-}
-; CHECK-LABEL: f1:
-; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bt r0
-
-define i32 @f2(i32 %a) nounwind {
- %1 = icmp sge i32 %a, 0
- br i1 %1, label %greater, label %not_greater
-greater:
- ret i32 10
-not_greater:
- ret i32 17
-}
-; CHECK-LABEL: f2:
-; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bt r0
-
-define i32 @f3(i32 %a) nounwind {
- %1 = icmp slt i32 %a, 0
- %2 = select i1 %1, i32 10, i32 17
- ret i32 %2
-}
-; CHECK-LABEL: f3:
-; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bt r0
-; CHECK-NEXT: ldc r0, 17
-; CHECK: ldc r0, 10
-
-define i32 @f4(i32 %a) nounwind {
- %1 = icmp sge i32 %a, 0
- %2 = select i1 %1, i32 10, i32 17
- ret i32 %2
-}
-; CHECK-LABEL: f4:
-; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: bt r0
-; CHECK-NEXT: ldc r0, 10
-; CHECK: ldc r0, 17
-
-define i32 @f5(i32 %a) nounwind {
- %1 = icmp sge i32 %a, 0
- %2 = zext i1 %1 to i32
- ret i32 %2
-}
-; CHECK-LABEL: f5:
-; CHECK-NEXT: ashr r0, r0, 32
-; CHECK-NEXT: eq r0, r0, 0
diff --git a/test/CodeGen/XCore/atomic.ll b/test/CodeGen/XCore/atomic.ll
deleted file mode 100644
index 13579dbd8197..000000000000
--- a/test/CodeGen/XCore/atomic.ll
+++ /dev/null
@@ -1,91 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; CHECK-LABEL: atomic_fence
-; CHECK: #MEMBARRIER
-; CHECK: #MEMBARRIER
-; CHECK: #MEMBARRIER
-; CHECK: #MEMBARRIER
-; CHECK: retsp 0
-define void @atomic_fence() nounwind {
-entry:
- fence acquire
- fence release
- fence acq_rel
- fence seq_cst
- ret void
-}
-
-@pool = external global i64
-
-define void @atomicloadstore() nounwind {
-entry:
-; CHECK-LABEL: atomicloadstore
-
-; CHECK: ldw r[[R0:[0-9]+]], dp[pool]
-; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool]
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0
- %0 = load atomic i32, i32* bitcast (i64* @pool to i32*) acquire, align 4
-
-; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- %1 = load atomic i16, i16* bitcast (i64* @pool to i16*) acquire, align 2
-
-; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- %2 = load atomic i8, i8* bitcast (i64* @pool to i8*) acquire, align 1
-
-; CHECK-NEXT: ldw r4, dp[pool]
-; CHECK-NEXT: #MEMBARRIER
- %3 = load atomic i32, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
-
-; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- %4 = load atomic i16, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
-
-; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- %5 = load atomic i8, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: stw r[[R0]], dp[pool]
- store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]]
- store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]]
- store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: stw r4, dp[pool]
-; CHECK-NEXT: #MEMBARRIER
- store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
-
-; CHECK-NEXT: #MEMBARRIER
-; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]]
-; CHECK-NEXT: #MEMBARRIER
- store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
-
-; CHECK-NEXT: ldw r[[R0]], dp[pool]
-; CHECK-NEXT: stw r[[R0]], dp[pool]
-; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]]
-; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
-; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]]
-; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]]
- %6 = load atomic i32, i32* bitcast (i64* @pool to i32*) monotonic, align 4
- store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
- %7 = load atomic i16, i16* bitcast (i64* @pool to i16*) monotonic, align 2
- store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
- %8 = load atomic i8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
- store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
-
- ret void
-}
diff --git a/test/CodeGen/XCore/basictest.ll b/test/CodeGen/XCore/basictest.ll
deleted file mode 100644
index de5eaff08073..000000000000
--- a/test/CodeGen/XCore/basictest.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: llc < %s -march=xcore
-
-define i32 @test(i32 %X) {
- %tmp.1 = add i32 %X, 1
- ret i32 %tmp.1
-}
diff --git a/test/CodeGen/XCore/bigstructret.ll b/test/CodeGen/XCore/bigstructret.ll
deleted file mode 100644
index 567b37209195..000000000000
--- a/test/CodeGen/XCore/bigstructret.ll
+++ /dev/null
@@ -1,74 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-%0 = type { i32, i32, i32, i32 }
-%1 = type { i32, i32, i32, i32, i32 }
-
-; Structs of 4 words are returned in registers
-define internal %0 @ReturnBigStruct() nounwind readnone {
-entry:
- %0 = insertvalue %0 zeroinitializer, i32 12, 0
- %1 = insertvalue %0 %0, i32 24, 1
- %2 = insertvalue %0 %1, i32 48, 2
- %3 = insertvalue %0 %2, i32 24601, 3
- ret %0 %3
-}
-; CHECK-LABEL: ReturnBigStruct:
-; CHECK: ldc r0, 12
-; CHECK: ldc r1, 24
-; CHECK: ldc r2, 48
-; CHECK: ldc r3, 24601
-; CHECK: retsp 0
-
-; Structs of more than 4 words are partially returned in memory so long as the
-; function is not variadic.
-define { i32, i32, i32, i32, i32} @f(i32, i32, i32, i32, i32) nounwind readnone {
-; CHECK-LABEL: f:
-; CHECK: ldc [[REGISTER:r[0-9]+]], 5
-; CHECK-NEXT: stw [[REGISTER]], sp[2]
-; CHECK-NEXT: retsp 0
-body:
- ret { i32, i32, i32, i32, i32} { i32 undef, i32 undef, i32 undef, i32 undef, i32 5}
-}
-
-@x = external global i32
-@y = external global i32
-
-; Check we call a function returning more than 4 words correctly.
-define i32 @g() nounwind {
-; CHECK-LABEL: g:
-; CHECK: entsp 3
-; CHECK: ldc [[REGISTER:r[0-9]+]], 0
-; CHECK: stw [[REGISTER]], sp[1]
-; CHECK: bl f
-; CHECK-NEXT: ldw r0, sp[2]
-; CHECK-NEXT: retsp 3
-;
-body:
- %0 = call { i32, i32, i32, i32, i32 } @f(i32 0, i32 0, i32 0, i32 0, i32 0)
- %1 = extractvalue { i32, i32, i32, i32, i32 } %0, 4
- ret i32 %1
-}
-
-; Variadic functions return structs bigger than 4 words via a hidden
-; sret-parameter
-define internal %1 @ReturnBigStruct2(i32 %dummy, ...) nounwind readnone {
-entry:
- %0 = insertvalue %1 zeroinitializer, i32 12, 0
- %1 = insertvalue %1 %0, i32 24, 1
- %2 = insertvalue %1 %1, i32 48, 2
- %3 = insertvalue %1 %2, i32 24601, 3
- %4 = insertvalue %1 %3, i32 4321, 4
- ret %1 %4
-}
-; CHECK-LABEL: ReturnBigStruct2:
-; CHECK: ldc r1, 4321
-; CHECK: stw r1, r0[4]
-; CHECK: ldc r1, 24601
-; CHECK: stw r1, r0[3]
-; CHECK: ldc r1, 48
-; CHECK: stw r1, r0[2]
-; CHECK: ldc r1, 24
-; CHECK: stw r1, r0[1]
-; CHECK: ldc r1, 12
-; CHECK: stw r1, r0[0]
-; CHECK: retsp 0
diff --git a/test/CodeGen/XCore/byVal.ll b/test/CodeGen/XCore/byVal.ll
deleted file mode 100644
index df6c6d351d18..000000000000
--- a/test/CodeGen/XCore/byVal.ll
+++ /dev/null
@@ -1,73 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; CHECK-LABEL: f0Test
-; CHECK: entsp 1
-; CHECK: bl f0
-; CHECK: retsp 1
-%struct.st0 = type { [0 x i32] }
-declare void @f0(%struct.st0*) nounwind
-define void @f0Test(%struct.st0* byval %s0) nounwind {
-entry:
- call void @f0(%struct.st0* %s0) nounwind
- ret void
-}
-
-; CHECK-LABEL: f1Test
-; CHECK: entsp 13
-; CHECK: stw r4, sp[12]
-; CHECK: stw r5, sp[11]
-; CHECK: mov r4, r0
-; CHECK: ldaw r5, sp[1]
-; CHECK: ldc r2, 40
-; CHECK: mov r0, r5
-; CHECK: bl __memcpy_4
-; CHECK: mov r0, r5
-; CHECK: bl f1
-; CHECK: mov r0, r4
-; CHECK: ldw r5, sp[11]
-; CHECK: ldw r4, sp[12]
-; CHECK: retsp 13
-%struct.st1 = type { [10 x i32] }
-declare void @f1(%struct.st1*) nounwind
-define i32 @f1Test(i32 %i, %struct.st1* byval %s1) nounwind {
-entry:
- call void @f1(%struct.st1* %s1) nounwind
- ret i32 %i
-}
-
-; CHECK-LABEL: f2Test
-; CHECK: extsp 4
-; CHECK: stw lr, sp[1]
-; CHECK: stw r2, sp[3]
-; CHECK: stw r3, sp[4]
-; CHECK: ldw r0, r0[0]
-; CHECK: stw r0, sp[2]
-; CHECK: ldaw r2, sp[2]
-; CHECK: mov r0, r1
-; CHECK: mov r1, r2
-; CHECK: bl f2
-; CHECK: ldw lr, sp[1]
-; CHECK: ldaw sp, sp[4]
-; CHECK: retsp 0
-%struct.st2 = type { i32 }
-declare void @f2(i32, %struct.st2*) nounwind
-define void @f2Test(%struct.st2* byval %s2, i32 %i, ...) nounwind {
-entry:
- call void @f2(i32 %i, %struct.st2* %s2)
- ret void
-}
-
-; CHECK-LABEL: f3Test
-; CHECK: entsp 2
-; CHECK: ldc r1, 0
-; CHECK: ld8u r2, r0[r1]
-; CHECK: ldaw r0, sp[1]
-; CHECK: st8 r2, r0[r1]
-; CHECK: bl f
-; CHECK: retsp 2
-declare void @f3(i8*) nounwind
-define void @f3Test(i8* byval %v) nounwind {
-entry:
- call void @f3(i8* %v) nounwind
- ret void
-}
diff --git a/test/CodeGen/XCore/call.ll b/test/CodeGen/XCore/call.ll
deleted file mode 100644
index 06a12f144405..000000000000
--- a/test/CodeGen/XCore/call.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; CHECK-LABEL: bl_imm:
-; CHECK: ldw [[R0:r[0-9]+]], cp
-; CHECK: bla [[R0]]
-define void @bl_imm() nounwind {
-entry:
- tail call void inttoptr (i64 65536 to void ()*)() nounwind
- ret void
-}
diff --git a/test/CodeGen/XCore/codemodel.ll b/test/CodeGen/XCore/codemodel.ll
deleted file mode 100644
index 4e637995c5a8..000000000000
--- a/test/CodeGen/XCore/codemodel.ll
+++ /dev/null
@@ -1,213 +0,0 @@
-
-; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
-; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
-; BAD_CM: Target only supports CodeModel Small or Large
-
-
-; RUN: llc < %s -march=xcore -code-model=default | FileCheck %s
-; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s
-; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
-
-
-; CHECK-LABEL: test:
-; CHECK: zext r0, 1
-; CHECK: bt r0, [[JUMP:.LBB[0-9_]*]]
-; CHECK: ldaw r0, dp[A2]
-; CHECK: retsp 0
-; CHECK: [[JUMP]]
-; CHECK: ldaw r0, dp[A1]
-; CHECK: retsp 0
-; LARGE-LABEL: test:
-; LARGE: zext r0, 1
-; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
-; LARGE: mov r1, r11
-; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
-; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]]
-; LARGE: mov r11, r1
-; LARGE: [[JUMP]]
-; LARGE: ldw r0, r11[0]
-; LARGE: retsp 0
-@A1 = external global [50000 x i32]
-@A2 = external global [50000 x i32]
-define [50000 x i32]* @test(i1 %bool) nounwind {
-entry:
- %Addr = select i1 %bool, [50000 x i32]* @A1, [50000 x i32]* @A2
- ret [50000 x i32]* %Addr
-}
-
-
-; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK: .long 65536
-; CHECK: .text
-; CHECK-LABEL: f:
-; CHECK: ldc r1, 65532
-; CHECK: add r1, r0, r1
-; CHECK: ldw r1, r1[0]
-; CHECK: ldw r2, cp[.LCPI{{[0-9_]*}}]
-; CHECK: add r0, r0, r2
-; CHECK: ldw r0, r0[0]
-; CHECK: add r0, r1, r0
-; CHECK: ldw r1, dp[l]
-; CHECK: add r0, r0, r1
-; CHECK: ldw r1, dp[l+4]
-; CHECK: add r0, r0, r1
-; CHECK: ldw r1, dp[l+392]
-; CHECK: add r0, r0, r1
-; CHECK: ldw r1, dp[l+396]
-; CHECK: add r0, r0, r1
-; CHECK: ldw r1, dp[s]
-; CHECK: add r0, r0, r1
-; CHECK: ldw r1, dp[s+36]
-; CHECK: add r0, r0, r1
-; CHECK: retsp 0
-;
-; LARGE: .section .cp.rodata.cst4,"aMc",@progbits,4
-; LARGE: .long 65536
-; LARGE: .section .cp.rodata,"ac",@progbits
-; LARGE: .long l
-; LARGE: .long l+4
-; LARGE: .long l+392
-; LARGE: .long l+396
-; LARGE: .text
-; LARGE-LABEL: f:
-; LARGE: ldc r1, 65532
-; LARGE: add r1, r0, r1
-; LARGE: ldw r1, r1[0]
-; LARGE: ldw r2, cp[.LCPI{{[0-9_]*}}]
-; LARGE: add r0, r0, r2
-; LARGE: ldw r0, r0[0]
-; LARGE: add r0, r1, r0
-; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
-; LARGE: ldw r1, r1[0]
-; LARGE: add r0, r0, r1
-; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
-; LARGE: ldw r1, r1[0]
-; LARGE: add r0, r0, r1
-; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
-; LARGE: ldw r1, r1[0]
-; LARGE: add r0, r0, r1
-; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
-; LARGE: ldw r1, r1[0]
-; LARGE: add r0, r0, r1
-; LARGE: ldw r1, dp[s]
-; LARGE: add r0, r0, r1
-; LARGE: ldw r1, dp[s+36]
-; LARGE: add r0, r0, r1
-; LARGE: retsp 0
-define i32 @f(i32* %i) {
-entry:
- %0 = getelementptr inbounds i32, i32* %i, i32 16383
- %1 = load i32, i32* %0
- %2 = getelementptr inbounds i32, i32* %i, i32 16384
- %3 = load i32, i32* %2
- %4 = add nsw i32 %1, %3
- %5 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 0)
- %6 = add nsw i32 %4, %5
- %7 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 1)
- %8 = add nsw i32 %6, %7
- %9 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 98)
- %10 = add nsw i32 %8, %9
- %11 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 99)
- %12 = add nsw i32 %10, %11
- %13 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 0)
- %14 = add nsw i32 %12, %13
- %15 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 9)
- %16 = add nsw i32 %14, %15
- ret i32 %16
-}
-
-
-; CHECK-LABEL: UnknownSize:
-; CHECK: ldw r0, dp[NoSize+40]
-; CHECK-NEXT: retsp 0
-;
-; LARGE: .section .cp.rodata,"ac",@progbits
-; LARGE: .LCPI{{[0-9_]*}}
-; LARGE-NEXT: .long NoSize
-; LARGE-NEXT: .text
-; LARGE-LABEL: UnknownSize:
-; LARGE: ldw r0, cp[.LCPI{{[0-9_]*}}]
-; LARGE-NEXT: ldw r0, r0[0]
-; LARGE-NEXT: retsp 0
-@NoSize = external global [0 x i32]
-define i32 @UnknownSize() nounwind {
-entry:
- %0 = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @NoSize, i32 0, i32 10)
- ret i32 %0
-}
-
-
-; CHECK-LABEL: UnknownStruct:
-; CHECK: ldaw r0, dp[Unknown]
-; CHECK-NEXT: retsp 0
-;
-; LARGE: .section .cp.rodata,"ac",@progbits
-; LARGE: .LCPI{{[0-9_]*}}
-; LARGE-NEXT: .long Unknown
-; LARGE-NEXT: .text
-; LARGE-LABEL: UnknownStruct:
-; LARGE: ldw r0, cp[.LCPI{{[0-9_]*}}]
-; LARGE-NEXT: retsp 0
-%Struct = type opaque
-@Unknown = external global %Struct
-define %Struct* @UnknownStruct() nounwind {
-entry:
- ret %Struct* @Unknown
-}
-
-
-; CHECK: .section .dp.bss,"awd",@nobits
-; CHECK-LABEL: l:
-; CHECK: .space 400
-; LARGE: .section .dp.bss.large,"awd",@nobits
-; LARGE-LABEL: l:
-; LARGE: .space 400
-@l = global [100 x i32] zeroinitializer
-
-; CHECK-LABEL: s:
-; CHECK: .space 40
-; LARGE: .section .dp.bss,"awd",@nobits
-; LARGE-LABEL: s:
-; LARGE: .space 40
-@s = global [10 x i32] zeroinitializer
-
-; CHECK: .section .dp.rodata,"awd",@progbits
-; CHECK-LABEL: cl:
-; CHECK: .space 400
-; LARGE: .section .dp.rodata.large,"awd",@progbits
-; LARGE-LABEL: cl:
-; LARGE: .space 400
-@cl = constant [100 x i32] zeroinitializer
-
-; CHECK-LABEL: cs:
-; CHECK: .space 40
-; LARGE: .section .dp.rodata,"awd",@progbits
-; LARGE-LABEL: cs:
-; LARGE: .space 40
-@cs = constant [10 x i32] zeroinitializer
-
-; CHECK: .section .cp.rodata,"ac",@progbits
-; CHECK-LABEL: icl:
-; CHECK: .space 400
-; LARGE: .section .cp.rodata.large,"ac",@progbits
-; LARGE-LABEL: icl:
-; LARGE: .space 400
-@icl = internal constant [100 x i32] zeroinitializer
-
-; CHECK-LABEL: cs:
-; CHECK: .space 40
-; LARGE: .section .cp.rodata,"ac",@progbits
-; LARGE-LABEL: cs:
-; LARGE: .space 40
-@ics = internal constant [10 x i32] zeroinitializer
-
-; CHECK: .section .cp.namedsection,"ac",@progbits
-; CHECK-LABEL: cpsec:
-; CHECK: .long 0
-@cpsec = constant i32 0, section ".cp.namedsection"
-
-; CHECK: .section .dp.namedsection,"awd",@progbits
-; CHECK-LABEL: dpsec:
-; CHECK: .long 0
-@dpsec = global i32 0, section ".dp.namedsection"
-
diff --git a/test/CodeGen/XCore/constants.ll b/test/CodeGen/XCore/constants.ll
deleted file mode 100644
index c289bf94ce30..000000000000
--- a/test/CodeGen/XCore/constants.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-
-; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK: .LCPI0_0:
-; CHECK: .long 12345678
-; CHECK-LABEL: f:
-; CHECK: ldw r0, cp[.LCPI0_0]
-define i32 @f() {
-entry:
- ret i32 12345678
-}
-
-define i32 @g() {
-entry:
-; CHECK-LABEL: g:
-; CHECK: mkmsk r0, 1
-; CHECK: retsp 0
- ret i32 1;
-}
diff --git a/test/CodeGen/XCore/dwarf_debug.ll b/test/CodeGen/XCore/dwarf_debug.ll
deleted file mode 100644
index d9b2f24d9970..000000000000
--- a/test/CodeGen/XCore/dwarf_debug.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc < %s -mtriple=xcore-unknown-unknown -O0 | FileCheck %s
-
-; target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32"
-; target triple = "xcore"
-
-; CHECK-LABEL: f
-; CHECK: entsp 2
-; ...the prologue...
-; CHECK: .loc 1 2 0 prologue_end # test.c:2:0
-; CHECK: add r0, r0, 1
-; CHECK: retsp 2
-define i32 @f(i32 %a) !dbg !4 {
-entry:
- %a.addr = alloca i32, align 4
- store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !11, metadata !DIExpression()), !dbg !12
- %0 = load i32, i32* %a.addr, align 4, !dbg !12
- %add = add nsw i32 %0, 1, !dbg !12
- ret i32 %add, !dbg !12
-}
-
-declare void @llvm.dbg.declare(metadata, metadata, metadata)
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!9, !10}
-!0 = distinct !DICompileUnit(language: DW_LANG_C99, isOptimized: false, emissionKind: FullDebug, file: !1, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
-!1 = !DIFile(filename: "test.c", directory: "")
-!2 = !{}
-!4 = distinct !DISubprogram(name: "f", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, scopeLine: 2, file: !1, scope: !1, type: !6, variables: !2)
-!6 = !DISubroutineType(types: !7)
-!7 = !{!8, !8}
-!8 = !DIBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
-!9 = !{i32 2, !"Dwarf Version", i32 4}
-!10 = !{i32 2, !"Debug Info Version", i32 3}
-!11 = !DILocalVariable(name: "a", line: 2, arg: 1, scope: !4, file: !1, type: !8)
-!12 = !DILocation(line: 2, scope: !4)
-
diff --git a/test/CodeGen/XCore/epilogue_prologue.ll b/test/CodeGen/XCore/epilogue_prologue.ll
deleted file mode 100644
index aed49f4b67ba..000000000000
--- a/test/CodeGen/XCore/epilogue_prologue.ll
+++ /dev/null
@@ -1,263 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -disable-fp-elim | FileCheck %s -check-prefix=CHECKFP
-
-; When using SP for small frames, we don't need any scratch registers (SR).
-; When using SP for large frames, we may need two scratch registers.
-; When using FP, for large or small frames, we may need one scratch register.
-
-; FP + small frame: spill FP+SR = entsp 2
-; CHECKFP-LABEL: f1
-; CHECKFP: entsp 2
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: retsp 2
-;
-; !FP + small frame: no spills = no stack adjustment needed
-; CHECK-LABEL: f1
-; CHECK: stw lr, sp[0]
-; CHECK: ldw lr, sp[0]
-; CHECK-NEXT: retsp 0
-define void @f1() nounwind {
-entry:
- tail call void asm sideeffect "", "~{lr}"() nounwind
- ret void
-}
-
-
-; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1
-; CHECKFP-LABEL:f3
-; CHECKFP: entsp 3
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP-NEXT: stw [[REG:r[4-9]+]], r10[2]
-; CHECKFP-NEXT: mov [[REG]], r0
-; CHECKFP-NEXT: extsp 1
-; CHECKFP-NEXT: bl f2
-; CHECKFP-NEXT: ldaw sp, sp[1]
-; CHECKFP-NEXT: mov r0, [[REG]]
-; CHECKFP-NEXT: ldw [[REG]], r10[2]
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: retsp 3
-;
-; !FP + small frame: spill R0+LR = entsp 2
-; CHECK-LABEL: f3
-; CHECK: entsp 2
-; CHECK-NEXT: stw [[REG:r[4-9]+]], sp[1]
-; CHECK-NEXT: mov [[REG]], r0
-; CHECK-NEXT: bl f2
-; CHECK-NEXT: mov r0, [[REG]]
-; CHECK-NEXT: ldw [[REG]], sp[1]
-; CHECK-NEXT: retsp 2
-declare void @f2()
-define i32 @f3(i32 %i) nounwind {
-entry:
- call void @f2()
- ret i32 %i
-}
-
-
-; FP + large frame: spill FP+SR = entsp 2 + 100000
-; CHECKFP-LABEL: f4
-; CHECKFP: entsp 65535
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_offset 15, 0
-; CHECKFP-NEXT: extsp 34467
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 400008
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_offset 10, -400004
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_register 10
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: ldaw sp, sp[65535]
-; CHECKFP-NEXT: retsp 34467
-;
-; !FP + large frame: spill SR+SR = entsp 2 + 100000
-; CHECK-LABEL: f4
-; CHECK: entsp 65535
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 262140
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_offset 15, 0
-; CHECK-NEXT: extsp 34467
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 400008
-; CHECK-NEXT: ldaw sp, sp[65535]
-; CHECK-NEXT: retsp 34467
-define void @f4() {
-entry:
- %0 = alloca [100000 x i32]
- ret void
-}
-
-
-; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1
-; CHECKFP: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECKFP-NEXT: .p2align 2
-; CHECKFP-NEXT: .LCPI[[CNST0:[0-9_]+]]:
-; CHECKFP-NEXT: .long 200002
-; CHECKFP-NEXT: .LCPI[[CNST1:[0-9_]+]]:
-; CHECKFP-NEXT: .long 200001
-; CHECKFP-NEXT: .text
-; CHECKFP-LABEL: f6
-; CHECKFP: entsp 65535
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_offset 15, 0
-; CHECKFP-NEXT: extsp 65535
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 524280
-; CHECKFP-NEXT: extsp 65535
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 786420
-; CHECKFP-NEXT: extsp 3398
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_offset 800012
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_offset 10, -800008
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_def_cfa_register 10
-; CHECKFP-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
-; CHECKFP-NEXT: stw [[REG:r[4-9]+]], r10[r1]
-; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
-; CHECKFP-NEXT: .cfi_offset 4, -4
-; CHECKFP-NEXT: mov [[REG]], r0
-; CHECKFP-NEXT: extsp 1
-; CHECKFP-NEXT: ldaw r0, r10[2]
-; CHECKFP-NEXT: bl f5
-; CHECKFP-NEXT: ldaw sp, sp[1]
-; CHECKFP-NEXT: ldw r1, cp[.LCPI3_1]
-; CHECKFP-NEXT: ldaw r0, r10[r1]
-; CHECKFP-NEXT: extsp 1
-; CHECKFP-NEXT: bl f5
-; CHECKFP-NEXT: ldaw sp, sp[1]
-; CHECKFP-NEXT: mov r0, [[REG]]
-; CHECKFP-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
-; CHECKFP-NEXT: ldw [[REG]], r10[r1]
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: ldaw sp, sp[65535]
-; CHECKFP-NEXT: ldaw sp, sp[65535]
-; CHECKFP-NEXT: ldaw sp, sp[65535]
-; CHECKFP-NEXT: retsp 3398
-;
-; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
-; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK-NEXT: .p2align 2
-; CHECK-NEXT: .LCPI[[CNST0:[0-9_]+]]:
-; CHECK-NEXT: .long 200003
-; CHECK-NEXT: .LCPI[[CNST1:[0-9_]+]]:
-; CHECK-NEXT: .long 200002
-; CHECK-NEXT: .text
-; CHECK-LABEL: f6
-; CHECK: entsp 65535
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 262140
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_offset 15, 0
-; CHECK-NEXT: extsp 65535
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 524280
-; CHECK-NEXT: extsp 65535
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 786420
-; CHECK-NEXT: extsp 3399
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_def_cfa_offset 800016
-; CHECK-NEXT: ldaw r1, sp[0]
-; CHECK-NEXT: ldw r2, cp[.LCPI[[CNST0]]]
-; CHECK-NEXT: stw [[REG:r[4-9]+]], r1[r2]
-; CHECK-NEXT: .Lcfi{{[0-9]+}}
-; CHECK-NEXT: .cfi_offset 4, -4
-; CHECK-NEXT: mov [[REG]], r0
-; CHECK-NEXT: ldaw r0, sp[3]
-; CHECK-NEXT: bl f5
-; CHECK-NEXT: ldaw r0, sp[0]
-; CHECK-NEXT: ldw r1, cp[.LCPI[[CNST1]]]
-; CHECK-NEXT: ldaw r0, r0[r1]
-; CHECK-NEXT: bl f5
-; CHECK-NEXT: mov r0, [[REG]]
-; CHECK-NEXT: ldaw [[REG]], sp[0]
-; CHECK-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
-; CHECK-NEXT: ldw [[REG]], [[REG]][r1]
-; CHECK-NEXT: ldaw sp, sp[65535]
-; CHECK-NEXT: ldaw sp, sp[65535]
-; CHECK-NEXT: ldaw sp, sp[65535]
-; CHECK-NEXT: retsp 3399
-declare void @f5(i32*)
-define i32 @f6(i32 %i) {
-entry:
- %0 = alloca [200000 x i32]
- %1 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 0
- call void @f5(i32* %1)
- %2 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 199999
- call void @f5(i32* %2)
- ret i32 %i
-}
-
-; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1
-; CHECKFP-LABEL:f8
-; CHECKFP: entsp 258
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP-NEXT: mkmsk [[REG:r[0-9]+]], 8
-; CHECKFP-NEXT: ldaw r0, r10{{\[}}[[REG]]{{\]}}
-; CHECKFP-NEXT: extsp 1
-; CHECKFP-NEXT: bl f5
-; CHECKFP-NEXT: ldaw sp, sp[1]
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: retsp 258
-;
-; !FP + large frame: spill SR+SR+LR = entsp 3 + 256
-; CHECK-LABEL:f8
-; CHECK: entsp 257
-; CHECK-NEXT: ldaw r0, sp[254]
-; CHECK-NEXT: bl f5
-; CHECK-NEXT: retsp 257
-define void @f8() nounwind {
-entry:
- %0 = alloca [256 x i32]
- %1 = getelementptr inbounds [256 x i32], [256 x i32]* %0, i32 0, i32 253
- call void @f5(i32* %1)
- ret void
-}
-
-; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1
-; CHECKFP-LABEL:f9
-; CHECKFP: entsp 32770
-; CHECKFP-NEXT: stw r10, sp[1]
-; CHECKFP-NEXT: ldaw r10, sp[0]
-; CHECKFP-NEXT: ldc [[REG:r[0-9]+]], 32767
-; CHECKFP-NEXT: ldaw r0, r10{{\[}}[[REG]]{{\]}}
-; CHECKFP-NEXT: extsp 1
-; CHECKFP-NEXT: bl f5
-; CHECKFP-NEXT: ldaw sp, sp[1]
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: retsp 32770
-;
-; !FP + large frame: spill SR+SR+LR = entsp 3 + 32768
-; CHECK-LABEL:f9
-; CHECK: entsp 32771
-; CHECK-NEXT: ldaw r0, sp[32768]
-; CHECK-NEXT: bl f5
-; CHECK-NEXT: retsp 32771
-define void @f9() nounwind {
-entry:
- %0 = alloca [32768 x i32]
- %1 = getelementptr inbounds [32768 x i32], [32768 x i32]* %0, i32 0, i32 32765
- call void @f5(i32* %1)
- ret void
-}
diff --git a/test/CodeGen/XCore/events.ll b/test/CodeGen/XCore/events.ll
deleted file mode 100644
index 672669be5602..000000000000
--- a/test/CodeGen/XCore/events.ll
+++ /dev/null
@@ -1,44 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare i8* @llvm.xcore.waitevent()
-declare i8* @llvm.xcore.checkevent(i8*)
-declare void @llvm.xcore.clre()
-
-define i32 @f(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: f:
-entry:
-; CHECK: clre
- call void @llvm.xcore.clre()
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
- %goto_addr = call i8* @llvm.xcore.waitevent()
-; CHECK: waiteu
- indirectbr i8* %goto_addr, [label %L1, label %L2]
-L1:
- br label %ret
-L2:
- br label %ret
-ret:
- %retval = phi i32 [1, %L1], [2, %L2]
- ret i32 %retval
-}
-
-define i32 @g(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: g:
-entry:
-; CHECK: clre
- call void @llvm.xcore.clre()
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
- %goto_addr = call i8* @llvm.xcore.checkevent(i8 *blockaddress(@f, %L2))
-; CHECK: setsr 1
-; CHECK: clrsr 1
- indirectbr i8* %goto_addr, [label %L1, label %L2]
-L1:
- br label %ret
-L2:
- br label %ret
-ret:
- %retval = phi i32 [1, %L1], [2, %L2]
- ret i32 %retval
-}
diff --git a/test/CodeGen/XCore/exception.ll b/test/CodeGen/XCore/exception.ll
deleted file mode 100644
index dd7e012f7378..000000000000
--- a/test/CodeGen/XCore/exception.ll
+++ /dev/null
@@ -1,125 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-declare void @g()
-declare i32 @__gxx_personality_v0(...)
-declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
-declare i8* @__cxa_begin_catch(i8*)
-declare void @__cxa_end_catch()
-declare i8* @__cxa_allocate_exception(i32)
-declare void @__cxa_throw(i8*, i8*, i8*)
-
-@_ZTIi = external constant i8*
-@_ZTId = external constant i8*
-
-; CHECK-LABEL: fn_typeid:
-; CHECK: .cfi_startproc
-; CHECK: mkmsk r0, 1
-; CHECK: retsp 0
-; CHECK: .cfi_endproc
-define i32 @fn_typeid() {
-entry:
- %0 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) nounwind
- ret i32 %0
-}
-
-; CHECK-LABEL: fn_throw
-; CHECK: .cfi_startproc
-; CHECK: entsp 1
-; CHECK: .cfi_def_cfa_offset 4
-; CHECK: .cfi_offset 15, 0
-; CHECK: ldc r0, 4
-; CHECK: bl __cxa_allocate_exception
-; CHECK: ldaw r1, dp[_ZTIi]
-; CHECK: ldc r2, 0
-; CHECK: bl __cxa_throw
-define void @fn_throw() {
-entry:
- %0 = call i8* @__cxa_allocate_exception(i32 4) nounwind
- call void @__cxa_throw(i8* %0, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn
- unreachable
-}
-
-; CHECK-LABEL: fn_catch:
-; CHECK-NEXT: [[START:.L[a-zA-Z0-9_]+]]
-; CHECK: .cfi_startproc
-; CHECK: .cfi_personality 0, __gxx_personality_v0
-; CHECK: .cfi_lsda 0, [[LSDA:.L[a-zA-Z0-9_]+]]
-; CHECK: entsp 4
-; CHECK: .cfi_def_cfa_offset 16
-; CHECK: .cfi_offset 15, 0
-define void @fn_catch() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
-entry:
-
-; N.B. we alloc no variables, hence force compiler to spill
-; CHECK: stw r4, sp[3]
-; CHECK: .cfi_offset 4, -4
-; CHECK: stw r5, sp[2]
-; CHECK: .cfi_offset 5, -8
-; CHECK: stw r6, sp[1]
-; CHECK: .cfi_offset 6, -12
-; CHECK: [[PRE_G:.L[a-zA-Z0-9_]+]]
-; CHECK: bl g
-; CHECK: [[POST_G:.L[a-zA-Z0-9_]+]]
-; CHECK: [[RETURN:.L[a-zA-Z0-9_]+]]
-; CHECK: ldw r6, sp[1]
-; CHECK: ldw r5, sp[2]
-; CHECK: ldw r4, sp[3]
-; CHECK: retsp 4
- invoke void @g() to label %cont unwind label %lpad
-cont:
- ret void
-
-; CHECK: {{.L[a-zA-Z0-9_]+}}
-; CHECK: [[LANDING:.L[a-zA-Z0-9_]+]]
-; CHECK: mov r5, r1
-; CHECK: mov r4, r0
-; CHECK: bl __cxa_begin_catch
-; CHECK: ldw r6, r0[0]
-; CHECK: bl __cxa_end_catch
-lpad:
- %0 = landingpad { i8*, i32 }
- cleanup
- catch i8* bitcast (i8** @_ZTIi to i8*)
- catch i8* bitcast (i8** @_ZTId to i8*)
- %1 = extractvalue { i8*, i32 } %0, 0
- %2 = extractvalue { i8*, i32 } %0, 1
- %3 = call i8* @__cxa_begin_catch(i8* %1) nounwind
- %4 = bitcast i8* %3 to i32*
- %5 = load i32, i32* %4
- call void @__cxa_end_catch() nounwind
-
-; CHECK: eq r0, r6, r5
-; CHECK: bf r0, [[RETURN]]
-; CHECK: mov r0, r4
-; CHECK: bl _Unwind_Resume
-; CHECK: [[END:.L[a-zA-Z0-9_]+]]
-; CHECK: .cfi_endproc
- %6 = icmp eq i32 %5, %2
- br i1 %6, label %Resume, label %Exit
-Resume:
- resume { i8*, i32 } %0
-Exit:
- ret void
-}
-
-; CHECK: [[LSDA]]:
-; CHECK: .byte 255
-; CHECK: .byte 0
-; CHECK: .asciiz
-; CHECK: .byte 3
-; CHECK: .byte 26
-; CHECK: .long [[PRE_G]]-[[START]]
-; CHECK: .long [[POST_G]]-[[PRE_G]]
-; CHECK: .long [[LANDING]]-[[START]]
-; CHECK: .byte 5
-; CHECK: .long [[POST_G]]-[[START]]
-; CHECK: .long [[END]]-[[POST_G]]
-; CHECK: .long 0
-; CHECK: .byte 0
-; CHECK: .byte 0
-; CHECK: .byte 1
-; CHECK: .byte 125
-; CHECK: .byte 2
-; CHECK: .byte 125
-; CHECK: .long _ZTIi
-; CHECK: .long _ZTId
diff --git a/test/CodeGen/XCore/float-intrinsics.ll b/test/CodeGen/XCore/float-intrinsics.ll
deleted file mode 100644
index 588203655ff8..000000000000
--- a/test/CodeGen/XCore/float-intrinsics.ll
+++ /dev/null
@@ -1,171 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-declare double @llvm.cos.f64(double)
-declare double @llvm.exp.f64(double)
-declare double @llvm.exp2.f64(double)
-declare double @llvm.log.f64(double)
-declare double @llvm.log10.f64(double)
-declare double @llvm.log2.f64(double)
-declare double @llvm.pow.f64(double, double)
-declare double @llvm.powi.f64(double, i32)
-declare double @llvm.sin.f64(double)
-declare double @llvm.sqrt.f64(double)
-
-define double @cos(double %F) {
-; CHECK-LABEL: cos:
-; CHECK: bl cos
- %result = call double @llvm.cos.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.cos.f32(float)
-
-; CHECK-LABEL: cosf:
-; CHECK: bl cosf
-define float @cosf(float %F) {
- %result = call float @llvm.cos.f32(float %F)
- ret float %result
-}
-
-define double @exp(double %F) {
-; CHECK-LABEL: exp:
-; CHECK: bl exp
- %result = call double @llvm.exp.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.exp.f32(float)
-
-define float @expf(float %F) {
-; CHECK-LABEL: expf:
-; CHECK: bl expf
- %result = call float @llvm.exp.f32(float %F)
- ret float %result
-}
-
-define double @exp2(double %F) {
-; CHECK-LABEL: exp2:
-; CHECK: bl exp2
- %result = call double @llvm.exp2.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.exp2.f32(float)
-
-define float @exp2f(float %F) {
-; CHECK-LABEL: exp2f:
-; CHECK: bl exp2f
- %result = call float @llvm.exp2.f32(float %F)
- ret float %result
-}
-
-define double @log(double %F) {
-; CHECK-LABEL: log:
-; CHECK: bl log
- %result = call double @llvm.log.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.log.f32(float)
-
-define float @logf(float %F) {
-; CHECK-LABEL: logf:
-; CHECK: bl logf
- %result = call float @llvm.log.f32(float %F)
- ret float %result
-}
-
-define double @log10(double %F) {
-; CHECK-LABEL: log10:
-; CHECK: bl log10
- %result = call double @llvm.log10.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.log10.f32(float)
-
-define float @log10f(float %F) {
-; CHECK-LABEL: log10f:
-; CHECK: bl log10f
- %result = call float @llvm.log10.f32(float %F)
- ret float %result
-}
-
-define double @log2(double %F) {
-; CHECK-LABEL: log2:
-; CHECK: bl log2
- %result = call double @llvm.log2.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.log2.f32(float)
-
-define float @log2f(float %F) {
-; CHECK-LABEL: log2f:
-; CHECK: bl log2f
- %result = call float @llvm.log2.f32(float %F)
- ret float %result
-}
-
-define double @pow(double %F, double %power) {
-; CHECK-LABEL: pow:
-; CHECK: bl pow
- %result = call double @llvm.pow.f64(double %F, double %power)
- ret double %result
-}
-
-declare float @llvm.pow.f32(float, float)
-
-define float @powf(float %F, float %power) {
-; CHECK-LABEL: powf:
-; CHECK: bl powf
- %result = call float @llvm.pow.f32(float %F, float %power)
- ret float %result
-}
-
-define double @powi(double %F, i32 %power) {
-; CHECK-LABEL: powi:
-; CHECK: bl __powidf2
- %result = call double @llvm.powi.f64(double %F, i32 %power)
- ret double %result
-}
-
-declare float @llvm.powi.f32(float, i32)
-
-define float @powif(float %F, i32 %power) {
-; CHECK-LABEL: powif:
-; CHECK: bl __powisf2
- %result = call float @llvm.powi.f32(float %F, i32 %power)
- ret float %result
-}
-
-define double @sin(double %F) {
-; CHECK-LABEL: sin:
-; CHECK: bl sin
- %result = call double @llvm.sin.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.sin.f32(float)
-
-define float @sinf(float %F) {
-; CHECK-LABEL: sinf:
-; CHECK: bl sinf
- %result = call float @llvm.sin.f32(float %F)
- ret float %result
-}
-
-define double @sqrt(double %F) {
-; CHECK-LABEL: sqrt:
-; CHECK: bl sqrt
- %result = call double @llvm.sqrt.f64(double %F)
- ret double %result
-}
-
-declare float @llvm.sqrt.f32(float)
-
-define float @sqrtf(float %F) {
-; CHECK-LABEL: sqrtf:
-; CHECK: bl sqrtf
- %result = call float @llvm.sqrt.f32(float %F)
- ret float %result
-}
diff --git a/test/CodeGen/XCore/fneg.ll b/test/CodeGen/XCore/fneg.ll
deleted file mode 100644
index 20433da3bbe5..000000000000
--- a/test/CodeGen/XCore/fneg.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-define i1 @test(double %F, double %G) nounwind {
-entry:
-; CHECK-LABEL: test:
-; CHECK: xor
- %0 = fsub double -0.000000e+00, %F
- %1 = fcmp olt double %G, %0
- ret i1 %1
-}
diff --git a/test/CodeGen/XCore/getid.ll b/test/CodeGen/XCore/getid.ll
deleted file mode 100644
index da80e10a0a66..000000000000
--- a/test/CodeGen/XCore/getid.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-declare i32 @llvm.xcore.getid()
-
-define i32 @test() {
-; CHECK-LABEL: test:
-; CHECK: get r11, id
-; CHECK-NEXT: mov r0, r11
- %result = call i32 @llvm.xcore.getid()
- ret i32 %result
-}
diff --git a/test/CodeGen/XCore/globals.ll b/test/CodeGen/XCore/globals.ll
deleted file mode 100644
index 04e135c25cae..000000000000
--- a/test/CodeGen/XCore/globals.ll
+++ /dev/null
@@ -1,129 +0,0 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-
-define i32 *@addr_G1() {
-entry:
-; CHECK-LABEL: addr_G1:
-; CHECK: ldaw r0, dp[G1]
- ret i32* @G1
-}
-
-define i32 *@addr_G2() {
-entry:
-; CHECK-LABEL: addr_G2:
-; CHECK: ldaw r0, dp[G2]
- ret i32* @G2
-}
-
-define i32 *@addr_G3() {
-entry:
-; CHECK-LABEL: addr_G3:
-; CHECK: ldaw r0, dp[G3]
- ret i32* @G3
-}
-
-define i32 *@addr_iG3() {
-entry:
-; CHECK-LABEL: addr_iG3:
-; CHECK: ldaw r11, cp[iG3]
-; CHECK: mov r0, r11
- ret i32* @iG3
-}
-
-define i32 **@addr_G4() {
-entry:
-; CHECK-LABEL: addr_G4:
-; CHECK: ldaw r0, dp[G4]
- ret i32** @G4
-}
-
-define i32 **@addr_G5() {
-entry:
-; CHECK-LABEL: addr_G5:
-; CHECK: ldaw r0, dp[G5]
- ret i32** @G5
-}
-
-define i32 **@addr_iG5() {
-entry:
-; CHECK-LABEL: addr_iG5:
-; CHECK: ldaw r11, cp[iG5]
-; CHECK: mov r0, r11
- ret i32** @iG5
-}
-
-define i32 **@addr_G6() {
-entry:
-; CHECK-LABEL: addr_G6:
-; CHECK: ldaw r0, dp[G6]
- ret i32** @G6
-}
-
-define i32 **@addr_G7() {
-entry:
-; CHECK-LABEL: addr_G7:
-; CHECK: ldaw r0, dp[G7]
- ret i32** @G7
-}
-
-define i32 **@addr_iG7() {
-entry:
-; CHECK-LABEL: addr_iG7:
-; CHECK: ldaw r11, cp[iG7]
-; CHECK: mov r0, r11
- ret i32** @iG7
-}
-
-define i32 *@addr_G8() {
-entry:
-; CHECK-LABEL: addr_G8:
-; CHECK: ldaw r0, dp[G8]
- ret i32* @G8
-}
-
-@G1 = global i32 4712
-; CHECK: .section .dp.data,"awd",@progbits
-; CHECK: G1:
-
-@G2 = global i32 0
-; CHECK: .section .dp.bss,"awd",@nobits
-; CHECK: G2:
-
-@G3 = unnamed_addr constant i32 9401
-; CHECK: .section .dp.rodata,"awd",@progbits
-; CHECK: G3:
-
-@iG3 = internal constant i32 9401
-; CHECK: .section .cp.rodata,"ac",@progbits
-; CHECK: iG3:
-
-@G4 = global i32* @G1
-; CHECK: .section .dp.data,"awd",@progbits
-; CHECK: G4:
-
-@G5 = unnamed_addr constant i32* @G1
-; CHECK: .section .dp.rodata,"awd",@progbits
-; CHECK: G5:
-
-@iG5 = internal unnamed_addr constant i32* @G1
-; CHECK: .section .cp.rodata,"ac",@progbits
-; CHECK: iG5:
-
-@G6 = global i32* @G8
-; CHECK: .section .dp.data,"awd",@progbits
-; CHECK: G6:
-
-@G7 = unnamed_addr constant i32* @G8
-; CHECK: .section .dp.rodata,"awd",@progbits
-; CHECK: G7:
-
-@iG7 = internal unnamed_addr constant i32* @G8
-; CHECK: .section .cp.rodata,"ac",@progbits
-; CHECK: iG7:
-
-@G8 = global i32 9312
-; CHECK: .section .dp.data,"awd",@progbits
-; CHECK: G8:
-
-@array = global [10 x i16] zeroinitializer, align 2
-; CHECK: .globl array.globound
-; CHECK: array.globound = 10
diff --git a/test/CodeGen/XCore/indirectbr.ll b/test/CodeGen/XCore/indirectbr.ll
deleted file mode 100644
index 9723cdcbdf14..000000000000
--- a/test/CodeGen/XCore/indirectbr.ll
+++ /dev/null
@@ -1,45 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-@nextaddr = global i8* null ; <i8**> [#uses=2]
-@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
-
-define internal i32 @foo(i32 %i) nounwind {
-; CHECK-LABEL: foo:
-entry:
- %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2]
- %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
- br i1 %1, label %bb3, label %bb2
-
-bb2: ; preds = %entry, %bb3
- %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
-; CHECK: bau
- indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
-
-bb3: ; preds = %entry
- %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
- %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1]
- br label %bb2
-
-L5: ; preds = %bb2
- br label %L4
-
-L4: ; preds = %L5, %bb2
- %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
- br label %L3
-
-L3: ; preds = %L4, %bb2
- %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
- br label %L2
-
-L2: ; preds = %L3, %bb2
- %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
- %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
- br label %L1
-
-L1: ; preds = %L2, %bb2
- %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
-; CHECK: ldap r11, .Ltmp0
-; CHECK: stw r11, dp[nextaddr]
- store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
- ret i32 %res.3
-}
diff --git a/test/CodeGen/XCore/inline-asm.ll b/test/CodeGen/XCore/inline-asm.ll
deleted file mode 100644
index e9f5b5769997..000000000000
--- a/test/CodeGen/XCore/inline-asm.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; CHECK-LABEL: f1:
-; CHECK: foo r0
-define i32 @f1() nounwind {
-entry:
- %asmtmp = tail call i32 asm sideeffect "foo $0", "=r"() nounwind
- ret i32 %asmtmp
-}
-
-; CHECK-LABEL: f2:
-; CHECK: foo 5
-define void @f2() nounwind {
-entry:
- tail call void asm sideeffect "foo $0", "i"(i32 5) nounwind
- ret void
-}
-
-; CHECK-LABEL: f3:
-; CHECK: foo 42
-define void @f3() nounwind {
-entry:
- tail call void asm sideeffect "foo ${0:c}", "i"(i32 42) nounwind
- ret void
-}
-
-; CHECK-LABEL: f4:
-; CHECK: foo -99
-define void @f4() nounwind {
-entry:
- tail call void asm sideeffect "foo ${0:n}", "i"(i32 99) nounwind
- ret void
-}
-
-@x = external global i32
-@y = external global i32, section ".cp.rodata"
-
-; CHECK-LABEL: f5:
-; CHECK: ldw r0, dp[x]
-; CHECK: retsp 0
-define i32 @f5() nounwind {
-entry:
- %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* @x) nounwind
- ret i32 %asmtmp
-}
-
-; CHECK-LABEL: f6:
-; CHECK: ldw r0, cp[y]
-; CHECK: retsp 0
-define i32 @f6() nounwind {
-entry:
- %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* @y) nounwind
- ret i32 %asmtmp
-}
diff --git a/test/CodeGen/XCore/ladd_lsub_combine.ll b/test/CodeGen/XCore/ladd_lsub_combine.ll
deleted file mode 100644
index b75e30db863d..000000000000
--- a/test/CodeGen/XCore/ladd_lsub_combine.ll
+++ /dev/null
@@ -1,67 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-; Only needs one ladd
-define i64 @f1(i32 %x, i32 %y) nounwind {
-entry:
- %0 = zext i32 %x to i64 ; <i64> [#uses=1]
- %1 = zext i32 %y to i64 ; <i64> [#uses=1]
- %2 = add i64 %1, %0 ; <i64> [#uses=1]
- ret i64 %2
-}
-; CHECK-LABEL: f1:
-; CHECK: ldc r2, 0
-; CHECK-NEXT: ladd r1, r0, r1, r0, r2
-; CHECK-NEXT: retsp 0
-
-; Only needs one lsub and one neg
-define i64 @f2(i32 %x, i32 %y) nounwind {
-entry:
- %0 = zext i32 %x to i64 ; <i64> [#uses=1]
- %1 = zext i32 %y to i64 ; <i64> [#uses=1]
- %2 = sub i64 %1, %0 ; <i64> [#uses=1]
- ret i64 %2
-}
-; CHECK-LABEL: f2:
-; CHECK: ldc r2, 0
-; CHECK-NEXT: lsub r1, r0, r1, r0, r2
-; CHECK-NEXT: neg r1, r1
-; CHECK-NEXT: retsp 0
-
-; Should compile to one ladd and one add
-define i64 @f3(i64 %x, i32 %y) nounwind {
-entry:
- %0 = zext i32 %y to i64 ; <i64> [#uses=1]
- %1 = add i64 %x, %0 ; <i64> [#uses=1]
- ret i64 %1
-}
-; CHECK-LABEL: f3:
-; CHECK: ldc r3, 0
-; CHECK-NEXT: ladd r2, r0, r0, r2, r3
-; CHECK-NEXT: add r1, r1, r2
-; CHECK-NEXT: retsp 0
-
-; Should compile to one ladd and one add
-define i64 @f4(i32 %x, i64 %y) nounwind {
-entry:
- %0 = zext i32 %x to i64 ; <i64> [#uses=1]
- %1 = add i64 %0, %y ; <i64> [#uses=1]
- ret i64 %1
-}
-; CHECK-LABEL: f4:
-; CHECK: ldc r3, 0
-; CHECK-NEXT: ladd r1, r0, r0, r1, r3
-; CHECK-NEXT: add r1, r2, r1
-; CHECK-NEXT: retsp 0
-
-; Should compile to one lsub and one sub
-define i64 @f5(i64 %x, i32 %y) nounwind {
-entry:
- %0 = zext i32 %y to i64 ; <i64> [#uses=1]
- %1 = sub i64 %x, %0 ; <i64> [#uses=1]
- ret i64 %1
-}
-; CHECK-LABEL: f5:
-; CHECK: ldc r3, 0
-; CHECK-NEXT: lsub r2, r0, r0, r2, r3
-; CHECK-NEXT: sub r1, r1, r2
-; CHECK-NEXT: retsp 0
diff --git a/test/CodeGen/XCore/licm-ldwcp.ll b/test/CodeGen/XCore/licm-ldwcp.ll
deleted file mode 100644
index f98c0eb56276..000000000000
--- a/test/CodeGen/XCore/licm-ldwcp.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
-
-; MachineLICM should hoist the LDWCP out of the loop.
-
-; CHECK-LABEL: f:
-; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
-; CHECK-NEXT: .LBB0_1:
-; CHECK-NEXT: stw [[REG]], r0[0]
-; CHECK-NEXT: bu .LBB0_1
-
-define void @f(i32* nocapture %p) noreturn nounwind {
-entry:
- br label %bb
-
-bb: ; preds = %bb, %entry
- store volatile i32 525509670, i32* %p, align 4
- br label %bb
-}
diff --git a/test/CodeGen/XCore/linkage.ll b/test/CodeGen/XCore/linkage.ll
deleted file mode 100644
index ff07a261fc50..000000000000
--- a/test/CodeGen/XCore/linkage.ll
+++ /dev/null
@@ -1,49 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; CHECK: .weak fd
-define weak void @fd() {
- call void @fr(i32* @gd, i32* @gr)
- ret void
-}
-
-; CHECK-NOT: .hidden test_hidden
-declare hidden void @test_hidden_declaration()
-define hidden void @test_hidden() {
- call void @test_hidden_declaration()
- unreachable
-}
-
-; CHECK-NOT: .protected
-define protected void @test_protected() {
- unreachable
-}
-
-; CHECK: .globl array.globound
-; CHECK: array.globound = 2
-; CHECK: .weak array.globound
-; CHECK: .globl array
-; CHECK: .weak array
-@array = weak global [2 x i32] zeroinitializer
-
-; CHECK: .globl ac.globound
-; CHECK: ac.globound = 2
-; CHECK: .weak ac.globound
-; CHECK: .globl ac
-; CHECK: .weak ac
-@ac = common global [2 x i32] zeroinitializer
-
-; CHECK: .globl gd
-; CHECK: .weak gd
-@gd = weak global i32 0
-
-; CHECK: .globl gc
-; CHECK: .weak gc
-@gc = common global i32 0
-
-; CHECK-NOT: .hidden test_hidden_declaration
-
-; CHECK: .weak fr
-declare extern_weak void @fr(i32*, i32*)
-
-; CHECK: .weak gr
-@gr = extern_weak global i32
diff --git a/test/CodeGen/XCore/lit.local.cfg b/test/CodeGen/XCore/lit.local.cfg
deleted file mode 100644
index 0b947bbbb850..000000000000
--- a/test/CodeGen/XCore/lit.local.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-if not 'XCore' in config.root.targets:
- config.unsupported = True
-
diff --git a/test/CodeGen/XCore/llvm-intrinsics.ll b/test/CodeGen/XCore/llvm-intrinsics.ll
deleted file mode 100644
index b7868d350b4a..000000000000
--- a/test/CodeGen/XCore/llvm-intrinsics.ll
+++ /dev/null
@@ -1,361 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -disable-fp-elim | FileCheck %s -check-prefix=CHECKFP
-
-declare i8* @llvm.frameaddress(i32) nounwind readnone
-declare i8* @llvm.returnaddress(i32) nounwind
-declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
-declare void @llvm.eh.return.i32(i32, i8*) nounwind
-declare void @llvm.eh.unwind.init() nounwind
-
-define i8* @FA0() nounwind {
-entry:
-; CHECK-LABEL: FA0
-; CHECK: ldaw r0, sp[0]
-; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.frameaddress(i32 0)
- ret i8* %0
-}
-
-define i8* @FA1() nounwind {
-entry:
-; CHECK-LABEL: FA1
-; CHECK: entsp 100
-; CHECK-NEXT: ldaw r0, sp[0]
-; CHECK-NEXT: retsp 100
- %0 = alloca [100 x i32]
- %1 = call i8* @llvm.frameaddress(i32 0)
- ret i8* %1
-}
-
-define i8* @RA0() nounwind {
-entry:
-; CHECK-LABEL: RA0
-; CHECK: stw lr, sp[0]
-; CHECK-NEXT: ldw r0, sp[0]
-; CHECK-NEXT: ldw lr, sp[0]
-; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.returnaddress(i32 0)
- ret i8* %0
-}
-
-define i8* @RA1() nounwind {
-entry:
-; CHECK-LABEL: RA1
-; CHECK: entsp 100
-; CHECK-NEXT: ldw r0, sp[100]
-; CHECK-NEXT: retsp 100
- %0 = alloca [100 x i32]
- %1 = call i8* @llvm.returnaddress(i32 0)
- ret i8* %1
-}
-
-; test FRAME_TO_ARGS_OFFSET lowering
-define i8* @FTAO0() nounwind {
-entry:
-; CHECK-LABEL: FTAO0
-; CHECK: ldc r0, 0
-; CHECK-NEXT: ldaw r1, sp[0]
-; CHECK-NEXT: add r0, r1, r0
-; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
- ret i8* %0
-}
-
-define i8* @FTAO1() nounwind {
-entry:
-; CHECK-LABEL: FTAO1
-; CHECK: entsp 100
-; CHECK-NEXT: ldc r0, 400
-; CHECK-NEXT: ldaw r1, sp[0]
-; CHECK-NEXT: add r0, r1, r0
-; CHECK-NEXT: retsp 100
- %0 = alloca [100 x i32]
- %1 = call i8* @llvm.eh.dwarf.cfa(i32 0)
- ret i8* %1
-}
-
-define i8* @EH0(i32 %offset, i8* %handler) {
-entry:
-; CHECK-LABEL: EH0
-; CHECK: entsp 2
-; CHECK: .cfi_def_cfa_offset 8
-; CHECK: .cfi_offset 15, 0
-; CHECK: .cfi_offset 1, -8
-; CHECK: .cfi_offset 0, -4
-; CHECK: ldc r2, 8
-; CHECK-NEXT: ldaw r3, sp[0]
-; CHECK-NEXT: add r2, r3, r2
-; CHECK-NEXT: add r2, r2, r0
-; CHECK-NEXT: mov r3, r1
-; CHECK-NEXT: ldw r1, sp[0]
-; CHECK-NEXT: ldw r0, sp[1]
-; CHECK-NEXT: set sp, r2
-; CHECK-NEXT: bau r3
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
- unreachable
-}
-
-declare void @foo(...)
-define i8* @EH1(i32 %offset, i8* %handler) {
-entry:
-; CHECK-LABEL: EH1
-; CHECK: entsp 5
-; CHECK: .cfi_def_cfa_offset 20
-; CHECK: .cfi_offset 15, 0
-; CHECK: .cfi_offset 1, -16
-; CHECK: .cfi_offset 0, -12
-; CHECK: stw r4, sp[4]
-; CHECK: .cfi_offset 4, -4
-; CHECK: stw r5, sp[3]
-; CHECK: .cfi_offset 5, -8
-; CHECK: mov r4, r1
-; CHECK-NEXT: mov r5, r0
-; CHECK-NEXT: bl foo
-; CHECK-NEXT: ldc r0, 20
-; CHECK-NEXT: ldaw r1, sp[0]
-; CHECK-NEXT: add r0, r1, r0
-; CHECK-NEXT: add r2, r0, r5
-; CHECK-NEXT: mov r3, r4
-; CHECK-NEXT: ldw r5, sp[3]
-; CHECK-NEXT: ldw r4, sp[4]
-; CHECK-NEXT: ldw r1, sp[1]
-; CHECK-NEXT: ldw r0, sp[2]
-; CHECK-NEXT: set sp, r2
-; CHECK-NEXT: bau r3
- call void (...) @foo()
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
- unreachable
-}
-
-@offset = external constant i32
-@handler = external constant i8
-define i8* @EH2(i32 %r0, i32 %r1, i32 %r2, i32 %r3) {
-entry:
-; CHECK-LABEL: EH2
-; CHECK: entsp 3
-; CHECK: bl foo
-; CHECK-NEXT: ldw r0, dp[offset]
-; CHECK-NEXT: ldc r1, 12
-; CHECK-NEXT: ldaw r2, sp[0]
-; CHECK-NEXT: add r1, r2, r1
-; CHECK-NEXT: add r2, r1, r0
-; CHECK-NEXT: ldaw r3, dp[handler]
-; CHECK-NEXT: ldw r1, sp[1]
-; CHECK-NEXT: ldw r0, sp[2]
-; CHECK-NEXT: set sp, r2
-; CHECK-NEXT: bau r3
- call void (...) @foo()
- %0 = load i32, i32* @offset
- call void @llvm.eh.return.i32(i32 %0, i8* @handler)
- unreachable
-}
-
-
-; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6
-; But we dont actually spill or restore R0:1
-; CHECKFP-LABEL: Unwind0:
-; CHECKFP: entsp 10
-; CHECKFP: stw r10, sp[1]
-; CHECKFP: ldaw r10, sp[0]
-; CHECKFP: stw r4, r10[9]
-; CHECKFP: stw r5, r10[8]
-; CHECKFP: stw r6, r10[7]
-; CHECKFP: stw r7, r10[6]
-; CHECKFP: stw r8, r10[5]
-; CHECKFP: stw r9, r10[4]
-; CHECKFP: ldw r9, r10[4]
-; CHECKFP: ldw r8, r10[5]
-; CHECKFP: ldw r7, r10[6]
-; CHECKFP: ldw r6, r10[7]
-; CHECKFP: ldw r5, r10[8]
-; CHECKFP: ldw r4, r10[9]
-; CHECKFP: set sp, r10
-; CHECKFP: ldw r10, sp[1]
-; CHECKFP: retsp 10
-;
-; !FP: spill R0:1+R4:10 = entsp 2+7
-; But we dont actually spill or restore R0:1
-; CHECK-LABEL: Unwind0:
-; CHECK: entsp 9
-; CHECK: stw r4, sp[8]
-; CHECK: stw r5, sp[7]
-; CHECK: stw r6, sp[6]
-; CHECK: stw r7, sp[5]
-; CHECK: stw r8, sp[4]
-; CHECK: stw r9, sp[3]
-; CHECK: stw r10, sp[2]
-; CHECK: ldw r10, sp[2]
-; CHECK: ldw r9, sp[3]
-; CHECK: ldw r8, sp[4]
-; CHECK: ldw r7, sp[5]
-; CHECK: ldw r6, sp[6]
-; CHECK: ldw r5, sp[7]
-; CHECK: ldw r4, sp[8]
-; CHECK: retsp 9
-define void @Unwind0() {
- call void @llvm.eh.unwind.init()
- ret void
-}
-
-
-; FP: spill FP+SR+R0:1+R4:9+LR = entsp 2+2+6 + extsp 1
-; But we dont actually spill or restore R0:1
-; CHECKFP-LABEL: Unwind1:
-; CHECKFP: entsp 10
-; CHECKFP: stw r10, sp[1]
-; CHECKFP: ldaw r10, sp[0]
-; CHECKFP: stw r4, r10[9]
-; CHECKFP: stw r5, r10[8]
-; CHECKFP: stw r6, r10[7]
-; CHECKFP: stw r7, r10[6]
-; CHECKFP: stw r8, r10[5]
-; CHECKFP: stw r9, r10[4]
-; CHECKFP: extsp 1
-; CHECKFP: bl foo
-; CHECKFP: ldaw sp, sp[1]
-; CHECKFP: ldw r9, r10[4]
-; CHECKFP: ldw r8, r10[5]
-; CHECKFP: ldw r7, r10[6]
-; CHECKFP: ldw r6, r10[7]
-; CHECKFP: ldw r5, r10[8]
-; CHECKFP: ldw r4, r10[9]
-; CHECKFP: set sp, r10
-; CHECKFP: ldw r10, sp[1]
-; CHECKFP: retsp 10
-;
-; !FP: spill R0:1+R4:10+LR = entsp 2+7+1
-; But we dont actually spill or restore R0:1
-; CHECK-LABEL: Unwind1:
-; CHECK: entsp 10
-; CHECK: stw r4, sp[9]
-; CHECK: stw r5, sp[8]
-; CHECK: stw r6, sp[7]
-; CHECK: stw r7, sp[6]
-; CHECK: stw r8, sp[5]
-; CHECK: stw r9, sp[4]
-; CHECK: stw r10, sp[3]
-; CHECK: bl foo
-; CHECK: ldw r10, sp[3]
-; CHECK: ldw r9, sp[4]
-; CHECK: ldw r8, sp[5]
-; CHECK: ldw r7, sp[6]
-; CHECK: ldw r6, sp[7]
-; CHECK: ldw r5, sp[8]
-; CHECK: ldw r4, sp[9]
-; CHECK: retsp 10
-define void @Unwind1() {
- call void (...) @foo()
- call void @llvm.eh.unwind.init()
- ret void
-}
-
-; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6
-; We dont spill R0:1
-; We only restore R0:1 during eh.return
-; CHECKFP-LABEL: UnwindEH:
-; CHECKFP: entsp 10
-; CHECKFP: .cfi_def_cfa_offset 40
-; CHECKFP: .cfi_offset 15, 0
-; CHECKFP: stw r10, sp[1]
-; CHECKFP: .cfi_offset 10, -36
-; CHECKFP: ldaw r10, sp[0]
-; CHECKFP: .cfi_def_cfa_register 10
-; CHECKFP: .cfi_offset 1, -32
-; CHECKFP: .cfi_offset 0, -28
-; CHECKFP: stw r4, r10[9]
-; CHECKFP: .cfi_offset 4, -4
-; CHECKFP: stw r5, r10[8]
-; CHECKFP: .cfi_offset 5, -8
-; CHECKFP: stw r6, r10[7]
-; CHECKFP: .cfi_offset 6, -12
-; CHECKFP: stw r7, r10[6]
-; CHECKFP: .cfi_offset 7, -16
-; CHECKFP: stw r8, r10[5]
-; CHECKFP: .cfi_offset 8, -20
-; CHECKFP: stw r9, r10[4]
-; CHECKFP: .cfi_offset 9, -24
-; CHECKFP: bt r0, .LBB{{[0-9_]+}}
-; CHECKFP: ldw r9, r10[4]
-; CHECKFP-NEXT: ldw r8, r10[5]
-; CHECKFP-NEXT: ldw r7, r10[6]
-; CHECKFP-NEXT: ldw r6, r10[7]
-; CHECKFP-NEXT: ldw r5, r10[8]
-; CHECKFP-NEXT: ldw r4, r10[9]
-; CHECKFP-NEXT: set sp, r10
-; CHECKFP-NEXT: ldw r10, sp[1]
-; CHECKFP-NEXT: retsp 10
-; CHECKFP: .LBB{{[0-9_]+}}
-; CHECKFP-NEXT: ldc r2, 40
-; CHECKFP-NEXT: add r2, r10, r2
-; CHECKFP-NEXT: add r2, r2, r0
-; CHECKFP-NEXT: mov r3, r1
-; CHECKFP-NEXT: ldw r9, r10[4]
-; CHECKFP-NEXT: ldw r8, r10[5]
-; CHECKFP-NEXT: ldw r7, r10[6]
-; CHECKFP-NEXT: ldw r6, r10[7]
-; CHECKFP-NEXT: ldw r5, r10[8]
-; CHECKFP-NEXT: ldw r4, r10[9]
-; CHECKFP-NEXT: ldw r1, sp[2]
-; CHECKFP-NEXT: ldw r0, sp[3]
-; CHECKFP-NEXT: set sp, r2
-; CHECKFP-NEXT: bau r3
-;
-; !FP: spill R0:1+R4:10 = entsp 2+7
-; We dont spill R0:1
-; We only restore R0:1 during eh.return
-; CHECK-LABEL: UnwindEH:
-; CHECK: entsp 9
-; CHECK: .cfi_def_cfa_offset 36
-; CHECK: .cfi_offset 15, 0
-; CHECK: .cfi_offset 1, -36
-; CHECK: .cfi_offset 0, -32
-; CHECK: stw r4, sp[8]
-; CHECK: .cfi_offset 4, -4
-; CHECK: stw r5, sp[7]
-; CHECK: .cfi_offset 5, -8
-; CHECK: stw r6, sp[6]
-; CHECK: .cfi_offset 6, -12
-; CHECK: stw r7, sp[5]
-; CHECK: .cfi_offset 7, -16
-; CHECK: stw r8, sp[4]
-; CHECK: .cfi_offset 8, -20
-; CHECK: stw r9, sp[3]
-; CHECK: .cfi_offset 9, -24
-; CHECK: stw r10, sp[2]
-; CHECK: .cfi_offset 10, -28
-; CHECK: bt r0, .LBB{{[0-9_]+}}
-; CHECK: ldw r10, sp[2]
-; CHECK-NEXT: ldw r9, sp[3]
-; CHECK-NEXT: ldw r8, sp[4]
-; CHECK-NEXT: ldw r7, sp[5]
-; CHECK-NEXT: ldw r6, sp[6]
-; CHECK-NEXT: ldw r5, sp[7]
-; CHECK-NEXT: ldw r4, sp[8]
-; CHECK-NEXT: retsp 9
-; CHECK: .LBB{{[0-9_]+}}
-; CHECK-NEXT: ldc r2, 36
-; CHECK-NEXT: ldaw r3, sp[0]
-; CHECK-NEXT: add r2, r3, r2
-; CHECK-NEXT: add r2, r2, r0
-; CHECK-NEXT: mov r3, r1
-; CHECK-NEXT: ldw r10, sp[2]
-; CHECK-NEXT: ldw r9, sp[3]
-; CHECK-NEXT: ldw r8, sp[4]
-; CHECK-NEXT: ldw r7, sp[5]
-; CHECK-NEXT: ldw r6, sp[6]
-; CHECK-NEXT: ldw r5, sp[7]
-; CHECK-NEXT: ldw r4, sp[8]
-; CHECK-NEXT: ldw r1, sp[0]
-; CHECK-NEXT: ldw r0, sp[1]
-; CHECK-NEXT: set sp, r2
-; CHECK-NEXT: bau r3
-define void @UnwindEH(i32 %offset, i8* %handler) {
- call void @llvm.eh.unwind.init()
- %cmp = icmp eq i32 %offset, 0
- br i1 %cmp, label %normal, label %eh
-eh:
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
- unreachable
-normal:
- ret void
-}
diff --git a/test/CodeGen/XCore/load.ll b/test/CodeGen/XCore/load.ll
deleted file mode 100644
index bba7f72301f9..000000000000
--- a/test/CodeGen/XCore/load.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-define i32 @load32(i32* %p, i32 %offset) nounwind {
-entry:
-; CHECK-LABEL: load32:
-; CHECK: ldw r0, r0[r1]
- %0 = getelementptr i32, i32* %p, i32 %offset
- %1 = load i32, i32* %0, align 4
- ret i32 %1
-}
-
-define i32 @load32_imm(i32* %p) nounwind {
-entry:
-; CHECK-LABEL: load32_imm:
-; CHECK: ldw r0, r0[11]
- %0 = getelementptr i32, i32* %p, i32 11
- %1 = load i32, i32* %0, align 4
- ret i32 %1
-}
-
-define i32 @load16(i16* %p, i32 %offset) nounwind {
-entry:
-; CHECK-LABEL: load16:
-; CHECK: ld16s r0, r0[r1]
-; CHECK-NOT: sext
- %0 = getelementptr i16, i16* %p, i32 %offset
- %1 = load i16, i16* %0, align 2
- %2 = sext i16 %1 to i32
- ret i32 %2
-}
-
-define i32 @load8(i8* %p, i32 %offset) nounwind {
-entry:
-; CHECK-LABEL: load8:
-; CHECK: ld8u r0, r0[r1]
-; CHECK-NOT: zext
- %0 = getelementptr i8, i8* %p, i32 %offset
- %1 = load i8, i8* %0, align 1
- %2 = zext i8 %1 to i32
- ret i32 %2
-}
-
-@GConst = internal constant i32 42
-define i32 @load_cp() nounwind {
-entry:
-; CHECK-LABEL: load_cp:
-; CHECK: ldw r0, cp[GConst]
- %0 = load i32, i32* @GConst
- ret i32 %0
-}
diff --git a/test/CodeGen/XCore/memcpy.ll b/test/CodeGen/XCore/memcpy.ll
deleted file mode 100644
index fe424c50cb28..000000000000
--- a/test/CodeGen/XCore/memcpy.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; Optimize memcpy to __memcpy_4 if src, dst and size are all 4 byte aligned.
-define void @f1(i8* %dst, i8* %src, i32 %n) nounwind {
-; CHECK-LABEL: f1:
-; CHECK: bl __memcpy_4
-entry:
- %0 = shl i32 %n, 2
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %0, i32 4, i1 false)
- ret void
-}
-
-; Can't optimize - size is not a multiple of 4.
-define void @f2(i8* %dst, i8* %src, i32 %n) nounwind {
-; CHECK-LABEL: f2:
-; CHECK: bl memcpy
-entry:
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %n, i32 4, i1 false)
- ret void
-}
-
-; Can't optimize - alignment is not a multiple of 4.
-define void @f3(i8* %dst, i8* %src, i32 %n) nounwind {
-; CHECK-LABEL: f3:
-; CHECK: bl memcpy
-entry:
- %0 = shl i32 %n, 2
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %0, i32 2, i1 false)
- ret void
-}
-
-declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
diff --git a/test/CodeGen/XCore/misc-intrinsics.ll b/test/CodeGen/XCore/misc-intrinsics.ll
deleted file mode 100644
index 30d7493eb503..000000000000
--- a/test/CodeGen/XCore/misc-intrinsics.ll
+++ /dev/null
@@ -1,75 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-%0 = type { i32, i32 }
-
-declare i32 @llvm.xcore.bitrev(i32)
-declare i32 @llvm.xcore.crc32(i32, i32, i32)
-declare %0 @llvm.xcore.crc8(i32, i32, i32)
-declare i32 @llvm.xcore.zext(i32, i32)
-declare i32 @llvm.xcore.sext(i32, i32)
-declare i32 @llvm.xcore.geted()
-declare i32 @llvm.xcore.getet()
-
-define i32 @bitrev(i32 %val) {
-; CHECK-LABEL: bitrev:
-; CHECK: bitrev r0, r0
- %result = call i32 @llvm.xcore.bitrev(i32 %val)
- ret i32 %result
-}
-
-define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
-; CHECK-LABEL: crc32:
-; CHECK: crc32 r0, r1, r2
- %result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
- ret i32 %result
-}
-
-define %0 @crc8(i32 %crc, i32 %data, i32 %poly) {
-; CHECK-LABEL: crc8:
-; CHECK: crc8 r0, r1, r1, r2
- %result = call %0 @llvm.xcore.crc8(i32 %crc, i32 %data, i32 %poly)
- ret %0 %result
-}
-
-define i32 @zext(i32 %a, i32 %b) {
-; CHECK-LABEL: zext:
-; CHECK: zext r0, r1
- %result = call i32 @llvm.xcore.zext(i32 %a, i32 %b)
- ret i32 %result
-}
-
-define i32 @zexti(i32 %a) {
-; CHECK-LABEL: zexti:
-; CHECK: zext r0, 4
- %result = call i32 @llvm.xcore.zext(i32 %a, i32 4)
- ret i32 %result
-}
-
-define i32 @sext(i32 %a, i32 %b) {
-; CHECK-LABEL: sext:
-; CHECK: sext r0, r1
- %result = call i32 @llvm.xcore.sext(i32 %a, i32 %b)
- ret i32 %result
-}
-
-define i32 @sexti(i32 %a) {
-; CHECK-LABEL: sexti:
-; CHECK: sext r0, 4
- %result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
- ret i32 %result
-}
-
-define i32 @geted() {
-; CHECK-LABEL: geted:
-; CHECK: get r11, ed
-; CHECK-NEXT: mov r0, r11
- %result = call i32 @llvm.xcore.geted()
- ret i32 %result
-}
-
-define i32 @getet() {
-; CHECK-LABEL: getet:
-; CHECK: get r11, et
-; CHECK-NEXT: mov r0, r11
- %result = call i32 @llvm.xcore.getet()
- ret i32 %result
-}
diff --git a/test/CodeGen/XCore/mkmsk.ll b/test/CodeGen/XCore/mkmsk.ll
deleted file mode 100644
index bcec32d75522..000000000000
--- a/test/CodeGen/XCore/mkmsk.ll
+++ /dev/null
@@ -1,11 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-define i32 @f(i32) nounwind {
-; CHECK-LABEL: f:
-; CHECK: mkmsk r0, r0
-; CHECK-NEXT: retsp 0
-entry:
- %1 = shl i32 1, %0
- %2 = add i32 %1, -1
- ret i32 %2
-}
diff --git a/test/CodeGen/XCore/mul64.ll b/test/CodeGen/XCore/mul64.ll
deleted file mode 100644
index cfc98553d58b..000000000000
--- a/test/CodeGen/XCore/mul64.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -regalloc=basic | FileCheck %s
-define i64 @umul_lohi(i32 %a, i32 %b) {
-entry:
- %0 = zext i32 %a to i64
- %1 = zext i32 %b to i64
- %2 = mul i64 %1, %0
- ret i64 %2
-}
-; CHECK-LABEL: umul_lohi:
-; CHECK: ldc [[REG:r[0-9]+]], 0
-; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
-; CHECK-NEXT: retsp 0
-
-define i64 @smul_lohi(i32 %a, i32 %b) {
-entry:
- %0 = sext i32 %a to i64
- %1 = sext i32 %b to i64
- %2 = mul i64 %1, %0
- ret i64 %2
-}
-; CHECK-LABEL: smul_lohi:
-; CHECK: ldc
-; CHECK-NEXT: mov
-; CHECK-NEXT: maccs
-; CHECK: retsp 0
-
-define i64 @mul64(i64 %a, i64 %b) {
-entry:
- %0 = mul i64 %a, %b
- ret i64 %0
-}
-; CHECK-LABEL: mul64:
-; CHECK: ldc
-; CHECK-NEXT: lmul
-; CHECK-NEXT: mul
-; CHECK-NEXT: lmul
-
-define i64 @mul64_2(i64 %a, i32 %b) {
-entry:
- %0 = zext i32 %b to i64
- %1 = mul i64 %a, %0
- ret i64 %1
-}
-; CHECK-LABEL: mul64_2:
-; CHECK: ldc
-; CHECK-NEXT: lmul
-; CHECK-NEXT: mul
-; CHECK-NEXT: add r1,
-; CHECK: retsp 0
diff --git a/test/CodeGen/XCore/offset_folding.ll b/test/CodeGen/XCore/offset_folding.ll
deleted file mode 100644
index ab29ad587a50..000000000000
--- a/test/CodeGen/XCore/offset_folding.ll
+++ /dev/null
@@ -1,42 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-@a = external constant [0 x i32], section ".cp.rodata"
-@b = external global [0 x i32]
-
-define i32 *@f1() nounwind {
-entry:
-; CHECK-LABEL: f1:
-; CHECK: ldaw r11, cp[a+4]
-; CHECK: mov r0, r11
- %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 1
- ret i32* %0
-}
-
-define i32 *@f2() nounwind {
-entry:
-; CHECK-LABEL: f2:
-; CHECK: ldaw r0, dp[b+4]
- %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 1
- ret i32* %0
-}
-
-; Don't fold negative offsets into cp / dp accesses to avoid a relocation
-; error if the address + addend is less than the start of the cp / dp.
-
-define i32 *@f3() nounwind {
-entry:
-; CHECK-LABEL: f3:
-; CHECK: ldaw r11, cp[a]
-; CHECK: sub r0, r11, 4
- %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 -1
- ret i32* %0
-}
-
-define i32 *@f4() nounwind {
-entry:
-; CHECK-LABEL: f4:
-; CHECK: ldaw [[REG:r[0-9]+]], dp[b]
-; CHECK: sub r0, [[REG]], 4
- %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 -1
- ret i32* %0
-}
diff --git a/test/CodeGen/XCore/private.ll b/test/CodeGen/XCore/private.ll
deleted file mode 100644
index a188864a866c..000000000000
--- a/test/CodeGen/XCore/private.ll
+++ /dev/null
@@ -1,21 +0,0 @@
-; Test to make sure that the 'private' is used correctly.
-;
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-define private void @foo() {
-; CHECK: .Lfoo:
- ret void
-}
-
-@baz = private global i32 4
-
-define i32 @bar() {
-; CHECK-LABEL: bar:
-; CHECK: bl .Lfoo
-; CHECK: ldw r0, dp[.Lbaz]
- call void @foo()
- %1 = load i32, i32* @baz, align 4
- ret i32 %1
-}
-
-; CHECK: .Lbaz:
diff --git a/test/CodeGen/XCore/ps-intrinsics.ll b/test/CodeGen/XCore/ps-intrinsics.ll
deleted file mode 100644
index 02609ed8d678..000000000000
--- a/test/CodeGen/XCore/ps-intrinsics.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-declare i32 @llvm.xcore.getps(i32)
-declare void @llvm.xcore.setps(i32, i32)
-
-define i32 @getps(i32 %reg) nounwind {
-; CHECK-LABEL: getps:
-; CHECK: get r0, ps[r0]
- %result = call i32 @llvm.xcore.getps(i32 %reg)
- ret i32 %result
-}
-
-
-define void @setps(i32 %reg, i32 %value) nounwind {
-; CHECK-LABEL: setps:
-; CHECK: set ps[r0], r1
- call void @llvm.xcore.setps(i32 %reg, i32 %value)
- ret void
-}
diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll
deleted file mode 100644
index 87bf3c204dc2..000000000000
--- a/test/CodeGen/XCore/resources.ll
+++ /dev/null
@@ -1,257 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
-declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
-declare void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
-declare void @llvm.xcore.setpsc.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.peek.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
-
-define i8 addrspace(1)* @getr() {
-; CHECK-LABEL: getr:
-; CHECK: getr r0, 5
- %result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5)
- ret i8 addrspace(1)* %result
-}
-
-define void @freer(i8 addrspace(1)* %r) {
-; CHECK-LABEL: freer:
-; CHECK: freer res[r0]
- call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define i32 @in(i8 addrspace(1)* %r) {
-; CHECK-LABEL: in:
-; CHECK: in r0, res[r0]
- %result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define i32 @int(i8 addrspace(1)* %r) {
-; CHECK-LABEL: int:
-; CHECK: int r0, res[r0]
- %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define i32 @inct(i8 addrspace(1)* %r) {
-; CHECK-LABEL: inct:
-; CHECK: inct r0, res[r0]
- %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define void @out(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: out:
-; CHECK: out res[r0], r1
- call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @outt(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: outt:
-; CHECK: outt res[r0], r1
- call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @outct(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: outct:
-; CHECK: outct res[r0], r1
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @outcti(i8 addrspace(1)* %r) {
-; CHECK-LABEL: outcti:
-; CHECK: outct res[r0], 11
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11)
- ret void
-}
-
-define void @chkct(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: chkct:
-; CHECK: chkct res[r0], r1
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @chkcti(i8 addrspace(1)* %r) {
-; CHECK-LABEL: chkcti:
-; CHECK: chkct res[r0], 11
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11)
- ret void
-}
-
-define void @setd(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: setd:
-; CHECK: setd res[r0], r1
- call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @setc(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: setc:
-; CHECK: setc res[r0], r1
- call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @setci(i8 addrspace(1)* %r) {
-; CHECK-LABEL: setci:
-; CHECK: setc res[r0], 2
- call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2)
- ret void
-}
-
-define i32 @inshr(i32 %value, i8 addrspace(1)* %r) {
-; CHECK-LABEL: inshr:
-; CHECK: inshr r0, res[r1]
- %result = call i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret i32 %result
-}
-
-define i32 @outshr(i32 %value, i8 addrspace(1)* %r) {
-; CHECK-LABEL: outshr:
-; CHECK: outshr res[r1], r0
- %result = call i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret i32 %result
-}
-
-define void @clrpt(i8 addrspace(1)* %r) {
-; CHECK-LABEL: clrpt:
-; CHECK: clrpt res[r0]
- call void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define void @setpt(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: setpt:
-; CHECK: setpt res[r0], r1
- call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define i32 @getts(i8 addrspace(1)* %r) {
-; CHECK-LABEL: getts:
-; CHECK: getts r0, res[r0]
- %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define void @syncr(i8 addrspace(1)* %r) {
-; CHECK-LABEL: syncr:
-; CHECK: syncr res[r0]
- call void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define void @settw(i8 addrspace(1)* %r, i32 %value) {
-; CHECK-LABEL: settw:
-; CHECK: settw res[r0], r1
- call void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define void @setv(i8 addrspace(1)* %r, i8* %p) {
-; CHECK-LABEL: setv:
-; CHECK: mov r11, r1
-; CHECK-NEXT: setv res[r0], r11
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
- ret void
-}
-
-define void @setev(i8 addrspace(1)* %r, i8* %p) {
-; CHECK-LABEL: setev:
-; CHECK: mov r11, r1
-; CHECK-NEXT: setev res[r0], r11
- call void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
- ret void
-}
-
-define void @edu(i8 addrspace(1)* %r) {
-; CHECK-LABEL: edu:
-; CHECK: edu res[r0]
- call void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define void @eeu(i8 addrspace(1)* %r) {
-; CHECK-LABEL: eeu:
-; CHECK: eeu res[r0]
- call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define void @setclk(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
-; CHECK: setclk
-; CHECK: setclk res[r0], r1
- call void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
- ret void
-}
-
-define void @setrdy(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
-; CHECK: setrdy
-; CHECK: setrdy res[r0], r1
- call void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
- ret void
-}
-
-define void @setpsc(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: setpsc
-; CHECK: setpsc res[r0], r1
- call void @llvm.xcore.setpsc.p1i8(i8 addrspace(1)* %r, i32 %value)
- ret void
-}
-
-define i32 @peek(i8 addrspace(1)* %r) {
-; CHECK-LABEL: peek:
-; CHECK: peek r0, res[r0]
- %result = call i32 @llvm.xcore.peek.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define i32 @endin(i8 addrspace(1)* %r) {
-; CHECK-LABEL: endin:
-; CHECK: endin r0, res[r0]
- %result = call i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define i32 @testct(i8 addrspace(1)* %r) {
-; CHECK-LABEL: testct:
-; CHECK: testct r0, res[r0]
- %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
-
-define i32 @testwct(i8 addrspace(1)* %r) {
-; CHECK-LABEL: testwct:
-; CHECK: testwct r0, res[r0]
- %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
- ret i32 %result
-}
diff --git a/test/CodeGen/XCore/resources_combine.ll b/test/CodeGen/XCore/resources_combine.ll
deleted file mode 100644
index 20c184a53b99..000000000000
--- a/test/CodeGen/XCore/resources_combine.ll
+++ /dev/null
@@ -1,93 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
-
-define i32 @int(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: int:
-; CHECK: int r0, res[r0]
-; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
- %trunc = and i32 %result, 255
- ret i32 %trunc
-}
-
-define i32 @inct(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: inct:
-; CHECK: inct r0, res[r0]
-; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
- %trunc = and i32 %result, 255
- ret i32 %trunc
-}
-
-define i32 @testct(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: testct:
-; CHECK: testct r0, res[r0]
-; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
- %trunc = and i32 %result, 1
- ret i32 %trunc
-}
-
-define i32 @testwct(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: testwct:
-; CHECK: testwct r0, res[r0]
-; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
- %trunc = and i32 %result, 7
- ret i32 %trunc
-}
-
-define i32 @getts(i8 addrspace(1)* %r) nounwind {
-; CHECK-LABEL: getts:
-; CHECK: getts r0, res[r0]
-; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
- %trunc = and i32 %result, 65535
- ret i32 %result
-}
-
-define void @outt(i8 addrspace(1)* %r, i32 %value) nounwind {
-; CHECK-LABEL: outt:
-; CHECK-NOT: zext
-; CHECK: outt res[r0], r1
-; CHECK-NEXT: retsp 0
- %trunc = and i32 %value, 255
- call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %trunc)
- ret void
-}
-
-define void @outct(i8 addrspace(1)* %r, i32 %value) nounwind {
-; CHECK-LABEL: outct:
-; CHECK-NOT: zext
-; CHECK: outct res[r0], r1
- %trunc = and i32 %value, 255
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %trunc)
- ret void
-}
-
-define void @chkct(i8 addrspace(1)* %r, i32 %value) nounwind {
-; CHECK-LABEL: chkct:
-; CHECK-NOT: zext
-; CHECK: chkct res[r0], r1
- %trunc = and i32 %value, 255
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %trunc)
- ret void
-}
-
-define void @setpt(i8 addrspace(1)* %r, i32 %value) nounwind {
-; CHECK-LABEL: setpt:
-; CHECK-NOT: zext
-; CHECK: setpt res[r0], r1
- %trunc = and i32 %value, 65535
- call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %trunc)
- ret void
-}
diff --git a/test/CodeGen/XCore/scavenging.ll b/test/CodeGen/XCore/scavenging.ll
deleted file mode 100644
index b46c75a4aaf6..000000000000
--- a/test/CodeGen/XCore/scavenging.ll
+++ /dev/null
@@ -1,117 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-@size = global i32 0 ; <i32*> [#uses=1]
-@g0 = external global i32 ; <i32*> [#uses=2]
-@g1 = external global i32 ; <i32*> [#uses=2]
-@g2 = external global i32 ; <i32*> [#uses=2]
-@g3 = external global i32 ; <i32*> [#uses=2]
-@g4 = external global i32 ; <i32*> [#uses=2]
-@g5 = external global i32 ; <i32*> [#uses=2]
-@g6 = external global i32 ; <i32*> [#uses=2]
-@g7 = external global i32 ; <i32*> [#uses=2]
-@g8 = external global i32 ; <i32*> [#uses=2]
-@g9 = external global i32 ; <i32*> [#uses=2]
-@g10 = external global i32 ; <i32*> [#uses=2]
-@g11 = external global i32 ; <i32*> [#uses=2]
-
-define void @f() nounwind {
-entry:
- %x = alloca [100 x i32], align 4 ; <[100 x i32]*> [#uses=2]
- %0 = load i32, i32* @size, align 4 ; <i32> [#uses=1]
- %1 = alloca i32, i32 %0, align 4 ; <i32*> [#uses=1]
- %2 = load volatile i32, i32* @g0, align 4 ; <i32> [#uses=1]
- %3 = load volatile i32, i32* @g1, align 4 ; <i32> [#uses=1]
- %4 = load volatile i32, i32* @g2, align 4 ; <i32> [#uses=1]
- %5 = load volatile i32, i32* @g3, align 4 ; <i32> [#uses=1]
- %6 = load volatile i32, i32* @g4, align 4 ; <i32> [#uses=1]
- %7 = load volatile i32, i32* @g5, align 4 ; <i32> [#uses=1]
- %8 = load volatile i32, i32* @g6, align 4 ; <i32> [#uses=1]
- %9 = load volatile i32, i32* @g7, align 4 ; <i32> [#uses=1]
- %10 = load volatile i32, i32* @g8, align 4 ; <i32> [#uses=1]
- %11 = load volatile i32, i32* @g9, align 4 ; <i32> [#uses=1]
- %12 = load volatile i32, i32* @g10, align 4 ; <i32> [#uses=1]
- %13 = load volatile i32, i32* @g11, align 4 ; <i32> [#uses=2]
- %14 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 50 ; <i32*> [#uses=1]
- store i32 %13, i32* %14, align 4
- store volatile i32 %13, i32* @g11, align 4
- store volatile i32 %12, i32* @g10, align 4
- store volatile i32 %11, i32* @g9, align 4
- store volatile i32 %10, i32* @g8, align 4
- store volatile i32 %9, i32* @g7, align 4
- store volatile i32 %8, i32* @g6, align 4
- store volatile i32 %7, i32* @g5, align 4
- store volatile i32 %6, i32* @g4, align 4
- store volatile i32 %5, i32* @g3, align 4
- store volatile i32 %4, i32* @g2, align 4
- store volatile i32 %3, i32* @g1, align 4
- store volatile i32 %2, i32* @g0, align 4
- %x1 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 0 ; <i32*> [#uses=1]
- call void @g(i32* %x1, i32* %1) nounwind
- ret void
-}
-declare void @g(i32*, i32*)
-
-
-; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK: .p2align 2
-; CHECK: [[ARG5:.LCPI[0-9_]+]]:
-; CHECK: .long 100003
-; CHECK: [[INDEX0:.LCPI[0-9_]+]]:
-; CHECK: .long 80002
-; CHECK: [[INDEX1:.LCPI[0-9_]+]]:
-; CHECK: .long 81002
-; CHECK: [[INDEX2:.LCPI[0-9_]+]]:
-; CHECK: .long 82002
-; CHECK: [[INDEX3:.LCPI[0-9_]+]]:
-; CHECK: .long 83002
-; CHECK: [[INDEX4:.LCPI[0-9_]+]]:
-; CHECK: .long 84002
-; CHECK: .text
-; !FP + large frame: spill SR+SR = entsp 2 + 100000
-; CHECK-LABEL: ScavengeSlots:
-; CHECK: entsp 65535
-; CHECK: extsp 34467
-; scavenge r11
-; CHECK: ldaw r11, sp[0]
-; scavenge r4 using SR spill slot
-; CHECK: stw r4, sp[1]
-; CHECK: ldw r4, cp{{\[}}[[ARG5]]{{\]}}
-; r11 used to load 5th argument
-; CHECK: ldw r11, r11[r4]
-; CHECK: ldaw r4, sp[0]
-; scavenge r5 using SR spill slot
-; CHECK: stw r5, sp[0]
-; CHECK: ldw r5, cp{{\[}}[[INDEX0]]{{\]}}
-; r4 & r5 used by InsertSPConstInst() to emit STW_l3r instruction.
-; CHECK: stw r0, r4[r5]
-; CHECK: ldaw r0, sp[0]
-; CHECK: ldw r5, cp{{\[}}[[INDEX1]]{{\]}}
-; CHECK: stw r1, r0[r5]
-; CHECK: ldaw r0, sp[0]
-; CHECK: ldw r1, cp{{\[}}[[INDEX2]]{{\]}}
-; CHECK: stw r2, r0[r1]
-; CHECK: ldaw r0, sp[0]
-; CHECK: ldw r1, cp{{\[}}[[INDEX3]]{{\]}}
-; CHECK: stw r3, r0[r1]
-; CHECK: ldaw r0, sp[0]
-; CHECK: ldw r1, cp{{\[}}[[INDEX4]]{{\]}}
-; CHECK: stw r11, r0[r1]
-; CHECK: ldaw sp, sp[65535]
-; CHECK: ldw r4, sp[1]
-; CHECK: ldw r5, sp[0]
-; CHECK: retsp 34467
-define void @ScavengeSlots(i32 %r0, i32 %r1, i32 %r2, i32 %r3, i32 %r4) nounwind {
-entry:
- %Data = alloca [100000 x i32]
- %i0 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 80000
- store volatile i32 %r0, i32* %i0
- %i1 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 81000
- store volatile i32 %r1, i32* %i1
- %i2 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 82000
- store volatile i32 %r2, i32* %i2
- %i3 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 83000
- store volatile i32 %r3, i32* %i3
- %i4 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 84000
- store volatile i32 %r4, i32* %i4
- ret void
-}
diff --git a/test/CodeGen/XCore/section-name.ll b/test/CodeGen/XCore/section-name.ll
deleted file mode 100644
index 65161db34bea..000000000000
--- a/test/CodeGen/XCore/section-name.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
-
-@bar = internal global i32 zeroinitializer
-
-define void @".dp.bss"() {
- ret void
-}
-
-; CHECK: LLVM ERROR: invalid symbol redefinition
diff --git a/test/CodeGen/XCore/sext.ll b/test/CodeGen/XCore/sext.ll
deleted file mode 100644
index b3e66ec09426..000000000000
--- a/test/CodeGen/XCore/sext.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-define i32 @sext1(i32 %a) {
- %1 = trunc i32 %a to i1
- %2 = sext i1 %1 to i32
- ret i32 %2
-}
-; CHECK-LABEL: sext1:
-; CHECK: sext r0, 1
-
-define i32 @sext2(i32 %a) {
- %1 = trunc i32 %a to i2
- %2 = sext i2 %1 to i32
- ret i32 %2
-}
-; CHECK-LABEL: sext2:
-; CHECK: sext r0, 2
-
-define i32 @sext8(i32 %a) {
- %1 = trunc i32 %a to i8
- %2 = sext i8 %1 to i32
- ret i32 %2
-}
-; CHECK-LABEL: sext8:
-; CHECK: sext r0, 8
-
-define i32 @sext16(i32 %a) {
- %1 = trunc i32 %a to i16
- %2 = sext i16 %1 to i32
- ret i32 %2
-}
-; CHECK-LABEL: sext16:
-; CHECK: sext r0, 16
diff --git a/test/CodeGen/XCore/shedulingPreference.ll b/test/CodeGen/XCore/shedulingPreference.ll
deleted file mode 100644
index 6c2ac6dce487..000000000000
--- a/test/CodeGen/XCore/shedulingPreference.ll
+++ /dev/null
@@ -1,25 +0,0 @@
-; RUN: llc < %s -march=xcore
-
-define void @f( ) {
-entry:
-
- switch i32 undef, label %default [
- i32 0, label %start
- ]
-
-start:
- br label %end
-
-default:
- %arg = fadd double undef, undef
- %res = call double @f2(i32 undef, double %arg, double undef)
- br label %end
-
-end:
- %unused = phi double [ %res, %default ], [ undef, %start ]
-
- unreachable
-}
-
-declare double @f2(i32, double, double)
-
diff --git a/test/CodeGen/XCore/sr-intrinsics.ll b/test/CodeGen/XCore/sr-intrinsics.ll
deleted file mode 100644
index 2c4175d94a9c..000000000000
--- a/test/CodeGen/XCore/sr-intrinsics.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-declare void @llvm.xcore.setsr(i32)
-declare void @llvm.xcore.clrsr(i32)
-
-define void @setsr() nounwind {
-; CHECK-LABEL: setsr:
-; CHECK: setsr 128
- call void @llvm.xcore.setsr(i32 128)
- ret void
-}
-
-
-define void @clrsr() nounwind {
-; CHECK-LABEL: clrsr:
-; CHECK: clrsr 128
- call void @llvm.xcore.clrsr(i32 128)
- ret void
-}
diff --git a/test/CodeGen/XCore/store.ll b/test/CodeGen/XCore/store.ll
deleted file mode 100644
index a42b444bdff4..000000000000
--- a/test/CodeGen/XCore/store.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
-entry:
-; CHECK-LABEL: store32:
-; CHECK: stw r2, r0[r1]
- %0 = getelementptr i32, i32* %p, i32 %offset
- store i32 %val, i32* %0, align 4
- ret void
-}
-
-define void @store32_imm(i32* %p, i32 %val) nounwind {
-entry:
-; CHECK-LABEL: store32_imm:
-; CHECK: stw r1, r0[11]
- %0 = getelementptr i32, i32* %p, i32 11
- store i32 %val, i32* %0, align 4
- ret void
-}
-
-define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
-entry:
-; CHECK-LABEL: store16:
-; CHECK: st16 r2, r0[r1]
- %0 = getelementptr i16, i16* %p, i32 %offset
- store i16 %val, i16* %0, align 2
- ret void
-}
-
-define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
-entry:
-; CHECK-LABEL: store8:
-; CHECK: st8 r2, r0[r1]
- %0 = getelementptr i8, i8* %p, i32 %offset
- store i8 %val, i8* %0, align 1
- ret void
-}
diff --git a/test/CodeGen/XCore/switch.ll b/test/CodeGen/XCore/switch.ll
deleted file mode 100644
index 9cc27f2ffaa4..000000000000
--- a/test/CodeGen/XCore/switch.ll
+++ /dev/null
@@ -1,24 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-define i32 @switch(i32 %i) {
-entry:
- switch i32 %i, label %default [
- i32 0, label %bb0
- i32 1, label %bb1
- i32 2, label %bb2
- i32 3, label %bb3
- ]
-; CHECK-NOT: shl
-; CHECK: bru
-; CHECK: .jmptable
-bb0:
- ret i32 0
-bb1:
- ret i32 1
-bb2:
- ret i32 2
-bb3:
- ret i32 3
-default:
- ret i32 4
-}
diff --git a/test/CodeGen/XCore/switch_long.ll b/test/CodeGen/XCore/switch_long.ll
deleted file mode 100644
index 30c9e3db7397..000000000000
--- a/test/CodeGen/XCore/switch_long.ll
+++ /dev/null
@@ -1,132 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-define i32 @switch(i32 %i) {
-entry:
- switch i32 %i, label %default [
- i32 0, label %bb0
- i32 1, label %bb1
- i32 2, label %bb2
- i32 3, label %bb3
- i32 4, label %bb4
- i32 5, label %bb5
- i32 6, label %bb6
- i32 7, label %bb7
- i32 8, label %bb8
- i32 9, label %bb9
- i32 10, label %bb10
- i32 11, label %bb11
- i32 12, label %bb12
- i32 13, label %bb13
- i32 14, label %bb14
- i32 15, label %bb15
- i32 16, label %bb16
- i32 17, label %bb17
- i32 18, label %bb18
- i32 19, label %bb19
- i32 20, label %bb20
- i32 21, label %bb21
- i32 22, label %bb22
- i32 23, label %bb23
- i32 24, label %bb24
- i32 25, label %bb25
- i32 26, label %bb26
- i32 27, label %bb27
- i32 28, label %bb28
- i32 29, label %bb29
- i32 30, label %bb30
- i32 31, label %bb31
- i32 32, label %bb32
- i32 33, label %bb33
- i32 34, label %bb34
- i32 35, label %bb35
- i32 36, label %bb36
- i32 37, label %bb37
- i32 38, label %bb38
- i32 39, label %bb39
- ]
-; CHECK: shl
-; CHECK: bru
-; CHECK: .jmptable
-bb0:
- ret i32 0
-bb1:
- ret i32 1
-bb2:
- ret i32 2
-bb3:
- ret i32 3
-bb4:
- ret i32 4
-bb5:
- ret i32 5
-bb6:
- ret i32 6
-bb7:
- ret i32 7
-bb8:
- ret i32 8
-bb9:
- ret i32 9
-bb10:
- ret i32 0
-bb11:
- ret i32 1
-bb12:
- ret i32 2
-bb13:
- ret i32 3
-bb14:
- ret i32 4
-bb15:
- ret i32 5
-bb16:
- ret i32 6
-bb17:
- ret i32 7
-bb18:
- ret i32 8
-bb19:
- ret i32 9
-bb20:
- ret i32 0
-bb21:
- ret i32 1
-bb22:
- ret i32 2
-bb23:
- ret i32 3
-bb24:
- ret i32 4
-bb25:
- ret i32 5
-bb26:
- ret i32 6
-bb27:
- ret i32 7
-bb28:
- ret i32 8
-bb29:
- ret i32 9
-bb30:
- ret i32 0
-bb31:
- ret i32 1
-bb32:
- ret i32 2
-bb33:
- ret i32 3
-bb34:
- ret i32 4
-bb35:
- ret i32 5
-bb36:
- ret i32 6
-bb37:
- ret i32 7
-bb38:
- ret i32 8
-bb39:
- ret i32 9
-default:
- ret i32 0
-}
diff --git a/test/CodeGen/XCore/threads.ll b/test/CodeGen/XCore/threads.ll
deleted file mode 100644
index 30dda143e084..000000000000
--- a/test/CodeGen/XCore/threads.ll
+++ /dev/null
@@ -1,145 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-; RUN: llc -march=xcore -O=0 < %s | FileCheck %s -check-prefix=PHINODE
-
-declare i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.msync.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.ssync()
-declare void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %r, i8* %value)
-declare void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %r, i8* %value)
-declare void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %r, i8* %value)
-declare void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %r, i8* %value)
-declare void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %r, i8* %value)
-
-define i8 addrspace(1)* @test_getst(i8 addrspace(1)* %r) {
-; CHECK-LABEL: test_getst:
-; CHECK: getst r0, res[r0]
- %result = call i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
- ret i8 addrspace(1)* %result
-}
-
-define void @test_ssync() {
-; CHECK-LABEL: test_ssync:
-; CHECK: ssync
- call void @llvm.xcore.ssync()
- ret void
-}
-
-define void @test_mjoin(i8 addrspace(1)* %r) {
-; CHECK-LABEL: test_mjoin:
-; CHECK: mjoin res[r0]
- call void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
- ret void
-}
-
-define void @test_initsp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK-LABEL: test_initsp:
-; CHECK: init t[r0]:sp, r1
- call void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %t, i8* %src)
- ret void
-}
-
-define void @test_initpc(i8 addrspace(1)* %t, i8* %src) {
-; CHECK-LABEL: test_initpc:
-; CHECK: init t[r0]:pc, r1
- call void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %t, i8* %src)
- ret void
-}
-
-define void @test_initlr(i8 addrspace(1)* %t, i8* %src) {
-; CHECK-LABEL: test_initlr:
-; CHECK: init t[r0]:lr, r1
- call void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %t, i8* %src)
- ret void
-}
-
-define void @test_initcp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK-LABEL: test_initcp:
-; CHECK: init t[r0]:cp, r1
- call void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %t, i8* %src)
- ret void
-}
-
-define void @test_initdp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK-LABEL: test_initdp:
-; CHECK: init t[r0]:dp, r1
- call void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %t, i8* %src)
- ret void
-}
-
-@tl = thread_local global [3 x i32] zeroinitializer
-@tle = external thread_local global [2 x i32]
-
-define i32* @f_tl() {
-; CHECK-LABEL: f_tl:
-; CHECK: get r11, id
-; CHECK: ldaw [[R0:r[0-9]]], dp[tl]
-; CHECK: ldc [[R1:r[0-9]]], 8
-; CHECK: ldc [[R2:r[0-9]]], 12
-; r0 = id*12 + 8 + &tl
-; CHECK: lmul {{r[0-9]}}, r0, r11, [[R2]], [[R0]], [[R1]]
- ret i32* getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 2)
-}
-
-define i32* @f_tle() {
-; CHECK-LABEL: f_tle:
-; CHECK: get r11, id
-; CHECK: shl [[R0:r[0-9]]], r11, 3
-; CHECK: ldaw [[R1:r[0-9]]], dp[tle]
-; r0 = &tl + id*8
-; CHECK: add r0, [[R0]], [[R1]]
- ret i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0)
-}
-
-define i32 @f_tlExpr () {
-; CHECK-LABEL: f_tlExpr:
-; CHECK: get r11, id
-; CHECK: shl [[R0:r[0-9]]], r11, 3
-; CHECK: ldaw [[R1:r[0-9]]], dp[tle]
-; CHECK: add [[R2:r[0-9]]], [[R0]], [[R1]]
-; CHECK: add r0, [[R2]], [[R2]]
- ret i32 add(
- i32 ptrtoint( i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0) to i32),
- i32 ptrtoint( i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0) to i32))
-}
-
-define void @phiNode1() {
-; N.B. lowering of duplicate constexpr in a PHI node requires -O=0
-; PHINODE-LABEL: phiNode1:
-; PHINODE: get r11, id
-; PHINODE-LABEL: .LBB11_1:
-; PHINODE: get r11, id
-; PHINODE: bu .LBB11_1
-entry:
- br label %ConstantExpPhiNode
-ConstantExpPhiNode:
- %ptr = phi i32* [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %entry ],
- [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
- br label %ConstantExpPhiNode
-exit:
- ret void
-}
-
-define void @phiNode2( i1 %bool) {
-; N.B. check an extra 'Node_crit_edge' (LBB12_1) is inserted
-; PHINODE-LABEL: phiNode2:
-; PHINODE: bf {{r[0-9]}}, .LBB12_3
-; PHINODE: bu .LBB12_1
-; PHINODE-LABEL: .LBB12_1:
-; PHINODE: get r11, id
-; PHINODE-LABEL: .LBB12_2:
-; PHINODE: get r11, id
-; PHINODE: bu .LBB12_2
-; PHINODE-LABEL: .LBB12_3:
-entry:
- br i1 %bool, label %ConstantExpPhiNode, label %exit
-ConstantExpPhiNode:
- %ptr = phi i32* [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %entry ],
- [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
- br label %ConstantExpPhiNode
-exit:
- ret void
-}
-
-; CHECK-LABEL: tl:
-; CHECK: .space 96
diff --git a/test/CodeGen/XCore/tls.ll b/test/CodeGen/XCore/tls.ll
deleted file mode 100644
index 648d61199234..000000000000
--- a/test/CodeGen/XCore/tls.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-
-define i32 *@addr_G() {
-entry:
-; CHECK-LABEL: addr_G:
-; CHECK: get r11, id
- ret i32* @G
-}
-
-@G = thread_local global i32 15
-; CHECK: .section .dp.data,"awd",@progbits
-; CHECK: G:
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
-; CHECK: .long 15
diff --git a/test/CodeGen/XCore/trampoline.ll b/test/CodeGen/XCore/trampoline.ll
deleted file mode 100644
index a7280000500f..000000000000
--- a/test/CodeGen/XCore/trampoline.ll
+++ /dev/null
@@ -1,39 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-%struct.FRAME.f = type { i32, i32 ()* }
-
-define void @f() nounwind {
-entry:
-; CHECK-LABEL: f:
-; CHECK: ldap r11, g.1101
-; CHECK: stw r11, sp[7]
- %TRAMP.23 = alloca [20 x i8], align 2
- %FRAME.0 = alloca %struct.FRAME.f, align 4
- %TRAMP.23.sub = getelementptr inbounds [20 x i8], [20 x i8]* %TRAMP.23, i32 0, i32 0
- %FRAME.02 = bitcast %struct.FRAME.f* %FRAME.0 to i8*
- call void @llvm.init.trampoline(i8* %TRAMP.23.sub, i8* bitcast (i32 (%struct.FRAME.f*)* @g.1101 to i8*), i8* %FRAME.02)
- %tramp = call i8* @llvm.adjust.trampoline(i8* %TRAMP.23.sub)
- %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 1
- %1 = bitcast i8* %tramp to i32 ()*
- store i32 ()* %1, i32 ()** %0, align 4
- %2 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 0
- store i32 1, i32* %2, align 4
- call void @h(i32 ()* %1) nounwind
- ret void
-}
-
-define internal i32 @g.1101(%struct.FRAME.f* nocapture nest %CHAIN.1) nounwind readonly {
-entry:
-; CHECK: g.1101:
-; CHECK: ldw r11, sp[0]
-; CHECK-NEXT: ldw r0, r11[0]
-; CHECK-NEXT: retsp 0
- %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %CHAIN.1, i32 0, i32 0
- %1 = load i32, i32* %0, align 4
- ret i32 %1
-}
-
-declare void @llvm.init.trampoline(i8*, i8*, i8*) nounwind
-declare i8* @llvm.adjust.trampoline(i8*) nounwind
-
-declare void @h(i32 ()*)
diff --git a/test/CodeGen/XCore/trap.ll b/test/CodeGen/XCore/trap.ll
deleted file mode 100644
index ef0dfd634009..000000000000
--- a/test/CodeGen/XCore/trap.ll
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-define i32 @test() noreturn nounwind {
-entry:
-; CHECK-LABEL: test:
-; CHECK: ldc
-; CHECK: ecallf
- tail call void @llvm.trap( )
- unreachable
-}
-
-declare void @llvm.trap() nounwind
-
diff --git a/test/CodeGen/XCore/unaligned_load.ll b/test/CodeGen/XCore/unaligned_load.ll
deleted file mode 100644
index 325da8f4432d..000000000000
--- a/test/CodeGen/XCore/unaligned_load.ll
+++ /dev/null
@@ -1,34 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; Byte aligned load.
-; CHECK: align1
-; CHECK: bl __misaligned_load
-define i32 @align1(i32* %p) nounwind {
-entry:
- %0 = load i32, i32* %p, align 1 ; <i32> [#uses=1]
- ret i32 %0
-}
-
-; Half word aligned load.
-; CHECK-LABEL: align2:
-; CHECK: ld16s
-; CHECK: ld16s
-; CHECK: or
-define i32 @align2(i32* %p) nounwind {
-entry:
- %0 = load i32, i32* %p, align 2 ; <i32> [#uses=1]
- ret i32 %0
-}
-
-@a = global [5 x i8] zeroinitializer, align 4
-
-; Constant offset from word aligned base.
-; CHECK-LABEL: align3:
-; CHECK: ldw {{r[0-9]+}}, dp
-; CHECK: ldw {{r[0-9]+}}, dp
-; CHECK: or
-define i32 @align3() nounwind {
-entry:
- %0 = load i32, i32* bitcast (i8* getelementptr ([5 x i8], [5 x i8]* @a, i32 0, i32 1) to i32*), align 1
- ret i32 %0
-}
diff --git a/test/CodeGen/XCore/unaligned_store.ll b/test/CodeGen/XCore/unaligned_store.ll
deleted file mode 100644
index 27b428086d5e..000000000000
--- a/test/CodeGen/XCore/unaligned_store.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; Byte aligned store.
-; CHECK-LABEL: align1:
-; CHECK: bl __misaligned_store
-define void @align1(i32* %p, i32 %val) nounwind {
-entry:
- store i32 %val, i32* %p, align 1
- ret void
-}
-
-; Half word aligned store.
-; CHECK: align2
-; CHECK: st16
-; CHECK: st16
-define void @align2(i32* %p, i32 %val) nounwind {
-entry:
- store i32 %val, i32* %p, align 2
- ret void
-}
diff --git a/test/CodeGen/XCore/unaligned_store_combine.ll b/test/CodeGen/XCore/unaligned_store_combine.ll
deleted file mode 100644
index 4b29a05984a1..000000000000
--- a/test/CodeGen/XCore/unaligned_store_combine.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-; Unaligned load / store pair. Should be combined into a memmove
-; of size 8
-define void @f(i64* %dst, i64* %src) nounwind {
-entry:
-; CHECK-LABEL: f:
-; CHECK: ldc r2, 8
-; CHECK: bl memmove
- %0 = load i64, i64* %src, align 1
- store i64 %0, i64* %dst, align 1
- ret void
-}
diff --git a/test/CodeGen/XCore/varargs.ll b/test/CodeGen/XCore/varargs.ll
deleted file mode 100644
index 2e364b275610..000000000000
--- a/test/CodeGen/XCore/varargs.ll
+++ /dev/null
@@ -1,55 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-
-define void @_Z1fz(...) {
-entry:
-; CHECK-LABEL: _Z1fz:
-; CHECK: extsp 3
-; CHECK: stw r[[REG:[0-3]{1,1}]]
-; CHECK: , sp{{\[}}[[REG]]{{\]}}
-; CHECK: stw r[[REG:[0-3]{1,1}]]
-; CHECK: , sp{{\[}}[[REG]]{{\]}}
-; CHECK: stw r[[REG:[0-3]{1,1}]]
-; CHECK: , sp{{\[}}[[REG]]{{\]}}
-; CHECK: stw r[[REG:[0-3]{1,1}]]
-; CHECK: , sp{{\[}}[[REG]]{{\]}}
-; CHECK: ldaw sp, sp[3]
-; CHECK: retsp 0
- ret void
-}
-
-
-declare void @llvm.va_start(i8*) nounwind
-declare void @llvm.va_end(i8*) nounwind
-declare void @f(i32) nounwind
-define void @test_vararg(...) nounwind {
-entry:
-; CHECK-LABEL: test_vararg
-; CHECK: extsp 6
-; CHECK: stw lr, sp[1]
-; CHECK: stw r3, sp[6]
-; CHECK: stw r0, sp[3]
-; CHECK: stw r1, sp[4]
-; CHECK: stw r2, sp[5]
-; CHECK: ldaw r0, sp[3]
-; CHECK: stw r0, sp[2]
- %list = alloca i8*, align 4
- %list1 = bitcast i8** %list to i8*
- call void @llvm.va_start(i8* %list1)
- br label %for.cond
-
-; CHECK-LABEL: .LBB1_1
-; CHECK: ldw r0, sp[2]
-; CHECK: add r1, r0, 4
-; CHECK: stw r1, sp[2]
-; CHECK: ldw r0, r0[0]
-; CHECK: bl f
-; CHECK: bu .LBB1_1
-for.cond:
- %0 = va_arg i8** %list, i32
- call void @f(i32 %0)
- br label %for.cond
-
- call void @llvm.va_end(i8* %list1)
- ret void
-}
-
diff --git a/test/CodeGen/XCore/zext.ll b/test/CodeGen/XCore/zext.ll
deleted file mode 100644
index 32abfcaed10b..000000000000
--- a/test/CodeGen/XCore/zext.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-define i32 @f(i1 %a) {
-entry:
-; CHECK: f
-; CHECK: zext r0, 1
-; CHECK: retsp 0
- %b= zext i1 %a to i32
- ret i32 %b
-}
diff --git a/test/CodeGen/XCore/zextfree.ll b/test/CodeGen/XCore/zextfree.ll
deleted file mode 100644
index d1e2b7f85784..000000000000
--- a/test/CodeGen/XCore/zextfree.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
-
-; CHECK-LABEL: test:
-; CHECK-NOT: zext
-define void @test(i8* %s1) {
-entry:
- %u8 = load i8, i8* %s1, align 1
- %bool = icmp eq i8 %u8, 0
- br label %BB1
-BB1:
- br i1 %bool, label %BB1, label %BB2
-BB2:
- br i1 %bool, label %BB1, label %BB2
-}
-