diff options
Diffstat (limited to 'usr.sbin')
117 files changed, 50019 insertions, 1728 deletions
diff --git a/usr.sbin/Makefile b/usr.sbin/Makefile index b97c22ffeb08..90b360ac55e6 100644 --- a/usr.sbin/Makefile +++ b/usr.sbin/Makefile @@ -99,6 +99,7 @@ SUBDIR= adduser \ valectl \ vigr \ vipw \ + virtual_oss \ wake \ watch \ watchdogd \ diff --git a/usr.sbin/adduser/rmuser.sh b/usr.sbin/adduser/rmuser.sh index 4c1e4049763a..8e5dd28cf01f 100644 --- a/usr.sbin/adduser/rmuser.sh +++ b/usr.sbin/adduser/rmuser.sh @@ -303,7 +303,7 @@ if [ ! "$userlist" ]; then show_usage exit 1 else - echo -n "Please enter one or more usernames: " + echo -n "Please enter one or more usernames, or press enter to exit: " read userlist fi fi @@ -333,11 +333,11 @@ for _user in $userlist ; do echo echo $userrec echo - if ! prompt_yesno "Is this the entry you wish to remove? " ; then + if ! prompt_yesno "Is this the entry you wish to remove? (yes/no): " ; then continue fi _homedir=`echo $userrec | awk -F: '{print $9}'` - if prompt_yesno "Remove user's home directory ($_homedir)? "; then + if prompt_yesno "Remove user's home directory? [$_homedir] (yes/no): "; then pw_rswitch="-r" fi else diff --git a/usr.sbin/bhyve/aarch64/vmexit.c b/usr.sbin/bhyve/aarch64/vmexit.c index 3acad4020a3c..2457cbe76b5e 100644 --- a/usr.sbin/bhyve/aarch64/vmexit.c +++ b/usr.sbin/bhyve/aarch64/vmexit.c @@ -122,6 +122,8 @@ vmexit_suspend(struct vmctx *ctx, struct vcpu *vcpu, struct vm_run *vmrun) exit(1); case VM_SUSPEND_HALT: exit(2); + case VM_SUSPEND_DESTROY: + exit(4); default: fprintf(stderr, "vmexit_suspend: invalid reason %d\n", how); exit(100); diff --git a/usr.sbin/bhyve/amd64/Makefile.inc b/usr.sbin/bhyve/amd64/Makefile.inc index 92e53433ff01..50a011ed4bfd 100644 --- a/usr.sbin/bhyve/amd64/Makefile.inc +++ b/usr.sbin/bhyve/amd64/Makefile.inc @@ -13,6 +13,7 @@ SRCS+= \ pci_gvt-d.c \ pci_lpc.c \ pci_passthru.c \ + pci_passthru_quirks.c \ pctestdev.c \ pm.c \ post.c \ diff --git a/usr.sbin/bhyve/amd64/vmexit.c b/usr.sbin/bhyve/amd64/vmexit.c index 944f5de34645..14f89563fd0f 100644 --- a/usr.sbin/bhyve/amd64/vmexit.c +++ b/usr.sbin/bhyve/amd64/vmexit.c @@ -418,6 +418,8 @@ vmexit_suspend(struct vmctx *ctx, struct vcpu *vcpu, struct vm_run *vmrun) exit(2); case VM_SUSPEND_TRIPLEFAULT: exit(3); + case VM_SUSPEND_DESTROY: + exit(4); default: EPRINTLN("vmexit_suspend: invalid reason %d", how); exit(100); diff --git a/usr.sbin/bhyve/bhyve.8 b/usr.sbin/bhyve/bhyve.8 index 89c0b23961a8..c902c265da9e 100644 --- a/usr.sbin/bhyve/bhyve.8 +++ b/usr.sbin/bhyve/bhyve.8 @@ -1126,7 +1126,7 @@ powered off .It 2 halted .It 3 -triple fault +triple fault (amd64 only) .It 4 exited due to an error .El diff --git a/usr.sbin/bhyve/bhyverun.c b/usr.sbin/bhyve/bhyverun.c index 9ead49582a7d..bfc0b949a75d 100644 --- a/usr.sbin/bhyve/bhyverun.c +++ b/usr.sbin/bhyve/bhyverun.c @@ -561,10 +561,8 @@ fbsdrun_start_thread(void *param) #endif vm_loop(vi->ctx, vi->vcpu); - - /* not reached */ - exit(1); - return (NULL); + /* We get here if the VM was destroyed asynchronously. */ + exit(4); } void diff --git a/usr.sbin/bhyve/pci_passthru_quirks.c b/usr.sbin/bhyve/pci_passthru_quirks.c new file mode 100644 index 000000000000..5ba0e674f311 --- /dev/null +++ b/usr.sbin/bhyve/pci_passthru_quirks.c @@ -0,0 +1,48 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2025 Beckhoff Automation GmbH & Co. KG + * Author: Corvin Köhne <c.koehne@beckhoff.com> + */ + +#include <dev/pci/pcireg.h> + +#include <errno.h> + +#include "pci_passthru.h" + +#define PCI_VENDOR_NVIDIA 0x10DE + +static int +nvidia_gpu_probe(struct pci_devinst *const pi) +{ + struct passthru_softc *sc; + uint16_t vendor; + uint8_t class; + + sc = pi->pi_arg; + + vendor = pci_host_read_config(passthru_get_sel(sc), PCIR_VENDOR, 0x02); + if (vendor != PCI_VENDOR_NVIDIA) + return (ENXIO); + + class = pci_host_read_config(passthru_get_sel(sc), PCIR_CLASS, 0x01); + if (class != PCIC_DISPLAY) + return (ENXIO); + + return (0); +} + +static int +nvidia_gpu_init(struct pci_devinst *const pi, nvlist_t *const nvl __unused) +{ + pci_set_cfgdata8(pi, PCIR_INTPIN, 1); + + return (0); +} + +static struct passthru_dev nvidia_gpu = { + .probe = nvidia_gpu_probe, + .init = nvidia_gpu_init, +}; +PASSTHRU_DEV_SET(nvidia_gpu); diff --git a/usr.sbin/bhyve/rfb.c b/usr.sbin/bhyve/rfb.c index 6af374a83bbe..716e191e2fc0 100644 --- a/usr.sbin/bhyve/rfb.c +++ b/usr.sbin/bhyve/rfb.c @@ -63,6 +63,7 @@ #include "bhyvegc.h" #include "debug.h" #include "console.h" +#include "config.h" #include "rfb.h" #include "sockstream.h" @@ -152,6 +153,8 @@ struct rfb_softc { struct pixfmt pixfmt; /* owned by the write thread */ struct pixfmt new_pixfmt; /* managed with pixfmt_mtx */ uint32_t *pixrow; + char *fbname; + int fbnamelen; }; struct rfb_pixfmt { @@ -262,7 +265,7 @@ struct rfb_cuttext_msg { }; static void -rfb_send_server_init_msg(int cfd) +rfb_send_server_init_msg(struct rfb_softc *rc, int cfd) { struct bhyvegc_image *gc_image; struct rfb_srvr_info sinfo; @@ -284,9 +287,9 @@ rfb_send_server_init_msg(int cfd) sinfo.pixfmt.pad[0] = 0; sinfo.pixfmt.pad[1] = 0; sinfo.pixfmt.pad[2] = 0; - sinfo.namelen = htonl(strlen("bhyve")); + sinfo.namelen = htonl(rc->fbnamelen); (void)stream_write(cfd, &sinfo, sizeof(sinfo)); - (void)stream_write(cfd, "bhyve", strlen("bhyve")); + (void)stream_write(cfd, rc->fbname, rc->fbnamelen); } static void @@ -1144,7 +1147,7 @@ report_and_done: len = stream_read(cfd, buf, 1); /* 4a. Write server-init info */ - rfb_send_server_init_msg(cfd); + rfb_send_server_init_msg(rc, cfd); if (!rc->zbuf) { rc->zbuf = malloc(RFB_ZLIB_BUFSZ + 16); @@ -1276,6 +1279,13 @@ rfb_init(const char *hostname, int port, int wait, const char *password) rc->password = password; + rc->fbnamelen = asprintf(&rc->fbname, "bhyve:%s", + get_config_value("name")); + if (rc->fbnamelen < 0) { + EPRINTLN("rfb: failed to allocate memory for VNC title"); + goto error; + } + rc->pixrow = malloc(RFB_MAX_WIDTH * sizeof(uint32_t)); if (rc->pixrow == NULL) { EPRINTLN("rfb: failed to allocate memory for pixrow buffer"); @@ -1358,6 +1368,7 @@ rfb_init(const char *hostname, int port, int wait, const char *password) free(rc->crc); free(rc->crc_tmp); free(rc->pixrow); + free(rc->fbname); free(rc); return (-1); } diff --git a/usr.sbin/bhyve/riscv/vmexit.c b/usr.sbin/bhyve/riscv/vmexit.c index 3bc83b3bef4e..985f8e4e9065 100644 --- a/usr.sbin/bhyve/riscv/vmexit.c +++ b/usr.sbin/bhyve/riscv/vmexit.c @@ -121,6 +121,8 @@ vmexit_suspend(struct vmctx *ctx, struct vcpu *vcpu, struct vm_run *vmrun) exit(1); case VM_SUSPEND_HALT: exit(2); + case VM_SUSPEND_DESTROY: + exit(4); default: fprintf(stderr, "vmexit_suspend: invalid reason %d\n", how); exit(100); diff --git a/usr.sbin/bsdinstall/bsdinstall.8 b/usr.sbin/bsdinstall/bsdinstall.8 index 181abdcf9d05..5ccbaef87835 100644 --- a/usr.sbin/bsdinstall/bsdinstall.8 +++ b/usr.sbin/bsdinstall/bsdinstall.8 @@ -693,7 +693,7 @@ is: # Home directories separated so they are common to all BEs /home mountpoint=/home -# Compress /tmp, allow exec but not setuid +# Create /tmp and allow exec but not setuid /tmp mountpoint=/tmp,exec=on,setuid=off # Do not mount /usr so that 'base' files go to the BEROOT @@ -702,7 +702,7 @@ is: # Ports tree /usr/ports setuid=off -# Source tree (compressed) +# Source tree /usr/src # Create /var and friends diff --git a/usr.sbin/bsdinstall/scripts/jail b/usr.sbin/bsdinstall/scripts/jail index 4b2882dad477..0c3c7e125fdd 100755 --- a/usr.sbin/bsdinstall/scripts/jail +++ b/usr.sbin/bsdinstall/scripts/jail @@ -207,7 +207,7 @@ fi trap error SIGINT # SIGINT is bad again bsdinstall config || error "Failed to save config" cp /etc/resolv.conf $1/etc -cp /etc/localtime $1/etc +cp -P /etc/localtime $1/etc cp /var/db/zoneinfo $1/var/db # Run post-install script diff --git a/usr.sbin/bsdinstall/scripts/pkgbase.in b/usr.sbin/bsdinstall/scripts/pkgbase.in index d123394c170e..d02d89b23865 100755 --- a/usr.sbin/bsdinstall/scripts/pkgbase.in +++ b/usr.sbin/bsdinstall/scripts/pkgbase.in @@ -77,37 +77,60 @@ end -- traditional tarball component selection dialog. local function select_components(components, options) local descriptions = { - kernel_dbg = "Kernel debug info", - base_dbg = "Base system debug info", - src = "System source tree", - tests = "Test suite", - lib32 = "32-bit compatibility libraries", - lib32_dbg = "32-bit compatibility libraries debug info", + ["kernel-dbg"] = "Debug symbols for the kernel", + ["devel"] = "C/C++ compilers and related utilities", + ["optional"] = "Optional software (excluding compilers)", + ["base"] = "The complete base system (includes devel and optional)", + ["src"] = "System source tree", + ["tests"] = "Test suite", + ["lib32"] = "32-bit compatibility libraries", + ["debug"] = "Debug symbols for the selected components", } + + -- These defaults match what the non-pkgbase installer selects + -- by default. local defaults = { - kernel_dbg = "on", - base_dbg = "off", - src = "off", - tests = "off", - lib32 = "on", - lib32_dbg = "off", + ["base"] = "on", + ["kernel-dbg"] = "on", } + -- Enable compat sets by default. + for compat in all_libcompats:gmatch("%S+") do + defaults["lib" .. compat] = "on" + end -- Sorting the components is necessary to ensure that the ordering is -- consistent in the UI. local sorted_components = {} for component, _ in pairs(components) do - table.insert(sorted_components, component) + -- Decide which sets we want to offer to the user: + -- + -- "minimal" is not offered since it's always included, as is + -- "pkg" if it's present. + -- + -- "-dbg" sets are never offered, because those are handled + -- via the "debug" component. + -- + -- "kernels" is never offered because we only want one kernel, + -- which is handled separately. + -- + -- Sets whose name ends in "-jail" are intended for jails, and + -- are only offered if no_kernel is set. + if component ~= "pkg" and + not component:match("^minimal") and + not component:match("%-dbg$") and + not (component == "kernels") and + not (not options.no_kernel and component:match("%-jail$")) then + table.insert(sorted_components, component) + end end table.sort(sorted_components) local checklist_items = {} for _, component in ipairs(sorted_components) do - if component ~= "base" and component ~= "kernel" and - not (component == "kernel_dbg" and options.no_kernel) and - #components[component] > 0 then - local description = descriptions[component] or "''" - local default = defaults[component] or "off" + if component ~= "kernel" and not + (component == "kernel-dbg" and options.no_kernel) then + local description = descriptions[component] or "" + local default = defaults[component] or "off" table.insert(checklist_items, component) table.insert(checklist_items, description) table.insert(checklist_items, default) @@ -120,7 +143,10 @@ local function select_components(components, options) "--nocancel", "--disable-esc", "--separate-output", - "--checklist", "Choose optional system components to install:", + "--checklist", + "A minimal set of packages suitable for a multi-user system ".. + "is always installed. Select additional packages you wish ".. + "to install:", "0", "0", "0", -- autosize } append_list(bsddialog_args, checklist_items) @@ -132,10 +158,23 @@ local function select_components(components, options) -- hopefully useful stack trace. assert(exit_code == 0) - local selected = {"base"} + -- Always install the minimal set, since it's required for the system + -- to work. The base set depends on minimal, but it's fine to install + -- both, and this way the user can remove the base set without pkg + -- autoremove then trying to remove minimal. + local selected = {"minimal"} + + -- If pkg is available, always install it so the user can manage the + -- installed system. This is optional, because a repository built + -- from src alone won't have a pkg package. + if components["pkg"] then + table.insert(selected, "pkg") + end + if not options.no_kernel then table.insert(selected, "kernel") end + for component in output:gmatch("[^\n]+") do table.insert(selected, component) end @@ -145,67 +184,81 @@ end -- Returns a list of pkgbase packages selected by the user local function select_packages(pkg, options) + -- These are the components which aren't generated automatically from + -- package sets. local components = { - kernel = {}, - kernel_dbg = {}, - base = {}, - base_dbg = {}, - src = {}, - tests = {}, + ["kernel"] = {}, + ["kernel-dbg"] = {}, + ["debug"] = {}, } - for compat in all_libcompats:gmatch("%S+") do - components["lib" .. compat] = {} - components["lib" .. compat .. "_dbg"] = {} - end + -- Note: if you update this list, you must also update the list in + -- release/scripts/pkgbase-stage.lua. + local kernel_packages = { + -- Most architectures use this + ["FreeBSD-kernel-generic"] = true, + -- PowerPC uses either of these, depending on platform + ["FreeBSD-kernel-generic64"] = true, + ["FreeBSD-kernel-generic64le"] = true, + } local rquery = capture(pkg .. "rquery -U -r FreeBSD-base %n") for package in rquery:gmatch("[^\n]+") do - if package == "FreeBSD-src" or package:match("^FreeBSD%-src%-.*") then - table.insert(components["src"], package) - elseif package == "FreeBSD-tests" or package:match("^FreeBSD%-tests%-.*") then - table.insert(components["tests"], package) - elseif package:match("^FreeBSD%-kernel%-.*") and - package ~= "FreeBSD-kernel-man" - then - -- Kernels other than FreeBSD-kernel-generic are ignored - if package == "FreeBSD-kernel-generic" then - table.insert(components["kernel"], package) - elseif package == "FreeBSD-kernel-generic-dbg" then - table.insert(components["kernel_dbg"], package) - end - elseif package:match(".*%-dbg$") then - table.insert(components["base_dbg"], package) - else - local found = false - for compat in all_libcompats:gmatch("%S+") do - if package:match(".*%-dbg%-lib" .. compat .. "$") then - table.insert(components["lib" .. compat .. "_dbg"], package) - found = true - break - elseif package:match(".*%-lib" .. compat .. "$") then - table.insert(components["lib" .. compat], package) - found = true - break - end - end - if not found then - table.insert(components["base"], package) - end + local setname = package:match("^FreeBSD%-set%-(.+)$") + + if setname then + components[setname] = components[setname] or {} + table.insert(components[setname], package) + elseif kernel_packages[package] then + table.insert(components["kernel"], package) + elseif kernel_packages[package:match("(.*)%-dbg$")] then + table.insert(components["kernel-dbg"], package) + elseif package == "pkg" then + components["pkg"] = components["pkg"] or {} + table.insert(components["pkg"], package) end end - -- Don't assert the existence of dbg, tests, and src packages here. If using - -- a custom local repository with BSDINSTALL_PKG_REPOS_DIR we shouldn't - -- require it to have all packages. + + -- Assert that both a kernel and the "minimal" set are available, since + -- those are both required to install a functional system. Don't worry + -- if other sets are missing (e.g. base or src), which might happen + -- when using custom install media. assert(#components["kernel"] == 1) - assert(#components["base"] > 0) + assert(#components["minimal"] == 1) + + -- Prompt the user for what to install. + local selected = select_components(components, options) + + -- Determine if the "debug" component was selected. + local debug = false + for _, component in ipairs(selected) do + if component == "debug" then + debug = true + break + end + end - local selected = {} - for _, component in ipairs(select_components(components, options)) do - append_list(selected, components[component]) + local packages = {} + for _, component in ipairs(selected) do + local pkglist = components[component] + append_list(packages, pkglist) + + -- If the debug component was selected, install the -dbg + -- package for each set. We have to check if the dbg set + -- actually exists, because some sets (src, tests) don't + -- have a -dbg subpackage. + for _, c in ipairs(pkglist) do + local setname = c:match("^FreeBSD%-set%-(.*)$") + if debug and setname then + local dbgset = setname.."-dbg" + if components[dbgset] then + append_list(packages, components[dbgset]) + end + end + end end - return selected + return packages end local function parse_options() diff --git a/usr.sbin/bsdinstall/scripts/zfsboot b/usr.sbin/bsdinstall/scripts/zfsboot index a3c1e2ddb89f..5fbf56ea59ac 100755 --- a/usr.sbin/bsdinstall/scripts/zfsboot +++ b/usr.sbin/bsdinstall/scripts/zfsboot @@ -69,7 +69,7 @@ f_include $BSDCFG_SHARE/variable.subr : ${ZFSBOOT_VDEV_TYPE:=stripe} # -# Should we use sysctl(8) vfs.zfs.min_auto_ashift=12 to force 4K sectors? +# Should we use sysctl(8) vfs.zfs.vdev.min_auto_ashift=12 to force 4K sectors? # : ${ZFSBOOT_FORCE_4K_SECTORS=1} @@ -152,7 +152,7 @@ f_isset ZFSBOOT_DATASETS || ZFSBOOT_DATASETS=" # Home directories separated so they are common to all BEs /home mountpoint=/home - # Compress /tmp, allow exec but not setuid + # Create /tmp and allow exec but not setuid /tmp mountpoint=/tmp,exec=on,setuid=off # Don't mount /usr so that 'base' files go to the BEROOT @@ -161,7 +161,7 @@ f_isset ZFSBOOT_DATASETS || ZFSBOOT_DATASETS=" # Ports tree /usr/ports setuid=off - # Source tree (compressed) + # Source tree /usr/src # Create /var and friends @@ -221,7 +221,7 @@ PRINTF_CONF="printf '%s=\"%%s\"\\\n' %s >> \"%s\"" PRINTF_FSTAB='printf "$FSTAB_FMT" "%s" "%s" "%s" "%s" "%s" "%s" >> "%s"' SHELL_TRUNCATE=':> "%s"' SWAP_GMIRROR_LABEL='gmirror label swap %s' -SYSCTL_ZFS_MIN_ASHIFT_12='sysctl vfs.zfs.min_auto_ashift=12' +SYSCTL_ZFS_MIN_ASHIFT_12='sysctl vfs.zfs.vdev.min_auto_ashift=12' UMOUNT='umount "%s"' ZFS_CREATE_WITH_OPTIONS='zfs create %s "%s"' ZFS_MOUNT='zfs mount "%s"' @@ -255,7 +255,7 @@ msg_encrypt_disks="Encrypt Disks?" msg_encrypt_disks_help="Use geli(8) to encrypt all data partitions" msg_error="Error" msg_force_4k_sectors="Force 4K Sectors?" -msg_force_4k_sectors_help="Align partitions to 4K sector boundries and set vfs.zfs.min_auto_ashift=12" +msg_force_4k_sectors_help="Align partitions to 4K sector boundries and set vfs.zfs.vdev.min_auto_ashift=12" msg_freebsd_installer="$OSNAME Installer" msg_geli_password="Enter a strong passphrase, used to protect your encryption keys. You will be required to enter this passphrase each time the system is booted" msg_geli_setup="Initializing encryption on selected disks,\n this will take several seconds per disk" @@ -1099,7 +1099,7 @@ zfs_create_boot() # f_dprintf "$funcname: Preparing disk partitions for ZFS pool..." - # Force 4K sectors using vfs.zfs.min_auto_ashift=12 + # Force 4K sectors using vfs.zfs.vdev.min_auto_ashift=12 if [ "$ZFSBOOT_FORCE_4K_SECTORS" ]; then f_dprintf "$funcname: With 4K sectors..." f_eval_catch $funcname sysctl "$SYSCTL_ZFS_MIN_ASHIFT_12" \ @@ -1382,7 +1382,7 @@ zfs_create_boot() if [ "$ZFSBOOT_FORCE_4K_SECTORS" ]; then f_eval_catch $funcname echo "$ECHO_APPEND" \ - 'vfs.zfs.min_auto_ashift=12' \ + 'vfs.zfs.vdev.min_auto_ashift=12' \ $BSDINSTALL_TMPETC/sysctl.conf.zfs || return $FAILURE fi diff --git a/usr.sbin/certctl/certctl.c b/usr.sbin/certctl/certctl.c index 3601f6929fc4..a53ed7b2b4b2 100644 --- a/usr.sbin/certctl/certctl.c +++ b/usr.sbin/certctl/certctl.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: BSD-2-Clause */ +#include <sys/types.h> #include <sys/sysctl.h> #include <sys/stat.h> #include <sys/tree.h> @@ -379,7 +380,7 @@ static int read_certs(const char *path, struct cert_tree *tree, struct cert_tree *exclude) { struct stat sb; - char *paths[] = { (char *)(uintptr_t)path, NULL }; + char *paths[] = { __DECONST(char *, path), NULL }; FTS *fts; FTSENT *ent; int fts_options = FTS_LOGICAL | FTS_NOCHDIR; diff --git a/usr.sbin/cpucontrol/amd10h.c b/usr.sbin/cpucontrol/amd10h.c index 4fda44f0b797..9fc861fe5914 100644 --- a/usr.sbin/cpucontrol/amd10h.c +++ b/usr.sbin/cpucontrol/amd10h.c @@ -93,7 +93,7 @@ amd10h_update(const struct ucode_update_params *params) size_t fw_size; size_t selected_size; uint32_t revision; - uint32_t new_rev; + uint32_t new_rev, old_rev; uint32_t signature; int devfd; int error; @@ -121,15 +121,16 @@ amd10h_update(const struct ucode_update_params *params) WARN(0, "ioctl(%s)", dev); goto done; } - revision = (uint32_t)msrargs.data; + old_rev = revision = (uint32_t)msrargs.data; - selected_fw = ucode_amd_find(path, signature, revision, fw_image, + selected_fw = ucode_amd_find(path, signature, &revision, fw_image, fw_size, &selected_size); if (selected_fw != NULL) { WARNX(1, "selected ucode size is %zu", selected_size); - fprintf(stderr, "%s: updating cpu %s to revision %#x... ", - path, dev, revision); + fprintf(stderr, + "%s: updating cpu %s from rev %#x to rev %#x... ", + path, dev, old_rev, revision); args.data = __DECONST(void *, selected_fw); args.size = selected_size; diff --git a/usr.sbin/cpucontrol/cpucontrol.h b/usr.sbin/cpucontrol/cpucontrol.h index a4b3a94c19e6..d03c30a6bd6d 100644 --- a/usr.sbin/cpucontrol/cpucontrol.h +++ b/usr.sbin/cpucontrol/cpucontrol.h @@ -43,6 +43,7 @@ typedef void ucode_update_t(const struct ucode_update_params *params); extern int verbosity_level; #ifdef DEBUG +#include <stdio.h> # define WARNX(level, ...) \ if ((level) <= verbosity_level) { \ fprintf(stderr, "%s:%d ", __FILE__, __LINE__); \ diff --git a/usr.sbin/cron/cron/crontab b/usr.sbin/cron/cron/crontab index 2f4bc71d8722..e37d3fd67543 100644 --- a/usr.sbin/cron/cron/crontab +++ b/usr.sbin/cron/cron/crontab @@ -1,4 +1,4 @@ -# /etc/crontab - root's crontab for FreeBSD +# /etc/crontab - system crontab for FreeBSD # # SHELL=/bin/sh diff --git a/usr.sbin/ctld/ctld.hh b/usr.sbin/ctld/ctld.hh index bfe4507bb3e6..cc88e6eb590e 100644 --- a/usr.sbin/ctld/ctld.hh +++ b/usr.sbin/ctld/ctld.hh @@ -425,7 +425,7 @@ protected: virtual struct portal_group *default_portal_group() = 0; struct conf *t_conf; - std::array<struct lun *, MAX_LUNS> t_luns; + std::array<struct lun *, MAX_LUNS> t_luns = {}; auth_group_sp t_auth_group; std::list<port *> t_ports; std::string t_name; @@ -434,7 +434,7 @@ protected: std::string t_redirection; /* Name of this target's physical port, if any, i.e. "isp0" */ std::string t_pport; - bool t_private_auth; + bool t_private_auth = false; }; using target_up = std::unique_ptr<target>; @@ -575,7 +575,7 @@ struct pport { private: std::string pp_name; uint32_t pp_ctl_port; - bool pp_linked; + bool pp_linked = false; }; struct kports { diff --git a/usr.sbin/ctld/iscsi.hh b/usr.sbin/ctld/iscsi.hh index d510e8c6731b..66bfecd62692 100644 --- a/usr.sbin/ctld/iscsi.hh +++ b/usr.sbin/ctld/iscsi.hh @@ -66,7 +66,7 @@ private: std::string conn_initiator_name; std::string conn_initiator_addr; std::string conn_initiator_alias; - uint8_t conn_initiator_isid[6]; + uint8_t conn_initiator_isid[6] = {}; const struct sockaddr *conn_initiator_sa = nullptr; int conn_max_recv_data_segment_limit = 0; int conn_max_send_data_segment_limit = 0; diff --git a/usr.sbin/cxgbetool/Makefile b/usr.sbin/cxgbetool/Makefile index cc5290b8aaf5..bf24b11c18c8 100644 --- a/usr.sbin/cxgbetool/Makefile +++ b/usr.sbin/cxgbetool/Makefile @@ -6,6 +6,7 @@ SRCS+= tcb_common.c SRCS+= tcbinfot4.c tcbshowt4.c SRCS+= tcbinfot5.c tcbshowt5.c SRCS+= tcbinfot6.c tcbshowt6.c +SRCS+= tcbinfot7.c tcbshowt7.c CFLAGS+= -I${SRCTOP}/sys/dev/cxgbe -I${SRCTOP}/sys -I. LIBADD= pcap WARNS?= 2 diff --git a/usr.sbin/cxgbetool/cxgbetool.c b/usr.sbin/cxgbetool/cxgbetool.c index c3bd883b39fc..68de86d74092 100644 --- a/usr.sbin/cxgbetool/cxgbetool.c +++ b/usr.sbin/cxgbetool/cxgbetool.c @@ -1,6 +1,5 @@ /*- - * Copyright (c) 2011 Chelsio Communications, Inc. - * All rights reserved. + * Copyright (c) 2011, 2025 Chelsio Communications. * Written by: Navdeep Parhar <np@FreeBSD.org> * * Redistribution and use in source and binary forms, with or without @@ -92,6 +91,7 @@ struct field_desc { #include "reg_defs_t4.c" #include "reg_defs_t5.c" #include "reg_defs_t6.c" +#include "reg_defs_t7.c" #include "reg_defs_t4vf.c" static void @@ -436,6 +436,48 @@ dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) } #undef T6_MODREGS +#define T7_MODREGS(name) { #name, t7_##name##_regs } +static int +dump_regs_t7(int argc, const char *argv[], const uint32_t *regs) +{ + static struct mod_regs t7_mod[] = { + T7_MODREGS(sge), + { "pci", t7_pcie_regs }, + T7_MODREGS(dbg), + { "mc0", t7_mc_t70_regs }, + T7_MODREGS(ma), + { "edc0", t7_edc_t60_regs }, + { "edc1", t7_edc_t61_regs }, + T7_MODREGS(cim), + T7_MODREGS(tp), + { "ulprx", t7_ulp_rx_regs }, + { "ulptx", t7_ulp_tx_regs }, + { "pmrx", t7_pm_rx_regs }, + { "pmtx", t7_pm_tx_regs }, + T7_MODREGS(mps), + { "cplsw", t7_cpl_switch_regs }, + T7_MODREGS(smb), + { "i2c", t7_i2cm_regs }, + T7_MODREGS(mi), + T7_MODREGS(uart), + T7_MODREGS(pmu), + T7_MODREGS(sf), + T7_MODREGS(pl), + T7_MODREGS(le), + T7_MODREGS(ncsi), + { "mac", t7_mac_t7_regs }, + { "hma", t7_hma_t6_regs }, + { "crypto0", t7_crypto_0_regs }, + { "crypto1", t7_crypto_1_regs }, + { "cryptokey", t7_crypto_key_regs }, + T7_MODREGS(arm), + T7_MODREGS(gcache), + }; + + return dump_regs_table(argc, argv, regs, t7_mod, nitems(t7_mod)); +} +#undef T7_MODREGS + static int dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) { @@ -479,6 +521,20 @@ dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) } static int +dump_regs_t7vf(int argc, const char *argv[], const uint32_t *regs) +{ + static struct mod_regs t7vf_mod[] = { + { "sge", t5vf_sge_regs }, + { "mps", t4vf_mps_regs }, + { "pl", t7vf_pl_regs }, + { "mbdata", t4vf_mbdata_regs }, + { "cim", t4vf_cim_regs }, + }; + + return dump_regs_table(argc, argv, regs, t7vf_mod, nitems(t7vf_mod)); +} + +static int dump_regs(int argc, const char *argv[]) { int vers, revision, rc; @@ -515,6 +571,11 @@ dump_regs(int argc, const char *argv[]) rc = dump_regs_t6vf(argc, argv, regs.data); else rc = dump_regs_t6(argc, argv, regs.data); + } else if (vers == 7) { + if (revision == 0x3f) + rc = dump_regs_t7vf(argc, argv, regs.data); + else + rc = dump_regs_t7(argc, argv, regs.data); } else { warnx("%s (type %d, rev %d) is not a known card.", g.nexus, vers, revision); @@ -1492,7 +1553,180 @@ show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) #define FIELD1(name, start) FIELD(name, start, start) static void -show_t5t6_ctxt(const struct t4_sge_context *p, int vers) +show_t7_ctxt(const struct t4_sge_ctxt *p) +{ + static struct field_desc egress_t7[] = { + FIELD("uPToken_4k:", 197, 198), + FIELD("WrLength_5:", 196, 196), + FIELD("CpuId:", 193, 195), + FIELD("PCIeDataChannel_1:", 192, 192), + FIELD("DCA_ST:", 181, 191), + FIELD("StatusPgNS:", 180, 180), + FIELD("StatusPgRO:", 179, 179), + FIELD("FetchNS:", 178, 178), + FIELD("FetchRO:", 177, 177), + FIELD("Valid:", 176, 176), + FIELD("ReschedulePending_1:", 175, 175), + FIELD("PCIeDataChannel:", 174, 174), + FIELD("StatusPgTPHintEn:", 173, 173), + FIELD("StatusPgTPHint:", 171, 172), + FIELD("FetchTPHintEn:", 170, 170), + FIELD("FetchTPHint:", 168, 169), + FIELD("FCThreshOverride:", 167, 167), + { "WRLength:", 162, 166, 9, 0, 1 }, + FIELD("WRLengthKnown:", 161, 161), + FIELD("ReschedulePending:", 160, 160), + FIELD("TimerIx:", 157, 159), + FIELD("FetchBurstMin:", 156, 156), + FIELD("FLMPacking:", 155, 155), + FIELD("FetchBurstMax:", 153, 154), + FIELD("uPToken:", 133, 152), + FIELD("uPTokenEn:", 132, 132), + FIELD("UserModeIO:", 131, 131), + FIELD("uPFLCredits:", 123, 130), + FIELD("uPFLCreditEn:", 122, 122), + FIELD("FID:", 111, 121), + FIELD("HostFCMode:", 109, 110), + FIELD("HostFCOwner:", 108, 108), + { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, + FIELD("CIDX:", 89, 104), + FIELD("PIDX:", 73, 88), + { "BaseAddress:", 18, 72, 9, 1 }, + FIELD("QueueSize:", 2, 17), + FIELD("QueueType:", 1, 1), + FIELD("FetchSizeMode:", 0, 0), + { NULL } + }; + static struct field_desc fl_t7[] = { + FIELD("FLMcontextID_4k:", 197, 198), + FIELD("CpuId:", 193, 195), + FIELD("PCIeDataChannel_1:", 192, 192), + FIELD("DCA_ST:", 181, 191), + FIELD("StatusPgNS:", 180, 180), + FIELD("StatusPgRO:", 179, 179), + FIELD("FetchNS:", 178, 178), + FIELD("FetchRO:", 177, 177), + FIELD("Valid:", 176, 176), + FIELD("PCIeDataChannel:", 174, 175), + FIELD("StatusPgTPHintEn:", 173, 173), + FIELD("StatusPgTPHint:", 171, 172), + FIELD("FetchTPHintEn:", 170, 170), + FIELD("FetchTPHint:", 168, 169), + FIELD("FCThreshOverride:", 167, 167), + FIELD("ReschedulePending:", 160, 160), + FIELD("OnChipQueue:", 159, 159), + FIELD("FetchSizeMode:", 158, 158), + { "FetchBurstMin:", 156, 157, 4, 0, 1 }, + FIELD("FLMPacking:", 155, 155), + FIELD("FetchBurstMax:", 153, 154), + FIELD("FLMcongMode:", 152, 152), + FIELD("MaxuPFLCredits:", 144, 151), + FIELD("FLMcontextID:", 133, 143), + FIELD("uPTokenEn:", 132, 132), + FIELD("UserModeIO:", 131, 131), + FIELD("uPFLCredits:", 123, 130), + FIELD("uPFLCreditEn:", 122, 122), + FIELD("FID:", 111, 121), + FIELD("HostFCMode:", 109, 110), + FIELD("HostFCOwner:", 108, 108), + { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, + FIELD("CIDX:", 89, 104), + FIELD("PIDX:", 73, 88), + { "BaseAddress:", 18, 72, 9, 1 }, + FIELD("QueueSize:", 2, 17), + FIELD("QueueType:", 1, 1), + FIELD("CachePriority:", 0, 0), + { NULL } + }; + static struct field_desc ingress_t7[] = { + FIELD("Fid:", 171, 182), + FIELD("InterruptIDX4K:", 170, 170), + FIELD("CoalEn:", 169, 169), + FIELD("CoalAbort:", 168, 168), + FIELD("CoalCntr:", 161, 167), + FIELD("CoalCompTimerStatus:", 160, 160), + FIELD("CoalCompCntrStatus:", 159, 159), + FIELD("SP_NS:", 158, 158), + FIELD("SP_RO:", 157, 157), + FIELD("SP_TPHintEn:", 156, 156), + FIELD("SP_TPHint:", 154, 155), + FIELD("DCA_ST:", 143, 153), + FIELD("ISCSICoalescing:", 142, 142), + FIELD("Queue_Valid:", 141, 141), + FIELD("TimerPending:", 140, 140), + FIELD("DropRSS:", 139, 139), + FIELD("PCIeChannel:", 137, 138), + FIELD("SEInterruptArmed:", 136, 136), + FIELD("CongestionMgtEnable:", 135, 135), + FIELD("NoSnoop:", 134, 134), + FIELD("RelaxedOrdering:", 133, 133), + FIELD("GTSmode:", 132, 132), + FIELD("TPHintEn:", 131, 131), + FIELD("TPHint:", 129, 130), + FIELD("UpdateScheduling:", 128, 128), + FIELD("UpdateDelivery:", 126, 127), + FIELD("InterruptSent:", 125, 125), + FIELD("InterruptIDX:", 114, 124), + FIELD("InterruptDestination:", 113, 113), + FIELD("InterruptArmed:", 112, 112), + FIELD("RxIntCounter:", 106, 111), + FIELD("RxIntCounterThreshold:", 104, 105), + FIELD("Generation:", 103, 103), + { "BaseAddress:", 48, 102, 9, 1 }, + FIELD("PIDX:", 32, 47), + FIELD("CIDX:", 16, 31), + { "QueueSize:", 4, 15, 4, 0 }, + { "QueueEntrySize:", 2, 3, 4, 0, 1 }, + FIELD("QueueEntryOverride:", 1, 1), + FIELD("CachePriority:", 0, 0), + { NULL } + }; + static struct field_desc flm_t7[] = { + FIELD("MidCongEn:", 154, 154), + FIELD("FlPtr:", 90, 153), + FIELD("Valid:", 89, 89), + FIELD("SplitLenMode:", 87, 88), + FIELD("TPHintEn:", 86, 86), + FIELD("TPHint:", 84, 85), + FIELD("NoSnoop:", 83, 83), + FIELD("RelaxedOrdering:", 82, 82), + FIELD("DCA_ST:", 71, 81), + FIELD("EQid:", 54, 70), + FIELD("SplitEn:", 52, 53), + FIELD("PadEn:", 51, 51), + FIELD("PackEn:", 50, 50), + FIELD("Cache_Lock :", 49, 49), + FIELD("CongDrop:", 48, 48), + FIELD("Inflifght:", 47, 47), + FIELD("CongEn:", 46, 46), + FIELD("CongMode:", 45, 45), + FIELD("PackOffset:", 20, 39), + FIELD("CIDX:", 8, 15), + FIELD("PIDX:", 0, 7), + { NULL } + }; + static struct field_desc conm_t7[] = { + FIELD("CngMPSEnable:", 37, 37), + FIELD("CngTPMode:", 35, 36), + FIELD("CngDBPHdr:", 34, 34), + FIELD("CngDBPData:", 33, 33), + FIELD("CngIMSG:", 32, 32), + { "CngChMap:", 0, 31, 0, 1, 0 }, + { NULL } + }; + + if (p->mem_id == SGE_CONTEXT_EGRESS) + show_struct(p->data, 7, (p->data[0] & 2) ? fl_t7 : egress_t7); + else if (p->mem_id == SGE_CONTEXT_FLM) + show_struct(p->data, 5, flm_t7); + else if (p->mem_id == SGE_CONTEXT_INGRESS) + show_struct(p->data, 6, ingress_t7); + else if (p->mem_id == SGE_CONTEXT_CNM) + show_struct(p->data, 2, conm_t7); +} + +static void +show_t5t6_ctxt(const struct t4_sge_ctxt *p, int vers) { static struct field_desc egress_t5[] = { FIELD("DCA_ST:", 181, 191), @@ -1743,7 +1977,7 @@ show_t5t6_ctxt(const struct t4_sge_context *p, int vers) } static void -show_t4_ctxt(const struct t4_sge_context *p) +show_t4_ctxt(const struct t4_sge_ctxt *p) { static struct field_desc egress_t4[] = { FIELD1("StatusPgNS:", 180), @@ -1887,7 +2121,7 @@ get_sge_context(int argc, const char *argv[]) int rc; char *p; long cid; - struct t4_sge_context cntxt = {0}; + struct t4_sge_ctxt cntxt = {0}; if (argc != 2) { warnx("sge_context: incorrect number of arguments."); @@ -1915,14 +2149,21 @@ get_sge_context(int argc, const char *argv[]) } cntxt.cid = cid; - rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); + rc = doit(CHELSIO_T4_GET_SGE_CTXT, &cntxt); if (rc != 0) return (rc); - if (g.chip_id == 4) + switch (g.chip_id) { + case 4: show_t4_ctxt(&cntxt); - else + break; + case 5: + case 6: show_t5t6_ctxt(&cntxt, g.chip_id); + break; + default: + show_t7_ctxt(&cntxt); + } return (0); } diff --git a/usr.sbin/cxgbetool/reg_defs_t4vf.c b/usr.sbin/cxgbetool/reg_defs_t4vf.c index 5ea7d4f276dd..bf60ee8a8356 100644 --- a/usr.sbin/cxgbetool/reg_defs_t4vf.c +++ b/usr.sbin/cxgbetool/reg_defs_t4vf.c @@ -122,6 +122,21 @@ struct reg_info t6vf_pl_regs[] = { { NULL, 0, 0 } }; +struct reg_info t7vf_pl_regs[] = { + { "PL_WHOAMI", 0x200, 0 }, + { "PortxMap", 24, 3 }, + { "SourceBus", 16, 2 }, + { "SourcePF", 9, 3 }, + { "IsVF", 8, 1 }, + { "VFID", 0, 8 }, + { "PL_VF_REV", 0x204, 0 }, + { "ChipID", 4, 4 }, + { "Rev", 0, 4 }, + { "PL_VF_REVISION", 0x208, 0 }, + + { NULL, 0, 0 } +}; + struct reg_info t4vf_cim_regs[] = { /* * Note: the Mailbox Control register has read side-effects so diff --git a/usr.sbin/cxgbetool/reg_defs_t7.c b/usr.sbin/cxgbetool/reg_defs_t7.c new file mode 100644 index 000000000000..549db9c546d5 --- /dev/null +++ b/usr.sbin/cxgbetool/reg_defs_t7.c @@ -0,0 +1,28216 @@ +/* This file is automatically generated --- changes will be lost */ +/* Generation Date : Thu Sep 11 05:26:14 PM IST 2025 */ +/* Directory name: t7_reg.txt, Changeset: 5945:1487219ecb20 */ + +struct reg_info t7_sge_regs[] = { + { "SGE_PF_KDOORBELL", 0x1e000, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1e004, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 }, + { "SGE_PF_KDOORBELL", 0x1e400, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1e404, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1e408, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1e40c, 0 }, + { "SGE_PF_KDOORBELL", 0x1e800, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1e804, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1e808, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1e80c, 0 }, + { "SGE_PF_KDOORBELL", 0x1ec00, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1ec04, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1ec08, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1ec0c, 0 }, + { "SGE_PF_KDOORBELL", 0x1f000, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1f004, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1f008, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1f00c, 0 }, + { "SGE_PF_KDOORBELL", 0x1f400, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1f404, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1f408, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1f40c, 0 }, + { "SGE_PF_KDOORBELL", 0x1f800, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1f804, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1f808, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1f80c, 0 }, + { "SGE_PF_KDOORBELL", 0x1fc00, 0 }, + { "QID", 15, 17 }, + { "Sync", 14, 1 }, + { "Type", 13, 1 }, + { "PIDX", 0, 13 }, + { "SGE_PF_GTS", 0x1fc04, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KTIMESTAMP_LO", 0x1fc08, 0 }, + { "SGE_PF_KTIMESTAMP_HI", 0x1fc0c, 0 }, + { "SGE_CONTROL", 0x1008, 0 }, + { "IgrAllCPLtoFL", 31, 1 }, + { "FLSplitMin", 22, 9 }, + { "NumOfFid", 19, 3 }, + { "RxPktCPLMode", 18, 1 }, + { "EgrStatusPageSize", 17, 1 }, + { "IngHintEnable2", 16, 1 }, + { "IngHintEnable1", 15, 1 }, + { "IngHintEnable0", 14, 1 }, + { "IngIntCompareIDX", 13, 1 }, + { "PktShift", 10, 3 }, + { "IngPCIeBoundary", 7, 3 }, + { "IngPadBoundary", 4, 3 }, + { "IngHintEnable3", 3, 1 }, + { "tf_mode", 1, 2 }, + { "GlobalEnable", 0, 1 }, + { "SGE_HOST_PAGE_SIZE", 0x100c, 0 }, + { "HostPageSizePF7", 28, 4 }, + { "HostPageSizePF6", 24, 4 }, + { "HostPageSizePF5", 20, 4 }, + { "HostPageSizePF4", 16, 4 }, + { "HostPageSizePF3", 12, 4 }, + { "HostPageSizePF2", 8, 4 }, + { "HostPageSizePF1", 4, 4 }, + { "HostPageSizePF0", 0, 4 }, + { "SGE_EGRESS_QUEUES_PER_PAGE_PF", 0x1010, 0 }, + { "QueuesPerPagePF7", 28, 4 }, + { "QueuesPerPagePF6", 24, 4 }, + { "QueuesPerPagePF5", 20, 4 }, + { "QueuesPerPagePF4", 16, 4 }, + { "QueuesPerPagePF3", 12, 4 }, + { "QueuesPerPagePF2", 8, 4 }, + { "QueuesPerPagePF1", 4, 4 }, + { "QueuesPerPagePF0", 0, 4 }, + { "SGE_EGRESS_QUEUES_PER_PAGE_VF", 0x1014, 0 }, + { "QueuesPerPageVFPF7", 28, 4 }, + { "QueuesPerPageVFPF6", 24, 4 }, + { "QueuesPerPageVFPF5", 20, 4 }, + { "QueuesPerPageVFPF4", 16, 4 }, + { "QueuesPerPageVFPF3", 12, 4 }, + { "QueuesPerPageVFPF2", 8, 4 }, + { "QueuesPerPageVFPF1", 4, 4 }, + { "QueuesPerPageVFPF0", 0, 4 }, + { "SGE_USER_MODE_LIMITS", 0x1018, 0 }, + { "Opcode_Min", 24, 8 }, + { "Opcode_Max", 16, 8 }, + { "Length_Min", 8, 8 }, + { "Length_Max", 0, 8 }, + { "SGE_WR_ERROR", 0x101c, 0 }, + { "WR_Sendpath_Error_Opcode", 16, 8 }, + { "WR_Sendpath_Opcode", 8, 8 }, + { "WR_Error_Opcode", 0, 8 }, + { "SGE_INT_CAUSE1", 0x1024, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_headersplit_fifo3", 28, 1 }, + { "perr_headersplit_fifo2", 27, 1 }, + { "perr_payload_fifo3", 26, 1 }, + { "perr_payload_fifo2", 25, 1 }, + { "perr_pc_rsp", 23, 1 }, + { "perr_pc_req", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_INT_ENABLE1", 0x1028, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_headersplit_fifo3", 28, 1 }, + { "perr_headersplit_fifo2", 27, 1 }, + { "perr_payload_fifo3", 26, 1 }, + { "perr_payload_fifo2", 25, 1 }, + { "perr_pc_rsp", 23, 1 }, + { "perr_pc_req", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_PERR_ENABLE1", 0x102c, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_headersplit_fifo3", 28, 1 }, + { "perr_headersplit_fifo2", 27, 1 }, + { "perr_payload_fifo3", 26, 1 }, + { "perr_payload_fifo2", 25, 1 }, + { "perr_pc_rsp", 23, 1 }, + { "perr_pc_req", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_INT_CAUSE2", 0x1030, 0 }, + { "tf_fifo_perr", 24, 1 }, + { "perr_egr_dbp_tx_coal", 23, 1 }, + { "perr_dbp_fl_fifo", 22, 1 }, + { "deq_ll_perr", 21, 1 }, + { "enq_perr", 20, 1 }, + { "deq_out_perr", 19, 1 }, + { "buf_perr", 18, 1 }, + { "perr_isw_idma3_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_isw_idma2_fifo", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "sge_ipp_fifo_perr", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_db_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_INT_ENABLE2", 0x1034, 0 }, + { "tf_fifo_perr", 24, 1 }, + { "perr_egr_dbp_tx_coal", 23, 1 }, + { "perr_dbp_fl_fifo", 22, 1 }, + { "deq_ll_perr", 21, 1 }, + { "enq_perr", 20, 1 }, + { "deq_out_perr", 19, 1 }, + { "buf_perr", 18, 1 }, + { "perr_isw_idma3_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_isw_idma2_fifo", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "sge_ipp_fifo_perr", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_db_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_PERR_ENABLE2", 0x1038, 0 }, + { "tf_fifo_perr", 24, 1 }, + { "perr_egr_dbp_tx_coal", 23, 1 }, + { "perr_dbp_fl_fifo", 22, 1 }, + { "deq_ll_perr", 21, 1 }, + { "enq_perr", 20, 1 }, + { "deq_out_perr", 19, 1 }, + { "buf_perr", 18, 1 }, + { "perr_isw_idma3_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_isw_idma2_fifo", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "sge_ipp_fifo_perr", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_dbp_lp_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_INT_CAUSE3", 0x103c, 0 }, + { "err_flm_dbp", 31, 1 }, + { "err_flm_idma1", 30, 1 }, + { "err_flm_idma0", 29, 1 }, + { "err_flm_hint", 28, 1 }, + { "err_pcie_error3", 27, 1 }, + { "err_pcie_error2", 26, 1 }, + { "err_pcie_error1", 25, 1 }, + { "err_pcie_error0", 24, 1 }, + { "err_timer_above_max_qid", 23, 1 }, + { "err_cpl_exceed_iqe_size", 22, 1 }, + { "err_invalid_cidx_inc", 21, 1 }, + { "err_itp_time_paused", 20, 1 }, + { "err_cpl_opcode_0", 19, 1 }, + { "err_dropped_db", 18, 1 }, + { "err_data_cpl_on_high_qid1", 17, 1 }, + { "err_data_cpl_on_high_qid0", 16, 1 }, + { "err_bad_db_pidx3", 15, 1 }, + { "err_bad_db_pidx2", 14, 1 }, + { "err_bad_db_pidx1", 13, 1 }, + { "err_bad_db_pidx0", 12, 1 }, + { "err_ing_pcie_chan", 11, 1 }, + { "err_ing_ctxt_prio", 10, 1 }, + { "err_egr_ctxt_prio", 9, 1 }, + { "dbp_tbuf_full", 8, 1 }, + { "fatal_wre_len", 7, 1 }, + { "reg_address_err", 6, 1 }, + { "ingress_size_err", 5, 1 }, + { "egress_size_err", 4, 1 }, + { "err_inv_ctxt3", 3, 1 }, + { "err_inv_ctxt2", 2, 1 }, + { "err_inv_ctxt1", 1, 1 }, + { "err_inv_ctxt0", 0, 1 }, + { "SGE_INT_ENABLE3", 0x1040, 0 }, + { "err_flm_dbp", 31, 1 }, + { "err_flm_idma1", 30, 1 }, + { "err_flm_idma0", 29, 1 }, + { "err_flm_hint", 28, 1 }, + { "err_pcie_error3", 27, 1 }, + { "err_pcie_error2", 26, 1 }, + { "err_pcie_error1", 25, 1 }, + { "err_pcie_error0", 24, 1 }, + { "err_timer_above_max_qid", 23, 1 }, + { "err_cpl_exceed_iqe_size", 22, 1 }, + { "err_invalid_cidx_inc", 21, 1 }, + { "err_itp_time_paused", 20, 1 }, + { "err_cpl_opcode_0", 19, 1 }, + { "err_dropped_db", 18, 1 }, + { "err_data_cpl_on_high_qid1", 17, 1 }, + { "err_data_cpl_on_high_qid0", 16, 1 }, + { "err_bad_db_pidx3", 15, 1 }, + { "err_bad_db_pidx2", 14, 1 }, + { "err_bad_db_pidx1", 13, 1 }, + { "err_bad_db_pidx0", 12, 1 }, + { "err_ing_pcie_chan", 11, 1 }, + { "err_ing_ctxt_prio", 10, 1 }, + { "err_egr_ctxt_prio", 9, 1 }, + { "dbp_tbuf_full", 8, 1 }, + { "fatal_wre_len", 7, 1 }, + { "reg_address_err", 6, 1 }, + { "ingress_size_err", 5, 1 }, + { "egress_size_err", 4, 1 }, + { "err_inv_ctxt3", 3, 1 }, + { "err_inv_ctxt2", 2, 1 }, + { "err_inv_ctxt1", 1, 1 }, + { "err_inv_ctxt0", 0, 1 }, + { "SGE_FL_BUFFER_SIZE0", 0x1044, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE1", 0x1048, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE2", 0x104c, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE3", 0x1050, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE4", 0x1054, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE5", 0x1058, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE6", 0x105c, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE7", 0x1060, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE8", 0x1064, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE9", 0x1068, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE10", 0x106c, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE11", 0x1070, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE12", 0x1074, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE13", 0x1078, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE14", 0x107c, 0 }, + { "Size", 4, 20 }, + { "SGE_FL_BUFFER_SIZE15", 0x1080, 0 }, + { "Size", 4, 20 }, + { "SGE_DBQ_CTXT_BADDR", 0x1084, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_IMSG_CTXT_BADDR", 0x1088, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_FLM_CACHE_BADDR", 0x108c, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_FLM_CFG", 0x1090, 0 }, + { "OpMode", 26, 6 }, + { "NullPtr", 20, 4 }, + { "NullPtrEn", 19, 1 }, + { "NoHdr", 18, 1 }, + { "CachePtrCnt", 16, 2 }, + { "EDRAMPtrCnt", 14, 2 }, + { "HdrStartFLQ", 11, 3 }, + { "FetchThresh", 6, 5 }, + { "CreditCnt", 4, 2 }, + { "CreditCntPacking", 2, 2 }, + { "HdrStartFLQ4K", 1, 1 }, + { "NoEDRAM", 0, 1 }, + { "SGE_CONM_CTRL", 0x1094, 0 }, + { "EgrThresholdPacking", 16, 8 }, + { "EgrThreshold", 8, 8 }, + { "IngThreshold", 2, 6 }, + { "SGE_TIMESTAMP_LO", 0x1098, 0 }, + { "SGE_TIMESTAMP_HI", 0x109c, 0 }, + { "Opcode", 28, 2 }, + { "Value", 0, 28 }, + { "SGE_INGRESS_RX_THRESHOLD", 0x10a0, 0 }, + { "Threshold_0", 24, 6 }, + { "Threshold_1", 16, 6 }, + { "Threshold_2", 8, 6 }, + { "Threshold_3", 0, 6 }, + { "SGE_DBFIFO_STATUS", 0x10a4, 0 }, + { "vfifo_cnt", 15, 17 }, + { "coal_ctl_fifo_cnt", 8, 6 }, + { "merge_fifo_cnt", 0, 6 }, + { "SGE_DOORBELL_CONTROL", 0x10a8, 0 }, + { "HintDepthCtl", 27, 5 }, + { "NoCoalesce", 26, 1 }, + { "HP_Weight", 24, 2 }, + { "HP_Disable", 23, 1 }, + { "ForceUserDBtoLP", 22, 1 }, + { "ForceVFPF0DBtoLP", 21, 1 }, + { "ForceVFPF1DBtoLP", 20, 1 }, + { "ForceVFPF2DBtoLP", 19, 1 }, + { "ForceVFPF3DBtoLP", 18, 1 }, + { "ForceVFPF4DBtoLP", 17, 1 }, + { "ForceVFPF5DBtoLP", 16, 1 }, + { "ForceVFPF6DBtoLP", 15, 1 }, + { "ForceVFPF7DBtoLP", 14, 1 }, + { "Enable_Drop", 13, 1 }, + { "Drop_Timeout", 7, 6 }, + { "InvOnDBSync", 6, 1 }, + { "InvOnGTSSync", 5, 1 }, + { "db_dbg_en", 4, 1 }, + { "gts_dbg_timer_reg", 1, 3 }, + { "gts_dbg_en", 0, 1 }, + { "SGE_ITP_CONTROL", 0x10b4, 0 }, + { "TScale", 28, 4 }, + { "Critical_Time", 10, 15 }, + { "LL_Empty", 4, 6 }, + { "LL_Read_Wait_Disable", 0, 1 }, + { "SGE_TIMER_VALUE_0_AND_1", 0x10b8, 0 }, + { "TimerValue0", 16, 16 }, + { "TimerValue1", 0, 16 }, + { "SGE_TIMER_VALUE_2_AND_3", 0x10bc, 0 }, + { "TimerValue2", 16, 16 }, + { "TimerValue3", 0, 16 }, + { "SGE_TIMER_VALUE_4_AND_5", 0x10c0, 0 }, + { "TimerValue4", 16, 16 }, + { "TimerValue5", 0, 16 }, + { "SGE_GK_CONTROL", 0x10c4, 0 }, + { "en_flm_fifth", 29, 1 }, + { "fl_prog_thresh", 20, 9 }, + { "coal_all_thread", 19, 1 }, + { "en_pshb", 18, 1 }, + { "en_db_fifth", 17, 1 }, + { "db_prog_thresh", 8, 9 }, + { "100ns_timer", 0, 8 }, + { "SGE_GK_CONTROL2", 0x10c8, 0 }, + { "dbq_timer_tick", 16, 16 }, + { "fl_merge_cnt_thresh", 8, 4 }, + { "merge_cnt_thresh", 0, 6 }, + { "SGE_DEBUG_INDEX", 0x10cc, 0 }, + { "SGE_DEBUG_DATA_HIGH", 0x10d0, 0 }, + { "SGE_DEBUG_DATA_LOW", 0x10d4, 0 }, + { "SGE_REVISION", 0x10d8, 0 }, + { "SGE_INT_CAUSE4", 0x10dc, 0 }, + { "err_ishift_ur1", 31, 1 }, + { "err_ishift_ur0", 30, 1 }, + { "bar2_egress_len_or_addr_err", 29, 1 }, + { "err_cpl_exceed_max_iqe_size1", 28, 1 }, + { "err_cpl_exceed_max_iqe_size0", 27, 1 }, + { "err_wr_len_too_large3", 26, 1 }, + { "err_wr_len_too_large2", 25, 1 }, + { "err_wr_len_too_large1", 24, 1 }, + { "err_wr_len_too_large0", 23, 1 }, + { "err_large_minfetch_with_txcoal3", 22, 1 }, + { "err_large_minfetch_with_txcoal2", 21, 1 }, + { "err_large_minfetch_with_txcoal1", 20, 1 }, + { "err_large_minfetch_with_txcoal0", 19, 1 }, + { "coal_with_hp_disable_err", 18, 1 }, + { "bar2_egress_coal0_err", 17, 1 }, + { "bar2_egress_size_err", 16, 1 }, + { "flm_pc_rsp_err", 15, 1 }, + { "err_th3_max_fetch", 14, 1 }, + { "err_th2_max_fetch", 13, 1 }, + { "err_th1_max_fetch", 12, 1 }, + { "err_th0_max_fetch", 11, 1 }, + { "err_rx_cpl_packet_size1", 10, 1 }, + { "err_rx_cpl_packet_size0", 9, 1 }, + { "err_bad_upfl_inc_credit3", 8, 1 }, + { "err_bad_upfl_inc_credit2", 7, 1 }, + { "err_bad_upfl_inc_credit1", 6, 1 }, + { "err_bad_upfl_inc_credit0", 5, 1 }, + { "err_physaddr_len0_idma1", 4, 1 }, + { "err_physaddr_len0_idma0", 3, 1 }, + { "err_flm_invalid_pkt_drop1", 2, 1 }, + { "err_flm_invalid_pkt_drop0", 1, 1 }, + { "err_unexpected_timer", 0, 1 }, + { "SGE_INT_ENABLE4", 0x10e0, 0 }, + { "err_ishift_ur1", 31, 1 }, + { "err_ishift_ur0", 30, 1 }, + { "bar2_egress_len_or_addr_err", 29, 1 }, + { "err_cpl_exceed_max_iqe_size1", 28, 1 }, + { "err_cpl_exceed_max_iqe_size0", 27, 1 }, + { "err_wr_len_too_large3", 26, 1 }, + { "err_wr_len_too_large2", 25, 1 }, + { "err_wr_len_too_large1", 24, 1 }, + { "err_wr_len_too_large0", 23, 1 }, + { "err_large_minfetch_with_txcoal3", 22, 1 }, + { "err_large_minfetch_with_txcoal2", 21, 1 }, + { "err_large_minfetch_with_txcoal1", 20, 1 }, + { "err_large_minfetch_with_txcoal0", 19, 1 }, + { "coal_with_hp_disable_err", 18, 1 }, + { "bar2_egress_coal0_err", 17, 1 }, + { "bar2_egress_size_err", 16, 1 }, + { "flm_pc_rsp_err", 15, 1 }, + { "err_th3_max_fetch", 14, 1 }, + { "err_th2_max_fetch", 13, 1 }, + { "err_th1_max_fetch", 12, 1 }, + { "err_th0_max_fetch", 11, 1 }, + { "err_rx_cpl_packet_size1", 10, 1 }, + { "err_rx_cpl_packet_size0", 9, 1 }, + { "err_bad_upfl_inc_credit3", 8, 1 }, + { "err_bad_upfl_inc_credit2", 7, 1 }, + { "err_bad_upfl_inc_credit1", 6, 1 }, + { "err_bad_upfl_inc_credit0", 5, 1 }, + { "err_physaddr_len0_idma1", 4, 1 }, + { "err_physaddr_len0_idma0", 3, 1 }, + { "err_flm_invalid_pkt_drop1", 2, 1 }, + { "err_flm_invalid_pkt_drop0", 1, 1 }, + { "err_unexpected_timer", 0, 1 }, + { "SGE_STAT_TOTAL", 0x10e4, 0 }, + { "SGE_STAT_MATCH", 0x10e8, 0 }, + { "SGE_STAT_CFG", 0x10ec, 0 }, + { "StatSource", 9, 4 }, + { "ITPOpMode", 8, 1 }, + { "EgrCtxtOpMode", 6, 2 }, + { "IngCtxtOpMode", 4, 2 }, + { "StatMode", 0, 4 }, + { "SGE_HINT_CFG", 0x10f0, 0 }, + { "uPCutoffThreshLp", 12, 11 }, + { "HintsAllowedNoHdr", 6, 6 }, + { "HintsAllowedHdr", 0, 6 }, + { "SGE_INGRESS_QUEUES_PER_PAGE_PF", 0x10f4, 0 }, + { "QueuesPerPagePF7", 28, 4 }, + { "QueuesPerPagePF6", 24, 4 }, + { "QueuesPerPagePF5", 20, 4 }, + { "QueuesPerPagePF4", 16, 4 }, + { "QueuesPerPagePF3", 12, 4 }, + { "QueuesPerPagePF2", 8, 4 }, + { "QueuesPerPagePF1", 4, 4 }, + { "QueuesPerPagePF0", 0, 4 }, + { "SGE_INGRESS_QUEUES_PER_PAGE_VF", 0x10f8, 0 }, + { "QueuesPerPageVFPF7", 28, 4 }, + { "QueuesPerPageVFPF6", 24, 4 }, + { "QueuesPerPageVFPF5", 20, 4 }, + { "QueuesPerPageVFPF4", 16, 4 }, + { "QueuesPerPageVFPF3", 12, 4 }, + { "QueuesPerPageVFPF2", 8, 4 }, + { "QueuesPerPageVFPF1", 4, 4 }, + { "QueuesPerPageVFPF0", 0, 4 }, + { "SGE_ERROR_STATS", 0x1100, 0 }, + { "Cause_Register", 24, 3 }, + { "Cause_Bit", 19, 5 }, + { "Uncaptured_Error", 18, 1 }, + { "Error_QID_Valid", 17, 1 }, + { "Error_QID", 0, 17 }, + { "SGE_IDMA0_DROP_CNT", 0x1104, 0 }, + { "SGE_IDMA1_DROP_CNT", 0x1108, 0 }, + { "SGE_INT_CAUSE5", 0x110c, 0 }, + { "err_T_RxCRC", 31, 1 }, + { "perr_MC_RspData", 30, 1 }, + { "perr_PC_RspData", 29, 1 }, + { "perr_PD_RdRspData", 28, 1 }, + { "perr_U_RxData", 27, 1 }, + { "perr_UD_RxData", 26, 1 }, + { "perr_uP_Data", 25, 1 }, + { "perr_CIM2SGE_RxData", 24, 1 }, + { "perr_imsg_pd_fifo", 21, 1 }, + { "perr_ulptx_fifo1", 20, 1 }, + { "perr_ulptx_fifo0", 19, 1 }, + { "perr_idma2imsg_fifo1", 18, 1 }, + { "perr_idma2imsg_fifo0", 17, 1 }, + { "perr_pointer_data_fifo0", 16, 1 }, + { "perr_pointer_data_fifo1", 15, 1 }, + { "perr_pointer_hdr_fifo0", 14, 1 }, + { "perr_pointer_hdr_fifo1", 13, 1 }, + { "perr_payload_fifo0", 12, 1 }, + { "perr_payload_fifo1", 11, 1 }, + { "perr_pointer_hdr_fifo3", 10, 1 }, + { "perr_pointer_hdr_fifo2", 9, 1 }, + { "perr_pointer_data_fifo3", 8, 1 }, + { "perr_pointer_data_fifo2", 7, 1 }, + { "perr_mgt_bar2_fifo", 6, 1 }, + { "perr_headersplit_fifo1", 5, 1 }, + { "perr_headersplit_fifo0", 4, 1 }, + { "perr_idma2imsg_fifo3", 3, 1 }, + { "perr_idma2imsg_fifo2", 2, 1 }, + { "perr_hint_delay_fifo", 0, 1 }, + { "SGE_INT_ENABLE5", 0x1110, 0 }, + { "err_T_RxCRC", 31, 1 }, + { "perr_MC_RspData", 30, 1 }, + { "perr_PC_RspData", 29, 1 }, + { "perr_PD_RdRspData", 28, 1 }, + { "perr_U_RxData", 27, 1 }, + { "perr_UD_RxData", 26, 1 }, + { "perr_uP_Data", 25, 1 }, + { "perr_CIM2SGE_RxData", 24, 1 }, + { "perr_imsg_pd_fifo", 21, 1 }, + { "perr_ulptx_fifo1", 20, 1 }, + { "perr_ulptx_fifo0", 19, 1 }, + { "perr_idma2imsg_fifo1", 18, 1 }, + { "perr_idma2imsg_fifo0", 17, 1 }, + { "perr_pointer_data_fifo0", 16, 1 }, + { "perr_pointer_data_fifo1", 15, 1 }, + { "perr_pointer_hdr_fifo0", 14, 1 }, + { "perr_pointer_hdr_fifo1", 13, 1 }, + { "perr_payload_fifo0", 12, 1 }, + { "perr_payload_fifo1", 11, 1 }, + { "perr_pointer_hdr_fifo3", 10, 1 }, + { "perr_pointer_hdr_fifo2", 9, 1 }, + { "perr_pointer_data_fifo3", 8, 1 }, + { "perr_pointer_data_fifo2", 7, 1 }, + { "perr_mgt_bar2_fifo", 6, 1 }, + { "perr_headersplit_fifo1", 5, 1 }, + { "perr_headersplit_fifo0", 4, 1 }, + { "perr_idma2imsg_fifo3", 3, 1 }, + { "perr_idma2imsg_fifo2", 2, 1 }, + { "perr_hint_delay_fifo", 0, 1 }, + { "SGE_PERR_ENABLE5", 0x1114, 0 }, + { "err_T_RxCRC", 31, 1 }, + { "perr_MC_RspData", 30, 1 }, + { "perr_PC_RspData", 29, 1 }, + { "perr_PD_RdRspData", 28, 1 }, + { "perr_U_RxData", 27, 1 }, + { "perr_UD_RxData", 26, 1 }, + { "perr_uP_Data", 25, 1 }, + { "perr_CIM2SGE_RxData", 24, 1 }, + { "perr_imsg_pd_fifo", 21, 1 }, + { "perr_ulptx_fifo1", 20, 1 }, + { "perr_ulptx_fifo0", 19, 1 }, + { "perr_idma2imsg_fifo1", 18, 1 }, + { "perr_idma2imsg_fifo0", 17, 1 }, + { "perr_pointer_data_fifo0", 16, 1 }, + { "perr_pointer_data_fifo1", 15, 1 }, + { "perr_pointer_hdr_fifo0", 14, 1 }, + { "perr_pointer_hdr_fifo1", 13, 1 }, + { "perr_payload_fifo0", 12, 1 }, + { "perr_payload_fifo1", 11, 1 }, + { "perr_pointer_hdr_fifo3", 10, 1 }, + { "perr_pointer_hdr_fifo2", 9, 1 }, + { "perr_pointer_data_fifo3", 8, 1 }, + { "perr_pointer_data_fifo2", 7, 1 }, + { "perr_mgt_bar2_fifo", 6, 1 }, + { "perr_headersplit_fifo1", 5, 1 }, + { "perr_headersplit_fifo0", 4, 1 }, + { "perr_idma2imsg_fifo3", 3, 1 }, + { "perr_idma2imsg_fifo2", 2, 1 }, + { "perr_hint_delay_fifo", 0, 1 }, + { "SGE_FETCH_BURST_MAX_0_AND_1", 0x111c, 0 }, + { "FetchBurstMax0", 16, 10 }, + { "FetchBurstMax1", 0, 10 }, + { "SGE_FETCH_BURST_MAX_2_AND_3", 0x1120, 0 }, + { "FetchBurstMax2", 16, 10 }, + { "FetchBurstMax3", 0, 10 }, + { "SGE_CONTROL2", 0x1124, 0 }, + { "hint_sge_sel", 31, 1 }, + { "hint_sel", 30, 1 }, + { "hint_disable", 29, 1 }, + { "rxcplmode_iscsi", 28, 1 }, + { "rxcplmode_nvmt", 27, 1 }, + { "wre_replay_inorder", 26, 1 }, + { "Eth2xEn", 25, 1 }, + { "ArmDbEndDis", 24, 1 }, + { "PackPadT7", 23, 1 }, + { "wre_upFLCredit", 22, 1 }, + { "uPFLCutoffDis", 21, 1 }, + { "RxCplSizeAutocorrect", 20, 1 }, + { "IdmaArbRoundRobin", 19, 1 }, + { "IngPackBoundary", 16, 3 }, + { "CGEN_Egress_Context", 15, 1 }, + { "CGEN_Ingress_Context", 14, 1 }, + { "CGEN_IDMA", 13, 1 }, + { "CGEN_DBP", 12, 1 }, + { "CGEN_EDMA", 11, 1 }, + { "VFIFO_Enable", 10, 1 }, + { "FLM_Reschedule_Mode", 9, 1 }, + { "HintDepthCtlFL", 4, 5 }, + { "Force_Ordering", 3, 1 }, + { "TX_Coalesce_Size", 2, 1 }, + { "Coal_Strict_CIM_Pri", 1, 1 }, + { "TX_Coalesce_Pri", 0, 1 }, + { "SGE_INT_CAUSE6", 0x1128, 0 }, + { "fatal_deq0_drdy", 29, 3 }, + { "fatal_out0_drdy", 26, 3 }, + { "imsg_dbg3_stuck", 25, 1 }, + { "imsg_dbg2_stuck", 24, 1 }, + { "imsg_dbg1_stuck", 23, 1 }, + { "imsg_dbg0_stuck", 22, 1 }, + { "err_db_sync", 21, 1 }, + { "err_gts_sync", 20, 1 }, + { "fatal_large_coal", 19, 1 }, + { "pl_bar2_frm_err", 18, 1 }, + { "silent_drop_tx_coal", 17, 1 }, + { "err_inv_ctxt4", 16, 1 }, + { "err_bad_db_pidx4", 15, 1 }, + { "err_bad_upfl_inc_credit4", 14, 1 }, + { "fatal_tag_mismatch", 13, 1 }, + { "fatal_enq_ctl_rdy", 12, 1 }, + { "err_pc_rsp_len3", 11, 1 }, + { "err_pc_rsp_len2", 10, 1 }, + { "err_pc_rsp_len1", 9, 1 }, + { "err_pc_rsp_len0", 8, 1 }, + { "fatal_enq2ll_vld", 7, 1 }, + { "fatal_ll_empty", 6, 1 }, + { "fatal_off_wdenq", 5, 1 }, + { "fatal_deq1_drdy", 3, 2 }, + { "fatal_out1_drdy", 1, 2 }, + { "fatal_deq", 0, 1 }, + { "SGE_INT_ENABLE6", 0x112c, 0 }, + { "imsg_dbg3_stuck", 25, 1 }, + { "imsg_dbg2_stuck", 24, 1 }, + { "imsg_dbg1_stuck", 23, 1 }, + { "imsg_dbg0_stuck", 22, 1 }, + { "err_db_sync", 21, 1 }, + { "err_gts_sync", 20, 1 }, + { "fatal_large_coal", 19, 1 }, + { "pl_bar2_frm_err", 18, 1 }, + { "silent_drop_tx_coal", 17, 1 }, + { "err_inv_ctxt4", 16, 1 }, + { "err_bad_db_pidx4", 15, 1 }, + { "err_bad_upfl_inc_credit4", 14, 1 }, + { "fatal_tag_mismatch", 13, 1 }, + { "fatal_enq_ctl_rdy", 12, 1 }, + { "err_pc_rsp_len3", 11, 1 }, + { "err_pc_rsp_len2", 10, 1 }, + { "err_pc_rsp_len1", 9, 1 }, + { "err_pc_rsp_len0", 8, 1 }, + { "fatal_enq2ll_vld", 7, 1 }, + { "fatal_ll_empty", 6, 1 }, + { "fatal_off_wdenq", 5, 1 }, + { "fatal_deq_drdy", 3, 2 }, + { "fatal_outp_drdy", 1, 2 }, + { "fatal_deq", 0, 1 }, + { "SGE_DBVFIFO_BADDR", 0x1138, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_DBVFIFO_SIZE", 0x113c, 0 }, + { "SGE_CHANGESET", 0x1144, 0 }, + { "SGE_PC_RSP_ERROR", 0x1148, 0 }, + { "SGE_TBUF_CONTROL0", 0x114c, 0 }, + { "DbpTbufRsv1", 9, 9 }, + { "DbpTbufRsv0", 0, 9 }, + { "SGE_TBUF_CONTROL1", 0x1150, 0 }, + { "DbpTbufRsv3", 9, 9 }, + { "DbpTbufRsv2", 0, 9 }, + { "SGE_TBUF_CONTROL2", 0x1154, 0 }, + { "DbpTbufRsv5", 9, 9 }, + { "DbpTbufRsv4", 0, 9 }, + { "SGE_TBUF_CONTROL3", 0x1158, 0 }, + { "DbpTbufRsv7", 9, 9 }, + { "DbpTbufRsv6", 0, 9 }, + { "SGE_TBUF_CONTROL4", 0x115c, 0 }, + { "DbpTbufRsv9", 9, 9 }, + { "DbpTbufRsv8", 0, 9 }, + { "SGE_PC0_REQ_BIST_CMD", 0x1180, 0 }, + { "SGE_PC0_REQ_BIST_ERROR_CNT", 0x1184, 0 }, + { "SGE_PC1_REQ_BIST_CMD", 0x1190, 0 }, + { "SGE_PC1_REQ_BIST_ERROR_CNT", 0x1194, 0 }, + { "SGE_PC0_RSP_BIST_CMD", 0x11a0, 0 }, + { "SGE_PC0_RSP_BIST_ERROR_CNT", 0x11a4, 0 }, + { "SGE_PC1_RSP_BIST_CMD", 0x11b0, 0 }, + { "SGE_PC1_RSP_BIST_ERROR_CNT", 0x11b4, 0 }, + { "SGE_DBQ_TIMER_THRESH0", 0x11b8, 0 }, + { "TxTimeTh3", 24, 6 }, + { "TxTimeTh2", 16, 6 }, + { "TxTimeTh1", 8, 6 }, + { "TxTimeTh0", 0, 6 }, + { "SGE_DBQ_TIMER_THRESH1", 0x11bc, 0 }, + { "TxTimeTh7", 24, 6 }, + { "TxTimeTh6", 16, 6 }, + { "TxTimeTh5", 8, 6 }, + { "TxTimeTh4", 0, 6 }, + { "SGE_DBQ_TIMER_CONFIG", 0x11c0, 0 }, + { "SGE_DBQ_TIMER_DBG", 0x11c4, 0 }, + { "dbq_timer_cmd", 31, 1 }, + { "dbq_timer_index", 24, 6 }, + { "dbq_timer_qcnt", 0, 17 }, + { "SGE_INT_CAUSE8", 0x11c8, 0 }, + { "Trace_RxPerr", 8, 1 }, + { "U3_RxPerr", 7, 1 }, + { "U2_RxPerr", 6, 1 }, + { "U1_RxPerr", 5, 1 }, + { "U0_RxPerr", 4, 1 }, + { "T3_RxPerr", 3, 1 }, + { "T2_RxPerr", 2, 1 }, + { "T1_RxPerr", 1, 1 }, + { "T0_RxPerr", 0, 1 }, + { "SGE_INT_ENABLE8", 0x11cc, 0 }, + { "Trace_RxPerr", 8, 1 }, + { "U3_RxPerr", 7, 1 }, + { "U2_RxPerr", 6, 1 }, + { "U1_RxPerr", 5, 1 }, + { "U0_RxPerr", 4, 1 }, + { "T3_RxPerr", 3, 1 }, + { "T2_RxPerr", 2, 1 }, + { "T1_RxPerr", 1, 1 }, + { "T0_RxPerr", 0, 1 }, + { "SGE_PERR_ENABLE8", 0x11d0, 0 }, + { "Trace_RxPerr", 8, 1 }, + { "U3_RxPerr", 7, 1 }, + { "U2_RxPerr", 6, 1 }, + { "U1_RxPerr", 5, 1 }, + { "U0_RxPerr", 4, 1 }, + { "T3_RxPerr", 3, 1 }, + { "T2_RxPerr", 2, 1 }, + { "T1_RxPerr", 1, 1 }, + { "T0_RxPerr", 0, 1 }, + { "SGE_CTXT_CMD", 0x11fc, 0 }, + { "Busy", 31, 1 }, + { "Opcode", 28, 2 }, + { "CtxtType", 24, 2 }, + { "QID", 0, 17 }, + { "SGE_CTXT_DATA0", 0x1200, 0 }, + { "SGE_CTXT_DATA1", 0x1204, 0 }, + { "SGE_CTXT_DATA2", 0x1208, 0 }, + { "SGE_CTXT_DATA3", 0x120c, 0 }, + { "SGE_CTXT_DATA4", 0x1210, 0 }, + { "SGE_CTXT_DATA5", 0x1214, 0 }, + { "SGE_CTXT_DATA6", 0x1218, 0 }, + { "Data_Unused", 7, 25 }, + { "Data", 0, 7 }, + { "SGE_CTXT_DATA7", 0x121c, 0 }, + { "SGE_CTXT_MASK0", 0x1220, 0 }, + { "SGE_CTXT_MASK1", 0x1224, 0 }, + { "SGE_CTXT_MASK2", 0x1228, 0 }, + { "SGE_CTXT_MASK3", 0x122c, 0 }, + { "SGE_CTXT_MASK4", 0x1230, 0 }, + { "SGE_CTXT_MASK5", 0x1234, 0 }, + { "SGE_CTXT_MASK6", 0x1238, 0 }, + { "Mask_Unused", 7, 25 }, + { "Mask", 0, 7 }, + { "SGE_CTXT_MASK7", 0x123c, 0 }, + { "SGE_QBASE_MAP0", 0x1240, 0 }, + { "Destination", 31, 1 }, + { "Egress0_Size", 24, 5 }, + { "Egress1_Size", 16, 5 }, + { "Ingress0_Size", 8, 5 }, + { "Ingress1_Size", 0, 5 }, + { "SGE_QBASE_MAP1", 0x1244, 0 }, + { "SGE_QBASE_MAP2", 0x1248, 0 }, + { "SGE_QBASE_MAP3", 0x124c, 0 }, + { "Ingress1_Base", 16, 16 }, + { "Ingress0_Base", 0, 16 }, + { "SGE_QBASE_INDEX", 0x1250, 0 }, + { "SGE_CONM_CTRL2", 0x1254, 0 }, + { "FlmThreshPack", 8, 7 }, + { "ConEnMiddle", 7, 1 }, + { "FlmThresh", 0, 7 }, + { "SGE_DEBUG_CONM", 0x1258, 0 }, + { "ch_cng", 16, 16 }, + { "ch_sel", 14, 2 }, + { "st_cong", 12, 2 }, + { "last_xoff", 10, 1 }, + { "last_qid", 0, 10 }, + { "SGE_DBG_QUEUE_STAT0_CTRL", 0x125c, 0 }, + { "imsg_gts_sel", 18, 1 }, + { "mgt_sel", 17, 1 }, + { "db_gts_qid", 0, 17 }, + { "SGE_DBG_QUEUE_STAT1_CTRL", 0x1260, 0 }, + { "imsg_gts_sel", 18, 1 }, + { "mgt_sel", 17, 1 }, + { "db_gts_qid", 0, 17 }, + { "SGE_DBG_QUEUE_STAT0", 0x1264, 0 }, + { "SGE_DBG_QUEUE_STAT1", 0x1268, 0 }, + { "SGE_DBG_BAR2_PKT_CNT", 0x126c, 0 }, + { "SGE_DBG_DB_PKT_CNT", 0x1270, 0 }, + { "SGE_DBG_GTS_PKT_CNT", 0x1274, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_16", 0x1278, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_0", 0x1280, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_1", 0x1284, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_2", 0x1288, 0 }, + { "SGE_DEBUG1_DBP_THREAD", 0x128c, 0 }, + { "SGE_DEBUG1_DBP_THREAD", 0x1290, 0 }, + { "SGE_DEBUG1_DBP_THREAD", 0x1294, 0 }, + { "SGE_DEBUG1_DBP_THREAD", 0x1298, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_7", 0x129c, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_8", 0x12a0, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_9", 0x12a4, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_10", 0x12a8, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_11", 0x12ac, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_12", 0x12b0, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_13", 0x12b4, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_14", 0x12b8, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_15", 0x12bc, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_0", 0x12c0, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_1", 0x12c4, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_2", 0x12c8, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_3", 0x12cc, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_4", 0x12d0, 0 }, + { "SGE_DEBUG0_DBP_THREAD", 0x12d4, 0 }, + { "SGE_DEBUG0_DBP_THREAD", 0x12d8, 0 }, + { "SGE_DEBUG0_DBP_THREAD", 0x12dc, 0 }, + { "SGE_DEBUG0_DBP_THREAD", 0x12e0, 0 }, + { "SGE_DEBUG0_DBP_THREAD", 0x12e4, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_10", 0x12e8, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_11", 0x12ec, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_12", 0x12f0, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_13", 0x12f4, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_14", 0x12f8, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_15", 0x12fc, 0 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1300, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1304, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1308, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x130c, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1310, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1314, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x1318, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_PF", 0x131c, 0 }, + { "PfIQsPerPage", 28, 4 }, + { "PfEQsPerPage", 24, 4 }, + { "PfWCQsPerPage", 20, 4 }, + { "PfWCOffEn", 19, 1 }, + { "PfMaxWCSize", 17, 2 }, + { "PfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1320, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1324, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1328, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x132c, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1330, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1334, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x1338, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_WC_EGRS_BAR2_OFF_VF", 0x133c, 0 }, + { "VfIQsPerPage", 28, 4 }, + { "VfEQsPerPage", 24, 4 }, + { "VfWCQsPerPage", 20, 4 }, + { "VfWCOffEn", 19, 1 }, + { "VfMaxWCSize", 17, 2 }, + { "VfWCOffset", 0, 17 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_17", 0x1340, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_18", 0x1344, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_19", 0x1348, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_20", 0x134c, 0 }, + { "SGE_DEBUG_DATA_HIGH_INDEX_21", 0x1350, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_16", 0x1354, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_17", 0x1358, 0 }, + { "SGE_DEBUG_DATA_LOW_INDEX_18", 0x135c, 0 }, + { "SGE_INT_CAUSE7", 0x1360, 0 }, + { "hint_fifo_full", 25, 1 }, + { "cerr_hint_delay_fifo", 24, 1 }, + { "coal_timer_fifo_perr", 23, 1 }, + { "cmp_fifo_perr", 22, 1 }, + { "sge_ipp_fifo_cerr", 21, 1 }, + { "cerr_ing_ctxt_cache", 20, 1 }, + { "imsg_cntx_perr", 19, 1 }, + { "pd_fifo_perr", 18, 1 }, + { "imsg_512_fifo_perr", 17, 1 }, + { "cplsw_fifo_perr", 16, 1 }, + { "imsg_fifo_perr", 15, 1 }, + { "cerr_itp_evr", 14, 1 }, + { "cerr_conm_sram", 13, 1 }, + { "cerr_egr_ctxt_cache", 12, 1 }, + { "cerr_flm_cntxmem", 11, 1 }, + { "cerr_func_qbase", 10, 1 }, + { "imsg_cntx_cerr", 9, 1 }, + { "pd_fifo_cerr", 8, 1 }, + { "imsg_512_fifo_cerr", 7, 1 }, + { "cplsw_fifo_cerr", 6, 1 }, + { "imsg_fifo_cerr", 5, 1 }, + { "cerr_headersplit_fifo3", 4, 1 }, + { "cerr_headersplit_fifo2", 3, 1 }, + { "cerr_headersplit_fifo1", 2, 1 }, + { "cerr_headersplit_fifo0", 1, 1 }, + { "cerr_flm_l1Cache", 0, 1 }, + { "SGE_INT_ENABLE7", 0x1364, 0 }, + { "hint_fifo_full", 25, 1 }, + { "cerr_hint_delay_fifo", 24, 1 }, + { "coal_timer_fifo_perr", 23, 1 }, + { "cmp_fifo_perr", 22, 1 }, + { "sge_ipp_fifo_cerr", 21, 1 }, + { "cerr_ing_ctxt_cache", 20, 1 }, + { "imsg_cntx_perr", 19, 1 }, + { "pd_fifo_perr", 18, 1 }, + { "imsg_512_fifo_perr", 17, 1 }, + { "cplsw_fifo_perr", 16, 1 }, + { "imsg_fifo_perr", 15, 1 }, + { "cerr_itp_evr", 14, 1 }, + { "cerr_conm_sram", 13, 1 }, + { "cerr_egr_ctxt_cache", 12, 1 }, + { "cerr_flm_cntxmem", 11, 1 }, + { "cerr_func_qbase", 10, 1 }, + { "imsg_cntx_cerr", 9, 1 }, + { "pd_fifo_cerr", 8, 1 }, + { "imsg_512_fifo_cerr", 7, 1 }, + { "cplsw_fifo_cerr", 6, 1 }, + { "imsg_fifo_cerr", 5, 1 }, + { "cerr_headersplit_fifo3", 4, 1 }, + { "cerr_headersplit_fifo2", 3, 1 }, + { "cerr_headersplit_fifo1", 2, 1 }, + { "cerr_headersplit_fifo0", 1, 1 }, + { "cerr_flm_l1Cache", 0, 1 }, + { "SGE_PERR_ENABLE7", 0x1368, 0 }, + { "coal_timer_fifo_perr", 23, 1 }, + { "cmp_fifo_perr", 22, 1 }, + { "imsg_cntx_perr", 19, 1 }, + { "pd_fifo_perr", 18, 1 }, + { "imsg_512_fifo_perr", 17, 1 }, + { "cplsw_fifo_perr", 16, 1 }, + { "imsg_fifo_perr", 15, 1 }, + { "SGE_ING_COMP_COAL_CFG", 0x1700, 0 }, + { "use_ptp_timer", 27, 1 }, + { "imsg_set_oflow_all_entries_43060", 26, 1 }, + { "imsg_stuck_indirect_queue_42907", 25, 1 }, + { "comp_coal_pidx_incr", 24, 1 }, + { "comp_coal_timer_cnt", 16, 8 }, + { "comp_coal_cntr_th", 8, 8 }, + { "comp_coal_opcode", 0, 8 }, + { "SGE_ING_IMSG_DBG", 0x1704, 0 }, + { "stuck_ctr_th", 1, 8 }, + { "stuck_int_en", 0, 1 }, + { "SGE_ING_IMSG_RSP0_DBG", 0x1708, 0 }, + { "idma1_qid", 16, 16 }, + { "idma0_qid", 0, 16 }, + { "SGE_ING_IMSG_RSP1_DBG", 0x170c, 0 }, + { "idma3_qid", 16, 16 }, + { "idma2_qid", 0, 16 }, + { "SGE_LB_MODE", 0x1710, 0 }, + { "SGE_IMSG_QUESCENT", 0x1714, 0 }, + { "SGE_LA_CTRL", 0x1718, 0 }, + { "la_global_en", 8, 1 }, + { "ptp_timestamp_sel", 7, 1 }, + { "cim2sge_id_chk_vld", 6, 1 }, + { "cplsw_id_chk_vld", 5, 1 }, + { "flm_id_chk_vld", 4, 1 }, + { "iq_dbp_id_chk_vld", 3, 1 }, + { "up_obq_id_chk_vld", 2, 1 }, + { "cim_id_chk_vld", 1, 1 }, + { "dbp_id_chk_vld", 0, 1 }, + { "SGE_LA_CTRL_EQID_LOW", 0x171c, 0 }, + { "SGE_LA_CTRL_EQID_HIGH", 0x1720, 0 }, + { "SGE_LA_CTRL_IQID", 0x1724, 0 }, + { "iq_id_chk_high", 16, 16 }, + { "iq_id_chk_low", 0, 16 }, + { "SGE_LA_CTRL_TID_LOW", 0x1728, 0 }, + { "SGE_LA_CTRL_TID_HIGH", 0x172c, 0 }, + { "SGE_CFG_TP_ERR", 0x173c, 0 }, + { "tp_err_status_ch3", 30, 2 }, + { "tp_err_status_ch2", 28, 2 }, + { "tp_err_status_ch1", 26, 2 }, + { "tp_err_status_ch0", 24, 2 }, + { "cpl0_size", 16, 8 }, + { "cpl1_size", 8, 8 }, + { "size_latch_clr", 3, 1 }, + { "ext_latch_clr", 2, 1 }, + { "ext_change_42875", 1, 1 }, + { "size_change_42913", 0, 1 }, + { "SGE_CHNL0_CTX_ERROR_COUNT_PER_TID", 0x1740, 0 }, + { "SGE_CHNL1_CTX_ERROR_COUNT_PER_TID", 0x1744, 0 }, + { "SGE_CHNL2_CTX_ERROR_COUNT_PER_TID", 0x1748, 0 }, + { "SGE_CHNL3_CTX_ERROR_COUNT_PER_TID", 0x174c, 0 }, + { "SGE_CTX_ACC_CH0", 0x1750, 0 }, + { "RDMA_INV_Handling", 24, 2 }, + { "terminate_status_en", 23, 1 }, + { "DISABLE", 22, 1 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "SGE_CTX_ACC_CH1", 0x1754, 0 }, + { "RDMA_INV_Handling", 24, 2 }, + { "terminate_status_en", 23, 1 }, + { "DISABLE", 22, 1 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "SGE_CTX_ACC_CH2", 0x1758, 0 }, + { "RDMA_INV_Handling", 24, 2 }, + { "terminate_status_en", 23, 1 }, + { "DISABLE", 22, 1 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "SGE_CTX_ACC_CH3", 0x175c, 0 }, + { "RDMA_INV_Handling", 24, 2 }, + { "terminate_status_en", 23, 1 }, + { "DISABLE", 22, 1 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "SGE_CTX_BASE", 0x1760, 0 }, + { "SGE_LA_RDPTR_0", 0x1800, 0 }, + { "SGE_LA_RDDATA_0", 0x1804, 0 }, + { "SGE_LA_WRPTR_0", 0x1808, 0 }, + { "SGE_LA_RESERVED_0", 0x180c, 0 }, + { "SGE_LA_RDPTR_1", 0x1810, 0 }, + { "SGE_LA_RDDATA_1", 0x1814, 0 }, + { "SGE_LA_WRPTR_1", 0x1818, 0 }, + { "SGE_LA_RESERVED_1", 0x181c, 0 }, + { "SGE_LA_RDPTR_2", 0x1820, 0 }, + { "SGE_LA_RDDATA_2", 0x1824, 0 }, + { "SGE_LA_WRPTR_2", 0x1828, 0 }, + { "SGE_LA_RESERVED_2", 0x182c, 0 }, + { "SGE_LA_RDPTR_3", 0x1830, 0 }, + { "SGE_LA_RDDATA_3", 0x1834, 0 }, + { "SGE_LA_WRPTR_3", 0x1838, 0 }, + { "SGE_LA_RESERVED_3", 0x183c, 0 }, + { "SGE_LA_RDPTR_4", 0x1840, 0 }, + { "SGE_LA_RDDATA_4", 0x1844, 0 }, + { "SGE_LA_WRPTR_4", 0x1848, 0 }, + { "SGE_LA_RESERVED_4", 0x184c, 0 }, + { "SGE_LA_RDPTR_5", 0x1850, 0 }, + { "SGE_LA_RDDATA_5", 0x1854, 0 }, + { "SGE_LA_WRPTR_5", 0x1858, 0 }, + { "SGE_LA_RESERVED_5", 0x185c, 0 }, + { "SGE_LA_RDPTR_6", 0x1860, 0 }, + { "SGE_LA_RDDATA_6", 0x1864, 0 }, + { "SGE_LA_WRPTR_6", 0x1868, 0 }, + { "SGE_LA_RESERVED_6", 0x186c, 0 }, + { "SGE_LA_RDPTR_7", 0x1870, 0 }, + { "SGE_LA_RDDATA_7", 0x1874, 0 }, + { "SGE_LA_WRPTR_7", 0x1878, 0 }, + { "SGE_LA_RESERVED_7", 0x187c, 0 }, + { "SGE_LA_RDPTR_8", 0x1880, 0 }, + { "SGE_LA_RDDATA_8", 0x1884, 0 }, + { "SGE_LA_WRPTR_8", 0x1888, 0 }, + { "SGE_LA_RESERVED_8", 0x188c, 0 }, + { "SGE_LA_RDPTR_9", 0x1890, 0 }, + { "SGE_LA_RDDATA_9", 0x1894, 0 }, + { "SGE_LA_WRPTR_9", 0x1898, 0 }, + { "SGE_LA_RESERVED_9", 0x189c, 0 }, + { "SGE_LA_RDPTR_10", 0x18a0, 0 }, + { "SGE_LA_RDDATA_10", 0x18a4, 0 }, + { "SGE_LA_WRPTR_10", 0x18a8, 0 }, + { "SGE_LA_RESERVED_10", 0x18ac, 0 }, + { "SGE_LA_RDPTR_11", 0x18b0, 0 }, + { "SGE_LA_RDDATA_11", 0x18b4, 0 }, + { "SGE_LA_WRPTR_11", 0x18b8, 0 }, + { "SGE_LA_RESERVED_11", 0x18bc, 0 }, + { "SGE_LA_RDPTR_12", 0x18c0, 0 }, + { "SGE_LA_RDDATA_12", 0x18c4, 0 }, + { "SGE_LA_WRPTR_12", 0x18c8, 0 }, + { "SGE_LA_RESERVED_12", 0x18cc, 0 }, + { "SGE_LA_RDPTR_13", 0x18d0, 0 }, + { "SGE_LA_RDDATA_13", 0x18d4, 0 }, + { "SGE_LA_WRPTR_13", 0x18d8, 0 }, + { "SGE_LA_RESERVED_13", 0x18dc, 0 }, + { "SGE_LA_RDPTR_14", 0x18e0, 0 }, + { "SGE_LA_RDDATA_14", 0x18e4, 0 }, + { "SGE_LA_WRPTR_14", 0x18e8, 0 }, + { "SGE_LA_RESERVED_14", 0x18ec, 0 }, + { "SGE_LA_RDPTR_15", 0x18f0, 0 }, + { "SGE_LA_RDDATA_15", 0x18f4, 0 }, + { "SGE_LA_WRPTR_15", 0x18f8, 0 }, + { "SGE_LA_RESERVED_15", 0x18fc, 0 }, + { NULL } +}; + +struct reg_info t7_pcie_regs[] = { + { "PCIE_INT_ENABLE", 0x3000, 0 }, + { "IPGrpPerr", 31, 1 }, + { "NonFatalErr", 30, 1 }, + { "RdRspErr", 29, 1 }, + { "TRGT1GrpPerr", 28, 1 }, + { "IPSOTPerr", 27, 1 }, + { "IPRetryPerr", 26, 1 }, + { "IPRxDataGrpPerr", 25, 1 }, + { "IPRxHdrGrpPerr", 24, 1 }, + { "PIOTagQPerr", 23, 1 }, + { "MAGrpPerr", 22, 1 }, + { "VFIDPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqRdPerr", 17, 1 }, + { "HReqWrPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqRdPerr", 14, 1 }, + { "DReqWrPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqRdPerr", 11, 1 }, + { "MstTagQPerr", 10, 1 }, + { "TgtTagQPerr", 9, 1 }, + { "PIOReqGrpPerr", 8, 1 }, + { "PIOCplGrpPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIXStiPerr", 2, 1 }, + { "MstTimeoutPerr", 1, 1 }, + { "MstGrpPerr", 0, 1 }, + { "PCIE_INT_ENABLE_EXT", 0x3030, 0 }, + { "TcamRspErr", 31, 1 }, + { "IPFormQPerr", 30, 1 }, + { "IPFormQCerr", 29, 1 }, + { "TRGT1GrpCerr", 28, 1 }, + { "IPSOTCerr", 27, 1 }, + { "IPRetryCerr", 26, 1 }, + { "IPRxDataGrpCerr", 25, 1 }, + { "IPRxHdrGrpCerr", 24, 1 }, + { "A0arbrspordfifoPerr", 19, 1 }, + { "HRspCerr", 18, 1 }, + { "HReqRdCerr", 17, 1 }, + { "HReqWrCerr", 16, 1 }, + { "DRspCerr", 15, 1 }, + { "DReqRdCerr", 14, 1 }, + { "DReqWrCerr", 13, 1 }, + { "CRspCerr", 12, 1 }, + { "ARspPerr", 11, 1 }, + { "AReqRdPerr", 10, 1 }, + { "AReqWrPerr", 9, 1 }, + { "PIOReqGrpCerr", 8, 1 }, + { "ARspCerr", 7, 1 }, + { "AReqRdCerr", 6, 1 }, + { "AReqWrCerr", 5, 1 }, + { "MARspPerr", 4, 1 }, + { "inicmawdataordPerr", 3, 1 }, + { "emuPerr", 2, 1 }, + { "ERRspPerr", 1, 1 }, + { "MstGrpCerr", 0, 1 }, + { "PCIE_INT_ENABLE_X8", 0x3034, 0 }, + { "x8TGTGrpPerr", 23, 1 }, + { "x8IPSOTPerr", 22, 1 }, + { "x8IPRetryPerr", 21, 1 }, + { "x8IPRxDataGrpPerr", 20, 1 }, + { "x8IPRxHdrGrpPerr", 19, 1 }, + { "x8IPCoreCerr", 3, 1 }, + { "x8MstGrpPerr", 2, 1 }, + { "x8MstGrpCerr", 1, 1 }, + { "PCIE_INT_CAUSE", 0x3004, 0 }, + { "IPGrpPerr", 31, 1 }, + { "NonFatalErr", 30, 1 }, + { "RdRspErr", 29, 1 }, + { "TRGT1GrpPerr", 28, 1 }, + { "IPSOTPerr", 27, 1 }, + { "IPRetryPerr", 26, 1 }, + { "IPRxDataGrpPerr", 25, 1 }, + { "IPRxHdrGrpPerr", 24, 1 }, + { "PIOTagQPerr", 23, 1 }, + { "MAGrpPerr", 22, 1 }, + { "VFIDPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqRdPerr", 17, 1 }, + { "HReqWrPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqRdPerr", 14, 1 }, + { "DReqWrPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqRdPerr", 11, 1 }, + { "MstTagQPerr", 10, 1 }, + { "TgtTagQPerr", 9, 1 }, + { "PIOReqGrpPerr", 8, 1 }, + { "PIOCplGrpPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIXStiPerr", 2, 1 }, + { "MstTimeoutPerr", 1, 1 }, + { "MstGrpPerr", 0, 1 }, + { "PCIE_INT_CAUSE_EXT", 0x3038, 0 }, + { "IPFormQPerr", 30, 1 }, + { "IPFormQCerr", 29, 1 }, + { "TRGT1GrpCerr", 28, 1 }, + { "IPSOTCerr", 27, 1 }, + { "IPRetryCerr", 26, 1 }, + { "IPRxDataGrpCerr", 25, 1 }, + { "IPRxHdrGrpCerr", 24, 1 }, + { "A0arbrspordfifoPerr", 19, 1 }, + { "HRspCerr", 18, 1 }, + { "HReqRdCerr", 17, 1 }, + { "HReqWrCerr", 16, 1 }, + { "DRspCerr", 15, 1 }, + { "DReqRdCerr", 14, 1 }, + { "DReqWrCerr", 13, 1 }, + { "CRspCerr", 12, 1 }, + { "ARspPerr", 11, 1 }, + { "AReqRdPerr", 10, 1 }, + { "AReqWrPerr", 9, 1 }, + { "PIOReqGrpCerr", 8, 1 }, + { "ARspCerr", 7, 1 }, + { "AReqRdCerr", 6, 1 }, + { "AReqWrCerr", 5, 1 }, + { "MARspPerr", 4, 1 }, + { "inicmawdataordPerr", 3, 1 }, + { "emuPerr", 2, 1 }, + { "ERRspPerr", 1, 1 }, + { "MstGrpCerr", 0, 1 }, + { "PCIE_INT_CAUSE_X8", 0x303c, 0 }, + { "x8TGTGrpPerr", 23, 1 }, + { "x8IPSOTPerr", 22, 1 }, + { "x8IPRetryPerr", 21, 1 }, + { "x8IPRxDataGrpPerr", 20, 1 }, + { "x8IPRxHdrGrpPerr", 19, 1 }, + { "x8IPCoreCerr", 3, 1 }, + { "x8MstGrpPerr", 2, 1 }, + { "x8MstGrpCerr", 1, 1 }, + { "PCIE_PERR_ENABLE", 0x3008, 0 }, + { "IPGrpPerr", 31, 1 }, + { "TgtTagQCLIENT1Perr", 29, 1 }, + { "TRGT1GrpPerr", 28, 1 }, + { "IPSOTPerr", 27, 1 }, + { "IPRetryPerr", 26, 1 }, + { "IPRxDataGrpPerr", 25, 1 }, + { "IPRxHdrGrpPerr", 24, 1 }, + { "PIOTagQPerr", 23, 1 }, + { "MAGrpPerr", 22, 1 }, + { "VFIDPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqRdPerr", 17, 1 }, + { "HReqWrPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqRdPerr", 14, 1 }, + { "DReqWrPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqRdPerr", 11, 1 }, + { "MstTagQPerr", 10, 1 }, + { "TgtTagQPerr", 9, 1 }, + { "PIOReqGrpPerr", 8, 1 }, + { "PIOCplGrpPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIXStiPerr", 2, 1 }, + { "MstTimeoutPerr", 1, 1 }, + { "MstGrpPerr", 0, 1 }, + { "PCIE_PERR_ENABLE_EXT", 0x3040, 0 }, + { "TcamRspErr", 31, 1 }, + { "IPFormQPerr", 30, 1 }, + { "ARspPerr", 18, 1 }, + { "AReqRdPerr", 17, 1 }, + { "AReqWrPerr", 16, 1 }, + { "A0arbrspordfifoPerr", 15, 1 }, + { "MARspPerr", 14, 1 }, + { "inicmawdataordPerr", 13, 1 }, + { "emuPerr", 12, 1 }, + { "ERRspPerr", 11, 1 }, + { "PCIE_PERR_ENABLE_X8", 0x3044, 0 }, + { "x8TGTGrpPerr", 28, 1 }, + { "x8IPSOTPerr", 27, 1 }, + { "x8IPRetryPerr", 26, 1 }, + { "x8IPRxDataGrpPerr", 25, 1 }, + { "x8IPRxHdrGrpPerr", 24, 1 }, + { "x8MstGrpPerr", 0, 1 }, + { "PCIE_PERR_INJECT", 0x300c, 0 }, + { "MemSel", 1, 5 }, + { "IDE", 0, 1 }, + { "PCIE_NONFAT_ERR", 0x3010, 0 }, + { "MARspUE", 30, 1 }, + { "MAReqTimeout", 29, 1 }, + { "TRGT1BARTypeErr", 28, 1 }, + { "MAExtraRspErr", 27, 1 }, + { "MARspTimeout", 26, 1 }, + { "INTVFAllMSIDisErr", 25, 1 }, + { "INTVFRangeErr", 24, 1 }, + { "INTPLIRspErr", 23, 1 }, + { "MEMReqRdTagErr", 22, 1 }, + { "CFGInitDoneErr", 21, 1 }, + { "BAR2Timeout", 20, 1 }, + { "VPDTimeout", 19, 1 }, + { "MEMRspRdTagErr", 18, 1 }, + { "MEMRspWrTagErr", 17, 1 }, + { "PIORspRdTagErr", 16, 1 }, + { "PIORspWrTagErr", 15, 1 }, + { "DBITimeout", 14, 1 }, + { "PIOUnAlindWr", 13, 1 }, + { "BAR2RdErr", 12, 1 }, + { "MAWrEOPErr", 11, 1 }, + { "MARdEOPErr", 10, 1 }, + { "RdRspErr", 9, 1 }, + { "VPDRspErr", 8, 1 }, + { "KDBEOPErr", 7, 1 }, + { "MemReq", 4, 1 }, + { "PIOReq", 3, 1 }, + { "BAR2Req", 2, 1 }, + { "CfgSnp", 0, 1 }, + { "PCIE_CFG", 0x3014, 0 }, + { "PIOStopEn", 31, 1 }, + { "DiagCtrlBus", 28, 3 }, + { "IPPerrEn", 27, 1 }, + { "CfgdExtTagEn", 26, 1 }, + { "CfgdMaxPyldSz", 23, 3 }, + { "CfgdMaxRdReqSz", 20, 3 }, + { "DCAEn", 17, 1 }, + { "CMDReqPriority", 16, 1 }, + { "VPDReqProtect", 14, 2 }, + { "DroppedRdRspData", 12, 1 }, + { "AI_INTX_ReAssertEn", 11, 1 }, + { "AutoTxnDisable", 10, 1 }, + { "TC0_Stamp", 9, 1 }, + { "AI_TCVal", 6, 3 }, + { "DMAStopEn", 5, 1 }, + { "DevStateRstMode", 4, 1 }, + { "LinkReqRstPCIeCRstMode", 3, 1 }, + { "LinkDnRstEn", 0, 1 }, + { "PCIE_CFG2", 0x3018, 0 }, + { "reg_vdm_only", 17, 1 }, + { "Mult_ReqID_Sup", 16, 1 }, + { "BAR2Timer", 4, 12 }, + { "MstReqRdRRASimple", 3, 1 }, + { "TotMaxTag", 0, 3 }, + { "PCIE_CFG3", 0x301c, 0 }, + { "ARMDCASTFirstOnly", 7, 1 }, + { "AutoPIOCookieMatch", 6, 1 }, + { "FLRPndCplMode", 4, 2 }, + { "HMADCASTFirstOnly", 2, 1 }, + { "CMDDCASTFirstOnly", 1, 1 }, + { "DMADCASTFirstOnly", 0, 1 }, + { "PCIE_CFG4", 0x3020, 0 }, + { "L1ClkRemovalEn", 17, 1 }, + { "ReadyEnterL23", 16, 1 }, + { "ExitL1", 12, 1 }, + { "EnterL1", 8, 1 }, + { "GenPME", 0, 8 }, + { "PCIE_CFG5", 0x3024, 0 }, + { "EnableSKPParityFix", 2, 1 }, + { "EnableL2EntryInL1", 1, 1 }, + { "HoldCplEnteringL1", 0, 1 }, + { "PCIE_CFG6", 0x3028, 0 }, + { "PERstTimerCount", 12, 14 }, + { "PERstTimeout", 8, 1 }, + { "PERstTimer", 0, 4 }, + { "PCIE_CFG7", 0x302c, 0 }, + { "PCIE_CFG_SPACE_REQ", 0x3060, 0 }, + { "Enable", 31, 1 }, + { "AI", 30, 1 }, + { "CS2", 29, 1 }, + { "WrBE", 25, 4 }, + { "VFVld", 24, 1 }, + { "RVF", 16, 8 }, + { "PF", 12, 3 }, + { "ExtRegister", 8, 4 }, + { "Register", 0, 8 }, + { "PCIE_CFG_SPACE_DATA", 0x3064, 0 }, + { "PCIE_MAILBOX_BASE_WIN", 0x30a4, 0 }, + { "PCIEOfst", 6, 26 }, + { "BIR", 4, 2 }, + { "Window", 0, 2 }, + { "PCIE_MAILBOX_OFFSET0", 0x30a8, 0 }, + { "MemOfst0", 3, 29 }, + { "PCIE_MAILBOX_OFFSET1", 0x30ac, 0 }, + { "PCIE_MA_CTRL", 0x30b0, 0 }, + { "TagFree", 29, 1 }, + { "MaxRspCnt", 24, 5 }, + { "MaxReqCnt", 16, 7 }, + { "MaxReqSize", 8, 3 }, + { "MaxTag", 0, 5 }, + { "PCIE_FW", 0x30b8, 0 }, + { "PCIE_FW_PF", 0x30bc, 0 }, + { "PCIE_FW_PF", 0x30c0, 0 }, + { "PCIE_FW_PF", 0x30c4, 0 }, + { "PCIE_FW_PF", 0x30c8, 0 }, + { "PCIE_FW_PF", 0x30cc, 0 }, + { "PCIE_FW_PF", 0x30d0, 0 }, + { "PCIE_FW_PF", 0x30d4, 0 }, + { "PCIE_FW_PF", 0x30d8, 0 }, + { "PCIE_PIO_PAUSE", 0x30dc, 0 }, + { "PIOPauseDone", 31, 1 }, + { "MSTPauseDone", 30, 1 }, + { "PauseTime", 4, 24 }, + { "MSTPause", 1, 1 }, + { "PIOPause", 0, 1 }, + { "PCIE_MA_STAT", 0x30e0, 0 }, + { "PCIE_STATIC_CFG1", 0x30e4, 0 }, + { "AUXPOWER_DETECTED", 27, 1 }, + { "PCIE_STATIC_CFG2", 0x30e8, 0 }, + { "PL_CONTROL", 16, 16 }, + { "STATIC_SPARE3", 0, 15 }, + { "PCIE_DBG_INDIR_REQ", 0x30ec, 0 }, + { "Enable", 31, 1 }, + { "AI", 30, 1 }, + { "Pointer", 8, 16 }, + { "Select", 0, 4 }, + { "PCIE_DBG_INDIR_DATA_0", 0x30f0, 0 }, + { "PCIE_DBG_INDIR_DATA_1", 0x30f4, 0 }, + { "PCIE_DBG_INDIR_DATA_2", 0x30f8, 0 }, + { "PCIE_DBG_INDIR_DATA_3", 0x30fc, 0 }, + { "PCIE_PF_INT_CFG", 0x3140, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x3144, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3148, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x314c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3150, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x3154, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3158, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x315c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3160, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x3164, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3168, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x316c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3170, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x3174, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_INT_CFG", 0x3178, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 11 }, + { "VecBase", 0, 12 }, + { "PCIE_PF_INT_CFG2", 0x317c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3180, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3184, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3188, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x318c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3190, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3194, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3198, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x319c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31a0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31a8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31b0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31b8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31c0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31c8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31d0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31d8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31e0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31e8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31f0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x31f8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x31fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3200, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3204, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3208, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x320c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3210, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3214, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3218, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x321c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3220, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3224, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3228, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x322c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3230, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3234, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3238, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x323c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3240, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3244, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3248, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x324c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3250, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3254, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3258, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x325c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3260, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3264, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3268, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x326c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3270, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3274, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3278, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x327c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3280, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3284, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3288, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x328c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3290, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3294, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3298, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x329c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32a0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32a8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32b0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32b8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32c0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32c8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32d0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32d8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32e0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32e8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32f0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x32f8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x32fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3300, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3304, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3308, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x330c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3310, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3314, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3318, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x331c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3320, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3324, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3328, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x332c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3330, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3334, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3338, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x333c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3340, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3344, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3348, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x334c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3350, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3354, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3358, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x335c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3360, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3364, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3368, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x336c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3370, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3374, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3378, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x337c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3380, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3384, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3388, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x338c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3390, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3394, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3398, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x339c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33a0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33a8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33b0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33b8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33c0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33c8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33d0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33d8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33e0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33e8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33f0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x33f8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x33fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3400, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3404, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3408, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x340c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3410, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3414, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3418, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x341c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3420, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3424, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3428, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x342c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3430, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3434, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3438, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x343c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3440, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3444, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3448, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x344c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3450, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3454, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3458, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x345c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3460, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3464, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3468, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x346c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3470, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3474, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3478, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x347c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3480, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3484, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3488, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x348c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3490, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3494, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3498, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x349c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34a0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34a8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34b0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34b8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34c0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34c8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34d0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34d8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34e0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34e8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34f0, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x34f8, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x34fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3500, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3504, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3508, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x350c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3510, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3514, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3518, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x351c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3520, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3524, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3528, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x352c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3530, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3534, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3538, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x353c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3540, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3544, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3548, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x354c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3550, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3554, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3558, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x355c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3560, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3564, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3568, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x356c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3570, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x3574, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_INT_CFG", 0x3578, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_VF_INT_CFG2", 0x357c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_PF_MSI_EN", 0x35a8, 0 }, + { "PCIE_VF_MSI_EN_0", 0x35ac, 0 }, + { "PCIE_VF_MSI_EN_1", 0x35b0, 0 }, + { "PCIE_VF_MSI_EN_2", 0x35b4, 0 }, + { "PCIE_VF_MSI_EN_3", 0x35b8, 0 }, + { "PCIE_PF_MSIX_EN", 0x35bc, 0 }, + { "PCIE_VF_MSIX_EN_0", 0x35c0, 0 }, + { "PCIE_VF_MSIX_EN_1", 0x35c4, 0 }, + { "PCIE_VF_MSIX_EN_2", 0x35c8, 0 }, + { "PCIE_VF_MSIX_EN_3", 0x35cc, 0 }, + { "PCIE_FID_VFID_CTL", 0x35e4, 0 }, + { "PCIE_FID_PASID", 0x35e0, 0 }, + { "PCIE_FID_VFID_SEL", 0x35e8, 0 }, + { "Addr", 2, 13 }, + { "Select", 0, 2 }, + { "PCIE_FID_VFID", 0x35ec, 0 }, + { "Select", 30, 2 }, + { "NvmeGroupEn", 29, 1 }, + { "GroupSel", 25, 4 }, + { "IDO", 24, 1 }, + { "VFID", 15, 9 }, + { "TC", 12, 3 }, + { "VFVld", 11, 1 }, + { "PF", 8, 3 }, + { "RVF", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3700, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3704, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3708, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x370c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3710, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3714, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3718, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x371c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3720, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3724, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3728, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x372c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3730, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3734, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3738, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x373c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3740, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3744, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3748, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x374c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3750, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3754, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3758, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x375c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3760, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3764, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3768, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x376c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3770, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3774, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3778, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x377c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3780, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3784, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3788, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x378c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3790, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x3794, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x3798, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x379c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37a0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37a4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37a8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37ac, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37b0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37b4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37b8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37bc, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37c0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37c4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37c8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37cc, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37d0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37d4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37d8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37dc, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37e0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37e4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37e8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37ec, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x37f0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_BASE_WIN1", 0x37f4, 0 }, + { "PCIE_MEM_ACCESS_OFFSET0", 0x37f8, 0 }, + { "MemOfst0", 3, 29 }, + { "PFNum", 0, 3 }, + { "PCIE_MEM_ACCESS_OFFSET1", 0x37fc, 0 }, + { "PCIE_COOKIE_STAT", 0x5600, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x5604, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x5608, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x560c, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x5610, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x5614, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x5618, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_COOKIE_STAT", 0x561c, 0 }, + { "CookieB", 16, 10 }, + { "CookieA", 0, 10 }, + { "PCIE_FLR_PIO", 0x5620, 0 }, + { "RcvdBAR2Cookie", 24, 8 }, + { "RcvdMARspCookie", 16, 8 }, + { "RcvdPIORspCookie", 8, 8 }, + { "ExpdCookie", 0, 8 }, + { "PCIE_FLR_PIO2", 0x5624, 0 }, + { "RcvdVDMRxCookie", 24, 8 }, + { "RcvdVDMTxCookie", 16, 8 }, + { "RcvdMAReqCookie", 8, 8 }, + { "RcvdPIOReqCookie", 0, 8 }, + { "PCIE_VC0_CDTS0", 0x56c4, 0 }, + { "CPLD0", 16, 16 }, + { "CPLH0", 0, 12 }, + { "PCIE_VC0_CDTS1", 0x56c8, 0 }, + { "PD0", 16, 16 }, + { "PH0", 0, 12 }, + { "PCIE_VC0_CDTS2", 0x56cc, 0 }, + { "NPD0", 16, 16 }, + { "NPH0", 0, 12 }, + { "PCIE_VC1_CDTS0", 0x56d0, 0 }, + { "CPLD0", 16, 16 }, + { "CPLH0", 0, 12 }, + { "PCIE_VC1_CDTS1", 0x56d4, 0 }, + { "PD0", 16, 16 }, + { "PH0", 0, 12 }, + { "PCIE_VC1_CDTS2", 0x56d8, 0 }, + { "NPD0", 16, 16 }, + { "NPH0", 0, 12 }, + { "PCIE_FLR_PF_STATUS", 0x56dc, 0 }, + { "PCIE_FLR_VF0_STATUS", 0x56e0, 0 }, + { "PCIE_FLR_VF1_STATUS", 0x56e4, 0 }, + { "PCIE_FLR_VF2_STATUS", 0x56e8, 0 }, + { "PCIE_FLR_VF3_STATUS", 0x56ec, 0 }, + { "PCIE_STAT", 0x56f4, 0 }, + { "PM_Status", 24, 8 }, + { "PM_CurrentState", 20, 3 }, + { "LTSSMEnable", 12, 1 }, + { "StateCfgInitF", 4, 8 }, + { "StateCfgInit", 0, 4 }, + { "PCIE_CRS", 0x56f8, 0 }, + { "PCIE_LTSSM", 0x56fc, 0 }, + { "Stall_Disable", 1, 1 }, + { "Enable", 0, 1 }, + { "PCIE_PF_CFG", 0x1e040, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e044, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e04c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1e440, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e444, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e44c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1e840, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e844, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e84c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1ec40, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1ec44, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1ec4c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f040, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f044, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f04c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f440, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f444, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f44c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f840, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f844, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f84c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1fc40, 0 }, + { "INTXStat", 16, 1 }, + { "AIVec", 4, 10 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1fc44, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1fc4c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_CORE_ACK_LATENCY_TIMER_REPLAY_TIMER", 0x5700, 0 }, + { "Replay_Time_Limit", 16, 16 }, + { "Ack_Latency_Timer_Limit", 0, 16 }, + { "PCIE_CORE_VENDOR_SPECIFIC_DLLP", 0x5704, 0 }, + { "PCIE_CORE_PORT_FORCE_LINK", 0x5708, 0 }, + { "Low_Power_Entrance_Count", 24, 8 }, + { "Link_State", 16, 6 }, + { "Force_Link", 15, 1 }, + { "Link_Number", 0, 8 }, + { "PCIE_CORE_ACK_FREQUENCY_L0L1_ASPM_CONTROL", 0x570c, 0 }, + { "Enter_ASPM_L1_wo_L0s", 30, 1 }, + { "L1_Entrance_Latency", 27, 3 }, + { "L0s_Entrance_Latency", 24, 3 }, + { "Common_Clock_N_FTS", 16, 8 }, + { "N_FTS", 8, 8 }, + { "Ack_Frequency", 0, 8 }, + { "PCIE_CORE_PORT_LINK_CONTROL", 0x5710, 0 }, + { "Crosslink_Active", 23, 1 }, + { "Crosslink_Enable", 22, 1 }, + { "Link_Mode_Enable", 16, 6 }, + { "Fast_Link_Mode", 7, 1 }, + { "DLL_Link_Enable", 5, 1 }, + { "Reset_Assert", 3, 1 }, + { "Loopback_Enable", 2, 1 }, + { "Scramble_Disable", 1, 1 }, + { "Vendor_Specific_DLLP_Request", 0, 1 }, + { "PCIE_CORE_LANE_SKEW", 0x5714, 0 }, + { "Disable_DeSkew", 31, 1 }, + { "Ack_Nak_Disable", 25, 1 }, + { "Flow_Control_Disable", 24, 1 }, + { "Insert_TxSkew", 0, 24 }, + { "PCIE_CORE_SYMBOL_NUMBER", 0x5718, 0 }, + { "Ack_Nak_Timer_Modifier", 19, 5 }, + { "Replay_Timer_Modifier", 14, 5 }, + { "MaxFunc", 0, 3 }, + { "PCIE_CORE_SYMBOL_TIMER_FILTER_MASK1", 0x571c, 0 }, + { "Mask_RADM_Filter", 16, 16 }, + { "Disable_FC_Watchdog", 15, 1 }, + { "SKP_Interval", 0, 11 }, + { "PCIE_CORE_FILTER_MASK2", 0x5720, 0 }, + { "PCIE_CORE_DEBUG_0", 0x5728, 0 }, + { "PCIE_CORE_DEBUG_1", 0x572c, 0 }, + { "PCIE_CORE_TRANSMIT_POSTED_FC_CREDIT_STATUS", 0x5730, 0 }, + { "TxPH_FC", 12, 8 }, + { "TxPD_FC", 0, 12 }, + { "PCIE_CORE_TRANSMIT_NONPOSTED_FC_CREDIT_STATUS", 0x5734, 0 }, + { "TxNPH_FC", 12, 8 }, + { "TxNPD_FC", 0, 12 }, + { "PCIE_CORE_TRANSMIT_COMPLETION_FC_CREDIT_STATUS", 0x5738, 0 }, + { "TxCPLH_FC", 12, 8 }, + { "TxCPLD_FC", 0, 12 }, + { "PCIE_CORE_QUEUE_STATUS", 0x573c, 0 }, + { "RxQueue_Not_Empty", 2, 1 }, + { "TxRetryBuf_Not_Empty", 1, 1 }, + { "RxTLP_FC_Not_Returned", 0, 1 }, + { "PCIE_CORE_VC_TRANSMIT_ARBITRATION_1", 0x5740, 0 }, + { "VC3_WRR", 24, 8 }, + { "VC2_WRR", 16, 8 }, + { "VC1_WRR", 8, 8 }, + { "VC0_WRR", 0, 8 }, + { "PCIE_CORE_VC_TRANSMIT_ARBITRATION_2", 0x5744, 0 }, + { "VC7_WRR", 24, 8 }, + { "VC6_WRR", 16, 8 }, + { "VC5_WRR", 8, 8 }, + { "VC4_WRR", 0, 8 }, + { "PCIE_CORE_VC0_POSTED_RECEIVE_QUEUE_CONTROL", 0x5748, 0 }, + { "VC0_Rx_Ordering", 31, 1 }, + { "VC0_TLP_Ordering", 30, 1 }, + { "VC0_PTLP_Queue_Mode", 21, 3 }, + { "VC0_PH_Credits", 12, 8 }, + { "VC0_PD_Credits", 0, 12 }, + { "PCIE_CORE_VC0_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x574c, 0 }, + { "VC0_NPTLP_Queue_Mode", 21, 3 }, + { "VC0_NPH_Credits", 12, 8 }, + { "VC0_NPD_Credits", 0, 12 }, + { "PCIE_CORE_VC0_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x5750, 0 }, + { "VC0_CPLTLP_Queue_Mode", 21, 3 }, + { "VC0_CPLH_Credits", 12, 8 }, + { "VC0_CPLD_Credits", 0, 12 }, + { "PCIE_CORE_VC1_POSTED_RECEIVE_QUEUE_CONTROL", 0x5754, 0 }, + { "VC1_TLP_Ordering", 30, 1 }, + { "VC1_PTLP_Queue_Mode", 21, 3 }, + { "VC1_PH_Credits", 12, 8 }, + { "VC1_PD_Credits", 0, 12 }, + { "PCIE_CORE_VC1_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x5758, 0 }, + { "VC1_NPTLP_Queue_Mode", 21, 3 }, + { "VC1_NPH_Credits", 12, 8 }, + { "VC1_NPD_Credits", 0, 12 }, + { "PCIE_CORE_VC1_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x575c, 0 }, + { "VC1_CPLTLP_Queue_Mode", 21, 3 }, + { "VC1_CPLH_Credits", 12, 8 }, + { "VC1_CPLD_Credits", 0, 12 }, + { "PCIE_CORE_LINK_WIDTH_SPEED_CHANGE", 0x580c, 0 }, + { "Sel_DeEmphasis", 20, 1 }, + { "TxCmplRcv", 19, 1 }, + { "PhyTxSwing", 18, 1 }, + { "DirSpdChange", 17, 1 }, + { "Auto_Lane_Flip_Ctrl_En", 16, 1 }, + { "Num_Lanes", 8, 5 }, + { "NFTS_Gen2_3", 0, 8 }, + { "PCIE_CORE_PHY_STATUS", 0x5810, 0 }, + { "PCIE_CORE_PHY_CONTROL", 0x5814, 0 }, + { "PCIE_CORE_GEN3_CONTROL", 0x5890, 0 }, + { "Rate_Shadow_Sel", 24, 2 }, + { "DC_Balance_Disable", 18, 1 }, + { "DLLP_Delay_Disable", 17, 1 }, + { "Eql_Disable", 16, 1 }, + { "Eql_Redo_Disable", 11, 1 }, + { "Eql_EIEOS_CntRst_Disable", 10, 1 }, + { "Eql_PH2_PH3_Disable", 9, 1 }, + { "Disable_Scrambler", 8, 1 }, + { "PCIE_CORE_GEN3_EQ_FS_LF", 0x5894, 0 }, + { "Full_Swing", 6, 6 }, + { "Low_Frequency", 0, 6 }, + { "PCIE_CORE_GEN3_EQ_PRESET_COEFF", 0x5898, 0 }, + { "PostCursor", 12, 6 }, + { "Cursor", 6, 6 }, + { "PreCursor", 0, 6 }, + { "PCIE_CORE_GEN3_EQ_PRESET_INDEX", 0x589c, 0 }, + { "PCIE_CORE_GEN3_EQ_STATUS", 0x58a4, 0 }, + { "PCIE_CORE_GEN3_EQ_CONTROL", 0x58a8, 0 }, + { "Include_Initial_FOM", 24, 1 }, + { "Preset_Request_Vector", 8, 16 }, + { "Phase23_2ms_Timeout_Disable", 5, 1 }, + { "After24ms", 4, 1 }, + { "Feedback_Mode", 0, 4 }, + { "PCIE_CORE_GEN3_EQ_DIRCHANGE_FEEDBACK", 0x58ac, 0 }, + { "WinAperture_CPlus1", 14, 4 }, + { "WinAperture_CMins1", 10, 4 }, + { "Convergence_WinDepth", 5, 5 }, + { "EQMasterPhase_MinTime", 0, 5 }, + { "PCIE_CORE_PIPE_CONTROL", 0x58b8, 0 }, + { "Loopback_Enable", 31, 1 }, + { "PCIE_CORE_DBI_RO_WE", 0x58bc, 0 }, + { "PCIE_X8_CORE_ACK_LATENCY_TIMER_REPLAY_TIMER", 0x4700, 0 }, + { "Replay_Time_Limit", 16, 16 }, + { "Ack_Latency_Timer_Limit", 0, 16 }, + { "PCIE_X8_CORE_VENDOR_SPECIFIC_DLLP", 0x4704, 0 }, + { "PCIE_X8_CORE_PORT_FORCE_LINK", 0x4708, 0 }, + { "Low_Power_Entrance_Count", 24, 8 }, + { "Link_State", 16, 6 }, + { "Force_Link", 15, 1 }, + { "Link_Number", 0, 8 }, + { "PCIE_X8_CORE_ACK_FREQUENCY_L0L1_ASPM_CONTROL", 0x470c, 0 }, + { "Enter_ASPM_L1_wo_L0s", 30, 1 }, + { "L1_Entrance_Latency", 27, 3 }, + { "L0s_Entrance_Latency", 24, 3 }, + { "Common_Clock_N_FTS", 16, 8 }, + { "N_FTS", 8, 8 }, + { "Ack_Frequency", 0, 8 }, + { "PCIE_X8_CORE_PORT_LINK_CONTROL", 0x4710, 0 }, + { "Crosslink_Active", 23, 1 }, + { "Crosslink_Enable", 22, 1 }, + { "Link_Mode_Enable", 16, 6 }, + { "Fast_Link_Mode", 7, 1 }, + { "DLL_Link_Enable", 5, 1 }, + { "Reset_Assert", 3, 1 }, + { "Loopback_Enable", 2, 1 }, + { "Scramble_Disable", 1, 1 }, + { "Vendor_Specific_DLLP_Request", 0, 1 }, + { "PCIE_X8_CORE_LANE_SKEW", 0x4714, 0 }, + { "Disable_DeSkew", 31, 1 }, + { "Ack_Nak_Disable", 25, 1 }, + { "Flow_Control_Disable", 24, 1 }, + { "Insert_TxSkew", 0, 24 }, + { "PCIE_X8_CORE_SYMBOL_NUMBER", 0x4718, 0 }, + { "Ack_Nak_Timer_Modifier", 19, 5 }, + { "Replay_Timer_Modifier", 14, 5 }, + { "MaxFunc", 0, 3 }, + { "PCIE_X8_CORE_SYMBOL_TIMER_FILTER_MASK1", 0x471c, 0 }, + { "Mask_RADM_Filter", 16, 16 }, + { "Disable_FC_Watchdog", 15, 1 }, + { "SKP_Interval", 0, 11 }, + { "PCIE_X8_CORE_FILTER_MASK2", 0x4720, 0 }, + { "PCIE_X8_CORE_DEBUG_0", 0x4728, 0 }, + { "PCIE_X8_CORE_DEBUG_1", 0x472c, 0 }, + { "PCIE_X8_CORE_TRANSMIT_POSTED_FC_CREDIT_STATUS", 0x4730, 0 }, + { "TxPH_FC", 12, 8 }, + { "TxPD_FC", 0, 12 }, + { "PCIE_X8_CORE_TRANSMIT_NONPOSTED_FC_CREDIT_STATUS", 0x4734, 0 }, + { "TxNPH_FC", 12, 8 }, + { "TxNPD_FC", 0, 12 }, + { "PCIE_X8_CORE_TRANSMIT_COMPLETION_FC_CREDIT_STATUS", 0x4738, 0 }, + { "TxCPLH_FC", 12, 8 }, + { "TxCPLD_FC", 0, 12 }, + { "PCIE_X8_CORE_QUEUE_STATUS", 0x473c, 0 }, + { "RxQueue_Not_Empty", 2, 1 }, + { "TxRetryBuf_Not_Empty", 1, 1 }, + { "RxTLP_FC_Not_Returned", 0, 1 }, + { "PCIE_X8_CORE_VC_TRANSMIT_ARBITRATION_1", 0x4740, 0 }, + { "VC3_WRR", 24, 8 }, + { "VC2_WRR", 16, 8 }, + { "VC1_WRR", 8, 8 }, + { "VC0_WRR", 0, 8 }, + { "PCIE_X8_CORE_VC_TRANSMIT_ARBITRATION_2", 0x4744, 0 }, + { "VC7_WRR", 24, 8 }, + { "VC6_WRR", 16, 8 }, + { "VC5_WRR", 8, 8 }, + { "VC4_WRR", 0, 8 }, + { "PCIE_X8_CORE_VC0_POSTED_RECEIVE_QUEUE_CONTROL", 0x4748, 0 }, + { "VC0_Rx_Ordering", 31, 1 }, + { "VC0_TLP_Ordering", 30, 1 }, + { "VC0_PTLP_Queue_Mode", 21, 3 }, + { "VC0_PH_Credits", 12, 8 }, + { "VC0_PD_Credits", 0, 12 }, + { "PCIE_X8_CORE_VC0_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x474c, 0 }, + { "VC0_NPTLP_Queue_Mode", 21, 3 }, + { "VC0_NPH_Credits", 12, 8 }, + { "VC0_NPD_Credits", 0, 12 }, + { "PCIE_X8_CORE_VC0_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x4750, 0 }, + { "VC0_CPLTLP_Queue_Mode", 21, 3 }, + { "VC0_CPLH_Credits", 12, 8 }, + { "VC0_CPLD_Credits", 0, 12 }, + { "PCIE_X8_CORE_VC1_POSTED_RECEIVE_QUEUE_CONTROL", 0x4754, 0 }, + { "VC1_TLP_Ordering", 30, 1 }, + { "VC1_PTLP_Queue_Mode", 21, 3 }, + { "VC1_PH_Credits", 12, 8 }, + { "VC1_PD_Credits", 0, 12 }, + { "PCIE_X8_CORE_VC1_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x4758, 0 }, + { "VC1_NPTLP_Queue_Mode", 21, 3 }, + { "VC1_NPH_Credits", 12, 8 }, + { "VC1_NPD_Credits", 0, 12 }, + { "PCIE_X8_CORE_VC1_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x475c, 0 }, + { "VC1_CPLTLP_Queue_Mode", 21, 3 }, + { "VC1_CPLH_Credits", 12, 8 }, + { "VC1_CPLD_Credits", 0, 12 }, + { "PCIE_X8_CORE_LINK_WIDTH_SPEED_CHANGE", 0x480c, 0 }, + { "Sel_DeEmphasis", 20, 1 }, + { "TxCmplRcv", 19, 1 }, + { "PhyTxSwing", 18, 1 }, + { "DirSpdChange", 17, 1 }, + { "Auto_Lane_Flip_Ctrl_En", 16, 1 }, + { "Num_Lanes", 8, 5 }, + { "NFTS_Gen2_3", 0, 8 }, + { "PCIE_X8_CORE_PHY_STATUS", 0x4810, 0 }, + { "PCIE_X8_CORE_PHY_CONTROL", 0x4814, 0 }, + { "PCIE_X8_CORE_GEN3_CONTROL", 0x4890, 0 }, + { "Rate_Shadow_Sel", 24, 2 }, + { "DC_Balance_Disable", 18, 1 }, + { "DLLP_Delay_Disable", 17, 1 }, + { "Eql_Disable", 16, 1 }, + { "Eql_Redo_Disable", 11, 1 }, + { "Eql_EIEOS_CntRst_Disable", 10, 1 }, + { "Eql_PH2_PH3_Disable", 9, 1 }, + { "Disable_Scrambler", 8, 1 }, + { "PCIE_X8_CORE_GEN3_EQ_FS_LF", 0x4894, 0 }, + { "Full_Swing", 6, 6 }, + { "Low_Frequency", 0, 6 }, + { "PCIE_X8_CORE_GEN3_EQ_PRESET_COEFF", 0x4898, 0 }, + { "PostCursor", 12, 6 }, + { "Cursor", 6, 6 }, + { "PreCursor", 0, 6 }, + { "PCIE_X8_CORE_GEN3_EQ_PRESET_INDEX", 0x489c, 0 }, + { "PCIE_X8_CORE_GEN3_EQ_STATUS", 0x48a4, 0 }, + { "PCIE_X8_CORE_GEN3_EQ_CONTROL", 0x48a8, 0 }, + { "Include_Initial_FOM", 24, 1 }, + { "Preset_Request_Vector", 8, 16 }, + { "Phase23_2ms_Timeout_Disable", 5, 1 }, + { "After24ms", 4, 1 }, + { "Feedback_Mode", 0, 4 }, + { "PCIE_X8_CORE_GEN3_EQ_DIRCHANGE_FEEDBACK", 0x48ac, 0 }, + { "WinAperture_CPlus1", 14, 4 }, + { "WinAperture_CMins1", 10, 4 }, + { "Convergence_WinDepth", 5, 5 }, + { "EQMasterPhase_MinTime", 0, 5 }, + { "PCIE_X8_CORE_PIPE_CONTROL", 0x48b8, 0 }, + { "Loopback_Enable", 31, 1 }, + { "PCIE_X8_CORE_DBI_RO_WE", 0x48bc, 0 }, + { "PCIE_X8_CFG_SPACE_REQ", 0x48c0, 0 }, + { "Enable", 31, 1 }, + { "AI", 30, 1 }, + { "CS2", 29, 1 }, + { "WrBE", 25, 4 }, + { "ExtRegister", 8, 4 }, + { "Register", 0, 8 }, + { "PCIE_X8_CFG_SPACE_DATA", 0x48c4, 0 }, + { "PCIE_X8_CFG_MPS_MRS", 0x4900, 0 }, + { "MRS", 3, 3 }, + { "MPS", 0, 3 }, + { "PCIE_X8_CFG_ATTRIBUTES", 0x4904, 0 }, + { "DcaEn", 2, 1 }, + { "DcaStFitTraOnlEn", 1, 1 }, + { "ReqCtlDynStClkEn", 0, 1 }, + { "PCIE_X8_CFG_LTSSM", 0x4908, 0 }, + { "PCIE_ARM_REQUESTER_ID_X8", 0x490c, 0 }, + { "PrimBusnumber", 16, 8 }, + { "RequesterId", 0, 16 }, + { "PCIE_SWAP_DATA_B2L_X8", 0x4910, 0 }, + { "cfgrd_swap_en", 1, 1 }, + { "cfgwr_swap_en", 0, 1 }, + { "PCIE_PDEBUG_DATA0_X8", 0x4914, 0 }, + { "PCIE_PDEBUG_DATA1_X8", 0x4918, 0 }, + { "PCIE_PDEBUG_DATA2_X8", 0x491c, 0 }, + { "PCIE_PDEBUG_CTRL_X8", 0x4920, 0 }, + { "PCIE_PDEBUG_DATA_X8", 0x4924, 0 }, + { "PCIE_SPARE_REGISTER_SPACES_X8", 0x4ffc, 0 }, + { "PCIE_DMA_CFG", 0x5940, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_DMA_STAT", 0x5944, 0 }, + { "RspCnt", 20, 10 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_DMA_STAT2", 0x5948, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "SIReqCnt", 16, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_DMA_STAT3", 0x594c, 0 }, + { "AtmReqSOPCnt", 24, 8 }, + { "AtmEOPMatchSOP", 17, 1 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_DMA_CFG", 0x5950, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_DMA_STAT", 0x5954, 0 }, + { "RspCnt", 20, 10 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_DMA_STAT2", 0x5958, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "SIReqCnt", 16, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_DMA_STAT3", 0x595c, 0 }, + { "AtmReqSOPCnt", 24, 8 }, + { "AtmEOPMatchSOP", 17, 1 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_DMA_CFG", 0x5960, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_DMA_STAT", 0x5964, 0 }, + { "RspCnt", 20, 10 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_DMA_STAT2", 0x5968, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "SIReqCnt", 16, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_DMA_STAT3", 0x596c, 0 }, + { "AtmReqSOPCnt", 24, 8 }, + { "AtmEOPMatchSOP", 17, 1 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_DMA_CFG", 0x5970, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_DMA_STAT", 0x5974, 0 }, + { "RspCnt", 20, 10 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_DMA_STAT2", 0x5978, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "SIReqCnt", 16, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_DMA_STAT3", 0x597c, 0 }, + { "AtmReqSOPCnt", 24, 8 }, + { "AtmEOPMatchSOP", 17, 1 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_CMD_CFG", 0x5980, 0 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 6 }, + { "UseCmdPool", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_CMD_STAT", 0x5984, 0 }, + { "RspCnt", 20, 8 }, + { "RdReqCnt", 12, 4 }, + { "PCIE_CMD_STAT2", 0x5988, 0 }, + { "PCIE_CMD_STAT3", 0x598c, 0 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_HMA_CFG", 0x59b0, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_HMA_STAT", 0x59b4, 0 }, + { "RspCnt", 20, 10 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_HMA_STAT2", 0x59b8, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_HMA_STAT3", 0x59bc, 0 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_CGEN", 0x59c0, 0 }, + { "ARM_Static_CGEN", 28, 1 }, + { "ARM_Dynamic_CGEN", 27, 1 }, + { "VPD_Dynamic_CGEN", 26, 1 }, + { "MA_Dynamic_CGEN", 25, 1 }, + { "Tagq_Dynamic_CGEN", 24, 1 }, + { "ReqCtl_Dynamic_CGEN", 23, 1 }, + { "RspDataProc_Dynamic_CGEN", 22, 1 }, + { "RspRdq_Dynamic_CGEN", 21, 1 }, + { "RspIPif_Dynamic_CGEN", 20, 1 }, + { "HMA_Static_CGEN", 19, 1 }, + { "HMA_Dynamic_CGEN", 18, 1 }, + { "CMD_Static_CGEN", 16, 1 }, + { "CMD_Dynamic_CGEN", 15, 1 }, + { "DMA_Static_CGEN", 13, 1 }, + { "DMA_Dynamic_CGEN", 12, 1 }, + { "VFID_SleepStatus", 10, 1 }, + { "VC1_SleepStatus", 9, 1 }, + { "STI_SleepStatus", 8, 1 }, + { "VFID_SleepReq", 2, 1 }, + { "VC1_SleepReq", 1, 1 }, + { "STI_SleepReq", 0, 1 }, + { "PCIE_MA_RSP", 0x59c4, 0 }, + { "TimerValue", 8, 24 }, + { "MAReqTimerEn", 1, 1 }, + { "TimerEn", 0, 1 }, + { "PCIE_HPRD", 0x59c8, 0 }, + { "NPH_CreditsAvailVC0", 19, 2 }, + { "NPD_CreditsAvailVC0", 17, 2 }, + { "NPH_CreditsAvailVC1", 15, 2 }, + { "NPD_CreditsAvailVC1", 13, 2 }, + { "NPH_CreditsRequired", 11, 2 }, + { "NPD_CreditsRequired", 9, 2 }, + { "ReqBurstCount", 5, 4 }, + { "ReqBurstFrequency", 1, 4 }, + { "EnableVC1", 0, 1 }, + { "PCIE_PERR_GROUP", 0x59d0, 0 }, + { "TGT1_MEM_Perr", 28, 1 }, + { "TGT2_MEM_Perr", 27, 1 }, + { "MA_RspCtlPerr", 26, 1 }, + { "MST_DataPathPerr", 25, 1 }, + { "MST_RspRdQPerr", 24, 1 }, + { "TRGT1_FIDLkUpHdrPerr", 20, 1 }, + { "TRGT1_AlindDataPerr", 19, 1 }, + { "TRGT1_UnAlinDataPerr", 18, 1 }, + { "TRGT1_ReqDataPerr", 17, 1 }, + { "TRGT1_ReqHdrPerr", 16, 1 }, + { "IPRxData_VC0Perr", 15, 1 }, + { "IPRxHdr_VC0Perr", 14, 1 }, + { "PIOCpl_VDMTxCtlPerr", 13, 1 }, + { "PIOCpl_VDMTxDataPerr", 12, 1 }, + { "MA_RspDataPerr", 11, 1 }, + { "MA_CplTagQPerr", 10, 1 }, + { "MA_ReqTagQPerr", 9, 1 }, + { "PIOReq_BAR2CtlPerr", 8, 1 }, + { "PIOReq_MEMCtlPerr", 7, 1 }, + { "PIOReq_PLMCtlPerr", 6, 1 }, + { "PIOReq_BAR2DataPerr", 5, 1 }, + { "PIOReq_MEMDataPerr", 4, 1 }, + { "PIOReq_PLMDataPerr", 3, 1 }, + { "PIOCpl_CtlPerr", 2, 1 }, + { "PIOCpl_DataPerr", 1, 1 }, + { "PIOCpl_PLMRspPerr", 0, 1 }, + { "PCIE_RSP_ERR_INT_LOG_EN", 0x59d4, 0 }, + { "CplStatusIntEn", 12, 1 }, + { "TimeoutIntEn", 11, 1 }, + { "DisabledIntEn", 10, 1 }, + { "RspDropFLRIntEn", 9, 1 }, + { "ReqUnderFLRIntEn", 8, 1 }, + { "CplStatusLogEn", 4, 1 }, + { "TimeoutLogEn", 3, 1 }, + { "DisabledLogEn", 2, 1 }, + { "RspDropFLRLogEn", 1, 1 }, + { "ReqUnderFLRLogEn", 0, 1 }, + { "PCIE_RSP_ERR_LOG1", 0x59d8, 0 }, + { "Tag", 25, 7 }, + { "CID", 22, 3 }, + { "ChNum", 19, 3 }, + { "ByteLen", 6, 13 }, + { "Reason", 3, 3 }, + { "CplStatus", 0, 3 }, + { "PCIE_RSP_ERR_LOG2", 0x59dc, 0 }, + { "Valid", 31, 1 }, + { "Addr10b", 9, 10 }, + { "VFID", 0, 9 }, + { "PCIE_REVISION", 0x5a00, 0 }, + { "PCIE_PDEBUG_INDEX", 0x5a04, 0 }, + { "PDEBUGSelH", 16, 8 }, + { "PDEBUGSelL", 0, 8 }, + { "PCIE_PDEBUG_DATA_HIGH", 0x5a08, 0 }, + { "PCIE_PDEBUG_DATA_LOW", 0x5a0c, 0 }, + { "PCIE_CDEBUG_INDEX", 0x5a10, 0 }, + { "CDEBUGSelH", 16, 8 }, + { "CDEBUGSelL", 0, 8 }, + { "PCIE_CDEBUG_DATA_HIGH", 0x5a14, 0 }, + { "PCIE_CDEBUG_DATA_LOW", 0x5a18, 0 }, + { "PCIE_BUS_MST_STAT_0", 0x5a60, 0 }, + { "PCIE_BUS_MST_STAT_1", 0x5a64, 0 }, + { "PCIE_BUS_MST_STAT_2", 0x5a68, 0 }, + { "PCIE_BUS_MST_STAT_3", 0x5a6c, 0 }, + { "PCIE_RSP_ERR_STAT_0", 0x5a80, 0 }, + { "PCIE_RSP_ERR_STAT_1", 0x5a84, 0 }, + { "PCIE_RSP_ERR_STAT_2", 0x5a88, 0 }, + { "PCIE_RSP_ERR_STAT_3", 0x5a8c, 0 }, + { "PCIE_DBI_TIMEOUT_CTL", 0x5a94, 0 }, + { "PCIE_DBI_TIMEOUT_STATUS0", 0x5a98, 0 }, + { "PCIE_DBI_TIMEOUT_STATUS1", 0x5a9c, 0 }, + { "Valid", 31, 1 }, + { "Source", 17, 2 }, + { "Write", 13, 4 }, + { "CS2", 12, 1 }, + { "PF", 9, 3 }, + { "VFVld", 8, 1 }, + { "VF", 0, 8 }, + { "PCIE_PB_CTL", 0x5b94, 0 }, + { "PB_Sel", 16, 8 }, + { "PB_SelReg", 8, 8 }, + { "PB_Func", 0, 3 }, + { "PCIE_PB_DATA", 0x5b98, 0 }, + { "PCIE_CHANGESET", 0x59fc, 0 }, + { "PCIE_CUR_LINK", 0x5b9c, 0 }, + { "CfgInitCoeffDoneSeen", 22, 1 }, + { "CfgInitCoeffDone", 21, 1 }, + { "xmlh_link_up", 20, 1 }, + { "pm_linkst_in_l0s", 19, 1 }, + { "pm_linkst_in_l1", 18, 1 }, + { "pm_linkst_in_l2", 17, 1 }, + { "pm_linkst_l2_exit", 16, 1 }, + { "xmlh_in_rl0s", 15, 1 }, + { "xmlh_ltssm_state_rcvry_eq", 14, 1 }, + { "NegotiatedWidth", 8, 6 }, + { "ActiveLanes", 0, 8 }, + { "PCIE_PHY_REQRXPWR", 0x5ba0, 0 }, + { "Req_LnH_RxStateDone", 31, 1 }, + { "Req_LnH_RxStateReq", 30, 1 }, + { "Req_LnH_RxPwrState", 28, 2 }, + { "Req_LnG_RxStateDone", 27, 1 }, + { "Req_LnG_RxStateReq", 26, 1 }, + { "Req_LnG_RxPwrState", 24, 2 }, + { "Req_LnF_RxStateDone", 23, 1 }, + { "Req_LnF_RxStateReq", 22, 1 }, + { "Req_LnF_RxPwrState", 20, 2 }, + { "Req_LnE_RxStateDone", 19, 1 }, + { "Req_LnE_RxStateReq", 18, 1 }, + { "Req_LnE_RxPwrState", 16, 2 }, + { "Req_LnD_RxStateDone", 15, 1 }, + { "Req_LnD_RxStateReq", 14, 1 }, + { "Req_LnD_RxPwrState", 12, 2 }, + { "Req_LnC_RxStateDone", 11, 1 }, + { "Req_LnC_RxStateReq", 10, 1 }, + { "Req_LnC_RxPwrState", 8, 2 }, + { "Req_LnB_RxStateDone", 7, 1 }, + { "Req_LnB_RxStateReq", 6, 1 }, + { "Req_LnB_RxPwrState", 4, 2 }, + { "Req_LnA_RxStateDone", 3, 1 }, + { "Req_LnA_RxStateReq", 2, 1 }, + { "Req_LnA_RxPwrState", 0, 2 }, + { "PCIE_PHY_CURRXPWR", 0x5ba4, 0 }, + { "Cur_LnH_RxPwrState", 28, 3 }, + { "Cur_LnG_RxPwrState", 24, 3 }, + { "Cur_LnF_RxPwrState", 20, 3 }, + { "Cur_LnE_RxPwrState", 16, 3 }, + { "Cur_LnD_RxPwrState", 12, 3 }, + { "Cur_LnC_RxPwrState", 8, 3 }, + { "Cur_LnB_RxPwrState", 4, 3 }, + { "Cur_LnA_RxPwrState", 0, 3 }, + { "PCIE_PHY_GEN3_AE0", 0x5ba8, 0 }, + { "LnD_STAT", 28, 3 }, + { "LnD_CMD", 24, 3 }, + { "LnC_STAT", 20, 3 }, + { "LnC_CMD", 16, 3 }, + { "LnB_STAT", 12, 3 }, + { "LnB_CMD", 8, 3 }, + { "LnA_STAT", 4, 3 }, + { "LnA_CMD", 0, 3 }, + { "PCIE_PHY_GEN3_AE1", 0x5bac, 0 }, + { "LnH_STAT", 28, 3 }, + { "LnH_CMD", 24, 3 }, + { "LnG_STAT", 20, 3 }, + { "LnG_CMD", 16, 3 }, + { "LnF_STAT", 12, 3 }, + { "LnF_CMD", 8, 3 }, + { "LnE_STAT", 4, 3 }, + { "LnE_CMD", 0, 3 }, + { "PCIE_PHY_FS_LF0", 0x5bb0, 0 }, + { "Lane1LF", 24, 6 }, + { "Lane1FS", 16, 6 }, + { "Lane0LF", 8, 6 }, + { "Lane0FS", 0, 6 }, + { "PCIE_PHY_FS_LF1", 0x5bb4, 0 }, + { "Lane3LF", 24, 6 }, + { "Lane3FS", 16, 6 }, + { "Lane2LF", 8, 6 }, + { "Lane2FS", 0, 6 }, + { "PCIE_PHY_FS_LF2", 0x5bb8, 0 }, + { "Lane5LF", 24, 6 }, + { "Lane5FS", 16, 6 }, + { "Lane4LF", 8, 6 }, + { "Lane4FS", 0, 6 }, + { "PCIE_PHY_FS_LF3", 0x5bbc, 0 }, + { "Lane7LF", 24, 6 }, + { "Lane7FS", 16, 6 }, + { "Lane6LF", 8, 6 }, + { "Lane6FS", 0, 6 }, + { "PCIE_PHY_PRESET_REQ", 0x5bc0, 0 }, + { "CoeffDone", 16, 1 }, + { "CoeffLane", 8, 4 }, + { "CoeffStart", 0, 1 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bc4, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bc8, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bcc, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bd0, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bd4, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bd8, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bdc, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5be0, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5be4, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5be8, 0 }, + { "PCIE_PHY_PRESET_COEFF", 0x5bec, 0 }, + { "PCIE_PHY_INDIR_REQ", 0x5bf0, 0 }, + { "Enable", 31, 1 }, + { "RegAddr", 0, 16 }, + { "PCIE_PHY_INDIR_DATA", 0x5bf4, 0 }, + { "PCIE_STATIC_SPARE1", 0x5bf8, 0 }, + { "PCIE_STATIC_SPARE2", 0x5bfc, 0 }, + { "x8_sw_en", 30, 1 }, + { "SwitchCfg", 28, 2 }, + { "STATIC_SPARE2", 0, 28 }, + { "PCIE_KDOORBELL_GTS_PF_BASE_LEN", 0x5c10, 0 }, + { "KDB_PF_Len", 24, 5 }, + { "KDB_PF_BaseAddr", 0, 20 }, + { "PCIE_KDOORBELL_GTS_VF_BASE_LEN", 0x5c14, 0 }, + { "KDB_VF_Len", 24, 5 }, + { "KDB_VF_BaseAddr", 0, 20 }, + { "PCIE_KDOORBELL_GTS_VF_OFFSET", 0x5c18, 0 }, + { "PCIE_PHY_REQRXPWR1", 0x5c1c, 0 }, + { "Req_LnP_RxStateDone", 31, 1 }, + { "Req_LnP_RxStateReq", 30, 1 }, + { "Req_LnP_RxPwrState", 28, 2 }, + { "Req_LnO_RxStateDone", 27, 1 }, + { "Req_LnO_RxStateReq", 26, 1 }, + { "Req_LnO_RxPwrState", 24, 2 }, + { "Req_LnN_RxStateDone", 23, 1 }, + { "Req_LnN_RxStateReq", 22, 1 }, + { "Req_LnN_RxPwrState", 20, 2 }, + { "Req_LnM_RxStateDone", 19, 1 }, + { "Req_LnM_RxStateReq", 18, 1 }, + { "Req_LnM_RxPwrState", 16, 2 }, + { "Req_LnL_RxStateDone", 15, 1 }, + { "Req_LnL_RxStateReq", 14, 1 }, + { "Req_LnL_RxPwrState", 12, 2 }, + { "Req_LnK_RxStateDone", 11, 1 }, + { "Req_LnK_RxStateReq", 10, 1 }, + { "Req_LnK_RxPwrState", 8, 2 }, + { "Req_LnJ_RxStateDone", 7, 1 }, + { "Req_LnJ_RxStateReq", 6, 1 }, + { "Req_LnJ_RxPwrState", 4, 2 }, + { "Req_LnI_RxStateDone", 3, 1 }, + { "Req_LnI_RxStateReq", 2, 1 }, + { "Req_LnI_RxPwrState", 0, 2 }, + { "PCIE_PHY_CURRXPWR1", 0x5c20, 0 }, + { "Cur_LnP_RxPwrState", 28, 3 }, + { "Cur_LnO_RxPwrState", 24, 3 }, + { "Cur_LnN_RxPwrState", 20, 3 }, + { "Cur_LnM_RxPwrState", 16, 3 }, + { "Cur_LnL_RxPwrState", 12, 3 }, + { "Cur_LnK_RxPwrState", 8, 3 }, + { "Cur_LnJ_RxPwrState", 4, 3 }, + { "Cur_LnI_RxPwrState", 0, 3 }, + { "PCIE_PHY_GEN3_AE2", 0x5c24, 0 }, + { "LnL_STAT", 28, 3 }, + { "LnL_CMD", 24, 3 }, + { "LnK_STAT", 20, 3 }, + { "LnK_CMD", 16, 3 }, + { "LnJ_STAT", 12, 3 }, + { "LnJ_CMD", 8, 3 }, + { "LnI_STAT", 4, 3 }, + { "LnI_CMD", 0, 3 }, + { "PCIE_PHY_GEN3_AE3", 0x5c28, 0 }, + { "LnP_STAT", 28, 3 }, + { "LnP_CMD", 24, 3 }, + { "LnO_STAT", 20, 3 }, + { "LnO_CMD", 16, 3 }, + { "LnN_STAT", 12, 3 }, + { "LnN_CMD", 8, 3 }, + { "LnM_STAT", 4, 3 }, + { "LnM_CMD", 0, 3 }, + { "PCIE_PHY_FS_LF4", 0x5c2c, 0 }, + { "Lane9LF", 24, 6 }, + { "Lane9FS", 16, 6 }, + { "Lane8LF", 8, 6 }, + { "Lane8FS", 0, 6 }, + { "PCIE_PHY_FS_LF5", 0x5c30, 0 }, + { "Lane11LF", 24, 6 }, + { "Lane11FS", 16, 6 }, + { "Lane10LF", 8, 6 }, + { "Lane10FS", 0, 6 }, + { "PCIE_PHY_FS_LF6", 0x5c34, 0 }, + { "Lane13LF", 24, 6 }, + { "Lane13FS", 16, 6 }, + { "Lane12LF", 8, 6 }, + { "Lane12FS", 0, 6 }, + { "PCIE_PHY_FS_LF7", 0x5c38, 0 }, + { "Lane15LF", 24, 6 }, + { "Lane15FS", 16, 6 }, + { "Lane14LF", 8, 6 }, + { "Lane14FS", 0, 6 }, + { "PCIE_MULTI_PHY_INDIR_REQ", 0x5c3c, 0 }, + { "Phy_Reg_Enable", 31, 1 }, + { "Phy_Reg_Select", 22, 2 }, + { "Phy_Reg_RegAddr", 0, 16 }, + { "PCIE_MULTI_PHY_INDIR_DATA", 0x5c40, 0 }, + { "PCIE_VF_INT_INDIR_REQ", 0x5c44, 0 }, + { "Enable", 24, 1 }, + { "AI", 23, 1 }, + { "VFID", 0, 10 }, + { "PCIE_VF_INT_INDIR_DATA", 0x5c48, 0 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 12 }, + { "PCIE_VF_256_INT_CFG2", 0x5c4c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c50, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c54, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c58, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c5c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c60, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c64, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c68, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c6c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c70, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c74, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c78, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c7c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c80, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c84, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c88, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c8c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c90, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c94, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c98, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5c9c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ca0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ca4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ca8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cb0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cb4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cb8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cbc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cc0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cc4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cc8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ccc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cd0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cd4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cd8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cdc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ce0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ce4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ce8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cf0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cf4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cf8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5cfc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d00, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d04, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d08, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d0c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d10, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d14, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d18, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d1c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d20, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d24, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d28, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d2c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d30, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d34, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d38, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d3c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d40, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d44, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d48, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d4c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d50, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d54, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d58, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d5c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d60, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d64, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d68, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d6c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d70, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d74, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d78, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d7c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d80, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d84, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d88, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d8c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d90, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d94, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d98, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5d9c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5da0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5da4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5da8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5db0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5db4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5db8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dbc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dc0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dc4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dc8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dcc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dd0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dd4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dd8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5ddc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5de0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5de4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5de8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5df0, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5df4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5df8, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5dfc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e00, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e04, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e08, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e0c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e10, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e14, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e18, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e1c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e20, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e24, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e28, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e2c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e30, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e34, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e38, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e3c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e40, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e44, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_256_INT_CFG2", 0x5e48, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PCIE_VF_MSI_EN_4", 0x5e50, 0 }, + { "PCIE_VF_MSI_EN_5", 0x5e54, 0 }, + { "PCIE_VF_MSI_EN_6", 0x5e58, 0 }, + { "PCIE_VF_MSI_EN_7", 0x5e5c, 0 }, + { "PCIE_VF_MSIX_EN_4", 0x5e60, 0 }, + { "PCIE_VF_MSIX_EN_5", 0x5e64, 0 }, + { "PCIE_VF_MSIX_EN_6", 0x5e68, 0 }, + { "PCIE_VF_MSIX_EN_7", 0x5e6c, 0 }, + { "PCIE_FLR_VF4_STATUS", 0x5e70, 0 }, + { "PCIE_FLR_VF5_STATUS", 0x5e74, 0 }, + { "PCIE_FLR_VF6_STATUS", 0x5e78, 0 }, + { "PCIE_FLR_VF7_STATUS", 0x5e7c, 0 }, + { "PCIE_BUS_MST_STAT_4", 0x5e80, 0 }, + { "PCIE_BUS_MST_STAT_5", 0x5e84, 0 }, + { "PCIE_BUS_MST_STAT_6", 0x5e88, 0 }, + { "PCIE_BUS_MST_STAT_7", 0x5e8c, 0 }, + { "PCIE_BUS_MST_STAT_8", 0x5e90, 0 }, + { "PCIE_TGT_SKID_FIFO", 0x5e94, 0 }, + { "HdrFreeCnt", 16, 12 }, + { "DataFreeCnt", 0, 12 }, + { "PCIE_RSP_ERR_STAT_4", 0x5ea0, 0 }, + { "PCIE_RSP_ERR_STAT_5", 0x5ea4, 0 }, + { "PCIE_RSP_ERR_STAT_6", 0x5ea8, 0 }, + { "PCIE_RSP_ERR_STAT_7", 0x5eac, 0 }, + { "PCIE_RSP_ERR_STAT_8", 0x5eb0, 0 }, + { "PCIE_PHY_STAT1", 0x5ec0, 0 }, + { "PHY0_RTune_Ack", 31, 1 }, + { "PHY1_RTune_Ack", 30, 1 }, + { "PCIE_PHY_CTRL1", 0x5ec4, 0 }, + { "PHY0_RTune_Req", 31, 1 }, + { "PHY1_RTune_Req", 30, 1 }, + { "TxDeemph_gen1", 16, 8 }, + { "TxDeemph_gen2_3p5db", 8, 8 }, + { "TxDeemph_gen2_6db", 0, 8 }, + { "PCIE_PCIE_SPARE0", 0x5ec8, 0 }, + { "PCIE_RESET_STAT", 0x5ecc, 0 }, + { "PON_RST_STATE_flag", 11, 1 }, + { "BUS_RST_STATE_flag", 10, 1 }, + { "DL_DOWN_PCIeCRST_MODE0_STATE_flag", 9, 1 }, + { "DL_DOWN_PCIeCRST_MODE1_STATE_flag", 8, 1 }, + { "PCIe_WARM_RST_MODE0_STATE_flag", 7, 1 }, + { "PCIe_WARM_RST_MODE1_STATE_flag", 6, 1 }, + { "PIO_WARM_RST_MODE0_STATE_flag", 5, 1 }, + { "PIO_WARM_RST_MODE1_STATE_flag", 4, 1 }, + { "LastResetState", 0, 3 }, + { "PCIE_FUNC_DSTATE", 0x5ed0, 0 }, + { "PF7_DState", 21, 3 }, + { "PF6_DState", 18, 3 }, + { "PF5_DState", 15, 3 }, + { "PF4_DState", 12, 3 }, + { "PF3_DState", 9, 3 }, + { "PF2_DState", 6, 3 }, + { "PF1_DState", 3, 3 }, + { "PF0_DState", 0, 3 }, + { "PCIE_DEBUG_ADDR_RANGE1", 0x5ee0, 0 }, + { "PCIE_DEBUG_ADDR_RANGE2", 0x5ef0, 0 }, + { "PCIE_DEBUG_ADDR_RANGE_CNT", 0x5f00, 0 }, + { "PCIE_PHY_PGM_LOAD_CTRL", 0x5f04, 0 }, + { "HSS_PMLD_ACC_EN", 31, 1 }, + { "HSS_PmRdWr_Addr", 0, 18 }, + { "PCIE_PHY_PGM_LOAD_DATA", 0x5f08, 0 }, + { "PCIE_HSS_CFG", 0x5f0c, 0 }, + { "HSS_PCS_AGGREGATION_MODE", 30, 2 }, + { "HSS_PCS_FURCATE_MODE", 28, 2 }, + { "HSS_PCS_PCLK_ON_IN_P2", 27, 1 }, + { "HSS0_PHY_CTRL_REFCLK", 17, 5 }, + { "HSS1_PHY_CTRL_REFCLK", 12, 5 }, + { "HSS0_PHY_REXT_MASTER", 11, 1 }, + { "HSS1_PHY_REXT_MASTER", 10, 1 }, + { "HSS0_PHY_CTRL_VDDA_SEL", 9, 1 }, + { "HSS0_PHY_CTRL_VDDHA_SEL", 8, 1 }, + { "HSS1_PHY_CTRL_VDDA_SEL", 7, 1 }, + { "HSS1_PHY_CTRL_VDDHA_SEL", 6, 1 }, + { "HSS1_CPU_MEMPSACK", 5, 1 }, + { "HSS1_CPU_MEMACK", 4, 1 }, + { "HSS0_CPU_MEMPSACK", 3, 1 }, + { "HSS0_CPU_MEMACK", 2, 1 }, + { "HSS_PM_IS_ROM", 1, 1 }, + { "PCIE_HSS_RST", 0x5f10, 0 }, + { "HSS_RST_CTRL_BY_FW", 31, 1 }, + { "HSS_PIPE0_RESET_N", 30, 1 }, + { "HSS0_POR_N", 29, 1 }, + { "HSS1_POR_N", 28, 1 }, + { "HSS0_CPU_RESET", 27, 1 }, + { "HSS1_CPU_RESET", 26, 1 }, + { "HSS_PCS_POR_N", 25, 1 }, + { "SW_CRst_", 24, 1 }, + { "SW_PCIeCRst_", 23, 1 }, + { "SW_PCIePipeRst_", 22, 1 }, + { "SW_PCIePhyRst_", 21, 1 }, + { "HSS1_ERR_O", 3, 1 }, + { "HSS0_ERR_O", 2, 1 }, + { "HSS1_PLL_LOCK", 1, 1 }, + { "HSS0_PLL_LOCK", 0, 1 }, + { "PCIE_ARM_CFG", 0x5f20, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxReqCnt", 20, 7 }, + { "MaxRdReqSize", 17, 3 }, + { "MaxRspCnt", 9, 8 }, + { "SeqChkDis", 8, 1 }, + { "MinTag", 0, 8 }, + { "PCIE_ARM_STAT", 0x5f24, 0 }, + { "RspCnt", 20, 9 }, + { "RdReqCnt", 12, 6 }, + { "WrReqCnt", 0, 9 }, + { "PCIE_ARM_STAT2", 0x5f28, 0 }, + { "CookieCnt", 24, 4 }, + { "RdSeqNumUpdCnt", 20, 4 }, + { "SIReqCnt", 16, 4 }, + { "WrEOPMatchSOP", 12, 1 }, + { "WrSOPCnt", 8, 4 }, + { "RdSOPCnt", 0, 8 }, + { "PCIE_ARM_STAT3", 0x5f2c, 0 }, + { "AtmReqSOPCnt", 24, 8 }, + { "AtmEOPMatchSOP", 17, 1 }, + { "RspEOPMatchSOP", 16, 1 }, + { "RspErrCnt", 8, 8 }, + { "RspSOPCnt", 0, 8 }, + { "PCIE_ARM_REQUESTER_ID", 0x5f30, 0 }, + { "PrimBusnumber", 16, 8 }, + { "RequesterId", 0, 16 }, + { "PCIE_SWITCH_CFG_SPACE_REQ0", 0x5f34, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 19, 1 }, + { "ByteEnable", 15, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA0", 0x5f38, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ1", 0x5f3c, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA1", 0x5f40, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ2", 0x5f44, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA2", 0x5f48, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ3", 0x5f4c, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA3", 0x5f50, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ4", 0x5f54, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA4", 0x5f58, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ5", 0x5f5c, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA5", 0x5f60, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ6", 0x5f64, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA6", 0x5f68, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ7", 0x5f6c, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA7", 0x5f70, 0 }, + { "PCIE_SWITCH_CFG_SPACE_REQ8", 0x5f74, 0 }, + { "ReqEnable", 31, 1 }, + { "RdReqType", 30, 1 }, + { "ByteEnable", 26, 4 }, + { "RegAddr", 0, 15 }, + { "PCIE_SWITCH_CFG_SPACE_DATA8", 0x5f78, 0 }, + { "PCIE_SNPS_G5_PHY_CR_REQ", 0x5f7c, 0 }, + { "RegSel", 31, 1 }, + { "RdEnable", 30, 1 }, + { "WrEnable", 29, 1 }, + { "AutoIncrVal", 21, 2 }, + { "AutoIncr", 20, 1 }, + { "PhySel", 16, 4 }, + { "RegAddr", 0, 16 }, + { "PCIE_SNPS_G5_PHY_CR_DATA", 0x5f80, 0 }, + { "PCIE_SNPS_G5_PHY_SRAM_CFG", 0x5f84, 0 }, + { "phy3_sram_bootload_bypass", 27, 1 }, + { "phy3_sram_bypass", 26, 1 }, + { "phy3_sram_ecc_en", 25, 1 }, + { "phy3_sram_ext_ld_done", 24, 1 }, + { "phy2_sram_bootload_bypass", 19, 1 }, + { "phy2_sram_bypass", 18, 1 }, + { "phy2_sram_ecc_en", 17, 1 }, + { "phy2_sram_ext_ld_done", 16, 1 }, + { "phy1_sram_bootload_bypass", 11, 1 }, + { "phy1_sram_bypass", 10, 1 }, + { "phy1_sram_ecc_en", 9, 1 }, + { "phy1_sram_ext_ld_done", 8, 1 }, + { "phy_cr_para_sel", 4, 4 }, + { "phy0_sram_bootload_bypass", 3, 1 }, + { "phy0_sram_bypass", 2, 1 }, + { "phy0_sram_ecc_en", 1, 1 }, + { "phy0_sram_ext_ld_done", 0, 1 }, + { "PCIE_SNPS_G5_PHY_SRAM_STS", 0x5f88, 0 }, + { "phy3_sram_init_done", 3, 1 }, + { "phy2_sram_init_done", 2, 1 }, + { "phy1_sram_init_done", 1, 1 }, + { "phy0_sram_init_done", 0, 1 }, + { "PCIE_SNPS_G5_PHY_CTRL_PHY_0_TO_3", 0x5f90, 0 }, + { "PCIE_SNPS_G5_PHY_CTRL_PHY_0_DATA", 0x5f94, 0 }, + { "PCIE_SNPS_G5_PHY_CTRL_PHY_1_DATA", 0x5f98, 0 }, + { "PCIE_SNPS_G5_PHY_CTRL_PHY_2_DATA", 0x5f9c, 0 }, + { "PCIE_SNPS_G5_PHY_CTRL_PHY_3_DATA", 0x5fa0, 0 }, + { "PCIE_SNPS_G5_PHY_DEFAULTS", 0x5fa4, 0 }, + { "PCIE_SNPS_G5_PHY_0_VALUES", 0x5fa8, 0 }, + { "rx_term_offset", 28, 1 }, + { "refb_raw_clk_div2_en", 27, 1 }, + { "refb_range", 23, 4 }, + { "refb_lane_clk_en", 22, 1 }, + { "refb_clk_div2_en", 21, 1 }, + { "refa_raw_clk_div2_en", 20, 1 }, + { "refa_range", 16, 4 }, + { "refa_lane_clk_en", 15, 1 }, + { "refa_clk_div2_en", 14, 1 }, + { "nominal_vph_sel", 10, 2 }, + { "nominal_vp_sel", 8, 2 }, + { "mpllb_word_clk_en", 7, 1 }, + { "mpllb_ssc_en", 6, 1 }, + { "mpllb_short_lock_en", 5, 1 }, + { "mpllb_force_en", 4, 1 }, + { "mplla_word_clk_en", 3, 1 }, + { "mplla_ssc_en", 2, 1 }, + { "mplla_short_lock_en", 1, 1 }, + { "mplla_force_en", 0, 1 }, + { "PCIE_SNPS_G5_PHY_1_VALUES", 0x5fac, 0 }, + { "rx_term_offset", 28, 1 }, + { "refb_raw_clk_div2_en", 27, 1 }, + { "refb_range", 23, 4 }, + { "refb_lane_clk_en", 22, 1 }, + { "refb_clk_div2_en", 21, 1 }, + { "refa_raw_clk_div2_en", 20, 1 }, + { "refa_range", 16, 4 }, + { "refa_lane_clk_en", 15, 1 }, + { "refa_clk_div2_en", 14, 1 }, + { "ref_alt1_clk_m", 13, 1 }, + { "ref_alt1_clk_p", 12, 1 }, + { "nominal_vph_sel", 10, 2 }, + { "nominal_vp_sel", 8, 2 }, + { "mpllb_word_clk_en", 7, 1 }, + { "mpllb_ssc_en", 6, 1 }, + { "mpllb_short_lock_en", 5, 1 }, + { "mpllb_force_en", 4, 1 }, + { "mplla_word_clk_en", 3, 1 }, + { "mplla_ssc_en", 2, 1 }, + { "mplla_short_lock_en", 1, 1 }, + { "mplla_force_en", 0, 1 }, + { "PCIE_SNPS_G5_PHY_2_VALUES", 0x5fb0, 0 }, + { "rx_term_offset", 28, 1 }, + { "refb_raw_clk_div2_en", 27, 1 }, + { "refb_range", 23, 4 }, + { "refb_lane_clk_en", 22, 1 }, + { "refb_clk_div2_en", 21, 1 }, + { "refa_raw_clk_div2_en", 20, 1 }, + { "refa_range", 16, 4 }, + { "refa_lane_clk_en", 15, 1 }, + { "refa_clk_div2_en", 14, 1 }, + { "ref_alt1_clk_m", 13, 1 }, + { "ref_alt1_clk_p", 12, 1 }, + { "nominal_vph_sel", 10, 2 }, + { "nominal_vp_sel", 8, 2 }, + { "mpllb_word_clk_en", 7, 1 }, + { "mpllb_ssc_en", 6, 1 }, + { "mpllb_short_lock_en", 5, 1 }, + { "mpllb_force_en", 4, 1 }, + { "mplla_word_clk_en", 3, 1 }, + { "mplla_ssc_en", 2, 1 }, + { "mplla_short_lock_en", 1, 1 }, + { "mplla_force_en", 0, 1 }, + { "PCIE_SNPS_G5_PHY_3_VALUES", 0x5fb4, 0 }, + { "rx_term_offset", 28, 1 }, + { "refb_raw_clk_div2_en", 27, 1 }, + { "refb_range", 23, 4 }, + { "refb_lane_clk_en", 22, 1 }, + { "refb_clk_div2_en", 21, 1 }, + { "refa_raw_clk_div2_en", 20, 1 }, + { "refa_range", 16, 4 }, + { "refa_lane_clk_en", 15, 1 }, + { "refa_clk_div2_en", 14, 1 }, + { "ref_alt1_clk_m", 13, 1 }, + { "ref_alt1_clk_p", 12, 1 }, + { "nominal_vph_sel", 10, 2 }, + { "nominal_vp_sel", 8, 2 }, + { "mpllb_word_clk_en", 7, 1 }, + { "mpllb_ssc_en", 6, 1 }, + { "mpllb_short_lock_en", 5, 1 }, + { "mpllb_force_en", 4, 1 }, + { "mplla_word_clk_en", 3, 1 }, + { "mplla_ssc_en", 2, 1 }, + { "mplla_short_lock_en", 1, 1 }, + { "mplla_force_en", 0, 1 }, + { "PCIE_SNPS_G5_PHY_0_RX_LANEPLL_BYPASS_MODE", 0x5fb8, 0 }, + { "lane3", 15, 5 }, + { "lane2", 10, 5 }, + { "lane1", 5, 5 }, + { "lane0", 0, 5 }, + { "PCIE_SNPS_G5_PHY_1_RX_LANEPLL_BYPASS_MODE", 0x5fbc, 0 }, + { "lane3", 15, 5 }, + { "lane2", 10, 5 }, + { "lane1", 5, 5 }, + { "lane0", 0, 5 }, + { "PCIE_SNPS_G5_PHY_2_RX_LANEPLL_BYPASS_MODE", 0x5fc0, 0 }, + { "lane3", 15, 5 }, + { "lane2", 10, 5 }, + { "lane1", 5, 5 }, + { "lane0", 0, 5 }, + { "PCIE_SNPS_G5_PHY_3_RX_LANEPLL_BYPASS_MODE", 0x5fc4, 0 }, + { "lane3", 15, 5 }, + { "lane2", 10, 5 }, + { "lane1", 5, 5 }, + { "lane0", 0, 5 }, + { "PCIE_SNPS_G5_PHY_0_1_RX_LANEPLL_SRC_SEL", 0x5fc8, 0 }, + { "lane7_lanepll_src_sel", 28, 4 }, + { "lane6_lanepll_src_sel", 24, 4 }, + { "lane5_lanepll_src_sel", 20, 4 }, + { "lane4_lanepll_src_sel", 16, 4 }, + { "lane3_lanepll_src_sel", 12, 4 }, + { "lane2_lanepll_src_sel", 8, 4 }, + { "lane1_lanepll_src_sel", 4, 4 }, + { "lane0_lanepll_src_sel", 0, 4 }, + { "PCIE_SNPS_G5_PHY_2_3_RX_LANEPLL_SRC_SEL", 0x5fcc, 0 }, + { "lane7_lanepll_src_sel", 28, 4 }, + { "lane6_lanepll_src_sel", 24, 4 }, + { "lane5_lanepll_src_sel", 20, 4 }, + { "lane4_lanepll_src_sel", 16, 4 }, + { "lane3_lanepll_src_sel", 12, 4 }, + { "lane2_lanepll_src_sel", 8, 4 }, + { "lane1_lanepll_src_sel", 4, 4 }, + { "lane0_lanepll_src_sel", 0, 4 }, + { "PCIE_SNPS_G5_PHY_RX_DECERR", 0x5fd0, 0 }, + { "lane15_rec_ovrd_8b10b_decerr", 30, 2 }, + { "lane14_rec_ovrd_8b10b_decerr", 28, 2 }, + { "lane13_rec_ovrd_8b10b_decerr", 26, 2 }, + { "lane12_rec_ovrd_8b10b_decerr", 24, 2 }, + { "lane11_rec_ovrd_8b10b_decerr", 22, 2 }, + { "lane10_rec_ovrd_8b10b_decerr", 20, 2 }, + { "lane9_rec_ovrd_8b10b_decerr", 18, 2 }, + { "lane8_rec_ovrd_8b10b_decerr", 16, 2 }, + { "lane7_rec_ovrd_8b10b_decerr", 14, 2 }, + { "lane6_rec_ovrd_8b10b_decerr", 12, 2 }, + { "lane5_rec_ovrd_8b10b_decerr", 10, 2 }, + { "lane4_rec_ovrd_8b10b_decerr", 8, 2 }, + { "lane3_rec_ovrd_8b10b_decerr", 6, 2 }, + { "lane2_rec_ovrd_8b10b_decerr", 4, 2 }, + { "lane1_rec_ovrd_8b10b_decerr", 2, 2 }, + { "lane0_rec_ovrd_8b10b_decerr", 0, 2 }, + { "PCIE_SNPS_G5_PHY_TX2RX_LOOPBK_REC_OVRD_EN", 0x5fd4, 0 }, + { "lane15_rec_ovrd_en", 31, 1 }, + { "lane14_rec_ovrd_en", 30, 1 }, + { "lane13_rec_ovrd_en", 29, 1 }, + { "lane12_rec_ovrd_en", 28, 1 }, + { "lane11_rec_ovrd_en", 27, 1 }, + { "lane10_rec_ovrd_en", 26, 1 }, + { "lane9_rec_ovrd_en", 25, 1 }, + { "lane8_rec_ovrd_en", 24, 1 }, + { "lane7_rec_ovrd_en", 23, 1 }, + { "lane6_rec_ovrd_en", 22, 1 }, + { "lane5_rec_ovrd_en", 21, 1 }, + { "lane4_rec_ovrd_en", 20, 1 }, + { "lane3_rec_ovrd_en", 19, 1 }, + { "lane2_rec_ovrd_en", 18, 1 }, + { "lane1_rec_ovrd_en", 17, 1 }, + { "lane0_rec_ovrd_en", 16, 1 }, + { "lane15_tx2rx_loopbk", 15, 1 }, + { "lane14_tx2rx_loopbk", 14, 1 }, + { "lane13_tx2rx_loopbk", 13, 1 }, + { "lane12_tx2rx_loopbk", 12, 1 }, + { "lane11_tx2rx_loopbk", 11, 1 }, + { "lane10_tx2rx_loopbk", 10, 1 }, + { "lane9_tx2rx_loopbk", 9, 1 }, + { "lane8_tx2rx_loopbk", 8, 1 }, + { "lane7_tx2rx_loopbk", 7, 1 }, + { "lane6_tx2rx_loopbk", 6, 1 }, + { "lane5_tx2rx_loopbk", 5, 1 }, + { "lane4_tx2rx_loopbk", 4, 1 }, + { "lane3_tx2rx_loopbk", 3, 1 }, + { "lane2_tx2rx_loopbk", 2, 1 }, + { "lane1_tx2rx_loopbk", 1, 1 }, + { "lane0_tx2rx_loopbk", 0, 1 }, + { "PCIE_PHY_TX_DISABLE_UPCS_PIPE_CONFIG", 0x5fd8, 0 }, + { "upcs_pipe_config", 16, 16 }, + { "tx15_disable", 15, 1 }, + { "tx14_disable", 14, 1 }, + { "tx13_disable", 13, 1 }, + { "tx12_disable", 12, 1 }, + { "tx11_disable", 11, 1 }, + { "tx10_disable", 10, 1 }, + { "tx9_disable", 9, 1 }, + { "tx8_disable", 8, 1 }, + { "tx7_disable", 7, 1 }, + { "tx6_disable", 6, 1 }, + { "tx5_disable", 5, 1 }, + { "tx4_disable", 4, 1 }, + { "tx3_disable", 3, 1 }, + { "tx2_disable", 2, 1 }, + { "tx1_disable", 1, 1 }, + { "tx0_disable", 0, 1 }, + { "PCIE_PIPE_LANE0_REG0", 0x5500, 0 }, + { "PCIE_PIPE_LANE0_REG1", 0x5504, 0 }, + { "PCIE_PIPE_LANE0_REG2", 0x5508, 0 }, + { "PCIE_PIPE_LANE0_REG3", 0x550c, 0 }, + { "PCIE_PIPE_LANE1_REG0", 0x5510, 0 }, + { "PCIE_PIPE_LANE1_REG1", 0x5514, 0 }, + { "PCIE_PIPE_LANE1_REG2", 0x5518, 0 }, + { "PCIE_PIPE_LANE1_REG3", 0x551c, 0 }, + { "PCIE_PIPE_LANE2_REG0", 0x5520, 0 }, + { "PCIE_PIPE_LANE2_REG1", 0x5524, 0 }, + { "PCIE_PIPE_LANE2_REG2", 0x5528, 0 }, + { "PCIE_PIPE_LANE2_REG3", 0x552c, 0 }, + { "PCIE_PIPE_LANE3_REG0", 0x5530, 0 }, + { "PCIE_PIPE_LANE3_REG1", 0x5534, 0 }, + { "PCIE_PIPE_LANE3_REG2", 0x5538, 0 }, + { "PCIE_PIPE_LANE3_REG3", 0x553c, 0 }, + { "PCIE_PIPE_LANE4_REG0", 0x5540, 0 }, + { "PCIE_PIPE_LANE4_REG1", 0x5544, 0 }, + { "PCIE_PIPE_LANE4_REG2", 0x5548, 0 }, + { "PCIE_PIPE_LANE4_REG3", 0x554c, 0 }, + { "PCIE_PIPE_LANE5_REG0", 0x5550, 0 }, + { "PCIE_PIPE_LANE5_REG1", 0x5554, 0 }, + { "PCIE_PIPE_LANE5_REG2", 0x5558, 0 }, + { "PCIE_PIPE_LANE5_REG3", 0x555c, 0 }, + { "PCIE_PIPE_LANE6_REG0", 0x5560, 0 }, + { "PCIE_PIPE_LANE6_REG1", 0x5564, 0 }, + { "PCIE_PIPE_LANE6_REG2", 0x5568, 0 }, + { "PCIE_PIPE_LANE6_REG3", 0x556c, 0 }, + { "PCIE_PIPE_LANE7_REG0", 0x5570, 0 }, + { "PCIE_PIPE_LANE7_REG1", 0x5574, 0 }, + { "PCIE_PIPE_LANE7_REG2", 0x5578, 0 }, + { "PCIE_PIPE_LANE7_REG3", 0x557c, 0 }, + { "PCIE_PIPE_LANE8_REG0", 0x5580, 0 }, + { "PCIE_PIPE_LANE8_REG1", 0x5584, 0 }, + { "PCIE_PIPE_LANE8_REG2", 0x5588, 0 }, + { "PCIE_PIPE_LANE8_REG3", 0x558c, 0 }, + { "PCIE_PIPE_LANE9_REG0", 0x5590, 0 }, + { "PCIE_PIPE_LANE9_REG1", 0x5594, 0 }, + { "PCIE_PIPE_LANE9_REG2", 0x5598, 0 }, + { "PCIE_PIPE_LANE9_REG3", 0x559c, 0 }, + { "PCIE_PIPE_LANE10_REG0", 0x55a0, 0 }, + { "PCIE_PIPE_LANE10_REG1", 0x55a4, 0 }, + { "PCIE_PIPE_LANE10_REG2", 0x55a8, 0 }, + { "PCIE_PIPE_LANE10_REG3", 0x55ac, 0 }, + { "PCIE_PIPE_LANE11_REG0", 0x55b0, 0 }, + { "PCIE_PIPE_LANE11_REG1", 0x55b4, 0 }, + { "PCIE_PIPE_LANE11_REG2", 0x55b8, 0 }, + { "PCIE_PIPE_LANE11_REG3", 0x55bc, 0 }, + { "PCIE_PIPE_LANE12_REG0", 0x55c0, 0 }, + { "PCIE_PIPE_LANE12_REG1", 0x55c4, 0 }, + { "PCIE_PIPE_LANE12_REG2", 0x55c8, 0 }, + { "PCIE_PIPE_LANE12_REG3", 0x55cc, 0 }, + { "PCIE_PIPE_LANE13_REG0", 0x55d0, 0 }, + { "PCIE_PIPE_LANE13_REG1", 0x55d4, 0 }, + { "PCIE_PIPE_LANE13_REG2", 0x55d8, 0 }, + { "PCIE_PIPE_LANE13_REG3", 0x55dc, 0 }, + { "PCIE_PIPE_LANE14_REG0", 0x55e0, 0 }, + { "PCIE_PIPE_LANE14_REG1", 0x55e4, 0 }, + { "PCIE_PIPE_LANE14_REG2", 0x55e8, 0 }, + { "PCIE_PIPE_LANE14_REG3", 0x55ec, 0 }, + { "PCIE_PIPE_LANE15_REG0", 0x55f0, 0 }, + { "PCIE_PIPE_LANE15_REG1", 0x55f4, 0 }, + { "PCIE_PIPE_LANE15_REG2", 0x55f8, 0 }, + { "PCIE_PIPE_LANE15_REG3", 0x55fc, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3600, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3604, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3608, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x360c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3610, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3614, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3618, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x361c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3620, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3624, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3628, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x362c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3630, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3634, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3638, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x363c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3640, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3644, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3648, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x364c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3650, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3654, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3658, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x365c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3660, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3664, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3668, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x366c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3670, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3674, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3678, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x367c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3680, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3684, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3688, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x368c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3690, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3694, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x3698, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x369c, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36a0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36a4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36a8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36ac, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36b0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36b4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36b8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36bc, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36c0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36c4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36c8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36cc, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36d0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36d4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36d8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36dc, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36e0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36e4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36e8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36ec, 0 }, + { "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36f0, 0 }, + { "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36f4, 0 }, + { "PCIE_JBOF_NVME_LENGTH", 0x36f8, 0 }, + { "NVMeDisable", 31, 1 }, + { "NVMeLength", 0, 30 }, + { "PCIE_JBOF_NVME_GROUP", 0x36fc, 0 }, + { "PCIE_PTM_EP_EXT_STROBE", 0x3804, 0 }, + { "ptm_auto_update", 1, 1 }, + { "ptm_ext_strobe", 0, 1 }, + { "PCIE_PTM_EP_EXT_TIME0", 0x3808, 0 }, + { "PCIE_PTM_EP_EXT_TIME1", 0x380c, 0 }, + { "PCIE_PTM_MAN_UPD_PULSE", 0x3810, 0 }, + { "PCIE_SWAP_DATA_B2L_X16", 0x3814, 0 }, + { "cfgrd_swap_en", 1, 1 }, + { "cfgwr_swap_en", 0, 1 }, + { "PCIE_PCIE_RC_RST", 0x3818, 0 }, + { "PCIE_PCIE_LN_CLKSEL", 0x3880, 0 }, + { "ds8_sel", 30, 2 }, + { "ds7_sel", 28, 2 }, + { "ds6_sel", 26, 2 }, + { "ds5_sel", 24, 2 }, + { "ds4_sel", 22, 2 }, + { "ds3_sel", 20, 2 }, + { "ds2_sel", 18, 2 }, + { "ds1_sel", 16, 2 }, + { "ln14_sel", 14, 2 }, + { "ln12_sel", 12, 2 }, + { "ln10_sel", 10, 2 }, + { "ln8_sel", 8, 2 }, + { "ln6_sel", 6, 2 }, + { "ln4_sel", 4, 2 }, + { "ln2_sel", 2, 2 }, + { "ln0_sel", 0, 2 }, + { "PCIE_PCIE_MSIX_EN", 0x3884, 0 }, + { "PCIE_LFSR_WRCTRL", 0x3888, 0 }, + { "wr_lfsr_cmp_data", 16, 16 }, + { "wr_lfsr_rsvd", 2, 14 }, + { "wr_lfsr_en", 1, 1 }, + { "wr_lfsr_start", 0, 1 }, + { "PCIE_LFSR_RDCTRL", 0x388c, 0 }, + { "cmd_lfsr_cmp_data", 24, 8 }, + { "rd_lfsr_cmd_data", 16, 8 }, + { "rd_lfsr_rsvd", 10, 6 }, + { "rd3_lfsr_en", 9, 1 }, + { "rd3_lfsr_start", 8, 1 }, + { "rd2_lfsr_en", 7, 1 }, + { "rd2_lfsr_start", 6, 1 }, + { "rd1_lfsr_en", 5, 1 }, + { "rd1_lfsr_start", 4, 1 }, + { "rd0_lfsr_en", 3, 1 }, + { "rd0_lfsr_start", 2, 1 }, + { "cmd_lfsr_en", 1, 1 }, + { "cmd_lfsr_start", 0, 1 }, + { "PCIE_EMU_ADDR", 0x3900, 0 }, + { "PCIE_EMU_CFG", 0x3904, 0 }, + { "EmuEnable", 16, 1 }, + { "EmuType", 14, 2 }, + { "BAR0Target", 12, 2 }, + { "BAR2Target", 10, 2 }, + { "BAR4Target", 8, 2 }, + { "ReleativeEmuID", 0, 8 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3910, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3914, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3918, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x391c, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3920, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3924, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3928, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x392c, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3930, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3934, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3938, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x393c, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3940, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3944, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3948, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x394c, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3950, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3954, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3958, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x395c, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3960, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3964, 0 }, + { "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3968, 0 }, + { "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x396c, 0 }, + { "PCIE_TCAM_DATA", 0x3970, 0 }, + { "PCIE_TCAM_CTL", 0x3974, 0 }, + { "TcamAddr", 8, 10 }, + { "CamEn", 0, 1 }, + { "PCIE_TCAM_DBG", 0x3978, 0 }, + { "CbPass", 24, 1 }, + { "CbBusy", 20, 1 }, + { "CbStart", 17, 1 }, + { "RstCb", 16, 1 }, + { "tcam_dbg_data", 0, 16 }, + { "PCIE_TEST_CTRL0", 0x3980, 0 }, + { "PCIE_TEST_CTRL1", 0x3984, 0 }, + { "PCIE_TEST_CTRL2", 0x3988, 0 }, + { "PCIE_TEST_CTRL3", 0x398c, 0 }, + { "PCIE_TEST_STS0", 0x3990, 0 }, + { "PCIE_TEST_STS1", 0x3994, 0 }, + { "PCIE_TEST_STS2", 0x3998, 0 }, + { "PCIE_TEST_STS3", 0x399c, 0 }, + { NULL } +}; + +struct reg_info t7_dbg_regs[] = { + { "DBG_DBG0_CFG", 0x6000, 0 }, + { "ModuleSelect", 12, 8 }, + { "RegSelect", 4, 8 }, + { "ClkSelect", 0, 4 }, + { "DBG_DBG0_EN", 0x6004, 0 }, + { "SDRHalfWord0", 8, 1 }, + { "DDREn", 4, 1 }, + { "PortEn", 0, 1 }, + { "DBG_DBG1_CFG", 0x6008, 0 }, + { "ModuleSelect", 12, 8 }, + { "RegSelect", 4, 8 }, + { "ClkSelect", 0, 4 }, + { "DBG_DBG1_EN", 0x600c, 0 }, + { "Clk_en_on_dbg1", 20, 1 }, + { "SDRHalfWord0", 8, 1 }, + { "DDREn", 4, 1 }, + { "PortEn", 0, 1 }, + { "DBG_GPIO_OUT", 0x6010, 0 }, + { "GPIO23_Out_Val", 23, 1 }, + { "GPIO22_Out_Val", 22, 1 }, + { "GPIO21_Out_Val", 21, 1 }, + { "GPIO20_Out_Val", 20, 1 }, + { "GPIO19_Out_Val", 19, 1 }, + { "GPIO18_Out_Val", 18, 1 }, + { "GPIO17_Out_Val", 17, 1 }, + { "GPIO16_Out_Val", 16, 1 }, + { "GPIO15_Out_Val", 15, 1 }, + { "GPIO14_Out_Val", 14, 1 }, + { "GPIO13_Out_Val", 13, 1 }, + { "GPIO12_Out_Val", 12, 1 }, + { "GPIO11_Out_Val", 11, 1 }, + { "GPIO10_Out_Val", 10, 1 }, + { "GPIO9_Out_Val", 9, 1 }, + { "GPIO8_Out_Val", 8, 1 }, + { "GPIO7_Out_Val", 7, 1 }, + { "GPIO6_Out_Val", 6, 1 }, + { "GPIO5_Out_Val", 5, 1 }, + { "GPIO4_Out_Val", 4, 1 }, + { "GPIO3_Out_Val", 3, 1 }, + { "GPIO2_Out_Val", 2, 1 }, + { "GPIO1_Out_Val", 1, 1 }, + { "GPIO0_Out_Val", 0, 1 }, + { "DBG_GPIO_IN", 0x6014, 0 }, + { "GPIO23_IN", 23, 1 }, + { "GPIO22_IN", 22, 1 }, + { "GPIO21_IN", 21, 1 }, + { "GPIO20_IN", 20, 1 }, + { "GPIO19_IN", 19, 1 }, + { "GPIO18_IN", 18, 1 }, + { "GPIO17_IN", 17, 1 }, + { "GPIO16_IN", 16, 1 }, + { "GPIO15_IN", 15, 1 }, + { "GPIO14_IN", 14, 1 }, + { "GPIO13_IN", 13, 1 }, + { "GPIO12_IN", 12, 1 }, + { "GPIO11_IN", 11, 1 }, + { "GPIO10_IN", 10, 1 }, + { "GPIO9_IN", 9, 1 }, + { "GPIO8_IN", 8, 1 }, + { "GPIO7_IN", 7, 1 }, + { "GPIO6_IN", 6, 1 }, + { "GPIO5_IN", 5, 1 }, + { "GPIO4_IN", 4, 1 }, + { "GPIO3_IN", 3, 1 }, + { "GPIO2_IN", 2, 1 }, + { "GPIO1_IN", 1, 1 }, + { "GPIO0_IN", 0, 1 }, + { "DBG_GPIO_OEN", 0x6100, 0 }, + { "GPIO23_OEn", 23, 1 }, + { "GPIO22_OEn", 22, 1 }, + { "GPIO21_OEn", 21, 1 }, + { "GPIO20_OEn", 20, 1 }, + { "GPIO19_OEn", 19, 1 }, + { "GPIO18_OEn", 18, 1 }, + { "GPIO17_OEn", 17, 1 }, + { "GPIO16_OEn", 16, 1 }, + { "GPIO15_OEn", 15, 1 }, + { "GPIO14_OEn", 14, 1 }, + { "GPIO13_OEn", 13, 1 }, + { "GPIO12_OEn", 12, 1 }, + { "GPIO11_OEn", 11, 1 }, + { "GPIO10_OEn", 10, 1 }, + { "GPIO9_OEn", 9, 1 }, + { "GPIO8_OEn", 8, 1 }, + { "GPIO7_OEn", 7, 1 }, + { "GPIO6_OEn", 6, 1 }, + { "GPIO5_OEn", 5, 1 }, + { "GPIO4_OEn", 4, 1 }, + { "GPIO3_OEn", 3, 1 }, + { "GPIO2_OEn", 2, 1 }, + { "GPIO1_OEn", 1, 1 }, + { "GPIO0_OEn", 0, 1 }, + { "DBG_GPIO_CHG_DET", 0x6104, 0 }, + { "GPIO23_CHG_DET", 23, 1 }, + { "GPIO22_CHG_DET", 22, 1 }, + { "GPIO21_CHG_DET", 21, 1 }, + { "GPIO20_CHG_DET", 20, 1 }, + { "GPIO19_CHG_DET", 19, 1 }, + { "GPIO18_CHG_DET", 18, 1 }, + { "GPIO17_CHG_DET", 17, 1 }, + { "GPIO16_CHG_DET", 16, 1 }, + { "GPIO15_CHG_DET", 15, 1 }, + { "GPIO14_CHG_DET", 14, 1 }, + { "GPIO13_CHG_DET", 13, 1 }, + { "GPIO12_CHG_DET", 12, 1 }, + { "GPIO11_CHG_DET", 11, 1 }, + { "GPIO10_CHG_DET", 10, 1 }, + { "GPIO9_CHG_DET", 9, 1 }, + { "GPIO8_CHG_DET", 8, 1 }, + { "GPIO7_CHG_DET", 7, 1 }, + { "GPIO6_CHG_DET", 6, 1 }, + { "GPIO5_CHG_DET", 5, 1 }, + { "GPIO4_CHG_DET", 4, 1 }, + { "GPIO3_CHG_DET", 3, 1 }, + { "GPIO2_CHG_DET", 2, 1 }, + { "GPIO1_CHG_DET", 1, 1 }, + { "GPIO0_CHG_DET", 0, 1 }, + { "DBG_INT_ENABLE", 0x6018, 0 }, + { "USBFifoParErr", 12, 1 }, + { "IBM_FDL_FAIL_int_enbl", 11, 1 }, + { "pll_lock_lost_int_enbl", 10, 1 }, + { "M1_LOCK", 9, 1 }, + { "PCIE_LOCK", 8, 1 }, + { "U_LOCK", 7, 1 }, + { "MAC_LOCK", 6, 1 }, + { "ARM_LOCK", 5, 1 }, + { "M0_LOCK", 4, 1 }, + { "XGPBUS_LOCK", 3, 1 }, + { "XGPHY_LOCK", 2, 1 }, + { "USB_LOCK", 1, 1 }, + { "C_LOCK", 0, 1 }, + { "DBG_INT_CAUSE", 0x601c, 0 }, + { "USBFifoParErr", 12, 1 }, + { "IBM_FDL_FAIL_int_cause", 11, 1 }, + { "pll_lock_lost_int_cause", 10, 1 }, + { "M1_LOCK", 9, 1 }, + { "PCIE_LOCK", 8, 1 }, + { "U_LOCK", 7, 1 }, + { "MAC_LOCK", 6, 1 }, + { "ARM_LOCK", 5, 1 }, + { "M0_LOCK", 4, 1 }, + { "XGPBUS_LOCK", 3, 1 }, + { "XGPHY_LOCK", 2, 1 }, + { "USB_LOCK", 1, 1 }, + { "C_LOCK", 0, 1 }, + { "DBG_GPIO_INT_ENABLE", 0x6180, 0 }, + { "GPIO23", 23, 1 }, + { "GPIO22", 22, 1 }, + { "GPIO21", 21, 1 }, + { "GPIO20", 20, 1 }, + { "GPIO19", 19, 1 }, + { "GPIO18", 18, 1 }, + { "GPIO17", 17, 1 }, + { "GPIO16", 16, 1 }, + { "GPIO15", 15, 1 }, + { "GPIO14", 14, 1 }, + { "GPIO13", 13, 1 }, + { "GPIO12", 12, 1 }, + { "GPIO11", 11, 1 }, + { "GPIO10", 10, 1 }, + { "GPIO9", 9, 1 }, + { "GPIO8", 8, 1 }, + { "GPIO7", 7, 1 }, + { "GPIO6", 6, 1 }, + { "GPIO5", 5, 1 }, + { "GPIO4", 4, 1 }, + { "GPIO3", 3, 1 }, + { "GPIO2", 2, 1 }, + { "GPIO1", 1, 1 }, + { "GPIO0", 0, 1 }, + { "DBG_GPIO_INT_CAUSE", 0x6184, 0 }, + { "GPIO23", 23, 1 }, + { "GPIO22", 22, 1 }, + { "GPIO21", 21, 1 }, + { "GPIO20", 20, 1 }, + { "GPIO19", 19, 1 }, + { "GPIO18", 18, 1 }, + { "GPIO17", 17, 1 }, + { "GPIO16", 16, 1 }, + { "GPIO15", 15, 1 }, + { "GPIO14", 14, 1 }, + { "GPIO13", 13, 1 }, + { "GPIO12", 12, 1 }, + { "GPIO11", 11, 1 }, + { "GPIO10", 10, 1 }, + { "GPIO9", 9, 1 }, + { "GPIO8", 8, 1 }, + { "GPIO7", 7, 1 }, + { "GPIO6", 6, 1 }, + { "GPIO5", 5, 1 }, + { "GPIO4", 4, 1 }, + { "GPIO3", 3, 1 }, + { "GPIO2", 2, 1 }, + { "GPIO1", 1, 1 }, + { "GPIO0", 0, 1 }, + { "DBG_GPIO_ACT_LOW", 0x6188, 0 }, + { "GPIO23_ACT_LOW", 23, 1 }, + { "GPIO22_ACT_LOW", 22, 1 }, + { "GPIO21_ACT_LOW", 21, 1 }, + { "GPIO20_ACT_LOW", 20, 1 }, + { "GPIO19_ACT_LOW", 19, 1 }, + { "GPIO18_ACT_LOW", 18, 1 }, + { "GPIO17_ACT_LOW", 17, 1 }, + { "GPIO16_ACT_LOW", 16, 1 }, + { "GPIO15_ACT_LOW", 15, 1 }, + { "GPIO14_ACT_LOW", 14, 1 }, + { "GPIO13_ACT_LOW", 13, 1 }, + { "GPIO12_ACT_LOW", 12, 1 }, + { "GPIO11_ACT_LOW", 11, 1 }, + { "GPIO10_ACT_LOW", 10, 1 }, + { "GPIO9_ACT_LOW", 9, 1 }, + { "GPIO8_ACT_LOW", 8, 1 }, + { "GPIO7_ACT_LOW", 7, 1 }, + { "GPIO6_ACT_LOW", 6, 1 }, + { "GPIO5_ACT_LOW", 5, 1 }, + { "GPIO4_ACT_LOW", 4, 1 }, + { "GPIO3_ACT_LOW", 3, 1 }, + { "GPIO2_ACT_LOW", 2, 1 }, + { "GPIO1_ACT_LOW", 1, 1 }, + { "GPIO0_ACT_LOW", 0, 1 }, + { "DBG_DDR_CAL", 0x618c, 0 }, + { "CAL_ENDC", 9, 1 }, + { "CAL_MODE", 8, 1 }, + { "CAL_REFSEL", 7, 1 }, + { "PD", 6, 1 }, + { "CAL_RST", 5, 1 }, + { "CAL_READ", 4, 1 }, + { "CAL_SC", 3, 1 }, + { "CAL_LC", 2, 1 }, + { "CAL_CCAL", 1, 1 }, + { "CAL_RES", 0, 1 }, + { "DBG_EFUSE_CTL_0", 0x6190, 0 }, + { "EFUSE_CSB", 31, 1 }, + { "EFUSE_STROBE", 30, 1 }, + { "EFUSE_LOAD", 29, 1 }, + { "EFUSE_PGENB", 28, 1 }, + { "EFUSE_PS", 27, 1 }, + { "EFUSE_MR", 26, 1 }, + { "EFUSE_PD", 25, 1 }, + { "EFUSE_RWL", 24, 1 }, + { "EFUSE_RSB", 23, 1 }, + { "EFUSE_TRCS", 22, 1 }, + { "EFUSE_AT", 20, 2 }, + { "EFUSE_RD_STATE", 16, 4 }, + { "EFUSE_BUSY", 15, 1 }, + { "EFUSE_WR_RD", 13, 2 }, + { "EFUSE_A", 0, 11 }, + { "DBG_EFUSE_CTL_1", 0x6194, 0 }, + { "EFUSE_CSB", 31, 1 }, + { "EFUSE_STROBE", 30, 1 }, + { "EFUSE_LOAD", 29, 1 }, + { "EFUSE_PGENB", 28, 1 }, + { "EFUSE_PS", 27, 1 }, + { "EFUSE_MR", 26, 1 }, + { "EFUSE_PD", 25, 1 }, + { "EFUSE_RWL", 24, 1 }, + { "EFUSE_RSB", 23, 1 }, + { "EFUSE_TRCS", 22, 1 }, + { "EFUSE_AT", 20, 2 }, + { "EFUSE_RD_STATE", 16, 4 }, + { "EFUSE_BUSY", 15, 1 }, + { "EFUSE_WR_RD", 13, 2 }, + { "EFUSE_A", 0, 11 }, + { "DBG_EFUSE_RD_CTL", 0x6198, 0 }, + { "EFUSE_RD_ID", 6, 2 }, + { "EFUSE_RD_ADDR", 0, 6 }, + { "DBG_EFUSE_RD_DATA", 0x619c, 0 }, + { "DBG_EFUSE_TIME_0", 0x61a0, 0 }, + { "EFUSE_TIME_1", 16, 16 }, + { "EFUSE_TIME_0", 0, 16 }, + { "DBG_EFUSE_TIME_1", 0x61a4, 0 }, + { "EFUSE_TIME_3", 16, 16 }, + { "EFUSE_TIME_2", 0, 16 }, + { "DBG_EFUSE_TIME_2", 0x61a8, 0 }, + { "EFUSE_TIME_5", 16, 16 }, + { "EFUSE_TIME_4", 0, 16 }, + { "DBG_EFUSE_TIME_3", 0x61ac, 0 }, + { "EFUSE_TIME_7", 16, 16 }, + { "EFUSE_TIME_6", 0, 16 }, + { "DBG_VREF_CTL", 0x61b0, 0 }, + { "VREF_SEL_1", 15, 1 }, + { "VREF_R_1", 8, 7 }, + { "VREF_SEL_0", 7, 1 }, + { "VREF_R_0", 0, 7 }, + { "DBG_FPGA_EFUSE_CTL", 0x61b4, 0 }, + { "DBG_FPGA_EFUSE_DATA", 0x61b8, 0 }, + { "DBG_DBG0_RST_VALUE", 0x6020, 0 }, + { "DBG_PLL_OCLK_PAD_EN", 0x6028, 0 }, + { "DBG_PLL_LOCK", 0x602c, 0 }, + { "M1_LOCK", 9, 1 }, + { "PCIE_LOCK", 8, 1 }, + { "U_LOCK", 7, 1 }, + { "MAC_LOCK", 6, 1 }, + { "ARM_LOCK", 5, 1 }, + { "M0_LOCK", 4, 1 }, + { "XGPBUS_LOCK", 3, 1 }, + { "XGPHY_LOCK", 2, 1 }, + { "USB_LOCK", 1, 1 }, + { "C_LOCK", 0, 1 }, + { "DBG_PLL_LOCK_ACT_LOW", 0x6030, 0 }, + { "M1_LOCK_ACT_LOW", 9, 1 }, + { "PCIE_LOCK_ACT_LOW", 8, 1 }, + { "U_LOCK_ACT_LOW", 7, 1 }, + { "MAC_LOCK_ACT_LOW", 6, 1 }, + { "ARM_LOCK_ACT_LOW", 5, 1 }, + { "M0_LOCK_ACT_LOW", 4, 1 }, + { "XGPBUS_LOCK_ACT_LOW", 3, 1 }, + { "XGPHY_LOCK_ACT_LOW", 2, 1 }, + { "USB_LOCK_ACT_LOW", 1, 1 }, + { "C_LOCK_ACT_LOW", 0, 1 }, + { "DBG_STATIC_U_PLL_CONF1", 0x6044, 0 }, + { "STATIC_U_PLL_RANGE", 22, 3 }, + { "STATIC_U_PLL_DIVQ", 17, 5 }, + { "STATIC_U_PLL_DIVFI", 8, 9 }, + { "STATIC_U_PLL_DIVR", 2, 6 }, + { "STATIC_U_PLL_BYPASS", 1, 1 }, + { "DBG_STATIC_U_PLL_CONF2", 0x6048, 0 }, + { "STATIC_U_PLL_SSMF", 5, 4 }, + { "STATIC_U_PLL_SSMD", 2, 3 }, + { "STATIC_U_PLL_SSDS", 1, 1 }, + { "STATIC_U_PLL_SSE", 0, 1 }, + { "DBG_STATIC_C_PLL_CONF1", 0x604c, 0 }, + { "STATIC_C_PLL_RANGE", 22, 3 }, + { "STATIC_C_PLL_DIVQ", 17, 5 }, + { "STATIC_C_PLL_DIVFI", 8, 9 }, + { "STATIC_C_PLL_DIVR", 2, 6 }, + { "STATIC_C_PLL_BYPASS", 1, 1 }, + { "DBG_STATIC_C_PLL_CONF2", 0x6050, 0 }, + { "STATIC_C_PLL_SSMF", 5, 4 }, + { "STATIC_C_PLL_SSMD", 2, 3 }, + { "STATIC_C_PLL_SSDS", 1, 1 }, + { "STATIC_C_PLL_SSE", 0, 1 }, + { "DBG_STATIC_PLL_DFS_CONF", 0x6054, 0 }, + { "STATIC_U_DFS_ACK", 23, 1 }, + { "STATIC_C_DFS_ACK", 22, 1 }, + { "STATIC_U_DFS_DIVFI", 13, 9 }, + { "STATIC_U_DFS_NEWDIV", 12, 1 }, + { "STATIC_U_DFS_ENABLE", 11, 1 }, + { "STATIC_C_DFS_DIVFI", 2, 9 }, + { "STATIC_C_DFS_NEWDIV", 1, 1 }, + { "STATIC_C_DFS_ENABLE", 0, 1 }, + { "DBG_EXTRA_STATIC_BITS_CONF", 0x6058, 0 }, + { "STATIC_LVDS_CLKOUT_EN", 21, 1 }, + { "ExPHYClk_sel_en", 16, 1 }, + { "DBG_STATIC_OCLK_MUXSEL_CONF", 0x605c, 0 }, + { "P_OCLK_MUXSEL", 13, 4 }, + { "DBG_TRACE0_CONF_COMPREG0", 0x6060, 0 }, + { "DBG_TRACE0_CONF_COMPREG1", 0x6064, 0 }, + { "DBG_TRACE1_CONF_COMPREG0", 0x6068, 0 }, + { "DBG_TRACE1_CONF_COMPREG1", 0x606c, 0 }, + { "DBG_TRACE0_CONF_MASKREG0", 0x6070, 0 }, + { "DBG_TRACE0_CONF_MASKREG1", 0x6074, 0 }, + { "DBG_TRACE1_CONF_MASKREG0", 0x6078, 0 }, + { "DBG_TRACE1_CONF_MASKREG1", 0x607c, 0 }, + { "DBG_TRACE_COUNTER", 0x6080, 0 }, + { "Counter1", 16, 16 }, + { "Counter0", 0, 16 }, + { "DBG_STATIC_REFCLK_PERIOD", 0x6084, 0 }, + { "DBG_TRACE_CONF", 0x6088, 0 }, + { "dbg_trace_operate_with_trg", 5, 1 }, + { "dbg_trace_operate_en", 4, 1 }, + { "dbg_operate_indv_combined", 3, 1 }, + { "dbg_operate_order_of_trigger", 2, 1 }, + { "dbg_operate_sgl_dbl_trigger", 1, 1 }, + { "dbg_operate0_or_1", 0, 1 }, + { "DBG_TRACE_RDEN", 0x608c, 0 }, + { "RD_ADDR1", 11, 9 }, + { "RD_ADDR0", 2, 9 }, + { "Rd_en1", 1, 1 }, + { "Rd_en0", 0, 1 }, + { "DBG_TRACE_WRADDR", 0x6090, 0 }, + { "Wr_pointer_addr1", 16, 9 }, + { "Wr_pointer_addr0", 0, 9 }, + { "DBG_TRACE0_DATA_OUT", 0x6094, 0 }, + { "DBG_TRACE1_DATA_OUT", 0x6098, 0 }, + { "DBG_FUSE_SENSE_DONE", 0x609c, 0 }, + { "PSRO_sel", 1, 4 }, + { "FUSE_DONE_SENSE", 0, 1 }, + { "DBG_PVT_EN1", 0x60a8, 0 }, + { "PVT_TRIMO", 18, 6 }, + { "PVT_TRIMG", 13, 5 }, + { "PVT_VSAMPLE", 12, 1 }, + { "PVT_PSAMPLE", 10, 2 }, + { "PVT_ENA", 9, 1 }, + { "PVT_RESET", 8, 1 }, + { "PVT_DIV", 0, 8 }, + { "DBG_PVT_EN2", 0x60ac, 0 }, + { "PVT_DATA_OUT", 1, 10 }, + { "PVT_DATA_VALID", 0, 1 }, + { "DBG_STATIC_M0_PLL_CONF1", 0x60b8, 0 }, + { "STATIC_M0_PLL_RANGE", 22, 3 }, + { "STATIC_M0_PLL_DIVQ", 17, 5 }, + { "STATIC_M0_PLL_DIVFI", 8, 9 }, + { "STATIC_M0_PLL_DIVR", 2, 6 }, + { "STATIC_M0_PLL_BYPASS", 1, 1 }, + { "STATIC_M0_PLL_RESET", 0, 1 }, + { "DBG_STATIC_M0_PLL_CONF2", 0x60bc, 0 }, + { "STATIC_SWMC1Rst_", 14, 1 }, + { "STATIC_SWMC1CfgRst_", 13, 1 }, + { "STATIC_PHY0RecRst_", 12, 1 }, + { "STATIC_PHY1RecRst_", 11, 1 }, + { "STATIC_SWMC0Rst_", 10, 1 }, + { "STATIC_SWMC0CfgRst_", 9, 1 }, + { "STATIC_M0_PLL_SSMF", 5, 4 }, + { "STATIC_M0_PLL_SSMD", 2, 3 }, + { "STATIC_M0_PLL_SSDS", 1, 1 }, + { "STATIC_M0_PLL_SSE", 0, 1 }, + { "DBG_STATIC_MAC_PLL_CONF1", 0x60c0, 0 }, + { "STATIC_MAC_PLL_RANGE", 22, 3 }, + { "STATIC_MAC_PLL_DIVQ", 17, 5 }, + { "STATIC_MAC_PLL_DIVFI", 8, 9 }, + { "STATIC_MAC_PLL_DIVR", 2, 6 }, + { "STATIC_MAC_PLL_BYPASS", 1, 1 }, + { "STATIC_MAC_PLL_RESET", 0, 1 }, + { "DBG_STATIC_MAC_PLL_CONF2", 0x60c4, 0 }, + { "STATIC_MAC_PLL_SSMF", 5, 4 }, + { "STATIC_MAC_PLL_SSMD", 2, 3 }, + { "STATIC_MAC_PLL_SSDS", 1, 1 }, + { "STATIC_MAC_PLL_SSE", 0, 1 }, + { "DBG_STATIC_ARM_PLL_CONF1", 0x60c8, 0 }, + { "STATIC_ARM_PLL_RANGE", 22, 3 }, + { "STATIC_ARM_PLL_DIVQ", 17, 5 }, + { "STATIC_ARM_PLL_DIVFI", 8, 9 }, + { "STATIC_ARM_PLL_DIVR", 2, 6 }, + { "STATIC_ARM_PLL_BYPASS", 1, 1 }, + { "STATIC_ARM_PLL_RESET", 0, 1 }, + { "DBG_STATIC_ARM_PLL_CONF2", 0x60cc, 0 }, + { "STATIC_ARM_PLL_SSMF", 5, 4 }, + { "STATIC_ARM_PLL_SSMD", 2, 3 }, + { "STATIC_ARM_PLL_SSDS", 1, 1 }, + { "STATIC_ARM_PLL_SSE", 0, 1 }, + { "DBG_STATIC_USB_PLL_CONF1", 0x60d0, 0 }, + { "STATIC_USB_PLL_RANGE", 22, 3 }, + { "STATIC_USB_PLL_DIVQ", 17, 5 }, + { "STATIC_USB_PLL_DIVFI", 8, 9 }, + { "STATIC_USB_PLL_DIVR", 2, 6 }, + { "STATIC_USB_PLL_BYPASS", 1, 1 }, + { "STATIC_USB_PLL_RESET", 0, 1 }, + { "DBG_STATIC_USB_PLL_CONF2", 0x60d4, 0 }, + { "STATIC_USB_PLL_SSMF", 5, 4 }, + { "STATIC_USB_PLL_SSMD", 2, 3 }, + { "STATIC_USB_PLL_SSDS", 1, 1 }, + { "STATIC_USB_PLL_SSE", 0, 1 }, + { "DBG_STATIC_XGPHY_PLL_CONF1", 0x60d8, 0 }, + { "STATIC_XGPHY_PLL_RANGE", 22, 3 }, + { "STATIC_XGPHY_PLL_DIVQ", 17, 5 }, + { "STATIC_XGPHY_PLL_DIVFI", 8, 9 }, + { "STATIC_XGPHY_PLL_DIVR", 2, 6 }, + { "STATIC_XGPHY_PLL_BYPASS", 1, 1 }, + { "STATIC_XGPHY_PLL_RESET", 0, 1 }, + { "DBG_STATIC_XGPHY_PLL_CONF2", 0x60dc, 0 }, + { "STATIC_XGPHY_PLL_SSMF", 5, 4 }, + { "STATIC_XGPHY_PLL_SSMD", 2, 3 }, + { "STATIC_XGPHY_PLL_SSDS", 1, 1 }, + { "STATIC_XGPHY_PLL_SSE", 0, 1 }, + { "DBG_STATIC_XGPBUS_PLL_CONF1", 0x60e0, 0 }, + { "STATIC_XGPBUS_SWRst_", 25, 1 }, + { "STATIC_XGPBUS_PLL_RANGE", 22, 3 }, + { "STATIC_XGPBUS_PLL_DIVQ", 17, 5 }, + { "STATIC_XGPBUS_PLL_DIVFI", 8, 9 }, + { "STATIC_XGPBUS_PLL_DIVR", 2, 6 }, + { "STATIC_XGPBUS_PLL_BYPASS", 1, 1 }, + { "STATIC_XGPBUS_PLL_RESET", 0, 1 }, + { "DBG_STATIC_XGPBUS_PLL_CONF2", 0x60e4, 0 }, + { "STATIC_XGPBUS_PLL_SSMF", 5, 4 }, + { "STATIC_XGPBUS_PLL_SSMD", 2, 3 }, + { "STATIC_XGPBUS_PLL_SSDS", 1, 1 }, + { "STATIC_XGPBUS_PLL_SSE", 0, 1 }, + { "DBG_STATIC_M1_PLL_CONF1", 0x60e8, 0 }, + { "STATIC_M1_PLL_RANGE", 22, 3 }, + { "STATIC_M1_PLL_DIVQ", 17, 5 }, + { "STATIC_M1_PLL_DIVFI", 8, 9 }, + { "STATIC_M1_PLL_DIVR", 2, 6 }, + { "STATIC_M1_PLL_BYPASS", 1, 1 }, + { "STATIC_M1_PLL_RESET", 0, 1 }, + { "DBG_STATIC_M1_PLL_CONF2", 0x60ec, 0 }, + { "STATIC_M1_PLL_SSMF", 5, 4 }, + { "STATIC_M1_PLL_SSMD", 2, 3 }, + { "STATIC_M1_PLL_SSDS", 1, 1 }, + { "STATIC_M1_PLL_SSE", 0, 1 }, + { "DBG_GPIO_PE_EN", 0x6118, 0 }, + { "GPIO23_PE_En", 23, 1 }, + { "GPIO22_PE_En", 22, 1 }, + { "GPIO21_PE_En", 21, 1 }, + { "GPIO20_PE_En", 20, 1 }, + { "GPIO19_PE_En", 19, 1 }, + { "GPIO18_PE_En", 18, 1 }, + { "GPIO17_PE_En", 17, 1 }, + { "GPIO16_PE_En", 16, 1 }, + { "GPIO15_PE_En", 15, 1 }, + { "GPIO14_PE_En", 14, 1 }, + { "GPIO13_PE_En", 13, 1 }, + { "GPIO12_PE_En", 12, 1 }, + { "GPIO11_PE_En", 11, 1 }, + { "GPIO10_PE_En", 10, 1 }, + { "GPIO9_PE_En", 9, 1 }, + { "GPIO8_PE_En", 8, 1 }, + { "GPIO7_PE_En", 7, 1 }, + { "GPIO6_PE_En", 6, 1 }, + { "GPIO5_PE_En", 5, 1 }, + { "GPIO4_PE_En", 4, 1 }, + { "GPIO3_PE_En", 3, 1 }, + { "GPIO2_PE_En", 2, 1 }, + { "GPIO1_PE_En", 1, 1 }, + { "GPIO0_PE_En", 0, 1 }, + { "DBG_GPIO_PS_EN", 0x611c, 0 }, + { "GPIO23_PS_En", 23, 1 }, + { "GPIO22_PS_En", 22, 1 }, + { "GPIO21_PS_En", 21, 1 }, + { "GPIO20_PS_En", 20, 1 }, + { "GPIO19_PS_En", 19, 1 }, + { "GPIO18_PS_En", 18, 1 }, + { "GPIO17_PS_En", 17, 1 }, + { "GPIO16_PS_En", 16, 1 }, + { "GPIO15_PS_En", 15, 1 }, + { "GPIO14_PS_En", 14, 1 }, + { "GPIO13_PS_En", 13, 1 }, + { "GPIO12_PS_En", 12, 1 }, + { "GPIO11_PS_En", 11, 1 }, + { "GPIO10_PS_En", 10, 1 }, + { "GPIO9_PS_En", 9, 1 }, + { "GPIO8_PS_En", 8, 1 }, + { "GPIO7_PS_En", 7, 1 }, + { "GPIO6_PS_En", 6, 1 }, + { "GPIO5_PS_En", 5, 1 }, + { "GPIO4_PS_En", 4, 1 }, + { "GPIO3_PS_En", 3, 1 }, + { "GPIO2_PS_En", 2, 1 }, + { "GPIO1_PS_En", 1, 1 }, + { "GPIO0_PS_En", 0, 1 }, + { "DBG_STATIC_PLL_LOCK_WAIT_CONF", 0x6150, 0 }, + { "STATIC_WAIT_LOCK", 24, 1 }, + { "STATIC_LOCK_WAIT_TIME", 0, 24 }, + { NULL } +}; + +struct reg_info t7_ma_regs[] = { + { "MA_CLIENT0_PR_THRESHOLD", 0x7700, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT0_CR_THRESHOLD", 0x7704, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT1_PR_THRESHOLD", 0x7708, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT1_CR_THRESHOLD", 0x770c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT2_PR_THRESHOLD", 0x7710, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT2_CR_THRESHOLD", 0x7714, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT3_PR_THRESHOLD", 0x7718, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT3_CR_THRESHOLD", 0x771c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT4_PR_THRESHOLD", 0x7720, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT4_CR_THRESHOLD", 0x7724, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT5_PR_THRESHOLD", 0x7728, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT5_CR_THRESHOLD", 0x772c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT6_PR_THRESHOLD", 0x7730, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT6_CR_THRESHOLD", 0x7734, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT7_PR_THRESHOLD", 0x7738, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT7_CR_THRESHOLD", 0x773c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT8_PR_THRESHOLD", 0x7740, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT8_CR_THRESHOLD", 0x7744, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT9_PR_THRESHOLD", 0x7748, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT9_CR_THRESHOLD", 0x774c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT10_PR_THRESHOLD", 0x7750, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT10_CR_THRESHOLD", 0x7754, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT11_PR_THRESHOLD", 0x7758, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT11_CR_THRESHOLD", 0x775c, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CLIENT12_PR_THRESHOLD", 0x7760, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT12_CR_THRESHOLD", 0x7764, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_SGE_TH0_DEBUG_CNT", 0x7768, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_SGE_TH1_DEBUG_CNT", 0x776c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPTX_DEBUG_CNT", 0x7770, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPRX_DEBUG_CNT", 0x7774, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPTXRX_DEBUG_CNT", 0x7778, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_TP_TH0_DEBUG_CNT", 0x777c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_TP_TH1_DEBUG_CNT", 0x7780, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_LE_DEBUG_CNT", 0x7784, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_CIM_TH0_DEBUG_CNT", 0x7788, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PCIE_DEBUG_CNT", 0x778c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PMTX_DEBUG_CNT", 0x7790, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PMRX_DEBUG_CNT", 0x7794, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_HMA_DEBUG_CNT", 0x7798, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_EDRAM0_BAR", 0x77c0, 0 }, + { "EDRAM0_BASE", 16, 16 }, + { "EDRAM0_SIZE", 0, 16 }, + { "MA_EDRAM1_BAR", 0x77c4, 0 }, + { "EDRAM1_BASE", 16, 16 }, + { "EDRAM1_SIZE", 0, 16 }, + { "MA_EXT_MEMORY0_BAR", 0x77c8, 0 }, + { "EXT_MEM0_BASE", 16, 16 }, + { "EXT_MEM0_SIZE", 0, 16 }, + { "MA_HOST_MEMORY_BAR", 0x77cc, 0 }, + { "HMA_BASE", 16, 16 }, + { "HMA_SIZE", 0, 16 }, + { "MA_EXT_MEM_PAGE_SIZE", 0x77d0, 0 }, + { "BRBC_MODE", 4, 1 }, + { "BRC_MODE", 3, 1 }, + { "EXT_MEM_PAGE_SIZE", 0, 3 }, + { "MA_ARB_CTRL", 0x77d4, 0 }, + { "HMA_WRT_EN", 26, 1 }, + { "HMA_NUM_PG_128B_FDBK", 21, 5 }, + { "HMA_DIS_128B_PG_CNT_FDBK", 20, 1 }, + { "HMA_DIS_BG_ARB", 19, 1 }, + { "HMA_DIS_BANK_FAIR", 18, 1 }, + { "HMA_DIS_PAGE_HINT", 17, 1 }, + { "HMA_DIS_ADV_ARB", 16, 1 }, + { "NUM_PG_128B_FDBK", 5, 5 }, + { "DIS_128B_PG_CNT_FDBK", 4, 1 }, + { "DIS_BG_ARB", 3, 1 }, + { "DIS_BANK_FAIR", 2, 1 }, + { "DIS_PAGE_HINT", 1, 1 }, + { "DIS_ADV_ARB", 0, 1 }, + { "MA_TARGET_MEM_ENABLE", 0x77d8, 0 }, + { "EDC512", 8, 1 }, + { "MC_SPLIT_BOUNDARY", 7, 1 }, + { "MC_SPLIT", 6, 1 }, + { "HMA_MUX", 5, 1 }, + { "EXT_MEM1_ENABLE", 4, 1 }, + { "HMA_ENABLE", 3, 1 }, + { "EXT_MEM0_ENABLE", 2, 1 }, + { "EDRAM1_ENABLE", 1, 1 }, + { "EDRAM0_ENABLE", 0, 1 }, + { "MA_INT_ENABLE", 0x77dc, 0 }, + { "MEM_TO_INT_ENABLE", 2, 1 }, + { "MEM_PERR_INT_ENABLE", 1, 1 }, + { "MEM_WRAP_INT_ENABLE", 0, 1 }, + { "MA_INT_CAUSE", 0x77e0, 0 }, + { "MEM_TO_INT_CAUSE", 2, 1 }, + { "MEM_PERR_INT_CAUSE", 1, 1 }, + { "MEM_WRAP_INT_CAUSE", 0, 1 }, + { "MA_INT_WRAP_STATUS", 0x77e4, 0 }, + { "MEM_WRAP_ADDRESS", 4, 28 }, + { "MEM_WRAP_CLIENT_NUM", 0, 4 }, + { "MA_TP_THREAD1_MAPPER", 0x77e8, 0 }, + { "MA_SGE_THREAD1_MAPPER", 0x77ec, 0 }, + { "MA_PARITY_ERROR_ENABLE1", 0x77f0, 0 }, + { "ARB4_PAR_WRQUEUE_ERROR_EN", 11, 1 }, + { "ARB3_PAR_WRQUEUE_ERROR_EN", 10, 1 }, + { "ARB2_PAR_WRQUEUE_ERROR_EN", 9, 1 }, + { "ARB1_PAR_WRQUEUE_ERROR_EN", 8, 1 }, + { "ARB0_PAR_WRQUEUE_ERROR_EN", 7, 1 }, + { "ARB4_PAR_RDQUEUE_ERROR_EN", 6, 1 }, + { "ARB3_PAR_RDQUEUE_ERROR_EN", 5, 1 }, + { "ARB2_PAR_RDQUEUE_ERROR_EN", 4, 1 }, + { "ARB1_PAR_RDQUEUE_ERROR_EN", 3, 1 }, + { "ARB0_PAR_RDQUEUE_ERROR_EN", 2, 1 }, + { "TP_DMARBT_PAR_ERROR_EN", 1, 1 }, + { "LOGIC_FIFO_PAR_ERROR_EN", 0, 1 }, + { "MA_PARITY_ERROR_STATUS1", 0x77f4, 0 }, + { "ARB4_PAR_WRQUEUE_ERROR", 11, 1 }, + { "ARB3_PAR_WRQUEUE_ERROR", 10, 1 }, + { "ARB2_PAR_WRQUEUE_ERROR", 9, 1 }, + { "ARB1_PAR_WRQUEUE_ERROR", 8, 1 }, + { "ARB0_PAR_WRQUEUE_ERROR", 7, 1 }, + { "ARB4_PAR_RDQUEUE_ERROR", 6, 1 }, + { "ARB3_PAR_RDQUEUE_ERROR", 5, 1 }, + { "ARB2_PAR_RDQUEUE_ERROR", 4, 1 }, + { "ARB1_PAR_RDQUEUE_ERROR", 3, 1 }, + { "ARB0_PAR_RDQUEUE_ERROR", 2, 1 }, + { "TP_DMARBT_PAR_ERROR", 1, 1 }, + { "LOGIC_FIFO_PAR_ERROR", 0, 1 }, + { "MA_COR_ERROR_ENABLE1", 0x779c, 0 }, + { "ARB4_COR_WRQUEUE_ERROR_EN", 9, 1 }, + { "ARB3_COR_WRQUEUE_ERROR_EN", 8, 1 }, + { "ARB2_COR_WRQUEUE_ERROR_EN", 7, 1 }, + { "ARB1_COR_WRQUEUE_ERROR_EN", 6, 1 }, + { "ARB0_COR_WRQUEUE_ERROR_EN", 5, 1 }, + { "ARB4_COR_RDQUEUE_ERROR_EN", 4, 1 }, + { "ARB3_COR_RDQUEUE_ERROR_EN", 3, 1 }, + { "ARB2_COR_RDQUEUE_ERROR_EN", 2, 1 }, + { "ARB1_COR_RDQUEUE_ERROR_EN", 1, 1 }, + { "ARB0_COR_RDQUEUE_ERROR_EN", 0, 1 }, + { "MA_COR_ERROR_STATUS1", 0x77a0, 0 }, + { "ARB4_COR_WRQUEUE_ERROR", 9, 1 }, + { "ARB3_COR_WRQUEUE_ERROR", 8, 1 }, + { "ARB2_COR_WRQUEUE_ERROR", 7, 1 }, + { "ARB1_COR_WRQUEUE_ERROR", 6, 1 }, + { "ARB0_COR_WRQUEUE_ERROR", 5, 1 }, + { "ARB4_COR_RDQUEUE_ERROR", 4, 1 }, + { "ARB3_COR_RDQUEUE_ERROR", 3, 1 }, + { "ARB2_COR_RDQUEUE_ERROR", 2, 1 }, + { "ARB1_COR_RDQUEUE_ERROR", 1, 1 }, + { "ARB0_COR_RDQUEUE_ERROR", 0, 1 }, + { "MA_PARITY_ERROR_ENABLE2", 0x7800, 0 }, + { "CL14_PAR_WRQUEUE_ERROR_EN", 14, 1 }, + { "CL13_PAR_WRQUEUE_ERROR_EN", 13, 1 }, + { "CL12_PAR_WRQUEUE_ERROR_EN", 12, 1 }, + { "CL11_PAR_WRQUEUE_ERROR_EN", 11, 1 }, + { "CL10_PAR_WRQUEUE_ERROR_EN", 10, 1 }, + { "CL9_PAR_WRQUEUE_ERROR_EN", 9, 1 }, + { "CL8_PAR_WRQUEUE_ERROR_EN", 8, 1 }, + { "CL7_PAR_WRQUEUE_ERROR_EN", 7, 1 }, + { "CL6_PAR_WRQUEUE_ERROR_EN", 6, 1 }, + { "CL5_PAR_WRQUEUE_ERROR_EN", 5, 1 }, + { "CL4_PAR_WRQUEUE_ERROR_EN", 4, 1 }, + { "CL3_PAR_WRQUEUE_ERROR_EN", 3, 1 }, + { "CL2_PAR_WRQUEUE_ERROR_EN", 2, 1 }, + { "CL1_PAR_WRQUEUE_ERROR_EN", 1, 1 }, + { "CL0_PAR_WRQUEUE_ERROR_EN", 0, 1 }, + { "MA_PARITY_ERROR_STATUS2", 0x7804, 0 }, + { "CL14_PAR_WRQUEUE_ERROR", 14, 1 }, + { "CL13_PAR_WRQUEUE_ERROR", 13, 1 }, + { "CL12_PAR_WRQUEUE_ERROR", 12, 1 }, + { "CL11_PAR_WRQUEUE_ERROR", 11, 1 }, + { "CL10_PAR_WRQUEUE_ERROR", 10, 1 }, + { "CL9_PAR_WRQUEUE_ERROR", 9, 1 }, + { "CL8_PAR_WRQUEUE_ERROR", 8, 1 }, + { "CL7_PAR_WRQUEUE_ERROR", 7, 1 }, + { "CL6_PAR_WRQUEUE_ERROR", 6, 1 }, + { "CL5_PAR_WRQUEUE_ERROR", 5, 1 }, + { "CL4_PAR_WRQUEUE_ERROR", 4, 1 }, + { "CL3_PAR_WRQUEUE_ERROR", 3, 1 }, + { "CL2_PAR_WRQUEUE_ERROR", 2, 1 }, + { "CL1_PAR_WRQUEUE_ERROR", 1, 1 }, + { "CL0_PAR_WRQUEUE_ERROR", 0, 1 }, + { "MA_PARITY_ERROR_ENABLE3", 0x7884, 0 }, + { "CL14_PAR_RDQUEUE_ERROR_EN", 14, 1 }, + { "CL13_PAR_RDQUEUE_ERROR_EN", 13, 1 }, + { "CL12_PAR_RDQUEUE_ERROR_EN", 12, 1 }, + { "CL11_PAR_RDQUEUE_ERROR_EN", 11, 1 }, + { "CL10_PAR_RDQUEUE_ERROR_EN", 10, 1 }, + { "CL9_PAR_RDQUEUE_ERROR_EN", 9, 1 }, + { "CL8_PAR_RDQUEUE_ERROR_EN", 8, 1 }, + { "CL7_PAR_RDQUEUE_ERROR_EN", 7, 1 }, + { "CL6_PAR_RDQUEUE_ERROR_EN", 6, 1 }, + { "CL5_PAR_RDQUEUE_ERROR_EN", 5, 1 }, + { "CL4_PAR_RDQUEUE_ERROR_EN", 4, 1 }, + { "CL3_PAR_RDQUEUE_ERROR_EN", 3, 1 }, + { "CL2_PAR_RDQUEUE_ERROR_EN", 2, 1 }, + { "CL1_PAR_RDQUEUE_ERROR_EN", 1, 1 }, + { "CL0_PAR_RDQUEUE_ERROR_EN", 0, 1 }, + { "MA_PARITY_ERROR_STATUS3", 0x7888, 0 }, + { "CL14_PAR_RDQUEUE_ERROR", 14, 1 }, + { "CL13_PAR_RDQUEUE_ERROR", 13, 1 }, + { "CL12_PAR_RDQUEUE_ERROR", 12, 1 }, + { "CL11_PAR_RDQUEUE_ERROR", 11, 1 }, + { "CL10_PAR_RDQUEUE_ERROR", 10, 1 }, + { "CL9_PAR_RDQUEUE_ERROR", 9, 1 }, + { "CL8_PAR_RDQUEUE_ERROR", 8, 1 }, + { "CL7_PAR_RDQUEUE_ERROR", 7, 1 }, + { "CL6_PAR_RDQUEUE_ERROR", 6, 1 }, + { "CL5_PAR_RDQUEUE_ERROR", 5, 1 }, + { "CL4_PAR_RDQUEUE_ERROR", 4, 1 }, + { "CL3_PAR_RDQUEUE_ERROR", 3, 1 }, + { "CL2_PAR_RDQUEUE_ERROR", 2, 1 }, + { "CL1_PAR_RDQUEUE_ERROR", 1, 1 }, + { "CL0_PAR_RDQUEUE_ERROR", 0, 1 }, + { "MA_COR_ERROR_ENABLE2", 0x77b0, 0 }, + { "CL14_COR_WRQUEUE_ERROR_EN", 14, 1 }, + { "CL13_COR_WRQUEUE_ERROR_EN", 13, 1 }, + { "CL12_COR_WRQUEUE_ERROR_EN", 12, 1 }, + { "CL11_COR_WRQUEUE_ERROR_EN", 11, 1 }, + { "CL10_COR_WRQUEUE_ERROR_EN", 10, 1 }, + { "CL9_COR_WRQUEUE_ERROR_EN", 9, 1 }, + { "CL8_COR_WRQUEUE_ERROR_EN", 8, 1 }, + { "CL7_COR_WRQUEUE_ERROR_EN", 7, 1 }, + { "CL6_COR_WRQUEUE_ERROR_EN", 6, 1 }, + { "CL5_COR_WRQUEUE_ERROR_EN", 5, 1 }, + { "CL4_COR_WRQUEUE_ERROR_EN", 4, 1 }, + { "CL3_COR_WRQUEUE_ERROR_EN", 3, 1 }, + { "CL2_COR_WRQUEUE_ERROR_EN", 2, 1 }, + { "CL1_COR_WRQUEUE_ERROR_EN", 1, 1 }, + { "CL0_COR_WRQUEUE_ERROR_EN", 0, 1 }, + { "MA_COR_ERROR_STATUS2", 0x77b4, 0 }, + { "CL14_COR_WRQUEUE_ERROR", 14, 1 }, + { "CL13_COR_WRQUEUE_ERROR", 13, 1 }, + { "CL12_COR_WRQUEUE_ERROR", 12, 1 }, + { "CL11_COR_WRQUEUE_ERROR", 11, 1 }, + { "CL10_COR_WRQUEUE_ERROR", 10, 1 }, + { "CL9_COR_WRQUEUE_ERROR", 9, 1 }, + { "CL8_COR_WRQUEUE_ERROR", 8, 1 }, + { "CL7_COR_WRQUEUE_ERROR", 7, 1 }, + { "CL6_COR_WRQUEUE_ERROR", 6, 1 }, + { "CL5_COR_WRQUEUE_ERROR", 5, 1 }, + { "CL4_COR_WRQUEUE_ERROR", 4, 1 }, + { "CL3_COR_WRQUEUE_ERROR", 3, 1 }, + { "CL2_COR_WRQUEUE_ERROR", 2, 1 }, + { "CL1_COR_WRQUEUE_ERROR", 1, 1 }, + { "CL0_COR_WRQUEUE_ERROR", 0, 1 }, + { "MA_COR_ERROR_ENABLE3", 0x77b8, 0 }, + { "CL14_COR_RDQUEUE_ERROR_EN", 14, 1 }, + { "CL13_COR_RDQUEUE_ERROR_EN", 13, 1 }, + { "CL12_COR_RDQUEUE_ERROR_EN", 12, 1 }, + { "CL11_COR_RDQUEUE_ERROR_EN", 11, 1 }, + { "CL10_COR_RDQUEUE_ERROR_EN", 10, 1 }, + { "CL9_COR_RDQUEUE_ERROR_EN", 9, 1 }, + { "CL8_COR_RDQUEUE_ERROR_EN", 8, 1 }, + { "CL7_COR_RDQUEUE_ERROR_EN", 7, 1 }, + { "CL6_COR_RDQUEUE_ERROR_EN", 6, 1 }, + { "CL5_COR_RDQUEUE_ERROR_EN", 5, 1 }, + { "CL4_COR_RDQUEUE_ERROR_EN", 4, 1 }, + { "CL3_COR_RDQUEUE_ERROR_EN", 3, 1 }, + { "CL2_COR_RDQUEUE_ERROR_EN", 2, 1 }, + { "CL1_COR_RDQUEUE_ERROR_EN", 1, 1 }, + { "CL0_COR_RDQUEUE_ERROR_EN", 0, 1 }, + { "MA_COR_ERROR_STATUS3", 0x77bc, 0 }, + { "CL14_COR_RDQUEUE_ERROR", 14, 1 }, + { "CL13_COR_RDQUEUE_ERROR", 13, 1 }, + { "CL12_COR_RDQUEUE_ERROR", 12, 1 }, + { "CL11_COR_RDQUEUE_ERROR", 11, 1 }, + { "CL10_COR_RDQUEUE_ERROR", 10, 1 }, + { "CL9_COR_RDQUEUE_ERROR", 9, 1 }, + { "CL8_COR_RDQUEUE_ERROR", 8, 1 }, + { "CL7_COR_RDQUEUE_ERROR", 7, 1 }, + { "CL6_COR_RDQUEUE_ERROR", 6, 1 }, + { "CL5_COR_RDQUEUE_ERROR", 5, 1 }, + { "CL4_COR_RDQUEUE_ERROR", 4, 1 }, + { "CL3_COR_RDQUEUE_ERROR", 3, 1 }, + { "CL2_COR_RDQUEUE_ERROR", 2, 1 }, + { "CL1_COR_RDQUEUE_ERROR", 1, 1 }, + { "CL0_COR_RDQUEUE_ERROR", 0, 1 }, + { "MA_SGE_PCIE_COHERANCY_CTRL", 0x77f8, 0 }, + { "BONUS_REG", 6, 26 }, + { "COHERANCY_CMD_TYPE", 4, 2 }, + { "COHERANCY_THREAD_NUM", 1, 3 }, + { "COHERANCY_ENABLE", 0, 1 }, + { "MA_ERROR_ENABLE", 0x77fc, 0 }, + { "FUTURE_EXPANSION_EE", 1, 31 }, + { "UE_ENABLE", 0, 1 }, + { "MA_EXT_MEMORY1_BAR", 0x7808, 0 }, + { "EXT_MEM1_BASE", 16, 16 }, + { "EXT_MEM1_SIZE", 0, 16 }, + { "MA_PMTX_THROTTLE", 0x780c, 0 }, + { "FL_ENABLE", 31, 1 }, + { "FL_LIMIT", 0, 8 }, + { "MA_PMRX_THROTTLE", 0x7810, 0 }, + { "FL_ENABLE", 31, 1 }, + { "FL_LIMIT", 0, 8 }, + { "MA_SGE_TH0_WRDATA_CNT", 0x7814, 0 }, + { "MA_SGE_TH1_WRDATA_CNT", 0x7818, 0 }, + { "MA_ULPTX_WRDATA_CNT", 0x781c, 0 }, + { "MA_ULPRX_WRDATA_CNT", 0x7820, 0 }, + { "MA_ULPTXRX_WRDATA_CNT", 0x7824, 0 }, + { "MA_TP_TH0_WRDATA_CNT", 0x7828, 0 }, + { "MA_TP_TH1_WRDATA_CNT", 0x782c, 0 }, + { "MA_LE_WRDATA_CNT", 0x7830, 0 }, + { "MA_CIM_TH0_WRDATA_CNT", 0x7834, 0 }, + { "MA_PCIE_WRDATA_CNT", 0x7838, 0 }, + { "MA_PMTX_WRDATA_CNT", 0x783c, 0 }, + { "MA_PMRX_WRDATA_CNT", 0x7840, 0 }, + { "MA_HMA_WRDATA_CNT", 0x7844, 0 }, + { "MA_SGE_TH0_RDDATA_CNT", 0x7848, 0 }, + { "MA_SGE_TH1_RDDATA_CNT", 0x784c, 0 }, + { "MA_ULPTX_RDDATA_CNT", 0x7850, 0 }, + { "MA_ULPRX_RDDATA_CNT", 0x7854, 0 }, + { "MA_ULPTXRX_RDDATA_CNT", 0x7858, 0 }, + { "MA_TP_TH0_RDDATA_CNT", 0x785c, 0 }, + { "MA_TP_TH1_RDDATA_CNT", 0x7860, 0 }, + { "MA_LE_RDDATA_CNT", 0x7864, 0 }, + { "MA_CIM_TH0_RDDATA_CNT", 0x7868, 0 }, + { "MA_PCIE_RDDATA_CNT", 0x786c, 0 }, + { "MA_PMTX_RDDATA_CNT", 0x7870, 0 }, + { "MA_PMRX_RDDATA_CNT", 0x7874, 0 }, + { "MA_HMA_RDDATA_CNT", 0x7878, 0 }, + { "MA_EXIT_ADDR_FAULT", 0x787c, 0 }, + { "MA_DDR_DEVICE_CFG", 0x7880, 0 }, + { "MEM_WIDTH", 1, 3 }, + { "DDR_MODE", 0, 1 }, + { "MA_TIMEOUT_CFG", 0x78cc, 0 }, + { "CLR", 31, 1 }, + { "CNT_LOCK", 30, 1 }, + { "WRN", 24, 1 }, + { "DIR", 23, 1 }, + { "TYPE", 22, 1 }, + { "CLIENT", 16, 4 }, + { "DELAY", 0, 16 }, + { "MA_TIMEOUT_CNT", 0x78d0, 0 }, + { "DIR", 23, 1 }, + { "TYPE", 22, 1 }, + { "CLIENT", 16, 4 }, + { "CNT_VAL", 0, 16 }, + { "MA_WRITE_TIMEOUT_ERROR_ENABLE", 0x78d4, 0 }, + { "FUTURE_CEXPANSION_WTE", 31, 1 }, + { "CL14_WR_CMD_TO_EN", 30, 1 }, + { "CL13_WR_CMD_TO_EN", 29, 1 }, + { "CL12_WR_CMD_TO_EN", 28, 1 }, + { "CL11_WR_CMD_TO_EN", 27, 1 }, + { "CL10_WR_CMD_TO_EN", 26, 1 }, + { "CL9_WR_CMD_TO_EN", 25, 1 }, + { "CL8_WR_CMD_TO_EN", 24, 1 }, + { "CL7_WR_CMD_TO_EN", 23, 1 }, + { "CL6_WR_CMD_TO_EN", 22, 1 }, + { "CL5_WR_CMD_TO_EN", 21, 1 }, + { "CL4_WR_CMD_TO_EN", 20, 1 }, + { "CL3_WR_CMD_TO_EN", 19, 1 }, + { "CL2_WR_CMD_TO_EN", 18, 1 }, + { "CL1_WR_CMD_TO_EN", 17, 1 }, + { "CL0_WR_CMD_TO_EN", 16, 1 }, + { "FUTURE_DEXPANSION_WTE", 15, 1 }, + { "CL14_WR_DATA_TO_EN", 14, 1 }, + { "CL13_WR_DATA_TO_EN", 13, 1 }, + { "CL12_WR_DATA_TO_EN", 12, 1 }, + { "CL11_WR_DATA_TO_EN", 11, 1 }, + { "CL10_WR_DATA_TO_EN", 10, 1 }, + { "CL9_WR_DATA_TO_EN", 9, 1 }, + { "CL8_WR_DATA_TO_EN", 8, 1 }, + { "CL7_WR_DATA_TO_EN", 7, 1 }, + { "CL6_WR_DATA_TO_EN", 6, 1 }, + { "CL5_WR_DATA_TO_EN", 5, 1 }, + { "CL4_WR_DATA_TO_EN", 4, 1 }, + { "CL3_WR_DATA_TO_EN", 3, 1 }, + { "CL2_WR_DATA_TO_EN", 2, 1 }, + { "CL1_WR_DATA_TO_EN", 1, 1 }, + { "CL0_WR_DATA_TO_EN", 0, 1 }, + { "MA_WRITE_TIMEOUT_ERROR_STATUS", 0x78d8, 0 }, + { "FUTURE_CEXPANSION_WTS", 31, 1 }, + { "CL14_WR_CMD_TO_ERROR", 30, 1 }, + { "CL13_WR_CMD_TO_ERROR", 29, 1 }, + { "CL12_WR_CMD_TO_ERROR", 28, 1 }, + { "CL11_WR_CMD_TO_ERROR", 27, 1 }, + { "CL10_WR_CMD_TO_ERROR", 26, 1 }, + { "CL9_WR_CMD_TO_ERROR", 25, 1 }, + { "CL8_WR_CMD_TO_ERROR", 24, 1 }, + { "CL7_WR_CMD_TO_ERROR", 23, 1 }, + { "CL6_WR_CMD_TO_ERROR", 22, 1 }, + { "CL5_WR_CMD_TO_ERROR", 21, 1 }, + { "CL4_WR_CMD_TO_ERROR", 20, 1 }, + { "CL3_WR_CMD_TO_ERROR", 19, 1 }, + { "CL2_WR_CMD_TO_ERROR", 18, 1 }, + { "CL1_WR_CMD_TO_ERROR", 17, 1 }, + { "CL0_WR_CMD_TO_ERROR", 16, 1 }, + { "FUTURE_DEXPANSION_WTS", 15, 1 }, + { "CL14_WR_DATA_TO_ERROR", 14, 1 }, + { "CL13_WR_DATA_TO_ERROR", 13, 1 }, + { "CL12_WR_DATA_TO_ERROR", 12, 1 }, + { "CL11_WR_DATA_TO_ERROR", 11, 1 }, + { "CL10_WR_DATA_TO_ERROR", 10, 1 }, + { "CL9_WR_DATA_TO_ERROR", 9, 1 }, + { "CL8_WR_DATA_TO_ERROR", 8, 1 }, + { "CL7_WR_DATA_TO_ERROR", 7, 1 }, + { "CL6_WR_DATA_TO_ERROR", 6, 1 }, + { "CL5_WR_DATA_TO_ERROR", 5, 1 }, + { "CL4_WR_DATA_TO_ERROR", 4, 1 }, + { "CL3_WR_DATA_TO_ERROR", 3, 1 }, + { "CL2_WR_DATA_TO_ERROR", 2, 1 }, + { "CL1_WR_DATA_TO_ERROR", 1, 1 }, + { "CL0_WR_DATA_TO_ERROR", 0, 1 }, + { "MA_READ_TIMEOUT_ERROR_ENABLE", 0x78dc, 0 }, + { "FUTURE_CEXPANSION_RTE", 31, 1 }, + { "CL14_RD_CMD_TO_EN", 30, 1 }, + { "CL13_RD_CMD_TO_EN", 29, 1 }, + { "CL12_RD_CMD_TO_EN", 28, 1 }, + { "CL11_RD_CMD_TO_EN", 27, 1 }, + { "CL10_RD_CMD_TO_EN", 26, 1 }, + { "CL9_RD_CMD_TO_EN", 25, 1 }, + { "CL8_RD_CMD_TO_EN", 24, 1 }, + { "CL7_RD_CMD_TO_EN", 23, 1 }, + { "CL6_RD_CMD_TO_EN", 22, 1 }, + { "CL5_RD_CMD_TO_EN", 21, 1 }, + { "CL4_RD_CMD_TO_EN", 20, 1 }, + { "CL3_RD_CMD_TO_EN", 19, 1 }, + { "CL2_RD_CMD_TO_EN", 18, 1 }, + { "CL1_RD_CMD_TO_EN", 17, 1 }, + { "CL0_RD_CMD_TO_EN", 16, 1 }, + { "FUTURE_DEXPANSION_RTE", 15, 1 }, + { "CL14_RD_DATA_TO_EN", 14, 1 }, + { "CL13_RD_DATA_TO_EN", 13, 1 }, + { "CL12_RD_DATA_TO_EN", 12, 1 }, + { "CL11_RD_DATA_TO_EN", 11, 1 }, + { "CL10_RD_DATA_TO_EN", 10, 1 }, + { "CL9_RD_DATA_TO_EN", 9, 1 }, + { "CL8_RD_DATA_TO_EN", 8, 1 }, + { "CL7_RD_DATA_TO_EN", 7, 1 }, + { "CL6_RD_DATA_TO_EN", 6, 1 }, + { "CL5_RD_DATA_TO_EN", 5, 1 }, + { "CL4_RD_DATA_TO_EN", 4, 1 }, + { "CL3_RD_DATA_TO_EN", 3, 1 }, + { "CL2_RD_DATA_TO_EN", 2, 1 }, + { "CL1_RD_DATA_TO_EN", 1, 1 }, + { "CL0_RD_DATA_TO_EN", 0, 1 }, + { "MA_READ_TIMEOUT_ERROR_STATUS", 0x78e0, 0 }, + { "FUTURE_CEXPANSION_RTS", 31, 1 }, + { "CL14_RD_CMD_TO_ERROR", 30, 1 }, + { "CL13_RD_CMD_TO_ERROR", 29, 1 }, + { "CL12_RD_CMD_TO_ERROR", 28, 1 }, + { "CL11_RD_CMD_TO_ERROR", 27, 1 }, + { "CL10_RD_CMD_TO_ERROR", 26, 1 }, + { "CL9_RD_CMD_TO_ERROR", 25, 1 }, + { "CL8_RD_CMD_TO_ERROR", 24, 1 }, + { "CL7_RD_CMD_TO_ERROR", 23, 1 }, + { "CL6_RD_CMD_TO_ERROR", 22, 1 }, + { "CL5_RD_CMD_TO_ERROR", 21, 1 }, + { "CL4_RD_CMD_TO_ERROR", 20, 1 }, + { "CL3_RD_CMD_TO_ERROR", 19, 1 }, + { "CL2_RD_CMD_TO_ERROR", 18, 1 }, + { "CL1_RD_CMD_TO_ERROR", 17, 1 }, + { "CL0_RD_CMD_TO_ERROR", 16, 1 }, + { "FUTURE_DEXPANSION_RTS", 14, 2 }, + { "CL13_RD_DATA_TO_ERROR", 13, 1 }, + { "CL12_RD_DATA_TO_ERROR", 12, 1 }, + { "CL11_RD_DATA_TO_ERROR", 11, 1 }, + { "CL10_RD_DATA_TO_ERROR", 10, 1 }, + { "CL9_RD_DATA_TO_ERROR", 9, 1 }, + { "CL8_RD_DATA_TO_ERROR", 8, 1 }, + { "CL7_RD_DATA_TO_ERROR", 7, 1 }, + { "CL6_RD_DATA_TO_ERROR", 6, 1 }, + { "CL5_RD_DATA_TO_ERROR", 5, 1 }, + { "CL4_RD_DATA_TO_ERROR", 4, 1 }, + { "CL3_RD_DATA_TO_ERROR", 3, 1 }, + { "CL2_RD_DATA_TO_ERROR", 2, 1 }, + { "CL1_RD_DATA_TO_ERROR", 1, 1 }, + { "CL0_RD_DATA_TO_ERROR", 0, 1 }, + { "MA_BKP_CNT_SEL", 0x78e4, 0 }, + { "TYPE", 30, 2 }, + { "CLIENT", 24, 4 }, + { "MA_BKP_CNT", 0x78e8, 0 }, + { "MA_WRT_ARB", 0x78ec, 0 }, + { "WRT_EN", 31, 1 }, + { "WR_TIM", 16, 8 }, + { "RD_WIN", 8, 8 }, + { "WR_WIN", 0, 8 }, + { "MA_IF_PARITY_ERROR_ENABLE", 0x78f0, 0 }, + { "FUTURE_DEXPANSION_IPE", 14, 18 }, + { "CL13_IF_PAR_EN", 13, 1 }, + { "CL12_IF_PAR_EN", 12, 1 }, + { "CL11_IF_PAR_EN", 11, 1 }, + { "CL10_IF_PAR_EN", 10, 1 }, + { "CL9_IF_PAR_EN", 9, 1 }, + { "CL8_IF_PAR_EN", 8, 1 }, + { "CL7_IF_PAR_EN", 7, 1 }, + { "CL6_IF_PAR_EN", 6, 1 }, + { "CL5_IF_PAR_EN", 5, 1 }, + { "CL4_IF_PAR_EN", 4, 1 }, + { "CL3_IF_PAR_EN", 3, 1 }, + { "CL2_IF_PAR_EN", 2, 1 }, + { "CL1_IF_PAR_EN", 1, 1 }, + { "CL0_IF_PAR_EN", 0, 1 }, + { "MA_IF_PARITY_ERROR_STATUS", 0x78f4, 0 }, + { "FUTURE_DEXPANSION_IPS", 14, 18 }, + { "CL13_IF_PAR_ERROR", 13, 1 }, + { "CL12_IF_PAR_ERROR", 12, 1 }, + { "CL11_IF_PAR_ERROR", 11, 1 }, + { "CL10_IF_PAR_ERROR", 10, 1 }, + { "CL9_IF_PAR_ERROR", 9, 1 }, + { "CL8_IF_PAR_ERROR", 8, 1 }, + { "CL7_IF_PAR_ERROR", 7, 1 }, + { "CL6_IF_PAR_ERROR", 6, 1 }, + { "CL5_IF_PAR_ERROR", 5, 1 }, + { "CL4_IF_PAR_ERROR", 4, 1 }, + { "CL3_IF_PAR_ERROR", 3, 1 }, + { "CL2_IF_PAR_ERROR", 2, 1 }, + { "CL1_IF_PAR_ERROR", 1, 1 }, + { "CL0_IF_PAR_ERROR", 0, 1 }, + { "MA_LOCAL_DEBUG_CFG", 0x78f8, 0 }, + { "DEBUG_OR", 15, 1 }, + { "DEBUG_HI", 14, 1 }, + { "DEBUG_RPT", 13, 1 }, + { "DEBUGPAGE", 10, 3 }, + { "DEBUGSELH", 5, 5 }, + { "DEBUGSELL", 0, 5 }, + { "MA_LOCAL_DEBUG_RPT", 0x78fc, 0 }, + { "MA_DBG_CTL", 0x77a4, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG", 16, 1 }, + { "SEL", 0, 8 }, + { "MA_DBG_DATA", 0x77a8, 0 }, + { "MA_CLIENT13_PR_THRESHOLD", 0x7900, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT13_CR_THRESHOLD", 0x7904, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CRYPTO_DEBUG_CNT", 0x7908, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_CRYPTO_WRDATA_CNT", 0x790c, 0 }, + { "MA_CRYPTO_RDDATA_CNT", 0x7910, 0 }, + { "MA_LOCAL_DEBUG_PERF_CFG", 0x7914, 0 }, + { "DEBUG_OR", 15, 1 }, + { "DEBUG_HI", 14, 1 }, + { "DEBUG_RPT", 13, 1 }, + { "DEBUGPAGE", 10, 3 }, + { "DEBUGSELH", 5, 5 }, + { "DEBUGSELL", 0, 5 }, + { "MA_LOCAL_DEBUG_PERF_RPT", 0x7918, 0 }, + { "MA_PCIE_THROTTLE", 0x791c, 0 }, + { "FL_ENABLE", 31, 1 }, + { "FL_LIMIT", 0, 8 }, + { "MA_CLIENT14_PR_THRESHOLD", 0x7920, 0 }, + { "THRESHOLD1_EN", 31, 1 }, + { "THRESHOLD1", 16, 15 }, + { "THRESHOLD0_EN", 15, 1 }, + { "THRESHOLD0", 0, 15 }, + { "MA_CLIENT14_CR_THRESHOLD", 0x7924, 0 }, + { "CREDITSHAPER_EN", 31, 1 }, + { "CREDIT_MAX", 16, 12 }, + { "CREDIT_VAL", 0, 12 }, + { "MA_CIM_TH1_DEBUG_CNT", 0x7928, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_CIM_TH1_WRDATA_CNT", 0x792c, 0 }, + { "MA_CIM_TH1_RDDATA_CNT", 0x7930, 0 }, + { "MA_CIM_THREAD1_MAPPER", 0x7934, 0 }, + { "MA_PIO_CI_SGE_TH0_BASE", 0x7938, 0 }, + { "MA_PIO_CI_SGE_TH1_BASE", 0x793c, 0 }, + { "MA_PIO_CI_ULPTX_BASE", 0x7940, 0 }, + { "MA_PIO_CI_ULPRX_BASE", 0x7944, 0 }, + { "MA_PIO_CI_ULPTXRX_BASE", 0x7948, 0 }, + { "MA_PIO_CI_TP_TH0_BASE", 0x794c, 0 }, + { "MA_PIO_CI_TP_TH1_BASE", 0x7950, 0 }, + { "MA_PIO_CI_LE_BASE", 0x7954, 0 }, + { "MA_PIO_CI_CIM_TH0_BASE", 0x7958, 0 }, + { "MA_PIO_CI_PCIE_BASE", 0x795c, 0 }, + { "MA_PIO_CI_PMTX_BASE", 0x7960, 0 }, + { "MA_PIO_CI_PMRX_BASE", 0x7964, 0 }, + { "MA_PIO_CI_HMA_BASE", 0x7968, 0 }, + { "MA_PIO_CI_CRYPTO_BASE", 0x796c, 0 }, + { "MA_PIO_CI_CIM_TH1_BASE", 0x7970, 0 }, + { NULL } +}; + +struct reg_info t7_cim_regs[] = { + { "CIM_BOOT_CFG", 0x7b00, 0 }, + { "BootAddr", 8, 24 }, + { "uPGen", 2, 6 }, + { "BootSdram", 1, 1 }, + { "uPCRst", 0, 1 }, + { "CIM_BOOT_LEN", 0x7bf0, 0 }, + { "BootLen", 4, 28 }, + { "CIM_PERR_ENABLE", 0x7b08, 0 }, + { "ma_cim_IntfPerr", 31, 1 }, + { "MBHostParErr", 30, 1 }, + { "MaArbInvRspTag", 29, 1 }, + { "MaArbFIFOParErr", 28, 1 }, + { "SemSramParErr", 27, 1 }, + { "RSACParErr", 26, 1 }, + { "RSADParErr", 25, 1 }, + { "PLCIM_MstRspDataParErr", 24, 1 }, + { "PCIE2CIMIntfParErr", 23, 1 }, + { "NCSI2CIMIntfParErr", 22, 1 }, + { "SGE2CIMIntfParErr", 21, 1 }, + { "ULP2CIMIntfParErr", 20, 1 }, + { "TP2CIMIntfParErr", 19, 1 }, + { "Core7ParErr", 18, 1 }, + { "Core6ParErr", 17, 1 }, + { "Core5ParErr", 16, 1 }, + { "Core4ParErr", 15, 1 }, + { "Core3ParErr", 14, 1 }, + { "Core2ParErr", 13, 1 }, + { "Core1ParErr", 12, 1 }, + { "GftParErr", 10, 1 }, + { "MPSRspDataParErr", 9, 1 }, + { "ER_RspDataParErr", 8, 1 }, + { "FlowFIFOParErr", 7, 1 }, + { "ObqSramParErr", 6, 1 }, + { "TieQOutParErr", 3, 1 }, + { "TieQInParErr", 2, 1 }, + { "PifRspParErr", 1, 1 }, + { "PifReqParErr", 0, 1 }, + { "CIM_PERR_CAUSE", 0x7b0c, 0 }, + { "ma_cim_IntfPerr", 31, 1 }, + { "MBHostParErr", 30, 1 }, + { "MaArbInvRspTag", 29, 1 }, + { "MaArbFIFOParErr", 28, 1 }, + { "SemSramParErr", 27, 1 }, + { "RSACParErr", 26, 1 }, + { "RSADParErr", 25, 1 }, + { "PLCIM_MstRspDataParErr", 24, 1 }, + { "PCIE2CIMIntfParErr", 23, 1 }, + { "NCSI2CIMIntfParErr", 22, 1 }, + { "SGE2CIMIntfParErr", 21, 1 }, + { "ULP2CIMIntfParErr", 20, 1 }, + { "TP2CIMIntfParErr", 19, 1 }, + { "Core7ParErr", 18, 1 }, + { "Core6ParErr", 17, 1 }, + { "Core5ParErr", 16, 1 }, + { "Core4ParErr", 15, 1 }, + { "Core3ParErr", 14, 1 }, + { "Core2ParErr", 13, 1 }, + { "Core1ParErr", 12, 1 }, + { "GftParErr", 10, 1 }, + { "MPSRspDataParErr", 9, 1 }, + { "ER_RspDataParErr", 8, 1 }, + { "FlowFIFOParErr", 7, 1 }, + { "ObqSramParErr", 6, 1 }, + { "TieQOutParErr", 3, 1 }, + { "TieQInParErr", 2, 1 }, + { "PifRspParErr", 1, 1 }, + { "PifReqParErr", 0, 1 }, + { "CIM_UP_SPARE_INT", 0x7b24, 0 }, + { "TDebugInt", 4, 1 }, + { "BootVecSel", 3, 1 }, + { "uPSpareInt", 0, 3 }, + { "CIM_HOST_INT_ENABLE", 0x7b28, 0 }, + { "Core7AccInt", 22, 1 }, + { "Core6AccInt", 21, 1 }, + { "Core5AccInt", 20, 1 }, + { "Core4AccInt", 19, 1 }, + { "Core3AccInt", 18, 1 }, + { "Core2AccInt", 17, 1 }, + { "Core1AccInt", 16, 1 }, + { "Timer1IntEn", 3, 1 }, + { "Timer0IntEn", 2, 1 }, + { "PErrNonZero", 1, 1 }, + { "CIM_HOST_INT_CAUSE", 0x7b2c, 0 }, + { "Core7AccInt", 22, 1 }, + { "Core6AccInt", 21, 1 }, + { "Core5AccInt", 20, 1 }, + { "Core4AccInt", 19, 1 }, + { "Core3AccInt", 18, 1 }, + { "Core2AccInt", 17, 1 }, + { "Core1AccInt", 16, 1 }, + { "Timer1Int", 3, 1 }, + { "Timer0Int", 2, 1 }, + { "PErrNonZero", 1, 1 }, + { "uPAccNonZero", 0, 1 }, + { "CIM_HOST_UPACC_INT_ENABLE", 0x7b30, 0 }, + { "ConWrErrIntEn", 31, 1 }, + { "EEPROMWRIntEn", 30, 1 }, + { "TimeOutMAIntEn", 29, 1 }, + { "TimeOutIntEn", 28, 1 }, + { "RspOvrLookupIntEn", 27, 1 }, + { "ReqOvrLookupIntEn", 26, 1 }, + { "BlkWrPlIntEn", 25, 1 }, + { "BlkRdPlIntEn", 24, 1 }, + { "SglWrPlIntEn", 23, 1 }, + { "SglRdPlIntEn", 22, 1 }, + { "BlkWrCtlIntEn", 21, 1 }, + { "BlkRdCtlIntEn", 20, 1 }, + { "SglWrCtlIntEn", 19, 1 }, + { "SglRdCtlIntEn", 18, 1 }, + { "BlkWrEEPROMIntEn", 17, 1 }, + { "BlkRdEEPROMIntEn", 16, 1 }, + { "SglWrEEPROMIntEn", 15, 1 }, + { "SglRdEEPROMIntEn", 14, 1 }, + { "BlkWrFlashIntEn", 13, 1 }, + { "BlkRdFlashIntEn", 12, 1 }, + { "SglWrFlashIntEn", 11, 1 }, + { "SglRdFlashIntEn", 10, 1 }, + { "BlkWrBootIntEn", 9, 1 }, + { "BlkRdBootIntEn", 8, 1 }, + { "SglWrBootIntEn", 7, 1 }, + { "SglRdBootIntEn", 6, 1 }, + { "IllWrBEIntEn", 5, 1 }, + { "IllRdBEIntEn", 4, 1 }, + { "IllRdIntEn", 3, 1 }, + { "IllWrIntEn", 2, 1 }, + { "IllTransIntEn", 1, 1 }, + { "RsvdSpaceIntEn", 0, 1 }, + { "CIM_HOST_UPACC_INT_CAUSE", 0x7b34, 0 }, + { "ConWrErrInt", 31, 1 }, + { "EEPROMWRInt", 30, 1 }, + { "TimeOutMAInt", 29, 1 }, + { "TimeOutInt", 28, 1 }, + { "RspOvrLookupInt", 27, 1 }, + { "ReqOvrLookupInt", 26, 1 }, + { "BlkWrPlInt", 25, 1 }, + { "BlkRdPlInt", 24, 1 }, + { "SglWrPlInt", 23, 1 }, + { "SglRdPlInt", 22, 1 }, + { "BlkWrCtlInt", 21, 1 }, + { "BlkRdCtlInt", 20, 1 }, + { "SglWrCtlInt", 19, 1 }, + { "SglRdCtlInt", 18, 1 }, + { "BlkWrEEPROMInt", 17, 1 }, + { "BlkRdEEPROMInt", 16, 1 }, + { "SglWrEEPROMInt", 15, 1 }, + { "SglRdEEPROMInt", 14, 1 }, + { "BlkWrFlashInt", 13, 1 }, + { "BlkRdFlashInt", 12, 1 }, + { "SglWrFlashInt", 11, 1 }, + { "SglRdFlashInt", 10, 1 }, + { "BlkWrBootInt", 9, 1 }, + { "BlkRdBootInt", 8, 1 }, + { "SglWrBootInt", 7, 1 }, + { "SglRdBootInt", 6, 1 }, + { "IllWrBEInt", 5, 1 }, + { "IllRdBEInt", 4, 1 }, + { "IllRdInt", 3, 1 }, + { "IllWrInt", 2, 1 }, + { "IllTransInt", 1, 1 }, + { "RsvdSpaceInt", 0, 1 }, + { "CIM_UP_INT_ENABLE", 0x7b38, 0 }, + { "Core7AccInt", 22, 1 }, + { "Core6AccInt", 21, 1 }, + { "Core5AccInt", 20, 1 }, + { "Core4AccInt", 19, 1 }, + { "Core3AccInt", 18, 1 }, + { "Core2AccInt", 17, 1 }, + { "Core1AccInt", 16, 1 }, + { "SemInt", 8, 1 }, + { "RSAInt", 7, 1 }, + { "TrngInt", 6, 1 }, + { "PeerHaltInt", 5, 1 }, + { "MstPlIntEn", 4, 1 }, + { "Timer1IntEn", 3, 1 }, + { "Timer0IntEn", 2, 1 }, + { "PErrNonZero", 1, 1 }, + { "CIM_UP_INT_CAUSE", 0x7b3c, 0 }, + { "Core7AccInt", 22, 1 }, + { "Core6AccInt", 21, 1 }, + { "Core5AccInt", 20, 1 }, + { "Core4AccInt", 19, 1 }, + { "Core3AccInt", 18, 1 }, + { "Core2AccInt", 17, 1 }, + { "Core1AccInt", 16, 1 }, + { "SemInt", 8, 1 }, + { "RSAInt", 7, 1 }, + { "TrngInt", 6, 1 }, + { "PeerHaltInt", 5, 1 }, + { "MstPlInt", 4, 1 }, + { "Timer1Int", 3, 1 }, + { "Timer0Int", 2, 1 }, + { "PErrNonZero", 1, 1 }, + { "uPAccNonZero", 0, 1 }, + { "CIM_UP_ACC_INT_ENABLE", 0x7b40, 0 }, + { "ConWrErrInt", 31, 1 }, + { "EEPROMWRIntEn", 30, 1 }, + { "TimeOutMAIntEn", 29, 1 }, + { "TimeOutIntEn", 28, 1 }, + { "RspOvrLookupIntEn", 27, 1 }, + { "ReqOvrLookupIntEn", 26, 1 }, + { "BlkWrPlIntEn", 25, 1 }, + { "BlkRdPlIntEn", 24, 1 }, + { "SglWrPlIntEn", 23, 1 }, + { "SglRdPlIntEn", 22, 1 }, + { "BlkWrCtlIntEn", 21, 1 }, + { "BlkRdCtlIntEn", 20, 1 }, + { "SglWrCtlIntEn", 19, 1 }, + { "SglRdCtlIntEn", 18, 1 }, + { "BlkWrEEPROMIntEn", 17, 1 }, + { "BlkRdEEPROMIntEn", 16, 1 }, + { "SglWrEEPROMIntEn", 15, 1 }, + { "SglRdEEPROMIntEn", 14, 1 }, + { "BlkWrFlashIntEn", 13, 1 }, + { "BlkRdFlashIntEn", 12, 1 }, + { "SglWrFlashIntEn", 11, 1 }, + { "SglRdFlashIntEn", 10, 1 }, + { "BlkWrBootIntEn", 9, 1 }, + { "BlkRdBootIntEn", 8, 1 }, + { "SglWrBootIntEn", 7, 1 }, + { "SglRdBootIntEn", 6, 1 }, + { "IllWrBEIntEn", 5, 1 }, + { "IllRdBEIntEn", 4, 1 }, + { "IllRdIntEn", 3, 1 }, + { "IllWrIntEn", 2, 1 }, + { "IllTransIntEn", 1, 1 }, + { "RsvdSpaceIntEn", 0, 1 }, + { "CIM_UP_ACC_INT_CAUSE", 0x7b44, 0 }, + { "ConWrErrInt", 31, 1 }, + { "EEPROMWRInt", 30, 1 }, + { "TimeOutMAInt", 29, 1 }, + { "TimeOutInt", 28, 1 }, + { "RspOvrLookupInt", 27, 1 }, + { "ReqOvrLookupInt", 26, 1 }, + { "BlkWrPlInt", 25, 1 }, + { "BlkRdPlInt", 24, 1 }, + { "SglWrPlInt", 23, 1 }, + { "SglRdPlInt", 22, 1 }, + { "BlkWrCtlInt", 21, 1 }, + { "BlkRdCtlInt", 20, 1 }, + { "SglWrCtlInt", 19, 1 }, + { "SglRdCtlInt", 18, 1 }, + { "BlkWrEEPROMInt", 17, 1 }, + { "BlkRdEEPROMInt", 16, 1 }, + { "SglWrEEPROMInt", 15, 1 }, + { "SglRdEEPROMInt", 14, 1 }, + { "BlkWrFlashInt", 13, 1 }, + { "BlkRdFlashInt", 12, 1 }, + { "SglWrFlashInt", 11, 1 }, + { "SglRdFlashInt", 10, 1 }, + { "BlkWrBootInt", 9, 1 }, + { "BlkRdBootInt", 8, 1 }, + { "SglWrBootInt", 7, 1 }, + { "SglRdBootInt", 6, 1 }, + { "IllWrBEInt", 5, 1 }, + { "IllRdBEInt", 4, 1 }, + { "IllRdInt", 3, 1 }, + { "IllWrInt", 2, 1 }, + { "IllTransInt", 1, 1 }, + { "RsvdSpaceInt", 0, 1 }, + { "CIM_QUEUE_CONFIG_REF", 0x7b48, 0 }, + { "MapOffset", 11, 5 }, + { "MapSelect", 10, 1 }, + { "CoreSelect", 6, 4 }, + { "OBQSelect", 5, 1 }, + { "IBQSelect", 4, 1 }, + { "QueNumSelect", 0, 4 }, + { "CIM_QUEUE_CONFIG_CTRL", 0x7b4c, 0 }, + { "Que1KEn", 30, 1 }, + { "QueSize", 24, 6 }, + { "QueBase", 16, 6 }, + { "QueFullThrsh", 0, 9 }, + { "CIM_HOST_ACC_CTRL", 0x7b50, 0 }, + { "HostBusy", 31, 1 }, + { "HostWrite", 30, 1 }, + { "HostGrpSel", 28, 2 }, + { "HostCoreSel", 24, 4 }, + { "HostAddr", 0, 24 }, + { "CIM_HOST_ACC_DATA", 0x7b54, 0 }, + { "CIM_DEBUG_CFG", 0x7b58, 0 }, + { "OR_EN", 20, 1 }, + { "USEL", 19, 1 }, + { "HI", 18, 1 }, + { "SELH", 9, 9 }, + { "SELL", 0, 9 }, + { "CIM_DEBUG_DATA", 0x7b5c, 0 }, + { "CIM_IBQ_DBG_CFG", 0x7b60, 0 }, + { "IbqDbgCore", 28, 4 }, + { "IbqDbgAddr", 12, 13 }, + { "IbqDbgState", 4, 2 }, + { "PerrAddrClr", 3, 1 }, + { "IbqDbgBusy", 1, 1 }, + { "IbqDbgEn", 0, 1 }, + { "CIM_OBQ_DBG_CFG", 0x7b64, 0 }, + { "ObqDbgCore", 28, 4 }, + { "ObqDbgAddr", 12, 13 }, + { "ObqDbgState", 4, 2 }, + { "ObqDbgBusy", 1, 1 }, + { "ObqDbgEn", 0, 1 }, + { "CIM_IBQ_DBG_DATA", 0x7b68, 0 }, + { "CIM_OBQ_DBG_DATA", 0x7b6c, 0 }, + { "CIM_DEBUGCFG", 0x7b70, 0 }, + { "POLADbgRdPtr", 23, 9 }, + { "PILADbgRdPtr", 14, 9 }, + { "LAMaskTrig", 13, 1 }, + { "LADbgEn", 12, 1 }, + { "LAFillOnce", 11, 1 }, + { "LAMaskStop", 10, 1 }, + { "CIM_DEBUGSTS", 0x7b74, 0 }, + { "LAReset", 31, 1 }, + { "POLADbgWrPtr", 16, 9 }, + { "PILADbgWrPtr", 0, 9 }, + { "CIM_PO_LA_DEBUGDATA", 0x7b78, 0 }, + { "CIM_PI_LA_DEBUGDATA", 0x7b7c, 0 }, + { "CIM_PO_LA_MADEBUGDATA", 0x7b80, 0 }, + { "CIM_PI_LA_MADEBUGDATA", 0x7b84, 0 }, + { "CIM_PO_LA_PIFSMDEBUGDATA", 0x7b8c, 0 }, + { "CIM_MEM_ZONE0_VA", 0x7b90, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE0_BA", 0x7b94, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE0_LEN", 0x7b98, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE1_VA", 0x7b9c, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE1_BA", 0x7ba0, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE1_LEN", 0x7ba4, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE2_VA", 0x7ba8, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE2_BA", 0x7bac, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE2_LEN", 0x7bb0, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE3_VA", 0x7bb4, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE3_BA", 0x7bb8, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE3_LEN", 0x7bbc, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE4_VA", 0x7bc0, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE4_BA", 0x7bc4, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE4_LEN", 0x7bc8, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE5_VA", 0x7bcc, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE5_BA", 0x7bd0, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE5_LEN", 0x7bd4, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE6_VA", 0x7bd8, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE6_BA", 0x7bdc, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE6_LEN", 0x7be0, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE7_VA", 0x7be4, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE7_BA", 0x7be8, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "THREAD_ID", 2, 3 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE7_LEN", 0x7bec, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_GLB_TIMER_CTL", 0x7bf4, 0 }, + { "Timer1En", 4, 1 }, + { "Timer0En", 3, 1 }, + { "TimerEn", 1, 1 }, + { "CIM_GLB_TIMER", 0x7bf8, 0 }, + { "CIM_GLB_TIMER_TICK", 0x7bfc, 0 }, + { "CIM_TIMER0", 0x7c00, 0 }, + { "CIM_TIMER1", 0x7c04, 0 }, + { "CIM_DEBUG_ADDR_TIMEOUT", 0x7c08, 0 }, + { "DAddrTimeOut", 2, 30 }, + { "DAddrTimeOutType", 0, 2 }, + { "CIM_DEBUG_ADDR_ILLEGAL", 0x7c0c, 0 }, + { "DAddrIllegal", 2, 30 }, + { "DAddrIllegalType", 0, 2 }, + { "CIM_DEBUG_PIF_CAUSE_MASK", 0x7c10, 0 }, + { "CIM_DEBUG_PIF_UPACC_CAUSE_MASK", 0x7c14, 0 }, + { "CIM_DEBUG_UP_CAUSE_MASK", 0x7c18, 0 }, + { "CIM_DEBUG_UP_UPACC_CAUSE_MASK", 0x7c1c, 0 }, + { "CIM_FPGA_ROM_EFUSE_CMD", 0x7c20, 0 }, + { "CIM_FPGA_ROM_EFUSE_DATA", 0x7c24, 0 }, + { "CIM_EEPROM_BUSY_BIT", 0x7c28, 0 }, + { "CIM_MA_TIMER_EN", 0x7c2c, 0 }, + { "FlashWrPageMore", 5, 1 }, + { "FlashWrEnable", 4, 1 }, + { "FlashMoreEnable", 3, 1 }, + { "wr_resp_enable", 2, 1 }, + { "slow_timer_enable", 1, 1 }, + { "ma_timer_enable", 0, 1 }, + { "CIM_CIM_DEBUG_SPARE", 0x7c34, 0 }, + { "CIM_UP_OPERATION_FREQ", 0x7c38, 0 }, + { "CIM_CIM_IBQ_ERR_CODE", 0x7c3c, 0 }, + { "CIM_ULP_TX_PKT_ERR_CODE", 16, 8 }, + { "CIM_PCIE_PKT_ERR_CODE", 8, 8 }, + { "CIM_SGE0_PKT_ERR_CODE", 0, 8 }, + { "CIM_QUE_PERR_ADDR", 0x7c40, 0 }, + { "IbqPerrAddr", 16, 12 }, + { "ObqPerrAddr", 0, 12 }, + { "CIM_CGEN", 0x7c48, 0 }, + { "CIM_QUEUE_FEATURE_DISABLE", 0x7c4c, 0 }, + { "ulp_obq_size", 8, 2 }, + { "tp_ibq_size", 6, 2 }, + { "obq_eom_enable", 5, 1 }, + { "obq_throuttle_on_eop", 4, 1 }, + { "obq_read_ctl_perf_mode_disable", 3, 1 }, + { "obq_wait_for_eop_flush_disable", 2, 1 }, + { "ibq_rra_dsbl", 1, 1 }, + { "ibq_skid_fifo_eop_flsh_dsbl", 0, 1 }, + { "CIM_CGEN_GLOBAL", 0x7c50, 0 }, + { "CIM_DPSLP_EN", 0x7c54, 0 }, + { "CIM_GFT_CMM_CONFIG", 0x7c58, 0 }, + { "GlFl", 31, 1 }, + { "WrCntIdle", 16, 15 }, + { "RdThreshold", 8, 6 }, + { "WrThrLevel2", 7, 1 }, + { "WrThrLevel1", 6, 1 }, + { "WrThrThreshEn", 5, 1 }, + { "WrThrThresh", 0, 5 }, + { "CIM_GFT_CONFIG", 0x7c5c, 0 }, + { "GftMaBase", 16, 16 }, + { "GftHashTblSize", 12, 4 }, + { "GftTcamPriority", 11, 1 }, + { "GftMaThreadId", 8, 3 }, + { "GftTcamInit", 7, 1 }, + { "GftTcamInitDone", 6, 1 }, + { "GftTblModeEn", 0, 1 }, + { "CIM_TCAM_BIST_CTRL", 0x7c60, 0 }, + { "rst_cb", 31, 1 }, + { "cb_start", 0, 28 }, + { "CIM_TCAM_BIST_CB_PASS", 0x7c64, 0 }, + { "CIM_TCAM_BIST_CB_BUSY", 0x7c68, 0 }, + { "CIM_GFT_MASK", 0x7c70, 0 }, + { "CIM_GFT_MASK", 0x7c74, 0 }, + { "CIM_GFT_MASK", 0x7c78, 0 }, + { "CIM_GFT_MASK", 0x7c7c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e240, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e244, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e248, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e24c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e250, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e254, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e258, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e25c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e260, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e264, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e268, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e26c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e270, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e274, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e278, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e27c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1e280, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1e284, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1e288, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1e28c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e290, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1e640, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e644, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e648, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e64c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e650, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e654, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e658, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e65c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e660, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e664, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e668, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e66c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e670, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e674, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e678, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e67c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1e680, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1e684, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1e688, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1e68c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e690, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1ea80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1ea84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1ea88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1ea8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ea90, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1ee80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1ee84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1ee88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1ee8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ee90, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1f240, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f244, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f248, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f24c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f250, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f254, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f258, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f25c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f260, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f264, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f268, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f26c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f270, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f274, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f278, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f27c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1f280, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1f284, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1f288, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1f28c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f290, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1f640, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f644, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f648, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f64c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f650, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f654, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f658, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f65c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f660, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f664, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f668, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f66c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f670, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f674, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f678, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f67c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1f680, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1f684, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1f688, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1f68c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f690, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1fa80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1fa84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1fa88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1fa8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fa90, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1fe80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1fe84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1fe88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1fe8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fe90, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { NULL } +}; + +struct reg_info t7_tp_regs[] = { + { "TP_IN_CONFIG", 0x7d00, 0 }, + { "VLANExtEnPort3", 31, 1 }, + { "VLANExtEnPort2", 30, 1 }, + { "VLANExtEnPort1", 29, 1 }, + { "VLANExtEnPort0", 28, 1 }, + { "TcpOptParserDisCh3", 27, 1 }, + { "TcpOptParserDisCh2", 26, 1 }, + { "TcpOptParserDisCh1", 25, 1 }, + { "TcpOptParserDisCh0", 24, 1 }, + { "CrcPassPrt3", 23, 1 }, + { "CrcPassPrt2", 22, 1 }, + { "CrcPassPrt1", 21, 1 }, + { "CrcPassPrt0", 20, 1 }, + { "VepaMode", 19, 1 }, + { "FipUpEn", 18, 1 }, + { "FcoeUpEn", 17, 1 }, + { "FcoeEnable", 16, 1 }, + { "IPv6Enable", 15, 1 }, + { "NICMode", 14, 1 }, + { "VnTagDefaultVal", 13, 1 }, + { "ECheckUDPLen", 12, 1 }, + { "EReportUdpHdrLen", 11, 1 }, + { "FcoeFPMA", 10, 1 }, + { "VnTagEnable", 9, 1 }, + { "VnTagEthEnable", 8, 1 }, + { "CChecksumCheckIP", 7, 1 }, + { "CChecksumCheckUDP", 6, 1 }, + { "CChecksumCheckTCP", 5, 1 }, + { "CTag", 4, 1 }, + { "CXoffOverride", 3, 1 }, + { "EthUpEn", 2, 1 }, + { "EGreDropEn", 1, 1 }, + { "CFastDemuxEn", 0, 1 }, + { "TP_OUT_CONFIG", 0x7d04, 0 }, + { "PortQfcEn", 28, 4 }, + { "EPktDistChn3", 23, 1 }, + { "EPktDistChn2", 22, 1 }, + { "EPktDistChn1", 21, 1 }, + { "EPktDistChn0", 20, 1 }, + { "TtlMode", 19, 1 }, + { "EQfcDmac", 18, 1 }, + { "ELpbkIncMpsStat", 17, 1 }, + { "IPIDSplitMode", 16, 1 }, + { "ETOEBypCSumNoWait", 15, 1 }, + { "ENICCSumNoWait", 14, 1 }, + { "CCplAckMode", 13, 1 }, + { "RMWHintEnable", 12, 1 }, + { "EChecksumInsertTCP", 11, 1 }, + { "EChecksumInsertIP", 10, 1 }, + { "EVnTagEn", 9, 1 }, + { "EV6FlwEn", 8, 1 }, + { "EPriority", 7, 1 }, + { "EVlanPrio", 6, 1 }, + { "CChecksumInsertTCP", 5, 1 }, + { "CChecksumInsertIP", 4, 1 }, + { "CRxPktEnc", 3, 1 }, + { "CCPL", 2, 1 }, + { "CRxPktXt", 1, 1 }, + { "CEthernet", 0, 1 }, + { "TP_GLOBAL_CONFIG", 0x7d08, 0 }, + { "RXSACKParse", 31, 1 }, + { "RXSACKFwdMode", 29, 2 }, + { "SrvrChRssEn", 26, 1 }, + { "RXFlowControlDisable", 25, 1 }, + { "TXPacingEnable", 24, 1 }, + { "LBChnDistEn", 23, 1 }, + { "ActiveFilterCounts", 22, 1 }, + { "ProtectedMode", 21, 1 }, + { "EthTnlLen2x", 20, 1 }, + { "EgLBChnDistEn", 19, 1 }, + { "FiveTupleLookup", 17, 2 }, + { "OfdMpsStats", 16, 1 }, + { "DontFragment", 15, 1 }, + { "IPIdentSplit", 14, 1 }, + { "RssSynSteerEnable", 12, 1 }, + { "IssFromCplEnable", 11, 1 }, + { "RssLoopbackEnable", 10, 1 }, + { "TCAMServerUse", 8, 2 }, + { "IPTTL", 0, 8 }, + { "TP_DB_CONFIG", 0x7d0c, 0 }, + { "DBMaxOpCnt", 24, 8 }, + { "CxMaxOpCntDisable", 23, 1 }, + { "CxMaxOpCnt", 16, 7 }, + { "TxMaxOpCntDisable", 15, 1 }, + { "TxMaxOpCnt", 8, 7 }, + { "RxMaxOpCntDisable", 7, 1 }, + { "RxMaxOpCnt", 0, 7 }, + { "TP_CMM_TCB_BASE", 0x7d10, 0 }, + { "TP_CMM_MM_BASE", 0x7d14, 0 }, + { "TP_CMM_TIMER_BASE", 0x7d18, 0 }, + { "TP_CMM_MM_FLST_SIZE", 0x7d1c, 0 }, + { "RxPoolSize", 16, 16 }, + { "TxPoolSize", 0, 16 }, + { "TP_PMM_TX_BASE", 0x7d20, 0 }, + { "TP_PMM_DEFRAG_BASE", 0x7d24, 0 }, + { "TP_PMM_RX_BASE", 0x7d28, 0 }, + { "TP_PMM_RX_PAGE_SIZE", 0x7d2c, 0 }, + { "TP_PMM_RX_MAX_PAGE", 0x7d30, 0 }, + { "PMRxNumChn", 29, 3 }, + { "PMRxMaxPage", 0, 21 }, + { "TP_PMM_TX_PAGE_SIZE", 0x7d34, 0 }, + { "TP_PMM_TX_MAX_PAGE", 0x7d38, 0 }, + { "PMTxNumChn", 29, 3 }, + { "PMTxMaxPage", 0, 21 }, + { "TP_EXT_CONFIG", 0x7d3c, 0 }, + { "TnlErrorIpSecARW", 29, 1 }, + { "TnlErrorIpSecICV", 28, 1 }, + { "DropErrorIpSecARW", 25, 1 }, + { "DropErrorIpSecICV", 24, 1 }, + { "MibRdmaRoceEn", 19, 1 }, + { "MibRdmaiWarpEn", 18, 1 }, + { "BypTxDataAckAllEn", 17, 1 }, + { "DataAckExtEn", 16, 1 }, + { "MacMatch11Fwd", 11, 1 }, + { "UserTmstpEn", 10, 1 }, + { "MmgrCacheDis", 9, 1 }, + { "TxPktPackOutUdpEn", 8, 1 }, + { "IPSecRoCECRCMode", 6, 2 }, + { "IPSecIdxLoc", 5, 1 }, + { "IPSecIdxCapEn", 4, 1 }, + { "IPSecOfEn", 3, 1 }, + { "IPSecCfg", 0, 3 }, + { "TP_TCP_OPTIONS", 0x7d40, 0 }, + { "MTUDefault", 16, 16 }, + { "MTUEnable", 10, 1 }, + { "SACKTx", 9, 1 }, + { "SACKRx", 8, 1 }, + { "SACKMode", 4, 2 }, + { "WindowScaleMode", 2, 2 }, + { "TimestampsMode", 0, 2 }, + { "TP_DACK_CONFIG", 0x7d44, 0 }, + { "AutoState3", 30, 2 }, + { "AutoState2", 28, 2 }, + { "AutoState1", 26, 2 }, + { "ByteThreshold", 8, 18 }, + { "MSSThreshold", 4, 3 }, + { "AutoCareful", 2, 1 }, + { "AutoEnable", 1, 1 }, + { "Mode", 0, 1 }, + { "TP_PC_CONFIG", 0x7d48, 0 }, + { "EnableFinCheck", 31, 1 }, + { "EnableOcspiFull", 30, 1 }, + { "EnableFLMErrorDDP", 29, 1 }, + { "LockTid", 28, 1 }, + { "DisableInvPend", 27, 1 }, + { "EnableFilterCount", 26, 1 }, + { "RddpCongEn", 25, 1 }, + { "EnableOnFlyPDU", 24, 1 }, + { "EnableMinRcvWnd", 23, 1 }, + { "EnableMaxRcvWnd", 22, 1 }, + { "EnableMibVfPld", 21, 1 }, + { "TxDeferEnable", 20, 1 }, + { "RxCongestionMode", 19, 1 }, + { "HearbeatOnceDACK", 18, 1 }, + { "HearbeatOnceHeap", 17, 1 }, + { "HearbeatDACK", 16, 1 }, + { "TxCongestionMode", 15, 1 }, + { "AcceptLatestRcvAdv", 14, 1 }, + { "DisableSYNData", 13, 1 }, + { "DisableWindowPSH", 12, 1 }, + { "DisableFINOldData", 11, 1 }, + { "EnableFLMError", 10, 1 }, + { "EnableOptMtu", 9, 1 }, + { "FilterPeerFIN", 8, 1 }, + { "EnableFeedbackSend", 7, 1 }, + { "EnableRDMAError", 6, 1 }, + { "EnableFilterNat", 5, 1 }, + { "DisableSepPshFlag", 4, 1 }, + { "EnableOfdoVLAN", 3, 1 }, + { "DisableTimeWait", 2, 1 }, + { "EnableVlanCheck", 1, 1 }, + { "TxDataAckPageEnable", 0, 1 }, + { "TP_PC_CONFIG2", 0x7d4c, 0 }, + { "EnableMtuVfMode", 31, 1 }, + { "EnableMibVfMode", 30, 1 }, + { "DisableLbkCheck", 29, 1 }, + { "EnableUrgDdpOff", 28, 1 }, + { "EnableFilterLpbk", 27, 1 }, + { "DisableTblMmgr", 26, 1 }, + { "CngRecSndNxt", 25, 1 }, + { "EnableLbkChn", 24, 1 }, + { "EnableLroEcn", 23, 1 }, + { "EnablePcmdCheck", 22, 1 }, + { "EnableELbkAFull", 21, 1 }, + { "EnableCLbkAFull", 20, 1 }, + { "EnableOespiFull", 19, 1 }, + { "DisableHitCheck", 18, 1 }, + { "EnableRssErrCheck", 17, 1 }, + { "DisableNewPshFlag", 16, 1 }, + { "EnableRddpRcvAdvClr", 15, 1 }, + { "EnableFinDdpOff", 14, 1 }, + { "EnableArpMiss", 13, 1 }, + { "EnableRstPaws", 12, 1 }, + { "EnableIPv6RSS", 11, 1 }, + { "EnableNonOfdHybRss", 10, 1 }, + { "EnableUDP4TupRss", 9, 1 }, + { "EnableRxPktTmstpRss", 8, 1 }, + { "EnableEPCMDAFull", 7, 1 }, + { "EnableCPCMDAFull", 6, 1 }, + { "EnableEHdrAFull", 5, 1 }, + { "EnableCHdrAFull", 4, 1 }, + { "EnableEMacAFull", 3, 1 }, + { "EnableNonOfdTidRss", 2, 1 }, + { "EnableNonOfdTcbRss", 1, 1 }, + { "EnableTnlOfdClosed", 0, 1 }, + { "TP_TCP_BACKOFF_REG0", 0x7d50, 0 }, + { "TimerBackoffIndex3", 24, 8 }, + { "TimerBackoffIndex2", 16, 8 }, + { "TimerBackoffIndex1", 8, 8 }, + { "TimerBackoffIndex0", 0, 8 }, + { "TP_TCP_BACKOFF_REG1", 0x7d54, 0 }, + { "TimerBackoffIndex7", 24, 8 }, + { "TimerBackoffIndex6", 16, 8 }, + { "TimerBackoffIndex5", 8, 8 }, + { "TimerBackoffIndex4", 0, 8 }, + { "TP_TCP_BACKOFF_REG2", 0x7d58, 0 }, + { "TimerBackoffIndex11", 24, 8 }, + { "TimerBackoffIndex10", 16, 8 }, + { "TimerBackoffIndex9", 8, 8 }, + { "TimerBackoffIndex8", 0, 8 }, + { "TP_TCP_BACKOFF_REG3", 0x7d5c, 0 }, + { "TimerBackoffIndex15", 24, 8 }, + { "TimerBackoffIndex14", 16, 8 }, + { "TimerBackoffIndex13", 8, 8 }, + { "TimerBackoffIndex12", 0, 8 }, + { "TP_PARA_REG0", 0x7d60, 0 }, + { "LimTxThresh", 28, 4 }, + { "InitCwndIdle", 27, 1 }, + { "InitCwnd", 24, 3 }, + { "DupAckThresh", 20, 4 }, + { "EcnCngFifo", 19, 1 }, + { "EcnSynAck", 18, 1 }, + { "EcnThresh", 16, 2 }, + { "EcnMode", 15, 1 }, + { "EcnModeCwr", 14, 1 }, + { "SetTimeEnable", 13, 1 }, + { "CplErrEnable", 12, 1 }, + { "FastTnlCnt", 11, 1 }, + { "ForceShove", 10, 1 }, + { "TpTcamKey", 9, 1 }, + { "SwsMode", 8, 1 }, + { "TsmpMode", 6, 2 }, + { "ByteCountLimit", 4, 2 }, + { "SwsShove", 3, 1 }, + { "TblTimer", 2, 1 }, + { "RxtPace", 1, 1 }, + { "SwsTimer", 0, 1 }, + { "TP_PARA_REG1", 0x7d64, 0 }, + { "InitRwnd", 16, 16 }, + { "InitialSSThresh", 0, 16 }, + { "TP_PARA_REG2", 0x7d68, 0 }, + { "MaxRxData", 16, 16 }, + { "RxCoalesceSize", 0, 16 }, + { "TP_PARA_REG3", 0x7d6c, 0 }, + { "EnableTnlCngLpbk", 31, 1 }, + { "EnableTnlCngFifo", 30, 1 }, + { "EnableTnlCngHdr", 29, 1 }, + { "EnableTnlCngSge", 28, 1 }, + { "RxMacCheck", 27, 1 }, + { "RxSynFilter", 26, 1 }, + { "CngCtrlECN", 25, 1 }, + { "RxDdpOffInit", 24, 1 }, + { "TunnelCngDrop3", 23, 1 }, + { "TunnelCngDrop2", 22, 1 }, + { "TunnelCngDrop1", 21, 1 }, + { "TunnelCngDrop0", 20, 1 }, + { "TxDataAckIdx", 16, 4 }, + { "RxFragEnable", 12, 3 }, + { "TxPaceFixedStrict", 11, 1 }, + { "TxPaceAutoStrict", 10, 1 }, + { "TxPaceFixed", 9, 1 }, + { "TxPaceAuto", 8, 1 }, + { "RxChnTunnel", 7, 1 }, + { "RxUrgTunnel", 6, 1 }, + { "RxUrgMode", 5, 1 }, + { "TxUrgMode", 4, 1 }, + { "CngCtrlMode", 2, 2 }, + { "RxCoalesceEnable", 1, 1 }, + { "RxCoalescePshEn", 0, 1 }, + { "TP_PARA_REG4", 0x7d70, 0 }, + { "IdleCwndHighSpeed", 28, 1 }, + { "RxmtCwndHighSpeed", 27, 1 }, + { "OverdriveHighSpeed", 25, 2 }, + { "ByteCountHighSpeed", 24, 1 }, + { "IdleCwndNewReno", 20, 1 }, + { "RxmtCwndNewReno", 19, 1 }, + { "OverdriveNewReno", 17, 2 }, + { "ByteCountNewReno", 16, 1 }, + { "IdleCwndTahoe", 12, 1 }, + { "RxmtCwndTahoe", 11, 1 }, + { "OverdriveTahoe", 9, 2 }, + { "ByteCountTahoe", 8, 1 }, + { "IdleCwndReno", 4, 1 }, + { "RxmtCwndReno", 3, 1 }, + { "OverdriveReno", 1, 2 }, + { "ByteCountReno", 0, 1 }, + { "TP_PARA_REG5", 0x7d74, 0 }, + { "IndicateSize", 16, 16 }, + { "MaxProxySize", 12, 4 }, + { "EnableReadPdu", 11, 1 }, + { "EnableReadAhead", 10, 1 }, + { "EmptyRqEnable", 9, 1 }, + { "SchdEnable", 8, 1 }, + { "EnableXoffPdu", 7, 1 }, + { "EnableFcoeCheck", 6, 1 }, + { "EnableFragCheck", 5, 1 }, + { "RearmDdpOffset", 4, 1 }, + { "ResetDdpOffset", 3, 1 }, + { "OnFlyDDPEnable", 2, 1 }, + { "EnableRdmaFix", 1, 1 }, + { "PushTimerEnable", 0, 1 }, + { "TP_PARA_REG6", 0x7d78, 0 }, + { "TxPDUSizeAdj", 24, 8 }, + { "TxTcamKey", 22, 1 }, + { "EnableCByp", 21, 1 }, + { "DisablePDUAck", 20, 1 }, + { "EnableCSav", 19, 1 }, + { "EnableDeferPDU", 18, 1 }, + { "EnableFlush", 17, 1 }, + { "EnableBytePersist", 16, 1 }, + { "DisableTmoCng", 15, 1 }, + { "EnableReadAhead", 14, 1 }, + { "AllowExeption", 13, 1 }, + { "EnableDeferACK", 12, 1 }, + { "EnableESnd", 11, 1 }, + { "EnableCSnd", 10, 1 }, + { "EnablePDUE", 9, 1 }, + { "EnablePDUC", 8, 1 }, + { "EnableBUFI", 7, 1 }, + { "EnableBUFE", 6, 1 }, + { "EnableDefer", 5, 1 }, + { "EnableClearRxmtOos", 4, 1 }, + { "DisablePDUCng", 3, 1 }, + { "DisablePDUTimeout", 2, 1 }, + { "DisablePDURxmt", 1, 1 }, + { "DisablePDUxmt", 0, 1 }, + { "TP_PARA_REG7", 0x7d7c, 0 }, + { "PMMaxXferLen1", 16, 16 }, + { "PMMaxXferLen0", 0, 16 }, + { "TP_ENG_CONFIG", 0x7d80, 0 }, + { "TableLatencyDone", 28, 4 }, + { "TableLatencyStart", 24, 4 }, + { "EngineLatencyDelta", 16, 4 }, + { "EngineLatencyMmgr", 12, 4 }, + { "EngineLatencyWireIp6", 8, 4 }, + { "EngineLatencyWire", 4, 4 }, + { "EngineLatencyBase", 0, 4 }, + { "TP_PARA_REG8", 0x7d84, 0 }, + { "EcnAckEct", 2, 1 }, + { "EcnFinEct", 1, 1 }, + { "EcnSynEct", 0, 1 }, + { "TP_PARA_REG9", 0x7d88, 0 }, + { "PMMaxXferLen3", 16, 16 }, + { "PMMaxXferLen2", 0, 16 }, + { "TP_ERR_CONFIG", 0x7d8c, 0 }, + { "TnlErrorFPMA", 31, 1 }, + { "TnlErrorPing", 30, 1 }, + { "TnlErrorCsum", 29, 1 }, + { "TnlErrorCsumIP", 28, 1 }, + { "TnlErrorOpaque", 27, 1 }, + { "TnlErrorIp6Opt", 26, 1 }, + { "TnlErrorTcpOpt", 25, 1 }, + { "TnlErrorPktLen", 24, 1 }, + { "TnlErrorTcpHdrLen", 23, 1 }, + { "TnlErrorIpHdrLen", 22, 1 }, + { "TnlErrorEthHdrLen", 21, 1 }, + { "TnlErrorAttack", 20, 1 }, + { "TnlErrorFrag", 19, 1 }, + { "TnlErrorIpVer", 18, 1 }, + { "TnlErrorMac", 17, 1 }, + { "TnlErrorAny", 16, 1 }, + { "DropErrorFPMA", 15, 1 }, + { "DropErrorPing", 14, 1 }, + { "DropErrorCsum", 13, 1 }, + { "DropErrorCsumIP", 12, 1 }, + { "DropErrorOpaque", 11, 1 }, + { "DropErrorIp6Opt", 10, 1 }, + { "DropErrorTcpOpt", 9, 1 }, + { "DropErrorPktLen", 8, 1 }, + { "DropErrorTcpHdrLen", 7, 1 }, + { "DropErrorIpHdrLen", 6, 1 }, + { "DropErrorEthHdrLen", 5, 1 }, + { "DropErrorAttack", 4, 1 }, + { "DropErrorFrag", 3, 1 }, + { "DropErrorIpVer", 2, 1 }, + { "DropErrorMac", 1, 1 }, + { "DropErrorAny", 0, 1 }, + { "TP_TIMER_RESOLUTION", 0x7d90, 0 }, + { "RoceTimerResolution", 24, 8 }, + { "TimerResolution", 16, 8 }, + { "TimestampResolution", 8, 8 }, + { "DelayedACKResolution", 0, 8 }, + { "TP_MSL", 0x7d94, 0 }, + { "TP_RXT_MIN", 0x7d98, 0 }, + { "TP_RXT_MAX", 0x7d9c, 0 }, + { "TP_PERS_MIN", 0x7da0, 0 }, + { "TP_PERS_MAX", 0x7da4, 0 }, + { "TP_KEEP_IDLE", 0x7da8, 0 }, + { "TP_KEEP_INTVL", 0x7dac, 0 }, + { "TP_INIT_SRTT", 0x7db0, 0 }, + { "MaxRtt", 16, 16 }, + { "InitSrtt", 0, 16 }, + { "TP_DACK_TIMER", 0x7db4, 0 }, + { "TP_FINWAIT2_TIMER", 0x7db8, 0 }, + { "TP_FAST_FINWAIT2_TIMER", 0x7dbc, 0 }, + { "TP_SHIFT_CNT", 0x7dc0, 0 }, + { "SynShiftMax", 24, 4 }, + { "RxtShiftMaxR1", 20, 4 }, + { "RxtShiftMaxR2", 16, 4 }, + { "PerShiftBackoffMax", 12, 4 }, + { "PerShiftMax", 8, 4 }, + { "KeepaliveMaxR1", 4, 4 }, + { "KeepaliveMaxR2", 0, 4 }, + { "TP_TM_CONFIG", 0x7dc4, 0 }, + { "TP_TIME_LO", 0x7dc8, 0 }, + { "TP_TIME_HI", 0x7dcc, 0 }, + { "TP_PORT_MTU_0", 0x7dd0, 0 }, + { "Port1MTUValue", 16, 16 }, + { "Port0MTUValue", 0, 16 }, + { "TP_PORT_MTU_1", 0x7dd4, 0 }, + { "Port3MTUValue", 16, 16 }, + { "Port2MTUValue", 0, 16 }, + { "TP_PACE_TABLE", 0x7dd8, 0 }, + { "TP_CCTRL_TABLE", 0x7ddc, 0 }, + { "RowIndex", 16, 16 }, + { "RowValue", 0, 16 }, + { "TP_MTU_TABLE", 0x7de4, 0 }, + { "MTUIndex", 24, 8 }, + { "MTUWidth", 16, 4 }, + { "MTUValue", 0, 14 }, + { "TP_ULP_TABLE", 0x7de8, 0 }, + { "ULPType7Length", 31, 1 }, + { "ULPType7Offset", 28, 3 }, + { "ULPType6Length", 27, 1 }, + { "ULPType6Offset", 24, 3 }, + { "ULPType5Length", 23, 1 }, + { "ULPType5Offset", 20, 3 }, + { "ULPType4Length", 19, 1 }, + { "ULPType4Offset", 16, 3 }, + { "ULPType3Length", 15, 1 }, + { "ULPType3Offset", 12, 3 }, + { "ULPType2Length", 11, 1 }, + { "ULPType2Offset", 8, 3 }, + { "ULPType1Length", 7, 1 }, + { "ULPType1Offset", 4, 3 }, + { "ULPType0Length", 3, 1 }, + { "ULPType0Offset", 0, 3 }, + { "TP_RSS_LKP_TABLE", 0x7dec, 0 }, + { "LkpTblQueue1", 10, 10 }, + { "LkpTblQueue0", 0, 10 }, + { "TP_RSS_CONFIG", 0x7df0, 0 }, + { "TNL4tupEnIpv6", 31, 1 }, + { "TNL2tupEnIpv6", 30, 1 }, + { "TNL4tupEnIpv4", 29, 1 }, + { "TNL2tupEnIpv4", 28, 1 }, + { "TNLTcpSel", 27, 1 }, + { "TNLIp6Sel", 26, 1 }, + { "TNLVrtSel", 25, 1 }, + { "TNLMapEn", 24, 1 }, + { "TNLFcoeMode", 23, 1 }, + { "TNLFcoeSid", 22, 1 }, + { "TNLFcoeEn", 21, 1 }, + { "HashXor", 20, 1 }, + { "OFDHashSave", 19, 1 }, + { "OFDVrtSel", 18, 1 }, + { "OFDMapEn", 17, 1 }, + { "OFDLkpEn", 16, 1 }, + { "SYN4tupEnIpv6", 15, 1 }, + { "SYN2tupEnIpv6", 14, 1 }, + { "SYN4tupEnIpv4", 13, 1 }, + { "SYN2tupEnIpv4", 12, 1 }, + { "SYNIp6Sel", 11, 1 }, + { "SYNVrtSel", 10, 1 }, + { "SYNMapEn", 9, 1 }, + { "SYNLkpEn", 8, 1 }, + { "ChannelEnable", 7, 1 }, + { "PortEnable", 6, 1 }, + { "TNLAllLookup", 5, 1 }, + { "VirtEnable", 4, 1 }, + { "CongestionEnable", 3, 1 }, + { "HashToeplitz", 2, 1 }, + { "UdpEnable", 1, 1 }, + { "Disable", 0, 1 }, + { "TP_RSS_CONFIG_TNL", 0x7df4, 0 }, + { "MaskSize", 28, 4 }, + { "MaskFilter", 16, 11 }, + { "HashAll", 2, 1 }, + { "HashEth", 1, 1 }, + { "UseWireCh", 0, 1 }, + { "TP_RSS_CONFIG_OFD", 0x7df8, 0 }, + { "MaskSize", 28, 4 }, + { "RRCPLMapEn", 20, 1 }, + { "RRCPLQueWidth", 16, 4 }, + { "FrmwrQueMask", 12, 4 }, + { "RRCPLOpt1SMSelEn", 11, 1 }, + { "RRCPLOpt1BQEn", 10, 1 }, + { "TP_RSS_CONFIG_SYN", 0x7dfc, 0 }, + { "MaskSize", 28, 4 }, + { "UseWireCh", 0, 1 }, + { "TP_RSS_CONFIG_VRT", 0x7e00, 0 }, + { "VfPerrEn", 23, 1 }, + { "KeyPerrEn", 22, 1 }, + { "VfVlanEn", 21, 1 }, + { "VfFwEn", 20, 1 }, + { "HashDelay", 16, 4 }, + { "KeyMode", 6, 2 }, + { "TP_RSS_CONFIG_CNG", 0x7e04, 0 }, + { "ChnCount3", 31, 1 }, + { "ChnCount2", 30, 1 }, + { "ChnCount1", 29, 1 }, + { "ChnCount0", 28, 1 }, + { "ChnUndFlow3", 27, 1 }, + { "ChnUndFlow2", 26, 1 }, + { "ChnUndFlow1", 25, 1 }, + { "ChnUndFlow0", 24, 1 }, + { "ChnOvrFlow3", 23, 1 }, + { "ChnOvrFlow2", 22, 1 }, + { "ChnOvrFlow1", 21, 1 }, + { "ChnOvrFlow0", 20, 1 }, + { "UpdVld", 19, 1 }, + { "Xoff", 18, 1 }, + { "UpdChn3", 17, 1 }, + { "UpdChn2", 16, 1 }, + { "UpdChn1", 15, 1 }, + { "UpdChn0", 14, 1 }, + { "Queue", 0, 14 }, + { "TP_RSS_CONFIG_4CH", 0x7e08, 0 }, + { "BaseQIDEn", 1, 1 }, + { "200GMode", 0, 1 }, + { "TP_RSS_CONFIG_SRAM", 0x7e0c, 0 }, + { "SramRdDis", 20, 1 }, + { "SramStart", 19, 1 }, + { "SramWrite", 18, 1 }, + { "SramSel", 16, 2 }, + { "SramAddr", 0, 14 }, + { "TP_LA_TABLE_0", 0x7e10, 0 }, + { "VirtPort1Table", 16, 16 }, + { "VirtPort0Table", 0, 16 }, + { "TP_LA_TABLE_1", 0x7e14, 0 }, + { "VirtPort3Table", 16, 16 }, + { "VirtPort2Table", 0, 16 }, + { "TP_TM_PIO_ADDR", 0x7e18, 0 }, + { "TP_TM_PIO_DATA", 0x7e1c, 0 }, + { "TP_RX_MOD_CONFIG_CH3_CH2", 0x7e20, 0 }, + { "RxChannelWeight3", 8, 8 }, + { "RXChannelWeight2", 0, 8 }, + { "TP_MOD_CONFIG", 0x7e24, 0 }, + { "RxChannelWeight1", 24, 8 }, + { "RXChannelWeight0", 16, 8 }, + { "TimerMode", 8, 8 }, + { "TxChannelXoffEn", 0, 4 }, + { "TP_TX_MOD_QUEUE_REQ_MAP", 0x7e28, 0 }, + { "RX_MOD_WEIGHT", 24, 8 }, + { "TX_MOD_WEIGHT", 16, 8 }, + { "TX_MOD_QUEUE_REQ_MAP", 0, 16 }, + { "TP_TX_MOD_QUEUE_WEIGHT1", 0x7e2c, 0 }, + { "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT0", 0x7e30, 0 }, + { "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 }, + { "TP_TX_MOD_CHANNEL_WEIGHT", 0x7e34, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "TP_MOD_RATE_LIMIT", 0x7e38, 0 }, + { "RX_MOD_RATE_LIMIT_INC", 24, 8 }, + { "RX_MOD_RATE_LIMIT_TICK", 16, 8 }, + { "TX_MOD_RATE_LIMIT_INC", 8, 8 }, + { "TX_MOD_RATE_LIMIT_TICK", 0, 8 }, + { "TP_PIO_ADDR", 0x7e40, 0 }, + { "TP_PIO_DATA", 0x7e44, 0 }, + { "TP_RESET", 0x7e4c, 0 }, + { "FlstInitEnable", 1, 1 }, + { "TPReset", 0, 1 }, + { "TP_MIB_INDEX", 0x7e50, 0 }, + { "TP_MIB_DATA", 0x7e54, 0 }, + { "TP_SYNC_TIME_HI", 0x7e58, 0 }, + { "TP_SYNC_TIME_LO", 0x7e5c, 0 }, + { "TP_CMM_MM_RX_FLST_BASE", 0x7e60, 0 }, + { "TP_CMM_MM_TX_FLST_BASE", 0x7e64, 0 }, + { "TP_CMM_MM_PS_FLST_BASE", 0x7e68, 0 }, + { "TP_CMM_MM_MAX_PSTRUCT", 0x7e6c, 0 }, + { "TP_INT_ENABLE", 0x7e70, 0 }, + { "FlmTxFlstEmpty", 30, 1 }, + { "TpCerr", 5, 1 }, + { "OtherPerr", 4, 1 }, + { "TpeIng1Perr", 3, 1 }, + { "TpeIng0Perr", 2, 1 }, + { "TpeEgPerr", 1, 1 }, + { "TpcPerr", 0, 1 }, + { "TP_INT_CAUSE", 0x7e74, 0 }, + { "FlmTxFlstEmpty", 30, 1 }, + { "TpCerr", 5, 1 }, + { "OtherPerr", 4, 1 }, + { "TpeIng1Perr", 3, 1 }, + { "TpeIng0Perr", 2, 1 }, + { "TpeEgPerr", 1, 1 }, + { "TpcPerr", 0, 1 }, + { "TP_FLM_FREE_PS_CNT", 0x7e80, 0 }, + { "TP_FLM_FREE_RX_CNT", 0x7e84, 0 }, + { "FreeRxPageChn", 28, 3 }, + { "FreeRxPageCount", 0, 21 }, + { "TP_FLM_FREE_TX_CNT", 0x7e88, 0 }, + { "FreeTxPageChn", 28, 3 }, + { "FreeTxPageCount", 0, 21 }, + { "TP_TM_HEAP_PUSH_CNT", 0x7e8c, 0 }, + { "TP_TM_HEAP_POP_CNT", 0x7e90, 0 }, + { "TP_TM_DACK_PUSH_CNT", 0x7e94, 0 }, + { "TP_TM_DACK_POP_CNT", 0x7e98, 0 }, + { "TP_TM_MOD_PUSH_CNT", 0x7e9c, 0 }, + { "TP_MOD_POP_CNT", 0x7ea0, 0 }, + { "TP_TIMER_SEPARATOR", 0x7ea4, 0 }, + { "TimerSeparator", 16, 16 }, + { "DisableTimeFreeze", 0, 1 }, + { "TP_STAMP_TIME", 0x7ea8, 0 }, + { "TP_DEBUG_FLAGS", 0x7eac, 0 }, + { "RxTimerCompBuffer", 27, 1 }, + { "RxTimerDackFirst", 26, 1 }, + { "RxTimerDack", 25, 1 }, + { "RxTimerHeartbeat", 24, 1 }, + { "RxPawsDrop", 23, 1 }, + { "RxUrgDataDrop", 22, 1 }, + { "RxFutureData", 21, 1 }, + { "RxRcvRxmData", 20, 1 }, + { "RxRcvOooDataFin", 19, 1 }, + { "RxRcvOooData", 18, 1 }, + { "RxRcvWndZero", 17, 1 }, + { "RxRcvWndLtMss", 16, 1 }, + { "TxDfrFast", 13, 1 }, + { "TxRxmMisc", 12, 1 }, + { "TxDupAckInc", 11, 1 }, + { "TxRxmUrg", 10, 1 }, + { "TxRxmFin", 9, 1 }, + { "TxRxmSyn", 8, 1 }, + { "TxRxmNewReno", 7, 1 }, + { "TxRxmFast", 6, 1 }, + { "TxRxmTimer", 5, 1 }, + { "TxRxmTimerKeepalive", 4, 1 }, + { "TxRxmTimerPersist", 3, 1 }, + { "TxRcvAdvShrunk", 2, 1 }, + { "TxRcvAdvZero", 1, 1 }, + { "TxRcvAdvLtMss", 0, 1 }, + { "TP_RX_SCHED", 0x7eb0, 0 }, + { "CommitReset3", 7, 1 }, + { "CommitReset2", 6, 1 }, + { "CommitReset1", 5, 1 }, + { "CommitReset0", 4, 1 }, + { "ForceCong3", 3, 1 }, + { "ForceCong2", 2, 1 }, + { "ForceCong1", 1, 1 }, + { "ForceCong0", 0, 1 }, + { "TP_TX_SCHED", 0x7eb4, 0 }, + { "CommitReset3", 31, 1 }, + { "CommitReset2", 30, 1 }, + { "CommitReset1", 29, 1 }, + { "CommitReset0", 28, 1 }, + { "ForceCong3", 27, 1 }, + { "ForceCong2", 26, 1 }, + { "ForceCong1", 25, 1 }, + { "ForceCong0", 24, 1 }, + { "CommitLimit3", 18, 6 }, + { "CommitLimit2", 12, 6 }, + { "CommitLimit1", 6, 6 }, + { "CommitLimit0", 0, 6 }, + { "TP_FX_SCHED", 0x7eb8, 0 }, + { "TxChnXoff3", 19, 1 }, + { "TxChnXoff2", 18, 1 }, + { "TxChnXoff1", 17, 1 }, + { "TxChnXoff0", 16, 1 }, + { "TxModXoff7", 15, 1 }, + { "TxModXoff6", 14, 1 }, + { "TxModXoff5", 13, 1 }, + { "TxModXoff4", 12, 1 }, + { "TxModXoff3", 11, 1 }, + { "TxModXoff2", 10, 1 }, + { "TxModXoff1", 9, 1 }, + { "TxModXoff0", 8, 1 }, + { "RxChnXoff3", 7, 1 }, + { "RxChnXoff2", 6, 1 }, + { "RxChnXoff1", 5, 1 }, + { "RxChnXoff0", 4, 1 }, + { "RxModXoff3", 3, 1 }, + { "RxModXoff2", 2, 1 }, + { "RxModXoff1", 1, 1 }, + { "RxModXoff0", 0, 1 }, + { "TP_TX_ORATE", 0x7ebc, 0 }, + { "OfdRate3", 24, 8 }, + { "OfdRate2", 16, 8 }, + { "OfdRate1", 8, 8 }, + { "OfdRate0", 0, 8 }, + { "TP_IX_SCHED0", 0x7ec0, 0 }, + { "TP_IX_SCHED1", 0x7ec4, 0 }, + { "TP_IX_SCHED2", 0x7ec8, 0 }, + { "TP_IX_SCHED3", 0x7ecc, 0 }, + { "TP_TX_TRATE", 0x7ed0, 0 }, + { "TnlRate3", 24, 8 }, + { "TnlRate2", 16, 8 }, + { "TnlRate1", 8, 8 }, + { "TnlRate0", 0, 8 }, + { "TP_DBG_LA_CONFIG", 0x7ed4, 0 }, + { "DbgLaOpcEnable", 24, 8 }, + { "DbgLaWhlf", 23, 1 }, + { "DbgLaWptr", 16, 7 }, + { "DbgLaMode", 14, 2 }, + { "DbgLaFatalFreeze", 13, 1 }, + { "DbgLaEnable", 12, 1 }, + { "DbgLaRptr", 0, 7 }, + { "TP_DBG_LA_DATAL", 0x7ed8, 0 }, + { "TP_DBG_LA_DATAH", 0x7edc, 0 }, + { "TP_DBG_LA_FILTER", 0x7ee0, 0 }, + { "FilterTid", 12, 20 }, + { "EnTidFilter", 5, 1 }, + { "EnOffload", 4, 1 }, + { "EnTunnel", 3, 1 }, + { "EnI", 2, 1 }, + { "EnC", 1, 1 }, + { "EnE", 0, 1 }, + { "TP_PROTOCOL_CNTRL", 0x7ee8, 0 }, + { "WriteEnable", 31, 1 }, + { "TcamEnable", 10, 1 }, + { "BlockSelect", 8, 2 }, + { "LineAddress", 1, 7 }, + { "RequestDone", 0, 1 }, + { "TP_PROTOCOL_DATA0", 0x7eec, 0 }, + { "TP_PROTOCOL_DATA1", 0x7ef0, 0 }, + { "TP_PROTOCOL_DATA2", 0x7ef4, 0 }, + { "TP_PROTOCOL_DATA3", 0x7ef8, 0 }, + { "TP_PROTOCOL_DATA4", 0x7efc, 0 }, + { "TP_INIC_CTRL0", 0x7f00, 0 }, + { "TP_INIC_DBG", 0x7f04, 0 }, + { "TP_INIC_PERR_ENABLE", 0x7f08, 0 }, + { "inicMac1_err", 16, 6 }, + { "inicMac0_err", 0, 6 }, + { "TP_INIC_PERR_CAUSE", 0x7f0c, 0 }, + { "inicMac1_err", 16, 6 }, + { "inicMac0_err", 0, 6 }, + { "TP_PARA_REG10", 0x7f20, 0 }, + { "Dis39320Fix", 20, 1 }, + { "iWARPMaxPduLen", 16, 4 }, + { "TlsMaxRxData", 0, 16 }, + { "TP_TCAM_BIST_CTRL", 0x7f24, 0 }, + { "rst_cb", 31, 1 }, + { "cb_start", 0, 28 }, + { "TP_TCAM_BIST_CB_PASS", 0x7f28, 0 }, + { "TP_TCAM_BIST_CB_BUSY", 0x7f2c, 0 }, + { "TP_C_PERR_ENABLE", 0x7f30, 0 }, + { "DmxFifoOvfl", 26, 1 }, + { "URx2TpcDdpIntf", 25, 1 }, + { "TpcDispTokenFifo", 24, 1 }, + { "TpcDispCplFifo3", 23, 1 }, + { "TpcDispCplFifo2", 22, 1 }, + { "TpcDispCplFifo1", 21, 1 }, + { "TpcDispCplFifo0", 20, 1 }, + { "URxPldIntfCrc3", 19, 1 }, + { "URxPldIntfCrc2", 18, 1 }, + { "URxPldIntfCrc1", 17, 1 }, + { "URxPldIntfCrc0", 16, 1 }, + { "DmxDbFifo", 15, 1 }, + { "DmxDbSram", 14, 1 }, + { "DmxCplFifo", 13, 1 }, + { "DmxCplSram", 12, 1 }, + { "DmxCsumFifo", 11, 1 }, + { "DmxLenFifo", 10, 1 }, + { "DmxCheckFifo", 9, 1 }, + { "DmxWinFifo", 8, 1 }, + { "EgTokenFifo", 7, 1 }, + { "EgDataFifo", 6, 1 }, + { "Utx2TpcIntf3", 5, 1 }, + { "Utx2TpcIntf2", 4, 1 }, + { "Utx2TpcIntf1", 3, 1 }, + { "Utx2TpcIntf0", 2, 1 }, + { "LbkTokenFifo", 1, 1 }, + { "LbkDataFifo", 0, 1 }, + { "TP_C_PERR_CAUSE", 0x7f34, 0 }, + { "DmxFifoOvfl", 26, 1 }, + { "URx2TpcDdpIntf", 25, 1 }, + { "TpcDispTokenFifo", 24, 1 }, + { "TpcDispCplFifo3", 23, 1 }, + { "TpcDispCplFifo2", 22, 1 }, + { "TpcDispCplFifo1", 21, 1 }, + { "TpcDispCplFifo0", 20, 1 }, + { "URxPldIntfCrc3", 19, 1 }, + { "URxPldIntfCrc2", 18, 1 }, + { "URxPldIntfCrc1", 17, 1 }, + { "URxPldIntfCrc0", 16, 1 }, + { "DmxDbFifo", 15, 1 }, + { "DmxDbSram", 14, 1 }, + { "DmxCplFifo", 13, 1 }, + { "DmxCplSram", 12, 1 }, + { "DmxCsumFifo", 11, 1 }, + { "DmxLenFifo", 10, 1 }, + { "DmxCheckFifo", 9, 1 }, + { "DmxWinFifo", 8, 1 }, + { "EgTokenFifo", 7, 1 }, + { "EgDataFifo", 6, 1 }, + { "Utx2TpcIntf3", 5, 1 }, + { "Utx2TpcIntf2", 4, 1 }, + { "Utx2TpcIntf1", 3, 1 }, + { "Utx2TpcIntf0", 2, 1 }, + { "LbkTokenFifo", 1, 1 }, + { "LbkDataFifo", 0, 1 }, + { "TP_E_EG_PERR_ENABLE", 0x7f38, 0 }, + { "MpsLpbkTokenFifo", 25, 1 }, + { "MpsMacTokenFifo", 24, 1 }, + { "DispIpSecFifo3", 23, 1 }, + { "DispTcpFifo3", 22, 1 }, + { "DispIpFifo3", 21, 1 }, + { "DispEthFifo3", 20, 1 }, + { "DispGreFifo3", 19, 1 }, + { "DispCpl5Fifo3", 18, 1 }, + { "DispIpSecFifo2", 17, 1 }, + { "DispTcpFifo2", 16, 1 }, + { "DispIpFifo2", 15, 1 }, + { "DispEthFifo2", 14, 1 }, + { "DispGreFifo2", 13, 1 }, + { "DispCpl5Fifo2", 12, 1 }, + { "DispIpSecFifo1", 11, 1 }, + { "DispTcpFifo1", 10, 1 }, + { "DispIpFifo1", 9, 1 }, + { "DispEthFifo1", 8, 1 }, + { "DispGreFifo1", 7, 1 }, + { "DispCpl5Fifo1", 6, 1 }, + { "DispIpSecFifo0", 5, 1 }, + { "DispTcpFifo0", 4, 1 }, + { "DispIpFifo0", 3, 1 }, + { "DispEthFifo0", 2, 1 }, + { "DispGreFifo0", 1, 1 }, + { "DispCpl5Fifo0", 0, 1 }, + { "TP_E_EG_PERR_CAUSE", 0x7f3c, 0 }, + { "MpsLpbkTokenFifo", 25, 1 }, + { "MpsMacTokenFifo", 24, 1 }, + { "DispIpSecFifo3", 23, 1 }, + { "DispTcpFifo3", 22, 1 }, + { "DispIpFifo3", 21, 1 }, + { "DispEthFifo3", 20, 1 }, + { "DispGreFifo3", 19, 1 }, + { "DispCpl5Fifo3", 18, 1 }, + { "DispIpSecFifo2", 17, 1 }, + { "DispTcpFifo2", 16, 1 }, + { "DispIpFifo2", 15, 1 }, + { "DispEthFifo2", 14, 1 }, + { "DispGreFifo2", 13, 1 }, + { "DispCpl5Fifo2", 12, 1 }, + { "DispIpSecFifo1", 11, 1 }, + { "DispTcpFifo1", 10, 1 }, + { "DispIpFifo1", 9, 1 }, + { "DispEthFifo1", 8, 1 }, + { "DispGreFifo1", 7, 1 }, + { "DispCpl5Fifo1", 6, 1 }, + { "DispIpSecFifo0", 5, 1 }, + { "DispTcpFifo0", 4, 1 }, + { "DispIpFifo0", 3, 1 }, + { "DispEthFifo0", 2, 1 }, + { "DispGreFifo0", 1, 1 }, + { "DispCpl5Fifo0", 0, 1 }, + { "TP_E_IN0_PERR_ENABLE", 0x7f40, 0 }, + { "DmxIssFifo", 30, 1 }, + { "DmxErrFifo", 29, 1 }, + { "DmxAttFifo", 28, 1 }, + { "DmxTcpFifo", 27, 1 }, + { "DmxMpaFifo", 26, 1 }, + { "DmxOptFifo", 25, 1 }, + { "IngTokenFifo", 24, 1 }, + { "DmxPldChkOvfl1", 21, 1 }, + { "DmxPldChkFifo1", 20, 1 }, + { "DmxOptFifo1", 19, 1 }, + { "DmxMpaFifo1", 18, 1 }, + { "DmxDbFifo1", 17, 1 }, + { "DmxAttFifo1", 16, 1 }, + { "DmxIssFifo1", 15, 1 }, + { "DmxTcpFifo1", 14, 1 }, + { "DmxErrFifo1", 13, 1 }, + { "Mps2TpIntf1", 12, 1 }, + { "DmxPldChkOvfl0", 9, 1 }, + { "DmxPldChkFifo0", 8, 1 }, + { "DmxOptFifo0", 7, 1 }, + { "DmxMpaFifo0", 6, 1 }, + { "DmxDbFifo0", 5, 1 }, + { "DmxAttFifo0", 4, 1 }, + { "DmxIssFifo0", 3, 1 }, + { "DmxTcpFifo0", 2, 1 }, + { "DmxErrFifo0", 1, 1 }, + { "Mps2TpIntf0", 0, 1 }, + { "TP_E_IN0_PERR_CAUSE", 0x7f44, 0 }, + { "DmxIssFifo", 30, 1 }, + { "DmxErrFifo", 29, 1 }, + { "DmxAttFifo", 28, 1 }, + { "DmxTcpFifo", 27, 1 }, + { "DmxMpaFifo", 26, 1 }, + { "DmxOptFifo", 25, 1 }, + { "IngTokenFifo", 24, 1 }, + { "DmxPldChkOvfl1", 21, 1 }, + { "DmxPldChkFifo1", 20, 1 }, + { "DmxOptFifo1", 19, 1 }, + { "DmxMpaFifo1", 18, 1 }, + { "DmxDbFifo1", 17, 1 }, + { "DmxAttFifo1", 16, 1 }, + { "DmxIssFifo1", 15, 1 }, + { "DmxTcpFifo1", 14, 1 }, + { "DmxErrFifo1", 13, 1 }, + { "Mps2TpIntf1", 12, 1 }, + { "DmxPldChkOvfl0", 9, 1 }, + { "DmxPldChkFifo0", 8, 1 }, + { "DmxOptFifo0", 7, 1 }, + { "DmxMpaFifo0", 6, 1 }, + { "DmxDbFifo0", 5, 1 }, + { "DmxAttFifo0", 4, 1 }, + { "DmxIssFifo0", 3, 1 }, + { "DmxTcpFifo0", 2, 1 }, + { "DmxErrFifo0", 1, 1 }, + { "Mps2TpIntf0", 0, 1 }, + { "TP_E_IN1_PERR_ENABLE", 0x7f48, 0 }, + { "DmxPldChkOvfl3", 21, 1 }, + { "DmxPldChkFifo3", 20, 1 }, + { "DmxOptFifo3", 19, 1 }, + { "DmxMpaFifo3", 18, 1 }, + { "DmxDbFifo3", 17, 1 }, + { "DmxAttFifo3", 16, 1 }, + { "DmxIssFifo3", 15, 1 }, + { "DmxTcpFifo3", 14, 1 }, + { "DmxErrFifo3", 13, 1 }, + { "Mps2TpIntf3", 12, 1 }, + { "DmxPldChkOvfl2", 9, 1 }, + { "DmxPldChkFifo2", 8, 1 }, + { "DmxOptFifo2", 7, 1 }, + { "DmxMpaFifo2", 6, 1 }, + { "DmxDbFifo2", 5, 1 }, + { "DmxAttFifo2", 4, 1 }, + { "DmxIssFifo2", 3, 1 }, + { "DmxTcpFifo2", 2, 1 }, + { "DmxErrFifo2", 1, 1 }, + { "Mps2TpIntf2", 0, 1 }, + { "TP_E_IN1_PERR_CAUSE", 0x7f4c, 0 }, + { "DmxPldChkOvfl3", 21, 1 }, + { "DmxPldChkFifo3", 20, 1 }, + { "DmxOptFifo3", 19, 1 }, + { "DmxMpaFifo3", 18, 1 }, + { "DmxDbFifo3", 17, 1 }, + { "DmxAttFifo3", 16, 1 }, + { "DmxIssFifo3", 15, 1 }, + { "DmxTcpFifo3", 14, 1 }, + { "DmxErrFifo3", 13, 1 }, + { "Mps2TpIntf3", 12, 1 }, + { "DmxPldChkOvfl2", 9, 1 }, + { "DmxPldChkFifo2", 8, 1 }, + { "DmxOptFifo2", 7, 1 }, + { "DmxMpaFifo2", 6, 1 }, + { "DmxDbFifo2", 5, 1 }, + { "DmxAttFifo2", 4, 1 }, + { "DmxIssFifo2", 3, 1 }, + { "DmxTcpFifo2", 2, 1 }, + { "DmxErrFifo2", 1, 1 }, + { "Mps2TpIntf2", 0, 1 }, + { "TP_O_PERR_ENABLE", 0x7f50, 0 }, + { "DmarbtPerr", 31, 1 }, + { "FlmPerrSet", 28, 1 }, + { "MmgrCacheDataSram", 24, 1 }, + { "MmgrCacheTagFifo", 23, 1 }, + { "DbL2tLutPerr", 22, 1 }, + { "DbTxTidPerr", 21, 1 }, + { "DbExtPerr", 20, 1 }, + { "DbOpPerr", 19, 1 }, + { "TmCachePerr", 18, 1 }, + { "TpProtoSram", 16, 1 }, + { "HspSram", 15, 1 }, + { "RateGrpSram", 14, 1 }, + { "TxFbSeqFifo", 13, 1 }, + { "CmDataSram", 12, 1 }, + { "CmTagFifo", 11, 1 }, + { "RfcOpFifo", 10, 1 }, + { "DelInvFifo", 9, 1 }, + { "RssCfgSram", 8, 1 }, + { "RssKeySram", 7, 1 }, + { "RssLkpSram", 6, 1 }, + { "SrqSram", 5, 1 }, + { "ArpDaSram", 4, 1 }, + { "ArpSaSram", 3, 1 }, + { "ArpGreSram", 2, 1 }, + { "ArpIpsecSram1", 1, 1 }, + { "ArpIpsecSram0", 0, 1 }, + { "TP_O_PERR_CAUSE", 0x7f54, 0 }, + { "DmarbtPerr", 31, 1 }, + { "FlmPerrSet", 28, 1 }, + { "MmgrCacheDataSram", 24, 1 }, + { "MmgrCacheTagFifo", 23, 1 }, + { "DbL2tLutPerr", 22, 1 }, + { "DbTxTidPerr", 21, 1 }, + { "DbExtPerr", 20, 1 }, + { "DbOpPerr", 19, 1 }, + { "TmCachePerr", 18, 1 }, + { "TpProtoSram", 16, 1 }, + { "HspSram", 15, 1 }, + { "RateGrpSram", 14, 1 }, + { "TxFbSeqFifo", 13, 1 }, + { "CmDataSram", 12, 1 }, + { "CmTagFifo", 11, 1 }, + { "RfcOpFifo", 10, 1 }, + { "DelInvFifo", 9, 1 }, + { "RssCfgSram", 8, 1 }, + { "RssKeySram", 7, 1 }, + { "RssLkpSram", 6, 1 }, + { "SrqSram", 5, 1 }, + { "ArpDaSram", 4, 1 }, + { "ArpSaSram", 3, 1 }, + { "ArpGreSram", 2, 1 }, + { "ArpIpsecSram1", 1, 1 }, + { "ArpIpsecSram0", 0, 1 }, + { "TP_CERR_ENABLE", 0x7f58, 0 }, + { "TpcEgDataFifo", 8, 1 }, + { "TpcLbkDataFifo", 7, 1 }, + { "RssLkpSram", 6, 1 }, + { "SrqSram", 5, 1 }, + { "ArpDaSram", 4, 1 }, + { "ArpSaSram", 3, 1 }, + { "ArpGreSram", 2, 1 }, + { "ArpIpsecSram1", 1, 1 }, + { "ArpIpsecSram0", 0, 1 }, + { "TP_CERR_CAUSE", 0x7f5c, 0 }, + { "TpcEgDataFifo", 8, 1 }, + { "TpcLbkDataFifo", 7, 1 }, + { "RssLkpSram", 6, 1 }, + { "SrqSram", 5, 1 }, + { "ArpDaSram", 4, 1 }, + { "ArpSaSram", 3, 1 }, + { "ArpGreSram", 2, 1 }, + { "ArpIpsecSram1", 1, 1 }, + { "ArpIpsecSram0", 0, 1 }, + { NULL } +}; + +struct reg_info t7_ulp_tx_regs[] = { + { "ULP_TX_CONFIG", 0x8dc0, 0 }, + { "LB_LEN_SEL", 28, 1 }, + { "Disable_Tpt_Credit_Chk", 27, 1 }, + { "ReqSrc", 26, 1 }, + { "Err2uP", 25, 1 }, + { "SGE_Invalidate_Dis", 24, 1 }, + { "RoCE_AckReq_Ctrl", 23, 1 }, + { "Mem_Addr_Ctrl", 21, 2 }, + { "Tpt_Extension_Mode", 20, 1 }, + { "xrc_indication", 19, 1 }, + { "lso_1seg_len_upd_en", 18, 1 }, + { "PKT_ISGL_ERR_ST_EN", 17, 1 }, + { "ULIMIT_EXCLUSIVE_FIX", 16, 1 }, + { "ISO_A_FLAG_EN", 15, 1 }, + { "IWARP_SEQ_FLIT_DIS", 14, 1 }, + { "T10_ISO_FIX_EN", 12, 1 }, + { "CPL_FLAGS_UPDATE_EN", 11, 1 }, + { "IWARP_SEQ_UPDATE_EN", 10, 1 }, + { "SEQ_UPDATE_EN", 9, 1 }, + { "ERR_ITT_EN", 8, 1 }, + { "atomic_fix_dis", 7, 1 }, + { "PHYS_ADDR_RESP_EN", 6, 1 }, + { "ENDIANESS_CHANGE", 5, 1 }, + { "ERR_RTAG_EN", 4, 1 }, + { "TSO_ETHLEN_EN", 3, 1 }, + { "emsg_more_info", 2, 1 }, + { "LOSDR", 1, 1 }, + { "extra_tag_insertion_enable", 0, 1 }, + { "ULP_TX_PERR_INJECT", 0x8dc4, 0 }, + { "MemSel", 1, 7 }, + { "InjectDataErr", 0, 1 }, + { "ULP_TX_INT_ENABLE_1", 0x8dc8, 0 }, + { "Pbl_bound_err_ch3", 31, 1 }, + { "Pbl_bound_err_ch2", 30, 1 }, + { "Pbl_bound_err_ch1", 29, 1 }, + { "Pbl_bound_err_ch0", 28, 1 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "tls_dsgl_ParErr3", 3, 1 }, + { "tls_dsgl_ParErr2", 2, 1 }, + { "tls_dsgl_ParErr1", 1, 1 }, + { "tls_dsgl_ParErr0", 0, 1 }, + { "ULP_TX_INT_CAUSE_1", 0x8dcc, 0 }, + { "Pbl_bound_err_ch3", 31, 1 }, + { "Pbl_bound_err_ch2", 30, 1 }, + { "Pbl_bound_err_ch1", 29, 1 }, + { "Pbl_bound_err_ch0", 28, 1 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "tls_dsgl_ParErr3", 3, 1 }, + { "tls_dsgl_ParErr2", 2, 1 }, + { "tls_dsgl_ParErr1", 1, 1 }, + { "tls_dsgl_ParErr0", 0, 1 }, + { "ULP_TX_PERR_ENABLE_1", 0x8dd0, 0 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "tls_dsgl_ParErr3", 3, 1 }, + { "tls_dsgl_ParErr2", 2, 1 }, + { "tls_dsgl_ParErr1", 1, 1 }, + { "tls_dsgl_ParErr0", 0, 1 }, + { "ULP_TX_TPT_LLIMIT", 0x8dd4, 0 }, + { "ULP_TX_TPT_ULIMIT", 0x8dd8, 0 }, + { "ULP_TX_PBL_LLIMIT", 0x8ddc, 0 }, + { "ULP_TX_PBL_ULIMIT", 0x8de0, 0 }, + { "ULP_TX_NVME_TCP_TPT_LLIMIT", 0x8fa4, 0 }, + { "ULP_TX_NVME_TCP_TPT_ULIMIT", 0x8fa8, 0 }, + { "ULP_TX_NVME_TCP_PBL_LLIMIT", 0x8fac, 0 }, + { "ULP_TX_NVME_TCP_PBL_ULIMIT", 0x8fb0, 0 }, + { "ULP_TX_DBG_CTL", 0x8fb8, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG_L", 16, 1 }, + { "SEL_L", 0, 8 }, + { "ULP_TX_DBG_DATA", 0x8fbc, 0 }, + { "ULP_TX_TLS_CTL", 0x8de4, 0 }, + { "TlsPerrEn", 4, 1 }, + { "TlsDisableIFuse", 2, 1 }, + { "TlsDisableCFuse", 1, 1 }, + { "TlsDisable", 0, 1 }, + { "ULP_TX_FID_1", 0x8de8, 0 }, + { "ULP_TX_CPL_PACK_SIZE1", 0x8df8, 0 }, + { "Ch3Size1", 24, 8 }, + { "Ch2Size1", 16, 8 }, + { "Ch1Size1", 8, 8 }, + { "Ch0Size1", 0, 8 }, + { "ULP_TX_CPL_PACK_SIZE2", 0x8dfc, 0 }, + { "Ch3Size2", 24, 8 }, + { "Ch2Size2", 16, 8 }, + { "Ch1Size2", 8, 8 }, + { "Ch0Size2", 0, 8 }, + { "ULP_TX_ERR_MSG2CIM", 0x8e00, 0 }, + { "ULP_TX_ERR_TABLE_BASE", 0x8e04, 0 }, + { "ULP_TX_ERR_CNT_CH0", 0x8e10, 0 }, + { "ULP_TX_ERR_CNT_CH1", 0x8e14, 0 }, + { "ULP_TX_ERR_CNT_CH2", 0x8e18, 0 }, + { "ULP_TX_ERR_CNT_CH3", 0x8e1c, 0 }, + { "ULP_TX_FC_SOF", 0x8e20, 0 }, + { "SOF_FS3", 24, 8 }, + { "SOF_FS2", 16, 8 }, + { "SOF_3", 8, 8 }, + { "SOF_2", 0, 8 }, + { "ULP_TX_FC_EOF", 0x8e24, 0 }, + { "EOF_LS3", 24, 8 }, + { "EOF_LS2", 16, 8 }, + { "EOF_3", 8, 8 }, + { "EOF_2", 0, 8 }, + { "ULP_TX_CGEN_GLOBAL", 0x8e28, 0 }, + { "ULP_TX_CGEN", 0x8e2c, 0 }, + { "ULP_TX_CGEN_Storage", 8, 4 }, + { "ULP_TX_CGEN_RDMA", 4, 4 }, + { "ULP_TX_CGEN_Channel", 0, 4 }, + { "ULP_TX_MEM_CFG", 0x8e30, 0 }, + { "GlobalEnable", 31, 1 }, + { "RDREQ_SZ", 3, 3 }, + { "WRREQ_SZ", 0, 3 }, + { "ULP_TX_INT_ENABLE_2", 0x8e7c, 0 }, + { "edma_in_fifo_perr_set3", 31, 1 }, + { "edma_in_fifo_perr_set2", 30, 1 }, + { "edma_in_fifo_perr_set1", 29, 1 }, + { "edma_in_fifo_perr_set0", 28, 1 }, + { "align_ctl_fifo_perr_set3", 27, 1 }, + { "align_ctl_fifo_perr_set2", 26, 1 }, + { "align_ctl_fifo_perr_set1", 25, 1 }, + { "align_ctl_fifo_perr_set0", 24, 1 }, + { "sge_fifo_perr_set3", 23, 1 }, + { "sge_fifo_perr_set2", 22, 1 }, + { "sge_fifo_perr_set1", 21, 1 }, + { "sge_fifo_perr_set0", 20, 1 }, + { "stag_fifo_perr_set3", 19, 1 }, + { "stag_fifo_perr_set2", 18, 1 }, + { "stag_fifo_perr_set1", 17, 1 }, + { "stag_fifo_perr_set0", 16, 1 }, + { "map_fifo_perr_set3", 15, 1 }, + { "map_fifo_perr_set2", 14, 1 }, + { "map_fifo_perr_set1", 13, 1 }, + { "map_fifo_perr_set0", 12, 1 }, + { "dma_fifo_perr_set3", 11, 1 }, + { "dma_fifo_perr_set2", 10, 1 }, + { "dma_fifo_perr_set1", 9, 1 }, + { "dma_fifo_perr_set0", 8, 1 }, + { "fso_hdr_sram_perr_set3", 7, 1 }, + { "fso_hdr_sram_perr_set2", 6, 1 }, + { "fso_hdr_sram_perr_set1", 5, 1 }, + { "fso_hdr_sram_perr_set0", 4, 1 }, + { "t10_pi_sram_perr_set3", 3, 1 }, + { "t10_pi_sram_perr_set2", 2, 1 }, + { "t10_pi_sram_perr_set1", 1, 1 }, + { "t10_pi_sram_perr_set0", 0, 1 }, + { "ULP_TX_INT_CAUSE_2", 0x8e80, 0 }, + { "edma_in_fifo_perr_set3", 31, 1 }, + { "edma_in_fifo_perr_set2", 30, 1 }, + { "edma_in_fifo_perr_set1", 29, 1 }, + { "edma_in_fifo_perr_set0", 28, 1 }, + { "align_ctl_fifo_perr_set3", 27, 1 }, + { "align_ctl_fifo_perr_set2", 26, 1 }, + { "align_ctl_fifo_perr_set1", 25, 1 }, + { "align_ctl_fifo_perr_set0", 24, 1 }, + { "sge_fifo_perr_set3", 23, 1 }, + { "sge_fifo_perr_set2", 22, 1 }, + { "sge_fifo_perr_set1", 21, 1 }, + { "sge_fifo_perr_set0", 20, 1 }, + { "stag_fifo_perr_set3", 19, 1 }, + { "stag_fifo_perr_set2", 18, 1 }, + { "stag_fifo_perr_set1", 17, 1 }, + { "stag_fifo_perr_set0", 16, 1 }, + { "map_fifo_perr_set3", 15, 1 }, + { "map_fifo_perr_set2", 14, 1 }, + { "map_fifo_perr_set1", 13, 1 }, + { "map_fifo_perr_set0", 12, 1 }, + { "dma_fifo_perr_set3", 11, 1 }, + { "dma_fifo_perr_set2", 10, 1 }, + { "dma_fifo_perr_set1", 9, 1 }, + { "dma_fifo_perr_set0", 8, 1 }, + { "fso_hdr_sram_perr_set3", 7, 1 }, + { "fso_hdr_sram_perr_set2", 6, 1 }, + { "fso_hdr_sram_perr_set1", 5, 1 }, + { "fso_hdr_sram_perr_set0", 4, 1 }, + { "t10_pi_sram_perr_set3", 3, 1 }, + { "t10_pi_sram_perr_set2", 2, 1 }, + { "t10_pi_sram_perr_set1", 1, 1 }, + { "t10_pi_sram_perr_set0", 0, 1 }, + { "ULP_TX_PERR_ENABLE_2", 0x8e84, 0 }, + { "edma_in_fifo_perr_set3", 31, 1 }, + { "edma_in_fifo_perr_set2", 30, 1 }, + { "edma_in_fifo_perr_set1", 29, 1 }, + { "edma_in_fifo_perr_set0", 28, 1 }, + { "align_ctl_fifo_perr_set3", 27, 1 }, + { "align_ctl_fifo_perr_set2", 26, 1 }, + { "align_ctl_fifo_perr_set1", 25, 1 }, + { "align_ctl_fifo_perr_set0", 24, 1 }, + { "sge_fifo_perr_set3", 23, 1 }, + { "sge_fifo_perr_set2", 22, 1 }, + { "sge_fifo_perr_set1", 21, 1 }, + { "sge_fifo_perr_set0", 20, 1 }, + { "stag_fifo_perr_set3", 19, 1 }, + { "stag_fifo_perr_set2", 18, 1 }, + { "stag_fifo_perr_set1", 17, 1 }, + { "stag_fifo_perr_set0", 16, 1 }, + { "map_fifo_perr_set3", 15, 1 }, + { "map_fifo_perr_set2", 14, 1 }, + { "map_fifo_perr_set1", 13, 1 }, + { "map_fifo_perr_set0", 12, 1 }, + { "dma_fifo_perr_set3", 11, 1 }, + { "dma_fifo_perr_set2", 10, 1 }, + { "dma_fifo_perr_set1", 9, 1 }, + { "dma_fifo_perr_set0", 8, 1 }, + { "fso_hdr_sram_perr_set3", 7, 1 }, + { "fso_hdr_sram_perr_set2", 6, 1 }, + { "fso_hdr_sram_perr_set1", 5, 1 }, + { "fso_hdr_sram_perr_set0", 4, 1 }, + { "t10_pi_sram_perr_set3", 3, 1 }, + { "t10_pi_sram_perr_set2", 2, 1 }, + { "t10_pi_sram_perr_set1", 1, 1 }, + { "t10_pi_sram_perr_set0", 0, 1 }, + { "ULP_TX_INT_ENABLE_3", 0x8e88, 0 }, + { "gf_sge_fifo_ParErr3", 31, 1 }, + { "gf_sge_fifo_ParErr2", 30, 1 }, + { "gf_sge_fifo_ParErr1", 29, 1 }, + { "gf_sge_fifo_ParErr0", 28, 1 }, + { "dedupe_sge_fifo_ParErr3", 27, 1 }, + { "dedupe_sge_fifo_ParErr2", 26, 1 }, + { "dedupe_sge_fifo_ParErr1", 25, 1 }, + { "dedupe_sge_fifo_ParErr0", 24, 1 }, + { "gf3_dsgl_fifo_ParErr", 23, 1 }, + { "gf2_dsgl_fifo_ParErr", 22, 1 }, + { "gf1_dsgl_fifo_ParErr", 21, 1 }, + { "gf0_dsgl_fifo_ParErr", 20, 1 }, + { "dedupe3_dsgl_fifo_ParErr", 19, 1 }, + { "dedupe2_dsgl_fifo_ParErr", 18, 1 }, + { "dedupe1_dsgl_fifo_ParErr", 17, 1 }, + { "dedupe0_dsgl_fifo_ParErr", 16, 1 }, + { "xp10_sge_fifo_ParErr", 15, 1 }, + { "dsgl_par_err", 14, 1 }, + { "cddip_int", 13, 1 }, + { "cceip_int", 12, 1 }, + { "tls_sge_fifo_ParErr3", 11, 1 }, + { "tls_sge_fifo_ParErr2", 10, 1 }, + { "tls_sge_fifo_ParErr1", 9, 1 }, + { "tls_sge_fifo_ParErr0", 8, 1 }, + { "ulp2smarbt_rsp_perr", 6, 1 }, + { "ulptx2ma_rsp_perr", 5, 1 }, + { "pcie2ulp_perr3", 4, 1 }, + { "pcie2ulp_perr2", 3, 1 }, + { "pcie2ulp_perr1", 2, 1 }, + { "pcie2ulp_perr0", 1, 1 }, + { "cim2ulp_perr", 0, 1 }, + { "ULP_TX_INT_CAUSE_3", 0x8e8c, 0 }, + { "gf_sge_fifo_ParErr3", 31, 1 }, + { "gf_sge_fifo_ParErr2", 30, 1 }, + { "gf_sge_fifo_ParErr1", 29, 1 }, + { "gf_sge_fifo_ParErr0", 28, 1 }, + { "dedupe_sge_fifo_ParErr3", 27, 1 }, + { "dedupe_sge_fifo_ParErr2", 26, 1 }, + { "dedupe_sge_fifo_ParErr1", 25, 1 }, + { "dedupe_sge_fifo_ParErr0", 24, 1 }, + { "gf3_dsgl_fifo_ParErr", 23, 1 }, + { "gf2_dsgl_fifo_ParErr", 22, 1 }, + { "gf1_dsgl_fifo_ParErr", 21, 1 }, + { "gf0_dsgl_fifo_ParErr", 20, 1 }, + { "dedupe3_dsgl_fifo_ParErr", 19, 1 }, + { "dedupe2_dsgl_fifo_ParErr", 18, 1 }, + { "dedupe1_dsgl_fifo_ParErr", 17, 1 }, + { "dedupe0_dsgl_fifo_ParErr", 16, 1 }, + { "xp10_sge_fifo_ParErr", 15, 1 }, + { "dsgl_par_err", 14, 1 }, + { "cddip_int", 13, 1 }, + { "cceip_int", 12, 1 }, + { "tls_sge_fifo_ParErr3", 11, 1 }, + { "tls_sge_fifo_ParErr2", 10, 1 }, + { "tls_sge_fifo_ParErr1", 9, 1 }, + { "tls_sge_fifo_ParErr0", 8, 1 }, + { "ulp2smarbt_rsp_perr", 6, 1 }, + { "ulptx2ma_rsp_perr", 5, 1 }, + { "pcie2ulp_perr3", 4, 1 }, + { "pcie2ulp_perr2", 3, 1 }, + { "pcie2ulp_perr1", 2, 1 }, + { "pcie2ulp_perr0", 1, 1 }, + { "cim2ulp_perr", 0, 1 }, + { "ULP_TX_PERR_ENABLE_3", 0x8e90, 0 }, + { "gf_sge_fifo_ParErr3", 31, 1 }, + { "gf_sge_fifo_ParErr2", 30, 1 }, + { "gf_sge_fifo_ParErr1", 29, 1 }, + { "gf_sge_fifo_ParErr0", 28, 1 }, + { "dedupe_sge_fifo_ParErr3", 27, 1 }, + { "dedupe_sge_fifo_ParErr2", 26, 1 }, + { "dedupe_sge_fifo_ParErr1", 25, 1 }, + { "dedupe_sge_fifo_ParErr0", 24, 1 }, + { "gf3_dsgl_fifo_ParErr", 23, 1 }, + { "gf2_dsgl_fifo_ParErr", 22, 1 }, + { "gf1_dsgl_fifo_ParErr", 21, 1 }, + { "gf0_dsgl_fifo_ParErr", 20, 1 }, + { "dedupe3_dsgl_fifo_ParErr", 19, 1 }, + { "dedupe2_dsgl_fifo_ParErr", 18, 1 }, + { "dedupe1_dsgl_fifo_ParErr", 17, 1 }, + { "dedupe0_dsgl_fifo_ParErr", 16, 1 }, + { "xp10_sge_fifo_ParErr", 15, 1 }, + { "dsgl_par_err", 14, 1 }, + { "cddip_int", 13, 1 }, + { "cceip_int", 12, 1 }, + { "tls_sge_fifo_ParErr3", 11, 1 }, + { "tls_sge_fifo_ParErr2", 10, 1 }, + { "tls_sge_fifo_ParErr1", 9, 1 }, + { "tls_sge_fifo_ParErr0", 8, 1 }, + { "ulp2smarbt_rsp_perr", 6, 1 }, + { "ulptx2ma_rsp_perr", 5, 1 }, + { "pcie2ulp_perr3", 4, 1 }, + { "pcie2ulp_perr2", 3, 1 }, + { "pcie2ulp_perr1", 2, 1 }, + { "pcie2ulp_perr0", 1, 1 }, + { "cim2ulp_perr", 0, 1 }, + { "ULP_TX_INT_ENABLE_4", 0x8e94, 0 }, + { "dma_par_err3", 28, 4 }, + { "dma_par_err2", 24, 4 }, + { "dma_par_err1", 20, 4 }, + { "dma_par_err0", 16, 4 }, + { "core_cmd_fifo_lb1", 12, 4 }, + { "core_cmd_fifo_lb0", 8, 4 }, + { "xp10_2_ulp_perr", 7, 1 }, + { "ulp_2_xp10_perr", 6, 1 }, + { "cmd_fifo_lb1", 5, 1 }, + { "cmd_fifo_lb0", 4, 1 }, + { "tf_tp_perr", 3, 1 }, + { "tf_sge_perr", 2, 1 }, + { "tf_mem_perr", 1, 1 }, + { "tf_mp_perr", 0, 1 }, + { "ULP_TX_INT_CAUSE_4", 0x8e98, 0 }, + { "dma_par_err3", 28, 4 }, + { "dma_par_err2", 24, 4 }, + { "dma_par_err1", 20, 4 }, + { "dma_par_err0", 16, 4 }, + { "core_cmd_fifo_lb1", 12, 4 }, + { "core_cmd_fifo_lb0", 8, 4 }, + { "xp10_2_ulp_perr", 7, 1 }, + { "ulp_2_xp10_perr", 6, 1 }, + { "cmd_fifo_lb1", 5, 1 }, + { "cmd_fifo_lb0", 4, 1 }, + { "tf_tp_perr", 3, 1 }, + { "tf_sge_perr", 2, 1 }, + { "tf_mem_perr", 1, 1 }, + { "tf_mp_perr", 0, 1 }, + { "ULP_TX_PERR_ENABLE_4", 0x8e9c, 0 }, + { "dma_par_err3", 28, 4 }, + { "dma_par_err2", 24, 4 }, + { "dma_par_err1", 20, 4 }, + { "dma_par_err0", 16, 4 }, + { "core_cmd_fifo_lb1", 12, 4 }, + { "core_cmd_fifo_lb0", 8, 4 }, + { "xp10_2_ulp_perr", 7, 1 }, + { "ulp_2_xp10_perr", 6, 1 }, + { "cmd_fifo_lb1", 5, 1 }, + { "cmd_fifo_lb0", 4, 1 }, + { "tf_tp_perr", 3, 1 }, + { "tf_sge_perr", 2, 1 }, + { "tf_mem_perr", 1, 1 }, + { "tf_mp_perr", 0, 1 }, + { "ULP_TX_INT_ENABLE_5", 0x8ec4, 0 }, + { "DeDupe_Perr3", 23, 1 }, + { "DeDupe_Perr2", 22, 1 }, + { "DeDupe_Perr1", 21, 1 }, + { "DeDupe_Perr0", 20, 1 }, + { "GF_Perr3", 19, 1 }, + { "GF_Perr2", 18, 1 }, + { "GF_Perr1", 17, 1 }, + { "GF_Perr0", 16, 1 }, + { "SGE2ULP_inv_perr", 13, 1 }, + { "PL_BusPerr", 12, 1 }, + { "TLSTX2ULPTX_Perr3", 11, 1 }, + { "TLSTX2ULPTX_Perr2", 10, 1 }, + { "TLSTX2ULPTX_Perr1", 9, 1 }, + { "TLSTX2ULPTX_Perr0", 8, 1 }, + { "xp10_2_ulp_pl_perr", 1, 1 }, + { "ulp_2_xp10_pl_perr", 0, 1 }, + { "ULP_TX_INT_CAUSE_5", 0x8ec8, 0 }, + { "DeDupe_Perr3", 23, 1 }, + { "DeDupe_Perr2", 22, 1 }, + { "DeDupe_Perr1", 21, 1 }, + { "DeDupe_Perr0", 20, 1 }, + { "GF_Perr3", 19, 1 }, + { "GF_Perr2", 18, 1 }, + { "GF_Perr1", 17, 1 }, + { "GF_Perr0", 16, 1 }, + { "SGE2ULP_inv_perr", 13, 1 }, + { "PL_BusPerr", 12, 1 }, + { "TLSTX2ULPTX_Perr3", 11, 1 }, + { "TLSTX2ULPTX_Perr2", 10, 1 }, + { "TLSTX2ULPTX_Perr1", 9, 1 }, + { "TLSTX2ULPTX_Perr0", 8, 1 }, + { "xp10_2_ulp_pl_perr", 1, 1 }, + { "ulp_2_xp10_pl_perr", 0, 1 }, + { "ULP_TX_PERR_ENABLE_5", 0x8ecc, 0 }, + { "DeDupe_Perr3", 23, 1 }, + { "DeDupe_Perr2", 22, 1 }, + { "DeDupe_Perr1", 21, 1 }, + { "DeDupe_Perr0", 20, 1 }, + { "GF_Perr3", 19, 1 }, + { "GF_Perr2", 18, 1 }, + { "GF_Perr1", 17, 1 }, + { "GF_Perr0", 16, 1 }, + { "SGE2ULP_inv_perr", 13, 1 }, + { "PL_BusPerr", 12, 1 }, + { "TLSTX2ULPTX_Perr3", 11, 1 }, + { "TLSTX2ULPTX_Perr2", 10, 1 }, + { "TLSTX2ULPTX_Perr1", 9, 1 }, + { "TLSTX2ULPTX_Perr0", 8, 1 }, + { "xp10_2_ulp_pl_perr", 1, 1 }, + { "ulp_2_xp10_pl_perr", 0, 1 }, + { "ULP_TX_INT_CAUSE_6", 0x8ed0, 0 }, + { "DDR_hdr_fifo_perr_set3", 12, 1 }, + { "DDR_hdr_fifo_perr_set2", 11, 1 }, + { "DDR_hdr_fifo_perr_set1", 10, 1 }, + { "DDR_hdr_fifo_perr_set0", 9, 1 }, + { "pre_MP_rsp_perr_set3", 8, 1 }, + { "pre_MP_rsp_perr_set2", 7, 1 }, + { "pre_MP_rsp_perr_set1", 6, 1 }, + { "pre_MP_rsp_perr_set0", 5, 1 }, + { "pre_CQE_fifo_perr_set3", 4, 1 }, + { "pre_CQE_fifo_perr_set2", 3, 1 }, + { "pre_CQE_fifo_perr_set1", 2, 1 }, + { "pre_CQE_fifo_perr_set0", 1, 1 }, + { "rsp_fifo_perr_set", 0, 1 }, + { "ULP_TX_INT_ENABLE_6", 0x8ed4, 0 }, + { "DDR_hdr_fifo_perr_set3", 12, 1 }, + { "DDR_hdr_fifo_perr_set2", 11, 1 }, + { "DDR_hdr_fifo_perr_set1", 10, 1 }, + { "DDR_hdr_fifo_perr_set0", 9, 1 }, + { "pre_MP_rsp_perr_set3", 8, 1 }, + { "pre_MP_rsp_perr_set2", 7, 1 }, + { "pre_MP_rsp_perr_set1", 6, 1 }, + { "pre_MP_rsp_perr_set0", 5, 1 }, + { "pre_CQE_fifo_perr_set3", 4, 1 }, + { "pre_CQE_fifo_perr_set2", 3, 1 }, + { "pre_CQE_fifo_perr_set1", 2, 1 }, + { "pre_CQE_fifo_perr_set0", 1, 1 }, + { "rsp_fifo_perr_set", 0, 1 }, + { "ULP_TX_PERR_ENABLE_6", 0x8ed8, 0 }, + { "DDR_hdr_fifo_perr_set3", 12, 1 }, + { "DDR_hdr_fifo_perr_set2", 11, 1 }, + { "DDR_hdr_fifo_perr_set1", 10, 1 }, + { "DDR_hdr_fifo_perr_set0", 9, 1 }, + { "pre_MP_rsp_perr_set3", 8, 1 }, + { "pre_MP_rsp_perr_set2", 7, 1 }, + { "pre_MP_rsp_perr_set1", 6, 1 }, + { "pre_MP_rsp_perr_set0", 5, 1 }, + { "pre_CQE_fifo_perr_set3", 4, 1 }, + { "pre_CQE_fifo_perr_set2", 3, 1 }, + { "pre_CQE_fifo_perr_set1", 2, 1 }, + { "pre_CQE_fifo_perr_set0", 1, 1 }, + { "rsp_fifo_perr_set", 0, 1 }, + { "ULP_TX_INT_CAUSE_7", 0x8edc, 0 }, + { "tls_sge_fifo_CorErr3", 23, 1 }, + { "tls_sge_fifo_CorErr2", 22, 1 }, + { "tls_sge_fifo_CorErr1", 21, 1 }, + { "tls_sge_fifo_CorErr0", 20, 1 }, + { "lso_hdr_sram_cerr_set3", 19, 1 }, + { "lso_hdr_sram_cerr_set2", 18, 1 }, + { "lso_hdr_sram_cerr_set1", 17, 1 }, + { "lso_hdr_sram_cerr_set0", 16, 1 }, + { "core_cmd_fifo_cerr_set_ch3_lb1", 15, 1 }, + { "core_cmd_fifo_cerr_set_ch2_lb1", 14, 1 }, + { "core_cmd_fifo_cerr_set_ch1_lb1", 13, 1 }, + { "core_cmd_fifo_cerr_set_ch0_lb1", 12, 1 }, + { "core_cmd_fifo_cerr_set_ch3_lb0", 11, 1 }, + { "core_cmd_fifo_cerr_set_ch2_lb0", 10, 1 }, + { "core_cmd_fifo_cerr_set_ch1_lb0", 9, 1 }, + { "core_cmd_fifo_cerr_set_ch0_lb0", 8, 1 }, + { "CQE_fifo_cerr_set3", 7, 1 }, + { "CQE_fifo_cerr_set2", 6, 1 }, + { "CQE_fifo_cerr_set1", 5, 1 }, + { "CQE_fifo_cerr_set0", 4, 1 }, + { "pre_CQE_fifo_cerr_set3", 3, 1 }, + { "pre_CQE_fifo_cerr_set2", 2, 1 }, + { "pre_CQE_fifo_cerr_set1", 1, 1 }, + { "pre_CQE_fifo_cerr_set0", 0, 1 }, + { "ULP_TX_INT_ENABLE_7", 0x8ee0, 0 }, + { "tls_sge_fifo_CorErr3", 23, 1 }, + { "tls_sge_fifo_CorErr2", 22, 1 }, + { "tls_sge_fifo_CorErr1", 21, 1 }, + { "tls_sge_fifo_CorErr0", 20, 1 }, + { "lso_hdr_sram_cerr_set3", 19, 1 }, + { "lso_hdr_sram_cerr_set2", 18, 1 }, + { "lso_hdr_sram_cerr_set1", 17, 1 }, + { "lso_hdr_sram_cerr_set0", 16, 1 }, + { "core_cmd_fifo_cerr_set_ch3_lb1", 15, 1 }, + { "core_cmd_fifo_cerr_set_ch2_lb1", 14, 1 }, + { "core_cmd_fifo_cerr_set_ch1_lb1", 13, 1 }, + { "core_cmd_fifo_cerr_set_ch0_lb1", 12, 1 }, + { "core_cmd_fifo_cerr_set_ch3_lb0", 11, 1 }, + { "core_cmd_fifo_cerr_set_ch2_lb0", 10, 1 }, + { "core_cmd_fifo_cerr_set_ch1_lb0", 9, 1 }, + { "core_cmd_fifo_cerr_set_ch0_lb0", 8, 1 }, + { "CQE_fifo_cerr_set3", 7, 1 }, + { "CQE_fifo_cerr_set2", 6, 1 }, + { "CQE_fifo_cerr_set1", 5, 1 }, + { "CQE_fifo_cerr_set0", 4, 1 }, + { "pre_CQE_fifo_cerr_set3", 3, 1 }, + { "pre_CQE_fifo_cerr_set2", 2, 1 }, + { "pre_CQE_fifo_cerr_set1", 1, 1 }, + { "pre_CQE_fifo_cerr_set0", 0, 1 }, + { "ULP_TX_INT_CAUSE_8", 0x8ee4, 0 }, + { "mem_rsp_fifo_cerr_set3", 28, 1 }, + { "mem_rsp_fifo_cerr_set2", 27, 1 }, + { "mem_rsp_fifo_cerr_set1", 26, 1 }, + { "mem_rsp_fifo_cerr_set0", 25, 1 }, + { "pi_sram_cerr_set3", 24, 1 }, + { "pi_sram_cerr_set2", 23, 1 }, + { "pi_sram_cerr_set1", 22, 1 }, + { "pi_sram_cerr_set0", 21, 1 }, + { "pre_MP_rsp_cerr_set3", 20, 1 }, + { "pre_MP_rsp_cerr_set2", 19, 1 }, + { "pre_MP_rsp_cerr_set1", 18, 1 }, + { "pre_MP_rsp_cerr_set0", 17, 1 }, + { "DDR_hdr_fifo_cerr_set3", 16, 1 }, + { "DDR_hdr_fifo_cerr_set2", 15, 1 }, + { "DDR_hdr_fifo_cerr_set1", 14, 1 }, + { "DDR_hdr_fifo_cerr_set0", 13, 1 }, + { "cmd_fifo_cerr_set3", 12, 1 }, + { "cmd_fifo_cerr_set2", 11, 1 }, + { "cmd_fifo_cerr_set1", 10, 1 }, + { "cmd_fifo_cerr_set0", 9, 1 }, + { "gf_sge_fifo_CorErr3", 8, 1 }, + { "gf_sge_fifo_CorErr2", 7, 1 }, + { "gf_sge_fifo_CorErr1", 6, 1 }, + { "gf_sge_fifo_CorErr0", 5, 1 }, + { "dedupe_sge_fifo_CorErr3", 4, 1 }, + { "dedupe_sge_fifo_CorErr2", 3, 1 }, + { "dedupe_sge_fifo_CorErr1", 2, 1 }, + { "dedupe_sge_fifo_CorErr0", 1, 1 }, + { "rsp_fifo_cerr_set", 0, 1 }, + { "ULP_TX_INT_ENABLE_8", 0x8ee8, 0 }, + { "mem_rsp_fifo_cerr_set3", 28, 1 }, + { "mem_rsp_fifo_cerr_set2", 27, 1 }, + { "mem_rsp_fifo_cerr_set1", 26, 1 }, + { "mem_rsp_fifo_cerr_set0", 25, 1 }, + { "pi_sram_cerr_set3", 24, 1 }, + { "pi_sram_cerr_set2", 23, 1 }, + { "pi_sram_cerr_set1", 22, 1 }, + { "pi_sram_cerr_set0", 21, 1 }, + { "pre_MP_rsp_cerr_set3", 20, 1 }, + { "pre_MP_rsp_cerr_set2", 19, 1 }, + { "pre_MP_rsp_cerr_set1", 18, 1 }, + { "pre_MP_rsp_cerr_set0", 17, 1 }, + { "DDR_hdr_fifo_cerr_set3", 16, 1 }, + { "DDR_hdr_fifo_cerr_set2", 15, 1 }, + { "DDR_hdr_fifo_cerr_set1", 14, 1 }, + { "DDR_hdr_fifo_cerr_set0", 13, 1 }, + { "cmd_fifo_cerr_set3", 12, 1 }, + { "cmd_fifo_cerr_set2", 11, 1 }, + { "cmd_fifo_cerr_set1", 10, 1 }, + { "cmd_fifo_cerr_set0", 9, 1 }, + { "gf_sge_fifo_CorErr3", 8, 1 }, + { "gf_sge_fifo_CorErr2", 7, 1 }, + { "gf_sge_fifo_CorErr1", 6, 1 }, + { "gf_sge_fifo_CorErr0", 5, 1 }, + { "dedupe_sge_fifo_CorErr3", 4, 1 }, + { "dedupe_sge_fifo_CorErr2", 3, 1 }, + { "dedupe_sge_fifo_CorErr1", 2, 1 }, + { "dedupe_sge_fifo_CorErr0", 1, 1 }, + { "rsp_fifo_cerr_set", 0, 1 }, + { "ULP_TX_SE_CNT_ERR", 0x8ea0, 0 }, + { "ERR_CH3", 12, 4 }, + { "ERR_CH2", 8, 4 }, + { "ERR_CH1", 4, 4 }, + { "ERR_CH0", 0, 4 }, + { "ULP_TX_SE_CNT_CLR", 0x8ea4, 0 }, + { "CLR_DROP", 16, 4 }, + { "CLR_CH3", 12, 4 }, + { "CLR_CH2", 8, 4 }, + { "CLR_CH1", 4, 4 }, + { "CLR_CH0", 0, 4 }, + { "ULP_TX_SE_CNT_CH0", 0x8ea8, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH1", 0x8eac, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH2", 0x8eb0, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH3", 0x8eb4, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_DROP_CNT", 0x8eb8, 0 }, + { "DROP_INVLD_MC_CH3", 28, 4 }, + { "DROP_INVLD_MC_CH2", 24, 4 }, + { "DROP_INVLD_MC_CH1", 20, 4 }, + { "DROP_INVLD_MC_CH0", 16, 4 }, + { "DROP_CH3", 12, 4 }, + { "DROP_CH2", 8, 4 }, + { "DROP_CH1", 4, 4 }, + { "DROP_CH0", 0, 4 }, + { "ULP_TX_CSU_REVISION", 0x8ebc, 0 }, + { "ULP_TX_CPL_TX_DATA_FLAGS_MASK", 0x8f88, 0 }, + { "bypass_first", 26, 1 }, + { "bypass_middle", 25, 1 }, + { "bypass_last", 24, 1 }, + { "push_first", 22, 1 }, + { "push_middle", 21, 1 }, + { "push_last", 20, 1 }, + { "save_first", 18, 1 }, + { "save_middle", 17, 1 }, + { "save_last", 16, 1 }, + { "flush_first", 14, 1 }, + { "flush_middle", 13, 1 }, + { "flush_last", 12, 1 }, + { "urgent_first", 10, 1 }, + { "urgent_middle", 9, 1 }, + { "urgent_last", 8, 1 }, + { "more_first", 6, 1 }, + { "more_middle", 5, 1 }, + { "more_last", 4, 1 }, + { "shove_first", 2, 1 }, + { "shove_middle", 1, 1 }, + { "shove_last", 0, 1 }, + { "ULP_TX_ACCELERATOR_CTL", 0x8f90, 0 }, + { "Fifo_Threshold", 8, 5 }, + { "compression_xp10DisableCFuse", 5, 1 }, + { "compression_xp10Disable", 4, 1 }, + { "DeDupeDisableCFuse", 3, 1 }, + { "DeDupeDisable", 2, 1 }, + { "GFDisableCFuse", 1, 1 }, + { "GFDisable", 0, 1 }, + { "ULP_TX_XP10_IND_ADDR", 0x8f94, 0 }, + { "xp10_control", 31, 1 }, + { "xp10_addr", 0, 20 }, + { "ULP_TX_XP10_IND_DATA", 0x8f98, 0 }, + { "ULP_TX_IWARP_PMOF_OPCODES_1", 0x8f9c, 0 }, + { "Rdma_Verify_Response", 24, 5 }, + { "Rdma_Verify_Request", 16, 5 }, + { "Rdma_Flush_Response", 8, 5 }, + { "Rdma_Flush_Request", 0, 5 }, + { "ULP_TX_IWARP_PMOF_OPCODES_2", 0x8fa0, 0 }, + { "Rdma_Send_With_SE_Immediate", 24, 5 }, + { "Rdma_Send_With_Immediate", 16, 5 }, + { "Rdma_Atomic_Write_Response", 8, 5 }, + { "Rdma_Atomic_Write_Request", 0, 5 }, + { "ULP_TX_PL2APB_INFO", 0x8ec0, 0 }, + { "pl2apb_bridge_hung", 27, 1 }, + { "pl2apb_bridge_state", 26, 1 }, + { "pl2apb_bridge_hung_type", 25, 1 }, + { "pl2apb_bridge_hung_id", 24, 1 }, + { "pl2apb_bridge_hung_addr", 0, 20 }, + { NULL } +}; + +struct reg_info t7_pm_rx_regs[] = { + { "PM_RX_CFG", 0x8fc0, 0 }, + { "ch1_output", 27, 5 }, + { "ch2_output", 22, 5 }, + { "ch3_output", 17, 5 }, + { "strobe1", 16, 1 }, + { "ch1_input", 11, 5 }, + { "ch2_input", 6, 5 }, + { "ch3_input", 1, 5 }, + { "strobe0", 0, 1 }, + { "PM_RX_MODE", 0x8fc4, 0 }, + { "cache_hold", 13, 1 }, + { "cache_init_done", 12, 1 }, + { "cache_depth", 8, 4 }, + { "cache_init", 7, 1 }, + { "cache_sleep", 6, 1 }, + { "cache_bypass", 5, 1 }, + { "use_bundle_len", 4, 1 }, + { "stat_to_ch", 3, 1 }, + { "stat_from_ch", 1, 2 }, + { "prefetch_enable", 0, 1 }, + { "PM_RX_STAT_CONFIG", 0x8fc8, 0 }, + { "PM_RX_STAT_COUNT", 0x8fcc, 0 }, + { "PM_RX_DBG_CTRL", 0x8fd0, 0 }, + { "OspiWrBusy", 21, 4 }, + { "IspiWrBusy", 17, 4 }, + { "PMDbgAddr", 0, 17 }, + { "PM_RX_DBG_DATA", 0x8fd4, 0 }, + { "PM_RX_INT_ENABLE", 0x8fd8, 0 }, + { "master_perr", 31, 1 }, + { "ospi_overflow3", 30, 1 }, + { "ospi_overflow2", 29, 1 }, + { "ospi_overflow1", 28, 1 }, + { "ospi_overflow0", 27, 1 }, + { "ma_intf_sdc_err", 26, 1 }, + { "bundle_len_ParErr", 25, 1 }, + { "bundle_len_ovfl", 24, 1 }, + { "sdc_err", 23, 1 }, + { "zero_e_cmd_error", 22, 1 }, + { "iespi0_fifo2x_Rx_framing_error", 21, 1 }, + { "iespi1_fifo2x_Rx_framing_error", 20, 1 }, + { "iespi2_fifo2x_Rx_framing_error", 19, 1 }, + { "iespi3_fifo2x_Rx_framing_error", 18, 1 }, + { "iespi0_Rx_framing_error", 17, 1 }, + { "iespi1_Rx_framing_error", 16, 1 }, + { "iespi2_Rx_framing_error", 15, 1 }, + { "iespi3_Rx_framing_error", 14, 1 }, + { "iespi0_Tx_framing_error", 13, 1 }, + { "iespi1_Tx_framing_error", 12, 1 }, + { "iespi2_Tx_framing_error", 11, 1 }, + { "iespi3_Tx_framing_error", 10, 1 }, + { "ocspi0_Rx_framing_error", 9, 1 }, + { "ocspi1_Rx_framing_error", 8, 1 }, + { "ocspi0_Tx_framing_error", 7, 1 }, + { "ocspi1_Tx_framing_error", 6, 1 }, + { "ocspi0_ofifo2x_Tx_framing_error", 5, 1 }, + { "ocspi1_ofifo2x_Tx_framing_error", 4, 1 }, + { "ocspi_par_error", 3, 1 }, + { "db_options_par_error", 2, 1 }, + { "iespi_par_error", 1, 1 }, + { "e_pcmd_par_error", 0, 1 }, + { "PM_RX_INT_CAUSE", 0x8fdc, 0 }, + { "master_perr", 31, 1 }, + { "ospi_overflow3", 30, 1 }, + { "ospi_overflow2", 29, 1 }, + { "ospi_overflow1", 28, 1 }, + { "ospi_overflow0", 27, 1 }, + { "bundle_len_ovfl", 24, 1 }, + { "sdc_err", 23, 1 }, + { "zero_e_cmd_error", 22, 1 }, + { "iespi0_fifo2x_Rx_framing_error", 21, 1 }, + { "iespi1_fifo2x_Rx_framing_error", 20, 1 }, + { "iespi2_fifo2x_Rx_framing_error", 19, 1 }, + { "iespi3_fifo2x_Rx_framing_error", 18, 1 }, + { "iespi0_Rx_framing_error", 17, 1 }, + { "iespi1_Rx_framing_error", 16, 1 }, + { "iespi2_Rx_framing_error", 15, 1 }, + { "iespi3_Rx_framing_error", 14, 1 }, + { "iespi0_Tx_framing_error", 13, 1 }, + { "iespi1_Tx_framing_error", 12, 1 }, + { "iespi2_Tx_framing_error", 11, 1 }, + { "iespi3_Tx_framing_error", 10, 1 }, + { "ocspi0_Rx_framing_error", 9, 1 }, + { "ocspi1_Rx_framing_error", 8, 1 }, + { "ocspi0_Tx_framing_error", 7, 1 }, + { "ocspi1_Tx_framing_error", 6, 1 }, + { "ocspi0_ofifo2x_Tx_framing_error", 5, 1 }, + { "ocspi1_ofifo2x_Tx_framing_error", 4, 1 }, + { "cache_sram_error", 3, 1 }, + { "cache_lru_error", 2, 1 }, + { "cache_island_error", 1, 1 }, + { "cache_ctrl_error", 0, 1 }, + { NULL } +}; + +struct reg_info t7_pm_tx_regs[] = { + { "PM_TX_CFG", 0x8fe0, 0 }, + { "ch1_output", 27, 5 }, + { "ch2_output", 22, 5 }, + { "ch3_output", 17, 5 }, + { "strobe1", 16, 1 }, + { "ch1_input", 11, 5 }, + { "ch2_input", 6, 5 }, + { "ch3_input", 1, 5 }, + { "strobe0", 0, 1 }, + { "PM_TX_MODE", 0x8fe4, 0 }, + { "cong_thresh3", 25, 7 }, + { "cong_thresh2", 18, 7 }, + { "cong_thresh1", 11, 7 }, + { "cong_thresh0", 4, 7 }, + { "use_bundle_len", 3, 1 }, + { "stat_channel", 1, 2 }, + { "prefetch_enable", 0, 1 }, + { "PM_TX_STAT_CONFIG", 0x8fe8, 0 }, + { "PM_TX_STAT_COUNT", 0x8fec, 0 }, + { "PM_TX_DBG_CTRL", 0x8ff0, 0 }, + { "OspiWrBusy", 21, 4 }, + { "IspiWrBusy", 17, 4 }, + { "PMDbgAddr", 0, 17 }, + { "PM_TX_DBG_DATA", 0x8ff4, 0 }, + { "PM_TX_INT_ENABLE", 0x8ff8, 0 }, + { "master_perr", 31, 1 }, + { "zero_c_cmd_error", 30, 1 }, + { "oespi_cor_err", 29, 1 }, + { "icspi_cor_err", 28, 1 }, + { "icspi_ovfl", 24, 1 }, + { "pcmd_len_ovfl3", 23, 1 }, + { "pcmd_len_ovfl2", 22, 1 }, + { "pcmd_len_ovfl1", 21, 1 }, + { "pcmd_len_ovfl0", 20, 1 }, + { "icspi0_fifo2x_Rx_framing_error", 19, 1 }, + { "icspi1_fifo2x_Rx_framing_error", 18, 1 }, + { "icspi2_fifo2x_Rx_framing_error", 17, 1 }, + { "icspi3_fifo2x_Rx_framing_error", 16, 1 }, + { "icspi0_Tx_framing_error", 15, 1 }, + { "icspi1_Tx_framing_error", 14, 1 }, + { "icspi2_Tx_framing_error", 13, 1 }, + { "icspi3_Tx_framing_error", 12, 1 }, + { "oespi0_Rx_framing_error", 11, 1 }, + { "oespi1_Rx_framing_error", 10, 1 }, + { "oespi2_Rx_framing_error", 9, 1 }, + { "oespi3_Rx_framing_error", 8, 1 }, + { "oespi0_Tx_framing_error", 7, 1 }, + { "oespi1_Tx_framing_error", 6, 1 }, + { "oespi2_Tx_framing_error", 5, 1 }, + { "oespi3_Tx_framing_error", 4, 1 }, + { "oespi0_ofifo2x_Tx_framing_error", 3, 1 }, + { "oespi1_ofifo2x_Tx_framing_error", 2, 1 }, + { "oespi2_ofifo2x_Tx_framing_error", 1, 1 }, + { "oespi3_ofifo2x_Tx_framing_error", 0, 1 }, + { "PM_TX_INT_CAUSE", 0x8ffc, 0 }, + { "master_perr", 31, 1 }, + { "zero_c_cmd_error", 30, 1 }, + { "oespi_cor_err", 29, 1 }, + { "icspi_cor_err", 28, 1 }, + { "icspi_ovfl", 24, 1 }, + { "pcmd_len_ovfl3", 23, 1 }, + { "pcmd_len_ovfl2", 22, 1 }, + { "pcmd_len_ovfl1", 21, 1 }, + { "pcmd_len_ovfl0", 20, 1 }, + { "icspi0_fifo2x_Rx_framing_error", 19, 1 }, + { "icspi1_fifo2x_Rx_framing_error", 18, 1 }, + { "icspi2_fifo2x_Rx_framing_error", 17, 1 }, + { "icspi3_fifo2x_Rx_framing_error", 16, 1 }, + { "icspi0_Tx_framing_error", 15, 1 }, + { "icspi1_Tx_framing_error", 14, 1 }, + { "icspi2_Tx_framing_error", 13, 1 }, + { "icspi3_Tx_framing_error", 12, 1 }, + { "oespi0_Rx_framing_error", 11, 1 }, + { "oespi1_Rx_framing_error", 10, 1 }, + { "oespi2_Rx_framing_error", 9, 1 }, + { "oespi3_Rx_framing_error", 8, 1 }, + { "oespi0_Tx_framing_error", 7, 1 }, + { "oespi1_Tx_framing_error", 6, 1 }, + { "oespi2_Tx_framing_error", 5, 1 }, + { "oespi3_Tx_framing_error", 4, 1 }, + { "oespi0_ofifo2x_Tx_framing_error", 3, 1 }, + { "oespi1_ofifo2x_Tx_framing_error", 2, 1 }, + { "oespi2_ofifo2x_Tx_framing_error", 1, 1 }, + { "oespi3_ofifo2x_Tx_framing_error", 0, 1 }, + { NULL } +}; + +struct reg_info t7_mps_regs[] = { + { "MPS_CMN_CTL", 0x9000, 0 }, + { "pt1_sel_cfg", 21, 1 }, + { "Bug_42938_en", 20, 1 }, + { "no_bypass_pause", 19, 1 }, + { "bypass_pause", 18, 1 }, + { "PBUS_En", 16, 2 }, + { "INIC_En", 14, 2 }, + { "SBA_En", 12, 2 }, + { "BG2TP_MAP_MODE", 11, 1 }, + { "LB_Mode", 9, 2 }, + { "TX_PORT_STATS_MODE", 8, 1 }, + { "T5Mode", 7, 1 }, + { "SpeedMode", 5, 2 }, + { "LpbkCrdtCtrl", 4, 1 }, + { "Detect8023", 3, 1 }, + { "VFDirectAccess", 2, 1 }, + { "NumPorts", 0, 2 }, + { "MPS_INT_ENABLE", 0x9004, 0 }, + { "StatIntEnb", 5, 1 }, + { "TxIntEnb", 4, 1 }, + { "RxIntEnb", 3, 1 }, + { "TrcIntEnb", 2, 1 }, + { "ClsIntEnb", 1, 1 }, + { "PLIntEnb", 0, 1 }, + { "MPS_INT_CAUSE", 0x9008, 0 }, + { "StatInt", 5, 1 }, + { "TxInt", 4, 1 }, + { "RxInt", 3, 1 }, + { "TrcInt", 2, 1 }, + { "ClsInt", 1, 1 }, + { "PLInt", 0, 1 }, + { "MPS_CGEN_GLOBAL", 0x900c, 0 }, + { "MPS_VF_TX_CTL_31_0", 0x9010, 0 }, + { "MPS_VF_TX_CTL_63_32", 0x9014, 0 }, + { "MPS_VF_TX_CTL_95_64", 0x9018, 0 }, + { "MPS_VF_TX_CTL_127_96", 0x901c, 0 }, + { "MPS_VF_TX_CTL_159_128", 0x9100, 0 }, + { "MPS_VF_TX_CTL_191_160", 0x9104, 0 }, + { "MPS_VF_TX_CTL_223_192", 0x9108, 0 }, + { "MPS_VF_TX_CTL_255_224", 0x910c, 0 }, + { "MPS_VF_RX_CTL_31_0", 0x9020, 0 }, + { "MPS_VF_RX_CTL_63_32", 0x9024, 0 }, + { "MPS_VF_RX_CTL_95_64", 0x9028, 0 }, + { "MPS_VF_RX_CTL_127_96", 0x902c, 0 }, + { "MPS_VF_RX_CTL_159_128", 0x9110, 0 }, + { "MPS_VF_RX_CTL_191_160", 0x9114, 0 }, + { "MPS_VF_RX_CTL_223_192", 0x9118, 0 }, + { "MPS_VF_RX_CTL_255_224", 0x911c, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP0", 0x9030, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP1", 0x9034, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP2", 0x9038, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP3", 0x903c, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP0", 0x9040, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP1", 0x9044, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP2", 0x9048, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP3", 0x904c, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P0", 0x9050, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P1", 0x9054, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P2", 0x9138, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P3", 0x913c, 0 }, + { "MPS_WOL_CTL_MODE", 0x9058, 0 }, + { "MPS_TOP_SPARE", 0x9074, 0 }, + { "TopSpare", 8, 24 }, + { "oVlanSelLpbk3", 7, 1 }, + { "oVlanSelLpbk2", 6, 1 }, + { "oVlanSelLpbk1", 5, 1 }, + { "oVlanSelLpbk0", 4, 1 }, + { "oVlanSelMac3", 3, 1 }, + { "oVlanSelMac2", 2, 1 }, + { "oVlanSelMac1", 1, 1 }, + { "oVlanSelMac0", 0, 1 }, + { "MPS_BUILD_REVISION", 0x9078, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH0", 0x907c, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH1", 0x9080, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH2", 0x9084, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH3", 0x9088, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH4", 0x908c, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH5", 0x9090, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH6", 0x9094, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH7", 0x9098, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH8", 0x909c, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH9", 0x90a0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH10", 0x90a4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH11", 0x90a8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH12", 0x90ac, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH13", 0x90b0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH14", 0x90b4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP_TH15", 0x90b8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH0", 0x90bc, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH1", 0x90c0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH2", 0x90c4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH3", 0x90c8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH4", 0x90cc, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH5", 0x90d0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH6", 0x90d4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH7", 0x90d8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH8", 0x90dc, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH9", 0x90e0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH10", 0x90e4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH11", 0x90e8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH12", 0x90ec, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH13", 0x90f0, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH14", 0x90f4, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH15", 0x90f8, 0 }, + { "Value_1", 16, 16 }, + { "Value_0", 0, 16 }, + { "MPS_FPGA_BIST_CFG_P0", 0x9120, 0 }, + { "AddrMask", 16, 16 }, + { "BaseAddr", 0, 16 }, + { "MPS_FPGA_BIST_CFG_P1", 0x9124, 0 }, + { "AddrMask", 16, 16 }, + { "BaseAddr", 0, 16 }, + { "MPS_FPGA_BIST_CFG_P2", 0x9128, 0 }, + { "AddrMask", 16, 16 }, + { "BaseAddr", 0, 16 }, + { "MPS_FPGA_BIST_CFG_P3", 0x912c, 0 }, + { "AddrMask", 16, 16 }, + { "BaseAddr", 0, 16 }, + { "MPS_INIC_CTL", 0x9130, 0 }, + { "RD_WRN", 16, 1 }, + { "ADDR", 0, 16 }, + { "MPS_INIC_DATA", 0x9134, 0 }, + { "MPS_RED_CTL", 0x9140, 0 }, + { "LPBK_SHIFT_0", 28, 4 }, + { "LPBK_SHIFT_1", 24, 4 }, + { "LPBK_SHIFT_2", 20, 4 }, + { "LPBK_SHIFT_3", 16, 4 }, + { "MAC_SHIFT_0", 12, 4 }, + { "MAC_SHIFT_1", 8, 4 }, + { "MAC_SHIFT_2", 4, 4 }, + { "MAC_SHIFT_3", 0, 4 }, + { "MPS_RED_EN", 0x9144, 0 }, + { "LPBK_EN3", 7, 1 }, + { "LPBK_EN2", 6, 1 }, + { "LPBK_EN1", 5, 1 }, + { "LPBK_EN0", 4, 1 }, + { "MAC_EN3", 3, 1 }, + { "MAC_EN2", 2, 1 }, + { "MAC_EN1", 1, 1 }, + { "MAC_EN0", 0, 1 }, + { "MPS_MAC0_RED_DROP_CNT_H", 0x9148, 0 }, + { "MPS_MAC0_RED_DROP_CNT_L", 0x914c, 0 }, + { "MPS_MAC1_RED_DROP_CNT_H", 0x9150, 0 }, + { "MPS_MAC1_RED_DROP_CNT_L", 0x9154, 0 }, + { "MPS_MAC2_RED_DROP_CNT_H", 0x9158, 0 }, + { "MPS_MAC2_RED_DROP_CNT_L", 0x915c, 0 }, + { "MPS_MAC3_RED_DROP_CNT_H", 0x9160, 0 }, + { "MPS_MAC3_RED_DROP_CNT_L", 0x9164, 0 }, + { "MPS_LPBK0_RED_DROP_CNT_H", 0x9168, 0 }, + { "MPS_LPBK0_RED_DROP_CNT_L", 0x916c, 0 }, + { "MPS_LPBK1_RED_DROP_CNT_H", 0x9170, 0 }, + { "MPS_LPBK1_RED_DROP_CNT_L", 0x9174, 0 }, + { "MPS_LPBK2_RED_DROP_CNT_H", 0x9178, 0 }, + { "MPS_LPBK2_RED_DROP_CNT_L", 0x917c, 0 }, + { "MPS_LPBK3_RED_DROP_CNT_H", 0x9180, 0 }, + { "MPS_LPBK3_RED_DROP_CNT_L", 0x9184, 0 }, + { "MPS_MAC_RED_PP_DROP_EN", 0x9188, 0 }, + { "MAC3", 24, 8 }, + { "MAC2", 16, 8 }, + { "MAC1", 8, 8 }, + { "MAC0", 0, 8 }, + { "MPS_PORT_CTL", 0x30000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x30004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x30008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x3000c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x30010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x30014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x30018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x3001c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x30020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x30024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x30028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3002c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x30030, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_PRTY_GROUP_MAP", 0x30034, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x30038, 0 }, + { "TX2RX", 6, 3 }, + { "MAC2MPS", 3, 3 }, + { "MPS2MAC", 0, 3 }, + { "MPS_PORT_CTL", 0x32000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x32004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x32008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x3200c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x32010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x32014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x32018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x3201c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x32020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x32024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x32028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3202c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x32030, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_PRTY_GROUP_MAP", 0x32034, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x32038, 0 }, + { "TX2RX", 6, 3 }, + { "MAC2MPS", 3, 3 }, + { "MPS2MAC", 0, 3 }, + { "MPS_PORT_CTL", 0x34000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x34004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x34008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x3400c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x34010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x34014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x34018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x3401c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x34020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x34024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x34028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3402c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x34030, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_PRTY_GROUP_MAP", 0x34034, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x34038, 0 }, + { "TX2RX", 6, 3 }, + { "MAC2MPS", 3, 3 }, + { "MPS2MAC", 0, 3 }, + { "MPS_PORT_CTL", 0x36000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x36004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x36008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x3600c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x36010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x36014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x36018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x3601c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x36020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x36024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x36028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3602c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x36030, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_PRTY_GROUP_MAP", 0x36034, 0 }, + { "Prty7", 28, 4 }, + { "Prty6", 24, 4 }, + { "Prty5", 20, 4 }, + { "Prty4", 16, 4 }, + { "Prty3", 12, 4 }, + { "Prty2", 8, 4 }, + { "Prty1", 4, 4 }, + { "Prty0", 0, 4 }, + { "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x36038, 0 }, + { "TX2RX", 6, 3 }, + { "MAC2MPS", 3, 3 }, + { "MPS2MAC", 0, 3 }, + { "MPS_PF_CTL", 0x1e2c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1e6c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1eac0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1eec0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1f2c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1f6c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1fac0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1fec0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_RX_CTL", 0x11000, 0 }, + { "HASH_TCAM_EN", 19, 1 }, + { "SND_ORG_PFVF", 18, 1 }, + { "FILT_VLAN_SEL", 17, 1 }, + { "CBA_EN", 16, 1 }, + { "BLK_SNDR", 12, 4 }, + { "CMPRS", 8, 4 }, + { "SNF", 0, 8 }, + { "MPS_RX_PORT_MUX_CTL", 0x11004, 0 }, + { "CTL_P3", 12, 4 }, + { "CTL_P2", 8, 4 }, + { "CTL_P1", 4, 4 }, + { "CTL_P0", 0, 4 }, + { "MPS_RX_FIFO_0_CTL", 0x11008, 0 }, + { "MPS_RX_FIFO_1_CTL", 0x1100c, 0 }, + { "MPS_RX_FIFO_2_CTL", 0x11010, 0 }, + { "MPS_RX_FIFO_3_CTL", 0x11014, 0 }, + { "MPS_RX_PG_HYST_BG0", 0x11048, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG1", 0x1104c, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG2", 0x11050, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG3", 0x11054, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_OCH_CTL", 0x11058, 0 }, + { "DROP_WT", 27, 5 }, + { "TRUNC_WT", 22, 5 }, + { "DRAIN", 13, 5 }, + { "DROP", 8, 5 }, + { "STOP", 0, 5 }, + { "MPS_RX_LPBK_BP0", 0x1105c, 0 }, + { "MPS_RX_LPBK_BP1", 0x11060, 0 }, + { "MPS_RX_LPBK_BP2", 0x11064, 0 }, + { "MPS_RX_LPBK_BP3", 0x11068, 0 }, + { "MPS_RX_PORT_GAP", 0x1106c, 0 }, + { "MPS_CTL_STAT", 0x11070, 0 }, + { "MPS_RX_PERR_INT_CAUSE", 0x11074, 0 }, + { "MAC_IN_FIFO_768b", 30, 1 }, + { "INT_ERR_INT", 29, 1 }, + { "FLOP_PERR", 28, 1 }, + { "ATRB", 18, 1 }, + { "RPLC_MAP", 13, 5 }, + { "TKN_RUNT_DROP_FIFO", 12, 1 }, + { "PPM3", 9, 3 }, + { "PPM2", 6, 3 }, + { "PPM1", 3, 3 }, + { "PPM0", 0, 3 }, + { "MPS_RX_PERR_INT_ENABLE", 0x11078, 0 }, + { "INT_ERR_INT", 30, 1 }, + { "FLOP_PERR", 28, 1 }, + { "ATRB", 18, 1 }, + { "RPLC_MAP", 13, 5 }, + { "PPM3", 9, 3 }, + { "PPM2", 6, 3 }, + { "PPM1", 3, 3 }, + { "PPM0", 0, 3 }, + { "MPS_RX_PERR_ENABLE", 0x1107c, 0 }, + { "INT_ERR_INT", 30, 1 }, + { "FLOP_PERR", 28, 1 }, + { "ATRB", 18, 1 }, + { "RPLC_MAP", 13, 5 }, + { "PPM3", 9, 3 }, + { "PPM2", 6, 3 }, + { "PPM1", 3, 3 }, + { "PPM0", 0, 3 }, + { "MPS_RX_PERR_INT_CAUSE2", 0x1108c, 0 }, + { "crypt2mps_rx_intf_fifo", 28, 4 }, + { "inic2mps_tx0_perr", 27, 1 }, + { "inic2mps_tx1_perr", 26, 1 }, + { "xgmac2mps_rx0_perr", 25, 1 }, + { "xgmac2mps_rx1_perr", 24, 1 }, + { "mps2crypto_rx_intf_fifo", 20, 4 }, + { "RX_PRE_PROC_PERR", 9, 11 }, + { "MPS_RX_PERR_INT_ENABLE2", 0x11090, 0 }, + { "crypt2mps_rx_intf_fifo", 28, 4 }, + { "inic2mps_tx0_perr", 27, 1 }, + { "inic2mps_tx1_perr", 26, 1 }, + { "xgmac2mps_rx0_perr", 25, 1 }, + { "xgmac2mps_rx1_perr", 24, 1 }, + { "mps2crypto_rx_intf_fifo", 20, 4 }, + { "RX_PRE_PROC_PERR", 9, 11 }, + { "MPS_RX_PERR_ENABLE2", 0x11094, 0 }, + { "crypt2mps_rx_intf_fifo", 28, 4 }, + { "inic2mps_tx0_perr", 27, 1 }, + { "inic2mps_tx1_perr", 26, 1 }, + { "xgmac2mps_rx0_perr", 25, 1 }, + { "xgmac2mps_rx1_perr", 24, 1 }, + { "mps2crypto_rx_intf_fifo", 20, 4 }, + { "RX_PRE_PROC_PERR", 9, 11 }, + { "MPS_RX_PERR_INT_CAUSE3", 0x11310, 0 }, + { "MPS_RX_PERR_INT_ENABLE3", 0x11314, 0 }, + { "MPS_RX_PERR_ENABLE3", 0x11318, 0 }, + { "MPS_RX_PERR_INT_CAUSE4", 0x1131c, 0 }, + { "CLS", 20, 6 }, + { "rx_pre_proc", 16, 4 }, + { "pproc3", 12, 4 }, + { "pproc2", 8, 4 }, + { "pproc1", 4, 4 }, + { "pproc0", 0, 4 }, + { "MPS_RX_PERR_INT_ENABLE4", 0x11320, 0 }, + { "CLS", 20, 6 }, + { "rx_pre_proc", 16, 4 }, + { "pproc3", 12, 4 }, + { "pproc2", 8, 4 }, + { "pproc1", 4, 4 }, + { "pproc0", 0, 4 }, + { "MPS_RX_PERR_ENABLE4", 0x11324, 0 }, + { "CLS", 20, 6 }, + { "rx_pre_proc", 16, 4 }, + { "pproc3", 12, 4 }, + { "pproc2", 8, 4 }, + { "pproc1", 4, 4 }, + { "pproc0", 0, 4 }, + { "MPS_RX_PERR_INT_CAUSE5", 0x11328, 0 }, + { "mps2cryp_rx_fifo", 26, 4 }, + { "rx_out", 20, 6 }, + { "MEM_WRAP", 0, 20 }, + { "MPS_RX_PERR_INT_ENABLE5", 0x1132c, 0 }, + { "mps2cryp_rx_fifo", 26, 4 }, + { "rx_out", 20, 6 }, + { "MEM_WRAP", 0, 20 }, + { "MPS_RX_PERR_ENABLE5", 0x11330, 0 }, + { "mps2cryp_rx_fifo", 26, 4 }, + { "rx_out", 20, 6 }, + { "MEM_WRAP", 0, 20 }, + { "MPS_RX_PERR_INJECT", 0x11080, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "MPS_RX_PERR_INT_CAUSE6", 0x11334, 0 }, + { "MPS_RX_PERR_INT_ENABLE6", 0x11338, 0 }, + { "MPS_RX_PERR_ENABLE6", 0x1133c, 0 }, + { "MPS_RX_FUNC_INT_CAUSE", 0x11084, 0 }, + { "MTU_ERR_INT3", 19, 1 }, + { "MTU_ERR_INT2", 18, 1 }, + { "MTU_ERR_INT1", 17, 1 }, + { "MTU_ERR_INT0", 16, 1 }, + { "SE_CNT_ERR_INT", 15, 1 }, + { "FRM_ERR_INT", 14, 1 }, + { "LEN_ERR_INT", 13, 1 }, + { "INT_ERR_INT", 8, 5 }, + { "PG_TH_INT7", 7, 1 }, + { "PG_TH_INT6", 6, 1 }, + { "PG_TH_INT5", 5, 1 }, + { "PG_TH_INT4", 4, 1 }, + { "PG_TH_INT3", 3, 1 }, + { "PG_TH_INT2", 2, 1 }, + { "PG_TH_INT1", 1, 1 }, + { "PG_TH_INT0", 0, 1 }, + { "MPS_RX_FUNC_INT_ENABLE", 0x11088, 0 }, + { "MTU_ERR_INT3", 19, 1 }, + { "MTU_ERR_INT2", 18, 1 }, + { "MTU_ERR_INT1", 17, 1 }, + { "MTU_ERR_INT0", 16, 1 }, + { "SE_CNT_ERR_INT", 15, 1 }, + { "FRM_ERR_INT", 14, 1 }, + { "LEN_ERR_INT", 13, 1 }, + { "INT_ERR_INT", 8, 5 }, + { "PG_TH_INT7", 7, 1 }, + { "PG_TH_INT6", 6, 1 }, + { "PG_TH_INT5", 5, 1 }, + { "PG_TH_INT4", 4, 1 }, + { "PG_TH_INT3", 3, 1 }, + { "PG_TH_INT2", 2, 1 }, + { "PG_TH_INT1", 1, 1 }, + { "PG_TH_INT0", 0, 1 }, + { "MPS_RX_REPL_CTL", 0x11098, 0 }, + { "MPS_RX_PPP_ATRB", 0x1109c, 0 }, + { "ETYPE", 16, 16 }, + { "OPCODE", 0, 16 }, + { "MPS_RX_QFC0_ATRB", 0x110a0, 0 }, + { "ETYPE", 16, 16 }, + { "DA", 0, 16 }, + { "MPS_RX_QFC1_ATRB", 0x110a4, 0 }, + { "MPS_RX_PT_ARB0", 0x110a8, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB1", 0x110ac, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB2", 0x11468, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB3", 0x1146c, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB4", 0x110b0, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_PF_OUT_EN", 0x110b4, 0 }, + { "MPS_BMC_MTU", 0x110b8, 0 }, + { "MPS_BMC_PKT_CNT", 0x110bc, 0 }, + { "MPS_BMC_BYTE_CNT", 0x110c0, 0 }, + { "MPS_PFVF_ATRB_CTL", 0x110c4, 0 }, + { "RD_WRN", 31, 1 }, + { "PFVF", 0, 9 }, + { "MPS_PFVF_ATRB", 0x110c8, 0 }, + { "EXTRACT_DEL_VLAN", 31, 1 }, + { "PF", 28, 3 }, + { "OFF", 18, 1 }, + { "NV_DROP", 17, 1 }, + { "MODE", 16, 1 }, + { "FULL_FRAME_MODE", 14, 1 }, + { "MTU", 0, 14 }, + { "MPS_PFVF_ATRB2", 0x120fc, 0 }, + { "EXTRACT_DEL_ENCAP", 31, 1 }, + { "MPS_PFVF_ATRB_FLTR0", 0x110cc, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR1", 0x110d0, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR2", 0x110d4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR3", 0x110d8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR4", 0x110dc, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR5", 0x110e0, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR6", 0x110e4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR7", 0x110e8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR8", 0x110ec, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR9", 0x110f0, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR10", 0x110f4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR11", 0x110f8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR12", 0x110fc, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR13", 0x11100, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR14", 0x11104, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR15", 0x11108, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_RPLC_MAP_CTL", 0x1110c, 0 }, + { "RD_WRN", 31, 1 }, + { "ADDR", 0, 12 }, + { "MPS_PF_RPLCT_MAP", 0x11110, 0 }, + { "MPS_VF_RPLCT_MAP0", 0x11114, 0 }, + { "MPS_VF_RPLCT_MAP1", 0x11118, 0 }, + { "MPS_VF_RPLCT_MAP2", 0x1111c, 0 }, + { "MPS_VF_RPLCT_MAP3", 0x11120, 0 }, + { "MPS_VF_RPLCT_MAP4", 0x11300, 0 }, + { "MPS_VF_RPLCT_MAP5", 0x11304, 0 }, + { "MPS_VF_RPLCT_MAP6", 0x11308, 0 }, + { "MPS_VF_RPLCT_MAP7", 0x1130c, 0 }, + { "MPS_PKD_MEM_DATA0", 0x11130, 0 }, + { "MPS_PKD_MEM_DATA1", 0x11134, 0 }, + { "MPS_PKD_MEM_DATA2", 0x11138, 0 }, + { "MPS_PGD_MEM_DATA", 0x1113c, 0 }, + { "MPS_RX_SE_CNT_ERR", 0x11140, 0 }, + { "MPS_RX_SE_CNT_CLR", 0x11144, 0 }, + { "MPS_RX_IN_BUS_STATE", 0x11174, 0 }, + { "ST3", 24, 8 }, + { "ST2", 16, 8 }, + { "ST1", 8, 8 }, + { "ST0", 0, 8 }, + { "MPS_RX_OUT_BUS_STATE", 0x11178, 0 }, + { "ST_NCSI", 23, 9 }, + { "ST_TP", 0, 23 }, + { "MPS_RX_SPARE", 0x11190, 0 }, + { "MPS_RX_PTP_ETYPE", 0x11194, 0 }, + { "PETYPE2", 16, 16 }, + { "PETYPE1", 0, 16 }, + { "MPS_RX_PTP_TCP", 0x11198, 0 }, + { "PTCPORT2", 16, 16 }, + { "PTCPORT1", 0, 16 }, + { "MPS_RX_PTP_UDP", 0x1119c, 0 }, + { "PUDPORT2", 16, 16 }, + { "PUDPORT1", 0, 16 }, + { "MPS_RX_PTP_CTL", 0x111a0, 0 }, + { "MIN_PTP_SPACE", 24, 7 }, + { "PUDP2EN", 20, 4 }, + { "PUDP1EN", 16, 4 }, + { "PTCP2EN", 12, 4 }, + { "PTCP1EN", 8, 4 }, + { "PETYPE2EN", 4, 4 }, + { "PETYPE1EN", 0, 4 }, + { "MPS_RX_PAUSE_GEN_TH_0_0", 0x12104, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_1", 0x12108, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_2", 0x1210c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_3", 0x12110, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_4", 0x12114, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_5", 0x12118, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_6", 0x1211c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_0_7", 0x12120, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_0", 0x12124, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_1", 0x12128, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_2", 0x1212c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_3", 0x12130, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_4", 0x12134, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_5", 0x12138, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_6", 0x1213c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1_7", 0x12140, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_0", 0x12144, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_1", 0x12148, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_2", 0x1214c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_3", 0x12150, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_4", 0x12154, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_5", 0x12158, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_6", 0x1215c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2_7", 0x12160, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_0", 0x12164, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_1", 0x12168, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_2", 0x1216c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_3", 0x12170, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_4", 0x12174, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_5", 0x12178, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_6", 0x1217c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3_7", 0x12180, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_DROP_0_0", 0x12184, 0 }, + { "MPS_RX_DROP_0_1", 0x12188, 0 }, + { "MPS_RX_DROP_0_2", 0x1218c, 0 }, + { "MPS_RX_DROP_0_3", 0x12190, 0 }, + { "MPS_RX_DROP_0_4", 0x12194, 0 }, + { "MPS_RX_DROP_0_5", 0x12198, 0 }, + { "MPS_RX_DROP_0_6", 0x1219c, 0 }, + { "MPS_RX_DROP_0_7", 0x121a0, 0 }, + { "MPS_RX_DROP_1_0", 0x121a4, 0 }, + { "MPS_RX_DROP_1_1", 0x121a8, 0 }, + { "MPS_RX_DROP_1_2", 0x121ac, 0 }, + { "MPS_RX_DROP_1_3", 0x121b0, 0 }, + { "MPS_RX_DROP_1_4", 0x121b4, 0 }, + { "MPS_RX_DROP_1_5", 0x121b8, 0 }, + { "MPS_RX_DROP_1_6", 0x121bc, 0 }, + { "MPS_RX_DROP_1_7", 0x121c0, 0 }, + { "MPS_RX_DROP_2_0", 0x121c4, 0 }, + { "MPS_RX_DROP_2_1", 0x121c8, 0 }, + { "MPS_RX_DROP_2_2", 0x121cc, 0 }, + { "MPS_RX_DROP_2_3", 0x121d0, 0 }, + { "MPS_RX_DROP_2_4", 0x121d4, 0 }, + { "MPS_RX_DROP_2_5", 0x121d8, 0 }, + { "MPS_RX_DROP_2_6", 0x121dc, 0 }, + { "MPS_RX_DROP_2_7", 0x121e0, 0 }, + { "MPS_RX_DROP_3_0", 0x121e4, 0 }, + { "MPS_RX_DROP_3_1", 0x121e8, 0 }, + { "MPS_RX_DROP_3_2", 0x121ec, 0 }, + { "MPS_RX_DROP_3_3", 0x121f0, 0 }, + { "MPS_RX_DROP_3_4", 0x121f4, 0 }, + { "MPS_RX_DROP_3_5", 0x121f8, 0 }, + { "MPS_RX_DROP_3_6", 0x121fc, 0 }, + { "MPS_RX_DROP_3_7", 0x12200, 0 }, + { "MPS_RX_MAC_BG_PG_CNT0_0", 0x12204, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_1", 0x12208, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_2", 0x1220c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_3", 0x12210, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_4", 0x12214, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_5", 0x12218, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_6", 0x1221c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT0_7", 0x12220, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_0", 0x12224, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_1", 0x12228, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_2", 0x1222c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_3", 0x12230, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_4", 0x12234, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_5", 0x12238, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_6", 0x1223c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1_7", 0x12240, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_0", 0x12244, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_1", 0x12248, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_2", 0x1224c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_3", 0x12250, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_4", 0x12254, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_5", 0x12258, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_6", 0x1225c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2_7", 0x12260, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_0", 0x12264, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_1", 0x12268, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_2", 0x1226c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_3", 0x12270, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_4", 0x12274, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_5", 0x12278, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_6", 0x1227c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3_7", 0x12280, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_PAUSE_GEN_TH_0", 0x12284, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1", 0x12288, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2", 0x1228c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3", 0x12290, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_MAC_CLS_DROP_CNT0", 0x111e4, 0 }, + { "MPS_RX_MAC_CLS_DROP_CNT1", 0x111e8, 0 }, + { "MPS_RX_MAC_CLS_DROP_CNT2", 0x111ec, 0 }, + { "MPS_RX_MAC_CLS_DROP_CNT3", 0x111f0, 0 }, + { "MPS_RX_LPBK_CLS_DROP_CNT0", 0x111f4, 0 }, + { "MPS_RX_LPBK_CLS_DROP_CNT1", 0x111f8, 0 }, + { "MPS_RX_LPBK_CLS_DROP_CNT2", 0x111fc, 0 }, + { "MPS_RX_LPBK_CLS_DROP_CNT3", 0x11200, 0 }, + { "MPS_RX_CGEN", 0x11204, 0 }, + { "MPS_RX_CGEN_NCSI", 12, 1 }, + { "MPS_RX_CGEN_OUT", 8, 4 }, + { "MPS_RX_CGEN_LPBK_IN", 4, 4 }, + { "MPS_RX_CGEN_MAC_IN", 0, 4 }, + { "MPS_RX_MAC_BG_PG_CNT0", 0x11208, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT1", 0x1120c, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT2", 0x11210, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_MAC_BG_PG_CNT3", 0x11214, 0 }, + { "MAC_USED", 16, 11 }, + { "MAC_ALLOC", 0, 11 }, + { "MPS_RX_LPBK_BG_PG_CNT0", 0x11218, 0 }, + { "LPBK_USED", 16, 11 }, + { "LPBK_ALLOC", 0, 11 }, + { "MPS_RX_LPBK_BG_PG_CNT1", 0x1121c, 0 }, + { "LPBK_USED", 16, 11 }, + { "LPBK_ALLOC", 0, 11 }, + { "MPS_RX_LPBK_BG_PG_CNT2", 0x11220, 0 }, + { "LPBK_USED", 16, 11 }, + { "LPBK_ALLOC", 0, 11 }, + { "MPS_RX_LPBK_BG_PG_CNT3", 0x11224, 0 }, + { "LPBK_USED", 16, 11 }, + { "LPBK_ALLOC", 0, 11 }, + { "MPS_RX_CONGESTION_THRESHOLD_BG0", 0x11228, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_CONGESTION_THRESHOLD_BG1", 0x1122c, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_CONGESTION_THRESHOLD_BG2", 0x11230, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_CONGESTION_THRESHOLD_BG3", 0x11234, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG0", 0x122b4, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG1", 0x122b8, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG2", 0x122bc, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG3", 0x122c0, 0 }, + { "CONG_EN", 31, 1 }, + { "CONG_TH", 0, 20 }, + { "MPS_RX_GRE_PROT_TYPE", 0x11238, 0 }, + { "NVGRE_EN", 9, 1 }, + { "GRE_EN", 8, 1 }, + { "GRE", 0, 8 }, + { "MPS_RX_VXLAN_TYPE", 0x1123c, 0 }, + { "VXLAN_EN", 16, 1 }, + { "VXLAN", 0, 16 }, + { "MPS_RX_GENEVE_TYPE", 0x11240, 0 }, + { "GENEVE_EN", 16, 1 }, + { "GENEVE", 0, 16 }, + { "MPS_RX_INNER_HDR_IVLAN", 0x11244, 0 }, + { "IVLAN_EN", 16, 1 }, + { "IVLAN_ETYPE", 0, 16 }, + { "MPS_RX_ENCAP_NVGRE", 0x11248, 0 }, + { "ETYPE_EN", 16, 1 }, + { "ETYPE", 0, 16 }, + { "MPS_RX_ENCAP_GENEVE", 0x1124c, 0 }, + { "ETYPE_EN", 16, 1 }, + { "ETYPE", 0, 16 }, + { "MPS_RX_ENCAP_VXLAN", 0x120f0, 0 }, + { "ETYPE_EN", 16, 1 }, + { "ETYPE", 0, 16 }, + { "MPS_RX_INT_VXLAN", 0x120f4, 0 }, + { "INT_TYPE_EN", 16, 1 }, + { "INT_TYPE", 0, 16 }, + { "MPS_RX_INT_GENEVE", 0x120f8, 0 }, + { "INT_TYPE_EN", 16, 1 }, + { "INT_TYPE", 0, 16 }, + { "MPS_RX_TCP", 0x11250, 0 }, + { "PROT_TYPE_EN", 8, 1 }, + { "PROT_TYPE", 0, 8 }, + { "MPS_RX_UDP", 0x11254, 0 }, + { "PROT_TYPE_EN", 8, 1 }, + { "PROT_TYPE", 0, 8 }, + { "MPS_RX_PAUSE", 0x11258, 0 }, + { "MPS_RX_LENGTH", 0x1125c, 0 }, + { "SAP_VALUE", 16, 16 }, + { "LENGTH_ETYPE", 0, 16 }, + { "MPS_RX_CTL_ORG", 0x11260, 0 }, + { "CTL_VALUE", 24, 8 }, + { "ORG_VALUE", 0, 24 }, + { "MPS_RX_IPV4", 0x11264, 0 }, + { "MPS_RX_IPV6", 0x11268, 0 }, + { "MPS_RX_TTL", 0x1126c, 0 }, + { "TTL_IPV4", 10, 8 }, + { "TTL_IPV6", 2, 8 }, + { "TTL_CHK_EN_IPV4", 1, 1 }, + { "TTL_CHK_EN_IPV6", 0, 1 }, + { "MPS_RX_DEFAULT_VNI", 0x11270, 0 }, + { "MPS_RX_PRS_CTL", 0x11274, 0 }, + { "CTL_CHK_EN", 28, 1 }, + { "ORG_CHK_EN", 27, 1 }, + { "SAP_CHK_EN", 26, 1 }, + { "VXLAN_FLAG_CHK_EN", 25, 1 }, + { "VXLAN_FLAG_MASK", 17, 8 }, + { "VXLAN_FLAG", 9, 8 }, + { "GRE_VER_CHK_EN", 8, 1 }, + { "GRE_VER", 5, 3 }, + { "GENEVE_VER_CHK_EN", 4, 1 }, + { "GENEVE_VER", 2, 2 }, + { "DIP_EN", 1, 1 }, + { "MPS_RX_PRS_CTL_2", 0x11278, 0 }, + { "IP_EXT_HDR_EN", 5, 1 }, + { "EN_UDP_CSUM_CHK", 4, 1 }, + { "EN_UDP_LEN_CHK", 3, 1 }, + { "EN_IP_CSUM_CHK", 2, 1 }, + { "EN_IP_PAYLOAD_LEN_CHK", 1, 1 }, + { "IPV6_UDP_CSUM_COMPAT", 0, 1 }, + { "MPS_RX_MPS2NCSI_CNT", 0x1127c, 0 }, + { "MPS_RX_MAX_TNL_HDR_LEN", 0x11280, 0 }, + { "MODE", 9, 1 }, + { "LEN", 0, 9 }, + { "MPS_RX_PAUSE_DA_H", 0x11284, 0 }, + { "MPS_RX_PAUSE_DA_L", 0x11288, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_MAC0", 0x1128c, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_MAC0", 0x11290, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_MAC0", 0x11294, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_MAC0", 0x11298, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_MAC1", 0x1129c, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_MAC1", 0x112a0, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_MAC1", 0x112a4, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_MAC1", 0x112a8, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_MAC2", 0x11408, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_MAC2", 0x1140c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_MAC2", 0x11410, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_MAC2", 0x11414, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_MAC3", 0x11418, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_MAC3", 0x1141c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_MAC3", 0x11420, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_MAC3", 0x11424, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_LPBK0", 0x112ac, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_LPBK0", 0x112b0, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_LPBK0", 0x112b4, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_LPBK0", 0x112b8, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_LPBK1", 0x112bc, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_LPBK1", 0x112c0, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_LPBK1", 0x112c4, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_LPBK1", 0x112c8, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_LPBK2", 0x11428, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_LPBK2", 0x1142c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_LPBK2", 0x11430, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_LPBK2", 0x11434, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_LPBK3", 0x11438, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_LPBK3", 0x1143c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_LPBK3", 0x11440, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_LPBK3", 0x11444, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_TO_TP0", 0x112cc, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_TO_TP0", 0x112d0, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_TO_TP0", 0x112d4, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_TO_TP0", 0x112d8, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_TO_TP1", 0x112dc, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_TO_TP1", 0x112e0, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_TO_TP1", 0x112e4, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_TO_TP1", 0x112e8, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_TO_TP2", 0x11448, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_TO_TP2", 0x1144c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_TO_TP2", 0x11450, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_TO_TP2", 0x11454, 0 }, + { "MPS_RX_CNT_NVGRE_PKT_TO_TP3", 0x11458, 0 }, + { "MPS_RX_CNT_VXLAN_PKT_TO_TP3", 0x1145c, 0 }, + { "MPS_RX_CNT_GENEVE_PKT_TO_TP3", 0x11460, 0 }, + { "MPS_RX_CNT_TNL_ERR_PKT_TO_TP3", 0x11464, 0 }, + { "MPS_RX_ESP", 0x112ec, 0 }, + { "PROT_TYPE_EN", 8, 1 }, + { "PROT_TYPE", 0, 8 }, + { "MPS_EN_LPBK_BLK_SNDR", 0x112f0, 0 }, + { "EN_CH3", 3, 1 }, + { "EN_CH2", 2, 1 }, + { "EN_CH1", 1, 1 }, + { "EN_CH0", 0, 1 }, + { "MPS_CLS_DROP_DMAC0_L", 0x12070, 0 }, + { "MPS_CLS_DROP_DMAC0_H", 0x12074, 0 }, + { "MPS_CLS_DROP_DMAC1_L", 0x12078, 0 }, + { "MPS_CLS_DROP_DMAC1_H", 0x1207c, 0 }, + { "MPS_CLS_DROP_DMAC2_L", 0x12080, 0 }, + { "MPS_CLS_DROP_DMAC2_H", 0x12084, 0 }, + { "MPS_CLS_DROP_DMAC3_L", 0x12088, 0 }, + { "MPS_CLS_DROP_DMAC3_H", 0x1208c, 0 }, + { "MPS_CLS_DROP_DMAC4_L", 0x12090, 0 }, + { "MPS_CLS_DROP_DMAC4_H", 0x12094, 0 }, + { "MPS_CLS_DROP_DMAC5_L", 0x12098, 0 }, + { "MPS_CLS_DROP_DMAC5_H", 0x1209c, 0 }, + { "MPS_CLS_DROP_DMAC6_L", 0x120a0, 0 }, + { "MPS_CLS_DROP_DMAC6_H", 0x120a4, 0 }, + { "MPS_CLS_DROP_DMAC7_L", 0x120a8, 0 }, + { "MPS_CLS_DROP_DMAC7_H", 0x120ac, 0 }, + { "MPS_CLS_DROP_DMAC8_L", 0x120b0, 0 }, + { "MPS_CLS_DROP_DMAC8_H", 0x120b4, 0 }, + { "MPS_CLS_DROP_DMAC9_L", 0x120b8, 0 }, + { "MPS_CLS_DROP_DMAC9_H", 0x120bc, 0 }, + { "MPS_CLS_DROP_DMAC10_L", 0x120c0, 0 }, + { "MPS_CLS_DROP_DMAC10_H", 0x120c4, 0 }, + { "MPS_CLS_DROP_DMAC11_L", 0x120c8, 0 }, + { "MPS_CLS_DROP_DMAC11_H", 0x120cc, 0 }, + { "MPS_CLS_DROP_DMAC12_L", 0x120d0, 0 }, + { "MPS_CLS_DROP_DMAC12_H", 0x120d4, 0 }, + { "MPS_CLS_DROP_DMAC13_L", 0x120d8, 0 }, + { "MPS_CLS_DROP_DMAC13_H", 0x120dc, 0 }, + { "MPS_CLS_DROP_DMAC14_L", 0x120e0, 0 }, + { "MPS_CLS_DROP_DMAC14_H", 0x120e4, 0 }, + { "MPS_CLS_DROP_DMAC15_L", 0x120e8, 0 }, + { "MPS_CLS_DROP_DMAC15_H", 0x120ec, 0 }, + { "MPS_RX_TRANS_ENCAP_FLTR_CTL", 0x12100, 0 }, + { "TIMEOUT_FLT_CLR_EN", 8, 1 }, + { "FLTR_TIMOUT_VAL", 0, 8 }, + { "MPS_RX_BG0_IPSEC_CNT", 0x12294, 0 }, + { "MPS_RX_BG1_IPSEC_CNT", 0x12298, 0 }, + { "MPS_RX_BG2_IPSEC_CNT", 0x1229c, 0 }, + { "MPS_RX_BG3_IPSEC_CNT", 0x122a0, 0 }, + { "MPS_RX_MEM_FIFO_CONFIG0", 0x122a4, 0 }, + { "FIFO_CONFIG2", 16, 16 }, + { "FIFO_CONFIG1", 0, 16 }, + { "MPS_RX_MEM_FIFO_CONFIG1", 0x122a8, 0 }, + { "MPS_LPBK_MEM_FIFO_CONFIG0", 0x122ac, 0 }, + { "FIFO_CONFIG2", 16, 16 }, + { "FIFO_CONFIG1", 0, 16 }, + { "MPS_LPBK_MEM_FIFO_CONFIG1", 0x122b0, 0 }, + { "MPS_BG_PAUSE_CTL", 0x122c4, 0 }, + { "bg0_pause_en", 3, 1 }, + { "bg1_pause_en", 2, 1 }, + { "bg2_pause_en", 1, 1 }, + { "bg3_pause_en", 0, 1 }, + { "MPS_PORT_RX_CTL", 0x30100, 0 }, + { "TRANS_ENCAP_EN", 30, 1 }, + { "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 }, + { "PASS_HPROM", 28, 1 }, + { "PASS_PROM", 27, 1 }, + { "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 }, + { "HASH_PRIO_SEL_LPBK", 25, 1 }, + { "HASH_PRIO_SEL_MAC", 24, 1 }, + { "HASH_EN_LPBK", 23, 1 }, + { "HASH_EN_MAC", 22, 1 }, + { "PTP_FWD_UP", 21, 1 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x30104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x30108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x3010c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x30110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x30114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x30118, 0 }, + { "MPS_PORT_RX_VF_MAP4", 0x30150, 0 }, + { "MPS_PORT_RX_VF_MAP5", 0x30154, 0 }, + { "MPS_PORT_RX_VF_MAP6", 0x30158, 0 }, + { "MPS_PORT_RX_VF_MAP7", 0x3015c, 0 }, + { "MPS_PORT_RX_IVLAN", 0x3011c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x30120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x30124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x30128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x3012c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x30130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x30134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_INT_RSS_HASH", 0x30170, 0 }, + { "MPS_PORT_RX_INT_RSS_CONTROL", 0x30174, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x30138, 0 }, + { "FIXED_PFVF_MAC", 14, 1 }, + { "FIXED_PFVF_LPBK", 13, 1 }, + { "FIXED_PFVF_LPBK_OV", 12, 1 }, + { "FIXED_PF", 9, 3 }, + { "FIXED_VF_VLD", 8, 1 }, + { "FIXED_VF", 0, 8 }, + { "MPS_PORT_RX_SPARE", 0x3013c, 0 }, + { "MPS_PORT_RX_PTP_RSS_HASH", 0x30140, 0 }, + { "MPS_PORT_RX_PTP_RSS_CONTROL", 0x30144, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_TS_VLD", 0x30148, 0 }, + { "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3014c, 0 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x30160, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "non_runt_frame", 10, 1 }, + { "Inner_VLAN_VLD", 9, 1 }, + { "Err_IP_Payload_Len", 8, 1 }, + { "Err_UDP_Payload_Len", 7, 1 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x30164, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "Inner_VLAN_VLD", 10, 1 }, + { "Err_IP_Payload_Len", 9, 1 }, + { "Err_UDP_Payload_Len", 8, 1 }, + { "MPS_PORT_RX_REPL_VECT_SEL", 0x30168, 0 }, + { "DIS_REPL_VECT_SEL", 4, 1 }, + { "REPL_VECT_SEL", 0, 4 }, + { "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3016c, 0 }, + { "MPS_PORT_RX_CNT_DBG_CTL", 0x30178, 0 }, + { "MPS_PORT_RX_CNT_DBG", 0x3017c, 0 }, + { "MPS_PORT_RX_CTL", 0x32100, 0 }, + { "TRANS_ENCAP_EN", 30, 1 }, + { "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 }, + { "PASS_HPROM", 28, 1 }, + { "PASS_PROM", 27, 1 }, + { "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 }, + { "HASH_PRIO_SEL_LPBK", 25, 1 }, + { "HASH_PRIO_SEL_MAC", 24, 1 }, + { "HASH_EN_LPBK", 23, 1 }, + { "HASH_EN_MAC", 22, 1 }, + { "PTP_FWD_UP", 21, 1 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x32104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x32108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x3210c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x32110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x32114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x32118, 0 }, + { "MPS_PORT_RX_VF_MAP4", 0x32150, 0 }, + { "MPS_PORT_RX_VF_MAP5", 0x32154, 0 }, + { "MPS_PORT_RX_VF_MAP6", 0x32158, 0 }, + { "MPS_PORT_RX_VF_MAP7", 0x3215c, 0 }, + { "MPS_PORT_RX_IVLAN", 0x3211c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x32120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x32124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x32128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x3212c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x32130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x32134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_INT_RSS_HASH", 0x32170, 0 }, + { "MPS_PORT_RX_INT_RSS_CONTROL", 0x32174, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x32138, 0 }, + { "FIXED_PFVF_MAC", 14, 1 }, + { "FIXED_PFVF_LPBK", 13, 1 }, + { "FIXED_PFVF_LPBK_OV", 12, 1 }, + { "FIXED_PF", 9, 3 }, + { "FIXED_VF_VLD", 8, 1 }, + { "FIXED_VF", 0, 8 }, + { "MPS_PORT_RX_SPARE", 0x3213c, 0 }, + { "MPS_PORT_RX_PTP_RSS_HASH", 0x32140, 0 }, + { "MPS_PORT_RX_PTP_RSS_CONTROL", 0x32144, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_TS_VLD", 0x32148, 0 }, + { "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3214c, 0 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x32160, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "non_runt_frame", 10, 1 }, + { "Inner_VLAN_VLD", 9, 1 }, + { "Err_IP_Payload_Len", 8, 1 }, + { "Err_UDP_Payload_Len", 7, 1 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x32164, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "Inner_VLAN_VLD", 10, 1 }, + { "Err_IP_Payload_Len", 9, 1 }, + { "Err_UDP_Payload_Len", 8, 1 }, + { "MPS_PORT_RX_REPL_VECT_SEL", 0x32168, 0 }, + { "DIS_REPL_VECT_SEL", 4, 1 }, + { "REPL_VECT_SEL", 0, 4 }, + { "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3216c, 0 }, + { "MPS_PORT_RX_CNT_DBG_CTL", 0x32178, 0 }, + { "MPS_PORT_RX_CNT_DBG", 0x3217c, 0 }, + { "MPS_PORT_RX_CTL", 0x34100, 0 }, + { "TRANS_ENCAP_EN", 30, 1 }, + { "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 }, + { "PASS_HPROM", 28, 1 }, + { "PASS_PROM", 27, 1 }, + { "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 }, + { "HASH_PRIO_SEL_LPBK", 25, 1 }, + { "HASH_PRIO_SEL_MAC", 24, 1 }, + { "HASH_EN_LPBK", 23, 1 }, + { "HASH_EN_MAC", 22, 1 }, + { "PTP_FWD_UP", 21, 1 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x34104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x34108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x3410c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x34110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x34114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x34118, 0 }, + { "MPS_PORT_RX_VF_MAP4", 0x34150, 0 }, + { "MPS_PORT_RX_VF_MAP5", 0x34154, 0 }, + { "MPS_PORT_RX_VF_MAP6", 0x34158, 0 }, + { "MPS_PORT_RX_VF_MAP7", 0x3415c, 0 }, + { "MPS_PORT_RX_IVLAN", 0x3411c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x34120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x34124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x34128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x3412c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x34130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x34134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_INT_RSS_HASH", 0x34170, 0 }, + { "MPS_PORT_RX_INT_RSS_CONTROL", 0x34174, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x34138, 0 }, + { "FIXED_PFVF_MAC", 14, 1 }, + { "FIXED_PFVF_LPBK", 13, 1 }, + { "FIXED_PFVF_LPBK_OV", 12, 1 }, + { "FIXED_PF", 9, 3 }, + { "FIXED_VF_VLD", 8, 1 }, + { "FIXED_VF", 0, 8 }, + { "MPS_PORT_RX_SPARE", 0x3413c, 0 }, + { "MPS_PORT_RX_PTP_RSS_HASH", 0x34140, 0 }, + { "MPS_PORT_RX_PTP_RSS_CONTROL", 0x34144, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_TS_VLD", 0x34148, 0 }, + { "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3414c, 0 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x34160, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "non_runt_frame", 10, 1 }, + { "Inner_VLAN_VLD", 9, 1 }, + { "Err_IP_Payload_Len", 8, 1 }, + { "Err_UDP_Payload_Len", 7, 1 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x34164, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "Inner_VLAN_VLD", 10, 1 }, + { "Err_IP_Payload_Len", 9, 1 }, + { "Err_UDP_Payload_Len", 8, 1 }, + { "MPS_PORT_RX_REPL_VECT_SEL", 0x34168, 0 }, + { "DIS_REPL_VECT_SEL", 4, 1 }, + { "REPL_VECT_SEL", 0, 4 }, + { "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3416c, 0 }, + { "MPS_PORT_RX_CNT_DBG_CTL", 0x34178, 0 }, + { "MPS_PORT_RX_CNT_DBG", 0x3417c, 0 }, + { "MPS_PORT_RX_CTL", 0x36100, 0 }, + { "TRANS_ENCAP_EN", 30, 1 }, + { "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 }, + { "PASS_HPROM", 28, 1 }, + { "PASS_PROM", 27, 1 }, + { "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 }, + { "HASH_PRIO_SEL_LPBK", 25, 1 }, + { "HASH_PRIO_SEL_MAC", 24, 1 }, + { "HASH_EN_LPBK", 23, 1 }, + { "HASH_EN_MAC", 22, 1 }, + { "PTP_FWD_UP", 21, 1 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x36104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x36108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x3610c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x36110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x36114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x36118, 0 }, + { "MPS_PORT_RX_VF_MAP4", 0x36150, 0 }, + { "MPS_PORT_RX_VF_MAP5", 0x36154, 0 }, + { "MPS_PORT_RX_VF_MAP6", 0x36158, 0 }, + { "MPS_PORT_RX_VF_MAP7", 0x3615c, 0 }, + { "MPS_PORT_RX_IVLAN", 0x3611c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x36120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x36124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x36128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x3612c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x36130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x36134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_INT_RSS_HASH", 0x36170, 0 }, + { "MPS_PORT_RX_INT_RSS_CONTROL", 0x36174, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x36138, 0 }, + { "FIXED_PFVF_MAC", 14, 1 }, + { "FIXED_PFVF_LPBK", 13, 1 }, + { "FIXED_PFVF_LPBK_OV", 12, 1 }, + { "FIXED_PF", 9, 3 }, + { "FIXED_VF_VLD", 8, 1 }, + { "FIXED_VF", 0, 8 }, + { "MPS_PORT_RX_SPARE", 0x3613c, 0 }, + { "MPS_PORT_RX_PTP_RSS_HASH", 0x36140, 0 }, + { "MPS_PORT_RX_PTP_RSS_CONTROL", 0x36144, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_TS_VLD", 0x36148, 0 }, + { "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3614c, 0 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x36160, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "non_runt_frame", 10, 1 }, + { "Inner_VLAN_VLD", 9, 1 }, + { "Err_IP_Payload_Len", 8, 1 }, + { "Err_UDP_Payload_Len", 7, 1 }, + { "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x36164, 0 }, + { "Outer_IPv4_n_Inner_IPv4", 31, 1 }, + { "Outer_IPv4_n_Inner_IPv6", 30, 1 }, + { "Outer_IPv6_n_Inner_IPv4", 29, 1 }, + { "Outer_IPv6_n_Inner_IPv6", 28, 1 }, + { "Outer_IPv4_n_VLAN_NVGRE", 27, 1 }, + { "Outer_IPv6_n_VLAN_NVGRE", 26, 1 }, + { "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 }, + { "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 }, + { "Outer_IPv4_n_VLAN_GRE", 23, 1 }, + { "Outer_IPv6_n_VLAN_GRE", 22, 1 }, + { "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 }, + { "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 }, + { "Outer_IPv4_n_VLAN_VXLAN", 19, 1 }, + { "Outer_IPv6_n_VLAN_VXLAN", 18, 1 }, + { "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 }, + { "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 }, + { "Outer_IPv4_n_VLAN_GENEVE", 15, 1 }, + { "Outer_IPv6_n_VLAN_GENEVE", 14, 1 }, + { "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 }, + { "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 }, + { "Err_Tnl_Hdr_Len", 11, 1 }, + { "Inner_VLAN_VLD", 10, 1 }, + { "Err_IP_Payload_Len", 9, 1 }, + { "Err_UDP_Payload_Len", 8, 1 }, + { "MPS_PORT_RX_REPL_VECT_SEL", 0x36168, 0 }, + { "DIS_REPL_VECT_SEL", 4, 1 }, + { "REPL_VECT_SEL", 0, 4 }, + { "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3616c, 0 }, + { "MPS_PORT_RX_CNT_DBG_CTL", 0x36178, 0 }, + { "MPS_PORT_RX_CNT_DBG", 0x3617c, 0 }, + { "MPS_TX_PRTY_SEL", 0x9400, 0 }, + { "Ch4_Prty", 16, 3 }, + { "Ch3_Prty", 13, 3 }, + { "Ch2_Prty", 10, 3 }, + { "Ch1_Prty", 7, 3 }, + { "Ch0_Prty", 4, 3 }, + { "TP_Source", 2, 2 }, + { "NCSI_Source", 0, 2 }, + { "MPS_TX_INT_ENABLE", 0x9404, 0 }, + { "PortErr", 28, 1 }, + { "FRMERR", 27, 1 }, + { "SECNTERR", 26, 1 }, + { "BUBBLE", 25, 1 }, + { "TxTokenFifo", 15, 10 }, + { "PERR_TP2MPS_TFIFO", 13, 2 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_INT_CAUSE", 0x9408, 0 }, + { "PortErr", 28, 1 }, + { "FRMERR", 27, 1 }, + { "SECNTERR", 26, 1 }, + { "BUBBLE", 25, 1 }, + { "TxTokenFifo", 15, 10 }, + { "PERR_TP2MPS_TFIFO", 13, 2 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_NCSI2MPS_CNT", 0x940c, 0 }, + { "MPS_TX_PERR_ENABLE", 0x9410, 0 }, + { "PortErrInt", 28, 1 }, + { "FramingErrInt", 27, 1 }, + { "SeCntErrInt", 26, 1 }, + { "BubbleErrInt", 25, 1 }, + { "TxTokenFifo", 15, 10 }, + { "PERR_TP2MPS_TFIFO", 13, 2 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_PERR_INJECT", 0x9414, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "MPS_TX_PORT_ERR", 0x9430, 0 }, + { "Lpbkpt3", 7, 1 }, + { "Lpbkpt2", 6, 1 }, + { "Lpbkpt1", 5, 1 }, + { "Lpbkpt0", 4, 1 }, + { "pt3", 3, 1 }, + { "pt2", 2, 1 }, + { "pt1", 1, 1 }, + { "pt0", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH0", 0x9434, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH1", 0x9438, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH2", 0x943c, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH3", 0x9440, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_SGE_CH_PAUSE_IGNR", 0x9454, 0 }, + { "MPS_TX_PAD_CTL", 0x945c, 0 }, + { "LpbkPadEnPt3", 7, 1 }, + { "LpbkPadEnPt2", 6, 1 }, + { "LpbkPadEnPt1", 5, 1 }, + { "LpbkPadEnPt0", 4, 1 }, + { "MacPadEnPt3", 3, 1 }, + { "MacPadEnPt2", 2, 1 }, + { "MacPadEnPt1", 1, 1 }, + { "MacPadEnPt0", 0, 1 }, + { "MPS_TX_PFVF_PORT_DROP_TP", 0x9460, 0 }, + { "TP2MPS_Ch3", 24, 8 }, + { "TP2MPS_Ch2", 16, 8 }, + { "TP2MPS_Ch1", 8, 8 }, + { "TP2MPS_Ch0", 0, 8 }, + { "MPS_TX_PFVF_PORT_DROP_NCSI", 0x9464, 0 }, + { "MPS_TX_PFVF_PORT_DROP_CTL", 0x9468, 0 }, + { "PFNOVFDROP", 5, 1 }, + { "NCSI_Ch4_CLR", 4, 1 }, + { "TP2MPS_Ch3_CLR", 3, 1 }, + { "TP2MPS_Ch2_CLR", 2, 1 }, + { "TP2MPS_Ch1_CLR", 1, 1 }, + { "TP2MPS_Ch0_CLR", 0, 1 }, + { "MPS_TX_CGEN", 0x946c, 0 }, + { "TxOutLpbk3_CGEN", 31, 1 }, + { "TxOutLpbk2_CGEN", 30, 1 }, + { "TxOutLpbk1_CGEN", 29, 1 }, + { "TxOutLpbk0_CGEN", 28, 1 }, + { "TxOutMAC3_CGEN", 27, 1 }, + { "TxOutMAC2_CGEN", 26, 1 }, + { "TxOutMAC1_CGEN", 25, 1 }, + { "TxOutMAC0_CGEN", 24, 1 }, + { "TxSchLpbk3_CGEN", 23, 1 }, + { "TxSchLpbk2_CGEN", 22, 1 }, + { "TxSchLpbk1_CGEN", 21, 1 }, + { "TxSchLpbk0_CGEN", 20, 1 }, + { "TxSchMAC3_CGEN", 19, 1 }, + { "TxSchMAC2_CGEN", 18, 1 }, + { "TxSchMAC1_CGEN", 17, 1 }, + { "TxSchMAC0_CGEN", 16, 1 }, + { "TxInCh4_CGEN", 15, 1 }, + { "TxInCh3_CGEN", 14, 1 }, + { "TxInCh2_CGEN", 13, 1 }, + { "TxInCh1_CGEN", 12, 1 }, + { "TxInCh0_CGEN", 11, 1 }, + { "MPS_TX_CGEN_DYNAMIC", 0x9470, 0 }, + { "TxOutLpbk3_CGEN", 31, 1 }, + { "TxOutLpbk2_CGEN", 30, 1 }, + { "TxOutLpbk1_CGEN", 29, 1 }, + { "TxOutLpbk0_CGEN", 28, 1 }, + { "TxOutMAC3_CGEN", 27, 1 }, + { "TxOutMAC2_CGEN", 26, 1 }, + { "TxOutMAC1_CGEN", 25, 1 }, + { "TxOutMAC0_CGEN", 24, 1 }, + { "TxSchLpbk3_CGEN", 23, 1 }, + { "TxSchLpbk2_CGEN", 22, 1 }, + { "TxSchLpbk1_CGEN", 21, 1 }, + { "TxSchLpbk0_CGEN", 20, 1 }, + { "TxSchMAC3_CGEN", 19, 1 }, + { "TxSchMAC2_CGEN", 18, 1 }, + { "TxSchMAC1_CGEN", 17, 1 }, + { "TxSchMAC0_CGEN", 16, 1 }, + { "TxInCh4_CGEN", 15, 1 }, + { "TxInCh3_CGEN", 14, 1 }, + { "TxInCh2_CGEN", 13, 1 }, + { "TxInCh1_CGEN", 12, 1 }, + { "TxInCh0_CGEN", 11, 1 }, + { "MPS_TX2RX_CH_MAP", 0x9474, 0 }, + { "EnableLbk_Ch3", 3, 1 }, + { "EnableLbk_Ch2", 2, 1 }, + { "EnableLbk_Ch1", 1, 1 }, + { "EnableLbk_Ch0", 0, 1 }, + { "MPS_TX_DBG_CNT_CTL", 0x9478, 0 }, + { "MPS_TX_DBG_CNT", 0x947c, 0 }, + { "MPS_TX_INT2_ENABLE", 0x9498, 0 }, + { "MPS_TX_INT2_CAUSE", 0x949c, 0 }, + { "MPS_TX_PERR2_ENABLE", 0x94a0, 0 }, + { "MPS_TX_INT3_ENABLE", 0x94a4, 0 }, + { "MPS_TX_INT3_CAUSE", 0x94a8, 0 }, + { "MPS_TX_PERR3_ENABLE", 0x94ac, 0 }, + { "MPS_TX_INT4_ENABLE", 0x94b0, 0 }, + { "MPS_TX_INT4_CAUSE", 0x94b4, 0 }, + { "MPS_TX_PERR4_ENABLE", 0x94b8, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1e2e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1e2e4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1e6e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1e6e4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1eae0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1eae4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1eee0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1eee4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1f2e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1f2e4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1f6e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1f6e4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1fae0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1fae4, 0 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1fee0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_MAC_DROP_PP", 0x1fee4, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x30190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x30194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x30198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3019c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x301a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x301a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x301ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x301b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x301b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x301b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x301c4, 0 }, + { "OUT_TH", 22, 8 }, + { "IN_TH", 14, 8 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x301c8, 0 }, + { "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x301d0, 0 }, + { "off_pending", 8, 8 }, + { "on_pending", 0, 8 }, + { "MPS_PORT_TX_MAC_DROP_PP", 0x301d4, 0 }, + { "MPS_PORT_TX_LPBK_DROP_PP", 0x301d8, 0 }, + { "MPS_PORT_TX_MAC_DROP_CNT", 0x301dc, 0 }, + { "MPS_PORT_TX_LPBK_DROP_CNT", 0x301e0, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x32190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x32194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x32198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3219c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x321a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x321a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x321ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x321b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x321b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x321b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x321c4, 0 }, + { "OUT_TH", 22, 8 }, + { "IN_TH", 14, 8 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x321c8, 0 }, + { "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x321d0, 0 }, + { "off_pending", 8, 8 }, + { "on_pending", 0, 8 }, + { "MPS_PORT_TX_MAC_DROP_PP", 0x321d4, 0 }, + { "MPS_PORT_TX_LPBK_DROP_PP", 0x321d8, 0 }, + { "MPS_PORT_TX_MAC_DROP_CNT", 0x321dc, 0 }, + { "MPS_PORT_TX_LPBK_DROP_CNT", 0x321e0, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x34190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x34194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x34198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3419c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x341a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x341a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x341ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x341b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x341b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x341b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x341c4, 0 }, + { "OUT_TH", 22, 8 }, + { "IN_TH", 14, 8 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x341c8, 0 }, + { "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x341d0, 0 }, + { "off_pending", 8, 8 }, + { "on_pending", 0, 8 }, + { "MPS_PORT_TX_MAC_DROP_PP", 0x341d4, 0 }, + { "MPS_PORT_TX_LPBK_DROP_PP", 0x341d8, 0 }, + { "MPS_PORT_TX_MAC_DROP_CNT", 0x341dc, 0 }, + { "MPS_PORT_TX_LPBK_DROP_CNT", 0x341e0, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x36190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x36194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x36198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3619c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x361a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x361a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x361ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x361b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x361b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x361b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x361c4, 0 }, + { "OUT_TH", 22, 8 }, + { "IN_TH", 14, 8 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x361c8, 0 }, + { "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x361d0, 0 }, + { "off_pending", 8, 8 }, + { "on_pending", 0, 8 }, + { "MPS_PORT_TX_MAC_DROP_PP", 0x361d4, 0 }, + { "MPS_PORT_TX_LPBK_DROP_PP", 0x361d8, 0 }, + { "MPS_PORT_TX_MAC_DROP_CNT", 0x361dc, 0 }, + { "MPS_PORT_TX_LPBK_DROP_CNT", 0x361e0, 0 }, + { "MPS_TRC_CFG", 0x9800, 0 }, + { "TrcMultiRSSFilter", 5, 1 }, + { "TrcFifoEmpty", 4, 1 }, + { "TrcIgnoreDropInput", 3, 1 }, + { "TrcKeepDuplicates", 2, 1 }, + { "TrcEn", 1, 1 }, + { "TrcMultiFilter", 0, 1 }, + { "MPS_TRC_FILTER0_RSS_HASH", 0xa3f0, 0 }, + { "MPS_TRC_FILTER0_RSS_CONTROL", 0xa3f4, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER1_RSS_HASH", 0xa3f8, 0 }, + { "MPS_TRC_FILTER1_RSS_CONTROL", 0xa3fc, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER2_RSS_HASH", 0xa400, 0 }, + { "MPS_TRC_FILTER2_RSS_CONTROL", 0xa404, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER3_RSS_HASH", 0xa408, 0 }, + { "MPS_TRC_FILTER3_RSS_CONTROL", 0xa40c, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER4_RSS_HASH", 0xa410, 0 }, + { "MPS_TRC_FILTER4_RSS_CONTROL", 0xa414, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER5_RSS_HASH", 0xa418, 0 }, + { "MPS_TRC_FILTER5_RSS_CONTROL", 0xa41c, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER6_RSS_HASH", 0xa420, 0 }, + { "MPS_TRC_FILTER6_RSS_CONTROL", 0xa424, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER7_RSS_HASH", 0xa428, 0 }, + { "MPS_TRC_FILTER7_RSS_CONTROL", 0xa42c, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_RSS_HASH", 0xa430, 0 }, + { "MPS_TRC_RSS_CONTROL", 0xa434, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_VF_OFF_FILTER_0", 0xa438, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_1", 0xa43c, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_2", 0xa440, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_3", 0xa444, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_4", 0xa448, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_5", 0xa44c, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_6", 0xa450, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_VF_OFF_FILTER_7", 0xa454, 0 }, + { "TrcMPS2TP_MacOnly", 22, 1 }, + { "TrcAllMPS2TP", 21, 1 }, + { "TrcAllTP2MPS", 20, 1 }, + { "TrcAllVf", 19, 1 }, + { "OffEn", 18, 1 }, + { "VfFiltEn", 17, 1 }, + { "VfFiltMask", 9, 8 }, + { "VfFiltValid", 8, 1 }, + { "VfFiltData", 0, 8 }, + { "MPS_TRC_CGEN", 0xa458, 0 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa460, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa464, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa468, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa46c, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa470, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa474, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa478, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0xa47c, 0 }, + { "TfInsertActLen", 27, 1 }, + { "TfInsertTimer", 26, 1 }, + { "TfInvertMatch", 25, 1 }, + { "TfPktTooLarge", 24, 1 }, + { "TfEn", 23, 1 }, + { "TfPort", 18, 5 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa480, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa484, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa488, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa48c, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa490, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa494, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa498, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0xa49c, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4a0, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4a4, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4a8, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4ac, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4b0, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4b4, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4b8, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0xa4bc, 0 }, + { "MPS_TRC_FILTER_DROP", 0xa4c0, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4c4, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4c8, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4cc, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4d0, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4d4, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4d8, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0xa4dc, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_PERR_INJECT", 0x9804, 0 }, + { "MemSel", 1, 4 }, + { "InjectDataErr", 0, 1 }, + { "MPS_TRC_PERR_ENABLE", 0x9854, 0 }, + { "MiscPerr", 16, 1 }, + { "PktFifo", 8, 8 }, + { "FiltMem", 0, 8 }, + { "MPS_TRC_INT_ENABLE", 0xa4e0, 0 }, + { "PLErrEnb", 17, 1 }, + { "MiscPerr", 16, 1 }, + { "PktFifo", 8, 8 }, + { "FiltMem", 0, 8 }, + { "MPS_TRC_INT_CAUSE", 0xa4e4, 0 }, + { "PLErrEnb", 17, 1 }, + { "MiscPerr", 16, 1 }, + { "PktFifo", 8, 8 }, + { "FiltMem", 0, 8 }, + { "MPS_TRC_PERR_ENABLE2", 0xa4f0, 0 }, + { "trc_tf_ecc", 24, 8 }, + { "mps2mac_conv_trc_cerr", 22, 2 }, + { "mps2mac_conv_trc", 18, 4 }, + { "TF0_perr_1", 17, 1 }, + { "TF1_perr_1", 16, 1 }, + { "TF2_perr_1", 15, 1 }, + { "TF3_perr_1", 14, 1 }, + { "TF4_perr_1", 13, 1 }, + { "TF0_perr_0", 12, 1 }, + { "TF1_perr_0", 11, 1 }, + { "TF2_perr_0", 10, 1 }, + { "TF3_perr_0", 9, 1 }, + { "TF4_perr_0", 8, 1 }, + { "Perr_tf_in_ctl", 0, 8 }, + { "MPS_TRC_INT_ENABLE2", 0xa4f4, 0 }, + { "trc_tf_ecc", 24, 8 }, + { "mps2mac_conv_trc_cerr", 22, 2 }, + { "mps2mac_conv_trc", 18, 4 }, + { "TF0_perr_1", 17, 1 }, + { "TF1_perr_1", 16, 1 }, + { "TF2_perr_1", 15, 1 }, + { "TF3_perr_1", 14, 1 }, + { "TF4_perr_1", 13, 1 }, + { "TF0_perr_0", 12, 1 }, + { "TF1_perr_0", 11, 1 }, + { "TF2_perr_0", 10, 1 }, + { "TF3_perr_0", 9, 1 }, + { "TF4_perr_0", 8, 1 }, + { "Perr_tf_in_ctl", 0, 8 }, + { "MPS_TRC_INT_CAUSE2", 0xa4f8, 0 }, + { "trc_tf_ecc", 22, 8 }, + { "mps2mac_conv_trc", 18, 4 }, + { "TF0_perr_1", 17, 1 }, + { "TF1_perr_1", 16, 1 }, + { "TF2_perr_1", 15, 1 }, + { "TF3_perr_1", 14, 1 }, + { "TF4_perr_1", 13, 1 }, + { "TF0_perr_0", 12, 1 }, + { "TF1_perr_0", 11, 1 }, + { "TF2_perr_0", 10, 1 }, + { "TF3_perr_0", 9, 1 }, + { "TF4_perr_0", 8, 1 }, + { "Perr_tf_in_ctl", 0, 8 }, + { "MPS_TRC_TIMESTAMP_L", 0xa4e8, 0 }, + { "MPS_TRC_TIMESTAMP_H", 0xa4ec, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c00, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c04, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c08, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c0c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c10, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c14, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c18, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c1c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c20, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c24, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c28, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c2c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c30, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c34, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c38, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c3c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c40, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c44, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c48, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c4c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c50, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c54, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c58, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c5c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c60, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c64, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c68, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c6c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c80, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c84, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c88, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c8c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c90, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c94, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c98, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c9c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cac, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cbc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ccc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cdc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cec, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d00, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d04, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d08, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d0c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d10, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d14, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d18, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d1c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d20, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d24, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d28, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d2c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d30, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d34, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d38, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d3c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d40, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d44, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d48, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d4c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d50, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d54, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d58, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d5c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d60, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d64, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d68, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d6c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d80, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d84, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d88, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d8c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d90, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d94, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d98, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d9c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dac, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dbc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dcc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9ddc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dec, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e00, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e04, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e08, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e0c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e10, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e14, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e18, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e1c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e20, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e24, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e28, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e2c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e30, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e34, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e38, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e3c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e40, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e44, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e48, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e4c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e50, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e54, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e58, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e5c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e60, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e64, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e68, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e6c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e80, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e84, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e88, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e8c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e90, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e94, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e98, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e9c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eac, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ebc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ecc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9edc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eec, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f00, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f04, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f08, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f0c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f10, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f14, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f18, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f1c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f20, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f24, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f28, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f2c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f30, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f34, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f38, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f3c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f40, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f44, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f48, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f4c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f50, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f54, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f58, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f5c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f60, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f64, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f68, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f6c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f80, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f84, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f88, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f8c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f90, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f94, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f98, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f9c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fac, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fbc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fcc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fdc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fec, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa000, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa004, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa008, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa00c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa010, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa014, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa018, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa01c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa020, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa024, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa028, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa02c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa030, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa034, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa038, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa03c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa040, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa044, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa048, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa04c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa050, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa054, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa058, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa05c, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa060, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa064, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa068, 0 }, + { "MPS_TRC_FILTER4_MATCH", 0xa06c, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa080, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa084, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa088, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa08c, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa090, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa094, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa098, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa09c, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0a0, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0a4, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0a8, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0ac, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0b0, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0b4, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0b8, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0bc, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0c0, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0c4, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0c8, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0cc, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0d0, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0d4, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0d8, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0dc, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0e0, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0e4, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0e8, 0 }, + { "MPS_TRC_FILTER4_DONT_CARE", 0xa0ec, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa100, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa104, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa108, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa10c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa110, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa114, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa118, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa11c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa120, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa124, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa128, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa12c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa130, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa134, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa138, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa13c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa140, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa144, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa148, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa14c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa150, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa154, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa158, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa15c, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa160, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa164, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa168, 0 }, + { "MPS_TRC_FILTER5_MATCH", 0xa16c, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa180, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa184, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa188, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa18c, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa190, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa194, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa198, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa19c, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1a0, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1a4, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1a8, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1ac, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1b0, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1b4, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1b8, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1bc, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1c0, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1c4, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1c8, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1cc, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1d0, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1d4, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1d8, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1dc, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1e0, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1e4, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1e8, 0 }, + { "MPS_TRC_FILTER5_DONT_CARE", 0xa1ec, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa200, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa204, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa208, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa20c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa210, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa214, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa218, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa21c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa220, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa224, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa228, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa22c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa230, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa234, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa238, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa23c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa240, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa244, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa248, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa24c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa250, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa254, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa258, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa25c, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa260, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa264, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa268, 0 }, + { "MPS_TRC_FILTER6_MATCH", 0xa26c, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa280, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa284, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa288, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa28c, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa290, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa294, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa298, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa29c, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2a0, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2a4, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2a8, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2ac, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2b0, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2b4, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2b8, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2bc, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2c0, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2c4, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2c8, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2cc, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2d0, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2d4, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2d8, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2dc, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2e0, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2e4, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2e8, 0 }, + { "MPS_TRC_FILTER6_DONT_CARE", 0xa2ec, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa300, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa304, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa308, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa30c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa310, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa314, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa318, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa31c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa320, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa324, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa328, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa32c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa330, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa334, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa338, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa33c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa340, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa344, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa348, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa34c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa350, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa354, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa358, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa35c, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa360, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa364, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa368, 0 }, + { "MPS_TRC_FILTER7_MATCH", 0xa36c, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa380, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa384, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa388, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa38c, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa390, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa394, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa398, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa39c, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3a0, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3a4, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3a8, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3ac, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3b0, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3b4, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3b8, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3bc, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3c0, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3c4, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3c8, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3cc, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3d0, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3d4, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3d8, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3dc, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3e0, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3e4, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3e8, 0 }, + { "MPS_TRC_FILTER7_DONT_CARE", 0xa3ec, 0 }, + { "MPS_STAT_CTL", 0x9600, 0 }, + { "StatStopCtrl", 10, 1 }, + { "StopStat", 9, 1 }, + { "StatWriteCtrl", 8, 1 }, + { "CountLbPF", 7, 1 }, + { "CountLbVF", 6, 1 }, + { "CountPauseMCRx", 5, 1 }, + { "CountPauseStatRx", 4, 1 }, + { "CountPauseMCTx", 3, 1 }, + { "CountPauseStatTx", 2, 1 }, + { "CountVFinPF", 1, 1 }, + { "LpbkErrStat", 0, 1 }, + { "MPS_STAT_INT_ENABLE", 0x9608, 0 }, + { "MPS_STAT_INT_CAUSE", 0x960c, 0 }, + { "MPS_STAT_PERR_INT_ENABLE_SRAM", 0x9610, 0 }, + { "Rxbg", 27, 2 }, + { "Rxpf", 22, 5 }, + { "Txpf", 18, 4 }, + { "Rxport", 11, 7 }, + { "Lbport", 6, 5 }, + { "Txport", 0, 6 }, + { "MPS_STAT_PERR_INT_CAUSE_SRAM", 0x9614, 0 }, + { "Rxbg", 27, 2 }, + { "Rxpf", 22, 5 }, + { "Txpf", 18, 4 }, + { "Rxport", 11, 7 }, + { "Lbport", 6, 5 }, + { "Txport", 0, 6 }, + { "MPS_STAT_PERR_ENABLE_SRAM", 0x9618, 0 }, + { "Rxbg", 27, 2 }, + { "Rxpf", 22, 5 }, + { "Txpf", 18, 4 }, + { "Rxport", 11, 7 }, + { "Lbport", 6, 5 }, + { "Txport", 0, 6 }, + { "MPS_STAT_PERR_INT_ENABLE_TX_FIFO", 0x961c, 0 }, + { "TxCh", 20, 4 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_INT_CAUSE_TX_FIFO", 0x9620, 0 }, + { "TxCh", 20, 4 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_ENABLE_TX_FIFO", 0x9624, 0 }, + { "TxCh", 20, 4 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_INT_ENABLE_RX_FIFO", 0x9628, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_INT_CAUSE_RX_FIFO", 0x962c, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_ENABLE_RX_FIFO", 0x9630, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_INJECT", 0x9634, 0 }, + { "MemSel", 1, 7 }, + { "InjectDataErr", 0, 1 }, + { "MPS_STAT_DEBUG_SUB_SEL", 0x9638, 0 }, + { "SubPrtH", 5, 5 }, + { "SubPrtL", 0, 5 }, + { "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L", 0x9640, 0 }, + { "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_H", 0x9644, 0 }, + { "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_L", 0x9648, 0 }, + { "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_H", 0x964c, 0 }, + { "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_L", 0x9650, 0 }, + { "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_H", 0x9654, 0 }, + { "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_L", 0x9658, 0 }, + { "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_H", 0x965c, 0 }, + { "MPS_STAT_RX_BG_0_LB_DROP_FRAME_L", 0x9660, 0 }, + { "MPS_STAT_RX_BG_0_LB_DROP_FRAME_H", 0x9664, 0 }, + { "MPS_STAT_RX_BG_1_LB_DROP_FRAME_L", 0x9668, 0 }, + { "MPS_STAT_RX_BG_1_LB_DROP_FRAME_H", 0x966c, 0 }, + { "MPS_STAT_RX_BG_2_LB_DROP_FRAME_L", 0x9670, 0 }, + { "MPS_STAT_RX_BG_2_LB_DROP_FRAME_H", 0x9674, 0 }, + { "MPS_STAT_RX_BG_3_LB_DROP_FRAME_L", 0x9678, 0 }, + { "MPS_STAT_RX_BG_3_LB_DROP_FRAME_H", 0x967c, 0 }, + { "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L", 0x9680, 0 }, + { "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_H", 0x9684, 0 }, + { "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_L", 0x9688, 0 }, + { "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_H", 0x968c, 0 }, + { "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_L", 0x9690, 0 }, + { "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_H", 0x9694, 0 }, + { "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_L", 0x9698, 0 }, + { "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_H", 0x969c, 0 }, + { "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_L", 0x96a0, 0 }, + { "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_H", 0x96a4, 0 }, + { "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_L", 0x96a8, 0 }, + { "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_H", 0x96ac, 0 }, + { "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_L", 0x96b0, 0 }, + { "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_H", 0x96b4, 0 }, + { "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_L", 0x96b8, 0 }, + { "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_H", 0x96bc, 0 }, + { "MPS_STAT_PERR_INT_ENABLE_SRAM1", 0x96c0, 0 }, + { "Rxvf", 5, 3 }, + { "Txvf", 0, 5 }, + { "MPS_STAT_PERR_INT_CAUSE_SRAM1", 0x96c4, 0 }, + { "Rxvf", 5, 3 }, + { "Txvf", 0, 5 }, + { "MPS_STAT_PERR_ENABLE_SRAM1", 0x96c8, 0 }, + { "Rxvf", 5, 3 }, + { "Txvf", 0, 5 }, + { "MPS_STAT_STOP_UPD_BG", 0x96cc, 0 }, + { "MPS_STAT_STOP_UPD_PORT", 0x96d0, 0 }, + { "PtLpbk", 8, 4 }, + { "PtTx", 4, 4 }, + { "PtRx", 0, 4 }, + { "MPS_STAT_STOP_UPD_PF", 0x96d4, 0 }, + { "PFTx", 8, 8 }, + { "PFRx", 0, 8 }, + { "MPS_STAT_STOP_UPD_TX_VF_0_31", 0x96d8, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_32_63", 0x96dc, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_64_95", 0x96e0, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_96_127", 0x96e4, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_128_159", 0x9710, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_160_191", 0x9714, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_192_223", 0x9718, 0 }, + { "MPS_STAT_STOP_UPD_TX_VF_224_255", 0x971c, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_0_31", 0x96e8, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_32_63", 0x96ec, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_64_95", 0x96f0, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_96_127", 0x96f4, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_128_159", 0x96f8, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_160_191", 0x96fc, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_192_223", 0x9700, 0 }, + { "MPS_STAT_STOP_UPD_RX_VF_224_255", 0x9704, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x30400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x30404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x30408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3040c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x30410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x30414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x30418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3041c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x30420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x30424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x30428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3042c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x30430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x30434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x30438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3043c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x30440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x30444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x30448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3044c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x30450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x30454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x30458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3045c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x30460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x30464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x30468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3046c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x30470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x30474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x30478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3047c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x30480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x30484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x30488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3048c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x30490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x30494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x30498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3049c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x304a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x304a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x304a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x304ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x304b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x304b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x304c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x304c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x304c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x304cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x304d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x304d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x304d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x304dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x304e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x304e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x304e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x304ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x304f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x304f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x304f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x304fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x30500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x30504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x30508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3050c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x30510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x30514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x30518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3051c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x30520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x30524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x30528, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3052c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x30540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x30544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x30548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3054c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x30550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x30554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x30558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3055c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x30560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x30564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x30568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3056c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x30570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x30574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x30578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3057c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x30580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x30584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x30588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3058c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x30590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x30594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x30598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3059c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x305a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x305a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x305a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x305ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x305b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x305b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x305b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x305bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x305c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x305c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x305c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x305cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x305d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x305d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x305d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x305dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x305e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x305e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x305e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x305ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x305f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x305f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x305f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x305fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x30600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x30604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x30608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3060c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x30610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x30614, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x30618, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3061c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x30620, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x30624, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x30628, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3062c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x30630, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x30634, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x30638, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3063c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x30640, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x30644, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x30648, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3064c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x30650, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x30654, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x30658, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3065c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x32400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x32404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x32408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3240c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x32410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x32414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x32418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3241c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x32420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x32424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x32428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3242c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x32430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x32434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x32438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3243c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x32440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x32444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x32448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3244c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x32450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x32454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x32458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3245c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x32460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x32464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x32468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3246c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x32470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x32474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x32478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3247c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x32480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x32484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x32488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3248c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x32490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x32494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x32498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3249c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x324a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x324a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x324a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x324ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x324b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x324b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x324c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x324c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x324c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x324cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x324d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x324d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x324d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x324dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x324e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x324e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x324e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x324ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x324f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x324f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x324f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x324fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x32500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x32504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x32508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3250c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x32510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x32514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x32518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3251c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x32520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x32524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x32528, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3252c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x32540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x32544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x32548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3254c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x32550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x32554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x32558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3255c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x32560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x32564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x32568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3256c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x32570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x32574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x32578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3257c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x32580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x32584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x32588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3258c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x32590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x32594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x32598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3259c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x325a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x325a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x325a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x325ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x325b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x325b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x325b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x325bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x325c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x325c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x325c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x325cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x325d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x325d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x325d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x325dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x325e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x325e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x325e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x325ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x325f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x325f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x325f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x325fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x32600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x32604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x32608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3260c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x32610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x32614, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x32618, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3261c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x32620, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x32624, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x32628, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3262c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x32630, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x32634, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x32638, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3263c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x32640, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x32644, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x32648, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3264c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x32650, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x32654, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x32658, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3265c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x34400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x34404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x34408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3440c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x34410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x34414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x34418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3441c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x34420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x34424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x34428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3442c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x34430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x34434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x34438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3443c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x34440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x34444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x34448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3444c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x34450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x34454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x34458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3445c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x34460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x34464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x34468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3446c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x34470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x34474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x34478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3447c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x34480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x34484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x34488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3448c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x34490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x34494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x34498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3449c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x344a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x344a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x344a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x344ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x344b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x344b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x344c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x344c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x344c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x344cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x344d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x344d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x344d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x344dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x344e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x344e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x344e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x344ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x344f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x344f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x344f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x344fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x34500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x34504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x34508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3450c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x34510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x34514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x34518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3451c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x34520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x34524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x34528, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3452c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x34540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x34544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x34548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3454c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x34550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x34554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x34558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3455c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x34560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x34564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x34568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3456c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x34570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x34574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x34578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3457c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x34580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x34584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x34588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3458c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x34590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x34594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x34598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3459c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x345a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x345a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x345a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x345ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x345b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x345b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x345b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x345bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x345c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x345c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x345c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x345cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x345d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x345d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x345d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x345dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x345e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x345e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x345e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x345ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x345f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x345f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x345f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x345fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x34600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x34604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x34608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3460c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x34610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x34614, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x34618, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3461c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x34620, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x34624, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x34628, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3462c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x34630, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x34634, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x34638, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3463c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x34640, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x34644, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x34648, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3464c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x34650, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x34654, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x34658, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3465c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x36400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x36404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x36408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3640c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x36410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x36414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x36418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3641c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x36420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x36424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x36428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3642c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x36430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x36434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x36438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3643c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x36440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x36444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x36448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3644c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x36450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x36454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x36458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3645c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x36460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x36464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x36468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3646c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x36470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x36474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x36478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3647c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x36480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x36484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x36488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3648c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x36490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x36494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x36498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3649c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x364a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x364a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x364a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x364ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x364b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x364b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x364c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x364c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x364c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x364cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x364d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x364d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x364d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x364dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x364e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x364e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x364e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x364ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x364f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x364f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x364f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x364fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x36500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x36504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x36508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3650c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x36510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x36514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x36518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3651c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x36520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x36524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x36528, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3652c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x36540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x36544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x36548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3654c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x36550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x36554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x36558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3655c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x36560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x36564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x36568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3656c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x36570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x36574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x36578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3657c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x36580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x36584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x36588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3658c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x36590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x36594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x36598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3659c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x365a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x365a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x365a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x365ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x365b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x365b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x365b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x365bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x365c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x365c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x365c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x365cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x365d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x365d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x365d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x365dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x365e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x365e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x365e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x365ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x365f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x365f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x365f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x365fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x36600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x36604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x36608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3660c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x36610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x36614, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x36618, 0 }, + { "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3661c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x36620, 0 }, + { "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x36624, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x36628, 0 }, + { "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3662c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x36630, 0 }, + { "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x36634, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x36638, 0 }, + { "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3663c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x36640, 0 }, + { "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x36644, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x36648, 0 }, + { "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3664c, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x36650, 0 }, + { "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x36654, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x36658, 0 }, + { "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3665c, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e300, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e304, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e308, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e30c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e310, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e314, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e318, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e31c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e320, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e324, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e328, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e32c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e330, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e334, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e338, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e33c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e340, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e344, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e348, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e34c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e350, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e354, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e358, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e35c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e360, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e364, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e368, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e36c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e370, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e374, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e378, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e37c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1e380, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1e384, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e700, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e704, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e708, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e70c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e710, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e714, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e718, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e71c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e720, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e724, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e728, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e72c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e730, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e734, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e738, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e73c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e740, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e744, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e748, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e74c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e750, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e754, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e758, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e75c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e760, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e764, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e768, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e76c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e770, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e774, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e778, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e77c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1e780, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1e784, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1eb00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1eb04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1eb08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1eb0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1eb10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1eb14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1eb18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1eb1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1eb20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1eb24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1eb28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1eb2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1eb30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1eb34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1eb38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1eb3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1eb40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1eb44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1eb48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1eb4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1eb50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1eb54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1eb58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1eb5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1eb60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1eb64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1eb68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1eb6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1eb70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1eb74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1eb78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1eb7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1eb80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1eb84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ef00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ef04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ef08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ef0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ef10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ef14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ef18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ef1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ef20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ef24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ef28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ef2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ef30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ef34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ef38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ef3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ef40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ef44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ef48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ef4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ef50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ef54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ef58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ef5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ef60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ef64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ef68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ef6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ef70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ef74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ef78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ef7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1ef80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1ef84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f300, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f304, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f308, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f30c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f310, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f314, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f318, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f31c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f320, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f324, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f328, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f32c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f330, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f334, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f338, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f33c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f340, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f344, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f348, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f34c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f350, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f354, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f358, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f35c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f360, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f364, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f368, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f36c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f370, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f374, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f378, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f37c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1f380, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1f384, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f700, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f704, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f708, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f70c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f710, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f714, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f718, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f71c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f720, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f724, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f728, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f72c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f730, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f734, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f738, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f73c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f740, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f744, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f748, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f74c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f750, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f754, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f758, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f75c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f760, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f764, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f768, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f76c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f770, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f774, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f778, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f77c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1f780, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1f784, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1fb00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1fb04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1fb08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1fb0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1fb10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1fb14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1fb18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1fb1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1fb20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1fb24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1fb28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1fb2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1fb30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1fb34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1fb38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1fb3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1fb40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1fb44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1fb48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1fb4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1fb50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1fb54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1fb58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1fb5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1fb60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1fb64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1fb68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1fb6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1fb70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1fb74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1fb78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1fb7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1fb80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1fb84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ff00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ff04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ff08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ff0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ff10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ff14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ff18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ff1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ff20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ff24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ff28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ff2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ff30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ff34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ff38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ff3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ff40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ff44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ff48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ff4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ff50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ff54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ff58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ff5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ff60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ff64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ff68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ff6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ff70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ff74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ff78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ff7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1ff80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1ff84, 0 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30200, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30204, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30208, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3020c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30210, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30214, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30218, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3021c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30220, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30224, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30228, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3022c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30230, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30234, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30238, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3023c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30240, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30244, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30248, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3024c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30250, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30254, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30258, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3025c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30260, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30264, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30268, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3026c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30270, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30274, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30278, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3027c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30280, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30284, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30288, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3028c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30290, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30294, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x30298, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x3029c, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 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"PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x362ec, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x362f0, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x362f4, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x362f8, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x362fc, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x36300, 0 }, + { "DisEncapOuterRplct", 23, 1 }, + { "DisEncap", 22, 1 }, + { "Valid", 21, 1 }, + { "PortMap", 17, 4 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_HASH_CTL", 0x30304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x30308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3030c, 0 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x30310, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x30324, 0 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x30328, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3032c, 0 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x30330, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x30334, 0 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x30338, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN0", 0x30314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN1", 0x3033c, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN2", 0x30340, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN3", 0x30344, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x30318, 0 }, + { "SMAC_INDEX_EN", 17, 1 }, + { "LPBK_TCAM2_HIT_PRIORITY", 16, 1 }, + { "TCAM2_HIT_PRIORITY", 15, 1 }, + { "LPBK_TCAM1_HIT_PRIORITY", 14, 1 }, + { "LPBK_TCAM0_HIT_PRIORITY", 13, 1 }, + { "LPBK_TCAM_PRIORITY", 12, 1 }, + { "LPBK_SMAC_TCAM_SEL", 10, 2 }, + { "LPBK_DMAC_TCAM_SEL", 8, 2 }, + { "TCAM1_HIT_PRIORITY", 7, 1 }, + { "TCAM0_HIT_PRIORITY", 6, 1 }, + { "TCAM_PRIORITY", 5, 1 }, + { "SMAC_TCAM_SEL", 3, 2 }, + { "DMAC_TCAM_SEL", 1, 2 }, + { "PF_VLAN_SEL", 0, 1 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3031c, 0 }, + { "EthType1", 16, 16 }, + { "EthType2", 0, 16 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x30320, 0 }, + { "EN1", 1, 1 }, + { "EN2", 0, 1 }, + { "MPS_PORT_CLS_HASH_CTL", 0x32304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x32308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3230c, 0 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x32310, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x32324, 0 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x32328, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3232c, 0 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x32330, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x32334, 0 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x32338, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN0", 0x32314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN1", 0x3233c, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN2", 0x32340, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN3", 0x32344, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x32318, 0 }, + { "SMAC_INDEX_EN", 17, 1 }, + { "LPBK_TCAM2_HIT_PRIORITY", 16, 1 }, + { "TCAM2_HIT_PRIORITY", 15, 1 }, + { "LPBK_TCAM1_HIT_PRIORITY", 14, 1 }, + { "LPBK_TCAM0_HIT_PRIORITY", 13, 1 }, + { "LPBK_TCAM_PRIORITY", 12, 1 }, + { "LPBK_SMAC_TCAM_SEL", 10, 2 }, + { "LPBK_DMAC_TCAM_SEL", 8, 2 }, + { "TCAM1_HIT_PRIORITY", 7, 1 }, + { "TCAM0_HIT_PRIORITY", 6, 1 }, + { "TCAM_PRIORITY", 5, 1 }, + { "SMAC_TCAM_SEL", 3, 2 }, + { "DMAC_TCAM_SEL", 1, 2 }, + { "PF_VLAN_SEL", 0, 1 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3231c, 0 }, + { "EthType1", 16, 16 }, + { "EthType2", 0, 16 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x32320, 0 }, + { "EN1", 1, 1 }, + { "EN2", 0, 1 }, + { "MPS_PORT_CLS_HASH_CTL", 0x34304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x34308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3430c, 0 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x34310, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x34324, 0 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x34328, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3432c, 0 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x34330, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x34334, 0 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x34338, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN0", 0x34314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN1", 0x3433c, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN2", 0x34340, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN3", 0x34344, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x34318, 0 }, + { "SMAC_INDEX_EN", 17, 1 }, + { "LPBK_TCAM2_HIT_PRIORITY", 16, 1 }, + { "TCAM2_HIT_PRIORITY", 15, 1 }, + { "LPBK_TCAM1_HIT_PRIORITY", 14, 1 }, + { "LPBK_TCAM0_HIT_PRIORITY", 13, 1 }, + { "LPBK_TCAM_PRIORITY", 12, 1 }, + { "LPBK_SMAC_TCAM_SEL", 10, 2 }, + { "LPBK_DMAC_TCAM_SEL", 8, 2 }, + { "TCAM1_HIT_PRIORITY", 7, 1 }, + { "TCAM0_HIT_PRIORITY", 6, 1 }, + { "TCAM_PRIORITY", 5, 1 }, + { "SMAC_TCAM_SEL", 3, 2 }, + { "DMAC_TCAM_SEL", 1, 2 }, + { "PF_VLAN_SEL", 0, 1 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3431c, 0 }, + { "EthType1", 16, 16 }, + { "EthType2", 0, 16 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x34320, 0 }, + { "EN1", 1, 1 }, + { "EN2", 0, 1 }, + { "MPS_PORT_CLS_HASH_CTL", 0x36304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x36308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 16, 1 }, + { "Priority", 13, 3 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3630c, 0 }, + { "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x36310, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x36324, 0 }, + { "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x36328, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3632c, 0 }, + { "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x36330, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x36334, 0 }, + { "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x36338, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN0", 0x36314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN1", 0x3633c, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN2", 0x36340, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_BMC_VLAN3", 0x36344, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x36318, 0 }, + { "SMAC_INDEX_EN", 17, 1 }, + { "LPBK_TCAM2_HIT_PRIORITY", 16, 1 }, + { "TCAM2_HIT_PRIORITY", 15, 1 }, + { "LPBK_TCAM1_HIT_PRIORITY", 14, 1 }, + { "LPBK_TCAM0_HIT_PRIORITY", 13, 1 }, + { "LPBK_TCAM_PRIORITY", 12, 1 }, + { "LPBK_SMAC_TCAM_SEL", 10, 2 }, + { "LPBK_DMAC_TCAM_SEL", 8, 2 }, + { "TCAM1_HIT_PRIORITY", 7, 1 }, + { "TCAM0_HIT_PRIORITY", 6, 1 }, + { "TCAM_PRIORITY", 5, 1 }, + { "SMAC_TCAM_SEL", 3, 2 }, + { "DMAC_TCAM_SEL", 1, 2 }, + { "PF_VLAN_SEL", 0, 1 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3631c, 0 }, + { "EthType1", 16, 16 }, + { "EthType2", 0, 16 }, + { "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x36320, 0 }, + { "EN1", 1, 1 }, + { "EN2", 0, 1 }, + { "MPS_CLS_CTL", 0xd000, 0 }, + { "VlanClsEn_in", 7, 1 }, + { "DisTcamParChk", 6, 1 }, + { "VlanLkpEn", 5, 1 }, + { "MemWriteFault", 4, 1 }, + { "MemWriteWaiting", 3, 1 }, + { "CimNoPromiscuous", 2, 1 }, + { "HypervisorOnly", 1, 1 }, + { "VlanClsEn", 0, 1 }, + { "MPS_CLS_ARB_WEIGHT", 0xd004, 0 }, + { "PlWeight", 16, 5 }, + { "CimWeight", 8, 5 }, + { "LpbkWeight", 0, 5 }, + { "MPS_CLS_NCSI_ETH_TYPE", 0xd008, 0 }, + { "EthType1", 16, 16 }, + { "EthType2", 0, 16 }, + { "MPS_CLS_NCSI_ETH_TYPE_EN", 0xd00c, 0 }, + { "EN1", 1, 1 }, + { "EN2", 0, 1 }, + { "MPS_CLS_BMC_MAC_ADDR_L", 0xd010, 0 }, + { "MPS_CLS_BMC_MAC_ADDR_H", 0xd014, 0 }, + { "MatchAll", 18, 1 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_CLS_BMC_VLAN", 0xd018, 0 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_TCAM0_MASK_REG0", 0xf040, 0 }, + { "MPS_CLS_TCAM0_MASK_REG1", 0xf044, 0 }, + { "MPS_CLS_TCAM0_MASK_REG2", 0xf048, 0 }, + { "MPS_CLS_TCAM1_MASK_REG0", 0xf04c, 0 }, + { "MPS_CLS_TCAM1_MASK_REG1", 0xf050, 0 }, + { "MPS_CLS_TCAM1_MASK_REG2", 0xf054, 0 }, + { "MPS_CLS_TCAM2_MASK_REG0", 0xf064, 0 }, + { "MPS_CLS_TCAM2_MASK_REG1", 0xf068, 0 }, + { "MPS_CLS_TCAM2_MASK_REG2", 0xf06c, 0 }, + { "MPS_CLS_PERR_INJECT", 0xd01c, 0 }, + { "MemSel", 1, 2 }, + { "InjectDataErr", 0, 1 }, + { "MPS_CLS_PERR_ENABLE", 0xd020, 0 }, + { "CIM2MPS_Intf_Par", 4, 1 }, + { "TCAM_CRC_SRAM", 3, 1 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_INT_ENABLE", 0xd024, 0 }, + { "PLErrEnb", 5, 1 }, + { "CIM2MPS_Intf_Par", 4, 1 }, + { "TCAM_CRC_SRAM", 3, 1 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_INT_CAUSE", 0xd028, 0 }, + { "PLErrEnb", 5, 1 }, + { "CIM2MPS_Intf_Par", 4, 1 }, + { "TCAM_CRC_SRAM", 3, 1 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_PL_TEST_DATA_L", 0xd02c, 0 }, + { "MPS_CLS_PL_TEST_DATA_H", 0xd030, 0 }, + { "MPS_CLS_PL_TEST_RES_DATA", 0xd034, 0 }, + { "Cls_Spare", 30, 2 }, + { "Cls_Priority", 27, 3 }, + { "Cls_Replicate", 26, 1 }, + { "Cls_Index", 15, 11 }, + { "Cls_VF", 7, 8 }, + { "Cls_VF_Vld", 6, 1 }, + { "Cls_PF", 3, 3 }, + { "Cls_Match", 0, 3 }, + { "MPS_CLS_PL_TEST_CTL", 0xd038, 0 }, + { "MPS_CLS_PORT_BMC_CTL", 0xd03c, 0 }, + { "MPS_CLS0_MATCH_CNT_TCAM", 0xd100, 0 }, + { "MPS_CLS0_MATCH_CNT_HASH", 0xd104, 0 }, + { "MPS_CLS0_MATCH_CNT_BCAST", 0xd108, 0 }, + { "MPS_CLS0_MATCH_CNT_BMC", 0xd10c, 0 }, + { "MPS_CLS0_MATCH_CNT_PROM", 0xd110, 0 }, + { "MPS_CLS0_MATCH_CNT_HPROM", 0xd114, 0 }, + { "MPS_CLS0_MISS_CNT", 0xd118, 0 }, + { "MPS_CLS1_MATCH_CNT_TCAM", 0xd11c, 0 }, + { "MPS_CLS1_MATCH_CNT_HASH", 0xd120, 0 }, + { "MPS_CLS1_MATCH_CNT_BCAST", 0xd124, 0 }, + { "MPS_CLS1_MATCH_CNT_BMC", 0xd128, 0 }, + { "MPS_CLS1_MATCH_CNT_PROM", 0xd12c, 0 }, + { "MPS_CLS1_MATCH_CNT_HPROM", 0xd130, 0 }, + { "MPS_CLS1_MISS_CNT", 0xd134, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd200, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd220, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd240, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd260, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd280, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2a0, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2c0, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2e0, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd204, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd224, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd244, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd264, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd284, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2a4, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2c4, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2e4, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd208, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd228, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd248, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd268, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd288, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2a8, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2c8, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2e8, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd20c, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd22c, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd24c, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd26c, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd28c, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ac, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2cc, 0 }, + { "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ec, 0 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd210, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd230, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd250, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd270, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd290, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2b0, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2d0, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2f0, 0 }, + { "ClsTrcVlanVld", 31, 1 }, + { "ClsTrcVlanId", 16, 12 }, + { "ClsTrcReqPort", 0, 4 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd214, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd234, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd254, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd274, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd294, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2b4, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2d4, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2f4, 0 }, + { "ClsTrcLkpType", 31, 1 }, + { "ClsTrcDIPHit", 30, 1 }, + { "ClsTrcVNI", 0, 24 }, + { "MPS_CLS_RESULT_TRACE", 0xd300, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd304, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd308, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd30c, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd310, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd314, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd318, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_RESULT_TRACE", 0xd31c, 0 }, + { "ClsTrcPortNum", 31, 1 }, + { "ClsTrcPriority", 28, 3 }, + { "ClsTrcMultiListen", 27, 1 }, + { "ClsTrcReplicate", 26, 1 }, + { "ClsTrcPortMap", 24, 2 }, + { "ClsTrcMatch", 23, 1 }, + { "ClsTrcIndex", 12, 11 }, + { "ClsTrcVF_Vld", 11, 1 }, + { "ClsTrcPF", 3, 8 }, + { "ClsTrcVF", 0, 3 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc4, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc8, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfcc, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd4, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd8, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfdc, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfe0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_DIP_ID_TABLE_CTL", 0x12000, 0 }, + { "DIP_VLD", 12, 1 }, + { "DIP_TYPE", 11, 1 }, + { "DIP_WRN", 10, 1 }, + { "DIP_SEG", 8, 2 }, + { "DIP_TBL_RSVD1", 5, 3 }, + { "DIP_TBL_ADDR", 0, 5 }, + { "MPS_CLS_DIP_ID_TABLE_DATA", 0x12004, 0 }, + { "MPS_RX_HASH_LKP_TABLE", 0x12060, 0 }, + { "MPS_RX_HASH_LKP_TABLE", 0x12064, 0 }, + { "MPS_RX_HASH_LKP_TABLE", 0x12068, 0 }, + { "MPS_RX_HASH_LKP_TABLE", 0x1206c, 0 }, + { "MPS_CLS_SRAM_L", 0xe000, 0 }, + { "DisEncapOuterRplct", 31, 1 }, + { "DisEncap", 30, 1 }, + { "MultiListen3", 29, 1 }, + { "MultiListen2", 28, 1 }, + { "MultiListen1", 27, 1 }, + { "MultiListen0", 26, 1 }, + { "Priority3", 23, 3 }, + { "Priority2", 20, 3 }, + { "Priority1", 17, 3 }, + { "Priority0", 14, 3 }, + { "Valid", 13, 1 }, + { "Replicate", 12, 1 }, + { "PF", 9, 3 }, + { "VF_Valid", 8, 1 }, + { "VF", 0, 8 }, + { "MPS_CLS_SRAM_H", 0xe004, 0 }, + { "SramWRN", 31, 1 }, + { "SramSpare", 27, 4 }, + { "SramIndex", 16, 11 }, + { "MacParity2", 10, 1 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_HASH_TCAM_CTL", 0xe008, 0 }, + { "CtlCmdType", 15, 1 }, + { "CtlXYBitSel", 12, 1 }, + { "CtlTcamIndex", 0, 9 }, + { "MPS_CLS_HASH_TCAM_DATA", 0xe00c, 0 }, + { "LkpType", 24, 1 }, + { "VNI", 0, 24 }, + { "MPS_CLS_TCAM_DATA0", 0xf000, 0 }, + { "MPS_CLS_TCAM_DATA1", 0xf004, 0 }, + { "VIDL", 16, 16 }, + { "DMACH", 0, 16 }, + { "MPS_CLS_TCAM_DATA2_CTL", 0xf008, 0 }, + { "CtlCmdType", 31, 1 }, + { "CtlReqID", 30, 1 }, + { "CtlTcamSel", 26, 2 }, + { "CtlTcamIndex", 17, 9 }, + { "CtlXYBitSel", 16, 1 }, + { "DataPortNum", 12, 4 }, + { "DataLkpType", 10, 2 }, + { "DataDipHit", 8, 1 }, + { "DataVIDH2", 7, 1 }, + { "DataVIDH1", 0, 7 }, + { "MPS_CLS_TCAM0_RDATA0_REQ_ID0", 0xf010, 0 }, + { "MPS_CLS_TCAM0_RDATA1_REQ_ID0", 0xf014, 0 }, + { "VIDL", 16, 16 }, + { "DMACH", 0, 16 }, + { "MPS_CLS_TCAM0_RDATA2_REQ_ID0", 0xf018, 0 }, + { "DataPortNum", 12, 4 }, + { "DataLkpType", 10, 2 }, + { "DataDipHit", 8, 1 }, + { "DataVIDH2", 7, 1 }, + { "DataVIDH1", 0, 7 }, + { "MPS_CLS_TCAM0_RDATA0_REQ_ID1", 0xf01c, 0 }, + { "MPS_CLS_TCAM0_RDATA1_REQ_ID1", 0xf020, 0 }, + { "VIDL", 16, 16 }, + { "DMACH", 0, 16 }, + { "MPS_CLS_TCAM0_RDATA2_REQ_ID1", 0xf024, 0 }, + { "DataPortNum", 12, 4 }, + { "DataLkpType", 10, 2 }, + { "DataDipHit", 8, 1 }, + { "DataVIDH2", 7, 1 }, + { "DataVIDH1", 0, 7 }, + { "MPS_CLS_TCAM1_RDATA0_REQ_ID0", 0xf028, 0 }, + { "MPS_CLS_TCAM1_RDATA1_REQ_ID0", 0xf02c, 0 }, + { "VIDL", 16, 16 }, + { "DMACH", 0, 16 }, + { "MPS_CLS_TCAM1_RDATA2_REQ_ID0", 0xf030, 0 }, + { "DataPortNum", 12, 4 }, + { "DataLkpType", 10, 2 }, + { "DataDipHit", 8, 1 }, + { "DataVIDH2", 7, 1 }, + { "DataVIDH1", 0, 7 }, + { "MPS_CLS_TCAM1_RDATA0_REQ_ID1", 0xf034, 0 }, + { "MPS_CLS_TCAM1_RDATA1_REQ_ID1", 0xf038, 0 }, + { "VIDL", 16, 16 }, + { "DMACH", 0, 16 }, + { "MPS_CLS_TCAM1_RDATA2_REQ_ID1", 0xf03c, 0 }, + { "DataPortNum", 12, 4 }, + { "DataLkpType", 10, 2 }, + { "DataDipHit", 8, 1 }, + { "DataVIDH2", 7, 1 }, + { "DataVIDH1", 0, 7 }, + { "MPS_CLS_TCAM_BIST_CTRL", 0xf058, 0 }, + { "rst_cb", 31, 1 }, + { "cb_start", 0, 28 }, + { "MPS_CLS_TCAM_BIST_CB_PASS", 0xf05c, 0 }, + { "MPS_CLS_TCAM_BIST_CB_BUSY", 0xf060, 0 }, + { NULL } +}; + +struct reg_info t7_cpl_switch_regs[] = { + { "CNTRL", 0x19040, 0 }, + { "cpl_pkt_tid", 8, 24 }, + { "cim_split_enable", 6, 1 }, + { "cim_truncate_enable", 5, 1 }, + { "cim_to_up_full_size", 4, 1 }, + { "cpu_no_enable", 3, 1 }, + { "switch_table_enable", 2, 1 }, + { "sge_enable", 1, 1 }, + { "cim_enable", 0, 1 }, + { "TBL_IDX", 0x19044, 0 }, + { "TBL_DATA", 0x19048, 0 }, + { "ZERO_ERROR", 0x1904c, 0 }, + { "zero_cmd_ch3", 24, 8 }, + { "zero_cmd_ch2", 16, 8 }, + { "zero_cmd_ch1", 8, 8 }, + { "zero_cmd_ch0", 0, 8 }, + { "INTR_ENABLE", 0x19050, 0 }, + { "perr_cpl_128to128_3", 9, 1 }, + { "perr_cpl_128to128_2", 8, 1 }, + { "perr_cpl_128to128_1", 7, 1 }, + { "perr_cpl_128to128_0", 6, 1 }, + { "cim_op_map_perr", 5, 1 }, + { "cim_ovfl_error", 4, 1 }, + { "tp_framing_error", 3, 1 }, + { "sge_framing_error", 2, 1 }, + { "cim_framing_error", 1, 1 }, + { "zero_switch_error", 0, 1 }, + { "INTR_CAUSE", 0x19054, 0 }, + { "perr_cpl_128to128_3", 9, 1 }, + { "perr_cpl_128to128_2", 8, 1 }, + { "perr_cpl_128to128_1", 7, 1 }, + { "perr_cpl_128to128_0", 6, 1 }, + { "cim_op_map_perr", 5, 1 }, + { "cim_ovfl_error", 4, 1 }, + { "tp_framing_error", 3, 1 }, + { "sge_framing_error", 2, 1 }, + { "cim_framing_error", 1, 1 }, + { "zero_switch_error", 0, 1 }, + { "MAP_TBL_IDX", 0x19058, 0 }, + { "cpl_map_tbl_sel", 9, 2 }, + { "cim_split_opcode_program", 8, 1 }, + { "cpl_map_tbl_idx", 0, 8 }, + { "MAP_TBL_DATA", 0x1905c, 0 }, + { NULL } +}; + +struct reg_info t7_smb_regs[] = { + { "SMB_GLOBAL_TIME_CFG", 0x19060, 0 }, + { "MacroCntCfg", 12, 5 }, + { "MicroCntCfg", 0, 12 }, + { "SMB_MST_TIMEOUT_CFG", 0x19064, 0 }, + { "SMB_MST_CTL_CFG", 0x19068, 0 }, + { "MstFifoDbg", 31, 1 }, + { "MstFifoDbgClr", 30, 1 }, + { "MstRxByteCfg", 12, 6 }, + { "MstTxByteCfg", 6, 6 }, + { "MstReset", 1, 1 }, + { "MstCtlEn", 0, 1 }, + { "SMB_MST_CTL_STS", 0x1906c, 0 }, + { "MstRxByteCnt", 12, 6 }, + { "MstTxByteCnt", 6, 6 }, + { "MstBusySts", 0, 1 }, + { "SMB_MST_TX_FIFO_RDWR", 0x19070, 0 }, + { "SMB_MST_RX_FIFO_RDWR", 0x19074, 0 }, + { "SMB_SLV_TIMEOUT_CFG", 0x19078, 0 }, + { "SMB_SLV_CTL_CFG", 0x1907c, 0 }, + { "SlvFifoDbg", 31, 1 }, + { "SlvFifoDbgClr", 30, 1 }, + { "SlvCrcOutBitInv", 21, 1 }, + { "SlvCrcOutBitRev", 20, 1 }, + { "SlvCrcInBitRev", 19, 1 }, + { "SlvCrcPreset", 11, 8 }, + { "SlvAddrCfg", 4, 7 }, + { "SlvAlrtSet", 2, 1 }, + { "SlvReset", 1, 1 }, + { "SlvCtlEn", 0, 1 }, + { "SMB_SLV_CTL_STS", 0x19080, 0 }, + { "SlvFifoTxCnt", 12, 6 }, + { "SlvFifoCnt", 6, 6 }, + { "SlvAlrtSts", 2, 1 }, + { "SlvBusySts", 0, 1 }, + { "SMB_SLV_FIFO_RDWR", 0x19084, 0 }, + { "SMB_INT_ENABLE", 0x1908c, 0 }, + { "MstTxFifoParEn", 21, 1 }, + { "MstRxFifoParEn", 20, 1 }, + { "SlvFifoParEn", 19, 1 }, + { "SlvUnExpBusStopEn", 18, 1 }, + { "SlvUnExpBusStartEn", 17, 1 }, + { "SlvCommandCodeInvEn", 16, 1 }, + { "SlvByteCntErrEn", 15, 1 }, + { "SlvUnExpAckMstEn", 14, 1 }, + { "SlvUnExpNackMstEn", 13, 1 }, + { "SlvNoBusStopEn", 12, 1 }, + { "SlvNoRepStartEn", 11, 1 }, + { "SlvRxAddrIntEn", 10, 1 }, + { "SlvRxPecErrIntEn", 9, 1 }, + { "SlvPrepToArpIntEn", 8, 1 }, + { "SlvTimeOutIntEn", 7, 1 }, + { "SlvErrIntEn", 6, 1 }, + { "SlvDoneIntEn", 5, 1 }, + { "SlvRxRdyIntEn", 4, 1 }, + { "MstTimeOutIntEn", 3, 1 }, + { "MstNAckIntEn", 2, 1 }, + { "MstLostArbIntEn", 1, 1 }, + { "MstDoneIntEn", 0, 1 }, + { "SMB_INT_CAUSE", 0x19090, 0 }, + { "MstTxFifoParInt", 21, 1 }, + { "MstRxFifoParInt", 20, 1 }, + { "SlvFifoParInt", 19, 1 }, + { "SlvUnExpBusStopInt", 18, 1 }, + { "SlvUnExpBusStartInt", 17, 1 }, + { "SlvCommandCodeInvInt", 16, 1 }, + { "SlvByteCntErrInt", 15, 1 }, + { "SlvUnExpAckMstInt", 14, 1 }, + { "SlvUnExpNackMstInt", 13, 1 }, + { "SlvNoBusStopInt", 12, 1 }, + { "SlvNoRepStartInt", 11, 1 }, + { "SlvRxAddrInt", 10, 1 }, + { "SlvRxPecErrInt", 9, 1 }, + { "SlvPrepToArpInt", 8, 1 }, + { "SlvTimeOutInt", 7, 1 }, + { "SlvErrInt", 6, 1 }, + { "SlvDoneInt", 5, 1 }, + { "SlvRxRdyInt", 4, 1 }, + { "MstTimeOutInt", 3, 1 }, + { "MstNAckInt", 2, 1 }, + { "MstLostArbInt", 1, 1 }, + { "MstDoneInt", 0, 1 }, + { "SMB_DEBUG_DATA", 0x19094, 0 }, + { "DebugDataH", 16, 16 }, + { "DebugDataL", 0, 16 }, + { "SMB_PERR_EN", 0x19098, 0 }, + { "MstTxFifo", 21, 1 }, + { "MstRxFifo", 19, 1 }, + { "SlvFifo", 18, 1 }, + { "MstTxFifoPerrEn", 2, 1 }, + { "MstRxFifoPerrEn", 1, 1 }, + { "SlvFifoPerrEn", 0, 1 }, + { "SMB_PERR_INJ", 0x1909c, 0 }, + { "MstTxInjDataErr", 3, 1 }, + { "MstRxInjDataErr", 2, 1 }, + { "SlvInjDataErr", 1, 1 }, + { "FifoInjDataErrEn", 0, 1 }, + { "SMB_SLV_ARP_CTL", 0x190a0, 0 }, + { "ArpCommandCode", 2, 8 }, + { "ArpAddrRes", 1, 1 }, + { "ArpAddrVal", 0, 1 }, + { "SMB_ARP_UDID0", 0x190a4, 0 }, + { "SMB_ARP_UDID1", 0x190a8, 0 }, + { "SubsystemVendorID", 16, 16 }, + { "SubsystemDeviceID", 0, 16 }, + { "SMB_ARP_UDID2", 0x190ac, 0 }, + { "DeviceID", 16, 16 }, + { "Interface", 0, 16 }, + { "SMB_ARP_UDID3", 0x190b0, 0 }, + { "DeviceCap", 24, 8 }, + { "VersionID", 16, 8 }, + { "VendorID", 0, 16 }, + { "SMB_SLV_AUX_ADDR0", 0x190b4, 0 }, + { "AuxAddr0Val", 6, 1 }, + { "AuxAddr0", 0, 6 }, + { "SMB_SLV_AUX_ADDR1", 0x190b8, 0 }, + { "AuxAddr1Val", 6, 1 }, + { "AuxAddr1", 0, 6 }, + { "SMB_SLV_AUX_ADDR2", 0x190bc, 0 }, + { "AuxAddr2Val", 6, 1 }, + { "AuxAddr2", 0, 6 }, + { "SMB_SLV_AUX_ADDR3", 0x190c0, 0 }, + { "AuxAddr3Val", 6, 1 }, + { "AuxAddr3", 0, 6 }, + { "SMB_COMMAND_CODE0", 0x190c4, 0 }, + { "SMB_COMMAND_CODE1", 0x190c8, 0 }, + { "SMB_COMMAND_CODE2", 0x190cc, 0 }, + { "SMB_COMMAND_CODE3", 0x190d0, 0 }, + { "SMB_COMMAND_CODE4", 0x190d4, 0 }, + { "SMB_COMMAND_CODE5", 0x190d8, 0 }, + { "SMB_COMMAND_CODE6", 0x190dc, 0 }, + { "SMB_COMMAND_CODE7", 0x190e0, 0 }, + { "SMB_MICRO_CNT_CLK_CFG", 0x190e4, 0 }, + { "MacroCntClkCfg", 8, 5 }, + { "MicroCntClkCfg", 0, 8 }, + { "SMB_CTL_STATUS", 0x190e8, 0 }, + { "MstBusBusy", 2, 1 }, + { "SlvBusBusy", 1, 1 }, + { "BusBusy", 0, 1 }, + { NULL } +}; + +struct reg_info t7_i2cm_regs[] = { + { "I2CM_CFG", 0x190f0, 0 }, + { "I2CM_DATA", 0x190f4, 0 }, + { "I2CM_OP", 0x190f8, 0 }, + { "Busy", 31, 1 }, + { "Ack", 30, 1 }, + { "Cont", 1, 1 }, + { "Op", 0, 1 }, + { NULL } +}; + +struct reg_info t7_mi_regs[] = { + { "MI_CFG", 0x19100, 0 }, + { "T4_St", 14, 1 }, + { "ClkDiv", 5, 8 }, + { "St", 3, 2 }, + { "PreEn", 2, 1 }, + { "MDIInv", 1, 1 }, + { "MDIO_1P2V_Sel", 0, 1 }, + { "MI_ADDR", 0x19104, 0 }, + { "PhyAddr", 5, 5 }, + { "RegAddr", 0, 5 }, + { "MI_DATA", 0x19108, 0 }, + { "MI_OP", 0x1910c, 0 }, + { "Busy", 31, 1 }, + { "St", 3, 2 }, + { "Inc", 2, 1 }, + { "Op", 0, 2 }, + { NULL } +}; + +struct reg_info t7_uart_regs[] = { + { "UART_CONFIG", 0x19110, 0 }, + { "StopBits", 25, 2 }, + { "Parity", 23, 2 }, + { "DataBits", 19, 4 }, + { "ClkDiv", 0, 18 }, + { NULL } +}; + +struct reg_info t7_pmu_regs[] = { + { "PMU_PART_CG_PWRMODE", 0x19120, 0 }, + { "PL_DIS_PRTY_CHK", 20, 1 }, + { "ARM_Part_CGEn", 19, 1 }, + { "PDP_Part_CGEn", 18, 1 }, + { "TP_Part_CGEn", 17, 1 }, + { "EDC0_Part_CGEn", 16, 1 }, + { "EDC1_Part_CGEn", 15, 1 }, + { "CRYPTO_Part_CGEn", 14, 1 }, + { "MA_Part_CGEn", 13, 1 }, + { "PCIE_Part_CGEn", 10, 1 }, + { "NVME_Part_CGEn", 9, 1 }, + { "XP10_Part_CGEn", 8, 1 }, + { "GPEX_Part_CGEn", 7, 1 }, + { "InitPowerMode", 0, 2 }, + { "PMU_SLEEPMODE_WAKEUP", 0x19124, 0 }, + { "GlobalDeepSleepEn", 6, 1 }, + { "HWWakeUpEn", 5, 1 }, + { "Port3SleepMode", 4, 1 }, + { "Port2SleepMode", 3, 1 }, + { "Port1SleepMode", 2, 1 }, + { "Port0SleepMode", 1, 1 }, + { "WakeUp", 0, 1 }, + { NULL } +}; + +struct reg_info t7_ulp_rx_regs[] = { + { "ULP_RX_CTL", 0x19150, 0 }, + { "Iscsi_Page_Size_Chk_Enb", 31, 1 }, + { "Rdma_0B_Wr_Opcode_hi", 29, 1 }, + { "Rdma_Immediate_Cqe", 28, 1 }, + { "Rdma_Atomic_Wr_Rsp_Cqe", 27, 1 }, + { "Rdma_Verify_Rsp_Flush", 26, 1 }, + { "Rdma_Verify_Rsp_Cqe", 25, 1 }, + { "Rdma_Flush_Rsp_Cqe", 24, 1 }, + { "Rdma_Atomic_Rsp_Cqe", 23, 1 }, + { "Tpt_Extension_Mode", 22, 1 }, + { "NVMe_TCP_ddp_val_en", 21, 1 }, + { "NVMe_TCP_Remove_Hdr_Crc", 20, 1 }, + { "NVMe_TCP_Last_PDU_Check_Enb", 19, 1 }, + { "NVMe_TCP_offset_submode", 17, 2 }, + { "NVMe_TCP_offset_mode", 16, 1 }, + { "qpid_check_disable_for_send", 15, 1 }, + { "disable_0B_STAG_ERR", 14, 1 }, + { "Rdma_0B_Wr_Opcode_lo", 10, 4 }, + { "RDMA_0b_wr_pass", 9, 1 }, + { "STAG_RQE", 8, 1 }, + { "RDMA_State_En", 7, 1 }, + { "Crc1_En", 6, 1 }, + { "RDMA_0b_wr_cqe", 5, 1 }, + { "PCIE_Atrb_En", 4, 1 }, + { "RDMA_permissive_mode", 3, 1 }, + { "PagePodME", 2, 1 }, + { "IscsiTagTcb", 1, 1 }, + { "TddpTagTcb", 0, 1 }, + { "ULP_RX_INT_ENABLE", 0x19154, 0 }, + { "CERR_PCMD_FIFO_3", 19, 1 }, + { "CERR_PCMD_FIFO_2", 18, 1 }, + { "CERR_PCMD_FIFO_1", 17, 1 }, + { "CERR_PCMD_FIFO_0", 16, 1 }, + { "CERR_DATA_FIFO_3", 15, 1 }, + { "CERR_DATA_FIFO_2", 14, 1 }, + { "CERR_DATA_FIFO_1", 13, 1 }, + { "CERR_DATA_FIFO_0", 12, 1 }, + { "SE_CNT_MISMATCH_3", 11, 1 }, + { "SE_CNT_MISMATCH_2", 10, 1 }, + { "SE_CNT_MISMATCH_1", 9, 1 }, + { "SE_CNT_MISMATCH_0", 8, 1 }, + { "ENABLE_CTX_3", 7, 1 }, + { "ENABLE_CTX_2", 6, 1 }, + { "ENABLE_CTX_1", 5, 1 }, + { "ENABLE_CTX_0", 4, 1 }, + { "ENABLE_ALN_SDC_ERR_3", 3, 1 }, + { "ENABLE_ALN_SDC_ERR_2", 2, 1 }, + { "ENABLE_ALN_SDC_ERR_1", 1, 1 }, + { "ENABLE_ALN_SDC_ERR_0", 0, 1 }, + { "ULP_RX_INT_CAUSE", 0x19158, 0 }, + { "CERR_PCMD_FIFO_3", 19, 1 }, + { "CERR_PCMD_FIFO_2", 18, 1 }, + { "CERR_PCMD_FIFO_1", 17, 1 }, + { "CERR_PCMD_FIFO_0", 16, 1 }, + { "CERR_DATA_FIFO_3", 15, 1 }, + { "CERR_DATA_FIFO_2", 14, 1 }, + { "CERR_DATA_FIFO_1", 13, 1 }, + { "CERR_DATA_FIFO_0", 12, 1 }, + { "SE_CNT_MISMATCH_3", 11, 1 }, + { "SE_CNT_MISMATCH_2", 10, 1 }, + { "SE_CNT_MISMATCH_1", 9, 1 }, + { "SE_CNT_MISMATCH_0", 8, 1 }, + { "ENABLE_CTX_3", 7, 1 }, + { "ENABLE_CTX_2", 6, 1 }, + { "ENABLE_CTX_1", 5, 1 }, + { "ENABLE_CTX_0", 4, 1 }, + { "ENABLE_ALN_SDC_ERR_3", 3, 1 }, + { "ENABLE_ALN_SDC_ERR_2", 2, 1 }, + { "ENABLE_ALN_SDC_ERR_1", 1, 1 }, + { "ENABLE_ALN_SDC_ERR_0", 0, 1 }, + { "ULP_RX_ISCSI_LLIMIT", 0x1915c, 0 }, + { "ULP_RX_ISCSI_ULIMIT", 0x19160, 0 }, + { "ULP_RX_ISCSI_TAGMASK", 0x19164, 0 }, + { "IscsiTagMask", 6, 26 }, + { "ULP_RX_ISCSI_PSZ", 0x19168, 0 }, + { "Hpz3", 24, 4 }, + { "Hpz2", 16, 4 }, + { "Hpz1", 8, 4 }, + { "Hpz0", 0, 4 }, + { "ULP_RX_TDDP_LLIMIT", 0x1916c, 0 }, + { "ULP_RX_TDDP_ULIMIT", 0x19170, 0 }, + { "ULP_RX_TDDP_TAGMASK", 0x19174, 0 }, + { "TddpTagMask", 6, 26 }, + { "ULP_RX_TDDP_PSZ", 0x19178, 0 }, + { "Hpz3", 24, 4 }, + { "Hpz2", 16, 4 }, + { "Hpz1", 8, 4 }, + { "Hpz0", 0, 4 }, + { "ULP_RX_STAG_LLIMIT", 0x1917c, 0 }, + { "ULP_RX_STAG_ULIMIT", 0x19180, 0 }, + { "ULP_RX_RQ_LLIMIT", 0x19184, 0 }, + { "ULP_RX_RQ_ULIMIT", 0x19188, 0 }, + { "ULP_RX_PBL_LLIMIT", 0x1918c, 0 }, + { "ULP_RX_PBL_ULIMIT", 0x19190, 0 }, + { "ULP_RX_CTX_BASE", 0x19194, 0 }, + { "ULP_RX_PERR_ENABLE", 0x1919c, 0 }, + { "CERR_PCMD_FIFO_3", 19, 1 }, + { "CERR_PCMD_FIFO_2", 18, 1 }, + { "CERR_PCMD_FIFO_1", 17, 1 }, + { "CERR_PCMD_FIFO_0", 16, 1 }, + { "CERR_DATA_FIFO_3", 15, 1 }, + { "CERR_DATA_FIFO_2", 14, 1 }, + { "CERR_DATA_FIFO_1", 13, 1 }, + { "CERR_DATA_FIFO_0", 12, 1 }, + { "SE_CNT_MISMATCH_3", 11, 1 }, + { "SE_CNT_MISMATCH_2", 10, 1 }, + { "SE_CNT_MISMATCH_1", 9, 1 }, + { "SE_CNT_MISMATCH_0", 8, 1 }, + { "ENABLE_CTX_3", 7, 1 }, + { "ENABLE_CTX_2", 6, 1 }, + { "ENABLE_CTX_1", 5, 1 }, + { "ENABLE_CTX_0", 4, 1 }, + { "ENABLE_ALN_SDC_ERR_3", 3, 1 }, + { "ENABLE_ALN_SDC_ERR_2", 2, 1 }, + { "ENABLE_ALN_SDC_ERR_1", 1, 1 }, + { "ENABLE_ALN_SDC_ERR_0", 0, 1 }, + { "ULP_RX_PERR_INJECT", 0x191a0, 0 }, + { "MemSel", 1, 7 }, + { "InjectDataErr", 0, 1 }, + { "ULP_RX_CTX_ACC_CH0", 0x191ac, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_CTX_ACC_CH1", 0x191b0, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_CTX_ACC_CH2", 0x191b4, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_CTX_ACC_CH3", 0x191b8, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_CTL2", 0x191bc, 0 }, + { "PCMD3Threshold", 24, 8 }, + { "PCMD2Threshold", 16, 8 }, + { "PCMD1Threshold", 8, 8 }, + { "PCMD0Threshold", 0, 8 }, + { "ULP_RX_SE_CNT_ERR", 0x191d0, 0 }, + { "ERR_CH3", 12, 4 }, + { "ERR_CH2", 8, 4 }, + { "ERR_CH1", 4, 4 }, + { "ERR_CH0", 0, 4 }, + { "ULP_RX_SE_CNT_CLR", 0x191d4, 0 }, + { "CLR_CH3", 12, 4 }, + { "CLR_CH2", 8, 4 }, + { "CLR_CH1", 4, 4 }, + { "CLR_CH0", 0, 4 }, + { "ULP_RX_SE_CNT_CH0", 0x191d8, 0 }, + { "SOP_CNT_OUT0", 28, 4 }, + { "EOP_CNT_OUT0", 24, 4 }, + { "SOP_CNT_AL0", 20, 4 }, + { "EOP_CNT_AL0", 16, 4 }, + { "SOP_CNT_MR0", 12, 4 }, + { "EOP_CNT_MR0", 8, 4 }, + { "SOP_CNT_IN0", 4, 4 }, + { "EOP_CNT_IN0", 0, 4 }, + { "ULP_RX_SE_CNT_CH1", 0x191dc, 0 }, + { "SOP_CNT_OUT1", 28, 4 }, + { "EOP_CNT_OUT1", 24, 4 }, + { "SOP_CNT_AL1", 20, 4 }, + { "EOP_CNT_AL1", 16, 4 }, + { "SOP_CNT_MR1", 12, 4 }, + { "EOP_CNT_MR1", 8, 4 }, + { "SOP_CNT_IN1", 4, 4 }, + { "EOP_CNT_IN1", 0, 4 }, + { "ULP_RX_DBG_CTL", 0x191e0, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG_L", 16, 1 }, + { "SEL_L", 0, 8 }, + { "ULP_RX_DBG_DATA", 0x191e4, 0 }, + { "ULP_RX_CQE_GEN_EN", 0x19250, 0 }, + { "Termimate_msg", 1, 1 }, + { "Terminate_with_err", 0, 1 }, + { "ULP_RX_T10_CRC_ENDIAN_SWITCHING", 0x19258, 0 }, + { "ULP_RX_MISC_FEATURE_ENABLE", 0x1925c, 0 }, + { "Tls_KeySizeConf", 26, 2 }, + { "iscsi_dcrc_error_cmp_en", 25, 1 }, + { "IscsiTagPI", 24, 1 }, + { "ddp_version_1", 22, 2 }, + { "ddp_version_0", 20, 2 }, + { "rdma_version_1", 18, 2 }, + { "rdma_version_0", 16, 2 }, + { "pbl_bound_check_w_pglen", 15, 1 }, + { "t10_offset_update_en", 13, 1 }, + { "ulp_insert_pi", 12, 1 }, + { "pdu_dpi", 11, 1 }, + { "iscsi_eff_offset_en", 10, 1 }, + { "iscsi_all_cmp_mode", 9, 1 }, + { "iscsi_enable_hdr_cmd", 8, 1 }, + { "iscsi_force_cmp_mode", 7, 1 }, + { "pio_rdma_send_rqe", 5, 1 }, + { "terminate_status_en", 4, 1 }, + { "multiple_pref_enable", 3, 1 }, + { "umudp_pbl_pref_enable", 2, 1 }, + { "rdma_pbl_pref_en", 1, 1 }, + { "sdc_crc_prot_en", 0, 1 }, + { "ULP_RX_CH_CGEN", 0x19260, 0 }, + { "BYPASS_CGEN", 28, 4 }, + { "TDDP_CGEN", 24, 4 }, + { "ISCSI_CGEN", 20, 4 }, + { "RDMA_CGEN", 16, 4 }, + { "CHANNEL_CGEN", 12, 4 }, + { "All_DataPath_CGEN", 8, 4 }, + { "T10Diff_DataPath_CGEN", 4, 4 }, + { "Rdma_DataPath_CGEN", 0, 4 }, + { "ULP_RX_CH_CGEN_1", 0x19264, 0 }, + { "NVMe_TCP_CGEN", 4, 4 }, + { "RoCE_CGEN", 0, 4 }, + { "ULP_RX_RFE_DISABLE", 0x19268, 0 }, + { "ULP_RX_RQE_PBL_MULTIPLE_OUTSTANDING_CNT", 0x19278, 0 }, + { "ULP_RX_CGEN_GLOBAL", 0x19280, 0 }, + { "ULP_RX_CTX_SKIP_MA_REQ", 0x19284, 0 }, + { "clear_ctx_err_cnt3", 7, 1 }, + { "clear_ctx_err_cnt2", 6, 1 }, + { "clear_ctx_err_cnt1", 5, 1 }, + { "clear_ctx_err_cnt0", 4, 1 }, + { "skip_ma_req_en3", 3, 1 }, + { "skip_ma_req_en2", 2, 1 }, + { "skip_ma_req_en1", 1, 1 }, + { "skip_ma_req_en0", 0, 1 }, + { "ULP_RX_CHNL0_CTX_ERROR_COUNT_PER_TID", 0x19288, 0 }, + { "ULP_RX_CHNL1_CTX_ERROR_COUNT_PER_TID", 0x1928c, 0 }, + { "ULP_RX_MSN_CHECK_ENABLE", 0x19290, 0 }, + { "Rd_or_Term_msn_check_enable", 2, 1 }, + { "atomic_op_msn_check_enable", 1, 1 }, + { "send_msn_check_enable", 0, 1 }, + { "ULP_RX_SE_CNT_CH2", 0x19294, 0 }, + { "SOP_CNT_OUT2", 28, 4 }, + { "EOP_CNT_OUT2", 24, 4 }, + { "SOP_CNT_AL2", 20, 4 }, + { "EOP_CNT_AL2", 16, 4 }, + { "SOP_CNT_MR2", 12, 4 }, + { "EOP_CNT_MR2", 8, 4 }, + { "SOP_CNT_IN2", 4, 4 }, + { "EOP_CNT_IN2", 0, 4 }, + { "ULP_RX_SE_CNT_CH3", 0x19298, 0 }, + { "SOP_CNT_OUT3", 28, 4 }, + { "EOP_CNT_OUT3", 24, 4 }, + { "SOP_CNT_AL3", 20, 4 }, + { "EOP_CNT_AL3", 16, 4 }, + { "SOP_CNT_MR3", 12, 4 }, + { "EOP_CNT_MR3", 8, 4 }, + { "SOP_CNT_IN3", 4, 4 }, + { "EOP_CNT_IN3", 0, 4 }, + { "ULP_RX_CHNL2_CTX_ERROR_COUNT_PER_TID", 0x1929c, 0 }, + { "ULP_RX_CHNL3_CTX_ERROR_COUNT_PER_TID", 0x192a0, 0 }, + { "ULP_RX_TLS_PP_LLIMIT", 0x192a4, 0 }, + { "ULP_RX_TLS_PP_ULIMIT", 0x192a8, 0 }, + { "ULP_RX_TLS_KEY_LLIMIT", 0x192ac, 0 }, + { "ULP_RX_TLS_KEY_ULIMIT", 0x192b0, 0 }, + { "ULP_RX_TLS_CTL", 0x192bc, 0 }, + { "TlsPerrEn", 4, 1 }, + { "TlsDisableIFuse", 2, 1 }, + { "TlsDisableCFuse", 1, 1 }, + { "TlsDisable", 0, 1 }, + { "ULP_RX_RRQ_LLIMIT", 0x192c0, 0 }, + { "ULP_RX_RRQ_ULIMIT", 0x192c4, 0 }, + { "ULP_RX_NVME_TCP_STAG_LLIMIT", 0x192c8, 0 }, + { "ULP_RX_NVME_TCP_STAG_ULIMIT", 0x192cc, 0 }, + { "ULP_RX_NVME_TCP_RQ_LLIMIT", 0x192d0, 0 }, + { "ULP_RX_NVME_TCP_RQ_ULIMIT", 0x192d4, 0 }, + { "ULP_RX_NVME_TCP_PBL_LLIMIT", 0x192d8, 0 }, + { "ULP_RX_NVME_TCP_PBL_ULIMIT", 0x192dc, 0 }, + { "ULP_RX_NVME_TCP_MAX_LENGTH", 0x192e0, 0 }, + { "NVMe_TCP_Max_PLEN01", 24, 8 }, + { "NVMe_TCP_Max_PLEN23", 16, 8 }, + { "NVMe_TCP_Max_Cmd_PDU_Length", 0, 16 }, + { "ULP_RX_NVME_TCP_IQE_SIZE", 0x192e4, 0 }, + { "ULP_RX_NVME_TCP_NEW_PDU_TYPES", 0x192e8, 0 }, + { "ULP_RX_IWARP_PMOF_OPCODES_1", 0x192ec, 0 }, + { "Rdma_Verify_Response", 24, 5 }, + { "Rdma_Verify_Request", 16, 5 }, + { "Rdma_Flush_Response", 8, 5 }, + { "Rdma_Flush_Request", 0, 5 }, + { "ULP_RX_IWARP_PMOF_OPCODES_2", 0x192f0, 0 }, + { "Rdma_Send_With_SE_Immediate", 24, 5 }, + { "Rdma_Send_With_Immediate", 16, 5 }, + { "Rdma_Atomic_Write_Response", 8, 5 }, + { "Rdma_Atomic_Write_Request", 0, 5 }, + { "ULP_RX_INT_ENABLE_PCMD", 0x19300, 0 }, + { "ENABLE_PCMD_SFIFO_3", 30, 1 }, + { "ENABLE_PCMD_FIFO_3", 29, 1 }, + { "ENABLE_PCMD_DDP_HINT_3", 28, 1 }, + { "ENABLE_PCMD_TPT_3", 27, 1 }, + { "ENABLE_PCMD_DDP_3", 26, 1 }, + { "ENABLE_PCMD_MPAR_3", 25, 1 }, + { "ENABLE_PCMD_MPAC_3", 24, 1 }, + { "ENABLE_PCMD_SFIFO_2", 22, 1 }, + { "ENABLE_PCMD_FIFO_2", 21, 1 }, + { "ENABLE_PCMD_DDP_HINT_2", 20, 1 }, + { "ENABLE_PCMD_TPT_2", 19, 1 }, + { "ENABLE_PCMD_DDP_2", 18, 1 }, + { "ENABLE_PCMD_MPAR_2", 17, 1 }, + { "ENABLE_PCMD_MPAC_2", 16, 1 }, + { "ENABLE_PCMD_SFIFO_1", 14, 1 }, + { "ENABLE_PCMD_FIFO_1", 13, 1 }, + { "ENABLE_PCMD_DDP_HINT_1", 12, 1 }, + { "ENABLE_PCMD_TPT_1", 11, 1 }, + { "ENABLE_PCMD_DDP_1", 10, 1 }, + { "ENABLE_PCMD_MPAR_1", 9, 1 }, + { "ENABLE_PCMD_MPAC_1", 8, 1 }, + { "ENABLE_PCMD_SFIFO_0", 6, 1 }, + { "ENABLE_PCMD_FIFO_0", 5, 1 }, + { "ENABLE_PCMD_DDP_HINT_0", 4, 1 }, + { "ENABLE_PCMD_TPT_0", 3, 1 }, + { "ENABLE_PCMD_DDP_0", 2, 1 }, + { "ENABLE_PCMD_MPAR_0", 1, 1 }, + { "ENABLE_PCMD_MPAC_0", 0, 1 }, + { "ULP_RX_INT_CAUSE_PCMD", 0x19304, 0 }, + { "CAUSE_PCMD_SFIFO_3", 30, 1 }, + { "CAUSE_PCMD_FIFO_3", 29, 1 }, + { "CAUSE_PCMD_DDP_HINT_3", 28, 1 }, + { "CAUSE_PCMD_TPT_3", 27, 1 }, + { "CAUSE_PCMD_DDP_3", 26, 1 }, + { "CAUSE_PCMD_MPAR_3", 25, 1 }, + { "CAUSE_PCMD_MPAC_3", 24, 1 }, + { "CAUSE_PCMD_SFIFO_2", 22, 1 }, + { "CAUSE_PCMD_FIFO_2", 21, 1 }, + { "CAUSE_PCMD_DDP_HINT_2", 20, 1 }, + { "CAUSE_PCMD_TPT_2", 19, 1 }, + { "CAUSE_PCMD_DDP_2", 18, 1 }, + { "CAUSE_PCMD_MPAR_2", 17, 1 }, + { "CAUSE_PCMD_MPAC_2", 16, 1 }, + { "CAUSE_PCMD_SFIFO_1", 14, 1 }, + { "CAUSE_PCMD_FIFO_1", 13, 1 }, + { "CAUSE_PCMD_DDP_HINT_1", 12, 1 }, + { "CAUSE_PCMD_TPT_1", 11, 1 }, + { "CAUSE_PCMD_DDP_1", 10, 1 }, + { "CAUSE_PCMD_MPAR_1", 9, 1 }, + { "CAUSE_PCMD_MPAC_1", 8, 1 }, + { "CAUSE_PCMD_SFIFO_0", 6, 1 }, + { "CAUSE_PCMD_FIFO_0", 5, 1 }, + { "CAUSE_PCMD_DDP_HINT_0", 4, 1 }, + { "CAUSE_PCMD_TPT_0", 3, 1 }, + { "CAUSE_PCMD_DDP_0", 2, 1 }, + { "CAUSE_PCMD_MPAR_0", 1, 1 }, + { "CAUSE_PCMD_MPAC_0", 0, 1 }, + { "ULP_RX_PERR_ENABLE_PCMD", 0x19308, 0 }, + { "PERR_ENABLE_PCMD_SFIFO_3", 30, 1 }, + { "PERR_ENABLE_PCMD_FIFO_3", 29, 1 }, + { "PERR_ENABLE_PCMD_DDP_HINT_3", 28, 1 }, + { "PERR_ENABLE_PCMD_TPT_3", 27, 1 }, + { "PERR_ENABLE_PCMD_DDP_3", 26, 1 }, + { "PERR_ENABLE_PCMD_MPAR_3", 25, 1 }, + { "PERR_ENABLE_PCMD_MPAC_3", 24, 1 }, + { "PERR_ENABLE_PCMD_SFIFO_2", 22, 1 }, + { "PERR_ENABLE_PCMD_FIFO_2", 21, 1 }, + { "PERR_ENABLE_PCMD_DDP_HINT_2", 20, 1 }, + { "PERR_ENABLE_PCMD_TPT_2", 19, 1 }, + { "PERR_ENABLE_PCMD_DDP_2", 18, 1 }, + { "PERR_ENABLE_PCMD_MPAR_2", 17, 1 }, + { "PERR_ENABLE_PCMD_MPAC_2", 16, 1 }, + { "PERR_ENABLE_PCMD_SFIFO_1", 14, 1 }, + { "PERR_ENABLE_PCMD_FIFO_1", 13, 1 }, + { "PERR_ENABLE_PCMD_DDP_HINT_1", 12, 1 }, + { "PERR_ENABLE_PCMD_TPT_1", 11, 1 }, + { "PERR_ENABLE_PCMD_DDP_1", 10, 1 }, + { "PERR_ENABLE_PCMD_MPAR_1", 9, 1 }, + { "PERR_ENABLE_PCMD_MPAC_1", 8, 1 }, + { "PERR_ENABLE_PCMD_SFIFO_0", 6, 1 }, + { "PERR_ENABLE_PCMD_FIFO_0", 5, 1 }, + { "PERR_ENABLE_PCMD_DDP_HINT_0", 4, 1 }, + { "PERR_ENABLE_PCMD_TPT_0", 3, 1 }, + { "PERR_ENABLE_PCMD_DDP_0", 2, 1 }, + { "PERR_ENABLE_PCMD_MPAR_0", 1, 1 }, + { "PERR_ENABLE_PCMD_MPAC_0", 0, 1 }, + { "ULP_RX_INT_ENABLE_DATA", 0x19310, 0 }, + { "ENABLE_DATA_SNOOP_3", 29, 1 }, + { "ENABLE_DATA_SFIFO_3", 28, 1 }, + { "ENABLE_DATA_FIFO_3", 27, 1 }, + { "ENABLE_DATA_DDP_3", 26, 1 }, + { "ENABLE_DATA_CTX_3", 25, 1 }, + { "ENABLE_DATA_PARSER_3", 24, 1 }, + { "ENABLE_DATA_SNOOP_2", 21, 1 }, + { "ENABLE_DATA_SFIFO_2", 20, 1 }, + { "ENABLE_DATA_FIFO_2", 19, 1 }, + { "ENABLE_DATA_DDP_2", 18, 1 }, + { "ENABLE_DATA_CTX_2", 17, 1 }, + { "ENABLE_DATA_PARSER_2", 16, 1 }, + { "ENABLE_DATA_SNOOP_1", 13, 1 }, + { "ENABLE_DATA_SFIFO_1", 12, 1 }, + { "ENABLE_DATA_FIFO_1", 11, 1 }, + { "ENABLE_DATA_DDP_1", 10, 1 }, + { "ENABLE_DATA_CTX_1", 9, 1 }, + { "ENABLE_DATA_PARSER_1", 8, 1 }, + { "ENABLE_DATA_SNOOP_0", 5, 1 }, + { "ENABLE_DATA_SFIFO_0", 4, 1 }, + { "ENABLE_DATA_FIFO_0", 3, 1 }, + { "ENABLE_DATA_DDP_0", 2, 1 }, + { "ENABLE_DATA_CTX_0", 1, 1 }, + { "ENABLE_DATA_PARSER_0", 0, 1 }, + { "ULP_RX_INT_CAUSE_DATA", 0x19314, 0 }, + { "CAUSE_DATA_SNOOP_3", 29, 1 }, + { "CAUSE_DATA_SFIFO_3", 28, 1 }, + { "CAUSE_DATA_FIFO_3", 27, 1 }, + { "CAUSE_DATA_DDP_3", 26, 1 }, + { "CAUSE_DATA_CTX_3", 25, 1 }, + { "CAUSE_DATA_PARSER_3", 24, 1 }, + { "CAUSE_DATA_SNOOP_2", 21, 1 }, + { "CAUSE_DATA_SFIFO_2", 20, 1 }, + { "CAUSE_DATA_FIFO_2", 19, 1 }, + { "CAUSE_DATA_DDP_2", 18, 1 }, + { "CAUSE_DATA_CTX_2", 17, 1 }, + { "CAUSE_DATA_PARSER_2", 16, 1 }, + { "CAUSE_DATA_SNOOP_1", 13, 1 }, + { "CAUSE_DATA_SFIFO_1", 12, 1 }, + { "CAUSE_DATA_FIFO_1", 11, 1 }, + { "CAUSE_DATA_DDP_1", 10, 1 }, + { "CAUSE_DATA_CTX_1", 9, 1 }, + { "CAUSE_DATA_PARSER_1", 8, 1 }, + { "CAUSE_DATA_SNOOP_0", 5, 1 }, + { "CAUSE_DATA_SFIFO_0", 4, 1 }, + { "CAUSE_DATA_FIFO_0", 3, 1 }, + { "CAUSE_DATA_DDP_0", 2, 1 }, + { "CAUSE_DATA_CTX_0", 1, 1 }, + { "CAUSE_DATA_PARSER_0", 0, 1 }, + { "ULP_RX_PERR_ENABLE_DATA", 0x19318, 0 }, + { "PERR_ENABLE_DATA_SNOOP_3", 29, 1 }, + { "PERR_ENABLE_DATA_SFIFO_3", 28, 1 }, + { "PERR_ENABLE_DATA_FIFO_3", 27, 1 }, + { "PERR_ENABLE_DATA_DDP_3", 26, 1 }, + { "PERR_ENABLE_DATA_CTX_3", 25, 1 }, + { "PERR_ENABLE_DATA_PARSER_3", 24, 1 }, + { "PERR_ENABLE_DATA_SNOOP_2", 21, 1 }, + { "PERR_ENABLE_DATA_SFIFO_2", 20, 1 }, + { "PERR_ENABLE_DATA_FIFO_2", 19, 1 }, + { "PERR_ENABLE_DATA_DDP_2", 18, 1 }, + { "PERR_ENABLE_DATA_CTX_2", 17, 1 }, + { "PERR_ENABLE_DATA_PARSER_2", 16, 1 }, + { "PERR_ENABLE_DATA_SNOOP_1", 13, 1 }, + { "PERR_ENABLE_DATA_SFIFO_1", 12, 1 }, + { "PERR_ENABLE_DATA_FIFO_1", 11, 1 }, + { "PERR_ENABLE_DATA_DDP_1", 10, 1 }, + { "PERR_ENABLE_DATA_CTX_1", 9, 1 }, + { "PERR_ENABLE_DATA_PARSER_1", 8, 1 }, + { "PERR_ENABLE_DATA_SNOOP_0", 5, 1 }, + { "PERR_ENABLE_DATA_SFIFO_0", 4, 1 }, + { "PERR_ENABLE_DATA_FIFO_0", 3, 1 }, + { "PERR_ENABLE_DATA_DDP_0", 2, 1 }, + { "PERR_ENABLE_DATA_CTX_0", 1, 1 }, + { "PERR_ENABLE_DATA_PARSER_0", 0, 1 }, + { "ULP_RX_INT_ENABLE_ARB", 0x19320, 0 }, + { "ENABLE_ARB_PBL_PF_3", 27, 1 }, + { "ENABLE_ARB_PF_3", 26, 1 }, + { "ENABLE_ARB_TPT_PF_3", 25, 1 }, + { "ENABLE_ARB_F_3", 24, 1 }, + { "ENABLE_ARB_PBL_PF_2", 19, 1 }, + { "ENABLE_ARB_PF_2", 18, 1 }, + { "ENABLE_ARB_TPT_PF_2", 17, 1 }, + { "ENABLE_ARB_F_2", 16, 1 }, + { "ENABLE_ARB_PBL_PF_1", 11, 1 }, + { "ENABLE_ARB_PF_1", 10, 1 }, + { "ENABLE_ARB_TPT_PF_1", 9, 1 }, + { "ENABLE_ARB_F_1", 8, 1 }, + { "ENABLE_ARB_PBL_PF_0", 3, 1 }, + { "ENABLE_ARB_PF_0", 2, 1 }, + { "ENABLE_ARB_TPT_PF_0", 1, 1 }, + { "ENABLE_ARB_F_0", 0, 1 }, + { "ULP_RX_INT_CAUSE_ARB", 0x19324, 0 }, + { "CAUSE_ARB_PBL_PF_3", 27, 1 }, + { "CAUSE_ARB_PF_3", 26, 1 }, + { "CAUSE_ARB_TPT_PF_3", 25, 1 }, + { "CAUSE_ARB_F_3", 24, 1 }, + { "CAUSE_ARB_PBL_PF_2", 19, 1 }, + { "CAUSE_ARB_PF_2", 18, 1 }, + { "CAUSE_ARB_TPT_PF_2", 17, 1 }, + { "CAUSE_ARB_F_2", 16, 1 }, + { "CAUSE_ARB_PBL_PF_1", 11, 1 }, + { "CAUSE_ARB_PF_1", 10, 1 }, + { "CAUSE_ARB_TPT_PF_1", 9, 1 }, + { "CAUSE_ARB_F_1", 8, 1 }, + { "CAUSE_ARB_PBL_PF_0", 3, 1 }, + { "CAUSE_ARB_PF_0", 2, 1 }, + { "CAUSE_ARB_TPT_PF_0", 1, 1 }, + { "CAUSE_ARB_F_0", 0, 1 }, + { "ULP_RX_PERR_ENABLE_ARB", 0x19328, 0 }, + { "PERR_ENABLE_ARB_PBL_PF_3", 27, 1 }, + { "PERR_ENABLE_ARB_PF_3", 26, 1 }, + { "PERR_ENABLE_ARB_TPT_PF_3", 25, 1 }, + { "PERR_ENABLE_ARB_F_3", 24, 1 }, + { "PERR_ENABLE_ARB_PBL_PF_2", 19, 1 }, + { "PERR_ENABLE_ARB_PF_2", 18, 1 }, + { "PERR_ENABLE_ARB_TPT_PF_2", 17, 1 }, + { "PERR_ENABLE_ARB_F_2", 16, 1 }, + { "PERR_ENABLE_ARB_PBL_PF_1", 11, 1 }, + { "PERR_ENABLE_ARB_PF_1", 10, 1 }, + { "PERR_ENABLE_ARB_TPT_PF_1", 9, 1 }, + { "PERR_ENABLE_ARB_F_1", 8, 1 }, + { "PERR_ENABLE_ARB_PBL_PF_0", 3, 1 }, + { "PERR_ENABLE_ARB_PF_0", 2, 1 }, + { "PERR_ENABLE_ARB_TPT_PF_0", 1, 1 }, + { "PERR_ENABLE_ARB_F_0", 0, 1 }, + { "ULP_RX_INT_ENABLE_INTERFACE", 0x191c0, 0 }, + { "ENABLE_ULPRX2SBT_RspPerr", 31, 1 }, + { "ENABLE_ULPRX2MA_RspPerr", 30, 1 }, + { "ENABME_Pio_Bus_Perr", 29, 1 }, + { "ENABLE_PM2ULP_SnoopData_3", 19, 1 }, + { "ENABLE_PM2ULP_SnoopData_2", 18, 1 }, + { "ENABLE_PM2ULP_SnoopData_1", 17, 1 }, + { "ENABLE_PM2ULP_SnoopData_0", 16, 1 }, + { "ENABLE_TLS2ULP_Data_3", 15, 1 }, + { "ENABLE_TLS2ULP_Data_2", 14, 1 }, + { "ENABLE_TLS2ULP_Data_1", 13, 1 }, + { "ENABLE_TLS2ULP_Data_0", 12, 1 }, + { "ENABLE_TLS2ULP_PLenData_3", 11, 1 }, + { "ENABLE_TLS2ULP_PLenData_2", 10, 1 }, + { "ENABLE_TLS2ULP_PLenData_1", 9, 1 }, + { "ENABLE_TLS2ULP_PLenData_0", 8, 1 }, + { "ENABLE_PM2ULP_DATA_3", 7, 1 }, + { "ENABLE_PM2ULP_DATA_2", 6, 1 }, + { "ENABLE_PM2ULP_DATA_1", 5, 1 }, + { "ENABLE_PM2ULP_DATA_0", 4, 1 }, + { "ENABLE_TP2ULP_PCMD_3", 3, 1 }, + { "ENABLE_TP2ULP_PCMD_2", 2, 1 }, + { "ENABLE_TP2ULP_PCMD_1", 1, 1 }, + { "ENABLE_TP2ULP_PCMD_0", 0, 1 }, + { "ULP_RX_INT_CAUSE_INTERFACE", 0x191c4, 0 }, + { "CAUSE_ULPRX2SBT_RspPerr", 31, 1 }, + { "CAUSE_ULPRX2MA_RspPerr", 30, 1 }, + { "CAUSE_Pio_Bus_Perr", 29, 1 }, + { "CAUSE_PM2ULP_SnoopData_3", 19, 1 }, + { "CAUSE_PM2ULP_SnoopData_2", 18, 1 }, + { "CAUSE_PM2ULP_SnoopData_1", 17, 1 }, + { "CAUSE_PM2ULP_SnoopData_0", 16, 1 }, + { "CAUSE_TLS2ULP_Data_3", 15, 1 }, + { "CAUSE_TLS2ULP_Data_2", 14, 1 }, + { "CAUSE_TLS2ULP_Data_1", 13, 1 }, + { "CAUSE_TLS2ULP_Data_0", 12, 1 }, + { "CAUSE_TLS2ULP_PLenData_3", 11, 1 }, + { "CAUSE_TLS2ULP_PLenData_2", 10, 1 }, + { "CAUSE_TLS2ULP_PLenData_1", 9, 1 }, + { "CAUSE_TLS2ULP_PLenData_0", 8, 1 }, + { "CAUSE_PM2ULP_DATA_3", 7, 1 }, + { "CAUSE_PM2ULP_DATA_2", 6, 1 }, + { "CAUSE_PM2ULP_DATA_1", 5, 1 }, + { "CAUSE_PM2ULP_DATA_0", 4, 1 }, + { "CAUSE_TP2ULP_PCMD_3", 3, 1 }, + { "CAUSE_TP2ULP_PCMD_2", 2, 1 }, + { "CAUSE_TP2ULP_PCMD_1", 1, 1 }, + { "CAUSE_TP2ULP_PCMD_0", 0, 1 }, + { "ULP_RX_PERR_ENABLE_INTERFACE", 0x191c8, 0 }, + { "PERR_ULPRX2SBT_RspPerr", 31, 1 }, + { "PERR_ULPRX2MA_RspPerr", 30, 1 }, + { "PERR_Pio_Bus_Perr", 29, 1 }, + { "PERR_PM2ULP_SnoopData_3", 19, 1 }, + { "PERR_PM2ULP_SnoopData_2", 18, 1 }, + { "PERR_PM2ULP_SnoopData_1", 17, 1 }, + { "PERR_PM2ULP_SnoopData_0", 16, 1 }, + { "PERR_TLS2ULP_Data_3", 15, 1 }, + { "PERR_TLS2ULP_Data_2", 14, 1 }, + { "PERR_TLS2ULP_Data_1", 13, 1 }, + { "PERR_TLS2ULP_Data_0", 12, 1 }, + { "PERR_TLS2ULP_PLenData_3", 11, 1 }, + { "PERR_TLS2ULP_PLenData_2", 10, 1 }, + { "PERR_TLS2ULP_PLenData_1", 9, 1 }, + { "PERR_TLS2ULP_PLenData_0", 8, 1 }, + { "PERR_PM2ULP_DATA_3", 7, 1 }, + { "PERR_PM2ULP_DATA_2", 6, 1 }, + { "PERR_PM2ULP_DATA_1", 5, 1 }, + { "PERR_PM2ULP_DATA_0", 4, 1 }, + { "PERR_TP2ULP_PCMD_3", 3, 1 }, + { "PERR_TP2ULP_PCMD_2", 2, 1 }, + { "PERR_TP2ULP_PCMD_1", 1, 1 }, + { "PERR_TP2ULP_PCMD_0", 0, 1 }, + { "ULP_RX_CTL1", 0x19330, 0 }, + { "iSCSI_Ctl2", 27, 1 }, + { "iSCSI_Ctl1", 26, 1 }, + { "iSCSI_Ctl0", 25, 1 }, + { "NVMe_TCP_Data_Alignment", 16, 9 }, + { "NVMe_TCP_Invld_Msg_Dis", 14, 2 }, + { "NVMe_TCP_ddp_pdu_chk_type", 13, 1 }, + { "T10_Config_Enb", 12, 1 }, + { "NVMe_TCP_Colour_Enb", 10, 2 }, + { "RoCE_send_rqe", 8, 1 }, + { "RDMA_Invld_Msg_Dis", 6, 2 }, + { "RoCE_Invld_Msg_Dis", 4, 2 }, + { "Mem_Addr_Ctrl", 2, 2 }, + { "Enb_32K_PDU", 1, 1 }, + { "c2h_success_wo_last_pdu_chk_dis", 0, 1 }, + { "ULP_RX_TLS_IND_CMD", 0x19348, 0 }, + { "ULP_RX_TLS_IND_DATA", 0x1934c, 0 }, + { NULL } +}; + +struct reg_info t7_sf_regs[] = { + { "SF_DATA", 0x193f8, 0 }, + { "SF_OP", 0x193fc, 0 }, + { "Busy", 31, 1 }, + { "En32bAddr", 30, 1 }, + { "RegDbg_Mode", 10, 1 }, + { "RegDbg_Sel", 9, 1 }, + { "QuadWrEnable", 8, 1 }, + { "Enter4B", 7, 1 }, + { "Exit4B", 6, 1 }, + { "QuadReadDisable", 5, 1 }, + { "Lock", 4, 1 }, + { "Cont", 3, 1 }, + { "Num_of_bytes", 1, 2 }, + { "Op", 0, 1 }, + { NULL } +}; + +struct reg_info t7_pl_regs[] = { + { "PL_PF_INT_CAUSE", 0x1e3c0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1e3c4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1e3c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1e7c0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1e7c4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1e7c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1ebc0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1ebc4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1ebc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1efc0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1efc4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1efc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1f3c0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1f3c4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1f3c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1f7c0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1f7c4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1f7c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1fbc0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1fbc4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1fbc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1ffc0, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1ffc4, 0 }, + { "SW", 3, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1ffc8, 0 }, + { "PL_WHOAMI", 0x19400, 0 }, + { "PortxMap", 24, 3 }, + { "SourceBus", 16, 2 }, + { "SourcePF", 9, 3 }, + { "IsVF", 8, 1 }, + { "VFID", 0, 8 }, + { "PL_PERR_CAUSE", 0x19404, 0 }, + { "CRYPTO_KEY", 31, 1 }, + { "CRYPTO1", 30, 1 }, + { "CRYPTO0", 29, 1 }, + { "GCACHE", 28, 1 }, + { "ARM", 27, 1 }, + { "ULP_TX", 26, 1 }, + { "SGE", 25, 1 }, + { "HMA", 24, 1 }, + { "CPL_SWITCH", 23, 1 }, + { "ULP_RX", 22, 1 }, + { "PM_RX", 21, 1 }, + { "PM_TX", 20, 1 }, + { "MA", 19, 1 }, + { "TP", 18, 1 }, + { "LE", 17, 1 }, + { "EDC1", 16, 1 }, + { "EDC0", 15, 1 }, + { "MC1", 14, 1 }, + { "MC0", 13, 1 }, + { "PCIE", 12, 1 }, + { "UART", 11, 1 }, + { "PMU", 10, 1 }, + { "MAC", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_PERR_ENABLE", 0x19408, 0 }, + { "CRYPTO_KEY", 31, 1 }, + { "CRYPTO1", 30, 1 }, + { "CRYPTO0", 29, 1 }, + { "GCACHE", 28, 1 }, + { "ARM", 27, 1 }, + { "ULP_TX", 26, 1 }, + { "SGE", 25, 1 }, + { "HMA", 24, 1 }, + { "CPL_SWITCH", 23, 1 }, + { "ULP_RX", 22, 1 }, + { "PM_RX", 21, 1 }, + { "PM_TX", 20, 1 }, + { "MA", 19, 1 }, + { "TP", 18, 1 }, + { "LE", 17, 1 }, + { "EDC1", 16, 1 }, + { "EDC0", 15, 1 }, + { "MC1", 14, 1 }, + { "MC0", 13, 1 }, + { "PCIE", 12, 1 }, + { "UART", 11, 1 }, + { "PMU", 10, 1 }, + { "MAC", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_CAUSE", 0x1940c, 0 }, + { "FLR", 31, 1 }, + { "SW_CIM", 30, 1 }, + { "ULP_TX", 29, 1 }, + { "SGE", 28, 1 }, + { "HMA", 27, 1 }, + { "CPL_SWITCH", 26, 1 }, + { "ULP_RX", 25, 1 }, + { "PM_RX", 24, 1 }, + { "PM_TX", 23, 1 }, + { "MA", 22, 1 }, + { "TP", 21, 1 }, + { "LE", 20, 1 }, + { "EDC1", 19, 1 }, + { "EDC0", 18, 1 }, + { "MC1", 17, 1 }, + { "MC0", 16, 1 }, + { "PCIE", 15, 1 }, + { "UART", 14, 1 }, + { "PMU", 13, 1 }, + { "MAC3", 12, 1 }, + { "MAC2", 11, 1 }, + { "MAC1", 10, 1 }, + { "MAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_ENABLE", 0x19410, 0 }, + { "FLR", 31, 1 }, + { "SW_CIM", 30, 1 }, + { "ULP_TX", 29, 1 }, + { "SGE", 28, 1 }, + { "HMA", 27, 1 }, + { "CPL_SWITCH", 26, 1 }, + { "ULP_RX", 25, 1 }, + { "PM_RX", 24, 1 }, + { "PM_TX", 23, 1 }, + { "MA", 22, 1 }, + { "TP", 21, 1 }, + { "LE", 20, 1 }, + { "EDC1", 19, 1 }, + { "EDC0", 18, 1 }, + { "MC1", 17, 1 }, + { "MC0", 16, 1 }, + { "PCIE", 15, 1 }, + { "UART", 14, 1 }, + { "PMU", 13, 1 }, + { "MAC3", 12, 1 }, + { "MAC2", 11, 1 }, + { "MAC1", 10, 1 }, + { "MAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_MAP0", 0x19414, 0 }, + { "MapNCSI", 16, 9 }, + { "MapDefault", 0, 9 }, + { "PL_INT_MAP1", 0x19418, 0 }, + { "MapMAC1", 16, 9 }, + { "MapMAC0", 0, 9 }, + { "PL_INT_MAP2", 0x1941c, 0 }, + { "MapMAC3", 16, 9 }, + { "MapMAC2", 0, 9 }, + { "PL_INT_MAP3", 0x19420, 0 }, + { "MapMI", 16, 9 }, + { "MapSMB", 0, 9 }, + { "PL_INT_MAP4", 0x19424, 0 }, + { "MapDBG", 16, 9 }, + { "MapI2CM", 0, 9 }, + { "PL_RST", 0x19428, 0 }, + { "AutoPciePause", 4, 1 }, + { "FatalPerrEn", 3, 1 }, + { "SWIntCIM", 2, 1 }, + { "PIORst", 1, 1 }, + { "PIORstMode", 0, 1 }, + { "PL_PL_INT_CAUSE", 0x19430, 0 }, + { "PL_BusPerr", 6, 1 }, + { "FatalPerr", 4, 1 }, + { "InvalidAccess", 3, 1 }, + { "Timeout", 2, 1 }, + { "PLErr", 1, 1 }, + { "PL_PL_INT_ENABLE", 0x19434, 0 }, + { "PL_BusPerr", 6, 1 }, + { "FatalPerr", 4, 1 }, + { "InvalidAccess", 3, 1 }, + { "Timeout", 2, 1 }, + { "PLErr", 1, 1 }, + { "PL_PL_PERR_ENABLE", 0x19438, 0 }, + { "PL_BusPerr", 6, 1 }, + { "PL_REV", 0x1943c, 0 }, + { "ChipID", 4, 4 }, + { "Rev", 0, 4 }, + { "PL_PCIE_LINK", 0x19440, 0 }, + { "SPEEDMS", 30, 1 }, + { "LN0_AESTAT", 27, 3 }, + { "LN0_AECMD", 24, 3 }, + { "StateCfgInitF", 16, 8 }, + { "StateCfgInit", 12, 4 }, + { "PHY_STATUS", 10, 1 }, + { "SPEED", 8, 2 }, + { "PERstTimeout", 7, 1 }, + { "LTSSMEnable", 6, 1 }, + { "LTSSM", 0, 6 }, + { "PL_PCIE_CTL_STAT", 0x19444, 0 }, + { "Status", 16, 16 }, + { "Control", 0, 16 }, + { "PL_SEMAPHORE_CTL", 0x1944c, 0 }, + { "LockStatus", 16, 8 }, + { "OwnerOverride", 8, 1 }, + { "EnablePF", 0, 8 }, + { "PL_SEMAPHORE_LOCK", 0x19450, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19454, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19458, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x1945c, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19460, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19464, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19468, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x1946c, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_PORTX_MAP", 0x19474, 0 }, + { "MAP7", 28, 3 }, + { "MAP6", 24, 3 }, + { "MAP5", 20, 3 }, + { "MAP4", 16, 3 }, + { "MAP3", 12, 3 }, + { "MAP2", 8, 3 }, + { "MAP1", 4, 3 }, + { "MAP0", 0, 3 }, + { "PL_INT_CAUSE2", 0x19478, 0 }, + { "CRYPTO_KEY", 4, 1 }, + { "CRYPTO1", 3, 1 }, + { "CRYPTO0", 2, 1 }, + { "GCACHE", 1, 1 }, + { "ARM", 0, 1 }, + { "PL_INT_ENABLE2", 0x1947c, 0 }, + { "CRYPTO_KEY", 4, 1 }, + { "CRYPTO1", 3, 1 }, + { "CRYPTO0", 2, 1 }, + { "GCACHE", 1, 1 }, + { "ARM", 0, 1 }, + { "PL_ER_CMD", 0x19488, 0 }, + { "ER_ADDR", 2, 30 }, + { "PL_ER_DATA", 0x1948c, 0 }, + { "PL_VF_SLICE_L", 0x19490, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x19498, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194a0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194a8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194b0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194b8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194c0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194c8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_H", 0x19494, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x1949c, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194a4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194ac, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194b4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194bc, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194c4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194cc, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_TIMEOUT_CTL", 0x194f0, 0 }, + { "PerrCapture", 16, 1 }, + { "Timeout", 0, 16 }, + { "PL_TIMEOUT_STATUS0", 0x194f4, 0 }, + { "Addr", 2, 28 }, + { "PL_TIMEOUT_STATUS1", 0x194f8, 0 }, + { "Valid", 31, 1 }, + { "ValidPerr", 30, 1 }, + { "Write", 22, 1 }, + { "Bus", 20, 2 }, + { "PF", 16, 3 }, + { "VFID", 0, 9 }, + { NULL } +}; + +struct reg_info t7_le_regs[] = { + { "LE_DB_ID", 0x19c00, 0 }, + { "LE_DB_CONFIG", 0x19c04, 0 }, + { "CacheBypass", 28, 1 }, + { "CHK_FUL_TUP_ZERO", 27, 1 }, + { "PRI_HASH", 26, 1 }, + { "EXTN_HASH_IPV4", 25, 1 }, + { "PROTOCOLMASKEN", 24, 1 }, + { "SRVRSRAMEN", 22, 1 }, + { "HASHEN", 20, 1 }, + { "ASLIPCOMPEN_IPV4", 18, 1 }, + { "BUILD", 16, 1 }, + { "IGNR_TUP_ZERO", 9, 1 }, + { "IGNR_LIP_ZERO", 8, 1 }, + { "CLCAM_INIT_BUSY", 7, 1 }, + { "CLCAM_INIT", 6, 1 }, + { "MTCAM_INIT_BUSY", 5, 1 }, + { "MTCAM_INIT", 4, 1 }, + { "REGION_EN", 0, 4 }, + { "LE_DB_EXEC_CTRL", 0x19c08, 0 }, + { "TPDB_IF_PAUSE_ACK", 10, 1 }, + { "TPDB_IF_PAUSE_REQ", 9, 1 }, + { "ERRSTOP_EN", 8, 1 }, + { "CMDLIMIT", 0, 8 }, + { "LE_DB_PS_CTRL", 0x19c0c, 0 }, + { "SRAMDEEPSLEEP_STAT", 11, 1 }, + { "CLTCAMDEEPSLEEP_STAT", 10, 1 }, + { "TCAMDEEPSLEEP_STAT", 9, 1 }, + { "SRAMDEEPSLEEP", 8, 1 }, + { "CLTCAMDEEPSLEEP", 7, 1 }, + { "TCAMDEEPSLEEP", 6, 1 }, + { "SRVRAMCLKOFF", 5, 1 }, + { "HASHCLKOFF", 4, 1 }, + { "LE_DB_ACTIVE_TABLE_START_INDEX", 0x19c10, 0 }, + { "LE_DB_NORM_FILT_TABLE_START_INDEX", 0x19c14, 0 }, + { "LE_DB_SRVR_START_INDEX", 0x19c18, 0 }, + { "LE_DB_HPRI_FILT_TABLE_START_INDEX", 0x19c1c, 0 }, + { "LE_DB_ACT_CNT_IPV4", 0x19c20, 0 }, + { "LE_DB_ACT_CNT_IPV6", 0x19c24, 0 }, + { "LE_DB_ACT_CNT_IPV4_TCAM", 0x19c94, 0 }, + { "LE_DB_ACT_CNT_IPV6_TCAM", 0x19c98, 0 }, + { "LE_DB_REQ_RSP_CNT", 0x19ce4, 0 }, + { "RspCnt", 16, 16 }, + { "ReqCnt", 0, 16 }, + { "LE_HASH_COLLISION", 0x19fc4, 0 }, + { "LE_GLOBAL_COLLISION", 0x19fc8, 0 }, + { "LE_DB_HASH_CONFIG", 0x19c28, 0 }, + { "NUMHASHBKT", 20, 5 }, + { "HASHTBLSIZE", 3, 17 }, + { "LE_DB_MIN_NUM_ACTV_TCAM_ENTRIES", 0x19c2c, 0 }, + { "LE_DB_MAX_NUM_HASH_ENTRIES", 0x19c70, 0 }, + { "LE_DB_RSP_CODE_0", 0x19c74, 0 }, + { "SUCCESS", 25, 5 }, + { "TCAM_ACTV_SUCC", 20, 5 }, + { "HASH_ACTV_SUCC", 15, 5 }, + { "TCAM_SRVR_HIT", 10, 5 }, + { "SRAM_SRVR_HIT", 5, 5 }, + { "TCAM_ACTV_HIT", 0, 5 }, + { "LE_DB_RSP_CODE_1", 0x19c78, 0 }, + { "HASH_ACTV_HIT", 25, 5 }, + { "MISS", 20, 5 }, + { "NORM_FILT_HIT", 15, 5 }, + { "HPRI_FILT_HIT", 10, 5 }, + { "ACTV_OPEN_ERR", 5, 5 }, + { "ACTV_FULL_ERR", 0, 5 }, + { "LE_DB_RSP_CODE_2", 0x19c7c, 0 }, + { "SRCH_RGN_HIT", 25, 5 }, + { "CLIP_FAIL", 20, 5 }, + { "LIP_ZERO_ERR", 15, 5 }, + { "UNKNOWN_CMD", 10, 5 }, + { "CMD_TID_ERR", 5, 5 }, + { "INTERNAL_ERR", 0, 5 }, + { "LE_DB_RSP_CODE_3", 0x19c80, 0 }, + { "SRAM_SRVR_HIT_ACTF", 25, 5 }, + { "TCAM_SRVR_HIT_ACTF", 20, 5 }, + { "INVLDRD", 15, 5 }, + { "TUPLZERO", 10, 5 }, + { "LE_DB_HASH_TBL_BASE_ADDR", 0x19c30, 0 }, + { "HASHTBLADDR", 4, 28 }, + { "LE_TCAM_SIZE", 0x19c34, 0 }, + { "MLL_mask", 2, 1 }, + { "SIZE", 0, 2 }, + { "LE_DB_INT_ENABLE", 0x19c38, 0 }, + { "CacheIntPerr", 31, 1 }, + { "CacheSramPerr", 30, 1 }, + { "ClipSubErr", 29, 1 }, + { "ClCamFifoerr", 28, 1 }, + { "HashTblMemCrcErr", 27, 1 }, + { "CTcamInvldEnt", 26, 1 }, + { "TcamInvldEnt", 25, 1 }, + { "TotCntErr", 24, 1 }, + { "CmdPrsrIntErr", 23, 1 }, + { "CmdTidErr", 22, 1 }, + { "ActRgnFull", 21, 1 }, + { "ActCntIPv6Tzero", 20, 1 }, + { "ActCntIPv4Tzero", 19, 1 }, + { "ActCntIPv6zero", 18, 1 }, + { "ActCntIPv4zero", 17, 1 }, + { "MaifwrIntPerr", 16, 1 }, + { "HashTblMemAccErr", 15, 1 }, + { "TcamCrcErr", 14, 1 }, + { "TcamIntPerr", 13, 1 }, + { "VfSramPerr", 12, 1 }, + { "SrvSramPerr", 11, 1 }, + { "SsramIntPerr", 10, 1 }, + { "ClCamIntPerr", 9, 1 }, + { "ClCamCrcParErr", 8, 1 }, + { "HashTblAccFail", 7, 1 }, + { "TcamAccFail", 6, 1 }, + { "SrvSramAccFail", 5, 1 }, + { "ClipTcamAccFail", 4, 1 }, + { "UnknownCmd", 3, 1 }, + { "LIP0", 2, 1 }, + { "LIPMiss", 1, 1 }, + { "PipelineErr", 0, 1 }, + { "LE_DB_INT_CAUSE", 0x19c3c, 0 }, + { "CacheIntPerr", 31, 1 }, + { "CacheSramPerr", 30, 1 }, + { "ClipSubErr", 29, 1 }, + { "ClCamFifoerr", 28, 1 }, + { "HashTblMemCrcErr", 27, 1 }, + { "CTcamInvldEnt", 26, 1 }, + { "TcamInvldEnt", 25, 1 }, + { "TotCntErr", 24, 1 }, + { "CmdPrsrIntErr", 23, 1 }, + { "CmdTidErr", 22, 1 }, + { "ActRgnFull", 21, 1 }, + { "ActCntIPv6Tzero", 20, 1 }, + { "ActCntIPv4Tzero", 19, 1 }, + { "ActCntIPv6zero", 18, 1 }, + { "ActCntIPv4zero", 17, 1 }, + { "MaifwrIntPerr", 16, 1 }, + { "HashTblMemAccErr", 15, 1 }, + { "TcamCrcErr", 14, 1 }, + { "TcamIntPerr", 13, 1 }, + { "VfSramPerr", 12, 1 }, + { "SrvSramPerr", 11, 1 }, + { "SsramIntPerr", 10, 1 }, + { "ClCamIntPerr", 9, 1 }, + { "ClCamCrcParErr", 8, 1 }, + { "HashTblAccFail", 7, 1 }, + { "TcamAccFail", 6, 1 }, + { "SrvSramAccFail", 5, 1 }, + { "ClipTcamAccFail", 4, 1 }, + { "UnknownCmd", 3, 1 }, + { "LIP0", 2, 1 }, + { "LIPMiss", 1, 1 }, + { "PipelineErr", 0, 1 }, + { "LE_PERR_ENABLE", 0x19cf8, 0 }, + { "CacheIntPerr", 31, 1 }, + { "CacheSramPerr", 30, 1 }, + { "BkChkPeriod", 22, 8 }, + { "TcamBkChkEn", 21, 1 }, + { "MaifwrIntPerr", 16, 1 }, + { "HashTblMemAccErr", 15, 1 }, + { "TcamCrcErr", 14, 1 }, + { "TcamIntPerr", 13, 1 }, + { "VfSramPerr", 12, 1 }, + { "SrvSramPerr", 11, 1 }, + { "SsramIntPerr", 10, 1 }, + { "ClCamIntPerr", 9, 1 }, + { "ClCamCrcParErr", 8, 1 }, + { "HashTblAccFail", 7, 1 }, + { "TcamAccFail", 6, 1 }, + { "SrvSramAccFail", 5, 1 }, + { "ClipTcamAccFail", 4, 1 }, + { "ClCamFifoerr", 2, 1 }, + { "HashTblMemCrcErr", 1, 1 }, + { "PipelineErr", 0, 1 }, + { "LE_DB_ERR_CMD_TID", 0x19c48, 0 }, + { "ERR_CID", 22, 8 }, + { "ERR_PROT", 20, 2 }, + { "ERR_TID", 0, 20 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c50, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c54, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c58, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c5c, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c60, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c64, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c68, 0 }, + { "LE_DB_DBG_MATCH_DATA_MASK", 0x19c6c, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19ca0, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19ca4, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19ca8, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19cac, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19cb0, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19cb4, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19cb8, 0 }, + { "LE_DB_DBG_MATCH_DATA", 0x19cbc, 0 }, + { "LE_CMM_CONFIG", 0x19cc0, 0 }, + { "GlFl", 31, 1 }, + { "WrCntIdle", 16, 15 }, + { "RdThreshold", 8, 6 }, + { "WrThrLevel2", 7, 1 }, + { "WrThrLevel1", 6, 1 }, + { "WrThrThreshEn", 5, 1 }, + { "WrThrThresh", 0, 5 }, + { "LE_CACHE_DBG", 0x19cc4, 0 }, + { "LE_CACHE_WR_ALL_CNT", 0x19cc8, 0 }, + { "LE_CACHE_WR_HIT_CNT", 0x19ccc, 0 }, + { "LE_CACHE_RD_ALL_CNT", 0x19cd0, 0 }, + { "LE_CACHE_RD_HIT_CNT", 0x19cd4, 0 }, + { "LE_CACHE_MC_WR_CNT", 0x19cd8, 0 }, + { "LE_CACHE_MC_RD_CNT", 0x19cdc, 0 }, + { "LE_DB_DBG_MATCH_CMD_IDX_MASK", 0x19c40, 0 }, + { "CMD_CMP_MASK", 20, 5 }, + { "TID_CMP_MASK", 0, 20 }, + { "LE_DB_DBG_MATCH_CMD_IDX_DATA", 0x19c44, 0 }, + { "CMD_CMP", 20, 5 }, + { "TID_CMP", 0, 20 }, + { "LE_IND_ADDR", 0x19ce8, 0 }, + { "LE_IND_DATA", 0x19cec, 0 }, + { "LE_DB_DBGI_CONFIG", 0x19cf0, 0 }, + { "DBGICMDRANGE", 22, 3 }, + { "DBGICMDMSKREAD", 21, 1 }, + { "DBGICMDSEARCH", 20, 1 }, + { "DBGICMDREAD", 19, 1 }, + { "DBGICMDLEARN", 18, 1 }, + { "DBGICMDWRITE", 17, 1 }, + { "DBGICMDIPv6", 16, 1 }, + { "DBGICMDBUSY", 3, 1 }, + { "DBGICMDSTRT", 2, 1 }, + { "DBGICMDMODE", 0, 2 }, + { "LE_DB_DBGI_REQ_CMD", 0x19cf4, 0 }, + { "DBGICMD", 20, 4 }, + { "DBGITID", 0, 20 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d00, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d04, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d08, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d0c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d10, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d14, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d18, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d1c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d20, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d24, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d28, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d2c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d30, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d50, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d54, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d58, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d5c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d60, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d64, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d68, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d6c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d70, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d74, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d78, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d7c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d80, 0 }, + { "LE_DB_DBGI_RSP_STATUS", 0x19d94, 0 }, + { "DBGIRspTid", 12, 20 }, + { "DBGIRspMsg", 8, 4 }, + { "DBGIRspLearn", 2, 1 }, + { "DBGIRspHit", 1, 1 }, + { "DBGIRspValid", 0, 1 }, + { "LE_DBG_SEL", 0x19d98, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dac, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dbc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dcc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19ddc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19de0, 0 }, + { "LE_DB_TCAM_TID_BASE", 0x19df0, 0 }, + { "LE_DB_CLCAM_TID_BASE", 0x19df4, 0 }, + { "LE_DB_HASH_TID_BASE", 0x19df8, 0 }, + { "LE_DB_SSRAM_TID_BASE", 0x19dfc, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e00, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e04, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e08, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e0c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e10, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e50, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e54, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e58, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e5c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e60, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e64, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e68, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e6c, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea0, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea4, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea8, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19eac, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb0, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb4, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb8, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV4", 0x19ebc, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec4, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec8, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ecc, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed0, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed4, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed8, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19edc, 0 }, + { "LE_DB_HASH_MASK_GEN_IPV6", 0x19ee0, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee4, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee8, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19eec, 0 }, + { "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef0, 0 }, + { "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef4, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f04, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f08, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f0c, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f10, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f14, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f18, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f1c, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f20, 0 }, + { "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f24, 0 }, + { "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f28, 0 }, + { "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f2c, 0 }, + { "LE_DB_SRVR_SRAM_CONFIG", 0x19f34, 0 }, + { "PRI_HFILT", 4, 1 }, + { "PRI_SRVR", 3, 1 }, + { "PRI_FILT", 2, 1 }, + { "SRVRINITBUSY", 1, 1 }, + { "SRVRINIT", 0, 1 }, + { "LE_DB_SRVR_VF_SRCH_TABLE_CTRL", 0x19f38, 0 }, + { "VFLUTBUSY", 10, 1 }, + { "VFLUTSTART", 9, 1 }, + { "RDWR", 8, 1 }, + { "VFINDEX", 0, 8 }, + { "LE_DB_SRVR_VF_SRCH_TABLE_DATA", 0x19f3c, 0 }, + { "SRCHHADDR", 12, 12 }, + { "SRCHLADDR", 0, 12 }, + { "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f40, 0 }, + { "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f44, 0 }, + { "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f48, 0 }, + { "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f4c, 0 }, + { "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f50, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f90, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f94, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f98, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f9c, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa0, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa4, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa8, 0 }, + { "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fac, 0 }, + { "LE_DEBUG_LA_CONFIG", 0x19fd0, 0 }, + { "LE_REQ_DEBUG_LA_DATA", 0x19fd4, 0 }, + { "LE_REQ_DEBUG_LA_WRPTR", 0x19fd8, 0 }, + { "LE_RSP_DEBUG_LA_DATA", 0x19fdc, 0 }, + { "LE_RSP_DEBUG_LA_WRPTR", 0x19fe0, 0 }, + { "LE_DEBUG_LA_SEL_DATA", 0x19fe4, 0 }, + { "LE_TCAM_BIST_CTRL", 0x19fb0, 0 }, + { "rst_cb", 31, 1 }, + { "cb_start", 0, 28 }, + { "LE_TCAM_BIST_CB_PASS", 0x19fb4, 0 }, + { "LE_TCAM_BIST_CB_BUSY", 0x19fbc, 0 }, + { NULL } +}; + +struct reg_info t7_ncsi_regs[] = { + { "NCSI_PORT_CFGREG", 0x1a000, 0 }, + { "WireEn", 28, 4 }, + { "strp_crc", 24, 4 }, + { "rx_halt", 22, 1 }, + { "flush_rx_fifo", 21, 1 }, + { "hw_arb_en", 20, 1 }, + { "soft_pkg_sel", 19, 1 }, + { "err_discard_en", 18, 1 }, + { "max_pkt_size", 4, 14 }, + { "rx_byte_swap", 3, 1 }, + { "tx_byte_swap", 2, 1 }, + { "xgmac0_en", 0, 1 }, + { "NCSI_RST_CTRL", 0x1a004, 0 }, + { "mac_ref_rst", 2, 1 }, + { "mac_rx_rst", 1, 1 }, + { "mac_tx_rst", 0, 1 }, + { "NCSI_CH0_SADDR_LOW", 0x1a010, 0 }, + { "NCSI_CH0_SADDR_HIGH", 0x1a014, 0 }, + { "CHO_SADDR_EN", 31, 1 }, + { "CH0_SADDR_HIGH", 0, 16 }, + { "NCSI_CH1_SADDR_LOW", 0x1a018, 0 }, + { "NCSI_CH1_SADDR_HIGH", 0x1a01c, 0 }, + { "CH1_SADDR_EN", 31, 1 }, + { "CH1_SADDR_HIGH", 0, 16 }, + { "NCSI_CH2_SADDR_LOW", 0x1a020, 0 }, + { "NCSI_CH2_SADDR_HIGH", 0x1a024, 0 }, + { "CH2_SADDR_EN", 31, 1 }, + { "CH2_SADDR_HIGH", 0, 16 }, + { "NCSI_CH3_SADDR_LOW", 0x1a028, 0 }, + { "NCSI_CH3_SADDR_HIGH", 0x1a02c, 0 }, + { "CH3_SADDR_EN", 31, 1 }, + { "CH3_SADDR_HIGH", 0, 16 }, + { "NCSI_WORK_REQHDR_0", 0x1a030, 0 }, + { "NCSI_WORK_REQHDR_1", 0x1a034, 0 }, + { "NCSI_WORK_REQHDR_2", 0x1a038, 0 }, + { "NCSI_WORK_REQHDR_3", 0x1a03c, 0 }, + { "NCSI_MPS_HDR_LO", 0x1a040, 0 }, + { "NCSI_MPS_HDR_HI", 0x1a044, 0 }, + { "NCSI_CTL", 0x1a048, 0 }, + { "STRIP_OVLAN", 3, 1 }, + { "bmc_drop_non_bc", 2, 1 }, + { "bmc_rx_fwd_all", 1, 1 }, + { "FWD_BMC", 0, 1 }, + { "NCSI_NCSI_ETYPE", 0x1a04c, 0 }, + { "NCSI_RX_FIFO_CNT", 0x1a050, 0 }, + { "NCSI_RX_ERR_CNT", 0x1a054, 0 }, + { "NCSI_RX_OF_CNT", 0x1a058, 0 }, + { "NCSI_RX_MS_CNT", 0x1a05c, 0 }, + { "NCSI_RX_IE_CNT", 0x1a060, 0 }, + { "NCSI_MPS_DEMUX_CNT", 0x1a064, 0 }, + { "MPS2CIM_CNT", 16, 9 }, + { "MPS2BMC_CNT", 0, 9 }, + { "NCSI_CIM_DEMUX_CNT", 0x1a068, 0 }, + { "CIM2MPS_CNT", 16, 9 }, + { "CIM2BMC_CNT", 0, 9 }, + { "NCSI_TX_FIFO_CNT", 0x1a06c, 0 }, + { "NCSI_SE_CNT_CTL", 0x1a0b0, 0 }, + { "NCSI_SE_CNT_MPS", 0x1a0b4, 0 }, + { "NCSI_SE_CNT_CIM", 0x1a0b8, 0 }, + { "NCSI_BUS_DEBUG", 0x1a0bc, 0 }, + { "NCSI_LA_RDPTR", 0x1a0c0, 0 }, + { "NCSI_LA_RDDATA", 0x1a0c4, 0 }, + { "NCSI_LA_WRPTR", 0x1a0c8, 0 }, + { "NCSI_LA_RESERVED", 0x1a0cc, 0 }, + { "NCSI_LA_CTL", 0x1a0d0, 0 }, + { "NCSI_INT_ENABLE", 0x1a0d4, 0 }, + { "CIM2NC_perr", 9, 1 }, + { "CIM_DM_prty_err", 8, 1 }, + { "MPS_DM_prty_err", 7, 1 }, + { "token", 6, 1 }, + { "arb_done", 5, 1 }, + { "arb_started", 4, 1 }, + { "WOL", 3, 1 }, + { "MACInt", 2, 1 }, + { "TXFIFO_prty_err", 1, 1 }, + { "RXFIFO_prty_err", 0, 1 }, + { "NCSI_INT_CAUSE", 0x1a0d8, 0 }, + { "CIM2NC_perr", 9, 1 }, + { "CIM_DM_prty_err", 8, 1 }, + { "MPS_DM_prty_err", 7, 1 }, + { "token", 6, 1 }, + { "arb_done", 5, 1 }, + { "arb_started", 4, 1 }, + { "WOL", 3, 1 }, + { "MACInt", 2, 1 }, + { "TXFIFO_prty_err", 1, 1 }, + { "RXFIFO_prty_err", 0, 1 }, + { "NCSI_STATUS", 0x1a0dc, 0 }, + { "Master", 1, 1 }, + { "arb_status", 0, 1 }, + { "NCSI_PAUSE_CTRL", 0x1a0e0, 0 }, + { "NCSI_PAUSE_TIMEOUT", 0x1a0e4, 0 }, + { "NCSI_PAUSE_WM", 0x1a0ec, 0 }, + { "PauseHWM", 16, 11 }, + { "PauseLWM", 0, 11 }, + { "NCSI_DEBUG", 0x1a0f0, 0 }, + { "TxFIFO_empty", 4, 1 }, + { "TxFIFO_full", 3, 1 }, + { "PKG_ID", 0, 3 }, + { "NCSI_PERR_INJECT", 0x1a0f4, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "NCSI_PERR_ENABLE", 0x1a0f8, 0 }, + { "CIM2NC_perr", 9, 1 }, + { "CIM_DM_prty_err", 8, 1 }, + { "MPS_DM_prty_err", 7, 1 }, + { "TXFIFO_prty_err", 1, 1 }, + { "RXFIFO_prty_err", 0, 1 }, + { "NCSI_MODE_SEL", 0x1a0fc, 0 }, + { "NCSI_MACB_NETWORK_CTRL", 0x1a100, 0 }, + { "TxSndZeroPause", 12, 1 }, + { "TxSndPause", 11, 1 }, + { "TxStop", 10, 1 }, + { "TxStart", 9, 1 }, + { "BackPress", 8, 1 }, + { "StatWrEn", 7, 1 }, + { "IncrStat", 6, 1 }, + { "ClearStat", 5, 1 }, + { "EnMgmtPort", 4, 1 }, + { "TxEn", 3, 1 }, + { "RxEn", 2, 1 }, + { "LoopLocal", 1, 1 }, + { "LoopPHY", 0, 1 }, + { "NCSI_MACB_NETWORK_CFG", 0x1a104, 0 }, + { "PClkDiv128", 22, 1 }, + { "CopyPause", 21, 1 }, + { "NonStdPreOK", 20, 1 }, + { "NoFCS", 19, 1 }, + { "RxEnHalfDup", 18, 1 }, + { "NoCopyFCS", 17, 1 }, + { "LenChkEn", 16, 1 }, + { "RxBufOffset", 14, 2 }, + { "PauseEn", 13, 1 }, + { "RetryTest", 12, 1 }, + { "PClkDiv", 10, 2 }, + { "ExtClass", 9, 1 }, + { "En1536Frame", 8, 1 }, + { "UCastHashEn", 7, 1 }, + { "MCastHashEn", 6, 1 }, + { "RxBCastDis", 5, 1 }, + { "CopyAllFrames", 4, 1 }, + { "JumboEn", 3, 1 }, + { "SerEn", 2, 1 }, + { "FullDuplex", 1, 1 }, + { "Speed", 0, 1 }, + { "NCSI_MACB_NETWORK_STATUS", 0x1a108, 0 }, + { "PHYMgmtStatus", 2, 1 }, + { "MDIStatus", 1, 1 }, + { "LinkStatus", 0, 1 }, + { "NCSI_MACB_TX_STATUS", 0x1a114, 0 }, + { "UnderrunErr", 6, 1 }, + { "TxComplete", 5, 1 }, + { "BufferExhausted", 4, 1 }, + { "TxProgress", 3, 1 }, + { "RetryLimit", 2, 1 }, + { "ColEvent", 1, 1 }, + { "UsedBitRead", 0, 1 }, + { "NCSI_MACB_RX_BUF_QPTR", 0x1a118, 0 }, + { "RxBufQPtr", 2, 30 }, + { "NCSI_MACB_TX_BUF_QPTR", 0x1a11c, 0 }, + { "TxBufQPtr", 2, 30 }, + { "NCSI_MACB_RX_STATUS", 0x1a120, 0 }, + { "RxOverrunErr", 2, 1 }, + { "FrameRcvd", 1, 1 }, + { "NoRxBuf", 0, 1 }, + { "NCSI_MACB_INT_STATUS", 0x1a124, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_EN", 0x1a128, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_DIS", 0x1a12c, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_MASK", 0x1a130, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_PAUSE_TIME", 0x1a138, 0 }, + { "NCSI_MACB_PAUSE_FRAMES_RCVD", 0x1a13c, 0 }, + { "NCSI_MACB_TX_FRAMES_OK", 0x1a140, 0 }, + { "NCSI_MACB_SINGLE_COL_FRAMES", 0x1a144, 0 }, + { "NCSI_MACB_MUL_COL_FRAMES", 0x1a148, 0 }, + { "NCSI_MACB_RX_FRAMES_OK", 0x1a14c, 0 }, + { "NCSI_MACB_FCS_ERR", 0x1a150, 0 }, + { "NCSI_MACB_ALIGN_ERR", 0x1a154, 0 }, + { "NCSI_MACB_DEF_TX_FRAMES", 0x1a158, 0 }, + { "NCSI_MACB_LATE_COL", 0x1a15c, 0 }, + { "NCSI_MACB_EXCESSIVE_COL", 0x1a160, 0 }, + { "NCSI_MACB_TX_UNDERRUN_ERR", 0x1a164, 0 }, + { "NCSI_MACB_CARRIER_SENSE_ERR", 0x1a168, 0 }, + { "NCSI_MACB_RX_RESOURCE_ERR", 0x1a16c, 0 }, + { "NCSI_MACB_RX_OVERRUN_ERR", 0x1a170, 0 }, + { "NCSI_MACB_RX_SYMBOL_ERR", 0x1a174, 0 }, + { "NCSI_MACB_RX_OVERSIZE_FRAME", 0x1a178, 0 }, + { "NCSI_MACB_RX_JABBER_ERR", 0x1a17c, 0 }, + { "NCSI_MACB_RX_UNDERSIZE_FRAME", 0x1a180, 0 }, + { "NCSI_MACB_SQE_TEST_ERR", 0x1a184, 0 }, + { "NCSI_MACB_LENGTH_ERR", 0x1a188, 0 }, + { "NCSI_MACB_TX_PAUSE_FRAMES", 0x1a18c, 0 }, + { "NCSI_MACB_HASH_LOW", 0x1a190, 0 }, + { "NCSI_MACB_HASH_HIGH", 0x1a194, 0 }, + { "NCSI_MACB_SPECIFIC_1_LOW", 0x1a198, 0 }, + { "NCSI_MACB_SPECIFIC_1_HIGH", 0x1a19c, 0 }, + { "NCSI_MACB_SPECIFIC_2_LOW", 0x1a1a0, 0 }, + { "NCSI_MACB_SPECIFIC_2_HIGH", 0x1a1a4, 0 }, + { "NCSI_MACB_SPECIFIC_3_LOW", 0x1a1a8, 0 }, + { "NCSI_MACB_SPECIFIC_3_HIGH", 0x1a1ac, 0 }, + { "NCSI_MACB_SPECIFIC_4_LOW", 0x1a1b0, 0 }, + { "NCSI_MACB_SPECIFIC_4_HIGH", 0x1a1b4, 0 }, + { "NCSI_MACB_TYPE_ID", 0x1a1b8, 0 }, + { "NCSI_MACB_TX_PAUSE_QUANTUM", 0x1a1bc, 0 }, + { "NCSI_MACB_USER_IO", 0x1a1c0, 0 }, + { "UserProgInput", 16, 16 }, + { "UserProgOutput", 0, 16 }, + { "NCSI_MACB_WOL_CFG", 0x1a1c4, 0 }, + { "MCHashEn", 19, 1 }, + { "Specific1En", 18, 1 }, + { "ARPEn", 17, 1 }, + { "MagicPktEn", 16, 1 }, + { "ARPIPAddr", 0, 16 }, + { "NCSI_MACB_REV_STATUS", 0x1a1fc, 0 }, + { "PartRef", 16, 16 }, + { "DesRev", 0, 16 }, + { "NCSI_TX_CTRL", 0x1a200, 0 }, + { "SendPause", 2, 1 }, + { "SendZeroPause", 1, 1 }, + { "TxEn", 0, 1 }, + { "NCSI_TX_CFG", 0x1a204, 0 }, + { "CfgClkSpeed", 2, 3 }, + { "StretchMode", 1, 1 }, + { "TxPauseEn", 0, 1 }, + { "NCSI_TX_PAUSE_QUANTA", 0x1a208, 0 }, + { "NCSI_RX_CTRL", 0x1a20c, 0 }, + { "NCSI_RX_CFG", 0x1a210, 0 }, + { "Con802_3Preamble", 12, 1 }, + { "EnNon802_3Preamble", 11, 1 }, + { "CopyPreamble", 10, 1 }, + { "DisPauseFrames", 9, 1 }, + { "En1536BFrames", 8, 1 }, + { "EnJumbo", 7, 1 }, + { "RmFCS", 6, 1 }, + { "DisNonVlan", 5, 1 }, + { "EnExtMatch", 4, 1 }, + { "EnHashUcast", 3, 1 }, + { "EnHashMcast", 2, 1 }, + { "DisBCast", 1, 1 }, + { "CopyAllFrames", 0, 1 }, + { "NCSI_RX_HASH_LOW", 0x1a214, 0 }, + { "NCSI_RX_HASH_HIGH", 0x1a218, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_1", 0x1a21c, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_1", 0x1a220, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_2", 0x1a224, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_2", 0x1a228, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_3", 0x1a22c, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_3", 0x1a230, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_4", 0x1a234, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_4", 0x1a238, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_5", 0x1a23c, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_5", 0x1a240, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_6", 0x1a244, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_6", 0x1a248, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_7", 0x1a24c, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_7", 0x1a250, 0 }, + { "NCSI_RX_EXACT_MATCH_LOW_8", 0x1a254, 0 }, + { "NCSI_RX_EXACT_MATCH_HIGH_8", 0x1a258, 0 }, + { "NCSI_RX_TYPE_MATCH_1", 0x1a25c, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "NCSI_RX_TYPE_MATCH_2", 0x1a260, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "NCSI_RX_TYPE_MATCH_3", 0x1a264, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "NCSI_RX_TYPE_MATCH_4", 0x1a268, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "NCSI_INT_STATUS", 0x1a26c, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "NCSI_XGM_INT_MASK", 0x1a270, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "NCSI_XGM_INT_ENABLE", 0x1a274, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "NCSI_XGM_INT_DISABLE", 0x1a278, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "NCSI_TX_PAUSE_TIMER", 0x1a27c, 0 }, + { "NCSI_STAT_CTRL", 0x1a280, 0 }, + { "ReadSnpShot", 4, 1 }, + { "TakeSnpShot", 3, 1 }, + { "ClrStats", 2, 1 }, + { "IncrStats", 1, 1 }, + { "EnTestModeWr", 0, 1 }, + { "NCSI_RXFIFO_CFG", 0x1a284, 0 }, + { "RxFIFO_empty", 31, 1 }, + { "RxFIFO_full", 30, 1 }, + { "RxFIFOPauseHWM", 17, 12 }, + { "RxFIFOPauseLWM", 5, 12 }, + { "ForcedPause", 4, 1 }, + { "ExternLoopback", 3, 1 }, + { "RxByteSwap", 2, 1 }, + { "RxStrFrwrd", 1, 1 }, + { "DisErrFrames", 0, 1 }, + { "NCSI_TXFIFO_CFG", 0x1a288, 0 }, + { "TxFIFO_empty", 31, 1 }, + { "TxFIFO_full", 30, 1 }, + { "UnderunFix", 22, 1 }, + { "EnDropPkt", 21, 1 }, + { "TxIPG", 13, 8 }, + { "TxFIFOThresh", 4, 9 }, + { "InternLoopback", 3, 1 }, + { "TxByteSwap", 2, 1 }, + { "DisCRC", 1, 1 }, + { "DisPreAmble", 0, 1 }, + { "NCSI_SLOW_TIMER", 0x1a28c, 0 }, + { "PauseSlowTimerEn", 31, 1 }, + { "PauseSlowTimer", 0, 20 }, + { "NCSI_PAUSE_TIMER", 0x1a290, 0 }, + { "NCSI_XAUI_PCS_TEST", 0x1a294, 0 }, + { "TestPattern", 1, 2 }, + { "EnTest", 0, 1 }, + { "NCSI_RGMII_CTRL", 0x1a298, 0 }, + { "PhAlignFIFOThresh", 1, 2 }, + { "TxClk90Shift", 0, 1 }, + { "NCSI_RGMII_IMP", 0x1a29c, 0 }, + { "CalReset", 8, 1 }, + { "CalUpdate", 7, 1 }, + { "ImpSetUpdate", 6, 1 }, + { "RGMIIImpPD", 3, 3 }, + { "RGMIIImpPU", 0, 3 }, + { "NCSI_RX_MAX_PKT_SIZE", 0x1a2a8, 0 }, + { "RxMaxFramerSize", 17, 14 }, + { "RxEnErrorGather", 16, 1 }, + { "RxEnSingleFlit", 15, 1 }, + { "RxEnFramer", 14, 1 }, + { "RxMaxPktSize", 0, 14 }, + { "NCSI_RESET_CTRL", 0x1a2ac, 0 }, + { "XGMAC_STOP_EN", 4, 1 }, + { "XG2G_Reset_", 3, 1 }, + { "RGMII_Reset_", 2, 1 }, + { "PCS_Reset_", 1, 1 }, + { "MAC_Reset_", 0, 1 }, + { "NCSI_XAUI1G_CTRL", 0x1a2b0, 0 }, + { "NCSI_SERDES_LANE_CTRL", 0x1a2b4, 0 }, + { "LaneReversal", 8, 1 }, + { "TxPolarity", 4, 4 }, + { "RxPolarity", 0, 4 }, + { "NCSI_PORT_CFG", 0x1a2b8, 0 }, + { "SafeSpeedChange", 4, 1 }, + { "ClkDivReset_", 3, 1 }, + { "PortSpeed", 1, 2 }, + { "EnRGMII", 0, 1 }, + { "NCSI_EPIO_DATA0", 0x1a2c0, 0 }, + { "NCSI_EPIO_DATA1", 0x1a2c4, 0 }, + { "NCSI_EPIO_DATA2", 0x1a2c8, 0 }, + { "NCSI_EPIO_DATA3", 0x1a2cc, 0 }, + { "NCSI_EPIO_OP", 0x1a2d0, 0 }, + { "PIO_Ready", 31, 1 }, + { "PIO_WrRd", 24, 1 }, + { "PIO_Address", 0, 8 }, + { "NCSI_XGMAC0_INT_ENABLE", 0x1a2d4, 0 }, + { "XAUIPCSDECErr", 24, 1 }, + { "RGMIIRxFIFOOverflow", 23, 1 }, + { "RGMIIRxFIFOUnderflow", 22, 1 }, + { "RxPktSizeError", 21, 1 }, + { "WOLPatDetected", 20, 1 }, + { "TXFIFO_prty_err", 17, 3 }, + { "RXFIFO_prty_err", 14, 3 }, + { "TXFIFO_underrun", 13, 1 }, + { "RXFIFO_overflow", 12, 1 }, + { "SERDESBISTErr", 8, 4 }, + { "SERDESLowSigChange", 4, 4 }, + { "XAUIPCSCTCErr", 3, 1 }, + { "XAUIPCSAlignChange", 2, 1 }, + { "RGMIILinkStsChange", 1, 1 }, + { "xgm_int", 0, 1 }, + { "NCSI_XGMAC0_INT_CAUSE", 0x1a2d8, 0 }, + { "XAUIPCSDECErr", 24, 1 }, + { "RGMIIRxFIFOOverflow", 23, 1 }, + { "RGMIIRxFIFOUnderflow", 22, 1 }, + { "RxPktSizeError", 21, 1 }, + { "WOLPatDetected", 20, 1 }, + { "TXFIFO_prty_err", 17, 3 }, + { "RXFIFO_prty_err", 14, 3 }, + { "TXFIFO_underrun", 13, 1 }, + { "RXFIFO_overflow", 12, 1 }, + { "SERDESBISTErr", 8, 4 }, + { "SERDESLowSigChange", 4, 4 }, + { "XAUIPCSCTCErr", 3, 1 }, + { "XAUIPCSAlignChange", 2, 1 }, + { "RGMIILinkStsChange", 1, 1 }, + { "xgm_int", 0, 1 }, + { "NCSI_XAUI_ACT_CTRL", 0x1a2dc, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "NCSI_SERDES_CTRL0", 0x1a2e0, 0 }, + { "IntSerLPBK3", 27, 1 }, + { "IntSerLPBK2", 26, 1 }, + { "IntSerLPBK1", 25, 1 }, + { "IntSerLPBK0", 24, 1 }, + { "Reset3", 23, 1 }, + { "Reset2", 22, 1 }, + { "Reset1", 21, 1 }, + { "Reset0", 20, 1 }, + { "Pwrdn3", 19, 1 }, + { "Pwrdn2", 18, 1 }, + { "Pwrdn1", 17, 1 }, + { "Pwrdn0", 16, 1 }, + { "ResetPLL23", 15, 1 }, + { "ResetPLL01", 14, 1 }, + { "PW23", 12, 2 }, + { "PW01", 10, 2 }, + { "Deq", 6, 4 }, + { "Dtx", 2, 4 }, + { "LoDrv", 1, 1 }, + { "HiDrv", 0, 1 }, + { "NCSI_SERDES_CTRL1", 0x1a2e4, 0 }, + { "FmOffset3", 19, 5 }, + { "FmOffsetEn3", 18, 1 }, + { "FmOffset2", 13, 5 }, + { "FmOffsetEn2", 12, 1 }, + { "FmOffset1", 7, 5 }, + { "FmOffsetEn1", 6, 1 }, + { "FmOffset0", 1, 5 }, + { "FmOffsetEn0", 0, 1 }, + { "NCSI_SERDES_CTRL2", 0x1a2e8, 0 }, + { "DnIn3", 11, 1 }, + { "UpIn3", 10, 1 }, + { "RxSlave3", 9, 1 }, + { "DnIn2", 8, 1 }, + { "UpIn2", 7, 1 }, + { "RxSlave2", 6, 1 }, + { "DnIn1", 5, 1 }, + { "UpIn1", 4, 1 }, + { "RxSlave1", 3, 1 }, + { "DnIn0", 2, 1 }, + { "UpIn0", 1, 1 }, + { "RxSlave0", 0, 1 }, + { "NCSI_SERDES_CTRL3", 0x1a2ec, 0 }, + { "ExtBISTChkErrClr3", 31, 1 }, + { "ExtBISTChkEn3", 30, 1 }, + { "ExtBISTGenEn3", 29, 1 }, + { "ExtBISTPat3", 26, 3 }, + { "ExtParReset3", 25, 1 }, + { "ExtParLPBK3", 24, 1 }, + { "ExtBISTChkErrClr2", 23, 1 }, + { "ExtBISTChkEn2", 22, 1 }, + { "ExtBISTGenEn2", 21, 1 }, + { "ExtBISTPat2", 18, 3 }, + { "ExtParReset2", 17, 1 }, + { "ExtParLPBK2", 16, 1 }, + { "ExtBISTChkErrClr1", 15, 1 }, + { "ExtBISTChkEn1", 14, 1 }, + { "ExtBISTGenEn1", 13, 1 }, + { "ExtBISTPat1", 10, 3 }, + { "ExtParReset1", 9, 1 }, + { "ExtParLPBK1", 8, 1 }, + { "ExtBISTChkErrClr0", 7, 1 }, + { "ExtBISTChkEn0", 6, 1 }, + { "ExtBISTGenEn0", 5, 1 }, + { "ExtBISTPat0", 2, 3 }, + { "ExtParReset0", 1, 1 }, + { "ExtParLPBK0", 0, 1 }, + { "NCSI_SERDES_STAT0", 0x1a2f0, 0 }, + { "ExtBISTChkErrCnt0", 4, 24 }, + { "ExtBISTChkFmd0", 3, 1 }, + { "LowSigForceEn0", 2, 1 }, + { "LowSigForceValue0", 1, 1 }, + { "LowSig0", 0, 1 }, + { "NCSI_SERDES_STAT1", 0x1a2f4, 0 }, + { "ExtBISTChkErrCnt1", 4, 24 }, + { "ExtBISTChkFmd1", 3, 1 }, + { "LowSigForceEn1", 2, 1 }, + { "LowSigForceValue1", 1, 1 }, + { "LowSig1", 0, 1 }, + { "NCSI_SERDES_STAT2", 0x1a2f8, 0 }, + { "ExtBISTChkErrCnt2", 4, 24 }, + { "ExtBISTChkFmd2", 3, 1 }, + { "LowSigForceEn2", 2, 1 }, + { "LowSigForceValue2", 1, 1 }, + { "LowSig2", 0, 1 }, + { "NCSI_SERDES_STAT3", 0x1a2fc, 0 }, + { "ExtBISTChkErrCnt3", 4, 24 }, + { "ExtBISTChkFmd3", 3, 1 }, + { "LowSigForceEn3", 2, 1 }, + { "LowSigForceValue3", 1, 1 }, + { "LowSig3", 0, 1 }, + { "NCSI_STAT_TX_BYTE_LOW", 0x1a300, 0 }, + { "NCSI_STAT_TX_BYTE_HIGH", 0x1a304, 0 }, + { "NCSI_STAT_TX_FRAME_LOW", 0x1a308, 0 }, + { "NCSI_STAT_TX_FRAME_HIGH", 0x1a30c, 0 }, + { "NCSI_STAT_TX_BCAST", 0x1a310, 0 }, + { "NCSI_STAT_TX_MCAST", 0x1a314, 0 }, + { "NCSI_STAT_TX_PAUSE", 0x1a318, 0 }, + { "NCSI_STAT_TX_64B_FRAMES", 0x1a31c, 0 }, + { "NCSI_STAT_TX_65_127B_FRAMES", 0x1a320, 0 }, + { "NCSI_STAT_TX_128_255B_FRAMES", 0x1a324, 0 }, + { "NCSI_STAT_TX_256_511B_FRAMES", 0x1a328, 0 }, + { "NCSI_STAT_TX_512_1023B_FRAMES", 0x1a32c, 0 }, + { "NCSI_STAT_TX_1024_1518B_FRAMES", 0x1a330, 0 }, + { "NCSI_STAT_TX_1519_MAXB_FRAMES", 0x1a334, 0 }, + { "NCSI_STAT_TX_ERR_FRAMES", 0x1a338, 0 }, + { "NCSI_STAT_RX_BYTES_LOW", 0x1a33c, 0 }, + { "NCSI_STAT_RX_BYTES_HIGH", 0x1a340, 0 }, + { "NCSI_STAT_RX_FRAMES_LOW", 0x1a344, 0 }, + { "NCSI_STAT_RX_FRAMES_HIGH", 0x1a348, 0 }, + { "NCSI_STAT_RX_BCAST_FRAMES", 0x1a34c, 0 }, + { "NCSI_STAT_RX_MCAST_FRAMES", 0x1a350, 0 }, + { "NCSI_STAT_RX_PAUSE_FRAMES", 0x1a354, 0 }, + { "NCSI_STAT_RX_64B_FRAMES", 0x1a358, 0 }, + { "NCSI_STAT_RX_65_127B_FRAMES", 0x1a35c, 0 }, + { "NCSI_STAT_RX_128_255B_FRAMES", 0x1a360, 0 }, + { "NCSI_STAT_RX_256_511B_FRAMES", 0x1a364, 0 }, + { "NCSI_STAT_RX_512_1023B_FRAMES", 0x1a368, 0 }, + { "NCSI_STAT_RX_1024_1518B_FRAMES", 0x1a36c, 0 }, + { "NCSI_STAT_RX_1519_MAXB_FRAMES", 0x1a370, 0 }, + { "NCSI_STAT_RX_SHORT_FRAMES", 0x1a374, 0 }, + { "NCSI_STAT_RX_OVERSIZE_FRAMES", 0x1a378, 0 }, + { "NCSI_STAT_RX_JABBER_FRAMES", 0x1a37c, 0 }, + { "NCSI_STAT_RX_CRC_ERR_FRAMES", 0x1a380, 0 }, + { "NCSI_STAT_RX_LENGTH_ERR_FRAMES", 0x1a384, 0 }, + { "NCSI_STAT_RX_SYM_CODE_ERR_FRAMES", 0x1a388, 0 }, + { "NCSI_XAUI_PCS_ERR", 0x1a398, 0 }, + { "PCS_SyncStatus", 5, 4 }, + { "PCS_CTCFIFOErr", 1, 4 }, + { "PCS_NotAligned", 0, 1 }, + { "NCSI_RGMII_STATUS", 0x1a39c, 0 }, + { "GMIIDuplex", 3, 1 }, + { "GMIISpeed", 1, 2 }, + { "GMIILinkStatus", 0, 1 }, + { "NCSI_WOL_STATUS", 0x1a3a0, 0 }, + { "PatDetected", 31, 1 }, + { "MatchedFilter", 0, 3 }, + { "NCSI_RX_MAX_PKT_SIZE_ERR_CNT", 0x1a3a4, 0 }, + { "NCSI_TX_SPI4_SOP_EOP_CNT", 0x1a3a8, 0 }, + { "TxSPI4SopCnt", 16, 16 }, + { "TxSPI4EopCnt", 0, 16 }, + { "NCSI_RX_SPI4_SOP_EOP_CNT", 0x1a3ac, 0 }, + { "RxSPI4SopCnt", 16, 16 }, + { "RxSPI4EopCnt", 0, 16 }, + { NULL } +}; + +struct reg_info t7_mac_t7_regs[] = { + { "MAC_PORT_CFG", 0x30800, 0 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "port_map", 21, 3 }, + { "Smux_Rx_Loop", 17, 4 }, + { "Signal_Det", 15, 1 }, + { "cfg_mac_2_mps_full", 13, 1 }, + { "mps_full_sel", 12, 1 }, + { "SmuxTxSel", 8, 4 }, + { "PortSpeed", 4, 4 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "debug_tx_rx_sel", 1, 1 }, + { "MAC_PORT_RESET_CTRL", 0x30804, 0 }, + { "EEE_RESET", 30, 1 }, + { "PTP_TIMER", 29, 1 }, + { "MtipRefReset", 28, 1 }, + { "MtipRegReset", 25, 1 }, + { "reset_reg_clk_i", 24, 1 }, + { "TXIF_Reset", 12, 1 }, + { "RXIF_Reset", 11, 1 }, + { "AuxExt_Reset", 10, 1 }, + { "WOL_Reset", 2, 1 }, + { "MAC_PORT_LED_CFG", 0x30808, 0 }, + { "Led1_Cfg1", 15, 3 }, + { "Led0_Cfg1", 12, 3 }, + { "Led1_tlo", 11, 1 }, + { "Led1_thi", 10, 1 }, + { "Led0_tlo", 9, 1 }, + { "Led0_thi", 8, 1 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "MAC_PORT_LED_COUNTHI", 0x3080c, 0 }, + { "MAC_PORT_LED_COUNTLO", 0x30810, 0 }, + { "MAC_PORT_CFG3", 0x30814, 0 }, + { "FCSDisCtrl", 25, 1 }, + { "SigDetCtrl", 24, 1 }, + { "se_clr", 21, 1 }, + { "MAC_PORT_CFG2", 0x30818, 0 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "MAC_PORT_PKT_COUNT", 0x3081c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "MAC_PORT_MAGIC_MACID_LO", 0x30820, 0 }, + { "MAC_PORT_MAGIC_MACID_HI", 0x30824, 0 }, + { "MAC_PORT_LINK_STATUS", 0x30828, 0 }, + { "egr_se_cnt_Err", 9, 1 }, + { "ingr_se_cnt_Err", 8, 1 }, + { "hi_ber", 7, 1 }, + { "an_done", 6, 1 }, + { "align_done", 5, 1 }, + { "block_lock", 4, 1 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "MAC_PORT_PERR_INT_EN_100G", 0x3082c, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_INT_CAUSE_100G", 0x30830, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_ENABLE_100G", 0x30834, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_0", 0x30838, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_1", 0x3083c, 0 }, + { "tx_stop", 25, 1 }, + { "mode1s_ena", 24, 1 }, + { "tx_ts_id", 12, 12 }, + { "tx_li_fault", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "lpi_txhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_2", 0x30840, 0 }, + { "MAC_PORT_MAC10G100G_STATUS", 0x30844, 0 }, + { "reg_lowp", 21, 1 }, + { "li_fault", 20, 1 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "mac_pause_en", 4, 1 }, + { "mac_enable", 3, 1 }, + { "loop_ena", 2, 1 }, + { "loc_fault", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_PORT_MAC_AN_STATE_STATUS0", 0x30848, 0 }, + { "an_val_an", 15, 1 }, + { "an_tr_dis_status_an", 14, 1 }, + { "an_status_an", 13, 1 }, + { "an_select_an", 8, 5 }, + { "an_rs_fec_ena_an", 7, 1 }, + { "an_int_an", 6, 1 }, + { "an_fec_ena_an", 5, 1 }, + { "an_done_an", 4, 1 }, + { "an_state", 0, 4 }, + { "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3084c, 0 }, + { "MAC_PORT_EPIO_DATA0", 0x30850, 0 }, + { "MAC_PORT_EPIO_DATA1", 0x30854, 0 }, + { "MAC_PORT_EPIO_DATA2", 0x30858, 0 }, + { "MAC_PORT_EPIO_DATA3", 0x3085c, 0 }, + { "MAC_PORT_EPIO_OP", 0x30860, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "MAC_PORT_WOL_STATUS", 0x30864, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "MAC_PORT_INT_EN", 0x30868, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_INT_CAUSE", 0x3086c, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_PERR_INT_EN", 0x30870, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INT_CAUSE", 0x30874, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_ENABLE", 0x30878, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INJECT", 0x3087c, 0 }, + { "MemSel", 1, 8 }, + { "InjectDataErr", 0, 1 }, + { "MAC_PORT_RUNT_FRAME", 0x30880, 0 }, + { "runtclear", 16, 1 }, + { "runt", 0, 16 }, + { "MAC_PORT_EEE_STATUS", 0x30884, 0 }, + { "eee_tx_10g_state", 10, 2 }, + { "eee_rx_10g_state", 8, 2 }, + { "pma_rx_refresh", 3, 1 }, + { "pma_rx_quiet", 2, 1 }, + { "pma_tx_refresh", 1, 1 }, + { "pma_tx_quiet", 0, 1 }, + { "MAC_PORT_TX_TS_ID", 0x30888, 0 }, + { "ts_id_MSB", 3, 1 }, + { "ts_id", 0, 3 }, + { "MAC_PORT_TX_TS_VAL_LO", 0x3088c, 0 }, + { "MAC_PORT_TX_TS_VAL_HI", 0x30890, 0 }, + { "MAC_PORT_EEE_CTL", 0x30894, 0 }, + { "EEE_CTRL", 2, 30 }, + { "TICK_START", 1, 1 }, + { "En", 0, 1 }, + { "MAC_PORT_EEE_TX_CTL", 0x30898, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_ACTIVE", 3, 1 }, + { "LPI_TXHOLD", 2, 1 }, + { "LPI_REQ", 1, 1 }, + { "EEE_TX_RESET", 0, 1 }, + { "MAC_PORT_EEE_RX_CTL", 0x3089c, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_IND", 1, 1 }, + { "EEE_RX_RESET", 0, 1 }, + { "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x308a0, 0 }, + { "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x308a4, 0 }, + { "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x308a8, 0 }, + { "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x308b8, 0 }, + { "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x308bc, 0 }, + { "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x308c0, 0 }, + { "MAC_PORT_EEE_WF_COUNT", 0x308cc, 0 }, + { "wake_cnt_clr", 16, 1 }, + { "wake_cnt", 0, 16 }, + { "MAC_PORT_WOL_EN", 0x308d0, 0 }, + { "WOL_enable", 1, 1 }, + { "WOL_indicator", 0, 1 }, + { "MAC_PORT_INT_TRACE", 0x308d4, 0 }, + { "MAC_PORT_TRACE_TS_LO", 0x308d8, 0 }, + { "MAC_PORT_TRACE_TS_HI", 0x308dc, 0 }, + { "MAC_PORT_MTIP_10G100G_REVISION", 0x30900, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_PORT_MTIP_10G100G_SCRATCH", 0x30904, 0 }, + { "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x30908, 0 }, + { "NO_PREAM", 31, 1 }, + { "SHORT_PREAM", 30, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "REG_LOWP_RXEMPTY", 24, 1 }, + { "TX_LOWP_ENA", 23, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "FORCE_SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "CNTL_FRM_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOP_ENA", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENAMAC", 1, 1 }, + { "TX_ENAMAC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3090c, 0 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x30910, 0 }, + { "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x30914, 0 }, + { "SET_LEN", 16, 16 }, + { "FRM_LEN_SET", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3091c, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x30920, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x30924, 0 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x30928, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x30930, 0 }, + { "Clk_divisor", 7, 9 }, + { "ENA_CLAUSE", 6, 1 }, + { "PREAMBLE_DISABLE", 5, 1 }, + { "Hold_time_setting", 2, 3 }, + { "MDIO_read_error", 1, 1 }, + { "MDIO_Busy", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x30934, 0 }, + { "READ_MODE", 15, 1 }, + { "POST_INCR_READ", 14, 1 }, + { "Port_PHY_Addr", 5, 5 }, + { "Device_Reg_Addr", 0, 5 }, + { "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x30938, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3093c, 0 }, + { "MAC_PORT_MTIP_10G100G_STATUS", 0x30940, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_LINT_FAULT", 7, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "RX_LOWP", 4, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x30944, 0 }, + { "IPG_COMP_CNT", 16, 16 }, + { "AVG_IPG_LEN", 2, 4 }, + { "DSBL_DIC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x30948, 0 }, + { "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x30954, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x30958, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3095c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x30960, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x30964, 0 }, + { "CL1_QUANTA_THRESH", 16, 16 }, + { "CL0_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x30968, 0 }, + { "CL3_QUANTA_THRESH", 16, 16 }, + { "CL2_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3096c, 0 }, + { "CL5_QUANTA_THRESH", 16, 16 }, + { "CL4_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x30970, 0 }, + { "CL7_QUANTA_THRESH", 16, 16 }, + { "CL6_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x30974, 0 }, + { "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3097c, 0 }, + { "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x30980, 0 }, + { "RX_CNT_MODE", 16, 1 }, + { "TS_UPD64_MODE", 12, 1 }, + { "TS_BINARY_MODE", 11, 1 }, + { "TS_DELAY_MODE", 10, 1 }, + { "TS_DELTA_MODE", 9, 1 }, + { "TX_MAC_RS_ERR", 8, 1 }, + { "RX_PAUSE_BYPASS", 6, 1 }, + { "ONE_STEP_ENA", 5, 1 }, + { "PAUSETIMERX8", 4, 1 }, + { "XGMII_ENA", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x30a00, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x30a04, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x30a08, 0 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x30a0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x30a10, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x30a14, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x30a18, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x30a1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x30a20, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x30a38, 0 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x30a3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x30a50, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x30a58, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x30a80, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x30a84, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x30a88, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x30a8c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x30a90, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x30a94, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x30a98, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x30a9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x30aa0, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x30aa4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x30aa8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x30aac, 0 }, + { "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x30ab0, 0 }, + { "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x30ab4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x30ac8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x30acc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x30ad0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x30ad4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x30ad8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x30adc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x30ae0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x30ae4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x30ae8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x30aec, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x30af0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x30af4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x30af8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x30afc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x30b00, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x30b04, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x30b08, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x30b0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x30b10, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x30b14, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x30b18, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x30b1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x30b20, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x30b24, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x30b28, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x30b2c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x30b30, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x30b34, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x30b38, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x30b3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x30b40, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x30b44, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x30b48, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x30b4c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x30b50, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x30b54, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x30b58, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x30b5c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x30b60, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x30b64, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x30b68, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x30b6c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x30b70, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x30b74, 0 }, + { "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x30b78, 0 }, + { "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x30b7c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x30b80, 0 }, + { "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x30b84, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_0_VL0_0", 0x30b98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL0_1", 0x30b9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL1_0", 0x30ba0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL1_1", 0x30ba4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL2_0", 0x30ba8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL2_1", 0x30bac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL3_0", 0x30bb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL3_1", 0x30bb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x30bb8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_VL4_0", 0x30c98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL4_1", 0x30c9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL5_0", 0x30ca0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL5_1", 0x30ca4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL6_0", 0x30ca8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL6_1", 0x30cac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL7_0", 0x30cb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL7_1", 0x30cb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL8_0", 0x30cb8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL8_1", 0x30cbc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL9_0", 0x30cc0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL9_1", 0x30cc4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL10_0", 0x30cc8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL10_1", 0x30ccc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL11_0", 0x30cd0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL11_1", 0x30cd4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL12_0", 0x30cd8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL12_1", 0x30cdc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL13_0", 0x30ce0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL13_1", 0x30ce4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL14_0", 0x30ce8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL14_1", 0x30cec, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL15_0", 0x30cf0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL15_1", 0x30cf4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL16_0", 0x30cf8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL16_1", 0x30cfc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL17_0", 0x30d00, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL17_1", 0x30d04, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL18_0", 0x30d08, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL18_1", 0x30d0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL19_0", 0x30d10, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL19_1", 0x30d14, 0 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x31000, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x31004, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x31008, 0 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3100c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x31010, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x31014, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x31018, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3101c, 0 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x31020, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x31038, 0 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3103c, 0 }, + { "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x31050, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x31058, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x31080, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x31084, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x31088, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3108c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x31090, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x31094, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x31098, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3109c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x310a0, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x310a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x310a8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x310ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x310b0, 0 }, + { "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x310b4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x310c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x310cc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x310d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x310d4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x310d8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x310dc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x310e0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x310e4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x310e8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x310ec, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x310f0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x310f4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x310f8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x310fc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x31100, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x31104, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x31108, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3110c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x31110, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x31114, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x31118, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3111c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x31120, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x31124, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x31128, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3112c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x31130, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x31134, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x31138, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3113c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x31140, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x31144, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x31148, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3114c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x31150, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x31154, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x31158, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3115c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x31160, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x31164, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x31168, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3116c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x31170, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x31174, 0 }, + { "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x31178, 0 }, + { "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3117c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x31180, 0 }, + { "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x31184, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_1_VL0_0", 0x31198, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3119c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL1_0", 0x311a0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL1_1", 0x311a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL2_0", 0x311a8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL2_1", 0x311ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL3_0", 0x311b0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL3_1", 0x311b4, 0 }, + { "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x311b8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_CFG", 0x32800, 0 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "port_map", 21, 3 }, + { "Smux_Rx_Loop", 17, 4 }, + { "Signal_Det", 15, 1 }, + { "cfg_mac_2_mps_full", 13, 1 }, + { "mps_full_sel", 12, 1 }, + { "SmuxTxSel", 8, 4 }, + { "PortSpeed", 4, 4 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "debug_tx_rx_sel", 1, 1 }, + { "MAC_PORT_RESET_CTRL", 0x32804, 0 }, + { "EEE_RESET", 30, 1 }, + { "PTP_TIMER", 29, 1 }, + { "MtipRefReset", 28, 1 }, + { "MtipRegReset", 25, 1 }, + { "reset_reg_clk_i", 24, 1 }, + { "TXIF_Reset", 12, 1 }, + { "RXIF_Reset", 11, 1 }, + { "AuxExt_Reset", 10, 1 }, + { "WOL_Reset", 2, 1 }, + { "MAC_PORT_LED_CFG", 0x32808, 0 }, + { "Led1_Cfg1", 15, 3 }, + { "Led0_Cfg1", 12, 3 }, + { "Led1_tlo", 11, 1 }, + { "Led1_thi", 10, 1 }, + { "Led0_tlo", 9, 1 }, + { "Led0_thi", 8, 1 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "MAC_PORT_LED_COUNTHI", 0x3280c, 0 }, + { "MAC_PORT_LED_COUNTLO", 0x32810, 0 }, + { "MAC_PORT_CFG3", 0x32814, 0 }, + { "FCSDisCtrl", 25, 1 }, + { "SigDetCtrl", 24, 1 }, + { "se_clr", 21, 1 }, + { "MAC_PORT_CFG2", 0x32818, 0 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "MAC_PORT_PKT_COUNT", 0x3281c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "MAC_PORT_MAGIC_MACID_LO", 0x32820, 0 }, + { "MAC_PORT_MAGIC_MACID_HI", 0x32824, 0 }, + { "MAC_PORT_LINK_STATUS", 0x32828, 0 }, + { "egr_se_cnt_Err", 9, 1 }, + { "ingr_se_cnt_Err", 8, 1 }, + { "hi_ber", 7, 1 }, + { "an_done", 6, 1 }, + { "align_done", 5, 1 }, + { "block_lock", 4, 1 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "MAC_PORT_PERR_INT_EN_100G", 0x3282c, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_INT_CAUSE_100G", 0x32830, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_ENABLE_100G", 0x32834, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_0", 0x32838, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_1", 0x3283c, 0 }, + { "tx_stop", 25, 1 }, + { "mode1s_ena", 24, 1 }, + { "tx_ts_id", 12, 12 }, + { "tx_li_fault", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "lpi_txhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_2", 0x32840, 0 }, + { "MAC_PORT_MAC10G100G_STATUS", 0x32844, 0 }, + { "reg_lowp", 21, 1 }, + { "li_fault", 20, 1 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "mac_pause_en", 4, 1 }, + { "mac_enable", 3, 1 }, + { "loop_ena", 2, 1 }, + { "loc_fault", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_PORT_MAC_AN_STATE_STATUS0", 0x32848, 0 }, + { "an_val_an", 15, 1 }, + { "an_tr_dis_status_an", 14, 1 }, + { "an_status_an", 13, 1 }, + { "an_select_an", 8, 5 }, + { "an_rs_fec_ena_an", 7, 1 }, + { "an_int_an", 6, 1 }, + { "an_fec_ena_an", 5, 1 }, + { "an_done_an", 4, 1 }, + { "an_state", 0, 4 }, + { "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3284c, 0 }, + { "MAC_PORT_EPIO_DATA0", 0x32850, 0 }, + { "MAC_PORT_EPIO_DATA1", 0x32854, 0 }, + { "MAC_PORT_EPIO_DATA2", 0x32858, 0 }, + { "MAC_PORT_EPIO_DATA3", 0x3285c, 0 }, + { "MAC_PORT_EPIO_OP", 0x32860, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "MAC_PORT_WOL_STATUS", 0x32864, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "MAC_PORT_INT_EN", 0x32868, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_INT_CAUSE", 0x3286c, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_PERR_INT_EN", 0x32870, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INT_CAUSE", 0x32874, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_ENABLE", 0x32878, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INJECT", 0x3287c, 0 }, + { "MemSel", 1, 8 }, + { "InjectDataErr", 0, 1 }, + { "MAC_PORT_RUNT_FRAME", 0x32880, 0 }, + { "runtclear", 16, 1 }, + { "runt", 0, 16 }, + { "MAC_PORT_EEE_STATUS", 0x32884, 0 }, + { "eee_tx_10g_state", 10, 2 }, + { "eee_rx_10g_state", 8, 2 }, + { "pma_rx_refresh", 3, 1 }, + { "pma_rx_quiet", 2, 1 }, + { "pma_tx_refresh", 1, 1 }, + { "pma_tx_quiet", 0, 1 }, + { "MAC_PORT_TX_TS_ID", 0x32888, 0 }, + { "ts_id_MSB", 3, 1 }, + { "ts_id", 0, 3 }, + { "MAC_PORT_TX_TS_VAL_LO", 0x3288c, 0 }, + { "MAC_PORT_TX_TS_VAL_HI", 0x32890, 0 }, + { "MAC_PORT_EEE_CTL", 0x32894, 0 }, + { "EEE_CTRL", 2, 30 }, + { "TICK_START", 1, 1 }, + { "En", 0, 1 }, + { "MAC_PORT_EEE_TX_CTL", 0x32898, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_ACTIVE", 3, 1 }, + { "LPI_TXHOLD", 2, 1 }, + { "LPI_REQ", 1, 1 }, + { "EEE_TX_RESET", 0, 1 }, + { "MAC_PORT_EEE_RX_CTL", 0x3289c, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_IND", 1, 1 }, + { "EEE_RX_RESET", 0, 1 }, + { "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x328a0, 0 }, + { "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x328a4, 0 }, + { "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x328a8, 0 }, + { "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x328b8, 0 }, + { "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x328bc, 0 }, + { "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x328c0, 0 }, + { "MAC_PORT_EEE_WF_COUNT", 0x328cc, 0 }, + { "wake_cnt_clr", 16, 1 }, + { "wake_cnt", 0, 16 }, + { "MAC_PORT_WOL_EN", 0x328d0, 0 }, + { "WOL_enable", 1, 1 }, + { "WOL_indicator", 0, 1 }, + { "MAC_PORT_INT_TRACE", 0x328d4, 0 }, + { "MAC_PORT_TRACE_TS_LO", 0x328d8, 0 }, + { "MAC_PORT_TRACE_TS_HI", 0x328dc, 0 }, + { "MAC_PORT_MTIP_10G100G_REVISION", 0x32900, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_PORT_MTIP_10G100G_SCRATCH", 0x32904, 0 }, + { "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x32908, 0 }, + { "NO_PREAM", 31, 1 }, + { "SHORT_PREAM", 30, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "REG_LOWP_RXEMPTY", 24, 1 }, + { "TX_LOWP_ENA", 23, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "FORCE_SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "CNTL_FRM_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOP_ENA", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENAMAC", 1, 1 }, + { "TX_ENAMAC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3290c, 0 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x32910, 0 }, + { "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x32914, 0 }, + { "SET_LEN", 16, 16 }, + { "FRM_LEN_SET", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3291c, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x32920, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x32924, 0 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x32928, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x32930, 0 }, + { "Clk_divisor", 7, 9 }, + { "ENA_CLAUSE", 6, 1 }, + { "PREAMBLE_DISABLE", 5, 1 }, + { "Hold_time_setting", 2, 3 }, + { "MDIO_read_error", 1, 1 }, + { "MDIO_Busy", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x32934, 0 }, + { "READ_MODE", 15, 1 }, + { "POST_INCR_READ", 14, 1 }, + { "Port_PHY_Addr", 5, 5 }, + { "Device_Reg_Addr", 0, 5 }, + { "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x32938, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3293c, 0 }, + { "MAC_PORT_MTIP_10G100G_STATUS", 0x32940, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_LINT_FAULT", 7, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "RX_LOWP", 4, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x32944, 0 }, + { "IPG_COMP_CNT", 16, 16 }, + { "AVG_IPG_LEN", 2, 4 }, + { "DSBL_DIC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x32948, 0 }, + { "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x32954, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x32958, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3295c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x32960, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x32964, 0 }, + { "CL1_QUANTA_THRESH", 16, 16 }, + { "CL0_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x32968, 0 }, + { "CL3_QUANTA_THRESH", 16, 16 }, + { "CL2_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3296c, 0 }, + { "CL5_QUANTA_THRESH", 16, 16 }, + { "CL4_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x32970, 0 }, + { "CL7_QUANTA_THRESH", 16, 16 }, + { "CL6_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x32974, 0 }, + { "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3297c, 0 }, + { "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x32980, 0 }, + { "RX_CNT_MODE", 16, 1 }, + { "TS_UPD64_MODE", 12, 1 }, + { "TS_BINARY_MODE", 11, 1 }, + { "TS_DELAY_MODE", 10, 1 }, + { "TS_DELTA_MODE", 9, 1 }, + { "TX_MAC_RS_ERR", 8, 1 }, + { "RX_PAUSE_BYPASS", 6, 1 }, + { "ONE_STEP_ENA", 5, 1 }, + { "PAUSETIMERX8", 4, 1 }, + { "XGMII_ENA", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x32a00, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x32a04, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x32a08, 0 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x32a0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x32a10, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x32a14, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x32a18, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x32a1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x32a20, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x32a38, 0 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x32a3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x32a50, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x32a58, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x32a80, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x32a84, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x32a88, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x32a8c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x32a90, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x32a94, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x32a98, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x32a9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x32aa0, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x32aa4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x32aa8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x32aac, 0 }, + { "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x32ab0, 0 }, + { "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x32ab4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x32ac8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x32acc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x32ad0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x32ad4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x32ad8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x32adc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x32ae0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x32ae4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x32ae8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x32aec, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x32af0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x32af4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x32af8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x32afc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x32b00, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x32b04, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x32b08, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x32b0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x32b10, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x32b14, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x32b18, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x32b1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x32b20, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x32b24, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x32b28, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x32b2c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x32b30, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x32b34, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x32b38, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x32b3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x32b40, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x32b44, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x32b48, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x32b4c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x32b50, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x32b54, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x32b58, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x32b5c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x32b60, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x32b64, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x32b68, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x32b6c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x32b70, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x32b74, 0 }, + { "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x32b78, 0 }, + { "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x32b7c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x32b80, 0 }, + { "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x32b84, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_0_VL0_0", 0x32b98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL0_1", 0x32b9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL1_0", 0x32ba0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL1_1", 0x32ba4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL2_0", 0x32ba8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL2_1", 0x32bac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL3_0", 0x32bb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL3_1", 0x32bb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x32bb8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_VL4_0", 0x32c98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL4_1", 0x32c9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL5_0", 0x32ca0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL5_1", 0x32ca4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL6_0", 0x32ca8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL6_1", 0x32cac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL7_0", 0x32cb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL7_1", 0x32cb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL8_0", 0x32cb8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL8_1", 0x32cbc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL9_0", 0x32cc0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL9_1", 0x32cc4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL10_0", 0x32cc8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL10_1", 0x32ccc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL11_0", 0x32cd0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL11_1", 0x32cd4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL12_0", 0x32cd8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL12_1", 0x32cdc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL13_0", 0x32ce0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL13_1", 0x32ce4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL14_0", 0x32ce8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL14_1", 0x32cec, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL15_0", 0x32cf0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL15_1", 0x32cf4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL16_0", 0x32cf8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL16_1", 0x32cfc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL17_0", 0x32d00, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL17_1", 0x32d04, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL18_0", 0x32d08, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL18_1", 0x32d0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL19_0", 0x32d10, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL19_1", 0x32d14, 0 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x33000, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x33004, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x33008, 0 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3300c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x33010, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x33014, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x33018, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3301c, 0 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x33020, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x33038, 0 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3303c, 0 }, + { "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x33050, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x33058, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x33080, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x33084, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x33088, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3308c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x33090, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x33094, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x33098, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3309c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x330a0, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x330a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x330a8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x330ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x330b0, 0 }, + { "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x330b4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x330c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x330cc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x330d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x330d4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x330d8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x330dc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x330e0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x330e4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x330e8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x330ec, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x330f0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x330f4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x330f8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x330fc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x33100, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x33104, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x33108, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3310c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x33110, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x33114, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x33118, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3311c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x33120, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x33124, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x33128, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3312c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x33130, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x33134, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x33138, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3313c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x33140, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x33144, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x33148, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3314c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x33150, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x33154, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x33158, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3315c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x33160, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x33164, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x33168, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3316c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x33170, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x33174, 0 }, + { "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x33178, 0 }, + { "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3317c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x33180, 0 }, + { "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x33184, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_1_VL0_0", 0x33198, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3319c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL1_0", 0x331a0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL1_1", 0x331a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL2_0", 0x331a8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL2_1", 0x331ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL3_0", 0x331b0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL3_1", 0x331b4, 0 }, + { "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x331b8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_CFG", 0x34800, 0 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "port_map", 21, 3 }, + { "Smux_Rx_Loop", 17, 4 }, + { "Signal_Det", 15, 1 }, + { "cfg_mac_2_mps_full", 13, 1 }, + { "mps_full_sel", 12, 1 }, + { "SmuxTxSel", 8, 4 }, + { "PortSpeed", 4, 4 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "debug_tx_rx_sel", 1, 1 }, + { "MAC_PORT_RESET_CTRL", 0x34804, 0 }, + { "EEE_RESET", 30, 1 }, + { "PTP_TIMER", 29, 1 }, + { "MtipRefReset", 28, 1 }, + { "MtipRegReset", 25, 1 }, + { "reset_reg_clk_i", 24, 1 }, + { "TXIF_Reset", 12, 1 }, + { "RXIF_Reset", 11, 1 }, + { "AuxExt_Reset", 10, 1 }, + { "WOL_Reset", 2, 1 }, + { "MAC_PORT_LED_CFG", 0x34808, 0 }, + { "Led1_Cfg1", 15, 3 }, + { "Led0_Cfg1", 12, 3 }, + { "Led1_tlo", 11, 1 }, + { "Led1_thi", 10, 1 }, + { "Led0_tlo", 9, 1 }, + { "Led0_thi", 8, 1 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "MAC_PORT_LED_COUNTHI", 0x3480c, 0 }, + { "MAC_PORT_LED_COUNTLO", 0x34810, 0 }, + { "MAC_PORT_CFG3", 0x34814, 0 }, + { "FCSDisCtrl", 25, 1 }, + { "SigDetCtrl", 24, 1 }, + { "se_clr", 21, 1 }, + { "MAC_PORT_CFG2", 0x34818, 0 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "MAC_PORT_PKT_COUNT", 0x3481c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "MAC_PORT_MAGIC_MACID_LO", 0x34820, 0 }, + { "MAC_PORT_MAGIC_MACID_HI", 0x34824, 0 }, + { "MAC_PORT_LINK_STATUS", 0x34828, 0 }, + { "egr_se_cnt_Err", 9, 1 }, + { "ingr_se_cnt_Err", 8, 1 }, + { "hi_ber", 7, 1 }, + { "an_done", 6, 1 }, + { "align_done", 5, 1 }, + { "block_lock", 4, 1 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "MAC_PORT_PERR_INT_EN_100G", 0x3482c, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_INT_CAUSE_100G", 0x34830, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_ENABLE_100G", 0x34834, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_0", 0x34838, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_1", 0x3483c, 0 }, + { "tx_stop", 25, 1 }, + { "mode1s_ena", 24, 1 }, + { "tx_ts_id", 12, 12 }, + { "tx_li_fault", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "lpi_txhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_2", 0x34840, 0 }, + { "MAC_PORT_MAC10G100G_STATUS", 0x34844, 0 }, + { "reg_lowp", 21, 1 }, + { "li_fault", 20, 1 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "mac_pause_en", 4, 1 }, + { "mac_enable", 3, 1 }, + { "loop_ena", 2, 1 }, + { "loc_fault", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_PORT_MAC_AN_STATE_STATUS0", 0x34848, 0 }, + { "an_val_an", 15, 1 }, + { "an_tr_dis_status_an", 14, 1 }, + { "an_status_an", 13, 1 }, + { "an_select_an", 8, 5 }, + { "an_rs_fec_ena_an", 7, 1 }, + { "an_int_an", 6, 1 }, + { "an_fec_ena_an", 5, 1 }, + { "an_done_an", 4, 1 }, + { "an_state", 0, 4 }, + { "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3484c, 0 }, + { "MAC_PORT_EPIO_DATA0", 0x34850, 0 }, + { "MAC_PORT_EPIO_DATA1", 0x34854, 0 }, + { "MAC_PORT_EPIO_DATA2", 0x34858, 0 }, + { "MAC_PORT_EPIO_DATA3", 0x3485c, 0 }, + { "MAC_PORT_EPIO_OP", 0x34860, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "MAC_PORT_WOL_STATUS", 0x34864, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "MAC_PORT_INT_EN", 0x34868, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_INT_CAUSE", 0x3486c, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_PERR_INT_EN", 0x34870, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INT_CAUSE", 0x34874, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_ENABLE", 0x34878, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INJECT", 0x3487c, 0 }, + { "MemSel", 1, 8 }, + { "InjectDataErr", 0, 1 }, + { "MAC_PORT_RUNT_FRAME", 0x34880, 0 }, + { "runtclear", 16, 1 }, + { "runt", 0, 16 }, + { "MAC_PORT_EEE_STATUS", 0x34884, 0 }, + { "eee_tx_10g_state", 10, 2 }, + { "eee_rx_10g_state", 8, 2 }, + { "pma_rx_refresh", 3, 1 }, + { "pma_rx_quiet", 2, 1 }, + { "pma_tx_refresh", 1, 1 }, + { "pma_tx_quiet", 0, 1 }, + { "MAC_PORT_TX_TS_ID", 0x34888, 0 }, + { "ts_id_MSB", 3, 1 }, + { "ts_id", 0, 3 }, + { "MAC_PORT_TX_TS_VAL_LO", 0x3488c, 0 }, + { "MAC_PORT_TX_TS_VAL_HI", 0x34890, 0 }, + { "MAC_PORT_EEE_CTL", 0x34894, 0 }, + { "EEE_CTRL", 2, 30 }, + { "TICK_START", 1, 1 }, + { "En", 0, 1 }, + { "MAC_PORT_EEE_TX_CTL", 0x34898, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_ACTIVE", 3, 1 }, + { "LPI_TXHOLD", 2, 1 }, + { "LPI_REQ", 1, 1 }, + { "EEE_TX_RESET", 0, 1 }, + { "MAC_PORT_EEE_RX_CTL", 0x3489c, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_IND", 1, 1 }, + { "EEE_RX_RESET", 0, 1 }, + { "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x348a0, 0 }, + { "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x348a4, 0 }, + { "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x348a8, 0 }, + { "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x348b8, 0 }, + { "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x348bc, 0 }, + { "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x348c0, 0 }, + { "MAC_PORT_EEE_WF_COUNT", 0x348cc, 0 }, + { "wake_cnt_clr", 16, 1 }, + { "wake_cnt", 0, 16 }, + { "MAC_PORT_WOL_EN", 0x348d0, 0 }, + { "WOL_enable", 1, 1 }, + { "WOL_indicator", 0, 1 }, + { "MAC_PORT_INT_TRACE", 0x348d4, 0 }, + { "MAC_PORT_TRACE_TS_LO", 0x348d8, 0 }, + { "MAC_PORT_TRACE_TS_HI", 0x348dc, 0 }, + { "MAC_PORT_MTIP_10G100G_REVISION", 0x34900, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_PORT_MTIP_10G100G_SCRATCH", 0x34904, 0 }, + { "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x34908, 0 }, + { "NO_PREAM", 31, 1 }, + { "SHORT_PREAM", 30, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "REG_LOWP_RXEMPTY", 24, 1 }, + { "TX_LOWP_ENA", 23, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "FORCE_SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "CNTL_FRM_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOP_ENA", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENAMAC", 1, 1 }, + { "TX_ENAMAC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3490c, 0 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x34910, 0 }, + { "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x34914, 0 }, + { "SET_LEN", 16, 16 }, + { "FRM_LEN_SET", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3491c, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x34920, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x34924, 0 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x34928, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x34930, 0 }, + { "Clk_divisor", 7, 9 }, + { "ENA_CLAUSE", 6, 1 }, + { "PREAMBLE_DISABLE", 5, 1 }, + { "Hold_time_setting", 2, 3 }, + { "MDIO_read_error", 1, 1 }, + { "MDIO_Busy", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x34934, 0 }, + { "READ_MODE", 15, 1 }, + { "POST_INCR_READ", 14, 1 }, + { "Port_PHY_Addr", 5, 5 }, + { "Device_Reg_Addr", 0, 5 }, + { "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x34938, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3493c, 0 }, + { "MAC_PORT_MTIP_10G100G_STATUS", 0x34940, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_LINT_FAULT", 7, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "RX_LOWP", 4, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x34944, 0 }, + { "IPG_COMP_CNT", 16, 16 }, + { "AVG_IPG_LEN", 2, 4 }, + { "DSBL_DIC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x34948, 0 }, + { "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x34954, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x34958, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3495c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x34960, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x34964, 0 }, + { "CL1_QUANTA_THRESH", 16, 16 }, + { "CL0_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x34968, 0 }, + { "CL3_QUANTA_THRESH", 16, 16 }, + { "CL2_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3496c, 0 }, + { "CL5_QUANTA_THRESH", 16, 16 }, + { "CL4_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x34970, 0 }, + { "CL7_QUANTA_THRESH", 16, 16 }, + { "CL6_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x34974, 0 }, + { "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3497c, 0 }, + { "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x34980, 0 }, + { "RX_CNT_MODE", 16, 1 }, + { "TS_UPD64_MODE", 12, 1 }, + { "TS_BINARY_MODE", 11, 1 }, + { "TS_DELAY_MODE", 10, 1 }, + { "TS_DELTA_MODE", 9, 1 }, + { "TX_MAC_RS_ERR", 8, 1 }, + { "RX_PAUSE_BYPASS", 6, 1 }, + { "ONE_STEP_ENA", 5, 1 }, + { "PAUSETIMERX8", 4, 1 }, + { "XGMII_ENA", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x34a00, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x34a04, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x34a08, 0 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x34a0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x34a10, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x34a14, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x34a18, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x34a1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x34a20, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x34a38, 0 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x34a3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x34a50, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x34a58, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x34a80, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x34a84, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x34a88, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x34a8c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x34a90, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x34a94, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x34a98, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x34a9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x34aa0, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x34aa4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x34aa8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x34aac, 0 }, + { "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x34ab0, 0 }, + { "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x34ab4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x34ac8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x34acc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x34ad0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x34ad4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x34ad8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x34adc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x34ae0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x34ae4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x34ae8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x34aec, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x34af0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x34af4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x34af8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x34afc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x34b00, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x34b04, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x34b08, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x34b0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x34b10, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x34b14, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x34b18, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x34b1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x34b20, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x34b24, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x34b28, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x34b2c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x34b30, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x34b34, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x34b38, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x34b3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x34b40, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x34b44, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x34b48, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x34b4c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x34b50, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x34b54, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x34b58, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x34b5c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x34b60, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x34b64, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x34b68, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x34b6c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x34b70, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x34b74, 0 }, + { "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x34b78, 0 }, + { "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x34b7c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x34b80, 0 }, + { "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x34b84, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_0_VL0_0", 0x34b98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL0_1", 0x34b9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL1_0", 0x34ba0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL1_1", 0x34ba4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL2_0", 0x34ba8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL2_1", 0x34bac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL3_0", 0x34bb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL3_1", 0x34bb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x34bb8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_VL4_0", 0x34c98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL4_1", 0x34c9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL5_0", 0x34ca0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL5_1", 0x34ca4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL6_0", 0x34ca8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL6_1", 0x34cac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL7_0", 0x34cb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL7_1", 0x34cb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL8_0", 0x34cb8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL8_1", 0x34cbc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL9_0", 0x34cc0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL9_1", 0x34cc4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL10_0", 0x34cc8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL10_1", 0x34ccc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL11_0", 0x34cd0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL11_1", 0x34cd4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL12_0", 0x34cd8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL12_1", 0x34cdc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL13_0", 0x34ce0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL13_1", 0x34ce4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL14_0", 0x34ce8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL14_1", 0x34cec, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL15_0", 0x34cf0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL15_1", 0x34cf4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL16_0", 0x34cf8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL16_1", 0x34cfc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL17_0", 0x34d00, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL17_1", 0x34d04, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL18_0", 0x34d08, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL18_1", 0x34d0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL19_0", 0x34d10, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL19_1", 0x34d14, 0 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x35000, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x35004, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x35008, 0 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3500c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x35010, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x35014, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x35018, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3501c, 0 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x35020, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x35038, 0 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3503c, 0 }, + { "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x35050, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x35058, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x35080, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x35084, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x35088, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3508c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x35090, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x35094, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x35098, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3509c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x350a0, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x350a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x350a8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x350ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x350b0, 0 }, + { "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x350b4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x350c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x350cc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x350d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x350d4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x350d8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x350dc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x350e0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x350e4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x350e8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x350ec, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x350f0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x350f4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x350f8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x350fc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x35100, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x35104, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x35108, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3510c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x35110, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x35114, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x35118, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3511c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x35120, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x35124, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x35128, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3512c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x35130, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x35134, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x35138, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3513c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x35140, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x35144, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x35148, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3514c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x35150, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x35154, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x35158, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3515c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x35160, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x35164, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x35168, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3516c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x35170, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x35174, 0 }, + { "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x35178, 0 }, + { "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3517c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x35180, 0 }, + { "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x35184, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_1_VL0_0", 0x35198, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3519c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL1_0", 0x351a0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL1_1", 0x351a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL2_0", 0x351a8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL2_1", 0x351ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL3_0", 0x351b0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL3_1", 0x351b4, 0 }, + { "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x351b8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_CFG", 0x36800, 0 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "port_map", 21, 3 }, + { "Smux_Rx_Loop", 17, 4 }, + { "Signal_Det", 15, 1 }, + { "cfg_mac_2_mps_full", 13, 1 }, + { "mps_full_sel", 12, 1 }, + { "SmuxTxSel", 8, 4 }, + { "PortSpeed", 4, 4 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "debug_tx_rx_sel", 1, 1 }, + { "MAC_PORT_RESET_CTRL", 0x36804, 0 }, + { "EEE_RESET", 30, 1 }, + { "PTP_TIMER", 29, 1 }, + { "MtipRefReset", 28, 1 }, + { "MtipRegReset", 25, 1 }, + { "reset_reg_clk_i", 24, 1 }, + { "TXIF_Reset", 12, 1 }, + { "RXIF_Reset", 11, 1 }, + { "AuxExt_Reset", 10, 1 }, + { "WOL_Reset", 2, 1 }, + { "MAC_PORT_LED_CFG", 0x36808, 0 }, + { "Led1_Cfg1", 15, 3 }, + { "Led0_Cfg1", 12, 3 }, + { "Led1_tlo", 11, 1 }, + { "Led1_thi", 10, 1 }, + { "Led0_tlo", 9, 1 }, + { "Led0_thi", 8, 1 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "MAC_PORT_LED_COUNTHI", 0x3680c, 0 }, + { "MAC_PORT_LED_COUNTLO", 0x36810, 0 }, + { "MAC_PORT_CFG3", 0x36814, 0 }, + { "FCSDisCtrl", 25, 1 }, + { "SigDetCtrl", 24, 1 }, + { "se_clr", 21, 1 }, + { "MAC_PORT_CFG2", 0x36818, 0 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "MAC_PORT_PKT_COUNT", 0x3681c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "MAC_PORT_MAGIC_MACID_LO", 0x36820, 0 }, + { "MAC_PORT_MAGIC_MACID_HI", 0x36824, 0 }, + { "MAC_PORT_LINK_STATUS", 0x36828, 0 }, + { "egr_se_cnt_Err", 9, 1 }, + { "ingr_se_cnt_Err", 8, 1 }, + { "hi_ber", 7, 1 }, + { "an_done", 6, 1 }, + { "align_done", 5, 1 }, + { "block_lock", 4, 1 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "MAC_PORT_PERR_INT_EN_100G", 0x3682c, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_INT_CAUSE_100G", 0x36830, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_PERR_ENABLE_100G", 0x36834, 0 }, + { "Perr_pcsr_fdm_3", 21, 1 }, + { "Perr_pcsr_fdm_2", 20, 1 }, + { "Perr_pcsr_fdm_1", 19, 1 }, + { "Perr_pcsr_fdm_0", 18, 1 }, + { "Perr_pcsr_fm_3", 17, 1 }, + { "Perr_pcsr_fm_2", 16, 1 }, + { "Perr_pcsr_fm_1", 15, 1 }, + { "Perr_pcsr_fm_0", 14, 1 }, + { "Perr_pcsr_dm_1", 13, 1 }, + { "Perr_pcsr_dm_0", 12, 1 }, + { "Perr_pcsr_dk_3", 11, 1 }, + { "Perr_pcsr_dk_2", 10, 1 }, + { "Perr_pcsr_dk_1", 9, 1 }, + { "Perr_pcsr_dk_0", 8, 1 }, + { "Perr_f91ro_1", 7, 1 }, + { "Perr_f91ro_0", 6, 1 }, + { "Perr_pcsr_f91dm", 5, 1 }, + { "Perr_pcsr_f91ti", 4, 1 }, + { "Perr_pcsr_f91to", 3, 1 }, + { "Perr_pcsr_f91m", 2, 1 }, + { "Perr_pcsr_80_16_1", 1, 1 }, + { "Perr_pcsr_80_16_0", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_0", 0x36838, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_1", 0x3683c, 0 }, + { "tx_stop", 25, 1 }, + { "mode1s_ena", 24, 1 }, + { "tx_ts_id", 12, 12 }, + { "tx_li_fault", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "lpi_txhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_PORT_MAC10G100G_CONFIG_2", 0x36840, 0 }, + { "MAC_PORT_MAC10G100G_STATUS", 0x36844, 0 }, + { "reg_lowp", 21, 1 }, + { "li_fault", 20, 1 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "mac_pause_en", 4, 1 }, + { "mac_enable", 3, 1 }, + { "loop_ena", 2, 1 }, + { "loc_fault", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_PORT_MAC_AN_STATE_STATUS0", 0x36848, 0 }, + { "an_val_an", 15, 1 }, + { "an_tr_dis_status_an", 14, 1 }, + { "an_status_an", 13, 1 }, + { "an_select_an", 8, 5 }, + { "an_rs_fec_ena_an", 7, 1 }, + { "an_int_an", 6, 1 }, + { "an_fec_ena_an", 5, 1 }, + { "an_done_an", 4, 1 }, + { "an_state", 0, 4 }, + { "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3684c, 0 }, + { "MAC_PORT_EPIO_DATA0", 0x36850, 0 }, + { "MAC_PORT_EPIO_DATA1", 0x36854, 0 }, + { "MAC_PORT_EPIO_DATA2", 0x36858, 0 }, + { "MAC_PORT_EPIO_DATA3", 0x3685c, 0 }, + { "MAC_PORT_EPIO_OP", 0x36860, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "MAC_PORT_WOL_STATUS", 0x36864, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "MAC_PORT_INT_EN", 0x36868, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_INT_CAUSE", 0x3686c, 0 }, + { "mps2mac_perr", 31, 1 }, + { "pps", 30, 1 }, + { "tx_ts_avail", 29, 1 }, + { "single_alarm", 28, 1 }, + { "periodic_alarm", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "AutoNeg_Done", 3, 1 }, + { "an_page_rcvd", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "MAC_PORT_PERR_INT_EN", 0x36870, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INT_CAUSE", 0x36874, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_ENABLE", 0x36878, 0 }, + { "Perr_pkt_ram", 31, 1 }, + { "Perr_mask_ram", 30, 1 }, + { "Perr_crc_ram", 29, 1 }, + { "MAC_PORT_PERR_INJECT", 0x3687c, 0 }, + { "MemSel", 1, 8 }, + { "InjectDataErr", 0, 1 }, + { "MAC_PORT_RUNT_FRAME", 0x36880, 0 }, + { "runtclear", 16, 1 }, + { "runt", 0, 16 }, + { "MAC_PORT_EEE_STATUS", 0x36884, 0 }, + { "eee_tx_10g_state", 10, 2 }, + { "eee_rx_10g_state", 8, 2 }, + { "pma_rx_refresh", 3, 1 }, + { "pma_rx_quiet", 2, 1 }, + { "pma_tx_refresh", 1, 1 }, + { "pma_tx_quiet", 0, 1 }, + { "MAC_PORT_TX_TS_ID", 0x36888, 0 }, + { "ts_id_MSB", 3, 1 }, + { "ts_id", 0, 3 }, + { "MAC_PORT_TX_TS_VAL_LO", 0x3688c, 0 }, + { "MAC_PORT_TX_TS_VAL_HI", 0x36890, 0 }, + { "MAC_PORT_EEE_CTL", 0x36894, 0 }, + { "EEE_CTRL", 2, 30 }, + { "TICK_START", 1, 1 }, + { "En", 0, 1 }, + { "MAC_PORT_EEE_TX_CTL", 0x36898, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_ACTIVE", 3, 1 }, + { "LPI_TXHOLD", 2, 1 }, + { "LPI_REQ", 1, 1 }, + { "EEE_TX_RESET", 0, 1 }, + { "MAC_PORT_EEE_RX_CTL", 0x3689c, 0 }, + { "WAKE_TIMER", 16, 16 }, + { "HSS_TIMER", 5, 4 }, + { "HSS_CTL", 4, 1 }, + { "LPI_IND", 1, 1 }, + { "EEE_RX_RESET", 0, 1 }, + { "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x368a0, 0 }, + { "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x368a4, 0 }, + { "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x368a8, 0 }, + { "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x368b8, 0 }, + { "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x368bc, 0 }, + { "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x368c0, 0 }, + { "MAC_PORT_EEE_WF_COUNT", 0x368cc, 0 }, + { "wake_cnt_clr", 16, 1 }, + { "wake_cnt", 0, 16 }, + { "MAC_PORT_WOL_EN", 0x368d0, 0 }, + { "WOL_enable", 1, 1 }, + { "WOL_indicator", 0, 1 }, + { "MAC_PORT_INT_TRACE", 0x368d4, 0 }, + { "MAC_PORT_TRACE_TS_LO", 0x368d8, 0 }, + { "MAC_PORT_TRACE_TS_HI", 0x368dc, 0 }, + { "MAC_PORT_MTIP_10G100G_REVISION", 0x36900, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_PORT_MTIP_10G100G_SCRATCH", 0x36904, 0 }, + { "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x36908, 0 }, + { "NO_PREAM", 31, 1 }, + { "SHORT_PREAM", 30, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "REG_LOWP_RXEMPTY", 24, 1 }, + { "TX_LOWP_ENA", 23, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "FORCE_SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "CNTL_FRM_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOP_ENA", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENAMAC", 1, 1 }, + { "TX_ENAMAC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3690c, 0 }, + { "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x36910, 0 }, + { "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x36914, 0 }, + { "SET_LEN", 16, 16 }, + { "FRM_LEN_SET", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3691c, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x36920, 0 }, + { "EMPTY", 16, 16 }, + { "AVAIL", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x36924, 0 }, + { "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x36928, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x36930, 0 }, + { "Clk_divisor", 7, 9 }, + { "ENA_CLAUSE", 6, 1 }, + { "PREAMBLE_DISABLE", 5, 1 }, + { "Hold_time_setting", 2, 3 }, + { "MDIO_read_error", 1, 1 }, + { "MDIO_Busy", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x36934, 0 }, + { "READ_MODE", 15, 1 }, + { "POST_INCR_READ", 14, 1 }, + { "Port_PHY_Addr", 5, 5 }, + { "Device_Reg_Addr", 0, 5 }, + { "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x36938, 0 }, + { "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3693c, 0 }, + { "MAC_PORT_MTIP_10G100G_STATUS", 0x36940, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_LINT_FAULT", 7, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "RX_LOWP", 4, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x36944, 0 }, + { "IPG_COMP_CNT", 16, 16 }, + { "AVG_IPG_LEN", 2, 4 }, + { "DSBL_DIC", 0, 1 }, + { "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x36948, 0 }, + { "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x36954, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x36958, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3695c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x36960, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x36964, 0 }, + { "CL1_QUANTA_THRESH", 16, 16 }, + { "CL0_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x36968, 0 }, + { "CL3_QUANTA_THRESH", 16, 16 }, + { "CL2_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3696c, 0 }, + { "CL5_QUANTA_THRESH", 16, 16 }, + { "CL4_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x36970, 0 }, + { "CL7_QUANTA_THRESH", 16, 16 }, + { "CL6_QUANTA_THRESH", 0, 16 }, + { "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x36974, 0 }, + { "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3697c, 0 }, + { "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x36980, 0 }, + { "RX_CNT_MODE", 16, 1 }, + { "TS_UPD64_MODE", 12, 1 }, + { "TS_BINARY_MODE", 11, 1 }, + { "TS_DELAY_MODE", 10, 1 }, + { "TS_DELTA_MODE", 9, 1 }, + { "TX_MAC_RS_ERR", 8, 1 }, + { "RX_PAUSE_BYPASS", 6, 1 }, + { "ONE_STEP_ENA", 5, 1 }, + { "PAUSETIMERX8", 4, 1 }, + { "XGMII_ENA", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x36a00, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x36a04, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x36a08, 0 }, + { "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x36a0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x36a10, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x36a14, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x36a18, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x36a1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x36a20, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x36a38, 0 }, + { "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x36a3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x36a50, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x36a58, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x36a80, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x36a84, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x36a88, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x36a8c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x36a90, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x36a94, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x36a98, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x36a9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x36aa0, 0 }, + { "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x36aa4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x36aa8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x36aac, 0 }, + { "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x36ab0, 0 }, + { "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x36ab4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x36ac8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x36acc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x36ad0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x36ad4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x36ad8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x36adc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x36ae0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x36ae4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x36ae8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x36aec, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x36af0, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x36af4, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x36af8, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x36afc, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x36b00, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x36b04, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x36b08, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x36b0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x36b10, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x36b14, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x36b18, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x36b1c, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x36b20, 0 }, + { "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x36b24, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x36b28, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x36b2c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x36b30, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x36b34, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x36b38, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x36b3c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x36b40, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x36b44, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x36b48, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x36b4c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x36b50, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x36b54, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x36b58, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x36b5c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x36b60, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x36b64, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x36b68, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x36b6c, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x36b70, 0 }, + { "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x36b74, 0 }, + { "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x36b78, 0 }, + { "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x36b7c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x36b80, 0 }, + { "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x36b84, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_0_VL0_0", 0x36b98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL0_1", 0x36b9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL1_0", 0x36ba0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL1_1", 0x36ba4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL2_0", 0x36ba8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL2_1", 0x36bac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL3_0", 0x36bb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL3_1", 0x36bb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x36bb8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_PORT_MTIP_CR4_0_VL4_0", 0x36c98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL4_1", 0x36c9c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL5_0", 0x36ca0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL5_1", 0x36ca4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL6_0", 0x36ca8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL6_1", 0x36cac, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL7_0", 0x36cb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL7_1", 0x36cb4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL8_0", 0x36cb8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL8_1", 0x36cbc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL9_0", 0x36cc0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL9_1", 0x36cc4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL10_0", 0x36cc8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL10_1", 0x36ccc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL11_0", 0x36cd0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL11_1", 0x36cd4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL12_0", 0x36cd8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL12_1", 0x36cdc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL13_0", 0x36ce0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL13_1", 0x36ce4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL14_0", 0x36ce8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL14_1", 0x36cec, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL15_0", 0x36cf0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL15_1", 0x36cf4, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL16_0", 0x36cf8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL16_1", 0x36cfc, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL17_0", 0x36d00, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL17_1", 0x36d04, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL18_0", 0x36d08, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL18_1", 0x36d0c, 0 }, + { "MAC_PORT_MTIP_CR4_0_VL19_0", 0x36d10, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_0_VL19_1", 0x36d14, 0 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x37000, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_selection", 13, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection1", 6, 1 }, + { "Speed_selection2", 2, 4 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x37004, 0 }, + { "TX_LPI", 11, 1 }, + { "RX_LPI", 10, 1 }, + { "TX_LPI_ACTIVE", 9, 1 }, + { "RX_LPI_ACTIVE", 8, 1 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "Low_power_ability", 1, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x37008, 0 }, + { "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3700c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x37010, 0 }, + { "50G_capable", 5, 1 }, + { "25G_capable", 4, 1 }, + { "100G_capable", 3, 1 }, + { "40G_capable", 2, 1 }, + { "10G_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x37014, 0 }, + { "TC_present", 6, 1 }, + { "DTE_xS_present", 5, 1 }, + { "PHY_xS_present", 4, 1 }, + { "PCS_present", 3, 1 }, + { "WIS_present", 2, 1 }, + { "PMD_PMA_present", 1, 1 }, + { "Clause22reg_present", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x37018, 0 }, + { "VSD_2_PRESENT", 15, 1 }, + { "VSD_1_PRESENT", 14, 1 }, + { "Clause22_ExT_Present", 13, 1 }, + { "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3701c, 0 }, + { "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x37020, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "50GBase_R_capable", 8, 1 }, + { "25GBase_R_capable", 7, 1 }, + { "100GBase_R_capable", 5, 1 }, + { "40GBase_R_capable", 4, 1 }, + { "10GBase_T_capable", 3, 1 }, + { "10GBase_W_capable", 2, 1 }, + { "10GBase_x_capable", 1, 1 }, + { "10GBase_R_capable", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x37038, 0 }, + { "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3703c, 0 }, + { "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x37050, 0 }, + { "50GBase_R_FW", 14, 1 }, + { "100GBase_R_DS", 13, 1 }, + { "100GBase_R_FW", 12, 1 }, + { "25GBase_R_DS", 11, 1 }, + { "25GBase_R_FW", 10, 1 }, + { "40GBase_R_DS", 9, 1 }, + { "40GBase_R_FW", 8, 1 }, + { "10GBase_KE_EEE", 6, 1 }, + { "Fast_wake", 1, 5 }, + { "Deep_Sleep", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x37058, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x37080, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "High_BER", 1, 1 }, + { "Block_Lock", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x37084, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "BER_counter", 8, 6 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x37088, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3708c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x37090, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x37094, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x37098, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3709c, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x370a0, 0 }, + { "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x370a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x370a8, 0 }, + { "Test_pattern_40G", 7, 1 }, + { "TX_Test_Pattern_En", 3, 1 }, + { "RX_Test_Pattern_En", 2, 1 }, + { "Test_Pattern_Select", 1, 1 }, + { "Data_Pattern_Select", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x370ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x370b0, 0 }, + { "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x370b4, 0 }, + { "Hi_ORDER_CNT_Present", 15, 1 }, + { "ERR_BLKS_CNTR", 0, 14 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x370c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "Lane_7_blck_lck", 7, 1 }, + { "Lane_6_blck_lck", 6, 1 }, + { "Lane_5_blck_lck", 5, 1 }, + { "Lane_4_blck_lck", 4, 1 }, + { "Lane_3_blck_lck", 3, 1 }, + { "Lane_2_blck_lck", 2, 1 }, + { "Lane_1_blck_lck", 1, 1 }, + { "Lane_0_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x370cc, 0 }, + { "Lane_19_blck_lck", 11, 1 }, + { "Lane_18_blck_lck", 10, 1 }, + { "Lane_17_blck_lck", 9, 1 }, + { "Lane_16_blck_lck", 8, 1 }, + { "Lane_15_blck_lck", 7, 1 }, + { "Lane_14_blck_lck", 6, 1 }, + { "Lane_13_blck_lck", 5, 1 }, + { "Lane_12_blck_lck", 4, 1 }, + { "Lane_11_blck_lck", 3, 1 }, + { "Lane_10_blck_lck", 2, 1 }, + { "Lane_9_blck_lck", 1, 1 }, + { "Lane_8_blck_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x370d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x370d4, 0 }, + { "Lane19_algn_mrkr_lck", 11, 1 }, + { "Lane18_algn_mrkr_lck", 10, 1 }, + { "Lane17_algn_mrkr_lck", 9, 1 }, + { "Lane16_algn_mrkr_lck", 8, 1 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x370d8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x370dc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x370e0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x370e4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x370e8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x370ec, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x370f0, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x370f4, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x370f8, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x370fc, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x37100, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x37104, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x37108, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3710c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x37110, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x37114, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x37118, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3711c, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x37120, 0 }, + { "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x37124, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x37128, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3712c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x37130, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x37134, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x37138, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3713c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x37140, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x37144, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x37148, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3714c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x37150, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x37154, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x37158, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3715c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x37160, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x37164, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x37168, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3716c, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x37170, 0 }, + { "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x37174, 0 }, + { "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x37178, 0 }, + { "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3717c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x37180, 0 }, + { "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x37184, 0 }, + { "lane6_lane7", 12, 4 }, + { "lane4_lane5", 8, 4 }, + { "lane2_lane3", 4, 4 }, + { "lane0_lane1", 0, 4 }, + { "MAC_PORT_MTIP_CR4_1_VL0_0", 0x37198, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3719c, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL1_0", 0x371a0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL1_1", 0x371a4, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL2_0", 0x371a8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL2_1", 0x371ac, 0 }, + { "MAC_PORT_MTIP_CR4_1_VL3_0", 0x371b0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_PORT_MTIP_CR4_1_VL3_1", 0x371b4, 0 }, + { "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x371b8, 0 }, + { "st_disable_mld", 9, 1 }, + { "st_en_clause49", 8, 1 }, + { "Hi_ber25", 2, 1 }, + { "Disable_mld", 1, 1 }, + { "ena_clause49", 0, 1 }, + { "MAC_COMMON_CFG_0", 0x38000, 0 }, + { "Rx_Polarity_Inv", 24, 8 }, + { "Tx_Polarity_Inv", 16, 8 }, + { "debug_port_sel", 14, 2 }, + { "MAC_septy_ctl", 8, 6 }, + { "debug_tx_rx_sel", 7, 1 }, + { "MAC_rdy_ctl", 0, 6 }, + { "MAC_MTIP_RESET_CTRL_0", 0x38004, 0 }, + { "reset_f91_ref_clk_i", 31, 1 }, + { "reset_pcs000_ref_clk_i", 30, 1 }, + { "reset_ref_clk_i", 29, 1 }, + { "reset_sd_rx_clk_i_0", 28, 1 }, + { "reset_sd_rx_clk_i_1", 27, 1 }, + { "reset_sd_rx_clk_i_2", 26, 1 }, + { "reset_sd_rx_clk_i_3", 25, 1 }, + { "reset_sd_rx_clk_i_4", 24, 1 }, + { "reset_sd_rx_clk_i_5", 23, 1 }, + { "reset_sd_rx_clk_i_6", 22, 1 }, + { "reset_sd_rx_clk_i_7", 21, 1 }, + { "reset_sd_tx_clk_i_0", 20, 1 }, + { "reset_sd_tx_clk_i_1", 19, 1 }, + { "reset_sd_tx_clk_i_2", 18, 1 }, + { "reset_sd_tx_clk_i_3", 17, 1 }, + { "reset_sd_tx_clk_i_4", 16, 1 }, + { "reset_sd_tx_clk_i_5", 15, 1 }, + { "reset_sd_tx_clk_i_6", 14, 1 }, + { "reset_sd_tx_clk_i_7", 13, 1 }, + { "reset_xpcs_ref_clk_i_0", 12, 1 }, + { "reset_xpcs_ref_clk_i_1", 11, 1 }, + { "reset_ff_rx_clk_0_i", 9, 1 }, + { "reset_ff_tx_clk_0_i", 8, 1 }, + { "reset_rxclk_0_i", 7, 1 }, + { "reset_txclk_0_i", 6, 1 }, + { "reset_ff_rx_clk_1_i", 5, 1 }, + { "reset_ff_tx_clk_1_i", 4, 1 }, + { "reset_rxclk_1_i", 3, 1 }, + { "reset_txclk_1_i", 2, 1 }, + { "xgmii_clk_reset_0", 0, 1 }, + { "MAC_MTIP_RESET_CTRL_1", 0x38008, 0 }, + { "reset_ff_rx_clk_2_i", 31, 1 }, + { "reset_ff_tx_clk_2_i", 30, 1 }, + { "reset_rxclk_2_i", 29, 1 }, + { "reset_txclk_2_i", 28, 1 }, + { "reset_ff_rx_clk_3_i", 27, 1 }, + { "reset_ff_tx_clk_3_i", 26, 1 }, + { "reset_rxclk_3_i", 25, 1 }, + { "reset_txclk_3_i", 24, 1 }, + { "reset_ff_rx_clk_4_i", 23, 1 }, + { "reset_ff_tx_clk_4_i", 22, 1 }, + { "reset_rxclk_4_i", 21, 1 }, + { "reset_txclk_4_i", 20, 1 }, + { "reset_ff_rx_clk_5_i", 19, 1 }, + { "reset_ff_tx_clk_5_i", 18, 1 }, + { "reset_rxclk_5_i", 17, 1 }, + { "reset_txclk_5_i", 16, 1 }, + { "reset_sd_rx_clk_an_0_i", 15, 1 }, + { "reset_sd_tx_clk_an_0_i", 14, 1 }, + { "reset_sd_rx_clk_an_1_i", 13, 1 }, + { "reset_sd_tx_clk_an_1_i", 12, 1 }, + { "reset_sd_rx_clk_an_2_i", 11, 1 }, + { "reset_sd_tx_clk_an_2_i", 10, 1 }, + { "reset_sd_rx_clk_an_3_i", 9, 1 }, + { "reset_sd_tx_clk_an_3_i", 8, 1 }, + { "reset_sd_rx_clk_an_4_i", 7, 1 }, + { "reset_sd_tx_clk_an_4_i", 6, 1 }, + { "reset_sd_rx_clk_an_5_i", 5, 1 }, + { "reset_sd_tx_clk_an_5_i", 4, 1 }, + { "reset_sd_rx_clk_an_6_i", 3, 1 }, + { "reset_sd_tx_clk_an_6_i", 2, 1 }, + { "reset_sd_rx_clk_an_7_i", 1, 1 }, + { "reset_sd_tx_clk_an_7_i", 0, 1 }, + { "MAC_MTIP_RESET_CTRL_2", 0x3800c, 0 }, + { "reset_sgmii_txclk_i_3", 31, 1 }, + { "reset_sgmii_rxclk_i_3", 30, 1 }, + { "reset_sgmii_txclk_i_2", 29, 1 }, + { "reset_sgmii_rxclk_i_2", 28, 1 }, + { "reset_sgmii_txclk_i_1", 27, 1 }, + { "reset_sgmii_rxclk_i_1", 26, 1 }, + { "reset_sgmii_txclk_i_0", 25, 1 }, + { "reset_sgmii_rxclk_i_0", 24, 1 }, + { "MtipSd7TxRst", 23, 1 }, + { "MtipSd6TxRst", 22, 1 }, + { "MtipSd5TxRst", 21, 1 }, + { "MtipSd4TxRst", 20, 1 }, + { "MtipSd3TxRst", 19, 1 }, + { "MtipSd2TxRst", 18, 1 }, + { "MtipSd1TxRst", 17, 1 }, + { "MtipSd0TxRst", 16, 1 }, + { "MtipSd7RxRst", 15, 1 }, + { "MtipSd6RxRst", 14, 1 }, + { "MtipSd5RxRst", 13, 1 }, + { "MtipSd4RxRst", 12, 1 }, + { "MtipSd3RxRst", 11, 1 }, + { "MtipSd2RxRst", 10, 1 }, + { "MtipSd1RxRst", 9, 1 }, + { "MtipSd0RxRst", 8, 1 }, + { "reset_reg_clk_an_0_i", 7, 1 }, + { "reset_reg_clk_an_1_i", 6, 1 }, + { "reset_reg_clk_an_2_i", 5, 1 }, + { "reset_reg_clk_an_3_i", 4, 1 }, + { "reset_reg_clk_an_4_i", 3, 1 }, + { "reset_reg_clk_an_5_i", 2, 1 }, + { "reset_reg_clk_an_6_i", 1, 1 }, + { "reset_reg_clk_an_7_i", 0, 1 }, + { "MAC_MTIP_CLK_CTRL_0", 0x38010, 0 }, + { "f91_ref_clk_i_g", 31, 1 }, + { "pcs000_ref_clk_i_g", 30, 1 }, + { "ref_clk_i_g", 29, 1 }, + { "sd_rx_clk_i_0_g", 28, 1 }, + { "sd_rx_clk_i_1_g", 27, 1 }, + { "sd_rx_clk_i_2_g", 26, 1 }, + { "sd_rx_clk_i_3_g", 25, 1 }, + { "sd_rx_clk_i_4_g", 24, 1 }, + { "sd_rx_clk_i_5_g", 23, 1 }, + { "sd_rx_clk_i_6_g", 22, 1 }, + { "sd_rx_clk_i_7_g", 21, 1 }, + { "sd_tx_clk_i_0_g", 20, 1 }, + { "sd_tx_clk_i_1_g", 19, 1 }, + { "sd_tx_clk_i_2_g", 18, 1 }, + { "sd_tx_clk_i_3_g", 17, 1 }, + { "sd_tx_clk_i_4_g", 16, 1 }, + { "sd_tx_clk_i_5_g", 15, 1 }, + { "sd_tx_clk_i_6_g", 14, 1 }, + { "sd_tx_clk_i_7_g", 13, 1 }, + { "xpcs_ref_clk_i_0_g", 12, 1 }, + { "xpcs_ref_clk_i_1_g", 11, 1 }, + { "reg_clk_i_g", 10, 1 }, + { "ff_rx_clk_0_i_g", 9, 1 }, + { "ff_tx_clk_0_i_g", 8, 1 }, + { "rxclk_0_i_g", 7, 1 }, + { "txclk_0_i_g", 6, 1 }, + { "ff_rx_clk_1_i_g", 5, 1 }, + { "ff_tx_clk_1_i_g", 4, 1 }, + { "rxclk_1_i_g", 3, 1 }, + { "txclk_1_i_g", 2, 1 }, + { "MAC_MTIP_CLK_CTRL_1", 0x38014, 0 }, + { "ff_rx_clk_2_i_g", 31, 1 }, + { "ff_tx_clk_2_i_g", 30, 1 }, + { "rxclk_2_i_g", 29, 1 }, + { "txclk_2_i_g", 28, 1 }, + { "ff_rx_clk_3_i_g", 27, 1 }, + { "ff_tx_clk_3_i_g", 26, 1 }, + { "rxclk_3_i_g", 25, 1 }, + { "txclk_3_i_g", 24, 1 }, + { "ff_rx_clk_4_i_g", 23, 1 }, + { "ff_tx_clk_4_i_g", 22, 1 }, + { "rxclk_4_i_g", 21, 1 }, + { "txclk_4_i_g", 20, 1 }, + { "ff_rx_clk_5_i_g", 19, 1 }, + { "ff_tx_clk_5_i_g", 18, 1 }, + { "rxclk_5_i_g", 17, 1 }, + { "txclk_5_i_g", 16, 1 }, + { "sd_rx_clk_an_0_i_g", 15, 1 }, + { "sd_tx_clk_an_0_i_g", 14, 1 }, + { "sd_rx_clk_an_1_i_g", 13, 1 }, + { "sd_tx_clk_an_1_i_g", 12, 1 }, + { "sd_rx_clk_an_2_i_g", 11, 1 }, + { "sd_tx_clk_an_2_i_g", 10, 1 }, + { "sd_rx_clk_an_3_i_g", 9, 1 }, + { "sd_tx_clk_an_3_i_g", 8, 1 }, + { "sd_rx_clk_an_4_i_g", 7, 1 }, + { "sd_tx_clk_an_4_i_g", 6, 1 }, + { "sd_rx_clk_an_5_i_g", 5, 1 }, + { "sd_tx_clk_an_5_i_g", 4, 1 }, + { "sd_rx_clk_an_6_i_g", 3, 1 }, + { "sd_tx_clk_an_6_i_g", 2, 1 }, + { "sd_rx_clk_an_7_i_g", 1, 1 }, + { "sd_tx_clk_an_7_i_g", 0, 1 }, + { "MAC_MTIP_CLK_CTRL_2", 0x38018, 0 }, + { "sd_rx_clk_0_g", 31, 1 }, + { "sd_rx_clk_1_g", 30, 1 }, + { "sd_rx_clk_2_g", 29, 1 }, + { "sd_rx_clk_3_g", 28, 1 }, + { "sd_rx_clk_4_g", 27, 1 }, + { "sd_rx_clk_5_g", 26, 1 }, + { "sd_rx_clk_6_g", 25, 1 }, + { "sd_rx_clk_7_g", 24, 1 }, + { "sd_tx_clk_0_g", 23, 1 }, + { "sd_tx_clk_1_g", 22, 1 }, + { "sd_tx_clk_2_g", 21, 1 }, + { "sd_tx_clk_3_g", 20, 1 }, + { "sd_tx_clk_4_g", 19, 1 }, + { "sd_tx_clk_5_g", 18, 1 }, + { "sd_tx_clk_6_g", 17, 1 }, + { "sd_tx_clk_7_g", 16, 1 }, + { "sd_rx_clk_aec_0_g", 15, 1 }, + { "sd_rx_clk_aec_1_g", 14, 1 }, + { "sd_rx_clk_aec_2_g", 13, 1 }, + { "sd_rx_clk_aec_3_g", 12, 1 }, + { "sd_rx_clk_aec_4_g", 11, 1 }, + { "sd_rx_clk_aec_5_g", 10, 1 }, + { "sd_rx_clk_aec_6_g", 9, 1 }, + { "sd_rx_clk_aec_7_g", 8, 1 }, + { "sd_tx_clk_aec_0_g", 7, 1 }, + { "sd_tx_clk_aec_1_g", 6, 1 }, + { "sd_tx_clk_aec_2_g", 5, 1 }, + { "sd_tx_clk_aec_3_g", 4, 1 }, + { "sd_tx_clk_aec_4_g", 3, 1 }, + { "sd_tx_clk_aec_5_g", 2, 1 }, + { "sd_tx_clk_aec_6_g", 1, 1 }, + { "sd_tx_clk_aec_7_g", 0, 1 }, + { "MAC_MTIP_CLK_CTRL_3", 0x3801c, 0 }, + { "pcs_rx_clk_0_g", 31, 1 }, + { "pcs_rx_clk_1_g", 30, 1 }, + { "pcs_rx_clk_2_g", 29, 1 }, + { "pcs_rx_clk_3_g", 28, 1 }, + { "pcs_rx_clk_4_g", 27, 1 }, + { "pcs_rx_clk_5_g", 26, 1 }, + { "pcs_rx_clk_6_g", 25, 1 }, + { "pcs_rx_clk_7_g", 24, 1 }, + { "pcs_tx_clk_0_g", 23, 1 }, + { "pcs_tx_clk_1_g", 22, 1 }, + { "pcs_tx_clk_2_g", 21, 1 }, + { "pcs_tx_clk_3_g", 20, 1 }, + { "pcs_tx_clk_4_g", 19, 1 }, + { "pcs_tx_clk_5_g", 18, 1 }, + { "pcs_tx_clk_6_g", 17, 1 }, + { "pcs_tx_clk_7_g", 16, 1 }, + { "sd_rx_clk_en_0", 15, 1 }, + { "sd_rx_clk_en_1", 14, 1 }, + { "sd_rx_clk_en_2", 13, 1 }, + { "sd_rx_clk_en_3", 12, 1 }, + { "sd_rx_clk_en_4", 11, 1 }, + { "sd_rx_clk_en_5", 10, 1 }, + { "sd_rx_clk_en_6", 9, 1 }, + { "sd_rx_clk_en_7", 8, 1 }, + { "sd_tx_clk_en_0", 7, 1 }, + { "sd_tx_clk_en_1", 6, 1 }, + { "sd_tx_clk_en_2", 5, 1 }, + { "sd_tx_clk_en_3", 4, 1 }, + { "sd_tx_clk_en_4", 3, 1 }, + { "sd_tx_clk_en_5", 2, 1 }, + { "sd_tx_clk_en_6", 1, 1 }, + { "sd_tx_clk_en_7", 0, 1 }, + { "MAC_MTIP_CLK_CTRL_4", 0x38020, 0 }, + { "sgmii_tx_clk_0_g", 7, 1 }, + { "sgmii_tx_clk_1_g", 6, 1 }, + { "sgmii_tx_clk_2_g", 5, 1 }, + { "sgmii_tx_clk_3_g", 4, 1 }, + { "sgmii_rx_clk_0_g", 3, 1 }, + { "sgmii_rx_clk_1_g", 2, 1 }, + { "sgmii_rx_clk_2_g", 1, 1 }, + { "sgmii_rx_clk_3_g", 0, 1 }, + { "MAC_PCS_CONFIG_0", 0x38024, 0 }, + { "kp_mode_in", 24, 8 }, + { "fec91_ena_in", 16, 8 }, + { "sd_8x", 8, 8 }, + { "sd_n2", 0, 8 }, + { "MAC_PCS_CONFIG_1", 0x38028, 0 }, + { "fast_1lane_mode", 24, 8 }, + { "pacer_10g", 16, 8 }, + { "pcs400_ena_in", 14, 2 }, + { "mode40_ena_in4", 13, 1 }, + { "mode40_ena_in0", 12, 1 }, + { "pcs100_ena_in6", 11, 1 }, + { "pcs100_ena_in4", 10, 1 }, + { "pcs100_ena_in2", 9, 1 }, + { "pcs100_ena_in0", 8, 1 }, + { "rxlaui_ena_in6", 7, 1 }, + { "rxlaui_ena_in4", 6, 1 }, + { "rxlaui_ena_in2", 5, 1 }, + { "rxlaui_ena_in0", 4, 1 }, + { "fec91_lane_in6", 3, 1 }, + { "fec91_lane_in4", 2, 1 }, + { "fec91_lane_in2", 1, 1 }, + { "fec91_lane_in0", 0, 1 }, + { "MAC_PCS_CONFIG_2", 0x3802c, 0 }, + { "sgpcs_en_3", 29, 1 }, + { "sgpcs_en_2", 28, 1 }, + { "sgpcs_en_1", 27, 1 }, + { "sgpcs_en_0", 26, 1 }, + { "cfg_clock_rate", 22, 4 }, + { "fec_err_ena", 14, 8 }, + { "fec_ena", 6, 8 }, + { "pcs001_tx_am_sf", 3, 3 }, + { "pcs000_tx_am_sf", 0, 3 }, + { "MAC_PCS_STATUS_0", 0x38030, 0 }, + { "pcs000_align_lock", 30, 2 }, + { "pcs000_hi_ser", 28, 2 }, + { "ber_timer_done", 20, 8 }, + { "amps_lock", 4, 16 }, + { "align_done", 0, 4 }, + { "MAC_PCS_STATUS_1", 0x38034, 0 }, + { "MAC_PCS_STATUS_2", 0x38038, 0 }, + { "rsfec_aligned", 24, 8 }, + { "fec_locked", 8, 16 }, + { "block_lock", 0, 8 }, + { "MAC_PCS_STATUS_3", 0x3803c, 0 }, + { "fec_ncerr", 16, 16 }, + { "fec_cerr", 0, 16 }, + { "MAC_PCS_STATUS_4", 0x38040, 0 }, + { "mac1_res_speed", 23, 8 }, + { "mac0_res_speed", 14, 8 }, + { "pcs400_ena_in_ref", 12, 2 }, + { "pcs000_degrade_ser", 10, 2 }, + { "p4x_signal_ok", 8, 2 }, + { "mode200_ind_ref", 7, 1 }, + { "mode200_8x26_ind_ref", 6, 1 }, + { "pcs001_rx_am_sf", 3, 3 }, + { "pcs000_rx_am_sf", 0, 3 }, + { "MAC_PCS_STATUS_5", 0x38044, 0 }, + { "mac5_res_speed", 24, 8 }, + { "mac4_res_speed", 16, 8 }, + { "mac3_res_speed", 8, 8 }, + { "mac2_res_speed", 0, 8 }, + { "MAC_PCS_STATUS_6", 0x38048, 0 }, + { "marker_ins_cnt_100_00", 16, 15 }, + { "mac7_res_speed", 8, 8 }, + { "mac6_res_speed", 0, 8 }, + { "MAC_PCS_STATUS_7", 0x3804c, 0 }, + { "pcs000_link_status", 30, 2 }, + { "marker_ins_cnt_100_02", 15, 15 }, + { "marker_ins_cnt_100_01", 0, 15 }, + { "MAC_PCS_STATUS_8", 0x38050, 0 }, + { "marker_ins_cnt_25_1", 15, 16 }, + { "marker_ins_cnt_100_03", 0, 15 }, + { "MAC_PCS_STATUS_9", 0x38054, 0 }, + { "marker_ins_cnt_25_5", 16, 16 }, + { "marker_ins_cnt_25_3", 0, 16 }, + { "MAC_PCS_STATUS_10", 0x38058, 0 }, + { "marker_ins_cnt_25_50_2", 16, 16 }, + { "marker_ins_cnt_25_50_0", 0, 16 }, + { "MAC_PCS_STATUS_11", 0x3805c, 0 }, + { "marker_ins_cnt_25_50_6", 16, 16 }, + { "marker_ins_cnt_25_50_4", 0, 16 }, + { "MAC_PCS_STATUS_12", 0x38060, 0 }, + { "link_status", 24, 8 }, + { "hi_ber", 16, 8 }, + { "marker_ins_cnt_25_7", 0, 16 }, + { "MAC_MAC200G400G_0_CONFIG_0", 0x38064, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_MAC200G400G_0_CONFIG_1", 0x38068, 0 }, + { "tx_ts_id", 12, 12 }, + { "ff_tx_crc_ovr", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "tx_smhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_MAC200G400G_0_CONFIG_2", 0x3806c, 0 }, + { "MAC_MAC200G400G_0_CONFIG_3", 0x38070, 0 }, + { "MAC_MAC200G400G_0_CONFIG_4", 0x38074, 0 }, + { "MAC_MAC200G400G_0_STATUS", 0x38078, 0 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "loop_ena", 4, 1 }, + { "loc_fault", 3, 1 }, + { "frm_drop", 2, 1 }, + { "ff_tx_credit", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_MAC200G400G_1_CONFIG_0", 0x3807c, 0 }, + { "peer_delay_val", 31, 1 }, + { "peer_delay", 1, 30 }, + { "mode1s_ena", 0, 1 }, + { "MAC_MAC200G400G_1_CONFIG_1", 0x38080, 0 }, + { "tx_ts_id", 12, 12 }, + { "ff_tx_crc_ovr", 11, 1 }, + { "xoff_gen", 3, 8 }, + { "tx_smhold", 2, 1 }, + { "tx_rem_fault", 1, 1 }, + { "tx_loc_fault", 0, 1 }, + { "MAC_MAC200G400G_1_CONFIG_2", 0x38084, 0 }, + { "MAC_MAC200G400G_1_CONFIG_3", 0x38088, 0 }, + { "MAC_MAC200G400G_1_CONFIG_4", 0x3808c, 0 }, + { "MAC_MAC200G400G_1_STATUS", 0x38090, 0 }, + { "tx_isidle", 19, 1 }, + { "tx_underflow", 18, 1 }, + { "tx_empty", 17, 1 }, + { "rem_fault", 16, 1 }, + { "reg_ts_avail", 15, 1 }, + { "phy_txena", 14, 1 }, + { "pfc_mode", 13, 1 }, + { "pause_on", 5, 8 }, + { "loop_ena", 4, 1 }, + { "loc_fault", 3, 1 }, + { "frm_drop", 2, 1 }, + { "ff_tx_credit", 1, 1 }, + { "ff_rx_empty", 0, 1 }, + { "MAC_AN_CFG_0", 0x38094, 0 }, + { "an_data_ctl", 24, 8 }, + { "an_ena", 16, 8 }, + { "MAC_AN_CFG_1", 0x38098, 0 }, + { "an_dis_timer_an_7", 7, 1 }, + { "an_dis_timer_an_6", 6, 1 }, + { "an_dis_timer_an_5", 5, 1 }, + { "an_dis_timer_an_4", 4, 1 }, + { "an_dis_timer_an_3", 3, 1 }, + { "an_dis_timer_an_2", 2, 1 }, + { "an_dis_timer_an_1", 1, 1 }, + { "an_dis_timer_an_0", 0, 1 }, + { "MAC_AN_SERDES25G_ENA", 0x3809c, 0 }, + { "an_sd25_tx_ena_7", 15, 1 }, + { "an_sd25_tx_ena_6", 14, 1 }, + { "an_sd25_tx_ena_5", 13, 1 }, + { "an_sd25_tx_ena_4", 12, 1 }, + { "an_sd25_tx_ena_3", 11, 1 }, + { "an_sd25_tx_ena_2", 10, 1 }, + { "an_sd25_tx_ena_1", 9, 1 }, + { "an_sd25_tx_ena_0", 8, 1 }, + { "an_sd25_rx_ena_7", 7, 1 }, + { "an_sd25_rx_ena_6", 6, 1 }, + { "an_sd25_rx_ena_5", 5, 1 }, + { "an_sd25_rx_ena_4", 4, 1 }, + { "an_sd25_rx_ena_3", 3, 1 }, + { "an_sd25_rx_ena_2", 2, 1 }, + { "an_sd25_rx_ena_1", 1, 1 }, + { "an_sd25_rx_ena_0", 0, 1 }, + { "MAC_PLL_CFG_0", 0x380a0, 0 }, + { "USE_RX_CDR_CLK_FOR_TX", 7, 1 }, + { "HSSPLLSEL0", 5, 2 }, + { "HSSTXDIV2CLK_SEL0", 3, 2 }, + { "HSS_Reset0", 2, 1 }, + { "APB_RESET0", 1, 1 }, + { "HSSCLK32DIV2_RESET0", 0, 1 }, + { "MAC_PLL_CFG_1", 0x380a4, 0 }, + { "USE_RX_CDR_CLK_FOR_TX", 7, 1 }, + { "HSSPLLSEL1", 5, 2 }, + { "HSSTXDIV2CLK_SEL1", 3, 2 }, + { "HSS_Reset1", 2, 1 }, + { "APB_RESET1", 1, 1 }, + { "HSSCLK32DIV2_RESET1", 0, 1 }, + { "MAC_PLL_CFG_2", 0x380a8, 0 }, + { "USE_RX_CDR_CLK_FOR_TX", 7, 1 }, + { "HSSPLLSEL2", 5, 2 }, + { "HSSTXDIV2CLK_SEL2", 3, 2 }, + { "HSS_Reset2", 2, 1 }, + { "APB_RESET2", 1, 1 }, + { "HSSCLK32DIV2_RESET2", 0, 1 }, + { "MAC_PLL_CFG_3", 0x380ac, 0 }, + { "USE_RX_CDR_CLK_FOR_TX", 7, 1 }, + { "HSSPLLSEL3", 5, 2 }, + { "HSSTXDIV2CLK_SEL3", 3, 2 }, + { "HSS_Reset3", 2, 1 }, + { "APB_RESET3", 1, 1 }, + { "HSSCLK32DIV2_RESET3", 0, 1 }, + { "MAC_HSS_STATUS", 0x380b0, 0 }, + { "tx_lane_pll_sel_3", 30, 2 }, + { "tx_lane_pll_sel_2", 28, 2 }, + { "tx_lane_pll_sel_1", 26, 2 }, + { "tx_lane_pll_sel_0", 24, 2 }, + { "HSSPLLLOCKB_HSS3", 7, 1 }, + { "HSSPLLLOCKA_HSS3", 6, 1 }, + { "HSSPLLLOCKB_HSS2", 5, 1 }, + { "HSSPLLLOCKA_HSS2", 4, 1 }, + { "HSSPLLLOCKB_HSS1", 3, 1 }, + { "HSSPLLLOCKA_HSS1", 2, 1 }, + { "HSSPLLLOCKB_HSS0", 1, 1 }, + { "HSSPLLLOCKA_HSS0", 0, 1 }, + { "MAC_HSS_SIGDET_STATUS", 0x380b4, 0 }, + { "HSS3_sigdet", 6, 2 }, + { "HSS2_sigdet", 4, 2 }, + { "HSS1_sigdet", 2, 2 }, + { "HSS0_sigdet", 0, 2 }, + { "MAC_FPGA_CFG_0", 0x380b8, 0 }, + { "MAC_PMD_STATUS", 0x380bc, 0 }, + { "MAC_PMD_AN_CONFIG0", 0x380c0, 0 }, + { "AN3_RATE_SELECT", 25, 5 }, + { "AN3_STATUS", 24, 1 }, + { "AN2_RATE_SELECT", 17, 5 }, + { "AN2_STATUS", 16, 1 }, + { "AN1_RATE_SELECT", 9, 5 }, + { "AN1_STATUS", 8, 1 }, + { "AN0_RATE_SELECT", 1, 5 }, + { "AN0_STATUS", 0, 1 }, + { "MAC_PMD_AN_CONFIG1", 0x380c4, 0 }, + { "AN7_RATE_SELECT", 25, 5 }, + { "AN7_STATUS", 24, 1 }, + { "AN6_RATE_SELECT", 17, 5 }, + { "AN6_STATUS", 16, 1 }, + { "AN5_RATE_SELECT", 9, 5 }, + { "AN5_STATUS", 8, 1 }, + { "AN4_RATE_SELECT", 1, 5 }, + { "AN4_STATUS", 0, 1 }, + { "MAC_INT_EN_CMN", 0x380c8, 0 }, + { "HSS3PLL1_LOCK_LOST", 21, 1 }, + { "HSS3PLL1_LOCK", 20, 1 }, + { "HSS3PLL0_LOCK_LOST", 19, 1 }, + { "HSS3PLL0_LOCK", 18, 1 }, + { "HSS2PLL1_LOCK_LOST", 17, 1 }, + { "HSS2PLL1_LOCK", 16, 1 }, + { "HSS2PLL0_LOCK_LOST", 15, 1 }, + { "HSS2PLL0_LOCK", 14, 1 }, + { "HSS1PLL1_LOCK_LOST", 13, 1 }, + { "HSS1PLL1_LOCK", 12, 1 }, + { "HSS1PLL0_LOCK_LOST", 11, 1 }, + { "HSS1PLL0_LOCK", 10, 1 }, + { "HSS0PLL1_LOCK_LOST", 9, 1 }, + { "HSS0PLL1_LOCK", 8, 1 }, + { "HSS0PLL0_LOCK_LOST", 7, 1 }, + { "HSS0PLL0_LOCK", 6, 1 }, + { "flock_asserted", 5, 1 }, + { "flock_lost", 4, 1 }, + { "phase_lock_asserted", 3, 1 }, + { "phase_lock_lost", 2, 1 }, + { "lock_asserted", 1, 1 }, + { "lock_lost", 0, 1 }, + { "MAC_INT_CAUSE_CMN", 0x380cc, 0 }, + { "HSS3PLL1_LOCK_LOST", 21, 1 }, + { "HSS3PLL1_LOCK", 20, 1 }, + { "HSS3PLL0_LOCK_LOST", 19, 1 }, + { "HSS3PLL0_LOCK", 18, 1 }, + { "HSS2PLL1_LOCK_LOST", 17, 1 }, + { "HSS2PLL1_LOCK", 16, 1 }, + { "HSS2PLL0_LOCK_LOST", 15, 1 }, + { "HSS2PLL0_LOCK", 14, 1 }, + { "HSS1PLL1_LOCK_LOST", 13, 1 }, + { "HSS1PLL1_LOCK", 12, 1 }, + { "HSS1PLL0_LOCK_LOST", 11, 1 }, + { "HSS1PLL0_LOCK", 10, 1 }, + { "HSS0PLL1_LOCK_LOST", 9, 1 }, + { "HSS0PLL1_LOCK", 8, 1 }, + { "HSS0PLL0_LOCK_LOST", 7, 1 }, + { "HSS0PLL0_LOCK", 6, 1 }, + { "flock_asserted", 5, 1 }, + { "flock_lost", 4, 1 }, + { "phase_lock_asserted", 3, 1 }, + { "phase_lock_lost", 2, 1 }, + { "lock_asserted", 1, 1 }, + { "lock_lost", 0, 1 }, + { "MAC_PERR_INT_EN_MTIP", 0x380d0, 0 }, + { "rx_mac40g", 28, 1 }, + { "tx_mac40g", 27, 1 }, + { "rx_st_mac40g", 26, 1 }, + { "tx_st_mac40g", 25, 1 }, + { "tx_mac1g10g", 24, 1 }, + { "rx_mac1g10g", 23, 1 }, + { "rx_status_mac1g10g", 22, 1 }, + { "rx_st_mac1g10g", 21, 1 }, + { "tx_st_mac1g10g", 20, 1 }, + { "Perr_mac0_tx", 19, 1 }, + { "Perr_mac1_tx", 18, 1 }, + { "Perr_mac2_tx", 17, 1 }, + { "Perr_mac3_tx", 16, 1 }, + { "Perr_mac4_tx", 15, 1 }, + { "Perr_mac5_tx", 14, 1 }, + { "Perr_mac0_rx", 13, 1 }, + { "Perr_mac1_rx", 12, 1 }, + { "Perr_mac2_rx", 11, 1 }, + { "Perr_mac3_rx", 10, 1 }, + { "Perr_mac4_rx", 9, 1 }, + { "Perr_mac5_rx", 8, 1 }, + { "Perr_mac_stat2_rx", 7, 1 }, + { "Perr_mac_stat3_rx", 6, 1 }, + { "Perr_mac_stat4_rx", 5, 1 }, + { "Perr_mac_stat5_rx", 4, 1 }, + { "Perr_mac_stat2_tx", 3, 1 }, + { "Perr_mac_stat3_tx", 2, 1 }, + { "Perr_mac_stat4_tx", 1, 1 }, + { "Perr_mac_stat5_tx", 0, 1 }, + { "MAC_PERR_INT_CAUSE_MTIP", 0x380d4, 0 }, + { "rx_mac40g", 28, 1 }, + { "tx_mac40g", 27, 1 }, + { "rx_st_mac40g", 26, 1 }, + { "tx_st_mac40g", 25, 1 }, + { "tx_mac1g10g", 24, 1 }, + { "rx_mac1g10g", 23, 1 }, + { "rx_status_mac1g10g", 22, 1 }, + { "rx_st_mac1g10g", 21, 1 }, + { "tx_st_mac1g10g", 20, 1 }, + { "Perr_mac0_tx", 19, 1 }, + { "Perr_mac1_tx", 18, 1 }, + { "Perr_mac2_tx", 17, 1 }, + { "Perr_mac3_tx", 16, 1 }, + { "Perr_mac4_tx", 15, 1 }, + { "Perr_mac5_tx", 14, 1 }, + { "Perr_mac0_rx", 13, 1 }, + { "Perr_mac1_rx", 12, 1 }, + { "Perr_mac2_rx", 11, 1 }, + { "Perr_mac3_rx", 10, 1 }, + { "Perr_mac4_rx", 9, 1 }, + { "Perr_mac5_rx", 8, 1 }, + { "Perr_mac_stat_rx", 7, 1 }, + { "Perr_mac_stat3_rx", 6, 1 }, + { "Perr_mac_stat4_rx", 5, 1 }, + { "Perr_mac_stat5_rx", 4, 1 }, + { "Perr_mac_stat_tx", 3, 1 }, + { "Perr_mac_stat_cap", 2, 1 }, + { "Perr_mac_stat4_tx", 1, 1 }, + { "Perr_mac_stat5_tx", 0, 1 }, + { "MAC_PERR_ENABLE_MTIP", 0x380d8, 0 }, + { "rx_mac40g", 28, 1 }, + { "tx_mac40g", 27, 1 }, + { "rx_st_mac40g", 26, 1 }, + { "tx_st_mac40g", 25, 1 }, + { "tx_mac1g10g", 24, 1 }, + { "rx_mac1g10g", 23, 1 }, + { "rx_status_mac1g10g", 22, 1 }, + { "rx_st_mac1g10g", 21, 1 }, + { "tx_st_mac1g10g", 20, 1 }, + { "Perr_mac0_tx", 19, 1 }, + { "Perr_mac1_tx", 18, 1 }, + { "Perr_mac2_tx", 17, 1 }, + { "Perr_mac3_tx", 16, 1 }, + { "Perr_mac4_tx", 15, 1 }, + { "Perr_mac5_tx", 14, 1 }, + { "Perr_mac0_rx", 13, 1 }, + { "Perr_mac1_rx", 12, 1 }, + { "Perr_mac2_rx", 11, 1 }, + { "Perr_mac3_rx", 10, 1 }, + { "Perr_mac4_rx", 9, 1 }, + { "Perr_mac5_rx", 8, 1 }, + { "Perr_mac_stat2_rx", 7, 1 }, + { "Perr_mac_stat3_rx", 6, 1 }, + { "Perr_mac_stat4_rx", 5, 1 }, + { "Perr_mac_stat5_rx", 4, 1 }, + { "Perr_mac_stat2_tx", 3, 1 }, + { "Perr_mac_stat3_tx", 2, 1 }, + { "Perr_mac_stat4_tx", 1, 1 }, + { "Perr_mac_stat5_tx", 0, 1 }, + { "MAC_PCS_1G_CONFIG_0", 0x380dc, 0 }, + { "seq_ena_3", 19, 1 }, + { "seq_ena_2", 18, 1 }, + { "seq_ena_1", 17, 1 }, + { "seq_ena_0", 16, 1 }, + { "tx_lane_thresh_3", 12, 4 }, + { "tx_lane_thresh_2", 8, 4 }, + { "tx_lane_thresh_1", 4, 4 }, + { "tx_lane_thresh_0", 0, 4 }, + { "MAC_PCS_1G_CONFIG_1", 0x380e0, 0 }, + { "tx_lane_ckmult_3", 9, 3 }, + { "tx_lane_ckmult_2", 6, 3 }, + { "tx_lane_ckmult_1", 3, 3 }, + { "tx_lane_ckmult_0", 0, 3 }, + { "MAC_PTP_TIMER_RD0_LO", 0x380e4, 0 }, + { "MAC_PTP_TIMER_RD0_HI", 0x380e8, 0 }, + { "MAC_PTP_TIMER_RD1_LO", 0x380ec, 0 }, + { "MAC_PTP_TIMER_RD1_HI", 0x380f0, 0 }, + { "MAC_PTP_TIMER_WR_LO", 0x380f4, 0 }, + { "MAC_PTP_TIMER_WR_HI", 0x380f8, 0 }, + { "MAC_PTP_TIMER_OFFSET_0", 0x380fc, 0 }, + { "MAC_PTP_TIMER_OFFSET_1", 0x38100, 0 }, + { "MAC_PTP_TIMER_OFFSET_2", 0x38104, 0 }, + { "MAC_PTP_SUM_LO", 0x38108, 0 }, + { "MAC_PTP_SUM_HI", 0x3810c, 0 }, + { "MAC_PTP_TIMER_INCR0", 0x38110, 0 }, + { "Y", 16, 16 }, + { "X", 0, 16 }, + { "MAC_PTP_TIMER_INCR1", 0x38114, 0 }, + { "Y_TICK", 16, 16 }, + { "X_TICK", 0, 16 }, + { "MAC_PTP_DRIFT_ADJUST_COUNT", 0x38118, 0 }, + { "MAC_PTP_OFFSET_ADJUST_FINE", 0x3811c, 0 }, + { "B", 16, 16 }, + { "A", 0, 16 }, + { "MAC_PTP_OFFSET_ADJUST_TOTAL", 0x38120, 0 }, + { "MAC_PTP_CFG", 0x38124, 0 }, + { "ALARM_EN", 21, 1 }, + { "ALARM_START", 20, 1 }, + { "PPS_EN", 19, 1 }, + { "FRZ", 18, 1 }, + { "OFFSER_ADJUST_SIGN", 17, 1 }, + { "ADD_OFFSET", 16, 1 }, + { "CYCLE1", 8, 8 }, + { "Q", 0, 8 }, + { "MAC_PTP_PPS", 0x38128, 0 }, + { "MAC_PTP_SINGLE_ALARM", 0x3812c, 0 }, + { "MAC_PTP_PERIODIC_ALARM", 0x38130, 0 }, + { "MAC_PTP_STATUS", 0x38134, 0 }, + { "MAC_STS_GPIO_SEL", 0x38140, 0 }, + { "STSOUTSEL", 1, 1 }, + { "STSINSEL", 0, 1 }, + { "MAC_CERR_INT_EN_MTIP", 0x38150, 0 }, + { "Cerr_mac0_tx", 11, 1 }, + { "Cerr_mac1_tx", 10, 1 }, + { "Cerr_mac2_tx", 9, 1 }, + { "Cerr_mac3_tx", 8, 1 }, + { "Cerr_mac4_tx", 7, 1 }, + { "Cerr_mac5_tx", 6, 1 }, + { "Cerr_mac0_rx", 5, 1 }, + { "Cerr_mac1_rx", 4, 1 }, + { "Cerr_mac2_rx", 3, 1 }, + { "Cerr_mac3_rx", 2, 1 }, + { "Cerr_mac4_rx", 1, 1 }, + { "Cerr_mac5_rx", 0, 1 }, + { "MAC_CERR_INT_CAUSE_MTIP", 0x38154, 0 }, + { "Cerr_mac0_tx", 11, 1 }, + { "Cerr_mac1_tx", 10, 1 }, + { "Cerr_mac2_tx", 9, 1 }, + { "Cerr_mac3_tx", 8, 1 }, + { "Cerr_mac4_tx", 7, 1 }, + { "Cerr_mac5_tx", 6, 1 }, + { "Cerr_mac0_rx", 5, 1 }, + { "Cerr_mac1_rx", 4, 1 }, + { "Cerr_mac2_rx", 3, 1 }, + { "Cerr_mac3_rx", 2, 1 }, + { "Cerr_mac4_rx", 1, 1 }, + { "Cerr_mac5_rx", 0, 1 }, + { "MAC_1G_PCS0_STATUS", 0x38160, 0 }, + { "sg_loopback", 12, 1 }, + { "sg_link_status", 11, 1 }, + { "sg_rx_sync", 10, 1 }, + { "sg_an_done", 9, 1 }, + { "sg_page_recieved", 8, 1 }, + { "sg_speed_sel", 6, 2 }, + { "sg_half_duplex", 5, 1 }, + { "pma_tx_mode_quiet", 4, 1 }, + { "tx_lpi_active", 3, 1 }, + { "pma_rx_mode_quiet", 2, 1 }, + { "rx_lpi_active", 1, 1 }, + { "rx_wake_err", 0, 1 }, + { "MAC_1G_PCS1_STATUS", 0x38164, 0 }, + { "sg_loopback", 12, 1 }, + { "sg_link_status", 11, 1 }, + { "sg_rx_sync", 10, 1 }, + { "sg_an_done", 9, 1 }, + { "sg_page_recieved", 8, 1 }, + { "sg_speed_sel", 6, 2 }, + { "sg_half_duplex", 5, 1 }, + { "pma_tx_mode_quiet", 4, 1 }, + { "tx_lpi_active", 3, 1 }, + { "pma_rx_mode_quiet", 2, 1 }, + { "rx_lpi_active", 1, 1 }, + { "rx_wake_err", 0, 1 }, + { "MAC_1G_PCS2_STATUS", 0x38168, 0 }, + { "sg_loopback", 12, 1 }, + { "sg_link_status", 11, 1 }, + { "sg_rx_sync", 10, 1 }, + { "sg_an_done", 9, 1 }, + { "sg_page_recieved", 8, 1 }, + { "sg_speed_sel", 6, 2 }, + { "sg_half_duplex", 5, 1 }, + { "pma_tx_mode_quiet", 4, 1 }, + { "tx_lpi_active", 3, 1 }, + { "pma_rx_mode_quiet", 2, 1 }, + { "rx_lpi_active", 1, 1 }, + { "rx_wake_err", 0, 1 }, + { "MAC_1G_PCS3_STATUS", 0x3816c, 0 }, + { "sg_loopback", 12, 1 }, + { "sg_link_status", 11, 1 }, + { "sg_rx_sync", 10, 1 }, + { "sg_an_done", 9, 1 }, + { "sg_page_recieved", 8, 1 }, + { "sg_speed_sel", 6, 2 }, + { "sg_half_duplex", 5, 1 }, + { "pma_tx_mode_quiet", 4, 1 }, + { "tx_lpi_active", 3, 1 }, + { "pma_rx_mode_quiet", 2, 1 }, + { "rx_lpi_active", 1, 1 }, + { "rx_wake_err", 0, 1 }, + { "MAC_PCS_LPI_STATUS_0", 0x38170, 0 }, + { "MAC_PCS_LPI_STATUS_1", 0x38174, 0 }, + { "MAC_PCS_LPI_STATUS_2", 0x38178, 0 }, + { "RX_LPI_MODE", 24, 8 }, + { "RX_LPI_STATE", 0, 24 }, + { "MAC_PCS_LPI_STATUS_3", 0x3817c, 0 }, + { "MAC_TX0_CLK_DIV", 0x38180, 0 }, + { "MAC_TX1_CLK_DIV", 0x38184, 0 }, + { "MAC_TX2_CLK_DIV", 0x38188, 0 }, + { "MAC_TX3_CLK_DIV", 0x3818c, 0 }, + { "MAC_TX4_CLK_DIV", 0x38190, 0 }, + { "MAC_TX5_CLK_DIV", 0x38194, 0 }, + { "MAC_TX6_CLK_DIV", 0x38198, 0 }, + { "MAC_TX7_CLK_DIV", 0x3819c, 0 }, + { "MAC_RX0_CLK_DIV", 0x381a0, 0 }, + { "MAC_RX1_CLK_DIV", 0x381a4, 0 }, + { "MAC_RX2_CLK_DIV", 0x381a8, 0 }, + { "MAC_RX3_CLK_DIV", 0x381ac, 0 }, + { "MAC_RX4_CLK_DIV", 0x381b0, 0 }, + { "MAC_RX5_CLK_DIV", 0x381b4, 0 }, + { "MAC_RX6_CLK_DIV", 0x381b8, 0 }, + { "MAC_RX7_CLK_DIV", 0x381bc, 0 }, + { "MAC_SYNC_E_CDR_LANE_SEL", 0x381c0, 0 }, + { "CML_MUX_SEL", 11, 1 }, + { "CMOS_OUT_EN", 10, 1 }, + { "CML_OUT_EN", 9, 1 }, + { "LOC_FAULT_PORT_SEL", 6, 2 }, + { "TX_CDR_LANE_SEL", 3, 3 }, + { "RX_CDR_LANE_SEL", 0, 3 }, + { "MAC_DEBUG_PL_IF_1", 0x381c4, 0 }, + { "MAC_SIGNAL_DETECT_CTRL", 0x381f0, 0 }, + { "Signal_Det_ln7", 15, 1 }, + { "Signal_Det_ln6", 14, 1 }, + { "Signal_Det_ln5", 13, 1 }, + { "Signal_Det_ln4", 12, 1 }, + { "Signal_Det_ln3", 11, 1 }, + { "Signal_Det_ln2", 10, 1 }, + { "Signal_Det_ln1", 9, 1 }, + { "Signal_Det_ln0", 8, 1 }, + { "SigDetCtrl_ln7", 7, 1 }, + { "SigDetCtrl_ln6", 6, 1 }, + { "SigDetCtrl_ln5", 5, 1 }, + { "SigDetCtrl_ln4", 4, 1 }, + { "SigDetCtrl_ln3", 3, 1 }, + { "SigDetCtrl_ln2", 2, 1 }, + { "SigDetCtrl_ln1", 1, 1 }, + { "SigDetCtrl_ln0", 0, 1 }, + { "MAC_FPGA_STATUS_FRM_BOARD", 0x381f4, 0 }, + { "SFP3_RX_LOS", 15, 1 }, + { "SFP3_TX_FAULT", 14, 1 }, + { "SFP3_MOD_PRES", 13, 1 }, + { "SFP2_RX_LOS", 12, 1 }, + { "SFP2_TX_FAULT", 11, 1 }, + { "SFP2_MOD_PRES", 10, 1 }, + { "SFP1_RX_LOS", 9, 1 }, + { "SFP1_TX_FAULT", 8, 1 }, + { "SFP1_MOD_PRES", 7, 1 }, + { "SFP0_RX_LOS", 6, 1 }, + { "SFP0_TX_FAULT", 5, 1 }, + { "SFP0_MOD_PRES", 4, 1 }, + { "QSFP1_INT_L", 3, 1 }, + { "QSFP1_MOD_PRES", 2, 1 }, + { "QSFP0_INT_L", 1, 1 }, + { "QSFP0_MOD_PRES", 0, 1 }, + { "MAC_FPGA_CONTROL_TO_BOARD", 0x381f8, 0 }, + { "SBA_EN", 12, 2 }, + { "LB_MODE", 10, 2 }, + { "SFP3_TX_DISABLE", 9, 1 }, + { "SFP2_TX_DISABLE", 8, 1 }, + { "SFP1_TX_DISABLE", 7, 1 }, + { "SFP0_TX_DISABLE", 6, 1 }, + { "QSFP1_LPMODE", 5, 1 }, + { "QSFP1_MODSEL_L", 4, 1 }, + { "QSFP1_RESET_L", 3, 1 }, + { "QSFP0_LPMODE", 2, 1 }, + { "QSFP0_MODSEL_L", 1, 1 }, + { "QSFP0_RESET_L", 0, 1 }, + { "MAC_FPGA_LINK_STATUS", 0x381fc, 0 }, + { "port3_fpga_link_up", 3, 1 }, + { "port2_fpga_link_up", 2, 1 }, + { "port1_fpga_link_up", 1, 1 }, + { "port0_fpga_link_up", 0, 1 }, + { "MAC_MTIP_MAC400G_0_MTIP_REVISION", 0x38200, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_MTIP_MAC400G_0_MTIP_SCRATCH", 0x38204, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_COMMAND_CONFIG", 0x38208, 0 }, + { "INV_LOOP", 31, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "NO_LGTH_CHECK", 17, 1 }, + { "SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "RX_ERR_DISC", 14, 1 }, + { "CMD_FRAME_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOPBACK_EN", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PAD_EN", 5, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENA", 1, 1 }, + { "TX_ENA", 0, 1 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_ADDR_0", 0x3820c, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_ADDR_1", 0x38210, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_FRM_LENGTH", 0x38214, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_RX_FIFO_SECTIONS", 0x3821c, 0 }, + { "AVAIL", 16, 16 }, + { "EMPTY", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_TX_FIFO_SECTIONS", 0x38220, 0 }, + { "AVAIL", 16, 16 }, + { "EMPTY", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_RX_FIFO_ALMOST_F_E", 0x38224, 0 }, + { "AlmstFull", 16, 16 }, + { "AlmstEmpty", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_TX_FIFO_ALMOST_F_E", 0x38228, 0 }, + { "AlmstFull", 16, 16 }, + { "AlmstEmpty", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_HASHTABLE_LOAD", 0x3822c, 0 }, + { "ENABLE", 8, 1 }, + { "ADDR", 0, 6 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_STATUS", 0x38240, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_MTIP_MAC400G_0_MTIP_TX_IPG_LENGTH", 0x38244, 0 }, + { "LEN", 19, 13 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL01_PAUSE_QUANTA", 0x38254, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL23_PAUSE_QUANTA", 0x38258, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL45_PAUSE_QUANTA", 0x3825c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL67_PAUSE_QUANTA", 0x38260, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL01_PAUSE_QUANTA_THRESH", 0x38264, 0 }, + { "CL1_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL0_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL23_PAUSE_QUANTA_THRESH", 0x38268, 0 }, + { "CL3_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL2_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL45_PAUSE_QUANTA_THRESH", 0x3826c, 0 }, + { "CL5_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL4_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_MAC_CL67_PAUSE_QUANTA_THRESH", 0x38270, 0 }, + { "CL7_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL6_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_0_MTIP_RX_PAUSE_STATUS", 0x38274, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_TS_TIMESTAMP", 0x3827c, 0 }, + { "MAC_MTIP_MAC400G_0_MTIP_XIF_MODE", 0x38280, 0 }, + { "ONE_STEP_ENA", 5, 1 }, + { "MAC_MTIP_MAC400G_1_MTIP_REVISION", 0x38300, 0 }, + { "CUSTREV", 16, 16 }, + { "VER", 8, 8 }, + { "REV", 0, 8 }, + { "MAC_MTIP_MAC400G_1_MTIP_SCRATCH", 0x38304, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_COMMAND_CONFIG", 0x38308, 0 }, + { "INV_LOOP", 31, 1 }, + { "FLT_HDL_DIS", 27, 1 }, + { "TX_FIFO_RESET", 26, 1 }, + { "TX_FLUSH", 22, 1 }, + { "RX_SFD_ANY", 21, 1 }, + { "PAUSE_PFC_COMP", 20, 1 }, + { "PFC_MODE", 19, 1 }, + { "NO_LGTH_CHECK", 17, 1 }, + { "SEND_IDLE", 16, 1 }, + { "PHY_TXENA", 15, 1 }, + { "RX_ERR_DISC", 14, 1 }, + { "CMD_FRAME_ENA", 13, 1 }, + { "SW_RESET", 12, 1 }, + { "TX_PAD_EN", 11, 1 }, + { "LOOPBACK_EN", 10, 1 }, + { "TX_ADDR_INS", 9, 1 }, + { "PAUSE_IGNORE", 8, 1 }, + { "PAUSE_FWD", 7, 1 }, + { "CRC_FWD", 6, 1 }, + { "PAD_EN", 5, 1 }, + { "PROMIS_EN", 4, 1 }, + { "RX_ENA", 1, 1 }, + { "TX_ENA", 0, 1 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_ADDR_0", 0x3830c, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_ADDR_1", 0x38310, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_FRM_LENGTH", 0x38314, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_RX_FIFO_SECTIONS", 0x3831c, 0 }, + { "AVAIL", 16, 16 }, + { "EMPTY", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_TX_FIFO_SECTIONS", 0x38320, 0 }, + { "AVAIL", 16, 16 }, + { "EMPTY", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_RX_FIFO_ALMOST_F_E", 0x38324, 0 }, + { "AlmstFull", 16, 16 }, + { "AlmstEmpty", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_TX_FIFO_ALMOST_F_E", 0x38328, 0 }, + { "AlmstFull", 16, 16 }, + { "AlmstEmpty", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_HASHTABLE_LOAD", 0x3832c, 0 }, + { "ENABLE", 8, 1 }, + { "ADDR", 0, 6 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_STATUS", 0x38340, 0 }, + { "TX_ISIDLE", 8, 1 }, + { "RX_EMPTY", 6, 1 }, + { "TX_EMPTY", 5, 1 }, + { "TS_AVAIL", 3, 1 }, + { "PHY_LOS", 2, 1 }, + { "RX_REM_FAULT", 1, 1 }, + { "RX_LOC_FAULT", 0, 1 }, + { "MAC_MTIP_MAC400G_1_MTIP_TX_IPG_LENGTH", 0x38344, 0 }, + { "LEN", 19, 13 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL01_PAUSE_QUANTA", 0x38354, 0 }, + { "CL1_PAUSE_QUANTA", 16, 16 }, + { "CL0_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL23_PAUSE_QUANTA", 0x38358, 0 }, + { "CL3_PAUSE_QUANTA", 16, 16 }, + { "CL2_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL45_PAUSE_QUANTA", 0x3835c, 0 }, + { "CL5_PAUSE_QUANTA", 16, 16 }, + { "CL4_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL67_PAUSE_QUANTA", 0x38360, 0 }, + { "CL7_PAUSE_QUANTA", 16, 16 }, + { "CL6_PAUSE_QUANTA", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL01_PAUSE_QUANTA_THRESH", 0x38364, 0 }, + { "CL1_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL0_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL23_PAUSE_QUANTA_THRESH", 0x38368, 0 }, + { "CL3_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL2_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL45_PAUSE_QUANTA_THRESH", 0x3836c, 0 }, + { "CL5_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL4_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_MAC_CL67_PAUSE_QUANTA_THRESH", 0x38370, 0 }, + { "CL7_PAUSE_QUANTA_THRESH", 16, 16 }, + { "CL6_PAUSE_QUANTA_THRESH", 0, 16 }, + { "MAC_MTIP_MAC400G_1_MTIP_RX_PAUSE_STATUS", 0x38374, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_TS_TIMESTAMP", 0x3837c, 0 }, + { "MAC_MTIP_MAC400G_1_MTIP_XIF_MODE", 0x38380, 0 }, + { "ONE_STEP_ENA", 5, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_CONTROL_1", 0x38400, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection", 2, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_1", 0x38404, 0 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICE_ID0", 0x38408, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICE_ID1", 0x3840c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_SPEED_ABILITY", 0x38410, 0 }, + { "400G_capable", 9, 1 }, + { "40G_capable", 8, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICES_IN_PKG1", 0x38414, 0 }, + { "Device_Package", 3, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICES_IN_PKG2", 0x38418, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_CONTROL_2", 0x3841c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_2", 0x38420, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_3", 0x38424, 0 }, + { "Device_present", 2, 14 }, + { "400GBase_R", 1, 1 }, + { "200GBase_R", 0, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_PKG_ID0", 0x38438, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_PKG_ID1", 0x3843c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_STATUS_1", 0x38480, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_STATUS_2", 0x38484, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_TEST_CONTROL", 0x384a8, 0 }, + { "Scrambled_ID_TP_EN", 7, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_TEST_ERR_CNT", 0x384ac, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_BER_HIGH_ORDER_CNT", 0x384b0, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_ERR_BLK_HIGH_ORDER_CNT", 0x384b4, 0 }, + { "High_ORDER", 15, 1 }, + { "Error_block_counter", 0, 14 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_1", 0x384c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_2", 0x384cc, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_3", 0x384d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_4", 0x384d4, 0 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_0_MAPPING", 0x384d8, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_1_MAPPING", 0x384dc, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_2_MAPPING", 0x384e0, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_3_MAPPING", 0x384e4, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_4_MAPPING", 0x384e8, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_5_MAPPING", 0x384ec, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_6_MAPPING", 0x384f0, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_7_MAPPING", 0x384f4, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_8_MAPPING", 0x384f8, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_9_MAPPING", 0x384fc, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_10_MAPPING", 0x38500, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_11_MAPPING", 0x38504, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_12_MAPPING", 0x38508, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_13_MAPPING", 0x3850c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_14_MAPPING", 0x38510, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_15_MAPPING", 0x38514, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_SCRATCH", 0x38600, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_CORE_REVISION", 0x38604, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_CL_INTVL", 0x38608, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_TX_LANE_THRESH", 0x3860c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_TX_CDMII_PACE", 0x3861c, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_AM_0", 0x38620, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_AM_1", 0x38624, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO0", 0x38800, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO1", 0x38804, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO2", 0x38808, 0 }, + { "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO3", 0x3880c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_CONTROL_1", 0x38900, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Low_power", 11, 1 }, + { "Speed_selection", 2, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_1", 0x38904, 0 }, + { "Fault", 7, 1 }, + { "RX_Link_Status", 2, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICE_ID0", 0x38908, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICE_ID1", 0x3890c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_SPEED_ABILITY", 0x38910, 0 }, + { "400G_capable", 9, 1 }, + { "40G_capable", 8, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICES_IN_PKG1", 0x38914, 0 }, + { "Device_Package", 3, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICES_IN_PKG2", 0x38918, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_CONTROL_2", 0x3891c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_2", 0x38920, 0 }, + { "Device_present", 14, 2 }, + { "Transmit_fault", 11, 1 }, + { "Receive_fault", 10, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_3", 0x38924, 0 }, + { "Device_present", 2, 14 }, + { "400GBase_R", 1, 1 }, + { "200GBase_R", 0, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_PKG_ID0", 0x38938, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_PKG_ID1", 0x3893c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_STATUS_1", 0x38980, 0 }, + { "RX_Link_STAT", 12, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_STATUS_2", 0x38984, 0 }, + { "Latched_block_lock", 15, 1 }, + { "Latched_high_BER", 14, 1 }, + { "Errored_blocks_cntr", 0, 8 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_TEST_CONTROL", 0x389a8, 0 }, + { "Scrambled_ID_TP_EN", 7, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_TEST_ERR_CNT", 0x389ac, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_BER_HIGH_ORDER_CNT", 0x389b0, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_ERR_BLK_HIGH_ORDER_CNT", 0x389b4, 0 }, + { "High_ORDER", 15, 1 }, + { "Error_block_counter", 0, 14 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_1", 0x389c8, 0 }, + { "LANE_ALIGN_STAT", 12, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_2", 0x389cc, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_3", 0x389d0, 0 }, + { "Lane7_algn_mrkr_lck", 7, 1 }, + { "Lane6_algn_mrkr_lck", 6, 1 }, + { "Lane5_algn_mrkr_lck", 5, 1 }, + { "Lane4_algn_mrkr_lck", 4, 1 }, + { "Lane3_algn_mrkr_lck", 3, 1 }, + { "Lane2_algn_mrkr_lck", 2, 1 }, + { "Lane1_algn_mrkr_lck", 1, 1 }, + { "Lane0_algn_mrkr_lck", 0, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_4", 0x389d4, 0 }, + { "Lane15_algn_mrkr_lck", 7, 1 }, + { "Lane14_algn_mrkr_lck", 6, 1 }, + { "Lane13_algn_mrkr_lck", 5, 1 }, + { "Lane12_algn_mrkr_lck", 4, 1 }, + { "Lane11_algn_mrkr_lck", 3, 1 }, + { "Lane10_algn_mrkr_lck", 2, 1 }, + { "Lane9_algn_mrkr_lck", 1, 1 }, + { "Lane8_algn_mrkr_lck", 0, 1 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_0_MAPPING", 0x389d8, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_1_MAPPING", 0x389dc, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_2_MAPPING", 0x389e0, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_3_MAPPING", 0x389e4, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_4_MAPPING", 0x389e8, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_5_MAPPING", 0x389ec, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_6_MAPPING", 0x389f0, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_7_MAPPING", 0x389f4, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_8_MAPPING", 0x389f8, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_9_MAPPING", 0x389fc, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_10_MAPPING", 0x38a00, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_11_MAPPING", 0x38a04, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_12_MAPPING", 0x38a08, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_13_MAPPING", 0x38a0c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_14_MAPPING", 0x38a10, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_15_MAPPING", 0x38a14, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_SCRATCH", 0x38b00, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_CORE_REVISION", 0x38b04, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_CL_INTVL", 0x38b08, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_TX_LANE_THRESH", 0x38b0c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_TX_CDMII_PACE", 0x38b1c, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_AM_0", 0x38b20, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_AM_1", 0x38b24, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO0", 0x38d00, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO1", 0x38d04, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO2", 0x38d08, 0 }, + { "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO3", 0x38d0c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_0", 0x38e00, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_0", 0x38e04, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_0", 0x38e08, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_0", 0x38e0c, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_0", 0x38e10, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_0", 0x38e14, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_0", 0x38e18, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_0", 0x38e1c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_1", 0x38e20, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_1", 0x38e24, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_1", 0x38e28, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_1", 0x38e2c, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_1", 0x38e30, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_1", 0x38e34, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_1", 0x38e38, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_1", 0x38e3c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_2", 0x38e40, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_2", 0x38e44, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_2", 0x38e48, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_2", 0x38e4c, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_2", 0x38e50, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_2", 0x38e54, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_2", 0x38e58, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_2", 0x38e5c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_3", 0x38e60, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_3", 0x38e64, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_3", 0x38e68, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_3", 0x38e6c, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_3", 0x38e70, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_3", 0x38e74, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_3", 0x38e78, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_3", 0x38e7c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_4", 0x38e80, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_4", 0x38e84, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_4", 0x38e88, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_4", 0x38e8c, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_4", 0x38e90, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_4", 0x38e94, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_4", 0x38e98, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_4", 0x38e9c, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_5", 0x38ea0, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_5", 0x38ea4, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_5", 0x38ea8, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_5", 0x38eac, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_5", 0x38eb0, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_5", 0x38eb4, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_5", 0x38eb8, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_5", 0x38ebc, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_6", 0x38ec0, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_6", 0x38ec4, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_6", 0x38ec8, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_6", 0x38ecc, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_6", 0x38ed0, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_6", 0x38ed4, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_6", 0x38ed8, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_6", 0x38edc, 0 }, + { "MAC_MTIP_RS_FEC_CONTROL_0_7", 0x38ee0, 0 }, + { "TC_PAD_ALTER", 10, 1 }, + { "TC_PAD_VALUE", 9, 1 }, + { "KP_ENABLE", 8, 1 }, + { "am16_copy_dis", 3, 1 }, + { "RS_FEC_Degrade_option_ena", 2, 1 }, + { "RS_FEC_Bypass_Error_Indication", 1, 1 }, + { "RS_FEC_Bypass_Correction", 0, 1 }, + { "MAC_MTIP_RS_FEC_STATUS_0_7", 0x38ee4, 0 }, + { "fec_aligned_status", 14, 1 }, + { "amp_lock", 8, 4 }, + { "rx_am_sf_0", 7, 1 }, + { "rx_am_sf_1", 6, 1 }, + { "rx_am_sf_2", 5, 1 }, + { "RS_FEC_degrade_SER", 4, 1 }, + { "RS_FEC_degrade_SER_ability", 3, 1 }, + { "RS_FEC_high_SER", 2, 1 }, + { "RS_FEC_bypass_error_indication_ability", 1, 1 }, + { "RS_FEC_bypass_correction_ability", 0, 1 }, + { "MAC_MTIP_RS_FEC_CCW_LO_0_7", 0x38ee8, 0 }, + { "MAC_MTIP_RS_FEC_CCW_HI_0_7", 0x38eec, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_LO_0_7", 0x38ef0, 0 }, + { "MAC_MTIP_RS_FEC_NCCW_HI_0_7", 0x38ef4, 0 }, + { "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_7", 0x38ef8, 0 }, + { "MAC_MTIP_RS_FEC_DEC_THRESH_0_7", 0x38efc, 0 }, + { "MAC_MTIP_RS_FEC_HISER_CW", 0x38f00, 0 }, + { "MAC_MTIP_RS_FEC_HISER_THRESH", 0x38f04, 0 }, + { "MAC_MTIP_RS_FEC_HISER_TIME", 0x38f08, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_CW", 0x38f10, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_CW_HI", 0x38f14, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_THRESH", 0x38f18, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_THRESH_HI", 0x38f1c, 0 }, + { "MAC_MTIP_RS_DEGRADE_CLEAR", 0x38f20, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_CLEAR_HI", 0x38f24, 0 }, + { "MAC_MTIP_RS_DEGRADE_CLEAR_THRESH", 0x38f28, 0 }, + { "MAC_MTIP_RS_DEGRADE_SET_CLEAR_THRESH_HI", 0x38f2c, 0 }, + { "MAC_MTIP_RS_VL0_0", 0x38f80, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL0_1", 0x38f84, 0 }, + { "MAC_MTIP_RS_VL1_0", 0x38f88, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL1_1", 0x38f8c, 0 }, + { "MAC_MTIP_RS_VL2_0", 0x38f90, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL2_1", 0x38f94, 0 }, + { "MAC_MTIP_RS_VL3_0", 0x38f98, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL3_1", 0x38f9c, 0 }, + { "MAC_MTIP_RS_VL4_0", 0x38fa0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL4_1", 0x38fa4, 0 }, + { "MAC_MTIP_RS_VL5_0", 0x38fa8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL5_1", 0x38fac, 0 }, + { "MAC_MTIP_RS_VL6_0", 0x38fb0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL6_1", 0x38fb4, 0 }, + { "MAC_MTIP_RS_VL7_0", 0x38fb8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL7_1", 0x38fbc, 0 }, + { "MAC_MTIP_RS_VL8_0", 0x38fc0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL8_1", 0x38fc4, 0 }, + { "MAC_MTIP_RS_VL9_0", 0x38fc8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL9_1", 0x38fcc, 0 }, + { "MAC_MTIP_RS_VL10_0", 0x38fd0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL10_1", 0x38fd4, 0 }, + { "MAC_MTIP_RS_VL11_0", 0x38fd8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL11_1", 0x38fdc, 0 }, + { "MAC_MTIP_RS_VL12_0", 0x38fe0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL12_1", 0x38fe4, 0 }, + { "MAC_MTIP_RS_VL13_0", 0x38fe8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL13_1", 0x38fec, 0 }, + { "MAC_MTIP_RS_VL14_0", 0x38ff0, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL14_1", 0x38ff4, 0 }, + { "MAC_MTIP_RS_VL15_0", 0x38ff8, 0 }, + { "M1", 8, 8 }, + { "M0", 0, 8 }, + { "MAC_MTIP_RS_VL15_1", 0x38ffc, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR0_LO", 0x39000, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR0_HI", 0x39004, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR1_LO", 0x39008, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR1_HI", 0x3900c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR2_LO", 0x39010, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR2_HI", 0x39014, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR3_LO", 0x39018, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR3_HI", 0x3901c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR4_LO", 0x39020, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR4_HI", 0x39024, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR5_LO", 0x39028, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR5_HI", 0x3902c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR6_LO", 0x39030, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR6_HI", 0x39034, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR7_LO", 0x39038, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR7_HI", 0x3903c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR8_LO", 0x39040, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR8_HI", 0x39044, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR9_LO", 0x39048, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR9_HI", 0x3904c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR10_LO", 0x39050, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR10_HI", 0x39054, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR11_LO", 0x39058, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR11_HI", 0x3905c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR12_LO", 0x39060, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR12_HI", 0x39064, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR13_LO", 0x39068, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR13_HI", 0x3906c, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR14_LO", 0x39070, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR14_HI", 0x39074, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR15_LO", 0x39078, 0 }, + { "MAC_MTIP_RS_FEC_SYMBLERR15_HI", 0x3907c, 0 }, + { "MAC_MTIP_RS_FEC_VENDOR_CONTROL", 0x39080, 0 }, + { "MAC_MTIP_RS_FEC_VENDOR_INFO_1", 0x39084, 0 }, + { "fec_align_status_lh", 10, 1 }, + { "tx_dp_overflow", 9, 1 }, + { "rx_dp_overflow", 8, 1 }, + { "tx_datapath_restart", 7, 1 }, + { "rx_datapath_restart", 6, 1 }, + { "marker_check_restart", 5, 1 }, + { "fec_align_status_ll", 4, 1 }, + { "amps_lock", 0, 1 }, + { "MAC_MTIP_RS_FEC_VENDOR_INFO_2", 0x39088, 0 }, + { "MAC_MTIP_RS_FEC_VENDOR_REVISION", 0x3908c, 0 }, + { "MAC_MTIP_RS_FEC_VENDOR_ALIGN_STATUS", 0x39090, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_0", 0x39100, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_0", 0x39104, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_0", 0x39108, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_0", 0x3910c, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_0", 0x39110, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_0", 0x39114, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_0", 0x39118, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_0", 0x3911c, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_1", 0x39120, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_1", 0x39124, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_1", 0x39128, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_1", 0x3912c, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_1", 0x39130, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_1", 0x39134, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_1", 0x39138, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_1", 0x3913c, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_2", 0x39140, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_2", 0x39144, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_2", 0x39148, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_2", 0x3914c, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_2", 0x39150, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_2", 0x39154, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_2", 0x39158, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_2", 0x3915c, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_3", 0x39160, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_3", 0x39164, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_3", 0x39168, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_3", 0x3916c, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_3", 0x39170, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_3", 0x39174, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_3", 0x39178, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_3", 0x3917c, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_4", 0x39180, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_4", 0x39184, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_4", 0x39188, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_4", 0x3918c, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_4", 0x39190, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_4", 0x39194, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_4", 0x39198, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_4", 0x3919c, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_5", 0x391a0, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_5", 0x391a4, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_5", 0x391a8, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_5", 0x391ac, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_5", 0x391b0, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_5", 0x391b4, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_5", 0x391b8, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_5", 0x391bc, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_6", 0x391c0, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_6", 0x391c4, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_6", 0x391c8, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_6", 0x391cc, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_6", 0x391d0, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_6", 0x391d4, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_6", 0x391d8, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_6", 0x391dc, 0 }, + { "MAC_MTIP_FEC74_FEC_ABILITY_7", 0x391e0, 0 }, + { "FEC_Error_Indication_Ability", 1, 1 }, + { "FEC_Ability", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_CONTROL_7", 0x391e4, 0 }, + { "FEC_Enable_Error_Indication", 1, 1 }, + { "FEC_Enable", 0, 1 }, + { "MAC_MTIP_FEC74_FEC_STATUS_7", 0x391e8, 0 }, + { "FEC_Locked_1", 1, 1 }, + { "FEC_Locked", 0, 1 }, + { "MAC_MTIP_FEC74_VL0_CCW_LO_7", 0x391ec, 0 }, + { "MAC_MTIP_FEC74_VL0_NCCW_LO_7", 0x391f0, 0 }, + { "MAC_MTIP_FEC74_VL1_CCW_LO_7", 0x391f4, 0 }, + { "MAC_MTIP_FEC74_VL1_NCCW_LO_7", 0x391f8, 0 }, + { "MAC_MTIP_FEC74_COUNTER_HI_7", 0x391fc, 0 }, + { "MAC_BEAN0_CTL", 0x39200, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN0_STATUS", 0x39204, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN0_ABILITY_0", 0x39208, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN0_ABILITY_1", 0x3920c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN0_ABILITY_2", 0x39210, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN0_REM_ABILITY_0", 0x39214, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN0_REM_ABILITY_1", 0x39218, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN0_REM_ABILITY_2", 0x3921c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN0_MS_COUNT", 0x39220, 0 }, + { "MAC_BEAN0_XNP_0", 0x39224, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN0_XNP_1", 0x39228, 0 }, + { "MAC_BEAN0_XNP_2", 0x3922c, 0 }, + { "MAC_LP_BEAN0_XNP_0", 0x39230, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN0_XNP_1", 0x39234, 0 }, + { "MAC_LP_BEAN0_XNP_2", 0x39238, 0 }, + { "MAC_BEAN0_ETH_STATUS", 0x3923c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN0_ETH_STATUS_2", 0x39240, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN1_CTL", 0x39300, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN1_STATUS", 0x39304, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN1_ABILITY_0", 0x39308, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN1_ABILITY_1", 0x3930c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN1_ABILITY_2", 0x39310, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN1_REM_ABILITY_0", 0x39314, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN1_REM_ABILITY_1", 0x39318, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN1_REM_ABILITY_2", 0x3931c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN1_MS_COUNT", 0x39320, 0 }, + { "MAC_BEAN1_XNP_0", 0x39324, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN1_XNP_1", 0x39328, 0 }, + { "MAC_BEAN1_XNP_2", 0x3932c, 0 }, + { "MAC_LP_BEAN1_XNP_0", 0x39330, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN1_XNP_1", 0x39334, 0 }, + { "MAC_LP_BEAN1_XNP_2", 0x39338, 0 }, + { "MAC_BEAN1_ETH_STATUS", 0x3933c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN1_ETH_STATUS_2", 0x39340, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN2_CTL", 0x39400, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN2_STATUS", 0x39404, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN2_ABILITY_0", 0x39408, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN2_ABILITY_1", 0x3940c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN2_ABILITY_2", 0x39410, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN2_REM_ABILITY_0", 0x39414, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN2_REM_ABILITY_1", 0x39418, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN2_REM_ABILITY_2", 0x3941c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN2_MS_COUNT", 0x39420, 0 }, + { "MAC_BEAN2_XNP_0", 0x39424, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN2_XNP_1", 0x39428, 0 }, + { "MAC_BEAN2_XNP_2", 0x3942c, 0 }, + { "MAC_LP_BEAN2_XNP_0", 0x39430, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN2_XNP_1", 0x39434, 0 }, + { "MAC_LP_BEAN2_XNP_2", 0x39438, 0 }, + { "MAC_BEAN2_ETH_STATUS", 0x3943c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN2_ETH_STATUS_2", 0x39440, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN3_CTL", 0x39500, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN3_STATUS", 0x39504, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN3_ABILITY_0", 0x39508, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN3_ABILITY_1", 0x3950c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN3_ABILITY_2", 0x39510, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN3_REM_ABILITY_0", 0x39514, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN3_REM_ABILITY_1", 0x39518, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN3_REM_ABILITY_2", 0x3951c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN3_MS_COUNT", 0x39520, 0 }, + { "MAC_BEAN3_XNP_0", 0x39524, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN3_XNP_1", 0x39528, 0 }, + { "MAC_BEAN3_XNP_2", 0x3952c, 0 }, + { "MAC_LP_BEAN3_XNP_0", 0x39530, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN3_XNP_1", 0x39534, 0 }, + { "MAC_LP_BEAN3_XNP_2", 0x39538, 0 }, + { "MAC_BEAN3_ETH_STATUS", 0x3953c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN3_ETH_STATUS_2", 0x39540, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN4_CTL", 0x39600, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN4_STATUS", 0x39604, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN4_ABILITY_0", 0x39608, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN4_ABILITY_1", 0x3960c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN4_ABILITY_2", 0x39610, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN4_REM_ABILITY_0", 0x39614, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN4_REM_ABILITY_1", 0x39618, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN4_REM_ABILITY_2", 0x3961c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN4_MS_COUNT", 0x39620, 0 }, + { "MAC_BEAN4_XNP_0", 0x39624, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN4_XNP_1", 0x39628, 0 }, + { "MAC_BEAN4_XNP_2", 0x3962c, 0 }, + { "MAC_LP_BEAN4_XNP_0", 0x39630, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN4_XNP_1", 0x39634, 0 }, + { "MAC_LP_BEAN4_XNP_2", 0x39638, 0 }, + { "MAC_BEAN4_ETH_STATUS", 0x3963c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN4_ETH_STATUS_2", 0x39640, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN5_CTL", 0x39700, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN5_STATUS", 0x39704, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN5_ABILITY_0", 0x39708, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN5_ABILITY_1", 0x3970c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN5_ABILITY_2", 0x39710, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN5_REM_ABILITY_0", 0x39714, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN5_REM_ABILITY_1", 0x39718, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN5_REM_ABILITY_2", 0x3971c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN5_MS_COUNT", 0x39720, 0 }, + { "MAC_BEAN5_XNP_0", 0x39724, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN5_XNP_1", 0x39728, 0 }, + { "MAC_BEAN5_XNP_2", 0x3972c, 0 }, + { "MAC_LP_BEAN5_XNP_0", 0x39730, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN5_XNP_1", 0x39734, 0 }, + { "MAC_LP_BEAN5_XNP_2", 0x39738, 0 }, + { "MAC_BEAN5_ETH_STATUS", 0x3973c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN5_ETH_STATUS_2", 0x39740, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN6_CTL", 0x39800, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN6_STATUS", 0x39804, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN6_ABILITY_0", 0x39808, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN6_ABILITY_1", 0x3980c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN6_ABILITY_2", 0x39810, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN6_REM_ABILITY_0", 0x39814, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN6_REM_ABILITY_1", 0x39818, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN6_REM_ABILITY_2", 0x3981c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN6_MS_COUNT", 0x39820, 0 }, + { "MAC_BEAN6_XNP_0", 0x39824, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN6_XNP_1", 0x39828, 0 }, + { "MAC_BEAN6_XNP_2", 0x3982c, 0 }, + { "MAC_LP_BEAN6_XNP_0", 0x39830, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN6_XNP_1", 0x39834, 0 }, + { "MAC_LP_BEAN6_XNP_2", 0x39838, 0 }, + { "MAC_BEAN6_ETH_STATUS", 0x3983c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN6_ETH_STATUS_2", 0x39840, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_BEAN7_CTL", 0x39900, 0 }, + { "AN_RESET", 15, 1 }, + { "EXT_NXP_CTRL", 13, 1 }, + { "BEAN_EN", 12, 1 }, + { "RESTART_BEAN", 9, 1 }, + { "MAC_BEAN7_STATUS", 0x39904, 0 }, + { "PDF", 9, 1 }, + { "EXT_NXP_STATUS", 7, 1 }, + { "PAGE_RCVD", 6, 1 }, + { "BEAN_COMPLETE", 5, 1 }, + { "REM_FAULT_STATUS", 4, 1 }, + { "BEAN_ABILITY", 3, 1 }, + { "LINK_STATUS", 2, 1 }, + { "LP_BEAN_ABILITY", 0, 1 }, + { "MAC_BEAN7_ABILITY_0", 0x39908, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN7_ABILITY_1", 0x3990c, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN7_ABILITY_2", 0x39910, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN7_REM_ABILITY_0", 0x39914, 0 }, + { "NXP", 15, 1 }, + { "ACK", 14, 1 }, + { "REM_FAULT", 13, 1 }, + { "PAUSE_ABILITY", 10, 3 }, + { "ECHO_NONCE", 5, 5 }, + { "SELECTOR", 0, 5 }, + { "MAC_BEAN7_REM_ABILITY_1", 0x39918, 0 }, + { "TECH_ABILITY_1", 5, 11 }, + { "TX_NONCE", 0, 5 }, + { "MAC_BEAN7_REM_ABILITY_2", 0x3991c, 0 }, + { "FEC_ABILITY", 12, 4 }, + { "TECH_ABILITY_2", 0, 12 }, + { "MAC_BEAN7_MS_COUNT", 0x39920, 0 }, + { "MAC_BEAN7_XNP_0", 0x39924, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_BEAN7_XNP_1", 0x39928, 0 }, + { "MAC_BEAN7_XNP_2", 0x3992c, 0 }, + { "MAC_LP_BEAN7_XNP_0", 0x39930, 0 }, + { "XNP", 15, 1 }, + { "ACKNOWLEDGE", 14, 1 }, + { "MP", 13, 1 }, + { "ACK2", 12, 1 }, + { "TOGGLE", 11, 1 }, + { "MU", 0, 11 }, + { "MAC_LP_BEAN7_XNP_1", 0x39934, 0 }, + { "MAC_LP_BEAN7_XNP_2", 0x39938, 0 }, + { "MAC_BEAN7_ETH_STATUS", 0x3993c, 0 }, + { "5GKR", 15, 1 }, + { "2p5GKX", 14, 1 }, + { "25G_KR", 13, 1 }, + { "25G_KR_S", 12, 1 }, + { "100GCR4", 11, 1 }, + { "100GKR4", 10, 1 }, + { "100GKP4", 9, 1 }, + { "100GCR10", 8, 1 }, + { "RS_FEC", 7, 1 }, + { "40GCR4", 6, 1 }, + { "40GKR4", 5, 1 }, + { "FC_FEC", 4, 1 }, + { "10GKR", 3, 1 }, + { "10GKX4", 2, 1 }, + { "1GKX", 1, 1 }, + { "MAC_BEAN7_ETH_STATUS_2", 0x39940, 0 }, + { "RS_FEC_negotiated", 6, 1 }, + { "400GKR4CR4", 5, 1 }, + { "200GKR2CR2", 4, 1 }, + { "100GKR1CR1", 3, 1 }, + { "200GKR4CR4", 2, 1 }, + { "100GKR2CR2", 1, 1 }, + { "50GKRCR", 0, 1 }, + { "MAC_MTIP_ETHERSTATS_DATA_HI", 0x39a00, 0 }, + { "MAC_MTIP_ETHERSTATS_STATN_STATUS", 0x39a04, 0 }, + { "MAC_MTIP_ETHERSTATS_STATN_CONFIG", 0x39a08, 0 }, + { "RESET", 31, 1 }, + { "CLEAR_ON_READ", 1, 1 }, + { "SATURATE", 0, 1 }, + { "MAC_MTIP_ETHERSTATS_STATN_CONTROL", 0x39a0c, 0 }, + { "CMD_CLEAR_TX", 31, 1 }, + { "CMD_CLEAR_RX", 30, 1 }, + { "CLEAR_PRE", 29, 1 }, + { "CMD_CAPTURE_TX", 28, 1 }, + { "CMD_CAPTURE_RX", 27, 1 }, + { "PORTMASK", 0, 8 }, + { "MAC_MTIP_ETHERSTATS_STATN_CLEARVALUE_LO", 0x39a10, 0 }, + { "MAC_MTIP_ETHERSTATS_STATN_CLEARVALUE_HI", 0x39a14, 0 }, + { "MAC_MTIP_ETHERSTATS_DATA_HI_1", 0x39a1c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_0", 0x39a20, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_1", 0x39a24, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_2", 0x39a28, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_3", 0x39a2c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_4", 0x39a30, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_5", 0x39a34, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_6", 0x39a38, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_7", 0x39a3c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_8", 0x39a40, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_9", 0x39a44, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_10", 0x39a48, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_11", 0x39a4c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_12", 0x39a50, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_13", 0x39a54, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_14", 0x39a58, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_15", 0x39a5c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_16", 0x39a60, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_17", 0x39a64, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_18", 0x39a68, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_19", 0x39a6c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_20", 0x39a70, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_21", 0x39a74, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_22", 0x39a78, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_23", 0x39a7c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_24", 0x39a80, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_25", 0x39a84, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_26", 0x39a88, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_27", 0x39a8c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_28", 0x39a90, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_29", 0x39a94, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_30", 0x39a98, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_31", 0x39a9c, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_32", 0x39aa0, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_33", 0x39aa4, 0 }, + { "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_34", 0x39aa8, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSOCTETS", 0x39b00, 0 }, + { "MAC_MTIP_ETHERSTATS0_OCTETSRECEIVEDOK", 0x39b04, 0 }, + { "MAC_MTIP_ETHERSTATS0_AALIGNMENTERRORS", 0x39b08, 0 }, + { "MAC_MTIP_ETHERSTATS0_APAUSEMACCTRLFRAMESRECEIVED", 0x39b0c, 0 }, + { "MAC_MTIP_ETHERSTATS0_AFRAMETOOLONGERRORS", 0x39b10, 0 }, + { "MAC_MTIP_ETHERSTATS0_AINRANGELENGTHERRORS", 0x39b14, 0 }, + { "MAC_MTIP_ETHERSTATS0_AFRAMESRECEIVEDOK", 0x39b18, 0 }, + { "MAC_MTIP_ETHERSTATS0_AFRAMECHECKSEQUENCEERRORS", 0x39b1c, 0 }, + { "MAC_MTIP_ETHERSTATS0_VLANRECEIVEDOK", 0x39b20, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFINERRORS_RX", 0x39b24, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFINUCASTPKTS_RX", 0x39b28, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFINMULTICASTPKTS_RX", 0x39b2c, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFINBROADCASTPKTS_RX", 0x39b30, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSDROPEVENTS_RX", 0x39b34, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS_RX", 0x39b38, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSUNDERSIZEPKTS_RX", 0x39b3c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS64OCTETS_RX", 0x39b40, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39b44, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39b48, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39b4c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39b50, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39b54, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39b58, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSOVERSIZEPKTS_RX", 0x39b5c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSJABBERS_RX", 0x39b60, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSFRAGMENTS_RX", 0x39b64, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39b68, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39b6c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39b70, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39b74, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39b78, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39b7c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39b80, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39b84, 0 }, + { "MAC_MTIP_ETHERSTATS0_AMACCONTROLFRAMESRECEIVED_RX", 0x39b88, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSOCTETS", 0x39b8c, 0 }, + { "MAC_MTIP_ETHERSTATS1_OCTETSRECEIVEDOK", 0x39b90, 0 }, + { "MAC_MTIP_ETHERSTATS1_AALIGNMENTERRORS", 0x39b94, 0 }, + { "MAC_MTIP_ETHERSTATS1_APAUSEMACCTRLFRAMESRECEIVED", 0x39b98, 0 }, + { "MAC_MTIP_ETHERSTATS1_AFRAMETOOLONGERRORS", 0x39b9c, 0 }, + { "MAC_MTIP_ETHERSTATS1_AINRANGELENGTHERRORS", 0x39ba0, 0 }, + { "MAC_MTIP_ETHERSTATS1_AFRAMESRECEIVEDOK", 0x39ba4, 0 }, + { "MAC_MTIP_ETHERSTATS1_AFRAMECHECKSEQUENCEERRORS", 0x39ba8, 0 }, + { "MAC_MTIP_ETHERSTATS1_VLANRECEIVEDOK", 0x39bac, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFINERRORS_RX", 0x39bb0, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFINUCASTPKTS_RX", 0x39bb4, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFINMULTICASTPKTS_RX", 0x39bb8, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFINBROADCASTPKTS_RX", 0x39bbc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSDROPEVENTS_RX", 0x39bc0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS_RX", 0x39bc4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSUNDERSIZEPKTS_RX", 0x39bc8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS64OCTETS_RX", 0x39bcc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39bd0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39bd4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39bd8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39bdc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39be0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39be4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSOVERSIZEPKTS_RX", 0x39be8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSJABBERS_RX", 0x39bec, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSFRAGMENTS_RX", 0x39bf0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39bf4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39bf8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39bfc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39c00, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39c04, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39c08, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39c0c, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39c10, 0 }, + { "MAC_MTIP_ETHERSTATS1_AMACCONTROLFRAMESRECEIVED_RX", 0x39c14, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSOCTETS", 0x39c18, 0 }, + { "MAC_MTIP_ETHERSTATS2_OCTETSRECEIVEDOK", 0x39c1c, 0 }, + { "MAC_MTIP_ETHERSTATS2_AALIGNMENTERRORS", 0x39c20, 0 }, + { "MAC_MTIP_ETHERSTATS2_APAUSEMACCTRLFRAMESRECEIVED", 0x39c24, 0 }, + { "MAC_MTIP_ETHERSTATS2_AFRAMETOOLONGERRORS", 0x39c28, 0 }, + { "MAC_MTIP_ETHERSTATS2_AINRANGELENGTHERRORS", 0x39c2c, 0 }, + { "MAC_MTIP_ETHERSTATS2_AFRAMESRECEIVEDOK", 0x39c30, 0 }, + { "MAC_MTIP_ETHERSTATS2_AFRAMECHECKSEQUENCEERRORS", 0x39c34, 0 }, + { "MAC_MTIP_ETHERSTATS2_VLANRECEIVEDOK", 0x39c38, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFINERRORS_RX", 0x39c3c, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFINUCASTPKTS_RX", 0x39c40, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFINMULTICASTPKTS_RX", 0x39c44, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFINBROADCASTPKTS_RX", 0x39c48, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSDROPEVENTS_RX", 0x39c4c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS_RX", 0x39c50, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSUNDERSIZEPKTS_RX", 0x39c54, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS64OCTETS_RX", 0x39c58, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39c5c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39c60, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39c64, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39c68, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39c6c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39c70, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSOVERSIZEPKTS_RX", 0x39c74, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSJABBERS_RX", 0x39c78, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSFRAGMENTS_RX", 0x39c7c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39c80, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39c84, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39c88, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39c8c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39c90, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39c94, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39c98, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39c9c, 0 }, + { "MAC_MTIP_ETHERSTATS2_AMACCONTROLFRAMESRECEIVED_RX", 0x39ca0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSOCTETS", 0x39ca4, 0 }, + { "MAC_MTIP_ETHERSTATS3_OCTETSRECEIVEDOK", 0x39ca8, 0 }, + { "MAC_MTIP_ETHERSTATS3_AALIGNMENTERRORS", 0x39cac, 0 }, + { "MAC_MTIP_ETHERSTATS3_APAUSEMACCTRLFRAMESRECEIVED", 0x39cb0, 0 }, + { "MAC_MTIP_ETHERSTATS3_AFRAMETOOLONGERRORS", 0x39cb4, 0 }, + { "MAC_MTIP_ETHERSTATS3_AINRANGELENGTHERRORS", 0x39cb8, 0 }, + { "MAC_MTIP_ETHERSTATS3_AFRAMESRECEIVEDOK", 0x39cbc, 0 }, + { "MAC_MTIP_ETHERSTATS3_AFRAMECHECKSEQUENCEERRORS", 0x39cc0, 0 }, + { "MAC_MTIP_ETHERSTATS3_VLANRECEIVEDOK", 0x39cc4, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFINERRORS_RX", 0x39cc8, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFINUCASTPKTS_RX", 0x39ccc, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFINMULTICASTPKTS_RX", 0x39cd0, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFINBROADCASTPKTS_RX", 0x39cd4, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSDROPEVENTS_RX", 0x39cd8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS_RX", 0x39cdc, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSUNDERSIZEPKTS_RX", 0x39ce0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS64OCTETS_RX", 0x39ce4, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39ce8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39cec, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39cf0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39cf4, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39cf8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39cfc, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSOVERSIZEPKTS_RX", 0x39d00, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSJABBERS_RX", 0x39d04, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSFRAGMENTS_RX", 0x39d08, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39d0c, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39d10, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39d14, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39d18, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39d1c, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39d20, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39d24, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39d28, 0 }, + { "MAC_MTIP_ETHERSTATS3_AMACCONTROLFRAMESRECEIVED_RX", 0x39d2c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSOCTETS_TX", 0x39d30, 0 }, + { "MAC_MTIP_ETHERSTATS0_OCTETSTRANSMITTEDOK_TX", 0x39d34, 0 }, + { "MAC_MTIP_ETHERSTATS0_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39d38, 0 }, + { "MAC_MTIP_ETHERSTATS0_AFRAMESTRANSMITTEDOK_TX", 0x39d3c, 0 }, + { "MAC_MTIP_ETHERSTATS0_VLANTRANSMITTEDOK_TX", 0x39d40, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFOUTERRORS_TX", 0x39d44, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFOUTUCASTPKTS_TX", 0x39d48, 0 }, + { "MAC_MTIP_ETHERSTATS0IFOUTMULTICASTPKTS_TX", 0x39d4c, 0 }, + { "MAC_MTIP_ETHERSTATS0_IFOUTBROADCASTPKTS_TX", 0x39d50, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS64OCTETS_TX", 0x39d54, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39d58, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39d5c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39d60, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39d64, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39d68, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39d6c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39d70, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39d74, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39d78, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39d7c, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39d80, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39d84, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39d88, 0 }, + { "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39d8c, 0 }, + { "MAC_MTIP_ETHERSTATS0_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39d90, 0 }, + { "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS_TX", 0x39d94, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSOCTETS_TX", 0x39d98, 0 }, + { "MAC_MTIP_ETHERSTATS1_OCTETSTRANSMITTEDOK_TX", 0x39d9c, 0 }, + { "MAC_MTIP_ETHERSTATS1_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39da0, 0 }, + { "MAC_MTIP_ETHERSTATS1_AFRAMESTRANSMITTEDOK_TX", 0x39da4, 0 }, + { "MAC_MTIP_ETHERSTATS1_VLANTRANSMITTEDOK_TX", 0x39da8, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFOUTERRORS_TX", 0x39dac, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFOUTUCASTPKTS_TX", 0x39db0, 0 }, + { "MAC_MTIP_ETHERSTATS1IFOUTMULTICASTPKTS_TX", 0x39db4, 0 }, + { "MAC_MTIP_ETHERSTATS1_IFOUTBROADCASTPKTS_TX", 0x39db8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS64OCTETS_TX", 0x39dbc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39dc0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39dc4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39dc8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39dcc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39dd0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39dd4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39dd8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39ddc, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39de0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39de4, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39de8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39dec, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39df0, 0 }, + { "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39df4, 0 }, + { "MAC_MTIP_ETHERSTATS1_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39df8, 0 }, + { "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS_TX", 0x39dfc, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSOCTETS_TX", 0x39e00, 0 }, + { "MAC_MTIP_ETHERSTATS2_OCTETSTRANSMITTEDOK_TX", 0x39e04, 0 }, + { "MAC_MTIP_ETHERSTATS2_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39e08, 0 }, + { "MAC_MTIP_ETHERSTATS2_AFRAMESTRANSMITTEDOK_TX", 0x39e0c, 0 }, + { "MAC_MTIP_ETHERSTATS2_VLANTRANSMITTEDOK_TX", 0x39e10, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFOUTERRORS_TX", 0x39e14, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFOUTUCASTPKTS_TX", 0x39e18, 0 }, + { "MAC_MTIP_ETHERSTATS2IFOUTMULTICASTPKTS_TX", 0x39e1c, 0 }, + { "MAC_MTIP_ETHERSTATS2_IFOUTBROADCASTPKTS_TX", 0x39e20, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS64OCTETS_TX", 0x39e24, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39e28, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39e2c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39e30, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39e34, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39e38, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39e3c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39e40, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39e44, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39e48, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39e4c, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39e50, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39e54, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39e58, 0 }, + { "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39e5c, 0 }, + { "MAC_MTIP_ETHERSTATS2_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39e60, 0 }, + { "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS_TX", 0x39e64, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSOCTETS_TX", 0x39e68, 0 }, + { "MAC_MTIP_ETHERSTATS3_OCTETSTRANSMITTEDOK_TX", 0x39e6c, 0 }, + { "MAC_MTIP_ETHERSTATS3_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39e70, 0 }, + { "MAC_MTIP_ETHERSTATS3_AFRAMESTRANSMITTEDOK_TX", 0x39e74, 0 }, + { "MAC_MTIP_ETHERSTATS3_VLANTRANSMITTEDOK_TX", 0x39e78, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFOUTERRORS_TX", 0x39e7c, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFOUTUCASTPKTS_TX", 0x39e80, 0 }, + { "MAC_MTIP_ETHERSTATS3IFOUTMULTICASTPKTS_TX", 0x39e84, 0 }, + { "MAC_MTIP_ETHERSTATS3_IFOUTBROADCASTPKTS_TX", 0x39e88, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS64OCTETS_TX", 0x39e8c, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39e90, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39e94, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39e98, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39e9c, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39ea0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39ea4, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39ea8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39eac, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39eb0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39eb4, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39eb8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39ebc, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39ec0, 0 }, + { "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39ec4, 0 }, + { "MAC_MTIP_ETHERSTATS3_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39ec8, 0 }, + { "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS_TX", 0x39ecc, 0 }, + { "MAC_IOS_CTRL", 0x3a000, 0 }, + { "sub_block_sel", 28, 3 }, + { "quad_broadcast_en", 24, 1 }, + { "auto_incr", 20, 1 }, + { "addr", 0, 19 }, + { "MAC_IOS_DATA", 0x3a004, 0 }, + { "MAC_IOS_BGR_RST", 0x3a050, 0 }, + { "MAC_IOS_BGR_CFG", 0x3a054, 0 }, + { "MAC_IOS_QUAD0_CFG", 0x3a058, 0 }, + { "quad0_ch3_rstn", 5, 1 }, + { "quad0_ch2_rstn", 4, 1 }, + { "quad0_ch1_rstn", 3, 1 }, + { "quad0_ch0_rstn", 2, 1 }, + { "quad0_rstn", 1, 1 }, + { "pll0_rstn", 0, 1 }, + { "MAC_IOS_QUAD1_CFG", 0x3a05c, 0 }, + { "quad1_ch3_rstn", 5, 1 }, + { "quad1_ch2_rstn", 4, 1 }, + { "quad1_ch1_rstn", 3, 1 }, + { "quad1_ch0_rstn", 2, 1 }, + { "quad1_rstn", 1, 1 }, + { "pll1_rstn", 0, 1 }, + { "MAC_IOS_SCRATCHPAD0", 0x3a060, 0 }, + { "MAC_IOS_SCRATCHPAD1", 0x3a064, 0 }, + { "MAC_IOS_SCRATCHPAD2", 0x3a068, 0 }, + { "MAC_IOS_SCRATCHPAD3", 0x3a06c, 0 }, + { "data0", 1, 31 }, + { "i2c_mode", 0, 1 }, + { "MAC_IOS_BGR_DBG_COUNTER", 0x3a070, 0 }, + { "MAC_IOS_QUAD0_DBG_COUNTER", 0x3a074, 0 }, + { "MAC_IOS_PLL0_DBG_COUNTER", 0x3a078, 0 }, + { "MAC_IOS_QUAD1_DBG_COUNTER", 0x3a07c, 0 }, + { "MAC_IOS_PLL1_DBG_COUNTER", 0x3a080, 0 }, + { "MAC_IOS_DBG_CLK_CFG", 0x3a084, 0 }, + { "dbg_clk_mux_gpio", 3, 1 }, + { "dbg_clk_mux_sel", 0, 3 }, + { "MAC_IOS_INTR_EN_QUAD0", 0x3a090, 0 }, + { "Q0_MAILBOX_INT_assert", 24, 1 }, + { "Q0_TRAINING_FAILURE_3_assert", 23, 1 }, + { "Q0_TRAINING_FAILURE_2_assert", 22, 1 }, + { "Q0_TRAINING_FAILURE_1_assert", 21, 1 }, + { "Q0_TRAINING_FAILURE_0_assert", 20, 1 }, + { "Q0_TRAINING_COMPLETE_3_assert", 19, 1 }, + { "Q0_TRAINING_COMPLETE_2_assert", 18, 1 }, + { "Q0_TRAINING_COMPLETE_1_assert", 17, 1 }, + { "Q0_TRAINING_COMPLETE_0_assert", 16, 1 }, + { "Q0_AN_TX_INT_3_assert", 15, 1 }, + { "Q0_AN_TX_INT_2_assert", 14, 1 }, + { "Q0_AN_TX_INT_1_assert", 13, 1 }, + { "Q0_AN_TX_INT_0_assert", 12, 1 }, + { "Q0_SIGNAL_DETECT_3_assert", 11, 1 }, + { "Q0_SIGNAL_DETECT_2_assert", 10, 1 }, + { "Q0_SIGNAL_DETECT_1_assert", 9, 1 }, + { "Q0_SIGNAL_DETECT_0_assert", 8, 1 }, + { "Q0_CDR_LOL_3_assert", 7, 1 }, + { "Q0_CDR_LOL_2_assert", 6, 1 }, + { "Q0_CDR_LOL_1_assert", 5, 1 }, + { "Q0_CDR_LOL_0_assert", 4, 1 }, + { "Q0_LOS_3_assert", 3, 1 }, + { "Q0_LOS_2_assert", 2, 1 }, + { "Q0_LOS_1_assert", 1, 1 }, + { "Q0_LOS_0_assert", 0, 1 }, + { "MAC_IOS_INTR_CAUSE_QUAD0", 0x3a094, 0 }, + { "Q0_MAILBOX_INT_assert", 24, 1 }, + { "Q0_TRAINING_FAILURE_3_assert", 23, 1 }, + { "Q0_TRAINING_FAILURE_2_assert", 22, 1 }, + { "Q0_TRAINING_FAILURE_1_assert", 21, 1 }, + { "Q0_TRAINING_FAILURE_0_assert", 20, 1 }, + { "Q0_TRAINING_COMPLETE_3_assert", 19, 1 }, + { "Q0_TRAINING_COMPLETE_2_assert", 18, 1 }, + { "Q0_TRAINING_COMPLETE_1_assert", 17, 1 }, + { "Q0_TRAINING_COMPLETE_0_assert", 16, 1 }, + { "Q0_AN_TX_INT_3_assert", 15, 1 }, + { "Q0_AN_TX_INT_2_assert", 14, 1 }, + { "Q0_AN_TX_INT_1_assert", 13, 1 }, + { "Q0_AN_TX_INT_0_assert", 12, 1 }, + { "Q0_SIGNAL_DETECT_3_assert", 11, 1 }, + { "Q0_SIGNAL_DETECT_2_assert", 10, 1 }, + { "Q0_SIGNAL_DETECT_1_assert", 9, 1 }, + { "Q0_SIGNAL_DETECT_0_assert", 8, 1 }, + { "Q0_CDR_LOL_3_assert", 7, 1 }, + { "Q0_CDR_LOL_2_assert", 6, 1 }, + { "Q0_CDR_LOL_1_assert", 5, 1 }, + { "Q0_CDR_LOL_0_assert", 4, 1 }, + { "Q0_LOS_3_assert", 3, 1 }, + { "Q0_LOS_2_assert", 2, 1 }, + { "Q0_LOS_1_assert", 1, 1 }, + { "Q0_LOS_0_assert", 0, 1 }, + { "MAC_IOS_INTR_EN_QUAD1", 0x3a098, 0 }, + { "Q1_MAILBOX_INT_assert", 24, 1 }, + { "Q1_TRAINING_FAILURE_3_assert", 23, 1 }, + { "Q1_TRAINING_FAILURE_2_assert", 22, 1 }, + { "Q1_TRAINING_FAILURE_1_assert", 21, 1 }, + { "Q1_TRAINING_FAILURE_0_assert", 20, 1 }, + { "Q1_TRAINING_COMPLETE_3_assert", 19, 1 }, + { "Q1_TRAINING_COMPLETE_2_assert", 18, 1 }, + { "Q1_TRAINING_COMPLETE_1_assert", 17, 1 }, + { "Q1_TRAINING_COMPLETE_0_assert", 16, 1 }, + { "Q1_AN_TX_INT_3_assert", 15, 1 }, + { "Q1_AN_TX_INT_2_assert", 14, 1 }, + { "Q1_AN_TX_INT_1_assert", 13, 1 }, + { "Q1_AN_TX_INT_0_assert", 12, 1 }, + { "Q1_SIGNAL_DETECT_3_assert", 11, 1 }, + { "Q1_SIGNAL_DETECT_2_assert", 10, 1 }, + { "Q1_SIGNAL_DETECT_1_assert", 9, 1 }, + { "Q1_SIGNAL_DETECT_0_assert", 8, 1 }, + { "Q1_CDR_LOL_3_assert", 7, 1 }, + { "Q1_CDR_LOL_2_assert", 6, 1 }, + { "Q1_CDR_LOL_1_assert", 5, 1 }, + { "Q1_CDR_LOL_0_assert", 4, 1 }, + { "Q1_LOS_3_assert", 3, 1 }, + { "Q1_LOS_2_assert", 2, 1 }, + { "Q1_LOS_1_assert", 1, 1 }, + { "Q1_LOS_0_assert", 0, 1 }, + { "MAC_IOS_INTR_CAUSE_QUAD1", 0x3a09c, 0 }, + { "Q1_MAILBOX_INT_assert", 24, 1 }, + { "Q1_TRAINING_FAILURE_3_assert", 23, 1 }, + { "Q1_TRAINING_FAILURE_2_assert", 22, 1 }, + { "Q1_TRAINING_FAILURE_1_assert", 21, 1 }, + { "Q1_TRAINING_FAILURE_0_assert", 20, 1 }, + { "Q1_TRAINING_COMPLETE_3_assert", 19, 1 }, + { "Q1_TRAINING_COMPLETE_2_assert", 18, 1 }, + { "Q1_TRAINING_COMPLETE_1_assert", 17, 1 }, + { "Q1_TRAINING_COMPLETE_0_assert", 16, 1 }, + { "Q1_AN_TX_INT_3_assert", 15, 1 }, + { "Q1_AN_TX_INT_2_assert", 14, 1 }, + { "Q1_AN_TX_INT_1_assert", 13, 1 }, + { "Q1_AN_TX_INT_0_assert", 12, 1 }, + { "Q1_SIGNAL_DETECT_3_assert", 11, 1 }, + { "Q1_SIGNAL_DETECT_2_assert", 10, 1 }, + { "Q1_SIGNAL_DETECT_1_assert", 9, 1 }, + { "Q1_SIGNAL_DETECT_0_assert", 8, 1 }, + { "Q1_CDR_LOL_3_assert", 7, 1 }, + { "Q1_CDR_LOL_2_assert", 6, 1 }, + { "Q1_CDR_LOL_1_assert", 5, 1 }, + { "Q1_CDR_LOL_0_assert", 4, 1 }, + { "Q1_LOS_3_assert", 3, 1 }, + { "Q1_LOS_2_assert", 2, 1 }, + { "Q1_LOS_1_assert", 1, 1 }, + { "Q1_LOS_0_assert", 0, 1 }, + { "MAC_MTIP_PCS_1G_0_CONTROL", 0x3e000, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_Sel_1", 13, 1 }, + { "Auto_Neg_Ena", 12, 1 }, + { "power_down", 11, 1 }, + { "isolate", 10, 1 }, + { "restart_auto_neg", 9, 1 }, + { "duplex_mode", 8, 1 }, + { "collision_test", 7, 1 }, + { "Speed_Sel_0", 6, 1 }, + { "MAC_MTIP_PCS_1G_0_STATUS", 0x3e004, 0 }, + { "100Base_T4", 15, 1 }, + { "100Base_X_full_duplex", 14, 1 }, + { "100Base_X_half_duplex", 13, 1 }, + { "10Mbps_full_duplex", 12, 1 }, + { "10Mbps_half_duplex", 11, 1 }, + { "100Base_T2_half_duplex1", 10, 1 }, + { "100Base_T2_half_duplex0", 9, 1 }, + { "Extended_status", 8, 1 }, + { "Auto_neg_complete", 5, 1 }, + { "Remote_fault", 4, 1 }, + { "Auto_neg_ability", 3, 1 }, + { "Link_status", 2, 1 }, + { "Jabber_detect", 1, 1 }, + { "extended_capability", 0, 1 }, + { "MAC_MTIP_PCS_1G_0_PHY_IDENTIFIER_0", 0x3e008, 0 }, + { "MAC_MTIP_PCS_1G_0_PHY_IDENTIFIER_1", 0x3e00c, 0 }, + { "MAC_MTIP_PCS_1G_0_DEV_ABILITY", 0x3e010, 0 }, + { "ACK", 14, 1 }, + { "EEE_Clock_Stop_enable", 8, 1 }, + { "MAC_MTIP_PCS_1G_0_PARTNER_ABILITY", 0x3e014, 0 }, + { "Copper_Link_Status", 15, 1 }, + { "ACK", 14, 1 }, + { "Copper_Duplex_Status", 12, 1 }, + { "Copper_Speed", 10, 2 }, + { "EEE_Capability", 9, 1 }, + { "EEE_Clock_Stop_Capability", 8, 1 }, + { "MAC_MTIP_PCS_1G_0_AN_EXPANSION", 0x3e018, 0 }, + { "Next_Page_Able", 2, 1 }, + { "Page_Receive", 1, 1 }, + { "MAC_MTIP_PCS_1G_0_NP_TX", 0x3e01c, 0 }, + { "MAC_MTIP_PCS_1G_0_LP_NP_RX", 0x3e020, 0 }, + { "NP", 15, 1 }, + { "Ack", 14, 1 }, + { "MP", 13, 1 }, + { "Ack2", 12, 1 }, + { "Toggle", 11, 1 }, + { "data", 0, 11 }, + { "MAC_MTIP_PCS_1G_0_EXTENDED_STATUS", 0x3e03c, 0 }, + { "MAC_MTIP_PCS_1G_0_SCRATCH", 0x3e040, 0 }, + { "MAC_MTIP_PCS_1G_0_REV", 0x3e044, 0 }, + { "MAC_MTIP_PCS_1G_0_LINK_TIMER_0", 0x3e048, 0 }, + { "MAC_MTIP_PCS_1G_0_LINK_TIMER_1", 0x3e04c, 0 }, + { "MAC_MTIP_PCS_1G_0_IF_MODE", 0x3e050, 0 }, + { "SGMII_DUPLEX", 4, 1 }, + { "SGMII_SPEED", 2, 2 }, + { "USE_SGMII_AN", 1, 1 }, + { "SGMII_ENA", 0, 1 }, + { "MAC_MTIP_PCS_1G_0_DEC_ERR_CNT", 0x3e054, 0 }, + { "MAC_MTIP_PCS_1G_0_VENDOR_CONTROL", 0x3e058, 0 }, + { "SGPCS_ENA_ST", 15, 1 }, + { "CFG_CLOCK_RATE", 4, 4 }, + { "SGPCS_ENA_R", 0, 1 }, + { "MAC_MTIP_PCS_1G_0_SD_BIT_SLIP", 0x3e05c, 0 }, + { "MAC_MTIP_PCS_1G_1_CONTROL", 0x3e100, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_Sel_1", 13, 1 }, + { "Auto_Neg_Ena", 12, 1 }, + { "power_down", 11, 1 }, + { "isolate", 10, 1 }, + { "restart_auto_neg", 9, 1 }, + { "duplex_mode", 8, 1 }, + { "collision_test", 7, 1 }, + { "Speed_Sel_0", 6, 1 }, + { "MAC_MTIP_PCS_1G_1_STATUS", 0x3e104, 0 }, + { "100Base_T4", 15, 1 }, + { "100Base_X_full_duplex", 14, 1 }, + { "100Base_X_half_duplex", 13, 1 }, + { "10Mbps_full_duplex", 12, 1 }, + { "10Mbps_half_duplex", 11, 1 }, + { "100Base_T2_half_duplex1", 10, 1 }, + { "100Base_T2_half_duplex0", 9, 1 }, + { "Extended_status", 8, 1 }, + { "Auto_neg_complete", 5, 1 }, + { "Remote_fault", 4, 1 }, + { "Auto_neg_ability", 3, 1 }, + { "Link_status", 2, 1 }, + { "Jabber_detect", 1, 1 }, + { "extended_capability", 0, 1 }, + { "MAC_MTIP_PCS_1G_1_PHY_IDENTIFIER_0", 0x3e108, 0 }, + { "MAC_MTIP_PCS_1G_1_PHY_IDENTIFIER_1", 0x3e10c, 0 }, + { "MAC_MTIP_PCS_1G_1_DEV_ABILITY", 0x3e110, 0 }, + { "ACK", 14, 1 }, + { "EEE_Clock_Stop_enable", 8, 1 }, + { "MAC_MTIP_PCS_1G_1_PARTNER_ABILITY", 0x3e114, 0 }, + { "Copper_Link_Status", 15, 1 }, + { "ACK", 14, 1 }, + { "Copper_Duplex_Status", 12, 1 }, + { "Copper_Speed", 10, 2 }, + { "EEE_Capability", 9, 1 }, + { "EEE_Clock_Stop_Capability", 8, 1 }, + { "MAC_MTIP_PCS_1G_1_AN_EXPANSION", 0x3e118, 0 }, + { "Next_Page_Able", 2, 1 }, + { "Page_Receive", 1, 1 }, + { "MAC_MTIP_PCS_1G_1_NP_TX", 0x3e11c, 0 }, + { "MAC_MTIP_PCS_1G_1_LP_NP_RX", 0x3e120, 0 }, + { "NP", 15, 1 }, + { "Ack", 14, 1 }, + { "MP", 13, 1 }, + { "Ack2", 12, 1 }, + { "Toggle", 11, 1 }, + { "data", 0, 11 }, + { "MAC_MTIP_PCS_1G_1_EXTENDED_STATUS", 0x3e13c, 0 }, + { "MAC_MTIP_PCS_1G_1_SCRATCH", 0x3e140, 0 }, + { "MAC_MTIP_PCS_1G_1_REV", 0x3e144, 0 }, + { "MAC_MTIP_PCS_1G_1_LINK_TIMER_0", 0x3e148, 0 }, + { "MAC_MTIP_PCS_1G_1_LINK_TIMER_1", 0x3e14c, 0 }, + { "MAC_MTIP_PCS_1G_1_IF_MODE", 0x3e150, 0 }, + { "SGMII_DUPLEX", 4, 1 }, + { "SGMII_SPEED", 2, 2 }, + { "USE_SGMII_AN", 1, 1 }, + { "SGMII_ENA", 0, 1 }, + { "MAC_MTIP_PCS_1G_1_DEC_ERR_CNT", 0x3e154, 0 }, + { "MAC_MTIP_PCS_1G_1_VENDOR_CONTROL", 0x3e158, 0 }, + { "SGPCS_ENA_ST", 15, 1 }, + { "CFG_CLOCK_RATE", 4, 4 }, + { "SGPCS_ENA_R", 0, 1 }, + { "MAC_MTIP_PCS_1G_1_SD_BIT_SLIP", 0x3e15c, 0 }, + { "MAC_MTIP_PCS_1G_2_CONTROL", 0x3e200, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_Sel_1", 13, 1 }, + { "Auto_Neg_Ena", 12, 1 }, + { "power_down", 11, 1 }, + { "isolate", 10, 1 }, + { "restart_auto_neg", 9, 1 }, + { "duplex_mode", 8, 1 }, + { "collision_test", 7, 1 }, + { "Speed_Sel_0", 6, 1 }, + { "MAC_MTIP_PCS_1G_2_STATUS", 0x3e204, 0 }, + { "100Base_T4", 15, 1 }, + { "100Base_X_full_duplex", 14, 1 }, + { "100Base_X_half_duplex", 13, 1 }, + { "10Mbps_full_duplex", 12, 1 }, + { "10Mbps_half_duplex", 11, 1 }, + { "100Base_T2_half_duplex1", 10, 1 }, + { "100Base_T2_half_duplex0", 9, 1 }, + { "Extended_status", 8, 1 }, + { "Auto_neg_complete", 5, 1 }, + { "Remote_fault", 4, 1 }, + { "Auto_neg_ability", 3, 1 }, + { "Link_status", 2, 1 }, + { "Jabber_detect", 1, 1 }, + { "extended_capability", 0, 1 }, + { "MAC_MTIP_PCS_1G_2_PHY_IDENTIFIER_0", 0x3e208, 0 }, + { "MAC_MTIP_PCS_1G_2_PHY_IDENTIFIER_1", 0x3e20c, 0 }, + { "MAC_MTIP_PCS_1G_2_DEV_ABILITY", 0x3e210, 0 }, + { "ACK", 14, 1 }, + { "EEE_Clock_Stop_enable", 8, 1 }, + { "MAC_MTIP_PCS_1G_2_PARTNER_ABILITY", 0x3e214, 0 }, + { "Copper_Link_Status", 15, 1 }, + { "ACK", 14, 1 }, + { "Copper_Duplex_Status", 12, 1 }, + { "Copper_Speed", 10, 2 }, + { "EEE_Capability", 9, 1 }, + { "EEE_Clock_Stop_Capability", 8, 1 }, + { "MAC_MTIP_PCS_1G_2_AN_EXPANSION", 0x3e218, 0 }, + { "Next_Page_Able", 2, 1 }, + { "Page_Receive", 1, 1 }, + { "MAC_MTIP_PCS_1G_2_NP_TX", 0x3e21c, 0 }, + { "MAC_MTIP_PCS_1G_2_LP_NP_RX", 0x3e220, 0 }, + { "NP", 15, 1 }, + { "Ack", 14, 1 }, + { "MP", 13, 1 }, + { "Ack2", 12, 1 }, + { "Toggle", 11, 1 }, + { "data", 0, 11 }, + { "MAC_MTIP_PCS_1G_2_EXTENDED_STATUS", 0x3e23c, 0 }, + { "MAC_MTIP_PCS_1G_2_SCRATCH", 0x3e240, 0 }, + { "MAC_MTIP_PCS_1G_2_REV", 0x3e244, 0 }, + { "MAC_MTIP_PCS_1G_2_LINK_TIMER_0", 0x3e248, 0 }, + { "MAC_MTIP_PCS_1G_2_LINK_TIMER_1", 0x3e24c, 0 }, + { "MAC_MTIP_PCS_1G_2_IF_MODE", 0x3e250, 0 }, + { "SGMII_DUPLEX", 4, 1 }, + { "SGMII_SPEED", 2, 2 }, + { "USE_SGMII_AN", 1, 1 }, + { "SGMII_ENA", 0, 1 }, + { "MAC_MTIP_PCS_1G_2_DEC_ERR_CNT", 0x3e254, 0 }, + { "MAC_MTIP_PCS_1G_2_VENDOR_CONTROL", 0x3e258, 0 }, + { "SGPCS_ENA_ST", 15, 1 }, + { "CFG_CLOCK_RATE", 4, 4 }, + { "SGPCS_ENA_R", 0, 1 }, + { "MAC_MTIP_PCS_1G_2_SD_BIT_SLIP", 0x3e25c, 0 }, + { "MAC_MTIP_PCS_1G_3_CONTROL", 0x3e300, 0 }, + { "Reset", 15, 1 }, + { "Loopback", 14, 1 }, + { "Speed_Sel_1", 13, 1 }, + { "Auto_Neg_Ena", 12, 1 }, + { "power_down", 11, 1 }, + { "isolate", 10, 1 }, + { "restart_auto_neg", 9, 1 }, + { "duplex_mode", 8, 1 }, + { "collision_test", 7, 1 }, + { "Speed_Sel_0", 6, 1 }, + { "MAC_MTIP_PCS_1G_3_STATUS", 0x3e304, 0 }, + { "100Base_T4", 15, 1 }, + { "100Base_X_full_duplex", 14, 1 }, + { "100Base_X_half_duplex", 13, 1 }, + { "10Mbps_full_duplex", 12, 1 }, + { "10Mbps_half_duplex", 11, 1 }, + { "100Base_T2_half_duplex1", 10, 1 }, + { "100Base_T2_half_duplex0", 9, 1 }, + { "Extended_status", 8, 1 }, + { "Auto_neg_complete", 5, 1 }, + { "Remote_fault", 4, 1 }, + { "Auto_neg_ability", 3, 1 }, + { "Link_status", 2, 1 }, + { "Jabber_detect", 1, 1 }, + { "extended_capability", 0, 1 }, + { "MAC_MTIP_PCS_1G_3_PHY_IDENTIFIER_0", 0x3e308, 0 }, + { "MAC_MTIP_PCS_1G_3_PHY_IDENTIFIER_1", 0x3e30c, 0 }, + { "MAC_MTIP_PCS_1G_3_DEV_ABILITY", 0x3e310, 0 }, + { "ACK", 14, 1 }, + { "EEE_Clock_Stop_enable", 8, 1 }, + { "MAC_MTIP_PCS_1G_3_PARTNER_ABILITY", 0x3e314, 0 }, + { "Copper_Link_Status", 15, 1 }, + { "ACK", 14, 1 }, + { "Copper_Duplex_Status", 12, 1 }, + { "Copper_Speed", 10, 2 }, + { "EEE_Capability", 9, 1 }, + { "EEE_Clock_Stop_Capability", 8, 1 }, + { "MAC_MTIP_PCS_1G_3_AN_EXPANSION", 0x3e318, 0 }, + { "Next_Page_Able", 2, 1 }, + { "Page_Receive", 1, 1 }, + { "MAC_MTIP_PCS_1G_3_NP_TX", 0x3e31c, 0 }, + { "MAC_MTIP_PCS_1G_3_LP_NP_RX", 0x3e320, 0 }, + { "NP", 15, 1 }, + { "Ack", 14, 1 }, + { "MP", 13, 1 }, + { "Ack2", 12, 1 }, + { "Toggle", 11, 1 }, + { "data", 0, 11 }, + { "MAC_MTIP_PCS_1G_3_EXTENDED_STATUS", 0x3e33c, 0 }, + { "MAC_MTIP_PCS_1G_3_SCRATCH", 0x3e340, 0 }, + { "MAC_MTIP_PCS_1G_3_REV", 0x3e344, 0 }, + { "MAC_MTIP_PCS_1G_3_LINK_TIMER_0", 0x3e348, 0 }, + { "MAC_MTIP_PCS_1G_3_LINK_TIMER_1", 0x3e34c, 0 }, + { "MAC_MTIP_PCS_1G_3_IF_MODE", 0x3e350, 0 }, + { "SGMII_DUPLEX", 4, 1 }, + { "SGMII_SPEED", 2, 2 }, + { "USE_SGMII_AN", 1, 1 }, + { "SGMII_ENA", 0, 1 }, + { "MAC_MTIP_PCS_1G_3_DEC_ERR_CNT", 0x3e354, 0 }, + { "MAC_MTIP_PCS_1G_3_VENDOR_CONTROL", 0x3e358, 0 }, + { "SGPCS_ENA_ST", 15, 1 }, + { "CFG_CLOCK_RATE", 4, 4 }, + { "SGPCS_ENA_R", 0, 1 }, + { "MAC_MTIP_PCS_1G_3_SD_BIT_SLIP", 0x3e35c, 0 }, + { "MAC_DPLL_CTRL_0", 0x3f000, 0 }, + { "local_fault_ovrd", 18, 1 }, + { "local_fault_hold_en", 17, 1 }, + { "DPLL_Rst", 16, 1 }, + { "CNTOFFSET", 0, 16 }, + { "MAC_DPLL_CTRL_1", 0x3f004, 0 }, + { "MAC_DPLL_CTRL_2", 0x3f008, 0 }, + { "DIVFFB", 16, 16 }, + { "DIVFIN", 0, 16 }, + { "MAC_DPLL_CTRL_3", 0x3f00c, 0 }, + { "ISHIFT_HOLD", 28, 4 }, + { "ISHIFT", 24, 4 }, + { "INT_PRESET", 12, 12 }, + { "FMI", 4, 8 }, + { "DPLL_PROGRAM", 3, 1 }, + { "PRESET_EN", 2, 1 }, + { "ONTARGETOV", 1, 1 }, + { "FDONLY", 0, 1 }, + { "MAC_DPLL_CTRL_4", 0x3f010, 0 }, + { "FKI", 24, 5 }, + { "FRAC_PRESET", 0, 24 }, + { "MAC_DPLL_CTRL_5", 0x3f014, 0 }, + { "PH_STEP_CNT_HOLD", 24, 5 }, + { "CFG_RESET", 23, 1 }, + { "PH_STEP_CNT", 16, 5 }, + { "OTDLY", 0, 16 }, + { "MAC_DPLL_CTRL_6", 0x3f018, 0 }, + { "TARGETCNT", 16, 16 }, + { "PKP", 8, 5 }, + { "PMP", 0, 8 }, + { "MAC_DPLL_CTRL_7", 0x3f01c, 0 }, + { "MAC_DPLL_STATUS_0", 0x3f020, 0 }, + { "MAC_DPLL_STATUS_1", 0x3f024, 0 }, + { "MAC_DPLL_STATUS_2", 0x3f028, 0 }, + { "INT", 12, 12 }, + { "INT_PD_OUT", 0, 12 }, + { "MAC_FRAC_N_PLL_CTRL_0", 0x3f02c, 0 }, + { "FRAC_N_DSKEWCALCNT", 29, 3 }, + { "PLLEN", 28, 1 }, + { "BYPASS", 24, 4 }, + { "POSTDIV3A", 21, 3 }, + { "POSTDIV3B", 18, 3 }, + { "POSTDIV2A", 15, 3 }, + { "POSTDIV2B", 12, 3 }, + { "POSTDIV1A", 9, 3 }, + { "POSTDIV1B", 6, 3 }, + { "POSTDIV0A", 3, 3 }, + { "POSTDIV0B", 0, 3 }, + { "MAC_FRAC_N_PLL_CTRL_1", 0x3f030, 0 }, + { "FRAC_N_frac_n_fouten", 28, 4 }, + { "FRAC_N_DSKEWCALIN", 16, 12 }, + { "FRAC_N_REFDIV", 10, 6 }, + { "FRAC_N_DSMEN", 9, 1 }, + { "FRAC_N_PLLEN", 8, 1 }, + { "FRAC_N_DACEN", 7, 1 }, + { "FRAC_N_POSTDIV0PRE", 6, 1 }, + { "FRAC_N_DSKEWCALBYP", 5, 1 }, + { "FRAC_N_DSKEWFASTCAL", 4, 1 }, + { "FRAC_N_DSKEWCALEN", 3, 1 }, + { "FRAC_N_FREFCMLEN", 2, 1 }, + { "MAC_FRAC_N_PLL_STATUS_0", 0x3f034, 0 }, + { "DSKEWCALLOCK", 12, 1 }, + { "DSKEWCALOUT", 0, 12 }, + { "MAC_MTIP_PCS_STATUS_0", 0x3f100, 0 }, + { "xlgmii7_tx_tsu", 22, 2 }, + { "xlgmii6_tx_tsu", 20, 2 }, + { "xlgmii5_tx_tsu", 18, 2 }, + { "xlgmii4_tx_tsu", 16, 2 }, + { "xlgmii3_tx_tsu", 14, 2 }, + { "xlgmii2_tx_tsu", 12, 2 }, + { "xlgmii1_tx_tsu", 10, 2 }, + { "xlgmii0_tx_tsu", 8, 2 }, + { "cgmii3_tx_tsu", 6, 2 }, + { "cgmii2_tx_tsu", 4, 2 }, + { "cgmii1_tx_tsu", 2, 2 }, + { "cgmii0_tx_tsu", 0, 2 }, + { "MAC_MTIP_PCS_STATUS_1", 0x3f104, 0 }, + { "cdmii1_rx_tsu", 26, 2 }, + { "cdmii0_rx_tsu", 24, 2 }, + { "xlgmii7_rx_tsu", 22, 2 }, + { "xlgmii6_rx_tsu", 20, 2 }, + { "xlgmii5_rx_tsu", 18, 2 }, + { "xlgmii4_rx_tsu", 16, 2 }, + { "xlgmii3_rx_tsu", 14, 2 }, + { "xlgmii2_rx_tsu", 12, 2 }, + { "xlgmii1_rx_tsu", 10, 2 }, + { "xlgmii0_rx_tsu", 8, 2 }, + { "cgmii3_rx_tsu", 6, 2 }, + { "cgmii2_rx_tsu", 4, 2 }, + { "cgmii1_rx_tsu", 2, 2 }, + { "cgmii0_rx_tsu", 0, 2 }, + { "MAC_MTIP_PCS_STATUS_2", 0x3f108, 0 }, + { "MAC_MTIP_PCS_STATUS_3", 0x3f10c, 0 }, + { "MAC_MTIP_PCS_STATUS_4", 0x3f110, 0 }, + { "MAC_MTIP_PCS_STATUS_5", 0x3f114, 0 }, + { "MAC_MTIP_PCS_STATUS_6", 0x3f118, 0 }, + { "MAC_MTIP_PCS_STATUS_7", 0x3f11c, 0 }, + { "MAC_MTIP_MAC_10G_100G_STATUS_0", 0x3f120, 0 }, + { "tsv_xon_stb_2", 24, 8 }, + { "tsv_xoff_stb_2", 16, 8 }, + { "rsv_xon_stb_2", 8, 8 }, + { "rsv_xoff_stb_2", 0, 8 }, + { "MAC_MTIP_MAC_10G_100G_STATUS_1", 0x3f124, 0 }, + { "tsv_xon_stb_3", 24, 8 }, + { "tsv_xoff_stb_3", 16, 8 }, + { "rsv_xon_stb_3", 8, 8 }, + { "rsv_xoff_stb_3", 0, 8 }, + { "MAC_MTIP_MAC_10G_100G_STATUS_2", 0x3f128, 0 }, + { "tsv_xon_stb_4", 24, 8 }, + { "tsv_xoff_stb_4", 16, 8 }, + { "rsv_xon_stb_4", 8, 8 }, + { "rsv_xoff_stb_4", 0, 8 }, + { "MAC_MTIP_MAC_10G_100G_STATUS_3", 0x3f12c, 0 }, + { "tsv_xon_stb_5", 24, 8 }, + { "tsv_xoff_stb_5", 16, 8 }, + { "rsv_xon_stb_5", 8, 8 }, + { "rsv_xoff_stb_5", 0, 8 }, + { "MAC_MTIP_MAC_10G_100G_STATUS_4", 0x3f130, 0 }, + { "tx_sfd_o_5", 19, 1 }, + { "tx_sfd_o_4", 18, 1 }, + { "tx_sfd_o_3", 17, 1 }, + { "tx_sfd_o_2", 16, 1 }, + { "rx_sfd_o_5", 15, 1 }, + { "rx_sfd_o_4", 14, 1 }, + { "rx_sfd_o_3", 13, 1 }, + { "rx_sfd_o_2", 12, 1 }, + { "rx_sfd_shift_o_5", 11, 1 }, + { "rx_sfd_shift_o_4", 10, 1 }, + { "rx_sfd_shift_o_3", 9, 1 }, + { "rx_sfd_shift_o_2", 8, 1 }, + { "tx_sfd_shift_o_5", 7, 1 }, + { "tx_sfd_shift_o_4", 6, 1 }, + { "tx_sfd_shift_o_3", 5, 1 }, + { "tx_sfd_shift_o_2", 4, 1 }, + { "ts_sfd_ena_5", 3, 1 }, + { "ts_sfd_ena_4", 2, 1 }, + { "ts_sfd_ena_3", 1, 1 }, + { "ts_sfd_ena_2", 0, 1 }, + { "MAC_STS_CONFIG", 0x3f200, 0 }, + { "sts_ena", 30, 1 }, + { "n_pps_ena", 29, 1 }, + { "sts_reset", 28, 1 }, + { "debounce_cnt", 0, 28 }, + { "MAC_STS_COUNTER", 0x3f204, 0 }, + { "MAC_STS_COUNT_1", 0x3f208, 0 }, + { "MAC_STS_COUNT_2", 0x3f20c, 0 }, + { "MAC_STS_N_PPS_COUNT_HI", 0x3f210, 0 }, + { "MAC_STS_N_PPS_COUNT_LO", 0x3f214, 0 }, + { "MAC_STS_N_PPS_COUNTER", 0x3f218, 0 }, + { NULL } +}; + +struct reg_info t7_crypto_0_regs[] = { + { "TLS_TX_CH_CONFIG", 0x44000, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44004, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44008, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4400c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44010, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44014, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44020, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44024, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44028, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44030, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x44100, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44104, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44108, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4410c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44110, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44114, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44120, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44124, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44128, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44130, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x44200, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44204, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44208, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4420c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44210, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44214, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44220, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44224, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44228, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44230, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x44300, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44304, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44308, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4430c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44310, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44314, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44320, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44324, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44328, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44330, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x44400, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44404, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44408, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4440c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44410, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44414, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44420, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44424, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44428, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44430, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x44500, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x44504, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x44508, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4450c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x44510, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x44514, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x44520, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x44524, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x44528, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x44530, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_DBG_SELL_DATA", 0x44714, 0 }, + { "TLS_TX_DBG_SELH_DATA", 0x44718, 0 }, + { "TLS_TX_DBG_SEL_CTRL", 0x44730, 0 }, + { "TLS_TX_GLOBAL_CONFIG", 0x447c0, 0 }, + { "QUIC_EN", 2, 1 }, + { "IPSEC_IDX_UPD_EN", 1, 1 }, + { "IPSEC_IDX_CTL", 0, 1 }, + { "TLS_TX_CGEN", 0x447f0, 0 }, + { "TLS_TX_IND_ADDR", 0x447f8, 0 }, + { "TLS_TX_IND_DATA", 0x447fc, 0 }, + { NULL } +}; + +struct reg_info t7_crypto_1_regs[] = { + { "TLS_TX_CH_CONFIG", 0x45000, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45004, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45008, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4500c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45010, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45014, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45020, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45024, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45028, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45030, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x45100, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45104, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45108, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4510c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45110, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45114, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45120, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45124, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45128, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45130, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x45200, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45204, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45208, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4520c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45210, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45214, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45220, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45224, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45228, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45230, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x45300, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45304, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45308, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4530c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45310, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45314, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45320, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45324, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45328, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45330, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x45400, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45404, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45408, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4540c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45410, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45414, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45420, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45424, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45428, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45430, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_CH_CONFIG", 0x45500, 0 }, + { "SMALL_LEN_THRESH", 16, 16 }, + { "CIPH0_CTL_SEL", 12, 3 }, + { "CIPHN_CTL_SEL", 9, 3 }, + { "MAC_CTL_SEL", 6, 3 }, + { "CIPH0_XOR_SEL", 5, 1 }, + { "CIPHN_XOR_SEL", 4, 1 }, + { "MAC_XOR_SEL", 3, 1 }, + { "CIPH0_DP_SEL", 2, 1 }, + { "CIPHN_DP_SEL", 1, 1 }, + { "MAC_DP_SEL", 0, 1 }, + { "TLS_TX_CH_PERR_INJECT", 0x45504, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "TLS_TX_CH_INT_ENABLE", 0x45508, 0 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_INT_CAUSE", 0x4550c, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_PERR_ENABLE", 0x45510, 0 }, + { "KEX_CERR", 4, 1 }, + { "KeyLenErr", 3, 1 }, + { "intf1_PERR", 2, 1 }, + { "intf0_PERR", 1, 1 }, + { "KEX_PERR", 0, 1 }, + { "TLS_TX_CH_DEBUG_FLAGS", 0x45514, 0 }, + { "TLS_TX_CH_HMACCTRL_CFG", 0x45520, 0 }, + { "HMAC_CFG6", 12, 6 }, + { "HMAC_CFG5", 6, 6 }, + { "HMAC_CFG4", 0, 6 }, + { "TLS_TX_CH_ERR_RSP_HDR", 0x45524, 0 }, + { "TLS_TX_CH_HANG_TIMEOUT", 0x45528, 0 }, + { "TLS_TX_CH_DBG_STEP_CTRL", 0x45530, 0 }, + { "DBG_STEP_CTRL", 1, 1 }, + { "DBG_STEP_EN", 0, 1 }, + { "TLS_TX_DBG_SELL_DATA", 0x45714, 0 }, + { "TLS_TX_DBG_SELH_DATA", 0x45718, 0 }, + { "TLS_TX_DBG_SEL_CTRL", 0x45730, 0 }, + { "TLS_TX_GLOBAL_CONFIG", 0x457c0, 0 }, + { "QUIC_EN", 2, 1 }, + { "IPSEC_IDX_UPD_EN", 1, 1 }, + { "IPSEC_IDX_CTL", 0, 1 }, + { "TLS_TX_CGEN", 0x457f0, 0 }, + { "TLS_TX_IND_ADDR", 0x457f8, 0 }, + { "TLS_TX_IND_DATA", 0x457fc, 0 }, + { NULL } +}; + +struct reg_info t7_crypto_key_regs[] = { + { "CRYPTO_KEY_CONFIG", 0x46000, 0 }, + { "EsnWin", 1, 3 }, + { "IngKey96", 0, 1 }, + { "CRYPTO_KEY_RST", 0x46004, 0 }, + { "Core1Rst", 1, 1 }, + { "Core0Rst", 0, 1 }, + { "CRYPTO_KEY_INT_ENABLE", 0x46008, 0 }, + { "MA_FIFO_PERR", 22, 1 }, + { "MA_RSP_PERR", 21, 1 }, + { "ING_CACHE_DATA_PERR", 19, 1 }, + { "ING_CACHE_TAG_PERR", 18, 1 }, + { "LKP_KEY_REQ_PERR", 17, 1 }, + { "LKP_CLIP_TCAM_PERR", 16, 1 }, + { "LKP_MAIN_TCAM_PERR", 15, 1 }, + { "EGR_KEY_REQ_PERR", 14, 1 }, + { "EGR_CACHE_DATA_PERR", 13, 1 }, + { "EGR_CACHE_TAG_PERR", 12, 1 }, + { "CIM_PERR", 11, 1 }, + { "MA_INV_RSP_TAG", 10, 1 }, + { "ING_KEY_RANGE_ERR", 9, 1 }, + { "ING_MFIFO_OVFL", 8, 1 }, + { "LKP_REQ_OVFL", 7, 1 }, + { "EOK_WAIT_ERR", 6, 1 }, + { "EGR_KEY_RANGE_ERR", 5, 1 }, + { "EGR_MFIFO_OVFL", 4, 1 }, + { "SEQ_WRAP_HP_OVFL", 3, 1 }, + { "SEQ_WRAP_LP_OVFL", 2, 1 }, + { "EGR_SEQ_WRAP_HP", 1, 1 }, + { "EGR_SEQ_WRAP_LP", 0, 1 }, + { "CRYPTO_KEY_INT_CAUSE", 0x4600c, 0 }, + { "MA_FIFO_PERR", 22, 1 }, + { "MA_RSP_PERR", 21, 1 }, + { "ING_CACHE_DATA_PERR", 19, 1 }, + { "ING_CACHE_TAG_PERR", 18, 1 }, + { "LKP_KEY_REQ_PERR", 17, 1 }, + { "LKP_CLIP_TCAM_PERR", 16, 1 }, + { "LKP_MAIN_TCAM_PERR", 15, 1 }, + { "EGR_KEY_REQ_PERR", 14, 1 }, + { "EGR_CACHE_DATA_PERR", 13, 1 }, + { "EGR_CACHE_TAG_PERR", 12, 1 }, + { "CIM_PERR", 11, 1 }, + { "MA_INV_RSP_TAG", 10, 1 }, + { "ING_KEY_RANGE_ERR", 9, 1 }, + { "ING_MFIFO_OVFL", 8, 1 }, + { "LKP_REQ_OVFL", 7, 1 }, + { "EOK_WAIT_ERR", 6, 1 }, + { "EGR_KEY_RANGE_ERR", 5, 1 }, + { "EGR_MFIFO_OVFL", 4, 1 }, + { "SEQ_WRAP_HP_OVFL", 3, 1 }, + { "SEQ_WRAP_LP_OVFL", 2, 1 }, + { "EGR_SEQ_WRAP_HP", 1, 1 }, + { "EGR_SEQ_WRAP_LP", 0, 1 }, + { "CRYPTO_KEY_PERR_ENABLE", 0x46010, 0 }, + { "MA_FIFO_PERR", 22, 1 }, + { "MA_RSP_PERR", 21, 1 }, + { "ING_CACHE_DATA_PERR", 19, 1 }, + { "ING_CACHE_TAG_PERR", 18, 1 }, + { "LKP_KEY_REQ_PERR", 17, 1 }, + { "LKP_CLIP_TCAM_PERR", 16, 1 }, + { "LKP_MAIN_TCAM_PERR", 15, 1 }, + { "EGR_KEY_REQ_PERR", 14, 1 }, + { "EGR_CACHE_DATA_PERR", 13, 1 }, + { "EGR_CACHE_TAG_PERR", 12, 1 }, + { "CIM_PERR", 11, 1 }, + { "MA_INV_RSP_TAG", 10, 1 }, + { "ING_KEY_RANGE_ERR", 9, 1 }, + { "ING_MFIFO_OVFL", 8, 1 }, + { "LKP_REQ_OVFL", 7, 1 }, + { "EOK_WAIT_ERR", 6, 1 }, + { "EGR_KEY_RANGE_ERR", 5, 1 }, + { "EGR_MFIFO_OVFL", 4, 1 }, + { "SEQ_WRAP_HP_OVFL", 3, 1 }, + { "SEQ_WRAP_LP_OVFL", 2, 1 }, + { "EGR_SEQ_WRAP_HP", 1, 1 }, + { "EGR_SEQ_WRAP_LP", 0, 1 }, + { "CRYPTO_KEY_EGR_SEQ_WRAP_LP_KEY_ID", 0x46018, 0 }, + { "KEY_VALID", 31, 1 }, + { "KEY_ID", 0, 31 }, + { "CRYPTO_KEY_EGR_SEQ_WRAP_HP_KEY_ID", 0x4601c, 0 }, + { "KEY_VALID", 31, 1 }, + { "KEY_ID", 0, 31 }, + { "CRYPTO_KEY_TCAM_DATA0", 0x46020, 0 }, + { "CRYPTO_KEY_TCAM_DATA1", 0x46024, 0 }, + { "CRYPTO_KEY_TCAM_DATA2", 0x46028, 0 }, + { "CRYPTO_KEY_TCAM_DATA3", 0x4602c, 0 }, + { "CRYPTO_KEY_TCAM_CTL", 0x46030, 0 }, + { "SrchMHit", 21, 1 }, + { "Busy", 20, 1 }, + { "SrchHit", 19, 1 }, + { "IPVersion", 18, 1 }, + { "BitSel", 17, 1 }, + { "TcamSel", 16, 1 }, + { "CmdType", 14, 2 }, + { "TcamIndex", 0, 14 }, + { "CRYPTO_KEY_TCAM_CONFIG", 0x46034, 0 }, + { "CLCAM_INIT_BUSY", 7, 1 }, + { "CLCAM_INIT", 6, 1 }, + { "MTCAM_INIT_BUSY", 5, 1 }, + { "MTCAM_INIT", 4, 1 }, + { "CLTCAMDEEPSLEEP_STAT", 3, 1 }, + { "TCAMDEEPSLEEP_STAT", 2, 1 }, + { "CLTCAMDEEPSLEEP", 1, 1 }, + { "TCAMDEEPSLEEP", 0, 1 }, + { "CRYPTO_KEY_TX_CMM_CONFIG", 0x46040, 0 }, + { "GlFl", 31, 1 }, + { "WrCntIdle", 16, 15 }, + { "RdThreshold", 8, 6 }, + { "WrThrLevel2", 7, 1 }, + { "WrThrLevel1", 6, 1 }, + { "WrThrThreshEn", 5, 1 }, + { "WrThrThresh", 0, 5 }, + { "CRYPTO_KEY_TX_TNL_BASE", 0x46044, 0 }, + { "CRYPTO_KEY_TX_TRN_BASE", 0x46048, 0 }, + { "CRYPTO_KEY_TX_MAX_KEYS", 0x4604c, 0 }, + { "TNL_MAX", 16, 16 }, + { "TRN_MAX", 0, 16 }, + { "CRYPTO_KEY_TX_SEQ_STAT", 0x46050, 0 }, + { "ESN", 24, 1 }, + { "SeqHi", 20, 4 }, + { "KeyID", 0, 20 }, + { "CRYPTO_KEY_RX_CMM_CONFIG", 0x46060, 0 }, + { "GlFl", 31, 1 }, + { "WrCntIdle", 16, 15 }, + { "RdThreshold", 8, 6 }, + { "WrThrLevel2", 7, 1 }, + { "WrThrLevel1", 6, 1 }, + { "WrThrThreshEn", 5, 1 }, + { "WrThrThresh", 0, 5 }, + { "CRYPTO_KEY_RX_BASE", 0x46064, 0 }, + { "CRYPTO_KEY_RX_MAX_KEYS", 0x46068, 0 }, + { "CRYPTO_KEY_CRYPTO_REVISION", 0x4606c, 0 }, + { "CRYPTO_KEY_RX_SEQ_STAT", 0x46070, 0 }, + { "ESN", 24, 1 }, + { "SeqHi", 20, 4 }, + { "KeyID", 0, 20 }, + { "CRYPTO_KEY_TCAM_BIST_CTRL", 0x46074, 0 }, + { "rst_cb", 31, 1 }, + { "cb_start", 0, 28 }, + { "CRYPTO_KEY_TCAM_BIST_CB_PASS", 0x46078, 0 }, + { "CRYPTO_KEY_TCAM_BIST_CB_BUSY", 0x4607c, 0 }, + { "CRYPTO_KEY_DBG_SEL_CTRL", 0x46080, 0 }, + { "SEL_OVR_EN", 16, 1 }, + { "SELH", 8, 8 }, + { "SELL", 0, 8 }, + { "CRYPTO_KEY_DBG_SELL_DATA", 0x46084, 0 }, + { "CRYPTO_KEY_DBG_SELH_DATA", 0x46088, 0 }, + { NULL } +}; + +struct reg_info t7_arm_regs[] = { + { "ARM_CPU_POR_RST", 0x47000, 0 }, + { "CpuPorRstn3", 3, 1 }, + { "CpuPorRstn2", 2, 1 }, + { "CpuPorRstn1", 1, 1 }, + { "CpuPorRstn0", 0, 1 }, + { "ARM_CPU_CORE_RST", 0x47004, 0 }, + { "CpuCoreRstn3", 3, 1 }, + { "CpuCoreRstn2", 2, 1 }, + { "CpuCoreRstn1", 1, 1 }, + { "CpuCoreRstn0", 0, 1 }, + { "ARM_CPU_WARM_RST_REQ", 0x47008, 0 }, + { "CpuWarmRstReq3", 3, 1 }, + { "CpuWarmRstReq2", 2, 1 }, + { "CpuWarmRstReq1", 1, 1 }, + { "CpuWarmRstReq0", 0, 1 }, + { "ARM_CPU_L2_RST", 0x4700c, 0 }, + { "ARM_CPU_L2_RST_DIS", 0x47010, 0 }, + { "ARM_CPU_PRESET_DBG", 0x47014, 0 }, + { "ARM_CPU_PERIPH_BASE", 0x47124, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47020, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47024, 0 }, + { "ARM_CPU_PMU_EVENT", 0x47028, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47030, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47034, 0 }, + { "ARM_CPU_PMU_EVENT", 0x47038, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47040, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47044, 0 }, + { "ARM_CPU_PMU_EVENT", 0x47048, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47050, 0 }, + { "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47054, 0 }, + { "ARM_CPU_PMU_EVENT", 0x47058, 0 }, + { "ARM_CPU_DBG_PWR_UP_REQ", 0x47060, 0 }, + { "CpuDbgPwrUpReq3", 3, 1 }, + { "CpuDbgPwrUpReq2", 2, 1 }, + { "CpuDbgPwrUpReq1", 1, 1 }, + { "CpuDbgPwrUpReq0", 0, 1 }, + { "ARM_CPU_STANDBY_WFE_WFI", 0x47064, 0 }, + { "CpuStandbyWfiL2", 8, 1 }, + { "CpuStandbyWfi3", 7, 1 }, + { "CpuStandbyWfi2", 6, 1 }, + { "CpuStandbyWfi1", 5, 1 }, + { "CpuStandbyWfi0", 4, 1 }, + { "CpuStandbyWfe3", 3, 1 }, + { "CpuStandbyWfe2", 2, 1 }, + { "CpuStandbyWfe1", 1, 1 }, + { "CpuStandbyWfe0", 0, 1 }, + { "ARM_CPU_SMPEN", 0x47068, 0 }, + { "CpuSmpEn3", 3, 1 }, + { "CpuSmpEn2", 2, 1 }, + { "CpuSmpEn1", 1, 1 }, + { "CpuSmpEn0", 0, 1 }, + { "ARM_CPU_QACTIVE", 0x4706c, 0 }, + { "CpuQactive3", 3, 1 }, + { "CpuQactive2", 2, 1 }, + { "CpuQactive1", 1, 1 }, + { "CpuQactive0", 0, 1 }, + { "ARM_CPU_QREQ", 0x47070, 0 }, + { "CpuL2FlushReq", 5, 1 }, + { "CpuL2QReqn", 4, 1 }, + { "CpuQReq3n", 3, 1 }, + { "CpuQReq2n", 2, 1 }, + { "CpuQReq1n", 1, 1 }, + { "CpuQReq0n", 0, 1 }, + { "ARM_CPU_QREQ_STATUS", 0x47074, 0 }, + { "CpuL2FlushDone", 10, 1 }, + { "CpuL2QDeny", 9, 1 }, + { "CpuL2QAcceptn", 8, 1 }, + { "CpuQDeny3", 7, 1 }, + { "CpuQDeny2", 6, 1 }, + { "CpuQDeny1", 5, 1 }, + { "CpuQDeny0", 4, 1 }, + { "CpuQAccept3n", 3, 1 }, + { "CpuQAccept2n", 2, 1 }, + { "CpuQAccept1n", 1, 1 }, + { "CpuQAccept0n", 0, 1 }, + { "ARM_CPU_DBG_EN", 0x47078, 0 }, + { "CpuDbgL1RstDisable", 28, 1 }, + { "CpuDbgRstReq3", 27, 1 }, + { "CpuDbgRstReq2", 26, 1 }, + { "CpuDbgRstReq1", 25, 1 }, + { "CpuDbgRstReq0", 24, 1 }, + { "CpuDbgPwrdUp3", 23, 1 }, + { "CpuDbgPwrdUp2", 22, 1 }, + { "CpuDbgPwrdUp1", 21, 1 }, + { "CpuDbgPwrdUp0", 20, 1 }, + { "CpuExtDbgReq3", 19, 1 }, + { "CpuExtDbgReq2", 18, 1 }, + { "CpuExtDbgReq1", 17, 1 }, + { "CpuExtDbgReq0", 16, 1 }, + { "CpuSpNidEn3", 15, 1 }, + { "CpuSpNidEn2", 14, 1 }, + { "CpuSpNidEn1", 13, 1 }, + { "CpuSpNidEn0", 12, 1 }, + { "CpuSpDbgEn3", 11, 1 }, + { "CpuSpDbgEn2", 10, 1 }, + { "CpuSpDbgEn1", 9, 1 }, + { "CpuSpDbgEn0", 8, 1 }, + { "CpuNidEn3", 7, 1 }, + { "CpuNidEn2", 6, 1 }, + { "CpuNidEn1", 5, 1 }, + { "CpuNidEn0", 4, 1 }, + { "CpuDbgEn3", 3, 1 }, + { "CpuDbgEn2", 2, 1 }, + { "CpuDbgEn1", 1, 1 }, + { "CpuDbgEn0", 0, 1 }, + { "ARM_CPU_DBG_ACK", 0x4707c, 0 }, + { "CpuDbgNoPwrDwn3", 11, 1 }, + { "CpuDbgNoPwrDwn2", 10, 1 }, + { "CpuDbgNoPwrDwn1", 9, 1 }, + { "CpuDbgNoPwrDwn0", 8, 1 }, + { "CpuDgnRstReq3", 7, 1 }, + { "CpuDgnRstReq2", 6, 1 }, + { "CpuDgnRstReq1", 5, 1 }, + { "CpuDgnRstReq0", 4, 1 }, + { "CpuDbgAck3", 3, 1 }, + { "CpuDbgAck2", 2, 1 }, + { "CpuDbgAck1", 1, 1 }, + { "CpuDbgAck0", 0, 1 }, + { "ARM_CPU_PMU_SNAPSHOT_REQ", 0x47080, 0 }, + { "CpuPmuSnapshotReq3", 3, 1 }, + { "CpuPmuSnapshotReq2", 2, 1 }, + { "CpuPmuSnapshotReq1", 1, 1 }, + { "CpuPmuSnapshotReq0", 0, 1 }, + { "ARM_CPU_PMU_SNAPSHOT_ACK", 0x47084, 0 }, + { "CpuPmuSnapshotAck3", 3, 1 }, + { "CpuPmuSnapshotAck2", 2, 1 }, + { "CpuPmuSnapshotAck1", 1, 1 }, + { "CpuPmuSnapshotAck0", 0, 1 }, + { "ARM_CPU_CFG_END_VINI_TE", 0x4708c, 0 }, + { "CpuSysBarDisable", 23, 1 }, + { "CpuBroadCacheMain", 22, 1 }, + { "CpuBroadOuter", 21, 1 }, + { "CpuBroadInner", 20, 1 }, + { "CpuCryptoDisable3", 19, 1 }, + { "CpuCryptoDisable2", 18, 1 }, + { "CpuCryptoDisable1", 17, 1 }, + { "CpuCryptoDisable0", 16, 1 }, + { "CpuAA64nAA323", 15, 1 }, + { "CpuAA64nAA322", 14, 1 }, + { "CpuAA64nAA321", 13, 1 }, + { "CpuAA64nAA320", 12, 1 }, + { "CpuCfgTe3", 11, 1 }, + { "CpuCfgTe2", 10, 1 }, + { "CpuCfgTe1", 9, 1 }, + { "CpuCfgTe0", 8, 1 }, + { "CpuViniHi3", 7, 1 }, + { "CpuViniHi2", 6, 1 }, + { "CpuViniHi1", 5, 1 }, + { "CpuViniHi0", 4, 1 }, + { "CpuCfgEnd3", 3, 1 }, + { "CpuCfgEnd2", 2, 1 }, + { "CpuCfgEnd1", 1, 1 }, + { "CpuCfgEnd0", 0, 1 }, + { "ARM_CPU_CP15_SDISABLE", 0x47090, 0 }, + { "CpuCP15SDisable3", 3, 1 }, + { "CpuCP15SDisable2", 2, 1 }, + { "CpuCP15SDisable1", 1, 1 }, + { "CpuCP15SDisable0", 0, 1 }, + { "ARM_CPU_CLUSTER_ID_AFF", 0x47094, 0 }, + { "CpuClusterIdAff2", 8, 8 }, + { "CpuClusterIdAff1", 0, 8 }, + { "ARM_CPU_CLK_CFG", 0x47098, 0 }, + { "CpuAcInactiveM", 1, 1 }, + { "CpuAclkEnM", 0, 1 }, + { "ARM_CPU_EVENT_I", 0x47100, 0 }, + { "ARM_CPU_EVENT_O", 0x47104, 0 }, + { "ARM_CPU_CLR_EXMON_REQ", 0x47108, 0 }, + { "ARM_CPU_CLR_EXMON_ACK", 0x4710c, 0 }, + { "ARM_UART_MSTR_RXD", 0x47110, 0 }, + { "ARM_UART_MSTR_RXC", 0x47114, 0 }, + { "ARM_UART_MSTR_TXD", 0x47118, 0 }, + { "ARM_UART_MSTR_TXC", 0x4711c, 0 }, + { "Int", 1, 1 }, + { "uart_mstc_txc", 0, 1 }, + { "ARM_UART_SLV_SEL", 0x47120, 0 }, + { "ARM_UART_CONFIG", 0x47130, 0 }, + { "StopBits", 25, 2 }, + { "Parity", 23, 2 }, + { "DataBits", 19, 4 }, + { "ClkDiv", 0, 18 }, + { "ARM_UART_STAT", 0x47134, 0 }, + { "Rsv1", 6, 26 }, + { "RxFrmErr", 5, 1 }, + { "RxParErr", 4, 1 }, + { "RxOvrn", 3, 1 }, + { "CTL_RxRdy", 2, 1 }, + { "TxOvrn", 1, 1 }, + { "CTL_TxRdy", 0, 1 }, + { "ARM_UART_TX_DATA", 0x47138, 0 }, + { "ARM_UART_RX_DATA", 0x4713c, 0 }, + { "ARM_UART_DBG0", 0x47140, 0 }, + { "ARM_UART_DBG1", 0x47144, 0 }, + { "ARM_UART_DBG2", 0x47148, 0 }, + { "ARM_UART_DBG3", 0x4714c, 0 }, + { "ARM_ARM_CPU_PC0", 0x47150, 0 }, + { "ARM_ARM_CPU_PC1", 0x47154, 0 }, + { "ARM_ARM_UART_INT_CAUSE", 0x47158, 0 }, + { "rx_fifo_not_empty", 1, 1 }, + { "tx_fifo_empty", 0, 1 }, + { "ARM_ARM_UART_INT_EN", 0x4715c, 0 }, + { "rx_fifo_int_not_empty", 1, 1 }, + { "tx_fifo_int_empty", 0, 1 }, + { "ARM_ARM_UART_GPIO_SEL", 0x47160, 0 }, + { "pc_sel", 1, 3 }, + { "uart_gpio_sel", 0, 1 }, + { "ARM_ARM_SCRATCH_PAD0", 0x47164, 0 }, + { "ARM_ARM_SCRATCH_PAD1", 0x47168, 0 }, + { "ARM_ARM_SCRATCH_PAD2", 0x4716c, 0 }, + { "ARM_DEBUG_INDEX", 0x47450, 0 }, + { "ARM_DEBUG_DATA_HIGH", 0x47454, 0 }, + { "ARM_DEBUG_DATA_LOW", 0x47458, 0 }, + { "ARM_PERR_INT_CAUSE0", 0x47170, 0 }, + { "inic_WrData_Fifo_perr", 31, 1 }, + { "inic_rData_Fifo_perr", 30, 1 }, + { "msi_mem_perr", 29, 1 }, + { "arm_db_sram_perr", 27, 2 }, + { "emmc_FifoParInt", 26, 1 }, + { "icb_ram_perr", 25, 1 }, + { "mess2axi4_wrfifo_perr", 24, 1 }, + { "rc_wFifo_outperr", 23, 1 }, + { "rc_sram_perr", 21, 2 }, + { "msi_fifo_par_err", 20, 1 }, + { "inic2ma_IntfPerr", 19, 1 }, + { "rdataFifo0_perr", 18, 1 }, + { "rdataFifo1_perr", 17, 1 }, + { "WrDataFifo0_perr", 16, 1 }, + { "WrDataFifo1_perr", 15, 1 }, + { "wr512dataFifo0_perr", 14, 1 }, + { "wr512dataFifo1_perr", 13, 1 }, + { "robuff_parerr3", 12, 1 }, + { "robuff_parerr2", 11, 1 }, + { "robuff_parerr1", 10, 1 }, + { "robuff_parerr0", 9, 1 }, + { "ma2axi_ReqDataParErr", 8, 1 }, + { "ma2axi_ReqCtlParErr", 7, 1 }, + { "ma_RspPerr", 6, 1 }, + { "pcie2ma_reqCtlParErr", 5, 1 }, + { "pcie2ma_reqDataParErr", 4, 1 }, + { "inic2ma_reqCtlParErr", 3, 1 }, + { "inic2ma_reqDataParErr", 2, 1 }, + { "ma_RspUE", 1, 1 }, + { "apb2pl_RspDataPerr", 0, 1 }, + { "ARM_PERR_INT_ENB0", 0x47174, 0 }, + { "inic_WrData_Fifo_perr", 31, 1 }, + { "inic_rData_Fifo_perr", 30, 1 }, + { "msi_mem_perr", 29, 1 }, + { "arm_db_sram_perr", 27, 2 }, + { "emmc_FifoParInt", 26, 1 }, + { "icb_ram_perr", 25, 1 }, + { "mess2axi4_wrfifo_perr", 24, 1 }, + { "rc_wFifo_outperr", 23, 1 }, + { "rc_sram_perr", 21, 2 }, + { "msi_fifo_par_err", 20, 1 }, + { "inic2ma_IntfPerr", 19, 1 }, + { "rdataFifo0_perr", 18, 1 }, + { "rdataFifo1_perr", 17, 1 }, + { "WrDataFifo0_perr", 16, 1 }, + { "WrDataFifo1_perr", 15, 1 }, + { "wr512dataFifo0_perr", 14, 1 }, + { "wr512dataFifo1_perr", 13, 1 }, + { "robuff_parerr3", 12, 1 }, + { "robuff_parerr2", 11, 1 }, + { "robuff_parerr1", 10, 1 }, + { "robuff_parerr0", 9, 1 }, + { "ma2axi_ReqDataParErr", 8, 1 }, + { "ma2axi_ReqCtlParErr", 7, 1 }, + { "ma_RspPerr", 6, 1 }, + { "pcie2ma_reqCtlParErr", 5, 1 }, + { "pcie2ma_reqDataParErr", 4, 1 }, + { "inic2ma_reqCtlParErr", 3, 1 }, + { "inic2ma_reqDataParErr", 2, 1 }, + { "ma_RspUE", 1, 1 }, + { "apb2pl_RspDataPerr", 0, 1 }, + { "ARM_PERR_ENABLE0", 0x4720c, 0 }, + { "inic_WrData_Fifo_perr", 31, 1 }, + { "inic_rData_Fifo_perr", 30, 1 }, + { "msi_mem_perr", 29, 1 }, + { "arm_db_sram_perr", 27, 2 }, + { "emmc_FifoParInt", 26, 1 }, + { "icb_ram_perr", 25, 1 }, + { "mess2axi4_wrfifo_perr", 24, 1 }, + { "rc_wFifo_outperr", 23, 1 }, + { "rc_sram_perr", 21, 2 }, + { "msi_fifo_par_err", 20, 1 }, + { "inic2ma_IntfPerr", 19, 1 }, + { "rdataFifo0_perr", 18, 1 }, + { "rdataFifo1_perr", 17, 1 }, + { "WrDataFifo0_perr", 16, 1 }, + { "WrDataFifo1_perr", 15, 1 }, + { "wr512dataFifo0_perr", 14, 1 }, + { "wr512dataFifo1_perr", 13, 1 }, + { "robuff_parerr3", 12, 1 }, + { "robuff_parerr2", 11, 1 }, + { "robuff_parerr1", 10, 1 }, + { "robuff_parerr0", 9, 1 }, + { "ma2axi_ReqDataParErr", 8, 1 }, + { "ma2axi_ReqCtlParErr", 7, 1 }, + { "ma_RspPerr", 6, 1 }, + { "pcie2ma_reqCtlParErr", 5, 1 }, + { "pcie2ma_reqDataParErr", 4, 1 }, + { "inic2ma_reqCtlParErr", 3, 1 }, + { "inic2ma_reqDataParErr", 2, 1 }, + { "ma_RspUE", 1, 1 }, + { "apb2pl_RspDataPerr", 0, 1 }, + { "ARM_PERR_INT_CAUSE1", 0x47430, 0 }, + { "arwfifo0_perr", 31, 1 }, + { "arwfifo1_perr", 30, 1 }, + { "arwidfifo0_perr", 29, 1 }, + { "arwidfifo1_perr", 28, 1 }, + { "aridfifo0_perr", 27, 1 }, + { "aridfifo1_perr", 26, 1 }, + { "rrspaddr_fifo0_perr", 25, 1 }, + { "rrspaddr_fifo1_perr", 24, 1 }, + { "wrstrb_fifo0_perr", 23, 1 }, + { "wrstrb_fifo1_perr", 22, 1 }, + { "ma2axi_rspDataParErr", 21, 1 }, + { "ma2axi_data_par_err", 20, 1 }, + { "ma2axi_wr_ord_fifo_parerr", 19, 1 }, + { "nvme_db_emu_tracker_fifo_perr", 18, 1 }, + { "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 }, + { "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 }, + { "nvme_db_emu_Id_fifo0_perr", 15, 1 }, + { "nvme_db_emu_Id_fifo1_perr", 14, 1 }, + { "rc_arwFifo_perr", 13, 1 }, + { "rc_aridburstaddrFifo_perr", 12, 1 }, + { "rc_cfg_fifo_perr", 11, 1 }, + { "rc_rspFifo_perr", 10, 1 }, + { "inic_arIDFifo_perr", 9, 1 }, + { "inic_arwFifo_perr", 8, 1 }, + { "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 }, + { "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 }, + { "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 }, + { "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 }, + { "arm_ma_512b_arb_fifo_perr", 3, 1 }, + { "pcie_inic_ma_arb_fifo_perr", 2, 1 }, + { "pcie_inic_arb_rspPerr", 1, 1 }, + { "ite_cache_perr", 0, 1 }, + { "ARM_PERR_INT_ENB1", 0x47434, 0 }, + { "arwfifo0_perr", 31, 1 }, + { "arwfifo1_perr", 30, 1 }, + { "arwidfifo0_perr", 29, 1 }, + { "arwidfifo1_perr", 28, 1 }, + { "aridfifo0_perr", 27, 1 }, + { "aridfifo1_perr", 26, 1 }, + { "rrspaddr_fifo0_perr", 25, 1 }, + { "rrspaddr_fifo1_perr", 24, 1 }, + { "wrstrb_fifo0_perr", 23, 1 }, + { "wrstrb_fifo1_perr", 22, 1 }, + { "ma2axi_rspDataParErr", 21, 1 }, + { "ma2axi_data_par_err", 20, 1 }, + { "ma2axi_wr_ord_fifo_parerr", 19, 1 }, + { "nvme_db_emu_tracker_fifo_perr", 18, 1 }, + { "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 }, + { "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 }, + { "nvme_db_emu_Id_fifo0_perr", 15, 1 }, + { "nvme_db_emu_Id_fifo1_perr", 14, 1 }, + { "rc_arwFifo_perr", 13, 1 }, + { "rc_aridburstaddrFifo_perr", 12, 1 }, + { "rc_cfg_fifo_perr", 11, 1 }, + { "rc_rspFifo_perr", 10, 1 }, + { "inic_arIDFifo_perr", 9, 1 }, + { "inic_arwFifo_perr", 8, 1 }, + { "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 }, + { "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 }, + { "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 }, + { "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 }, + { "arm_ma_512b_arb_fifo_perr", 3, 1 }, + { "pcie_inic_ma_arb_fifo_perr", 2, 1 }, + { "pcie_inic_arb_rspPerr", 1, 1 }, + { "ite_cache_perr", 0, 1 }, + { "ARM_PERR_ENABLE1", 0x47438, 0 }, + { "arwfifo0_perr", 31, 1 }, + { "arwfifo1_perr", 30, 1 }, + { "arwidfifo0_perr", 29, 1 }, + { "arwidfifo1_perr", 28, 1 }, + { "aridfifo0_perr", 27, 1 }, + { "aridfifo1_perr", 26, 1 }, + { "rrspaddr_fifo0_perr", 25, 1 }, + { "rrspaddr_fifo1_perr", 24, 1 }, + { "wrstrb_fifo0_perr", 23, 1 }, + { "wrstrb_fifo1_perr", 22, 1 }, + { "ma2axi_rspDataParErr", 21, 1 }, + { "ma2axi_data_par_err", 20, 1 }, + { "ma2axi_wr_ord_fifo_parerr", 19, 1 }, + { "nvme_db_emu_tracker_fifo_perr", 18, 1 }, + { "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 }, + { "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 }, + { "nvme_db_emu_Id_fifo0_perr", 15, 1 }, + { "nvme_db_emu_Id_fifo1_perr", 14, 1 }, + { "rc_arwFifo_perr", 13, 1 }, + { "rc_aridburstaddrFifo_perr", 12, 1 }, + { "rc_cfg_fifo_perr", 11, 1 }, + { "rc_rspFifo_perr", 10, 1 }, + { "inic_arIDFifo_perr", 9, 1 }, + { "inic_arwFifo_perr", 8, 1 }, + { "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 }, + { "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 }, + { "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 }, + { "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 }, + { "arm_ma_512b_arb_fifo_perr", 3, 1 }, + { "pcie_inic_ma_arb_fifo_perr", 2, 1 }, + { "pcie_inic_arb_rspPerr", 1, 1 }, + { "ite_cache_perr", 0, 1 }, + { "ARM_PERR_INT_CAUSE2", 0x4717c, 0 }, + { "inic_wstrb_fifo_perr", 31, 1 }, + { "inic_bId_fifo_perr", 30, 1 }, + { "cc_sram_pka_perr", 29, 1 }, + { "cc_sram_sec_perr", 28, 1 }, + { "mess2axi4_ParErr", 27, 1 }, + { "cci2inic_intf_ParErr", 26, 1 }, + { "ARM_PERR_INT_ENB2", 0x47128, 0 }, + { "inic_wstrb_fifo_perr", 31, 1 }, + { "inic_bId_fifo_perr", 30, 1 }, + { "cc_sram_pka_perr", 29, 1 }, + { "cc_sram_sec_perr", 28, 1 }, + { "mess2axi4_ParErr", 27, 1 }, + { "cci2inic_intf_ParErr", 26, 1 }, + { "ARM_PERR_ENABLE2", 0x4712c, 0 }, + { "inic_wstrb_fifo_perr", 31, 1 }, + { "inic_bId_fifo_perr", 30, 1 }, + { "cc_sram_pka_perr", 29, 1 }, + { "cc_sram_sec_perr", 28, 1 }, + { "mess2axi4_ParErr", 27, 1 }, + { "cci2inic_intf_ParErr", 26, 1 }, + { "ARM_CERR_INT_CAUSE0", 0x471dc, 0 }, + { "WrData_Fifo0_cerr", 31, 1 }, + { "WrData_Fifo1_cerr", 30, 1 }, + { "wr512dataFifo0_cerr", 29, 1 }, + { "wr512dataFifo1_cerr", 28, 1 }, + { "rdataFifo0_cerr", 27, 1 }, + { "rdataFifo1_cerr", 26, 1 }, + { "robuff_corerr0", 25, 1 }, + { "robuff_corerr1", 24, 1 }, + { "robuff_corerr2", 23, 1 }, + { "robuff_corerr3", 22, 1 }, + { "ma2axi_rspDataCorErr", 21, 1 }, + { "rc_sram_cerr", 19, 2 }, + { "rc_wFifo_outcerr", 18, 1 }, + { "rc_rspFifo_cerr", 17, 1 }, + { "msi_mem_cerr", 16, 1 }, + { "inic_WrData_Fifo_cerr", 15, 1 }, + { "inic_rdataFifo_cerr", 14, 1 }, + { "arm_db_sram_cerr", 12, 2 }, + { "icb_ram_cerr", 11, 1 }, + { "cc_sram_pka_cerr", 10, 1 }, + { "cc_sram_sec_cerr", 9, 1 }, + { "ARM_CERR_INT_ENB0", 0x471e8, 0 }, + { "WrData_Fifo0_cerr", 31, 1 }, + { "WrData_Fifo1_cerr", 30, 1 }, + { "wr512dataFifo0_cerr", 29, 1 }, + { "wr512dataFifo1_cerr", 28, 1 }, + { "rdataFifo0_cerr", 27, 1 }, + { "rdataFifo1_cerr", 26, 1 }, + { "robuff_corerr0", 25, 1 }, + { "robuff_corerr1", 24, 1 }, + { "robuff_corerr2", 23, 1 }, + { "robuff_corerr3", 22, 1 }, + { "ma2axi_rspDataCorErr", 21, 1 }, + { "rc_sram_cerr", 19, 2 }, + { "rc_wFifo_outcerr", 18, 1 }, + { "rc_rspFifo_cerr", 17, 1 }, + { "msi_mem_cerr", 16, 1 }, + { "inic_WrData_Fifo_cerr", 15, 1 }, + { "inic_rdataFifo_cerr", 14, 1 }, + { "arm_db_sram_cerr", 12, 2 }, + { "icb_ram_cerr", 11, 1 }, + { "cc_sram_pka_cerr", 10, 1 }, + { "cc_sram_sec_cerr", 9, 1 }, + { "ARM_ERR_INT_CAUSE0", 0x47444, 0 }, + { "strb0_error", 31, 1 }, + { "strb1_error", 30, 1 }, + { "pcie_inic_ma_arb_inv_rsp_tag", 29, 1 }, + { "error0_nocmd_data", 28, 1 }, + { "error1_nocmd_data", 27, 1 }, + { "inic_strb_error", 26, 1 }, + { "ARM_ERR_INT_ENB0", 0x47448, 0 }, + { "strb0_error", 31, 1 }, + { "strb1_error", 30, 1 }, + { "pcie_inic_ma_arb_inv_rsp_tag", 29, 1 }, + { "error0_nocmd_data", 28, 1 }, + { "error1_nocmd_data", 27, 1 }, + { "inic_strb_error", 26, 1 }, + { "ARM_PERIPHERAL_INT_CAUSE", 0x4718c, 0 }, + { "TIMER_INT", 5, 1 }, + { "NVME_INT", 4, 1 }, + { "EMMC_WAKEUP_INT", 3, 1 }, + { "EMMC_INT", 2, 1 }, + { "USB_MC_INT", 1, 1 }, + { "USB_DMA_INT", 0, 1 }, + { "ARM_PERIPHERAL_INT_ENB", 0x471e4, 0 }, + { "TIMER_INT", 5, 1 }, + { "NVME_INT", 4, 1 }, + { "EMMC_WAKEUP_INT", 3, 1 }, + { "EMMC_INT", 2, 1 }, + { "USB_MC_INT", 1, 1 }, + { "USB_DMA_INT", 0, 1 }, + { "ARM_SCRATCH_PAD3", 0x47178, 0 }, + { "ECO_43187", 31, 1 }, + { "TIMER_SEL", 28, 3 }, + { "TIMER", 4, 24 }, + { "INT", 0, 2 }, + { "ARM_MA2AXI_AW_ATTR", 0x47180, 0 }, + { "awLockR1", 29, 1 }, + { "awCacheR1", 25, 4 }, + { "awProtR1", 21, 4 }, + { "awSnoopR1", 18, 3 }, + { "awDomainR1", 16, 2 }, + { "awLockR0", 13, 1 }, + { "awCacheR0", 9, 4 }, + { "awProtR0", 5, 4 }, + { "awSnoopR0", 2, 3 }, + { "awDomainR0", 0, 2 }, + { "ARM_MA2AXI_AR_ATTR", 0x47184, 0 }, + { "arLockR1", 29, 1 }, + { "arCacheR1", 25, 4 }, + { "arProtR1", 21, 4 }, + { "arSnoopR1", 18, 3 }, + { "arDomainR1", 16, 2 }, + { "arLockR0", 13, 1 }, + { "arCacheR0", 9, 4 }, + { "arProtR0", 5, 4 }, + { "arSnoopR0", 2, 3 }, + { "arDomainR0", 0, 2 }, + { "ARM_MA2AXI_SNOOP_RGN", 0x47188, 0 }, + { "snoop_end", 16, 16 }, + { "snoop_start", 0, 16 }, + { "ARM_SCRATCH_PAD4", 0x47190, 0 }, + { "pad4", 15, 17 }, + { "arm_db_cnt", 0, 15 }, + { "ARM_SCRATCH_PAD5", 0x47194, 0 }, + { "ARM_SCRATCH_PAD6", 0x47198, 0 }, + { "ARM_SCRATCH_PAD7", 0x4719c, 0 }, + { "ARM_CPU_DBG_ROM_ADDR0", 0x47200, 0 }, + { "ARM_CPU_DBG_ROM_ADDR1", 0x47204, 0 }, + { "ARM_CPU_DBG_ROM_ADDR_VALID", 0x47208, 0 }, + { "ARM_CPU_DFT_CFG", 0x47220, 0 }, + { "CpuMbistReq", 11, 1 }, + { "CpuMbistRstn", 10, 1 }, + { "CpuDftDftSe", 9, 1 }, + { "CpuDftRstDisable", 8, 1 }, + { "CpuDftRamDisable", 7, 1 }, + { "CpuDftMcpDisable", 6, 1 }, + { "CpuDftL2ClkDisable", 5, 1 }, + { "CpuDftClkDisable3", 4, 1 }, + { "CpuDftClkDisable2", 3, 1 }, + { "CpuDftClkDisable1", 2, 1 }, + { "CpuDftClkDisable0", 1, 1 }, + { "CpuDftClkBypass", 0, 1 }, + { "ARM_ADB_PWR_DWN_REQ_N", 0x47230, 0 }, + { "ARM_CCI_CFG0", 0x47280, 0 }, + { "CciBroadcastcachemaint", 28, 3 }, + { "CciStripingGranule", 25, 3 }, + { "CciPeriphbase", 0, 25 }, + { "ARM_CCI_CFG1", 0x47284, 0 }, + { "CciDftRstDisable", 18, 1 }, + { "CciSpNiden", 17, 1 }, + { "CciNiden", 16, 1 }, + { "CciAcchannelN", 11, 5 }, + { "CciQosOverride", 6, 5 }, + { "CciBufferableOverride", 3, 3 }, + { "CciBarrierTerminate", 0, 3 }, + { "ARM_CCI_CFG2", 0x47288, 0 }, + { "CciAddrmap15", 30, 2 }, + { "CciAddrmap14", 28, 2 }, + { "CciAddrmap13", 26, 2 }, + { "CciAddrmap12", 24, 2 }, + { "CciAddrmap11", 22, 2 }, + { "CciAddrmap10", 20, 2 }, + { "CciAddrmap9", 18, 2 }, + { "CciAddrmap8", 16, 2 }, + { "CciAddrmap7", 14, 2 }, + { "CciAddrmap6", 12, 2 }, + { "CciAddrmap5", 10, 2 }, + { "CciAddrmap4", 8, 2 }, + { "CciAddrmap3", 6, 2 }, + { "CciAddrmap2", 4, 2 }, + { "CciAddrmap1", 2, 2 }, + { "CciAddrmap0", 0, 2 }, + { "ARM_CCI_STATUS", 0x4728c, 0 }, + { "CciCActive", 6, 1 }, + { "CciCsysAck", 5, 1 }, + { "CciNEvntCntOverflow", 0, 5 }, + { "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x47290, 0 }, + { "CciVWreadyvn3M", 20, 1 }, + { "CciVAwreadyvn3M", 19, 1 }, + { "CciVArreadyvn3M", 18, 1 }, + { "CciVWreadyvn2M", 17, 1 }, + { "CciVAwreadyvn2M", 16, 1 }, + { "CciVArreadyvn2M", 15, 1 }, + { "CciVWreadyvn1M", 14, 1 }, + { "CciVAwreadyvn1M", 13, 1 }, + { "CciVArreadyvn1M", 12, 1 }, + { "CciVWreadyvn0M", 11, 1 }, + { "CciVAwreadyvn0M", 10, 1 }, + { "CciVArreadyvn0M", 9, 1 }, + { "CciQvnPreallocwM", 5, 4 }, + { "CciQvnPreallocrM", 1, 4 }, + { "CciQvnenableM", 0, 1 }, + { "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x47294, 0 }, + { "CciVWValidN3M", 31, 1 }, + { "CciVAwValidN3M", 30, 1 }, + { "CciVAwQosN3M", 29, 1 }, + { "CciVArValidN3M", 28, 1 }, + { "CciVArQosN3M", 24, 4 }, + { "CciVWValidN2M", 23, 1 }, + { "CciVAwValidN2M", 22, 1 }, + { "CciVAwQosN2M", 21, 1 }, + { "CciVArValidN2M", 20, 1 }, + { "CciVArQosN2M", 16, 4 }, + { "CciVWValidN1M", 15, 1 }, + { "CciVAwValidN1M", 14, 1 }, + { "CciVAwQosN1M", 13, 1 }, + { "CciVArValidN1M", 12, 1 }, + { "CciVArQosN1M", 8, 4 }, + { "CciVWValidN0M", 7, 1 }, + { "CciVAwValidN0M", 6, 1 }, + { "CciVAwQosN0M", 5, 1 }, + { "CciVArValidN0M", 4, 1 }, + { "CciVArQosN0M", 0, 4 }, + { "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x47298, 0 }, + { "CciVWreadyvn3M", 20, 1 }, + { "CciVAwreadyvn3M", 19, 1 }, + { "CciVArreadyvn3M", 18, 1 }, + { "CciVWreadyvn2M", 17, 1 }, + { "CciVAwreadyvn2M", 16, 1 }, + { "CciVArreadyvn2M", 15, 1 }, + { "CciVWreadyvn1M", 14, 1 }, + { "CciVAwreadyvn1M", 13, 1 }, + { "CciVArreadyvn1M", 12, 1 }, + { "CciVWreadyvn0M", 11, 1 }, + { "CciVAwreadyvn0M", 10, 1 }, + { "CciVArreadyvn0M", 9, 1 }, + { "CciQvnPreallocwM", 5, 4 }, + { "CciQvnPreallocrM", 1, 4 }, + { "CciQvnenableM", 0, 1 }, + { "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x4729c, 0 }, + { "CciVWValidN3M", 31, 1 }, + { "CciVAwValidN3M", 30, 1 }, + { "CciVAwQosN3M", 29, 1 }, + { "CciVArValidN3M", 28, 1 }, + { "CciVArQosN3M", 24, 4 }, + { "CciVWValidN2M", 23, 1 }, + { "CciVAwValidN2M", 22, 1 }, + { "CciVAwQosN2M", 21, 1 }, + { "CciVArValidN2M", 20, 1 }, + { "CciVArQosN2M", 16, 4 }, + { "CciVWValidN1M", 15, 1 }, + { "CciVAwValidN1M", 14, 1 }, + { "CciVAwQosN1M", 13, 1 }, + { "CciVArValidN1M", 12, 1 }, + { "CciVArQosN1M", 8, 4 }, + { "CciVWValidN0M", 7, 1 }, + { "CciVAwValidN0M", 6, 1 }, + { "CciVAwQosN0M", 5, 1 }, + { "CciVArValidN0M", 4, 1 }, + { "CciVArQosN0M", 0, 4 }, + { "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x472a0, 0 }, + { "CciVWreadyvn3M", 20, 1 }, + { "CciVAwreadyvn3M", 19, 1 }, + { "CciVArreadyvn3M", 18, 1 }, + { "CciVWreadyvn2M", 17, 1 }, + { "CciVAwreadyvn2M", 16, 1 }, + { "CciVArreadyvn2M", 15, 1 }, + { "CciVWreadyvn1M", 14, 1 }, + { "CciVAwreadyvn1M", 13, 1 }, + { "CciVArreadyvn1M", 12, 1 }, + { "CciVWreadyvn0M", 11, 1 }, + { "CciVAwreadyvn0M", 10, 1 }, + { "CciVArreadyvn0M", 9, 1 }, + { "CciQvnPreallocwM", 5, 4 }, + { "CciQvnPreallocrM", 1, 4 }, + { "CciQvnenableM", 0, 1 }, + { "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x472a4, 0 }, + { "CciVWValidN3M", 31, 1 }, + { "CciVAwValidN3M", 30, 1 }, + { "CciVAwQosN3M", 29, 1 }, + { "CciVArValidN3M", 28, 1 }, + { "CciVArQosN3M", 24, 4 }, + { "CciVWValidN2M", 23, 1 }, + { "CciVAwValidN2M", 22, 1 }, + { "CciVAwQosN2M", 21, 1 }, + { "CciVArValidN2M", 20, 1 }, + { "CciVArQosN2M", 16, 4 }, + { "CciVWValidN1M", 15, 1 }, + { "CciVAwValidN1M", 14, 1 }, + { "CciVAwQosN1M", 13, 1 }, + { "CciVArValidN1M", 12, 1 }, + { "CciVArQosN1M", 8, 4 }, + { "CciVWValidN0M", 7, 1 }, + { "CciVAwValidN0M", 6, 1 }, + { "CciVAwQosN0M", 5, 1 }, + { "CciVArValidN0M", 4, 1 }, + { "CciVArQosN0M", 0, 4 }, + { "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x472a8, 0 }, + { "CciVWreadyvn3M", 20, 1 }, + { "CciVAwreadyvn3M", 19, 1 }, + { "CciVArreadyvn3M", 18, 1 }, + { "CciVWreadyvn2M", 17, 1 }, + { "CciVAwreadyvn2M", 16, 1 }, + { "CciVArreadyvn2M", 15, 1 }, + { "CciVWreadyvn1M", 14, 1 }, + { "CciVAwreadyvn1M", 13, 1 }, + { "CciVArreadyvn1M", 12, 1 }, + { "CciVWreadyvn0M", 11, 1 }, + { "CciVAwreadyvn0M", 10, 1 }, + { "CciVArreadyvn0M", 9, 1 }, + { "CciQvnPreallocwM", 5, 4 }, + { "CciQvnPreallocrM", 1, 4 }, + { "CciQvnenableM", 0, 1 }, + { "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x472ac, 0 }, + { "CciVWValidN3M", 31, 1 }, + { "CciVAwValidN3M", 30, 1 }, + { "CciVAwQosN3M", 29, 1 }, + { "CciVArValidN3M", 28, 1 }, + { "CciVArQosN3M", 24, 4 }, + { "CciVWValidN2M", 23, 1 }, + { "CciVAwValidN2M", 22, 1 }, + { "CciVAwQosN2M", 21, 1 }, + { "CciVArValidN2M", 20, 1 }, + { "CciVArQosN2M", 16, 4 }, + { "CciVWValidN1M", 15, 1 }, + { "CciVAwValidN1M", 14, 1 }, + { "CciVAwQosN1M", 13, 1 }, + { "CciVArValidN1M", 12, 1 }, + { "CciVArQosN1M", 8, 4 }, + { "CciVWValidN0M", 7, 1 }, + { "CciVAwValidN0M", 6, 1 }, + { "CciVAwQosN0M", 5, 1 }, + { "CciVArValidN0M", 4, 1 }, + { "CciVArQosN0M", 0, 4 }, + { "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472d0, 0 }, + { "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472d4, 0 }, + { "CciEvntAwQos", 4, 4 }, + { "CciEvntArQos", 0, 4 }, + { "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472d8, 0 }, + { "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472dc, 0 }, + { "CciEvntAwQos", 4, 4 }, + { "CciEvntArQos", 0, 4 }, + { "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472e0, 0 }, + { "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472e4, 0 }, + { "CciEvntAwQos", 4, 4 }, + { "CciEvntArQos", 0, 4 }, + { "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472e8, 0 }, + { "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472ec, 0 }, + { "CciEvntAwQos", 4, 4 }, + { "CciEvntArQos", 0, 4 }, + { "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472f0, 0 }, + { "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472f4, 0 }, + { "CciEvntAwQos", 4, 4 }, + { "CciEvntArQos", 0, 4 }, + { "ARM_CCI_EVNTBUS", 0x47300, 0 }, + { "ARM_CCI_EVNTBUS", 0x47304, 0 }, + { "ARM_CCI_EVNTBUS", 0x47308, 0 }, + { "ARM_CCI_EVNTBUS", 0x4730c, 0 }, + { "ARM_CCI_EVNTBUS", 0x47310, 0 }, + { "ARM_CCI_RST_N", 0x47318, 0 }, + { "ARM_CCI_CSYREQ", 0x4731c, 0 }, + { "ARM_CCI_TR_DEBUGS0", 0x47320, 0 }, + { "CciS0RCnt", 24, 8 }, + { "CciS0ArCnt", 16, 8 }, + { "CciS0WCnt", 8, 8 }, + { "CciS0AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGS1", 0x47324, 0 }, + { "CciS1RCnt", 24, 8 }, + { "CciS1ArCnt", 16, 8 }, + { "CciS1WCnt", 8, 8 }, + { "CciS1AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGS2", 0x47328, 0 }, + { "CciS2RCnt", 24, 8 }, + { "CciS2ArCnt", 16, 8 }, + { "CciS2WCnt", 8, 8 }, + { "CciS2AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGS3", 0x4732c, 0 }, + { "CciS3RCnt", 24, 8 }, + { "CciS3ArCnt", 16, 8 }, + { "CciS3WCnt", 8, 8 }, + { "CciS3AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGS4", 0x47330, 0 }, + { "CciS4RCnt", 24, 8 }, + { "CciS4ArCnt", 16, 8 }, + { "CciS4WCnt", 8, 8 }, + { "CciS4AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGS34", 0x47334, 0 }, + { "CciS4RspCnt", 24, 8 }, + { "CciS4AcCnt", 16, 8 }, + { "CciS3RspCnt", 8, 8 }, + { "CciS3AcCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGM0", 0x47338, 0 }, + { "CciM0RCnt", 24, 8 }, + { "CciM0ArCnt", 16, 8 }, + { "CciM0WCnt", 8, 8 }, + { "CciM0AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGM1", 0x4733c, 0 }, + { "CciM1RCnt", 24, 8 }, + { "CciM1ArCnt", 16, 8 }, + { "CciM1WCnt", 8, 8 }, + { "CciM1AwCnt", 0, 8 }, + { "ARM_CCI_TR_DEBUGM2", 0x47340, 0 }, + { "CciM2RCnt", 24, 8 }, + { "CciM2ArCnt", 16, 8 }, + { "CciM2WCnt", 8, 8 }, + { "CciM2AwCnt", 0, 8 }, + { "ARM_MA_TR_DEBUG", 0x47344, 0 }, + { "ma1_rd_cnt", 24, 8 }, + { "ma1_wr_cnt", 16, 8 }, + { "ma0_rd_cnt", 8, 8 }, + { "ma0_wr_cnt", 0, 8 }, + { "ARM_GP_INT", 0x47348, 0 }, + { "ARM_DMA_CFG0", 0x47350, 0 }, + { "ARM_DMA_CFG1", 0x47354, 0 }, + { "DmaBootPeriphNs", 16, 10 }, + { "DmaBootIrqNs", 4, 10 }, + { "DmaBootManagerNs", 1, 1 }, + { "DmaBootFromPc", 0, 1 }, + { "ARM_ARM_CFG0", 0x47380, 0 }, + { "MessageBypass_data", 2, 1 }, + { "MessageBypass", 1, 1 }, + { "PcieBypass", 0, 1 }, + { "ARM_ARM_CFG1", 0x47384, 0 }, + { "ARM_ARM_CFG1", 0x47388, 0 }, + { "ARM_ARM_CFG2", 0x47390, 0 }, + { "ARM_ARM_CFG2", 0x47394, 0 }, + { "ARM_PCIE_MA_ADDR_REGION0", 0x47400, 0 }, + { "ARM_PCIE_MA_ADDR_REGION1", 0x47404, 0 }, + { "ARM_PCIE_MA_ADDR_REGION2", 0x47408, 0 }, + { "ARM_PCIE_MA_ADDR_REGION3", 0x4740c, 0 }, + { "ARM_PCIE_MA_ADDR_REGION4", 0x47410, 0 }, + { "ARM_PCIE_MA_ADDR_REGION5", 0x47414, 0 }, + { "ARM_PCIE_MA_ADDR_REGION6", 0x47418, 0 }, + { "ARM_PCIE_MA_ADDR_REGION7", 0x4741c, 0 }, + { "ARM_PCIE_MA_ADDR_REGION_DST", 0x47440, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47500, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47504, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47508, 0 }, + { "WaterMark", 16, 10 }, + { "SizeMax", 0, 10 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4750c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47510, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47514, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47518, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4751c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47530, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47534, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47538, 0 }, + { "WaterMark", 16, 10 }, + { "SizeMax", 0, 10 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4753c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47540, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47544, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47548, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4754c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47560, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47564, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47568, 0 }, + { "WaterMark", 16, 10 }, + { "SizeMax", 0, 10 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4756c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47570, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47574, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47578, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4757c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47590, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47594, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47598, 0 }, + { "WaterMark", 16, 10 }, + { "SizeMax", 0, 10 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4759c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x475a0, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x475a4, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x475a8, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x475ac, 0 }, + { "ARM_APB2MSI_INTERRUPT_0_STATUS", 0x47600, 0 }, + { "ARM_APB2MSI_INTERRUPT_1_STATUS", 0x47604, 0 }, + { "ARM_APB2MSI_INTERRUPT_2_STATUS", 0x47608, 0 }, + { "ARM_APB2MSI_INTERRUPT_3_STATUS", 0x4760c, 0 }, + { "ARM_APB2MSI_INTERRUPT_0_ENABLE", 0x47610, 0 }, + { "ARM_APB2MSI_INTERRUPT_1_ENABLE", 0x47614, 0 }, + { "ARM_APB2MSI_INTERRUPT_2_ENABLE", 0x47618, 0 }, + { "ARM_APB2MSI_INTERRUPT_3_ENABLE", 0x4761c, 0 }, + { "ARM_APB2MSI_INTERRUPT_PRIORITY_LEVEL", 0x47620, 0 }, + { "ARM_APB2MSI_MEM_READ_ADDR", 0x47624, 0 }, + { "ARM_MSI_MEMORY_DATA", 0x47628, 0 }, + { "ARM_MSI_MEMORY_ADDR", 0x4762c, 0 }, + { "ARM_MSG_PCIE_MESSAGE2AXI_CFG5", 0x47630, 0 }, + { "ARM_AXI2MA_TIMERCNT", 0x47640, 0 }, + { "ARM_AXI2MA_TRTYPE", 0x47644, 0 }, + { "ArmMa2Axi1ArTrType", 3, 1 }, + { "ArmMa2Axi1AwTrType", 2, 1 }, + { "ArmMa2Axi0ArTrType", 1, 1 }, + { "ArmMa2Axi0AwTrType", 0, 1 }, + { "ARM_AXI2PCIE_VENDOR", 0x47660, 0 }, + { "VendorID", 4, 16 }, + { "OBFFcode", 0, 4 }, + { "ARM_AXI2PCIE_VENMSGHDR_DW3", 0x47664, 0 }, + { "ARM_CLUSTER_SEL", 0x47668, 0 }, + { "ARM_PWRREQ_PERMIT_ADB", 0x4766c, 0 }, + { "pwrq_permit_deny_sar", 1, 1 }, + { "pwrqreqns_adb", 0, 1 }, + { "ARM_CLK_REQ_ADB", 0x47670, 0 }, + { "ARM_WAKEUPM", 0x47674, 0 }, + { "dftrstdisablem_adb", 2, 1 }, + { "dftrstdisables_adb", 1, 1 }, + { "wakeupm_i_adb", 0, 1 }, + { "ARM_CC_APB_FILTERING", 0x47678, 0 }, + { "cc_dftscanmode", 11, 1 }, + { "cc_otp_filtering_disable", 10, 1 }, + { "cc_apb_filtering", 0, 10 }, + { "ARM_DCU_EN0", 0x4767c, 0 }, + { "ARM_DCU_EN1", 0x47680, 0 }, + { "ARM_DCU_EN2", 0x47684, 0 }, + { "ARM_DCU_EN3", 0x47688, 0 }, + { "ARM_DCU_LOCK0", 0x4768c, 0 }, + { "ARM_DCU_LOCK1", 0x47690, 0 }, + { "ARM_DCU_LOCK2", 0x47694, 0 }, + { "ARM_DCU_LOCK3", 0x47698, 0 }, + { "ARM_GPPC", 0x4769c, 0 }, + { "cc_sec_debug_reset", 24, 1 }, + { "cc_dftse", 23, 1 }, + { "cc_dftcgen", 22, 1 }, + { "cc_dftramhold", 21, 1 }, + { "cc_lock_bits", 12, 9 }, + { "cc_lcs_is_valid", 11, 1 }, + { "cc_lcs", 8, 3 }, + { "cc_gppc", 0, 8 }, + { "ARM_EMMC", 0x47700, 0 }, + { "emmc_card_clk_en", 31, 1 }, + { "emmc_led_control", 30, 1 }, + { "emmc_uhs1_swvolt_en", 29, 1 }, + { "emmc_uhs1_drv_sth", 27, 2 }, + { "emmc_sd_vdd1_on", 26, 1 }, + { "emmc_sd_vdd1_sel", 23, 3 }, + { "emmc_intclk_en", 22, 1 }, + { "emmc_card_clk_freq_sel", 12, 10 }, + { "emmc_card_clk_gen_sel", 11, 1 }, + { "emmc_clk2card_on", 10, 1 }, + { "emmc_card_clk_stable", 9, 1 }, + { "emmc_int_bclk_stable", 8, 1 }, + { "emmc_int_aclk_stable", 7, 1 }, + { "emmc_int_tmclk_stable", 6, 1 }, + { "emmc_host_reg_vol_stable", 5, 1 }, + { "emmc_card_detect_n", 4, 1 }, + { "emmc_card_write_prot", 3, 1 }, + { "emmc_gp_in", 2, 1 }, + { "emmc_test_scan_mode", 1, 1 }, + { "emmc_FifoInjDataErr", 0, 1 }, + { "ARM_WAKEUPS", 0x47704, 0 }, + { "ARM_CLKREQNM_ADB", 0x47708, 0 }, + { "ARM_ATOMICDATA0_0", 0x4770c, 0 }, + { "ARM_ATOMICDATA0_1", 0x477b0, 0 }, + { "ARM_ATOMICDATA1_0", 0x47710, 0 }, + { "ARM_ATOMICDATA1_1", 0x477b4, 0 }, + { "ARM_TCAM_WRITE_DATA", 0x47744, 0 }, + { "ARM_TCAM_WRITE_ADDR", 0x47748, 0 }, + { "ARM_TCAM_READ_ADDR", 0x4774c, 0 }, + { "ARM_TCAM_CTL", 0x47750, 0 }, + { "TcamCbBusy", 6, 1 }, + { "TcamCbPass", 5, 1 }, + { "TcamCbStart", 4, 1 }, + { "TcamRstCb", 3, 1 }, + { "tcam_ReqBitPos", 2, 1 }, + { "tcam_write", 1, 1 }, + { "tcam_enable", 0, 1 }, + { "ARM_TCAM_READ_DATA", 0x4775c, 0 }, + { "ARM_SRAM1_WRITE_DATA", 0x47760, 0 }, + { "ARM_SRAM1_WRITE_ADDR", 0x47764, 0 }, + { "ARM_SRAM1_READ_ADDR", 0x47768, 0 }, + { "ARM_SRAM1_CTL", 0x4776c, 0 }, + { "sram1_write", 1, 1 }, + { "sram1_enable", 0, 1 }, + { "ARM_SRAM1_READ_DATA", 0x47770, 0 }, + { "ARM_SRAM2_WRITE_DATA0", 0x47774, 0 }, + { "ARM_SRAM2_WRITE_DATA1", 0x47778, 0 }, + { "ARM_SRAM2_WRITE_DATA2", 0x4777c, 0 }, + { "ARM_SRAM2_WRITE_DATA3", 0x47210, 0 }, + { "ARM_SRAM2_WRITE_ADDR", 0x47780, 0 }, + { "ARM_SRAM2_READ_ADDR", 0x47784, 0 }, + { "ARM_SRAM2_CTL", 0x47788, 0 }, + { "sram2_write", 1, 1 }, + { "sram2_enable", 0, 1 }, + { "ARM_SRAM2_READ_DATA0", 0x4778c, 0 }, + { "ARM_SRAM2_READ_DATA1", 0x47790, 0 }, + { "ARM_SRAM2_READ_DATA2", 0x47794, 0 }, + { "ARM_SRAM2_READ_DATA3", 0x4721c, 0 }, + { "ARM_DBPROC_SRAM_CTL", 0x47798, 0 }, + { "ARM_DBPROC_SRAM_READ_ADDR", 0x4779c, 0 }, + { "ARM_DBPROC_SRAM_READ_DATA0", 0x477a0, 0 }, + { "ARM_DBPROC_SRAM_READ_DATA1", 0x477a4, 0 }, + { "ARM_DBPROC_SRAM_READ_DATA2", 0x477a8, 0 }, + { "ARM_DBPROC_SRAM_READ_DATA3", 0x477ac, 0 }, + { "ARM_DBPROC_CONTROL", 0x4742c, 0 }, + { "ARM_SPIDEN", 0x477b8, 0 }, + { "ARM_RC_INT_WRITE_DATA", 0x477bc, 0 }, + { "ARM_RC_INT_STATUS", 0x4705c, 0 }, + { "ARM_DFT_MBI", 0x477c4, 0 }, + { "mbistreq", 3, 1 }, + { "mbistresetn", 2, 1 }, + { "dftramhold", 1, 1 }, + { "dftcgen", 0, 1 }, + { "ARM_PLM_RID_CFG", 0x4703c, 0 }, + { "ARM_PLM_EROM_CFG", 0x47040, 0 }, + { "ARM_PL_ARM_HDR_CFG", 0x4704c, 0 }, + { "ARM_MBISTACK", 0x477d4, 0 }, + { "ARM_MBISTADDR", 0x477d8, 0 }, + { "ARM_MBISTREADEN", 0x477dc, 0 }, + { "ARM_MBISTWRITEEN", 0x477e0, 0 }, + { "ARM_MBISTARRAY", 0x477e4, 0 }, + { "ARM_MBISTCFG", 0x477e8, 0 }, + { "ARM_MBISTINDATA0", 0x477ec, 0 }, + { "ARM_MBISTINDATA1", 0x477f0, 0 }, + { "ARM_MBISTOUTDATA1", 0x477f4, 0 }, + { "ARM_MBISTOUTDATA0", 0x477f8, 0 }, + { "ARM_PL_DMA_AW_OFFSET", 0x47018, 0 }, + { "ARM_PL_DMA_AR_OFFSET", 0x4701c, 0 }, + { "ARM_DMA_RST", 0x4702c, 0 }, + { "ARM_APB_CFG", 0x47224, 0 }, + { "ARM_EMMC_BUFS", 0x47228, 0 }, + { "emmc_bufs_oen", 2, 2 }, + { "emmc_bufs_i", 0, 2 }, + { "ARM_SWP_EN", 0x4722c, 0 }, + { "ARM_GIC_USER", 0x47238, 0 }, + { "ARM_DBPROC_SRAM_TH_CTL", 0x477c8, 0 }, + { "dbproc_th_wr_en", 1, 1 }, + { "dbproc_th_rd_en", 0, 1 }, + { "ARM_DBPROC_SRAM_TH_ADDR", 0x47240, 0 }, + { "ARM_DBPROC_SRAM_TH_READ_DATA0", 0x47244, 0 }, + { "ARM_DBPROC_SRAM_TH_READ_DATA1", 0x47248, 0 }, + { "ARM_DBPROC_SRAM_TH_READ_DATA2", 0x4724c, 0 }, + { "ARM_DBPROC_SRAM_TH_READ_DATA3", 0x47250, 0 }, + { "ARM_DBPROC_SRAM_TH_WR_DATA0", 0x47254, 0 }, + { "ARM_DBPROC_SRAM_TH_WR_DATA1", 0x47258, 0 }, + { "ARM_DBPROC_SRAM_TH_WR_DATA2", 0x4725c, 0 }, + { "ARM_DBPROC_SRAM_TH_WR_DATA3", 0x47260, 0 }, + { "ARM_SWP_EN_2", 0x47264, 0 }, + { "ARM_GIC_ERR", 0x47268, 0 }, + { "ecc_fatal", 1, 1 }, + { "axim_err", 0, 1 }, + { "ARM_CPU_STAT", 0x4726c, 0 }, + { "cpu_l2_qactive", 12, 1 }, + { "wakeupm_o_adb", 11, 1 }, + { "pwrqactivem_adb", 10, 1 }, + { "clkqactivem_adb", 9, 1 }, + { "clkqdenym_adb", 8, 1 }, + { "clkqacceptnm_adb", 7, 1 }, + { "wakeups_o_adb", 6, 1 }, + { "pwrqactives_adb", 5, 1 }, + { "clkqactives_adb", 4, 1 }, + { "clkqdenys_adb", 3, 1 }, + { "clkqacceptns_adb", 2, 1 }, + { "pwrqdenys_adb", 1, 1 }, + { "pwrqacceptns_adb", 0, 1 }, + { "ARM_DEBUG_INT_WRITE_DATA", 0x47270, 0 }, + { "ARM_DEBUG_INT_STAT", 0x47274, 0 }, + { "ARM_DEBUG_STAT", 0x47278, 0 }, + { "ARM_SIZE_STAT", 0x4727c, 0 }, + { "ARM_CS_RST", 0x470c0, 0 }, + { "atclken", 9, 1 }, + { "cxapbicrstn", 8, 1 }, + { "csdbgen", 7, 1 }, + { "jtagnpotrst", 6, 1 }, + { "jtagntrst", 5, 1 }, + { "paddr31s0", 4, 1 }, + { "cticlken", 3, 1 }, + { "pclkendbg", 2, 1 }, + { "cpu_niden", 1, 1 }, + { "cpu_dbgen", 0, 1 }, + { "ARM_CS_ADDRL", 0x470c4, 0 }, + { "ARM_CS_ADDRH", 0x470c8, 0 }, + { "ARM_CS_DFT_CONTROL", 0x470cc, 0 }, + { "dftmbistaddr", 5, 11 }, + { "dftmteston", 3, 1 }, + { "dftmbistce", 2, 1 }, + { "dftmbitwr", 1, 1 }, + { "dftse", 0, 1 }, + { "ARM_CS_DFT_IN", 0x470d0, 0 }, + { "ARM_CS_DFT_OUT", 0x470d4, 0 }, + { "ARM_EMMC_CTRL", 0x47088, 0 }, + { "EMMC_DATA_P2", 24, 8 }, + { "EMMC_DATA_P1", 16, 8 }, + { "EMMC_CMD_P2", 15, 1 }, + { "EMMC_CMD_P1", 14, 1 }, + { "EMMC_RST_P2", 13, 1 }, + { "EMMC_RST_P1", 12, 1 }, + { "EMMC_GP_IN_P2", 10, 2 }, + { "EMMC_GP_IN_P1", 8, 2 }, + { "EMMC_CLK_SEL", 0, 8 }, + { "ARM_INTERRUPT_GEN", 0x47420, 0 }, + { "ARM_INTERRUPT_CLEAR", 0x47424, 0 }, + { "ARM_DEBUG_STATUS_0", 0x47428, 0 }, + { "ARM_DEBUG_STATUS_1", 0x4743c, 0 }, + { "ARM_NVME_DB_EMU_EN", 0x477fc, 0 }, + { "ARM_NVME_DB_EMU_INT_CAUSE", 0x4709c, 0 }, + { "invalid_bresp", 3, 1 }, + { "data_len_of", 2, 1 }, + { "invalid_emu_addr", 1, 1 }, + { "invalid_axi_addr_cfg", 0, 1 }, + { "ARM_NVME_DB_EMU_INT_ENABLE", 0x47740, 0 }, + { "invalid_bresp", 3, 1 }, + { "data_len_of", 2, 1 }, + { "invalid_emu_addr", 1, 1 }, + { "invalid_axi_addr_cfg", 0, 1 }, + { "ARM_NVME_DB_EMU_INDEX", 0x471a0, 0 }, + { "ARM_NVME_DB_EMU_REGION_CTL", 0x471a4, 0 }, + { "window_en", 4, 1 }, + { "rgn2_int_en", 3, 1 }, + { "rgn1_int_en", 2, 1 }, + { "queue_en", 1, 1 }, + { "rgn0_int_en", 0, 1 }, + { "ARM_NVME_DB_EMU_DEVICE_CTL", 0x471a8, 0 }, + { "device_size", 8, 4 }, + { "rgn1_size", 4, 4 }, + { "rgn0_size", 0, 4 }, + { "ARM_NVME_DB_EMU_WINDOW_START_ADDR", 0x471b0, 0 }, + { "ARM_NVME_DB_EMU_WINDOW_END_ADDR", 0x471b4, 0 }, + { "ARM_NVME_DB_EMU_QBASE_ADDR", 0x471b8, 0 }, + { "ARM_NVME_DB_EMU_QUEUE_CID", 0x471bc, 0 }, + { "ARM_NVME_DB_EMU_QUEUE_CTL", 0x471c0, 0 }, + { "int_en", 27, 1 }, + { "threshold", 10, 17 }, + { "size", 0, 10 }, + { "ARM_NVME_DB_EMU_QUEUE_CTL_2", 0x471e0, 0 }, + { "ARM_NVME_DB_EMU_MSIX_ADDR_L", 0x471c4, 0 }, + { "ARM_NVME_DB_EMU_MSIX_ADDR_H", 0x471c8, 0 }, + { "ARM_NVME_DB_EMU_MSIX_OFFSET", 0x471cc, 0 }, + { "ARM_NVME_DB_EMU_QUEUE_MSIX_ADDR_L", 0x471d0, 0 }, + { "ARM_NVME_DB_EMU_QUEUE_MSIX_ADDR_H", 0x471d4, 0 }, + { "ARM_NVME_DB_EMU_QUEUE_MSIX_OFFSET", 0x471d8, 0 }, + { NULL } +}; + +struct reg_info t7_mc_t70_regs[] = { + { "MC_IND_ADDR", 0x48000, 0 }, + { "autoincr", 30, 2 }, + { "addr", 0, 25 }, + { "MC_IND_DATA", 0x48004, 0 }, + { "MC_DBG_CTL", 0x48018, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG", 16, 1 }, + { "SEL", 0, 8 }, + { "MC_DBG_DATA", 0x4801c, 0 }, + { "MC_P_DDRPHY_RST_CTRL", 0x49300, 0 }, + { "PHY_CAL_REQ", 21, 1 }, + { "PHY_DRAM_WL", 17, 4 }, + { "PHY_CALIB_DONE", 5, 1 }, + { "CTL_CAL_REQ", 4, 1 }, + { "CTL_CKE", 3, 1 }, + { "CTL_RST_N", 2, 1 }, + { "DDRIO_ENABLE", 1, 1 }, + { "PHY_RST_N", 0, 1 }, + { "MC_P_PERFORMANCE_CTRL", 0x49304, 0 }, + { "BUF_USE_TH", 12, 3 }, + { "MC_IDLE_TH", 8, 4 }, + { "RMW_DEFER_EN", 7, 1 }, + { "DDR3_BRBC_MODE", 6, 1 }, + { "RMW_DWRITE_EN", 5, 1 }, + { "RMW_MERGE_EN", 4, 1 }, + { "SYNC_PAB_EN", 3, 1 }, + { "STALL_CHK_BIT", 2, 1 }, + { "DDR3_BRC_MODE", 1, 1 }, + { "RMW_PERF_CTRL", 0, 1 }, + { "MC_P_ECC_CTRL", 0x49308, 0 }, + { "BistECCHBWCtl", 7, 2 }, + { "BistTestMode", 6, 1 }, + { "rmw_ctl_cfg", 4, 2 }, + { "ECC_BYPASS_BIST", 1, 1 }, + { "ECC_DISABLE", 0, 1 }, + { "MC_P_DDRCTL_INT_ENABLE", 0x4930c, 0 }, + { "HIF_WDATA_PTR_ADDR_ERR_DCH1_ENABLE", 5, 1 }, + { "HIF_RDATA_CRC_ERR_DCH1_ENABLE", 4, 1 }, + { "HIF_RDATA_ADDR_ERR_DCH1_ENABLE", 3, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_ENABLE", 2, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH0_ENABLE", 1, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH0_ENABLE", 0, 1 }, + { "MC_P_DDRCTL_INT_CAUSE", 0x49310, 0 }, + { "WR_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 25, 1 }, + { "WR_CRC_ERR_INTR_DCH1_CAUSE", 24, 1 }, + { "CAPAR_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 23, 1 }, + { "RD_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 22, 1 }, + { "DERATE_TEMP_LIMIT_INTR_DCH1_CAUSE", 21, 1 }, + { "SWCMD_ERR_INTR_DCH1_CAUSE", 20, 1 }, + { "DUCMD_ERR_INTR_DCH1_CAUSE", 19, 1 }, + { "LCCMD_ERR_INTR_DCH1_CAUSE", 18, 1 }, + { "CTRLUPD_ERR_INTR_DCH1_CAUSE", 17, 1 }, + { "RFM_ALERT_INTR_DCH1_CAUSE", 16, 1 }, + { "WR_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 15, 1 }, + { "WR_CRC_ERR_INTR_DCH0_CAUSE", 14, 1 }, + { "CAPAR_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 13, 1 }, + { "RD_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 12, 1 }, + { "DERATE_TEMP_LIMIT_INTR_DCH0_CAUSE", 11, 1 }, + { "SWCMD_ERR_INTR_DCH0_CAUSE", 10, 1 }, + { "DUCMD_ERR_INTR_DCH0_CAUSE", 9, 1 }, + { "LCCMD_ERR_INTR_DCH0_CAUSE", 8, 1 }, + { "CTRLUPD_ERR_INTR_DCH0_CAUSE", 7, 1 }, + { "RFM_ALERT_INTR_DCH0_CAUSE", 6, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH1_CAUSE", 5, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH1_CAUSE", 4, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH1_CAUSE", 3, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_CAUSE", 2, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH0_CAUSE", 1, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH0_CAUSE", 0, 1 }, + { "MC_P_PAR_ENABLE", 0x49314, 0 }, + { "HIF_WDATA_Q_PARERR_DCH1_ENABLE", 13, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH1_ENABLE", 12, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH0_ENABLE", 11, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH1_ENABLE", 10, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH0_ENABLE", 9, 1 }, + { "WDATARAM_PARERR_DCH1_ENABLE", 8, 1 }, + { "WDATARAM_PARERR_DCH0_ENABLE", 7, 1 }, + { "BIST_ADDR_FIFO_PARERR_ENABLE", 6, 1 }, + { "BIST_ERR_ADDR_FIFO_PARERR_ENABLE", 5, 1 }, + { "HIF_WDATA_Q_PARERR_DCH0_ENABLE", 4, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH1_ENABLE", 3, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH0_ENABLE", 2, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH1_ENABLE", 1, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH0_ENABLE", 0, 1 }, + { "MC_P_PAR_CAUSE", 0x49318, 0 }, + { "HIF_WDATA_Q_PARERR_DCH1_CAUSE", 13, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH1_CAUSE", 12, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH0_CAUSE", 11, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH1_CAUSE", 10, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH0_CAUSE", 9, 1 }, + { "WDATARAM_PARERR_DCH1_CAUSE", 8, 1 }, + { "WDATARAM_PARERR_DCH0_CAUSE", 7, 1 }, + { "BIST_ADDR_FIFO_PARERR_CAUSE", 6, 1 }, + { "BIST_ERR_ADDR_FIFO_PARERR_CAUSE", 5, 1 }, + { "HIF_WDATA_Q_PARERR_DCH0_CAUSE", 4, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH1_CAUSE", 3, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH0_CAUSE", 2, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH1_CAUSE", 1, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH0_CAUSE", 0, 1 }, + { "MC_P_INT_ENABLE", 0x4931c, 0 }, + { "DDRPHY_INT_ENABLE", 4, 1 }, + { "DDRCTL_INT_ENABLE", 3, 1 }, + { "ECC_CE_INT_ENABLE", 2, 1 }, + { "ECC_UE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "MC_P_INT_CAUSE", 0x49320, 0 }, + { "DDRPHY_INT_CAUSE", 4, 1 }, + { "DDRCTL_INT_CAUSE", 3, 1 }, + { "ECC_CE_INT_CAUSE", 2, 1 }, + { "ECC_UE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "MC_P_ECC_UE_INT_ENABLE", 0x49324, 0 }, + { "MC_P_ECC_UE_INT_CAUSE", 0x49328, 0 }, + { "MC_P_ECC_STATUS", 0x4932c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { "MC_P_PHY_CTRL", 0x49330, 0 }, + { "MC_P_STATIC_CFG_STATUS", 0x49334, 0 }, + { "DfiFreqRatio", 27, 1 }, + { "STATIC_PP64", 26, 1 }, + { "STATIC_PPEN", 25, 1 }, + { "STATIC_OOOEN", 24, 1 }, + { "STATIC_AWEN", 23, 1 }, + { "STATIC_SWLAT", 18, 5 }, + { "STATIC_WLAT", 17, 1 }, + { "STATIC_ALIGN", 16, 1 }, + { "STATIC_SLAT", 11, 5 }, + { "STATIC_LAT", 10, 1 }, + { "STATIC_MODE", 9, 1 }, + { "STATIC_DEN", 6, 3 }, + { "STATIC_ORG", 5, 1 }, + { "STATIC_RKS", 4, 1 }, + { "STATIC_DDR5_HBW_Channel", 3, 1 }, + { "STATIC_DDR5_HBW", 2, 1 }, + { "STATIC_WIDTH", 1, 1 }, + { "STATIC_SLOW", 0, 1 }, + { "MC_P_CORE_PCTL_STAT", 0x49338, 0 }, + { "MC_P_DEBUG_CNT", 0x4933c, 0 }, + { "WDATA_OCNT", 8, 5 }, + { "RDATA_OCNT", 0, 5 }, + { "MC_CE_ERR_DATA_RDATA", 0x49340, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49344, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49348, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x4934c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49350, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49354, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49358, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x4935c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49360, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49364, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49368, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x4936c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49370, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49374, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x49378, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x4937c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49380, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49384, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49388, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x4938c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49390, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49394, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x49398, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x4939c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493a0, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493a4, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493a8, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493ac, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493b0, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493b4, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493b8, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x493bc, 0 }, + { "MC_CE_ADDR", 0x493c0, 0 }, + { "MC_UE_ADDR", 0x493c4, 0 }, + { "MC_P_DEEP_SLEEP", 0x493c8, 0 }, + { "SleepStatus", 1, 1 }, + { "SleepReq", 0, 1 }, + { "MC_P_FPGA_BONUS", 0x493cc, 0 }, + { "MC_P_DEBUG_CFG", 0x493d0, 0 }, + { "DEBUG_OR", 15, 1 }, + { "DEBUG_HI", 14, 1 }, + { "DEBUG_RPT", 13, 1 }, + { "DEBUGPAGE", 10, 3 }, + { "DEBUGSELH", 5, 5 }, + { "DEBUGSELL", 0, 5 }, + { "MC_P_DEBUG_RPT", 0x493d4, 0 }, + { "MC_P_PHY_ADR_CK_EN", 0x493d8, 0 }, + { "MC_P_WDATARAM_INIT", 0x493dc, 0 }, + { "ENABLE_DCH1", 1, 1 }, + { "ENABLE_DCH0", 0, 1 }, + { "MC_CE_ERR_ECC_DATA0", 0x493e0, 0 }, + { "MC_CE_ERR_ECC_DATA1", 0x493e4, 0 }, + { "MC_UE_ERR_ECC_DATA0", 0x493e8, 0 }, + { "MC_UE_ERR_ECC_DATA1", 0x493ec, 0 }, + { "MC_P_RMW_PRIO", 0x493f0, 0 }, + { "WR_HI_TH", 24, 8 }, + { "WR_MID_TH", 16, 8 }, + { "RD_HI_TH", 8, 8 }, + { "RD_MID_TH", 0, 8 }, + { "MC_P_BIST_CMD", 0x49400, 0 }, + { "START_BIST", 31, 1 }, + { "FIFO_ERROR_FLAG", 30, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "MC_P_BIST_CMD_ADDR", 0x49404, 0 }, + { "MC_P_BIST_NUM_BURST", 0x49408, 0 }, + { "MC_P_BIST_DATA_PATTERN", 0x4940c, 0 }, + { "MC_P_BIST_CRC_SEED", 0x49410, 0 }, + { "MC_P_BIST_NUM_ERR", 0x49460, 0 }, + { "MC_P_BIST_ERR_ADDR", 0x49464, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49468, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x4946c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49470, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49474, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49478, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x4947c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49480, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49484, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49488, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x4948c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49490, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49494, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x49498, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x4949c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494a0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494a4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494a8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494ac, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494b0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494b4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494b8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494bc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494c0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494c4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494c8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494cc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494d0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494d4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494d8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494dc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494e0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494e4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494e8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494ec, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494f0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x494f4, 0 }, + { NULL } +}; + +struct reg_info t7_mc_t71_regs[] = { + { "MC_IND_ADDR", 0x58000, 0 }, + { "autoincr", 30, 2 }, + { "addr", 0, 25 }, + { "MC_IND_DATA", 0x58004, 0 }, + { "MC_DBG_CTL", 0x58018, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG", 16, 1 }, + { "SEL", 0, 8 }, + { "MC_DBG_DATA", 0x5801c, 0 }, + { "MC_P_DDRPHY_RST_CTRL", 0x59300, 0 }, + { "PHY_CAL_REQ", 21, 1 }, + { "PHY_DRAM_WL", 17, 4 }, + { "PHY_CALIB_DONE", 5, 1 }, + { "CTL_CAL_REQ", 4, 1 }, + { "CTL_CKE", 3, 1 }, + { "CTL_RST_N", 2, 1 }, + { "DDRIO_ENABLE", 1, 1 }, + { "PHY_RST_N", 0, 1 }, + { "MC_P_PERFORMANCE_CTRL", 0x59304, 0 }, + { "BUF_USE_TH", 12, 3 }, + { "MC_IDLE_TH", 8, 4 }, + { "RMW_DEFER_EN", 7, 1 }, + { "DDR3_BRBC_MODE", 6, 1 }, + { "RMW_DWRITE_EN", 5, 1 }, + { "RMW_MERGE_EN", 4, 1 }, + { "SYNC_PAB_EN", 3, 1 }, + { "STALL_CHK_BIT", 2, 1 }, + { "DDR3_BRC_MODE", 1, 1 }, + { "RMW_PERF_CTRL", 0, 1 }, + { "MC_P_ECC_CTRL", 0x59308, 0 }, + { "BistECCHBWCtl", 7, 2 }, + { "BistTestMode", 6, 1 }, + { "rmw_ctl_cfg", 4, 2 }, + { "ECC_BYPASS_BIST", 1, 1 }, + { "ECC_DISABLE", 0, 1 }, + { "MC_P_DDRCTL_INT_ENABLE", 0x5930c, 0 }, + { "HIF_WDATA_PTR_ADDR_ERR_DCH1_ENABLE", 5, 1 }, + { "HIF_RDATA_CRC_ERR_DCH1_ENABLE", 4, 1 }, + { "HIF_RDATA_ADDR_ERR_DCH1_ENABLE", 3, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_ENABLE", 2, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH0_ENABLE", 1, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH0_ENABLE", 0, 1 }, + { "MC_P_DDRCTL_INT_CAUSE", 0x59310, 0 }, + { "WR_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 25, 1 }, + { "WR_CRC_ERR_INTR_DCH1_CAUSE", 24, 1 }, + { "CAPAR_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 23, 1 }, + { "RD_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 22, 1 }, + { "DERATE_TEMP_LIMIT_INTR_DCH1_CAUSE", 21, 1 }, + { "SWCMD_ERR_INTR_DCH1_CAUSE", 20, 1 }, + { "DUCMD_ERR_INTR_DCH1_CAUSE", 19, 1 }, + { "LCCMD_ERR_INTR_DCH1_CAUSE", 18, 1 }, + { "CTRLUPD_ERR_INTR_DCH1_CAUSE", 17, 1 }, + { "RFM_ALERT_INTR_DCH1_CAUSE", 16, 1 }, + { "WR_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 15, 1 }, + { "WR_CRC_ERR_INTR_DCH0_CAUSE", 14, 1 }, + { "CAPAR_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 13, 1 }, + { "RD_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 12, 1 }, + { "DERATE_TEMP_LIMIT_INTR_DCH0_CAUSE", 11, 1 }, + { "SWCMD_ERR_INTR_DCH0_CAUSE", 10, 1 }, + { "DUCMD_ERR_INTR_DCH0_CAUSE", 9, 1 }, + { "LCCMD_ERR_INTR_DCH0_CAUSE", 8, 1 }, + { "CTRLUPD_ERR_INTR_DCH0_CAUSE", 7, 1 }, + { "RFM_ALERT_INTR_DCH0_CAUSE", 6, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH1_CAUSE", 5, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH1_CAUSE", 4, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH1_CAUSE", 3, 1 }, + { "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_CAUSE", 2, 1 }, + { "HIF_RDATA_CRC_ERR_INTR_DCH0_CAUSE", 1, 1 }, + { "HIF_RDATA_ADDR_ERR_INTR_DCH0_CAUSE", 0, 1 }, + { "MC_P_PAR_ENABLE", 0x59314, 0 }, + { "HIF_WDATA_Q_PARERR_DCH1_ENABLE", 13, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH1_ENABLE", 12, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH0_ENABLE", 11, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH1_ENABLE", 10, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH0_ENABLE", 9, 1 }, + { "WDATARAM_PARERR_DCH1_ENABLE", 8, 1 }, + { "WDATARAM_PARERR_DCH0_ENABLE", 7, 1 }, + { "BIST_ADDR_FIFO_PARERR_ENABLE", 6, 1 }, + { "BIST_ERR_ADDR_FIFO_PARERR_ENABLE", 5, 1 }, + { "HIF_WDATA_Q_PARERR_DCH0_ENABLE", 4, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH1_ENABLE", 3, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH0_ENABLE", 2, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH1_ENABLE", 1, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH0_ENABLE", 0, 1 }, + { "MC_P_PAR_CAUSE", 0x59318, 0 }, + { "HIF_WDATA_Q_PARERR_DCH1_CAUSE", 13, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH1_CAUSE", 12, 1 }, + { "DDRCTL_ECC_CE_PAR_DCH0_CAUSE", 11, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH1_CAUSE", 10, 1 }, + { "DDRCTL_ECC_UE_PAR_DCH0_CAUSE", 9, 1 }, + { "WDATARAM_PARERR_DCH1_CAUSE", 8, 1 }, + { "WDATARAM_PARERR_DCH0_CAUSE", 7, 1 }, + { "BIST_ADDR_FIFO_PARERR_CAUSE", 6, 1 }, + { "BIST_ERR_ADDR_FIFO_PARERR_CAUSE", 5, 1 }, + { "HIF_WDATA_Q_PARERR_DCH0_CAUSE", 4, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH1_CAUSE", 3, 1 }, + { "HIF_RSPDATA_Q_PARERR_DCH0_CAUSE", 2, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH1_CAUSE", 1, 1 }, + { "HIF_WDATA_MASK_FIFO_PARERR_DCH0_CAUSE", 0, 1 }, + { "MC_P_INT_ENABLE", 0x5931c, 0 }, + { "DDRPHY_INT_ENABLE", 4, 1 }, + { "DDRCTL_INT_ENABLE", 3, 1 }, + { "ECC_CE_INT_ENABLE", 2, 1 }, + { "ECC_UE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "MC_P_INT_CAUSE", 0x59320, 0 }, + { "DDRPHY_INT_CAUSE", 4, 1 }, + { "DDRCTL_INT_CAUSE", 3, 1 }, + { "ECC_CE_INT_CAUSE", 2, 1 }, + { "ECC_UE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "MC_P_ECC_UE_INT_ENABLE", 0x59324, 0 }, + { "MC_P_ECC_UE_INT_CAUSE", 0x59328, 0 }, + { "MC_P_ECC_STATUS", 0x5932c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { "MC_P_PHY_CTRL", 0x59330, 0 }, + { "MC_P_STATIC_CFG_STATUS", 0x59334, 0 }, + { "DfiFreqRatio", 27, 1 }, + { "STATIC_PP64", 26, 1 }, + { "STATIC_PPEN", 25, 1 }, + { "STATIC_OOOEN", 24, 1 }, + { "STATIC_AWEN", 23, 1 }, + { "STATIC_SWLAT", 18, 5 }, + { "STATIC_WLAT", 17, 1 }, + { "STATIC_ALIGN", 16, 1 }, + { "STATIC_SLAT", 11, 5 }, + { "STATIC_LAT", 10, 1 }, + { "STATIC_MODE", 9, 1 }, + { "STATIC_DEN", 6, 3 }, + { "STATIC_ORG", 5, 1 }, + { "STATIC_RKS", 4, 1 }, + { "STATIC_DDR5_HBW_Channel", 3, 1 }, + { "STATIC_DDR5_HBW", 2, 1 }, + { "STATIC_WIDTH", 1, 1 }, + { "STATIC_SLOW", 0, 1 }, + { "MC_P_CORE_PCTL_STAT", 0x59338, 0 }, + { "MC_P_DEBUG_CNT", 0x5933c, 0 }, + { "WDATA_OCNT", 8, 5 }, + { "RDATA_OCNT", 0, 5 }, + { "MC_CE_ERR_DATA_RDATA", 0x59340, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59344, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59348, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x5934c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59350, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59354, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59358, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x5935c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59360, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59364, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59368, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x5936c, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59370, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59374, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x59378, 0 }, + { "MC_CE_ERR_DATA_RDATA", 0x5937c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59380, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59384, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59388, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x5938c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59390, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59394, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x59398, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x5939c, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593a0, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593a4, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593a8, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593ac, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593b0, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593b4, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593b8, 0 }, + { "MC_UE_ERR_DATA_RDATA", 0x593bc, 0 }, + { "MC_CE_ADDR", 0x593c0, 0 }, + { "MC_UE_ADDR", 0x593c4, 0 }, + { "MC_P_DEEP_SLEEP", 0x593c8, 0 }, + { "SleepStatus", 1, 1 }, + { "SleepReq", 0, 1 }, + { "MC_P_FPGA_BONUS", 0x593cc, 0 }, + { "MC_P_DEBUG_CFG", 0x593d0, 0 }, + { "DEBUG_OR", 15, 1 }, + { "DEBUG_HI", 14, 1 }, + { "DEBUG_RPT", 13, 1 }, + { "DEBUGPAGE", 10, 3 }, + { "DEBUGSELH", 5, 5 }, + { "DEBUGSELL", 0, 5 }, + { "MC_P_DEBUG_RPT", 0x593d4, 0 }, + { "MC_P_PHY_ADR_CK_EN", 0x593d8, 0 }, + { "MC_P_WDATARAM_INIT", 0x593dc, 0 }, + { "ENABLE_DCH1", 1, 1 }, + { "ENABLE_DCH0", 0, 1 }, + { "MC_CE_ERR_ECC_DATA0", 0x593e0, 0 }, + { "MC_CE_ERR_ECC_DATA1", 0x593e4, 0 }, + { "MC_UE_ERR_ECC_DATA0", 0x593e8, 0 }, + { "MC_UE_ERR_ECC_DATA1", 0x593ec, 0 }, + { "MC_P_RMW_PRIO", 0x593f0, 0 }, + { "WR_HI_TH", 24, 8 }, + { "WR_MID_TH", 16, 8 }, + { "RD_HI_TH", 8, 8 }, + { "RD_MID_TH", 0, 8 }, + { "MC_P_BIST_CMD", 0x59400, 0 }, + { "START_BIST", 31, 1 }, + { "FIFO_ERROR_FLAG", 30, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "MC_P_BIST_CMD_ADDR", 0x59404, 0 }, + { "MC_P_BIST_NUM_BURST", 0x59408, 0 }, + { "MC_P_BIST_DATA_PATTERN", 0x5940c, 0 }, + { "MC_P_BIST_CRC_SEED", 0x59410, 0 }, + { "MC_P_BIST_NUM_ERR", 0x59460, 0 }, + { "MC_P_BIST_ERR_ADDR", 0x59464, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59468, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x5946c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59470, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59474, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59478, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x5947c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59480, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59484, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59488, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x5948c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59490, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59494, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x59498, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x5949c, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594a0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594a4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594a8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594ac, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594b0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594b4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594b8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594bc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594c0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594c4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594c8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594cc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594d0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594d4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594d8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594dc, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594e0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594e4, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594e8, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594ec, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594f0, 0 }, + { "MC_P_BIST_USER_RWEDATA", 0x594f4, 0 }, + { NULL } +}; + +struct reg_info t7_edc_t60_regs[] = { + { "EDC_H_REF", 0x50000, 0 }, + { "SleepStatus", 31, 1 }, + { "SleepReq", 30, 1 }, + { "PING_PONG", 29, 1 }, + { "DramRefEnable", 27, 2 }, + { "QDR_ClkPhase", 24, 3 }, + { "MaxOpsPerTRC", 21, 3 }, + { "NumPipeStages", 19, 2 }, + { "EDC_INST_NUM", 18, 1 }, + { "ENABLE_PERF", 17, 1 }, + { "ECC_BYPASS", 16, 1 }, + { "RefFreq", 0, 16 }, + { "EDC_H_BIST_CMD", 0x50004, 0 }, + { "START_BIST", 31, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "EDC_H_BIST_CMD_ADDR", 0x50008, 0 }, + { "EDC_H_BIST_CMD_LEN", 0x5000c, 0 }, + { "EDC_H_BIST_DATA_PATTERN", 0x50010, 0 }, + { "EDC_H_BIST_USER_WDATA0", 0x50014, 0 }, + { "EDC_H_BIST_USER_WDATA1", 0x50018, 0 }, + { "EDC_H_BIST_USER_WDATA2", 0x5001c, 0 }, + { "USER_DATA_MASK", 8, 9 }, + { "USER_DATA2", 0, 8 }, + { "EDC_H_BIST_NUM_ERR", 0x50020, 0 }, + { "EDC_H_BIST_ERR_FIRST_ADDR", 0x50024, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50028, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5002c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50030, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50034, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50038, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5003c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50040, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50044, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50048, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5004c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50050, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50054, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50058, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5005c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50060, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50064, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50068, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5006c, 0 }, + { "EDC_H_PAR_ENABLE", 0x50070, 0 }, + { "ECC_UE_PAR_ENABLE", 2, 1 }, + { "ECC_CE_PAR_ENABLE", 1, 1 }, + { "PERR_PAR_ENABLE", 0, 1 }, + { "EDC_H_INT_ENABLE", 0x50074, 0 }, + { "ECC_UE_INT_ENABLE", 2, 1 }, + { "ECC_CE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_H_INT_CAUSE", 0x50078, 0 }, + { "ECC_UE_INT0_CAUSE", 5, 1 }, + { "ECC_CE_INT0_CAUSE", 4, 1 }, + { "PERR_INT0_CAUSE", 3, 1 }, + { "ECC_UE_INT_CAUSE", 2, 1 }, + { "ECC_CE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "EDC_H_ECC_STATUS", 0x5007c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { "EDC_H_ECC_ERR_SEL", 0x50080, 0 }, + { "EDC_H_ECC_ERR_ADDR", 0x50084, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50090, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50094, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50098, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x5009c, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500a0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500a4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500a8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500ac, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500b0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500b4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500b8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500bc, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500c0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500c4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500c8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x500cc, 0 }, + { "EDC_H_DBG_MA_CMD_INTF", 0x50300, 0 }, + { "MCmdAddr", 12, 20 }, + { "MCmdLen", 5, 7 }, + { "MCmdNRE", 4, 1 }, + { "MCmdNRB", 3, 1 }, + { "MCmdWr", 2, 1 }, + { "MCmdRdy", 1, 1 }, + { "MCmdVld", 0, 1 }, + { "EDC_H_DBG_MA_WDATA_INTF", 0x50304, 0 }, + { "MWDataVld", 31, 1 }, + { "MWDataRdy", 30, 1 }, + { "MWData", 0, 30 }, + { "EDC_H_DBG_MA_RDATA_INTF", 0x50308, 0 }, + { "MRspVld", 31, 1 }, + { "MRspRdy", 30, 1 }, + { "MRspData", 0, 30 }, + { "EDC_H_DBG_BIST_CMD_INTF", 0x5030c, 0 }, + { "BCmdAddr", 9, 23 }, + { "BCmdLen", 3, 6 }, + { "BCmdWr", 2, 1 }, + { "BCmdRdy", 1, 1 }, + { "BCmdVld", 0, 1 }, + { "EDC_H_DBG_BIST_WDATA_INTF", 0x50310, 0 }, + { "BWDataVld", 31, 1 }, + { "BWDataRdy", 30, 1 }, + { "BWData", 0, 30 }, + { "EDC_H_DBG_BIST_RDATA_INTF", 0x50314, 0 }, + { "BRspVld", 31, 1 }, + { "BRspRdy", 30, 1 }, + { "BRspData", 0, 30 }, + { "EDC_H_DBG_EDRAM_CMD_INTF", 0x50318, 0 }, + { "EdramAddr", 16, 16 }, + { "EdramDwsn", 8, 8 }, + { "EdramCra", 5, 3 }, + { "EdramRefEnLo", 4, 1 }, + { "Edram1WrEnLo", 3, 1 }, + { "Edram1RdEnLo", 2, 1 }, + { "Edram0WrEnLo", 1, 1 }, + { "Edram0RdEnLo", 0, 1 }, + { "EDC_H_DBG_EDRAM_WDATA_INTF", 0x5031c, 0 }, + { "EdramWData", 9, 23 }, + { "EdramWByteEn", 0, 9 }, + { "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50320, 0 }, + { "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50324, 0 }, + { "EDC_H_DBG_MA_WR_REQ_CNT", 0x50328, 0 }, + { "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x5032c, 0 }, + { "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50330, 0 }, + { "EDC_H_DBG_MA_RD_REQ_CNT", 0x50334, 0 }, + { "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50338, 0 }, + { "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x5033c, 0 }, + { "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50340, 0 }, + { "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50344, 0 }, + { "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50348, 0 }, + { "EDC_H_DBG_BIST_RD_REQ_CNT", 0x5034c, 0 }, + { "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50350, 0 }, + { "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50354, 0 }, + { "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50358, 0 }, + { "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x5035c, 0 }, + { "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50360, 0 }, + { "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50364, 0 }, + { "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50368, 0 }, + { "EDC_H_DBG_EDRAM1_RMW_CNT", 0x5036c, 0 }, + { "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50370, 0 }, + { "EDC_H_DBG_FIFO_STATUS", 0x50374, 0 }, + { "rdtag_notfull", 17, 1 }, + { "rdtag_notempty", 16, 1 }, + { "inp_cmdq_notfull_arb", 15, 1 }, + { "inp_cmdq_notempty", 14, 1 }, + { "inp_wrdq_wrrdy", 13, 1 }, + { "inp_wrdq_notempty", 12, 1 }, + { "inp_beq_wrrdy_open", 11, 1 }, + { "inp_beq_notempty", 10, 1 }, + { "rddq_notfull_open", 9, 1 }, + { "rddq_rdcnt", 4, 5 }, + { "rdsideq_notfull", 3, 1 }, + { "rdsideq_notempty", 2, 1 }, + { "stg_cmdq_notempty", 1, 1 }, + { "stg_wrdq_notempty", 0, 1 }, + { "EDC_H_DBG_FSM_STATE", 0x50378, 0 }, + { "CmdSplitFsm", 3, 1 }, + { "CmdFsm", 0, 3 }, + { "EDC_H_DBG_STALL_CYCLES", 0x5037c, 0 }, + { "stall_rmw", 19, 1 }, + { "stall_edc_cmd", 18, 1 }, + { "dead_cycle0", 17, 1 }, + { "dead_cycle1", 16, 1 }, + { "dead_cycle0_bbi", 15, 1 }, + { "dead_cycle1_bbi", 14, 1 }, + { "dead_cycle0_max_op", 13, 1 }, + { "dead_cycle1_max_op", 12, 1 }, + { "dead_cycle0_pre_ref", 11, 1 }, + { "dead_cycle1_pre_ref", 10, 1 }, + { "dead_cycle0_post_ref", 9, 1 }, + { "dead_cycle1_post_ref", 8, 1 }, + { "dead_cycle0_rmw", 7, 1 }, + { "dead_cycle1_rmw", 6, 1 }, + { "dead_cycle0_bbi_rmw", 5, 1 }, + { "dead_cycle1_bbi_rmw", 4, 1 }, + { "dead_cycle0_pre_ref_rmw", 3, 1 }, + { "dead_cycle1_pre_ref_rmw", 2, 1 }, + { "dead_cycle0_post_ref_rmw", 1, 1 }, + { "dead_cycle1_post_ref_rmw", 0, 1 }, + { "EDC_H_DBG_CMD_QUEUE", 0x50380, 0 }, + { "ECmdNRE", 31, 1 }, + { "ECmdNRB", 30, 1 }, + { "ECmdWr", 29, 1 }, + { "ECmdLen", 22, 7 }, + { "ECmdAddr", 0, 22 }, + { "EDC_H_DBG_REFRESH", 0x50384, 0 }, + { "RefDone", 12, 1 }, + { "RefCntExpr", 11, 1 }, + { "RefPtr", 8, 3 }, + { "RefCnt", 0, 8 }, + { "EDC_H_BIST_CRC_SEED", 0x50400, 0 }, + { "EDC_H_PAR_CAUSE", 0x50404, 0 }, + { "STG_CMDQ_PARERR_CAUSE", 7, 1 }, + { "STG_WRDQ_PARERR_CAUSE", 6, 1 }, + { "INP_CMDQ_PARERR_CAUSE", 5, 1 }, + { "INP_WRDQ_PARERR_CAUSE", 4, 1 }, + { "INP_BEQ_PARERR_CAUSE", 3, 1 }, + { "ECC_CE_PAR_ENABLE_CAUSE", 2, 1 }, + { "ECC_UE_PAR_ENABLE_CAUSE", 1, 1 }, + { "RDDQ_PARERR_CAUSE", 0, 1 }, + { NULL } +}; + +struct reg_info t7_edc_t61_regs[] = { + { "EDC_H_REF", 0x50800, 0 }, + { "SleepStatus", 31, 1 }, + { "SleepReq", 30, 1 }, + { "PING_PONG", 29, 1 }, + { "DramRefEnable", 27, 2 }, + { "QDR_ClkPhase", 24, 3 }, + { "MaxOpsPerTRC", 21, 3 }, + { "NumPipeStages", 19, 2 }, + { "EDC_INST_NUM", 18, 1 }, + { "ENABLE_PERF", 17, 1 }, + { "ECC_BYPASS", 16, 1 }, + { "RefFreq", 0, 16 }, + { "EDC_H_BIST_CMD", 0x50804, 0 }, + { "START_BIST", 31, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "EDC_H_BIST_CMD_ADDR", 0x50808, 0 }, + { "EDC_H_BIST_CMD_LEN", 0x5080c, 0 }, + { "EDC_H_BIST_DATA_PATTERN", 0x50810, 0 }, + { "EDC_H_BIST_USER_WDATA0", 0x50814, 0 }, + { "EDC_H_BIST_USER_WDATA1", 0x50818, 0 }, + { "EDC_H_BIST_USER_WDATA2", 0x5081c, 0 }, + { "USER_DATA_MASK", 8, 9 }, + { "USER_DATA2", 0, 8 }, + { "EDC_H_BIST_NUM_ERR", 0x50820, 0 }, + { "EDC_H_BIST_ERR_FIRST_ADDR", 0x50824, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50828, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5082c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50830, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50834, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50838, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5083c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50840, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50844, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50848, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5084c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50850, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50854, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50858, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5085c, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50860, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50864, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x50868, 0 }, + { "EDC_H_BIST_STATUS_RDATA", 0x5086c, 0 }, + { "EDC_H_PAR_ENABLE", 0x50870, 0 }, + { "ECC_UE_PAR_ENABLE", 2, 1 }, + { "ECC_CE_PAR_ENABLE", 1, 1 }, + { "PERR_PAR_ENABLE", 0, 1 }, + { "EDC_H_INT_ENABLE", 0x50874, 0 }, + { "ECC_UE_INT_ENABLE", 2, 1 }, + { "ECC_CE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_H_INT_CAUSE", 0x50878, 0 }, + { "ECC_UE_INT0_CAUSE", 5, 1 }, + { "ECC_CE_INT0_CAUSE", 4, 1 }, + { "PERR_INT0_CAUSE", 3, 1 }, + { "ECC_UE_INT_CAUSE", 2, 1 }, + { "ECC_CE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "EDC_H_ECC_STATUS", 0x5087c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { "EDC_H_ECC_ERR_SEL", 0x50880, 0 }, + { "EDC_H_ECC_ERR_ADDR", 0x50884, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50890, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50894, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x50898, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x5089c, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508a0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508a4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508a8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508ac, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508b0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508b4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508b8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508bc, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508c0, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508c4, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508c8, 0 }, + { "EDC_H_ECC_ERR_DATA_RDATA", 0x508cc, 0 }, + { "EDC_H_DBG_MA_CMD_INTF", 0x50b00, 0 }, + { "MCmdAddr", 12, 20 }, + { "MCmdLen", 5, 7 }, + { "MCmdNRE", 4, 1 }, + { "MCmdNRB", 3, 1 }, + { "MCmdWr", 2, 1 }, + { "MCmdRdy", 1, 1 }, + { "MCmdVld", 0, 1 }, + { "EDC_H_DBG_MA_WDATA_INTF", 0x50b04, 0 }, + { "MWDataVld", 31, 1 }, + { "MWDataRdy", 30, 1 }, + { "MWData", 0, 30 }, + { "EDC_H_DBG_MA_RDATA_INTF", 0x50b08, 0 }, + { "MRspVld", 31, 1 }, + { "MRspRdy", 30, 1 }, + { "MRspData", 0, 30 }, + { "EDC_H_DBG_BIST_CMD_INTF", 0x50b0c, 0 }, + { "BCmdAddr", 9, 23 }, + { "BCmdLen", 3, 6 }, + { "BCmdWr", 2, 1 }, + { "BCmdRdy", 1, 1 }, + { "BCmdVld", 0, 1 }, + { "EDC_H_DBG_BIST_WDATA_INTF", 0x50b10, 0 }, + { "BWDataVld", 31, 1 }, + { "BWDataRdy", 30, 1 }, + { "BWData", 0, 30 }, + { "EDC_H_DBG_BIST_RDATA_INTF", 0x50b14, 0 }, + { "BRspVld", 31, 1 }, + { "BRspRdy", 30, 1 }, + { "BRspData", 0, 30 }, + { "EDC_H_DBG_EDRAM_CMD_INTF", 0x50b18, 0 }, + { "EdramAddr", 16, 16 }, + { "EdramDwsn", 8, 8 }, + { "EdramCra", 5, 3 }, + { "EdramRefEnLo", 4, 1 }, + { "Edram1WrEnLo", 3, 1 }, + { "Edram1RdEnLo", 2, 1 }, + { "Edram0WrEnLo", 1, 1 }, + { "Edram0RdEnLo", 0, 1 }, + { "EDC_H_DBG_EDRAM_WDATA_INTF", 0x50b1c, 0 }, + { "EdramWData", 9, 23 }, + { "EdramWByteEn", 0, 9 }, + { "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50b20, 0 }, + { "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50b24, 0 }, + { "EDC_H_DBG_MA_WR_REQ_CNT", 0x50b28, 0 }, + { "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x50b2c, 0 }, + { "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50b30, 0 }, + { "EDC_H_DBG_MA_RD_REQ_CNT", 0x50b34, 0 }, + { "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50b38, 0 }, + { "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x50b3c, 0 }, + { "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50b40, 0 }, + { "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50b44, 0 }, + { "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50b48, 0 }, + { "EDC_H_DBG_BIST_RD_REQ_CNT", 0x50b4c, 0 }, + { "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50b50, 0 }, + { "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50b54, 0 }, + { "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50b58, 0 }, + { "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x50b5c, 0 }, + { "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50b60, 0 }, + { "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50b64, 0 }, + { "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50b68, 0 }, + { "EDC_H_DBG_EDRAM1_RMW_CNT", 0x50b6c, 0 }, + { "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50b70, 0 }, + { "EDC_H_DBG_FIFO_STATUS", 0x50b74, 0 }, + { "rdtag_notfull", 17, 1 }, + { "rdtag_notempty", 16, 1 }, + { "inp_cmdq_notfull_arb", 15, 1 }, + { "inp_cmdq_notempty", 14, 1 }, + { "inp_wrdq_wrrdy", 13, 1 }, + { "inp_wrdq_notempty", 12, 1 }, + { "inp_beq_wrrdy_open", 11, 1 }, + { "inp_beq_notempty", 10, 1 }, + { "rddq_notfull_open", 9, 1 }, + { "rddq_rdcnt", 4, 5 }, + { "rdsideq_notfull", 3, 1 }, + { "rdsideq_notempty", 2, 1 }, + { "stg_cmdq_notempty", 1, 1 }, + { "stg_wrdq_notempty", 0, 1 }, + { "EDC_H_DBG_FSM_STATE", 0x50b78, 0 }, + { "CmdSplitFsm", 3, 1 }, + { "CmdFsm", 0, 3 }, + { "EDC_H_DBG_STALL_CYCLES", 0x50b7c, 0 }, + { "stall_rmw", 19, 1 }, + { "stall_edc_cmd", 18, 1 }, + { "dead_cycle0", 17, 1 }, + { "dead_cycle1", 16, 1 }, + { "dead_cycle0_bbi", 15, 1 }, + { "dead_cycle1_bbi", 14, 1 }, + { "dead_cycle0_max_op", 13, 1 }, + { "dead_cycle1_max_op", 12, 1 }, + { "dead_cycle0_pre_ref", 11, 1 }, + { "dead_cycle1_pre_ref", 10, 1 }, + { "dead_cycle0_post_ref", 9, 1 }, + { "dead_cycle1_post_ref", 8, 1 }, + { "dead_cycle0_rmw", 7, 1 }, + { "dead_cycle1_rmw", 6, 1 }, + { "dead_cycle0_bbi_rmw", 5, 1 }, + { "dead_cycle1_bbi_rmw", 4, 1 }, + { "dead_cycle0_pre_ref_rmw", 3, 1 }, + { "dead_cycle1_pre_ref_rmw", 2, 1 }, + { "dead_cycle0_post_ref_rmw", 1, 1 }, + { "dead_cycle1_post_ref_rmw", 0, 1 }, + { "EDC_H_DBG_CMD_QUEUE", 0x50b80, 0 }, + { "ECmdNRE", 31, 1 }, + { "ECmdNRB", 30, 1 }, + { "ECmdWr", 29, 1 }, + { "ECmdLen", 22, 7 }, + { "ECmdAddr", 0, 22 }, + { "EDC_H_DBG_REFRESH", 0x50b84, 0 }, + { "RefDone", 12, 1 }, + { "RefCntExpr", 11, 1 }, + { "RefPtr", 8, 3 }, + { "RefCnt", 0, 8 }, + { "EDC_H_BIST_CRC_SEED", 0x50c00, 0 }, + { "EDC_H_PAR_CAUSE", 0x50c04, 0 }, + { "STG_CMDQ_PARERR_CAUSE", 7, 1 }, + { "STG_WRDQ_PARERR_CAUSE", 6, 1 }, + { "INP_CMDQ_PARERR_CAUSE", 5, 1 }, + { "INP_WRDQ_PARERR_CAUSE", 4, 1 }, + { "INP_BEQ_PARERR_CAUSE", 3, 1 }, + { "ECC_CE_PAR_ENABLE_CAUSE", 2, 1 }, + { "ECC_UE_PAR_ENABLE_CAUSE", 1, 1 }, + { "RDDQ_PARERR_CAUSE", 0, 1 }, + { NULL } +}; + +struct reg_info t7_hma_t6_regs[] = { + { "HMA_TABLE_ACCESS", 0x51000, 0 }, + { "TRIG", 31, 1 }, + { "RW", 30, 1 }, + { "L_SEL", 0, 4 }, + { "HMA_TABLE_LINE0", 0x51004, 0 }, + { "HMA_TABLE_LINE1", 0x51008, 0 }, + { "HMA_TABLE_LINE1_MSB", 0x51270, 0 }, + { "HMA_TABLE_LINE2", 0x5100c, 0 }, + { "HMA_TABLE_LINE2_MSB", 0x51274, 0 }, + { "HMA_TABLE_LINE3", 0x51010, 0 }, + { "HMA_TABLE_LINE4", 0x51014, 0 }, + { "HMA_TABLE_LINE5", 0x51018, 0 }, + { "FID", 16, 11 }, + { "NOS", 15, 1 }, + { "RO", 14, 1 }, + { "TPH", 12, 2 }, + { "TPH_V", 11, 1 }, + { "DCA", 0, 11 }, + { "HMA_COOKIE", 0x5101c, 0 }, + { "C_REQ", 31, 1 }, + { "C_FID", 18, 11 }, + { "C_VAL", 8, 10 }, + { "C_SEL", 0, 4 }, + { "HMA_CFG", 0x51020, 0 }, + { "OP_MODE", 31, 1 }, + { "GK_Enable", 30, 1 }, + { "DbgCntRst", 29, 1 }, + { "HMA_TLB_ACCESS", 0x51028, 0 }, + { "TRIG", 31, 1 }, + { "RW", 30, 1 }, + { "INV_ALL", 29, 1 }, + { "LOCK_ENTRY", 28, 1 }, + { "E_SEL", 0, 5 }, + { "HMA_TLB_BITS", 0x5102c, 0 }, + { "VA", 8, 24 }, + { "VALID_E", 4, 1 }, + { "LOCK", 3, 1 }, + { "USED", 2, 1 }, + { "REGION", 0, 2 }, + { "HMA_TLB_DESC_0_H", 0x51030, 0 }, + { "HMA_TLB_DESC_0_L", 0x51034, 0 }, + { "HMA_TLB_DESC_1_H", 0x51038, 0 }, + { "HMA_TLB_DESC_1_L", 0x5103c, 0 }, + { "HMA_TLB_DESC_2_H", 0x51040, 0 }, + { "HMA_TLB_DESC_2_L", 0x51044, 0 }, + { "HMA_TLB_DESC_3_H", 0x51048, 0 }, + { "HMA_TLB_DESC_3_L", 0x5104c, 0 }, + { "HMA_TLB_DESC_4_H", 0x51050, 0 }, + { "HMA_TLB_DESC_4_L", 0x51054, 0 }, + { "HMA_TLB_DESC_5_H", 0x51058, 0 }, + { "HMA_TLB_DESC_5_L", 0x5105c, 0 }, + { "HMA_TLB_DESC_6_H", 0x51060, 0 }, + { "HMA_TLB_DESC_6_L", 0x51064, 0 }, + { "HMA_TLB_DESC_7_H", 0x51068, 0 }, + { "HMA_TLB_DESC_7_L", 0x5106c, 0 }, + { "HMA_REG0_MIN", 0x51070, 0 }, + { "ADDR0_MIN", 8, 24 }, + { "HMA_REG0_MAX", 0x51074, 0 }, + { "ADDR0_MAX", 8, 24 }, + { "HMA_REG0_MASK", 0x51078, 0 }, + { "PAGE_SIZE0", 12, 20 }, + { "HMA_REG0_BASE_LSB", 0x5107c, 0 }, + { "HMA_REG1_MIN", 0x51080, 0 }, + { "ADDR1_MIN", 8, 24 }, + { "HMA_REG1_MAX", 0x51084, 0 }, + { "ADDR1_MAX", 8, 24 }, + { "HMA_REG1_MASK", 0x51088, 0 }, + { "PAGE_SIZE1", 12, 20 }, + { "HMA_REG1_BASE_LSB", 0x5108c, 0 }, + { "HMA_REG2_MIN", 0x51090, 0 }, + { "ADDR2_MIN", 8, 24 }, + { "HMA_REG2_MAX", 0x51094, 0 }, + { "ADDR2_MAX", 8, 24 }, + { "HMA_REG2_MASK", 0x51098, 0 }, + { "PAGE_SIZE2", 12, 20 }, + { "HMA_REG2_BASE_LSB", 0x5109c, 0 }, + { "HMA_REG3_MIN", 0x510a0, 0 }, + { "ADDR3_MIN", 8, 24 }, + { "HMA_REG3_MAX", 0x510a4, 0 }, + { "ADDR3_MAX", 8, 24 }, + { "HMA_REG3_MASK", 0x510a8, 0 }, + { "PAGE_SIZE3", 12, 20 }, + { "HMA_REG3_BASE_LSB", 0x510ac, 0 }, + { "HMA_SW_SYNC", 0x510b0, 0 }, + { "ENTER_SYNC", 31, 1 }, + { "EXIT_SYNC", 30, 1 }, + { "HMA_REG0_BASE_MSB", 0x510b8, 0 }, + { "HMA_REG1_BASE_MSB", 0x510bc, 0 }, + { "HMA_REG2_BASE_MSB", 0x510c0, 0 }, + { "HMA_REG3_BASE_MSB", 0x510c4, 0 }, + { "HMA_GC_MODE_SEL", 0x510b4, 0 }, + { "MODE_SEL", 8, 2 }, + { "FLUSH_REQ", 4, 1 }, + { "CLEAR_REQ", 0, 1 }, + { "HMA_DBG_CTL", 0x51104, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG", 16, 1 }, + { "SEL", 0, 8 }, + { "HMA_DBG_DATA", 0x51108, 0 }, + { "HMA_PAR_ENABLE", 0x51300, 0 }, + { "GK_UF_PAR_ENABLE", 6, 1 }, + { "PCIEMST_PAR_ENABLE", 2, 1 }, + { "PERR_PAR_ENABLE", 0, 1 }, + { "HMA_INT_ENABLE", 0x51304, 0 }, + { "GK_UF_INT_ENABLE", 6, 1 }, + { "IDTF_INT_ENABLE", 5, 1 }, + { "OTF_INT_ENABLE", 4, 1 }, + { "RTF_INT_ENABLE", 3, 1 }, + { "PCIEMST_INT_ENABLE", 2, 1 }, + { "MAMST_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "HMA_INT_CAUSE", 0x51308, 0 }, + { "GK_UF_INT_CAUSE", 6, 1 }, + { "IDTF_INT_CAUSE", 5, 1 }, + { "OTF_INT_CAUSE", 4, 1 }, + { "RTF_INT_CAUSE", 3, 1 }, + { "PCIEMST_INT_CAUSE", 2, 1 }, + { "MAMST_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "HMA_MA_MST_ERR", 0x5130c, 0 }, + { "HMA_RTF_ERR", 0x51310, 0 }, + { "HMA_OTF_ERR", 0x51314, 0 }, + { "HMA_IDTF_ERR", 0x51318, 0 }, + { "HMA_EXIT_TF", 0x5131c, 0 }, + { "TRIG", 31, 1 }, + { "RTF", 30, 1 }, + { "OTF", 29, 1 }, + { "IDTF", 28, 1 }, + { "HMA_LOCAL_DEBUG_CFG", 0x51320, 0 }, + { "DEBUG_OR", 15, 1 }, + { "DEBUG_HI", 14, 1 }, + { "DEBUG_RPT", 13, 1 }, + { "DEBUGPAGE", 10, 3 }, + { "DEBUGSELH", 5, 5 }, + { "DEBUGSELL", 0, 5 }, + { "HMA_LOCAL_DEBUG_RPT", 0x51324, 0 }, + { "HMA_H_BIST_CMD", 0x51200, 0 }, + { "START_BIST", 31, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "HMA_H_BIST_CMD_ADDR", 0x51204, 0 }, + { "HMA_H_BIST_CMD_LEN", 0x51208, 0 }, + { "HMA_H_BIST_DATA_PATTERN", 0x5120c, 0 }, + { "HMA_H_BIST_USER_WDATA0", 0x51210, 0 }, + { "HMA_H_BIST_USER_WDATA1", 0x51214, 0 }, + { "HMA_H_BIST_USER_WDATA2", 0x51218, 0 }, + { "USER_DATA_MASK", 8, 9 }, + { "USER_DATA2", 0, 8 }, + { "HMA_H_BIST_NUM_ERR", 0x5121c, 0 }, + { "HMA_H_BIST_ERR_FIRST_ADDR", 0x51220, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51224, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51228, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x5122c, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51230, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51234, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51238, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x5123c, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51240, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51244, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51248, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x5124c, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51250, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51254, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51258, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x5125c, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51260, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51264, 0 }, + { "HMA_H_BIST_STATUS_RDATA", 0x51268, 0 }, + { "HMA_H_BIST_CRC_SEED", 0x5126c, 0 }, + { NULL } +}; + +struct reg_info t7_gcache_regs[] = { + { "GCACHE_MODE_SEL0", 0x51400, 0 }, + { "GC_MA_RSP", 16, 1 }, + { "MODE_SEL", 8, 2 }, + { "FLUSH_REQ", 4, 1 }, + { "CLEAR_REQ", 0, 1 }, + { "GCACHE_MEMZONE0_REGION1", 0x51404, 0 }, + { "REGION_EN1", 18, 1 }, + { "EDC_REGION1", 17, 1 }, + { "CACHE_REGION1", 16, 1 }, + { "END1", 0, 16 }, + { "GCACHE_MEMZONE0_REGION2", 0x51408, 0 }, + { "REGION_EN2", 18, 1 }, + { "EDC_REGION2", 17, 1 }, + { "CACHE_REGION2", 16, 1 }, + { "END2", 0, 16 }, + { "GCACHE_MEMZONE0_REGION3", 0x5140c, 0 }, + { "REGION_EN3", 18, 1 }, + { "EDC_REGION3", 17, 1 }, + { "CACHE_REGION3", 16, 1 }, + { "END3", 0, 16 }, + { "GCACHE_MEMZONE0_REGION4", 0x51410, 0 }, + { "REGION_EN4", 18, 1 }, + { "EDC_REGION4", 17, 1 }, + { "CACHE_REGION4", 16, 1 }, + { "END4", 0, 16 }, + { "GCACHE_MEMZONE0_REGION5", 0x51414, 0 }, + { "REGION_EN5", 18, 1 }, + { "EDC_REGION5", 17, 1 }, + { "CACHE_REGION5", 16, 1 }, + { "END5", 0, 16 }, + { "GCACHE_MEMZONE0_REGION6", 0x51418, 0 }, + { "REGION_EN6", 18, 1 }, + { "EDC_REGION6", 17, 1 }, + { "CACHE_REGION6", 16, 1 }, + { "END6", 0, 16 }, + { "GCACHE_MEMZONE0_REGION7", 0x5141c, 0 }, + { "REGION_EN7", 18, 1 }, + { "EDC_REGION7", 17, 1 }, + { "CACHE_REGION7", 16, 1 }, + { "END7", 0, 16 }, + { "GCACHE_MEMZONE0_REGION8", 0x51420, 0 }, + { "REGION_EN8", 18, 1 }, + { "EDC_REGION8", 17, 1 }, + { "CACHE_REGION8", 16, 1 }, + { "END8", 0, 16 }, + { "GCACHE_REG0_BASE_MSB", 0x51424, 0 }, + { "GCACHE_MEMZONE0_REGION1_MSB", 0x51428, 0 }, + { "GCACHE_MEMZONE0_REGION2_MSB", 0x5142c, 0 }, + { "GCACHE_MEMZONE0_REGION3_MSB", 0x51430, 0 }, + { "GCACHE_MEMZONE0_REGION4_MSB", 0x51434, 0 }, + { "GCACHE_MEMZONE0_REGION5_MSB", 0x51438, 0 }, + { "GCACHE_MEMZONE0_REGION6_MSB", 0x5143c, 0 }, + { "GCACHE_MEMZONE0_REGION7_MSB", 0x51440, 0 }, + { "GCACHE_MEMZONE0_REGION8_MSB", 0x51444, 0 }, + { "GCACHE_MODE_SEL1", 0x51448, 0 }, + { "GC_MA_RSP", 16, 1 }, + { "MODE_SEL", 8, 2 }, + { "FLUSH_REQ", 4, 1 }, + { "CLEAR_REQ", 0, 1 }, + { "GCACHE_MEMZONE1_REGION1", 0x5144c, 0 }, + { "REGION_EN1", 18, 1 }, + { "EDC_REGION1", 17, 1 }, + { "CACHE_REGION1", 16, 1 }, + { "END1", 0, 16 }, + { "GCACHE_MEMZONE1_REGION2", 0x51450, 0 }, + { "REGION_EN2", 18, 1 }, + { "EDC_REGION2", 17, 1 }, + { "CACHE_REGION2", 16, 1 }, + { "END2", 0, 16 }, + { "GCACHE_MEMZONE1_REGION3", 0x51454, 0 }, + { "REGION_EN3", 18, 1 }, + { "EDC_REGION3", 17, 1 }, + { "CACHE_REGION3", 16, 1 }, + { "END3", 0, 16 }, + { "GCACHE_MEMZONE1_REGION4", 0x51458, 0 }, + { "REGION_EN4", 18, 1 }, + { "EDC_REGION4", 17, 1 }, + { "CACHE_REGION4", 16, 1 }, + { "END4", 0, 16 }, + { "GCACHE_MEMZONE1_REGION5", 0x5145c, 0 }, + { "REGION_EN5", 18, 1 }, + { "EDC_REGION5", 17, 1 }, + { "CACHE_REGION5", 16, 1 }, + { "END5", 0, 16 }, + { "GCACHE_MEMZONE1_REGION6", 0x51460, 0 }, + { "REGION_EN6", 18, 1 }, + { "EDC_REGION6", 17, 1 }, + { "CACHE_REGION6", 16, 1 }, + { "END6", 0, 16 }, + { "GCACHE_MEMZONE1_REGION7", 0x51464, 0 }, + { "REGION_EN7", 18, 1 }, + { "EDC_REGION7", 17, 1 }, + { "CACHE_REGION7", 16, 1 }, + { "END7", 0, 16 }, + { "GCACHE_MEMZONE1_REGION8", 0x51468, 0 }, + { "REGION_EN8", 18, 1 }, + { "EDC_REGION8", 17, 1 }, + { "CACHE_REGION8", 16, 1 }, + { "END8", 0, 16 }, + { "GCACHE_MEMZONE1_REGION1_MSB", 0x5146c, 0 }, + { "GCACHE_MEMZONE1_REGION2_MSB", 0x51470, 0 }, + { "GCACHE_MEMZONE1_REGION3_MSB", 0x51474, 0 }, + { "GCACHE_MEMZONE1_REGION4_MSB", 0x51478, 0 }, + { "GCACHE_MEMZONE1_REGION5_MSB", 0x5147c, 0 }, + { "GCACHE_MEMZONE1_REGION6_MSB", 0x51480, 0 }, + { "GCACHE_MEMZONE1_REGION7_MSB", 0x51484, 0 }, + { "GCACHE_MEMZONE1_REGION8_MSB", 0x51488, 0 }, + { "GCACHE_HMA_MC1_EN", 0x5148c, 0 }, + { "MC1_EN", 1, 1 }, + { "HMA_EN", 0, 1 }, + { "GCACHE_P_BIST_CMD", 0x51490, 0 }, + { "START_BIST", 31, 1 }, + { "BURST_LEN", 16, 2 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "GCACHE_P_BIST_CMD_ADDR", 0x51494, 0 }, + { "GCACHE_P_BIST_CMD_LEN", 0x51498, 0 }, + { "GCACHE_P_BIST_DATA_PATTERN", 0x5149c, 0 }, + { "GCACHE_P_BIST_USER_WDATA0", 0x514a0, 0 }, + { "GCACHE_P_BIST_USER_WDATA1", 0x514a4, 0 }, + { "GCACHE_P_BIST_USER_WDATA2", 0x514a8, 0 }, + { "USER_DATA_MASK", 8, 9 }, + { "USER_DATA2", 0, 8 }, + { "GCACHE_P_BIST_NUM_ERR", 0x514ac, 0 }, + { "GCACHE_P_BIST_ERR_FIRST_ADDR", 0x514b0, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514b4, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514b8, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514bc, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514c0, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514c4, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514c8, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514cc, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514d0, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514d4, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514d8, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514dc, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514e0, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514e4, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514e8, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514ec, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514f0, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514f4, 0 }, + { "GCACHE_P_BIST_STATUS_RDATA", 0x514f8, 0 }, + { "GCACHE_P_BIST_CRC_SEED", 0x514fc, 0 }, + { "GCACHE_CACHE_SIZE", 0x51500, 0 }, + { "HMA_2MB", 1, 1 }, + { "MC0_2MB", 0, 1 }, + { "GCACHE_HINT_MAPPING", 0x51504, 0 }, + { "CLIENT_HINT_EN", 16, 15 }, + { "HINT_ADDR_SPLIT_EN", 8, 1 }, + { "TP_HINT_HMA_MC", 2, 1 }, + { "CIM_HINT_HMA_MC", 1, 1 }, + { "LE_HINT_HMA_MC", 0, 1 }, + { "GCACHE_PERF_EN", 0x51508, 0 }, + { "PERF_CLEAR_GC1", 3, 1 }, + { "PERF_CLEAR_GC0", 2, 1 }, + { "PERF_EN_GC1", 1, 1 }, + { "PERF_EN_GC0", 0, 1 }, + { "GCACHE_PERF_GC0_RD_HIT", 0x5150c, 0 }, + { "GCACHE_PERF_GC1_RD_HIT", 0x51510, 0 }, + { "GCACHE_PERF_GC0_WR_HIT", 0x51514, 0 }, + { "GCACHE_PERF_GC1_WR_HIT", 0x51518, 0 }, + { "GCACHE_PERF_GC0_RD_MISS", 0x5151c, 0 }, + { "GCACHE_PERF_GC1_RD_MISS", 0x51520, 0 }, + { "GCACHE_PERF_GC0_WR_MISS", 0x51524, 0 }, + { "GCACHE_PERF_GC1_WR_MISS", 0x51528, 0 }, + { "GCACHE_PERF_GC0_RD_REQ", 0x5152c, 0 }, + { "GCACHE_PERF_GC1_RD_REQ", 0x51530, 0 }, + { "GCACHE_PERF_GC0_WR_REQ", 0x51534, 0 }, + { "GCACHE_PERF_GC1_WR_REQ", 0x51538, 0 }, + { "GCACHE_PAR_CAUSE", 0x5153c, 0 }, + { "GC1_SRAM_RSP_DATAQ_PERR_PAR_CAUSE", 27, 1 }, + { "GC0_SRAM_RSP_DATAQ_PERR_PAR_CAUSE", 26, 1 }, + { "GC1_WQDATA_FIFO_PERR_PAR_CAUSE", 25, 1 }, + { "GC0_WQDATA_FIFO_PERR_PAR_CAUSE", 24, 1 }, + { "GC1_RDTAG_QUEUE_PERR_PAR_CAUSE", 23, 1 }, + { "GC0_RDTAG_QUEUE_PERR_PAR_CAUSE", 22, 1 }, + { "GC1_SRAM_RDTAG_QUEUE_PERR_PAR_CAUSE", 21, 1 }, + { "GC0_SRAM_RDTAG_QUEUE_PERR_PAR_CAUSE", 20, 1 }, + { "GC1_RSP_PERR_PAR_CAUSE", 19, 1 }, + { "GC0_RSP_PERR_PAR_CAUSE", 18, 1 }, + { "GC1_LRU_UERR_PAR_CAUSE", 17, 1 }, + { "GC0_LRU_UERR_PAR_CAUSE", 16, 1 }, + { "GC1_TAG_UERR_PAR_CAUSE", 15, 1 }, + { "GC0_TAG_UERR_PAR_CAUSE", 14, 1 }, + { "GC1_LRU_CERR_PAR_CAUSE", 13, 1 }, + { "GC0_LRU_CERR_PAR_CAUSE", 12, 1 }, + { "GC1_TAG_CERR_PAR_CAUSE", 11, 1 }, + { "GC0_TAG_CERR_PAR_CAUSE", 10, 1 }, + { "GC1_CE_PAR_CAUSE", 9, 1 }, + { "GC0_CE_PAR_CAUSE", 8, 1 }, + { "GC1_UE_PAR_CAUSE", 7, 1 }, + { "GC0_UE_PAR_CAUSE", 6, 1 }, + { "GC1_CMD_PAR_CAUSE", 5, 1 }, + { "GC1_DATA_PAR_CAUSE", 4, 1 }, + { "GC0_CMD_PAR_CAUSE", 3, 1 }, + { "GC0_DATA_PAR_CAUSE", 2, 1 }, + { "ILLADDRACCESS1_PAR_CAUSE", 1, 1 }, + { "ILLADDRACCESS0_PAR_CAUSE", 0, 1 }, + { "GCACHE_PAR_ENABLE", 0x51540, 0 }, + { "GC1_SRAM_RSP_DATAQ_PERR_PAR_ENABLE", 27, 1 }, + { "GC0_SRAM_RSP_DATAQ_PERR_PAR_ENABLE", 26, 1 }, + { "GC1_WQDATA_FIFO_PERR_PAR_ENABLE", 25, 1 }, + { "GC0_WQDATA_FIFO_PERR_PAR_ENABLE", 24, 1 }, + { "GC1_RDTAG_QUEUE_PERR_PAR_ENABLE", 23, 1 }, + { "GC0_RDTAG_QUEUE_PERR_PAR_ENABLE", 22, 1 }, + { "GC1_SRAM_RDTAG_QUEUE_PERR_PAR_ENABLE", 21, 1 }, + { "GC0_SRAM_RDTAG_QUEUE_PERR_PAR_ENABLE", 20, 1 }, + { "GC1_RSP_PERR_PAR_ENABLE", 19, 1 }, + { "GC0_RSP_PERR_PAR_ENABLE", 18, 1 }, + { "GC1_LRU_UERR_PAR_ENABLE", 17, 1 }, + { "GC0_LRU_UERR_PAR_ENABLE", 16, 1 }, + { "GC1_TAG_UERR_PAR_ENABLE", 15, 1 }, + { "GC0_TAG_UERR_PAR_ENABLE", 14, 1 }, + { "GC1_LRU_CERR_PAR_ENABLE", 13, 1 }, + { "GC0_LRU_CERR_PAR_ENABLE", 12, 1 }, + { "GC1_TAG_CERR_PAR_ENABLE", 11, 1 }, + { "GC0_TAG_CERR_PAR_ENABLE", 10, 1 }, + { "GC1_CE_PAR_ENABLE", 9, 1 }, + { "GC0_CE_PAR_ENABLE", 8, 1 }, + { "GC1_UE_PAR_ENABLE", 7, 1 }, + { "GC0_UE_PAR_ENABLE", 6, 1 }, + { "GC1_CMD_PAR_ENABLE", 5, 1 }, + { "GC1_DATA_PAR_ENABLE", 4, 1 }, + { "GC0_CMD_PAR_ENABLE", 3, 1 }, + { "GC0_DATA_PAR_ENABLE", 2, 1 }, + { "ILLADDRACCESS1_PAR_ENABLE", 1, 1 }, + { "ILLADDRACCESS0_PAR_ENABLE", 0, 1 }, + { "GCACHE_INT_ENABLE", 0x51544, 0 }, + { "GC1_SRAM_RSP_DATAQ_PERR_INT_ENABLE", 27, 1 }, + { "GC0_SRAM_RSP_DATAQ_PERR_INT_ENABLE", 26, 1 }, + { "GC1_WQDATA_FIFO_PERR_INT_ENABLE", 25, 1 }, + { "GC0_WQDATA_FIFO_PERR_INT_ENABLE", 24, 1 }, + { "GC1_RDTAG_QUEUE_PERR_INT_ENABLE", 23, 1 }, + { "GC0_RDTAG_QUEUE_PERR_INT_ENABLE", 22, 1 }, + { "GC1_SRAM_RDTAG_QUEUE_PERR_INT_ENABLE", 21, 1 }, + { "GC0_SRAM_RDTAG_QUEUE_PERR_INT_ENABLE", 20, 1 }, + { "GC1_RSP_PERR_INT_ENABLE", 19, 1 }, + { "GC0_RSP_PERR_INT_ENABLE", 18, 1 }, + { "GC1_LRU_UERR_INT_ENABLE", 17, 1 }, + { "GC0_LRU_UERR_INT_ENABLE", 16, 1 }, + { "GC1_TAG_UERR_INT_ENABLE", 15, 1 }, + { "GC0_TAG_UERR_INT_ENABLE", 14, 1 }, + { "GC1_LRU_CERR_INT_ENABLE", 13, 1 }, + { "GC0_LRU_CERR_INT_ENABLE", 12, 1 }, + { "GC1_TAG_CERR_INT_ENABLE", 11, 1 }, + { "GC0_TAG_CERR_INT_ENABLE", 10, 1 }, + { "GC1_CE_INT_ENABLE", 9, 1 }, + { "GC0_CE_INT_ENABLE", 8, 1 }, + { "GC1_UE_INT_ENABLE", 7, 1 }, + { "GC0_UE_INT_ENABLE", 6, 1 }, + { "GC1_CMD_PAR_INT_ENABLE", 5, 1 }, + { "GC1_DATA_PAR_INT_ENABLE", 4, 1 }, + { "GC0_CMD_PAR_INT_ENABLE", 3, 1 }, + { "GC0_DATA_PAR_INT_ENABLE", 2, 1 }, + { "ILLADDRACCESS1_INT_ENABLE", 1, 1 }, + { "ILLADDRACCESS0_INT_ENABLE", 0, 1 }, + { "GCACHE_INT_CAUSE", 0x51548, 0 }, + { "GC1_SRAM_RSP_DATAQ_PERR_INT_CAUSE", 27, 1 }, + { "GC0_SRAM_RSP_DATAQ_PERR_INT_CAUSE", 26, 1 }, + { "GC1_WQDATA_FIFO_PERR_INT_CAUSE", 25, 1 }, + { "GC0_WQDATA_FIFO_PERR_INT_CAUSE", 24, 1 }, + { "GC1_RDTAG_QUEUE_PERR_INT_CAUSE", 23, 1 }, + { "GC0_RDTAG_QUEUE_PERR_INT_CAUSE", 22, 1 }, + { "GC1_SRAM_RDTAG_QUEUE_PERR_INT_CAUSE", 21, 1 }, + { "GC0_SRAM_RDTAG_QUEUE_PERR_INT_CAUSE", 20, 1 }, + { "GC1_RSP_PERR_INT_CAUSE", 19, 1 }, + { "GC0_RSP_PERR_INT_CAUSE", 18, 1 }, + { "GC1_LRU_UERR_INT_CAUSE", 17, 1 }, + { "GC0_LRU_UERR_INT_CAUSE", 16, 1 }, + { "GC1_TAG_UERR_INT_CAUSE", 15, 1 }, + { "GC0_TAG_UERR_INT_CAUSE", 14, 1 }, + { "GC1_LRU_CERR_INT_CAUSE", 13, 1 }, + { "GC0_LRU_CERR_INT_CAUSE", 12, 1 }, + { "GC1_TAG_CERR_INT_CAUSE", 11, 1 }, + { "GC0_TAG_CERR_INT_CAUSE", 10, 1 }, + { "GC1_CE_INT_CAUSE", 9, 1 }, + { "GC0_CE_INT_CAUSE", 8, 1 }, + { "GC1_UE_INT_CAUSE", 7, 1 }, + { "GC0_UE_INT_CAUSE", 6, 1 }, + { "GC1_CMD_PAR_INT_CAUSE", 5, 1 }, + { "GC1_DATA_PAR_INT_CAUSE", 4, 1 }, + { "GC0_CMD_PAR_INT_CAUSE", 3, 1 }, + { "GC0_DATA_PAR_INT_CAUSE", 2, 1 }, + { "ILLADDRACCESS1_INT_CAUSE", 1, 1 }, + { "ILLADDRACCESS0_INT_CAUSE", 0, 1 }, + { "GCACHE_DBG_CTL", 0x515f0, 0 }, + { "DATAH_SEL", 20, 1 }, + { "EN_DBG", 16, 1 }, + { "SEL", 0, 8 }, + { "GCACHE_DBG_DATA", 0x515f4, 0 }, + { "GCACHE_DBG_SEL_CTRL", 0x51550, 0 }, + { "SEL_OVR_EN", 31, 1 }, + { "DEBUG_HI", 16, 1 }, + { "SELH", 8, 8 }, + { "SELL", 0, 8 }, + { "GCACHE_LOCAL_DEBUG_RPT", 0x51554, 0 }, + { "GCACHE_DBG_ILL_ACC", 0x5155c, 0 }, + { "GCACHE_DBG_ILL_ADDR0", 0x51560, 0 }, + { "GCACHE_DBG_ILL_ADDR1", 0x51564, 0 }, + { "GCACHE_GC0_DBG_ADDR_0_32", 0x51568, 0 }, + { "GCACHE_GC0_DBG_ADDR_32_32", 0x5156c, 0 }, + { "GCACHE_GC0_DBG_ADDR_64_32", 0x51570, 0 }, + { "GCACHE_GC0_DBG_ADDR_96_32", 0x51574, 0 }, + { "GCACHE_GC0_DBG_ADDR_0_64", 0x51578, 0 }, + { "GCACHE_GC0_DBG_ADDR_64_64", 0x5157c, 0 }, + { "GCACHE_GC0_DBG_ADDR_0_96", 0x51580, 0 }, + { "GCACHE_GC0_DBG_ADDR_32_96", 0x51584, 0 }, + { "GCACHE_GC1_DBG_ADDR_0_32", 0x5158c, 0 }, + { "GCACHE_GC1_DBG_ADDR_32_32", 0x51590, 0 }, + { "GCACHE_GC1_DBG_ADDR_64_32", 0x51594, 0 }, + { "GCACHE_GC1_DBG_ADDR_96_32", 0x51598, 0 }, + { "GCACHE_GC1_DBG_ADDR_0_64", 0x5159c, 0 }, + { "GCACHE_GC1_DBG_ADDR_64_64", 0x515a0, 0 }, + { "GCACHE_GC1_DBG_ADDR_0_96", 0x515a4, 0 }, + { "GCACHE_GC1_DBG_ADDR_32_96", 0x515a8, 0 }, + { "GCACHE_GC0_DBG_ADDR_32_64", 0x515ac, 0 }, + { "GCACHE_GC1_DBG_ADDR_32_64", 0x515b0, 0 }, + { "GCACHE_PERF_GC0_EVICT", 0x515b4, 0 }, + { "GCACHE_PERF_GC1_EVICT", 0x515b8, 0 }, + { "GCACHE_PERF_GC0_CE_COUNT", 0x515bc, 0 }, + { "GCACHE_PERF_GC1_CE_COUNT", 0x515c0, 0 }, + { "GCACHE_PERF_GC0_UE_COUNT", 0x515c4, 0 }, + { "GCACHE_PERF_GC1_UE_COUNT", 0x515c8, 0 }, + { NULL } +}; diff --git a/usr.sbin/cxgbetool/tcb_common.c b/usr.sbin/cxgbetool/tcb_common.c index 53422c994584..803599696423 100644 --- a/usr.sbin/cxgbetool/tcb_common.c +++ b/usr.sbin/cxgbetool/tcb_common.c @@ -59,6 +59,15 @@ extern void t6_display_tcb_aux_2(_TCBVAR *tvp,int aux); extern void t6_display_tcb_aux_3(_TCBVAR *tvp,int aux); extern void t6_display_tcb_aux_4(_TCBVAR *tvp,int aux); +extern _TCBVAR g_tcb_info7[]; +extern _TCBVAR g_scb_info7[]; +extern _TCBVAR g_fcb_info7[]; +extern void t7_display_tcb_aux_0(_TCBVAR *tvp,int aux); +extern void t7_display_tcb_aux_1(_TCBVAR *tvp,int aux); +extern void t7_display_tcb_aux_2(_TCBVAR *tvp,int aux); +extern void t7_display_tcb_aux_3(_TCBVAR *tvp,int aux); +extern void t7_display_tcb_aux_4(_TCBVAR *tvp,int aux); + /***:----------------------------------------------------------------------- ***: globals ***:----------------------------------------------------------------------- @@ -437,7 +446,13 @@ display_tcb_compressed(_TCBVAR *tvp,int aux) if (1==aux) t6_display_tcb_aux_1(tvp,aux); else if (2==aux) t6_display_tcb_aux_2(tvp,aux); else if (3==aux) t6_display_tcb_aux_3(tvp,aux); - else if (4==aux) t6_display_tcb_aux_4(tvp,aux); + else if (4==aux) t6_display_tcb_aux_4(tvp,aux); + } else if (g_tN==7) { + t7_display_tcb_aux_0(tvp,aux); + if (1==aux) t7_display_tcb_aux_1(tvp,aux); + else if (2==aux) t7_display_tcb_aux_2(tvp,aux); + else if (3==aux) t7_display_tcb_aux_3(tvp,aux); + else if (4==aux) t7_display_tcb_aux_4(tvp,aux); } } @@ -692,6 +707,11 @@ set_tcb_info(unsigned int tidtype, unsigned int cardtype) g_scb_info = g_scb_info6; g_fcb_info = g_fcb_info6; } + else if (7 == g_tN) { + g_tcb_info = g_tcb_info7; + g_scb_info = g_scb_info7; + g_fcb_info = g_fcb_info7; + } } void diff --git a/usr.sbin/cxgbetool/tcbinfot7.c b/usr.sbin/cxgbetool/tcbinfot7.c new file mode 100644 index 000000000000..93b97bddbda6 --- /dev/null +++ b/usr.sbin/cxgbetool/tcbinfot7.c @@ -0,0 +1,1512 @@ +/* Auto-generated file. Avoid direct editing. */ +/* Edits will be lost when file regenerated. */ +/* See tcb_common.c for auto-generation commands. */ +#include <stdio.h> +#include "tcb_common.h" +_TCBVAR g_tcb_info7[]={ + {"ulp_type" , 0, 0, 3, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "ulp_type" , /* aka */ + COMP_NONE , /* comp */ + "ULP mode: 0 =toe, 2=iscsi, 4=rdma, 5=ddp, 6=fcoe, 7=user, 8=tls, 9=dtls, remaining values reserved", /*desc*/ + NULL, /*akadesc */ + }, + {"ulp_raw" , 0, 4, 11, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "ulp" , /* aka */ + COMP_ULP , /* comp */ + "ULP subtype", /*desc*/ + NULL, /*akadesc */ + }, + {"l2t_ix" , 0, 12, 23, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "l2t_ix" , /* aka */ + COMP_NONE , /* comp */ + "Destination MAC address index", /*desc*/ + NULL, /*akadesc */ + }, + {"smac_sel" , 0, 24, 31, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "smac_sel" , /* aka */ + COMP_NONE , /* comp */ + "Source MAC address index", /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MIGRATING" , 0, 32, 32, /* name,aux,lo,hi */ + "t_flags" , 0, 0, /* faka,flo,fhi */ + "migrating" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_NON_OFFLOAD" , 0, 33, 33, /* name,aux,lo,hi */ + "t_flags" , 1, 1, /* faka,flo,fhi */ + "non_offload" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_LOCK_TID" , 0, 34, 34, /* name,aux,lo,hi */ + "t_flags" , 2, 2, /* faka,flo,fhi */ + "lock_tid" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_KEEPALIVE" , 0, 35, 35, /* name,aux,lo,hi */ + "t_flags" , 3, 3, /* faka,flo,fhi */ + "keepalive" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DACK" , 0, 36, 36, /* name,aux,lo,hi */ + "t_flags" , 4, 4, /* faka,flo,fhi */ + "dack" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DACK_MSS" , 0, 37, 37, /* name,aux,lo,hi */ + "t_flags" , 5, 5, /* faka,flo,fhi */ + "dack_mss" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DACK_NOT_ACKED" , 0, 38, 38, /* name,aux,lo,hi */ + "t_flags" , 6, 6, /* faka,flo,fhi */ + "dack_not_acked" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_NAGLE" , 0, 39, 39, /* name,aux,lo,hi */ + "t_flags" , 7, 7, /* faka,flo,fhi */ + "nagle" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_SSWS_DISABLED" , 0, 40, 40, /* name,aux,lo,hi */ + "t_flags" , 8, 8, /* faka,flo,fhi */ + "ssws_disabled" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RX_FLOW_CONTROL_DDP" , 0, 41, 41, /* name,aux,lo,hi */ + "t_flags" , 9, 9, /* faka,flo,fhi */ + "rx_flow_control_ddp" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RX_FLOW_CONTROL_DISABLE" , 0, 42, 42, /* name,aux,lo,hi */ + "t_flags" , 10, 10, /* faka,flo,fhi */ + "rx_flow_control_disable" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RESERVED" , 0, 43, 43, /* name,aux,lo,hi */ + "t_flags" , 11, 11, /* faka,flo,fhi */ + "reserved" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CHANNEL" , 0, 44, 45, /* name,aux,lo,hi */ + "t_flags" , 12, 13, /* faka,flo,fhi */ + "channel" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CHANNEL_MSB" , 0, 45, 45, /* name,aux,lo,hi */ + "t_flags" , 13, 13, /* faka,flo,fhi */ + "channel_msb" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_QUIESCE" , 0, 46, 46, /* name,aux,lo,hi */ + "t_flags" , 14, 14, /* faka,flo,fhi */ + "tx_quiesce" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RX_QUIESCE" , 0, 47, 47, /* name,aux,lo,hi */ + "t_flags" , 15, 15, /* faka,flo,fhi */ + "rx_quiesce" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_PACE_AUTO" , 0, 48, 48, /* name,aux,lo,hi */ + "t_flags" , 16, 16, /* faka,flo,fhi */ + "tx_pace_auto" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_PACE_FIXED" , 0, 49, 49, /* name,aux,lo,hi */ + "t_flags" , 17, 17, /* faka,flo,fhi */ + "tx_pace_fixed" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_QUEUE" , 0, 50, 52, /* name,aux,lo,hi */ + "t_flags" , 18, 20, /* faka,flo,fhi */ + "tx_queue" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TURBO" , 0, 53, 53, /* name,aux,lo,hi */ + "t_flags" , 21, 21, /* faka,flo,fhi */ + "turbo" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_SEL0" , 0, 54, 54, /* name,aux,lo,hi */ + "t_flags" , 22, 22, /* faka,flo,fhi */ + "cctrl_sel0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_SEL1" , 0, 55, 55, /* name,aux,lo,hi */ + "t_flags" , 23, 23, /* faka,flo,fhi */ + "cctrl_sel1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_FIN" , 0, 56, 56, /* name,aux,lo,hi */ + "t_flags" , 24, 24, /* faka,flo,fhi */ + "core_fin" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_URG" , 0, 57, 57, /* name,aux,lo,hi */ + "t_flags" , 25, 25, /* faka,flo,fhi */ + "core_urg" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_MORE" , 0, 58, 58, /* name,aux,lo,hi */ + "t_flags" , 26, 26, /* faka,flo,fhi */ + "core_more" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_PUSH" , 0, 59, 59, /* name,aux,lo,hi */ + "t_flags" , 27, 27, /* faka,flo,fhi */ + "core_push" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_FLUSH" , 0, 60, 60, /* name,aux,lo,hi */ + "t_flags" , 28, 28, /* faka,flo,fhi */ + "core_flush" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RCV_COALESCE_ENABLE" , 0, 61, 61, /* name,aux,lo,hi */ + "t_flags" , 29, 29, /* faka,flo,fhi */ + "rcv_coalesce_enable" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RCV_COALESCE_PUSH" , 0, 62, 62, /* name,aux,lo,hi */ + "t_flags" , 30, 30, /* faka,flo,fhi */ + "rcv_coalesce_push" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RCV_COALESCE_LAST_PSH" , 0, 63, 63, /* name,aux,lo,hi */ + "t_flags" , 31, 31, /* faka,flo,fhi */ + "rcv_coalesce_last_psh" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RCV_COALESCE_HEARTBEAT" , 0, 64, 64, /* name,aux,lo,hi */ + "t_flags" , 32, 32, /* faka,flo,fhi */ + "rcv_coalesce_heartbeat" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RSS_FW" , 0, 65, 65, /* name,aux,lo,hi */ + "t_flags" , 33, 33, /* faka,flo,fhi */ + "rss_fw" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_ACTIVE_OPEN" , 0, 66, 66, /* name,aux,lo,hi */ + "t_flags" , 34, 34, /* faka,flo,fhi */ + "active_open" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_ASK_MODE" , 0, 67, 67, /* name,aux,lo,hi */ + "t_flags" , 35, 35, /* faka,flo,fhi */ + "ask_mode" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MOD_SCHD_REASON0" , 0, 68, 68, /* name,aux,lo,hi */ + "t_flags" , 36, 36, /* faka,flo,fhi */ + "mod_schd_reason0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MOD_SCHD_REASON1" , 0, 69, 69, /* name,aux,lo,hi */ + "t_flags" , 37, 37, /* faka,flo,fhi */ + "mod_schd_reason1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MOD_SCHD_REASON2" , 0, 70, 70, /* name,aux,lo,hi */ + "t_flags" , 38, 38, /* faka,flo,fhi */ + "mod_schd_reason2" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MOD_SCHD_TX" , 0, 71, 71, /* name,aux,lo,hi */ + "t_flags" , 39, 39, /* faka,flo,fhi */ + "mod_schd_tx" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_MOD_SCHD_RX" , 0, 72, 72, /* name,aux,lo,hi */ + "t_flags" , 40, 40, /* faka,flo,fhi */ + "mod_schd_rx" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TIMER" , 0, 73, 73, /* name,aux,lo,hi */ + "t_flags" , 41, 41, /* faka,flo,fhi */ + "timer" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DACK_TIMER" , 0, 74, 74, /* name,aux,lo,hi */ + "t_flags" , 42, 42, /* faka,flo,fhi */ + "dack_timer" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_PEER_FIN" , 0, 75, 75, /* name,aux,lo,hi */ + "t_flags" , 43, 43, /* faka,flo,fhi */ + "peer_fin" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_COMPACT" , 0, 76, 76, /* name,aux,lo,hi */ + "t_flags" , 44, 44, /* faka,flo,fhi */ + "tx_compact" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RX_COMPACT" , 0, 77, 77, /* name,aux,lo,hi */ + "t_flags" , 45, 45, /* faka,flo,fhi */ + "rx_compact" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RDMA_ERROR" , 0, 78, 78, /* name,aux,lo,hi */ + "t_flags" , 46, 46, /* faka,flo,fhi */ + "rdma_error" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RDMA_FLM_ERROR" , 0, 79, 79, /* name,aux,lo,hi */ + "t_flags" , 47, 47, /* faka,flo,fhi */ + "rdma_flm_error" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TX_PDU_OUT" , 0, 80, 80, /* name,aux,lo,hi */ + "t_flags" , 48, 48, /* faka,flo,fhi */ + "tx_pdu_out" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RX_PDU_OUT" , 0, 81, 81, /* name,aux,lo,hi */ + "t_flags" , 49, 49, /* faka,flo,fhi */ + "rx_pdu_out" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DUPACK_COUNT_ODD" , 0, 82, 82, /* name,aux,lo,hi */ + "t_flags" , 50, 50, /* faka,flo,fhi */ + "dupack_count_odd" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_FAST_RECOVERY" , 0, 83, 83, /* name,aux,lo,hi */ + "t_flags" , 51, 51, /* faka,flo,fhi */ + "fast_recovery" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RECV_SCALE" , 0, 84, 84, /* name,aux,lo,hi */ + "t_flags" , 52, 52, /* faka,flo,fhi */ + "recv_scale" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RECV_TSTMP" , 0, 85, 85, /* name,aux,lo,hi */ + "t_flags" , 53, 53, /* faka,flo,fhi */ + "recv_tstmp" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_RECV_SACK" , 0, 86, 86, /* name,aux,lo,hi */ + "t_flags" , 54, 54, /* faka,flo,fhi */ + "recv_sack" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_PEND_CTL0" , 0, 87, 87, /* name,aux,lo,hi */ + "t_flags" , 55, 55, /* faka,flo,fhi */ + "pend_ctl0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_PEND_CTL1" , 0, 88, 88, /* name,aux,lo,hi */ + "t_flags" , 56, 56, /* faka,flo,fhi */ + "pend_ctl1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_PEND_CTL2" , 0, 89, 89, /* name,aux,lo,hi */ + "t_flags" , 57, 57, /* faka,flo,fhi */ + "pend_ctl2" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_IP_VERSION" , 0, 90, 90, /* name,aux,lo,hi */ + "t_flags" , 58, 58, /* faka,flo,fhi */ + "ip_version" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_ECN" , 0, 91, 91, /* name,aux,lo,hi */ + "t_flags" , 59, 59, /* faka,flo,fhi */ + "cctrl_ecn" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_ECE" , 0, 92, 92, /* name,aux,lo,hi */ + "t_flags" , 60, 60, /* faka,flo,fhi */ + "cctrl_ece" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_CWR" , 0, 93, 93, /* name,aux,lo,hi */ + "t_flags" , 61, 61, /* faka,flo,fhi */ + "cctrl_cwr" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CCTRL_RFR" , 0, 94, 94, /* name,aux,lo,hi */ + "t_flags" , 62, 62, /* faka,flo,fhi */ + "cctrl_rfr" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_CORE_BYPASS" , 0, 95, 95, /* name,aux,lo,hi */ + "t_flags" , 63, 63, /* faka,flo,fhi */ + "core_bypass" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"rss_info" , 0, 96, 105, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rss_info" , /* aka */ + COMP_NONE , /* comp */ + "RSS field", /*desc*/ + NULL, /*akadesc */ + }, + {"tos" , 0, 106, 111, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tos" , /* aka */ + COMP_NONE , /* comp */ + "TOS field for IP header", /*desc*/ + NULL, /*akadesc */ + }, + {"t_state" , 0, 112, 115, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_state" , /* aka */ + COMP_NONE , /* comp */ + "Connection TCP state (see TCP state table)", /*desc*/ + NULL, /*akadesc */ + }, + {"max_rt" , 0, 116, 119, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "max_rt" , /* aka */ + COMP_NONE , /* comp */ + "Maximum re-transmissions", /*desc*/ + NULL, /*akadesc */ + }, + {"t_maxseg" , 0, 120, 123, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_maxseg" , /* aka */ + COMP_NONE , /* comp */ + "MTU table index", /*desc*/ + NULL, /*akadesc */ + }, + {"snd_scale" , 0, 124, 127, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_scale" , /* aka */ + COMP_NONE , /* comp */ + "Scaling for receive window (0-14). Note: this is reverse of common definition.", /*desc*/ + NULL, /*akadesc */ + }, + {"rcv_scale" , 0, 128, 131, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rcv_scale" , /* aka */ + COMP_NONE , /* comp */ + "Scaling for send window (0-14). Note: this is reverse of common definition.", /*desc*/ + NULL, /*akadesc */ + }, + {"t_rxtshift" , 0, 132, 135, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_rxtshift" , /* aka */ + COMP_NONE , /* comp */ + "Retransmit exponential backoff", /*desc*/ + NULL, /*akadesc */ + }, + {"t_dupacks" , 0, 136, 139, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_dupacks" , /* aka */ + COMP_NONE , /* comp */ + "Number of duplicate ACKs received", /*desc*/ + NULL, /*akadesc */ + }, + {"timestamp_offset" , 0, 140, 143, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "timestamp_offset" , /* aka */ + COMP_NONE , /* comp */ + "Timestamp offset from running clock", /*desc*/ + NULL, /*akadesc */ + }, + {"rcv_adv" , 0, 144, 159, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rcv_adv" , /* aka */ + COMP_NONE , /* comp */ + "Peer advertised window", /*desc*/ + NULL, /*akadesc */ + }, + {"timestamp" , 0, 160, 191, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "timestamp" , /* aka */ + COMP_NONE , /* comp */ + "Timer accounting field", /*desc*/ + NULL, /*akadesc */ + }, + {"t_rtt_ts_recent_age" , 0, 192, 223, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_rtt_ts_recent_age" , /* aka */ + COMP_NONE , /* comp */ + "Round-trip time; timestamps: ts_recent_age", /*desc*/ + NULL, /*akadesc */ + }, + {"t_rtseq_recent" , 0, 224, 255, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_rtseq_recent" , /* aka */ + COMP_NONE , /* comp */ + "Sequence number being timed t_rtseq; timestamps t_recent", /*desc*/ + NULL, /*akadesc */ + }, + {"t_srtt" , 0, 256, 271, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_srtt" , /* aka */ + COMP_NONE , /* comp */ + "Smoothed round-trip time", /*desc*/ + NULL, /*akadesc */ + }, + {"t_rttvar" , 0, 272, 287, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "t_rttvar" , /* aka */ + COMP_NONE , /* comp */ + "Variance in round-trip time", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_max" , 0, 288, 319, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_max" , /* aka */ + COMP_NONE , /* comp */ + "Highest sequence number in transmit buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"snd_una_raw" , 0, 320, 347, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_una" , /* aka */ + COMP_TX_MAX , /* comp */ + "Offset of snd_una from tx_max", /*desc*/ + "Send unacknowledged", /*akadesc */ + }, + {"snd_nxt_raw" , 0, 348, 375, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_nxt" , /* aka */ + COMP_TX_MAX , /* comp */ + "Offset of snd_nxt from tx_max", /*desc*/ + "Send next", /*akadesc */ + }, + {"snd_max_raw" , 0, 376, 403, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_max" , /* aka */ + COMP_TX_MAX , /* comp */ + "Offset of snd_max from tx_max", /*desc*/ + "Highest sequence number sent", /*akadesc */ + }, + {"snd_rec_raw" , 0, 404, 431, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_rec" , /* aka */ + COMP_TX_MAX , /* comp */ + "Offset of NewReno fast recovery end sequence from tx_max", /*desc*/ + "NewReno fast recovery end sequence number", /*akadesc */ + }, + {"snd_cwnd" , 0, 432, 459, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_cwnd" , /* aka */ + COMP_NONE , /* comp */ + "Congestion-control window", /*desc*/ + NULL, /*akadesc */ + }, + {"snd_ssthresh" , 0, 460, 487, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "snd_ssthresh" , /* aka */ + COMP_NONE , /* comp */ + "Slow Start threshold", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_hdr_ptr_raw" , 0, 488, 504, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_hdr_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for first byte in send buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_last_ptr_raw" , 0, 505, 521, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_last_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for last byte in send buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rcv_nxt" , 0, 522, 553, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rcv_nxt" , /* aka */ + COMP_NONE , /* comp */ + "TCP receive next", /*desc*/ + NULL, /*akadesc */ + }, + {"rcv_wnd" , 0, 554, 581, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rcv_wnd" , /* aka */ + COMP_NONE , /* comp */ + "Receive credits (advertised to peer in receive window)", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_hdr_offset" , 0, 582, 609, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_hdr_offset" , /* aka */ + COMP_NONE , /* comp */ + "Receive in-order buffered data", /*desc*/ + NULL, /*akadesc */ + }, + {"ts_last_ack_sent_raw" , 0, 610, 637, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "ts_last_ack_sent" , /* aka */ + COMP_RCV_NXT , /* comp */ + "Offset of highest sequence acked from rcv_nxt", /*desc*/ + "Highest sequence number acked", /*akadesc */ + }, + {"rx_frag0_start_idx_raw" , 0, 638, 665, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag0_start_idx" , /* aka */ + COMP_RCV_NXT , /* comp */ + "Offset of receive fragment 0 start sequence from rcv_nxt", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag1_start_idx_offset" , 0, 666, 693, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag1_start_idx_offset" , /* aka */ + COMP_RCV_NXT , /* comp */ + "Offset of receive fragment 1 start sequence from rcv_nxt", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag0_len" , 0, 694, 721, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag0_len" , /* aka */ + COMP_NONE , /* comp */ + "Receive re-order fragment 0 length", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag1_len" , 0, 722, 749, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag1_len" , /* aka */ + COMP_NONE , /* comp */ + "Receive re-order fragment 1 length", /*desc*/ + NULL, /*akadesc */ + }, + {"pdu_len" , 0, 750, 765, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "pdu_len" , /* aka */ + COMP_NONE , /* comp */ + "Receive recovered PDU length", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ptr_raw" , 0, 766, 782, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for in-order receive buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag1_ptr_raw" , 0, 783, 799, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag1_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for out-of-order receive buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"main_slush" , 0, 800, 831, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "main_slush" , /* aka */ + COMP_NONE , /* comp */ + "Reserved", /*desc*/ + NULL, /*akadesc */ + }, + {"aux1_slush0" , 1, 832, 846, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "aux1_slush0" , /* aka */ + COMP_NONE , /* comp */ + "Reserved", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag2_start_idx_offset_raw", 1, 847, 874, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag2_start_idx_offset" , /* aka */ + COMP_RCV_NXT , /* comp */ + "Offset of receive fragment 2 start sequence from rcv_nxt", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag2_ptr_raw" , 1, 875, 891, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag2_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for out-of-order receive buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag2_len_raw" , 1, 892, 919, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag2_len" , /* aka */ + COMP_LEN , /* comp */ + "Receive re-order fragment 2 length", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag3_ptr_raw" , 1, 920, 936, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag3_ptr" , /* aka */ + COMP_PTR , /* comp */ + "Page pointer for out-of-order receive buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag3_len_raw" , 1, 937, 964, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag3_len" , /* aka */ + COMP_LEN , /* comp */ + "Receive re-order fragment 3 length", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_frag3_start_idx_offset_raw", 1, 965, 992, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_frag3_start_idx_offset" , /* aka */ + COMP_RCV_NXT , /* comp */ + "Offset of receive fragment 3 start sequence from rcv_nxt", /*desc*/ + NULL, /*akadesc */ + }, + {"pdu_hdr_len" , 1, 993, 1000, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "pdu_hdr_len" , /* aka */ + COMP_NONE , /* comp */ + "Receive recovered PDU header length", /*desc*/ + NULL, /*akadesc */ + }, + {"aux1_slush1" , 1, 1001, 1019, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "aux1_slush1" , /* aka */ + COMP_NONE , /* comp */ + "Reserved", /*desc*/ + NULL, /*akadesc */ + }, + {"ulp_ext" , 1, 1020, 1023, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "ulp_ext" , /* aka */ + COMP_NONE , /* comp */ + "Extension of ulp_raw for PI configuration", /*desc*/ + NULL, /*akadesc */ + }, + + {"irs_ulp" , 2, 832, 840, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "irs_ulp" , /* aka */ + COMP_NONE , /* comp */ + "IRS modulo marker_interval when enterring iWARP mode", /*desc*/ + NULL, /*akadesc */ + }, + {"iss_ulp" , 2, 841, 849, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "iss_ulp" , /* aka */ + COMP_NONE , /* comp */ + "ISS modulo marker_interval when entering iWARP mode", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_pdu_len" , 2, 850, 863, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_pdu_len" , /* aka */ + COMP_NONE , /* comp */ + "Length of Tx FPDU", /*desc*/ + NULL, /*akadesc */ + }, + {"cq_idx_sq" , 2, 864, 879, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "cq_idx_sq" , /* aka */ + COMP_NONE , /* comp */ + "CQ index of CQ for SQ", /*desc*/ + NULL, /*akadesc */ + }, + {"cq_idx_rq" , 2, 880, 895, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "cq_idx_rq" , /* aka */ + COMP_NONE , /* comp */ + "CQ index of CQ for RQ", /*desc*/ + NULL, /*akadesc */ + }, + {"qp_id" , 2, 896, 911, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "qp_id" , /* aka */ + COMP_NONE , /* comp */ + "QP index", /*desc*/ + NULL, /*akadesc */ + }, + {"pd_id" , 2, 912, 927, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "pd_id" , /* aka */ + COMP_NONE , /* comp */ + "PD index", /*desc*/ + NULL, /*akadesc */ + }, + {"STAG" , 2, 928, 959, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "stag" , /* aka */ + COMP_NONE , /* comp */ + "PDU response STAG", /*desc*/ + NULL, /*akadesc */ + }, + {"rq_start" , 2, 960, 985, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rq_start" , /* aka */ + COMP_NONE , /* comp */ + "DW aligned starting addres of RQ", /*desc*/ + NULL, /*akadesc */ + }, + {"rq_MSN" , 2, 986, 998, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rq_msn" , /* aka */ + COMP_NONE , /* comp */ + "Current MSN (modulo 8K, further check in ULP_RX)", /*desc*/ + NULL, /*akadesc */ + }, + {"rq_max_offset" , 2, 999, 1002, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rq_max_offset" , /* aka */ + COMP_NONE , /* comp */ + "Log size RQ (the size in hardware is rounded up to a power of 2)", /*desc*/ + NULL, /*akadesc */ + }, + {"rq_write_ptr" , 2, 1003, 1015, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rq_write_ptr" , /* aka */ + COMP_NONE , /* comp */ + "Host RQ write pointer", /*desc*/ + NULL, /*akadesc */ + }, + {"RDMAP_opcode" , 2, 1016, 1019, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rdmap_opcode" , /* aka */ + COMP_NONE , /* comp */ + "Current FPDU command", /*desc*/ + NULL, /*akadesc */ + }, + {"ord_L_bit_vld" , 2, 1020, 1020, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "ord_l_bit_vld" , /* aka */ + COMP_NONE , /* comp */ + "Current FPDU has L-bit set", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_flush" , 2, 1021, 1021, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_flush" , /* aka */ + COMP_NONE , /* comp */ + "1 = flush CPL_TX_DATA", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_oos_rxmt" , 2, 1022, 1022, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_oos_rxmt" , /* aka */ + COMP_NONE , /* comp */ + "Retransmit is out of FPDU sync", /*desc*/ + NULL, /*akadesc */ + }, + {"tx_oos_txmt" , 2, 1023, 1023, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "tx_oos_txmt" , /* aka */ + COMP_NONE , /* comp */ + "Transmit is out of FPDU sync, or disable aligned transmission", /*desc*/ + NULL, /*akadesc */ + }, + + {"rx_ddp_buf0_offset" , 3, 832, 855, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf0_offset" , /* aka */ + COMP_NONE , /* comp */ + "Current offset into DDP buffer 0", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ddp_buf0_len" , 3, 856, 879, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf0_len" , /* aka */ + COMP_NONE , /* comp */ + "Length of DDP buffer 0", /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_INDICATE_OUT" , 3, 880, 880, /* name,aux,lo,hi */ + "rx_ddp_flags" , 0, 0, /* faka,flo,fhi */ + "ddp_indicate_out" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_ACTIVE_BUF" , 3, 881, 881, /* name,aux,lo,hi */ + "rx_ddp_flags" , 1, 1, /* faka,flo,fhi */ + "ddp_active_buf" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_OFF" , 3, 882, 882, /* name,aux,lo,hi */ + "rx_ddp_flags" , 2, 2, /* faka,flo,fhi */ + "ddp_off" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_WAIT_FRAG" , 3, 883, 883, /* name,aux,lo,hi */ + "rx_ddp_flags" , 3, 3, /* faka,flo,fhi */ + "ddp_wait_frag" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF_INF" , 3, 884, 884, /* name,aux,lo,hi */ + "rx_ddp_flags" , 4, 4, /* faka,flo,fhi */ + "ddp_buf_inf" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_RX2TX" , 3, 885, 885, /* name,aux,lo,hi */ + "rx_ddp_flags" , 5, 5, /* faka,flo,fhi */ + "ddp_rx2tx" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_INDICATE_FLL" , 3, 886, 886, /* name,aux,lo,hi */ + "rx_ddp_flags" , 6, 6, /* faka,flo,fhi */ + "ddp_indicate_fll" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_MAIN_UNUSED" , 3, 887, 887, /* name,aux,lo,hi */ + "rx_ddp_flags" , 7, 7, /* faka,flo,fhi */ + "ddp_main_unused" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_TLS_KEY_MODE" , 3, 887, 887, /* name,aux,lo,hi */ + "rx_ddp_flags" , 7, 7, /* faka,flo,fhi */ + "tls_key_mode" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF0_VALID" , 3, 888, 888, /* name,aux,lo,hi */ + "rx_ddp_flags" , 8, 8, /* faka,flo,fhi */ + "ddp_buf0_valid" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF0_INDICATE" , 3, 889, 889, /* name,aux,lo,hi */ + "rx_ddp_flags" , 9, 9, /* faka,flo,fhi */ + "ddp_buf0_indicate" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF0_FLUSH" , 3, 890, 890, /* name,aux,lo,hi */ + "rx_ddp_flags" , 10, 10, /* faka,flo,fhi */ + "ddp_buf0_flush" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PSHF_ENABLE_0" , 3, 891, 891, /* name,aux,lo,hi */ + "rx_ddp_flags" , 11, 11, /* faka,flo,fhi */ + "ddp_pshf_enable_0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PUSH_DISABLE_0" , 3, 892, 892, /* name,aux,lo,hi */ + "rx_ddp_flags" , 12, 12, /* faka,flo,fhi */ + "ddp_push_disable_0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PSH_NO_INVALIDATE0" , 3, 893, 893, /* name,aux,lo,hi */ + "rx_ddp_flags" , 13, 13, /* faka,flo,fhi */ + "ddp_psh_no_invalidate0" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF0_UNUSED" , 3, 894, 895, /* name,aux,lo,hi */ + "rx_ddp_flags" , 14, 15, /* faka,flo,fhi */ + "ddp_buf0_unused" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF1_VALID" , 3, 896, 896, /* name,aux,lo,hi */ + "rx_ddp_flags" , 16, 16, /* faka,flo,fhi */ + "ddp_buf1_valid" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF1_INDICATE" , 3, 897, 897, /* name,aux,lo,hi */ + "rx_ddp_flags" , 17, 17, /* faka,flo,fhi */ + "ddp_buf1_indicate" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF1_FLUSH" , 3, 898, 898, /* name,aux,lo,hi */ + "rx_ddp_flags" , 18, 18, /* faka,flo,fhi */ + "ddp_buf1_flush" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PSHF_ENABLE_1" , 3, 899, 899, /* name,aux,lo,hi */ + "rx_ddp_flags" , 19, 19, /* faka,flo,fhi */ + "ddp_pshf_enable_1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PUSH_DISABLE_1" , 3, 900, 900, /* name,aux,lo,hi */ + "rx_ddp_flags" , 20, 20, /* faka,flo,fhi */ + "ddp_push_disable_1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_PSH_NO_INVALIDATE1" , 3, 901, 901, /* name,aux,lo,hi */ + "rx_ddp_flags" , 21, 21, /* faka,flo,fhi */ + "ddp_psh_no_invalidate1" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"TF_DDP_BUF1_UNUSED" , 3, 902, 903, /* name,aux,lo,hi */ + "rx_ddp_flags" , 22, 23, /* faka,flo,fhi */ + "ddp_buf1_unused" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ddp_buf1_offset" , 3, 904, 927, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf1_offset" , /* aka */ + COMP_NONE , /* comp */ + "Current offset into DDP buffer 1", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ddp_buf1_len" , 3, 928, 951, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf1_len" , /* aka */ + COMP_NONE , /* comp */ + "Length of DDP buffer 1", /*desc*/ + NULL, /*akadesc */ + }, + {"aux3_slush" , 3, 952, 959, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "aux3_slush" , /* aka */ + COMP_NONE , /* comp */ + "Reserved", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ddp_buf0_tag" , 3, 960, 991, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf0_tag" , /* aka */ + COMP_NONE , /* comp */ + "Tag for DDP buffer 0", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_ddp_buf1_tag" , 3, 992, 1023, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_ddp_buf1_tag" , /* aka */ + COMP_NONE , /* comp */ + "Tag for DDP buffer 1", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_buf_offset" , 4, 832, 855, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_buf_offset" , /* aka */ + COMP_NONE , /* comp */ + "Current offset into DDP buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_buf_len" , 4, 856, 879, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_buf_len" , /* aka */ + COMP_NONE , /* comp */ + "Length of DDP buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_flags" , 4, 880, 895, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_flags" , /* aka */ + COMP_NONE , /* comp */ + "DDP control flags", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_seq" , 4, 896, 959, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_seq" , /* aka */ + COMP_NONE , /* comp */ + "TLS/SSL sequence number", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_buf_tag" , 4, 960, 991, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_buf_tag" , /* aka */ + COMP_NONE , /* comp */ + "Tag for DDP buffer", /*desc*/ + NULL, /*akadesc */ + }, + {"rx_tls_key_tag" , 4, 992, 1023, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "rx_tls_key_tag" , /* aka */ + COMP_NONE , /* comp */ + "Tag for TLS crypto state", /*desc*/ + NULL, /*akadesc */ + }, + {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/ +}; + +/* ====================================================== */ +_TCBVAR g_scb_info7[]={ + {"OPT_1_RSS_INFO" , 0, 0, 11, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_RSS_INFO" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_1_LISTEN_INTERFACE" , 0, 12, 19, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_LISTEN_INTERFACE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_1_LISTEN_FILTER" , 0, 20, 20, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_LISTEN_FILTER" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_1_SYN_DEFENSE" , 0, 21, 21, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_SYN_DEFENSE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_1_CONNECTION_POLICY" , 0, 22, 23, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_CONNECTION_POLICY" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_1_FLT_INFO" , 0, 24, 63, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_1_FLT_INFO" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_ACCEPT_MODE" , 0, 64, 65, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_ACCEPT_MODE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_CHANNEL" , 0, 66, 67, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_CHANNEL" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_NO_CONGESTION_CONTROL" , 0, 68, 68, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_NO_CONGESTION_CONTROL" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_DELAYED_ACK" , 0, 69, 69, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_DELAYED_ACK" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_INJECT_TIMER" , 0, 70, 70, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_INJECT_TIMER" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_NON_OFFLOAD" , 0, 71, 71, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_NON_OFFLOAD" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_ULP_MODE" , 0, 72, 75, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_ULP_MODE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_MAX_RCV_BUFFER" , 0, 76, 85, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_MAX_RCV_BUFFER" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_TOS" , 0, 86, 91, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_TOS" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_SM_SEL" , 0, 92, 99, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_SM_SEL" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_L2T_IX" , 0, 100, 111, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_L2T_IX" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_TCAM_BYPASS" , 0, 112, 112, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_TCAM_BYPASS" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_NAGLE" , 0, 113, 113, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_NAGLE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_WSF" , 0, 114, 117, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_WSF" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_KEEPALIVE" , 0, 118, 118, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_KEEPALIVE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_CONN_MAXRT" , 0, 119, 122, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_CONN_MAXRT" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_MAXRT_OVERRIDE" , 0, 123, 123, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_MAXRT_OVERRIDE" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"OPT_0_MAX_SEG" , 0, 124, 127, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "OPT_0_MAX_SEG" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"scb_slush" , 0, 128, 1023, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "scb_slush" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/ +}; + +/* ====================================================== */ +_TCBVAR g_fcb_info7[]={ + {"filter" , 0, 33, 33, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "filter" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Drop_Encapsulation_Headers" , 0, 35, 35, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Drop_Encapsulation_Headers" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Report_TID" , 0, 53, 53, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Report_TID" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Drop" , 0, 54, 54, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Drop" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Direct_Steer" , 0, 55, 55, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Direct_Steer" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Mask_Hash" , 0, 48, 48, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Mask_Hash" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Direct_Steer_Hash" , 0, 49, 49, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Direct_Steer_Hash" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Loopback" , 0, 91, 91, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Loopback" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Loopback_TX_Channel" , 0, 44, 45, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Loopback_TX_Channel" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Loopback_TX_Loopback" , 0, 85, 85, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Loopback_TX_Loopback" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Swap_MAC_addresses" , 0, 86, 86, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Swap_MAC_addresses" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Rewrite_DMAC" , 0, 92, 92, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Rewrite_DMAC" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Rewrite_SMAC" , 0, 93, 93, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Rewrite_SMAC" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Insert_VLAN" , 0, 94, 94, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Insert_VLAN" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Remove_VLAN" , 0, 39, 39, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Remove_VLAN" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"NAT_Mode" , 0, 50, 52, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "NAT_Mode" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"NAT_seq_check" , 0, 42, 42, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "NAT_seq_check" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"NAT_flag_check" , 0, 84, 84, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "NAT_flag_check" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Count_Hits" , 0, 36, 36, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Count_Hits" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Hit_frame_cnt" , 0, 160, 191, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Hit_frame_cnt" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Hit_byte_cnt_high" , 0, 224, 255, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Hit_byte_cnt_high" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {"Hit_byte_cnt_low" , 0, 192, 223, /* name,aux,lo,hi */ + NULL , 0, 0, /* faka,flo,fhi */ + "Hit_byte_cnt_low" , /* aka */ + COMP_NONE , /* comp */ + NULL, /*desc*/ + NULL, /*akadesc */ + }, + {NULL,0,0,0, NULL,0,0, NULL, 0, NULL, NULL}, /*terminator*/ +}; + diff --git a/usr.sbin/cxgbetool/tcbshowt7.c b/usr.sbin/cxgbetool/tcbshowt7.c new file mode 100644 index 000000000000..a3397960b26b --- /dev/null +++ b/usr.sbin/cxgbetool/tcbshowt7.c @@ -0,0 +1,412 @@ +/* Auto-generated file. Avoid direct editing. */ +/* Edits will be lost when file regenerated. */ +/* See tcb_common.c for auto-generation commands. */ +#include <stdio.h> +#include "tcb_common.h" + +void t7_display_tcb_aux_0 (_TCBVAR *tvp, int aux) +{ + + + + + + + + PR("STATE:\n"); + PR(" %-12s (%-2u), %s, lock_tid %u, rss_fw %u\n", + spr_tcp_state(val("t_state")), + val("t_state"), + spr_ip_version(val("ip_version")), + val("lock_tid"), + val("rss_fw") + ); + PR(" l2t_ix 0x%x, smac sel 0x%x, tos 0x%x\n", + val("l2t_ix"), + val("smac_sel"), + val("tos") + ); + PR(" maxseg %u, recv_scaleflag %u, recv_tstmp %u, recv_sack %u\n", + val("t_maxseg"), val("recv_scale"), + val("recv_tstmp"), val("recv_sack")); + + + PR("TIMERS:\n"); /* **************************************** */ + PR(" timer %u, dack_timer %u\n", + val("timer"), val("dack_timer")); + PR(" mod_schd: tx: %u, rx: %u, reason 0x%1x\n", + val("mod_schd_tx"), + val("mod_schd_rx"), + ((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) | + val("mod_schd_reason0")) + ); + + + PR(" max_rt %-2u, rxtshift %u, keepalive %u\n", + val("max_rt"), val("t_rxtshift"), + val("keepalive")); + PR(" timestamp_offset 0x%x, timestamp 0x%x\n", + val("timestamp_offset"),val("timestamp")); + + + PR(" t_rtt_ts_recent_age %u t_rttseq_recent %u\n", + val("t_rtt_ts_recent_age"), val("t_rtseq_recent")); + PR(" t_srtt %u, t_rttvar %u\n", + val("t_srtt"),val("t_rttvar")); + + + + + + + PR("TRANSMIT BUFFER:\n"); /* *************************** */ + PR(" snd_una %u, snd_nxt %u, snd_max %u, tx_max %u\n", + val("snd_una"),val("snd_nxt"), + val("snd_max"),val("tx_max")); + PR(" core_fin %u, tx_hdr_offset %u\n", + val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una")) + ); + if (val("recv_scale") && !val("active_open")) { + PR(" rcv_adv %-5u << %-2u == %u (recv_scaleflag %u rcv_scale %u active open %u)\n", + val("rcv_adv"), val("rcv_scale"), + val("rcv_adv") << val("rcv_scale"), + val("recv_scale"), val("rcv_scale"), val("active_open")); + } else { + PR(" rcv_adv %-5u (rcv_scale %-2u recv_scaleflag %u active_open %u)\n", + val("rcv_adv"), val("rcv_scale"), + val("recv_scale"), val("active_open")); + } + + PR(" snd_cwnd %-5u snd_ssthresh %u snd_rec %u\n", + val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec") + ); + + + + + PR(" cctrl: sel %s, ecn %u, ece %u, cwr %u, rfr %u\n", + spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")), + val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"), + val("cctrl_rfr")); + PR(" t_dupacks %u, dupack_count_odd %u, fast_recovery %u\n", + val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery")); + PR(" core_more %u, core_urg, %u core_push %u,", + val("core_more"),val("core_urg"),val("core_push")); + PR(" core_flush %u\n",val("core_flush")); + PR(" nagle %u, ssws_disable %u, turbo %u,", + val("nagle"), val("ssws_disabled"), val("turbo")); + PR(" tx_pdu_out %u\n",val("tx_pdu_out")); + PR(" tx_pace_auto %u, tx_pace_fixed %u, tx_queue %u", + val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue")); + + + PR(" tx_quiesce %u\n",val("tx_quiesce")); + PR(" channel %u, channel_msb %u\n", + val("channel"), + val("channel_msb") + ); + + + + + PR(" tx_hdr_ptr 0x%-6x tx_last_ptr 0x%-6x tx_compact %u\n", + val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact")); + + + + + PR("RECEIVE BUFFER:\n"); /* *************************** */ + PR(" last_ack_sent %-10u rx_compact %u\n", + val("ts_last_ack_sent"),val("rx_compact")); + PR(" rcv_nxt %-10u hdr_off %-10u\n", + val("rcv_nxt"), val("rx_hdr_offset")); + PR(" frag0_idx %-10u length %-10u frag0_ptr 0x%-8x\n", + val("rx_frag0_start_idx"), + val("rx_frag0_len"), + val("rx_ptr")); + PR(" frag1_idx %-10u length %-10u ", + val("rx_frag1_start_idx_offset"), + val("rx_frag1_len")); + + + + + if (val("ulp_type")!=4 && val("ulp_type")!=7) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */ + PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr")); + } else { + PR("\n"); + } + + + if (val("ulp_type") != 9 && val("ulp_type")!=8 && val("ulp_type") !=6 && + val("ulp_type") != 5 && val("ulp_type") !=4 && val("ulp_type") !=7) { + PR(" frag2_idx %-10u length %-10u frag2_ptr 0x%-8x\n", + val("rx_frag2_start_idx_offset"), + val("rx_frag2_len"), + val("rx_frag2_ptr")); + PR(" frag3_idx %-10u length %-10u frag3_ptr 0x%-8x\n", + val("rx_frag3_start_idx_offset"), + val("rx_frag3_len"), + val("rx_frag3_ptr")); + } + + + + + + + PR(" peer_fin %u, rx_pdu_out %u, pdu_len %u\n", + val("peer_fin"),val("rx_pdu_out"), val("pdu_len")); + + + + + if (val("recv_scale")) { + PR(" rcv_wnd %u >> snd_scale %u == %u, recv_scaleflag = %u\n", + val("rcv_wnd"), val("snd_scale"), + val("rcv_wnd") >> val("snd_scale"), + val("recv_scale")); + } else { + PR(" rcv_wnd %u. (snd_scale %u, recv_scaleflag = %u)\n", + val("rcv_wnd"), val("snd_scale"), + val("recv_scale")); + } + + + + + PR(" dack_mss %u dack %u, dack_not_acked: %u\n", + val("dack_mss"),val("dack"),val("dack_not_acked")); + PR(" rcv_coal %u rcv_co_psh %u rcv_co_last_psh %u heart %u\n", + val("rcv_coalesce_enable"), + val("rcv_coalesce_push"), + val("rcv_coalesce_last_psh"), + val("rcv_coalesce_heartbeat")); + + PR(" rx_quiesce %u rx_flow_ctrl_dis %u,", + val("rx_quiesce"), + val("rx_flow_control_disable")); + PR(" rx_flow_ctrl_ddp %u\n", + val("rx_flow_control_ddp")); + + + PR("MISCELANEOUS:\n"); /* *************************** */ + PR(" pend_ctl: 0x%1x, core_bypass: 0x%x, main_slush: 0x%x\n", + ((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) | + val("pend_ctl0")), + val("core_bypass"),val("main_slush")); + PR(" Migrating %u, ask_mode %u, non_offload %u, rss_info %u\n", + val("migrating"), + val("ask_mode"), val("non_offload"), val("rss_info")); + PR(" ULP: ulp_type %u (%s), ulp_raw %u", + val("ulp_type"), spr_ulp_type(val("ulp_type")), + val("ulp_raw")); + + + if (aux==1) { + PR(", ulp_ext %u",val("ulp_ext")); + } + PR("\n"); + + + + + PR(" RDMA: error %u, flm_err %u\n", + val("rdma_error"), val("rdma_flm_error")); + + +} +void t7_display_tcb_aux_1 (_TCBVAR *tvp, int aux) +{ + + + + PR(" aux1_slush0: 0x%x aux1_slush1 0x%x\n", + val("aux1_slush0"), val("aux1_slush1")); + PR(" pdu_hdr_len %u\n",val("pdu_hdr_len")); + + + +} +void t7_display_tcb_aux_2 (_TCBVAR *tvp, int aux) +{ + + + + + PR(" qp_id %u, pd_id %u, stag %u\n", + val("qp_id"), val("pd_id"),val("stag")); + PR(" irs_ulp %u, iss_ulp %u\n", + val("irs_ulp"),val("iss_ulp")); + PR(" tx_pdu_len %u\n", + val("tx_pdu_len")); + PR(" cq_idx_sq %u, cq_idx_rq %u\n", + val("cq_idx_sq"),val("cq_idx_rq")); + PR(" rq_start %u, rq_MSN %u, rq_max_off %u, rq_write_ptr %u\n", + val("rq_start"),val("rq_msn"),val("rq_max_offset"), + val("rq_write_ptr")); + PR(" L_valid %u, rdmap opcode %u\n", + val("ord_l_bit_vld"),val("rdmap_opcode")); + PR(" tx_flush: %u, tx_oos_rxmt %u, tx_oos_txmt %u\n", + val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt")); + + + + +} +void t7_display_tcb_aux_3 (_TCBVAR *tvp, int aux) +{ + + + + + + + PR(" aux3_slush: 0x%x, unused: buf0 0x%x, buf1: 0x%x\n", + val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused")); + + + PR(" ind_full: %u, tls_key_mode: %u\n", + val("ddp_indicate_fll"),val("tls_key_mode")); + + + PR(" DDP: DDPOFF ActBuf IndOut WaitFrag Rx2Tx BufInf\n"); + PR(" %u %u %u %u %u %u\n", + val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"), + val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf") + ); + + + PR(" Ind PshfEn PushDis Flush NoInvalidate\n"); + PR(" Buf0: %u %u %u %u %u\n", + val("ddp_buf0_indicate"), + val("ddp_pshf_enable_0"), val("ddp_push_disable_0"), + val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0") + ); + PR(" Buf1: %u %u %u %u %u\n", + val("ddp_buf1_indicate"), + val("ddp_pshf_enable_1"), val("ddp_push_disable_1"), + val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1") + ); + + + + + + + + + + + PR(" Valid Offset Length Tag\n"); + PR(" Buf0: %u 0x%6.6x 0x%6.6x 0x%8.8x", + val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"), + val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag") + + + ); + if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { + PR(" (Active)\n"); + } else { + PR(" (Inactive)\n"); + } + + + PR(" Buf1: %u 0x%6.6x 0x%6.6x 0x%8.8x", + val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"), + val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag") + + + ); + + + if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { + PR(" (Active)\n"); + } else { + PR(" (Inactive)\n"); + } + + + + + + + if (1==val("ddp_off")) { + PR(" DDP is off (which also disables indicate)\n"); + } else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { + PR(" Data being DDP'ed to buf 0, "); + PR("which has %u - %u = %u bytes of space left\n", + val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), + val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") + ); + if (1==val("ddp_buf1_valid")) { + PR(" And buf1, which is also valid, has %u - %u = %u bytes of space left\n", + val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), + val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") + ); + } + } else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { + PR(" Data being DDP'ed to buf 1, "); + PR("which has %u - %u = %u bytes of space left\n", + val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), + val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") + ); + if (1==val("ddp_buf0_valid")) { + PR(" And buf0, which is also valid, has %u - %u = %u bytes of space left\n", + val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), + val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") + ); + } + } else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) { + PR(" !!! Invalid DDP buf 1 valid, but buf 0 active.\n"); + } else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { + PR(" !!! Invalid DDP buf 0 valid, but buf 1 active.\n"); + } else { + PR(" DDP is enabled, but no buffers are active && valid.\n"); + + + + + if (0==val("ddp_indicate_out")) { + if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) { + PR(" 0 length Indicate buffers "); + if (0==val("rx_hdr_offset")) { + PR("will cause new data to be held in PMRX.\n"); + } else { + PR("is causing %u bytes to be held in PMRX\n", + val("rx_hdr_offset")); + } + } else { + PR(" Data being indicated to host\n"); + } + } else if (1==val("ddp_indicate_out")) { + PR(" Indicate is off, which "); + if (0==val("rx_hdr_offset")) { + PR("will cause new data to be held in PMRX.\n"); + } else { + PR("is causing %u bytes to be held in PMRX\n", + val("rx_hdr_offset")); + } + } + } + + + + +} +void t7_display_tcb_aux_4 (_TCBVAR *tvp, int aux) +{ + + + + PR("TLS: offset: 0x%6.6x, len:0x%6.6x, flags: 0x%4.4x\n", + val("rx_tls_buf_offset"),val("rx_tls_buf_len"), + val("rx_tls_flags")); + PR(" seq: 0x%llx \n",val64("rx_tls_seq")); + PR(" tag: 0x%8.8x, key:0x%8.8x\n", + val("rx_tls_buf_tag"),val("rx_tls_key_tag")); + + + + +} diff --git a/usr.sbin/devinfo/devinfo.8 b/usr.sbin/devinfo/devinfo.8 index f782b919056c..c34713d367ff 100644 --- a/usr.sbin/devinfo/devinfo.8 +++ b/usr.sbin/devinfo/devinfo.8 @@ -1,4 +1,5 @@ -.\" -*- nroff -*- +.\" +.\" SPDX-License-Identifer: BSD-2-Clause .\" .\" Copyright (c) 2002 Hiten Pandya .\" Copyright (c) 2002 Robert N. M. Watson @@ -25,7 +26,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.Dd January 29, 2025 +.Dd August 28, 2025 .Dt DEVINFO 8 .Os .Sh NAME @@ -33,11 +34,14 @@ .Nd print information about system device configuration .Sh SYNOPSIS .Nm +.Op Fl -libxo .Op Fl rv .Nm -.Fl u Op Fl v -.Nm +.Op Fl -libxo .Fl p Ar dev Op Fl v +.Nm +.Op Fl -libxo +.Fl u Op Fl v .Sh DESCRIPTION The .Nm @@ -46,11 +50,23 @@ in the system, starting from the .Dq nexus device. .Pp -The following options are accepted. -.Bl -tag -width indent +The following options are accepted: +.Bl -tag -width "--libxo" +.It Fl -libxo +Generate output via +.Xr libxo 3 +in a selection of different human and machine readable formats. +See +.Xr xo_options 7 +for details on command line arguments. +.It Fl p Ar dev +Display the path of +.Ar dev +back to the root of the device tree. .It Fl r -Causes hardware resource information (such as IRQ, I/O ports, I/O memory -addresses) to be also listed, under each device that has reserved those resources. +Causes hardware resource information +.Pq such as IRQ, I/O ports, I/O memory addresses +to be also listed, under each device that has reserved those resources. .It Fl u Displays the same information as with .Fl r @@ -63,19 +79,22 @@ Display all devices in the driver tree, not just those that are attached or busy. Without this flag, only those devices that have attached are reported. This flag also displays verbose information about each device. -.It Fl p Ar dev -Display the path of -.Ar dev -back to the root of the device tree. .El .Sh SEE ALSO .Xr systat 1 , .Xr devinfo 3 , +.Xr libxo 3 , +.Xr xo_options 7 , .Xr devctl 8 , .Xr iostat 8 , .Xr pciconf 8 , .Xr vmstat 8 , .Xr devclass 9 , .Xr device 9 +.Sh HISTORY +The +.Nm +utility appeared in +.Fx 5.0 . .Sh AUTHORS .An Mike Smith Aq Mt msmith@FreeBSD.org diff --git a/usr.sbin/freebsd-update/freebsd-update.sh b/usr.sbin/freebsd-update/freebsd-update.sh index 81040431ea79..143d93a6dcc0 100644 --- a/usr.sbin/freebsd-update/freebsd-update.sh +++ b/usr.sbin/freebsd-update/freebsd-update.sh @@ -512,14 +512,14 @@ parse_cmdline () { if [ $# -eq 1 ]; then usage; fi; shift config_KeyPrint $1 || usage ;; - -s) - if [ $# -eq 1 ]; then usage; fi; shift - config_ServerName $1 || usage - ;; -r) if [ $# -eq 1 ]; then usage; fi; shift config_TargetRelease $1 || usage ;; + -s) + if [ $# -eq 1 ]; then usage; fi; shift + config_ServerName $1 || usage + ;; -t) if [ $# -eq 1 ]; then usage; fi; shift config_MailTo $1 || usage @@ -3111,10 +3111,28 @@ Kernel updates have been installed. Please reboot and run grep -E '^/libexec/ld-elf[^|]*\.so\.[0-9]+\|' > INDEX-NEW install_from_index INDEX-NEW || return 1 - # Install new shared libraries next + # Next, in order, libsys, libc, and libthr. + grep -vE '^/boot/' $1/INDEX-NEW | + grep -vE '^[^|]+\|d\|' | + grep -vE '^/libexec/ld-elf[^|]*\.so\.[0-9]+\|' | + grep -E '^[^|]*/lib/libsys\.so\.[0-9]+\|' > INDEX-NEW + install_from_index INDEX-NEW || return 1 + grep -vE '^/boot/' $1/INDEX-NEW | + grep -vE '^[^|]+\|d\|' | + grep -vE '^/libexec/ld-elf[^|]*\.so\.[0-9]+\|' | + grep -E '^[^|]*/lib/libc\.so\.[0-9]+\|' > INDEX-NEW + install_from_index INDEX-NEW || return 1 + grep -vE '^/boot/' $1/INDEX-NEW | + grep -vE '^[^|]+\|d\|' | + grep -vE '^/libexec/ld-elf[^|]*\.so\.[0-9]+\|' | + grep -E '^[^|]*/lib/libthr\.so\.[0-9]+\|' > INDEX-NEW + install_from_index INDEX-NEW || return 1 + + # Install the rest of the shared libraries next grep -vE '^/boot/' $1/INDEX-NEW | grep -vE '^[^|]+\|d\|' | grep -vE '^/libexec/ld-elf[^|]*\.so\.[0-9]+\|' | + grep -vE '^[^|]*/lib/(libsys|libc|libthr)\.so\.[0-9]+\|' | grep -E '^[^|]*/lib/[^|]*\.so\.[0-9]+\|' > INDEX-NEW install_from_index INDEX-NEW || return 1 diff --git a/usr.sbin/fwget/pci/pci b/usr.sbin/fwget/pci/pci index fbdfa0001c5c..de8b7c8bb2b3 100644 --- a/usr.sbin/fwget/pci/pci +++ b/usr.sbin/fwget/pci/pci @@ -27,7 +27,7 @@ pci_get_class() { - local hexclass=$(echo $1 | sed 's/.*class=\(0x[0-9a-z]\{2\}\).*/\1/') + local hexclass=$(echo $1 | sed 's/.*class=\(0x[0-9a-f]\{2\}\).*/\1/') case "${hexclass}" in 0x00) echo "old" ;; # built before class codes were finalized 0x02) echo "network" ;; @@ -38,7 +38,7 @@ pci_get_class() pci_get_vendor() { - local hexvendor=$(echo $1 | sed 's/.*\ vendor=\(0x[0-9a-z]*\).*/\1/') + local hexvendor=$(echo $1 | sed 's/.*\ vendor=\(0x[0-9a-f]*\).*/\1/') case "${hexvendor}" in 0x1002) echo "amd" ;; @@ -52,7 +52,7 @@ pci_get_vendor() pci_get_device() { - local hexdevice=$(echo $1 | sed 's/.*\ device=\(0x[0-9a-z]*\).*/\1/') + local hexdevice=$(echo $1 | sed 's/.*\ device=\(0x[0-9a-f]*\).*/\1/') echo ${hexdevice} } diff --git a/usr.sbin/fwget/pci/pci_video_amd b/usr.sbin/fwget/pci/pci_video_amd index 5017789b9f28..7e50454d3944 100644 --- a/usr.sbin/fwget/pci/pci_video_amd +++ b/usr.sbin/fwget/pci/pci_video_amd @@ -48,7 +48,7 @@ pci_video_amd() 0x13*) addpkg "gpu-firmware-amd-kmod-kaveri" ;; - 0x664*|0x664*) + 0x664*|0x665*) addpkg "gpu-firmware-amd-kmod-bonaire" ;; 0x67a*|0x67b*) @@ -72,7 +72,7 @@ pci_video_amd() 0x987*) addpkg "gpu-firmware-amd-kmod-carrizo" ;; - 0x98e4*) + 0x98e4) addpkg "gpu-firmware-amd-kmod-stoney" ;; 0x67e*|0x67ff) @@ -111,7 +111,10 @@ pci_video_amd() 0x734*) addpkg "gpu-firmware-amd-kmod-navi14" ;; - 0x15e7|0x1636|0x1638|0x164c) + 0x15e7|0x1638) + addpkg "gpu-firmware-amd-kmod-renoir gpu-firmware-amd-kmod-green-sardine" + ;; + 0x1636|0x164c) addpkg "gpu-firmware-amd-kmod-renoir" ;; 0x736*) @@ -135,7 +138,7 @@ pci_video_amd() 0x740*|0x741*) addpkg "gpu-firmware-amd-kmod-aldebaran" ;; - 0x13fe) + 0x13fe|0x143f) addpkg "gpu-firmware-amd-kmod-cyan-skillfish2" ;; 0x742*|0x743*) diff --git a/usr.sbin/inetd/inetd.8 b/usr.sbin/inetd/inetd.8 index 86feb0ba466e..d2a4331bb79c 100644 --- a/usr.sbin/inetd/inetd.8 +++ b/usr.sbin/inetd/inetd.8 @@ -25,7 +25,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd September 29, 2022 +.Dd September 25, 2025 .Dt INETD 8 .Os .Sh NAME @@ -949,7 +949,7 @@ database. .Xr bootpd 8 , .Xr comsat 8 , .Xr fingerd 8 , -.Xr ftpd 8 , +.Xr ftpd 8 Pq Pa ports/ftp/freebsd-ftpd , .Xr imapd 8 Pq Pa ports/mail/courier-imap , .Xr nmbd 8 Pq Pa ports/net/samba412 , .Xr rlogind 8 , diff --git a/usr.sbin/inetd/inetd.conf b/usr.sbin/inetd/inetd.conf index a8359ea793f5..e25a77d3ca9c 100644 --- a/usr.sbin/inetd/inetd.conf +++ b/usr.sbin/inetd/inetd.conf @@ -5,8 +5,8 @@ # To disable a service, comment it out by prefixing the line with '#'. # To enable a service, remove the '#' at the beginning of the line. # -#ftp stream tcp nowait root /usr/libexec/ftpd ftpd -l -#ftp stream tcp6 nowait root /usr/libexec/ftpd ftpd -l +#ftp stream tcp nowait root /usr/local/libexec/ftpd ftpd -l +#ftp stream tcp6 nowait root /usr/local/libexec/ftpd ftpd -l #ssh stream tcp nowait root /usr/sbin/sshd sshd -i #ssh stream tcp6 nowait root /usr/sbin/sshd sshd -i #telnet stream tcp nowait root /usr/local/libexec/telnetd telnetd diff --git a/usr.sbin/jail/jail.8 b/usr.sbin/jail/jail.8 index 421aa9babb4c..d44b7f66a64e 100644 --- a/usr.sbin/jail/jail.8 +++ b/usr.sbin/jail/jail.8 @@ -23,7 +23,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd August 7, 2025 +.Dd September 15, 2025 .Dt JAIL 8 .Os .Sh NAME @@ -702,15 +702,15 @@ The super-user will be disabled automatically if its parent system has it disabled. The super-user is enabled by default. .It Va allow.extattr -Allow privileged process in the jail to manipulate filesystem extended +Allow privileged processes in the jail to manipulate filesystem extended attributes in the system namespace. .It Va allow.adjtime -Allow privileged process in the jail to slowly adjusting global operating system +Allow privileged processes in the jail to slowly adjusting global operating system time. For example through utilities like .Xr ntpd 8 . .It Va allow.settime -Allow privileged process in the jail to set global operating system data +Allow privileged processes in the jail to set global operating system data and time. For example through utilities like .Xr date 1 . @@ -719,6 +719,17 @@ This permission includes also .It Va allow.routing Allow privileged process in the non-VNET jail to modify the system routing table. +.It Va allow.setaudit +Allow privileged processes in the jail to set +.Xr audit 4 +session state using +.Xr setaudit 2 +and related system calls. +This is useful, for example, for allowing a jailed +.Xr sshd 8 +to set the audit user ID for an authenticated session. +However, it gives jailed processes the ability to modify or disable audit +session state, so should be configured with care. .El .El .Pp diff --git a/usr.sbin/jail/tests/jail_basic_test.sh b/usr.sbin/jail/tests/jail_basic_test.sh index 6802da7b049a..c781eed78756 100755 --- a/usr.sbin/jail/tests/jail_basic_test.sh +++ b/usr.sbin/jail/tests/jail_basic_test.sh @@ -306,6 +306,25 @@ param_consistency_cleanup() fi } +atf_test_case "setaudit" +setaudit_head() +{ + atf_set descr 'Test that setaudit works in a jail when configured with allow.setaudit' + atf_set require.user root + atf_set require.progs setaudit +} + +setaudit_body() +{ + # Try to modify the audit mask within a jail without + # allow.setaudit configured. + atf_check -s not-exit:0 -o empty -e not-empty jail -c name=setaudit_jail \ + command=setaudit -m fr ls / + # The command should succeed if allow.setaudit is configured. + atf_check -s exit:0 -o ignore -e empty jail -c name=setaudit_jail \ + allow.setaudit command=setaudit -m fr ls / +} + atf_init_test_cases() { atf_add_test_case "basic" @@ -314,4 +333,5 @@ atf_init_test_cases() atf_add_test_case "commands" atf_add_test_case "jid_name_set" atf_add_test_case "param_consistency" + atf_add_test_case "setaudit" } diff --git a/usr.sbin/makefs/ffs.c b/usr.sbin/makefs/ffs.c index c0fcadf11fba..ed94abb7504f 100644 --- a/usr.sbin/makefs/ffs.c +++ b/usr.sbin/makefs/ffs.c @@ -591,6 +591,75 @@ ffs_create_image(const char *image, fsinfo_t *fsopts) return (fsopts->fd); } +static void +ffs_add_size(fsinfo_t *fsopts, size_t file_len) +{ + ffs_opt_t *ffs_opts = fsopts->fs_specific; + size_t blocks, fs_nindir, overhead; + int indir_level; + + blocks = howmany(file_len, ffs_opts->bsize); + + if (blocks <= UFS_NDADDR) { + /* Count full blocks. */ + fsopts->size += rounddown2(file_len, ffs_opts->bsize); + /* Calculate fragment size needed. */ + overhead = howmany(file_len - + rounddown2(file_len, ffs_opts->bsize), ffs_opts->fsize); + + /* + * A file could have just 1 fragment with size 1/8, 1/4 or 1/2 + * of bsize. + */ + switch (overhead) { + case 0: + break; + case 1: + fsopts->size += ffs_opts->fsize; + break; + case 2: + fsopts->size += 2 * ffs_opts->fsize; + break; + case 3: + case 4: + fsopts->size += 4 * ffs_opts->fsize; + break; + default: + fsopts->size += ffs_opts->bsize; + break; + } + return; + } + + /* File does not fit into direct blocks, count indirect blocks. */ + blocks = howmany(file_len - UFS_NDADDR * (size_t)ffs_opts->bsize, + ffs_opts->bsize); + fs_nindir = (size_t)ffs_opts->bsize / ((ffs_opts->version == 1) ? + sizeof(ufs1_daddr_t) : sizeof(ufs2_daddr_t)); + + indir_level = overhead = 0; + while (blocks > 0 && indir_level < 3) { + /* One indirect block is stored in di_ib[] */ + blocks = howmany(blocks, fs_nindir) - 1; + fsopts->size += ffs_opts->bsize * blocks; + overhead += blocks + 1; + indir_level++; + } + + assert(blocks == 0); + + if ((debug & DEBUG_FS_SIZE_DIR_NODE) != 0) { + printf("ffs_size_dir: size %jd, using %d levels of indirect " + "blocks, overhead %jd blocks\n", (uintmax_t)file_len, + indir_level, (uintmax_t)overhead); + } + + /* + * If the file is big enough to use indirect blocks, + * we allocate bsize block for trailing data. + */ + fsopts->size += roundup2(file_len, ffs_opts->bsize); +} static void ffs_size_dir(fsnode *root, fsinfo_t *fsopts) @@ -622,20 +691,6 @@ ffs_size_dir(fsnode *root, fsinfo_t *fsopts) e, tmpdir.d_namlen, this, curdirsize); \ } while (0); -#define ADDSIZE(x) do { \ - if ((size_t)(x) < UFS_NDADDR * (size_t)ffs_opts->bsize) { \ - fsopts->size += roundup((x), ffs_opts->fsize); \ - } else { \ - /* Count space consumed by indirecttion blocks. */ \ - fsopts->size += ffs_opts->bsize * \ - (howmany((x), UFS_NDADDR * ffs_opts->bsize) - 1); \ - /* \ - * If the file is big enough to use indirect blocks, \ - * we allocate bsize block for trailing data. \ - */ \ - fsopts->size += roundup((x), ffs_opts->bsize); \ - } \ -} while (0); curdirsize = 0; for (node = root; node != NULL; node = node->next) { @@ -646,13 +701,13 @@ ffs_size_dir(fsnode *root, fsinfo_t *fsopts) } else if ((node->inode->flags & FI_SIZED) == 0) { /* don't count duplicate names */ node->inode->flags |= FI_SIZED; - if (debug & DEBUG_FS_SIZE_DIR_NODE) + if ((debug & DEBUG_FS_SIZE_DIR_NODE) != 0) printf("ffs_size_dir: `%s' size %lld\n", node->name, (long long)node->inode->st.st_size); fsopts->inodes++; if (node->type == S_IFREG) - ADDSIZE(node->inode->st.st_size); + ffs_add_size(fsopts, node->inode->st.st_size); if (node->type == S_IFLNK) { size_t slen; @@ -660,13 +715,16 @@ ffs_size_dir(fsnode *root, fsinfo_t *fsopts) if (slen >= (ffs_opts->version == 1 ? UFS1_MAXSYMLINKLEN : UFS2_MAXSYMLINKLEN)) - ADDSIZE(slen); + ffs_add_size(fsopts, slen); } } if (node->type == S_IFDIR) ffs_size_dir(node->child, fsopts); } - ADDSIZE(curdirsize); + ffs_add_size(fsopts, curdirsize); + + /* Round up to full block to account fragment scattering. */ + fsopts->size = roundup2(fsopts->size, ffs_opts->bsize); if (debug & DEBUG_FS_SIZE_DIR) printf("ffs_size_dir: exit: size %lld inodes %lld\n", diff --git a/usr.sbin/mixer/mixer.c b/usr.sbin/mixer/mixer.c index 70a35f71b25f..15e0eae69952 100644 --- a/usr.sbin/mixer/mixer.c +++ b/usr.sbin/mixer/mixer.c @@ -393,7 +393,7 @@ set_dunit(struct mixer *m, int dunit, char *vctl) warn("fork"); break; case 0: - rc = execl("/usr/local/sbin/virtual_oss_cmd", + rc = execl("/usr/sbin/virtual_oss_cmd", "virtual_oss_cmd", dev, opt, buf, NULL); if (rc < 0) warn("virtual_oss_cmd"); diff --git a/usr.sbin/moused/Makefile b/usr.sbin/moused/Makefile index 2a7aa0484542..b6319b6fef20 100644 --- a/usr.sbin/moused/Makefile +++ b/usr.sbin/moused/Makefile @@ -1,10 +1,4 @@ -PACKAGE= console-tools -PROG= moused -MAN= moused.8 +SUBDIR+=moused +SUBDIR+=msconvd -LIBADD= m util - -#BINMODE=4555 -#PRECIOUSPROG= - -.include <bsd.prog.mk> +.include <bsd.subdir.mk> diff --git a/usr.sbin/moused/Makefile.depend b/usr.sbin/moused/Makefile.depend deleted file mode 100644 index af3b7054df7a..000000000000 --- a/usr.sbin/moused/Makefile.depend +++ /dev/null @@ -1,17 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - include \ - include/xlocale \ - lib/${CSU_DIR} \ - lib/libc \ - lib/libcompiler_rt \ - lib/libutil \ - lib/msun \ - - -.include <dirdeps.mk> - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/usr.sbin/moused/moused/Makefile b/usr.sbin/moused/moused/Makefile new file mode 100644 index 000000000000..8479764b710b --- /dev/null +++ b/usr.sbin/moused/moused/Makefile @@ -0,0 +1,28 @@ +PACKAGE= console-tools +PROG= moused + +SRCS= moused.c \ + event-names.h \ + quirks.c \ + quirks.h \ + util.c \ + util.h \ + util-evdev.c \ + util-evdev.h \ + util-list.c \ + util-list.h +MAN= moused.8 \ + moused.conf.5 +CONFS= moused.conf +QUIRKS= 5-generic-touchpad.quirks + +CWARNFLAGS.quirks.c+= -Wno-cast-align -Wno-shadow -Wno-cast-qual \ + -Wno-unused-variable -Wno-unused-parameter +CWARNFLAGS.util.c+= -Wno-shadow +LIBADD= m util +BINDIR= /usr/sbin + +FILES= ${QUIRKS:S|^|quirks/|} +FILESDIR= /usr/share/${PROG} + +.include <bsd.prog.mk> diff --git a/usr.sbin/moused/moused/event-names.h b/usr.sbin/moused/moused/event-names.h new file mode 100644 index 000000000000..05093a1d0db3 --- /dev/null +++ b/usr.sbin/moused/moused/event-names.h @@ -0,0 +1,1656 @@ +/* THIS FILE IS GENERATED, DO NOT EDIT */ + +#ifndef EVENT_NAMES_H +#define EVENT_NAMES_H + +static const char * const ev_map[EV_MAX + 1] = { + [EV_SYN] = "EV_SYN", + [EV_KEY] = "EV_KEY", + [EV_REL] = "EV_REL", + [EV_ABS] = "EV_ABS", + [EV_MSC] = "EV_MSC", + [EV_SW] = "EV_SW", + [EV_LED] = "EV_LED", + [EV_SND] = "EV_SND", + [EV_REP] = "EV_REP", + [EV_FF] = "EV_FF", + [EV_PWR] = "EV_PWR", + [EV_FF_STATUS] = "EV_FF_STATUS", + [EV_MAX] = "EV_MAX", +}; + +static const char * const rel_map[REL_MAX + 1] = { + [REL_X] = "REL_X", + [REL_Y] = "REL_Y", + [REL_Z] = "REL_Z", + [REL_RX] = "REL_RX", + [REL_RY] = "REL_RY", + [REL_RZ] = "REL_RZ", + [REL_HWHEEL] = "REL_HWHEEL", + [REL_DIAL] = "REL_DIAL", + [REL_WHEEL] = "REL_WHEEL", + [REL_MISC] = "REL_MISC", + [REL_RESERVED] = "REL_RESERVED", + [REL_WHEEL_HI_RES] = "REL_WHEEL_HI_RES", + [REL_HWHEEL_HI_RES] = "REL_HWHEEL_HI_RES", + [REL_MAX] = "REL_MAX", +}; + +static const char * const abs_map[ABS_MAX + 1] = { + [ABS_X] = "ABS_X", + [ABS_Y] = "ABS_Y", + [ABS_Z] = "ABS_Z", + [ABS_RX] = "ABS_RX", + [ABS_RY] = "ABS_RY", + [ABS_RZ] = "ABS_RZ", + [ABS_THROTTLE] = "ABS_THROTTLE", + [ABS_RUDDER] = "ABS_RUDDER", + [ABS_WHEEL] = "ABS_WHEEL", + [ABS_GAS] = "ABS_GAS", + [ABS_BRAKE] = "ABS_BRAKE", + [ABS_HAT0X] = "ABS_HAT0X", + [ABS_HAT0Y] = "ABS_HAT0Y", + [ABS_HAT1X] = "ABS_HAT1X", + [ABS_HAT1Y] = "ABS_HAT1Y", + [ABS_HAT2X] = "ABS_HAT2X", + [ABS_HAT2Y] = "ABS_HAT2Y", + [ABS_HAT3X] = "ABS_HAT3X", + [ABS_HAT3Y] = "ABS_HAT3Y", + [ABS_PRESSURE] = "ABS_PRESSURE", + [ABS_DISTANCE] = "ABS_DISTANCE", + [ABS_TILT_X] = "ABS_TILT_X", + [ABS_TILT_Y] = "ABS_TILT_Y", + [ABS_TOOL_WIDTH] = "ABS_TOOL_WIDTH", + [ABS_VOLUME] = "ABS_VOLUME", + // [ABS_PROFILE] = "ABS_PROFILE", + [ABS_MISC] = "ABS_MISC", + [ABS_RESERVED] = "ABS_RESERVED", + [ABS_MT_SLOT] = "ABS_MT_SLOT", + [ABS_MT_TOUCH_MAJOR] = "ABS_MT_TOUCH_MAJOR", + [ABS_MT_TOUCH_MINOR] = "ABS_MT_TOUCH_MINOR", + [ABS_MT_WIDTH_MAJOR] = "ABS_MT_WIDTH_MAJOR", + [ABS_MT_WIDTH_MINOR] = "ABS_MT_WIDTH_MINOR", + [ABS_MT_ORIENTATION] = "ABS_MT_ORIENTATION", + [ABS_MT_POSITION_X] = "ABS_MT_POSITION_X", + [ABS_MT_POSITION_Y] = "ABS_MT_POSITION_Y", + [ABS_MT_TOOL_TYPE] = "ABS_MT_TOOL_TYPE", + [ABS_MT_BLOB_ID] = "ABS_MT_BLOB_ID", + [ABS_MT_TRACKING_ID] = "ABS_MT_TRACKING_ID", + [ABS_MT_PRESSURE] = "ABS_MT_PRESSURE", + [ABS_MT_DISTANCE] = "ABS_MT_DISTANCE", + [ABS_MT_TOOL_X] = "ABS_MT_TOOL_X", + [ABS_MT_TOOL_Y] = "ABS_MT_TOOL_Y", + [ABS_MAX] = "ABS_MAX", +}; + +static const char * const key_map[KEY_MAX + 1] = { + [KEY_RESERVED] = "KEY_RESERVED", + [KEY_ESC] = "KEY_ESC", + [KEY_1] = "KEY_1", + [KEY_2] = "KEY_2", + [KEY_3] = "KEY_3", + [KEY_4] = "KEY_4", + [KEY_5] = "KEY_5", + [KEY_6] = "KEY_6", + [KEY_7] = "KEY_7", + [KEY_8] = "KEY_8", + [KEY_9] = "KEY_9", + [KEY_0] = "KEY_0", + [KEY_MINUS] = "KEY_MINUS", + [KEY_EQUAL] = "KEY_EQUAL", + [KEY_BACKSPACE] = "KEY_BACKSPACE", + [KEY_TAB] = "KEY_TAB", + [KEY_Q] = "KEY_Q", + [KEY_W] = "KEY_W", + [KEY_E] = "KEY_E", + [KEY_R] = "KEY_R", + [KEY_T] = "KEY_T", + [KEY_Y] = "KEY_Y", + [KEY_U] = "KEY_U", + [KEY_I] = "KEY_I", + [KEY_O] = "KEY_O", + [KEY_P] = "KEY_P", + [KEY_LEFTBRACE] = "KEY_LEFTBRACE", + [KEY_RIGHTBRACE] = "KEY_RIGHTBRACE", + [KEY_ENTER] = "KEY_ENTER", + [KEY_LEFTCTRL] = "KEY_LEFTCTRL", + [KEY_A] = "KEY_A", + [KEY_S] = "KEY_S", + [KEY_D] = "KEY_D", + [KEY_F] = "KEY_F", + [KEY_G] = "KEY_G", + [KEY_H] = "KEY_H", + [KEY_J] = "KEY_J", + [KEY_K] = "KEY_K", + [KEY_L] = "KEY_L", + [KEY_SEMICOLON] = "KEY_SEMICOLON", + [KEY_APOSTROPHE] = "KEY_APOSTROPHE", + [KEY_GRAVE] = "KEY_GRAVE", + [KEY_LEFTSHIFT] = "KEY_LEFTSHIFT", + [KEY_BACKSLASH] = "KEY_BACKSLASH", + [KEY_Z] = "KEY_Z", + [KEY_X] = "KEY_X", + [KEY_C] = "KEY_C", + [KEY_V] = "KEY_V", + [KEY_B] = "KEY_B", + [KEY_N] = "KEY_N", + [KEY_M] = "KEY_M", + [KEY_COMMA] = "KEY_COMMA", + [KEY_DOT] = "KEY_DOT", + [KEY_SLASH] = "KEY_SLASH", + [KEY_RIGHTSHIFT] = "KEY_RIGHTSHIFT", + [KEY_KPASTERISK] = "KEY_KPASTERISK", + [KEY_LEFTALT] = "KEY_LEFTALT", + [KEY_SPACE] = "KEY_SPACE", + [KEY_CAPSLOCK] = "KEY_CAPSLOCK", + [KEY_F1] = "KEY_F1", + [KEY_F2] = "KEY_F2", + [KEY_F3] = "KEY_F3", + [KEY_F4] = "KEY_F4", + [KEY_F5] = "KEY_F5", + [KEY_F6] = "KEY_F6", + [KEY_F7] = "KEY_F7", + [KEY_F8] = "KEY_F8", + [KEY_F9] = "KEY_F9", + [KEY_F10] = "KEY_F10", + [KEY_NUMLOCK] = "KEY_NUMLOCK", + [KEY_SCROLLLOCK] = "KEY_SCROLLLOCK", + [KEY_KP7] = "KEY_KP7", + [KEY_KP8] = "KEY_KP8", + [KEY_KP9] = "KEY_KP9", + [KEY_KPMINUS] = "KEY_KPMINUS", + [KEY_KP4] = "KEY_KP4", + [KEY_KP5] = "KEY_KP5", + [KEY_KP6] = "KEY_KP6", + [KEY_KPPLUS] = "KEY_KPPLUS", + [KEY_KP1] = "KEY_KP1", + [KEY_KP2] = "KEY_KP2", + [KEY_KP3] = "KEY_KP3", + [KEY_KP0] = "KEY_KP0", + [KEY_KPDOT] = "KEY_KPDOT", + [KEY_ZENKAKUHANKAKU] = "KEY_ZENKAKUHANKAKU", + [KEY_102ND] = "KEY_102ND", + [KEY_F11] = "KEY_F11", + [KEY_F12] = "KEY_F12", + [KEY_RO] = "KEY_RO", + [KEY_KATAKANA] = "KEY_KATAKANA", + [KEY_HIRAGANA] = "KEY_HIRAGANA", + [KEY_HENKAN] = "KEY_HENKAN", + [KEY_KATAKANAHIRAGANA] = "KEY_KATAKANAHIRAGANA", + [KEY_MUHENKAN] = "KEY_MUHENKAN", + [KEY_KPJPCOMMA] = "KEY_KPJPCOMMA", + [KEY_KPENTER] = "KEY_KPENTER", + [KEY_RIGHTCTRL] = "KEY_RIGHTCTRL", + [KEY_KPSLASH] = "KEY_KPSLASH", + [KEY_SYSRQ] = "KEY_SYSRQ", + [KEY_RIGHTALT] = "KEY_RIGHTALT", + [KEY_LINEFEED] = "KEY_LINEFEED", + [KEY_HOME] = "KEY_HOME", + [KEY_UP] = "KEY_UP", + [KEY_PAGEUP] = "KEY_PAGEUP", + [KEY_LEFT] = "KEY_LEFT", + [KEY_RIGHT] = "KEY_RIGHT", + [KEY_END] = "KEY_END", + [KEY_DOWN] = "KEY_DOWN", + [KEY_PAGEDOWN] = "KEY_PAGEDOWN", + [KEY_INSERT] = "KEY_INSERT", + [KEY_DELETE] = "KEY_DELETE", + [KEY_MACRO] = "KEY_MACRO", + [KEY_MUTE] = "KEY_MUTE", + [KEY_VOLUMEDOWN] = "KEY_VOLUMEDOWN", + [KEY_VOLUMEUP] = "KEY_VOLUMEUP", + [KEY_POWER] = "KEY_POWER", + [KEY_KPEQUAL] = "KEY_KPEQUAL", + [KEY_KPPLUSMINUS] = "KEY_KPPLUSMINUS", + [KEY_PAUSE] = "KEY_PAUSE", + [KEY_SCALE] = "KEY_SCALE", + [KEY_KPCOMMA] = "KEY_KPCOMMA", + [KEY_HANGEUL] = "KEY_HANGEUL", + [KEY_HANJA] = "KEY_HANJA", + [KEY_YEN] = "KEY_YEN", + [KEY_LEFTMETA] = "KEY_LEFTMETA", + [KEY_RIGHTMETA] = "KEY_RIGHTMETA", + [KEY_COMPOSE] = "KEY_COMPOSE", + [KEY_STOP] = "KEY_STOP", + [KEY_AGAIN] = "KEY_AGAIN", + [KEY_PROPS] = "KEY_PROPS", + [KEY_UNDO] = "KEY_UNDO", + [KEY_FRONT] = "KEY_FRONT", + [KEY_COPY] = "KEY_COPY", + [KEY_OPEN] = "KEY_OPEN", + [KEY_PASTE] = "KEY_PASTE", + [KEY_FIND] = "KEY_FIND", + [KEY_CUT] = "KEY_CUT", + [KEY_HELP] = "KEY_HELP", + [KEY_MENU] = "KEY_MENU", + [KEY_CALC] = "KEY_CALC", + [KEY_SETUP] = "KEY_SETUP", + [KEY_SLEEP] = "KEY_SLEEP", + [KEY_WAKEUP] = "KEY_WAKEUP", + [KEY_FILE] = "KEY_FILE", + [KEY_SENDFILE] = "KEY_SENDFILE", + [KEY_DELETEFILE] = "KEY_DELETEFILE", + [KEY_XFER] = "KEY_XFER", + [KEY_PROG1] = "KEY_PROG1", + [KEY_PROG2] = "KEY_PROG2", + [KEY_WWW] = "KEY_WWW", + [KEY_MSDOS] = "KEY_MSDOS", + [KEY_COFFEE] = "KEY_COFFEE", + [KEY_ROTATE_DISPLAY] = "KEY_ROTATE_DISPLAY", + [KEY_CYCLEWINDOWS] = "KEY_CYCLEWINDOWS", + [KEY_MAIL] = "KEY_MAIL", + [KEY_BOOKMARKS] = "KEY_BOOKMARKS", + [KEY_COMPUTER] = "KEY_COMPUTER", + [KEY_BACK] = "KEY_BACK", + [KEY_FORWARD] = "KEY_FORWARD", + [KEY_CLOSECD] = "KEY_CLOSECD", + [KEY_EJECTCD] = "KEY_EJECTCD", + [KEY_EJECTCLOSECD] = "KEY_EJECTCLOSECD", + [KEY_NEXTSONG] = "KEY_NEXTSONG", + [KEY_PLAYPAUSE] = "KEY_PLAYPAUSE", + [KEY_PREVIOUSSONG] = "KEY_PREVIOUSSONG", + [KEY_STOPCD] = "KEY_STOPCD", + [KEY_RECORD] = "KEY_RECORD", + [KEY_REWIND] = "KEY_REWIND", + [KEY_PHONE] = "KEY_PHONE", + [KEY_ISO] = "KEY_ISO", + [KEY_CONFIG] = "KEY_CONFIG", + [KEY_HOMEPAGE] = "KEY_HOMEPAGE", + [KEY_REFRESH] = "KEY_REFRESH", + [KEY_EXIT] = "KEY_EXIT", + [KEY_MOVE] = "KEY_MOVE", + [KEY_EDIT] = "KEY_EDIT", + [KEY_SCROLLUP] = "KEY_SCROLLUP", + [KEY_SCROLLDOWN] = "KEY_SCROLLDOWN", + [KEY_KPLEFTPAREN] = "KEY_KPLEFTPAREN", + [KEY_KPRIGHTPAREN] = "KEY_KPRIGHTPAREN", + [KEY_NEW] = "KEY_NEW", + [KEY_REDO] = "KEY_REDO", + [KEY_F13] = "KEY_F13", + [KEY_F14] = "KEY_F14", + [KEY_F15] = "KEY_F15", + [KEY_F16] = "KEY_F16", + [KEY_F17] = "KEY_F17", + [KEY_F18] = "KEY_F18", + [KEY_F19] = "KEY_F19", + [KEY_F20] = "KEY_F20", + [KEY_F21] = "KEY_F21", + [KEY_F22] = "KEY_F22", + [KEY_F23] = "KEY_F23", + [KEY_F24] = "KEY_F24", + [KEY_PLAYCD] = "KEY_PLAYCD", + [KEY_PAUSECD] = "KEY_PAUSECD", + [KEY_PROG3] = "KEY_PROG3", + [KEY_PROG4] = "KEY_PROG4", + // [KEY_ALL_APPLICATIONS] = "KEY_ALL_APPLICATIONS", + [KEY_SUSPEND] = "KEY_SUSPEND", + [KEY_CLOSE] = "KEY_CLOSE", + [KEY_PLAY] = "KEY_PLAY", + [KEY_FASTFORWARD] = "KEY_FASTFORWARD", + [KEY_BASSBOOST] = "KEY_BASSBOOST", + [KEY_PRINT] = "KEY_PRINT", + [KEY_HP] = "KEY_HP", + [KEY_CAMERA] = "KEY_CAMERA", + [KEY_SOUND] = "KEY_SOUND", + [KEY_QUESTION] = "KEY_QUESTION", + [KEY_EMAIL] = "KEY_EMAIL", + [KEY_CHAT] = "KEY_CHAT", + [KEY_SEARCH] = "KEY_SEARCH", + [KEY_CONNECT] = "KEY_CONNECT", + [KEY_FINANCE] = "KEY_FINANCE", + [KEY_SPORT] = "KEY_SPORT", + [KEY_SHOP] = "KEY_SHOP", + [KEY_ALTERASE] = "KEY_ALTERASE", + [KEY_CANCEL] = "KEY_CANCEL", + [KEY_BRIGHTNESSDOWN] = "KEY_BRIGHTNESSDOWN", + [KEY_BRIGHTNESSUP] = "KEY_BRIGHTNESSUP", + [KEY_MEDIA] = "KEY_MEDIA", + [KEY_SWITCHVIDEOMODE] = "KEY_SWITCHVIDEOMODE", + [KEY_KBDILLUMTOGGLE] = "KEY_KBDILLUMTOGGLE", + [KEY_KBDILLUMDOWN] = "KEY_KBDILLUMDOWN", + [KEY_KBDILLUMUP] = "KEY_KBDILLUMUP", + [KEY_SEND] = "KEY_SEND", + [KEY_REPLY] = "KEY_REPLY", + [KEY_FORWARDMAIL] = "KEY_FORWARDMAIL", + [KEY_SAVE] = "KEY_SAVE", + [KEY_DOCUMENTS] = "KEY_DOCUMENTS", + [KEY_BATTERY] = "KEY_BATTERY", + [KEY_BLUETOOTH] = "KEY_BLUETOOTH", + [KEY_WLAN] = "KEY_WLAN", + [KEY_UWB] = "KEY_UWB", + [KEY_UNKNOWN] = "KEY_UNKNOWN", + [KEY_VIDEO_NEXT] = "KEY_VIDEO_NEXT", + [KEY_VIDEO_PREV] = "KEY_VIDEO_PREV", + [KEY_BRIGHTNESS_CYCLE] = "KEY_BRIGHTNESS_CYCLE", + [KEY_BRIGHTNESS_AUTO] = "KEY_BRIGHTNESS_AUTO", + [KEY_DISPLAY_OFF] = "KEY_DISPLAY_OFF", + [KEY_WWAN] = "KEY_WWAN", + [KEY_RFKILL] = "KEY_RFKILL", + [KEY_MICMUTE] = "KEY_MICMUTE", + [KEY_OK] = "KEY_OK", + [KEY_SELECT] = "KEY_SELECT", + [KEY_GOTO] = "KEY_GOTO", + [KEY_CLEAR] = "KEY_CLEAR", + [KEY_POWER2] = "KEY_POWER2", + [KEY_OPTION] = "KEY_OPTION", + [KEY_INFO] = "KEY_INFO", + [KEY_TIME] = "KEY_TIME", + [KEY_VENDOR] = "KEY_VENDOR", + [KEY_ARCHIVE] = "KEY_ARCHIVE", + [KEY_PROGRAM] = "KEY_PROGRAM", + [KEY_CHANNEL] = "KEY_CHANNEL", + [KEY_FAVORITES] = "KEY_FAVORITES", + [KEY_EPG] = "KEY_EPG", + [KEY_PVR] = "KEY_PVR", + [KEY_MHP] = "KEY_MHP", + [KEY_LANGUAGE] = "KEY_LANGUAGE", + [KEY_TITLE] = "KEY_TITLE", + [KEY_SUBTITLE] = "KEY_SUBTITLE", + [KEY_ANGLE] = "KEY_ANGLE", + [KEY_FULL_SCREEN] = "KEY_FULL_SCREEN", + [KEY_MODE] = "KEY_MODE", + [KEY_KEYBOARD] = "KEY_KEYBOARD", + [KEY_ASPECT_RATIO] = "KEY_ASPECT_RATIO", + [KEY_PC] = "KEY_PC", + [KEY_TV] = "KEY_TV", + [KEY_TV2] = "KEY_TV2", + [KEY_VCR] = "KEY_VCR", + [KEY_VCR2] = "KEY_VCR2", + [KEY_SAT] = "KEY_SAT", + [KEY_SAT2] = "KEY_SAT2", + [KEY_CD] = "KEY_CD", + [KEY_TAPE] = "KEY_TAPE", + [KEY_RADIO] = "KEY_RADIO", + [KEY_TUNER] = "KEY_TUNER", + [KEY_PLAYER] = "KEY_PLAYER", + [KEY_TEXT] = "KEY_TEXT", + [KEY_DVD] = "KEY_DVD", + [KEY_AUX] = "KEY_AUX", + [KEY_MP3] = "KEY_MP3", + [KEY_AUDIO] = "KEY_AUDIO", + [KEY_VIDEO] = "KEY_VIDEO", + [KEY_DIRECTORY] = "KEY_DIRECTORY", + [KEY_LIST] = "KEY_LIST", + [KEY_MEMO] = "KEY_MEMO", + [KEY_CALENDAR] = "KEY_CALENDAR", + [KEY_RED] = "KEY_RED", + [KEY_GREEN] = "KEY_GREEN", + [KEY_YELLOW] = "KEY_YELLOW", + [KEY_BLUE] = "KEY_BLUE", + [KEY_CHANNELUP] = "KEY_CHANNELUP", + [KEY_CHANNELDOWN] = "KEY_CHANNELDOWN", + [KEY_FIRST] = "KEY_FIRST", + [KEY_LAST] = "KEY_LAST", + [KEY_AB] = "KEY_AB", + [KEY_NEXT] = "KEY_NEXT", + [KEY_RESTART] = "KEY_RESTART", + [KEY_SLOW] = "KEY_SLOW", + [KEY_SHUFFLE] = "KEY_SHUFFLE", + [KEY_BREAK] = "KEY_BREAK", + [KEY_PREVIOUS] = "KEY_PREVIOUS", + [KEY_DIGITS] = "KEY_DIGITS", + [KEY_TEEN] = "KEY_TEEN", + [KEY_TWEN] = "KEY_TWEN", + [KEY_VIDEOPHONE] = "KEY_VIDEOPHONE", + [KEY_GAMES] = "KEY_GAMES", + [KEY_ZOOMIN] = "KEY_ZOOMIN", + [KEY_ZOOMOUT] = "KEY_ZOOMOUT", + [KEY_ZOOMRESET] = "KEY_ZOOMRESET", + [KEY_WORDPROCESSOR] = "KEY_WORDPROCESSOR", + [KEY_EDITOR] = "KEY_EDITOR", + [KEY_SPREADSHEET] = "KEY_SPREADSHEET", + [KEY_GRAPHICSEDITOR] = "KEY_GRAPHICSEDITOR", + [KEY_PRESENTATION] = "KEY_PRESENTATION", + [KEY_DATABASE] = "KEY_DATABASE", + [KEY_NEWS] = "KEY_NEWS", + [KEY_VOICEMAIL] = "KEY_VOICEMAIL", + [KEY_ADDRESSBOOK] = "KEY_ADDRESSBOOK", + [KEY_MESSENGER] = "KEY_MESSENGER", + [KEY_DISPLAYTOGGLE] = "KEY_DISPLAYTOGGLE", + [KEY_SPELLCHECK] = "KEY_SPELLCHECK", + [KEY_LOGOFF] = "KEY_LOGOFF", + [KEY_DOLLAR] = "KEY_DOLLAR", + [KEY_EURO] = "KEY_EURO", + [KEY_FRAMEBACK] = "KEY_FRAMEBACK", + [KEY_FRAMEFORWARD] = "KEY_FRAMEFORWARD", + [KEY_CONTEXT_MENU] = "KEY_CONTEXT_MENU", + [KEY_MEDIA_REPEAT] = "KEY_MEDIA_REPEAT", + [KEY_10CHANNELSUP] = "KEY_10CHANNELSUP", + [KEY_10CHANNELSDOWN] = "KEY_10CHANNELSDOWN", + [KEY_IMAGES] = "KEY_IMAGES", + // [KEY_NOTIFICATION_CENTER] = "KEY_NOTIFICATION_CENTER", + // [KEY_PICKUP_PHONE] = "KEY_PICKUP_PHONE", + // [KEY_HANGUP_PHONE] = "KEY_HANGUP_PHONE", + [KEY_DEL_EOL] = "KEY_DEL_EOL", + [KEY_DEL_EOS] = "KEY_DEL_EOS", + [KEY_INS_LINE] = "KEY_INS_LINE", + [KEY_DEL_LINE] = "KEY_DEL_LINE", + [KEY_FN] = "KEY_FN", + [KEY_FN_ESC] = "KEY_FN_ESC", + [KEY_FN_F1] = "KEY_FN_F1", + [KEY_FN_F2] = "KEY_FN_F2", + [KEY_FN_F3] = "KEY_FN_F3", + [KEY_FN_F4] = "KEY_FN_F4", + [KEY_FN_F5] = "KEY_FN_F5", + [KEY_FN_F6] = "KEY_FN_F6", + [KEY_FN_F7] = "KEY_FN_F7", + [KEY_FN_F8] = "KEY_FN_F8", + [KEY_FN_F9] = "KEY_FN_F9", + [KEY_FN_F10] = "KEY_FN_F10", + [KEY_FN_F11] = "KEY_FN_F11", + [KEY_FN_F12] = "KEY_FN_F12", + [KEY_FN_1] = "KEY_FN_1", + [KEY_FN_2] = "KEY_FN_2", + [KEY_FN_D] = "KEY_FN_D", + [KEY_FN_E] = "KEY_FN_E", + [KEY_FN_F] = "KEY_FN_F", + [KEY_FN_S] = "KEY_FN_S", + [KEY_FN_B] = "KEY_FN_B", + // [KEY_FN_RIGHT_SHIFT] = "KEY_FN_RIGHT_SHIFT", + [KEY_BRL_DOT1] = "KEY_BRL_DOT1", + [KEY_BRL_DOT2] = "KEY_BRL_DOT2", + [KEY_BRL_DOT3] = "KEY_BRL_DOT3", + [KEY_BRL_DOT4] = "KEY_BRL_DOT4", + [KEY_BRL_DOT5] = "KEY_BRL_DOT5", + [KEY_BRL_DOT6] = "KEY_BRL_DOT6", + [KEY_BRL_DOT7] = "KEY_BRL_DOT7", + [KEY_BRL_DOT8] = "KEY_BRL_DOT8", + [KEY_BRL_DOT9] = "KEY_BRL_DOT9", + [KEY_BRL_DOT10] = "KEY_BRL_DOT10", + [KEY_NUMERIC_0] = "KEY_NUMERIC_0", + [KEY_NUMERIC_1] = "KEY_NUMERIC_1", + [KEY_NUMERIC_2] = "KEY_NUMERIC_2", + [KEY_NUMERIC_3] = "KEY_NUMERIC_3", + [KEY_NUMERIC_4] = "KEY_NUMERIC_4", + [KEY_NUMERIC_5] = "KEY_NUMERIC_5", + [KEY_NUMERIC_6] = "KEY_NUMERIC_6", + [KEY_NUMERIC_7] = "KEY_NUMERIC_7", + [KEY_NUMERIC_8] = "KEY_NUMERIC_8", + [KEY_NUMERIC_9] = "KEY_NUMERIC_9", + [KEY_NUMERIC_STAR] = "KEY_NUMERIC_STAR", + [KEY_NUMERIC_POUND] = "KEY_NUMERIC_POUND", + [KEY_NUMERIC_A] = "KEY_NUMERIC_A", + [KEY_NUMERIC_B] = "KEY_NUMERIC_B", + [KEY_NUMERIC_C] = "KEY_NUMERIC_C", + [KEY_NUMERIC_D] = "KEY_NUMERIC_D", + [KEY_CAMERA_FOCUS] = "KEY_CAMERA_FOCUS", + [KEY_WPS_BUTTON] = "KEY_WPS_BUTTON", + [KEY_TOUCHPAD_TOGGLE] = "KEY_TOUCHPAD_TOGGLE", + [KEY_TOUCHPAD_ON] = "KEY_TOUCHPAD_ON", + [KEY_TOUCHPAD_OFF] = "KEY_TOUCHPAD_OFF", + [KEY_CAMERA_ZOOMIN] = "KEY_CAMERA_ZOOMIN", + [KEY_CAMERA_ZOOMOUT] = "KEY_CAMERA_ZOOMOUT", + [KEY_CAMERA_UP] = "KEY_CAMERA_UP", + [KEY_CAMERA_DOWN] = "KEY_CAMERA_DOWN", + [KEY_CAMERA_LEFT] = "KEY_CAMERA_LEFT", + [KEY_CAMERA_RIGHT] = "KEY_CAMERA_RIGHT", + [KEY_ATTENDANT_ON] = "KEY_ATTENDANT_ON", + [KEY_ATTENDANT_OFF] = "KEY_ATTENDANT_OFF", + [KEY_ATTENDANT_TOGGLE] = "KEY_ATTENDANT_TOGGLE", + [KEY_LIGHTS_TOGGLE] = "KEY_LIGHTS_TOGGLE", + [KEY_ALS_TOGGLE] = "KEY_ALS_TOGGLE", + [KEY_ROTATE_LOCK_TOGGLE] = "KEY_ROTATE_LOCK_TOGGLE", + [KEY_BUTTONCONFIG] = "KEY_BUTTONCONFIG", + [KEY_TASKMANAGER] = "KEY_TASKMANAGER", + [KEY_JOURNAL] = "KEY_JOURNAL", + [KEY_CONTROLPANEL] = "KEY_CONTROLPANEL", + [KEY_APPSELECT] = "KEY_APPSELECT", + [KEY_SCREENSAVER] = "KEY_SCREENSAVER", + [KEY_VOICECOMMAND] = "KEY_VOICECOMMAND", + [KEY_ASSISTANT] = "KEY_ASSISTANT", + [KEY_KBD_LAYOUT_NEXT] = "KEY_KBD_LAYOUT_NEXT", + // [KEY_EMOJI_PICKER] = "KEY_EMOJI_PICKER", + //[KEY_DICTATE] = "KEY_DICTATE", + //[KEY_CAMERA_ACCESS_ENABLE] = "KEY_CAMERA_ACCESS_ENABLE", + //[KEY_CAMERA_ACCESS_DISABLE] = "KEY_CAMERA_ACCESS_DISABLE", + //[KEY_CAMERA_ACCESS_TOGGLE] = "KEY_CAMERA_ACCESS_TOGGLE", + [KEY_BRIGHTNESS_MIN] = "KEY_BRIGHTNESS_MIN", + [KEY_BRIGHTNESS_MAX] = "KEY_BRIGHTNESS_MAX", + [KEY_KBDINPUTASSIST_PREV] = "KEY_KBDINPUTASSIST_PREV", + [KEY_KBDINPUTASSIST_NEXT] = "KEY_KBDINPUTASSIST_NEXT", + [KEY_KBDINPUTASSIST_PREVGROUP] = "KEY_KBDINPUTASSIST_PREVGROUP", + [KEY_KBDINPUTASSIST_NEXTGROUP] = "KEY_KBDINPUTASSIST_NEXTGROUP", + [KEY_KBDINPUTASSIST_ACCEPT] = "KEY_KBDINPUTASSIST_ACCEPT", + [KEY_KBDINPUTASSIST_CANCEL] = "KEY_KBDINPUTASSIST_CANCEL", + [KEY_RIGHT_UP] = "KEY_RIGHT_UP", + [KEY_RIGHT_DOWN] = "KEY_RIGHT_DOWN", + [KEY_LEFT_UP] = "KEY_LEFT_UP", + [KEY_LEFT_DOWN] = "KEY_LEFT_DOWN", + [KEY_ROOT_MENU] = "KEY_ROOT_MENU", + [KEY_MEDIA_TOP_MENU] = "KEY_MEDIA_TOP_MENU", + [KEY_NUMERIC_11] = "KEY_NUMERIC_11", + [KEY_NUMERIC_12] = "KEY_NUMERIC_12", + [KEY_AUDIO_DESC] = "KEY_AUDIO_DESC", + [KEY_3D_MODE] = "KEY_3D_MODE", + [KEY_NEXT_FAVORITE] = "KEY_NEXT_FAVORITE", + [KEY_STOP_RECORD] = "KEY_STOP_RECORD", + [KEY_PAUSE_RECORD] = "KEY_PAUSE_RECORD", + [KEY_VOD] = "KEY_VOD", + [KEY_UNMUTE] = "KEY_UNMUTE", + [KEY_FASTREVERSE] = "KEY_FASTREVERSE", + [KEY_SLOWREVERSE] = "KEY_SLOWREVERSE", + [KEY_DATA] = "KEY_DATA", + [KEY_ONSCREEN_KEYBOARD] = "KEY_ONSCREEN_KEYBOARD", + [KEY_PRIVACY_SCREEN_TOGGLE] = "KEY_PRIVACY_SCREEN_TOGGLE", + [KEY_SELECTIVE_SCREENSHOT] = "KEY_SELECTIVE_SCREENSHOT", + // [KEY_NEXT_ELEMENT] = "KEY_NEXT_ELEMENT", + // [KEY_PREVIOUS_ELEMENT] = "KEY_PREVIOUS_ELEMENT", + // [KEY_AUTOPILOT_ENGAGE_TOGGLE] = "KEY_AUTOPILOT_ENGAGE_TOGGLE", + // [KEY_MARK_WAYPOINT] = "KEY_MARK_WAYPOINT", + // [KEY_SOS] = "KEY_SOS", + // [KEY_NAV_CHART] = "KEY_NAV_CHART", + // [KEY_FISHING_CHART] = "KEY_FISHING_CHART", + // [KEY_SINGLE_RANGE_RADAR] = "KEY_SINGLE_RANGE_RADAR", + // [KEY_DUAL_RANGE_RADAR] = "KEY_DUAL_RANGE_RADAR", + // [KEY_RADAR_OVERLAY] = "KEY_RADAR_OVERLAY", + // [KEY_TRADITIONAL_SONAR] = "KEY_TRADITIONAL_SONAR", + // [KEY_CLEARVU_SONAR] = "KEY_CLEARVU_SONAR", + // [KEY_SIDEVU_SONAR] = "KEY_SIDEVU_SONAR", + // [KEY_NAV_INFO] = "KEY_NAV_INFO", + // [KEY_BRIGHTNESS_MENU] = "KEY_BRIGHTNESS_MENU", + [KEY_MACRO1] = "KEY_MACRO1", + [KEY_MACRO2] = "KEY_MACRO2", + [KEY_MACRO3] = "KEY_MACRO3", + [KEY_MACRO4] = "KEY_MACRO4", + [KEY_MACRO5] = "KEY_MACRO5", + [KEY_MACRO6] = "KEY_MACRO6", + [KEY_MACRO7] = "KEY_MACRO7", + [KEY_MACRO8] = "KEY_MACRO8", + [KEY_MACRO9] = "KEY_MACRO9", + [KEY_MACRO10] = "KEY_MACRO10", + [KEY_MACRO11] = "KEY_MACRO11", + [KEY_MACRO12] = "KEY_MACRO12", + [KEY_MACRO13] = "KEY_MACRO13", + [KEY_MACRO14] = "KEY_MACRO14", + [KEY_MACRO15] = "KEY_MACRO15", + [KEY_MACRO16] = "KEY_MACRO16", + [KEY_MACRO17] = "KEY_MACRO17", + [KEY_MACRO18] = "KEY_MACRO18", + [KEY_MACRO19] = "KEY_MACRO19", + [KEY_MACRO20] = "KEY_MACRO20", + [KEY_MACRO21] = "KEY_MACRO21", + [KEY_MACRO22] = "KEY_MACRO22", + [KEY_MACRO23] = "KEY_MACRO23", + [KEY_MACRO24] = "KEY_MACRO24", + [KEY_MACRO25] = "KEY_MACRO25", + [KEY_MACRO26] = "KEY_MACRO26", + [KEY_MACRO27] = "KEY_MACRO27", + [KEY_MACRO28] = "KEY_MACRO28", + [KEY_MACRO29] = "KEY_MACRO29", + [KEY_MACRO30] = "KEY_MACRO30", + [KEY_MACRO_RECORD_START] = "KEY_MACRO_RECORD_START", + [KEY_MACRO_RECORD_STOP] = "KEY_MACRO_RECORD_STOP", + [KEY_MACRO_PRESET_CYCLE] = "KEY_MACRO_PRESET_CYCLE", + [KEY_MACRO_PRESET1] = "KEY_MACRO_PRESET1", + [KEY_MACRO_PRESET2] = "KEY_MACRO_PRESET2", + [KEY_MACRO_PRESET3] = "KEY_MACRO_PRESET3", + [KEY_KBD_LCD_MENU1] = "KEY_KBD_LCD_MENU1", + [KEY_KBD_LCD_MENU2] = "KEY_KBD_LCD_MENU2", + [KEY_KBD_LCD_MENU3] = "KEY_KBD_LCD_MENU3", + [KEY_KBD_LCD_MENU4] = "KEY_KBD_LCD_MENU4", + [KEY_KBD_LCD_MENU5] = "KEY_KBD_LCD_MENU5", + [KEY_MAX] = "KEY_MAX", + [BTN_0] = "BTN_0", + [BTN_1] = "BTN_1", + [BTN_2] = "BTN_2", + [BTN_3] = "BTN_3", + [BTN_4] = "BTN_4", + [BTN_5] = "BTN_5", + [BTN_6] = "BTN_6", + [BTN_7] = "BTN_7", + [BTN_8] = "BTN_8", + [BTN_9] = "BTN_9", + [BTN_LEFT] = "BTN_LEFT", + [BTN_RIGHT] = "BTN_RIGHT", + [BTN_MIDDLE] = "BTN_MIDDLE", + [BTN_SIDE] = "BTN_SIDE", + [BTN_EXTRA] = "BTN_EXTRA", + [BTN_FORWARD] = "BTN_FORWARD", + [BTN_BACK] = "BTN_BACK", + [BTN_TASK] = "BTN_TASK", + [BTN_TRIGGER] = "BTN_TRIGGER", + [BTN_THUMB] = "BTN_THUMB", + [BTN_THUMB2] = "BTN_THUMB2", + [BTN_TOP] = "BTN_TOP", + [BTN_TOP2] = "BTN_TOP2", + [BTN_PINKIE] = "BTN_PINKIE", + [BTN_BASE] = "BTN_BASE", + [BTN_BASE2] = "BTN_BASE2", + [BTN_BASE3] = "BTN_BASE3", + [BTN_BASE4] = "BTN_BASE4", + [BTN_BASE5] = "BTN_BASE5", + [BTN_BASE6] = "BTN_BASE6", + [BTN_DEAD] = "BTN_DEAD", + [BTN_SOUTH] = "BTN_SOUTH", + [BTN_EAST] = "BTN_EAST", + [BTN_C] = "BTN_C", + [BTN_NORTH] = "BTN_NORTH", + [BTN_WEST] = "BTN_WEST", + [BTN_Z] = "BTN_Z", + [BTN_TL] = "BTN_TL", + [BTN_TR] = "BTN_TR", + [BTN_TL2] = "BTN_TL2", + [BTN_TR2] = "BTN_TR2", + [BTN_SELECT] = "BTN_SELECT", + [BTN_START] = "BTN_START", + [BTN_MODE] = "BTN_MODE", + [BTN_THUMBL] = "BTN_THUMBL", + [BTN_THUMBR] = "BTN_THUMBR", + [BTN_TOOL_PEN] = "BTN_TOOL_PEN", + [BTN_TOOL_RUBBER] = "BTN_TOOL_RUBBER", + [BTN_TOOL_BRUSH] = "BTN_TOOL_BRUSH", + [BTN_TOOL_PENCIL] = "BTN_TOOL_PENCIL", + [BTN_TOOL_AIRBRUSH] = "BTN_TOOL_AIRBRUSH", + [BTN_TOOL_FINGER] = "BTN_TOOL_FINGER", + [BTN_TOOL_MOUSE] = "BTN_TOOL_MOUSE", + [BTN_TOOL_LENS] = "BTN_TOOL_LENS", + [BTN_TOOL_QUINTTAP] = "BTN_TOOL_QUINTTAP", + [BTN_STYLUS3] = "BTN_STYLUS3", + [BTN_TOUCH] = "BTN_TOUCH", + [BTN_STYLUS] = "BTN_STYLUS", + [BTN_STYLUS2] = "BTN_STYLUS2", + [BTN_TOOL_DOUBLETAP] = "BTN_TOOL_DOUBLETAP", + [BTN_TOOL_TRIPLETAP] = "BTN_TOOL_TRIPLETAP", + [BTN_TOOL_QUADTAP] = "BTN_TOOL_QUADTAP", + [BTN_GEAR_DOWN] = "BTN_GEAR_DOWN", + [BTN_GEAR_UP] = "BTN_GEAR_UP", + [BTN_DPAD_UP] = "BTN_DPAD_UP", + [BTN_DPAD_DOWN] = "BTN_DPAD_DOWN", + [BTN_DPAD_LEFT] = "BTN_DPAD_LEFT", + [BTN_DPAD_RIGHT] = "BTN_DPAD_RIGHT", + [BTN_TRIGGER_HAPPY1] = "BTN_TRIGGER_HAPPY1", + [BTN_TRIGGER_HAPPY2] = "BTN_TRIGGER_HAPPY2", + [BTN_TRIGGER_HAPPY3] = "BTN_TRIGGER_HAPPY3", + [BTN_TRIGGER_HAPPY4] = "BTN_TRIGGER_HAPPY4", + [BTN_TRIGGER_HAPPY5] = "BTN_TRIGGER_HAPPY5", + [BTN_TRIGGER_HAPPY6] = "BTN_TRIGGER_HAPPY6", + [BTN_TRIGGER_HAPPY7] = "BTN_TRIGGER_HAPPY7", + [BTN_TRIGGER_HAPPY8] = "BTN_TRIGGER_HAPPY8", + [BTN_TRIGGER_HAPPY9] = "BTN_TRIGGER_HAPPY9", + [BTN_TRIGGER_HAPPY10] = "BTN_TRIGGER_HAPPY10", + [BTN_TRIGGER_HAPPY11] = "BTN_TRIGGER_HAPPY11", + [BTN_TRIGGER_HAPPY12] = "BTN_TRIGGER_HAPPY12", + [BTN_TRIGGER_HAPPY13] = "BTN_TRIGGER_HAPPY13", + [BTN_TRIGGER_HAPPY14] = "BTN_TRIGGER_HAPPY14", + [BTN_TRIGGER_HAPPY15] = "BTN_TRIGGER_HAPPY15", + [BTN_TRIGGER_HAPPY16] = "BTN_TRIGGER_HAPPY16", + [BTN_TRIGGER_HAPPY17] = "BTN_TRIGGER_HAPPY17", + [BTN_TRIGGER_HAPPY18] = "BTN_TRIGGER_HAPPY18", + [BTN_TRIGGER_HAPPY19] = "BTN_TRIGGER_HAPPY19", + [BTN_TRIGGER_HAPPY20] = "BTN_TRIGGER_HAPPY20", + [BTN_TRIGGER_HAPPY21] = "BTN_TRIGGER_HAPPY21", + [BTN_TRIGGER_HAPPY22] = "BTN_TRIGGER_HAPPY22", + [BTN_TRIGGER_HAPPY23] = "BTN_TRIGGER_HAPPY23", + [BTN_TRIGGER_HAPPY24] = "BTN_TRIGGER_HAPPY24", + [BTN_TRIGGER_HAPPY25] = "BTN_TRIGGER_HAPPY25", + [BTN_TRIGGER_HAPPY26] = "BTN_TRIGGER_HAPPY26", + [BTN_TRIGGER_HAPPY27] = "BTN_TRIGGER_HAPPY27", + [BTN_TRIGGER_HAPPY28] = "BTN_TRIGGER_HAPPY28", + [BTN_TRIGGER_HAPPY29] = "BTN_TRIGGER_HAPPY29", + [BTN_TRIGGER_HAPPY30] = "BTN_TRIGGER_HAPPY30", + [BTN_TRIGGER_HAPPY31] = "BTN_TRIGGER_HAPPY31", + [BTN_TRIGGER_HAPPY32] = "BTN_TRIGGER_HAPPY32", + [BTN_TRIGGER_HAPPY33] = "BTN_TRIGGER_HAPPY33", + [BTN_TRIGGER_HAPPY34] = "BTN_TRIGGER_HAPPY34", + [BTN_TRIGGER_HAPPY35] = "BTN_TRIGGER_HAPPY35", + [BTN_TRIGGER_HAPPY36] = "BTN_TRIGGER_HAPPY36", + [BTN_TRIGGER_HAPPY37] = "BTN_TRIGGER_HAPPY37", + [BTN_TRIGGER_HAPPY38] = "BTN_TRIGGER_HAPPY38", + [BTN_TRIGGER_HAPPY39] = "BTN_TRIGGER_HAPPY39", + [BTN_TRIGGER_HAPPY40] = "BTN_TRIGGER_HAPPY40", +}; + +static const char * const led_map[LED_MAX + 1] = { + [LED_NUML] = "LED_NUML", + [LED_CAPSL] = "LED_CAPSL", + [LED_SCROLLL] = "LED_SCROLLL", + [LED_COMPOSE] = "LED_COMPOSE", + [LED_KANA] = "LED_KANA", + [LED_SLEEP] = "LED_SLEEP", + [LED_SUSPEND] = "LED_SUSPEND", + [LED_MUTE] = "LED_MUTE", + [LED_MISC] = "LED_MISC", + [LED_MAIL] = "LED_MAIL", + [LED_CHARGING] = "LED_CHARGING", + [LED_MAX] = "LED_MAX", +}; + +static const char * const snd_map[SND_MAX + 1] = { + [SND_CLICK] = "SND_CLICK", + [SND_BELL] = "SND_BELL", + [SND_TONE] = "SND_TONE", + [SND_MAX] = "SND_MAX", +}; + +static const char * const msc_map[MSC_MAX + 1] = { + [MSC_SERIAL] = "MSC_SERIAL", + [MSC_PULSELED] = "MSC_PULSELED", + [MSC_GESTURE] = "MSC_GESTURE", + [MSC_RAW] = "MSC_RAW", + [MSC_SCAN] = "MSC_SCAN", + [MSC_TIMESTAMP] = "MSC_TIMESTAMP", + [MSC_MAX] = "MSC_MAX", +}; + +static const char * const sw_map[SW_MAX + 1] = { + [SW_LID] = "SW_LID", + [SW_TABLET_MODE] = "SW_TABLET_MODE", + [SW_HEADPHONE_INSERT] = "SW_HEADPHONE_INSERT", + [SW_RFKILL_ALL] = "SW_RFKILL_ALL", + [SW_MICROPHONE_INSERT] = "SW_MICROPHONE_INSERT", + [SW_DOCK] = "SW_DOCK", + [SW_LINEOUT_INSERT] = "SW_LINEOUT_INSERT", + [SW_JACK_PHYSICAL_INSERT] = "SW_JACK_PHYSICAL_INSERT", + [SW_VIDEOOUT_INSERT] = "SW_VIDEOOUT_INSERT", + [SW_CAMERA_LENS_COVER] = "SW_CAMERA_LENS_COVER", + [SW_KEYPAD_SLIDE] = "SW_KEYPAD_SLIDE", + [SW_FRONT_PROXIMITY] = "SW_FRONT_PROXIMITY", + [SW_ROTATE_LOCK] = "SW_ROTATE_LOCK", + [SW_LINEIN_INSERT] = "SW_LINEIN_INSERT", + [SW_MUTE_DEVICE] = "SW_MUTE_DEVICE", + [SW_PEN_INSERTED] = "SW_PEN_INSERTED", + [SW_MACHINE_COVER] = "SW_MACHINE_COVER", +}; + +static const char * const ff_map[FF_MAX + 1] = { + [FF_STATUS_STOPPED] = "FF_STATUS_STOPPED", + [FF_STATUS_MAX] = "FF_STATUS_MAX", + [FF_RUMBLE] = "FF_RUMBLE", + [FF_PERIODIC] = "FF_PERIODIC", + [FF_CONSTANT] = "FF_CONSTANT", + [FF_SPRING] = "FF_SPRING", + [FF_FRICTION] = "FF_FRICTION", + [FF_DAMPER] = "FF_DAMPER", + [FF_INERTIA] = "FF_INERTIA", + [FF_RAMP] = "FF_RAMP", + [FF_SQUARE] = "FF_SQUARE", + [FF_TRIANGLE] = "FF_TRIANGLE", + [FF_SINE] = "FF_SINE", + [FF_SAW_UP] = "FF_SAW_UP", + [FF_SAW_DOWN] = "FF_SAW_DOWN", + [FF_CUSTOM] = "FF_CUSTOM", + [FF_GAIN] = "FF_GAIN", + [FF_AUTOCENTER] = "FF_AUTOCENTER", + [FF_MAX] = "FF_MAX", +}; + +static const char * const syn_map[SYN_MAX + 1] = { + [SYN_REPORT] = "SYN_REPORT", + [SYN_CONFIG] = "SYN_CONFIG", + [SYN_MT_REPORT] = "SYN_MT_REPORT", + [SYN_DROPPED] = "SYN_DROPPED", + [SYN_MAX] = "SYN_MAX", +}; + +static const char * const rep_map[REP_MAX + 1] = { + [REP_DELAY] = "REP_DELAY", + [REP_PERIOD] = "REP_PERIOD", +}; + +static const char * const input_prop_map[INPUT_PROP_MAX + 1] = { + [INPUT_PROP_POINTER] = "INPUT_PROP_POINTER", + [INPUT_PROP_DIRECT] = "INPUT_PROP_DIRECT", + [INPUT_PROP_BUTTONPAD] = "INPUT_PROP_BUTTONPAD", + [INPUT_PROP_SEMI_MT] = "INPUT_PROP_SEMI_MT", + [INPUT_PROP_TOPBUTTONPAD] = "INPUT_PROP_TOPBUTTONPAD", + [INPUT_PROP_POINTING_STICK] = "INPUT_PROP_POINTING_STICK", + [INPUT_PROP_ACCELEROMETER] = "INPUT_PROP_ACCELEROMETER", + [INPUT_PROP_MAX] = "INPUT_PROP_MAX", +}; + +static const char * const mt_tool_map[MT_TOOL_MAX + 1] = { + [MT_TOOL_FINGER] = "MT_TOOL_FINGER", + [MT_TOOL_PEN] = "MT_TOOL_PEN", + [MT_TOOL_PALM] = "MT_TOOL_PALM", + [MT_TOOL_DIAL] = "MT_TOOL_DIAL", + [MT_TOOL_MAX] = "MT_TOOL_MAX", +}; + +static const char * const * const event_type_map[EV_MAX + 1] = { + [EV_REL] = rel_map, + [EV_ABS] = abs_map, + [EV_KEY] = key_map, + [EV_LED] = led_map, + [EV_SND] = snd_map, + [EV_MSC] = msc_map, + [EV_SW] = sw_map, + [EV_FF] = ff_map, + [EV_SYN] = syn_map, + [EV_REP] = rep_map, +}; + +#if __clang__ +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Winitializer-overrides" +#elif __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Woverride-init" +#endif +static const int ev_max[EV_MAX + 1] = { + SYN_MAX, + KEY_MAX, + REL_MAX, + ABS_MAX, + MSC_MAX, + SW_MAX, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + LED_MAX, + SND_MAX, + -1, + REP_MAX, + FF_MAX, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, +}; +#if __clang__ +#pragma clang diagnostic pop /* "-Winitializer-overrides" */ +#elif __GNUC__ +#pragma GCC diagnostic pop /* "-Woverride-init" */ +#endif + +struct name_entry { + const char *name; + unsigned int value; +}; + +static const struct name_entry tool_type_names[] = { + { .name = "MT_TOOL_DIAL", .value = MT_TOOL_DIAL }, + { .name = "MT_TOOL_FINGER", .value = MT_TOOL_FINGER }, + { .name = "MT_TOOL_MAX", .value = MT_TOOL_MAX }, + { .name = "MT_TOOL_PALM", .value = MT_TOOL_PALM }, + { .name = "MT_TOOL_PEN", .value = MT_TOOL_PEN }, +}; + +static const struct name_entry ev_names[] = { + { .name = "EV_ABS", .value = EV_ABS }, + { .name = "EV_FF", .value = EV_FF }, + { .name = "EV_FF_STATUS", .value = EV_FF_STATUS }, + { .name = "EV_KEY", .value = EV_KEY }, + { .name = "EV_LED", .value = EV_LED }, + { .name = "EV_MAX", .value = EV_MAX }, + { .name = "EV_MSC", .value = EV_MSC }, + { .name = "EV_PWR", .value = EV_PWR }, + { .name = "EV_REL", .value = EV_REL }, + { .name = "EV_REP", .value = EV_REP }, + { .name = "EV_SND", .value = EV_SND }, + { .name = "EV_SW", .value = EV_SW }, + { .name = "EV_SYN", .value = EV_SYN }, +}; + +static const struct name_entry code_names[] = { + { .name = "ABS_BRAKE", .value = ABS_BRAKE }, + { .name = "ABS_DISTANCE", .value = ABS_DISTANCE }, + { .name = "ABS_GAS", .value = ABS_GAS }, + { .name = "ABS_HAT0X", .value = ABS_HAT0X }, + { .name = "ABS_HAT0Y", .value = ABS_HAT0Y }, + { .name = "ABS_HAT1X", .value = ABS_HAT1X }, + { .name = "ABS_HAT1Y", .value = ABS_HAT1Y }, + { .name = "ABS_HAT2X", .value = ABS_HAT2X }, + { .name = "ABS_HAT2Y", .value = ABS_HAT2Y }, + { .name = "ABS_HAT3X", .value = ABS_HAT3X }, + { .name = "ABS_HAT3Y", .value = ABS_HAT3Y }, + { .name = "ABS_MAX", .value = ABS_MAX }, + { .name = "ABS_MISC", .value = ABS_MISC }, + { .name = "ABS_MT_BLOB_ID", .value = ABS_MT_BLOB_ID }, + { .name = "ABS_MT_DISTANCE", .value = ABS_MT_DISTANCE }, + { .name = "ABS_MT_ORIENTATION", .value = ABS_MT_ORIENTATION }, + { .name = "ABS_MT_POSITION_X", .value = ABS_MT_POSITION_X }, + { .name = "ABS_MT_POSITION_Y", .value = ABS_MT_POSITION_Y }, + { .name = "ABS_MT_PRESSURE", .value = ABS_MT_PRESSURE }, + { .name = "ABS_MT_SLOT", .value = ABS_MT_SLOT }, + { .name = "ABS_MT_TOOL_TYPE", .value = ABS_MT_TOOL_TYPE }, + { .name = "ABS_MT_TOOL_X", .value = ABS_MT_TOOL_X }, + { .name = "ABS_MT_TOOL_Y", .value = ABS_MT_TOOL_Y }, + { .name = "ABS_MT_TOUCH_MAJOR", .value = ABS_MT_TOUCH_MAJOR }, + { .name = "ABS_MT_TOUCH_MINOR", .value = ABS_MT_TOUCH_MINOR }, + { .name = "ABS_MT_TRACKING_ID", .value = ABS_MT_TRACKING_ID }, + { .name = "ABS_MT_WIDTH_MAJOR", .value = ABS_MT_WIDTH_MAJOR }, + { .name = "ABS_MT_WIDTH_MINOR", .value = ABS_MT_WIDTH_MINOR }, + { .name = "ABS_PRESSURE", .value = ABS_PRESSURE }, + // { .name = "ABS_PROFILE", .value = ABS_PROFILE }, + { .name = "ABS_RESERVED", .value = ABS_RESERVED }, + { .name = "ABS_RUDDER", .value = ABS_RUDDER }, + { .name = "ABS_RX", .value = ABS_RX }, + { .name = "ABS_RY", .value = ABS_RY }, + { .name = "ABS_RZ", .value = ABS_RZ }, + { .name = "ABS_THROTTLE", .value = ABS_THROTTLE }, + { .name = "ABS_TILT_X", .value = ABS_TILT_X }, + { .name = "ABS_TILT_Y", .value = ABS_TILT_Y }, + { .name = "ABS_TOOL_WIDTH", .value = ABS_TOOL_WIDTH }, + { .name = "ABS_VOLUME", .value = ABS_VOLUME }, + { .name = "ABS_WHEEL", .value = ABS_WHEEL }, + { .name = "ABS_X", .value = ABS_X }, + { .name = "ABS_Y", .value = ABS_Y }, + { .name = "ABS_Z", .value = ABS_Z }, + { .name = "BTN_0", .value = BTN_0 }, + { .name = "BTN_1", .value = BTN_1 }, + { .name = "BTN_2", .value = BTN_2 }, + { .name = "BTN_3", .value = BTN_3 }, + { .name = "BTN_4", .value = BTN_4 }, + { .name = "BTN_5", .value = BTN_5 }, + { .name = "BTN_6", .value = BTN_6 }, + { .name = "BTN_7", .value = BTN_7 }, + { .name = "BTN_8", .value = BTN_8 }, + { .name = "BTN_9", .value = BTN_9 }, + { .name = "BTN_A", .value = BTN_A }, + { .name = "BTN_B", .value = BTN_B }, + { .name = "BTN_BACK", .value = BTN_BACK }, + { .name = "BTN_BASE", .value = BTN_BASE }, + { .name = "BTN_BASE2", .value = BTN_BASE2 }, + { .name = "BTN_BASE3", .value = BTN_BASE3 }, + { .name = "BTN_BASE4", .value = BTN_BASE4 }, + { .name = "BTN_BASE5", .value = BTN_BASE5 }, + { .name = "BTN_BASE6", .value = BTN_BASE6 }, + { .name = "BTN_C", .value = BTN_C }, + { .name = "BTN_DEAD", .value = BTN_DEAD }, + { .name = "BTN_DPAD_DOWN", .value = BTN_DPAD_DOWN }, + { .name = "BTN_DPAD_LEFT", .value = BTN_DPAD_LEFT }, + { .name = "BTN_DPAD_RIGHT", .value = BTN_DPAD_RIGHT }, + { .name = "BTN_DPAD_UP", .value = BTN_DPAD_UP }, + { .name = "BTN_EAST", .value = BTN_EAST }, + { .name = "BTN_EXTRA", .value = BTN_EXTRA }, + { .name = "BTN_FORWARD", .value = BTN_FORWARD }, + { .name = "BTN_GEAR_DOWN", .value = BTN_GEAR_DOWN }, + { .name = "BTN_GEAR_UP", .value = BTN_GEAR_UP }, + { .name = "BTN_LEFT", .value = BTN_LEFT }, + { .name = "BTN_MIDDLE", .value = BTN_MIDDLE }, + { .name = "BTN_MODE", .value = BTN_MODE }, + { .name = "BTN_NORTH", .value = BTN_NORTH }, + { .name = "BTN_PINKIE", .value = BTN_PINKIE }, + { .name = "BTN_RIGHT", .value = BTN_RIGHT }, + { .name = "BTN_SELECT", .value = BTN_SELECT }, + { .name = "BTN_SIDE", .value = BTN_SIDE }, + { .name = "BTN_SOUTH", .value = BTN_SOUTH }, + { .name = "BTN_START", .value = BTN_START }, + { .name = "BTN_STYLUS", .value = BTN_STYLUS }, + { .name = "BTN_STYLUS2", .value = BTN_STYLUS2 }, + { .name = "BTN_STYLUS3", .value = BTN_STYLUS3 }, + { .name = "BTN_TASK", .value = BTN_TASK }, + { .name = "BTN_THUMB", .value = BTN_THUMB }, + { .name = "BTN_THUMB2", .value = BTN_THUMB2 }, + { .name = "BTN_THUMBL", .value = BTN_THUMBL }, + { .name = "BTN_THUMBR", .value = BTN_THUMBR }, + { .name = "BTN_TL", .value = BTN_TL }, + { .name = "BTN_TL2", .value = BTN_TL2 }, + { .name = "BTN_TOOL_AIRBRUSH", .value = BTN_TOOL_AIRBRUSH }, + { .name = "BTN_TOOL_BRUSH", .value = BTN_TOOL_BRUSH }, + { .name = "BTN_TOOL_DOUBLETAP", .value = BTN_TOOL_DOUBLETAP }, + { .name = "BTN_TOOL_FINGER", .value = BTN_TOOL_FINGER }, + { .name = "BTN_TOOL_LENS", .value = BTN_TOOL_LENS }, + { .name = "BTN_TOOL_MOUSE", .value = BTN_TOOL_MOUSE }, + { .name = "BTN_TOOL_PEN", .value = BTN_TOOL_PEN }, + { .name = "BTN_TOOL_PENCIL", .value = BTN_TOOL_PENCIL }, + { .name = "BTN_TOOL_QUADTAP", .value = BTN_TOOL_QUADTAP }, + { .name = "BTN_TOOL_QUINTTAP", .value = BTN_TOOL_QUINTTAP }, + { .name = "BTN_TOOL_RUBBER", .value = BTN_TOOL_RUBBER }, + { .name = "BTN_TOOL_TRIPLETAP", .value = BTN_TOOL_TRIPLETAP }, + { .name = "BTN_TOP", .value = BTN_TOP }, + { .name = "BTN_TOP2", .value = BTN_TOP2 }, + { .name = "BTN_TOUCH", .value = BTN_TOUCH }, + { .name = "BTN_TR", .value = BTN_TR }, + { .name = "BTN_TR2", .value = BTN_TR2 }, + { .name = "BTN_TRIGGER", .value = BTN_TRIGGER }, + { .name = "BTN_TRIGGER_HAPPY1", .value = BTN_TRIGGER_HAPPY1 }, + { .name = "BTN_TRIGGER_HAPPY10", .value = BTN_TRIGGER_HAPPY10 }, + { .name = "BTN_TRIGGER_HAPPY11", .value = BTN_TRIGGER_HAPPY11 }, + { .name = "BTN_TRIGGER_HAPPY12", .value = BTN_TRIGGER_HAPPY12 }, + { .name = "BTN_TRIGGER_HAPPY13", .value = BTN_TRIGGER_HAPPY13 }, + { .name = "BTN_TRIGGER_HAPPY14", .value = BTN_TRIGGER_HAPPY14 }, + { .name = "BTN_TRIGGER_HAPPY15", .value = BTN_TRIGGER_HAPPY15 }, + { .name = "BTN_TRIGGER_HAPPY16", .value = BTN_TRIGGER_HAPPY16 }, + { .name = "BTN_TRIGGER_HAPPY17", .value = BTN_TRIGGER_HAPPY17 }, + { .name = "BTN_TRIGGER_HAPPY18", .value = BTN_TRIGGER_HAPPY18 }, + { .name = "BTN_TRIGGER_HAPPY19", .value = BTN_TRIGGER_HAPPY19 }, + { .name = "BTN_TRIGGER_HAPPY2", .value = BTN_TRIGGER_HAPPY2 }, + { .name = "BTN_TRIGGER_HAPPY20", .value = BTN_TRIGGER_HAPPY20 }, + { .name = "BTN_TRIGGER_HAPPY21", .value = BTN_TRIGGER_HAPPY21 }, + { .name = "BTN_TRIGGER_HAPPY22", .value = BTN_TRIGGER_HAPPY22 }, + { .name = "BTN_TRIGGER_HAPPY23", .value = BTN_TRIGGER_HAPPY23 }, + { .name = "BTN_TRIGGER_HAPPY24", .value = BTN_TRIGGER_HAPPY24 }, + { .name = "BTN_TRIGGER_HAPPY25", .value = BTN_TRIGGER_HAPPY25 }, + { .name = "BTN_TRIGGER_HAPPY26", .value = BTN_TRIGGER_HAPPY26 }, + { .name = "BTN_TRIGGER_HAPPY27", .value = BTN_TRIGGER_HAPPY27 }, + { .name = "BTN_TRIGGER_HAPPY28", .value = BTN_TRIGGER_HAPPY28 }, + { .name = "BTN_TRIGGER_HAPPY29", .value = BTN_TRIGGER_HAPPY29 }, + { .name = "BTN_TRIGGER_HAPPY3", .value = BTN_TRIGGER_HAPPY3 }, + { .name = "BTN_TRIGGER_HAPPY30", .value = BTN_TRIGGER_HAPPY30 }, + { .name = "BTN_TRIGGER_HAPPY31", .value = BTN_TRIGGER_HAPPY31 }, + { .name = "BTN_TRIGGER_HAPPY32", .value = BTN_TRIGGER_HAPPY32 }, + { .name = "BTN_TRIGGER_HAPPY33", .value = BTN_TRIGGER_HAPPY33 }, + { .name = "BTN_TRIGGER_HAPPY34", .value = BTN_TRIGGER_HAPPY34 }, + { .name = "BTN_TRIGGER_HAPPY35", .value = BTN_TRIGGER_HAPPY35 }, + { .name = "BTN_TRIGGER_HAPPY36", .value = BTN_TRIGGER_HAPPY36 }, + { .name = "BTN_TRIGGER_HAPPY37", .value = BTN_TRIGGER_HAPPY37 }, + { .name = "BTN_TRIGGER_HAPPY38", .value = BTN_TRIGGER_HAPPY38 }, + { .name = "BTN_TRIGGER_HAPPY39", .value = BTN_TRIGGER_HAPPY39 }, + { .name = "BTN_TRIGGER_HAPPY4", .value = BTN_TRIGGER_HAPPY4 }, + { .name = "BTN_TRIGGER_HAPPY40", .value = BTN_TRIGGER_HAPPY40 }, + { .name = "BTN_TRIGGER_HAPPY5", .value = BTN_TRIGGER_HAPPY5 }, + { .name = "BTN_TRIGGER_HAPPY6", .value = BTN_TRIGGER_HAPPY6 }, + { .name = "BTN_TRIGGER_HAPPY7", .value = BTN_TRIGGER_HAPPY7 }, + { .name = "BTN_TRIGGER_HAPPY8", .value = BTN_TRIGGER_HAPPY8 }, + { .name = "BTN_TRIGGER_HAPPY9", .value = BTN_TRIGGER_HAPPY9 }, + { .name = "BTN_WEST", .value = BTN_WEST }, + { .name = "BTN_X", .value = BTN_X }, + { .name = "BTN_Y", .value = BTN_Y }, + { .name = "BTN_Z", .value = BTN_Z }, + { .name = "FF_AUTOCENTER", .value = FF_AUTOCENTER }, + { .name = "FF_CONSTANT", .value = FF_CONSTANT }, + { .name = "FF_CUSTOM", .value = FF_CUSTOM }, + { .name = "FF_DAMPER", .value = FF_DAMPER }, + { .name = "FF_FRICTION", .value = FF_FRICTION }, + { .name = "FF_GAIN", .value = FF_GAIN }, + { .name = "FF_INERTIA", .value = FF_INERTIA }, + { .name = "FF_MAX", .value = FF_MAX }, + { .name = "FF_PERIODIC", .value = FF_PERIODIC }, + { .name = "FF_RAMP", .value = FF_RAMP }, + { .name = "FF_RUMBLE", .value = FF_RUMBLE }, + { .name = "FF_SAW_DOWN", .value = FF_SAW_DOWN }, + { .name = "FF_SAW_UP", .value = FF_SAW_UP }, + { .name = "FF_SINE", .value = FF_SINE }, + { .name = "FF_SPRING", .value = FF_SPRING }, + { .name = "FF_SQUARE", .value = FF_SQUARE }, + { .name = "FF_STATUS_MAX", .value = FF_STATUS_MAX }, + { .name = "FF_STATUS_STOPPED", .value = FF_STATUS_STOPPED }, + { .name = "FF_TRIANGLE", .value = FF_TRIANGLE }, + { .name = "KEY_0", .value = KEY_0 }, + { .name = "KEY_1", .value = KEY_1 }, + { .name = "KEY_102ND", .value = KEY_102ND }, + { .name = "KEY_10CHANNELSDOWN", .value = KEY_10CHANNELSDOWN }, + { .name = "KEY_10CHANNELSUP", .value = KEY_10CHANNELSUP }, + { .name = "KEY_2", .value = KEY_2 }, + { .name = "KEY_3", .value = KEY_3 }, + { .name = "KEY_3D_MODE", .value = KEY_3D_MODE }, + { .name = "KEY_4", .value = KEY_4 }, + { .name = "KEY_5", .value = KEY_5 }, + { .name = "KEY_6", .value = KEY_6 }, + { .name = "KEY_7", .value = KEY_7 }, + { .name = "KEY_8", .value = KEY_8 }, + { .name = "KEY_9", .value = KEY_9 }, + { .name = "KEY_A", .value = KEY_A }, + { .name = "KEY_AB", .value = KEY_AB }, + { .name = "KEY_ADDRESSBOOK", .value = KEY_ADDRESSBOOK }, + { .name = "KEY_AGAIN", .value = KEY_AGAIN }, + // { .name = "KEY_ALL_APPLICATIONS", .value = KEY_ALL_APPLICATIONS }, + { .name = "KEY_ALS_TOGGLE", .value = KEY_ALS_TOGGLE }, + { .name = "KEY_ALTERASE", .value = KEY_ALTERASE }, + { .name = "KEY_ANGLE", .value = KEY_ANGLE }, + { .name = "KEY_APOSTROPHE", .value = KEY_APOSTROPHE }, + { .name = "KEY_APPSELECT", .value = KEY_APPSELECT }, + { .name = "KEY_ARCHIVE", .value = KEY_ARCHIVE }, + { .name = "KEY_ASPECT_RATIO", .value = KEY_ASPECT_RATIO }, + { .name = "KEY_ASSISTANT", .value = KEY_ASSISTANT }, + { .name = "KEY_ATTENDANT_OFF", .value = KEY_ATTENDANT_OFF }, + { .name = "KEY_ATTENDANT_ON", .value = KEY_ATTENDANT_ON }, + { .name = "KEY_ATTENDANT_TOGGLE", .value = KEY_ATTENDANT_TOGGLE }, + { .name = "KEY_AUDIO", .value = KEY_AUDIO }, + { .name = "KEY_AUDIO_DESC", .value = KEY_AUDIO_DESC }, + // { .name = "KEY_AUTOPILOT_ENGAGE_TOGGLE", .value = KEY_AUTOPILOT_ENGAGE_TOGGLE }, + { .name = "KEY_AUX", .value = KEY_AUX }, + { .name = "KEY_B", .value = KEY_B }, + { .name = "KEY_BACK", .value = KEY_BACK }, + { .name = "KEY_BACKSLASH", .value = KEY_BACKSLASH }, + { .name = "KEY_BACKSPACE", .value = KEY_BACKSPACE }, + { .name = "KEY_BASSBOOST", .value = KEY_BASSBOOST }, + { .name = "KEY_BATTERY", .value = KEY_BATTERY }, + { .name = "KEY_BLUE", .value = KEY_BLUE }, + { .name = "KEY_BLUETOOTH", .value = KEY_BLUETOOTH }, + { .name = "KEY_BOOKMARKS", .value = KEY_BOOKMARKS }, + { .name = "KEY_BREAK", .value = KEY_BREAK }, + { .name = "KEY_BRIGHTNESSDOWN", .value = KEY_BRIGHTNESSDOWN }, + { .name = "KEY_BRIGHTNESSUP", .value = KEY_BRIGHTNESSUP }, + { .name = "KEY_BRIGHTNESS_AUTO", .value = KEY_BRIGHTNESS_AUTO }, + { .name = "KEY_BRIGHTNESS_CYCLE", .value = KEY_BRIGHTNESS_CYCLE }, + { .name = "KEY_BRIGHTNESS_MAX", .value = KEY_BRIGHTNESS_MAX }, + // { .name = "KEY_BRIGHTNESS_MENU", .value = KEY_BRIGHTNESS_MENU }, + { .name = "KEY_BRIGHTNESS_MIN", .value = KEY_BRIGHTNESS_MIN }, + { .name = "KEY_BRL_DOT1", .value = KEY_BRL_DOT1 }, + { .name = "KEY_BRL_DOT10", .value = KEY_BRL_DOT10 }, + { .name = "KEY_BRL_DOT2", .value = KEY_BRL_DOT2 }, + { .name = "KEY_BRL_DOT3", .value = KEY_BRL_DOT3 }, + { .name = "KEY_BRL_DOT4", .value = KEY_BRL_DOT4 }, + { .name = "KEY_BRL_DOT5", .value = KEY_BRL_DOT5 }, + { .name = "KEY_BRL_DOT6", .value = KEY_BRL_DOT6 }, + { .name = "KEY_BRL_DOT7", .value = KEY_BRL_DOT7 }, + { .name = "KEY_BRL_DOT8", .value = KEY_BRL_DOT8 }, + { .name = "KEY_BRL_DOT9", .value = KEY_BRL_DOT9 }, + { .name = "KEY_BUTTONCONFIG", .value = KEY_BUTTONCONFIG }, + { .name = "KEY_C", .value = KEY_C }, + { .name = "KEY_CALC", .value = KEY_CALC }, + { .name = "KEY_CALENDAR", .value = KEY_CALENDAR }, + { .name = "KEY_CAMERA", .value = KEY_CAMERA }, + // { .name = "KEY_CAMERA_ACCESS_DISABLE", .value = KEY_CAMERA_ACCESS_DISABLE }, + // { .name = "KEY_CAMERA_ACCESS_ENABLE", .value = KEY_CAMERA_ACCESS_ENABLE }, + // { .name = "KEY_CAMERA_ACCESS_TOGGLE", .value = KEY_CAMERA_ACCESS_TOGGLE }, + { .name = "KEY_CAMERA_DOWN", .value = KEY_CAMERA_DOWN }, + { .name = "KEY_CAMERA_FOCUS", .value = KEY_CAMERA_FOCUS }, + { .name = "KEY_CAMERA_LEFT", .value = KEY_CAMERA_LEFT }, + { .name = "KEY_CAMERA_RIGHT", .value = KEY_CAMERA_RIGHT }, + { .name = "KEY_CAMERA_UP", .value = KEY_CAMERA_UP }, + { .name = "KEY_CAMERA_ZOOMIN", .value = KEY_CAMERA_ZOOMIN }, + { .name = "KEY_CAMERA_ZOOMOUT", .value = KEY_CAMERA_ZOOMOUT }, + { .name = "KEY_CANCEL", .value = KEY_CANCEL }, + { .name = "KEY_CAPSLOCK", .value = KEY_CAPSLOCK }, + { .name = "KEY_CD", .value = KEY_CD }, + { .name = "KEY_CHANNEL", .value = KEY_CHANNEL }, + { .name = "KEY_CHANNELDOWN", .value = KEY_CHANNELDOWN }, + { .name = "KEY_CHANNELUP", .value = KEY_CHANNELUP }, + { .name = "KEY_CHAT", .value = KEY_CHAT }, + { .name = "KEY_CLEAR", .value = KEY_CLEAR }, + // { .name = "KEY_CLEARVU_SONAR", .value = KEY_CLEARVU_SONAR }, + { .name = "KEY_CLOSE", .value = KEY_CLOSE }, + { .name = "KEY_CLOSECD", .value = KEY_CLOSECD }, + { .name = "KEY_COFFEE", .value = KEY_COFFEE }, + { .name = "KEY_COMMA", .value = KEY_COMMA }, + { .name = "KEY_COMPOSE", .value = KEY_COMPOSE }, + { .name = "KEY_COMPUTER", .value = KEY_COMPUTER }, + { .name = "KEY_CONFIG", .value = KEY_CONFIG }, + { .name = "KEY_CONNECT", .value = KEY_CONNECT }, + { .name = "KEY_CONTEXT_MENU", .value = KEY_CONTEXT_MENU }, + { .name = "KEY_CONTROLPANEL", .value = KEY_CONTROLPANEL }, + { .name = "KEY_COPY", .value = KEY_COPY }, + { .name = "KEY_CUT", .value = KEY_CUT }, + { .name = "KEY_CYCLEWINDOWS", .value = KEY_CYCLEWINDOWS }, + { .name = "KEY_D", .value = KEY_D }, + { .name = "KEY_DATA", .value = KEY_DATA }, + { .name = "KEY_DATABASE", .value = KEY_DATABASE }, + { .name = "KEY_DELETE", .value = KEY_DELETE }, + { .name = "KEY_DELETEFILE", .value = KEY_DELETEFILE }, + { .name = "KEY_DEL_EOL", .value = KEY_DEL_EOL }, + { .name = "KEY_DEL_EOS", .value = KEY_DEL_EOS }, + { .name = "KEY_DEL_LINE", .value = KEY_DEL_LINE }, + // { .name = "KEY_DICTATE", .value = KEY_DICTATE }, + { .name = "KEY_DIGITS", .value = KEY_DIGITS }, + { .name = "KEY_DIRECTORY", .value = KEY_DIRECTORY }, + { .name = "KEY_DISPLAYTOGGLE", .value = KEY_DISPLAYTOGGLE }, + { .name = "KEY_DISPLAY_OFF", .value = KEY_DISPLAY_OFF }, + { .name = "KEY_DOCUMENTS", .value = KEY_DOCUMENTS }, + { .name = "KEY_DOLLAR", .value = KEY_DOLLAR }, + { .name = "KEY_DOT", .value = KEY_DOT }, + { .name = "KEY_DOWN", .value = KEY_DOWN }, + // { .name = "KEY_DUAL_RANGE_RADAR", .value = KEY_DUAL_RANGE_RADAR }, + { .name = "KEY_DVD", .value = KEY_DVD }, + { .name = "KEY_E", .value = KEY_E }, + { .name = "KEY_EDIT", .value = KEY_EDIT }, + { .name = "KEY_EDITOR", .value = KEY_EDITOR }, + { .name = "KEY_EJECTCD", .value = KEY_EJECTCD }, + { .name = "KEY_EJECTCLOSECD", .value = KEY_EJECTCLOSECD }, + { .name = "KEY_EMAIL", .value = KEY_EMAIL }, + // { .name = "KEY_EMOJI_PICKER", .value = KEY_EMOJI_PICKER }, + { .name = "KEY_END", .value = KEY_END }, + { .name = "KEY_ENTER", .value = KEY_ENTER }, + { .name = "KEY_EPG", .value = KEY_EPG }, + { .name = "KEY_EQUAL", .value = KEY_EQUAL }, + { .name = "KEY_ESC", .value = KEY_ESC }, + { .name = "KEY_EURO", .value = KEY_EURO }, + { .name = "KEY_EXIT", .value = KEY_EXIT }, + { .name = "KEY_F", .value = KEY_F }, + { .name = "KEY_F1", .value = KEY_F1 }, + { .name = "KEY_F10", .value = KEY_F10 }, + { .name = "KEY_F11", .value = KEY_F11 }, + { .name = "KEY_F12", .value = KEY_F12 }, + { .name = "KEY_F13", .value = KEY_F13 }, + { .name = "KEY_F14", .value = KEY_F14 }, + { .name = "KEY_F15", .value = KEY_F15 }, + { .name = "KEY_F16", .value = KEY_F16 }, + { .name = "KEY_F17", .value = KEY_F17 }, + { .name = "KEY_F18", .value = KEY_F18 }, + { .name = "KEY_F19", .value = KEY_F19 }, + { .name = "KEY_F2", .value = KEY_F2 }, + { .name = "KEY_F20", .value = KEY_F20 }, + { .name = "KEY_F21", .value = KEY_F21 }, + { .name = "KEY_F22", .value = KEY_F22 }, + { .name = "KEY_F23", .value = KEY_F23 }, + { .name = "KEY_F24", .value = KEY_F24 }, + { .name = "KEY_F3", .value = KEY_F3 }, + { .name = "KEY_F4", .value = KEY_F4 }, + { .name = "KEY_F5", .value = KEY_F5 }, + { .name = "KEY_F6", .value = KEY_F6 }, + { .name = "KEY_F7", .value = KEY_F7 }, + { .name = "KEY_F8", .value = KEY_F8 }, + { .name = "KEY_F9", .value = KEY_F9 }, + { .name = "KEY_FASTFORWARD", .value = KEY_FASTFORWARD }, + { .name = "KEY_FASTREVERSE", .value = KEY_FASTREVERSE }, + { .name = "KEY_FAVORITES", .value = KEY_FAVORITES }, + { .name = "KEY_FILE", .value = KEY_FILE }, + { .name = "KEY_FINANCE", .value = KEY_FINANCE }, + { .name = "KEY_FIND", .value = KEY_FIND }, + { .name = "KEY_FIRST", .value = KEY_FIRST }, + // { .name = "KEY_FISHING_CHART", .value = KEY_FISHING_CHART }, + { .name = "KEY_FN", .value = KEY_FN }, + { .name = "KEY_FN_1", .value = KEY_FN_1 }, + { .name = "KEY_FN_2", .value = KEY_FN_2 }, + { .name = "KEY_FN_B", .value = KEY_FN_B }, + { .name = "KEY_FN_D", .value = KEY_FN_D }, + { .name = "KEY_FN_E", .value = KEY_FN_E }, + { .name = "KEY_FN_ESC", .value = KEY_FN_ESC }, + { .name = "KEY_FN_F", .value = KEY_FN_F }, + { .name = "KEY_FN_F1", .value = KEY_FN_F1 }, + { .name = "KEY_FN_F10", .value = KEY_FN_F10 }, + { .name = "KEY_FN_F11", .value = KEY_FN_F11 }, + { .name = "KEY_FN_F12", .value = KEY_FN_F12 }, + { .name = "KEY_FN_F2", .value = KEY_FN_F2 }, + { .name = "KEY_FN_F3", .value = KEY_FN_F3 }, + { .name = "KEY_FN_F4", .value = KEY_FN_F4 }, + { .name = "KEY_FN_F5", .value = KEY_FN_F5 }, + { .name = "KEY_FN_F6", .value = KEY_FN_F6 }, + { .name = "KEY_FN_F7", .value = KEY_FN_F7 }, + { .name = "KEY_FN_F8", .value = KEY_FN_F8 }, + { .name = "KEY_FN_F9", .value = KEY_FN_F9 }, + // { .name = "KEY_FN_RIGHT_SHIFT", .value = KEY_FN_RIGHT_SHIFT }, + { .name = "KEY_FN_S", .value = KEY_FN_S }, + { .name = "KEY_FORWARD", .value = KEY_FORWARD }, + { .name = "KEY_FORWARDMAIL", .value = KEY_FORWARDMAIL }, + { .name = "KEY_FRAMEBACK", .value = KEY_FRAMEBACK }, + { .name = "KEY_FRAMEFORWARD", .value = KEY_FRAMEFORWARD }, + { .name = "KEY_FRONT", .value = KEY_FRONT }, + { .name = "KEY_FULL_SCREEN", .value = KEY_FULL_SCREEN }, + { .name = "KEY_G", .value = KEY_G }, + { .name = "KEY_GAMES", .value = KEY_GAMES }, + { .name = "KEY_GOTO", .value = KEY_GOTO }, + { .name = "KEY_GRAPHICSEDITOR", .value = KEY_GRAPHICSEDITOR }, + { .name = "KEY_GRAVE", .value = KEY_GRAVE }, + { .name = "KEY_GREEN", .value = KEY_GREEN }, + { .name = "KEY_H", .value = KEY_H }, + { .name = "KEY_HANGEUL", .value = KEY_HANGEUL }, + // { .name = "KEY_HANGUP_PHONE", .value = KEY_HANGUP_PHONE }, + { .name = "KEY_HANJA", .value = KEY_HANJA }, + { .name = "KEY_HELP", .value = KEY_HELP }, + { .name = "KEY_HENKAN", .value = KEY_HENKAN }, + { .name = "KEY_HIRAGANA", .value = KEY_HIRAGANA }, + { .name = "KEY_HOME", .value = KEY_HOME }, + { .name = "KEY_HOMEPAGE", .value = KEY_HOMEPAGE }, + { .name = "KEY_HP", .value = KEY_HP }, + { .name = "KEY_I", .value = KEY_I }, + { .name = "KEY_IMAGES", .value = KEY_IMAGES }, + { .name = "KEY_INFO", .value = KEY_INFO }, + { .name = "KEY_INSERT", .value = KEY_INSERT }, + { .name = "KEY_INS_LINE", .value = KEY_INS_LINE }, + { .name = "KEY_ISO", .value = KEY_ISO }, + { .name = "KEY_J", .value = KEY_J }, + { .name = "KEY_JOURNAL", .value = KEY_JOURNAL }, + { .name = "KEY_K", .value = KEY_K }, + { .name = "KEY_KATAKANA", .value = KEY_KATAKANA }, + { .name = "KEY_KATAKANAHIRAGANA", .value = KEY_KATAKANAHIRAGANA }, + { .name = "KEY_KBDILLUMDOWN", .value = KEY_KBDILLUMDOWN }, + { .name = "KEY_KBDILLUMTOGGLE", .value = KEY_KBDILLUMTOGGLE }, + { .name = "KEY_KBDILLUMUP", .value = KEY_KBDILLUMUP }, + { .name = "KEY_KBDINPUTASSIST_ACCEPT", .value = KEY_KBDINPUTASSIST_ACCEPT }, + { .name = "KEY_KBDINPUTASSIST_CANCEL", .value = KEY_KBDINPUTASSIST_CANCEL }, + { .name = "KEY_KBDINPUTASSIST_NEXT", .value = KEY_KBDINPUTASSIST_NEXT }, + { .name = "KEY_KBDINPUTASSIST_NEXTGROUP", .value = KEY_KBDINPUTASSIST_NEXTGROUP }, + { .name = "KEY_KBDINPUTASSIST_PREV", .value = KEY_KBDINPUTASSIST_PREV }, + { .name = "KEY_KBDINPUTASSIST_PREVGROUP", .value = KEY_KBDINPUTASSIST_PREVGROUP }, + { .name = "KEY_KBD_LAYOUT_NEXT", .value = KEY_KBD_LAYOUT_NEXT }, + { .name = "KEY_KBD_LCD_MENU1", .value = KEY_KBD_LCD_MENU1 }, + { .name = "KEY_KBD_LCD_MENU2", .value = KEY_KBD_LCD_MENU2 }, + { .name = "KEY_KBD_LCD_MENU3", .value = KEY_KBD_LCD_MENU3 }, + { .name = "KEY_KBD_LCD_MENU4", .value = KEY_KBD_LCD_MENU4 }, + { .name = "KEY_KBD_LCD_MENU5", .value = KEY_KBD_LCD_MENU5 }, + { .name = "KEY_KEYBOARD", .value = KEY_KEYBOARD }, + { .name = "KEY_KP0", .value = KEY_KP0 }, + { .name = "KEY_KP1", .value = KEY_KP1 }, + { .name = "KEY_KP2", .value = KEY_KP2 }, + { .name = "KEY_KP3", .value = KEY_KP3 }, + { .name = "KEY_KP4", .value = KEY_KP4 }, + { .name = "KEY_KP5", .value = KEY_KP5 }, + { .name = "KEY_KP6", .value = KEY_KP6 }, + { .name = "KEY_KP7", .value = KEY_KP7 }, + { .name = "KEY_KP8", .value = KEY_KP8 }, + { .name = "KEY_KP9", .value = KEY_KP9 }, + { .name = "KEY_KPASTERISK", .value = KEY_KPASTERISK }, + { .name = "KEY_KPCOMMA", .value = KEY_KPCOMMA }, + { .name = "KEY_KPDOT", .value = KEY_KPDOT }, + { .name = "KEY_KPENTER", .value = KEY_KPENTER }, + { .name = "KEY_KPEQUAL", .value = KEY_KPEQUAL }, + { .name = "KEY_KPJPCOMMA", .value = KEY_KPJPCOMMA }, + { .name = "KEY_KPLEFTPAREN", .value = KEY_KPLEFTPAREN }, + { .name = "KEY_KPMINUS", .value = KEY_KPMINUS }, + { .name = "KEY_KPPLUS", .value = KEY_KPPLUS }, + { .name = "KEY_KPPLUSMINUS", .value = KEY_KPPLUSMINUS }, + { .name = "KEY_KPRIGHTPAREN", .value = KEY_KPRIGHTPAREN }, + { .name = "KEY_KPSLASH", .value = KEY_KPSLASH }, + { .name = "KEY_L", .value = KEY_L }, + { .name = "KEY_LANGUAGE", .value = KEY_LANGUAGE }, + { .name = "KEY_LAST", .value = KEY_LAST }, + { .name = "KEY_LEFT", .value = KEY_LEFT }, + { .name = "KEY_LEFTALT", .value = KEY_LEFTALT }, + { .name = "KEY_LEFTBRACE", .value = KEY_LEFTBRACE }, + { .name = "KEY_LEFTCTRL", .value = KEY_LEFTCTRL }, + { .name = "KEY_LEFTMETA", .value = KEY_LEFTMETA }, + { .name = "KEY_LEFTSHIFT", .value = KEY_LEFTSHIFT }, + { .name = "KEY_LEFT_DOWN", .value = KEY_LEFT_DOWN }, + { .name = "KEY_LEFT_UP", .value = KEY_LEFT_UP }, + { .name = "KEY_LIGHTS_TOGGLE", .value = KEY_LIGHTS_TOGGLE }, + { .name = "KEY_LINEFEED", .value = KEY_LINEFEED }, + { .name = "KEY_LIST", .value = KEY_LIST }, + { .name = "KEY_LOGOFF", .value = KEY_LOGOFF }, + { .name = "KEY_M", .value = KEY_M }, + { .name = "KEY_MACRO", .value = KEY_MACRO }, + { .name = "KEY_MACRO1", .value = KEY_MACRO1 }, + { .name = "KEY_MACRO10", .value = KEY_MACRO10 }, + { .name = "KEY_MACRO11", .value = KEY_MACRO11 }, + { .name = "KEY_MACRO12", .value = KEY_MACRO12 }, + { .name = "KEY_MACRO13", .value = KEY_MACRO13 }, + { .name = "KEY_MACRO14", .value = KEY_MACRO14 }, + { .name = "KEY_MACRO15", .value = KEY_MACRO15 }, + { .name = "KEY_MACRO16", .value = KEY_MACRO16 }, + { .name = "KEY_MACRO17", .value = KEY_MACRO17 }, + { .name = "KEY_MACRO18", .value = KEY_MACRO18 }, + { .name = "KEY_MACRO19", .value = KEY_MACRO19 }, + { .name = "KEY_MACRO2", .value = KEY_MACRO2 }, + { .name = "KEY_MACRO20", .value = KEY_MACRO20 }, + { .name = "KEY_MACRO21", .value = KEY_MACRO21 }, + { .name = "KEY_MACRO22", .value = KEY_MACRO22 }, + { .name = "KEY_MACRO23", .value = KEY_MACRO23 }, + { .name = "KEY_MACRO24", .value = KEY_MACRO24 }, + { .name = "KEY_MACRO25", .value = KEY_MACRO25 }, + { .name = "KEY_MACRO26", .value = KEY_MACRO26 }, + { .name = "KEY_MACRO27", .value = KEY_MACRO27 }, + { .name = "KEY_MACRO28", .value = KEY_MACRO28 }, + { .name = "KEY_MACRO29", .value = KEY_MACRO29 }, + { .name = "KEY_MACRO3", .value = KEY_MACRO3 }, + { .name = "KEY_MACRO30", .value = KEY_MACRO30 }, + { .name = "KEY_MACRO4", .value = KEY_MACRO4 }, + { .name = "KEY_MACRO5", .value = KEY_MACRO5 }, + { .name = "KEY_MACRO6", .value = KEY_MACRO6 }, + { .name = "KEY_MACRO7", .value = KEY_MACRO7 }, + { .name = "KEY_MACRO8", .value = KEY_MACRO8 }, + { .name = "KEY_MACRO9", .value = KEY_MACRO9 }, + { .name = "KEY_MACRO_PRESET1", .value = KEY_MACRO_PRESET1 }, + { .name = "KEY_MACRO_PRESET2", .value = KEY_MACRO_PRESET2 }, + { .name = "KEY_MACRO_PRESET3", .value = KEY_MACRO_PRESET3 }, + { .name = "KEY_MACRO_PRESET_CYCLE", .value = KEY_MACRO_PRESET_CYCLE }, + { .name = "KEY_MACRO_RECORD_START", .value = KEY_MACRO_RECORD_START }, + { .name = "KEY_MACRO_RECORD_STOP", .value = KEY_MACRO_RECORD_STOP }, + { .name = "KEY_MAIL", .value = KEY_MAIL }, + // { .name = "KEY_MARK_WAYPOINT", .value = KEY_MARK_WAYPOINT }, + { .name = "KEY_MAX", .value = KEY_MAX }, + { .name = "KEY_MEDIA", .value = KEY_MEDIA }, + { .name = "KEY_MEDIA_REPEAT", .value = KEY_MEDIA_REPEAT }, + { .name = "KEY_MEDIA_TOP_MENU", .value = KEY_MEDIA_TOP_MENU }, + { .name = "KEY_MEMO", .value = KEY_MEMO }, + { .name = "KEY_MENU", .value = KEY_MENU }, + { .name = "KEY_MESSENGER", .value = KEY_MESSENGER }, + { .name = "KEY_MHP", .value = KEY_MHP }, + { .name = "KEY_MICMUTE", .value = KEY_MICMUTE }, + { .name = "KEY_MINUS", .value = KEY_MINUS }, + { .name = "KEY_MODE", .value = KEY_MODE }, + { .name = "KEY_MOVE", .value = KEY_MOVE }, + { .name = "KEY_MP3", .value = KEY_MP3 }, + { .name = "KEY_MSDOS", .value = KEY_MSDOS }, + { .name = "KEY_MUHENKAN", .value = KEY_MUHENKAN }, + { .name = "KEY_MUTE", .value = KEY_MUTE }, + { .name = "KEY_N", .value = KEY_N }, + // { .name = "KEY_NAV_CHART", .value = KEY_NAV_CHART }, + // { .name = "KEY_NAV_INFO", .value = KEY_NAV_INFO }, + { .name = "KEY_NEW", .value = KEY_NEW }, + { .name = "KEY_NEWS", .value = KEY_NEWS }, + { .name = "KEY_NEXT", .value = KEY_NEXT }, + { .name = "KEY_NEXTSONG", .value = KEY_NEXTSONG }, + // { .name = "KEY_NEXT_ELEMENT", .value = KEY_NEXT_ELEMENT }, + { .name = "KEY_NEXT_FAVORITE", .value = KEY_NEXT_FAVORITE }, + // { .name = "KEY_NOTIFICATION_CENTER", .value = KEY_NOTIFICATION_CENTER }, + { .name = "KEY_NUMERIC_0", .value = KEY_NUMERIC_0 }, + { .name = "KEY_NUMERIC_1", .value = KEY_NUMERIC_1 }, + { .name = "KEY_NUMERIC_11", .value = KEY_NUMERIC_11 }, + { .name = "KEY_NUMERIC_12", .value = KEY_NUMERIC_12 }, + { .name = "KEY_NUMERIC_2", .value = KEY_NUMERIC_2 }, + { .name = "KEY_NUMERIC_3", .value = KEY_NUMERIC_3 }, + { .name = "KEY_NUMERIC_4", .value = KEY_NUMERIC_4 }, + { .name = "KEY_NUMERIC_5", .value = KEY_NUMERIC_5 }, + { .name = "KEY_NUMERIC_6", .value = KEY_NUMERIC_6 }, + { .name = "KEY_NUMERIC_7", .value = KEY_NUMERIC_7 }, + { .name = "KEY_NUMERIC_8", .value = KEY_NUMERIC_8 }, + { .name = "KEY_NUMERIC_9", .value = KEY_NUMERIC_9 }, + { .name = "KEY_NUMERIC_A", .value = KEY_NUMERIC_A }, + { .name = "KEY_NUMERIC_B", .value = KEY_NUMERIC_B }, + { .name = "KEY_NUMERIC_C", .value = KEY_NUMERIC_C }, + { .name = "KEY_NUMERIC_D", .value = KEY_NUMERIC_D }, + { .name = "KEY_NUMERIC_POUND", .value = KEY_NUMERIC_POUND }, + { .name = "KEY_NUMERIC_STAR", .value = KEY_NUMERIC_STAR }, + { .name = "KEY_NUMLOCK", .value = KEY_NUMLOCK }, + { .name = "KEY_O", .value = KEY_O }, + { .name = "KEY_OK", .value = KEY_OK }, + { .name = "KEY_ONSCREEN_KEYBOARD", .value = KEY_ONSCREEN_KEYBOARD }, + { .name = "KEY_OPEN", .value = KEY_OPEN }, + { .name = "KEY_OPTION", .value = KEY_OPTION }, + { .name = "KEY_P", .value = KEY_P }, + { .name = "KEY_PAGEDOWN", .value = KEY_PAGEDOWN }, + { .name = "KEY_PAGEUP", .value = KEY_PAGEUP }, + { .name = "KEY_PASTE", .value = KEY_PASTE }, + { .name = "KEY_PAUSE", .value = KEY_PAUSE }, + { .name = "KEY_PAUSECD", .value = KEY_PAUSECD }, + { .name = "KEY_PAUSE_RECORD", .value = KEY_PAUSE_RECORD }, + { .name = "KEY_PC", .value = KEY_PC }, + { .name = "KEY_PHONE", .value = KEY_PHONE }, + // { .name = "KEY_PICKUP_PHONE", .value = KEY_PICKUP_PHONE }, + { .name = "KEY_PLAY", .value = KEY_PLAY }, + { .name = "KEY_PLAYCD", .value = KEY_PLAYCD }, + { .name = "KEY_PLAYER", .value = KEY_PLAYER }, + { .name = "KEY_PLAYPAUSE", .value = KEY_PLAYPAUSE }, + { .name = "KEY_POWER", .value = KEY_POWER }, + { .name = "KEY_POWER2", .value = KEY_POWER2 }, + { .name = "KEY_PRESENTATION", .value = KEY_PRESENTATION }, + { .name = "KEY_PREVIOUS", .value = KEY_PREVIOUS }, + { .name = "KEY_PREVIOUSSONG", .value = KEY_PREVIOUSSONG }, + // { .name = "KEY_PREVIOUS_ELEMENT", .value = KEY_PREVIOUS_ELEMENT }, + { .name = "KEY_PRINT", .value = KEY_PRINT }, + { .name = "KEY_PRIVACY_SCREEN_TOGGLE", .value = KEY_PRIVACY_SCREEN_TOGGLE }, + { .name = "KEY_PROG1", .value = KEY_PROG1 }, + { .name = "KEY_PROG2", .value = KEY_PROG2 }, + { .name = "KEY_PROG3", .value = KEY_PROG3 }, + { .name = "KEY_PROG4", .value = KEY_PROG4 }, + { .name = "KEY_PROGRAM", .value = KEY_PROGRAM }, + { .name = "KEY_PROPS", .value = KEY_PROPS }, + { .name = "KEY_PVR", .value = KEY_PVR }, + { .name = "KEY_Q", .value = KEY_Q }, + { .name = "KEY_QUESTION", .value = KEY_QUESTION }, + { .name = "KEY_R", .value = KEY_R }, + // { .name = "KEY_RADAR_OVERLAY", .value = KEY_RADAR_OVERLAY }, + { .name = "KEY_RADIO", .value = KEY_RADIO }, + { .name = "KEY_RECORD", .value = KEY_RECORD }, + { .name = "KEY_RED", .value = KEY_RED }, + { .name = "KEY_REDO", .value = KEY_REDO }, + { .name = "KEY_REFRESH", .value = KEY_REFRESH }, + { .name = "KEY_REPLY", .value = KEY_REPLY }, + { .name = "KEY_RESERVED", .value = KEY_RESERVED }, + { .name = "KEY_RESTART", .value = KEY_RESTART }, + { .name = "KEY_REWIND", .value = KEY_REWIND }, + { .name = "KEY_RFKILL", .value = KEY_RFKILL }, + { .name = "KEY_RIGHT", .value = KEY_RIGHT }, + { .name = "KEY_RIGHTALT", .value = KEY_RIGHTALT }, + { .name = "KEY_RIGHTBRACE", .value = KEY_RIGHTBRACE }, + { .name = "KEY_RIGHTCTRL", .value = KEY_RIGHTCTRL }, + { .name = "KEY_RIGHTMETA", .value = KEY_RIGHTMETA }, + { .name = "KEY_RIGHTSHIFT", .value = KEY_RIGHTSHIFT }, + { .name = "KEY_RIGHT_DOWN", .value = KEY_RIGHT_DOWN }, + { .name = "KEY_RIGHT_UP", .value = KEY_RIGHT_UP }, + { .name = "KEY_RO", .value = KEY_RO }, + { .name = "KEY_ROOT_MENU", .value = KEY_ROOT_MENU }, + { .name = "KEY_ROTATE_DISPLAY", .value = KEY_ROTATE_DISPLAY }, + { .name = "KEY_ROTATE_LOCK_TOGGLE", .value = KEY_ROTATE_LOCK_TOGGLE }, + { .name = "KEY_S", .value = KEY_S }, + { .name = "KEY_SAT", .value = KEY_SAT }, + { .name = "KEY_SAT2", .value = KEY_SAT2 }, + { .name = "KEY_SAVE", .value = KEY_SAVE }, + { .name = "KEY_SCALE", .value = KEY_SCALE }, + { .name = "KEY_SCREENSAVER", .value = KEY_SCREENSAVER }, + { .name = "KEY_SCROLLDOWN", .value = KEY_SCROLLDOWN }, + { .name = "KEY_SCROLLLOCK", .value = KEY_SCROLLLOCK }, + { .name = "KEY_SCROLLUP", .value = KEY_SCROLLUP }, + { .name = "KEY_SEARCH", .value = KEY_SEARCH }, + { .name = "KEY_SELECT", .value = KEY_SELECT }, + { .name = "KEY_SELECTIVE_SCREENSHOT", .value = KEY_SELECTIVE_SCREENSHOT }, + { .name = "KEY_SEMICOLON", .value = KEY_SEMICOLON }, + { .name = "KEY_SEND", .value = KEY_SEND }, + { .name = "KEY_SENDFILE", .value = KEY_SENDFILE }, + { .name = "KEY_SETUP", .value = KEY_SETUP }, + { .name = "KEY_SHOP", .value = KEY_SHOP }, + { .name = "KEY_SHUFFLE", .value = KEY_SHUFFLE }, + // { .name = "KEY_SIDEVU_SONAR", .value = KEY_SIDEVU_SONAR }, + // { .name = "KEY_SINGLE_RANGE_RADAR", .value = KEY_SINGLE_RANGE_RADAR }, + { .name = "KEY_SLASH", .value = KEY_SLASH }, + { .name = "KEY_SLEEP", .value = KEY_SLEEP }, + { .name = "KEY_SLOW", .value = KEY_SLOW }, + { .name = "KEY_SLOWREVERSE", .value = KEY_SLOWREVERSE }, + // { .name = "KEY_SOS", .value = KEY_SOS }, + { .name = "KEY_SOUND", .value = KEY_SOUND }, + { .name = "KEY_SPACE", .value = KEY_SPACE }, + { .name = "KEY_SPELLCHECK", .value = KEY_SPELLCHECK }, + { .name = "KEY_SPORT", .value = KEY_SPORT }, + { .name = "KEY_SPREADSHEET", .value = KEY_SPREADSHEET }, + { .name = "KEY_STOP", .value = KEY_STOP }, + { .name = "KEY_STOPCD", .value = KEY_STOPCD }, + { .name = "KEY_STOP_RECORD", .value = KEY_STOP_RECORD }, + { .name = "KEY_SUBTITLE", .value = KEY_SUBTITLE }, + { .name = "KEY_SUSPEND", .value = KEY_SUSPEND }, + { .name = "KEY_SWITCHVIDEOMODE", .value = KEY_SWITCHVIDEOMODE }, + { .name = "KEY_SYSRQ", .value = KEY_SYSRQ }, + { .name = "KEY_T", .value = KEY_T }, + { .name = "KEY_TAB", .value = KEY_TAB }, + { .name = "KEY_TAPE", .value = KEY_TAPE }, + { .name = "KEY_TASKMANAGER", .value = KEY_TASKMANAGER }, + { .name = "KEY_TEEN", .value = KEY_TEEN }, + { .name = "KEY_TEXT", .value = KEY_TEXT }, + { .name = "KEY_TIME", .value = KEY_TIME }, + { .name = "KEY_TITLE", .value = KEY_TITLE }, + { .name = "KEY_TOUCHPAD_OFF", .value = KEY_TOUCHPAD_OFF }, + { .name = "KEY_TOUCHPAD_ON", .value = KEY_TOUCHPAD_ON }, + { .name = "KEY_TOUCHPAD_TOGGLE", .value = KEY_TOUCHPAD_TOGGLE }, + // { .name = "KEY_TRADITIONAL_SONAR", .value = KEY_TRADITIONAL_SONAR }, + { .name = "KEY_TUNER", .value = KEY_TUNER }, + { .name = "KEY_TV", .value = KEY_TV }, + { .name = "KEY_TV2", .value = KEY_TV2 }, + { .name = "KEY_TWEN", .value = KEY_TWEN }, + { .name = "KEY_U", .value = KEY_U }, + { .name = "KEY_UNDO", .value = KEY_UNDO }, + { .name = "KEY_UNKNOWN", .value = KEY_UNKNOWN }, + { .name = "KEY_UNMUTE", .value = KEY_UNMUTE }, + { .name = "KEY_UP", .value = KEY_UP }, + { .name = "KEY_UWB", .value = KEY_UWB }, + { .name = "KEY_V", .value = KEY_V }, + { .name = "KEY_VCR", .value = KEY_VCR }, + { .name = "KEY_VCR2", .value = KEY_VCR2 }, + { .name = "KEY_VENDOR", .value = KEY_VENDOR }, + { .name = "KEY_VIDEO", .value = KEY_VIDEO }, + { .name = "KEY_VIDEOPHONE", .value = KEY_VIDEOPHONE }, + { .name = "KEY_VIDEO_NEXT", .value = KEY_VIDEO_NEXT }, + { .name = "KEY_VIDEO_PREV", .value = KEY_VIDEO_PREV }, + { .name = "KEY_VOD", .value = KEY_VOD }, + { .name = "KEY_VOICECOMMAND", .value = KEY_VOICECOMMAND }, + { .name = "KEY_VOICEMAIL", .value = KEY_VOICEMAIL }, + { .name = "KEY_VOLUMEDOWN", .value = KEY_VOLUMEDOWN }, + { .name = "KEY_VOLUMEUP", .value = KEY_VOLUMEUP }, + { .name = "KEY_W", .value = KEY_W }, + { .name = "KEY_WAKEUP", .value = KEY_WAKEUP }, + { .name = "KEY_WLAN", .value = KEY_WLAN }, + { .name = "KEY_WORDPROCESSOR", .value = KEY_WORDPROCESSOR }, + { .name = "KEY_WPS_BUTTON", .value = KEY_WPS_BUTTON }, + { .name = "KEY_WWAN", .value = KEY_WWAN }, + { .name = "KEY_WWW", .value = KEY_WWW }, + { .name = "KEY_X", .value = KEY_X }, + { .name = "KEY_XFER", .value = KEY_XFER }, + { .name = "KEY_Y", .value = KEY_Y }, + { .name = "KEY_YELLOW", .value = KEY_YELLOW }, + { .name = "KEY_YEN", .value = KEY_YEN }, + { .name = "KEY_Z", .value = KEY_Z }, + { .name = "KEY_ZENKAKUHANKAKU", .value = KEY_ZENKAKUHANKAKU }, + { .name = "KEY_ZOOMIN", .value = KEY_ZOOMIN }, + { .name = "KEY_ZOOMOUT", .value = KEY_ZOOMOUT }, + { .name = "KEY_ZOOMRESET", .value = KEY_ZOOMRESET }, + { .name = "LED_CAPSL", .value = LED_CAPSL }, + { .name = "LED_CHARGING", .value = LED_CHARGING }, + { .name = "LED_COMPOSE", .value = LED_COMPOSE }, + { .name = "LED_KANA", .value = LED_KANA }, + { .name = "LED_MAIL", .value = LED_MAIL }, + { .name = "LED_MAX", .value = LED_MAX }, + { .name = "LED_MISC", .value = LED_MISC }, + { .name = "LED_MUTE", .value = LED_MUTE }, + { .name = "LED_NUML", .value = LED_NUML }, + { .name = "LED_SCROLLL", .value = LED_SCROLLL }, + { .name = "LED_SLEEP", .value = LED_SLEEP }, + { .name = "LED_SUSPEND", .value = LED_SUSPEND }, + { .name = "MSC_GESTURE", .value = MSC_GESTURE }, + { .name = "MSC_MAX", .value = MSC_MAX }, + { .name = "MSC_PULSELED", .value = MSC_PULSELED }, + { .name = "MSC_RAW", .value = MSC_RAW }, + { .name = "MSC_SCAN", .value = MSC_SCAN }, + { .name = "MSC_SERIAL", .value = MSC_SERIAL }, + { .name = "MSC_TIMESTAMP", .value = MSC_TIMESTAMP }, + { .name = "REL_DIAL", .value = REL_DIAL }, + { .name = "REL_HWHEEL", .value = REL_HWHEEL }, + { .name = "REL_HWHEEL_HI_RES", .value = REL_HWHEEL_HI_RES }, + { .name = "REL_MAX", .value = REL_MAX }, + { .name = "REL_MISC", .value = REL_MISC }, + { .name = "REL_RESERVED", .value = REL_RESERVED }, + { .name = "REL_RX", .value = REL_RX }, + { .name = "REL_RY", .value = REL_RY }, + { .name = "REL_RZ", .value = REL_RZ }, + { .name = "REL_WHEEL", .value = REL_WHEEL }, + { .name = "REL_WHEEL_HI_RES", .value = REL_WHEEL_HI_RES }, + { .name = "REL_X", .value = REL_X }, + { .name = "REL_Y", .value = REL_Y }, + { .name = "REL_Z", .value = REL_Z }, + { .name = "REP_DELAY", .value = REP_DELAY }, + { .name = "REP_MAX", .value = REP_MAX }, + { .name = "REP_PERIOD", .value = REP_PERIOD }, + { .name = "SND_BELL", .value = SND_BELL }, + { .name = "SND_CLICK", .value = SND_CLICK }, + { .name = "SND_MAX", .value = SND_MAX }, + { .name = "SND_TONE", .value = SND_TONE }, + { .name = "SW_CAMERA_LENS_COVER", .value = SW_CAMERA_LENS_COVER }, + { .name = "SW_DOCK", .value = SW_DOCK }, + { .name = "SW_FRONT_PROXIMITY", .value = SW_FRONT_PROXIMITY }, + { .name = "SW_HEADPHONE_INSERT", .value = SW_HEADPHONE_INSERT }, + { .name = "SW_JACK_PHYSICAL_INSERT", .value = SW_JACK_PHYSICAL_INSERT }, + { .name = "SW_KEYPAD_SLIDE", .value = SW_KEYPAD_SLIDE }, + { .name = "SW_LID", .value = SW_LID }, + { .name = "SW_LINEIN_INSERT", .value = SW_LINEIN_INSERT }, + { .name = "SW_LINEOUT_INSERT", .value = SW_LINEOUT_INSERT }, + { .name = "SW_MACHINE_COVER", .value = SW_MACHINE_COVER }, + { .name = "SW_MAX", .value = SW_MAX }, + { .name = "SW_MICROPHONE_INSERT", .value = SW_MICROPHONE_INSERT }, + { .name = "SW_MUTE_DEVICE", .value = SW_MUTE_DEVICE }, + { .name = "SW_PEN_INSERTED", .value = SW_PEN_INSERTED }, + { .name = "SW_RFKILL_ALL", .value = SW_RFKILL_ALL }, + { .name = "SW_ROTATE_LOCK", .value = SW_ROTATE_LOCK }, + { .name = "SW_TABLET_MODE", .value = SW_TABLET_MODE }, + { .name = "SW_VIDEOOUT_INSERT", .value = SW_VIDEOOUT_INSERT }, + { .name = "SYN_CONFIG", .value = SYN_CONFIG }, + { .name = "SYN_DROPPED", .value = SYN_DROPPED }, + { .name = "SYN_MAX", .value = SYN_MAX }, + { .name = "SYN_MT_REPORT", .value = SYN_MT_REPORT }, + { .name = "SYN_REPORT", .value = SYN_REPORT }, +}; + +static const struct name_entry prop_names[] = { + { .name = "INPUT_PROP_ACCELEROMETER", .value = INPUT_PROP_ACCELEROMETER }, + { .name = "INPUT_PROP_BUTTONPAD", .value = INPUT_PROP_BUTTONPAD }, + { .name = "INPUT_PROP_DIRECT", .value = INPUT_PROP_DIRECT }, + { .name = "INPUT_PROP_MAX", .value = INPUT_PROP_MAX }, + { .name = "INPUT_PROP_POINTER", .value = INPUT_PROP_POINTER }, + { .name = "INPUT_PROP_POINTING_STICK", .value = INPUT_PROP_POINTING_STICK }, + { .name = "INPUT_PROP_SEMI_MT", .value = INPUT_PROP_SEMI_MT }, + { .name = "INPUT_PROP_TOPBUTTONPAD", .value = INPUT_PROP_TOPBUTTONPAD }, +}; + +#endif /* EVENT_NAMES_H */ diff --git a/usr.sbin/moused/moused/moused.8 b/usr.sbin/moused/moused/moused.8 new file mode 100644 index 000000000000..2483f8a04b2a --- /dev/null +++ b/usr.sbin/moused/moused/moused.8 @@ -0,0 +1,561 @@ +.\" SPDX-License-Identifier: BSD-4-Clause +.\" +.\" Copyright (c) 1996 Mike Pritchard <mpp@FreeBSD.org> +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" 3. All advertising materials mentioning features or use of this software +.\" must display the following acknowledgement: +.\" This product includes software developed by Mike Pritchard. +.\" 4. Neither the name of the author nor the names of its contributors +.\" may be used to endorse or promote products derived from this software +.\" without specific prior written permission. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.Dd June 14, 2025 +.Dt MOUSED 8 +.Os +.Sh NAME +.Nm moused +.Nd pass mouse data to the console driver +.Sh SYNOPSIS +.Nm +.Op Fl dfg +.Op Fl I Ar file +.Op Fl F Ar rate +.Op Fl r Ar resolution +.Op Fl VH Op Fl U Ar distance Fl L Ar distance +.Op Fl A Ar exp Ns Op , Ns Ar offset +.Op Fl a Ar X Ns Op , Ns Ar Y +.Op Fl C Ar threshold +.Op Fl m Ar N=M +.Op Fl w Ar N +.Op Fl z Ar target +.Op Fl t Ar interfacetype +.Op Fl l Ar level +.Op Fl 3 Op Fl E Ar timeout +.Op Fl T Ar distance Ns Op , Ns Ar time Ns Op , Ns Ar after +.Fl p Ar port +.Pp +.Nm +.Op Fl d +.Fl p Ar port +.Fl i Ar info +.Sh DESCRIPTION +The +.Nm +utility and the console driver work together to support +mouse operation in the text console and user programs. +They virtualize the mouse and provide user programs with mouse data +in the standard format +(see +.Xr sysmouse 4 ) . +.Pp +The mouse daemon listens to the specified port for mouse data, +interprets and then passes it via ioctls to the console driver. +Supported data interfaces are +.Qq input event device +AKA evdev and +.Xr sysmouse 4 +level 1. +The mouse daemon +reports translation movement, button press/release +events and movement of the roller or the wheel if available. +The roller/wheel movement is reported as +.Dq Z +axis movement. +.Pp +The console driver will display the mouse pointer on the screen +and provide cut and paste functions if the mouse pointer is enabled +in the virtual console via +.Xr vidcontrol 1 . +If +.Xr sysmouse 4 +is opened by the user program, the console driver also passes the mouse +data to the device so that the user program will see it. +.Pp +If the mouse daemon receives the signal +.Dv SIGHUP , +it will reopen the mouse port and reinitialize itself. +Useful if +the mouse is attached/detached while the system is suspended. +.Pp +If the mouse daemon receives the signal +.Dv SIGUSR1 , +it will stop passing mouse events. +Sending the signal +.Dv SIGUSR1 +again will resume passing mouse events. +Useful if your typing on a laptop is +interrupted by accidentally touching the mouse pad. +.Pp +The following options are available: +.Bl -tag -width indent +.It Fl 3 +Emulate the third (middle) button for 2-button mice. +It is emulated +by pressing the left and right physical buttons simultaneously. +.It Fl C Ar threshold +Set double click speed as the maximum interval in msec between button clicks. +Without this option, the default value of 500 msec will be assumed. +This option will have effect only on the cut and paste operations +in the text mode console. +The user program which is reading mouse data +via +.Xr sysmouse 4 +will not be affected. +.It Fl E Ar timeout +When the third button emulation is enabled +(see above), +the +.Nm +utility waits +.Ar timeout +msec at most before deciding whether two buttons are being pressed +simultaneously. +The default timeout is 100 msec. +.It Fl F Ar rate +Only for +.Xr sysmouse 4 +interface. +Set the report rate (reports/sec) of the device if supported. +.It Fl L Ar distance +When +.Dq Virtual Scrolling +is enabled, the +.Fl L +option can be used to set the +.Ar distance +(in pixels) that the mouse must move before a scroll event +is generated. This effectively controls the scrolling speed. +The default +.Ar distance +is 2 pixels. +.It Fl H +Enable +.Dq Horizontal Virtual Scrolling . +With this option set, holding the middle mouse +button down will cause motion to be interpreted as +horizontal scrolling. +Use the +.Fl U +option to set the distance the mouse must move before the scrolling mode is +activated and the +.Fl L +option to set the scrolling speed. +This option may be used with or without the +.Fl V +option. +.It Fl I Ar file +Write the process id of the +.Nm +utility in the specified file. +Without this option, the process id will be stored in +.Pa /var/run/moused.pid . +.It Fl T Ar distance Ns Op , Ns Ar time Ns Op , Ns Ar after +Terminate drift. +Use this option if mouse pointer slowly wanders when mouse is not moved. +Movements up to +.Ar distance +(for example 4) pixels (X+Y) in +.Ar time +msec (default 500) are ignored, except during +.Ar after +msec (default 4000) since last real mouse movement. +.It Fl V +Enable +.Dq Virtual Scrolling . +With this option set, holding the middle mouse +button down will cause motion to be interpreted as scrolling. +Use the +.Fl U +option to set the distance the mouse must move before the scrolling mode is +activated and the +.Fl L +option to set the scrolling speed. +.It Fl U Ar distance +When +.Dq Virtual Scrolling +is enabled, the +.Fl U +option can be used to set the +.Ar distance +(in pixels) that the mouse must move before the scrolling +mode is activated. +The default +.Ar distance +is 3 pixels. +.It Fl A Ar exp Ns Op , Ns Ar offset +Apply exponential (dynamic) acceleration to mouse movements: +the faster you move the mouse, the more it will be accelerated. +That means that small mouse movements are not accelerated, +so they are still very accurate, while a faster movement will +drive the pointer quickly across the screen. +.Pp +The +.Ar exp +value specifies the exponent, which is basically +the amount of acceleration. Useful values are in the +range 1.1 to 2.0, but it depends on your mouse hardware +and your personal preference. A value of 1.0 means no +exponential acceleration. A value of 2.0 means squared +acceleration (i.e. if you move the mouse twice as fast, +the pointer will move four times as fast on the screen). +Values beyond 2.0 are possible but not recommended. +A good value to start is probably 1.5. +.Pp +The optional +.Ar offset +value specifies the distance at which the acceleration +begins. The default is 1.0, which means that the +acceleration is applied to movements larger than one unit. +If you specify a larger value, it takes more speed for +the acceleration to kick in, i.e. the speed range for +small and accurate movements is wider. +Usually the default should be sufficient, but if you're +not satisfied with the behaviour, try a value of 2.0. +.Pp +Note that the +.Fl A +option interacts badly with the X server's own acceleration, +which doesn't work very well anyway. Therefore it is +recommended to switch it off if necessary: +.Dq xset m 1 . +.It Fl a Ar X Ns Op , Ns Ar Y +Accelerate or decelerate the mouse input. +This is a linear acceleration only. +Values less than 1.0 slow down movement, values greater than 1.0 speed it +up. +Specifying only one value sets the acceleration for both axes. +.Pp +You can use the +.Fl a +and +.Fl A +options at the same time to have the combined effect +of linear and exponential acceleration. +.It Fl d +Enable debugging messages. +.It Fl f +Do not become a daemon and instead run as a foreground process. +Useful for testing and debugging. +.It Fl g +Only for evdev interface. +Become the sole recipient of all incoming input events. +This prevents other processes from getting input events on the device. +.It Fl i Ar info +Print specified information and quit. +Available pieces of +information are: +.Pp +.Bl -tag -compact -width modelxxx +.It Ar port +Port (device file) name, i.e.\& +.Pa /dev/input/event0 , +.Pa /dev/ums0 +and +.Pa /dev/psm0 . +.It Ar if +Interface type: +.Dq evdev +or +.Dq sysmouse . +.It Ar type +Device type: +.Dq mouse +or +.Dq touchpad . +.It Ar model +Mouse model. +.It Ar all +All of the above items. +Print port, type and model in this order +in one line. +.El +.Pp +If the +.Nm +utility cannot determine the requested information, it prints +.Dq Li unknown +or +.Dq Li generic . +.It Fl l Ar level +Ignored. +Used for compatibiliy with legacy +.Nm . +.It Fl m Ar N=M +Assign the physical button +.Ar M +to the logical button +.Ar N . +You may specify as many instances of this option as you like. +More than one physical button may be assigned to a logical button at the +same time. +In this case the logical button will be down, +if either of the assigned physical buttons is held down. +Do not put space around +.Ql = . +.It Fl p Ar port +Use +.Ar port +to communicate with the mouse. +.It Fl r Ar resolution +Only for +.Xr sysmouse 4 +interface. +Set the resolution of the device; in Dots Per Inch, or +.Ar low , +.Ar medium-low , +.Ar medium-high +or +.Ar high . +This option may not be supported by all the device. +.It Fl t Ar type +Force the interface type of the mouse attached to the port. +You may explicitly specify a type listed below, or use +.Ar auto +to let the +.Nm +utility automatically select an appropriate protocol for the given +character device. +If you entirely omit this option in the command line, +.Fl t Ar auto +is assumed. +.Pp +Valid types for this option are listed below. +.Bl -tag -compact -width systemmouse +.It Ar evdev +Input event device usualy residing in +.Pa /dev/input . +.It Ar sysmouse +Traditional protocol used by e.g. +.Xr ums 4 +and +.Xr psm 4 +drivers. +.El +.Pp +Note that this option restricts usage of the given port rather then gives +a hint. +.It Fl q Ar config +Path to configuration file. +.It Fl Q Ar quirks +Path to quirks directory. +.It Fl w Ar N +Make the physical button +.Ar N +act as the wheel mode button. +While this button is pressed, X and Y axis movement is reported to be zero +and the Y axis movement is mapped to Z axis. +You may further map the Z axis movement to virtual buttons by the +.Fl z +option below. +.It Fl z Ar target +Map Z axis (roller/wheel) movement to another axis or to virtual buttons. +Valid +.Ar target +maybe: +.Bl -tag -compact -width x__ +.It Ar x +.It Ar y +X or Y axis movement will be reported when the Z axis movement is detected. +.It Ar N +Report down events for the virtual buttons +.Ar N +and +.Ar N+1 +respectively when negative and positive Z axis movement +is detected. +There do not need to be physical buttons +.Ar N +and +.Ar N+1 . +Note that mapping to logical buttons is carried out after mapping +from the Z axis movement to the virtual buttons is done. +.It Ar N1 N2 +Report down events for the virtual buttons +.Ar N1 +and +.Ar N2 +respectively when negative and positive Z axis movement +is detected. +.It Ar N1 N2 N3 N4 +This is useful for the mouse with two wheels of which +the second wheel is used to generate horizontal scroll action, +and for the mouse which has a knob or a stick which can detect +the horizontal force applied by the user. +.Pp +The motion of the second wheel will be mapped to the buttons +.Ar N3 , +for the negative direction, and +.Ar N4 , +for the positive direction. +If the buttons +.Ar N3 +and +.Ar N4 +actually exist in this mouse, their actions will not be detected. +.Pp +Note that horizontal movement or second roller/wheel movement may not +always be detected, +because there appears to be no accepted standard as to how it is encoded. +.Pp +Note also that some mice think left is the negative horizontal direction; +others may think otherwise. +Moreover, there are some mice whose two wheels are both mounted vertically, +and the direction of the second vertical wheel does not match the +first one. +.El +.Ss Multiple Mice +The +.Nm +utility may operate in 2 different modes depending on the value of +.Fl p +option. +When started with +.Fl p Ar auto +option specified the +.Nm +handles all recognized pointing devices in a single instance. +Device hotplug is supported through +.Xr devd 8 . +Only evdev interface is available in this mode. +When started with +.Fl p Ar <selected_port> +option specified the +.Nm +handles single device located at +.Ar <selected_port> . +Both evdev and +.Xr sysmouse 4 +level 1 interfaces are available in this mode. +Multiple +.Nm +instances may be run simultaneously. +.Sh FILES +.Bl -tag -width /var/run/moused.pid -compact +.It Pa /dev/consolectl +device to control the console +.It Pa /dev/input/event%d +Input event device +.It Pa /dev/psm%d +PS/2 mouse driver +.It Pa /dev/sysmouse +virtualized mouse driver +.It Pa /dev/ums%d +USB mouse driver +.It Pa /var/run/moused.pid +process id of the currently running +.Nm +utility +.El +.Sh EXAMPLES +.Bd -literal -offset indent +moused -p auto +vidcontrol -m on +.Ed +.Pp +Start +.Nm +utility to handle all evdev pointing devices automatically with hotplug +support. +And enable the mouse pointer in the text console after than. +The daemon can be started without the +.Fl p +option as well. +.Pp +.Dl "moused -f -d -g -p /dev/input/event0" +.Ed +.Pp +Start the mouse daemon on the +.Pa /dev/input/event0 +in the exclusive foreground debug mode. +Exclusive mode may disable mouse in Xorg session. +.Pp +.Dl "moused -p /dev/input/event0 -m 1=3 -m 3=1" +.Pp +Assign the physical button 3 (right button) to the logical button 1 +(logical left) and the physical button 1 (left) to the logical +button 3 (logical right). +This will effectively swap the left and right buttons. +.Pp +.Dl "moused -p /dev/input/event0 -z 4" +.Pp +Report negative Z axis movement (i.e., mouse wheel) as the button 4 pressed +and positive Z axis movement (i.e., mouse wheel) as the button 5 pressed. +.Pp +If you add +.Pp +.Dl "ALL ALL = NOPASSWD: /usr/bin/killall -USR1 moused" +.Pp +to your +.Pa /usr/local/etc/sudoers +file, and bind +.Pp +.Dl "killall -USR1 moused" +.Pp +to a key in your window manager, you can suspend mouse events on your laptop if +you keep brushing over the mouse pad while typing. +.Sh SEE ALSO +.Xr moused.conf 5 , +.Xr kill 1 , +.Xr vidcontrol 1 , +.Xr xset 1 , +.Xr keyboard 4 , +.Xr psm 4 , +.Xr sysmouse 4 , +.Xr ums 4 , +.Xr devd 8 +.Sh HISTORY +The +.Nm +utility first appeared in +.Fx 2.2 . +It was rewriten to support multiple input event devices in +.Fx 15.0 . +.Sh AUTHORS +.An -nosplit +The +.Nm +utility was originally written by +.An Michael Smith Aq Mt msmith@FreeBSD.org . +This manual page was written by +.An Mike Pritchard Aq Mt mpp@FreeBSD.org . +The command and manual page have since been updated by +.An Kazutaka Yokota Aq Mt yokota@FreeBSD.org . +Multiple input event devices support was added by +.An Vladimir Kondratyev Aq Mt wulf@FreeBSD.org . +.Sh CAVEATS +Cut and paste functions in the virtual console assume that there +are three buttons on the mouse. +The logical button 1 (logical left) selects a region of text in the +console and copies it to the cut buffer. +The logical button 3 (logical right) extends the selected region. +The logical button 2 (logical middle) pastes the selected text +at the text cursor position. +If the mouse has only two buttons, the middle, `paste' button +is not available. +To obtain the paste function, use the +.Fl 3 +option to emulate the middle button, or use the +.Fl m +option to assign the physical right button to the logical middle button: +.Dq Fl m Li 2=3 . diff --git a/usr.sbin/moused/moused/moused.c b/usr.sbin/moused/moused/moused.c new file mode 100644 index 000000000000..36cb8cc27eab --- /dev/null +++ b/usr.sbin/moused/moused/moused.c @@ -0,0 +1,3220 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 1997-2000 Kazutaka YOKOTA <yokota@FreeBSD.org> + * Copyright (c) 2004-2008 Philip Paeps <philip@FreeBSD.org> + * Copyright (c) 2008 Jean-Sebastien Pedron <dumbbell@FreeBSD.org> + * Copyright (c) 2021,2024 Vladimir Kondratyev <wulf@FreeBSD.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * MOUSED.C + * + * Mouse daemon : listens to a evdev device node for mouse data stream, + * interprets data and passes ioctls off to the console driver. + * + */ + +#include <sys/param.h> +#include <sys/consio.h> +#include <sys/event.h> +#include <sys/mouse.h> +#include <sys/socket.h> +#include <sys/time.h> +#include <sys/un.h> + +#include <dev/evdev/input.h> + +#include <bitstring.h> +#include <ctype.h> +#include <dirent.h> +#include <err.h> +#include <errno.h> +#include <fcntl.h> +#include <fnmatch.h> +#include <libutil.h> +#include <math.h> +#include <setjmp.h> +#include <signal.h> +#include <stdarg.h> +#include <stdbool.h> +#include <stddef.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <syslog.h> +#include <unistd.h> + +#include "util.h" +#include "quirks.h" + +/* + * bitstr_t implementation must be identical to one found in EVIOCG* + * libevdev ioctls. Our bitstring(3) API is compatible since r299090. + */ +_Static_assert(sizeof(bitstr_t) == sizeof(unsigned long), + "bitstr_t size mismatch"); + +#define MAX_CLICKTHRESHOLD 2000 /* 2 seconds */ +#define MAX_BUTTON2TIMEOUT 2000 /* 2 seconds */ +#define DFLT_CLICKTHRESHOLD 500 /* 0.5 second */ +#define DFLT_BUTTON2TIMEOUT 100 /* 0.1 second */ +#define DFLT_SCROLLTHRESHOLD 3 /* 3 pixels */ +#define DFLT_SCROLLSPEED 2 /* 2 pixels */ +#define DFLT_MOUSE_RESOLUTION 8 /* dpmm, == 200dpi */ +#define DFLT_TPAD_RESOLUTION 40 /* dpmm, typical X res for Synaptics */ +#define DFLT_LINEHEIGHT 10 /* pixels per line */ + +/* Abort 3-button emulation delay after this many movement events. */ +#define BUTTON2_MAXMOVE 3 + +#define MOUSE_XAXIS (-1) +#define MOUSE_YAXIS (-2) + +#define ZMAP_MAXBUTTON 4 /* Number of zmap items */ +#define MAX_FINGERS 10 + +#define ID_NONE 0 +#define ID_PORT 1 +#define ID_IF 2 +#define ID_TYPE 4 +#define ID_MODEL 8 +#define ID_ALL (ID_PORT | ID_IF | ID_TYPE | ID_MODEL) + +/* Operations on timespecs */ +#define tsclr(tvp) timespecclear(tvp) +#define tscmp(tvp, uvp, cmp) timespeccmp(tvp, uvp, cmp) +#define tssub(tvp, uvp, vvp) timespecsub(tvp, uvp, vvp) +#define msec2ts(msec) (struct timespec) { \ + .tv_sec = (msec) / 1000, \ + .tv_nsec = (msec) % 1000 * 1000000, \ +} +static inline struct timespec +tsaddms(struct timespec* tsp, u_int ms) +{ + struct timespec ret; + + ret = msec2ts(ms); + timespecadd(tsp, &ret, &ret); + + return (ret); +}; + +static inline struct timespec +tssubms(struct timespec* tsp, u_int ms) +{ + struct timespec ret; + + ret = msec2ts(ms); + timespecsub(tsp, &ret, &ret); + + return (ret); +}; + +#define debug(...) do { \ + if (debug && nodaemon) \ + warnx(__VA_ARGS__); \ +} while (0) + +#define logerr(e, ...) do { \ + log_or_warn(LOG_DAEMON | LOG_ERR, errno, __VA_ARGS__); \ + exit(e); \ +} while (0) + +#define logerrx(e, ...) do { \ + log_or_warn(LOG_DAEMON | LOG_ERR, 0, __VA_ARGS__); \ + exit(e); \ +} while (0) + +#define logwarn(...) \ + log_or_warn(LOG_DAEMON | LOG_WARNING, errno, __VA_ARGS__) + +#define logwarnx(...) \ + log_or_warn(LOG_DAEMON | LOG_WARNING, 0, __VA_ARGS__) + +/* structures */ + +enum gesture { + GEST_IGNORE, + GEST_ACCUMULATE, + GEST_MOVE, + GEST_VSCROLL, + GEST_HSCROLL, +}; + +/* interfaces (the table must be ordered by DEVICE_IF_XXX in util.h) */ +static const struct { + const char *name; + size_t p_size; +} rifs[] = { + [DEVICE_IF_EVDEV] = { "evdev", sizeof(struct input_event) }, + [DEVICE_IF_SYSMOUSE] = { "sysmouse", MOUSE_SYS_PACKETSIZE }, +}; + +/* types (the table must be ordered by DEVICE_TYPE_XXX in util.h) */ +static const char *rnames[] = { + [DEVICE_TYPE_MOUSE] = "mouse", + [DEVICE_TYPE_POINTINGSTICK] = "pointing stick", + [DEVICE_TYPE_TOUCHPAD] = "touchpad", + [DEVICE_TYPE_TOUCHSCREEN] = "touchscreen", + [DEVICE_TYPE_TABLET] = "tablet", + [DEVICE_TYPE_TABLET_PAD] = "tablet pad", + [DEVICE_TYPE_KEYBOARD] = "keyboard", + [DEVICE_TYPE_JOYSTICK] = "joystick", +}; + +/* Default phisical to logical button mapping */ +static const u_int default_p2l[MOUSE_MAXBUTTON] = { + MOUSE_BUTTON1DOWN, MOUSE_BUTTON2DOWN, MOUSE_BUTTON3DOWN, MOUSE_BUTTON4DOWN, + MOUSE_BUTTON5DOWN, MOUSE_BUTTON6DOWN, MOUSE_BUTTON7DOWN, MOUSE_BUTTON8DOWN, + 0x00000100, 0x00000200, 0x00000400, 0x00000800, + 0x00001000, 0x00002000, 0x00004000, 0x00008000, + 0x00010000, 0x00020000, 0x00040000, 0x00080000, + 0x00100000, 0x00200000, 0x00400000, 0x00800000, + 0x01000000, 0x02000000, 0x04000000, 0x08000000, + 0x10000000, 0x20000000, 0x40000000, +}; + +struct tpcaps { + bool is_clickpad; + bool is_topbuttonpad; + bool is_mt; + bool cap_touch; + bool cap_pressure; + bool cap_width; + int min_x; + int max_x; + int min_y; + int max_y; + int res_x; /* dots per mm */ + int res_y; /* dots per mm */ + int min_p; + int max_p; +}; + +struct tpinfo { + bool two_finger_scroll; /* Enable two finger scrolling */ + bool natural_scroll; /* Enable natural scrolling */ + bool three_finger_drag; /* Enable dragging with three fingers */ + u_int min_pressure_hi; /* Min pressure to start an action */ + u_int min_pressure_lo; /* Min pressure to continue an action */ + u_int max_pressure; /* Maximum pressure to detect palm */ + u_int max_width; /* Max finger width to detect palm */ + int margin_top; /* Top margin */ + int margin_right; /* Right margin */ + int margin_bottom; /* Bottom margin */ + int margin_left; /* Left margin */ + u_int tap_timeout; /* */ + u_int tap_threshold; /* Minimum pressure to detect a tap */ + double tap_max_delta; /* Length of segments above which a tap is ignored */ + u_int taphold_timeout; /* Maximum elapsed time between two taps to consider a tap-hold action */ + double vscroll_ver_area; /* Area reserved for vertical virtual scrolling */ + double vscroll_hor_area; /* Area reserved for horizontal virtual scrolling */ + double vscroll_min_delta; /* Minimum movement to consider virtual scrolling */ + int softbuttons_y; /* Vertical size of softbuttons area */ + int softbutton2_x; /* Horizontal offset of 2-nd softbutton left edge */ + int softbutton3_x; /* Horizontal offset of 3-rd softbutton left edge */ +}; + +struct tpstate { + int start_x; + int start_y; + int prev_x; + int prev_y; + int prev_nfingers; + int fingers_nb; + int tap_button; + bool fingerdown; + bool in_taphold; + int in_vscroll; + u_int zmax; /* maximum pressure value */ + struct timespec taptimeout; /* tap timeout for touchpads */ + int idletimeout; + bool timer_armed; +}; + +struct tpad { + struct tpcaps hw; /* touchpad capabilities */ + struct tpinfo info; /* touchpad gesture parameters */ + struct tpstate gest; /* touchpad gesture state */ +}; + +struct finger { + int x; + int y; + int p; + int w; + int id; /* id=0 - no touch, id>1 - touch id */ +}; + +struct evstate { + int buttons; + /* Relative */ + int dx; + int dy; + int dz; + int dw; + int acc_dx; + int acc_dy; + /* Absolute single-touch */ + int nfingers; + struct finger st; + /* Absolute multi-touch */ + int slot; + struct finger mt[MAX_FINGERS]; + bitstr_t bit_decl(key_ignore, KEY_CNT); + bitstr_t bit_decl(rel_ignore, REL_CNT); + bitstr_t bit_decl(abs_ignore, ABS_CNT); + bitstr_t bit_decl(prop_ignore, INPUT_PROP_CNT); +}; + +/* button status */ +struct button_state { + int count; /* 0: up, 1: single click, 2: double click,... */ + struct timespec ts; /* timestamp on the last button event */ +}; + +struct btstate { + u_int wmode; /* wheel mode button number */ + u_int clickthreshold; /* double click speed in msec */ + struct button_state bstate[MOUSE_MAXBUTTON]; /* button state */ + struct button_state *mstate[MOUSE_MAXBUTTON];/* mapped button st.*/ + u_int p2l[MOUSE_MAXBUTTON];/* phisical to logical button mapping */ + int zmap[ZMAP_MAXBUTTON];/* MOUSE_{X|Y}AXIS or a button number */ + struct button_state zstate[ZMAP_MAXBUTTON]; /* Z/W axis state */ +}; + +/* state machine for 3 button emulation */ + +enum bt3_emul_state { + S0, /* start */ + S1, /* button 1 delayed down */ + S2, /* button 3 delayed down */ + S3, /* both buttons down -> button 2 down */ + S4, /* button 1 delayed up */ + S5, /* button 1 down */ + S6, /* button 3 down */ + S7, /* both buttons down */ + S8, /* button 3 delayed up */ + S9, /* button 1 or 3 up after S3 */ +}; + +#define A(b1, b3) (((b1) ? 2 : 0) | ((b3) ? 1 : 0)) +#define A_TIMEOUT 4 +#define S_DELAYED(st) (states[st].s[A_TIMEOUT] != (st)) + +static const struct { + enum bt3_emul_state s[A_TIMEOUT + 1]; + int buttons; + int mask; + bool timeout; +} states[10] = { + /* S0 */ + { { S0, S2, S1, S3, S0 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), false }, + /* S1 */ + { { S4, S2, S1, S3, S5 }, 0, ~MOUSE_BUTTON1DOWN, false }, + /* S2 */ + { { S8, S2, S1, S3, S6 }, 0, ~MOUSE_BUTTON3DOWN, false }, + /* S3 */ + { { S0, S9, S9, S3, S3 }, MOUSE_BUTTON2DOWN, ~0, false }, + /* S4 */ + { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON1DOWN, ~0, true }, + /* S5 */ + { { S0, S2, S5, S7, S5 }, MOUSE_BUTTON1DOWN, ~0, false }, + /* S6 */ + { { S0, S6, S1, S7, S6 }, MOUSE_BUTTON3DOWN, ~0, false }, + /* S7 */ + { { S0, S6, S5, S7, S7 }, MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN, ~0, false }, + /* S8 */ + { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON3DOWN, ~0, true }, + /* S9 */ + { { S0, S9, S9, S3, S9 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), false }, +}; + +struct e3bstate { + bool enabled; + u_int button2timeout; /* 3 button emulation timeout */ + enum bt3_emul_state mouse_button_state; + struct timespec mouse_button_state_ts; + int mouse_move_delayed; + bool timer_armed; +}; + +enum scroll_state { + SCROLL_NOTSCROLLING, + SCROLL_PREPARE, + SCROLL_SCROLLING, +}; + +struct scroll { + bool enable_vert; + bool enable_hor; + u_int threshold; /* Movement distance before virtual scrolling */ + u_int speed; /* Movement distance to rate of scrolling */ + enum scroll_state state; + int movement; + int hmovement; +}; + +struct drift_xy { + int x; + int y; +}; +struct drift { + u_int distance; /* max steps X+Y */ + u_int time; /* ms */ + struct timespec time_ts; + struct timespec twotime_ts; /* 2*drift_time */ + u_int after; /* ms */ + struct timespec after_ts; + bool terminate; + struct timespec current_ts; + struct timespec last_activity; + struct timespec since; + struct drift_xy last; /* steps in last drift_time */ + struct drift_xy previous; /* steps in prev. drift_time */ +}; + +struct accel { + bool is_exponential; /* Exponential acceleration is enabled */ + double accelx; /* Acceleration in the X axis */ + double accely; /* Acceleration in the Y axis */ + double accelz; /* Acceleration in the wheel axis */ + double expoaccel; /* Exponential acceleration */ + double expoffset; /* Movement offset for exponential accel. */ + double remainx; /* Remainder on X, Y and wheel axis, ... */ + double remainy; /* ... respectively to compensate */ + double remainz; /* ... for rounding errors. */ + double lastlength[3]; +}; + +struct rodent { + struct device dev; /* Device */ + int mfd; /* mouse file descriptor */ + struct btstate btstate; /* button status */ + struct e3bstate e3b; /* 3 button emulation state */ + struct drift drift; + struct accel accel; /* cursor acceleration state */ + struct scroll scroll; /* virtual scroll state */ + struct tpad tp; /* touchpad info and gesture state */ + struct evstate ev; /* event device state */ + SLIST_ENTRY(rodent) next; +}; + +/* global variables */ + +static SLIST_HEAD(rodent_list, rodent) rodents = SLIST_HEAD_INITIALIZER(); + +static int debug = 0; +static bool nodaemon = false; +static bool background = false; +static bool paused = false; +static bool opt_grab = false; +static int identify = ID_NONE; +static int cfd = -1; /* /dev/consolectl file descriptor */ +static int kfd = -1; /* kqueue file descriptor */ +static int dfd = -1; /* devd socket descriptor */ +static const char *portname = NULL; +static const char *pidfile = "/var/run/moused.pid"; +static struct pidfh *pfh; +#ifndef CONFDIR +#define CONFDIR "/etc" +#endif +static const char *config_file = CONFDIR "/moused.conf"; +#ifndef QUIRKSDIR +#define QUIRKSDIR "/usr/share/moused" +#endif +static const char *quirks_path = QUIRKSDIR; +static struct quirks_context *quirks; +static enum device_if force_if = DEVICE_IF_UNKNOWN; + +static int opt_rate = 0; +static int opt_resolution = MOUSE_RES_UNKNOWN; + +static u_int opt_wmode = 0; +static int opt_clickthreshold = -1; +static bool opt_e3b_enabled = false; +static int opt_e3b_button2timeout = -1; +static struct btstate opt_btstate; + +static bool opt_drift_terminate = false; +static u_int opt_drift_distance = 4; /* max steps X+Y */ +static u_int opt_drift_time = 500; /* ms */ +static u_int opt_drift_after = 4000; /* ms */ + +static double opt_accelx = 1.0; +static double opt_accely = 1.0; +static bool opt_exp_accel = false; +static double opt_expoaccel = 1.0; +static double opt_expoffset = 1.0; + +static bool opt_virtual_scroll = false; +static bool opt_hvirtual_scroll = false; +static int opt_scroll_speed = -1; +static int opt_scroll_threshold = -1; + +static jmp_buf env; + +/* function prototypes */ + +static moused_log_handler log_or_warn_va; + +static void linacc(struct accel *, int, int, int, int*, int*, int*); +static void expoacc(struct accel *, int, int, int, int*, int*, int*); +static void moused(void); +static void reset(int sig); +static void pause_mouse(int sig); +static int connect_devd(void); +static void fetch_and_parse_devd(void); +static void usage(void); +static void log_or_warn(int log_pri, int errnum, const char *fmt, ...) + __printflike(3, 4); + +static int r_daemon(void); +static enum device_if r_identify_if(int fd); +static enum device_type r_identify_evdev(int fd); +static enum device_type r_identify_sysmouse(int fd); +static const char *r_if(enum device_if type); +static const char *r_name(enum device_type type); +static struct rodent *r_init(const char *path); +static void r_init_all(void); +static void r_deinit(struct rodent *r); +static void r_deinit_all(void); +static int r_protocol_evdev(enum device_type type, struct tpad *tp, + struct evstate *ev, struct input_event *ie, + mousestatus_t *act); +static int r_protocol_sysmouse(uint8_t *pBuf, mousestatus_t *act); +static void r_vscroll_detect(struct rodent *r, struct scroll *sc, + mousestatus_t *act); +static void r_vscroll(struct scroll *sc, mousestatus_t *act); +static int r_statetrans(struct rodent *r, mousestatus_t *a1, + mousestatus_t *a2, int trans); +static bool r_installmap(char *arg, struct btstate *bt); +static char * r_installzmap(char **argv, int argc, int* idx, struct btstate *bt); +static void r_map(mousestatus_t *act1, mousestatus_t *act2, + struct btstate *bt); +static void r_timestamp(mousestatus_t *act, struct btstate *bt, + struct e3bstate *e3b, struct drift *drift); +static bool r_timeout(struct e3bstate *e3b); +static void r_move(mousestatus_t *act, struct accel *acc); +static void r_click(mousestatus_t *act, struct btstate *bt); +static bool r_drift(struct drift *, mousestatus_t *); +static enum gesture r_gestures(struct tpad *tp, int x0, int y0, u_int z, int w, + int nfingers, struct timespec *time, mousestatus_t *ms); + +int +main(int argc, char *argv[]) +{ + struct rodent *r; + pid_t mpid; + int c; + u_int i; + int n; + u_long ul; + char *errstr; + + while ((c = getopt(argc, argv, "3A:C:E:F:HI:L:T:VU:a:dfghi:l:m:p:r:t:q:w:z:")) != -1) { + switch(c) { + + case '3': + opt_e3b_enabled = true; + break; + + case 'E': + errno = 0; + ul = strtoul(optarg, NULL, 10); + if ((ul == 0 && errno != 0) || + ul > MAX_BUTTON2TIMEOUT) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_e3b_button2timeout = ul; + break; + + case 'a': + n = sscanf(optarg, "%lf,%lf", &opt_accelx, &opt_accely); + if (n == 0) { + warnx("invalid linear acceleration argument " + "'%s'", optarg); + usage(); + } + if (n == 1) + opt_accely = opt_accelx; + break; + + case 'A': + opt_exp_accel = true; + n = sscanf(optarg, "%lf,%lf", &opt_expoaccel, + &opt_expoffset); + if (n == 0) { + warnx("invalid exponential acceleration " + "argument '%s'", optarg); + usage(); + } + if (n == 1) + opt_expoffset = 1.0; + break; + + case 'd': + ++debug; + break; + + case 'f': + nodaemon = true; + break; + + case 'g': + opt_grab = true; + break; + + case 'i': + if (strcmp(optarg, "all") == 0) + identify = ID_ALL; + else if (strcmp(optarg, "port") == 0) + identify = ID_PORT; + else if (strcmp(optarg, "if") == 0) + identify = ID_IF; + else if (strcmp(optarg, "type") == 0) + identify = ID_TYPE; + else if (strcmp(optarg, "model") == 0) + identify = ID_MODEL; + else { + warnx("invalid argument `%s'", optarg); + usage(); + } + nodaemon = true; + break; + + case 'l': + ul = strtoul(optarg, NULL, 10); + if (ul != 1) + warnx("ignore mouse level `%s'", optarg); + break; + + case 'm': + if (!r_installmap(optarg, &opt_btstate)) { + warnx("invalid argument `%s'", optarg); + usage(); + } + break; + + case 'p': + /* "auto" is an alias to no portname */ + if (strcmp(optarg, "auto") != 0) + portname = optarg; + break; + + case 'r': + if (strcmp(optarg, "high") == 0) + opt_resolution = MOUSE_RES_HIGH; + else if (strcmp(optarg, "medium-high") == 0) + opt_resolution = MOUSE_RES_HIGH; + else if (strcmp(optarg, "medium-low") == 0) + opt_resolution = MOUSE_RES_MEDIUMLOW; + else if (strcmp(optarg, "low") == 0) + opt_resolution = MOUSE_RES_LOW; + else if (strcmp(optarg, "default") == 0) + opt_resolution = MOUSE_RES_DEFAULT; + else { + ul= strtoul(optarg, NULL, 10); + if (ul == 0) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_resolution = ul; + } + break; + + case 't': + if (strcmp(optarg, "auto") == 0) { + force_if = DEVICE_IF_UNKNOWN; + break; + } + for (i = 0; i < nitems(rifs); i++) + if (strcmp(optarg, rifs[i].name) == 0) { + force_if = i; + break; + } + if (i == nitems(rifs)) { + warnx("no such interface type `%s'", optarg); + usage(); + } + break; + + case 'w': + ul = strtoul(optarg, NULL, 10); + if (ul == 0 || ul > MOUSE_MAXBUTTON) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_wmode = ul; + break; + + case 'z': + --optind; + errstr = r_installzmap(argv, argc, &optind, &opt_btstate); + if (errstr != NULL) { + warnx("%s", errstr); + free(errstr); + usage(); + } + break; + + case 'C': + ul = strtoul(optarg, NULL, 10); + if (ul > MAX_CLICKTHRESHOLD) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_clickthreshold = ul; + break; + + case 'F': + ul = strtoul(optarg, NULL, 10); + if (ul == 0) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_rate = ul; + break; + + case 'H': + opt_hvirtual_scroll = true; + break; + + case 'I': + pidfile = optarg; + break; + + case 'L': + errno = 0; + ul = strtoul(optarg, NULL, 10); + if ((ul == 0 && errno != 0) || ul > INT_MAX) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_scroll_speed = ul; + break; + + case 'q': + config_file = optarg; + break; + + case 'Q': + quirks_path = optarg; + break; + + case 'T': + opt_drift_terminate = true; + sscanf(optarg, "%u,%u,%u", &opt_drift_distance, + &opt_drift_time, &opt_drift_after); + if (opt_drift_distance == 0 || + opt_drift_time == 0 || + opt_drift_after == 0) { + warnx("invalid argument `%s'", optarg); + usage(); + } + break; + + case 'V': + opt_virtual_scroll = true; + break; + + case 'U': + errno = 0; + ul = strtoul(optarg, NULL, 10); + if ((ul == 0 && errno != 0) || ul > INT_MAX) { + warnx("invalid argument `%s'", optarg); + usage(); + } + opt_scroll_threshold = ul; + break; + + case 'h': + case '?': + default: + usage(); + } + } + + if ((cfd = open("/dev/consolectl", O_RDWR, 0)) == -1) + logerr(1, "cannot open /dev/consolectl"); + if ((kfd = kqueue()) == -1) + logerr(1, "cannot create kqueue"); + if (portname == NULL && (dfd = connect_devd()) == -1) + logwarnx("cannot open devd socket"); + + switch (setjmp(env)) { + case SIGHUP: + quirks_context_unref(quirks); + r_deinit_all(); + /* FALLTHROUGH */ + case 0: + break; + case SIGINT: + case SIGQUIT: + case SIGTERM: + exit(0); + /* NOT REACHED */ + default: + goto out; + } + + signal(SIGHUP , reset); + signal(SIGINT , reset); + signal(SIGQUIT, reset); + signal(SIGTERM, reset); + signal(SIGUSR1, pause_mouse); + + quirks = quirks_init_subsystem(quirks_path, config_file, + log_or_warn_va, + background ? QLOG_MOUSED_LOGGING : QLOG_CUSTOM_LOG_PRIORITIES); + if (quirks == NULL) + logwarnx("cannot open configuration file %s", config_file); + + if (portname == NULL) { + r_init_all(); + } else { + if ((r = r_init(portname)) == NULL) + logerrx(1, "Can not initialize device"); + } + + /* print some information */ + if (identify != ID_NONE) { + SLIST_FOREACH(r, &rodents, next) { + if (identify == ID_ALL) + printf("%s %s %s %s\n", + r->dev.path, r_if(r->dev.iftype), + r_name(r->dev.type), r->dev.name); + else if (identify & ID_PORT) + printf("%s\n", r->dev.path); + else if (identify & ID_IF) + printf("%s\n", r_if(r->dev.iftype)); + else if (identify & ID_TYPE) + printf("%s\n", r_name(r->dev.type)); + else if (identify & ID_MODEL) + printf("%s\n", r->dev.name); + } + exit(0); + } + + if (!nodaemon && !background) { + pfh = pidfile_open(pidfile, 0600, &mpid); + if (pfh == NULL) { + if (errno == EEXIST) + logerrx(1, "moused already running, pid: %d", mpid); + logwarn("cannot open pid file"); + } + if (r_daemon()) { + int saved_errno = errno; + pidfile_remove(pfh); + errno = saved_errno; + logerr(1, "failed to become a daemon"); + } else { + background = true; + pidfile_write(pfh); + } + } + + moused(); + +out: + quirks_context_unref(quirks); + + r_deinit_all(); + if (dfd != -1) + close(dfd); + if (kfd != -1) + close(kfd); + if (cfd != -1) + close(cfd); + + exit(0); +} + +/* + * Function to calculate linear acceleration. + * + * If there are any rounding errors, the remainder + * is stored in the remainx and remainy variables + * and taken into account upon the next movement. + */ + +static void +linacc(struct accel *acc, int dx, int dy, int dz, + int *movex, int *movey, int *movez) +{ + double fdx, fdy, fdz; + + if (dx == 0 && dy == 0 && dz == 0) { + *movex = *movey = *movez = 0; + return; + } + fdx = dx * acc->accelx + acc->remainx; + fdy = dy * acc->accely + acc->remainy; + fdz = dz * acc->accelz + acc->remainz; + *movex = lround(fdx); + *movey = lround(fdy); + *movez = lround(fdz); + acc->remainx = fdx - *movex; + acc->remainy = fdy - *movey; + acc->remainz = fdz - *movez; +} + +/* + * Function to calculate exponential acceleration. + * (Also includes linear acceleration if enabled.) + * + * In order to give a smoother behaviour, we record the four + * most recent non-zero movements and use their average value + * to calculate the acceleration. + */ + +static void +expoacc(struct accel *acc, int dx, int dy, int dz, + int *movex, int *movey, int *movez) +{ + double fdx, fdy, fdz, length, lbase, accel; + + if (dx == 0 && dy == 0 && dz == 0) { + *movex = *movey = *movez = 0; + return; + } + fdx = dx * acc->accelx; + fdy = dy * acc->accely; + fdz = dz * acc->accelz; + length = sqrt((fdx * fdx) + (fdy * fdy)); /* Pythagoras */ + length = (length + acc->lastlength[0] + acc->lastlength[1] + + acc->lastlength[2]) / 4; + lbase = length / acc->expoffset; + accel = pow(lbase, acc->expoaccel) / lbase; + fdx = fdx * accel + acc->remainx; + fdy = fdy * accel + acc->remainy; + *movex = lround(fdx); + *movey = lround(fdy); + *movez = lround(fdz); + acc->remainx = fdx - *movex; + acc->remainy = fdy - *movey; + acc->remainz = fdz - *movez; + acc->lastlength[2] = acc->lastlength[1]; + acc->lastlength[1] = acc->lastlength[0]; + /* Insert new average, not original length! */ + acc->lastlength[0] = length; +} + +static void +moused(void) +{ + struct rodent *r = NULL; + mousestatus_t action0; /* original mouse action */ + mousestatus_t action; /* interim buffer */ + mousestatus_t action2; /* mapped action */ + struct kevent ke[3]; + int nchanges; + union { + struct input_event ie; + uint8_t se[MOUSE_SYS_PACKETSIZE]; + } b; + size_t b_size; + ssize_t r_size; + int flags; + int c; + + /* clear mouse data */ + bzero(&action0, sizeof(action0)); + bzero(&action, sizeof(action)); + bzero(&action2, sizeof(action2)); + /* process mouse data */ + for (;;) { + + if (dfd == -1 && portname == NULL) + dfd = connect_devd(); + nchanges = 0; + if (r != NULL && r->e3b.enabled && + S_DELAYED(r->e3b.mouse_button_state)) { + EV_SET(ke + nchanges, r->mfd << 1, EVFILT_TIMER, + EV_ADD | EV_ENABLE | EV_DISPATCH, 0, 20, r); + nchanges++; + r->e3b.timer_armed = true; + } + if (r != NULL && r->tp.gest.idletimeout > 0) { + EV_SET(ke + nchanges, r->mfd << 1 | 1, EVFILT_TIMER, + EV_ADD | EV_ENABLE | EV_DISPATCH, + 0, r->tp.gest.idletimeout, r); + nchanges++; + r->tp.gest.timer_armed = true; + } + if (dfd == -1 && nchanges == 0 && portname == NULL) { + EV_SET(ke + nchanges, UINTPTR_MAX, EVFILT_TIMER, + EV_ADD | EV_ENABLE | EV_ONESHOT, 0, 1000, NULL); + nchanges++; + } + + if (!(r != NULL && r->tp.gest.idletimeout == 0)) { + c = kevent(kfd, ke, nchanges, ke, 1, NULL); + if (c <= 0) { /* error */ + logwarn("failed to read from mouse"); + continue; + } + } else + c = 0; + /* Devd event */ + if (c > 0 && ke[0].udata == NULL) { + if (ke[0].filter == EVFILT_READ) { + if ((ke[0].flags & EV_EOF) != 0) { + logwarn("devd connection is closed"); + close(dfd); + dfd = -1; + } else + fetch_and_parse_devd(); + } else if (ke[0].filter == EVFILT_TIMER) { + /* DO NOTHING */ + } + continue; + } + if (c > 0) + r = ke[0].udata; + /* E3B timeout */ + if (c > 0 && ke[0].filter == EVFILT_TIMER && + (ke[0].ident & 1) == 0) { + /* assert(rodent.flags & Emulate3Button) */ + action0.button = action0.obutton; + action0.dx = action0.dy = action0.dz = 0; + action0.flags = flags = 0; + r->e3b.timer_armed = false; + if (r_timeout(&r->e3b) && + r_statetrans(r, &action0, &action, A_TIMEOUT)) { + if (debug > 2) + debug("flags:%08x buttons:%08x obuttons:%08x", + action.flags, action.button, action.obutton); + } else { + action0.obutton = action0.button; + continue; + } + } else { + /* mouse movement */ + if (c > 0 && ke[0].filter == EVFILT_READ) { + b_size = rifs[r->dev.iftype].p_size; + r_size = read(r->mfd, &b, b_size); + if (r_size == -1) { + if (errno == EWOULDBLOCK) + continue; + else if (portname == NULL) { + r_deinit(r); + r = NULL; + continue; + } else + return; + } + if (r_size != (ssize_t)b_size) { + logwarn("Short read from mouse: " + "%zd bytes", r_size); + continue; + } + /* Disarm nonexpired timers */ + nchanges = 0; + if (r->e3b.timer_armed) { + EV_SET(ke + nchanges, r->mfd << 1, + EVFILT_TIMER, EV_DISABLE, 0, 0, r); + nchanges++; + r->e3b.timer_armed = false; + } + if (r->tp.gest.timer_armed) { + EV_SET(ke + nchanges, r->mfd << 1 | 1, + EVFILT_TIMER, EV_DISABLE, 0, 0, r); + nchanges++; + r->tp.gest.timer_armed = false; + } + if (nchanges != 0) + kevent(kfd, ke, nchanges, NULL, 0, NULL); + } else { + /* + * Gesture timeout expired. + * Notify r_gestures by empty packet. + */ +#ifdef DONE_RIGHT + struct timespec ts; + clock_gettime(CLOCK_REALTIME, &ts); + b.ie.time.tv_sec = ts.tv_sec; + b.ie.time.tv_usec = ts.tv_nsec / 1000; +#else + /* Hacky but cheap */ + b.ie.time.tv_sec = + r->tp.gest.idletimeout == 0 ? 0 : LONG_MAX; + b.ie.time.tv_usec = 0; +#endif + b.ie.type = EV_SYN; + b.ie.code = SYN_REPORT; + b.ie.value = 1; + if (c > 0) + r->tp.gest.timer_armed = false; + } + r->tp.gest.idletimeout = -1; + flags = r->dev.iftype == DEVICE_IF_EVDEV ? + r_protocol_evdev(r->dev.type, + &r->tp, &r->ev, &b.ie, &action0) : + r_protocol_sysmouse(b.se, &action0); + if (flags == 0) + continue; + + if (r->scroll.enable_vert || r->scroll.enable_hor) { + if (action0.button == MOUSE_BUTTON2DOWN) { + debug("[BUTTON2] flags:%08x buttons:%08x obuttons:%08x", + action.flags, action.button, action.obutton); + } else { + debug("[NOTBUTTON2] flags:%08x buttons:%08x obuttons:%08x", + action.flags, action.button, action.obutton); + } + r_vscroll_detect(r, &r->scroll, &action0); + } + + r_timestamp(&action0, &r->btstate, &r->e3b, &r->drift); + r_statetrans(r, &action0, &action, + A(action0.button & MOUSE_BUTTON1DOWN, + action0.button & MOUSE_BUTTON3DOWN)); + debug("flags:%08x buttons:%08x obuttons:%08x", action.flags, + action.button, action.obutton); + } + action0.obutton = action0.button; + flags &= MOUSE_POSCHANGED; + flags |= action.obutton ^ action.button; + action.flags = flags; + + if (flags == 0) + continue; + + /* handler detected action */ + r_map(&action, &action2, &r->btstate); + debug("activity : buttons 0x%08x dx %d dy %d dz %d", + action2.button, action2.dx, action2.dy, action2.dz); + + if (r->scroll.enable_vert || r->scroll.enable_hor) { + /* + * If *only* the middle button is pressed AND we are moving + * the stick/trackpoint/nipple, scroll! + */ + r_vscroll(&r->scroll, &action2); + } + + if (r->drift.terminate) { + if ((flags & MOUSE_POSCHANGED) == 0 || + action.dz || action2.dz) + r->drift.last_activity = r->drift.current_ts; + else { + if (r_drift (&r->drift, &action2)) + continue; + } + } + + /* Defer clicks until we aren't VirtualScroll'ing. */ + if (r->scroll.state == SCROLL_NOTSCROLLING) + r_click(&action2, &r->btstate); + + if (action2.flags & MOUSE_POSCHANGED) + r_move(&action2, &r->accel); + + /* + * If the Z axis movement is mapped to an imaginary physical + * button, we need to cook up a corresponding button `up' event + * after sending a button `down' event. + */ + if ((r->btstate.zmap[0] > 0) && (action.dz != 0)) { + action.obutton = action.button; + action.dx = action.dy = action.dz = 0; + r_map(&action, &action2, &r->btstate); + debug("activity : buttons 0x%08x dx %d dy %d dz %d", + action2.button, action2.dx, action2.dy, action2.dz); + + r_click(&action2, &r->btstate); + } + } + /* NOT REACHED */ +} + +static void +reset(int sig) +{ + longjmp(env, sig); +} + +static void +pause_mouse(__unused int sig) +{ + paused = !paused; +} + +static int +connect_devd(void) +{ + static const struct sockaddr_un sa = { + .sun_family = AF_UNIX, + .sun_path = "/var/run/devd.seqpacket.pipe", + }; + struct kevent kev; + int fd; + + fd = socket(AF_UNIX, SOCK_SEQPACKET | SOCK_CLOEXEC, 0); + if (fd < 0) + return (-1); + if (connect(fd, (const struct sockaddr *) &sa, sizeof(sa)) < 0) { + close(fd); + return (-1); + } + EV_SET(&kev, fd, EVFILT_READ, EV_ADD, 0, 0, 0); + if (kevent(kfd, &kev, 1, NULL, 0, NULL) < 0) { + close(fd); + return (-1); + } + + return (fd); +} + +static void +fetch_and_parse_devd(void) +{ + char ev[1024]; + char path[22] = "/dev/"; + char *cdev, *cr; + ssize_t len; + + if ((len = recv(dfd, ev, sizeof(ev), MSG_WAITALL)) <= 0) { + close(dfd); + dfd = -1; + return; + } + + if (ev[0] != '!') + return; + if (strnstr(ev, "system=DEVFS", len) == NULL) + return; + if (strnstr(ev, "subsystem=CDEV", len) == NULL) + return; + if (strnstr(ev, "type=CREATE", len) == NULL) + return; + if ((cdev = strnstr(ev, "cdev=input/event", len)) == NULL) + return; + cr = strchr(cdev, '\n'); + if (cr != NULL) + *cr = '\0'; + cr = strchr(cdev, ' '); + if (cr != NULL) + *cr = '\0'; + strncpy(path + 5, cdev + 5, 17); + (void)r_init(path); + return; +} + +/* + * usage + * + * Complain, and free the CPU for more worthy tasks + */ +static void +usage(void) +{ + fprintf(stderr, "%s\n%s\n%s\n%s\n%s\n", + "usage: moused [-dfg] [-I file] [-F rate] [-r resolution]", + " [-VH [-U threshold]] [-a X[,Y]] [-C threshold] [-m N=M] [-w N]", + " [-z N] [-t <interfacetype>] [-l level] [-3 [-E timeout]]", + " [-T distance[,time[,after]]] -p <port> [-q config] [-Q quirks]", + " moused [-d] -i <port|if|type|model|all> -p <port>"); + exit(1); +} + +/* + * Output an error message to syslog or stderr as appropriate. If + * `errnum' is non-zero, append its string form to the message. + */ +static void +log_or_warn_va(int log_pri, int errnum, const char *fmt, va_list ap) +{ + char buf[256]; + size_t len; + + if (debug == 0 && log_pri > LOG_ERR) + return; + + vsnprintf(buf, sizeof(buf), fmt, ap); + + /* Strip trailing line-feed appended by quirk subsystem */ + len = strlen(buf); + if (len != 0 && buf[len - 1] == '\n') + buf[len - 1] = '\0'; + + if (errnum) { + strlcat(buf, ": ", sizeof(buf)); + strlcat(buf, strerror(errnum), sizeof(buf)); + } + + if (background) + syslog(log_pri, "%s", buf); + else + warnx("%s", buf); +} + +static void +log_or_warn(int log_pri, int errnum, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + log_or_warn_va(log_pri, errnum, fmt, ap); + va_end(ap); +} + +static int +r_daemon(void) +{ + struct sigaction osa, sa; + pid_t newgrp; + int oerrno; + int osa_ok; + int nullfd; + + /* A SIGHUP may be thrown when the parent exits below. */ + sigemptyset(&sa.sa_mask); + sa.sa_handler = SIG_IGN; + sa.sa_flags = 0; + osa_ok = sigaction(SIGHUP, &sa, &osa); + + /* Keep kqueue fd alive */ + switch (rfork(RFPROC)) { + case -1: + return (-1); + case 0: + break; + default: + /* + * A fine point: _exit(0), not exit(0), to avoid triggering + * atexit(3) processing + */ + _exit(0); + } + + newgrp = setsid(); + oerrno = errno; + if (osa_ok != -1) + sigaction(SIGHUP, &osa, NULL); + + if (newgrp == -1) { + errno = oerrno; + return (-1); + } + + (void)chdir("/"); + + nullfd = open("/dev/null", O_RDWR, 0); + if (nullfd != -1) { + (void)dup2(nullfd, STDIN_FILENO); + (void)dup2(nullfd, STDOUT_FILENO); + (void)dup2(nullfd, STDERR_FILENO); + } + if (nullfd > 2) + close(nullfd); + + return (0); +} + +static inline int +bit_find(bitstr_t *array, int start, int stop) +{ + int res; + + bit_ffs_at(array, start, stop + 1, &res); + return (res != -1); +} + +static enum device_if +r_identify_if(int fd) +{ + int dummy; + + if ((force_if == DEVICE_IF_UNKNOWN || force_if == DEVICE_IF_EVDEV) && + ioctl(fd, EVIOCGVERSION, &dummy) >= 0) + return (DEVICE_IF_EVDEV); + if ((force_if == DEVICE_IF_UNKNOWN || force_if == DEVICE_IF_SYSMOUSE) && + ioctl(fd, MOUSE_GETLEVEL, &dummy) >= 0) + return (DEVICE_IF_SYSMOUSE); + return (DEVICE_IF_UNKNOWN); +} + +/* Derived from EvdevProbe() function of xf86-input-evdev driver */ +static enum device_type +r_identify_evdev(int fd) +{ + enum device_type type; + bitstr_t bit_decl(key_bits, KEY_CNT); /* */ + bitstr_t bit_decl(rel_bits, REL_CNT); /* Evdev capabilities */ + bitstr_t bit_decl(abs_bits, ABS_CNT); /* */ + bitstr_t bit_decl(prop_bits, INPUT_PROP_CNT); + bool has_keys, has_buttons, has_lmr, has_rel_axes, has_abs_axes; + bool has_mt; + + /* maybe this is a evdev mouse... */ + if (ioctl(fd, EVIOCGBIT(EV_REL, sizeof(rel_bits)), rel_bits) < 0 || + ioctl(fd, EVIOCGBIT(EV_ABS, sizeof(abs_bits)), abs_bits) < 0 || + ioctl(fd, EVIOCGBIT(EV_KEY, sizeof(key_bits)), key_bits) < 0 || + ioctl(fd, EVIOCGPROP(sizeof(prop_bits)), prop_bits) < 0) { + return (DEVICE_TYPE_UNKNOWN); + } + + has_keys = bit_find(key_bits, 0, BTN_MISC - 1); + has_buttons = bit_find(key_bits, BTN_MISC, BTN_JOYSTICK - 1); + has_lmr = bit_find(key_bits, BTN_LEFT, BTN_MIDDLE); + has_rel_axes = bit_find(rel_bits, 0, REL_MAX); + has_abs_axes = bit_find(abs_bits, 0, ABS_MAX); + has_mt = bit_find(abs_bits, ABS_MT_SLOT, ABS_MAX); + type = DEVICE_TYPE_UNKNOWN; + + if (has_abs_axes) { + if (has_mt && !has_buttons) { + /* TBD:Improve joystick detection */ + if (bit_test(key_bits, BTN_JOYSTICK)) { + return (DEVICE_TYPE_JOYSTICK); + } else { + has_buttons = true; + } + } + + if (bit_test(abs_bits, ABS_X) && + bit_test(abs_bits, ABS_Y)) { + if (bit_test(key_bits, BTN_TOOL_PEN) || + bit_test(key_bits, BTN_STYLUS) || + bit_test(key_bits, BTN_STYLUS2)) { + type = DEVICE_TYPE_TABLET; + } else if (bit_test(abs_bits, ABS_PRESSURE) || + bit_test(key_bits, BTN_TOUCH)) { + if (has_lmr || + bit_test(key_bits, BTN_TOOL_FINGER)) { + type = DEVICE_TYPE_TOUCHPAD; + } else { + type = DEVICE_TYPE_TOUCHSCREEN; + } + /* some touchscreens use BTN_LEFT rather than BTN_TOUCH */ + } else if (!(bit_test(rel_bits, REL_X) && + bit_test(rel_bits, REL_Y)) && + has_lmr) { + type = DEVICE_TYPE_TOUCHSCREEN; + } + } + } + + if (type == DEVICE_TYPE_UNKNOWN) { + if (has_keys) + type = DEVICE_TYPE_KEYBOARD; + else if (has_rel_axes || has_buttons) + type = DEVICE_TYPE_MOUSE; + } + + return (type); +} + +static enum device_type +r_identify_sysmouse(int fd __unused) +{ + /* All sysmouse devices act like mices */ + return (DEVICE_TYPE_MOUSE); +} + +static const char * +r_if(enum device_if type) +{ + const char *unknown = "unknown"; + + return (type == DEVICE_IF_UNKNOWN || type >= (int)nitems(rifs) ? + unknown : rifs[type].name); +} + +static const char * +r_name(enum device_type type) +{ + const char *unknown = "unknown"; + + return (type == DEVICE_TYPE_UNKNOWN || type >= (int)nitems(rnames) ? + unknown : rnames[type]); +} + +static int +r_init_dev_evdev(int fd, struct device *dev) +{ + if (ioctl(fd, EVIOCGNAME(sizeof(dev->name) - 1), dev->name) < 0) { + logwarnx("unable to get device %s name", dev->path); + return (errno); + } + /* Do not loop events */ + if (strncmp(dev->name, "System mouse", sizeof(dev->name)) == 0) { + return (ENOTSUP); + } + if (ioctl(fd, EVIOCGID, &dev->id) < 0) { + logwarnx("unable to get device %s ID", dev->path); + return (errno); + } + (void)ioctl(fd, EVIOCGUNIQ(sizeof(dev->uniq) - 1), dev->uniq); + + return (0); +} + +static int +r_init_dev_sysmouse(int fd, struct device *dev) +{ + mousemode_t *mode = &dev->mode; + int level; + + level = 1; + if (ioctl(fd, MOUSE_SETLEVEL, &level) < 0) { + logwarnx("unable to MOUSE_SETLEVEL for device %s", dev->path); + return (errno); + } + if (ioctl(fd, MOUSE_GETLEVEL, &level) < 0) { + logwarnx("unable to MOUSE_GETLEVEL for device %s", dev->path); + return (errno); + } + if (level != 1) { + logwarnx("unable to set level to 1 for device %s", dev->path); + return (ENOTSUP); + } + memset(mode, 0, sizeof(*mode)); + if (ioctl(fd, MOUSE_GETMODE, mode) < 0) { + logwarnx("unable to MOUSE_GETMODE for device %s", dev->path); + return (errno); + } + if (mode->protocol != MOUSE_PROTO_SYSMOUSE) { + logwarnx("unable to set sysmouse protocol for device %s", + dev->path); + return (ENOTSUP); + } + if (mode->packetsize != MOUSE_SYS_PACKETSIZE) { + logwarnx("unable to set sysmouse packet size for device %s", + dev->path); + return (ENOTSUP); + } + + /* TODO: Fill name, id and uniq from dev.* sysctls */ + strlcpy(dev->name, dev->path, sizeof(dev->name)); + + return (0); +} + +static void +r_init_evstate(struct quirks *q, struct evstate *ev) +{ + const struct quirk_tuples *t; + bitstr_t *bitstr; + int maxbit; + + if (quirks_get_tuples(q, QUIRK_ATTR_EVENT_CODE, &t)) { + for (size_t i = 0; i < t->ntuples; i++) { + int type = t->tuples[i].first; + int code = t->tuples[i].second; + bool enable = t->tuples[i].third; + + switch (type) { + case EV_KEY: + bitstr = (bitstr_t *)&ev->key_ignore; + maxbit = KEY_MAX; + break; + case EV_REL: + bitstr = (bitstr_t *)&ev->rel_ignore; + maxbit = REL_MAX; + break; + case EV_ABS: + bitstr = (bitstr_t *)&ev->abs_ignore; + maxbit = ABS_MAX; + break; + default: + continue; + } + + if (code == EVENT_CODE_UNDEFINED) { + if (enable) + bit_nclear(bitstr, 0, maxbit); + else + bit_nset(bitstr, 0, maxbit); + } else { + if (code > maxbit) + continue; + if (enable) + bit_clear(bitstr, code); + else + bit_set(bitstr, code); + } + } + } + + if (quirks_get_tuples(q, QUIRK_ATTR_INPUT_PROP, &t)) { + for (size_t idx = 0; idx < t->ntuples; idx++) { + unsigned int p = t->tuples[idx].first; + bool enable = t->tuples[idx].second; + + if (p > INPUT_PROP_MAX) + continue; + if (enable) + bit_clear(ev->prop_ignore, p); + else + bit_set(ev->prop_ignore, p); + } + } +} + +static void +r_init_buttons(struct quirks *q, struct btstate *bt, struct e3bstate *e3b) +{ + struct timespec ts; + int i, j; + + *bt = (struct btstate) { + .clickthreshold = DFLT_CLICKTHRESHOLD, + .zmap = { 0, 0, 0, 0 }, + }; + + memcpy(bt->p2l, default_p2l, sizeof(bt->p2l)); + for (i = 0; i < MOUSE_MAXBUTTON; ++i) { + j = i; + if (opt_btstate.p2l[i] != 0) + bt->p2l[i] = opt_btstate.p2l[i]; + if (opt_btstate.mstate[i] != NULL) + j = opt_btstate.mstate[i] - opt_btstate.bstate; + bt->mstate[i] = bt->bstate + j; + } + + if (opt_btstate.zmap[0] != 0) + memcpy(bt->zmap, opt_btstate.zmap, sizeof(bt->zmap)); + if (opt_clickthreshold >= 0) + bt->clickthreshold = opt_clickthreshold; + else + quirks_get_uint32(q, MOUSED_CLICK_THRESHOLD, &bt->clickthreshold); + if (opt_wmode != 0) + bt->wmode = opt_wmode; + else + quirks_get_uint32(q, MOUSED_WMODE, &bt->wmode); + if (bt->wmode != 0) + bt->wmode = 1 << (bt->wmode - 1); + + /* fix Z axis mapping */ + for (i = 0; i < ZMAP_MAXBUTTON; ++i) { + if (bt->zmap[i] <= 0) + continue; + for (j = 0; j < MOUSE_MAXBUTTON; ++j) { + if (bt->mstate[j] == &bt->bstate[bt->zmap[i] - 1]) + bt->mstate[j] = &bt->zstate[i]; + } + bt->zmap[i] = 1 << (bt->zmap[i] - 1); + } + + clock_gettime(CLOCK_MONOTONIC_FAST, &ts); + + *e3b = (struct e3bstate) { + .enabled = false, + .button2timeout = DFLT_BUTTON2TIMEOUT, + }; + e3b->enabled = opt_e3b_enabled; + if (!e3b->enabled) + quirks_get_bool(q, MOUSED_EMULATE_THIRD_BUTTON, &e3b->enabled); + if (opt_e3b_button2timeout >= 0) + e3b->button2timeout = opt_e3b_button2timeout; + else + quirks_get_uint32(q, MOUSED_EMULATE_THIRD_BUTTON_TIMEOUT, + &e3b->button2timeout); + e3b->mouse_button_state = S0; + e3b->mouse_button_state_ts = ts; + e3b->mouse_move_delayed = 0; + + for (i = 0; i < MOUSE_MAXBUTTON; ++i) { + bt->bstate[i].count = 0; + bt->bstate[i].ts = ts; + } + for (i = 0; i < ZMAP_MAXBUTTON; ++i) { + bt->zstate[i].count = 0; + bt->zstate[i].ts = ts; + } +} + +static void +r_init_touchpad_hw(int fd, struct quirks *q, struct tpcaps *tphw, + struct evstate *ev) +{ + struct input_absinfo ai; + bitstr_t bit_decl(key_bits, KEY_CNT); + bitstr_t bit_decl(abs_bits, ABS_CNT); + bitstr_t bit_decl(prop_bits, INPUT_PROP_CNT); + struct quirk_range r; + struct quirk_dimensions dim; + u_int u; + + ioctl(fd, EVIOCGBIT(EV_ABS, sizeof(abs_bits)), abs_bits); + ioctl(fd, EVIOCGBIT(EV_KEY, sizeof(key_bits)), key_bits); + + if (!bit_test(ev->abs_ignore, ABS_X) && + ioctl(fd, EVIOCGABS(ABS_X), &ai) >= 0) { + tphw->min_x = (ai.maximum > ai.minimum) ? ai.minimum : INT_MIN; + tphw->max_x = (ai.maximum > ai.minimum) ? ai.maximum : INT_MAX; + tphw->res_x = ai.resolution == 0 ? + DFLT_TPAD_RESOLUTION : ai.resolution; + } + if (!bit_test(ev->abs_ignore, ABS_Y) && + ioctl(fd, EVIOCGABS(ABS_Y), &ai) >= 0) { + tphw->min_y = (ai.maximum > ai.minimum) ? ai.minimum : INT_MIN; + tphw->max_y = (ai.maximum > ai.minimum) ? ai.maximum : INT_MAX; + tphw->res_y = ai.resolution == 0 ? + DFLT_TPAD_RESOLUTION : ai.resolution; + } + if (quirks_get_dimensions(q, QUIRK_ATTR_RESOLUTION_HINT, &dim)) { + tphw->res_x = dim.x; + tphw->res_y = dim.y; + } else if (tphw->max_x != INT_MAX && tphw->max_y != INT_MAX && + quirks_get_dimensions(q, QUIRK_ATTR_SIZE_HINT, &dim)) { + tphw->res_x = (tphw->max_x - tphw->min_x) / dim.x; + tphw->res_y = (tphw->max_y - tphw->min_y) / dim.y; + } + if (!bit_test(ev->key_ignore, BTN_TOUCH) && + bit_test(key_bits, BTN_TOUCH)) + tphw->cap_touch = true; + /* XXX: libinput uses ABS_MT_PRESSURE where available */ + if (!bit_test(ev->abs_ignore, ABS_PRESSURE) && + bit_test(abs_bits, ABS_PRESSURE) && + ioctl(fd, EVIOCGABS(ABS_PRESSURE), &ai) >= 0) { + tphw->cap_pressure = true; + tphw->min_p = ai.minimum; + tphw->max_p = ai.maximum; + } + if (tphw->cap_pressure && + quirks_get_range(q, QUIRK_ATTR_PRESSURE_RANGE, &r)) { + if (r.upper == 0 && r.lower == 0) { + debug("pressure-based touch detection disabled"); + tphw->cap_pressure = false; + } else if (r.upper > tphw->max_p || r.upper < tphw->min_p || + r.lower > tphw->max_p || r.lower < tphw->min_p) { + debug("discarding out-of-bounds pressure range %d:%d", + r.lower, r.upper); + tphw->cap_pressure = false; + } + } + /* XXX: libinput uses ABS_MT_TOUCH_MAJOR where available */ + if (!bit_test(ev->abs_ignore, ABS_TOOL_WIDTH) && + bit_test(abs_bits, ABS_TOOL_WIDTH) && + quirks_get_uint32(q, QUIRK_ATTR_PALM_SIZE_THRESHOLD, &u) && + u != 0) + tphw->cap_width = true; + if (!bit_test(ev->abs_ignore, ABS_MT_SLOT) && + bit_test(abs_bits, ABS_MT_SLOT) && + !bit_test(ev->abs_ignore, ABS_MT_TRACKING_ID) && + bit_test(abs_bits, ABS_MT_TRACKING_ID) && + !bit_test(ev->abs_ignore, ABS_MT_POSITION_X) && + bit_test(abs_bits, ABS_MT_POSITION_X) && + !bit_test(ev->abs_ignore, ABS_MT_POSITION_Y) && + bit_test(abs_bits, ABS_MT_POSITION_Y)) + tphw->is_mt = true; + if ( ioctl(fd, EVIOCGPROP(sizeof(prop_bits)), prop_bits) >= 0 && + !bit_test(ev->prop_ignore, INPUT_PROP_BUTTONPAD) && + bit_test(prop_bits, INPUT_PROP_BUTTONPAD)) + tphw->is_clickpad = true; + if ( tphw->is_clickpad && + !bit_test(ev->prop_ignore, INPUT_PROP_TOPBUTTONPAD) && + bit_test(prop_bits, INPUT_PROP_TOPBUTTONPAD)) + tphw->is_topbuttonpad = true; +} + +static void +r_init_touchpad_info(struct quirks *q, struct tpcaps *tphw, + struct tpinfo *tpinfo) +{ + struct quirk_range r; + int i; + u_int u; + int sz_x, sz_y; + + *tpinfo = (struct tpinfo) { + .two_finger_scroll = true, + .natural_scroll = false, + .three_finger_drag = false, + .min_pressure_hi = 1, + .min_pressure_lo = 1, + .max_pressure = 130, + .max_width = 16, + .tap_timeout = 180, /* ms */ + .tap_threshold = 0, + .tap_max_delta = 1.3, /* mm */ + .taphold_timeout = 300, /* ms */ + .vscroll_min_delta = 1.25, /* mm */ + .vscroll_hor_area = 0.0, /* mm */ + .vscroll_ver_area = -15.0, /* mm */ + }; + + quirks_get_bool(q, MOUSED_TWO_FINGER_SCROLL, &tpinfo->two_finger_scroll); + quirks_get_bool(q, MOUSED_NATURAL_SCROLL, &tpinfo->natural_scroll); + quirks_get_bool(q, MOUSED_THREE_FINGER_DRAG, &tpinfo->three_finger_drag); + quirks_get_uint32(q, MOUSED_TAP_TIMEOUT, &tpinfo->tap_timeout); + quirks_get_double(q, MOUSED_TAP_MAX_DELTA, &tpinfo->tap_max_delta); + quirks_get_uint32(q, MOUSED_TAPHOLD_TIMEOUT, &tpinfo->taphold_timeout); + quirks_get_double(q, MOUSED_VSCROLL_MIN_DELTA, &tpinfo->vscroll_min_delta); + quirks_get_double(q, MOUSED_VSCROLL_HOR_AREA, &tpinfo->vscroll_hor_area); + quirks_get_double(q, MOUSED_VSCROLL_VER_AREA, &tpinfo->vscroll_ver_area); + + if (tphw->cap_pressure && + quirks_get_range(q, QUIRK_ATTR_PRESSURE_RANGE, &r)) { + tpinfo->min_pressure_lo = r.lower; + tpinfo->min_pressure_hi = r.upper; + quirks_get_uint32(q, QUIRK_ATTR_PALM_PRESSURE_THRESHOLD, + &tpinfo->max_pressure); + quirks_get_uint32(q, MOUSED_TAP_PRESSURE_THRESHOLD, + &tpinfo->tap_threshold); + } + if (tphw->cap_width) + quirks_get_uint32(q, QUIRK_ATTR_PALM_SIZE_THRESHOLD, + &tpinfo->max_width); + /* Set bottom quarter as 42% - 16% - 42% sized softbuttons */ + if (tphw->is_clickpad) { + sz_x = tphw->max_x - tphw->min_x; + sz_y = tphw->max_y - tphw->min_y; + i = 25; + if (tphw->is_topbuttonpad) + i = -i; + quirks_get_int32(q, MOUSED_SOFTBUTTONS_Y, &i); + tpinfo->softbuttons_y = sz_y * i / 100; + u = 42; + quirks_get_uint32(q, MOUSED_SOFTBUTTON2_X, &u); + tpinfo->softbutton2_x = sz_x * u / 100; + u = 58; + quirks_get_uint32(q, MOUSED_SOFTBUTTON3_X, &u); + tpinfo->softbutton3_x = sz_x * u / 100; + } +} + +static void +r_init_touchpad_accel(struct tpcaps *tphw, struct accel *accel) +{ + /* Normalize pointer movement to match 200dpi mouse */ + accel->accelx *= DFLT_MOUSE_RESOLUTION; + accel->accelx /= tphw->res_x; + accel->accely *= DFLT_MOUSE_RESOLUTION; + accel->accely /= tphw->res_y; + accel->accelz *= DFLT_MOUSE_RESOLUTION; + accel->accelz /= (tphw->res_x * DFLT_LINEHEIGHT); +} + +static void +r_init_touchpad_gesture(struct tpstate *gest) +{ + gest->idletimeout = -1; +} + +static void +r_init_drift(struct quirks *q, struct drift *d) +{ + if (opt_drift_terminate) { + d->terminate = true; + d->distance = opt_drift_distance; + d->time = opt_drift_time; + d->after = opt_drift_after; + } else if (quirks_get_bool(q, MOUSED_DRIFT_TERMINATE, &d->terminate) && + d->terminate) { + quirks_get_uint32(q, MOUSED_DRIFT_DISTANCE, &d->distance); + quirks_get_uint32(q, MOUSED_DRIFT_TIME, &d->time); + quirks_get_uint32(q, MOUSED_DRIFT_AFTER, &d->after); + } else + return; + + if (d->distance == 0 || d->time == 0 || d->after == 0) { + warnx("invalid drift parameter"); + exit(1); + } + + debug("terminate drift: distance %d, time %d, after %d", + d->distance, d->time, d->after); + + d->time_ts = msec2ts(d->time); + d->twotime_ts = msec2ts(d->time * 2); + d->after_ts = msec2ts(d->after); +} + +static void +r_init_accel(struct quirks *q, struct accel *acc) +{ + bool r1, r2; + + acc->accelx = opt_accelx; + if (opt_accelx == 1.0) + quirks_get_double(q, MOUSED_LINEAR_ACCEL_X, &acc->accelx); + acc->accely = opt_accely; + if (opt_accely == 1.0) + quirks_get_double(q, MOUSED_LINEAR_ACCEL_Y, &acc->accely); + if (!quirks_get_double(q, MOUSED_LINEAR_ACCEL_Z, &acc->accelz)) + acc->accelz = 1.0; + acc->lastlength[0] = acc->lastlength[1] = acc->lastlength[2] = 0.0; + if (opt_exp_accel) { + acc->is_exponential = true; + acc->expoaccel = opt_expoaccel; + acc->expoffset = opt_expoffset; + return; + } + acc->expoaccel = acc->expoffset = 1.0; + r1 = quirks_get_double(q, MOUSED_EXPONENTIAL_ACCEL, &acc->expoaccel); + r2 = quirks_get_double(q, MOUSED_EXPONENTIAL_OFFSET, &acc->expoffset); + if (r1 || r2) + acc->is_exponential = true; +} + +static void +r_init_scroll(struct quirks *q, struct scroll *scroll) +{ + *scroll = (struct scroll) { + .threshold = DFLT_SCROLLTHRESHOLD, + .speed = DFLT_SCROLLSPEED, + .state = SCROLL_NOTSCROLLING, + }; + scroll->enable_vert = opt_virtual_scroll; + if (!opt_virtual_scroll) + quirks_get_bool(q, MOUSED_VIRTUAL_SCROLL_ENABLE, &scroll->enable_vert); + scroll->enable_hor = opt_hvirtual_scroll; + if (!opt_hvirtual_scroll) + quirks_get_bool(q, MOUSED_HOR_VIRTUAL_SCROLL_ENABLE, &scroll->enable_hor); + if (opt_scroll_speed >= 0) + scroll->speed = opt_scroll_speed; + else + quirks_get_uint32(q, MOUSED_VIRTUAL_SCROLL_SPEED, &scroll->speed); + if (opt_scroll_threshold >= 0) + scroll->threshold = opt_scroll_threshold; + else + quirks_get_uint32(q, MOUSED_VIRTUAL_SCROLL_THRESHOLD, &scroll->threshold); +} + +static struct rodent * +r_init(const char *path) +{ + struct rodent *r; + struct device dev; + struct quirks *q; + struct kevent kev; + enum device_if iftype; + enum device_type type; + int fd, err; + bool grab; + bool ignore; + bool qvalid; + + fd = open(path, O_RDWR | O_NONBLOCK); + if (fd == -1) { + logwarnx("unable to open %s", path); + return (NULL); + } + + iftype = r_identify_if(fd); + switch (iftype) { + case DEVICE_IF_UNKNOWN: + debug("cannot determine interface type on %s", path); + close(fd); + errno = ENOTSUP; + return (NULL); + case DEVICE_IF_EVDEV: + type = r_identify_evdev(fd); + break; + case DEVICE_IF_SYSMOUSE: + type = r_identify_sysmouse(fd); + break; + default: + debug("unsupported interface type: %s on %s", + r_if(iftype), path); + close(fd); + errno = ENXIO; + return (NULL); + } + + switch (type) { + case DEVICE_TYPE_UNKNOWN: + debug("cannot determine device type on %s", path); + close(fd); + errno = ENOTSUP; + return (NULL); + case DEVICE_TYPE_MOUSE: + case DEVICE_TYPE_TOUCHPAD: + break; + default: + debug("unsupported device type: %s on %s", + r_name(type), path); + close(fd); + errno = ENXIO; + return (NULL); + } + + memset(&dev, 0, sizeof(struct device)); + strlcpy(dev.path, path, sizeof(dev.path)); + dev.iftype = iftype; + dev.type = type; + switch (iftype) { + case DEVICE_IF_EVDEV: + err = r_init_dev_evdev(fd, &dev); + break; + case DEVICE_IF_SYSMOUSE: + err = r_init_dev_sysmouse(fd, &dev); + break; + default: + debug("unsupported interface type: %s on %s", + r_if(iftype), path); + err = ENXIO; + } + if (err != 0) { + debug("failed to initialize device: %s %s on %s", + r_if(iftype), r_name(type), path); + close(fd); + errno = err; + return (NULL); + } + + debug("port: %s interface: %s type: %s model: %s", + path, r_if(iftype), r_name(type), dev.name); + + q = quirks_fetch_for_device(quirks, &dev); + + qvalid = quirks_get_bool(q, MOUSED_IGNORE_DEVICE, &ignore); + if (qvalid && ignore) { + debug("%s: device ignored", path); + close(fd); + quirks_unref(q); + errno = EPERM; + return (NULL); + } + + switch (iftype) { + case DEVICE_IF_EVDEV: + grab = opt_grab; + if (!grab) + qvalid = quirks_get_bool(q, MOUSED_GRAB_DEVICE, &grab); + if (qvalid && grab && ioctl(fd, EVIOCGRAB, 1) == -1) { + logwarnx("failed to grab %s", path); + err = errno; + } + break; + case DEVICE_IF_SYSMOUSE: + if (opt_resolution == MOUSE_RES_UNKNOWN && opt_rate == 0) + break; + if (opt_resolution != MOUSE_RES_UNKNOWN) + dev.mode.resolution = opt_resolution; + if (opt_resolution != 0) + dev.mode.rate = opt_rate; + if (ioctl(fd, MOUSE_SETMODE, &dev.mode) < 0) + debug("failed to MOUSE_SETMODE for device %s", path); + break; + default: + debug("unsupported interface type: %s on %s", + r_if(iftype), path); + err = ENXIO; + } + if (err != 0) { + debug("failed to initialize device: %s %s on %s", + r_if(iftype), r_name(type), path); + close(fd); + quirks_unref(q); + errno = err; + return (NULL); + } + + r = calloc(1, sizeof(struct rodent)); + memcpy(&r->dev, &dev, sizeof(struct device)); + r->mfd = fd; + + EV_SET(&kev, fd, EVFILT_READ, EV_ADD, 0, 0, r); + err = kevent(kfd, &kev, 1, NULL, 0, NULL); + if (err == -1) { + logwarnx("failed to register kevent on %s", path); + close(fd); + free(r); + quirks_unref(q); + return (NULL); + } + + if (iftype == DEVICE_IF_EVDEV) + r_init_evstate(q, &r->ev); + r_init_buttons(q, &r->btstate, &r->e3b); + r_init_scroll(q, &r->scroll); + r_init_accel(q, &r->accel); + switch (type) { + case DEVICE_TYPE_TOUCHPAD: + r_init_touchpad_hw(fd, q, &r->tp.hw, &r->ev); + r_init_touchpad_info(q, &r->tp.hw, &r->tp.info); + r_init_touchpad_accel(&r->tp.hw, &r->accel); + r_init_touchpad_gesture(&r->tp.gest); + break; + + case DEVICE_TYPE_MOUSE: + r_init_drift(q, &r->drift); + break; + + default: + debug("unsupported device type: %s", r_name(type)); + break; + } + + quirks_unref(q); + + SLIST_INSERT_HEAD(&rodents, r, next); + + return (r); +} + +static void +r_init_all(void) +{ + char path[22] = "/dev/input/"; + DIR *dirp; + struct dirent *dp; + + dirp = opendir("/dev/input"); + if (dirp == NULL) + logerr(1, "Failed to open /dev/input"); + + while ((dp = readdir(dirp)) != NULL) { + if (fnmatch("event[0-9]*", dp->d_name, 0) == 0) { + strncpy(path + 11, dp->d_name, 10); + (void)r_init(path); + } + } + (void)closedir(dirp); + + return; +} + +static void +r_deinit(struct rodent *r) +{ + struct kevent ke[3]; + + if (r == NULL) + return; + if (r->mfd != -1) { + EV_SET(ke, r->mfd, EVFILT_READ, EV_DELETE, 0, 0, r); + EV_SET(ke + 1, r->mfd << 1, EVFILT_TIMER, EV_DELETE, 0, 0, r); + EV_SET(ke + 2, r->mfd << 1 | 1, + EVFILT_TIMER, EV_DELETE, 0, 0, r); + kevent(kfd, ke, nitems(ke), NULL, 0, NULL); + close(r->mfd); + } + SLIST_REMOVE(&rodents, r, rodent, next); + debug("destroy device: port: %s model: %s", r->dev.path, r->dev.name); + free(r); +} + +static void +r_deinit_all(void) +{ + while (!SLIST_EMPTY(&rodents)) + r_deinit(SLIST_FIRST(&rodents)); +} + +static int +r_protocol_evdev(enum device_type type, struct tpad *tp, struct evstate *ev, + struct input_event *ie, mousestatus_t *act) +{ + const struct tpcaps *tphw = &tp->hw; + const struct tpinfo *tpinfo = &tp->info; + + static int butmapev[8] = { /* evdev */ + 0, + MOUSE_BUTTON1DOWN, + MOUSE_BUTTON3DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN, + MOUSE_BUTTON2DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN, + MOUSE_BUTTON2DOWN | MOUSE_BUTTON3DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN | MOUSE_BUTTON3DOWN + }; + struct timespec ietime; + + /* Drop ignored codes */ + switch (ie->type) { + case EV_REL: + if (bit_test(ev->rel_ignore, ie->code)) + return (0); + case EV_ABS: + if (bit_test(ev->abs_ignore, ie->code)) + return (0); + case EV_KEY: + if (bit_test(ev->key_ignore, ie->code)) + return (0); + } + + if (debug > 1) + debug("received event 0x%02x, 0x%04x, %d", + ie->type, ie->code, ie->value); + + switch (ie->type) { + case EV_REL: + switch (ie->code) { + case REL_X: + ev->dx += ie->value; + break; + case REL_Y: + ev->dy += ie->value; + break; + case REL_WHEEL: + ev->dz += ie->value; + break; + case REL_HWHEEL: + ev->dw += ie->value; + break; + } + break; + case EV_ABS: + switch (ie->code) { + case ABS_X: + if (!tphw->is_mt) + ev->dx += ie->value - ev->st.x; + ev->st.x = ie->value; + break; + case ABS_Y: + if (!tphw->is_mt) + ev->dy += ie->value - ev->st.y; + ev->st.y = ie->value; + break; + case ABS_PRESSURE: + ev->st.p = ie->value; + break; + case ABS_TOOL_WIDTH: + ev->st.w = ie->value; + break; + case ABS_MT_SLOT: + if (tphw->is_mt) + ev->slot = ie->value; + break; + case ABS_MT_TRACKING_ID: + if (tphw->is_mt && + ev->slot >= 0 && ev->slot < MAX_FINGERS) { + if (ie->value != -1 && ev->mt[ev->slot].id > 0 && + ie->value + 1 != ev->mt[ev->slot].id) { + debug("tracking id changed %d->%d", + ie->value, ev->mt[ev->slot].id - 1); + ev->mt[ev->slot].id = 0; + } else + ev->mt[ev->slot].id = ie->value + 1; + } + break; + case ABS_MT_POSITION_X: + if (tphw->is_mt && + ev->slot >= 0 && ev->slot < MAX_FINGERS) { + /* Find fastest finger */ + int dx = ie->value - ev->mt[ev->slot].x; + if (abs(dx) > abs(ev->dx)) + ev->dx = dx; + ev->mt[ev->slot].x = ie->value; + } + break; + case ABS_MT_POSITION_Y: + if (tphw->is_mt && + ev->slot >= 0 && ev->slot < MAX_FINGERS) { + /* Find fastest finger */ + int dy = ie->value - ev->mt[ev->slot].y; + if (abs(dy) > abs(ev->dy)) + ev->dy = dy; + ev->mt[ev->slot].y = ie->value; + } + break; + } + break; + case EV_KEY: + switch (ie->code) { + case BTN_TOUCH: + ev->st.id = ie->value != 0 ? 1 : 0; + break; + case BTN_TOOL_FINGER: + ev->nfingers = ie->value != 0 ? 1 : ev->nfingers; + break; + case BTN_TOOL_DOUBLETAP: + ev->nfingers = ie->value != 0 ? 2 : ev->nfingers; + break; + case BTN_TOOL_TRIPLETAP: + ev->nfingers = ie->value != 0 ? 3 : ev->nfingers; + break; + case BTN_TOOL_QUADTAP: + ev->nfingers = ie->value != 0 ? 4 : ev->nfingers; + break; + case BTN_TOOL_QUINTTAP: + ev->nfingers = ie->value != 0 ? 5 : ev->nfingers; + break; + case BTN_LEFT ... BTN_LEFT + 7: + ev->buttons &= ~(1 << (ie->code - BTN_LEFT)); + ev->buttons |= ((!!ie->value) << (ie->code - BTN_LEFT)); + break; + } + break; + } + + if ( ie->type != EV_SYN || + (ie->code != SYN_REPORT && ie->code != SYN_DROPPED)) + return (0); + + /* + * assembly full package + */ + + ietime.tv_sec = ie->time.tv_sec; + ietime.tv_nsec = ie->time.tv_usec * 1000; + + if (!tphw->cap_pressure && ev->st.id != 0) + ev->st.p = MAX(tpinfo->min_pressure_hi, tpinfo->tap_threshold); + if (tphw->cap_touch && ev->st.id == 0) + ev->st.p = 0; + + act->obutton = act->button; + act->button = butmapev[ev->buttons & MOUSE_SYS_STDBUTTONS]; + act->button |= (ev->buttons & ~MOUSE_SYS_STDBUTTONS); + + if (type == DEVICE_TYPE_TOUCHPAD) { + if (debug > 1) + debug("absolute data %d,%d,%d,%d", ev->st.x, ev->st.y, + ev->st.p, ev->st.w); + switch (r_gestures(tp, ev->st.x, ev->st.y, ev->st.p, ev->st.w, + ev->nfingers, &ietime, act)) { + case GEST_IGNORE: + ev->dx = 0; + ev->dy = 0; + ev->dz = 0; + ev->acc_dx = ev->acc_dy = 0; + debug("gesture IGNORE"); + break; + case GEST_ACCUMULATE: /* Revertable pointer movement. */ + ev->acc_dx += ev->dx; + ev->acc_dy += ev->dy; + debug("gesture ACCUMULATE %d,%d", ev->dx, ev->dy); + ev->dx = 0; + ev->dy = 0; + break; + case GEST_MOVE: /* Pointer movement. */ + ev->dx += ev->acc_dx; + ev->dy += ev->acc_dy; + ev->acc_dx = ev->acc_dy = 0; + debug("gesture MOVE %d,%d", ev->dx, ev->dy); + break; + case GEST_VSCROLL: /* Vertical scrolling. */ + if (tpinfo->natural_scroll) + ev->dz = -ev->dy; + else + ev->dz = ev->dy; + ev->dx = -ev->acc_dx; + ev->dy = -ev->acc_dy; + ev->acc_dx = ev->acc_dy = 0; + debug("gesture VSCROLL %d", ev->dz); + break; + case GEST_HSCROLL: /* Horizontal scrolling. */ +/* + if (ev.dx != 0) { + if (tpinfo->natural_scroll) + act->button |= (ev.dx > 0) + ? MOUSE_BUTTON6DOWN + : MOUSE_BUTTON7DOWN; + else + act->button |= (ev.dx > 0) + ? MOUSE_BUTTON7DOWN + : MOUSE_BUTTON6DOWN; + } +*/ + ev->dx = -ev->acc_dx; + ev->dy = -ev->acc_dy; + ev->acc_dx = ev->acc_dy = 0; + debug("gesture HSCROLL %d", ev->dw); + break; + } + } + + debug("assembled full packet %d,%d,%d", ev->dx, ev->dy, ev->dz); + act->dx = ev->dx; + act->dy = ev->dy; + act->dz = ev->dz; + ev->dx = ev->dy = ev->dz = ev->dw = 0; + + /* has something changed? */ + act->flags = ((act->dx || act->dy || act->dz) ? MOUSE_POSCHANGED : 0) + | (act->obutton ^ act->button); + + return (act->flags); +} + +static int +r_protocol_sysmouse(uint8_t *pBuf, mousestatus_t *act) +{ + static int butmapmsc[8] = { /* sysmouse */ + 0, + MOUSE_BUTTON3DOWN, + MOUSE_BUTTON2DOWN, + MOUSE_BUTTON2DOWN | MOUSE_BUTTON3DOWN, + MOUSE_BUTTON1DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN, + MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN | MOUSE_BUTTON3DOWN + }; + + debug("%02x %02x %02x %02x %02x %02x %02x %02x", pBuf[0], pBuf[1], + pBuf[2], pBuf[3], pBuf[4], pBuf[5], pBuf[6], pBuf[7]); + + if ((pBuf[0] & MOUSE_SYS_SYNCMASK) != MOUSE_SYS_SYNC) + return (0); + + act->button = butmapmsc[(~pBuf[0]) & MOUSE_SYS_STDBUTTONS]; + act->dx = (signed char)(pBuf[1]) + (signed char)(pBuf[3]); + act->dy = - ((signed char)(pBuf[2]) + (signed char)(pBuf[4])); + act->dz = ((signed char)(pBuf[5] << 1) + (signed char)(pBuf[6] << 1)) >> 1; + act->button |= ((~pBuf[7] & MOUSE_SYS_EXTBUTTONS) << 3); + + /* has something changed? */ + act->flags = ((act->dx || act->dy || act->dz) ? MOUSE_POSCHANGED : 0) + | (act->obutton ^ act->button); + + return (act->flags); +} + +static void +r_vscroll_detect(struct rodent *r, struct scroll *sc, mousestatus_t *act) +{ + mousestatus_t newaction; + + /* Allow middle button drags to scroll up and down */ + if (act->button == MOUSE_BUTTON2DOWN) { + if (sc->state == SCROLL_NOTSCROLLING) { + sc->state = SCROLL_PREPARE; + sc->movement = sc->hmovement = 0; + debug("PREPARING TO SCROLL"); + } + return; + } + + /* This isn't a middle button down... move along... */ + switch (sc->state) { + case SCROLL_SCROLLING: + /* + * We were scrolling, someone let go of button 2. + * Now turn autoscroll off. + */ + sc->state = SCROLL_NOTSCROLLING; + debug("DONE WITH SCROLLING / %d", sc->state); + break; + case SCROLL_PREPARE: + newaction = *act; + + /* We were preparing to scroll, but we never moved... */ + r_timestamp(act, &r->btstate, &r->e3b, &r->drift); + r_statetrans(r, act, &newaction, + A(newaction.button & MOUSE_BUTTON1DOWN, + act->button & MOUSE_BUTTON3DOWN)); + + /* Send middle down */ + newaction.button = MOUSE_BUTTON2DOWN; + r_click(&newaction, &r->btstate); + + /* Send middle up */ + r_timestamp(&newaction, &r->btstate, &r->e3b, &r->drift); + newaction.obutton = newaction.button; + newaction.button = act->button; + r_click(&newaction, &r->btstate); + break; + default: + break; + } +} + +static void +r_vscroll(struct scroll *sc, mousestatus_t *act) +{ + switch (sc->state) { + case SCROLL_PREPARE: + /* Middle button down, waiting for movement threshold */ + if (act->dy == 0 && act->dx == 0) + break; + if (sc->enable_vert) { + sc->movement += act->dy; + if ((u_int)abs(sc->movement) > sc->threshold) + sc->state = SCROLL_SCROLLING; + } + if (sc->enable_hor) { + sc->hmovement += act->dx; + if ((u_int)abs(sc->hmovement) > sc->threshold) + sc->state = SCROLL_SCROLLING; + } + if (sc->state == SCROLL_SCROLLING) + sc->movement = sc->hmovement = 0; + break; + case SCROLL_SCROLLING: + if (sc->enable_vert) { + sc->movement += act->dy; + debug("SCROLL: %d", sc->movement); + if (sc->movement < -(int)sc->speed) { + /* Scroll down */ + act->dz = -1; + sc->movement = 0; + } + else if (sc->movement > (int)sc->speed) { + /* Scroll up */ + act->dz = 1; + sc->movement = 0; + } + } + if (sc->enable_hor) { + sc->hmovement += act->dx; + debug("HORIZONTAL SCROLL: %d", sc->hmovement); + + if (sc->hmovement < -(int)sc->speed) { + act->dz = -2; + sc->hmovement = 0; + } + else if (sc->hmovement > (int)sc->speed) { + act->dz = 2; + sc->hmovement = 0; + } + } + + /* Don't move while scrolling */ + act->dx = act->dy = 0; + break; + default: + break; + } +} + +static bool +r_drift (struct drift *drift, mousestatus_t *act) +{ + struct timespec tmp; + + /* X or/and Y movement only - possibly drift */ + tssub(&drift->current_ts, &drift->last_activity, &tmp); + if (tscmp(&tmp, &drift->after_ts, >)) { + tssub(&drift->current_ts, &drift->since, &tmp); + if (tscmp(&tmp, &drift->time_ts, <)) { + drift->last.x += act->dx; + drift->last.y += act->dy; + } else { + /* discard old accumulated steps (drift) */ + if (tscmp(&tmp, &drift->twotime_ts, >)) + drift->previous.x = drift->previous.y = 0; + else + drift->previous = drift->last; + drift->last.x = act->dx; + drift->last.y = act->dy; + drift->since = drift->current_ts; + } + if ((u_int)abs(drift->last.x) + abs(drift->last.y) > drift->distance) { + /* real movement, pass all accumulated steps */ + act->dx = drift->previous.x + drift->last.x; + act->dy = drift->previous.y + drift->last.y; + /* and reset accumulators */ + tsclr(&drift->since); + drift->last.x = drift->last.y = 0; + /* drift_previous will be cleared at next movement*/ + drift->last_activity = drift->current_ts; + } else { + return (true); /* don't pass current movement to + * console driver */ + } + } + return (false); +} + +static int +r_statetrans(struct rodent *r, mousestatus_t *a1, mousestatus_t *a2, int trans) +{ + struct e3bstate *e3b = &r->e3b; + bool changed; + int flags; + + a2->dx = a1->dx; + a2->dy = a1->dy; + a2->dz = a1->dz; + a2->obutton = a2->button; + a2->button = a1->button; + a2->flags = a1->flags; + changed = false; + + if (!e3b->enabled) + return (false); + + if (debug > 2) + debug("state:%d, trans:%d -> state:%d", + e3b->mouse_button_state, trans, + states[e3b->mouse_button_state].s[trans]); + /* + * Avoid re-ordering button and movement events. While a button + * event is deferred, throw away up to BUTTON2_MAXMOVE movement + * events to allow for mouse jitter. If more movement events + * occur, then complete the deferred button events immediately. + */ + if ((a2->dx != 0 || a2->dy != 0) && + S_DELAYED(states[e3b->mouse_button_state].s[trans])) { + if (++e3b->mouse_move_delayed > BUTTON2_MAXMOVE) { + e3b->mouse_move_delayed = 0; + e3b->mouse_button_state = + states[e3b->mouse_button_state].s[A_TIMEOUT]; + changed = true; + } else + a2->dx = a2->dy = 0; + } else + e3b->mouse_move_delayed = 0; + if (e3b->mouse_button_state != states[e3b->mouse_button_state].s[trans]) + changed = true; + if (changed) + clock_gettime(CLOCK_MONOTONIC_FAST, + &e3b->mouse_button_state_ts); + e3b->mouse_button_state = states[e3b->mouse_button_state].s[trans]; + a2->button &= ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN | + MOUSE_BUTTON3DOWN); + a2->button &= states[e3b->mouse_button_state].mask; + a2->button |= states[e3b->mouse_button_state].buttons; + flags = a2->flags & MOUSE_POSCHANGED; + flags |= a2->obutton ^ a2->button; + if (flags & MOUSE_BUTTON2DOWN) { + a2->flags = flags & MOUSE_BUTTON2DOWN; + r_timestamp(a2, &r->btstate, e3b, &r->drift); + } + a2->flags = flags; + + return (changed); +} + +static char * +skipspace(char *s) +{ + while(isspace(*s)) + ++s; + return (s); +} + +static bool +r_installmap(char *arg, struct btstate *bt) +{ + u_long pbutton; + u_long lbutton; + char *s; + + while (*arg) { + arg = skipspace(arg); + s = arg; + while (isdigit(*arg)) + ++arg; + arg = skipspace(arg); + if ((arg <= s) || (*arg != '=')) + return (false); + lbutton = strtoul(s, NULL, 10); + + arg = skipspace(++arg); + s = arg; + while (isdigit(*arg)) + ++arg; + if ((arg <= s) || (!isspace(*arg) && (*arg != '\0'))) + return (false); + pbutton = strtoul(s, NULL, 10); + + if (lbutton == 0 || lbutton > MOUSE_MAXBUTTON) + return (false); + if (pbutton == 0 || pbutton > MOUSE_MAXBUTTON) + return (false); + bt->p2l[pbutton - 1] = 1 << (lbutton - 1); + bt->mstate[lbutton - 1] = &bt->bstate[pbutton - 1]; + } + + return (true); +} + +static char * +r_installzmap(char **argv, int argc, int* idx, struct btstate *bt) +{ + char *arg, *errstr; + u_long i, j; + + arg = argv[*idx]; + ++*idx; + if (strcmp(arg, "x") == 0) { + bt->zmap[0] = MOUSE_XAXIS; + return (NULL); + } + if (strcmp(arg, "y") == 0) { + bt->zmap[0] = MOUSE_YAXIS; + return (NULL); + } + i = strtoul(arg, NULL, 10); + /* + * Use button i for negative Z axis movement and + * button (i + 1) for positive Z axis movement. + */ + if (i == 0 || i >= MOUSE_MAXBUTTON) { + asprintf(&errstr, "invalid argument `%s'", arg); + return (errstr); + } + bt->zmap[0] = i; + bt->zmap[1] = i + 1; + debug("optind: %d, optarg: '%s'", *idx, arg); + for (j = 1; j < ZMAP_MAXBUTTON; ++j) { + if ((*idx >= argc) || !isdigit(*argv[*idx])) + break; + i = strtoul(argv[*idx], NULL, 10); + if (i == 0 || i >= MOUSE_MAXBUTTON) { + asprintf(&errstr, "invalid argument `%s'", argv[*idx]); + return (errstr); + } + bt->zmap[j] = i; + ++*idx; + } + if ((bt->zmap[2] != 0) && (bt->zmap[3] == 0)) + bt->zmap[3] = bt->zmap[2] + 1; + + return (NULL); +} + +static void +r_map(mousestatus_t *act1, mousestatus_t *act2, struct btstate *bt) +{ + int pb; + int pbuttons; + int lbuttons; + + pbuttons = act1->button; + lbuttons = 0; + + act2->obutton = act2->button; + if (pbuttons & bt->wmode) { + pbuttons &= ~bt->wmode; + act1->dz = act1->dy; + act1->dx = 0; + act1->dy = 0; + } + act2->dx = act1->dx; + act2->dy = act1->dy; + act2->dz = act1->dz; + + switch (bt->zmap[0]) { + case 0: /* do nothing */ + break; + case MOUSE_XAXIS: + if (act1->dz != 0) { + act2->dx = act1->dz; + act2->dz = 0; + } + break; + case MOUSE_YAXIS: + if (act1->dz != 0) { + act2->dy = act1->dz; + act2->dz = 0; + } + break; + default: /* buttons */ + pbuttons &= ~(bt->zmap[0] | bt->zmap[1] + | bt->zmap[2] | bt->zmap[3]); + if ((act1->dz < -1) && bt->zmap[2]) { + pbuttons |= bt->zmap[2]; + bt->zstate[2].count = 1; + } else if (act1->dz < 0) { + pbuttons |= bt->zmap[0]; + bt->zstate[0].count = 1; + } else if ((act1->dz > 1) && bt->zmap[3]) { + pbuttons |= bt->zmap[3]; + bt->zstate[3].count = 1; + } else if (act1->dz > 0) { + pbuttons |= bt->zmap[1]; + bt->zstate[1].count = 1; + } + act2->dz = 0; + break; + } + + for (pb = 0; (pb < MOUSE_MAXBUTTON) && (pbuttons != 0); ++pb) { + lbuttons |= (pbuttons & 1) ? bt->p2l[pb] : 0; + pbuttons >>= 1; + } + act2->button = lbuttons; + + act2->flags = + ((act2->dx || act2->dy || act2->dz) ? MOUSE_POSCHANGED : 0) + | (act2->obutton ^ act2->button); +} + +static void +r_timestamp(mousestatus_t *act, struct btstate *bt, struct e3bstate *e3b, + struct drift *drift) +{ + struct timespec ts; + struct timespec ts1; + struct timespec ts2; + int button; + int mask; + int i; + + mask = act->flags & MOUSE_BUTTONS; +#if 0 + if (mask == 0) + return; +#endif + + clock_gettime(CLOCK_MONOTONIC_FAST, &ts1); + drift->current_ts = ts1; + + /* double click threshold */ + ts = tssubms(&ts1, bt->clickthreshold); + debug("ts: %jd %ld", (intmax_t)ts.tv_sec, ts.tv_nsec); + + /* 3 button emulation timeout */ + ts2 = tssubms(&ts1, e3b->button2timeout); + + button = MOUSE_BUTTON1DOWN; + for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) { + if (mask & 1) { + if (act->button & button) { + /* the button is down */ + debug(" : %jd %ld", + (intmax_t)bt->bstate[i].ts.tv_sec, + bt->bstate[i].ts.tv_nsec); + if (tscmp(&ts, &bt->bstate[i].ts, >)) { + bt->bstate[i].count = 1; + } else { + ++bt->bstate[i].count; + } + bt->bstate[i].ts = ts1; + } else { + /* the button is up */ + bt->bstate[i].ts = ts1; + } + } else { + if (act->button & button) { + /* the button has been down */ + if (tscmp(&ts2, &bt->bstate[i].ts, >)) { + bt->bstate[i].count = 1; + bt->bstate[i].ts = ts1; + act->flags |= button; + debug("button %d timeout", i + 1); + } + } else { + /* the button has been up */ + } + } + button <<= 1; + mask >>= 1; + } +} + +static bool +r_timeout(struct e3bstate *e3b) +{ + struct timespec ts; + struct timespec ts1; + + if (states[e3b->mouse_button_state].timeout) + return (true); + clock_gettime(CLOCK_MONOTONIC_FAST, &ts1); + ts = tssubms(&ts1, e3b->button2timeout); + return (tscmp(&ts, &e3b->mouse_button_state_ts, >)); +} + +static void +r_move(mousestatus_t *act, struct accel *acc) +{ + struct mouse_info mouse; + + bzero(&mouse, sizeof(mouse)); + if (acc->is_exponential) { + expoacc(acc, act->dx, act->dy, act->dz, + &mouse.u.data.x, &mouse.u.data.y, &mouse.u.data.z); + } else { + linacc(acc, act->dx, act->dy, act->dz, + &mouse.u.data.x, &mouse.u.data.y, &mouse.u.data.z); + } + mouse.operation = MOUSE_MOTION_EVENT; + mouse.u.data.buttons = act->button; + if (debug < 2 && !paused) + ioctl(cfd, CONS_MOUSECTL, &mouse); +} + +static void +r_click(mousestatus_t *act, struct btstate *bt) +{ + struct mouse_info mouse; + int button; + int mask; + int i; + + mask = act->flags & MOUSE_BUTTONS; + if (mask == 0) + return; + + button = MOUSE_BUTTON1DOWN; + for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) { + if (mask & 1) { + debug("mstate[%d]->count:%d", i, bt->mstate[i]->count); + if (act->button & button) { + /* the button is down */ + mouse.u.event.value = bt->mstate[i]->count; + } else { + /* the button is up */ + mouse.u.event.value = 0; + } + mouse.operation = MOUSE_BUTTON_EVENT; + mouse.u.event.id = button; + if (debug < 2 && !paused) + ioctl(cfd, CONS_MOUSECTL, &mouse); + debug("button %d count %d", i + 1, + mouse.u.event.value); + } + button <<= 1; + mask >>= 1; + } +} + +static enum gesture +r_gestures(struct tpad *tp, int x0, int y0, u_int z, int w, int nfingers, + struct timespec *time, mousestatus_t *ms) +{ + struct tpstate *gest = &tp->gest; + const struct tpcaps *tphw = &tp->hw; + const struct tpinfo *tpinfo = &tp->info; + int tap_timeout = tpinfo->tap_timeout; + + /* + * Check pressure to detect a real wanted action on the + * touchpad. + */ + if (z >= tpinfo->min_pressure_hi || + (gest->fingerdown && z >= tpinfo->min_pressure_lo)) { + /* XXX Verify values? */ + bool two_finger_scroll = tpinfo->two_finger_scroll; + bool three_finger_drag = tpinfo->three_finger_drag; + int max_width = tpinfo->max_width; + u_int max_pressure = tpinfo->max_pressure; + int margin_top = tpinfo->margin_top; + int margin_right = tpinfo->margin_right; + int margin_bottom = tpinfo->margin_bottom; + int margin_left = tpinfo->margin_left; + int vscroll_hor_area = tpinfo->vscroll_hor_area * tphw->res_x; + int vscroll_ver_area = tpinfo->vscroll_ver_area * tphw->res_y;; + + int max_x = tphw->max_x; + int max_y = tphw->max_y; + int min_x = tphw->min_x; + int min_y = tphw->min_y; + + int dx, dy; + int start_x, start_y; + int tap_max_delta_x, tap_max_delta_y; + int prev_nfingers; + + /* Palm detection. */ + if (nfingers == 1 && + ((tphw->cap_width && w > max_width) || + (tphw->cap_pressure && z > max_pressure))) { + /* + * We consider the packet irrelevant for the current + * action when: + * - there is a single active touch + * - the width isn't comprised in: + * [0; max_width] + * - the pressure isn't comprised in: + * [min_pressure; max_pressure] + * + * Note that this doesn't terminate the current action. + */ + debug("palm detected! (%d)", z); + return(GEST_IGNORE); + } + + /* + * Limit the coordinates to the specified margins because + * this area isn't very reliable. + */ + if (margin_left != 0 && x0 <= min_x + margin_left) + x0 = min_x + margin_left; + else if (margin_right != 0 && x0 >= max_x - margin_right) + x0 = max_x - margin_right; + if (margin_bottom != 0 && y0 <= min_y + margin_bottom) + y0 = min_y + margin_bottom; + else if (margin_top != 0 && y0 >= max_y - margin_top) + y0 = max_y - margin_top; + + debug("packet: [%d, %d], %d, %d", x0, y0, z, w); + + /* + * If the action is just beginning, init the structure and + * compute tap timeout. + */ + if (!gest->fingerdown) { + debug("----"); + + /* Reset pressure peak. */ + gest->zmax = 0; + + /* Reset fingers count. */ + gest->fingers_nb = 0; + + /* Reset virtual scrolling state. */ + gest->in_vscroll = 0; + + /* Compute tap timeout. */ + if (tap_timeout != 0) + gest->taptimeout = tsaddms(time, tap_timeout); + else + tsclr(&gest->taptimeout); + + gest->fingerdown = true; + + gest->start_x = x0; + gest->start_y = y0; + } + + prev_nfingers = gest->prev_nfingers; + + gest->prev_x = x0; + gest->prev_y = y0; + gest->prev_nfingers = nfingers; + + start_x = gest->start_x; + start_y = gest->start_y; + + /* Process ClickPad softbuttons */ + if (tphw->is_clickpad && ms->button & MOUSE_BUTTON1DOWN) { + int y_ok, center_bt, center_x, right_bt, right_x; + y_ok = tpinfo->softbuttons_y < 0 + ? start_y < min_y - tpinfo->softbuttons_y + : start_y > max_y - tpinfo->softbuttons_y; + + center_bt = MOUSE_BUTTON2DOWN; + center_x = min_x + tpinfo->softbutton2_x; + right_bt = MOUSE_BUTTON3DOWN; + right_x = min_x + tpinfo->softbutton3_x; + + if (center_x > 0 && right_x > 0 && center_x > right_x) { + center_bt = MOUSE_BUTTON3DOWN; + center_x = min_x + tpinfo->softbutton3_x; + right_bt = MOUSE_BUTTON2DOWN; + right_x = min_x + tpinfo->softbutton2_x; + } + + if (right_x > 0 && start_x > right_x && y_ok) + ms->button = (ms->button & + ~MOUSE_BUTTON1DOWN) | right_bt; + else if (center_x > 0 && start_x > center_x && y_ok) + ms->button = (ms->button & + ~MOUSE_BUTTON1DOWN) | center_bt; + } + + /* If in tap-hold or three fingers, add the recorded button. */ + if (gest->in_taphold || (nfingers == 3 && three_finger_drag)) + ms->button |= gest->tap_button; + + /* + * For tap, we keep the maximum number of fingers and the + * pressure peak. + */ + gest->fingers_nb = MAX(nfingers, gest->fingers_nb); + gest->zmax = MAX(z, gest->zmax); + + dx = abs(x0 - start_x); + dy = abs(y0 - start_y); + + /* + * A scrolling action must not conflict with a tap action. + * Here are the conditions to consider a scrolling action: + * - the action in a configurable area + * - one of the following: + * . the distance between the last packet and the + * first should be above a configurable minimum + * . tap timed out + */ + if (!gest->in_taphold && !ms->button && + (!gest->in_vscroll || two_finger_scroll) && + (tscmp(time, &gest->taptimeout, >) || + ((gest->fingers_nb == 2 || !two_finger_scroll) && + (dx >= tpinfo->vscroll_min_delta * tphw->res_x || + dy >= tpinfo->vscroll_min_delta * tphw->res_y)))) { + /* + * Handle two finger scrolling. + * Note that we don't rely on fingers_nb + * as that keeps the maximum number of fingers. + */ + if (two_finger_scroll) { + if (nfingers == 2) { + gest->in_vscroll += dy ? 2 : 0; + gest->in_vscroll += dx ? 1 : 0; + } + } else { + /* Check for horizontal scrolling. */ + if ((vscroll_hor_area > 0 && + start_y <= min_y + vscroll_hor_area) || + (vscroll_hor_area < 0 && + start_y >= max_y + vscroll_hor_area)) + gest->in_vscroll += 2; + + /* Check for vertical scrolling. */ + if ((vscroll_ver_area > 0 && + start_x <= min_x + vscroll_ver_area) || + (vscroll_ver_area < 0 && + start_x >= max_x + vscroll_ver_area)) + gest->in_vscroll += 1; + } + /* Avoid conflicts if area overlaps. */ + if (gest->in_vscroll >= 3) + gest->in_vscroll = (dx > dy) ? 2 : 1; + } + /* + * Reset two finger scrolling when the number of fingers + * is different from two or any button is pressed. + */ + if (two_finger_scroll && gest->in_vscroll != 0 && + (nfingers != 2 || ms->button)) + gest->in_vscroll = 0; + + debug("virtual scrolling: %s " + "(direction=%d, dx=%d, dy=%d, fingers=%d)", + gest->in_vscroll != 0 ? "YES" : "NO", + gest->in_vscroll, dx, dy, gest->fingers_nb); + + /* Workaround cursor jump on finger set changes */ + if (prev_nfingers != nfingers) + return (GEST_IGNORE); + + switch (gest->in_vscroll) { + case 1: + return (GEST_VSCROLL); + case 2: + return (GEST_HSCROLL); + default: + /* NO-OP */; + } + + /* Max delta is disabled for multi-fingers tap. */ + if (gest->fingers_nb == 1 && + tscmp(time, &gest->taptimeout, <=)) { + tap_max_delta_x = tpinfo->tap_max_delta * tphw->res_x; + tap_max_delta_y = tpinfo->tap_max_delta * tphw->res_y; + + debug("dx=%d, dy=%d, deltax=%d, deltay=%d", + dx, dy, tap_max_delta_x, tap_max_delta_y); + if (dx > tap_max_delta_x || dy > tap_max_delta_y) { + debug("not a tap"); + tsclr(&gest->taptimeout); + } + } + + if (tscmp(time, &gest->taptimeout, <=)) + return (gest->fingers_nb > 1 ? + GEST_IGNORE : GEST_ACCUMULATE); + else + return (GEST_MOVE); + } + + /* + * Handle a case when clickpad pressure drops before than + * button up event when surface is released after click. + * It interferes with softbuttons. + */ + if (tphw->is_clickpad && tpinfo->softbuttons_y != 0) + ms->button &= ~MOUSE_BUTTON1DOWN; + + gest->prev_nfingers = 0; + + if (gest->fingerdown) { + /* + * An action is currently taking place but the pressure + * dropped under the minimum, putting an end to it. + */ + + gest->fingerdown = false; + + /* Check for tap. */ + debug("zmax=%d fingers=%d", gest->zmax, gest->fingers_nb); + if (!gest->in_vscroll && gest->zmax >= tpinfo->tap_threshold && + tscmp(time, &gest->taptimeout, <=)) { + /* + * We have a tap if: + * - the maximum pressure went over tap_threshold + * - the action ended before tap_timeout + * + * To handle tap-hold, we must delay any button push to + * the next action. + */ + if (gest->in_taphold) { + /* + * This is the second and last tap of a + * double tap action, not a tap-hold. + */ + gest->in_taphold = false; + + /* + * For double-tap to work: + * - no button press is emitted (to + * simulate a button release) + * - PSM_FLAGS_FINGERDOWN is set to + * force the next packet to emit a + * button press) + */ + debug("button RELEASE: %d", gest->tap_button); + gest->fingerdown = true; + + /* Schedule button press on next event */ + gest->idletimeout = 0; + } else { + /* + * This is the first tap: we set the + * tap-hold state and notify the button + * down event. + */ + gest->in_taphold = true; + gest->idletimeout = tpinfo->taphold_timeout; + gest->taptimeout = tsaddms(time, tap_timeout); + + switch (gest->fingers_nb) { + case 3: + gest->tap_button = + MOUSE_BUTTON2DOWN; + break; + case 2: + gest->tap_button = + MOUSE_BUTTON3DOWN; + break; + default: + gest->tap_button = + MOUSE_BUTTON1DOWN; + } + debug("button PRESS: %d", gest->tap_button); + ms->button |= gest->tap_button; + } + } else { + /* + * Not enough pressure or timeout: reset + * tap-hold state. + */ + if (gest->in_taphold) { + debug("button RELEASE: %d", gest->tap_button); + gest->in_taphold = false; + } else { + debug("not a tap-hold"); + } + } + } else if (!gest->fingerdown && gest->in_taphold) { + /* + * For a tap-hold to work, the button must remain down at + * least until timeout (where the in_taphold flags will be + * cleared) or during the next action. + */ + if (tscmp(time, &gest->taptimeout, <=)) { + ms->button |= gest->tap_button; + } else { + debug("button RELEASE: %d", gest->tap_button); + gest->in_taphold = false; + } + } + + return (GEST_IGNORE); +} diff --git a/usr.sbin/moused/moused/moused.conf b/usr.sbin/moused/moused/moused.conf new file mode 100644 index 000000000000..04970c820c7f --- /dev/null +++ b/usr.sbin/moused/moused/moused.conf @@ -0,0 +1,43 @@ +[Default] +MatchName=* + +MousedGrabDevice=0 # 1/0 +MousedIgnoreDevice=0 # 1/0 + +MousedClickThreshold=500 # ms +MousedEmulateThirdButton=0 # 1/0 +MousedEmulateThirdButtonTimeout=100 # ms +MousedExponentialAccel=1.3 # float +MousedExponentialOffset=2.0 # dots +MousedLinearAccelX=1.0 # float +MousedLinearAccelY=1.0 # float +MousedLinearAccelZ=1.0 # float +#MousedMapZAxis=0 +MousedVirtualScrollEnable=0 # 1/0 +MousedHorVirtualScrollEnable=0 # 1/0 +MousedVirtualScrollSpeed=2 # dots +MousedVirtualScrollThreshold=3 # dots +MousedWMode=0 # button num + +[Mouse drift termination] +MatchDevType=mouse # mouse/touchpad +MousedDriftTerminate=0 # 1/0 +MousedDriftDistance=4 # dots +MousedDriftTime=500 # ms +MousedDriftAfter=4000 # ms + +[Default touchpad gesture settings] +MatchDevType=touchpad # mouse/touchpad +MousedTwoFingerScroll=1 # 1/0 +MousedNaturalScroll=0 # 1/0 +MousedThreeFingerDrag=0 # 1/0 +MousedSoftButton2X=42 # pct +MousedSoftButton3X=58 # pct +MousedSoftButtonsY=25 # pct +MousedTapTimeout=180 # ms +#MousedTapPressureThreshold=20 +MousedTapMaxDelta=1.3 # mm +MousedTapholdTimeout=300 # ms +MousedVScrollMinDelta=1.25 # mm +MousedVScrollHorArea=0.0 # mm +MousedVScrollVerArea=-15.0 # mm diff --git a/usr.sbin/moused/moused/moused.conf.5 b/usr.sbin/moused/moused/moused.conf.5 new file mode 100644 index 000000000000..bc62b5d00995 --- /dev/null +++ b/usr.sbin/moused/moused/moused.conf.5 @@ -0,0 +1,422 @@ +.\" SPDX-License-Identifier: BSD-2-Clause +.\" +.\" Copyright (c) 2025 Vladimir Kondratyev <wulf@FreeBSD.org> +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.Dd May 19, 2025 +.Dt MOUSED.CONF 5 +.Os +.Sh NAME +.Nm moused.conf +.Nd mouse daemon configuration file +.Sh DESCRIPTION +The +.Nm +file specifies how the +.Xr moused 8 +(mouse daemon) should operate. It provides ability to adjust certain +mice parameters on per-device basis. +.Pp +Configuration file format is derrived from +.Xr libinput 1 +device quirk files. +A file may contain multiple section headers ([some identifier]) +followed by one or more MatchFoo=Bar directives, followed by at least +one of MousedFoo=bar or AttrFoo=bar directive. +A configuration file must contain at least one section, each section +must have at least one +.Sq Match +tag and at least one of either +.Sq Attr +or +.Sq Moused . +Section names are free-form and may contain spaces. +.Ss List of currently available matches. +.Bl -tag -width indent +.It MatchName, MatchUniq +Match on the NAME or UNIQ udev property on this device. These +properties are typically derived from the device’s kernel name or uniq. +These matches use +.Fn fnmatch +globs. +.It MatchBus +A lower-case bus name. Currently supported are usb, bluetooth, ps2, +rmi, i2c, and spi. +.It MatchVendor, MatchProduct, MatchVersion +The hexadecmial 4-digit vendor ID, product ID or driver version as +exported, without a 0x prefix. +.It MatchDMIModalias, MatchDeviceTree +An +.Fn fnmatch +glob for the DMI modalias or the DeviceTree compatible string. +.It MatchDevType +One of touchpad, mouse, pointingstick, keyboard, joystick, tablet, +tablet-pad. +Only touchpad and mouse types are suppported. +.El +.Ss List of currently available Moused tags. +.Bl -tag -width indent +.It MousedGrabDevice +Only for evdev interface. +Become the sole recipient of all incoming input events. +This prevents other processes from getting input events on the device. +.Pp +Use +.Fl g +option alternatively. +.It MousedIgnoreDevice +Ignore given device. +.It MousedClickThreshold +Set double click speed as the maximum interval in msec between button clicks. +Without this option, the default value of 500 msec will be assumed. +This option will have effect only on the cut and paste operations +in the text mode console. +The user program which is reading mouse data +via +.Xr sysmouse 4 +will not be affected. +.Pp +Use +.Fl C +option alternatively. +.It MousedEmulateThirdButton +Emulate the third (middle) button for 2-button mice. +It is emulated +by pressing the left and right physical buttons simultaneously. +.Pp +Use +.Fl 3 +option alternatively. +.It MousedEmulateThirdButtonTimeout +When the third button emulation is enabled +(see above), +the +.Xr moused 8 +utility waits +.Ar MousedEmulateThirdButtonTimeout +msec at most before deciding whether two buttons are being pressed +simultaneously. +The default timeout is 100 msec. +.Pp +Use +.Fl E +option alternatively. +.It MousedLinearAccelX +.It MousedLinearAccelY +.It MousedLinearAccelZ +Accelerate or decelerate the mouse input. +This is a linear acceleration only. +Values less than 1.0 slow down movement, values greater than 1.0 speed it +up. +.Pp +You can use the +.Ar MousedLinearAccel +and +.Ar MousedExponentialAccel +options at the same time to have the combined effect +of linear and exponential acceleration. +.Pp +Use +.Fl a +option alternatively. +.It MousedExponentialAccel +.It MousedExponentialOffset +Apply exponential (dynamic) acceleration to mouse movements: +the faster you move the mouse, the more it will be accelerated. +That means that small mouse movements are not accelerated, +so they are still very accurate, while a faster movement will +drive the pointer quickly across the screen. +.Pp +The +.Ar MousedExponentialAccel +value specifies the exponent, which is basically +the amount of acceleration. Useful values are in the +range 1.1 to 2.0, but it depends on your mouse hardware +and your personal preference. A value of 1.0 means no +exponential acceleration. A value of 2.0 means squared +acceleration (i.e. if you move the mouse twice as fast, +the pointer will move four times as fast on the screen). +Values beyond 2.0 are possible but not recommended. +A good value to start is probably 1.5. +.Pp +The optional +.Ar MousedExponentialOffset +value specifies the distance at which the acceleration +begins. The default is 1.0, which means that the +acceleration is applied to movements larger than one unit. +If you specify a larger value, it takes more speed for +the acceleration to kick in, i.e. the speed range for +small and accurate movements is wider. +Usually the default should be sufficient, but if you're +not satisfied with the behaviour, try a value of 2.0. +.Pp +Note that the +.Fl A +option interacts badly with the X server's own acceleration, +which doesn't work very well anyway. Therefore it is +recommended to switch it off if necessary: +.Dq xset m 1 . +.Pp +Use +.Fl A +option alternatively. +.It MousedMapZAxis +Map Z axis (roller/wheel) movement to another axis or to virtual buttons. +Does not supported yet. +Use +.Fl z +option instead. +.It MousedVirtualScrollEnable +Enable +.Dq Virtual Scrolling . +With this option set, holding the middle mouse +button down will cause motion to be interpreted as scrolling. +Use the +.Ar MousedVirtualScrollThreshold +option to set the distance the mouse must move before the scrolling mode is +activated and the +.Ar MousedVirtualScrollSpeed +option to set the scrolling speed. +.Pp +Use +.Fl V +option alternatively. +.It MousedHorVirtualScrollEnable +Enable +.Dq Horizontal Virtual Scrolling . +With this option set, holding the middle mouse +button down will cause motion to be interpreted as +horizontal scrolling. +Use the +.Ar MousedVirtualScrollThreshold +option to set the distance the mouse must move before the scrolling mode is +activated and the +.Ar MousedVirtualScrollSpeed +option to set the scrolling speed. +This option may be used with or without the +.Ar MousedVirtualScrollEnable +option. +.Pp +Use +.Fl H +option alternatively. +.It MousedVirtualScrollSpeed= Ar distance +When +.Dq Virtual Scrolling +is enabled, the +.Ar MousedVirtualScrollSpeed +option can be used to set the +.Ar distance +(in pixels) that the mouse must move before a scroll event +is generated. +This effectively controls the scrolling speed. +The default +.Ar distance +is 2 pixels. +.Pp +Use +.Fl L +option alternatively. +.It MousedVirtualScrollThreshold= Ar distance +When +.Dq Virtual Scrolling +is enabled, the +.Ar MousedVirtualScrollThreshold +option can be used to set the +.Ar distance +(in pixels) that the mouse must move before the scrolling +mode is activated. +The default +.Ar distance +is 3 pixels. +.Pp +Use +.Fl U +option alternatively. +.It MousedWMode= Ar N +Make the physical button +.Ar N +act as the wheel mode button. +While this button is pressed, X and Y axis movement is reported to be zero +and the Y axis movement is mapped to Z axis. +You may further map the Z axis movement to virtual buttons by the +.Ar MousedMapZAxis +tag. +.Pp +Use +.Fl w +option alternatively. +.El +.Ss List of currently available Moused mice specific tags. +.Bl -tag -width indent +.It MousedDriftTerminate +.It MousedDriftDistance +.It MousedDriftTime +.It MousedDriftAfter +Terminate drift. +Use this option if mouse pointer slowly wanders when mouse is not moved. +Movements up to +.Ar MousedDriftDistance +(for example 4) pixels (X+Y) in +.Ar MousedDriftTime +msec (default 500) are ignored, except during +.Ar MousedDriftAfter +msec (default 4000) since last real mouse movement. +.Pp +Use +.Fl T +option alternatively. +.El +.Ss List of currently available Moused touchpad specific tags. +.Bl -tag -width indent +.It MousedTwoFingerScroll +Enable two finger scrolling. +.It MousedNaturalScroll +Enable natural scrolling. +.It MousedThreeFingerDrag +Enable dragging with three fingers. +.It MousedSoftButton2X +Horisontal position of 2-nd softbutton left edge in percents. +(0-disable) +.It MousedSoftButton3X +Horisontal position of 3-rd softbutton left edge in percents. +(0-disable) +.It MousedSoftButtonsY +Vertical size of softbuttons area in percents. +Use negative values to place softbutton area at top of touchpad. +.It MousedTapTimeout +Tap timeout in milliseconds +.It MousedTapPressureThreshold +Pressure threshold to detect tap. +.It MousedTapMaxDelta +Length of finger movement above which a tap is ignored measured in mm. +.It MousedTapholdTimeout +Maximum elapsed time between two taps to consider a tap-hold action. +.It MousedVScrollMinDelta +Minimum movement to consider virtual scrolling. +.It MousedVScrollHorArea + Area reserved for horizontal virtual scrolling in mm. +.It MousedVScrollVerArea +Area reserved for vertical virtual scrolling in mm. +.El +.Ss List of currently available libinput-compatible tags. +.Bl -tag -width indent +.It AttrSizeHint +Hints at the width x height of the device in mm. +.It AttrTouchSizeRange +Not supported yet. +.It AttrPalmSizeThreshold +Maximum finger width to detect palm in mm. +.It AttrLidSwitchReliability +Not supported yet. +.It AttrKeyboardIntegration +Not supported yet. +.It AttrPointingStickIntegration +Not supported yet. +.It AttrTPKComboLayout +Not supported yet. +.It AttrPressureRange= Ar N : Ar M +Specifies the touch pressure required to trigger a press +.Ar N +and to trigger a release +.Ar M . +.It AttrPalmPressureThreshold +Maximum pressure to detect palm. +.It AttrResolutionHint +Hints at the resolution of the x/y axis in units/mm. +.It AttrTrackpointMultiplier +Not supported yet. +.It AttrThumbPressureThreshold +Not supported yet. +.It AttrUseVelocityAveraging +Not supported yet. +.It AttrTabletSmoothing +Not supported yet. +.It AttrThumbSizeThreshold +Not supported yet. +.It AttrMscTimestamp +Not supported yet. +.It AttrEventCode +Enables or disables the evdev event type/code tuples on the device. +The prefix for each entry is either +.Sq + +(enable) or +.Sq - +(disable). +Entries may be a named event type, or a named event code, or a named +event type with a hexadecimal event code, separated by a single colon. +.It AttrInputProp +Enables or disables the evdev input property on the device. +The prefix for each entry is either +,Sq + +(enable) or +.Sq - +(disable). +Entries may be a named input property or the hexadecimal value of that +property. +.El +.Pp +All +.Xr libinput 1 +.Sq Model +quirks are currently ignored. +.Sh FILES +.Bl -tag -width /usr/local/etc/moused.conf -compact +.It Pa /usr/local/etc/moused.conf +The file +.Nm +resides in +.Pa /usr/local/etc . +.It Pa /usr/local/share/moused/*.quirks +Predefined quirks processed before +.Nm . +.El +.Sh EXAMPLES +Set touch pressure and palm detection thesholds for PS/2 Synaptics +touchpad: +.Bd -literal -offset indent +[SynPS/2 Synaptics TouchPad] +MatchDevType=touchpad +MatchName=SynPS/2 Synaptics TouchPad +AttrPressureRange=35:30 +AttrPalmPressureThreshold=220 +.Ed +.Sh SEE ALSO +.Xr moused 8 +.Pp +.Xr libinput 1 +device quirk format: +.Lk https://wayland.freedesktop.org/libinput/doc/latest/device-quirks.html +.Sh HISTORY +The +.Nm +file format first appeared in +.Fx 15.0 . +.Sh AUTHORS +This manual page was written by +.An Vladimir Kondratyev Aq Mt wulf@FreeBSD.org +based on +. Xr moused 8 +manual page and +.Xr libinput 1 +documentation. diff --git a/usr.sbin/moused/moused/quirks.c b/usr.sbin/moused/moused/quirks.c new file mode 100644 index 000000000000..3b87b34419e9 --- /dev/null +++ b/usr.sbin/moused/moused/quirks.c @@ -0,0 +1,2033 @@ +/* + * Copyright © 2018 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This has the hallmarks of a library to make it re-usable from the tests + * and from the list-quirks tool. It doesn't have all of the features from a + * library you'd expect though + */ + +#include <sys/types.h> +#include <dev/evdev/input.h> + +#undef NDEBUG /* You don't get to disable asserts here */ +#include <assert.h> +#include <dirent.h> +#include <errno.h> +#include <fnmatch.h> +#include <kenv.h> +#include <libgen.h> +#include <limits.h> +#include <stdarg.h> +#include <stdbool.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "quirks.h" +#include "util.h" +#include "util-list.h" + + +/* Custom logging so we can have detailed output for the tool but minimal + * logging for moused itself. */ +#define qlog_debug(ctx_, ...) quirk_log_msg((ctx_), QLOG_NOISE, __VA_ARGS__) +#define qlog_info(ctx_, ...) quirk_log_msg((ctx_), QLOG_INFO, __VA_ARGS__) +#define qlog_error(ctx_, ...) quirk_log_msg((ctx_), QLOG_ERROR, __VA_ARGS__) +#define qlog_parser(ctx_, ...) quirk_log_msg((ctx_), QLOG_PARSER_ERROR, __VA_ARGS__) + +enum property_type { + PT_UINT, + PT_INT, + PT_STRING, + PT_BOOL, + PT_DIMENSION, + PT_RANGE, + PT_DOUBLE, + PT_TUPLES, + PT_UINT_ARRAY, +}; + +struct quirk_array { + union { + uint32_t u[32]; + } data; + size_t nelements; +}; + +/** + * Generic value holder for the property types we support. The type + * identifies which value in the union is defined and we expect callers to + * already know which type yields which value. + */ +struct property { + size_t refcount; + struct list link; /* struct sections.properties */ + + enum quirk id; + enum property_type type; + union { + bool b; + uint32_t u; + int32_t i; + char *s; + double d; + struct quirk_dimensions dim; + struct quirk_range range; + struct quirk_tuples tuples; + struct quirk_array array; + } value; +}; + +enum match_flags { + M_NAME = bit(0), + M_BUS = bit(1), + M_VID = bit(2), + M_PID = bit(3), + M_DMI = bit(4), + M_UDEV_TYPE = bit(5), + M_DT = bit(6), + M_VERSION = bit(7), + M_UNIQ = bit(8), + + M_LAST = M_UNIQ, +}; + +enum bustype { + BT_UNKNOWN, + BT_USB, + BT_BLUETOOTH, + BT_PS2, + BT_RMI, + BT_I2C, + BT_SPI, +}; + +enum udev_type { + UDEV_MOUSE = bit(1), + UDEV_POINTINGSTICK = bit(2), + UDEV_TOUCHPAD = bit(3), + UDEV_TABLET = bit(4), + UDEV_TABLET_PAD = bit(5), + UDEV_JOYSTICK = bit(6), + UDEV_KEYBOARD = bit(7), +}; + +/** + * Contains the combined set of matches for one section or the values for + * one device. + * + * bits defines which fields are set, the rest is zero. + */ +struct match { + uint32_t bits; + + char *name; + char *uniq; + enum bustype bus; + uint32_t vendor; + uint32_t product[64]; /* zero-terminated */ + uint32_t version; + + char *dmi; /* dmi modalias with preceding "dmi:" */ + + /* We can have more than one type set, so this is a bitfield */ + uint32_t udev_type; + + char *dt; /* device tree compatible (first) string */ +}; + +/** + * Represents one section in the .quirks file. + */ +struct section { + struct list link; + + bool has_match; /* to check for empty sections */ + bool has_property; /* to check for empty sections */ + + char *name; /* the [Section Name] */ + struct match match; + struct list properties; +}; + +/** + * The struct returned to the caller. It contains the + * properties for a given device. + */ +struct quirks { + size_t refcount; + struct list link; /* struct quirks_context.quirks */ + + /* These are not ref'd, just a collection of pointers */ + struct property **properties; + size_t nproperties; + + /* Special properties for AttrEventCode and AttrInputCode, these are + * owned by us, not the section */ + struct list floating_properties; +}; + +/** + * Quirk matching context, initialized once with quirks_init_subsystem() + */ +struct quirks_context { + size_t refcount; + + moused_log_handler *log_handler; + enum quirks_log_type log_type; + + char *dmi; + char *dt; + + struct list sections; + + /* list of quirks handed to moused, just for bookkeeping */ + struct list quirks; +}; + +MOUSED_ATTRIBUTE_PRINTF(3, 0) +static inline void +quirk_log_msg_va(struct quirks_context *ctx, + enum quirks_log_priorities priority, + const char *format, + va_list args) +{ + switch (priority) { + /* We don't use this if we're logging through syslog */ + default: + case QLOG_NOISE: + case QLOG_PARSER_ERROR: + if (ctx->log_type == QLOG_MOUSED_LOGGING) + return; + break; + case QLOG_DEBUG: /* These map straight to syslog priorities */ + case QLOG_INFO: + case QLOG_ERROR: + break; + } + + ctx->log_handler(priority, + 0, + format, + args); +} + +MOUSED_ATTRIBUTE_PRINTF(3, 4) +static inline void +quirk_log_msg(struct quirks_context *ctx, + enum quirks_log_priorities priority, + const char *format, + ...) +{ + va_list args; + + va_start(args, format); + quirk_log_msg_va(ctx, priority, format, args); + va_end(args); + +} + +const char * +quirk_get_name(enum quirk q) +{ + switch(q) { + case QUIRK_MODEL_ALPS_SERIAL_TOUCHPAD: return "ModelALPSSerialTouchpad"; + case QUIRK_MODEL_APPLE_TOUCHPAD: return "ModelAppleTouchpad"; + case QUIRK_MODEL_APPLE_TOUCHPAD_ONEBUTTON: return "ModelAppleTouchpadOneButton"; + case QUIRK_MODEL_BOUNCING_KEYS: return "ModelBouncingKeys"; + case QUIRK_MODEL_CHROMEBOOK: return "ModelChromebook"; + case QUIRK_MODEL_CLEVO_W740SU: return "ModelClevoW740SU"; + case QUIRK_MODEL_DELL_CANVAS_TOTEM: return "ModelDellCanvasTotem"; + case QUIRK_MODEL_HP_PAVILION_DM4_TOUCHPAD: return "ModelHPPavilionDM4Touchpad"; + case QUIRK_MODEL_HP_ZBOOK_STUDIO_G3: return "ModelHPZBookStudioG3"; + case QUIRK_MODEL_INVERT_HORIZONTAL_SCROLLING: return "ModelInvertHorizontalScrolling"; + case QUIRK_MODEL_LENOVO_SCROLLPOINT: return "ModelLenovoScrollPoint"; + case QUIRK_MODEL_LENOVO_T450_TOUCHPAD: return "ModelLenovoT450Touchpad"; + case QUIRK_MODEL_LENOVO_X1GEN6_TOUCHPAD: return "ModelLenovoX1Gen6Touchpad"; + case QUIRK_MODEL_LENOVO_X230: return "ModelLenovoX230"; + case QUIRK_MODEL_SYNAPTICS_SERIAL_TOUCHPAD: return "ModelSynapticsSerialTouchpad"; + case QUIRK_MODEL_SYSTEM76_BONOBO: return "ModelSystem76Bonobo"; + case QUIRK_MODEL_SYSTEM76_GALAGO: return "ModelSystem76Galago"; + case QUIRK_MODEL_SYSTEM76_KUDU: return "ModelSystem76Kudu"; + case QUIRK_MODEL_TABLET_MODE_NO_SUSPEND: return "ModelTabletModeNoSuspend"; + case QUIRK_MODEL_TABLET_MODE_SWITCH_UNRELIABLE: return "ModelTabletModeSwitchUnreliable"; + case QUIRK_MODEL_TOUCHPAD_VISIBLE_MARKER: return "ModelTouchpadVisibleMarker"; + case QUIRK_MODEL_TOUCHPAD_PHANTOM_CLICKS: return "ModelTouchpadPhantomClicks"; + case QUIRK_MODEL_TRACKBALL: return "ModelTrackball"; + case QUIRK_MODEL_WACOM_TOUCHPAD: return "ModelWacomTouchpad"; + case QUIRK_MODEL_PRESSURE_PAD: return "ModelPressurePad"; + + case QUIRK_ATTR_SIZE_HINT: return "AttrSizeHint"; + case QUIRK_ATTR_TOUCH_SIZE_RANGE: return "AttrTouchSizeRange"; + case QUIRK_ATTR_PALM_SIZE_THRESHOLD: return "AttrPalmSizeThreshold"; + case QUIRK_ATTR_LID_SWITCH_RELIABILITY: return "AttrLidSwitchReliability"; + case QUIRK_ATTR_KEYBOARD_INTEGRATION: return "AttrKeyboardIntegration"; + case QUIRK_ATTR_TRACKPOINT_INTEGRATION: return "AttrPointingStickIntegration"; + case QUIRK_ATTR_TPKBCOMBO_LAYOUT: return "AttrTPKComboLayout"; + case QUIRK_ATTR_PRESSURE_RANGE: return "AttrPressureRange"; + case QUIRK_ATTR_PALM_PRESSURE_THRESHOLD: return "AttrPalmPressureThreshold"; + case QUIRK_ATTR_RESOLUTION_HINT: return "AttrResolutionHint"; + case QUIRK_ATTR_TRACKPOINT_MULTIPLIER: return "AttrTrackpointMultiplier"; + case QUIRK_ATTR_THUMB_PRESSURE_THRESHOLD: return "AttrThumbPressureThreshold"; + case QUIRK_ATTR_USE_VELOCITY_AVERAGING: return "AttrUseVelocityAveraging"; + case QUIRK_ATTR_TABLET_SMOOTHING: return "AttrTabletSmoothing"; + case QUIRK_ATTR_THUMB_SIZE_THRESHOLD: return "AttrThumbSizeThreshold"; + case QUIRK_ATTR_MSC_TIMESTAMP: return "AttrMscTimestamp"; + case QUIRK_ATTR_EVENT_CODE: return "AttrEventCode"; + case QUIRK_ATTR_INPUT_PROP: return "AttrInputProp"; + + case MOUSED_GRAB_DEVICE: return "MousedGrabDevice"; + case MOUSED_IGNORE_DEVICE: return "MousedIgnoreDevice"; + + case MOUSED_CLICK_THRESHOLD: return "MousedClickThreshold"; + case MOUSED_DRIFT_TERMINATE: return "MousedDriftTerminate"; + case MOUSED_DRIFT_DISTANCE: return "MousedDriftDistance"; + case MOUSED_DRIFT_TIME: return "MousedDriftTime"; + case MOUSED_DRIFT_AFTER: return "MousedDriftAfter"; + case MOUSED_EMULATE_THIRD_BUTTON: return "MousedEmulateThirdButton"; + case MOUSED_EMULATE_THIRD_BUTTON_TIMEOUT: return "MousedEmulateThirdButtonTimeout"; + case MOUSED_EXPONENTIAL_ACCEL: return "MousedExponentialAccel"; + case MOUSED_EXPONENTIAL_OFFSET: return "MousedExponentialOffset"; + case MOUSED_LINEAR_ACCEL_X: return "MousedLinearAccelX"; + case MOUSED_LINEAR_ACCEL_Y: return "MousedLinearAccelY"; + case MOUSED_LINEAR_ACCEL_Z: return "MousedLinearAccelZ"; + case MOUSED_MAP_Z_AXIS: return "MousedMapZAxis"; + case MOUSED_VIRTUAL_SCROLL_ENABLE: return "MousedVirtualScrollEnable"; + case MOUSED_HOR_VIRTUAL_SCROLL_ENABLE: return "MousedHorVirtualScrollEnable"; + case MOUSED_VIRTUAL_SCROLL_SPEED: return "MousedVirtualScrollSpeed"; + case MOUSED_VIRTUAL_SCROLL_THRESHOLD: return "MousedVirtualScrollThreshold"; + case MOUSED_WMODE: return "MousedWMode"; + + case MOUSED_TWO_FINGER_SCROLL: return "MousedTwoFingerScroll"; + case MOUSED_NATURAL_SCROLL: return "MousedNaturalScroll"; + case MOUSED_THREE_FINGER_DRAG: return "MousedThreeFingerDrag"; + case MOUSED_SOFTBUTTON2_X: return "MousedSoftButton2X"; + case MOUSED_SOFTBUTTON3_X: return "MousedSoftButton3X"; + case MOUSED_SOFTBUTTONS_Y: return "MousedSoftButtonsY"; + case MOUSED_TAP_TIMEOUT: return "MousedTapTimeout"; + case MOUSED_TAP_PRESSURE_THRESHOLD: return "MousedTapPressureThreshold"; + case MOUSED_TAP_MAX_DELTA: return "MousedTapMaxDelta"; + case MOUSED_TAPHOLD_TIMEOUT: return "MousedTapholdTimeout"; + case MOUSED_VSCROLL_MIN_DELTA: return "MousedVScrollMinDelta"; + case MOUSED_VSCROLL_HOR_AREA: return "MousedVScrollHorArea"; + case MOUSED_VSCROLL_VER_AREA: return "MousedVScrollVerArea"; + + + default: + abort(); + } +} + +static inline const char * +matchflagname(enum match_flags f) +{ + switch(f) { + case M_NAME: return "MatchName"; break; + case M_BUS: return "MatchBus"; break; + case M_VID: return "MatchVendor"; break; + case M_PID: return "MatchProduct"; break; + case M_VERSION: return "MatchVersion"; break; + case M_DMI: return "MatchDMIModalias"; break; + case M_UDEV_TYPE: return "MatchDevType"; break; + case M_DT: return "MatchDeviceTree"; break; + case M_UNIQ: return "MatchUniq"; break; + default: + abort(); + } +} + +static inline struct property * +property_new(void) +{ + struct property *p; + + p = zalloc(sizeof *p); + p->refcount = 1; + list_init(&p->link); + + return p; +} + +static inline struct property * +property_ref(struct property *p) +{ + assert(p->refcount > 0); + p->refcount++; + return p; +} + +static inline struct property * +property_unref(struct property *p) +{ + /* Note: we don't cleanup here, that is a separate call so we + can abort if we haven't cleaned up correctly. */ + assert(p->refcount > 0); + p->refcount--; + + return NULL; +} + +/* Separate call so we can verify that the caller unrefs the property + * before shutting down the subsystem. + */ +static inline void +property_cleanup(struct property *p) +{ + /* If we get here, the quirks must've been removed already */ + property_unref(p); + assert(p->refcount == 0); + + list_remove(&p->link); + if (p->type == PT_STRING) + free(p->value.s); + free(p); +} + +/** + * Return the system DMI info in modalias format. + */ +static inline char * +init_dmi(void) +{ +#define LEN (KENV_MVALLEN + 1) + char *modalias; + char bios_vendor[LEN], bios_version[LEN], bios_date[LEN]; + char sys_vendor[LEN], product_name[LEN], product_version[LEN]; + char board_vendor[LEN], board_name[LEN], board_version[LEN]; + char chassis_vendor[LEN], chassis_type[LEN], chassis_version[LEN]; + int chassis_type_num = 0x2; + + kenv(KENV_GET, "smbios.bios.vendor", bios_vendor, LEN); + kenv(KENV_GET, "smbios.bios.version", bios_version, LEN); + kenv(KENV_GET, "smbios.bios.reldate", bios_date, LEN); + kenv(KENV_GET, "smbios.system.maker", sys_vendor, LEN); + kenv(KENV_GET, "smbios.system.product", product_name, LEN); + kenv(KENV_GET, "smbios.system.version", product_version, LEN); + kenv(KENV_GET, "smbios.planar.maker", board_vendor, LEN); + kenv(KENV_GET, "smbios.planar.product", board_name, LEN); + kenv(KENV_GET, "smbios.planar.version", board_version, LEN); + kenv(KENV_GET, "smbios.chassis.vendor", chassis_vendor, LEN); + kenv(KENV_GET, "smbios.chassis.type", chassis_type, LEN); + kenv(KENV_GET, "smbios.chassis.version", chassis_version, LEN); +#undef LEN + + if (strcmp(chassis_type, "Desktop") == 0) + chassis_type_num = 0x3; + else if (strcmp(chassis_type, "Portable") == 0) + chassis_type_num = 0x8; + else if (strcmp(chassis_type, "Laptop") == 0) + chassis_type_num = 0x9; + else if (strcmp(chassis_type, "Notebook") == 0) + chassis_type_num = 0xA; + else if (strcmp(chassis_type, "Tablet") == 0) + chassis_type_num = 0x1E; + else if (strcmp(chassis_type, "Convertible") == 0) + chassis_type_num = 0x1F; + else if (strcmp(chassis_type, "Detachable") == 0) + chassis_type_num = 0x20; + + xasprintf(&modalias, + "dmi:bvn%s:bvr%s:bd%s:svn%s:pn%s:pvr%s:rvn%s:rn%s:rvr%s:cvn%s:ct%d:cvr%s:", + bios_vendor, bios_version, bios_date, sys_vendor, product_name, + product_version, board_vendor, board_name, board_version, chassis_vendor, + chassis_type_num, chassis_version); + + return modalias; +} + +/** + * Return the dt compatible string + */ +static inline char * +init_dt(void) +{ + char compatible[1024]; + char *copy = NULL; + const char *syspath = "/sys/firmware/devicetree/base/compatible"; + FILE *fp; + + if (getenv("LIBINPUT_RUNNING_TEST_SUITE")) + return safe_strdup(""); + + fp = fopen(syspath, "r"); + if (!fp) + return NULL; + + /* devicetree/base/compatible has multiple null-terminated entries + but we only care about the first one here, so strdup is enough */ + if (fgets(compatible, sizeof(compatible), fp)) { + copy = safe_strdup(compatible); + } + + fclose(fp); + + return copy; +} + +static inline struct section * +section_new(const char *path, const char *name) +{ + struct section *s = zalloc(sizeof(*s)); + + char *path_dup = safe_strdup(path); + xasprintf(&s->name, "%s (%s)", name, basename(path_dup)); + free(path_dup); + list_init(&s->link); + list_init(&s->properties); + + return s; +} + +static inline void +section_destroy(struct section *s) +{ + struct property *p; + + free(s->name); + free(s->match.name); + free(s->match.uniq); + free(s->match.dmi); + free(s->match.dt); + + list_for_each_safe(p, &s->properties, link) + property_cleanup(p); + + assert(list_empty(&s->properties)); + + list_remove(&s->link); + free(s); +} + +static inline bool +parse_hex(const char *value, unsigned int *parsed) +{ + return strstartswith(value, "0x") && + safe_atou_base(value, parsed, 16) && + strspn(value, "0123456789xABCDEF") == strlen(value) && + *parsed <= 0xFFFF; +} + +static int +strv_parse_hex(const char *str, size_t index, void *data) +{ + unsigned int *product = data; + + return !parse_hex(str, &product[index]); /* 0 for success */ +} + +/** + * Parse a MatchFooBar=banana line. + * + * @param section The section struct to be filled in + * @param key The MatchFooBar part of the line + * @param value The banana part of the line. + * + * @return true on success, false otherwise. + */ +static bool +parse_match(struct quirks_context *ctx, + struct section *s, + const char *key, + const char *value) +{ + int rc = false; + +#define check_set_bit(s_, bit_) { \ + if ((s_)->match.bits & (bit_)) goto out; \ + (s_)->match.bits |= (bit_); \ + } + + assert(strlen(value) >= 1); + + if (streq(key, "MatchName")) { + check_set_bit(s, M_NAME); + s->match.name = safe_strdup(value); + } else if (streq(key, "MatchUniq")) { + check_set_bit(s, M_UNIQ); + s->match.uniq = safe_strdup(value); + } else if (streq(key, "MatchBus")) { + check_set_bit(s, M_BUS); + if (streq(value, "usb")) + s->match.bus = BT_USB; + else if (streq(value, "bluetooth")) + s->match.bus = BT_BLUETOOTH; + else if (streq(value, "ps2")) + s->match.bus = BT_PS2; + else if (streq(value, "rmi")) + s->match.bus = BT_RMI; + else if (streq(value, "i2c")) + s->match.bus = BT_I2C; + else if (streq(value, "spi")) + s->match.bus = BT_SPI; + else + goto out; + } else if (streq(key, "MatchVendor")) { + unsigned int vendor; + + check_set_bit(s, M_VID); + if (!parse_hex(value, &vendor)) + goto out; + + s->match.vendor = vendor; + } else if (streq(key, "MatchProduct")) { + unsigned int product[ARRAY_LENGTH(s->match.product)] = {0}; + const size_t max = ARRAY_LENGTH(s->match.product) - 1; + + size_t nelems = 0; + char **strs = strv_from_string(value, ";", &nelems); + int rc = strv_for_each_n((const char**)strs, max, strv_parse_hex, product); + strv_free(strs); + if (rc != 0) + goto out; + + check_set_bit(s, M_PID); + memcpy(s->match.product, product, sizeof(product)); + } else if (streq(key, "MatchVersion")) { + unsigned int version; + + check_set_bit(s, M_VERSION); + if (!parse_hex(value, &version)) + goto out; + + s->match.version = version; + } else if (streq(key, "MatchDMIModalias")) { + check_set_bit(s, M_DMI); + if (!strstartswith(value, "dmi:")) { + qlog_parser(ctx, + "%s: MatchDMIModalias must start with 'dmi:'\n", + s->name); + goto out; + } + s->match.dmi = safe_strdup(value); + } else if (streq(key, "MatchUdevType") || streq(key, "MatchDevType")) { + check_set_bit(s, M_UDEV_TYPE); + if (streq(value, "touchpad")) + s->match.udev_type = UDEV_TOUCHPAD; + else if (streq(value, "mouse")) + s->match.udev_type = UDEV_MOUSE; + else if (streq(value, "pointingstick")) + s->match.udev_type = UDEV_POINTINGSTICK; + else if (streq(value, "keyboard")) + s->match.udev_type = UDEV_KEYBOARD; + else if (streq(value, "joystick")) + s->match.udev_type = UDEV_JOYSTICK; + else if (streq(value, "tablet")) + s->match.udev_type = UDEV_TABLET; + else if (streq(value, "tablet-pad")) + s->match.udev_type = UDEV_TABLET_PAD; + else + goto out; + } else if (streq(key, "MatchDeviceTree")) { + check_set_bit(s, M_DT); + s->match.dt = safe_strdup(value); + } else { + qlog_error(ctx, "Unknown match key '%s'\n", key); + goto out; + } + +#undef check_set_bit + s->has_match = true; + rc = true; +out: + return rc; +} + +/** + * Parse a ModelFooBar=1 line. + * + * @param section The section struct to be filled in + * @param key The ModelFooBar part of the line + * @param value The value after the =, must be 1 or 0. + * + * @return true on success, false otherwise. + */ +static bool +parse_model(struct quirks_context *ctx, + struct section *s, + const char *key, + const char *value) +{ + bool b; + enum quirk q = QUIRK_MODEL_ALPS_SERIAL_TOUCHPAD; + + assert(strstartswith(key, "Model")); + + if (!parse_boolean_property(value, &b)) + return false; + + do { + if (streq(key, quirk_get_name(q))) { + struct property *p = property_new(); + p->id = q, + p->type = PT_BOOL; + p->value.b = b; + list_append(&s->properties, &p->link); + s->has_property = true; + return true; + } + } while (++q < _QUIRK_LAST_MODEL_QUIRK_); + + qlog_error(ctx, "Unknown key %s in %s\n", key, s->name); + + return false; +} + +/** + * Parse a AttrFooBar=banana line. + * + * @param section The section struct to be filled in + * @param key The AttrFooBar part of the line + * @param value The banana part of the line. + * + * Value parsing depends on the attribute type. + * + * @return true on success, false otherwise. + */ +static inline bool +parse_attr(struct quirks_context *ctx, + struct section *s, + const char *key, + const char *value) +{ + struct property *p = property_new(); + bool rc = false; + struct quirk_dimensions dim; + struct quirk_range range; + unsigned int v; + bool b; + double d; + + if (streq(key, quirk_get_name(QUIRK_ATTR_SIZE_HINT))) { + p->id = QUIRK_ATTR_SIZE_HINT; + if (!parse_dimension_property(value, &dim.x, &dim.y)) + goto out; + p->type = PT_DIMENSION; + p->value.dim = dim; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_TOUCH_SIZE_RANGE))) { + p->id = QUIRK_ATTR_TOUCH_SIZE_RANGE; + if (!parse_range_property(value, &range.upper, &range.lower)) + goto out; + p->type = PT_RANGE; + p->value.range = range; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_PALM_SIZE_THRESHOLD))) { + p->id = QUIRK_ATTR_PALM_SIZE_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_LID_SWITCH_RELIABILITY))) { + p->id = QUIRK_ATTR_LID_SWITCH_RELIABILITY; + if (!streq(value, "reliable") && + !streq(value, "write_open") && + !streq(value, "unreliable")) + goto out; + p->type = PT_STRING; + p->value.s = safe_strdup(value); + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_KEYBOARD_INTEGRATION))) { + p->id = QUIRK_ATTR_KEYBOARD_INTEGRATION; + if (!streq(value, "internal") && !streq(value, "external")) + goto out; + p->type = PT_STRING; + p->value.s = safe_strdup(value); + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_TRACKPOINT_INTEGRATION))) { + p->id = QUIRK_ATTR_TRACKPOINT_INTEGRATION; + if (!streq(value, "internal") && !streq(value, "external")) + goto out; + p->type = PT_STRING; + p->value.s = safe_strdup(value); + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_TPKBCOMBO_LAYOUT))) { + p->id = QUIRK_ATTR_TPKBCOMBO_LAYOUT; + if (!streq(value, "below")) + goto out; + p->type = PT_STRING; + p->value.s = safe_strdup(value); + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_PRESSURE_RANGE))) { + p->id = QUIRK_ATTR_PRESSURE_RANGE; + if (!parse_range_property(value, &range.upper, &range.lower)) + goto out; + p->type = PT_RANGE; + p->value.range = range; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_PALM_PRESSURE_THRESHOLD))) { + p->id = QUIRK_ATTR_PALM_PRESSURE_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_RESOLUTION_HINT))) { + p->id = QUIRK_ATTR_RESOLUTION_HINT; + if (!parse_dimension_property(value, &dim.x, &dim.y)) + goto out; + p->type = PT_DIMENSION; + p->value.dim = dim; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_TRACKPOINT_MULTIPLIER))) { + p->id = QUIRK_ATTR_TRACKPOINT_MULTIPLIER; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_USE_VELOCITY_AVERAGING))) { + p->id = QUIRK_ATTR_USE_VELOCITY_AVERAGING; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_TABLET_SMOOTHING))) { + p->id = QUIRK_ATTR_TABLET_SMOOTHING; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_THUMB_PRESSURE_THRESHOLD))) { + p->id = QUIRK_ATTR_THUMB_PRESSURE_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_THUMB_SIZE_THRESHOLD))) { + p->id = QUIRK_ATTR_THUMB_SIZE_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_MSC_TIMESTAMP))) { + p->id = QUIRK_ATTR_MSC_TIMESTAMP; + if (!streq(value, "watch")) + goto out; + p->type = PT_STRING; + p->value.s = safe_strdup(value); + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_EVENT_CODE))) { + struct input_event events[32]; + size_t nevents = ARRAY_LENGTH(events); + + p->id = QUIRK_ATTR_EVENT_CODE; + + if (!parse_evcode_property(value, events, &nevents) || + nevents == 0) + goto out; + + for (size_t i = 0; i < nevents; i++) { + p->value.tuples.tuples[i].first = events[i].type; + p->value.tuples.tuples[i].second = events[i].code; + p->value.tuples.tuples[i].third = events[i].value; + } + p->value.tuples.ntuples = nevents; + p->type = PT_TUPLES; + + rc = true; + } else if (streq(key, quirk_get_name(QUIRK_ATTR_INPUT_PROP))) { + struct input_prop props[INPUT_PROP_CNT]; + size_t nprops = ARRAY_LENGTH(props); + + p->id = QUIRK_ATTR_INPUT_PROP; + + if (!parse_input_prop_property(value, props, &nprops) || + nprops == 0) + goto out; + + for (size_t i = 0; i < nprops; i++) { + p->value.tuples.tuples[i].first = props[i].prop; + p->value.tuples.tuples[i].second = props[i].enabled; + } + + rc = true; + } else { + qlog_error(ctx, "Unknown key %s in %s\n", key, s->name); + } +out: + if (rc) { + list_append(&s->properties, &p->link); + s->has_property = true; + } else { + property_cleanup(p); + } + return rc; +} + +/** + * Parse a MousedFooBar=banana line. + * + * @param section The section struct to be filled in + * @param key The MousedFooBar part of the line + * @param value The banana part of the line. + * + * Value parsing depends on the attribute type. + * + * @return true on success, false otherwise. + */ +static inline bool +parse_moused(struct quirks_context *ctx, + struct section *s, + const char *key, + const char *value) +{ + struct property *p = property_new(); + bool rc = false; + struct quirk_dimensions dim; + struct quirk_range range; + unsigned int v; + int i; + bool b; + double d; + + if (streq(key, quirk_get_name(MOUSED_GRAB_DEVICE))) { + p->id = MOUSED_GRAB_DEVICE; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_IGNORE_DEVICE))) { + p->id = MOUSED_IGNORE_DEVICE; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_CLICK_THRESHOLD))) { + p->id = MOUSED_CLICK_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_DRIFT_TERMINATE))) { + p->id = MOUSED_DRIFT_TERMINATE; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_DRIFT_DISTANCE))) { + p->id = MOUSED_DRIFT_DISTANCE; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_DRIFT_TIME))) { + p->id = MOUSED_DRIFT_TIME; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_DRIFT_AFTER))) { + p->id = MOUSED_DRIFT_AFTER; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_EMULATE_THIRD_BUTTON))) { + p->id = MOUSED_EMULATE_THIRD_BUTTON; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_EMULATE_THIRD_BUTTON_TIMEOUT))) { + p->id = MOUSED_EMULATE_THIRD_BUTTON_TIMEOUT; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_EXPONENTIAL_ACCEL))) { + p->id = MOUSED_EXPONENTIAL_ACCEL; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_EXPONENTIAL_OFFSET))) { + p->id = MOUSED_EXPONENTIAL_OFFSET; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_LINEAR_ACCEL_X))) { + p->id = MOUSED_LINEAR_ACCEL_X; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_LINEAR_ACCEL_Y))) { + p->id = MOUSED_LINEAR_ACCEL_Y; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_LINEAR_ACCEL_Z))) { + p->id = MOUSED_LINEAR_ACCEL_Z; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_MAP_Z_AXIS))) { + } else if (streq(key, quirk_get_name(MOUSED_VIRTUAL_SCROLL_ENABLE))) { + p->id = MOUSED_VIRTUAL_SCROLL_ENABLE; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_HOR_VIRTUAL_SCROLL_ENABLE))) { + p->id = MOUSED_HOR_VIRTUAL_SCROLL_ENABLE; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_VIRTUAL_SCROLL_SPEED))) { + p->id = MOUSED_VIRTUAL_SCROLL_SPEED; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_VIRTUAL_SCROLL_THRESHOLD))) { + p->id = MOUSED_VIRTUAL_SCROLL_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_WMODE))) { + p->id = MOUSED_WMODE; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_TWO_FINGER_SCROLL))) { + p->id = MOUSED_TWO_FINGER_SCROLL; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_NATURAL_SCROLL))) { + p->id = MOUSED_NATURAL_SCROLL; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_THREE_FINGER_DRAG))) { + p->id = MOUSED_THREE_FINGER_DRAG; + if (!parse_boolean_property(value, &b)) + goto out; + p->type = PT_BOOL; + p->value.b = b; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_SOFTBUTTON2_X))) { + p->id = MOUSED_SOFTBUTTON2_X; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_SOFTBUTTON3_X))) { + p->id = MOUSED_SOFTBUTTON3_X; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_SOFTBUTTONS_Y))) { + p->id = MOUSED_SOFTBUTTONS_Y; + if (!safe_atoi(value, &i)) + goto out; + p->type = PT_INT; + p->value.i = i; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_TAP_TIMEOUT))) { + p->id = MOUSED_TAP_TIMEOUT; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_TAP_PRESSURE_THRESHOLD))) { + p->id = MOUSED_TAP_PRESSURE_THRESHOLD; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_TAP_MAX_DELTA))) { + p->id = MOUSED_TAP_MAX_DELTA; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_TAPHOLD_TIMEOUT))) { + p->id = MOUSED_TAPHOLD_TIMEOUT; + if (!safe_atou(value, &v)) + goto out; + p->type = PT_UINT; + p->value.u = v; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_VSCROLL_MIN_DELTA))) { + p->id = MOUSED_VSCROLL_MIN_DELTA; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_VSCROLL_HOR_AREA))) { + p->id = MOUSED_VSCROLL_HOR_AREA; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else if (streq(key, quirk_get_name(MOUSED_VSCROLL_VER_AREA))) { + p->id = MOUSED_VSCROLL_VER_AREA; + if (!safe_atod(value, &d)) + goto out; + p->type = PT_DOUBLE; + p->value.d = d; + rc = true; + } else { + qlog_error(ctx, "Unknown key %s in %s\n", key, s->name); + } +out: + if (rc) { + list_append(&s->properties, &p->link); + s->has_property = true; + } else { + property_cleanup(p); + } + return rc; +} + +/** + * Parse a single line, expected to be in the format Key=value. Anything + * else will be rejected with a failure. + * + * Our data files can only have Match, Model and Attr, so let's check for + * those too. + */ +static bool +parse_value_line(struct quirks_context *ctx, struct section *s, const char *line) +{ + bool rc = false; + + size_t nelem; + char **strv = strv_from_string(line, "=", &nelem); + if (!strv || nelem != 2) + goto out; + + const char *key = strv[0]; + const char *value = strv[1]; + if (strlen(key) == 0 || strlen(value) == 0) + goto out; + + /* Whatever the value is, it's not supposed to be in quotes */ + if (value[0] == '"' || value[0] == '\'') + goto out; + + if (strstartswith(key, "Match")) + rc = parse_match(ctx, s, key, value); + else if (strstartswith(key, "Model")) + rc = parse_model(ctx, s, key, value); + else if (strstartswith(key, "Attr")) + rc = parse_attr(ctx, s, key, value); + else if (strstartswith(key, "Moused")) + rc = parse_moused(ctx, s, key, value); + else + qlog_error(ctx, "Unknown value prefix %s\n", line); +out: + strv_free(strv); + return rc; +} + +static inline bool +parse_file(struct quirks_context *ctx, const char *path) +{ + enum state { + STATE_SECTION, + STATE_MATCH, + STATE_MATCH_OR_VALUE, + STATE_VALUE_OR_SECTION, + STATE_ANY, + }; + FILE *fp; + char line[512]; + bool rc = false; + enum state state = STATE_SECTION; + struct section *section = NULL; + int lineno = -1; + + qlog_debug(ctx, "%s\n", path); + + /* Not using open_restricted here, if we can't access + * our own data files, our installation is screwed up. + */ + fp = fopen(path, "r"); + if (!fp) { + /* If the file doesn't exist that's fine. Only way this can + * happen is for the custom override file, all others are + * provided by scandir so they do exist. Short of races we + * don't care about. */ + if (errno == ENOENT) + return true; + + qlog_error(ctx, "%s: failed to open file\n", path); + goto out; + } + + while (fgets(line, sizeof(line), fp)) { + char *comment; + + lineno++; + + comment = strstr(line, "#"); + if (comment) { + /* comment points to # but we need to remove the + * preceding whitespaces too */ + comment--; + while (comment >= line) { + if (*comment != ' ' && *comment != '\t') + break; + comment--; + } + *(comment + 1) = '\0'; + } else { /* strip the trailing newline */ + comment = strstr(line, "\n"); + if (comment) + *comment = '\0'; + } + if (strlen(line) == 0) + continue; + + /* We don't use quotes for strings, so we really don't want + * erroneous trailing whitespaces */ + switch (line[strlen(line) - 1]) { + case ' ': + case '\t': + qlog_parser(ctx, + "%s:%d: Trailing whitespace '%s'\n", + path, lineno, line); + goto out; + } + + switch (line[0]) { + case '\0': + case '\n': + case '#': + break; + /* white space not allowed */ + case ' ': + case '\t': + qlog_parser(ctx, "%s:%d: Preceding whitespace '%s'\n", + path, lineno, line); + goto out; + /* section title */ + case '[': + if (line[strlen(line) - 1] != ']') { + qlog_parser(ctx, "%s:%d: Closing ] missing '%s'\n", + path, lineno, line); + goto out; + } + + if (state != STATE_SECTION && + state != STATE_VALUE_OR_SECTION) { + qlog_parser(ctx, "%s:%d: expected section before %s\n", + path, lineno, line); + goto out; + } + if (section && + (!section->has_match || !section->has_property)) { + qlog_parser(ctx, "%s:%d: previous section %s was empty\n", + path, lineno, section->name); + goto out; /* Previous section was empty */ + } + + state = STATE_MATCH; + section = section_new(path, line); + list_append(&ctx->sections, §ion->link); + break; + default: + /* entries must start with A-Z */ + if (line[0] < 'A' || line[0] > 'Z') { + qlog_parser(ctx, "%s:%d: Unexpected line %s\n", + path, lineno, line); + goto out; + } + switch (state) { + case STATE_SECTION: + qlog_parser(ctx, "%s:%d: expected [Section], got %s\n", + path, lineno, line); + goto out; + case STATE_MATCH: + if (!strstartswith(line, "Match")) { + qlog_parser(ctx, "%s:%d: expected MatchFoo=bar, have %s\n", + path, lineno, line); + goto out; + } + state = STATE_MATCH_OR_VALUE; + break; + case STATE_MATCH_OR_VALUE: + if (!strstartswith(line, "Match")) + state = STATE_VALUE_OR_SECTION; + break; + case STATE_VALUE_OR_SECTION: + if (strstartswith(line, "Match")) { + qlog_parser(ctx, "%s:%d: expected value or [Section], have %s\n", + path, lineno, line); + goto out; + } + break; + case STATE_ANY: + break; + } + + if (!parse_value_line(ctx, section, line)) { + qlog_parser(ctx, "%s:%d: failed to parse %s\n", + path, lineno, line); + goto out; + } + break; + } + } + + if (!section) { + qlog_parser(ctx, "%s: is an empty file\n", path); + goto out; + } + + if ((!section->has_match || !section->has_property)) { + qlog_parser(ctx, "%s:%d: previous section %s was empty\n", + path, lineno, section->name); + goto out; /* Previous section was empty */ + } + + rc = true; +out: + if (fp) + fclose(fp); + + return rc; +} + +static int +is_data_file(const struct dirent *dir) { + return strendswith(dir->d_name, ".quirks"); +} + +static inline bool +parse_files(struct quirks_context *ctx, const char *data_path) +{ + struct dirent **namelist; + int ndev = -1; + int idx = 0; + + ndev = scandir(data_path, &namelist, is_data_file, versionsort); + if (ndev <= 0) { + qlog_error(ctx, + "%s: failed to find data files\n", + data_path); + return false; + } + + for (idx = 0; idx < ndev; idx++) { + char path[PATH_MAX]; + + snprintf(path, + sizeof(path), + "%s/%s", + data_path, + namelist[idx]->d_name); + + if (!parse_file(ctx, path)) + break; + } + + for (int i = 0; i < ndev; i++) + free(namelist[i]); + free(namelist); + + return idx == ndev; +} + +struct quirks_context * +quirks_init_subsystem(const char *data_path, + const char *override_file, + moused_log_handler log_handler, + enum quirks_log_type log_type) +{ + _unref_(quirks_context) *ctx = zalloc(sizeof *ctx); + + assert(data_path); + + ctx->refcount = 1; + ctx->log_handler = log_handler; + ctx->log_type = log_type; + list_init(&ctx->quirks); + list_init(&ctx->sections); + + qlog_debug(ctx, "%s is data root\n", data_path); + + ctx->dmi = init_dmi(); + ctx->dt = init_dt(); + if (!ctx->dmi && !ctx->dt) + return NULL; + + if (!parse_files(ctx, data_path)) + return NULL; + + if (override_file && !parse_file(ctx, override_file)) + return NULL; + + return steal(&ctx); +} + +struct quirks_context * +quirks_context_ref(struct quirks_context *ctx) +{ + assert(ctx->refcount > 0); + ctx->refcount++; + + return ctx; +} + +struct quirks_context * +quirks_context_unref(struct quirks_context *ctx) +{ + struct section *s; + + if (!ctx) + return NULL; + + assert(ctx->refcount >= 1); + ctx->refcount--; + + if (ctx->refcount > 0) + return NULL; + + /* Caller needs to clean up before calling this */ + assert(list_empty(&ctx->quirks)); + + list_for_each_safe(s, &ctx->sections, link) { + section_destroy(s); + } + + free(ctx->dmi); + free(ctx->dt); + free(ctx); + + return NULL; +} + +static struct quirks * +quirks_new(void) +{ + struct quirks *q; + + q = zalloc(sizeof *q); + q->refcount = 1; + q->nproperties = 0; + list_init(&q->link); + list_init(&q->floating_properties); + + return q; +} + +struct quirks * +quirks_unref(struct quirks *q) +{ + if (!q) + return NULL; + + /* We don't really refcount, but might + * as well have the API in place */ + assert(q->refcount == 1); + + for (size_t i = 0; i < q->nproperties; i++) { + property_unref(q->properties[i]); + } + + /* Floating properties are owned by our quirks context, need to be + * cleaned up here */ + struct property *p; + list_for_each_safe(p, &q->floating_properties, link) { + property_cleanup(p); + } + + list_remove(&q->link); + free(q->properties); + free(q); + + return NULL; +} + +static inline void +match_fill_name(struct match *m, + struct device *device) +{ + if (device->name[0] == 0) + return; + + m->name = safe_strdup(device->name); + + m->bits |= M_NAME; +} + +static inline void +match_fill_uniq(struct match *m, + struct device *device) +{ + if (device->uniq[0] == 0) + return; + + m->uniq = safe_strdup(device->uniq); + + m->bits |= M_UNIQ; +} + +static inline void +match_fill_bus_vid_pid(struct match *m, + struct device *device) +{ + m->product[0] = device->id.product; + m->product[1] = 0; + m->vendor = device->id.vendor; + m->version = device->id.version; + m->bits |= M_PID|M_VID|M_VERSION; + switch (device->id.bustype) { + case BUS_USB: + m->bus = BT_USB; + m->bits |= M_BUS; + break; + case BUS_BLUETOOTH: + m->bus = BT_BLUETOOTH; + m->bits |= M_BUS; + break; + case BUS_I8042: + m->bus = BT_PS2; + m->bits |= M_BUS; + break; + case BUS_RMI: + m->bus = BT_RMI; + m->bits |= M_BUS; + break; + case BUS_I2C: + m->bus = BT_I2C; + m->bits |= M_BUS; + break; + case BUS_SPI: + m->bus = BT_SPI; + m->bits |= M_BUS; + break; + default: + break; + } +} + +static inline void +match_fill_udev_type(struct match *m, + struct device *device) +{ + switch (device->type) { + case DEVICE_TYPE_MOUSE: + m->udev_type |= UDEV_MOUSE; + break; + case DEVICE_TYPE_POINTINGSTICK: + m->udev_type |= UDEV_MOUSE | UDEV_POINTINGSTICK; + break; + case DEVICE_TYPE_TOUCHPAD: + m->udev_type |= UDEV_TOUCHPAD; + break; + case DEVICE_TYPE_TABLET: + m->udev_type |= UDEV_TABLET; + break; + case DEVICE_TYPE_TABLET_PAD: + m->udev_type |= UDEV_TABLET_PAD; + break; + case DEVICE_TYPE_KEYBOARD: + m->udev_type |= UDEV_KEYBOARD; + break; + case DEVICE_TYPE_JOYSTICK: + m->udev_type |= UDEV_JOYSTICK; + break; + default: + break; + } + m->bits |= M_UDEV_TYPE; +} + +static inline void +match_fill_dmi_dt(struct match *m, char *dmi, char *dt) +{ + if (dmi) { + m->dmi = dmi; + m->bits |= M_DMI; + } + + if (dt) { + m->dt = dt; + m->bits |= M_DT; + } +} + +static struct match * +match_new(struct device *device, + char *dmi, char *dt) +{ + struct match *m = zalloc(sizeof *m); + + match_fill_name(m, device); + match_fill_uniq(m, device); + match_fill_bus_vid_pid(m, device); + match_fill_dmi_dt(m, dmi, dt); + match_fill_udev_type(m, device); + return m; +} + +static void +match_free(struct match *m) +{ + /* dmi and dt are global */ + free(m->name); + free(m->uniq); + free(m); +} + +static void +quirk_merge_event_codes(struct quirks_context *ctx, + struct quirks *q, + const struct property *property) +{ + for (size_t i = 0; i < q->nproperties; i++) { + struct property *p = q->properties[i]; + + if (p->id != property->id) + continue; + + /* We have a duplicated property, merge in with ours */ + size_t offset = p->value.tuples.ntuples; + size_t max = ARRAY_LENGTH(p->value.tuples.tuples); + for (size_t j = 0; j < property->value.tuples.ntuples; j++) { + if (offset + j >= max) + break; + p->value.tuples.tuples[offset + j] = property->value.tuples.tuples[j]; + p->value.tuples.ntuples++; + } + return; + } + + /* First time we add AttrEventCode: create a new property. + * Unlike the other properties, this one isn't part of a section, it belongs + * to the quirks */ + struct property *newprop = property_new(); + newprop->id = property->id; + newprop->type = property->type; + newprop->value.tuples = property->value.tuples; + /* Caller responsible for pre-allocating space */ + q->properties[q->nproperties++] = property_ref(newprop); + list_append(&q->floating_properties, &newprop->link); +} + +static void +quirk_apply_section(struct quirks_context *ctx, + struct quirks *q, + const struct section *s) +{ + struct property *p; + size_t nprops = 0; + void *tmp; + + list_for_each(p, &s->properties, link) { + nprops++; + } + + nprops += q->nproperties; + tmp = realloc(q->properties, nprops * sizeof(p)); + if (!tmp) + return; + + q->properties = tmp; + list_for_each(p, &s->properties, link) { + qlog_debug(ctx, "property added: %s from %s\n", + quirk_get_name(p->id), s->name); + + /* All quirks but AttrEventCode and AttrInputProp + * simply overwrite each other, so we can just append the + * matching property and, later when checking the quirk, pick + * the last one in the array. + * + * The event codes/input props are special because they're lists + * that may *partially* override each other, e.g. a section may + * enable BTN_LEFT and BTN_RIGHT but a later section may disable + * only BTN_RIGHT. This should result in BTN_LEFT force-enabled + * and BTN_RIGHT force-disabled. + * + * To hack around this, those are the only ones where only ever + * have one struct property in the list (not owned by a section) + * and we simply merge any extra sections onto that. + */ + if (p->id == QUIRK_ATTR_EVENT_CODE || + p->id == QUIRK_ATTR_INPUT_PROP) + quirk_merge_event_codes(ctx, q, p); + else + q->properties[q->nproperties++] = property_ref(p); + } +} + +static bool +quirk_match_section(struct quirks_context *ctx, + struct quirks *q, + struct section *s, + struct match *m, + struct device *device) +{ + uint32_t matched_flags = 0x0; + + for (uint32_t flag = 0x1; flag <= M_LAST; flag <<= 1) { + uint32_t prev_matched_flags = matched_flags; + /* section doesn't have this bit set, continue */ + if ((s->match.bits & flag) == 0) + continue; + + /* Couldn't fill in this bit for the match, so we + * do not match on it */ + if ((m->bits & flag) == 0) { + qlog_debug(ctx, + "%s wants %s but we don't have that\n", + s->name, matchflagname(flag)); + continue; + } + + /* now check the actual matching bit */ + switch (flag) { + case M_NAME: + if (fnmatch(s->match.name, m->name, 0) == 0) + matched_flags |= flag; + break; + case M_UNIQ: + if (fnmatch(s->match.uniq, m->uniq, 0) == 0) + matched_flags |= flag; + break; + case M_BUS: + if (m->bus == s->match.bus) + matched_flags |= flag; + break; + case M_VID: + if (m->vendor == s->match.vendor) + matched_flags |= flag; + break; + case M_PID: + ARRAY_FOR_EACH(m->product, mi) { + if (*mi == 0 || matched_flags & flag) + break; + + ARRAY_FOR_EACH(s->match.product, si) { + if (*si == 0) + break; + if (*mi == *si) { + matched_flags |= flag; + break; + } + } + } + break; + case M_VERSION: + if (m->version == s->match.version) + matched_flags |= flag; + break; + case M_DMI: + if (fnmatch(s->match.dmi, m->dmi, 0) == 0) + matched_flags |= flag; + break; + case M_DT: + if (fnmatch(s->match.dt, m->dt, 0) == 0) + matched_flags |= flag; + break; + case M_UDEV_TYPE: + if (s->match.udev_type & m->udev_type) + matched_flags |= flag; + break; + default: + abort(); + } + + if (prev_matched_flags != matched_flags) { + qlog_debug(ctx, + "%s matches for %s\n", + s->name, + matchflagname(flag)); + } + } + + if (s->match.bits == matched_flags) { + qlog_debug(ctx, "%s is full match\n", s->name); + quirk_apply_section(ctx, q, s); + } + + return true; +} + +struct quirks * +quirks_fetch_for_device(struct quirks_context *ctx, + struct device *device) +{ + struct section *s; + struct match *m; + + if (!ctx) + return NULL; + + qlog_debug(ctx, "%s: fetching quirks\n", device->path); + + _unref_(quirks) *q = quirks_new(); + + m = match_new(device, ctx->dmi, ctx->dt); + + list_for_each(s, &ctx->sections, link) { + quirk_match_section(ctx, q, s, m, device); + } + + match_free(m); + + if (q->nproperties == 0) { + return NULL; + } + + list_insert(&ctx->quirks, &q->link); + + return steal(&q); +} + +static inline struct property * +quirk_find_prop(struct quirks *q, enum quirk which) +{ + /* Run backwards to only handle the last one assigned */ + for (ssize_t i = q->nproperties - 1; i >= 0; i--) { + struct property *p = q->properties[i]; + if (p->id == which) + return p; + } + + return NULL; +} + +bool +quirks_has_quirk(struct quirks *q, enum quirk which) +{ + return quirk_find_prop(q, which) != NULL; +} + +bool +quirks_get_int32(struct quirks *q, enum quirk which, int32_t *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_INT); + *val = p->value.i; + + return true; +} + +bool +quirks_get_uint32(struct quirks *q, enum quirk which, uint32_t *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_UINT); + *val = p->value.u; + + return true; +} + +bool +quirks_get_double(struct quirks *q, enum quirk which, double *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_DOUBLE); + *val = p->value.d; + + return true; +} + +bool +quirks_get_string(struct quirks *q, enum quirk which, char **val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_STRING); + *val = p->value.s; + + return true; +} + +bool +quirks_get_bool(struct quirks *q, enum quirk which, bool *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_BOOL); + *val = p->value.b; + + return true; +} + +bool +quirks_get_dimensions(struct quirks *q, + enum quirk which, + struct quirk_dimensions *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_DIMENSION); + *val = p->value.dim; + + return true; +} + +bool +quirks_get_range(struct quirks *q, + enum quirk which, + struct quirk_range *val) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_RANGE); + *val = p->value.range; + + return true; +} + +bool +quirks_get_tuples(struct quirks *q, + enum quirk which, + const struct quirk_tuples **tuples) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_TUPLES); + *tuples = &p->value.tuples; + + return true; +} + +bool +quirks_get_uint32_array(struct quirks *q, + enum quirk which, + const uint32_t **array, + size_t *nelements) +{ + struct property *p; + + if (!q) + return false; + + p = quirk_find_prop(q, which); + if (!p) + return false; + + assert(p->type == PT_UINT_ARRAY); + *array = p->value.array.data.u; + *nelements = p->value.array.nelements; + + return true; +} diff --git a/usr.sbin/moused/moused/quirks.h b/usr.sbin/moused/moused/quirks.h new file mode 100644 index 000000000000..6a34d17be83c --- /dev/null +++ b/usr.sbin/moused/moused/quirks.h @@ -0,0 +1,369 @@ +/* + * Copyright © 2018 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include "util.h" + +#include <stdbool.h> +#include <stdint.h> +#include <syslog.h> + +/** + * Handle to the quirks context. + */ +struct quirks_context; + +/** + * Contains all quirks set for a single device. + */ +struct quirks; + +struct quirk_dimensions { + size_t x, y; +}; + +struct quirk_range { + int lower, upper; +}; + +struct quirk_tuples { + struct { + int first; + int second; + int third; + } tuples[32]; + size_t ntuples; +}; + +/** + * Quirks known to libinput. Moused does not support all of them. + */ +enum quirk { + QUIRK_MODEL_ALPS_SERIAL_TOUCHPAD = 100, + QUIRK_MODEL_APPLE_TOUCHPAD, + QUIRK_MODEL_APPLE_TOUCHPAD_ONEBUTTON, + QUIRK_MODEL_BOUNCING_KEYS, + QUIRK_MODEL_CHROMEBOOK, + QUIRK_MODEL_CLEVO_W740SU, + QUIRK_MODEL_DELL_CANVAS_TOTEM, + QUIRK_MODEL_HP_PAVILION_DM4_TOUCHPAD, + QUIRK_MODEL_HP_ZBOOK_STUDIO_G3, + QUIRK_MODEL_INVERT_HORIZONTAL_SCROLLING, + QUIRK_MODEL_LENOVO_SCROLLPOINT, + QUIRK_MODEL_LENOVO_T450_TOUCHPAD, + QUIRK_MODEL_LENOVO_X1GEN6_TOUCHPAD, + QUIRK_MODEL_LENOVO_X230, + QUIRK_MODEL_SYNAPTICS_SERIAL_TOUCHPAD, + QUIRK_MODEL_SYSTEM76_BONOBO, + QUIRK_MODEL_SYSTEM76_GALAGO, + QUIRK_MODEL_SYSTEM76_KUDU, + QUIRK_MODEL_TABLET_MODE_NO_SUSPEND, + QUIRK_MODEL_TABLET_MODE_SWITCH_UNRELIABLE, + QUIRK_MODEL_TOUCHPAD_VISIBLE_MARKER, + QUIRK_MODEL_TRACKBALL, + QUIRK_MODEL_WACOM_TOUCHPAD, + QUIRK_MODEL_PRESSURE_PAD, + QUIRK_MODEL_TOUCHPAD_PHANTOM_CLICKS, + + _QUIRK_LAST_MODEL_QUIRK_, /* Guard: do not modify */ + + QUIRK_ATTR_SIZE_HINT = 300, + QUIRK_ATTR_TOUCH_SIZE_RANGE, + QUIRK_ATTR_PALM_SIZE_THRESHOLD, + QUIRK_ATTR_LID_SWITCH_RELIABILITY, + QUIRK_ATTR_KEYBOARD_INTEGRATION, + QUIRK_ATTR_TRACKPOINT_INTEGRATION, + QUIRK_ATTR_TPKBCOMBO_LAYOUT, + QUIRK_ATTR_PRESSURE_RANGE, + QUIRK_ATTR_PALM_PRESSURE_THRESHOLD, + QUIRK_ATTR_RESOLUTION_HINT, + QUIRK_ATTR_TRACKPOINT_MULTIPLIER, + QUIRK_ATTR_THUMB_PRESSURE_THRESHOLD, + QUIRK_ATTR_USE_VELOCITY_AVERAGING, + QUIRK_ATTR_TABLET_SMOOTHING, + QUIRK_ATTR_THUMB_SIZE_THRESHOLD, + QUIRK_ATTR_MSC_TIMESTAMP, + QUIRK_ATTR_EVENT_CODE, + QUIRK_ATTR_INPUT_PROP, + + _QUIRK_LAST_ATTR_QUIRK_, /* Guard: do not modify */ + + + /* Daemon parameters */ + MOUSED_GRAB_DEVICE = 1000, + MOUSED_IGNORE_DEVICE, + + /* Standard moused parameters */ + MOUSED_CLICK_THRESHOLD, + MOUSED_DRIFT_TERMINATE, + MOUSED_DRIFT_DISTANCE, + MOUSED_DRIFT_TIME, + MOUSED_DRIFT_AFTER, + MOUSED_EMULATE_THIRD_BUTTON, + MOUSED_EMULATE_THIRD_BUTTON_TIMEOUT, + MOUSED_EXPONENTIAL_ACCEL, + MOUSED_EXPONENTIAL_OFFSET, + MOUSED_LINEAR_ACCEL_X, + MOUSED_LINEAR_ACCEL_Y, + MOUSED_LINEAR_ACCEL_Z, + MOUSED_MAP_Z_AXIS, + MOUSED_VIRTUAL_SCROLL_ENABLE, + MOUSED_HOR_VIRTUAL_SCROLL_ENABLE, + MOUSED_VIRTUAL_SCROLL_SPEED, + MOUSED_VIRTUAL_SCROLL_THRESHOLD, + MOUSED_WMODE, + + /* Touchpad parameters from psm(4) driver */ + MOUSED_TWO_FINGER_SCROLL, + MOUSED_NATURAL_SCROLL, + MOUSED_THREE_FINGER_DRAG, + MOUSED_SOFTBUTTON2_X, + MOUSED_SOFTBUTTON3_X, + MOUSED_SOFTBUTTONS_Y, + MOUSED_TAP_TIMEOUT, + MOUSED_TAP_PRESSURE_THRESHOLD, + MOUSED_TAP_MAX_DELTA, + MOUSED_TAPHOLD_TIMEOUT, + MOUSED_VSCROLL_MIN_DELTA, + MOUSED_VSCROLL_HOR_AREA, + MOUSED_VSCROLL_VER_AREA, + + _MOUSED_LAST_OPTION_ /* Guard: do not modify */ +}; + +/** + * Returns a printable name for the quirk. This name is for developer + * tools, not user consumption. Do not display this in a GUI. + */ +const char* +quirk_get_name(enum quirk q); + +/** + * Log priorities used if custom logging is enabled. + */ +enum quirks_log_priorities { + QLOG_NOISE = LOG_DEBUG + 1, + QLOG_DEBUG = LOG_DEBUG, + QLOG_INFO = LOG_INFO, + QLOG_ERROR = LOG_ERR, + QLOG_PARSER_ERROR = LOG_CRIT, +}; + +/** + * Log type to be used for logging. Use the moused logging to hook up a + * moused log handler. This will cause the quirks to reduce the noise and + * only provide useful messages. + * + * QLOG_CUSTOM_LOG_PRIORITIES enables more fine-grained and verbose logging, + * allowing debugging tools to be more useful. + */ +enum quirks_log_type { + QLOG_MOUSED_LOGGING, + QLOG_CUSTOM_LOG_PRIORITIES, +}; + +/** + * Initialize the quirks subsystem. This function must be called + * before anything else. + * + * If log_type is QLOG_CUSTOM_LOG_PRIORITIES, the log handler is called with + * the custom QLOG_* log priorities. Otherwise, the log handler only uses + * the moused (syslog) log priorities. + * + * @param config_file A file path to main configuration file + * @param quirks_path The directory containing the various quirk files + * @param log_handler The moused log handler called for debugging output + * + * @return an opaque handle to the context + */ +struct quirks_context * +quirks_init_subsystem(const char *config_file, + const char *quirks_path, + moused_log_handler log_handler, + enum quirks_log_type log_type); + +/** + * Clean up after ourselves. This function must be called + * as the last call to the quirks subsystem. + * + * All quirks returned to the caller in quirks_fetch_for_device() must be + * unref'd before this call. + * + * @return Always NULL + */ +struct quirks_context * +quirks_context_unref(struct quirks_context *ctx); + +DEFINE_UNREF_CLEANUP_FUNC(quirks_context); + +struct quirks_context * +quirks_context_ref(struct quirks_context *ctx); + +/** + * Fetch the quirks for a given device. If no quirks are defined, this + * function returns NULL. + * + * @return A new quirks struct, use quirks_unref() to release + */ +struct quirks * +quirks_fetch_for_device(struct quirks_context *ctx, + struct device *device); + +/** + * Reduce the refcount by one. When the refcount reaches zero, the + * associated struct is released. + * + * @return Always NULL + */ +struct quirks * +quirks_unref(struct quirks *q); + +DEFINE_UNREF_CLEANUP_FUNC(quirks); + +/** + * Returns true if the given quirk applies is in this quirk list. + */ +bool +quirks_has_quirk(struct quirks *q, enum quirk which); + +/** + * Get the value of the given quirk, as unsigned integer. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_uint32(struct quirks *q, + enum quirk which, + uint32_t *val); + +/** + * Get the value of the given quirk, as signed integer. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_int32(struct quirks *q, + enum quirk which, + int32_t *val); + +/** + * Get the value of the given quirk, as double. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_double(struct quirks *q, + enum quirk which, + double *val); + +/** + * Get the value of the given quirk, as string. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * val is set to the string, do not modify or free it. The lifetime of the + * returned string is bound to the lifetime of the quirk. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_string(struct quirks *q, + enum quirk which, + char **val); + +/** + * Get the value of the given quirk, as bool. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_bool(struct quirks *q, + enum quirk which, + bool *val); + +/** + * Get the value of the given quirk, as dimension. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_dimensions(struct quirks *q, + enum quirk which, + struct quirk_dimensions *val); + +/** + * Get the value of the given quirk, as range. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, val is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_range(struct quirks *q, + enum quirk which, + struct quirk_range *val); + +/** + * Get the tuples of the given quirk. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, tuples is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_tuples(struct quirks *q, + enum quirk which, + const struct quirk_tuples **tuples); + +/** + * Get the uint32 array of the given quirk. + * This function will assert if the quirk type does not match the + * requested type. If the quirk is not set for this device, tuples is + * unchanged. + * + * @return true if the quirk value is valid, false otherwise. + */ +bool +quirks_get_uint32_array(struct quirks *q, + enum quirk which, + const uint32_t **array, + size_t *nelements); diff --git a/usr.sbin/moused/moused/quirks/5-generic-touchpad.quirks b/usr.sbin/moused/moused/quirks/5-generic-touchpad.quirks new file mode 100644 index 000000000000..c741ffc80bd6 --- /dev/null +++ b/usr.sbin/moused/moused/quirks/5-generic-touchpad.quirks @@ -0,0 +1,9 @@ +# Do not edit this file, it will be overwritten on update + +[SynPS/2 Synaptics TouchPad] +MatchDevType=touchpad +MatchName=SynPS/2 Synaptics TouchPad +AttrPressureRange=35:30 +MousedTapPressureThreshold=44 +#AttrThumbPressureThreshold=45 +AttrPalmPressureThreshold=220 diff --git a/usr.sbin/moused/moused/util-evdev.c b/usr.sbin/moused/moused/util-evdev.c new file mode 100644 index 000000000000..925979fdc02c --- /dev/null +++ b/usr.sbin/moused/moused/util-evdev.c @@ -0,0 +1,173 @@ +/* + * Copyright © 2013 David Herrmann <dh.herrmann@gmail.com> + * Copyright © 2013 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> + +#include <dev/evdev/input.h> + +#include "event-names.h" +#include "util-evdev.h" + +#define ARRAY_LENGTH(a) (sizeof(a) / (sizeof((a)[0]))) + +struct name_lookup { + const char *name; + size_t len; +}; + +static inline bool +startswith(const char *str, size_t len, const char *prefix, size_t plen) +{ + return len >= plen && !strncmp(str, prefix, plen); +} + +static int type_from_prefix(const char *name, ssize_t len) +{ + const char *e; + size_t i; + ssize_t l; + + /* MAX_ is not allowed, even though EV_MAX exists */ + if (startswith(name, len, "MAX_", 4)) + return -1; + /* BTN_ is special as there is no EV_BTN type */ + if (startswith(name, len, "BTN_", 4)) + return EV_KEY; + /* FF_STATUS_ is special as FF_ is a prefix of it, so test it first */ + if (startswith(name, len, "FF_STATUS_", 10)) + return EV_FF_STATUS; + + for (i = 0; i < ARRAY_LENGTH(ev_names); ++i) { + /* skip EV_ prefix so @e is suffix of [EV_]XYZ */ + e = &ev_names[i].name[3]; + l = strlen(e); + + /* compare prefix and test for trailing _ */ + if (len > l && startswith(name, len, e, l) && name[l] == '_') + return ev_names[i].value; + } + + return -1; +} + +static int cmp_entry(const void *vlookup, const void *ventry) +{ + const struct name_lookup *lookup = vlookup; + const struct name_entry *entry = ventry; + int r; + + r = strncmp(lookup->name, entry->name, lookup->len); + if (!r) { + if (entry->name[lookup->len]) + r = -1; + else + r = 0; + } + + return r; +} + +static const struct name_entry* +lookup_name(const struct name_entry *array, size_t asize, + struct name_lookup *lookup) +{ + const struct name_entry *entry; + + entry = bsearch(lookup, array, asize, sizeof(*array), cmp_entry); + if (!entry) + return NULL; + + return entry; +} + +int +libevdev_event_type_get_max(unsigned int type) +{ + if (type > EV_MAX) + return -1; + + return ev_max[type]; +} + +int +libevdev_event_code_from_name(unsigned int type, const char *name) +{ + struct name_lookup lookup; + const struct name_entry *entry; + int real_type; + size_t len = strlen(name); + + real_type = type_from_prefix(name, len); + if (real_type < 0 || (unsigned int)real_type != type) + return -1; + + lookup.name = name; + lookup.len = len; + + entry = lookup_name(code_names, ARRAY_LENGTH(code_names), &lookup); + + return entry ? (int)entry->value : -1; +} + +static int +libevdev_event_type_from_name_n(const char *name, size_t len) +{ + struct name_lookup lookup; + const struct name_entry *entry; + + lookup.name = name; + lookup.len = len; + + entry = lookup_name(ev_names, ARRAY_LENGTH(ev_names), &lookup); + + return entry ? (int)entry->value : -1; +} + +int +libevdev_event_type_from_name(const char *name) +{ + return libevdev_event_type_from_name_n(name, strlen(name)); +} + +static int +libevdev_property_from_name_n(const char *name, size_t len) +{ + struct name_lookup lookup; + const struct name_entry *entry; + + lookup.name = name; + lookup.len = len; + + entry = lookup_name(prop_names, ARRAY_LENGTH(prop_names), &lookup); + + return entry ? (int)entry->value : -1; +} + +int +libevdev_property_from_name(const char *name) +{ + return libevdev_property_from_name_n(name, strlen(name)); +} diff --git a/usr.sbin/moused/moused/util-evdev.h b/usr.sbin/moused/moused/util-evdev.h new file mode 100644 index 000000000000..cb2e3f1fb935 --- /dev/null +++ b/usr.sbin/moused/moused/util-evdev.h @@ -0,0 +1,35 @@ +/* + * Copyright © 2013 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#ifndef UTIL_EVDEV_H +#define UTIL_EVDEV_H + +#include <dev/evdev/input.h> + +int libevdev_event_code_from_name(unsigned int type, const char *name); +int libevdev_event_type_get_max(unsigned int type); +int libevdev_event_type_from_name(const char *name); +int libevdev_property_from_name(const char *name); + +#endif diff --git a/usr.sbin/moused/moused/util-list.c b/usr.sbin/moused/moused/util-list.c new file mode 100644 index 000000000000..7f85b368076c --- /dev/null +++ b/usr.sbin/moused/moused/util-list.c @@ -0,0 +1,86 @@ +/* + * Copyright © 2008-2011 Kristian Høgsberg + * Copyright © 2011 Intel Corporation + * Copyright © 2013-2015 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include <assert.h> +#include <stddef.h> +#include <stdbool.h> + +#include "util-list.h" + +void +list_init(struct list *list) +{ + list->prev = list; + list->next = list; +} + +void +list_insert(struct list *list, struct list *elm) +{ + assert((list->next != NULL && list->prev != NULL) || + !"list->next|prev is NULL, possibly missing list_init()"); + assert(((elm->next == NULL && elm->prev == NULL) || list_empty(elm)) || + !"elm->next|prev is not NULL, list node used twice?"); + + elm->prev = list; + elm->next = list->next; + list->next = elm; + elm->next->prev = elm; +} + +void +list_append(struct list *list, struct list *elm) +{ + assert((list->next != NULL && list->prev != NULL) || + !"list->next|prev is NULL, possibly missing list_init()"); + assert(((elm->next == NULL && elm->prev == NULL) || list_empty(elm)) || + !"elm->next|prev is not NULL, list node used twice?"); + + elm->next = list; + elm->prev = list->prev; + list->prev = elm; + elm->prev->next = elm; +} + +void +list_remove(struct list *elm) +{ + assert((elm->next != NULL && elm->prev != NULL) || + !"list->next|prev is NULL, possibly missing list_init()"); + + elm->prev->next = elm->next; + elm->next->prev = elm->prev; + elm->next = NULL; + elm->prev = NULL; +} + +bool +list_empty(const struct list *list) +{ + assert((list->next != NULL && list->prev != NULL) || + !"list->next|prev is NULL, possibly missing list_init()"); + + return list->next == list; +} diff --git a/usr.sbin/moused/moused/util-list.h b/usr.sbin/moused/moused/util-list.h new file mode 100644 index 000000000000..d7a8ce724d22 --- /dev/null +++ b/usr.sbin/moused/moused/util-list.h @@ -0,0 +1,194 @@ +/* + * Copyright © 2008-2011 Kristian Høgsberg + * Copyright © 2011 Intel Corporation + * Copyright © 2013-2015 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include <stdbool.h> +#include <stddef.h> + +/* + * This list data structure is a verbatim copy from wayland-util.h from the + * Wayland project; except that wl_ prefix has been removed. + */ + + +/** + * Doubly linked list implementation. This struct is used for both the list + * nodes and the list head. Use like this: + * + * @code + * + * struct foo { + * struct list list_of_bars; // the list head + * }; + * + * struct bar { + * struct list link; // links between the bars + * }; + * + * struct foo *f = zalloc(sizeof *f); + * struct bar *b = make_some_bar(); + * + * list_init(&f->list_of_bars); + * list_append(&f->list_of_bars, &b->link); + * list_remove(&b->link); + * @endcode + */ +struct list { + struct list *prev; + struct list *next; +}; + +/** + * Initialize a list head. This function *must* be called once for each list + * head. This function *must not* be called for a node to be added to a + * list. + */ +void list_init(struct list *list); + +/** + * Insert an element at the front of the list + */ +void list_insert(struct list *list, struct list *elm); +/** + * Append an element to the back of the list + */ +void list_append(struct list *list, struct list *elm); + +/** + * Remove an element from list. + * + * Removing a list element is only possible once, the caller must track + * whether the list node has already been removed. + * + */ +void list_remove(struct list *elm); +/** + * Returns true if the given list head is an empty list. + */ +bool list_empty(const struct list *list); + +/** + * Return the 'type' parent container struct of 'ptr' of which + * 'member' is our 'ptr' field. For example: + * + * @code + * struct foo { // the parent container struct + * uint32_t a; + * struct bar bar_member; // the member field + * }; + * + * struct foo *f = zalloc(sizeof *f); + * struct bar *b = &f->bar_member; + * struct foo *f2 = container_of(b, struct foo, bar_member); + * + * assert(f == f2); + * @endcode + */ +#define container_of(ptr, type, member) \ + (__typeof__(type) *)((char *)(ptr) - \ + offsetof(__typeof__(type), member)) + +/** + * Given a list 'head', return the first entry of type 'pos' that has a + * member 'link'. + * + * The 'pos' argument is solely used to determine the type be returned and + * not modified otherwise. It is common to use the same pointer that the + * return value of list_first_entry() is assigned to, for example: + * + * @code + * struct foo { + * struct list list_of_bars; + * }; + * + * struct bar { + * struct list link; + * } + * + * struct foo *f = get_a_foo(); + * struct bar *b = 0; // initialize to avoid static analysis errors + * b = list_first_entry(&f->list_of_bars, b, link); + * @endcode + */ +#define list_first_entry(head, pointer_of_type, member) \ + container_of((head)->next, __typeof__(*pointer_of_type), member) + +/** + * Given a list 'head', return the first entry of type 'container_type' that + * has a member 'link'. + * + * @code + * struct foo { + * struct list list_of_bars; + * }; + * + * struct bar { + * struct list link; + * } + * + * struct foo *f = get_a_foo(); + * struct bar *b = list_first_entry(&f->list_of_bars, struct bar, link); + * @endcode + */ +#define list_first_entry_by_type(head, container_type, member) \ + container_of((head)->next, container_type, member) + +/** + * Iterate through the list. + * + * @code + * struct foo *f = get_a_foo(); + * struct bar *element; + * list_for_each(element, &f->list_of_bars, link) { + * } + * @endcode + * + * If a list node needs to be removed during iteration, use + * list_for_each_safe(). + */ +#define list_for_each(pos, head, member) \ + for (pos = list_first_entry_by_type(head, __typeof__(*pos), member); \ + &pos->member != (head); \ + pos = list_first_entry_by_type(&pos->member, __typeof__(*pos), member)) + +/** + * Iterate through the list. Equivalent to list_for_each() but allows + * calling list_remove() on the element. + * + * @code + * struct foo *f = get_a_foo(); + * struct bar *element; + * list_for_each(element, tmp, &f->list_of_bars, link) { + * list_remove(&element->link); + * } + * @endcode + */ +#define list_for_each_safe(pos, head, member) \ + pos = list_first_entry_by_type(head, __typeof__(*pos), member); \ + for (__typeof__(pos) _tmp = list_first_entry_by_type(&pos->member, __typeof__(*_tmp), member); \ + &pos->member != (head); \ + pos = _tmp, \ + _tmp = list_first_entry_by_type(&pos->member, __typeof__(*_tmp), member)) diff --git a/usr.sbin/moused/moused/util.c b/usr.sbin/moused/moused/util.c new file mode 100644 index 000000000000..09bcc42b0f19 --- /dev/null +++ b/usr.sbin/moused/moused/util.c @@ -0,0 +1,423 @@ +/* + * Copyright © 2008 Kristian Høgsberg + * Copyright © 2013-2019 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include <sys/types.h> +#include <dev/evdev/input.h> + +#include <assert.h> +#include <ctype.h> +#include <dirent.h> +#include <errno.h> +#include <limits.h> +#include <math.h> +#include <stdarg.h> +#include <stdbool.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <xlocale.h> + +#include "util.h" +#include "util-evdev.h" +#include "util-list.h" + +/* util-strings.c */ + +/** + * Return the next word in a string pointed to by state before the first + * separator character. Call repeatedly to tokenize a whole string. + * + * @param state Current state + * @param len String length of the word returned + * @param separators List of separator characters + * + * @return The first word in *state, NOT null-terminated + */ +static const char * +next_word(const char **state, size_t *len, const char *separators) +{ + const char *next = *state; + size_t l; + + if (!*next) + return NULL; + + next += strspn(next, separators); + if (!*next) { + *state = next; + return NULL; + } + + l = strcspn(next, separators); + *state = next + l; + *len = l; + + return next; +} + +/** + * Return a null-terminated string array with the tokens in the input + * string, e.g. "one two\tthree" with a separator list of " \t" will return + * an array [ "one", "two", "three", NULL ] and num elements 3. + * + * Use strv_free() to free the array. + * + * Another example: + * result = strv_from_string("+1-2++3--4++-+5-+-", "+-", &nelem) + * result == [ "1", "2", "3", "4", "5", NULL ] and nelem == 5 + * + * @param in Input string + * @param separators List of separator characters + * @param num_elements Number of elements found in the input string + * + * @return A null-terminated string array or NULL on errors + */ +char ** +strv_from_string(const char *in, const char *separators, size_t *num_elements) +{ + assert(in != NULL); + assert(separators != NULL); + assert(num_elements != NULL); + + const char *s = in; + size_t l, nelems = 0; + while (next_word(&s, &l, separators) != NULL) + nelems++; + + if (nelems == 0) { + *num_elements = 0; + return NULL; + } + + size_t strv_len = nelems + 1; /* NULL-terminated */ + char **strv = zalloc(strv_len * sizeof *strv); + + size_t idx = 0; + const char *word; + s = in; + while ((word = next_word(&s, &l, separators)) != NULL) { + char *copy = strndup(word, l); + if (!copy) { + strv_free(strv); + *num_elements = 0; + return NULL; + } + + strv[idx++] = copy; + } + + *num_elements = nelems; + + return strv; +} + +/** + * Iterate through strv, calling func with each string and its respective index. + * Iteration stops successfully after max elements or at the last element, + * whichever occurs first. + * + * If func returns non-zero, iteration stops and strv_for_each returns + * that value. + * + * @return zero on success, otherwise the error returned by the callback + */ +int strv_for_each_n(const char **strv, size_t max, strv_foreach_callback_t func, void *data) +{ + for (size_t i = 0; i < max && strv && strv[i]; i++) { + int ret = func(strv[i], i, data); + if (ret) + return ret; + } + return 0; +} + +/* !util-strings.c */ + +/* util-prop-parsers.c */ + +/** + * Parses a simple dimension string in the form of "10x40". The two + * numbers must be positive integers in decimal notation. + * On success, the two numbers are stored in w and h. On failure, w and h + * are unmodified. + * + * @param prop The value of the property + * @param w Returns the first component of the dimension + * @param h Returns the second component of the dimension + * @return true on success, false otherwise + */ +bool +parse_dimension_property(const char *prop, size_t *w, size_t *h) +{ + int x, y; + + if (!prop) + return false; + + if (sscanf(prop, "%dx%d", &x, &y) != 2) + return false; + + if (x <= 0 || y <= 0) + return false; + + *w = (size_t)x; + *h = (size_t)y; + return true; +} + +/** + * Parses a string of the format "a:b" where both a and b must be integer + * numbers and a > b. Also allowed is the special string value "none" which + * amounts to unsetting the property. + * + * @param prop The value of the property + * @param hi Set to the first digit or 0 in case of 'none' + * @param lo Set to the second digit or 0 in case of 'none' + * @return true on success, false otherwise + */ +bool +parse_range_property(const char *prop, int *hi, int *lo) +{ + int first, second; + + if (!prop) + return false; + + if (streq(prop, "none")) { + *hi = 0; + *lo = 0; + return true; + } + + if (sscanf(prop, "%d:%d", &first, &second) != 2) + return false; + + if (second >= first) + return false; + + *hi = first; + *lo = second; + + return true; +} + +bool +parse_boolean_property(const char *prop, bool *b) +{ + if (!prop) + return false; + + if (streq(prop, "1")) + *b = true; + else if (streq(prop, "0")) + *b = false; + else + return false; + + return true; +} + +static bool +parse_evcode_string(const char *s, int *type_out, int *code_out) +{ + int type, code; + + if (strstartswith(s, "EV_")) { + type = libevdev_event_type_from_name(s); + if (type == -1) + return false; + + code = EVENT_CODE_UNDEFINED; + } else { + struct map { + const char *str; + int type; + } map[] = { + { "KEY_", EV_KEY }, + { "BTN_", EV_KEY }, + { "ABS_", EV_ABS }, + { "REL_", EV_REL }, + { "SW_", EV_SW }, + }; + bool found = false; + + ARRAY_FOR_EACH(map, m) { + if (!strstartswith(s, m->str)) + continue; + + type = m->type; + code = libevdev_event_code_from_name(type, s); + if (code == -1) + return false; + + found = true; + break; + } + if (!found) + return false; + } + + *type_out = type; + *code_out = code; + + return true; +} + +/** + * Parses a string of the format "+EV_ABS;+KEY_A;-BTN_TOOL_DOUBLETAP;-ABS_X;" + * where each element must be + or - (enable/disable) followed by a named event + * type OR a named event code OR a tuple in the form of EV_KEY:0x123, i.e. a + * named event type followed by a hex event code. + * + * events must point to an existing array of size nevents. + * nevents specifies the size of the array in events and returns the number + * of items, elements exceeding nevents are simply ignored, just make sure + * events is large enough for your use-case. + * + * The results are returned as input events with type and code set, all + * other fields undefined. Where only the event type is specified, the code + * is set to EVENT_CODE_UNDEFINED. + * + * On success, events contains nevents events with each event's value set to 1 + * or 0 depending on the + or - prefix. + */ +bool +parse_evcode_property(const char *prop, struct input_event *events, size_t *nevents) +{ + bool rc = false; + /* A randomly chosen max so we avoid crazy quirks */ + struct input_event evs[32]; + + memset(evs, 0, sizeof evs); + + size_t ncodes; + char **strv = strv_from_string(prop, ";", &ncodes); + if (!strv || ncodes == 0 || ncodes > ARRAY_LENGTH(evs)) + goto out; + + ncodes = min(*nevents, ncodes); + for (size_t idx = 0; strv[idx]; idx++) { + char *s = strv[idx]; + bool enable; + + switch (*s) { + case '+': enable = true; break; + case '-': enable = false; break; + default: + goto out; + } + + s++; + + int type, code; + + if (strstr(s, ":") == NULL) { + if (!parse_evcode_string(s, &type, &code)) + goto out; + } else { + int consumed; + char stype[13] = {0}; /* EV_FF_STATUS + '\0' */ + + if (sscanf(s, "%12[A-Z_]:%x%n", stype, &code, &consumed) != 2 || + strlen(s) != (size_t)consumed || + (type = libevdev_event_type_from_name(stype)) == -1 || + code < 0 || code > libevdev_event_type_get_max(type)) + goto out; + } + + evs[idx].type = type; + evs[idx].code = code; + evs[idx].value = enable; + } + + memcpy(events, evs, ncodes * sizeof *events); + *nevents = ncodes; + rc = true; + +out: + strv_free(strv); + return rc; +} + +/** + * Parses a string of the format "+INPUT_PROP_BUTTONPAD;-INPUT_PROP_POINTER;+0x123;" + * where each element must be a named input prop OR a hexcode in the form + * 0x1234. The prefix for each element must be either '+' (enable) or '-' (disable). + * + * props must point to an existing array of size nprops. + * nprops specifies the size of the array in props and returns the number + * of elements, elements exceeding nprops are simply ignored, just make sure + * props is large enough for your use-case. + * + * On success, props contains nprops elements. + */ +bool +parse_input_prop_property(const char *prop, struct input_prop *props_out, size_t *nprops) +{ + bool rc = false; + struct input_prop props[INPUT_PROP_CNT]; /* doubling up on quirks is a bug */ + + size_t count; + char **strv = strv_from_string(prop, ";", &count); + if (!strv || count == 0 || count > ARRAY_LENGTH(props)) + goto out; + + count = min(*nprops, count); + for (size_t idx = 0; strv[idx]; idx++) { + char *s = strv[idx]; + unsigned int prop; + bool enable; + + switch (*s) { + case '+': enable = true; break; + case '-': enable = false; break; + default: + goto out; + } + + s++; + + if (safe_atou_base(s, &prop, 16)) { + if (prop > INPUT_PROP_MAX) + goto out; + } else { + int val = libevdev_property_from_name(s); + if (val == -1) + goto out; + prop = (unsigned int)val; + } + props[idx].prop = prop; + props[idx].enabled = enable; + } + + memcpy(props_out, props, count * sizeof *props); + *nprops = count; + rc = true; + +out: + strv_free(strv); + return rc; +} + +/* !util-prop-parsers.c */ diff --git a/usr.sbin/moused/moused/util.h b/usr.sbin/moused/moused/util.h new file mode 100644 index 000000000000..a359cbc1079a --- /dev/null +++ b/usr.sbin/moused/moused/util.h @@ -0,0 +1,413 @@ +/* + * Copyright © 2008-2011 Kristian Høgsberg + * Copyright © 2011 Intel Corporation + * Copyright © 2013-2015 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include <sys/types.h> +#include <sys/mouse.h> + +#include <assert.h> +#include <ctype.h> +#include <math.h> +#include <xlocale.h> + +#define HAVE_LOCALE_H 1 + +#define MOUSED_ATTRIBUTE_PRINTF(_format, _args) \ + __attribute__ ((format (printf, _format, _args))) + +#define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0]) +/** + * Iterate through the array _arr, assigning the variable elem to each + * element. elem only exists within the loop. + */ +#define ARRAY_FOR_EACH(_arr, _elem) \ + for (__typeof__((_arr)[0]) *_elem = _arr; \ + _elem < (_arr) + ARRAY_LENGTH(_arr); \ + _elem++) + +#define versionsort(...) alphasort(__VA_ARGS__) +#define bit(x_) (1UL << (x_)) +#define min(a, b) (((a) < (b)) ? (a) : (b)) + +/* Supported device interfaces */ +enum device_if { + DEVICE_IF_UNKNOWN = -1, + DEVICE_IF_EVDEV = 0, + DEVICE_IF_SYSMOUSE, +}; + +/* Recognized device types */ +enum device_type { + DEVICE_TYPE_UNKNOWN = -1, + DEVICE_TYPE_MOUSE = 0, + DEVICE_TYPE_POINTINGSTICK, + DEVICE_TYPE_TOUCHPAD, + DEVICE_TYPE_TOUCHSCREEN, + DEVICE_TYPE_TABLET, + DEVICE_TYPE_TABLET_PAD, + DEVICE_TYPE_KEYBOARD, + DEVICE_TYPE_JOYSTICK, +}; + +struct device { + char path[80]; + enum device_if iftype; + enum device_type type; + char name[80]; + char uniq[80]; + struct input_id id; + mousemode_t mode; +}; + +/** + * @ingroup base + * + * Log handler type for custom logging. + * + * @param priority The priority of the current message + * @param format Message format in printf-style + * @param args Message arguments + */ +typedef void moused_log_handler(int priority, int errnum, + const char *format, va_list args); + +/* util-mem.h */ + +/** + * Use: _unref_(foo) struct foo *bar; + * + * This requires foo_unrefp() to be present, use DEFINE_UNREF_CLEANUP_FUNC. + */ +#define _unref_(_type) __attribute__((cleanup(_type##_unrefp))) struct _type + +/** + * Define a cleanup function for the struct type foo with a matching + * foo_unref(). Use: + * DEFINE_UNREF_CLEANUP_FUNC(foo) + * _unref_(foo) struct foo *bar; + */ +#define DEFINE_UNREF_CLEANUP_FUNC(_type) \ + static inline void _type##_unrefp(struct _type **_p) { \ + if (*_p) \ + _type##_unref(*_p); \ + } \ + struct __useless_struct_to_allow_trailing_semicolon__ + +static inline void* +_steal(void *ptr) { + void **original = (void**)ptr; + void *swapped = *original; + *original = NULL; + return swapped; +} + +/** + * Resets the pointer content and resets the data to NULL. + * This circumvents _cleanup_ handling for that pointer. + * Use: + * _cleanup_free_ char *data = malloc(); + * return steal(&data); + * + */ +#define steal(ptr_) \ + (typeof(*ptr_))_steal(ptr_) + +/* ! util-mem.h */ + +/* util-strings.h */ + +static inline bool +streq(const char *str1, const char *str2) +{ + /* one NULL, one not NULL is always false */ + if (str1 && str2) + return strcmp(str1, str2) == 0; + return str1 == str2; +} + +static inline bool +strneq(const char *str1, const char *str2, int n) +{ + /* one NULL, one not NULL is always false */ + if (str1 && str2) + return strncmp(str1, str2, n) == 0; + return str1 == str2; +} + +static inline void * +zalloc(size_t size) +{ + void *p; + + /* We never need to alloc anything more than 1,5 MB so we can assume + * if we ever get above that something's going wrong */ + if (size > 1536 * 1024) + assert(!"bug: internal malloc size limit exceeded"); + + p = calloc(1, size); + if (!p) + abort(); + + return p; +} + +/** + * strdup guaranteed to succeed. If the input string is NULL, the output + * string is NULL. If the input string is a string pointer, we strdup or + * abort on failure. + */ +static inline char* +safe_strdup(const char *str) +{ + char *s; + + if (!str) + return NULL; + + s = strdup(str); + if (!s) + abort(); + return s; +} + +/** + * Simple wrapper for asprintf that ensures the passed in-pointer is set + * to NULL upon error. + * The standard asprintf() call does not guarantee the passed in pointer + * will be NULL'ed upon failure, whereas this wrapper does. + * + * @param strp pointer to set to newly allocated string. + * This pointer should be passed to free() to release when done. + * @param fmt the format string to use for printing. + * @return The number of bytes printed (excluding the null byte terminator) + * upon success or -1 upon failure. In the case of failure the pointer is set + * to NULL. + */ +__attribute__ ((format (printf, 2, 3))) +static inline int +xasprintf(char **strp, const char *fmt, ...) +{ + int rc = 0; + va_list args; + + va_start(args, fmt); + rc = vasprintf(strp, fmt, args); + va_end(args); + if ((rc == -1) && strp) + *strp = NULL; + + return rc; +} + +static inline bool +safe_atoi_base(const char *str, int *val, int base) +{ + assert(str != NULL); + + char *endptr; + long v; + + assert(base == 10 || base == 16 || base == 8); + + errno = 0; + v = strtol(str, &endptr, base); + if (errno > 0) + return false; + if (str == endptr) + return false; + if (*str != '\0' && *endptr != '\0') + return false; + + if (v > INT_MAX || v < INT_MIN) + return false; + + *val = v; + return true; +} + +static inline bool +safe_atoi(const char *str, int *val) +{ + assert(str != NULL); + return safe_atoi_base(str, val, 10); +} + +static inline bool +safe_atou_base(const char *str, unsigned int *val, int base) +{ + assert(str != NULL); + + char *endptr; + unsigned long v; + + assert(base == 10 || base == 16 || base == 8); + + errno = 0; + v = strtoul(str, &endptr, base); + if (errno > 0) + return false; + if (str == endptr) + return false; + if (*str != '\0' && *endptr != '\0') + return false; + + if ((long)v < 0) + return false; + + *val = v; + return true; +} + +static inline bool +safe_atou(const char *str, unsigned int *val) +{ + assert(str != NULL); + return safe_atou_base(str, val, 10); +} + +static inline bool +safe_atod(const char *str, double *val) +{ + assert(str != NULL); + + char *endptr; + double v; + size_t slen = strlen(str); + + /* We don't have a use-case where we want to accept hex for a double + * or any of the other values strtod can parse */ + for (size_t i = 0; i < slen; i++) { + char c = str[i]; + + if (isdigit(c)) + continue; + switch(c) { + case '+': + case '-': + case '.': + break; + default: + return false; + } + } + +#ifdef HAVE_LOCALE_H + /* Create a "C" locale to force strtod to use '.' as separator */ + locale_t c_locale = newlocale(LC_NUMERIC_MASK, "C", (locale_t)0); + if (c_locale == (locale_t)0) + return false; + + errno = 0; + v = strtod_l(str, &endptr, c_locale); + freelocale(c_locale); +#else + /* No locale support in provided libc, assume it already uses '.' */ + errno = 0; + v = strtod(str, &endptr); +#endif + if (errno > 0) + return false; + if (str == endptr) + return false; + if (*str != '\0' && *endptr != '\0') + return false; + if (v != 0.0 && !isnormal(v)) + return false; + + *val = v; + return true; +} + +char **strv_from_string(const char *in, const char *separator, size_t *num_elements); + +typedef int (*strv_foreach_callback_t)(const char *str, size_t index, void *data); +int strv_for_each_n(const char **strv, size_t max, strv_foreach_callback_t func, void *data); + +static inline void +strv_free(char **strv) { + char **s = strv; + + if (!strv) + return; + + while (*s != NULL) { + free(*s); + *s = (char*)0x1; /* detect use-after-free */ + s++; + } + + free (strv); +} + +/** + * Return true if str ends in suffix, false otherwise. If the suffix is the + * empty string, strendswith() always returns false. + */ +static inline bool +strendswith(const char *str, const char *suffix) +{ + if (str == NULL) + return false; + + size_t slen = strlen(str); + size_t suffixlen = strlen(suffix); + size_t offset; + + if (slen == 0 || suffixlen == 0 || suffixlen > slen) + return false; + + offset = slen - suffixlen; + return strneq(&str[offset], suffix, suffixlen); +} + +static inline bool +strstartswith(const char *str, const char *prefix) +{ + if (str == NULL) + return false; + + size_t prefixlen = strlen(prefix); + + return prefixlen > 0 ? strneq(str, prefix, strlen(prefix)) : false; +} + +/* !util-strings.h */ + +/* util-prop-parsers.h */ + +struct input_prop { + unsigned int prop; + bool enabled; +}; + +bool parse_dimension_property(const char *prop, size_t *w, size_t *h); +bool parse_range_property(const char *prop, int *hi, int *lo); +bool parse_boolean_property(const char *prop, bool *b); +#define EVENT_CODE_UNDEFINED 0xffff +bool parse_evcode_property(const char *prop, struct input_event *events, size_t *nevents); +bool parse_input_prop_property(const char *prop, struct input_prop *props_out, size_t *nprops); + +/* !util-prop-parsers.h */ diff --git a/usr.sbin/moused/msconvd/Makefile b/usr.sbin/moused/msconvd/Makefile new file mode 100644 index 000000000000..6ea5eee7db3b --- /dev/null +++ b/usr.sbin/moused/msconvd/Makefile @@ -0,0 +1,8 @@ +PACKAGE= console-tools +PROG= msconvd +SRCS= ${PROG}.c +LIBADD= util +BINDIR= /usr/sbin +MAN= ${PROG}.8 + +.include <bsd.prog.mk> diff --git a/usr.sbin/moused/moused.8 b/usr.sbin/moused/msconvd/msconvd.8 index cd5d8ddde339..17434ecb9b60 100644 --- a/usr.sbin/moused/moused.8 +++ b/usr.sbin/moused/msconvd/msconvd.8 @@ -31,30 +31,21 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd July 7, 2024 -.Dt MOUSED 8 +.Dd May 18, 2025 +.Dt MSCONVD 8 .Os .Sh NAME -.Nm moused -.Nd pass mouse data to the system video console driver +.Nm msconvd +.Nd mouse protocol conversion daemon .Sh SYNOPSIS .Nm -.Op Fl DPRacdfs +.Op Fl DPRcdfs .Op Fl I Ar file .Op Fl F Ar rate .Op Fl r Ar resolution .Op Fl S Ar baudrate -.Op Fl VH Op Fl U Ar distance Fl L Ar distance -.Op Fl A Ar exp Ns Op , Ns Ar offset -.Op Fl a Ar X Ns Op , Ns Ar Y -.Op Fl C Ar threshold -.Op Fl m Ar N=M -.Op Fl w Ar N -.Op Fl z Ar target .Op Fl t Ar mousetype .Op Fl l Ar level -.Op Fl 3 Op Fl E Ar timeout -.Op Fl T Ar distance Ns Op , Ns Ar time Ns Op , Ns Ar after .Fl p Ar port .Pp .Nm @@ -64,38 +55,41 @@ .Sh DESCRIPTION The .Nm -utility and the console driver work together to support -mouse operation in the text console and user programs. -They virtualize the mouse and provide user programs with mouse data -in the standard format -(see -.Xr sysmouse 4 ) . -.Pp -The mouse daemon listens to the specified port for mouse data, -interprets and then passes it via ioctls to the console driver. -The mouse daemon -reports translation movement, button press/release +utility and the +.Xr moused 8 +driver work together to support legacy devices like COM, +.Xr ams 4 +mices and X10 remotes as well. +.Xr psm 4 , +.Xr ums 4 +and some other devices are supported too but not recomended to use with +.Nm +unless kernel is compiled without +.Dq option EVDEV_SUPPORT . +The +.Nm +listens to the specified port for mouse data, decodes and then passes +it via input event device a.k.a evdev to consumer aplications like +.Xr moused 8 +or +.Xr libinput 1 . +It does not display the mouse pointer on the screen or provide cut and +paste functions. +The msconv daemon converts translation movement, button press/release events and movement of the roller or the wheel if available. -The roller/wheel movement is reported as -.Dq Z -axis movement. -.Pp -The console driver will display the mouse pointer on the screen -and provide cut and paste functions if the mouse pointer is enabled -in the virtual console via -.Xr vidcontrol 1 . -If -.Xr sysmouse 4 -is opened by the user program, the console driver also passes the mouse -data to the device so that the user program will see it. -.Pp -If the mouse daemon receives the signal +.Pp +.Pp +If the +.Nm +receives the signal .Dv SIGHUP , it will reopen the mouse port and reinitialize itself. Useful if the mouse is attached/detached while the system is suspended. .Pp -If the mouse daemon receives the signal +If the +.Nm +receives the signal .Dv SIGUSR1 , it will stop passing mouse events. Sending the signal @@ -106,19 +100,6 @@ interrupted by accidentally touching the mouse pad. .Pp The following options are available: .Bl -tag -width indent -.It Fl 3 -Emulate the third (middle) button for 2-button mice. -It is emulated -by pressing the left and right physical buttons simultaneously. -.It Fl C Ar threshold -Set double click speed as the maximum interval in msec between button clicks. -Without this option, the default value of 500 msec will be assumed. -This option will have effect only on the cut and paste operations -in the text mode console. -The user program which is reading mouse data -via -.Xr sysmouse 4 -will not be affected. .It Fl D Lower DTR on the serial port. This option is valid only if @@ -128,46 +109,8 @@ The DTR line may need to be dropped for a 3-button mouse to operate in the .Ar mousesystems mode. -.It Fl E Ar timeout -When the third button emulation is enabled -(see above), -the -.Nm -utility waits -.Ar timeout -msec at most before deciding whether two buttons are being pressed -simultaneously. -The default timeout is 100 msec. .It Fl F Ar rate Set the report rate (reports/sec) of the device if supported. -.It Fl L Ar distance -When -.Dq Virtual Scrolling -is enabled, the -.Fl L -option can be used to set the -.Ar distance -(in pixels) that the mouse must move before a scroll event -is generated. -This effectively controls the scrolling speed. -The default -.Ar distance -is 2 pixels. -.It Fl H -Enable -.Dq Horizontal Virtual Scrolling . -With this option set, holding the middle mouse -button down will cause motion to be interpreted as -horizontal scrolling. -Use the -.Fl U -option to set the distance the mouse must move before the scrolling mode is -activated and the -.Fl L -option to set the scrolling speed. -This option may be used with or without the -.Fl V -option. .It Fl I Ar file Write the process id of the .Nm @@ -199,89 +142,6 @@ mode. .It Fl S Ar baudrate Select the baudrate for the serial port (1200 to 9600). Not all serial mice support this option. -.It Fl T Ar distance Ns Op , Ns Ar time Ns Op , Ns Ar after -Terminate drift. -Use this option if mouse pointer slowly wanders when mouse is not moved. -Movements up to -.Ar distance -(for example 4) pixels (X+Y) in -.Ar time -msec (default 500) are ignored, except during -.Ar after -msec (default 4000) since last real mouse movement. -.It Fl V -Enable -.Dq Virtual Scrolling . -With this option set, holding the middle mouse -button down will cause motion to be interpreted as scrolling. -Use the -.Fl U -option to set the distance the mouse must move before the scrolling mode is -activated and the -.Fl L -option to set the scrolling speed. -.It Fl U Ar distance -When -.Dq Virtual Scrolling -is enabled, the -.Fl U -option can be used to set the -.Ar distance -(in pixels) that the mouse must move before the scrolling -mode is activated. -The default -.Ar distance -is 3 pixels. -.It Fl A Ar exp Ns Op , Ns Ar offset -Apply exponential (dynamic) acceleration to mouse movements: -the faster you move the mouse, the more it will be accelerated. -That means that small mouse movements are not accelerated, -so they are still very accurate, while a faster movement will -drive the pointer quickly across the screen. -.Pp -The -.Ar exp -value specifies the exponent, which is basically -the amount of acceleration. -Useful values are in the range 1.1 to 2.0, but it depends on -your mouse hardware and your personal preference. -A value of 1.0 means no exponential acceleration. -A value of 2.0 means squared acceleration (i.e. if -you move the mouse twice as fast, the pointer will move -four times as fast on the screen). -Values beyond 2.0 are possible but not recommended. -A good value to start is probably 1.5. -.Pp -The optional -.Ar offset -value specifies the distance at which the acceleration begins. -The default is 1.0, which means that the acceleration is applied -to movements larger than one unit. -If you specify a larger value, it takes more speed for -the acceleration to kick in, i.e. the speed range for -small and accurate movements is wider. -Usually the default should be sufficient, but if you're -not satisfied with the behaviour, try a value of 2.0. -.Pp -Note that the -.Fl A -option interacts badly with the X server's own acceleration, -which doesn't work very well anyway. -Therefore it is recommended to switch it off if necessary: -.Dq xset m 1 . -.It Fl a Ar X Ns Op , Ns Ar Y -Accelerate or decelerate the mouse input. -This is a linear acceleration only. -Values less than 1.0 slow down movement, values greater than 1.0 speed it -up. -Specifying only one value sets the acceleration for both axes. -.Pp -You can use the -.Fl a -and -.Fl A -options at the same time to have the combined effect -of linear and exponential acceleration. .It Fl c Some mice report middle button down events as if the left and right buttons are being pressed. @@ -339,18 +199,6 @@ Refer to in .Xr psm 4 for more information on this. -.It Fl m Ar N=M -Assign the physical button -.Ar M -to the logical button -.Ar N . -You may specify as many instances of this option as you like. -More than one physical button may be assigned to a logical button at the -same time. -In this case the logical button will be down, -if either of the assigned physical buttons is held down. -Do not put space around -.Ql = . .It Fl p Ar port Use .Ar port @@ -382,7 +230,7 @@ you need to use this option only if the .Nm utility is not able to detect the protocol automatically (see -.Sx "Configuring Mouse Daemon" ) . +.Sx "Configuring Mouse Protocol Conversion Daemon" ) . .Pp Note that if a protocol type is specified with this option, the .Fl P @@ -475,73 +323,9 @@ For the USB mouse, .Ar auto is the only protocol type available for the USB mouse and should be specified for any USB mice, regardless of the brand. -.It Fl w Ar N -Make the physical button -.Ar N -act as the wheel mode button. -While this button is pressed, X and Y axis movement is reported to be zero -and the Y axis movement is mapped to Z axis. -You may further map the Z axis movement to virtual buttons by the -.Fl z -option below. -.It Fl z Ar target -Map Z axis (roller/wheel) movement to another axis or to virtual buttons. -Valid -.Ar target -maybe: -.Bl -tag -compact -width x__ -.It Ar x -.It Ar y -X or Y axis movement will be reported when the Z axis movement is detected. -.It Ar N -Report down events for the virtual buttons -.Ar N -and -.Ar N+1 -respectively when negative and positive Z axis movement -is detected. -There do not need to be physical buttons -.Ar N -and -.Ar N+1 . -Note that mapping to logical buttons is carried out after mapping -from the Z axis movement to the virtual buttons is done. -.It Ar N1 N2 -Report down events for the virtual buttons -.Ar N1 -and -.Ar N2 -respectively when negative and positive Z axis movement -is detected. -.It Ar N1 N2 N3 N4 -This is useful for the mouse with two wheels of which -the second wheel is used to generate horizontal scroll action, -and for the mouse which has a knob or a stick which can detect -the horizontal force applied by the user. -.Pp -The motion of the second wheel will be mapped to the buttons -.Ar N3 , -for the negative direction, and -.Ar N4 , -for the positive direction. -If the buttons -.Ar N3 -and -.Ar N4 -actually exist in this mouse, their actions will not be detected. -.Pp -Note that horizontal movement or second roller/wheel movement may not -always be detected, -because there appears to be no accepted standard as to how it is encoded. -.Pp -Note also that some mice think left is the negative horizontal direction; -others may think otherwise. -Moreover, there are some mice whose two wheels are both mounted vertically, -and the direction of the second vertical wheel does not match the -first one. .El .El -.Ss Configuring Mouse Daemon +.Ss Configuring Mouse Protocol Conversion Daemon The first thing you need to know is the interface type of the mouse you are going to use. It can be determined by looking at the connector of the mouse. @@ -673,13 +457,17 @@ protocol. .El .Pp To test if the selected protocol type is correct for the given mouse, -enable the mouse pointer in the current virtual console, +ensure the +.Xr moused 8 +is running in auto port mode, .Pp -.Dl "vidcontrol -m on" +.Dl "moused -p auto" .Pp -start the mouse daemon in the foreground mode, +start the +.Nm +in the foreground mode, .Pp -.Dl "moused -f -p <selected_port> -t <selected_protocol>" +.Dl "msconvd -f -p <selected_port> -t <selected_protocol>" .Pp and see if the mouse pointer travels correctly according to the mouse movement. @@ -688,19 +476,20 @@ clicking the left, right and middle buttons. Type ^C to stop the command. .Ss Multiple Mice -As many instances of the mouse daemon as the number of mice attached to -the system may be run simultaneously; one -instance for each mouse. +As many instances of the +.Nm +as the number of mice attached to the system may be run simultaneously; +one instance for each mouse. This is useful if the user wants to use the built-in PS/2 pointing device of a laptop computer while on the road, but wants to use a serial mouse when s/he attaches the system to the docking station in the office. -Run two mouse daemons and tell the application program -(such as the -.Tn "X\ Window System" ) -to use -.Xr sysmouse 4 , -then the application program will always see mouse data from either mouse. -When the serial mouse is not attached, the corresponding mouse daemon +Run two +.Nm +and then the application program e.g. +.Xr moused 8 +will always see mouse data from either mouse. +When the serial mouse is not attached, the corresponding +.Nm will not detect any movement or button state change and the application program will only see mouse data coming from the daemon for the PS/2 mouse. @@ -709,18 +498,18 @@ are moved at the same time in this configuration, the mouse pointer will travel across the screen just as if movement of the mice is combined all together. .Sh FILES -.Bl -tag -width /dev/consolectl -compact -.It Pa /dev/consolectl -device to control the console +.Bl -tag -width /dev/input/event%d -compact +.It Pa /dev/input/event%d +input event device .It Pa /dev/psm%d PS/2 mouse driver -.It Pa /dev/sysmouse -virtualized mouse driver +.It Pa /dev/cuau%d +serial port .It Pa /dev/ttyv%d virtual consoles .It Pa /dev/ums%d USB mouse driver -.It Pa /var/run/moused.pid +.It Pa /var/run/msconvd.pid process id of the currently running .Nm utility @@ -728,7 +517,7 @@ utility UNIX-domain stream socket for X10 MouseRemote events .El .Sh EXAMPLES -.Dl "moused -p /dev/cuau0 -i type" +.Dl "msconvd -p /dev/cuau0 -i type" .Pp Let the .Nm @@ -737,8 +526,7 @@ utility determine the protocol type of the mouse at the serial port If successful, the command will print the type, otherwise it will say .Dq Li unknown . .Bd -literal -offset indent -moused -p /dev/cuau0 -vidcontrol -m on +msconvd -p /dev/cuau0 .Ed .Pp If the @@ -746,10 +534,9 @@ If the utility is able to identify the protocol type of the mouse at the specified port automatically, you can start the daemon without the .Fl t -option and enable the mouse pointer in the text console as above. +option. .Bd -literal -offset indent -moused -p /dev/mouse -t microsoft -vidcontrol -m on +msconvd -p /dev/mouse -t microsoft .Ed .Pp Start the mouse daemon on the serial port @@ -760,39 +547,26 @@ is explicitly specified by the .Fl t option. .Pp -.Dl "moused -p /dev/mouse -m 1=3 -m 3=1" -.Pp -Assign the physical button 3 (right button) to the logical button 1 -(logical left) and the physical button 1 (left) to the logical -button 3 (logical right). -This will effectively swap the left and right buttons. -.Pp -.Dl "moused -p /dev/mouse -t intellimouse -z 4" -.Pp -Report negative Z axis movement (i.e., mouse wheel) as the button 4 pressed -and positive Z axis movement (i.e., mouse wheel) as the button 5 pressed. -.Pp If you add .Pp -.Dl "ALL ALL = NOPASSWD: /usr/bin/killall -USR1 moused" +.Dl "ALL ALL = NOPASSWD: /usr/bin/killall -USR1 msconvd" .Pp to your .Pa /usr/local/etc/sudoers file, and bind .Pp -.Dl "killall -USR1 moused" +.Dl "killall -USR1 msconvd" .Pp to a key in your window manager, you can suspend mouse events on your laptop if you keep brushing over the mouse pad while typing. .Sh SEE ALSO +.Xr moused 8 , .Xr kill 1 , -.Xr vidcontrol 1 , .Xr xset 1 , -.Xr keyboard 4 , .Xr psm 4 , .Xr screen 4 , .Xr sysmouse 4 , -.Xr ums 4 +.Xr uart 4 .Sh STANDARDS The .Nm @@ -809,14 +583,23 @@ for the given serial mouse. The .Nm utility first appeared in +.Fx 15.0 . +It is a cropped-down version of +.Fx 14.0 +.Xr moused 8 +utility originated back in .Fx 2.2 . .Sh AUTHORS .An -nosplit The .Nm -utility was written by +utility is based on +.Xr moused 8 +written by .An Michael Smith Aq Mt msmith@FreeBSD.org . -This manual page was written by +This manual page is extracted from +.Xr moused 8 +page written by .An Mike Pritchard Aq Mt mpp@FreeBSD.org . The command and manual page have since been updated by .An Kazutaka Yokota Aq Mt yokota@FreeBSD.org . @@ -830,21 +613,7 @@ treat the tapping action as fourth button events. Use the option .Dq Fl m Li 1=4 +of +.Xr moused 8 for these models to obtain the same effect as the other pad devices. -.Pp -Cut and paste functions in the virtual console assume that there -are three buttons on the mouse. -The logical button 1 (logical left) selects a region of text in the -console and copies it to the cut buffer. -The logical button 3 (logical right) extends the selected region. -The logical button 2 (logical middle) pastes the selected text -at the text cursor position. -If the mouse has only two buttons, the middle, `paste' button -is not available. -To obtain the paste function, use the -.Fl 3 -option to emulate the middle button, or use the -.Fl m -option to assign the physical right button to the logical middle button: -.Dq Fl m Li 2=3 . diff --git a/usr.sbin/moused/moused.c b/usr.sbin/moused/msconvd/msconvd.c index 068919f2e941..7b06d92019aa 100644 --- a/usr.sbin/moused/moused.c +++ b/usr.sbin/moused/msconvd/msconvd.c @@ -34,11 +34,11 @@ **/ /** - ** MOUSED.C + ** MSCONVD.C ** - ** Mouse daemon : listens to a serial port, the bus mouse interface, or - ** the PS/2 mouse port for mouse data stream, interprets data and passes - ** ioctls off to the console driver. + ** Mouse protocol conversion daemon : listens to a serial port or + ** the PS/2 mouse port for mouse data stream, decodes data and passes + ** writes off to the uinput driver. ** ** The mouse interface functions are derived closely from the mouse ** handler in the XFree86 X server. Many thanks to the XFree86 people @@ -54,15 +54,20 @@ #include <sys/time.h> #include <sys/un.h> +#include <dev/evdev/input.h> +#include <dev/evdev/uinput.h> + #include <ctype.h> #include <err.h> #include <errno.h> #include <fcntl.h> +#include <libgen.h> #include <libutil.h> #include <limits.h> #include <setjmp.h> #include <signal.h> #include <stdarg.h> +#include <stdbool.h> #include <stdint.h> #include <stdio.h> #include <stdlib.h> @@ -70,23 +75,6 @@ #include <syslog.h> #include <termios.h> #include <unistd.h> -#include <math.h> - -#define MAX_CLICKTHRESHOLD 2000 /* 2 seconds */ -#define MAX_BUTTON2TIMEOUT 2000 /* 2 seconds */ -#define DFLT_CLICKTHRESHOLD 500 /* 0.5 second */ -#define DFLT_BUTTON2TIMEOUT 100 /* 0.1 second */ -#define DFLT_SCROLLTHRESHOLD 3 /* 3 pixels */ -#define DFLT_SCROLLSPEED 2 /* 2 pixels */ - -/* Abort 3-button emulation delay after this many movement events. */ -#define BUTTON2_MAXMOVE 3 - -#define TRUE 1 -#define FALSE 0 - -#define MOUSE_XAXIS (-1) -#define MOUSE_YAXIS (-2) /* Logitech PS2++ protocol */ #define MOUSE_PS2PLUS_CHECKBITS(b) \ @@ -95,13 +83,9 @@ (((b[0] & 0x30) >> 2) | ((b[1] & 0x30) >> 4)) #define ChordMiddle 0x0001 -#define Emulate3Button 0x0002 #define ClearDTR 0x0004 #define ClearRTS 0x0008 #define NoPnP 0x0010 -#define VirtualScroll 0x0020 -#define HVirtualScroll 0x0040 -#define ExponentialAcc 0x0080 #define ID_NONE 0 #define ID_PORT 1 @@ -110,22 +94,6 @@ #define ID_MODEL 8 #define ID_ALL (ID_PORT | ID_IF | ID_TYPE | ID_MODEL) -/* Operations on timespecs */ -#define tsclr(tvp) ((tvp)->tv_sec = (tvp)->tv_nsec = 0) -#define tscmp(tvp, uvp, cmp) \ - (((tvp)->tv_sec == (uvp)->tv_sec) ? \ - ((tvp)->tv_nsec cmp (uvp)->tv_nsec) : \ - ((tvp)->tv_sec cmp (uvp)->tv_sec)) -#define tssub(tvp, uvp, vvp) \ - do { \ - (vvp)->tv_sec = (tvp)->tv_sec - (uvp)->tv_sec; \ - (vvp)->tv_nsec = (tvp)->tv_nsec - (uvp)->tv_nsec; \ - if ((vvp)->tv_nsec < 0) { \ - (vvp)->tv_sec--; \ - (vvp)->tv_nsec += 1000000000; \ - } \ - } while (0) - #define debug(...) do { \ if (debug && nodaemon) \ warnx(__VA_ARGS__); \ @@ -174,30 +142,21 @@ typedef struct { /* global variables */ static int debug = 0; -static int nodaemon = FALSE; -static int background = FALSE; -static int paused = FALSE; +static bool nodaemon = false; +static bool background = false; +static bool paused = false; static int identify = ID_NONE; -static int extioctl = FALSE; -static const char *pidfile = "/var/run/moused.pid"; +static const char *pidfile = "/var/run/msconvd.pid"; static struct pidfh *pfh; -#define SCROLL_NOTSCROLLING 0 -#define SCROLL_PREPARE 1 -#define SCROLL_SCROLLING 2 - -static int scroll_state; -static int scroll_movement; -static int hscroll_movement; - /* local variables */ /* interface (the table must be ordered by MOUSE_IF_XXX in mouse.h) */ static symtab_t rifs[] = { - { "serial", MOUSE_IF_SERIAL, 0 }, - { "ps/2", MOUSE_IF_PS2, 0 }, - { "sysmouse", MOUSE_IF_SYSMOUSE, 0 }, - { "usb", MOUSE_IF_USB, 0 }, + { "serial", MOUSE_IF_SERIAL, BUS_RS232 }, + { "ps/2", MOUSE_IF_PS2, BUS_I8042 }, + { "sysmouse", MOUSE_IF_SYSMOUSE, BUS_VIRTUAL }, + { "usb", MOUSE_IF_USB, BUS_USB }, { NULL, MOUSE_IF_UNKNOWN, 0 }, }; @@ -381,6 +340,18 @@ static unsigned short rodentcflags[] = (CS8 | CREAD | HUPCL ), /* GTCO Digi-Pad */ }; +/* evdev button codes */ +static const int16_t evdev_buttons[8] = { + BTN_LEFT, + BTN_MIDDLE, + BTN_RIGHT, + BTN_SIDE, + BTN_EXTRA, + BTN_FORWARD, + BTN_BACK, + BTN_TASK +}; + static struct rodentparam { int flags; const char *portname; /* /dev/XXX */ @@ -389,25 +360,13 @@ static struct rodentparam { int baudrate; int rate; /* report rate */ int resolution; /* MOUSE_RES_XXX or a positive number */ - int zmap[4]; /* MOUSE_{X|Y}AXIS or a button number */ - int wmode; /* wheel mode button number */ int mfd; /* mouse file descriptor */ - int cfd; /* /dev/consolectl file descriptor */ + int ufd; /* /dev/uinput file descriptor */ int mremsfd; /* mouse remote server file descriptor */ int mremcfd; /* mouse remote client file descriptor */ int is_removable; /* set if device is removable, like USB */ - long clickthreshold; /* double click speed in msec */ - long button2timeout; /* 3 button emulation timeout */ mousehw_t hw; /* mouse device hardware information */ mousemode_t mode; /* protocol information */ - float accelx; /* Acceleration in the X axis */ - float accely; /* Acceleration in the Y axis */ - float expoaccel; /* Exponential acceleration */ - float expoffset; /* Movement offset for exponential accel. */ - float remainx; /* Remainder on X and Y axis, respectively... */ - float remainy; /* ... to compensate for rounding errors. */ - int scrollthreshold; /* Movement distance before virtual scrolling */ - int scrollspeed; /* Movement distance to rate of scrolling */ } rodent = { .flags = 0, .portname = NULL, @@ -416,107 +375,18 @@ static struct rodentparam { .baudrate = 1200, .rate = 0, .resolution = MOUSE_RES_UNKNOWN, - .zmap = { 0, 0, 0, 0 }, - .wmode = 0, .mfd = -1, - .cfd = -1, + .ufd = -1, .mremsfd = -1, .mremcfd = -1, .is_removable = 0, - .clickthreshold = DFLT_CLICKTHRESHOLD, - .button2timeout = DFLT_BUTTON2TIMEOUT, - .accelx = 1.0, - .accely = 1.0, - .expoaccel = 1.0, - .expoffset = 1.0, - .remainx = 0.0, - .remainy = 0.0, - .scrollthreshold = DFLT_SCROLLTHRESHOLD, - .scrollspeed = DFLT_SCROLLSPEED, -}; - -/* button status */ -struct button_state { - int count; /* 0: up, 1: single click, 2: double click,... */ - struct timespec ts; /* timestamp on the last button event */ -}; -static struct button_state bstate[MOUSE_MAXBUTTON]; /* button state */ -static struct button_state *mstate[MOUSE_MAXBUTTON];/* mapped button st.*/ -static struct button_state zstate[4]; /* Z/W axis state */ - -/* state machine for 3 button emulation */ - -#define S0 0 /* start */ -#define S1 1 /* button 1 delayed down */ -#define S2 2 /* button 3 delayed down */ -#define S3 3 /* both buttons down -> button 2 down */ -#define S4 4 /* button 1 delayed up */ -#define S5 5 /* button 1 down */ -#define S6 6 /* button 3 down */ -#define S7 7 /* both buttons down */ -#define S8 8 /* button 3 delayed up */ -#define S9 9 /* button 1 or 3 up after S3 */ - -#define A(b1, b3) (((b1) ? 2 : 0) | ((b3) ? 1 : 0)) -#define A_TIMEOUT 4 -#define S_DELAYED(st) (states[st].s[A_TIMEOUT] != (st)) - -static struct { - int s[A_TIMEOUT + 1]; - int buttons; - int mask; - int timeout; -} states[10] = { - /* S0 */ - { { S0, S2, S1, S3, S0 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), FALSE }, - /* S1 */ - { { S4, S2, S1, S3, S5 }, 0, ~MOUSE_BUTTON1DOWN, FALSE }, - /* S2 */ - { { S8, S2, S1, S3, S6 }, 0, ~MOUSE_BUTTON3DOWN, FALSE }, - /* S3 */ - { { S0, S9, S9, S3, S3 }, MOUSE_BUTTON2DOWN, ~0, FALSE }, - /* S4 */ - { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON1DOWN, ~0, TRUE }, - /* S5 */ - { { S0, S2, S5, S7, S5 }, MOUSE_BUTTON1DOWN, ~0, FALSE }, - /* S6 */ - { { S0, S6, S1, S7, S6 }, MOUSE_BUTTON3DOWN, ~0, FALSE }, - /* S7 */ - { { S0, S6, S5, S7, S7 }, MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN, ~0, FALSE }, - /* S8 */ - { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON3DOWN, ~0, TRUE }, - /* S9 */ - { { S0, S9, S9, S3, S9 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), FALSE }, }; -static int mouse_button_state; -static struct timespec mouse_button_state_ts; -static int mouse_move_delayed; static jmp_buf env; -struct drift_xy { - int x; - int y; -}; -static int drift_distance = 4; /* max steps X+Y */ -static int drift_time = 500; /* in 0.5 sec */ -static struct timespec drift_time_ts; -static struct timespec drift_2time_ts; /* 2*drift_time */ -static int drift_after = 4000; /* 4 sec */ -static struct timespec drift_after_ts; -static int drift_terminate = FALSE; -static struct timespec drift_current_ts; -static struct timespec drift_tmp; -static struct timespec drift_last_activity = {0, 0}; -static struct timespec drift_since = {0, 0}; -static struct drift_xy drift_last = {0, 0}; /* steps in last drift_time */ -static struct drift_xy drift_previous = {0, 0}; /* steps in prev. drift_time */ - /* function prototypes */ -static void linacc(int, int, int*, int*); -static void expoacc(int, int, int*, int*); -static void moused(void); +static void msconvd(void); static void hup(int sig); static void cleanup(int sig); static void pause_mouse(int sig); @@ -524,31 +394,29 @@ static void usage(void); static void log_or_warn(int log_pri, int errnum, const char *fmt, ...) __printflike(3, 4); +static int r_uinput_register(void); +static int r_uinput_report(int fd, mousestatus_t *act); static int r_identify(void); static const char *r_if(int type); +static uint16_t r_bustype(int type); static const char *r_name(int type); static const char *r_model(int model); static void r_init(void); static int r_protocol(u_char b, mousestatus_t *act); -static int r_statetrans(mousestatus_t *a1, mousestatus_t *a2, int trans); -static int r_installmap(char *arg); -static void r_map(mousestatus_t *act1, mousestatus_t *act2); -static void r_timestamp(mousestatus_t *act); -static int r_timeout(void); -static void r_click(mousestatus_t *act); static void setmousespeed(int old, int new, unsigned cflag); -static int pnpwakeup1(void); -static int pnpwakeup2(void); +static bool pnpwakeup1(void); +static bool pnpwakeup2(void); static int pnpgets(char *buf); -static int pnpparse(pnpid_t *id, char *buf, int len); +static bool pnpparse(pnpid_t *id, char *buf, int len); static symtab_t *pnpproto(pnpid_t *id); static symtab_t *gettoken(symtab_t *tab, const char *s, int len); static const char *gettokenname(symtab_t *tab, int val); +static int gettokenval2(symtab_t *tab, int val); static void mremote_serversetup(void); -static void mremote_clientchg(int add); +static void mremote_clientchg(bool add); static int kidspad(u_char rxc, mousestatus_t *act); static int gtco_digipad(u_char, mousestatus_t *); @@ -558,52 +426,10 @@ main(int argc, char *argv[]) { int c; int i; - int j; - for (i = 0; i < MOUSE_MAXBUTTON; ++i) - mstate[i] = &bstate[i]; - - while ((c = getopt(argc, argv, "3A:C:DE:F:HI:L:PRS:T:VU:a:cdfhi:l:m:p:r:st:w:z:")) != -1) + while ((c = getopt(argc, argv, "DF:I:PRS:cdfhi:l:p:r:st:")) != -1) switch(c) { - case '3': - rodent.flags |= Emulate3Button; - break; - - case 'E': - rodent.button2timeout = atoi(optarg); - if ((rodent.button2timeout < 0) || - (rodent.button2timeout > MAX_BUTTON2TIMEOUT)) { - warnx("invalid argument `%s'", optarg); - usage(); - } - break; - - case 'a': - i = sscanf(optarg, "%f,%f", &rodent.accelx, &rodent.accely); - if (i == 0) { - warnx("invalid linear acceleration argument '%s'", optarg); - usage(); - } - - if (i == 1) - rodent.accely = rodent.accelx; - - break; - - case 'A': - rodent.flags |= ExponentialAcc; - i = sscanf(optarg, "%f,%f", &rodent.expoaccel, &rodent.expoffset); - if (i == 0) { - warnx("invalid exponential acceleration argument '%s'", optarg); - usage(); - } - - if (i == 1) - rodent.expoffset = 1.0; - - break; - case 'c': rodent.flags |= ChordMiddle; break; @@ -613,7 +439,7 @@ main(int argc, char *argv[]) break; case 'f': - nodaemon = TRUE; + nodaemon = true; break; case 'i': @@ -631,7 +457,7 @@ main(int argc, char *argv[]) warnx("invalid argument `%s'", optarg); usage(); } - nodaemon = TRUE; + nodaemon = true; break; case 'l': @@ -642,13 +468,6 @@ main(int argc, char *argv[]) } break; - case 'm': - if (!r_installmap(optarg)) { - warnx("invalid argument `%s'", optarg); - usage(); - } - break; - case 'p': rodent.portname = optarg; break; @@ -677,58 +496,6 @@ main(int argc, char *argv[]) rodent.baudrate = 9600; break; - case 'w': - i = atoi(optarg); - if ((i <= 0) || (i > MOUSE_MAXBUTTON)) { - warnx("invalid argument `%s'", optarg); - usage(); - } - rodent.wmode = 1 << (i - 1); - break; - - case 'z': - if (strcmp(optarg, "x") == 0) - rodent.zmap[0] = MOUSE_XAXIS; - else if (strcmp(optarg, "y") == 0) - rodent.zmap[0] = MOUSE_YAXIS; - else { - i = atoi(optarg); - /* - * Use button i for negative Z axis movement and - * button (i + 1) for positive Z axis movement. - */ - if ((i <= 0) || (i > MOUSE_MAXBUTTON - 1)) { - warnx("invalid argument `%s'", optarg); - usage(); - } - rodent.zmap[0] = i; - rodent.zmap[1] = i + 1; - debug("optind: %d, optarg: '%s'", optind, optarg); - for (j = 1; j < 4; ++j) { - if ((optind >= argc) || !isdigit(*argv[optind])) - break; - i = atoi(argv[optind]); - if ((i <= 0) || (i > MOUSE_MAXBUTTON - 1)) { - warnx("invalid argument `%s'", argv[optind]); - usage(); - } - rodent.zmap[j] = i; - ++optind; - } - if ((rodent.zmap[2] != 0) && (rodent.zmap[3] == 0)) - rodent.zmap[3] = rodent.zmap[2] + 1; - } - break; - - case 'C': - rodent.clickthreshold = atoi(optarg); - if ((rodent.clickthreshold < 0) || - (rodent.clickthreshold > MAX_CLICKTHRESHOLD)) { - warnx("invalid argument `%s'", optarg); - usage(); - } - break; - case 'D': rodent.flags |= ClearDTR; break; @@ -741,22 +508,10 @@ main(int argc, char *argv[]) } break; - case 'H': - rodent.flags |= HVirtualScroll; - break; - case 'I': pidfile = optarg; break; - case 'L': - rodent.scrollspeed = atoi(optarg); - if (rodent.scrollspeed < 0) { - warnx("invalid argument `%s'", optarg); - usage(); - } - break; - case 'P': rodent.flags |= NoPnP; break; @@ -774,24 +529,6 @@ main(int argc, char *argv[]) debug("rodent baudrate %d", rodent.baudrate); break; - case 'T': - drift_terminate = TRUE; - sscanf(optarg, "%d,%d,%d", &drift_distance, &drift_time, - &drift_after); - if (drift_distance <= 0 || drift_time <= 0 || drift_after <= 0) { - warnx("invalid argument `%s'", optarg); - usage(); - } - debug("terminate drift: distance %d, time %d, after %d", - drift_distance, drift_time, drift_after); - drift_time_ts.tv_sec = drift_time / 1000; - drift_time_ts.tv_nsec = (drift_time % 1000) * 1000000; - drift_2time_ts.tv_sec = (drift_time *= 2) / 1000; - drift_2time_ts.tv_nsec = (drift_time % 1000) * 1000000; - drift_after_ts.tv_sec = drift_after / 1000; - drift_after_ts.tv_nsec = (drift_after % 1000) * 1000000; - break; - case 't': if (strcmp(optarg, "auto") == 0) { rodent.rtype = MOUSE_PROTO_UNKNOWN; @@ -812,34 +549,12 @@ main(int argc, char *argv[]) } break; - case 'V': - rodent.flags |= VirtualScroll; - break; - case 'U': - rodent.scrollthreshold = atoi(optarg); - if (rodent.scrollthreshold < 0) { - warnx("invalid argument `%s'", optarg); - usage(); - } - break; - case 'h': case '?': default: usage(); } - /* fix Z axis mapping */ - for (i = 0; i < 4; ++i) { - if (rodent.zmap[i] > 0) { - for (j = 0; j < MOUSE_MAXBUTTON; ++j) { - if (mstate[j] == &bstate[rodent.zmap[i] - 1]) - mstate[j] = &zstate[i]; - } - rodent.zmap[i] = 1 << (rodent.zmap[i] - 1); - } - } - /* the default port name */ switch(rodent.rtype) { @@ -908,14 +623,14 @@ main(int argc, char *argv[]) } r_init(); /* call init function */ - moused(); + msconvd(); } if (rodent.mfd != -1) close(rodent.mfd); - if (rodent.cfd != -1) - close(rodent.cfd); - rodent.mfd = rodent.cfd = -1; + if (rodent.ufd != -1) + close(rodent.ufd); + rodent.mfd = rodent.ufd = -1; if (rodent.is_removable) exit(0); } @@ -924,90 +639,24 @@ main(int argc, char *argv[]) exit(0); } -/* - * Function to calculate linear acceleration. - * - * If there are any rounding errors, the remainder - * is stored in the remainx and remainy variables - * and taken into account upon the next movement. - */ - -static void -linacc(int dx, int dy, int *movex, int *movey) -{ - float fdx, fdy; - - if (dx == 0 && dy == 0) { - *movex = *movey = 0; - return; - } - fdx = dx * rodent.accelx + rodent.remainx; - fdy = dy * rodent.accely + rodent.remainy; - *movex = lround(fdx); - *movey = lround(fdy); - rodent.remainx = fdx - *movex; - rodent.remainy = fdy - *movey; -} - -/* - * Function to calculate exponential acceleration. - * (Also includes linear acceleration if enabled.) - * - * In order to give a smoother behaviour, we record the four - * most recent non-zero movements and use their average value - * to calculate the acceleration. - */ - -static void -expoacc(int dx, int dy, int *movex, int *movey) -{ - static float lastlength[3] = {0.0, 0.0, 0.0}; - float fdx, fdy, length, lbase, accel; - - if (dx == 0 && dy == 0) { - *movex = *movey = 0; - return; - } - fdx = dx * rodent.accelx; - fdy = dy * rodent.accely; - length = sqrtf((fdx * fdx) + (fdy * fdy)); /* Pythagoras */ - length = (length + lastlength[0] + lastlength[1] + lastlength[2]) / 4; - lbase = length / rodent.expoffset; - accel = powf(lbase, rodent.expoaccel) / lbase; - fdx = fdx * accel + rodent.remainx; - fdy = fdy * accel + rodent.remainy; - *movex = lroundf(fdx); - *movey = lroundf(fdy); - rodent.remainx = fdx - *movex; - rodent.remainy = fdy - *movey; - lastlength[2] = lastlength[1]; - lastlength[1] = lastlength[0]; - lastlength[0] = length; /* Insert new average, not original length! */ -} - static void -moused(void) +msconvd(void) { - struct mouse_info mouse; - mousestatus_t action0; /* original mouse action */ - mousestatus_t action; /* interim buffer */ - mousestatus_t action2; /* mapped action */ - struct timeval timeout; + mousestatus_t action; /* mouse action */ fd_set fds; u_char b; pid_t mpid; int flags; int c; - int i; - if ((rodent.cfd = open("/dev/consolectl", O_RDWR, 0)) == -1) - logerr(1, "cannot open /dev/consolectl"); + if ((rodent.ufd = r_uinput_register()) == -1) + logerr(1, "cannot register uinput device"); if (!nodaemon && !background) { pfh = pidfile_open(pidfile, 0600, &mpid); if (pfh == NULL) { if (errno == EEXIST) - logerrx(1, "moused already running, pid: %d", mpid); + logerrx(1, "msconvd already running, pid: %d", mpid); logwarn("cannot open pid file"); } if (daemon(0, 0)) { @@ -1016,35 +665,15 @@ moused(void) errno = saved_errno; logerr(1, "failed to become a daemon"); } else { - background = TRUE; + background = true; pidfile_write(pfh); } } /* clear mouse data */ - bzero(&action0, sizeof(action0)); bzero(&action, sizeof(action)); - bzero(&action2, sizeof(action2)); - bzero(&mouse, sizeof(mouse)); - mouse_button_state = S0; - clock_gettime(CLOCK_MONOTONIC_FAST, &mouse_button_state_ts); - mouse_move_delayed = 0; - for (i = 0; i < MOUSE_MAXBUTTON; ++i) { - bstate[i].count = 0; - bstate[i].ts = mouse_button_state_ts; - } - for (i = 0; i < (int)nitems(zstate); ++i) { - zstate[i].count = 0; - zstate[i].ts = mouse_button_state_ts; - } - - /* choose which ioctl command to use */ - mouse.operation = MOUSE_MOTION_EVENT; - extioctl = (ioctl(rodent.cfd, CONS_MOUSECTL, &mouse) == 0); /* process mouse data */ - timeout.tv_sec = 0; - timeout.tv_usec = 20000; /* 20 msec */ for (;;) { FD_ZERO(&fds); @@ -1054,265 +683,37 @@ moused(void) if (rodent.mremcfd >= 0) FD_SET(rodent.mremcfd, &fds); - c = select(FD_SETSIZE, &fds, NULL, NULL, - ((rodent.flags & Emulate3Button) && - S_DELAYED(mouse_button_state)) ? &timeout : NULL); + c = select(FD_SETSIZE, &fds, NULL, NULL, NULL); if (c < 0) { /* error */ logwarn("failed to read from mouse"); continue; - } else if (c == 0) { /* timeout */ - /* assert(rodent.flags & Emulate3Button) */ - action0.button = action0.obutton; - action0.dx = action0.dy = action0.dz = 0; - action0.flags = flags = 0; - if (r_timeout() && r_statetrans(&action0, &action, A_TIMEOUT)) { - if (debug > 2) - debug("flags:%08x buttons:%08x obuttons:%08x", - action.flags, action.button, action.obutton); - } else { - action0.obutton = action0.button; - continue; - } - } else { - /* MouseRemote client connect/disconnect */ - if ((rodent.mremsfd >= 0) && FD_ISSET(rodent.mremsfd, &fds)) { - mremote_clientchg(TRUE); - continue; - } - if ((rodent.mremcfd >= 0) && FD_ISSET(rodent.mremcfd, &fds)) { - mremote_clientchg(FALSE); - continue; - } - /* mouse movement */ - if (read(rodent.mfd, &b, 1) == -1) { - if (errno == EWOULDBLOCK) - continue; - else - return; - } - if ((flags = r_protocol(b, &action0)) == 0) + } + /* MouseRemote client connect/disconnect */ + if ((rodent.mremsfd >= 0) && FD_ISSET(rodent.mremsfd, &fds)) { + mremote_clientchg(true); + continue; + } + if ((rodent.mremcfd >= 0) && FD_ISSET(rodent.mremcfd, &fds)) { + mremote_clientchg(false); + continue; + } + /* mouse movement */ + if (read(rodent.mfd, &b, 1) == -1) { + if (errno == EWOULDBLOCK) continue; - - if ((rodent.flags & VirtualScroll) || (rodent.flags & HVirtualScroll)) { - /* Allow middle button drags to scroll up and down */ - if (action0.button == MOUSE_BUTTON2DOWN) { - if (scroll_state == SCROLL_NOTSCROLLING) { - scroll_state = SCROLL_PREPARE; - scroll_movement = hscroll_movement = 0; - debug("PREPARING TO SCROLL"); - } - debug("[BUTTON2] flags:%08x buttons:%08x obuttons:%08x", - action.flags, action.button, action.obutton); - } else { - debug("[NOTBUTTON2] flags:%08x buttons:%08x obuttons:%08x", - action.flags, action.button, action.obutton); - - /* This isn't a middle button down... move along... */ - if (scroll_state == SCROLL_SCROLLING) { - /* - * We were scrolling, someone let go of button 2. - * Now turn autoscroll off. - */ - scroll_state = SCROLL_NOTSCROLLING; - debug("DONE WITH SCROLLING / %d", scroll_state); - } else if (scroll_state == SCROLL_PREPARE) { - mousestatus_t newaction = action0; - - /* We were preparing to scroll, but we never moved... */ - r_timestamp(&action0); - r_statetrans(&action0, &newaction, - A(newaction.button & MOUSE_BUTTON1DOWN, - action0.button & MOUSE_BUTTON3DOWN)); - - /* Send middle down */ - newaction.button = MOUSE_BUTTON2DOWN; - r_click(&newaction); - - /* Send middle up */ - r_timestamp(&newaction); - newaction.obutton = newaction.button; - newaction.button = action0.button; - r_click(&newaction); - } - } - } - - r_timestamp(&action0); - r_statetrans(&action0, &action, - A(action0.button & MOUSE_BUTTON1DOWN, - action0.button & MOUSE_BUTTON3DOWN)); - debug("flags:%08x buttons:%08x obuttons:%08x", action.flags, - action.button, action.obutton); + else + return; } - action0.obutton = action0.button; - flags &= MOUSE_POSCHANGED; - flags |= action.obutton ^ action.button; - action.flags = flags; - - if (flags) { /* handler detected action */ - r_map(&action, &action2); - debug("activity : buttons 0x%08x dx %d dy %d dz %d", - action2.button, action2.dx, action2.dy, action2.dz); + if ((flags = r_protocol(b, &action)) == 0) + continue; - if ((rodent.flags & VirtualScroll) || (rodent.flags & HVirtualScroll)) { - /* - * If *only* the middle button is pressed AND we are moving - * the stick/trackpoint/nipple, scroll! - */ - if (scroll_state == SCROLL_PREPARE) { - /* Middle button down, waiting for movement threshold */ - if (action2.dy || action2.dx) { - if (rodent.flags & VirtualScroll) { - scroll_movement += action2.dy; - if (scroll_movement < -rodent.scrollthreshold) { - scroll_state = SCROLL_SCROLLING; - } else if (scroll_movement > rodent.scrollthreshold) { - scroll_state = SCROLL_SCROLLING; - } - } - if (rodent.flags & HVirtualScroll) { - hscroll_movement += action2.dx; - if (hscroll_movement < -rodent.scrollthreshold) { - scroll_state = SCROLL_SCROLLING; - } else if (hscroll_movement > rodent.scrollthreshold) { - scroll_state = SCROLL_SCROLLING; - } - } - if (scroll_state == SCROLL_SCROLLING) scroll_movement = hscroll_movement = 0; - } - } else if (scroll_state == SCROLL_SCROLLING) { - if (rodent.flags & VirtualScroll) { - scroll_movement += action2.dy; - debug("SCROLL: %d", scroll_movement); - if (scroll_movement < -rodent.scrollspeed) { - /* Scroll down */ - action2.dz = -1; - scroll_movement = 0; - } - else if (scroll_movement > rodent.scrollspeed) { - /* Scroll up */ - action2.dz = 1; - scroll_movement = 0; - } - } - if (rodent.flags & HVirtualScroll) { - hscroll_movement += action2.dx; - debug("HORIZONTAL SCROLL: %d", hscroll_movement); - - if (hscroll_movement < -rodent.scrollspeed) { - action2.dz = -2; - hscroll_movement = 0; - } - else if (hscroll_movement > rodent.scrollspeed) { - action2.dz = 2; - hscroll_movement = 0; - } - } - - /* Don't move while scrolling */ - action2.dx = action2.dy = 0; - } - } + debug("flags:%08x buttons:%08x obuttons:%08x", action.flags, + action.button, action.obutton); - if (drift_terminate) { - if ((flags & MOUSE_POSCHANGED) == 0 || action.dz || action2.dz) - drift_last_activity = drift_current_ts; - else { - /* X or/and Y movement only - possibly drift */ - tssub(&drift_current_ts, &drift_last_activity, &drift_tmp); - if (tscmp(&drift_tmp, &drift_after_ts, >)) { - tssub(&drift_current_ts, &drift_since, &drift_tmp); - if (tscmp(&drift_tmp, &drift_time_ts, <)) { - drift_last.x += action2.dx; - drift_last.y += action2.dy; - } else { - /* discard old accumulated steps (drift) */ - if (tscmp(&drift_tmp, &drift_2time_ts, >)) - drift_previous.x = drift_previous.y = 0; - else - drift_previous = drift_last; - drift_last.x = action2.dx; - drift_last.y = action2.dy; - drift_since = drift_current_ts; - } - if (abs(drift_last.x) + abs(drift_last.y) - > drift_distance) { - /* real movement, pass all accumulated steps */ - action2.dx = drift_previous.x + drift_last.x; - action2.dy = drift_previous.y + drift_last.y; - /* and reset accumulators */ - tsclr(&drift_since); - drift_last.x = drift_last.y = 0; - /* drift_previous will be cleared at next movement*/ - drift_last_activity = drift_current_ts; - } else { - continue; /* don't pass current movement to - * console driver */ - } - } - } - } - - if (extioctl) { - /* Defer clicks until we aren't VirtualScroll'ing. */ - if (scroll_state == SCROLL_NOTSCROLLING) - r_click(&action2); - - if (action2.flags & MOUSE_POSCHANGED) { - mouse.operation = MOUSE_MOTION_EVENT; - mouse.u.data.buttons = action2.button; - if (rodent.flags & ExponentialAcc) { - expoacc(action2.dx, action2.dy, - &mouse.u.data.x, &mouse.u.data.y); - } - else { - linacc(action2.dx, action2.dy, - &mouse.u.data.x, &mouse.u.data.y); - } - mouse.u.data.z = action2.dz; - if (debug < 2) - if (!paused) - ioctl(rodent.cfd, CONS_MOUSECTL, &mouse); - } - } else { - mouse.operation = MOUSE_ACTION; - mouse.u.data.buttons = action2.button; - if (rodent.flags & ExponentialAcc) { - expoacc(action2.dx, action2.dy, - &mouse.u.data.x, &mouse.u.data.y); - } - else { - linacc(action2.dx, action2.dy, - &mouse.u.data.x, &mouse.u.data.y); - } - mouse.u.data.z = action2.dz; - if (debug < 2) - if (!paused) - ioctl(rodent.cfd, CONS_MOUSECTL, &mouse); - } - - /* - * If the Z axis movement is mapped to an imaginary physical - * button, we need to cook up a corresponding button `up' event - * after sending a button `down' event. - */ - if ((rodent.zmap[0] > 0) && (action.dz != 0)) { - action.obutton = action.button; - action.dx = action.dy = action.dz = 0; - r_map(&action, &action2); - debug("activity : buttons 0x%08x dx %d dy %d dz %d", - action2.button, action2.dx, action2.dy, action2.dz); - - if (extioctl) { - r_click(&action2); - } else { - mouse.operation = MOUSE_ACTION; - mouse.u.data.buttons = action2.button; - mouse.u.data.x = mouse.u.data.y = mouse.u.data.z = 0; - if (debug < 2) - if (!paused) - ioctl(rodent.cfd, CONS_MOUSECTL, &mouse); - } + if (flags) { + if (r_uinput_report(rodent.ufd, &action) == -1) { + logwarn("failed to write to uinput"); + return; } } } @@ -1347,12 +748,10 @@ pause_mouse(__unused int sig) static void usage(void) { - fprintf(stderr, "%s\n%s\n%s\n%s\n%s\n", - "usage: moused [-DRcdfs] [-I file] [-F rate] [-r resolution] [-S baudrate]", - " [-VH [-U threshold]] [-a X[,Y]] [-C threshold] [-m N=M] [-w N]", - " [-z N] [-t <mousetype>] [-l level] [-3 [-E timeout]]", - " [-T distance[,time[,after]]] -p <port>", - " moused [-d] -i <port|if|type|model|all> -p <port>"); + fprintf(stderr, "%s\n%s\n%s\n", + "usage: msconvd [-DPRcdfs] [-I file] [-F rate] [-r resolution] [-S baudrate]", + " [-t <mousetype>] [-l level] -p <port>", + " msconvd [-Pd] -i <port|if|type|model|all> -p <port>"); exit(1); } @@ -1380,6 +779,98 @@ log_or_warn(int log_pri, int errnum, const char *fmt, ...) warnx("%s", buf); } +/* + * Setup uinput device as 8button mouse with wheel + */ +static int +r_uinput_register(void) +{ + struct uinput_setup uisetup; + char *phys; + int fd; + size_t i; + + fd = open("/dev/uinput", O_RDWR | O_NONBLOCK); + if (fd < 0) + return (-1); + + /* Set device name and bus/vendor information */ + memset(&uisetup, 0, sizeof(uisetup)); + snprintf(uisetup.name, UINPUT_MAX_NAME_SIZE, + "%s mouse on %s", r_model(rodent.hw.model), rodent.portname); + uisetup.id.bustype = r_bustype(rodent.hw.iftype); + uisetup.id.vendor = 0; + uisetup.id.product = 0; + uisetup.id.version = 0; + phys = basename(__DECONST(char *, rodent.portname)); + if (ioctl(fd, UI_SET_PHYS, phys) < 0 || + ioctl(fd, UI_DEV_SETUP, &uisetup) < 0) + goto bail_out; + + /* Advertise events and axes */ + if (ioctl(fd, UI_SET_EVBIT, EV_SYN) < 0 || + ioctl(fd, UI_SET_EVBIT, EV_KEY) < 0 || + ioctl(fd, UI_SET_EVBIT, EV_REL) < 0 || + ioctl(fd, UI_SET_RELBIT, REL_X) < 0 || + ioctl(fd, UI_SET_RELBIT, REL_Y) < 0 || + ioctl(fd, UI_SET_RELBIT, REL_WHEEL) < 0 || + ioctl(fd, UI_SET_PROPBIT, INPUT_PROP_POINTER) < 0) + goto bail_out; + + /* Advertise mouse buttons */ + for (i = 0; i < nitems(evdev_buttons); i++) + if (ioctl(fd, UI_SET_KEYBIT, evdev_buttons[i]) < 0) + goto bail_out; + + if (ioctl(fd, UI_DEV_CREATE) >= 0) + return (fd); /* SUCCESS */ + +bail_out: + close (fd); + return (-1); +} + +static int +uinput_event(int fd, uint16_t type, uint16_t code, int32_t value) +{ + struct input_event ie; + + if (debug >= 2 || paused) + return (0); + + memset(&ie, 0, sizeof(ie)); + ie.type = type; + ie.code = code; + ie.value = value; + return (write(fd, &ie, sizeof(ie))); +} + +static int +r_uinput_report(int fd, mousestatus_t *act) +{ + size_t i; + int32_t mask; + + if ((act->dx != 0 && uinput_event(fd, EV_REL, REL_X, act->dx) < 0) || + (act->dy != 0 && uinput_event(fd, EV_REL, REL_Y, act->dy) < 0) || + (act->dz != 0 && uinput_event(fd, EV_REL, REL_WHEEL, -act->dz) < 0)) + return (-1); + + for (i = 0; i < nitems(evdev_buttons); i++) { + mask = 1 << i; + if ((act->button & mask) == (act->obutton & mask)) + continue; + if (uinput_event(fd, EV_KEY, evdev_buttons[i], + (act->button & mask) != 0) < 0) + return (-1); + } + + if (uinput_event(fd, EV_SYN, SYN_REPORT, 0) < 0) + return (-1); + + return (0); +} + /** ** Mouse interface code, courtesy of XFree86 3.1.2. ** @@ -1559,6 +1050,12 @@ r_if(int iftype) return (gettokenname(rifs, iftype)); } +static uint16_t +r_bustype(int iftype) +{ + return (gettokenval2(rifs, iftype)); +} + static const char * r_name(int type) { @@ -1875,7 +1372,7 @@ r_protocol(u_char rBuf, mousestatus_t *act) static int pBufP = 0; static unsigned char pBuf[8]; static int prev_x, prev_y; - static int on = FALSE; + static bool on = false; int x, y; debug("received char 0x%x",(int)rBuf); @@ -2109,7 +1606,7 @@ r_protocol(u_char rBuf, mousestatus_t *act) act->button |= (pBuf[0] & MOUSE_VERSA_TAP) ? MOUSE_BUTTON4DOWN : 0; act->dx = act->dy = 0; if (!(pBuf[0] & MOUSE_VERSA_IN_USE)) { - on = FALSE; + on = false; break; } x = (pBuf[2] << 6) | pBuf[1]; @@ -2122,7 +1619,7 @@ r_protocol(u_char rBuf, mousestatus_t *act) act->dx = prev_x - x; act->dy = prev_y - y; } else { - on = TRUE; + on = true; } prev_x = x; prev_y = y; @@ -2245,7 +1742,7 @@ r_protocol(u_char rBuf, mousestatus_t *act) (pBuf[0] & MOUSE_PS2VERSA_TAP) ? MOUSE_BUTTON4DOWN : 0; act->dx = act->dy = 0; if (!(pBuf[0] & MOUSE_PS2VERSA_IN_USE)) { - on = FALSE; + on = false; break; } x = ((pBuf[4] << 8) & 0xf00) | pBuf[1]; @@ -2258,7 +1755,7 @@ r_protocol(u_char rBuf, mousestatus_t *act) act->dx = prev_x - x; act->dy = prev_y - y; } else { - on = TRUE; + on = true; } prev_x = x; prev_y = y; @@ -2324,301 +1821,6 @@ r_protocol(u_char rBuf, mousestatus_t *act) return (act->flags); } -static int -r_statetrans(mousestatus_t *a1, mousestatus_t *a2, int trans) -{ - int changed; - int flags; - - a2->dx = a1->dx; - a2->dy = a1->dy; - a2->dz = a1->dz; - a2->obutton = a2->button; - a2->button = a1->button; - a2->flags = a1->flags; - changed = FALSE; - - if (rodent.flags & Emulate3Button) { - if (debug > 2) - debug("state:%d, trans:%d -> state:%d", - mouse_button_state, trans, - states[mouse_button_state].s[trans]); - /* - * Avoid re-ordering button and movement events. While a button - * event is deferred, throw away up to BUTTON2_MAXMOVE movement - * events to allow for mouse jitter. If more movement events - * occur, then complete the deferred button events immediately. - */ - if ((a2->dx != 0 || a2->dy != 0) && - S_DELAYED(states[mouse_button_state].s[trans])) { - if (++mouse_move_delayed > BUTTON2_MAXMOVE) { - mouse_move_delayed = 0; - mouse_button_state = - states[mouse_button_state].s[A_TIMEOUT]; - changed = TRUE; - } else - a2->dx = a2->dy = 0; - } else - mouse_move_delayed = 0; - if (mouse_button_state != states[mouse_button_state].s[trans]) - changed = TRUE; - if (changed) - clock_gettime(CLOCK_MONOTONIC_FAST, &mouse_button_state_ts); - mouse_button_state = states[mouse_button_state].s[trans]; - a2->button &= - ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON2DOWN | MOUSE_BUTTON3DOWN); - a2->button &= states[mouse_button_state].mask; - a2->button |= states[mouse_button_state].buttons; - flags = a2->flags & MOUSE_POSCHANGED; - flags |= a2->obutton ^ a2->button; - if (flags & MOUSE_BUTTON2DOWN) { - a2->flags = flags & MOUSE_BUTTON2DOWN; - r_timestamp(a2); - } - a2->flags = flags; - } - return (changed); -} - -/* phisical to logical button mapping */ -static int p2l[MOUSE_MAXBUTTON] = { - MOUSE_BUTTON1DOWN, MOUSE_BUTTON2DOWN, MOUSE_BUTTON3DOWN, MOUSE_BUTTON4DOWN, - MOUSE_BUTTON5DOWN, MOUSE_BUTTON6DOWN, MOUSE_BUTTON7DOWN, MOUSE_BUTTON8DOWN, - 0x00000100, 0x00000200, 0x00000400, 0x00000800, - 0x00001000, 0x00002000, 0x00004000, 0x00008000, - 0x00010000, 0x00020000, 0x00040000, 0x00080000, - 0x00100000, 0x00200000, 0x00400000, 0x00800000, - 0x01000000, 0x02000000, 0x04000000, 0x08000000, - 0x10000000, 0x20000000, 0x40000000, -}; - -static char * -skipspace(char *s) -{ - while(isspace(*s)) - ++s; - return (s); -} - -static int -r_installmap(char *arg) -{ - int pbutton; - int lbutton; - char *s; - - while (*arg) { - arg = skipspace(arg); - s = arg; - while (isdigit(*arg)) - ++arg; - arg = skipspace(arg); - if ((arg <= s) || (*arg != '=')) - return (FALSE); - lbutton = atoi(s); - - arg = skipspace(++arg); - s = arg; - while (isdigit(*arg)) - ++arg; - if ((arg <= s) || (!isspace(*arg) && (*arg != '\0'))) - return (FALSE); - pbutton = atoi(s); - - if ((lbutton <= 0) || (lbutton > MOUSE_MAXBUTTON)) - return (FALSE); - if ((pbutton <= 0) || (pbutton > MOUSE_MAXBUTTON)) - return (FALSE); - p2l[pbutton - 1] = 1 << (lbutton - 1); - mstate[lbutton - 1] = &bstate[pbutton - 1]; - } - - return (TRUE); -} - -static void -r_map(mousestatus_t *act1, mousestatus_t *act2) -{ - register int pb; - register int pbuttons; - int lbuttons; - - pbuttons = act1->button; - lbuttons = 0; - - act2->obutton = act2->button; - if (pbuttons & rodent.wmode) { - pbuttons &= ~rodent.wmode; - act1->dz = act1->dy; - act1->dx = 0; - act1->dy = 0; - } - act2->dx = act1->dx; - act2->dy = act1->dy; - act2->dz = act1->dz; - - switch (rodent.zmap[0]) { - case 0: /* do nothing */ - break; - case MOUSE_XAXIS: - if (act1->dz != 0) { - act2->dx = act1->dz; - act2->dz = 0; - } - break; - case MOUSE_YAXIS: - if (act1->dz != 0) { - act2->dy = act1->dz; - act2->dz = 0; - } - break; - default: /* buttons */ - pbuttons &= ~(rodent.zmap[0] | rodent.zmap[1] - | rodent.zmap[2] | rodent.zmap[3]); - if ((act1->dz < -1) && rodent.zmap[2]) { - pbuttons |= rodent.zmap[2]; - zstate[2].count = 1; - } else if (act1->dz < 0) { - pbuttons |= rodent.zmap[0]; - zstate[0].count = 1; - } else if ((act1->dz > 1) && rodent.zmap[3]) { - pbuttons |= rodent.zmap[3]; - zstate[3].count = 1; - } else if (act1->dz > 0) { - pbuttons |= rodent.zmap[1]; - zstate[1].count = 1; - } - act2->dz = 0; - break; - } - - for (pb = 0; (pb < MOUSE_MAXBUTTON) && (pbuttons != 0); ++pb) { - lbuttons |= (pbuttons & 1) ? p2l[pb] : 0; - pbuttons >>= 1; - } - act2->button = lbuttons; - - act2->flags = ((act2->dx || act2->dy || act2->dz) ? MOUSE_POSCHANGED : 0) - | (act2->obutton ^ act2->button); -} - -static void -r_timestamp(mousestatus_t *act) -{ - struct timespec ts; - struct timespec ts1; - struct timespec ts2; - struct timespec ts3; - int button; - int mask; - int i; - - mask = act->flags & MOUSE_BUTTONS; -#if 0 - if (mask == 0) - return; -#endif - - clock_gettime(CLOCK_MONOTONIC_FAST, &ts1); - drift_current_ts = ts1; - - /* double click threshold */ - ts2.tv_sec = rodent.clickthreshold / 1000; - ts2.tv_nsec = (rodent.clickthreshold % 1000) * 1000000; - tssub(&ts1, &ts2, &ts); - debug("ts: %jd %ld", (intmax_t)ts.tv_sec, ts.tv_nsec); - - /* 3 button emulation timeout */ - ts2.tv_sec = rodent.button2timeout / 1000; - ts2.tv_nsec = (rodent.button2timeout % 1000) * 1000000; - tssub(&ts1, &ts2, &ts3); - - button = MOUSE_BUTTON1DOWN; - for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) { - if (mask & 1) { - if (act->button & button) { - /* the button is down */ - debug(" : %jd %ld", - (intmax_t)bstate[i].ts.tv_sec, bstate[i].ts.tv_nsec); - if (tscmp(&ts, &bstate[i].ts, >)) { - bstate[i].count = 1; - } else { - ++bstate[i].count; - } - bstate[i].ts = ts1; - } else { - /* the button is up */ - bstate[i].ts = ts1; - } - } else { - if (act->button & button) { - /* the button has been down */ - if (tscmp(&ts3, &bstate[i].ts, >)) { - bstate[i].count = 1; - bstate[i].ts = ts1; - act->flags |= button; - debug("button %d timeout", i + 1); - } - } else { - /* the button has been up */ - } - } - button <<= 1; - mask >>= 1; - } -} - -static int -r_timeout(void) -{ - struct timespec ts; - struct timespec ts1; - struct timespec ts2; - - if (states[mouse_button_state].timeout) - return (TRUE); - clock_gettime(CLOCK_MONOTONIC_FAST, &ts1); - ts2.tv_sec = rodent.button2timeout / 1000; - ts2.tv_nsec = (rodent.button2timeout % 1000) * 1000000; - tssub(&ts1, &ts2, &ts); - return (tscmp(&ts, &mouse_button_state_ts, >)); -} - -static void -r_click(mousestatus_t *act) -{ - struct mouse_info mouse; - int button; - int mask; - int i; - - mask = act->flags & MOUSE_BUTTONS; - if (mask == 0) - return; - - button = MOUSE_BUTTON1DOWN; - for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) { - if (mask & 1) { - debug("mstate[%d]->count:%d", i, mstate[i]->count); - if (act->button & button) { - /* the button is down */ - mouse.u.event.value = mstate[i]->count; - } else { - /* the button is up */ - mouse.u.event.value = 0; - } - mouse.operation = MOUSE_BUTTON_EVENT; - mouse.u.event.id = button; - if (debug < 2) - if (!paused) - ioctl(rodent.cfd, CONS_MOUSECTL, &mouse); - debug("button %d count %d", i + 1, mouse.u.event.value); - } - button <<= 1; - mask >>= 1; - } -} - /* $XConsortium: posix_tty.c,v 1.3 95/01/05 20:42:55 kaleb Exp $ */ /* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.4 1995/01/28 17:05:03 dawes Exp $ */ /* @@ -2745,7 +1947,7 @@ setmousespeed(int old, int new, unsigned cflag) * The routine does not fully implement the COM Enumerator as par Section * 2.1 of the document. In particular, we don't have idle state in which * the driver software monitors the com port for dynamic connection or - * removal of a device at the port, because `moused' simply quits if no + * removal of a device at the port, because `msconvd' simply quits if no * device is found. * * In addition, as PnP COM device enumeration procedure slightly has @@ -2753,7 +1955,7 @@ setmousespeed(int old, int new, unsigned cflag) * revisions of the above spec. may fail to respond if the rev 1.0 * procedure is used. XXX */ -static int +static bool pnpwakeup1(void) { struct timeval timeout; @@ -2783,7 +1985,7 @@ pnpwakeup1(void) ioctl(rodent.mfd, TIOCMGET, &i); debug("modem status 0%o", i); if ((i & TIOCM_DSR) == 0) - return (FALSE); + return (false); /* port setup, 1st phase (2.1.3) */ setmousespeed(1200, 1200, (CS7 | CREAD | CLOCAL | HUPCL)); @@ -2807,7 +2009,7 @@ pnpwakeup1(void) timeout.tv_usec = 240000; if (select(FD_SETSIZE, &fds, NULL, NULL, &timeout) > 0) { debug("pnpwakeup1(): valid response in first phase."); - return (TRUE); + return (true); } /* port setup, 2nd phase (2.1.5) */ @@ -2828,13 +2030,13 @@ pnpwakeup1(void) timeout.tv_usec = 240000; if (select(FD_SETSIZE, &fds, NULL, NULL, &timeout) > 0) { debug("pnpwakeup1(): valid response in second phase."); - return (TRUE); + return (true); } - return (FALSE); + return (false); } -static int +static bool pnpwakeup2(void) { struct timeval timeout; @@ -2867,10 +2069,10 @@ pnpwakeup2(void) timeout.tv_usec = 240000; if (select(FD_SETSIZE, &fds, NULL, NULL, &timeout) > 0) { debug("pnpwakeup2(): valid response."); - return (TRUE); + return (true); } - return (FALSE); + return (false); } static int @@ -2885,7 +2087,7 @@ pnpgets(char *buf) if (!pnpwakeup1() && !pnpwakeup2()) { /* * According to PnP spec, we should set DTR = 1 and RTS = 0 while - * in idle state. But, `moused' shall set DTR = RTS = 1 and proceed, + * in idle state. But, `msconvd' shall set DTR = RTS = 1 and proceed, * assuming there is something at the port even if it didn't * respond to the PnP enumeration procedure. */ @@ -2942,7 +2144,7 @@ pnpgets(char *buf) /* * According to PnP spec, we should set DTR = 1 and RTS = 0 while - * in idle state. But, `moused' shall leave the modem control lines + * in idle state. But, `msconvd' shall leave the modem control lines * as they are. See above. */ connect_idle: @@ -2951,7 +2153,7 @@ connect_idle: return (MAX(i, 0)); } -static int +static bool pnpparse(pnpid_t *id, char *buf, int len) { char s[3]; @@ -2975,7 +2177,7 @@ pnpparse(pnpid_t *id, char *buf, int len) /* non-PnP mice */ switch(buf[0]) { default: - return (FALSE); + return (false); case 'M': /* Microsoft */ id->eisaid = "PNP0F01"; break; @@ -2987,7 +2189,7 @@ pnpparse(pnpid_t *id, char *buf, int len) id->class = "MOUSE"; id->nclass = strlen(id->class); debug("non-PnP mouse '%c'", buf[0]); - return (TRUE); + return (true); } /* PnP mice */ @@ -3086,12 +2288,12 @@ pnpparse(pnpid_t *id, char *buf, int len) * spec regarding checksum... XXX */ logwarnx("PnP checksum error", 0); - return (FALSE); + return (false); #endif } } - return (TRUE); + return (true); } static symtab_t * @@ -3159,6 +2361,18 @@ gettokenname(symtab_t *tab, int val) return (unknown); } +static int +gettokenval2(symtab_t *tab, int val) +{ + int i; + + for (i = 0; tab[i].name != NULL; ++i) { + if (tab[i].val == val) + return (tab[i].val2); + } + return (0); +} + /* * code to read from the Genius Kidspad tablet. @@ -3355,7 +2569,7 @@ mremote_serversetup(void) } static void -mremote_clientchg(int add) +mremote_clientchg(bool add) { struct sockaddr_un ad; socklen_t ad_len; diff --git a/usr.sbin/ndp/ndp.c b/usr.sbin/ndp/ndp.c index 6e6f40c3ff64..cbca8ec20941 100644 --- a/usr.sbin/ndp/ndp.c +++ b/usr.sbin/ndp/ndp.c @@ -1059,6 +1059,9 @@ ifinfo(char *ifname, int argc, char **argv) #ifdef ND6_IFF_NO_PREFER_IFACE SETFLAG("no_prefer_iface", ND6_IFF_NO_PREFER_IFACE); #endif +#ifdef ND6_IFF_STABLEADDR + SETFLAG("stableaddr", ND6_IFF_STABLEADDR); +#endif SETVALUE("basereachable", ND.basereachable); SETVALUE("retrans", ND.retrans); SETVALUE("curhlim", ND.chlim); @@ -1144,6 +1147,10 @@ ifinfo(char *ifname, int argc, char **argv) if ((ND.flags & ND6_IFF_AUTO_LINKLOCAL)) xo_emit("{l:%s} ", "auto_linklocal"); #endif +#ifdef ND6_IFF_STABLEADDR + if ((ND.flags & ND6_IFF_STABLEADDR)) + xo_emit("{l:%s} ", "stableaddr"); +#endif #ifdef ND6_IFF_NO_PREFER_IFACE if ((ND.flags & ND6_IFF_NO_PREFER_IFACE)) xo_emit("{l:%s} ", "no_prefer_iface"); diff --git a/usr.sbin/newsyslog/newsyslog.8 b/usr.sbin/newsyslog/newsyslog.8 index 6d4fc378e790..aa89ef4b779a 100644 --- a/usr.sbin/newsyslog/newsyslog.8 +++ b/usr.sbin/newsyslog/newsyslog.8 @@ -14,7 +14,7 @@ .\" the suitability of this software for any purpose. It is .\" provided "as is" without express or implied warranty. .\" -.Dd December 22, 2023 +.Dd September 22, 2025 .Dt NEWSYSLOG 8 .Os .Sh NAME @@ -24,9 +24,9 @@ .Nm .Op Fl CFNPnrsv .Op Fl a Ar directory -.Op Fl c Ar none Ns | Ns Ar legacy Ns | Ns Ar bzip2 Ns | Ns Ar gzip Ns | Ns Ar xz Ns | Ns Ar zstd .Op Fl d Ar directory .Op Fl f Ar config_file +.Op Fl I Ar signal .Op Fl S Ar pidfile .Op Fl t Ar timefmt .Op Oo Fl R Ar tagname Oc Ar @@ -79,25 +79,6 @@ and mode three (above) assumes that this is so. The following options can be used with .Nm : .Bl -tag -width indent -.It Fl c Ar none Ns | Ns Ar legacy Ns | Ns Ar bzip2 Ns | Ns Ar gzip Ns | Ns Ar xz Ns | Ns Ar zstd -Instructs -.Nm -to use the specified compression method when a file is flagged for compression. -The default method is -.Dq legacy , -which interprets the -.Sy J, X, Y, Z -flags in the configuration file according to their historical meanings. -This default setting can be overridden by specifying -.Fl c Ar none , -which causes -.Nm -to ignore all compression flags. -Alternatively, specifying one of the compression methods: -.Sy bzip2 , gzip , xz , -or -.Sy zstd , -will apply the chosen method to all files flagged for compression. .It Fl f Ar config_file Instruct .Nm @@ -152,7 +133,7 @@ Remove the restriction that must be running as root. Of course, .Nm -will not be able to send a HUP signal to +will not be able to send a signal to .Xr syslogd 8 so this option should only be used in debugging. .It Fl s @@ -267,6 +248,10 @@ Skipping the signal step will also mean that will return faster, since .Nm normally waits a few seconds after any signal that is sent. +.It Fl I Ar signal +Specify signal to send for entries that do not have signal configured. +This option accepts either a signal number or a name as argument. +The default value is HUP. .It Fl S Ar pidfile Use .Ar pidfile diff --git a/usr.sbin/newsyslog/newsyslog.c b/usr.sbin/newsyslog/newsyslog.c index d07f302fd24f..084aeb36b052 100644 --- a/usr.sbin/newsyslog/newsyslog.c +++ b/usr.sbin/newsyslog/newsyslog.c @@ -241,6 +241,7 @@ static int norotate = 0; /* Don't rotate */ static int nosignal; /* Do not send any signals */ static int enforcepid = 0; /* If PID file does not exist or empty, do nothing */ static int force = 0; /* Force the trim no matter what */ +static int defsignal = SIGHUP; /* -I Signal to send by default */ static int rotatereq = 0; /* -R = Always rotate the file(s) as given */ /* on the command (this also requires */ /* that a list of files *are* given on */ @@ -309,7 +310,6 @@ static int age_old_log(const char *file); static void savelog(char *from, char *to); static void createdir(const struct conf_entry *ent, char *dirpart); static void createlog(const struct conf_entry *ent); -static int parse_signal(const char *str); /* * All the following take a parameter of 'int', but expect values in the @@ -456,7 +456,7 @@ init_entry(const char *fname, struct conf_entry *src_entry) tempwork->permissions = 0; tempwork->flags = 0; tempwork->compress = COMPRESS_NONE; - tempwork->sig = SIGHUP; + tempwork->sig = defsignal; tempwork->def_cfg = 0; } @@ -701,19 +701,12 @@ parse_args(int argc, char **argv) hostname_shortlen = strcspn(hostname, "."); /* Parse command line options. */ - while ((ch = getopt(argc, argv, "a:c:d:f:nrst:vCD:FNPR:S:")) != -1) + while ((ch = getopt(argc, argv, "a:d:f:nrst:vCD:FI:NPR:S:")) != -1) switch (ch) { case 'a': archtodir++; archdirname = optarg; break; - case 'c': - if (!parse_compression_type(optarg, &compress_type_override)) { - warnx("Unrecognized compression method '%s'.", optarg); - usage(); - } - compress_type_set = true; - break; case 'd': destdir = optarg; break; @@ -756,6 +749,10 @@ parse_args(int argc, char **argv) case 'F': force++; break; + case 'I': + if (str2sig(optarg, &defsignal) != 0) + usage(); + break; case 'N': norotate++; break; @@ -844,13 +841,6 @@ parse_doption(const char *doption) return (1); /* successfully parsed */ } - /* XXX - This check could probably be dropped. */ - if ((strcmp(doption, "neworder") == 0) || (strcmp(doption, "oldorder") - == 0)) { - warnx("NOTE: newsyslog always uses 'neworder'."); - return (1); /* successfully parsed */ - } - warnx("Unknown -D (debug) option: '%s'", doption); return (0); /* failure */ } @@ -858,26 +848,10 @@ parse_doption(const char *doption) static void usage(void) { - int i; - char *alltypes = NULL, *tmp = NULL; - - for (i = 0; i < COMPRESS_TYPES; i++) { - if (i == COMPRESS_NONE) { - (void)asprintf(&tmp, "%s|legacy", compress_type[i].name); - } else { - (void)asprintf(&tmp, "%s|%s", alltypes, compress_type[i].name); - } - if (alltypes) - free(alltypes); - alltypes = tmp; - tmp = NULL; - } fprintf(stderr, - "usage: newsyslog [-CFNPnrsv] [-a directory] [-c %s]\n" - " [-d directory] [-f config_file]\n" - " [-S pidfile] [-t timefmt] [[-R tagname] file ...]\n", - alltypes); + "usage: newsyslog [-CFNPnrsv] [-a directory] [-d directory] [-f config_file]\n" + " [-I signal] [-S pidfile] [-t timefmt] [[-R tagname] file ...]\n"); exit(1); } @@ -1512,11 +1486,10 @@ no_trimat: *parse = '\0'; } - working->sig = SIGHUP; + working->sig = defsignal; if (q && *q) { got_sig: - working->sig = parse_signal(q); - if (working->sig < 1 || working->sig >= sys_nsig) { + if (str2sig(q, &working->sig) != 0) { badline( "illegal signal in config file:\n%s", errline); @@ -2642,7 +2615,7 @@ age_old_log(const char *file) mtime = sb.st_mtime; } - return ((int)(ptimeget_secs(timenow) - mtime + 1800) / 3600); + return ((int)(ptimeget_secs(timenow) - mtime + 180) / 3600); } /* Skip Over Blanks */ @@ -2914,28 +2887,3 @@ change_attrs(const char *fname, const struct conf_entry *ent) warn("can't chflags %s NODUMP", fname); } } - -/* - * Parse a signal number or signal name. Returns the signal number parsed or -1 - * on failure. - */ -static int -parse_signal(const char *str) -{ - int sig, i; - const char *errstr; - - sig = strtonum(str, 1, sys_nsig - 1, &errstr); - - if (errstr == NULL) - return (sig); - if (strncasecmp(str, "SIG", 3) == 0) - str += 3; - - for (i = 1; i < sys_nsig; i++) { - if (strcasecmp(str, sys_signame[i]) == 0) - return (i); - } - - return (-1); -} diff --git a/usr.sbin/newsyslog/newsyslog.conf.5 b/usr.sbin/newsyslog/newsyslog.conf.5 index 2887ecb226aa..0a47af7285c6 100644 --- a/usr.sbin/newsyslog/newsyslog.conf.5 +++ b/usr.sbin/newsyslog/newsyslog.conf.5 @@ -18,7 +18,7 @@ .\" the suitability of this software for any purpose. It is .\" provided "as is" without express or implied warranty. .\" -.Dd November 11, 2024 +.Dd September 1, 2025 .Dt NEWSYSLOG.CONF 5 .Os .Sh NAME @@ -44,8 +44,7 @@ reads a configuration file, normally .Pa /etc/newsyslog.conf , to determine which logs may potentially be rotated and archived. -Each line has five mandatory fields and four optional fields, -separated with whitespace. +.Pp Blank lines or lines beginning with .Ql # are ignored. @@ -63,34 +62,73 @@ in this case preceding is removed and .Ql # is treated as an ordinary character. +.Pp +The special +.Dq Ar <compress> +and +.Dq Ar <include> +lines are defined as follows: +.Bl -tag -width indent +.It Ar <compress> Ar none Ns | Ns Ar legacy Ns | Ns Ar bzip2 Ns | Ns Ar gzip Ns | Ns Ar xz Ns | Ns Ar zstd +This special option sets the global compress method, +it should be placed before all log file entries in +.Nm +configuration file. +The global compress method applies to all log files flagged as +compressible +.Dq Sy J , +.Dq Sy X , +.Dq Sy Y , +.Dq Sy Z +.Ar flags +below. +.Pp +The following compression methods are available: +.Bl -tag -width indent +.It Cm none +No compression is performed, even when a log file is marked as +compressible. This is useful for filesystems that have native +compression support. +.It Cm legacy +Interprets the +.Sy J, X, Y, Z +flags in the configuration file according to their historical meanings. +This is the default method. +.It Cm bzip2 +Use +.Xr bzip2 1 +for all compressible log files. +.It Cm gzip +Use +.Xr gzip 1 +for all compressible log files. +.It Cm xz +Use +.Xr xz 1 +for all compressible log files. +.It Cm zstd +Use +.Xr zstd 1 +for all compressible log files. +.El +.It Ar <include> +The special <include> entry is used to include other configuration +files and supports globbing. +.El +.Pp +Each other line has five mandatory fields and four optional fields, +separated with whitespace. The fields of the configuration file are as follows: .Bl -tag -width indent .It Ar logfile_name Name of the system log file to be archived, -or one of the special strings -.Dq Li <compress> , -.Dq Li <default> , -or -.Dq Li <include> . -The <compress> entry, -which should be placed at the beginning of the -.Nm -configuration file, -sets the global compress method. -This method is applied when a log file is flagged as -compressible, -which has the same effect of passing a compress method to the -.Fl c -option on the -.Xr newsyslog 8 -command line. +or the special string +.Dq Ar <default> . The special <default> entry will only be used if a log file name is given as a command line argument to .Xr newsyslog 8 , and if that log file name is not matched by any other line in the configuration file. -The include entry is used to include other configuration -files and supports globbing. .It Ar owner : Ns Ar group This optional field specifies the owner and group for the archive file. The @@ -432,7 +470,7 @@ can be the signal number, e.g., 30 for .El .Sh EXAMPLES The following is an example of the -.Dq Aq Li include +.Dq <include> entry: .Dl "<include> /etc/newsyslog-local.conf" .Sh SEE ALSO diff --git a/usr.sbin/newsyslog/newsyslog.conf.d/Makefile b/usr.sbin/newsyslog/newsyslog.conf.d/Makefile index 8ef3af253a50..81bec81ece6e 100644 --- a/usr.sbin/newsyslog/newsyslog.conf.d/Makefile +++ b/usr.sbin/newsyslog/newsyslog.conf.d/Makefile @@ -6,13 +6,6 @@ CONFSDIR= /etc/newsyslog.conf.d CONFGROUPS= CONFS CONFS= -.if ${MK_FTP} != "no" -CONFGROUPS+= FTP -FTP+= ftp.conf -FTPPACKAGE= ftpd -FTPDIR= /etc/newsyslog.conf.d -.endif - .if ${MK_LPR} != "no" CONFGROUPS+= LP LP+= lpr.conf diff --git a/usr.sbin/newsyslog/tests/legacy_test.sh b/usr.sbin/newsyslog/tests/legacy_test.sh index 5aecdeacd10a..ea0b0c6fc726 100644 --- a/usr.sbin/newsyslog/tests/legacy_test.sh +++ b/usr.sbin/newsyslog/tests/legacy_test.sh @@ -206,7 +206,7 @@ tmpdir_clean() run_newsyslog() { - newsyslog -f ../newsyslog.conf -F -r "$@" + newsyslog -f ../newsyslog.conf -r "$@" } tests_normal_rotate() { @@ -216,17 +216,17 @@ tests_normal_rotate() { dir="$2" if [ -n "$dir" ]; then - newsyslog_args=" -a ${dir}" + newsyslog_args="-F -a ${dir}" name_postfix="${ext} archive dir" else - newsyslog_args="" + newsyslog_args="-F" name_postfix="${ext}" fi tmpdir_create begin "create file ${name_postfix}" -newdir - run_newsyslog -C + run_newsyslog -CF ckfe $LOGFNAME cknt ${dir}${LOGFNAME}.0${ext} end @@ -294,17 +294,17 @@ tests_normal_rotate_keepn() { dir="$3" if [ -n "$dir" ]; then - newsyslog_args=" -a ${dir}" + newsyslog_args="-F -a ${dir}" name_postfix="${ext} archive dir" else - newsyslog_args="" + newsyslog_args="-F" name_postfix="${ext}" fi tmpdir_create begin "create file ${name_postfix}" -newdir - run_newsyslog -C + run_newsyslog -CF ckfe $LOGFNAME cknt ${dir}${LOGFNAME}.0${ext} end @@ -363,10 +363,10 @@ tests_time_rotate() { dir="$2" if [ -n "$dir" ]; then - newsyslog_args="-t DEFAULT -a ${dir}" + newsyslog_args="-F -t DEFAULT -a ${dir}" name_postfix="${ext} archive dir" else - newsyslog_args="-t DEFAULT" + newsyslog_args="-F -t DEFAULT" name_postfix="${ext}" fi @@ -417,6 +417,51 @@ tests_time_rotate() { tmpdir_clean } +tests_interval_rotate() { + local hours ext h + + hours="$1" + ext="$2" + + tmpdir_create + + begin "create file" -newdir + run_newsyslog -C + ckfe ${LOGFNAME} + end + + # old file doesn't exist - forced rotation + begin "rotate interval 0" + run_newsyslog + ckfe ${LOGFNAME} + chkfcnt 1 ${dir}${LOGFNAME}.* + end + + # emulate newsyslog runs every 5 minutes + begin "rotate interval less than ${hours} hours" + m=0 + while [ $(expr ${m} / 60 ) -lt ${hours} ]; do + touch -t $(date -v -${m}M +%Y%m%d%H%M) ${LOGFNAME}.0 + run_newsyslog + ckfe ${LOGFNAME} + chkfcnt 1 ${dir}${LOGFNAME}.* + if [ $OK != 1 ]; then + break; + fi + m=$(expr ${m} + 5) + done + end + + begin "rotate interval ${hours} hours" + touch -t $(date -v -${hours}H +%Y%m%d%H%M) ${LOGFNAME}.0 + run_newsyslog + ckfe ${LOGFNAME} + chkfcnt 2 ${dir}${LOGFNAME}.* + end + + tmpdir_clean +} + tests_rfc5424() { local dir ext name_postfix newsyslog_args @@ -424,17 +469,17 @@ tests_rfc5424() { dir="$2" if [ -n "$dir" ]; then - newsyslog_args=" -a ${dir}" + newsyslog_args="-F -a ${dir}" name_postfix="${ext} archive dir" else - newsyslog_args="" + newsyslog_args="-F" name_postfix="${ext}" fi tmpdir_create begin "RFC-5424 - create file ${name_postfix}" -newdir - run_newsyslog -C + run_newsyslog -CF ckfe $LOGFNAME cknt ${dir}${LOGFNAME}.0${ext} ckfe $LOGFNAME5424 @@ -466,23 +511,23 @@ tests_p_flag_rotate() { tmpdir_create begin "create file" - run_newsyslog -C + run_newsyslog -CF ckfe $LOGFNAME cknt ${LOGFNAME}.0 cknt ${LOGFNAME}.0${ext} end begin "rotate p flag 1 ${ext}" - run_newsyslog + run_newsyslog -F ckfe $LOGFNAME ckfe ${LOGFNAME}.0 cknt ${LOGFNAME}.0${ext} - run_newsyslog + run_newsyslog -F ckfe $LOGFNAME ckfe ${LOGFNAME}.0 cknt ${LOGFNAME}.0${ext} ckfe ${LOGFNAME}.1${ext} - run_newsyslog + run_newsyslog -F ckfe $LOGFNAME ckfe ${LOGFNAME}.0 cknt ${LOGFNAME}.0${ext} @@ -501,13 +546,13 @@ tests_normal_rotate_recompress() { tmpdir_create begin "create file recompress" - run_newsyslog -C + run_newsyslog -CF ckfe $LOGFNAME cknt ${LOGFNAME}.0${ext} end begin "rotate normal 1" - run_newsyslog + run_newsyslog -F ckfe $LOGFNAME ckfe ${LOGFNAME}.0${ext} cknt ${LOGFNAME}.1${ext} @@ -517,14 +562,16 @@ tests_normal_rotate_recompress() { gunzip ${LOGFNAME}.0${ext} ckfe ${LOGFNAME}.0 cknt ${LOGFNAME}.0${ext} - run_newsyslog + run_newsyslog -F ckfe $LOGFNAME ckfe ${LOGFNAME}.0${ext} ckfe ${LOGFNAME}.1${ext} end + + tmpdir_clean } -echo 1..185 +echo 1..193 mkdir -p ${TMPDIR} cd ${TMPDIR} @@ -636,4 +683,10 @@ tests_p_flag_rotate ".gz" echo "$LOGFPATH 640 3 * @T00 NCZ" > newsyslog.conf tests_normal_rotate_recompress +# Interval based rotation +echo "$LOGFPATH 640 3 * 1 NC" > newsyslog.conf +tests_interval_rotate 1 +echo "$LOGFPATH 640 3 * 2 NC" > newsyslog.conf +tests_interval_rotate 2 + rm -rf "${TMPDIR}" diff --git a/usr.sbin/ngctl/Makefile b/usr.sbin/ngctl/Makefile index 72a5ccaa96d7..997841272376 100644 --- a/usr.sbin/ngctl/Makefile +++ b/usr.sbin/ngctl/Makefile @@ -13,4 +13,9 @@ LIBADD= netgraph CFLAGS+= -DEDITLINE LIBADD+= edit pthread +.if ${MK_JAIL} != "no" +CFLAGS+= -DJAIL +LIBADD+= jail +.endif + .include <bsd.prog.mk> diff --git a/usr.sbin/ngctl/main.c b/usr.sbin/ngctl/main.c index 7c79e67d8275..b86f1ca27e71 100644 --- a/usr.sbin/ngctl/main.c +++ b/usr.sbin/ngctl/main.c @@ -55,6 +55,10 @@ #include <histedit.h> #include <pthread.h> #endif +#ifdef JAIL +#include <sys/jail.h> +#include <jail.h> +#endif #include <netgraph.h> @@ -137,16 +141,19 @@ int csock, dsock; int main(int ac, char *av[]) { - char name[NG_NODESIZ]; - int interactive = isatty(0) && isatty(1); - FILE *fp = NULL; - int ch, rtn = 0; + char name[NG_NODESIZ]; + int interactive = isatty(0) && isatty(1); + FILE *fp = NULL; +#ifdef JAIL + const char *jail_name = NULL; +#endif + int ch, rtn = 0; /* Set default node name */ snprintf(name, sizeof(name), "ngctl%d", getpid()); /* Parse command line */ - while ((ch = getopt(ac, av, "df:n:")) != -1) { + while ((ch = getopt(ac, av, "df:j:n:")) != -1) { switch (ch) { case 'd': NgSetDebug(NgSetDebug(-1) + 1); @@ -157,6 +164,13 @@ main(int ac, char *av[]) else if ((fp = fopen(optarg, "r")) == NULL) err(EX_NOINPUT, "%s", optarg); break; + case 'j': +#ifdef JAIL + jail_name = optarg; +#else + errx(EX_UNAVAILABLE, "not built with jail support"); +#endif + break; case 'n': snprintf(name, sizeof(name), "%s", optarg); break; @@ -169,6 +183,24 @@ main(int ac, char *av[]) ac -= optind; av += optind; +#ifdef JAIL + if (jail_name != NULL) { + int jid; + + if (jail_name[0] == '\0') + Usage("invalid jail name"); + + jid = jail_getid(jail_name); + + if (jid == -1) + errx((errno == EPERM) ? EX_NOPERM : EX_NOHOST, + "%s", jail_errmsg); + if (jail_attach(jid) != 0) + errx((errno == EPERM) ? EX_NOPERM : EX_OSERR, + "cannot attach to jail"); + } +#endif + /* Create a new socket node */ if (NgMkSockNode(name, &csock, &dsock) < 0) err(EX_OSERR, "can't create node"); @@ -657,6 +689,7 @@ Usage(const char *msg) if (msg) warnx("%s", msg); fprintf(stderr, - "usage: ngctl [-d] [-f file] [-n name] [command ...]\n"); + "usage: ngctl [-j jail] [-d] [-f filename] [-n nodename] " + "[command [argument ...]]\n"); exit(EX_USAGE); } diff --git a/usr.sbin/ngctl/ngctl.8 b/usr.sbin/ngctl/ngctl.8 index 2225c836674a..63b8f58ed3df 100644 --- a/usr.sbin/ngctl/ngctl.8 +++ b/usr.sbin/ngctl/ngctl.8 @@ -31,7 +31,7 @@ .\" OF SUCH DAMAGE. .\" $Whistle: ngctl.8,v 1.6 1999/01/20 03:19:44 archie Exp $ .\" -.Dd January 19, 1999 +.Dd August 29, 2025 .Dt NGCTL 8 .Os .Sh NAME @@ -39,9 +39,11 @@ .Nd netgraph control utility .Sh SYNOPSIS .Nm +.Op Fl j Ar jail .Op Fl d .Op Fl f Ar filename .Op Fl n Ar nodename +.Op Ar command Op Ns Ar argument ... .Op Ar command ... .Sh DESCRIPTION The @@ -73,12 +75,31 @@ form if the originating node supports conversion. .Pp The options are as follows: .Bl -tag -width indent -.It Fl f Ar nodeinfo +.It Fl f Ar filename Read commands from the named file. A single dash represents the standard input. Blank lines and lines starting with a .Dq # are ignored. +Note that when the +.Fl j Ar jail +option is specified, the file will be opened before attaching to the jail and +then be processed inside the jail. +.It Fl j Ar jail +Perform the actions inside the +.Ar jail . +.Pp +.Nm +will first attach to the +.Ar jail +(by jail id or jail name) before performing the effects. +.Pp +This allows netgraph nodes of +.Ar jail +to be created, modified, and destroyed even if the +.Nm +binary is not available in +.Ar jail . .It Fl n Ar nodename Assign .Em nodename diff --git a/usr.sbin/ntp/ntpd/leap-seconds b/usr.sbin/ntp/ntpd/leap-seconds index da0efc8c8566..649a22c6278f 100644 --- a/usr.sbin/ntp/ntpd/leap-seconds +++ b/usr.sbin/ntp/ntpd/leap-seconds @@ -60,15 +60,15 @@ # # The following line shows the last update of this file in NTP timestamp: # -#$ 3929093563 +#$ 3960835200 # # 2) Expiration date of the file given on a semi-annual basis: last June or last December # -# File expires on 28 June 2025 +# File expires on 28 June 2026 # # Expire date in NTP timestamp: # -#@ 3960057600 +#@ 3991593600 # # # LIST OF LEAP SECONDS @@ -117,4 +117,4 @@ # please see the readme file in the 'source' directory : # https://hpiers.obspm.fr/iers/bul/bulc/ntp/sources/README # -#h be738595 57b0cf1b b0218343 fb77062f 5a775e7 +#h 49db2447 571e5e1b 2f002a53 9c8da8e4 39b8e49e diff --git a/usr.sbin/pkg/FreeBSD.conf.latest b/usr.sbin/pkg/FreeBSD.conf.latest index 91bf02c2610e..ac1636386942 100644 --- a/usr.sbin/pkg/FreeBSD.conf.latest +++ b/usr.sbin/pkg/FreeBSD.conf.latest @@ -3,8 +3,8 @@ # create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf -# echo "FreeBSD-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # FreeBSD-ports: { diff --git a/usr.sbin/pkg/FreeBSD.conf.quarterly b/usr.sbin/pkg/FreeBSD.conf.quarterly index 4ed590dd04f1..4e26582c6981 100644 --- a/usr.sbin/pkg/FreeBSD.conf.quarterly +++ b/usr.sbin/pkg/FreeBSD.conf.quarterly @@ -3,8 +3,8 @@ # create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf -# echo "FreeBSD-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # FreeBSD-ports: { diff --git a/usr.sbin/pkg/FreeBSD.conf.quarterly-release b/usr.sbin/pkg/FreeBSD.conf.quarterly-release index 0f8748b89fed..b4a78009f7d2 100644 --- a/usr.sbin/pkg/FreeBSD.conf.quarterly-release +++ b/usr.sbin/pkg/FreeBSD.conf.quarterly-release @@ -3,8 +3,8 @@ # create a /usr/local/etc/pkg/repos/FreeBSD.conf file, e.g.: # # mkdir -p /usr/local/etc/pkg/repos -# echo "FreeBSD: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf -# echo "FreeBSD-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports: { enabled: no }" > /usr/local/etc/pkg/repos/FreeBSD.conf +# echo "FreeBSD-ports-kmods: { enabled: no }" >> /usr/local/etc/pkg/repos/FreeBSD.conf # FreeBSD-ports: { diff --git a/usr.sbin/pkg/pkg.c b/usr.sbin/pkg/pkg.c index 7899fbaeaf09..7b0a67e69a4c 100644 --- a/usr.sbin/pkg/pkg.c +++ b/usr.sbin/pkg/pkg.c @@ -889,7 +889,7 @@ bootstrap_pkg(bool force, const char *fetchOpts, struct repository *repo) getenv("TMPDIR") ? getenv("TMPDIR") : _PATH_TMP, bootstrap_name); snprintf(url, MAXPATHLEN, "%s/Latest/%s.pubkeysig", - repo->url, bootstrap_name); + packagesite, bootstrap_name); if ((fd_sig = fetch_to_fd(repo, url, tmpsig, fetchOpts)) == -1) { fprintf(stderr, "Signature for pkg not " diff --git a/usr.sbin/pmc/Makefile b/usr.sbin/pmc/Makefile index 02292917ab57..d2f482b8fa5c 100644 --- a/usr.sbin/pmc/Makefile +++ b/usr.sbin/pmc/Makefile @@ -1,5 +1,6 @@ .include <src.opts.mk> +PACKAGE= pmc PROG_CXX= pmc MAN= CWARNFLAGS.gcc+= -Wno-redundant-decls diff --git a/usr.sbin/pmcannotate/Makefile b/usr.sbin/pmcannotate/Makefile index 8f408590a743..9c0eecbcafe3 100644 --- a/usr.sbin/pmcannotate/Makefile +++ b/usr.sbin/pmcannotate/Makefile @@ -1,6 +1,4 @@ -# -# - +PACKAGE=pmc PROG= pmcannotate MAN= pmcannotate.8 diff --git a/usr.sbin/pmccontrol/Makefile b/usr.sbin/pmccontrol/Makefile index de6224979a60..976ff05fb457 100644 --- a/usr.sbin/pmccontrol/Makefile +++ b/usr.sbin/pmccontrol/Makefile @@ -1,6 +1,4 @@ -# -# - +PACKAGE= pmc PROG_CXX= pmccontrol MAN= pmccontrol.8 diff --git a/usr.sbin/pmcstat/Makefile b/usr.sbin/pmcstat/Makefile index 7e0c671e38ac..d09b05a445ec 100644 --- a/usr.sbin/pmcstat/Makefile +++ b/usr.sbin/pmcstat/Makefile @@ -1,6 +1,4 @@ -# -# - +PACKAGE= pmc PROG_CXX= pmcstat MAN= pmcstat.8 diff --git a/usr.sbin/pmcstudy/Makefile b/usr.sbin/pmcstudy/Makefile index ca0efde8d61a..4e2355be3683 100644 --- a/usr.sbin/pmcstudy/Makefile +++ b/usr.sbin/pmcstudy/Makefile @@ -1,3 +1,4 @@ +PACKAGE=pmc PROG= pmcstudy MAN= pmcstudy.8 SRCS= pmcstudy.c eval_expr.c diff --git a/usr.sbin/powerd/Makefile b/usr.sbin/powerd/Makefile index 8a700b014e47..94378576774c 100644 --- a/usr.sbin/powerd/Makefile +++ b/usr.sbin/powerd/Makefile @@ -1,3 +1,4 @@ +PACKAGE=powerd PROG= powerd MAN= powerd.8 diff --git a/usr.sbin/pw/cpdir.c b/usr.sbin/pw/cpdir.c index 3dee8f7c43ac..979323d64342 100644 --- a/usr.sbin/pw/cpdir.c +++ b/usr.sbin/pw/cpdir.c @@ -36,53 +36,52 @@ #include "pw.h" void -copymkdir(int rootfd, char const * dir, int skelfd, mode_t mode, uid_t uid, +copymkdir(int rootfd, char const *dir, int skelfd, mode_t mode, uid_t uid, gid_t gid, int flags) { - char *p, lnk[MAXPATHLEN], copybuf[4096]; - int len, homefd, srcfd, destfd; + char *p, lnk[MAXPATHLEN]; + int len, srcfd, destfd; ssize_t sz; struct stat st; struct dirent *e; DIR *d; + mode_t pumask; if (*dir == '/') dir++; + pumask = umask(0); + umask(pumask); + if (mkdirat(rootfd, dir, mode) != 0) { - mode_t pumask; if (errno != EEXIST) { warn("mkdir(%s)", dir); return; } - pumask = umask(0); - umask(pumask); - if (fchmodat(rootfd, dir, mode & ~pumask, AT_SYMLINK_NOFOLLOW) == -1) warn("chmod(%s)", dir); } - if (fchownat(rootfd, dir, uid, gid, AT_SYMLINK_NOFOLLOW) == -1) warn("chown(%s)", dir); - if (flags > 0 && chflagsat(rootfd, dir, flags, AT_SYMLINK_NOFOLLOW) == -1) warn("chflags(%s)", dir); + metalog_emit(dir, (mode | S_IFDIR) & ~pumask, uid, gid, flags); if (skelfd == -1) return; - homefd = openat(rootfd, dir, O_DIRECTORY); if ((d = fdopendir(skelfd)) == NULL) { close(skelfd); - close(homefd); return; } while ((e = readdir(d)) != NULL) { + char path[MAXPATHLEN]; + if (strcmp(e->d_name, ".") == 0 || strcmp(e->d_name, "..") == 0) continue; @@ -92,19 +91,32 @@ copymkdir(int rootfd, char const * dir, int skelfd, mode_t mode, uid_t uid, if (strncmp(p, "dot.", 4) == 0) /* Conversion */ p += 3; + (void)snprintf(path, sizeof(path), "%s/%s", dir, p); if (S_ISDIR(st.st_mode)) { - copymkdir(homefd, p, openat(skelfd, e->d_name, O_DIRECTORY), - st.st_mode & _DEF_DIRMODE, uid, gid, st.st_flags); + int fd; + + fd = openat(skelfd, e->d_name, O_DIRECTORY); + if (fd == -1) { + warn("openat(%s)", e->d_name); + continue; + } + copymkdir(rootfd, path, fd, st.st_mode & _DEF_DIRMODE, + uid, gid, st.st_flags); continue; } if (S_ISLNK(st.st_mode) && - (len = readlinkat(skelfd, e->d_name, lnk, sizeof(lnk) -1)) + (len = readlinkat(skelfd, e->d_name, lnk, sizeof(lnk) - 1)) != -1) { lnk[len] = '\0'; - symlinkat(lnk, homefd, p); - fchownat(homefd, p, uid, gid, AT_SYMLINK_NOFOLLOW); + if (symlinkat(lnk, rootfd, path) != 0) + warn("symlink(%s)", path); + else if (fchownat(rootfd, path, uid, gid, + AT_SYMLINK_NOFOLLOW) != 0) + warn("chown(%s)", path); + metalog_emit_symlink(path, lnk, st.st_mode & ~pumask, + uid, gid); continue; } @@ -113,22 +125,29 @@ copymkdir(int rootfd, char const * dir, int skelfd, mode_t mode, uid_t uid, if ((srcfd = openat(skelfd, e->d_name, O_RDONLY)) == -1) continue; - destfd = openat(homefd, p, O_RDWR | O_CREAT | O_EXCL, + destfd = openat(rootfd, path, O_RDWR | O_CREAT | O_EXCL, st.st_mode); if (destfd == -1) { close(srcfd); continue; } - while ((sz = read(srcfd, copybuf, sizeof(copybuf))) > 0) - write(destfd, copybuf, sz); + do { + sz = copy_file_range(srcfd, NULL, destfd, NULL, + SSIZE_MAX, 0); + } while (sz > 0); + if (sz < 0) + warn("copy_file_range"); close(srcfd); /* * Propagate special filesystem flags */ - fchown(destfd, uid, gid); - fchflags(destfd, st.st_flags); + if (fchown(destfd, uid, gid) != 0) + warn("chown(%s)", p); + if (fchflags(destfd, st.st_flags) != 0) + warn("chflags(%s)", p); + metalog_emit(path, st.st_mode & ~pumask, uid, gid, st.st_flags); close(destfd); } closedir(d); diff --git a/usr.sbin/pw/pw.8 b/usr.sbin/pw/pw.8 index 5eae810b6732..f6d9ebca6308 100644 --- a/usr.sbin/pw/pw.8 +++ b/usr.sbin/pw/pw.8 @@ -30,6 +30,7 @@ .Nd create, remove, modify & display system users and groups .Sh SYNOPSIS .Nm +.Op Fl M Ar metalog .Op Fl R Ar rootdir .Op Fl V Ar etcdir .Cm useradd @@ -464,6 +465,21 @@ option, bearing the name of the new account. This can be overridden by the .Fl d option on the command line, if desired. +.It Fl M Ar metalog +Specify a path to a +.Xr mtree 5 +metalog file. +.Nm +will add entries for all files added to a user's home directory. +This is useful when building images as a non-root user, as the +metalog can be used as input to +.Xr tar 1 +or +.Xr makefs 8 . +Note that this option must precede the +.Ql useradd +string on the command line, otherwise it will be interpreted as the mode +option. .It Fl M Ar mode Create the user's home directory with the specified .Ar mode , diff --git a/usr.sbin/pw/pw.c b/usr.sbin/pw/pw.c index a4c95258f3bb..7cb5dd160e12 100644 --- a/usr.sbin/pw/pw.c +++ b/usr.sbin/pw/pw.c @@ -132,7 +132,11 @@ main(int argc, char *argv[]) while (argc > 1) { if (*argv[1] == '-') { /* - * Special case, allow pw -V<dir> <operation> [args] for scripts etc. + * Special case, allow pw -V<dir> <operation> [args] for + * scripts etc. + * + * The -M option before the keyword is handled + * differently from -M after a keyword. */ arg = argv[1][1]; if (arg == 'V' || arg == 'R') { @@ -143,12 +147,13 @@ main(int argc, char *argv[]) optarg = &argv[1][2]; if (*optarg == '\0') { if (stat(argv[2], &st) != 0) - errx(EX_OSFILE, \ + errx(EX_OSFILE, "no such directory `%s'", argv[2]); if (!S_ISDIR(st.st_mode)) - errx(EX_OSFILE, "`%s' not a " - "directory", argv[2]); + errx(EX_OSFILE, + "`%s' not a directory", + argv[2]); optarg = argv[2]; ++argv; --argc; @@ -163,10 +168,26 @@ main(int argc, char *argv[]) "%s%s", optarg, arg == 'R' ? _PATH_PWD : ""); conf.altroot = true; + } else if (mode == -1 && which == -1 && arg == 'M') { + int fd; + + optarg = &argv[1][2]; + if (*optarg == '\0') { + optarg = argv[2]; + ++argv; + --argc; + } + fd = open(optarg, + O_WRONLY | O_APPEND | O_CREAT | O_CLOEXEC, + 0644); + if (fd == -1) + errx(EX_OSERR, + "Cannot open metalog `%s'", + optarg); + conf.metalog = fdopen(fd, "ae"); } else break; - } - else if (mode == -1 && (tmp = getindex(Modes, argv[1])) != -1) + } else if (mode == -1 && (tmp = getindex(Modes, argv[1])) != -1) mode = tmp; else if (which == -1 && (tmp = getindex(Which, argv[1])) != -1) which = tmp; @@ -178,7 +199,7 @@ main(int argc, char *argv[]) } else if (strcmp(argv[1], "help") == 0 && argv[2] == NULL) cmdhelp(mode, which); else if (which != -1 && mode != -1) - arg1 = argv[1]; + arg1 = argv[1]; else errx(EX_USAGE, "unknown keyword `%s'", argv[1]); ++argv; @@ -195,6 +216,10 @@ main(int argc, char *argv[]) if (conf.rootfd == -1) errx(EXIT_FAILURE, "Unable to open '%s'", conf.rootdir); + if (conf.metalog != NULL && (which != W_USER || mode != M_ADD)) + errx(EXIT_FAILURE, + "metalog can only be specified with 'useradd'"); + return (cmdfunc[which][mode](argc, argv, arg1)); } @@ -233,10 +258,11 @@ cmdhelp(int mode, int which) static const char *help[W_NUM][M_NUM] = { { - "usage: pw useradd [name] [switches]\n" + "usage: pw [-M metalog] useradd [name] [switches]\n" "\t-V etcdir alternate /etc location\n" "\t-R rootdir alternate root directory\n" "\t-C config configuration file\n" + "\t-M metalog mtree file, must precede 'useradd'\n" "\t-q quiet operation\n" " Adding users:\n" "\t-n name login name\n" @@ -257,8 +283,6 @@ cmdhelp(int mode, int which) "\t-Y update NIS maps\n" "\t-N no update\n" " Setting defaults:\n" - "\t-V etcdir alternate /etc location\n" - "\t-R rootdir alternate root directory\n" "\t-D set user defaults\n" "\t-b dir default home root dir\n" "\t-e period default expiry period\n" diff --git a/usr.sbin/pw/pw.h b/usr.sbin/pw/pw.h index c3725693f91d..ceb843d79503 100644 --- a/usr.sbin/pw/pw.h +++ b/usr.sbin/pw/pw.h @@ -70,6 +70,11 @@ struct userconf *get_userconfig(const char *cfg); struct userconf *read_userconfig(char const * file); int write_userconfig(struct userconf *cnf, char const * file); +void metalog_emit(const char *path, mode_t mode, uid_t uid, gid_t gid, + int flags); +void metalog_emit_symlink(const char *path, const char *target, mode_t mode, + uid_t uid, gid_t gid); + int pw_group_add(int argc, char **argv, char *name); int pw_group_del(int argc, char **argv, char *name); int pw_group_mod(int argc, char **argv, char *name); diff --git a/usr.sbin/pw/pw_user.c b/usr.sbin/pw/pw_user.c index 8a9a4342f5ef..413eac4882cc 100644 --- a/usr.sbin/pw/pw_user.c +++ b/usr.sbin/pw/pw_user.c @@ -86,10 +86,13 @@ mkdir_home_parents(int dfd, const char *dir) { struct stat st; char *dirs, *tmp; + mode_t pumask; + + pumask = umask(0); + umask(pumask); if (*dir != '/') errx(EX_DATAERR, "invalid base directory for home '%s'", dir); - dir++; if (fstatat(dfd, dir, &st, 0) != -1) { @@ -115,7 +118,14 @@ mkdir_home_parents(int dfd, const char *dir) *tmp = '\0'; if (fstatat(dfd, dirs, &st, 0) == -1) { if (mkdirat(dfd, dirs, _DEF_DIRMODE) == -1) - err(EX_OSFILE, "'%s' (home parent) is not a directory", dirs); + err(EX_OSFILE, + "'%s' (home parent) is not a directory", + dirs); + if (fchownat(dfd, dirs, 0, 0, 0) != 0) + warn("chown(%s)", dirs); + metalog_emit(dir, + (_DEF_DIRMODE | S_IFDIR) & ~pumask, 0, 0, + 0); } *tmp = '/'; } @@ -123,7 +133,9 @@ mkdir_home_parents(int dfd, const char *dir) if (fstatat(dfd, dirs, &st, 0) == -1) { if (mkdirat(dfd, dirs, _DEF_DIRMODE) == -1) err(EX_OSFILE, "'%s' (home parent) is not a directory", dirs); - fchownat(dfd, dirs, 0, 0, 0); + if (fchownat(dfd, dirs, 0, 0, 0) != 0) + warn("chown(%s)", dirs); + metalog_emit(dirs, (_DEF_DIRMODE | S_IFDIR) & ~pumask, 0, 0, 0); } free(dirs); diff --git a/usr.sbin/pw/pw_utils.c b/usr.sbin/pw/pw_utils.c index 9be1656bcfe1..87dd421ca8a3 100644 --- a/usr.sbin/pw/pw_utils.c +++ b/usr.sbin/pw/pw_utils.c @@ -92,3 +92,49 @@ nis_update(void) { errx(i, "make exited with status %d", i); return (i); } + +static void +metalog_emit_record(const char *path, const char *target, mode_t mode, + uid_t uid, gid_t gid, int flags) +{ + const char *flagstr, *type; + int error; + + if (conf.metalog == NULL) + return; + + if (target != NULL) + type = "link"; + else if (S_ISDIR(mode)) + type = "dir"; + else if (S_ISREG(mode)) + type = "file"; + else + errx(1, "metalog_emit: unhandled file type for %s", path); + + flagstr = fflagstostr(flags & + (UF_IMMUTABLE | UF_APPEND | SF_IMMUTABLE | SF_APPEND)); + if (flagstr == NULL) + errx(1, "metalog_emit: fflagstostr failed"); + + error = fprintf(conf.metalog, + "./%s type=%s mode=0%03o uid=%u gid=%u%s%s%s%s\n", + path, type, mode & ACCESSPERMS, uid, gid, + target != NULL ? " link=" : "", target != NULL ? target : "", + *flagstr != '\0' ? " flags=" : "", *flagstr != '\0' ? flagstr : ""); + if (error < 0) + errx(1, "metalog_emit: write error"); +} + +void +metalog_emit(const char *path, mode_t mode, uid_t uid, gid_t gid, int flags) +{ + metalog_emit_record(path, NULL, mode, uid, gid, flags); +} + +void +metalog_emit_symlink(const char *path, const char *target, mode_t mode, + uid_t uid, gid_t gid) +{ + metalog_emit_record(path, target, mode, uid, gid, 0); +} diff --git a/usr.sbin/pw/pwupd.h b/usr.sbin/pw/pwupd.h index a39a022ca309..605c51dcec2a 100644 --- a/usr.sbin/pw/pwupd.h +++ b/usr.sbin/pw/pwupd.h @@ -76,6 +76,7 @@ struct userconf { struct pwconf { char rootdir[MAXPATHLEN]; char etcpath[MAXPATHLEN]; + FILE *metalog; int fd; int rootfd; bool altroot; diff --git a/usr.sbin/pw/tests/pw_useradd_test.sh b/usr.sbin/pw/tests/pw_useradd_test.sh index 6413c063d482..75e96a64ba8e 100755 --- a/usr.sbin/pw/tests/pw_useradd_test.sh +++ b/usr.sbin/pw/tests/pw_useradd_test.sh @@ -1,4 +1,3 @@ - # Import helper functions . $(atf_get_srcdir)/helper_functions.shin @@ -357,15 +356,28 @@ user_add_skel_body() { echo "c" > ${HOME}/skel/c/d/dot.c mkdir ${HOME}/home ln -sf /nonexistent ${HOME}/skel/c/foo - atf_check -s exit:0 ${RPW} useradd foo -k /skel -m + atf_check -s exit:0 ${RPW} -M METALOG useradd foo -k /skel -m test -d ${HOME}/home/foo || atf_fail "Directory not created" test -f ${HOME}/home/foo/.a || atf_fail "File not created" atf_check -o file:${HOME}/skel/.a -s exit:0 cat ${HOME}/home/foo/.a atf_check -o file:${HOME}/skel/b -s exit:0 cat ${HOME}/home/foo/b - test -d ${HOME}/home/foo/c || atf_fail "Dotted directory in skel not copied" - test -d ${HOME}/home/foo/.plop || atf_fail "Directory in skell not created" + test -d ${HOME}/home/foo/c || atf_fail "Directory in skel not copied" + test -d ${HOME}/home/foo/.plop || atf_fail "Dotted directory in skel not created" atf_check -o inline:"/nonexistent\n" -s ignore readlink -f ${HOME}/home/foo/c/foo atf_check -o file:${HOME}/skel/c/d/dot.c -s exit:0 cat ${HOME}/home/foo/c/d/.c + + cat <<__EOF__ >METALOG.expected +./home/foo type=dir mode=0755 uid=1001 gid=1001 +./home/foo/.a type=file mode=0644 uid=1001 gid=1001 +./home/foo/.plop type=dir mode=0755 uid=1001 gid=1001 +./home/foo/b type=file mode=0644 uid=1001 gid=1001 +./home/foo/c type=dir mode=0755 uid=1001 gid=1001 +./home/foo/c/d type=dir mode=0755 uid=1001 gid=1001 +./home/foo/c/d/.c type=file mode=0644 uid=1001 gid=1001 +./home/foo/c/foo type=link mode=0755 uid=1001 gid=1001 link=/nonexistent +__EOF__ + atf_check -o save:METALOG.out sort METALOG + atf_check diff METALOG.out METALOG.expected } atf_test_case user_add_uid0 diff --git a/usr.sbin/syslogd/Makefile b/usr.sbin/syslogd/Makefile index 7b202c69f7f9..45df62a4a6ec 100644 --- a/usr.sbin/syslogd/Makefile +++ b/usr.sbin/syslogd/Makefile @@ -29,12 +29,6 @@ CFLAGS+= -DINET6 SYSLOGD_D= SYSLOGD_DDIR= /etc/syslog.d -.if ${MK_FTP} != "no" -CONFGROUPS+= FTP -FTP+= ftp.conf -FTPDIR= /etc/syslog.d -FTPPACKAGE= ftpd -.endif .if ${MK_LPR} != "no" CONFGROUPS+= LP diff --git a/usr.sbin/syslogd/syslogd.c b/usr.sbin/syslogd/syslogd.c index 81bbbbe66be8..e06464c0e749 100644 --- a/usr.sbin/syslogd/syslogd.c +++ b/usr.sbin/syslogd/syslogd.c @@ -1185,13 +1185,15 @@ parsemsg_rfc3164_app_name_procid(char **msg, const char **app_name, /* Split strings from input. */ app_name_begin[app_name_length] = '\0'; - m += app_name_length + 1; + m += app_name_length; if (procid_begin != NULL) { procid_begin[procid_length] = '\0'; + /* Skip "[PID]". */ m += procid_length + 2; } - *msg = m + 1; + /* Skip separator ": ". */ + *msg = m + 2; *app_name = app_name_begin; *procid = procid_begin; return; diff --git a/usr.sbin/tcpdump/Makefile.inc b/usr.sbin/tcpdump/Makefile.inc index abbdc366c6a0..454f1869508d 100644 --- a/usr.sbin/tcpdump/Makefile.inc +++ b/usr.sbin/tcpdump/Makefile.inc @@ -1,3 +1,3 @@ -BINDIR?= /usr/sbin - WARNS?= 3 + +.include "../Makefile.inc" diff --git a/usr.sbin/tcpdump/tcpdump/Makefile b/usr.sbin/tcpdump/tcpdump/Makefile index bfbe750c25be..21c5f9ac7fdf 100644 --- a/usr.sbin/tcpdump/tcpdump/Makefile +++ b/usr.sbin/tcpdump/tcpdump/Makefile @@ -186,9 +186,9 @@ SRCS= addrtoname.c \ print-unsupported.c \ print-vsock.c \ print-whois.c \ - print-zep.c \ - version.c -CLEANFILES+= version.c ${MAN} + print-zep.c + +CLEANFILES+= ${MAN} CFLAGS+= -I${.CURDIR} -I${TCPDUMP_DISTDIR} CFLAGS+= -DHAVE_CONFIG_H @@ -197,9 +197,6 @@ CFLAGS+= -D_U_="__attribute__((unused))" .if ${MK_INET6_SUPPORT} != "no" CFLAGS+= -DINET6 -DHAVE_OS_IPV6_SUPPORT .endif -.if ${MACHINE_CPUARCH} != "i386" -CFLAGS+= -DLBL_ALIGN -.endif LIBADD= pcap .if ${MK_CASPER} != "no" @@ -220,11 +217,6 @@ SRCS+= print-pflog.c \ CFLAGS+= -DHAVE_NET_PFVAR_H -DHAVE_NET_IF_PFLOG_H .endif -version.c: ${TCPDUMP_DISTDIR}/VERSION - rm -f version.c ; \ - sed 's/.*/char version[] = "&";/' ${TCPDUMP_DISTDIR}/VERSION \ - > version.c - .include <bsd.prog.mk> .for mp in ${MAN} diff --git a/usr.sbin/vidcontrol/vidcontrol.1 b/usr.sbin/vidcontrol/vidcontrol.1 index 09855df6b60f..91804facce8e 100644 --- a/usr.sbin/vidcontrol/vidcontrol.1 +++ b/usr.sbin/vidcontrol/vidcontrol.1 @@ -282,11 +282,17 @@ Show the current changes. .El .It Fl d Print out current output screen map. +Supported only with +.Xr syscons 4 . .It Fl E Ar emulator Set the terminal emulator to .Ar emulator . +Supported only with +.Xr syscons 4 . .It Fl e Show the active and available terminal emulators. +Supported only with +.Xr syscons 4 . .It Xo .Fl f .Oo @@ -358,13 +364,12 @@ Shows the possible video modes with the current video hardware. .It Fl l Ar screen_map Install screen output map file from .Ar screen_map . -See also -.Xr syscons 4 -or -.Xr vt 4 -(depending on which driver you use). +Supported only with +.Xr syscons 4 . .It Fl L Install default screen output map. +Supported only with +.Xr syscons 4 . .It Fl M Ar char Sets the base character used to render the mouse pointer to .Ar char . diff --git a/usr.sbin/virtual_oss/Makefile b/usr.sbin/virtual_oss/Makefile new file mode 100644 index 000000000000..bf73041377b3 --- /dev/null +++ b/usr.sbin/virtual_oss/Makefile @@ -0,0 +1,8 @@ +.include <src.opts.mk> + +SUBDIR+= virtual_bt_speaker \ + virtual_oss_cmd \ + virtual_oss + +.include "Makefile.inc" +.include <bsd.subdir.mk> diff --git a/usr.sbin/virtual_oss/Makefile.inc b/usr.sbin/virtual_oss/Makefile.inc new file mode 100644 index 000000000000..01b5f23410c8 --- /dev/null +++ b/usr.sbin/virtual_oss/Makefile.inc @@ -0,0 +1 @@ +.include "../Makefile.inc" diff --git a/usr.sbin/virtual_oss/virtual_bt_speaker/Makefile b/usr.sbin/virtual_oss/virtual_bt_speaker/Makefile new file mode 100644 index 000000000000..0f5fb2b4eb99 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_bt_speaker/Makefile @@ -0,0 +1,11 @@ +PROG= virtual_bt_speaker +MAN= ${PROG}.8 + +SRCS= bt_speaker.c + +CFLAGS+= -I${SRCTOP}/usr.sbin/virtual_oss/virtual_oss \ + -I${SRCTOP}/lib/virtual_oss/bt + +LDFLAGS+= -lm -lbluetooth -lsdp + +.include <bsd.prog.mk> diff --git a/usr.sbin/virtual_oss/virtual_bt_speaker/bt_speaker.c b/usr.sbin/virtual_oss/virtual_bt_speaker/bt_speaker.c new file mode 100644 index 000000000000..c61eaf1c338d --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_bt_speaker/bt_speaker.c @@ -0,0 +1,542 @@ +/*- + * Copyright (c) 2019 Google LLC, written by Richard Kralovic <riso@google.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <sys/rtprio.h> +#include <sys/soundcard.h> + +#include <dlfcn.h> +#include <err.h> +#include <fcntl.h> +#include <stdarg.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sysexits.h> +#include <time.h> +#include <unistd.h> +#include <poll.h> +#include <getopt.h> + +#define L2CAP_SOCKET_CHECKED +#include <bluetooth.h> +#include <sdp.h> + +#include "avdtp_signal.h" +#include "bt.h" +#include "utils.h" + +static int (*bt_receive_f)(struct bt_config *, void *, int, int); +static int (*avdtpACPHandlePacket_f)(struct bt_config *cfg); +static void (*avdtpACPFree_f)(struct bt_config *); + +static int bt_in_background; + +static void +message(const char *fmt,...) +{ + va_list list; + + if (bt_in_background) + return; + + va_start(list, fmt); + vfprintf(stderr, fmt, list); + va_end(list); +} + +struct bt_audio_receiver { + const char *devname; + const char *sdp_socket_path; + uint16_t l2cap_psm; + int fd_listen; + void *sdp_session; + uint32_t sdp_handle; +}; + +static int +register_sdp(struct bt_audio_receiver *r) +{ + struct sdp_audio_sink_profile record = {}; + + r->sdp_session = sdp_open_local(r->sdp_socket_path); + if (r->sdp_session == NULL || sdp_error(r->sdp_session)) { + sdp_close(r->sdp_session); + r->sdp_session = NULL; + return (0); + } + + record.psm = r->l2cap_psm; + record.protover = 0x100; + record.features = 0x01; /* player only */ + + if (sdp_register_service(r->sdp_session, SDP_SERVICE_CLASS_AUDIO_SINK, + NG_HCI_BDADDR_ANY, (const uint8_t *)&record, sizeof(record), + &r->sdp_handle)) { + message("SDP failed to register: %s\n", + strerror(sdp_error(r->sdp_session))); + sdp_close(r->sdp_session); + r->sdp_session = NULL; + return (0); + } + return (1); +} + +static void +unregister_sdp(struct bt_audio_receiver *r) +{ + sdp_unregister_service(r->sdp_session, r->sdp_handle); + sdp_close(r->sdp_session); + r->sdp_session = NULL; +} + +static int +start_listen(struct bt_audio_receiver *r) +{ + struct sockaddr_l2cap addr = {}; + + r->fd_listen = socket(PF_BLUETOOTH, SOCK_SEQPACKET, BLUETOOTH_PROTO_L2CAP); + if (r->fd_listen < 0) + return (0); + + addr.l2cap_len = sizeof(addr); + addr.l2cap_family = AF_BLUETOOTH; + addr.l2cap_psm = r->l2cap_psm; + + if (bind(r->fd_listen, (struct sockaddr *)&addr, sizeof(addr)) < 0 || + listen(r->fd_listen, 4) < 0) { + close(r->fd_listen); + return (0); + } + return (1); +} + +static void +stop_listen(struct bt_audio_receiver *r) +{ + close(r->fd_listen); +} + +struct bt_audio_connection { + struct bt_audio_receiver *r; + struct sockaddr_l2cap peer_addr; + struct bt_config cfg; + int oss_fd; +}; + +static void +close_connection(struct bt_audio_connection *c) +{ + avdtpACPFree_f(&c->cfg); + if (c->cfg.fd != -1) + close(c->cfg.fd); + if (c->cfg.hc != -1) + close(c->cfg.hc); + if (c->oss_fd != -1) + close(c->oss_fd); + free(c); +} + +static struct bt_audio_connection * +wait_for_connection(struct bt_audio_receiver *r) +{ + struct bt_audio_connection *c = + malloc(sizeof(struct bt_audio_connection)); + socklen_t addrlen; + + memset(c, 0, sizeof(*c)); + + c->r = r; + c->cfg.fd = -1; + c->oss_fd = -1; + + addrlen = sizeof(c->peer_addr); + c->cfg.hc = accept(r->fd_listen, (struct sockaddr *)&c->peer_addr, &addrlen); + + message("Accepted control connection, %d\n", c->cfg.hc); + if (c->cfg.hc < 0) { + close_connection(c); + return NULL; + } + c->cfg.sep = 0; /* to be set later */ + c->cfg.media_Type = mediaTypeAudio; + c->cfg.chmode = MODE_DUAL; + c->cfg.aacMode1 = 0; /* TODO: support AAC */ + c->cfg.aacMode2 = 0; + c->cfg.acceptor_state = acpInitial; + + return (c); +} + +static void +setup_oss(struct bt_audio_connection *c) +{ + c->oss_fd = open(c->r->devname, O_WRONLY); + + if (c->oss_fd < 0) + goto err; + + int v; + + switch (c->cfg.chmode) { + case MODE_STEREO: + case MODE_JOINT: + case MODE_DUAL: + v = 2; + break; + case MODE_MONO: + v = 1; + break; + default: + message("Wrong chmode\n"); + goto err; + } + + if (ioctl(c->oss_fd, SNDCTL_DSP_CHANNELS, &v) < 0) { + message("SNDCTL_DSP_CHANNELS failed\n"); + goto err; + } + v = AFMT_S16_NE; + if (ioctl(c->oss_fd, SNDCTL_DSP_SETFMT, &v) < 0) { + message("SNDCTL_DSP_SETFMT failed\n"); + goto err; + } + switch (c->cfg.freq) { + case FREQ_16K: + v = 16000; + break; + case FREQ_32K: + v = 32000; + break; + case FREQ_44_1K: + v = 44100; + break; + case FREQ_48K: + v = 48000; + break; + default: + message("Wrong freq\n"); + goto err; + } + + if (ioctl(c->oss_fd, SNDCTL_DSP_SPEED, &v) < 0) { + message("SNDCTL_DSP_SETFMT failed\n"); + goto err; + } + v = (2 << 16) | 15; /* 2 fragments of 32k each */ + if (ioctl(c->oss_fd, SNDCTL_DSP_SETFRAGMENT, &v) < 0) { + message("SNDCTL_DSP_SETFRAGMENT failed\n"); + goto err; + } + return; + +err: + c->oss_fd = -1; + message("Cannot open oss device %s\n", c->r->devname); +} + +static void +process_connection(struct bt_audio_connection *c) +{ + struct pollfd pfd[3] = {}; + time_t oss_attempt = 0; + + while (c->cfg.acceptor_state != acpStreamClosed) { + int np; + + pfd[0].fd = c->r->fd_listen; + pfd[0].events = POLLIN | POLLRDNORM; + pfd[0].revents = 0; + + pfd[1].fd = c->cfg.hc; + pfd[1].events = POLLIN | POLLRDNORM; + pfd[1].revents = 0; + + pfd[2].fd = c->cfg.fd; + pfd[2].events = POLLIN | POLLRDNORM; + pfd[2].revents = 0; + + if (c->cfg.fd != -1) + np = 3; + else + np = 2; + + if (poll(pfd, np, INFTIM) < 0) + return; + + if (pfd[1].revents != 0) { + int retval; + + message("Handling packet: state = %d, ", + c->cfg.acceptor_state); + retval = avdtpACPHandlePacket_f(&c->cfg); + message("retval = %d\n", retval); + if (retval < 0) + return; + } + if (pfd[0].revents != 0) { + socklen_t addrlen = sizeof(c->peer_addr); + int fd = accept4(c->r->fd_listen, + (struct sockaddr *)&c->peer_addr, &addrlen, + SOCK_NONBLOCK); + + if (fd < 0) + return; + + if (c->cfg.fd < 0) { + if (c->cfg.acceptor_state == acpStreamOpened) { + socklen_t mtusize = sizeof(uint16_t); + c->cfg.fd = fd; + + if (getsockopt(c->cfg.fd, SOL_L2CAP, SO_L2CAP_IMTU, &c->cfg.mtu, &mtusize) == -1) { + message("Could not get MTU size\n"); + return; + } + + int temp = c->cfg.mtu * 32; + + if (setsockopt(c->cfg.fd, SOL_SOCKET, SO_RCVBUF, &temp, sizeof(temp)) == -1) { + message("Could not set send buffer size\n"); + return; + } + + temp = 1; + if (setsockopt(c->cfg.fd, SOL_SOCKET, SO_RCVLOWAT, &temp, sizeof(temp)) == -1) { + message("Could not set low water mark\n"); + return; + } + message("Accepted data connection, %d\n", c->cfg.fd); + } + } else { + close(fd); + } + } + if (pfd[2].revents != 0) { + uint8_t data[65536]; + int len; + + if ((len = bt_receive_f(&c->cfg, data, sizeof(data), 0)) < 0) { + return; + } + if (c->cfg.acceptor_state != acpStreamSuspended && + c->oss_fd < 0 && + time(NULL) != oss_attempt) { + message("Trying to open dsp\n"); + setup_oss(c); + oss_attempt = time(NULL); + } + if (c->oss_fd > -1) { + uint8_t *end = data + len; + uint8_t *ptr = data; + unsigned delay; + unsigned jitter_limit; + + switch (c->cfg.freq) { + case FREQ_16K: + jitter_limit = (16000 / 20); + break; + case FREQ_32K: + jitter_limit = (32000 / 20); + break; + case FREQ_44_1K: + jitter_limit = (44100 / 20); + break; + default: + jitter_limit = (48000 / 20); + break; + } + + if (c->cfg.chmode == MODE_MONO) { + if (len >= 2 && + ioctl(c->oss_fd, SNDCTL_DSP_GETODELAY, &delay) == 0 && + delay < (jitter_limit * 2)) { + uint8_t jitter[jitter_limit * 4] __aligned(4); + size_t x; + + /* repeat last sample */ + for (x = 0; x != sizeof(jitter); x++) + jitter[x] = ptr[x % 2]; + + write(c->oss_fd, jitter, sizeof(jitter)); + } + } else { + if (len >= 4 && + ioctl(c->oss_fd, SNDCTL_DSP_GETODELAY, &delay) == 0 && + delay < (jitter_limit * 4)) { + uint8_t jitter[jitter_limit * 8] __aligned(4); + size_t x; + + /* repeat last sample */ + for (x = 0; x != sizeof(jitter); x++) + jitter[x] = ptr[x % 4]; + + write(c->oss_fd, jitter, sizeof(jitter)); + } + } + while (ptr != end) { + int written = write(c->oss_fd, ptr, end - ptr); + + if (written < 0) { + if (errno != EINTR && errno != EAGAIN) + break; + written = 0; + } + ptr += written; + } + if (ptr != end) { + message("Not all written, closing dsp\n"); + close(c->oss_fd); + c->oss_fd = -1; + oss_attempt = time(NULL); + } + } + } + + if (c->cfg.acceptor_state == acpStreamSuspended && + c->oss_fd > -1) { + close(c->oss_fd); + c->oss_fd = -1; + } + } +} + +static struct option bt_speaker_opts[] = { + {"device", required_argument, NULL, 'd'}, + {"sdp_socket_path", required_argument, NULL, 'p'}, + {"rtprio", required_argument, NULL, 'i'}, + {"background", no_argument, NULL, 'B'}, + {"help", no_argument, NULL, 'h'}, + {NULL, 0, NULL, 0} +}; + +static void +usage(void) +{ + fprintf(stderr, "Usage: virtual_bt_speaker -d /dev/dsp\n" + "\t" "-d, --device [device]\n" + "\t" "-p, --sdp_socket_path [path]\n" + "\t" "-i, --rtprio [priority]\n" + "\t" "-B, --background\n" + ); + exit(EX_USAGE); +} + +int +main(int argc, char **argv) +{ + struct bt_audio_receiver r = {}; + struct rtprio rtp = {}; + void *hdl; + int ch; + + r.devname = NULL; + r.sdp_socket_path = NULL; + r.l2cap_psm = SDP_UUID_PROTOCOL_AVDTP; + + while ((ch = getopt_long(argc, argv, "p:i:d:Bh", bt_speaker_opts, NULL)) != -1) { + switch (ch) { + case 'd': + r.devname = optarg; + break; + case 'p': + r.sdp_socket_path = optarg; + break; + case 'B': + bt_in_background = 1; + break; + case 'i': + rtp.type = RTP_PRIO_REALTIME; + rtp.prio = atoi(optarg); + if (rtprio(RTP_SET, getpid(), &rtp) != 0) { + message("Cannot set realtime priority\n"); + } + break; + default: + usage(); + break; + } + } + + if (r.devname == NULL) + errx(EX_USAGE, "No devicename specified"); + + if (bt_in_background) { + if (daemon(0, 0) != 0) + errx(EX_SOFTWARE, "Cannot become daemon"); + } + + if ((hdl = dlopen("/usr/lib/virtual_oss/voss_bt.so", RTLD_NOW)) == NULL) + errx(1, "%s", dlerror()); + if ((bt_receive_f = dlsym(hdl, "bt_receive")) == NULL) + goto err_dlsym; + if ((avdtpACPHandlePacket_f = dlsym(hdl, "avdtpACPHandlePacket")) == + NULL) + goto err_dlsym; + if ((avdtpACPFree_f = dlsym(hdl, "avdtpACPFree")) == NULL) + goto err_dlsym; + + while (1) { + message("Starting to listen\n"); + if (!start_listen(&r)) { + message("Failed to initialize server socket\n"); + goto err_listen; + } + message("Registering service via SDP\n"); + if (!register_sdp(&r)) { + message("Failed to register in SDP\n"); + goto err_sdp; + } + while (1) { + message("Waiting for connection...\n"); + struct bt_audio_connection *c = wait_for_connection(&r); + + if (c == NULL) { + message("Failed to get connection\n"); + goto err_conn; + } + message("Got connection...\n"); + + process_connection(c); + + message("Connection finished...\n"); + + close_connection(c); + } +err_conn: + message("Unregistering service\n"); + unregister_sdp(&r); +err_sdp: + stop_listen(&r); +err_listen: + sleep(5); + } + return (0); + +err_dlsym: + warnx("%s", dlerror()); + dlclose(hdl); + exit(EXIT_FAILURE); +} diff --git a/usr.sbin/virtual_oss/virtual_bt_speaker/virtual_bt_speaker.8 b/usr.sbin/virtual_oss/virtual_bt_speaker/virtual_bt_speaker.8 new file mode 100644 index 000000000000..2c6c6ea18bbc --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_bt_speaker/virtual_bt_speaker.8 @@ -0,0 +1,71 @@ +.\" +.\" Copyright (c) 2019 Google LLC, written by Richard Kralovic <riso@google.com> +.\" +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd February 12, 2025 +.Dt VIRTUAL_BT_SPEAKER 8 +.Os +.Sh NAME +.Nm virtual_bt_speaker +.Nd virtual bluetooth speaker +.Sh SYNOPSIS +.Nm +.Op Fl h +.Sh DESCRIPTION +.Nm +provides bluetooth speaker functionality. +It receives connections from bluetooth devices that stream music, and +forwards the received stream to the given OSS device. +This utility depends on +.Xr sdpd 8 +running in the background. +.Pp +The following options are available: +.Bl -tag -width indent +.It Fl B +Run program in background. +.It Fl d Ar devname +OSS device to play the received streams. +.It Fl p Ar socketpath +Path to SDP control socket. +Default is to use default location. +.It Fl i Ar priority +Set real-time priority. +.It Fl h +Show usage. +.El +.Sh EXAMPLES +.Bd -literal -offset indent +virtual_bt_speaker -d /dev/dspX +.Ed +.Sh SEE ALSO +.Xr sdpd 8 +and +.Xr virtual_oss 8 +.Sh AUTHORS +.Nm +was written by +.An Richard Kralovic riso@google.com . diff --git a/usr.sbin/virtual_oss/virtual_equalizer/Makefile b/usr.sbin/virtual_oss/virtual_equalizer/Makefile new file mode 100644 index 000000000000..e67150eff000 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_equalizer/Makefile @@ -0,0 +1,11 @@ +PROG= virtual_equalizer +MAN= ${PROG}.8 + +SRCS= equalizer.c + +CFLAGS+= -I${SRCTOP}/usr.sbin/virtual_oss/virtual_oss \ + -I/usr/local/include + +LDFLAGS+= -L/usr/local/lib -lm -lfftw3 + +.include <bsd.prog.mk> diff --git a/usr.sbin/virtual_oss/virtual_equalizer/equalizer.c b/usr.sbin/virtual_oss/virtual_equalizer/equalizer.c new file mode 100644 index 000000000000..d1682186084d --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_equalizer/equalizer.c @@ -0,0 +1,431 @@ +/*- + * Copyright (c) 2019 Google LLC, written by Richard Kralovic <riso@google.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/ioctl.h> +#include <sys/socket.h> +#include <sys/soundcard.h> +#include <sys/types.h> +#include <sys/un.h> + +#include <err.h> +#include <errno.h> +#include <fcntl.h> +#include <fftw3.h> +#include <getopt.h> +#include <math.h> +#include <stdarg.h> +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <sysexits.h> +#include <unistd.h> + +#include "virtual_oss.h" + +struct Equalizer { + double rate; + int block_size; + int do_normalize; + + /* (block_size * 2) elements, time domain */ + double *fftw_time; + + /* (block_size * 2) elements, half-complex, freq domain */ + double *fftw_freq; + + fftw_plan forward; + fftw_plan inverse; +}; + +static int be_silent = 0; + +static void +message(const char *fmt,...) +{ + va_list list; + + if (be_silent) + return; + va_start(list, fmt); + vfprintf(stderr, fmt, list); + va_end(list); +} + +/* + * Masking window value for -1 < x < 1. + * + * Window must be symmetric, thus, this function is queried for x >= 0 + * only. Currently a Hann window. + */ +static double +equalizer_get_window(double x) +{ + return (0.5 + 0.5 * cos(M_PI * x)); +} + +static int +equalizer_load_freq_amps(struct Equalizer *e, const char *config) +{ + double prev_f = 0.0; + double prev_amp = 1.0; + double next_f = 0.0; + double next_amp = 1.0; + int i; + + if (strncasecmp(config, "normalize", 4) == 0) { + while (*config != 0) { + if (*config == '\n') { + config++; + break; + } + config++; + } + e->do_normalize = 1; + } else { + e->do_normalize = 0; + } + + for (i = 0; i <= (e->block_size / 2); ++i) { + const double f = (i * e->rate) / e->block_size; + + while (f >= next_f) { + prev_f = next_f; + prev_amp = next_amp; + + if (*config == 0) { + next_f = e->rate; + next_amp = prev_amp; + } else { + int len; + + if (sscanf(config, "%lf %lf %n", &next_f, &next_amp, &len) == 2) { + config += len; + if (next_f < prev_f) { + message("Parse error: Nonincreasing sequence of frequencies.\n"); + return (0); + } + } else { + message("Parse error.\n"); + return (0); + } + } + if (prev_f == 0.0) + prev_amp = next_amp; + } + e->fftw_freq[i] = ((f - prev_f) / (next_f - prev_f)) * (next_amp - prev_amp) + prev_amp; + } + return (1); +} + +static void +equalizer_init(struct Equalizer *e, int rate, int block_size) +{ + size_t buffer_size; + + e->rate = rate; + e->block_size = block_size; + + buffer_size = sizeof(double) * e->block_size; + + e->fftw_time = (double *)malloc(buffer_size); + e->fftw_freq = (double *)malloc(buffer_size); + + e->forward = fftw_plan_r2r_1d(block_size, e->fftw_time, e->fftw_freq, + FFTW_R2HC, FFTW_MEASURE); + e->inverse = fftw_plan_r2r_1d(block_size, e->fftw_freq, e->fftw_time, + FFTW_HC2R, FFTW_MEASURE); +} + +static int +equalizer_load(struct Equalizer *eq, const char *config) +{ + int retval = 0; + int N = eq->block_size; + int buffer_size = sizeof(double) * N; + int i; + + memset(eq->fftw_freq, 0, buffer_size); + + message("\n\nReloading amplification specifications:\n%s\n", config); + + if (!equalizer_load_freq_amps(eq, config)) + goto end; + + double *requested_freq = (double *)malloc(buffer_size); + + memcpy(requested_freq, eq->fftw_freq, buffer_size); + + fftw_execute(eq->inverse); + + /* Multiply by symmetric window and shift */ + for (i = 0; i < (N / 2); ++i) { + double weight = equalizer_get_window(i / (double)(N / 2)) / N; + + eq->fftw_time[N / 2 + i] = eq->fftw_time[i] * weight; + } + for (i = (N / 2 - 1); i > 0; --i) { + eq->fftw_time[i] = eq->fftw_time[N - i]; + } + eq->fftw_time[0] = 0; + + fftw_execute(eq->forward); + for (i = 0; i < N; ++i) { + eq->fftw_freq[i] /= (double)N; + } + + /* Debug output */ + for (i = 0; i <= (N / 2); ++i) { + double f = (eq->rate / N) * i; + double a = sqrt(pow(eq->fftw_freq[i], 2.0) + + ((i > 0 && i < N / 2) ? pow(eq->fftw_freq[N - i], 2.0) : 0)); + + a *= N; + double r = requested_freq[i]; + + message("%3.1lf Hz: requested %2.2lf, got %2.7lf (log10 = %.2lf), %3.7lfdb\n", + f, r, a, log(a) / log(10), (log(a / r) / log(10.0)) * 10.0); + } + + /* Normalize FIR filter, if any */ + if (eq->do_normalize) { + double sum = 0; + + for (i = 0; i < N; ++i) + sum += fabs(eq->fftw_time[i]); + if (sum != 0.0) { + for (i = 0; i < N; ++i) + eq->fftw_time[i] /= sum; + } + } + for (i = 0; i < N; ++i) { + message("%.3lf ms: %.10lf\n", 1000.0 * i / eq->rate, eq->fftw_time[i]); + } + + /* End of debug */ + + retval = 1; + + free(requested_freq); +end: + return (retval); +} + +static void +equalizer_done(struct Equalizer *eq) +{ + + fftw_destroy_plan(eq->forward); + fftw_destroy_plan(eq->inverse); + free(eq->fftw_time); + free(eq->fftw_freq); +} + +static struct option equalizer_opts[] = { + {"device", required_argument, NULL, 'd'}, + {"part", required_argument, NULL, 'p'}, + {"channels", required_argument, NULL, 'c'}, + {"what", required_argument, NULL, 'w'}, + {"off", no_argument, NULL, 'o'}, + {"quiet", no_argument, NULL, 'q'}, + {"file", no_argument, NULL, 'f'}, + {"help", no_argument, NULL, 'h'}, +}; + +static void +usage(void) +{ + message("Usage: virtual_equalizer -d /dev/vdsp.ctl \n" + "\t -d, --device [control device]\n" + "\t -w, --what [rx_dev,tx_dev,rx_loop,tx_loop, default tx_dev]\n" + "\t -p, --part [part number, default 0]\n" + "\t -c, --channels [channels, default -1]\n" + "\t -f, --file [read input from file, default standard input]\n" + "\t -o, --off [disable equalizer]\n" + "\t -q, --quiet\n" + "\t -h, --help\n"); + exit(EX_USAGE); +} + +int +main(int argc, char **argv) +{ + struct virtual_oss_fir_filter fir = {}; + struct virtual_oss_io_info info = {}; + + struct Equalizer e; + + char buffer[65536]; + unsigned cmd_fir_set = VIRTUAL_OSS_SET_TX_DEV_FIR_FILTER; + unsigned cmd_fir_get = VIRTUAL_OSS_GET_TX_DEV_FIR_FILTER; + unsigned cmd_info = VIRTUAL_OSS_GET_DEV_INFO; + const char *dsp = NULL; + int rate; + int channels = -1; + int part = 0; + int opt; + int len; + int offset; + int disable = 0; + int f = STDIN_FILENO; + + while ((opt = getopt_long(argc, argv, "d:c:f:op:w:qh", + equalizer_opts, NULL)) != -1) { + switch (opt) { + case 'd': + dsp = optarg; + break; + case 'c': + channels = atoi(optarg); + if (channels == 0) { + message("Wrong number of channels\n"); + usage(); + } + break; + case 'p': + part = atoi(optarg); + if (part < 0) { + message("Invalid part number\n"); + usage(); + } + break; + case 'w': + if (strcmp(optarg, "rx_dev") == 0) { + cmd_fir_set = VIRTUAL_OSS_SET_RX_DEV_FIR_FILTER; + cmd_fir_get = VIRTUAL_OSS_GET_RX_DEV_FIR_FILTER; + cmd_info = VIRTUAL_OSS_GET_DEV_INFO; + } else if (strcmp(optarg, "tx_dev") == 0) { + cmd_fir_set = VIRTUAL_OSS_SET_TX_DEV_FIR_FILTER; + cmd_fir_get = VIRTUAL_OSS_GET_TX_DEV_FIR_FILTER; + cmd_info = VIRTUAL_OSS_GET_DEV_INFO; + } else if (strcmp(optarg, "rx_loop") == 0) { + cmd_fir_set = VIRTUAL_OSS_SET_RX_LOOP_FIR_FILTER; + cmd_fir_get = VIRTUAL_OSS_GET_RX_LOOP_FIR_FILTER; + cmd_info = VIRTUAL_OSS_GET_LOOP_INFO; + } else if (strcmp(optarg, "tx_loop") == 0) { + cmd_fir_set = VIRTUAL_OSS_SET_TX_LOOP_FIR_FILTER; + cmd_fir_get = VIRTUAL_OSS_GET_TX_LOOP_FIR_FILTER; + cmd_info = VIRTUAL_OSS_GET_LOOP_INFO; + } else { + message("Bad -w argument not recognized\n"); + usage(); + } + break; + case 'f': + if (f != STDIN_FILENO) { + message("Can only specify one file\n"); + usage(); + } + f = open(optarg, O_RDONLY); + if (f < 0) { + message("Cannot open specified file\n"); + usage(); + } + break; + case 'o': + disable = 1; + break; + case 'q': + be_silent = 1; + break; + default: + usage(); + } + } + + fir.number = part; + info.number = part; + + int fd = open(dsp, O_RDWR); + + if (fd < 0) { + message("Cannot open DSP device\n"); + return (EX_SOFTWARE); + } + if (ioctl(fd, VIRTUAL_OSS_GET_SAMPLE_RATE, &rate) < 0) { + message("Cannot get sample rate\n"); + return (EX_SOFTWARE); + } + if (ioctl(fd, cmd_fir_get, &fir) < 0) { + message("Cannot get current FIR filter\n"); + return (EX_SOFTWARE); + } + if (disable) { + for (fir.channel = 0; fir.channel != channels; fir.channel++) { + if (ioctl(fd, cmd_fir_set, &fir) < 0) { + if (fir.channel == 0) { + message("Cannot disable FIR filter\n"); + return (EX_SOFTWARE); + } + break; + } + } + return (0); + } + equalizer_init(&e, rate, fir.filter_size); + equalizer_load(&e, ""); + + if (f == STDIN_FILENO) { + if (ioctl(fd, cmd_info, &info) < 0) { + message("Cannot read part information\n"); + return (EX_SOFTWARE); + } + message("Please enter EQ layout for %s, <freq> <gain>:\n", info.name); + } + offset = 0; + while (1) { + if (offset == (int)(sizeof(buffer) - 1)) { + message("Too much input data\n"); + return (EX_SOFTWARE); + } + len = read(f, buffer + offset, sizeof(buffer) - 1 - offset); + if (len <= 0) + break; + offset += len; + } + buffer[offset] = 0; + close(f); + + if (f == STDIN_FILENO) + message("Loading new EQ layout\n"); + + if (equalizer_load(&e, buffer) == 0) { + message("Invalid equalizer data\n"); + return (EX_SOFTWARE); + } + fir.filter_data = e.fftw_time; + + for (fir.channel = 0; fir.channel != channels; fir.channel++) { + if (ioctl(fd, cmd_fir_set, &fir) < 0) { + if (fir.channel == 0) + message("Cannot set FIR filter on channel\n"); + break; + } + } + + close(fd); + equalizer_done(&e); + + return (0); +} diff --git a/usr.sbin/virtual_oss/virtual_equalizer/virtual_equalizer.8 b/usr.sbin/virtual_oss/virtual_equalizer/virtual_equalizer.8 new file mode 100644 index 000000000000..db47db84305e --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_equalizer/virtual_equalizer.8 @@ -0,0 +1,127 @@ +.\" +.\" Copyright (c) 2019 Google LLC, written by Richard Kralovic <riso@google.com> +.\" +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd February 12, 2025 +.Dt VIRTUAL_EQUALIZER 8 +.Os +.Sh NAME +.Nm virtual_equalizer +.Nd audio equalizer +.Sh SYNOPSIS +.Nm +.Op Fl h +.Op Fl o +.Op Fl q +.Op Fl d Ar devname +.Op Fl w Ar what +.Op Fl p Ar part +.Op Fl c Ar channels +.Op Fl f Ar file +.Sh DESCRIPTION +.Nm +sets the given frequency response for the given +.Xr virtual_oss 8 +instance via the control character device given by the -d option. +The design goal of this equalizer is to provide precise equalization +for arbitrary requested frequency response at the expense of higher +latency, utilizing a so-called finite impulse response, FIR, filter. +.Pp +The requested frequency response is configured via standard input or +the file specified by the -f option. +There is one control point in per line. +Each line consists of two numbers, frequency in Hz and requested +amplification. +Amplification between two consecutive control points is a linear +interpolation of the given control point values. +.Pp +To make the filter finite, it is windowed in time domain using a Hann +window. +The windowing actually modifies the frequency response - the actual +response is a convolution of the requested response and spectrum of +the window. +This is, however, very close to the requested response. +.Pp +The following options are available: +.Bl -tag -width indent +.It Fl q +Be quiet and don't print anything to standard output. +.It Fl d Ar device +The +.Xr virtual_oss 8 +control character device. +.It Fl w Ar what +Select what part the FIR filter should apply to. +Valid values are: rx_dev, tx_dev, rx_loop and tx_loop. +The default value is tx_dev. +.It Fl p Ar part +Select the index of the part given by the -w option to apply the filter to. +Default is zero. +.It Fl c Ar channels +Select number of channels to apply filter to, starting at channel zero. +By default all channels of the given part are updated. +.It Fl f Ar file +Read filter coefficients from the given file instead of standard input. +.It Fl o +Turn equalizer off. +.It Fl h +Show usage. +.El +.Sh EXAMPLES +To pass only frequencies between 200Hz and 400Hz: +.Bd -literal -offset indent +# Note that the -F and -G options enable FIR filtering. +virtual_oss -B -C 2 -c 2 -S -Q 0 -b 32 -r 48000 -s 8ms -F 80ms -G 80ms \\ + -f /dev/dsp -d dsp.virtual -t vdsp.ctl + +# For simplex operation use this: +virtual_oss -B -C 2 -c 2 -S -Q 0 -b 32 -r 48000 -s 8ms -F 80ms -G 80ms \\ + -R /dev/null -O /dev/dsp -d dsp.virtual -t vdsp.ctl + +# Load normalized filter points to avoid sample value overflow +cat << EOF | virtual_equalizer -d /dev/vdsp.ctl -w tx_dev -p 0 -c 2 +NORMALIZE +199 0.0 +200 1.0 +400 1.0 +401 0.0 +EOF + +# Load FIR filter based on sine frequency points +cat << EOF | virtual_equalizer -d /dev/vdsp.ctl -w tx_dev -p 0 -c 2 +199 0.0 +200 1.0 +400 1.0 +401 0.0 +EOF + +.Ed +.Sh SEE ALSO +.Xr virtual_oss 8 +.Sh AUTHORS +.Nm +was written by +.An Richard Kralovic riso@google.com . diff --git a/usr.sbin/virtual_oss/virtual_oss/Makefile b/usr.sbin/virtual_oss/virtual_oss/Makefile new file mode 100644 index 000000000000..cdb6bcac3fad --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/Makefile @@ -0,0 +1,24 @@ +PROG= virtual_oss +MAN= ${PROG}.8 + +SRCS= audio_delay.c \ + compressor.c \ + ctl.c \ + eq.c \ + format.c \ + httpd.c \ + main.c \ + mul.c \ + ring.c \ + virtual_oss.c + +CFLAGS+= -I${SRCTOP}/contrib/libsamplerate +# The --export-dynamic-symbol flags below are needed because some backends make +# use of those symbols. +LDFLAGS+= -lpthread -lcuse -lnv -lm \ + -Wl,--export-dynamic-symbol=virtual_oss_wait \ + -Wl,--export-dynamic-symbol=voss_has_synchronization +LIBADD= samplerate +LDFLAGS+= -L${.OBJDIR:H:H}/libsamplerate + +.include <bsd.prog.mk> diff --git a/usr.sbin/virtual_oss/virtual_oss/audio_delay.c b/usr.sbin/virtual_oss/virtual_oss/audio_delay.c new file mode 100644 index 000000000000..a69f448354fd --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/audio_delay.c @@ -0,0 +1,238 @@ +/*- + * Copyright (c) 2014 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <fcntl.h> +#include <unistd.h> +#include <err.h> +#include <math.h> +#include <sysexits.h> + +#include "int.h" + +#define REF_FREQ 500 /* HZ */ + +uint32_t voss_ad_last_delay; +uint8_t voss_ad_enabled; +uint8_t voss_ad_output_signal; +uint8_t voss_ad_input_channel; +uint8_t voss_ad_output_channel; + +static struct voss_ad { + double *wave; + + double *sin_a; + double *cos_a; + + double *sin_b; + double *cos_b; + + double *buf_a; + double *buf_b; + + double sum_sin_a; + double sum_cos_a; + + double sum_sin_b; + double sum_cos_b; + + uint32_t len_a; + uint32_t len_b; + + uint32_t offset_a; + uint32_t offset_b; +} voss_ad; + +void +voss_ad_reset(void) +{ + uint32_t x; + + for (x = 0; x != voss_ad.len_a; x++) + voss_ad.buf_a[x] = 0; + + for (x = 0; x != voss_ad.len_b; x++) + voss_ad.buf_b[x] = 0; + + voss_ad.sum_sin_a = 0; + voss_ad.sum_cos_a = 0; + voss_ad.sum_sin_b = 0; + voss_ad.sum_cos_b = 0; + + voss_ad.offset_a = 0; + voss_ad.offset_b = 0; + + voss_ad_last_delay = 0; +} + +void +voss_ad_init(uint32_t rate) +{ + double freq; + int samples; + int len; + int x; + + len = sqrt(rate); + + samples = len * len; + + voss_ad.wave = malloc(sizeof(voss_ad.wave[0]) * samples); + + voss_ad.sin_a = malloc(sizeof(voss_ad.sin_a[0]) * len); + voss_ad.cos_a = malloc(sizeof(voss_ad.cos_a[0]) * len); + voss_ad.buf_a = malloc(sizeof(voss_ad.buf_a[0]) * len); + voss_ad.len_a = len; + + voss_ad.sin_b = malloc(sizeof(voss_ad.sin_b[0]) * samples); + voss_ad.cos_b = malloc(sizeof(voss_ad.cos_b[0]) * samples); + voss_ad.buf_b = malloc(sizeof(voss_ad.buf_b[0]) * samples); + voss_ad.len_b = samples; + + if (voss_ad.sin_a == NULL || voss_ad.cos_a == NULL || + voss_ad.sin_b == NULL || voss_ad.cos_b == NULL || + voss_ad.buf_a == NULL || voss_ad.buf_b == NULL) + errx(EX_SOFTWARE, "Out of memory"); + + freq = 1.0; + + while (1) { + double temp = freq * ((double)rate) / ((double)len); + if (temp >= REF_FREQ) + break; + freq += 1.0; + } + + for (x = 0; x != len; x++) { + voss_ad.sin_a[x] = sin(freq * 2.0 * M_PI * ((double)x) / ((double)len)); + voss_ad.cos_a[x] = cos(freq * 2.0 * M_PI * ((double)x) / ((double)len)); + voss_ad.buf_a[x] = 0; + } + + for (x = 0; x != samples; x++) { + + voss_ad.wave[x] = sin(freq * 2.0 * M_PI * ((double)x) / ((double)len)) * + (1.0 + sin(2.0 * M_PI * ((double)x) / ((double)samples))) / 2.0; + + voss_ad.sin_b[x] = sin(2.0 * M_PI * ((double)x) / ((double)samples)); + voss_ad.cos_b[x] = cos(2.0 * M_PI * ((double)x) / ((double)samples)); + voss_ad.buf_b[x] = 0; + } +} + +static double +voss_add_decode_offset(double x /* cos */, double y /* sin */) +{ + uint32_t v; + double r; + + r = sqrt((x * x) + (y * y)); + + if (r == 0.0) + return (0); + + x /= r; + y /= r; + + v = 0; + + if (y < 0) { + v |= 1; + y = -y; + } + if (x < 0) { + v |= 2; + x = -x; + } + + if (y < x) { + r = acos(y); + } else { + r = asin(x); + } + + switch (v) { + case 0: + r = (2.0 * M_PI) - r; + break; + case 1: + r = M_PI + r; + break; + case 3: + r = M_PI - r; + break; + default: + break; + } + return (r); +} + +double +voss_ad_getput_sample(double sample) +{ + double retval; + double phase; + uint32_t xa; + uint32_t xb; + + xa = voss_ad.offset_a; + xb = voss_ad.offset_b; + retval = voss_ad.wave[xb]; + + sample -= voss_ad.buf_a[xa]; + voss_ad.sum_sin_a += voss_ad.sin_a[xa] * sample; + voss_ad.sum_cos_a += voss_ad.cos_a[xa] * sample; + voss_ad.buf_a[xa] += sample; + + sample = sqrt((voss_ad.sum_sin_a * voss_ad.sum_sin_a) + + (voss_ad.sum_cos_a * voss_ad.sum_cos_a)); + + sample -= voss_ad.buf_b[xb]; + voss_ad.sum_sin_b += voss_ad.sin_b[xb] * sample; + voss_ad.sum_cos_b += voss_ad.cos_b[xb] * sample; + voss_ad.buf_b[xb] += sample; + + if (++xa == voss_ad.len_a) + xa = 0; + + if (++xb == voss_ad.len_b) { + xb = 0; + + phase = voss_add_decode_offset( + voss_ad.sum_cos_b, voss_ad.sum_sin_b); + + voss_ad_last_delay = (uint32_t)(phase * (double)(voss_ad.len_b) / (2.0 * M_PI)) - (voss_ad.len_a / 2); + if (voss_ad_last_delay > voss_ad.len_b) + voss_ad_last_delay = voss_ad.len_b; + } + voss_ad.offset_a = xa; + voss_ad.offset_b = xb; + + return (retval * (1LL << voss_ad_output_signal)); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/backend.h b/usr.sbin/virtual_oss/virtual_oss/backend.h new file mode 100644 index 000000000000..d7453f3db89e --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/backend.h @@ -0,0 +1,53 @@ +/*- + * Copyright (c) 2015 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _VIRTUAL_BACKEND_H_ +#define _VIRTUAL_BACKEND_H_ + +struct voss_backend { + int (*open)(struct voss_backend *, const char *, int, int, int *, int *); + void (*close)(struct voss_backend *); + int (*transfer)(struct voss_backend *, void *, int); + void (*delay)(struct voss_backend *, int *); + void *arg; + int fd; +}; + +/* Currently selected backends */ +extern struct voss_backend *voss_rx_backend; +extern struct voss_backend *voss_tx_backend; + +/* Available backends */ +/* XXX Get rid somehow? */ +extern struct voss_backend voss_backend_null_rec; +extern struct voss_backend voss_backend_null_play; +extern struct voss_backend voss_backend_oss_rec; +extern struct voss_backend voss_backend_oss_play; +extern struct voss_backend voss_backend_bt_rec; +extern struct voss_backend voss_backend_bt_play; +extern struct voss_backend voss_backend_sndio_rec; +extern struct voss_backend voss_backend_sndio_play; + +#endif /* _VIRTUAL_BACKEND_H_ */ diff --git a/usr.sbin/virtual_oss/virtual_oss/compressor.c b/usr.sbin/virtual_oss/virtual_oss/compressor.c new file mode 100644 index 000000000000..4a92a38eceaa --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/compressor.c @@ -0,0 +1,76 @@ +/*- + * Copyright (c) 2020 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> + +#include <stdint.h> +#include <string.h> + +#include "int.h" +#include "virtual_oss.h" + +struct virtual_compressor voss_output_compressor_param = { + .knee = 85, + .attack = 3, + .decay = 20, +}; +double voss_output_compressor_gain[VMAX_CHAN]; + +void +voss_compressor(int64_t *buffer, double *p_ch_gain, + const struct virtual_compressor *p_param, const unsigned samples, + const unsigned maxchan, const int64_t fmt_max) +{ + int64_t knee_amp; + int64_t sample; + unsigned ch; + unsigned i; + double amp; + + /* check if compressor is enabled */ + if (p_param->enabled != 1) + return; + + knee_amp = (fmt_max * p_param->knee) / VIRTUAL_OSS_KNEE_MAX; + + for (ch = i = 0; i != samples; i++) { + sample = buffer[i]; + if (sample < 0) + sample = -sample; + + amp = p_ch_gain[ch]; + if (sample > knee_amp) { + const double gain = (double)knee_amp / (double)sample; + if (gain < amp) + amp += (gain - amp) / (1LL << p_param->attack); + } + buffer[i] *= amp; + amp += (1.0 - amp) / (1LL << p_param->decay); + p_ch_gain[ch] = amp; + + if (++ch == maxchan) + ch = 0; + } +} diff --git a/usr.sbin/virtual_oss/virtual_oss/ctl.c b/usr.sbin/virtual_oss/virtual_oss/ctl.c new file mode 100644 index 000000000000..4a445a59db59 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/ctl.c @@ -0,0 +1,615 @@ +/*- + * Copyright (c) 2012-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <sys/queue.h> + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +#include <cuse.h> + +#include "int.h" +#include "virtual_oss.h" + +int64_t voss_output_peak[VMAX_CHAN]; +int64_t voss_input_peak[VMAX_CHAN]; + +static int +vctl_open(struct cuse_dev *pdev __unused, int fflags __unused) +{ + return (0); +} + +static int +vctl_close(struct cuse_dev *pdev __unused, int fflags __unused) +{ + return (0); +} + +static vprofile_t * +vprofile_by_index(const vprofile_head_t *phead, int index) +{ + vprofile_t *pvp; + + TAILQ_FOREACH(pvp, phead, entry) { + if (!index--) + return (pvp); + } + return (NULL); +} + +static vmonitor_t * +vmonitor_by_index(int index, vmonitor_head_t *phead) +{ + vmonitor_t *pvm; + + TAILQ_FOREACH(pvm, phead, entry) { + if (!index--) + return (pvm); + } + return (NULL); +} + +static int +vctl_ioctl(struct cuse_dev *pdev __unused, int fflags __unused, + unsigned long cmd, void *peer_data) +{ + union { + int val; + struct virtual_oss_io_info io_info; + struct virtual_oss_mon_info mon_info; + struct virtual_oss_io_peak io_peak; + struct virtual_oss_mon_peak mon_peak; + struct virtual_oss_compressor out_lim; + struct virtual_oss_io_limit io_lim; + struct virtual_oss_master_peak master_peak; + struct virtual_oss_audio_delay_locator ad_locator; + struct virtual_oss_fir_filter fir_filter; + struct virtual_oss_system_info sys_info; + char options[VIRTUAL_OSS_OPTIONS_MAX]; + } data; + + vprofile_t *pvp; + vmonitor_t *pvm; + + int chan; + int len; + int error; + + len = IOCPARM_LEN(cmd); + + if (len < 0 || len > (int)sizeof(data)) + return (CUSE_ERR_INVALID); + + if (cmd & IOC_IN) { + error = cuse_copy_in(peer_data, &data, len); + if (error) + return (error); + } else { + error = 0; + } + + atomic_lock(); + switch (cmd) { + case VIRTUAL_OSS_GET_DEV_INFO: + case VIRTUAL_OSS_SET_DEV_INFO: + case VIRTUAL_OSS_GET_DEV_PEAK: + case VIRTUAL_OSS_SET_DEV_LIMIT: + case VIRTUAL_OSS_GET_DEV_LIMIT: + case VIRTUAL_OSS_SET_RX_DEV_FIR_FILTER: + case VIRTUAL_OSS_GET_RX_DEV_FIR_FILTER: + case VIRTUAL_OSS_SET_TX_DEV_FIR_FILTER: + case VIRTUAL_OSS_GET_TX_DEV_FIR_FILTER: + pvp = vprofile_by_index(&virtual_profile_client_head, data.val); + break; + case VIRTUAL_OSS_GET_LOOP_INFO: + case VIRTUAL_OSS_SET_LOOP_INFO: + case VIRTUAL_OSS_GET_LOOP_PEAK: + case VIRTUAL_OSS_SET_LOOP_LIMIT: + case VIRTUAL_OSS_GET_LOOP_LIMIT: + case VIRTUAL_OSS_SET_RX_LOOP_FIR_FILTER: + case VIRTUAL_OSS_GET_RX_LOOP_FIR_FILTER: + case VIRTUAL_OSS_SET_TX_LOOP_FIR_FILTER: + case VIRTUAL_OSS_GET_TX_LOOP_FIR_FILTER: + pvp = vprofile_by_index(&virtual_profile_loopback_head, data.val); + break; + default: + pvp = NULL; + break; + } + + switch (cmd) { + case VIRTUAL_OSS_GET_VERSION: + data.val = VIRTUAL_OSS_VERSION; + break; + case VIRTUAL_OSS_GET_DEV_INFO: + case VIRTUAL_OSS_GET_LOOP_INFO: + if (pvp == NULL || + data.io_info.channel < 0 || + data.io_info.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + break; + } + strlcpy(data.io_info.name, pvp->oss_name, sizeof(data.io_info.name)); + chan = data.io_info.channel; + data.io_info.rx_amp = pvp->rx_shift[chan]; + data.io_info.tx_amp = pvp->tx_shift[chan]; + data.io_info.rx_chan = pvp->rx_src[chan]; + data.io_info.tx_chan = pvp->tx_dst[chan]; + data.io_info.rx_mute = pvp->rx_mute[chan] ? 1 : 0; + data.io_info.tx_mute = pvp->tx_mute[chan] ? 1 : 0; + data.io_info.rx_pol = pvp->rx_pol[chan] ? 1 : 0; + data.io_info.tx_pol = pvp->tx_pol[chan] ? 1 : 0; + data.io_info.bits = pvp->bits; + data.io_info.rx_delay = pvp->rec_delay; + data.io_info.rx_delay_limit = voss_dsp_sample_rate; + break; + case VIRTUAL_OSS_SET_DEV_INFO: + case VIRTUAL_OSS_SET_LOOP_INFO: + if (pvp == NULL || + data.io_info.channel < 0 || + data.io_info.channel >= (int)pvp->channels || + data.io_info.rx_amp < -31 || data.io_info.rx_amp > 31 || + data.io_info.tx_amp < -31 || data.io_info.tx_amp > 31 || + data.io_info.rx_delay < 0 || + data.io_info.rx_delay > (int)voss_dsp_sample_rate) { + error = CUSE_ERR_INVALID; + break; + } + chan = data.io_info.channel; + pvp->rx_shift[chan] = data.io_info.rx_amp; + pvp->tx_shift[chan] = data.io_info.tx_amp; + pvp->rx_src[chan] = data.io_info.rx_chan; + pvp->tx_dst[chan] = data.io_info.tx_chan; + pvp->rx_mute[chan] = data.io_info.rx_mute ? 1 : 0; + pvp->tx_mute[chan] = data.io_info.tx_mute ? 1 : 0; + pvp->rx_pol[chan] = data.io_info.rx_pol ? 1 : 0; + pvp->tx_pol[chan] = data.io_info.tx_pol ? 1 : 0; + pvp->rec_delay = data.io_info.rx_delay; + break; + case VIRTUAL_OSS_GET_INPUT_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_input); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_info.src_chan = pvm->src_chan; + data.mon_info.dst_chan = pvm->dst_chan; + data.mon_info.pol = pvm->pol; + data.mon_info.mute = pvm->mute; + data.mon_info.amp = pvm->shift; + data.mon_info.bits = voss_dsp_bits; + break; + case VIRTUAL_OSS_SET_INPUT_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_input); + if (pvm == NULL || + data.mon_info.amp < -31 || + data.mon_info.amp > 31) { + error = CUSE_ERR_INVALID; + break; + } + pvm->src_chan = data.mon_info.src_chan; + pvm->dst_chan = data.mon_info.dst_chan; + pvm->pol = data.mon_info.pol ? 1 : 0; + pvm->mute = data.mon_info.mute ? 1 : 0; + pvm->shift = data.mon_info.amp; + break; + case VIRTUAL_OSS_GET_OUTPUT_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_output); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_info.src_chan = pvm->src_chan; + data.mon_info.dst_chan = pvm->dst_chan; + data.mon_info.pol = pvm->pol; + data.mon_info.mute = pvm->mute; + data.mon_info.amp = pvm->shift; + data.mon_info.bits = voss_dsp_bits; + break; + case VIRTUAL_OSS_SET_OUTPUT_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_output); + if (pvm == NULL || + data.mon_info.amp < -31 || + data.mon_info.amp > 31) { + error = CUSE_ERR_INVALID; + break; + } + pvm->src_chan = data.mon_info.src_chan; + pvm->dst_chan = data.mon_info.dst_chan; + pvm->pol = data.mon_info.pol ? 1 : 0; + pvm->mute = data.mon_info.mute ? 1 : 0; + pvm->shift = data.mon_info.amp; + break; + case VIRTUAL_OSS_GET_LOCAL_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_local); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_info.src_chan = pvm->src_chan; + data.mon_info.dst_chan = pvm->dst_chan; + data.mon_info.pol = pvm->pol; + data.mon_info.mute = pvm->mute; + data.mon_info.amp = pvm->shift; + data.mon_info.bits = voss_dsp_bits; + break; + case VIRTUAL_OSS_SET_LOCAL_MON_INFO: + pvm = vmonitor_by_index(data.mon_info.number, + &virtual_monitor_local); + if (pvm == NULL || + data.mon_info.amp < -31 || + data.mon_info.amp > 31) { + error = CUSE_ERR_INVALID; + break; + } + pvm->src_chan = data.mon_info.src_chan; + pvm->dst_chan = data.mon_info.dst_chan; + pvm->pol = data.mon_info.pol ? 1 : 0; + pvm->mute = data.mon_info.mute ? 1 : 0; + pvm->shift = data.mon_info.amp; + break; + case VIRTUAL_OSS_GET_DEV_PEAK: + case VIRTUAL_OSS_GET_LOOP_PEAK: + if (pvp == NULL || + data.io_peak.channel < 0 || + data.io_peak.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + break; + } + strlcpy(data.io_peak.name, pvp->oss_name, sizeof(data.io_peak.name)); + chan = data.io_peak.channel; + data.io_peak.rx_peak_value = pvp->rx_peak_value[chan]; + pvp->rx_peak_value[chan] = 0; + data.io_peak.tx_peak_value = pvp->tx_peak_value[chan]; + pvp->tx_peak_value[chan] = 0; + data.io_peak.bits = pvp->bits; + break; + case VIRTUAL_OSS_GET_INPUT_MON_PEAK: + pvm = vmonitor_by_index(data.mon_peak.number, + &virtual_monitor_input); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_peak.peak_value = pvm->peak_value; + data.mon_peak.bits = voss_dsp_bits; + pvm->peak_value = 0; + break; + case VIRTUAL_OSS_GET_OUTPUT_MON_PEAK: + pvm = vmonitor_by_index(data.mon_peak.number, + &virtual_monitor_output); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_peak.peak_value = pvm->peak_value; + data.mon_peak.bits = voss_dsp_bits; + pvm->peak_value = 0; + break; + case VIRTUAL_OSS_GET_LOCAL_MON_PEAK: + pvm = vmonitor_by_index(data.mon_peak.number, + &virtual_monitor_local); + if (pvm == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.mon_peak.peak_value = pvm->peak_value; + data.mon_peak.bits = voss_dsp_bits; + pvm->peak_value = 0; + break; + case VIRTUAL_OSS_ADD_INPUT_MON: + pvm = vmonitor_alloc(&data.val, + &virtual_monitor_input); + if (pvm == NULL) + error = CUSE_ERR_INVALID; + break; + case VIRTUAL_OSS_ADD_OUTPUT_MON: + pvm = vmonitor_alloc(&data.val, + &virtual_monitor_output); + if (pvm == NULL) + error = CUSE_ERR_INVALID; + break; + case VIRTUAL_OSS_ADD_LOCAL_MON: + pvm = vmonitor_alloc(&data.val, + &virtual_monitor_local); + if (pvm == NULL) + error = CUSE_ERR_INVALID; + break; + case VIRTUAL_OSS_SET_OUTPUT_LIMIT: + if (data.out_lim.enabled < 0 || + data.out_lim.enabled > 1 || + data.out_lim.knee < VIRTUAL_OSS_KNEE_MIN || + data.out_lim.knee > VIRTUAL_OSS_KNEE_MAX || + data.out_lim.attack < VIRTUAL_OSS_ATTACK_MIN || + data.out_lim.attack > VIRTUAL_OSS_ATTACK_MAX || + data.out_lim.decay < VIRTUAL_OSS_DECAY_MIN || + data.out_lim.decay > VIRTUAL_OSS_DECAY_MAX || + data.out_lim.gain != 0) { + error = CUSE_ERR_INVALID; + break; + } + voss_output_compressor_param.enabled = data.out_lim.enabled; + voss_output_compressor_param.knee = data.out_lim.knee; + voss_output_compressor_param.attack = data.out_lim.attack; + voss_output_compressor_param.decay = data.out_lim.decay; + break; + case VIRTUAL_OSS_GET_OUTPUT_LIMIT: + data.out_lim.enabled = voss_output_compressor_param.enabled; + data.out_lim.knee = voss_output_compressor_param.knee; + data.out_lim.attack = voss_output_compressor_param.attack; + data.out_lim.decay = voss_output_compressor_param.decay; + data.out_lim.gain = 1000; + for (chan = 0; chan != VMAX_CHAN; chan++) { + int gain = voss_output_compressor_gain[chan] * 1000.0; + if (data.out_lim.gain > gain) + data.out_lim.gain = gain; + } + break; + case VIRTUAL_OSS_SET_DEV_LIMIT: + case VIRTUAL_OSS_SET_LOOP_LIMIT: + if (pvp == NULL || + data.io_lim.param.enabled < 0 || + data.io_lim.param.enabled > 1 || + data.io_lim.param.knee < VIRTUAL_OSS_KNEE_MIN || + data.io_lim.param.knee > VIRTUAL_OSS_KNEE_MAX || + data.io_lim.param.attack < VIRTUAL_OSS_ATTACK_MIN || + data.io_lim.param.attack > VIRTUAL_OSS_ATTACK_MAX || + data.io_lim.param.decay < VIRTUAL_OSS_DECAY_MIN || + data.io_lim.param.decay > VIRTUAL_OSS_DECAY_MAX || + data.io_lim.param.gain != 0) { + error = CUSE_ERR_INVALID; + break; + } + pvp->rx_compressor_param.enabled = data.io_lim.param.enabled; + pvp->rx_compressor_param.knee = data.io_lim.param.knee; + pvp->rx_compressor_param.attack = data.io_lim.param.attack; + pvp->rx_compressor_param.decay = data.io_lim.param.decay; + break; + case VIRTUAL_OSS_GET_DEV_LIMIT: + case VIRTUAL_OSS_GET_LOOP_LIMIT: + if (pvp == NULL) { + error = CUSE_ERR_INVALID; + break; + } + data.io_lim.param.enabled = pvp->rx_compressor_param.enabled; + data.io_lim.param.knee = pvp->rx_compressor_param.knee; + data.io_lim.param.attack = pvp->rx_compressor_param.attack; + data.io_lim.param.decay = pvp->rx_compressor_param.decay; + data.io_lim.param.gain = 1000; + + for (chan = 0; chan != VMAX_CHAN; chan++) { + int gain = pvp->rx_compressor_gain[chan] * 1000.0; + if (data.io_lim.param.gain > gain) + data.io_lim.param.gain = gain; + } + break; + case VIRTUAL_OSS_GET_OUTPUT_PEAK: + chan = data.master_peak.channel; + if (chan < 0 || + chan >= (int)voss_max_channels) { + error = CUSE_ERR_INVALID; + break; + } + data.master_peak.bits = voss_dsp_bits; + data.master_peak.peak_value = voss_output_peak[chan]; + voss_output_peak[chan] = 0; + break; + case VIRTUAL_OSS_GET_INPUT_PEAK: + chan = data.master_peak.channel; + if (chan < 0 || + chan >= (int)voss_dsp_max_channels) { + error = CUSE_ERR_INVALID; + break; + } + data.master_peak.bits = voss_dsp_bits; + data.master_peak.peak_value = voss_input_peak[chan]; + voss_input_peak[chan] = 0; + break; + + case VIRTUAL_OSS_SET_RECORDING: + voss_is_recording = data.val ? 1 : 0; + break; + + case VIRTUAL_OSS_GET_RECORDING: + data.val = voss_is_recording; + break; + + case VIRTUAL_OSS_SET_AUDIO_DELAY_LOCATOR: + if (data.ad_locator.channel_output < 0 || + data.ad_locator.channel_output >= (int)voss_mix_channels) { + error = CUSE_ERR_INVALID; + break; + } + if (data.ad_locator.channel_input < 0 || + data.ad_locator.channel_input >= (int)voss_mix_channels) { + error = CUSE_ERR_INVALID; + break; + } + if (data.ad_locator.signal_output_level < 0 || + data.ad_locator.signal_output_level >= 64) { + error = CUSE_ERR_INVALID; + break; + } + voss_ad_enabled = (data.ad_locator.locator_enabled != 0); + voss_ad_output_signal = data.ad_locator.signal_output_level; + voss_ad_output_channel = data.ad_locator.channel_output; + voss_ad_input_channel = data.ad_locator.channel_input; + break; + + case VIRTUAL_OSS_GET_AUDIO_DELAY_LOCATOR: + data.ad_locator.locator_enabled = voss_ad_enabled; + data.ad_locator.signal_output_level = voss_ad_output_signal; + data.ad_locator.channel_output = voss_ad_output_channel; + data.ad_locator.channel_input = voss_ad_input_channel; + data.ad_locator.channel_last = voss_mix_channels - 1; + data.ad_locator.signal_input_delay = voss_ad_last_delay; + data.ad_locator.signal_delay_hz = voss_dsp_sample_rate; + break; + + case VIRTUAL_OSS_RST_AUDIO_DELAY_LOCATOR: + voss_ad_reset(); + break; + + case VIRTUAL_OSS_ADD_OPTIONS: + data.options[VIRTUAL_OSS_OPTIONS_MAX - 1] = 0; + voss_add_options(data.options); + break; + + case VIRTUAL_OSS_GET_RX_DEV_FIR_FILTER: + case VIRTUAL_OSS_GET_RX_LOOP_FIR_FILTER: + if (pvp == NULL || + data.fir_filter.channel < 0 || + data.fir_filter.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + } else if (data.fir_filter.filter_data == NULL) { + data.fir_filter.filter_size = pvp->rx_filter_size; + } else if (data.fir_filter.filter_size != (int)pvp->rx_filter_size) { + error = CUSE_ERR_INVALID; + } else if (pvp->rx_filter_data[data.fir_filter.channel] == NULL) { + error = CUSE_ERR_NO_MEMORY; /* filter disabled */ + } else { + error = cuse_copy_out(pvp->rx_filter_data[data.fir_filter.channel], + data.fir_filter.filter_data, + sizeof(pvp->rx_filter_data[0][0]) * + data.fir_filter.filter_size); + } + break; + + case VIRTUAL_OSS_GET_TX_DEV_FIR_FILTER: + case VIRTUAL_OSS_GET_TX_LOOP_FIR_FILTER: + if (pvp == NULL || + data.fir_filter.channel < 0 || + data.fir_filter.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + } else if (data.fir_filter.filter_data == NULL) { + data.fir_filter.filter_size = pvp->tx_filter_size; + } else if (data.fir_filter.filter_size != (int)pvp->tx_filter_size) { + error = CUSE_ERR_INVALID; + } else if (pvp->tx_filter_data[data.fir_filter.channel] == NULL) { + error = CUSE_ERR_NO_MEMORY; /* filter disabled */ + } else { + error = cuse_copy_out(pvp->tx_filter_data[data.fir_filter.channel], + data.fir_filter.filter_data, + sizeof(pvp->tx_filter_data[0][0]) * + data.fir_filter.filter_size); + } + break; + + case VIRTUAL_OSS_SET_RX_DEV_FIR_FILTER: + case VIRTUAL_OSS_SET_RX_LOOP_FIR_FILTER: + if (pvp == NULL || + data.fir_filter.channel < 0 || + data.fir_filter.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + } else if (data.fir_filter.filter_data == NULL) { + free(pvp->rx_filter_data[data.fir_filter.channel]); + pvp->rx_filter_data[data.fir_filter.channel] = NULL; /* disable filter */ + } else if (data.fir_filter.filter_size != (int)pvp->rx_filter_size) { + error = CUSE_ERR_INVALID; + } else if (pvp->rx_filter_size != 0) { + size_t size = sizeof(pvp->rx_filter_data[0][0]) * pvp->rx_filter_size; + if (pvp->rx_filter_data[data.fir_filter.channel] == NULL) { + pvp->rx_filter_data[data.fir_filter.channel] = malloc(size); + if (pvp->rx_filter_data[data.fir_filter.channel] == NULL) + error = CUSE_ERR_NO_MEMORY; + else + memset(pvp->rx_filter_data[data.fir_filter.channel], 0, size); + } + if (pvp->rx_filter_data[data.fir_filter.channel] != NULL) { + error = cuse_copy_in(data.fir_filter.filter_data, + pvp->rx_filter_data[data.fir_filter.channel], size); + } + } + break; + + case VIRTUAL_OSS_SET_TX_DEV_FIR_FILTER: + case VIRTUAL_OSS_SET_TX_LOOP_FIR_FILTER: + if (pvp == NULL || + data.fir_filter.channel < 0 || + data.fir_filter.channel >= (int)pvp->channels) { + error = CUSE_ERR_INVALID; + } else if (data.fir_filter.filter_data == NULL) { + free(pvp->tx_filter_data[data.fir_filter.channel]); + pvp->tx_filter_data[data.fir_filter.channel] = NULL; /* disable filter */ + } else if (data.fir_filter.filter_size != (int)pvp->tx_filter_size) { + error = CUSE_ERR_INVALID; + } else if (pvp->tx_filter_size != 0) { + size_t size = sizeof(pvp->tx_filter_data[0][0]) * pvp->tx_filter_size; + if (pvp->tx_filter_data[data.fir_filter.channel] == NULL) { + pvp->tx_filter_data[data.fir_filter.channel] = malloc(size); + if (pvp->tx_filter_data[data.fir_filter.channel] == NULL) + error = CUSE_ERR_NO_MEMORY; + else + memset(pvp->tx_filter_data[data.fir_filter.channel], 0, size); + } + if (pvp->tx_filter_data[data.fir_filter.channel] != NULL) { + error = cuse_copy_in(data.fir_filter.filter_data, + pvp->tx_filter_data[data.fir_filter.channel], size); + } + } + break; + + case VIRTUAL_OSS_GET_SAMPLE_RATE: + data.val = voss_dsp_sample_rate; + break; + + case VIRTUAL_OSS_GET_SYSTEM_INFO: + data.sys_info.tx_jitter_up = voss_jitter_up; + data.sys_info.tx_jitter_down = voss_jitter_down; + data.sys_info.sample_rate = voss_dsp_sample_rate; + data.sys_info.sample_bits = voss_dsp_bits; + data.sys_info.sample_channels = voss_mix_channels; + strlcpy(data.sys_info.rx_device_name, voss_dsp_rx_device, + sizeof(data.sys_info.rx_device_name)); + strlcpy(data.sys_info.tx_device_name, voss_dsp_tx_device, + sizeof(data.sys_info.tx_device_name)); + break; + + default: + error = CUSE_ERR_INVALID; + break; + } + atomic_unlock(); + + if (error == 0) { + if (cmd & IOC_OUT) + error = cuse_copy_out(&data, peer_data, len); + } + return (error); +} + +const struct cuse_methods vctl_methods = { + .cm_open = vctl_open, + .cm_close = vctl_close, + .cm_ioctl = vctl_ioctl, +}; diff --git a/usr.sbin/virtual_oss/virtual_oss/eq.c b/usr.sbin/virtual_oss/virtual_oss/eq.c new file mode 100644 index 000000000000..a02b48a9f039 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/eq.c @@ -0,0 +1,226 @@ +/*- + * Copyright (c) 2021 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> + +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <errno.h> + +#include "int.h" + +void +vclient_tx_equalizer(struct virtual_client *pvc, + int64_t *src, size_t total) +{ + double *f_data; + size_t channels; + size_t f_size; + size_t x; + + f_size = pvc->profile->tx_filter_size; + if (f_size == 0 || total == 0) + return; + + channels = pvc->channels; + total /= channels; + + while (1) { + size_t delta; + size_t offset; + size_t y; + + offset = pvc->tx_filter_offset; + delta = f_size - offset; + + if (delta > total) + delta = total; + + for (x = 0; x != channels; x++) { + f_data = pvc->profile->tx_filter_data[x]; + if (f_data == NULL) + continue; + + for (y = 0; y != delta; y++) { + pvc->tx_filter_in[x][y + offset] = src[x + y * channels]; + src[x + y * channels] = pvc->tx_filter_out[x][y + offset]; + } + } + + pvc->tx_filter_offset += delta; + total -= delta; + src += delta * channels; + + /* check if there is enough data for a new transform */ + if (pvc->tx_filter_offset == f_size) { + for (x = 0; x != channels; x++) { + f_data = pvc->profile->tx_filter_data[x]; + if (f_data == NULL) + continue; + + /* shift down output */ + for (y = 0; y != f_size; y++) { + pvc->tx_filter_out[x][y] = pvc->tx_filter_out[x][y + f_size]; + pvc->tx_filter_out[x][y + f_size] = 0; + } + /* perform transform */ + voss_x3_multiply_double(pvc->tx_filter_in[x], + f_data, pvc->tx_filter_out[x], f_size); + } + pvc->tx_filter_offset = 0; + } + if (total == 0) + break; + } +} + +void +vclient_rx_equalizer(struct virtual_client *pvc, + int64_t *src, size_t total) +{ + double *f_data; + size_t channels; + size_t f_size; + size_t x; + + f_size = pvc->profile->rx_filter_size; + + if (f_size == 0 || total == 0) + return; + + channels = pvc->channels; + total /= channels; + + while (1) { + size_t delta; + size_t offset; + size_t y; + + offset = pvc->rx_filter_offset; + delta = f_size - offset; + + if (delta > total) + delta = total; + + for (x = 0; x != channels; x++) { + f_data = pvc->profile->rx_filter_data[x]; + if (f_data == NULL) + continue; + + for (y = 0; y != delta; y++) { + pvc->rx_filter_in[x][y + offset] = src[x + y * channels]; + src[x + y * channels] = pvc->rx_filter_out[x][y + offset]; + } + } + + pvc->rx_filter_offset += delta; + total -= delta; + src += delta * channels; + + /* check if there is enough data for a new transform */ + if (pvc->rx_filter_offset == f_size) { + for (x = 0; x != channels; x++) { + f_data = pvc->profile->rx_filter_data[x]; + if (f_data == NULL) + continue; + + /* shift output down */ + for (y = 0; y != f_size; y++) { + pvc->rx_filter_out[x][y] = pvc->rx_filter_out[x][y + f_size]; + pvc->rx_filter_out[x][y + f_size] = 0; + } + /* perform transform */ + voss_x3_multiply_double(pvc->rx_filter_in[x], + f_data, pvc->rx_filter_out[x], f_size); + } + pvc->rx_filter_offset = 0; + } + if (total == 0) + break; + } +} + +int +vclient_eq_alloc(struct virtual_client *pvc) +{ + uint8_t x; + + pvc->tx_filter_offset = 0; + pvc->rx_filter_offset = 0; + + for (x = 0; x != pvc->channels; x++) { + uint32_t size; + + size = pvc->profile->tx_filter_size; + if (size != 0) { + pvc->tx_filter_in[x] = + malloc(sizeof(pvc->tx_filter_in[x][0]) * size); + pvc->tx_filter_out[x] = + calloc(2 * size, sizeof(pvc->tx_filter_out[x][0])); + if (pvc->tx_filter_in[x] == NULL || + pvc->tx_filter_out[x] == NULL) + goto error; + } + size = pvc->profile->rx_filter_size; + if (size != 0) { + pvc->rx_filter_in[x] = + malloc(sizeof(pvc->rx_filter_in[x][0]) * size); + pvc->rx_filter_out[x] = + calloc(2 * size, sizeof(pvc->rx_filter_out[x][0])); + if (pvc->rx_filter_in[x] == NULL || + pvc->rx_filter_out[x] == NULL) + goto error; + } + } + return (0); + +error: + vclient_eq_free(pvc); + return (ENOMEM); +} + +void +vclient_eq_free(struct virtual_client *pvc) +{ + uint8_t x; + + pvc->tx_filter_offset = 0; + pvc->rx_filter_offset = 0; + + for (x = 0; x != VMAX_CHAN; x++) { + free(pvc->tx_filter_in[x]); + pvc->tx_filter_in[x] = NULL; + + free(pvc->rx_filter_in[x]); + pvc->rx_filter_in[x] = NULL; + + free(pvc->tx_filter_out[x]); + pvc->tx_filter_out[x] = NULL; + + free(pvc->rx_filter_out[x]); + pvc->rx_filter_out[x] = NULL; + } +} diff --git a/usr.sbin/virtual_oss/virtual_oss/format.c b/usr.sbin/virtual_oss/virtual_oss/format.c new file mode 100644 index 000000000000..d32d0c726510 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/format.c @@ -0,0 +1,429 @@ +/*- + * Copyright (c) 2012-2020 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> +#include <sys/soundcard.h> + +#include <stdint.h> +#include <string.h> + +#include "int.h" + +void +format_import(uint32_t fmt, const uint8_t *src, uint32_t len, + int64_t *dst) +{ + const uint8_t *end = src + len; + int64_t val; + + if (fmt & AFMT_16BIT) { + while (src != end) { + if (fmt & (AFMT_S16_LE | AFMT_U16_LE)) + val = src[0] | (src[1] << 8); + else + val = src[1] | (src[0] << 8); + + src += 2; + + if (fmt & (AFMT_U16_LE | AFMT_U16_BE)) + val = val ^ 0x8000; + + val <<= (64 - 16); + val >>= (64 - 16); + + *dst++ = val; + } + + } else if (fmt & AFMT_24BIT) { + while (src < end) { + if (fmt & (AFMT_S24_LE | AFMT_U24_LE)) + val = src[0] | (src[1] << 8) | (src[2] << 16); + else + val = src[2] | (src[1] << 8) | (src[0] << 16); + + src += 3; + + if (fmt & (AFMT_U24_LE | AFMT_U24_BE)) + val = val ^ 0x800000; + + val <<= (64 - 24); + val >>= (64 - 24); + + *dst++ = val; + } + } else if (fmt & AFMT_32BIT) { + while (src < end) { + int64_t e, m, s; + + if (fmt & (AFMT_S32_LE | AFMT_U32_LE | AFMT_F32_LE)) + val = src[0] | (src[1] << 8) | (src[2] << 16) | (src[3] << 24); + else + val = src[3] | (src[2] << 8) | (src[1] << 16) | (src[0] << 24); + + src += 4; + + if (fmt & (AFMT_U32_LE | AFMT_U32_BE)) + val = val ^ 0x80000000LL; + + if (fmt & (AFMT_F32_LE | AFMT_F32_BE)) { + e = (val >> 23) & 0xff; + /* NaN, +/- Inf or too small */ + if (e == 0xff || e < 96) { + val = 0; + goto skip; + } + s = val & 0x80000000U; + if (e > 126) { + val = s == 0 ? format_max(fmt) : + -0x80000000LL; + goto skip; + } + m = 0x800000 | (val & 0x7fffff); + e += 8 - 127; + if (e < 0) + m >>= -e; + else + m <<= e; + val = s == 0 ? m : -m; + } +skip: + val <<= (64 - 32); + val >>= (64 - 32); + + *dst++ = val; + } + + } else if (fmt & AFMT_8BIT) { + while (src < end) { + val = src[0]; + + src += 1; + + if (fmt & AFMT_U8) + val = val ^ 0x80; + + val <<= (64 - 8); + val >>= (64 - 8); + + *dst++ = val; + } + } +} + +void +format_export(uint32_t fmt, const int64_t *src, uint8_t *dst, uint32_t len) +{ + const uint8_t *end = dst + len; + int64_t val; + + if (fmt & AFMT_16BIT) { + while (dst != end) { + + val = *src++; + + if (val > 0x7FFF) + val = 0x7FFF; + else if (val < -0x7FFF) + val = -0x7FFF; + + if (fmt & (AFMT_U16_LE | AFMT_U16_BE)) + val = val ^ 0x8000; + + if (fmt & (AFMT_S16_LE | AFMT_U16_LE)) { + dst[0] = val; + dst[1] = val >> 8; + } else { + dst[1] = val; + dst[0] = val >> 8; + } + + dst += 2; + } + + } else if (fmt & AFMT_24BIT) { + while (dst != end) { + + val = *src++; + + if (val > 0x7FFFFF) + val = 0x7FFFFF; + else if (val < -0x7FFFFF) + val = -0x7FFFFF; + + if (fmt & (AFMT_U24_LE | AFMT_U24_BE)) + val = val ^ 0x800000; + + if (fmt & (AFMT_S24_LE | AFMT_U24_LE)) { + dst[0] = val; + dst[1] = val >> 8; + dst[2] = val >> 16; + } else { + dst[2] = val; + dst[1] = val >> 8; + dst[0] = val >> 16; + } + + dst += 3; + } + } else if (fmt & AFMT_32BIT) { + while (dst != end) { + int64_t r, e; + + val = *src++; + + if (val > 0x7FFFFFFFLL) + val = 0x7FFFFFFFLL; + else if (val < -0x7FFFFFFFLL) + val = -0x7FFFFFFFLL; + + if (fmt & (AFMT_F32_LE | AFMT_F32_BE)) { + if (val == 0) + r = 0; + else if (val == format_max(fmt)) + r = 0x3f800000; + else if (val == -0x80000000LL) + r = 0x80000000U | 0x3f800000; + else { + r = 0; + if (val < 0) { + r |= 0x80000000U; + val = -val; + } + e = 127 - 8; + while ((val & 0x7f000000) != 0) { + val >>= 1; + e++; + } + while ((val & 0x7f800000) == 0) { + val <<= 1; + e--; + } + r |= (e & 0xff) << 23; + r |= val & 0x7fffff; + } + val = r; + } + + if (fmt & (AFMT_U32_LE | AFMT_U32_BE)) + val = val ^ 0x80000000LL; + + if (fmt & (AFMT_S32_LE | AFMT_U32_LE | AFMT_F32_LE)) { + dst[0] = val; + dst[1] = val >> 8; + dst[2] = val >> 16; + dst[3] = val >> 24; + } else { + dst[3] = val; + dst[2] = val >> 8; + dst[1] = val >> 16; + dst[0] = val >> 24; + } + + dst += 4; + } + + } else if (fmt & AFMT_8BIT) { + while (dst != end) { + + val = *src++; + + if (val > 0x7F) + val = 0x7F; + else if (val < -0x7F) + val = -0x7F; + + if (fmt & (AFMT_U8)) + val = val ^ 0x80; + + dst[0] = val; + + dst += 1; + } + } +} + +int64_t +format_max(uint32_t fmt) +{ + if (fmt & AFMT_16BIT) + return (0x7FFF); + else if (fmt & AFMT_24BIT) + return (0x7FFFFF); + else if (fmt & AFMT_32BIT) + return (0x7FFFFFFF); + else if (fmt & AFMT_8BIT) + return (0x7F); + return (0); +} + +void +format_maximum(const int64_t *src, int64_t *dst, uint32_t ch, + uint32_t samples, int8_t shift) +{ + const int64_t *end = src + (samples * ch); + int64_t max[ch]; + int64_t temp; + uint32_t x; + + memset(max, 0, sizeof(max)); + + while (src != end) { + for (x = 0; x != ch; x++) { + temp = *src++; + if (temp < 0) + temp = -temp; + if (temp > max[x]) + max[x] = temp; + } + } + + for (x = 0; x != ch; x++) { + if (shift < 0) + max[x] >>= -shift; + else + max[x] <<= shift; + if (dst[x] < max[x]) + dst[x] = max[x]; + } +} + +void +format_remix(int64_t *buffer_data, uint32_t in_chans, + uint32_t out_chans, uint32_t samples) +{ + uint32_t x; + + if (out_chans > in_chans) { + uint32_t dst = out_chans * (samples - 1); + uint32_t src = in_chans * (samples - 1); + uint32_t fill = out_chans - in_chans; + + for (x = 0; x != samples; x++) { + memset(buffer_data + dst + in_chans, 0, 8 * fill); + if (src != dst) { + memcpy(buffer_data + dst, + buffer_data + src, + in_chans * 8); + } + dst -= out_chans; + src -= in_chans; + } + } else if (out_chans < in_chans) { + uint32_t dst = 0; + uint32_t src = 0; + + for (x = 0; x != samples; x++) { + if (src != dst) { + memcpy(buffer_data + dst, + buffer_data + src, + out_chans * 8); + } + dst += out_chans; + src += in_chans; + } + } +} + +void +format_silence(uint32_t fmt, uint8_t *dst, uint32_t len) +{ + const uint8_t *end = dst + len; + + if (fmt & AFMT_16BIT) { + uint16_t val; + + if (fmt & (AFMT_U16_LE | AFMT_U16_BE)) + val = 1U << 15; + else + val = 0; + + while (dst != end) { + if (fmt & (AFMT_S16_LE | AFMT_U16_LE)) { + dst[0] = val; + dst[1] = val >> 8; + } else { + dst[1] = val; + dst[0] = val >> 8; + } + dst += 2; + } + + } else if (fmt & AFMT_24BIT) { + uint32_t val; + + if (fmt & (AFMT_U24_LE | AFMT_U24_BE)) + val = 1U << 23; + else + val = 0; + + while (dst != end) { + if (fmt & (AFMT_S24_LE | AFMT_U24_LE)) { + dst[0] = val; + dst[1] = val >> 8; + dst[2] = val >> 16; + } else { + dst[2] = val; + dst[1] = val >> 8; + dst[0] = val >> 16; + } + dst += 3; + } + } else if (fmt & AFMT_32BIT) { + uint32_t val; + + if (fmt & (AFMT_U32_LE | AFMT_U32_BE)) + val = 1U << 31; + else + val = 0; + + while (dst != end) { + if (fmt & (AFMT_S32_LE | AFMT_U32_LE | AFMT_F32_LE)) { + dst[0] = val; + dst[1] = val >> 8; + dst[2] = val >> 16; + dst[3] = val >> 24; + } else { + dst[3] = val; + dst[2] = val >> 8; + dst[1] = val >> 16; + dst[0] = val >> 24; + } + dst += 4; + } + + } else if (fmt & AFMT_8BIT) { + uint8_t val; + + if (fmt & AFMT_U8) + val = 1U << 7; + else + val = 0; + + while (dst != end) { + dst[0] = val; + dst += 1; + } + } +} diff --git a/usr.sbin/virtual_oss/virtual_oss/httpd.c b/usr.sbin/virtual_oss/virtual_oss/httpd.c new file mode 100644 index 000000000000..dc5d6036f39d --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/httpd.c @@ -0,0 +1,846 @@ +/*- + * Copyright (c) 2020 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <sys/queue.h> +#include <sys/ioctl.h> +#include <sys/socket.h> +#include <sys/endian.h> +#include <sys/uio.h> +#include <sys/soundcard.h> + +#include <stdio.h> +#include <stdint.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <fcntl.h> +#include <unistd.h> +#include <err.h> +#include <errno.h> +#include <poll.h> +#include <sysexits.h> + +#include <netdb.h> +#include <netinet/in.h> +#include <netinet/tcp.h> + +#include <net/if.h> +#include <net/if_vlan_var.h> +#include <net/bpf.h> + +#include <arpa/inet.h> + +#include <pthread.h> + +#include "int.h" + +#define VOSS_HTTPD_BIND_MAX 8 +#define VOSS_HTTPD_MAX_STREAM_TIME (60 * 60 * 3) /* seconds */ + +struct http_state { + int fd; + uint64_t ts; +}; + +struct rtp_raw_packet { + struct { + uint32_t padding; + uint8_t dhost[6]; + uint8_t shost[6]; + uint16_t ether_type; + } __packed eth; + struct { + uint8_t hl_ver; + uint8_t tos; + uint16_t len; + uint16_t ident; + uint16_t offset; + uint8_t ttl; + uint8_t protocol; + uint16_t chksum; + union { + uint32_t sourceip; + uint16_t source16[2]; + }; + union { + uint32_t destip; + uint16_t dest16[2]; + }; + } __packed ip; + struct { + uint16_t srcport; + uint16_t dstport; + uint16_t len; + uint16_t chksum; + } __packed udp; + union { + uint8_t header8[12]; + uint16_t header16[6]; + uint32_t header32[3]; + } __packed rtp; + +} __packed; + +static const char * +voss_httpd_bind_rtp(vclient_t *pvc, const char *ifname, int *pfd) +{ + const char *perr = NULL; + struct vlanreq vr = {}; + struct ifreq ifr = {}; + int fd; + + fd = socket(AF_LOCAL, SOCK_DGRAM, 0); + if (fd < 0) { + perr = "Cannot open raw RTP socket"; + goto done; + } + + strlcpy(ifr.ifr_name, ifname, sizeof(ifr.ifr_name)); + ifr.ifr_data = (void *)&vr; + + if (ioctl(fd, SIOCGETVLAN, &ifr) == 0) + pvc->profile->http.rtp_vlanid = vr.vlr_tag; + else + pvc->profile->http.rtp_vlanid = 0; + + close(fd); + + ifr.ifr_data = NULL; + + *pfd = fd = open("/dev/bpf", O_RDWR); + if (fd < 0) { + perr = "Cannot open BPF device"; + goto done; + } + + if (ioctl(fd, BIOCSETIF, &ifr) != 0) { + perr = "Cannot bind BPF device to network interface"; + goto done; + } +done: + if (perr != NULL && fd > -1) + close(fd); + return (perr); +} + +static uint16_t +voss_ipv4_csum(const void *vptr, size_t count) +{ + const uint16_t *ptr = vptr; + uint32_t sum = 0; + + while (count--) + sum += *ptr++; + + sum = (sum >> 16) + (sum & 0xffff); + sum += (sum >> 16); + + return (~sum); +} + +static uint16_t +voss_udp_csum(uint32_t sum, const void *vhdr, size_t count, + const uint16_t *ptr, size_t length) +{ + const uint16_t *hdr = vhdr; + + while (count--) + sum += *hdr++; + + while (length > 1) { + sum += *ptr++; + length -= 2; + } + + if (length & 1) + sum += *__DECONST(uint8_t *, ptr); + + sum = (sum >> 16) + (sum & 0xffff); + sum += (sum >> 16); + + return (~sum); +} + +static void +voss_httpd_send_rtp_sub(vclient_t *pvc, int fd, void *ptr, size_t len, uint32_t ts) +{ + struct rtp_raw_packet pkt = {}; + struct iovec iov[2]; + size_t total_ip; + uint16_t port = atoi(pvc->profile->http.rtp_port); + size_t x; + + /* NOTE: BPF filter will insert VLAN header for us */ + memset(pkt.eth.dhost, 255, sizeof(pkt.eth.dhost)); + memset(pkt.eth.shost, 1, sizeof(pkt.eth.shost)); + pkt.eth.ether_type = htobe16(0x0800); + total_ip = sizeof(pkt.ip) + sizeof(pkt.udp) + sizeof(pkt.rtp) + len; + + iov[0].iov_base = pkt.eth.dhost; + iov[0].iov_len = 14 + total_ip - len; + + iov[1].iov_base = alloca(len); + iov[1].iov_len = len; + + /* byte swap data - WAV files are 16-bit little endian */ + for (x = 0; x != (len / 2); x++) + ((uint16_t *)iov[1].iov_base)[x] = bswap16(((uint16_t *)ptr)[x]); + + pkt.ip.hl_ver = 0x45; + pkt.ip.len = htobe16(total_ip); + pkt.ip.ttl = 8; + pkt.ip.protocol = 17; /* UDP */ + pkt.ip.sourceip = 0x01010101U; + pkt.ip.destip = htobe32((239 << 24) + (255 << 16) + (1 << 0)); + pkt.ip.chksum = voss_ipv4_csum((void *)&pkt.ip, sizeof(pkt.ip) / 2); + + pkt.udp.srcport = htobe16(port); + pkt.udp.dstport = htobe16(port); + pkt.udp.len = htobe16(total_ip - sizeof(pkt.ip)); + + pkt.rtp.header8[0] = (2 << 6); + pkt.rtp.header8[1] = ((pvc->channels == 2) ? 10 : 11) | 0x80; + + pkt.rtp.header16[1] = htobe16(pvc->profile->http.rtp_seqnum); + pkt.rtp.header32[1] = htobe32(ts); + pkt.rtp.header32[2] = htobe32(0); + + pkt.udp.chksum = voss_udp_csum(pkt.ip.dest16[0] + pkt.ip.dest16[1] + + pkt.ip.source16[0] + pkt.ip.source16[1] + 0x1100 + pkt.udp.len, + (void *)&pkt.udp, sizeof(pkt.udp) / 2 + sizeof(pkt.rtp) / 2, + iov[1].iov_base, iov[1].iov_len); + + pvc->profile->http.rtp_seqnum++; + pvc->profile->http.rtp_ts += len / (2 * pvc->channels); + + (void)writev(fd, iov, 2); +} + +static void +voss_httpd_send_rtp(vclient_t *pvc, int fd, void *ptr, size_t len, uint32_t ts) +{ + const uint32_t mod = pvc->channels * vclient_sample_bytes(pvc); + const uint32_t max = 1420 - (1420 % mod); + + while (len >= max) { + voss_httpd_send_rtp_sub(pvc, fd, ptr, max, ts); + len -= max; + ptr = (uint8_t *)ptr + max; + } + + if (len != 0) + voss_httpd_send_rtp_sub(pvc, fd, ptr, len, ts); +} + +static size_t +voss_httpd_usage(vclient_t *pvc) +{ + size_t usage = 0; + size_t x; + + for (x = 0; x < pvc->profile->http.nstate; x++) + usage += (pvc->profile->http.state[x].fd != -1); + return (usage); +} + +static char * +voss_httpd_read_line(FILE *io, char *linebuffer, size_t linelen) +{ + char buffer[2]; + size_t size = 0; + + if (fread(buffer, 1, 2, io) != 2) + return (NULL); + + while (1) { + if (buffer[0] == '\r' && buffer[1] == '\n') + break; + if (size == (linelen - 1)) + return (NULL); + linebuffer[size++] = buffer[0]; + buffer[0] = buffer[1]; + if (fread(buffer + 1, 1, 1, io) != 1) + return (NULL); + } + linebuffer[size++] = 0; + + return (linebuffer); +} + +static int +voss_http_generate_wav_header(vclient_t *pvc, FILE *io, + uintmax_t r_start, uintmax_t r_end, bool is_partial) +{ + uint8_t buffer[256]; + uint8_t *ptr; + uintmax_t dummy_len; + uintmax_t delta; + size_t mod; + size_t len; + size_t buflen; + + ptr = buffer; + mod = pvc->channels * vclient_sample_bytes(pvc); + + if (mod == 0 || sizeof(buffer) < (44 + mod - 1)) + return (-1); + + /* align to next sample */ + len = 44 + mod - 1; + len -= len % mod; + + buflen = len; + + /* clear block */ + memset(ptr, 0, len); + + /* fill out data header */ + ptr[len - 8] = 'd'; + ptr[len - 7] = 'a'; + ptr[len - 6] = 't'; + ptr[len - 5] = 'a'; + + /* magic for unspecified length */ + ptr[len - 4] = 0x00; + ptr[len - 3] = 0xF0; + ptr[len - 2] = 0xFF; + ptr[len - 1] = 0x7F; + + /* fill out header */ + *ptr++ = 'R'; + *ptr++ = 'I'; + *ptr++ = 'F'; + *ptr++ = 'F'; + + /* total chunk size - unknown */ + + *ptr++ = 0; + *ptr++ = 0; + *ptr++ = 0; + *ptr++ = 0; + + *ptr++ = 'W'; + *ptr++ = 'A'; + *ptr++ = 'V'; + *ptr++ = 'E'; + *ptr++ = 'f'; + *ptr++ = 'm'; + *ptr++ = 't'; + *ptr++ = ' '; + + /* make sure header fits in PCM block */ + len -= 28; + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* audioformat = PCM */ + + *ptr++ = 0x01; + *ptr++ = 0x00; + + /* number of channels */ + + len = pvc->channels; + + *ptr++ = len; + *ptr++ = len >> 8; + + /* sample rate */ + + len = pvc->sample_rate; + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* byte rate */ + + len = pvc->sample_rate * pvc->channels * vclient_sample_bytes(pvc); + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* block align */ + + len = pvc->channels * vclient_sample_bytes(pvc); + + *ptr++ = len; + *ptr++ = len >> 8; + + /* bits per sample */ + + len = vclient_sample_bytes(pvc) * 8; + + *ptr++ = len; + *ptr++ = len >> 8; + + /* check if alignment is correct */ + if (r_start >= buflen && (r_start % mod) != 0) + return (2); + + dummy_len = pvc->sample_rate * pvc->channels * vclient_sample_bytes(pvc); + dummy_len *= VOSS_HTTPD_MAX_STREAM_TIME; + + /* fixup end */ + if (r_end >= dummy_len) + r_end = dummy_len - 1; + + delta = r_end - r_start + 1; + + if (is_partial) { + fprintf(io, "HTTP/1.1 206 Partial Content\r\n" + "Content-Type: audio/wav\r\n" + "Server: virtual_oss/1.0\r\n" + "Cache-Control: no-cache, no-store\r\n" + "Expires: Mon, 26 Jul 1997 05:00:00 GMT\r\n" + "Connection: Close\r\n" + "Content-Range: bytes %ju-%ju/%ju\r\n" + "Content-Length: %ju\r\n" + "\r\n", r_start, r_end, dummy_len, delta); + } else { + fprintf(io, "HTTP/1.0 200 OK\r\n" + "Content-Type: audio/wav\r\n" + "Server: virtual_oss/1.0\r\n" + "Cache-Control: no-cache, no-store\r\n" + "Expires: Mon, 26 Jul 1997 05:00:00 GMT\r\n" + "Connection: Close\r\n" + "Content-Length: %ju\r\n" + "\r\n", dummy_len); + } + + /* check if we should insert a header */ + if (r_start < buflen) { + buflen -= r_start; + if (buflen > delta) + buflen = delta; + /* send data */ + if (fwrite(buffer + r_start, buflen, 1, io) != 1) + return (-1); + /* check if all data was read */ + if (buflen == delta) + return (1); + } + return (0); +} + +static void +voss_httpd_handle_connection(vclient_t *pvc, int fd, const struct sockaddr_in *sa) +{ + char linebuffer[2048]; + uintmax_t r_start = 0; + uintmax_t r_end = -1ULL; + bool is_partial = false; + char *line; + FILE *io; + size_t x; + int page; + + io = fdopen(fd, "r+"); + if (io == NULL) + goto done; + + page = -1; + + /* dump HTTP request header */ + while (1) { + line = voss_httpd_read_line(io, linebuffer, sizeof(linebuffer)); + if (line == NULL) + goto done; + if (line[0] == 0) + break; + if (page < 0 && (strstr(line, "GET / ") == line || + strstr(line, "GET /index.html") == line)) { + page = 0; + } else if (page < 0 && strstr(line, "GET /stream.wav") == line) { + page = 1; + } else if (page < 0 && strstr(line, "GET /stream.m3u") == line) { + page = 2; + } else if (strstr(line, "Range: bytes=") == line && + sscanf(line, "Range: bytes=%ju-%ju", &r_start, &r_end) >= 1) { + is_partial = true; + } + } + + switch (page) { + case 0: + x = voss_httpd_usage(pvc); + + fprintf(io, "HTTP/1.0 200 OK\r\n" + "Content-Type: text/html\r\n" + "Server: virtual_oss/1.0\r\n" + "Cache-Control: no-cache, no-store\r\n" + "Expires: Mon, 26 Jul 1997 05:00:00 GMT\r\n" + "\r\n" + "<html><head><title>Welcome to live streaming</title>" + "<meta http-equiv=\"Cache-Control\" content=\"no-cache, no-store, must-revalidate\" />" + "<meta http-equiv=\"Pragma\" content=\"no-cache\" />" + "<meta http-equiv=\"Expires\" content=\"0\" />" + "</head>" + "<body>" + "<h1>Live HD stream</h1>" + "<br>" + "<br>" + "<h2>Alternative 1 (recommended)</h2>" + "<ol type=\"1\">" + "<li>Install <a href=\"https://www.videolan.org\">VideoLanClient (VLC)</a>, from App- or Play-store free of charge</li>" + "<li>Open VLC and select Network Stream</li>" + "<li>Enter, copy or share this network address to VLC: <a href=\"http://%s:%s/stream.m3u\">http://%s:%s/stream.m3u</a></li>" + "</ol>" + "<br>" + "<br>" + "<h2>Alternative 2 (on your own)</h2>" + "<br>" + "<br>" + "<audio id=\"audio\" controls=\"true\" src=\"stream.wav\" preload=\"none\"></audio>" + "<br>" + "<br>", + pvc->profile->http.host, pvc->profile->http.port, + pvc->profile->http.host, pvc->profile->http.port); + + if (x == pvc->profile->http.nstate) + fprintf(io, "<h2>There are currently no free slots (%zu active). Try again later!</h2>", x); + else + fprintf(io, "<h2>There are %zu free slots (%zu active)</h2>", pvc->profile->http.nstate - x, x); + + fprintf(io, "</body></html>"); + break; + case 1: + for (x = 0; x < pvc->profile->http.nstate; x++) { + if (pvc->profile->http.state[x].fd >= 0) + continue; + switch (voss_http_generate_wav_header(pvc, io, r_start, r_end, is_partial)) { + static const int enable = 1; + + case 0: + fflush(io); + fdclose(io, NULL); + if (ioctl(fd, FIONBIO, &enable) != 0) { + close(fd); + return; + } + pvc->profile->http.state[x].ts = + virtual_oss_timestamp() - 1000000000ULL; + pvc->profile->http.state[x].fd = fd; + return; + case 1: + fclose(io); + return; + case 2: + fprintf(io, "HTTP/1.1 416 Range Not Satisfiable\r\n" + "Server: virtual_oss/1.0\r\n" + "\r\n"); + goto done; + default: + goto done; + } + } + fprintf(io, "HTTP/1.0 503 Out of Resources\r\n" + "Server: virtual_oss/1.0\r\n" + "\r\n"); + break; + case 2: + fprintf(io, "HTTP/1.0 200 OK\r\n" + "Content-Type: audio/mpegurl\r\n" + "Server: virtual_oss/1.0\r\n" + "Cache-Control: no-cache, no-store\r\n" + "Expires: Mon, 26 Jul 1997 05:00:00 GMT\r\n" + "\r\n"); + if (sa->sin_family == AF_INET && pvc->profile->http.rtp_port != NULL) { + fprintf(io, "rtp://239.255.0.1:%s\r\n", pvc->profile->http.rtp_port); + } else { + fprintf(io, "http://%s:%s/stream.wav\r\n", + pvc->profile->http.host, pvc->profile->http.port); + } + break; + default: + fprintf(io, "HTTP/1.0 404 Not Found\r\n" + "Content-Type: text/html\r\n" + "Server: virtual_oss/1.0\r\n" + "\r\n" + "<html><head><title>virtual_oss</title></head>" + "<body>" + "<h1>Invalid page requested! " + "<a HREF=\"index.html\">Click here to go back</a>.</h1><br>" + "</body>" + "</html>"); + break; + } +done: + if (io != NULL) + fclose(io); + else + close(fd); +} + +static int +voss_httpd_do_listen(vclient_t *pvc, const char *host, const char *port, + struct pollfd *pfd, int num_sock, int buffer) +{ + static const struct timeval timeout = {.tv_sec = 1}; + struct addrinfo hints = {}; + struct addrinfo *res; + struct addrinfo *res0; + int error; + int flag; + int s; + int ns = 0; + + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = SOCK_STREAM; + hints.ai_protocol = IPPROTO_TCP; + hints.ai_flags = AI_PASSIVE; + + if ((error = getaddrinfo(host, port, &hints, &res))) + return (-1); + + res0 = res; + + do { + if ((s = socket(res0->ai_family, res0->ai_socktype, + res0->ai_protocol)) < 0) + continue; + + flag = 1; + setsockopt(s, SOL_SOCKET, SO_REUSEPORT, &flag, (int)sizeof(flag)); + setsockopt(s, SOL_SOCKET, SO_SNDBUF, &buffer, (int)sizeof(buffer)); + setsockopt(s, SOL_SOCKET, SO_RCVBUF, &buffer, (int)sizeof(buffer)); + setsockopt(s, SOL_SOCKET, SO_SNDTIMEO, &timeout, (int)sizeof(timeout)); + setsockopt(s, SOL_SOCKET, SO_RCVTIMEO, &timeout, (int)sizeof(timeout)); + + if (bind(s, res0->ai_addr, res0->ai_addrlen) == 0) { + if (listen(s, pvc->profile->http.nstate) == 0) { + if (ns < num_sock) { + pfd[ns++].fd = s; + continue; + } + close(s); + break; + } + } + close(s); + } while ((res0 = res0->ai_next) != NULL); + + freeaddrinfo(res); + + return (ns); +} + +static size_t +voss_httpd_buflimit(vclient_t *pvc) +{ + /* don't buffer more than 250ms */ + return ((pvc->sample_rate / 4) * + pvc->channels * vclient_sample_bytes(pvc)); +}; + +static void +voss_httpd_server(vclient_t *pvc) +{ + const size_t bufferlimit = voss_httpd_buflimit(pvc); + const char *host = pvc->profile->http.host; + const char *port = pvc->profile->http.port; + struct sockaddr sa = {}; + struct pollfd fds[VOSS_HTTPD_BIND_MAX] = {}; + int nfd; + + nfd = voss_httpd_do_listen(pvc, host, port, fds, VOSS_HTTPD_BIND_MAX, bufferlimit); + if (nfd < 1) { + errx(EX_SOFTWARE, "Could not bind to " + "'%s' and '%s'", host, port); + } + + while (1) { + struct sockaddr_in si; + int ns = nfd; + int c; + int f; + + for (c = 0; c != ns; c++) { + fds[c].events = (POLLIN | POLLRDNORM | POLLRDBAND | POLLPRI | + POLLERR | POLLHUP | POLLNVAL); + fds[c].revents = 0; + } + if (poll(fds, ns, -1) < 0) + errx(EX_SOFTWARE, "Polling failed"); + + for (c = 0; c != ns; c++) { + socklen_t socklen = sizeof(sa); + + if (fds[c].revents == 0) + continue; + f = accept(fds[c].fd, &sa, &socklen); + if (f < 0) + continue; + memcpy(&si, &sa, sizeof(sa)); + voss_httpd_handle_connection(pvc, f, &si); + } + } +} + +static void +voss_httpd_streamer(vclient_t *pvc) +{ + const size_t bufferlimit = voss_httpd_buflimit(pvc); + uint8_t *ptr; + size_t len; + uint64_t ts; + size_t x; + + atomic_lock(); + while (1) { + if (vclient_export_read_locked(pvc) != 0) { + atomic_wait(); + continue; + } + vring_get_read(&pvc->rx_ring[1], &ptr, &len); + if (len == 0) { + /* try to avoid ring wraps */ + vring_reset(&pvc->rx_ring[1]); + atomic_wait(); + continue; + } + atomic_unlock(); + + ts = virtual_oss_timestamp(); + + /* check if we should send RTP data, if any */ + if (pvc->profile->http.rtp_fd > -1) { + voss_httpd_send_rtp(pvc, pvc->profile->http.rtp_fd, + ptr, len, pvc->profile->http.rtp_ts); + } + + /* send HTTP data, if any */ + for (x = 0; x < pvc->profile->http.nstate; x++) { + int fd = pvc->profile->http.state[x].fd; + uint64_t delta = ts - pvc->profile->http.state[x].ts; + uint8_t buf[1]; + int write_len; + + if (fd < 0) { + /* do nothing */ + } else if (delta >= (8ULL * 1000000000ULL)) { + /* no data for 8 seconds - terminate */ + pvc->profile->http.state[x].fd = -1; + close(fd); + } else if (read(fd, buf, sizeof(buf)) != -1 || errno != EWOULDBLOCK) { + pvc->profile->http.state[x].fd = -1; + close(fd); + } else if (ioctl(fd, FIONWRITE, &write_len) < 0) { + pvc->profile->http.state[x].fd = -1; + close(fd); + } else if ((ssize_t)(bufferlimit - write_len) < (ssize_t)len) { + /* do nothing */ + } else if (write(fd, ptr, len) != (ssize_t)len) { + pvc->profile->http.state[x].fd = -1; + close(fd); + } else { + /* update timestamp */ + pvc->profile->http.state[x].ts = ts; + } + } + + atomic_lock(); + vring_inc_read(&pvc->rx_ring[1], len); + } +} + +const char * +voss_httpd_start(vprofile_t *pvp) +{ + vclient_t *pvc; + pthread_t td; + int error; + size_t x; + + if (pvp->http.host == NULL || pvp->http.port == NULL || pvp->http.nstate == 0) + return (NULL); + + pvp->http.state = malloc(sizeof(pvp->http.state[0]) * pvp->http.nstate); + if (pvp->http.state == NULL) + return ("Could not allocate HTTP states"); + + for (x = 0; x != pvp->http.nstate; x++) { + pvp->http.state[x].fd = -1; + pvp->http.state[x].ts = 0; + } + + pvc = vclient_alloc(); + if (pvc == NULL) + return ("Could not allocate client for HTTP server"); + + pvc->profile = pvp; + + if (pvp->http.rtp_ifname != NULL) { + const char *perr; + + if (pvc->channels > 2) + return ("RTP only supports 44.1kHz, 1 or 2 channels at 16-bit depth"); + + /* bind to UDP port */ + perr = voss_httpd_bind_rtp(pvc, pvp->http.rtp_ifname, + &pvp->http.rtp_fd); + if (perr != NULL) + return (perr); + + /* setup buffers */ + error = vclient_setup_buffers(pvc, 0, 0, + pvp->channels, AFMT_S16_LE, 44100); + } else { + pvp->http.rtp_fd = -1; + + /* setup buffers */ + error = vclient_setup_buffers(pvc, 0, 0, pvp->channels, + vclient_get_default_fmt(pvp, VTYPE_WAV_HDR), + voss_dsp_sample_rate); + } + + if (error != 0) { + vclient_free(pvc); + return ("Could not allocate buffers for HTTP server"); + } + + /* trigger enabled */ + pvc->rx_enabled = 1; + + pvc->type = VTYPE_OSS_DAT; + + atomic_lock(); + TAILQ_INSERT_TAIL(&pvp->head, pvc, entry); + atomic_unlock(); + + if (pthread_create(&td, NULL, (void *)&voss_httpd_server, pvc)) + return ("Could not create HTTP daemon thread"); + if (pthread_create(&td, NULL, (void *)&voss_httpd_streamer, pvc)) + return ("Could not create HTTP streamer thread"); + + return (NULL); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/int.h b/usr.sbin/virtual_oss/virtual_oss/int.h new file mode 100644 index 000000000000..a48e33d7f837 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/int.h @@ -0,0 +1,331 @@ +/*- + * Copyright (c) 2012-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _VIRTUAL_INT_H_ +#define _VIRTUAL_INT_H_ + +#include <signal.h> +#include <pthread.h> + +#include <cuse.h> +#include <samplerate.h> + +extern pthread_mutex_t atomic_mtx; +extern pthread_cond_t atomic_cv; + +#define atomic_lock() pthread_mutex_lock(&atomic_mtx) +#define atomic_unlock() pthread_mutex_unlock(&atomic_mtx) +#define atomic_wait() pthread_cond_wait(&atomic_cv, &atomic_mtx) +#define atomic_wakeup() do { \ + pthread_cond_broadcast(&atomic_cv); \ + cuse_poll_wakeup(); \ +} while (0) + +#define AFMT_32BIT \ + (AFMT_S32_LE | AFMT_S32_BE | AFMT_U32_LE | AFMT_U32_BE | \ + AFMT_F32_LE | AFMT_F32_BE) +#define AFMT_24BIT \ + (AFMT_S24_LE | AFMT_S24_BE | AFMT_U24_LE | AFMT_U24_BE) +#define AFMT_16BIT \ + (AFMT_S16_LE | AFMT_S16_BE | AFMT_U16_LE | AFMT_U16_BE) +#define AFMT_8BIT \ + (AFMT_U8 | AFMT_S8) + +#define VMAX_CHAN 64 +/* + * XXX 32 - strlen("/dev") to not exceed OSS_DEVNODE_SIZE in soundcard.h. Also + * silences GCC warnings. + */ +#define VMAX_STRING 27 + +#define VTYPE_OSS_DAT 0 +#define VTYPE_WAV_HDR 1 +#define VTYPE_WAV_DAT 2 + +#define VPREFERRED_SNE_AFMT \ + (AFMT_S8 | AFMT_S16_NE | AFMT_S24_NE | AFMT_S32_NE | AFMT_F32_NE) +#define VPREFERRED_UNE_AFMT \ + (AFMT_U8 | AFMT_U16_NE | AFMT_U24_NE | AFMT_U32_NE) +#define VPREFERRED_SLE_AFMT \ + (AFMT_S8 | AFMT_S16_LE | AFMT_S24_LE | AFMT_S32_LE | AFMT_F32_LE) +#define VPREFERRED_SBE_AFMT \ + (AFMT_S8 | AFMT_S16_BE | AFMT_S24_BE | AFMT_S32_BE | AFMT_F32_BE) +#define VPREFERRED_ULE_AFMT \ + (AFMT_U8 | AFMT_U16_LE | AFMT_U24_LE | AFMT_U32_LE) +#define VPREFERRED_UBE_AFMT \ + (AFMT_U8 | AFMT_U16_BE | AFMT_U24_BE | AFMT_U32_BE) + +#define VSUPPORTED_AFMT \ + (AFMT_S16_BE | AFMT_S16_LE | AFMT_U16_BE | AFMT_U16_LE | \ + AFMT_S24_BE | AFMT_S24_LE | AFMT_U24_BE | AFMT_U24_LE | \ + AFMT_S32_BE | AFMT_S32_LE | AFMT_U32_BE | AFMT_U32_LE | \ + AFMT_F32_BE | AFMT_F32_LE | \ + AFMT_U8 | AFMT_S8) + +#define VVOLUME_UNIT_SHIFT 7 + +struct virtual_profile; + +typedef TAILQ_ENTRY(virtual_profile) vprofile_entry_t; +typedef TAILQ_HEAD(, virtual_profile) vprofile_head_t; +typedef struct virtual_profile vprofile_t; + +struct virtual_client; + +typedef TAILQ_ENTRY(virtual_client) vclient_entry_t; +typedef TAILQ_HEAD(, virtual_client) vclient_head_t; +typedef struct virtual_client vclient_t; + +struct virtual_monitor; +typedef TAILQ_ENTRY(virtual_monitor) vmonitor_entry_t; +typedef TAILQ_HEAD(, virtual_monitor) vmonitor_head_t; +typedef struct virtual_monitor vmonitor_t; + +struct virtual_resample; +typedef struct virtual_resample vresample_t; + +struct cuse_methods; + +struct virtual_compressor { + uint8_t enabled; /* 0..1 */ + uint8_t knee; /* 0..255 */ + uint8_t attack; /* 0..62 */ + uint8_t decay; /* 0..62 */ +}; + +struct virtual_profile { + vprofile_entry_t entry; + vclient_head_t head; + char oss_name[VMAX_STRING]; + char wav_name[VMAX_STRING]; + uint32_t rx_filter_size; + uint32_t tx_filter_size; + double *rx_filter_data[VMAX_CHAN]; + double *tx_filter_data[VMAX_CHAN]; + int64_t rx_peak_value[VMAX_CHAN]; + int64_t tx_peak_value[VMAX_CHAN]; + int8_t rx_shift[VMAX_CHAN]; + int8_t tx_shift[VMAX_CHAN]; + uint8_t rx_src[VMAX_CHAN]; + uint8_t tx_dst[VMAX_CHAN]; + uint8_t rx_mute[VMAX_CHAN]; + uint8_t tx_mute[VMAX_CHAN]; + uint8_t rx_pol[VMAX_CHAN]; + uint8_t tx_pol[VMAX_CHAN]; + uint8_t bits; + uint8_t channels; + struct virtual_compressor rx_compressor_param; + double rx_compressor_gain[VMAX_CHAN]; + uint8_t synchronized; + uint32_t rec_delay; + int fd_sta; + struct { + const char * host; + const char * port; + const char * rtp_ifname; + const char * rtp_port; + volatile struct http_state * state; + size_t nstate; + int rtp_fd; + int rtp_vlanid; + uint32_t rtp_ts; + uint16_t rtp_seqnum; + } http; +}; + +struct virtual_ring { + uint8_t *buf_start; + uint32_t pos_read; + uint32_t total_size; + uint32_t len_write; +}; + +struct virtual_resample { + SRC_DATA data; + SRC_STATE *state; + float *data_in; + float *data_out; +}; + +struct virtual_client { + vclient_entry_t entry; + uint32_t tx_filter_offset; + uint32_t rx_filter_offset; + int64_t *tx_filter_in[VMAX_CHAN]; + int64_t *rx_filter_in[VMAX_CHAN]; + double *tx_filter_out[VMAX_CHAN]; + double *rx_filter_out[VMAX_CHAN]; + struct virtual_ring rx_ring[2]; + struct virtual_ring tx_ring[2]; + vresample_t rx_resample; + vresample_t tx_resample; + struct virtual_profile *profile; + uint64_t rx_samples; + uint64_t rx_timestamp; + uint64_t tx_samples; + uint64_t tx_timestamp; + uint32_t buffer_frags; + uint32_t buffer_size; + uint32_t low_water; + uint32_t rec_delay; + uint32_t rx_noise_rem; + uint32_t tx_noise_rem; + int rx_busy; + int tx_busy; + int channels; + int format; + int rx_enabled; + int tx_enabled; + int rx_volume; + int tx_volume; + int type; /* VTYPE_XXX */ + int sample_rate; + uint32_t buffer_size_set:1; + uint32_t buffer_frags_set:1; + uint32_t sync_busy:1; + uint32_t sync_wakeup:1; + int padding:28; +}; + +struct virtual_monitor { + vmonitor_entry_t entry; + int64_t peak_value; + uint8_t src_chan; + uint8_t dst_chan; + uint8_t pol; + uint8_t mute; + int8_t shift; +}; + +extern vprofile_head_t virtual_profile_client_head; +extern vprofile_head_t virtual_profile_loopback_head; + +extern vmonitor_head_t virtual_monitor_input; +extern vmonitor_head_t virtual_monitor_local; +extern vmonitor_head_t virtual_monitor_output; + +extern const struct cuse_methods vctl_methods; + +extern struct virtual_compressor voss_output_compressor_param; +extern double voss_output_compressor_gain[VMAX_CHAN]; +extern int64_t voss_output_peak[VMAX_CHAN]; +extern int64_t voss_input_peak[VMAX_CHAN]; +extern uint32_t voss_jitter_up; +extern uint32_t voss_jitter_down; +extern uint32_t voss_max_channels; +extern uint32_t voss_mix_channels; +extern uint32_t voss_dsp_samples; +extern uint32_t voss_dsp_max_channels; +extern uint32_t voss_dsp_sample_rate; +extern uint32_t voss_dsp_bits; +extern uint8_t voss_libsamplerate_enable; +extern uint8_t voss_libsamplerate_quality; +extern int voss_is_recording; +extern int voss_has_synchronization; +extern char voss_dsp_rx_device[VMAX_STRING]; +extern char voss_dsp_tx_device[VMAX_STRING]; +extern char voss_ctl_device[VMAX_STRING]; +extern volatile sig_atomic_t voss_exit; + +extern int vring_alloc(struct virtual_ring *, size_t); +extern void vring_free(struct virtual_ring *); +extern void vring_reset(struct virtual_ring *); +extern void vring_get_read(struct virtual_ring *, uint8_t **, size_t *); +extern void vring_get_write(struct virtual_ring *, uint8_t **, size_t *); +extern void vring_inc_read(struct virtual_ring *, size_t); +extern void vring_inc_write(struct virtual_ring *, size_t); +extern size_t vring_total_read_len(struct virtual_ring *); +extern size_t vring_total_write_len(struct virtual_ring *); +extern size_t vring_write_linear(struct virtual_ring *, const uint8_t *, size_t); +extern size_t vring_read_linear(struct virtual_ring *, uint8_t *, size_t); +extern size_t vring_write_zero(struct virtual_ring *, size_t); + +extern vclient_t *vclient_alloc(void); +extern void vclient_free(vclient_t *); + +extern int vclient_get_default_fmt(vprofile_t *, int type); +extern int vclient_setup_buffers(vclient_t *, int size, int frags, + int channels, int format, int sample_rate); +extern int vclient_export_read_locked(vclient_t *); +extern void vclient_import_write_locked(vclient_t *); + +extern uint32_t vclient_sample_bytes(vclient_t *); +extern uint32_t vclient_bufsize_internal(vclient_t *); +extern uint32_t vclient_bufsize_scaled(vclient_t *); + +extern int64_t vclient_noise(uint32_t *, int64_t, int8_t); + +extern vmonitor_t *vmonitor_alloc(int *, vmonitor_head_t *); + +extern uint32_t format_best(uint32_t); +extern void format_import(uint32_t, const uint8_t *, uint32_t, int64_t *); +extern void format_export(uint32_t, const int64_t *, uint8_t *, uint32_t); +extern int64_t format_max(uint32_t); +extern void format_maximum(const int64_t *, int64_t *, uint32_t, uint32_t, int8_t); +extern void format_remix(int64_t *, uint32_t, uint32_t, uint32_t); +extern void format_silence(uint32_t, uint8_t *, uint32_t); + +extern void *virtual_oss_process(void *); + +/* Audio Delay prototypes */ +extern uint32_t voss_ad_last_delay; +extern uint32_t voss_dsp_rx_refresh; +extern uint32_t voss_dsp_tx_refresh; +extern uint8_t voss_ad_enabled; +extern uint8_t voss_ad_output_signal; +extern uint8_t voss_ad_input_channel; +extern uint8_t voss_ad_output_channel; +extern void voss_ad_reset(void); +extern void voss_ad_init(uint32_t); +extern double voss_ad_getput_sample(double); + +/* Add audio options prototype */ +extern void voss_add_options(char *); + +/* Get current timestamp */ +extern uint64_t virtual_oss_delay_ns(void); +extern void virtual_oss_wait(void); +extern uint64_t virtual_oss_timestamp(void); + +/* Fast array multiplication */ +extern void voss_x3_multiply_double(const int64_t *, const double *, double *, const size_t); + +/* Equalizer support */ +extern void vclient_tx_equalizer(struct virtual_client *, int64_t *, size_t); +extern void vclient_rx_equalizer(struct virtual_client *, int64_t *, size_t); +extern int vclient_eq_alloc(struct virtual_client *); +extern void vclient_eq_free(struct virtual_client *); + +/* Internal utilities */ +extern int bt_speaker_main(int argc, char **argv); + +/* Internal compressor */ +extern void voss_compressor(int64_t *, double *, const struct virtual_compressor *, + const unsigned, const unsigned, const int64_t); + +/* HTTP daemon support */ +extern const char *voss_httpd_start(vprofile_t *); + +#endif /* _VIRTUAL_INT_H_ */ diff --git a/usr.sbin/virtual_oss/virtual_oss/main.c b/usr.sbin/virtual_oss/virtual_oss/main.c new file mode 100644 index 000000000000..3f7fb84ce4c6 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/main.c @@ -0,0 +1,2625 @@ +/*- + * Copyright (c) 2012-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> +#include <sys/types.h> +#include <sys/filio.h> +#include <sys/rtprio.h> +#include <sys/nv.h> +#include <sys/sndstat.h> +#include <sys/soundcard.h> + +#include <dlfcn.h> +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <err.h> +#include <sysexits.h> +#include <signal.h> +#include <fcntl.h> +#include <paths.h> + +#include <cuse.h> +#include <pthread.h> + +#include "backend.h" +#include "int.h" +#include "utils.h" +#include "virtual_oss.h" + +pthread_mutex_t atomic_mtx; +pthread_cond_t atomic_cv; + +static void +atomic_init(void) +{ + if (pthread_mutex_init(&atomic_mtx, NULL) != 0) + err(1, "pthread_mutex_init"); + if (pthread_cond_init(&atomic_cv, NULL) != 0) + err(1, "pthread_cond_init"); +} + +uint32_t +vclient_sample_bytes(vclient_t *pvc) +{ + uint32_t fmt = pvc->format; + + if (fmt & AFMT_16BIT) + return (2); + else if (fmt & AFMT_24BIT) + return (3); + else if (fmt & AFMT_32BIT) + return (4); + else if (fmt & AFMT_8BIT) + return (1); + else + return (0); + /* TODO AFMT_BPS */ +} + +static uint32_t +vclient_output_delay(vclient_t *pvc) +{ + uint64_t size; + uint64_t mod; + + if (pvc->tx_busy == 0) + vclient_import_write_locked(pvc); + + mod = pvc->channels * vclient_sample_bytes(pvc); + + size = vring_total_read_len(&pvc->tx_ring[0]); + size = (size / 8) * vclient_sample_bytes(pvc); + + size = (size * (uint64_t)pvc->sample_rate) / + (uint64_t)voss_dsp_sample_rate; + size += vring_total_read_len(&pvc->tx_ring[1]); + size -= size % mod; + + return (size); +} + +static uint32_t +vclient_input_delay(vclient_t *pvc) +{ + if (pvc->rx_busy == 0) + vclient_export_read_locked(pvc); + return (vring_total_read_len(&pvc->rx_ring[1])); +} + +uint32_t +vclient_bufsize_scaled(vclient_t *pvc) +{ + uint32_t samples_scaled = ((uint64_t)voss_dsp_samples * + (uint64_t)pvc->sample_rate) / (uint64_t)voss_dsp_sample_rate; + if (samples_scaled == 0) + samples_scaled = 1; + return (pvc->channels * samples_scaled * vclient_sample_bytes(pvc)); +} + +static uint64_t +vclient_bufsize_consumed(vclient_t *pvc, uint64_t ts) +{ + int64_t delta; + int64_t samples_scaled; + int64_t retval; + + delta = virtual_oss_timestamp() - ts; + if (delta < 0) + delta = 0; + samples_scaled = (delta * (uint64_t)pvc->sample_rate) / 1000000000ULL; + if (samples_scaled < 0) + samples_scaled = 0; + retval = pvc->channels * samples_scaled * vclient_sample_bytes(pvc); + if (retval < 0) + retval = 0; + return (retval); +} + +/* + * VLC and some other audio player use this value for jitter + * computations and expect it to be very accurate. VirtualOSS is block + * based and does not have sample accuracy. Use the system clock to + * update this value as we go along instead: + */ +static uint32_t +vclient_output_delay_adjusted(vclient_t *pvc) +{ + int64_t retval = vclient_output_delay(pvc) - + vclient_bufsize_consumed(pvc, pvc->tx_timestamp); + if (retval < 0) + retval = 0; + return (retval); +} + +vmonitor_t * +vmonitor_alloc(int *pid, vmonitor_head_t *phead) +{ + int id = 0; + vmonitor_t *pvm; + + TAILQ_FOREACH(pvm, phead, entry) + id++; + + if (id >= 64) { + *pid = 0; + return (NULL); + } + pvm = malloc(sizeof(*pvm)); + if (pvm == NULL) { + *pid = 0; + return (NULL); + } + memset(pvm, 0, sizeof(*pvm)); + + pvm->mute = 1; + + TAILQ_INSERT_TAIL(phead, pvm, entry); + + *pid = id; + return (pvm); +} + +int64_t +vclient_noise(uint32_t *pnoise, int64_t volume, int8_t shift) +{ + const uint32_t prime = 0xFFFF1DU; + int64_t temp; + + /* compute next noise sample */ + temp = *pnoise; + if (temp & 1) + temp += prime; + temp /= 2; + *pnoise = temp; + + /* unsigned to signed conversion */ + temp ^= 0x800000ULL; + if (temp & 0x800000U) + temp |= -0x800000ULL; + + /* properly amplify */ + temp *= volume; + + /* bias shift */ + shift -= 23 + VVOLUME_UNIT_SHIFT; + + /* range check and shift noise */ + if (__predict_false(shift < -63 || shift > 63)) + temp = 0; + else if (shift < 0) + temp >>= -shift; + else + temp <<= shift; + + return (temp); +} + +static void +vresample_free(vresample_t *pvr) +{ + if (pvr->state != NULL) + src_delete(pvr->state); + free(pvr->data_in); + free(pvr->data_out); + memset(pvr, 0, sizeof(*pvr)); +} + +static int +vresample_setup(vclient_t *pvc, vresample_t *pvr, int samples) +{ + int code = 0; + + if (pvr->state != NULL) + return (0); + pvr->state = src_new(voss_libsamplerate_quality, pvc->channels, &code); + if (pvr->state == NULL) + goto error; + pvr->data_in = malloc(sizeof(float) * samples); + if (pvr->data_in == NULL) + goto error; + pvr->data_out = malloc(sizeof(float) * samples); + if (pvr->data_out == NULL) + goto error; + pvr->data.data_in = pvr->data_in; + pvr->data.data_out = pvr->data_out; + return (0); +error: + vresample_free(pvr); + return (CUSE_ERR_NO_MEMORY); +} + +void +vclient_free(vclient_t *pvc) +{ + vresample_free(&pvc->rx_resample); + vresample_free(&pvc->tx_resample); + + /* free equalizer */ + vclient_eq_free(pvc); + + /* free ring buffers */ + vring_free(&pvc->rx_ring[0]); + vring_free(&pvc->rx_ring[1]); + vring_free(&pvc->tx_ring[0]); + vring_free(&pvc->tx_ring[1]); + + free(pvc); +} + +vclient_t * +vclient_alloc(void) +{ + vclient_t *pvc; + + pvc = malloc(sizeof(*pvc)); + if (pvc == NULL) + return (NULL); + + memset(pvc, 0, sizeof(*pvc)); + + pvc->rx_noise_rem = 1; + pvc->tx_noise_rem = 1; + pvc->rx_volume = 1 << VVOLUME_UNIT_SHIFT; + pvc->tx_volume = 1 << VVOLUME_UNIT_SHIFT; + + return (pvc); +} + +int +vclient_get_default_fmt(vprofile_t *pvp, int type) +{ + int retval; + + if (type == VTYPE_WAV_HDR) { + switch (pvp->bits) { + case 16: + retval = AFMT_S16_LE; + break; + case 24: + retval = AFMT_S24_LE; + break; + case 32: + retval = AFMT_S32_LE; + break; + default: + retval = AFMT_S8; + break; + } + } else { + switch (pvp->bits) { + case 16: + retval = AFMT_S16_NE; + break; + case 24: + retval = AFMT_S24_NE; + break; + case 32: + retval = AFMT_S32_NE; + break; + default: + retval = AFMT_S8; + break; + } + } + return (retval); +} + +int +vclient_setup_buffers(vclient_t *pvc, int size, int frags, + int channels, int format, int sample_rate) +{ + size_t bufsize_internal; + size_t bufsize_min; + size_t mod_internal; + size_t mod; + uint64_t ts; + int bufsize; + + /* check we are not busy */ + if (pvc->rx_busy || pvc->tx_busy) + return (CUSE_ERR_BUSY); + + /* free equalizer */ + vclient_eq_free(pvc); + + /* free existing ring buffers */ + vring_free(&pvc->rx_ring[0]); + vring_free(&pvc->rx_ring[1]); + vring_free(&pvc->tx_ring[0]); + vring_free(&pvc->tx_ring[1]); + + /* reset resampler */ + vresample_free(&pvc->rx_resample); + vresample_free(&pvc->tx_resample); + + if (sample_rate > 0) + pvc->sample_rate = sample_rate; + if (format != 0) + pvc->format = format; + if (channels > 0) + pvc->channels = channels; + + mod = pvc->channels * vclient_sample_bytes(pvc); + mod_internal = pvc->channels * 8; + + if (size > 0) { + size += mod - 1; + size -= size % mod; + + pvc->buffer_size = size; + pvc->buffer_size_set = 1; + } else if (pvc->buffer_size_set == 0) + pvc->buffer_size = vclient_bufsize_scaled(pvc); + + pvc->low_water = pvc->buffer_size; + + if (frags > 0) { + pvc->buffer_frags = frags; + pvc->buffer_frags_set = 1; + } else if (pvc->buffer_frags_set == 0) + pvc->buffer_frags = 2; + + /* sanity checks */ + if (frags < 0 || size < 0) + return (CUSE_ERR_INVALID); + if (pvc->format == 0) + return (CUSE_ERR_INVALID); + if (pvc->buffer_frags <= 0 || pvc->buffer_frags >= 1024) + return (CUSE_ERR_INVALID); + if (pvc->buffer_size <= 0 || pvc->buffer_size >= (1024 * 1024)) + return (CUSE_ERR_INVALID); + if ((pvc->buffer_size * pvc->buffer_frags) >= (128 * 1024 * 1024)) + return (CUSE_ERR_INVALID); + if (pvc->channels <= 0 || pvc->channels > pvc->profile->channels) + return (CUSE_ERR_INVALID); + + /* get buffer sizes */ + bufsize = pvc->buffer_frags * pvc->buffer_size; + bufsize_internal = ((uint64_t)bufsize * (uint64_t)voss_dsp_sample_rate * 8ULL) / + ((uint64_t)pvc->sample_rate * (uint64_t)vclient_sample_bytes(pvc)); + + bufsize_min = voss_dsp_samples * pvc->channels * 8; + + /* check for too small buffer size */ + if (bufsize_internal < bufsize_min) + return (CUSE_ERR_INVALID); + + /* allow for jitter */ + bufsize_internal *= 2ULL; + + /* align buffer size */ + bufsize_internal += (mod_internal - 1); + bufsize_internal -= (bufsize_internal % mod_internal); + + /* allocate new buffers */ + if (vring_alloc(&pvc->rx_ring[0], bufsize_internal)) + goto err_0; + if (vring_alloc(&pvc->rx_ring[1], bufsize)) + goto err_1; + if (vring_alloc(&pvc->tx_ring[0], bufsize_internal)) + goto err_2; + if (vring_alloc(&pvc->tx_ring[1], bufsize)) + goto err_3; + if (vclient_eq_alloc(pvc)) + goto err_4; + + ts = virtual_oss_timestamp(); + + pvc->rx_samples = 0; + pvc->tx_samples = 0; + pvc->tx_timestamp = ts; + pvc->rx_timestamp = ts; + + return (0); + +err_4: + vring_free(&pvc->tx_ring[1]); +err_3: + vring_free(&pvc->tx_ring[0]); +err_2: + vring_free(&pvc->rx_ring[1]); +err_1: + vring_free(&pvc->rx_ring[0]); +err_0: + return (CUSE_ERR_NO_MEMORY); +} + +static int +vclient_open_sub(struct cuse_dev *pdev, int fflags __unused, int type) +{ + vclient_t *pvc; + vprofile_t *pvp; + int error; + + pvp = cuse_dev_get_priv0(pdev); + + pvc = vclient_alloc(); + if (pvc == NULL) + return (CUSE_ERR_NO_MEMORY); + + pvc->profile = pvp; + + /* setup buffers */ + error = vclient_setup_buffers(pvc, 0, 0, pvp->channels, + vclient_get_default_fmt(pvp, type), voss_dsp_sample_rate); + if (error != 0) { + vclient_free(pvc); + return (error); + } + + pvc->type = type; + + cuse_dev_set_per_file_handle(pdev, pvc); + + atomic_lock(); + /* only allow one synchronization source at a time */ + if (pvc->profile->synchronized) { + if (voss_has_synchronization != 0) + error = CUSE_ERR_BUSY; + else + voss_has_synchronization++; + } + if (error == 0) + TAILQ_INSERT_TAIL(&pvc->profile->head, pvc, entry); + atomic_unlock(); + + return (error); +} + +static int +vclient_open_wav(struct cuse_dev *pdev, int fflags) +{ + return (vclient_open_sub(pdev, fflags, VTYPE_WAV_HDR)); +} + +static int +vclient_open_oss(struct cuse_dev *pdev, int fflags) +{ + return (vclient_open_sub(pdev, fflags, VTYPE_OSS_DAT)); +} + +static int +vclient_close(struct cuse_dev *pdev, int fflags __unused) +{ + vclient_t *pvc; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (CUSE_ERR_INVALID); + + atomic_lock(); + if (pvc->profile->synchronized) { + voss_has_synchronization--; + + /* wait for virtual_oss_process(), if any */ + while (pvc->sync_busy) { + pvc->sync_wakeup = 1; + atomic_wakeup(); + atomic_wait(); + } + } + TAILQ_REMOVE(&pvc->profile->head, pvc, entry); + atomic_unlock(); + + vclient_free(pvc); + + return (0); +} + +static int +vclient_read_silence_locked(vclient_t *pvc) +{ + size_t size; + int delta_in; + + delta_in = pvc->profile->rec_delay - pvc->rec_delay; + if (delta_in < 1) + return (0); + + size = delta_in * pvc->channels * 8; + size = vring_write_zero(&pvc->rx_ring[0], size); + pvc->rec_delay += size / (pvc->channels * 8); + + delta_in = pvc->profile->rec_delay - pvc->rec_delay; + if (delta_in < 1) + return (0); + + return (1); +} + +static int +vclient_generate_wav_header_locked(vclient_t *pvc) +{ + uint8_t *ptr; + size_t mod; + size_t len; + + vring_get_write(&pvc->rx_ring[1], &ptr, &len); + + mod = pvc->channels * vclient_sample_bytes(pvc); + + if (mod == 0 || len < (44 + mod - 1)) + return (CUSE_ERR_INVALID); + + /* align to next sample */ + len = 44 + mod - 1; + len -= len % mod; + + /* pre-advance write pointer */ + vring_inc_write(&pvc->rx_ring[1], len); + + /* clear block */ + memset(ptr, 0, len); + + /* fill out data header */ + ptr[len - 8] = 'd'; + ptr[len - 7] = 'a'; + ptr[len - 6] = 't'; + ptr[len - 5] = 'a'; + + /* magic for unspecified length */ + ptr[len - 4] = 0x00; + ptr[len - 3] = 0xF0; + ptr[len - 2] = 0xFF; + ptr[len - 1] = 0x7F; + + /* fill out header */ + *ptr++ = 'R'; + *ptr++ = 'I'; + *ptr++ = 'F'; + *ptr++ = 'F'; + + /* total chunk size - unknown */ + + *ptr++ = 0; + *ptr++ = 0; + *ptr++ = 0; + *ptr++ = 0; + + *ptr++ = 'W'; + *ptr++ = 'A'; + *ptr++ = 'V'; + *ptr++ = 'E'; + *ptr++ = 'f'; + *ptr++ = 'm'; + *ptr++ = 't'; + *ptr++ = ' '; + + /* make sure header fits in PCM block */ + len -= 28; + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* audioformat = PCM */ + + *ptr++ = 0x01; + *ptr++ = 0x00; + + /* number of channels */ + + len = pvc->channels; + + *ptr++ = len; + *ptr++ = len >> 8; + + /* sample rate */ + + len = pvc->sample_rate; + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* byte rate */ + + len = pvc->sample_rate * pvc->channels * vclient_sample_bytes(pvc); + + *ptr++ = len; + *ptr++ = len >> 8; + *ptr++ = len >> 16; + *ptr++ = len >> 24; + + /* block align */ + + len = pvc->channels * vclient_sample_bytes(pvc); + + *ptr++ = len; + *ptr++ = len >> 8; + + /* bits per sample */ + + len = vclient_sample_bytes(pvc) * 8; + + *ptr++ = len; + *ptr++ = len >> 8; + + return (0); +} + +int +vclient_export_read_locked(vclient_t *pvc) __requires_exclusive(atomic_mtx) +{ + enum { MAX_FRAME = 1024 }; + size_t dst_mod; + size_t src_mod; + int error; + + if (pvc->type == VTYPE_WAV_HDR) { + error = vclient_generate_wav_header_locked(pvc); + if (error != 0) + return (error); + /* only write header once */ + pvc->type = VTYPE_WAV_DAT; + } + error = vclient_read_silence_locked(pvc); + if (error != 0) + return (0); + + dst_mod = pvc->channels * vclient_sample_bytes(pvc); + src_mod = pvc->channels * 8; + + if (pvc->sample_rate == (int)voss_dsp_sample_rate) { + while (1) { + uint8_t *src_ptr; + size_t src_len; + uint8_t *dst_ptr; + size_t dst_len; + + vring_get_read(&pvc->rx_ring[0], &src_ptr, &src_len); + vring_get_write(&pvc->rx_ring[1], &dst_ptr, &dst_len); + + src_len /= src_mod; + dst_len /= dst_mod; + + /* compare number of samples */ + if (dst_len > src_len) + dst_len = src_len; + else + src_len = dst_len; + + if (dst_len == 0) + break; + + src_len *= src_mod; + dst_len *= dst_mod; + + format_export(pvc->format, + (const int64_t *)(uintptr_t)src_ptr, + dst_ptr, dst_len); + + vring_inc_read(&pvc->rx_ring[0], src_len); + vring_inc_write(&pvc->rx_ring[1], dst_len); + } + } else { + vresample_t *pvr = &pvc->rx_resample; + + if (vresample_setup(pvc, pvr, MAX_FRAME * pvc->channels) != 0) + return (CUSE_ERR_NO_MEMORY); + + while (1) { + uint8_t *src_ptr; + size_t src_len; + uint8_t *dst_ptr; + size_t dst_len; + int64_t temp[MAX_FRAME * pvc->channels]; + size_t samples; + size_t y; + + vring_get_read(&pvc->rx_ring[0], &src_ptr, &src_len); + vring_get_write(&pvc->rx_ring[1], &dst_ptr, &dst_len); + + src_len /= src_mod; + dst_len /= dst_mod; + + /* compare number of samples */ + if (dst_len > src_len) + dst_len = src_len; + else + src_len = dst_len; + + if (dst_len > MAX_FRAME) + dst_len = src_len = MAX_FRAME; + + if (dst_len == 0) + break; + + src_len *= src_mod; + dst_len *= dst_mod; + + for (y = 0; y != src_len; y += 8) { + pvr->data_in[y / 8] = + *(int64_t *)(uintptr_t)(src_ptr + y); + } + + /* setup parameters for transform */ + pvr->data.input_frames = src_len / src_mod; + pvr->data.output_frames = dst_len / dst_mod; + pvr->data.src_ratio = (float)pvc->sample_rate / (float)voss_dsp_sample_rate; + + pvc->rx_busy = 1; + atomic_unlock(); + error = src_process(pvr->state, &pvr->data); + atomic_lock(); + pvc->rx_busy = 0; + + if (error != 0) + break; + + src_len = pvr->data.input_frames_used * src_mod; + dst_len = pvr->data.output_frames_gen * dst_mod; + + samples = pvr->data.output_frames_gen * pvc->channels; + + for (y = 0; y != samples; y++) + temp[y] = pvr->data_out[y]; + + format_export(pvc->format, temp, dst_ptr, dst_len); + + vring_inc_read(&pvc->rx_ring[0], src_len); + vring_inc_write(&pvc->rx_ring[1], dst_len); + + /* check if no data was moved */ + if (src_len == 0 && dst_len == 0) + break; + } + } + if (pvc->sync_busy) + atomic_wakeup(); + return (0); +} + +static int +vclient_read(struct cuse_dev *pdev, int fflags, + void *peer_ptr, int len) +{ + vclient_t *pvc; + + int error; + int retval; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (CUSE_ERR_INVALID); + + atomic_lock(); + + if (pvc->rx_busy) { + atomic_unlock(); + return (CUSE_ERR_BUSY); + } + pvc->rx_enabled = 1; + + retval = 0; + + while (len > 0) { + uint8_t *buf_ptr; + size_t buf_len; + + error = vclient_export_read_locked(pvc); + if (error != 0) { + retval = error; + break; + } + + vring_get_read(&pvc->rx_ring[1], &buf_ptr, &buf_len); + + if (buf_len == 0) { + /* out of data */ + if (fflags & CUSE_FFLAG_NONBLOCK) { + if (retval == 0) + retval = CUSE_ERR_WOULDBLOCK; + break; + } + pvc->rx_busy = 1; + atomic_wait(); + pvc->rx_busy = 0; + if (cuse_got_peer_signal() == 0) { + if (retval == 0) + retval = CUSE_ERR_SIGNAL; + break; + } + continue; + } + if ((int)buf_len > len) + buf_len = len; + + pvc->rx_busy = 1; + atomic_unlock(); + error = cuse_copy_out(buf_ptr, peer_ptr, buf_len); + atomic_lock(); + pvc->rx_busy = 0; + + if (error != 0) { + retval = error; + break; + } + peer_ptr = ((uint8_t *)peer_ptr) + buf_len; + retval += buf_len; + len -= buf_len; + + vring_inc_read(&pvc->rx_ring[1], buf_len); + } + atomic_unlock(); + + return (retval); +} + +void +vclient_import_write_locked(vclient_t *pvc) __requires_exclusive(atomic_mtx) +{ + enum { MAX_FRAME = 1024 }; + size_t dst_mod; + size_t src_mod; + + dst_mod = pvc->channels * 8; + src_mod = pvc->channels * vclient_sample_bytes(pvc); + + if (pvc->sample_rate == (int)voss_dsp_sample_rate) { + while (1) { + uint8_t *src_ptr; + size_t src_len; + uint8_t *dst_ptr; + size_t dst_len; + + vring_get_read(&pvc->tx_ring[1], &src_ptr, &src_len); + vring_get_write(&pvc->tx_ring[0], &dst_ptr, &dst_len); + + src_len /= src_mod; + dst_len /= dst_mod; + + /* compare number of samples */ + if (dst_len > src_len) + dst_len = src_len; + else + src_len = dst_len; + + if (dst_len == 0) + break; + + src_len *= src_mod; + dst_len *= dst_mod; + + format_import(pvc->format, src_ptr, src_len, + (int64_t *)(uintptr_t)dst_ptr); + + vring_inc_read(&pvc->tx_ring[1], src_len); + vring_inc_write(&pvc->tx_ring[0], dst_len); + } + } else { + vresample_t *pvr = &pvc->tx_resample; + + if (vresample_setup(pvc, pvr, MAX_FRAME * pvc->channels) != 0) + return; + + while (1) { + uint8_t *src_ptr; + size_t src_len; + uint8_t *dst_ptr; + size_t dst_len; + int64_t temp[MAX_FRAME * pvc->channels]; + size_t samples; + size_t y; + int error; + + vring_get_read(&pvc->tx_ring[1], &src_ptr, &src_len); + vring_get_write(&pvc->tx_ring[0], &dst_ptr, &dst_len); + + src_len /= src_mod; + dst_len /= dst_mod; + + /* compare number of samples */ + if (dst_len > src_len) + dst_len = src_len; + else + src_len = dst_len; + + if (dst_len > MAX_FRAME) + dst_len = src_len = MAX_FRAME; + + if (dst_len == 0) + break; + + src_len *= src_mod; + dst_len *= dst_mod; + + format_import(pvc->format, src_ptr, src_len, temp); + + src_len /= vclient_sample_bytes(pvc); + + for (y = 0; y != src_len; y++) + pvr->data_in[y] = temp[y]; + + src_len *= vclient_sample_bytes(pvc); + + /* setup parameters for transform */ + pvr->data.input_frames = src_len / src_mod; + pvr->data.output_frames = dst_len / dst_mod; + pvr->data.src_ratio = (float)voss_dsp_sample_rate / (float)pvc->sample_rate; + + pvc->tx_busy = 1; + atomic_unlock(); + error = src_process(pvr->state, &pvr->data); + atomic_lock(); + pvc->tx_busy = 0; + + if (error != 0) + break; + + src_len = pvr->data.input_frames_used * src_mod; + dst_len = pvr->data.output_frames_gen * dst_mod; + + samples = pvr->data.output_frames_gen * pvc->channels; + + for (y = 0; y != samples; y++) { + ((int64_t *)(uintptr_t)dst_ptr)[y] = + pvr->data_out[y]; + } + + vring_inc_read(&pvc->tx_ring[1], src_len); + vring_inc_write(&pvc->tx_ring[0], dst_len); + + /* check if no data was moved */ + if (src_len == 0 && dst_len == 0) + break; + } + } + if (pvc->sync_busy) + atomic_wakeup(); +} + +static int +vclient_write_oss(struct cuse_dev *pdev, int fflags, + const void *peer_ptr, int len) +{ + vclient_t *pvc; + + int error; + int retval; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (CUSE_ERR_INVALID); + + retval = 0; + + atomic_lock(); + + if (pvc->tx_busy) { + atomic_unlock(); + return (CUSE_ERR_BUSY); + } + pvc->tx_enabled = 1; + + while (1) { + uint8_t *buf_ptr; + size_t buf_len; + + vclient_import_write_locked(pvc); + + if (len < 1) + break; + + vring_get_write(&pvc->tx_ring[1], &buf_ptr, &buf_len); + + if (buf_len == 0) { + /* out of data */ + if (fflags & CUSE_FFLAG_NONBLOCK) { + if (retval == 0) + retval = CUSE_ERR_WOULDBLOCK; + break; + } + pvc->tx_busy = 1; + atomic_wait(); + pvc->tx_busy = 0; + if (cuse_got_peer_signal() == 0) { + if (retval == 0) + retval = CUSE_ERR_SIGNAL; + break; + } + continue; + } + if ((int)buf_len > len) + buf_len = len; + + pvc->tx_busy = 1; + atomic_unlock(); + error = cuse_copy_in(peer_ptr, buf_ptr, buf_len); + atomic_lock(); + pvc->tx_busy = 0; + + if (error != 0) { + retval = error; + break; + } + peer_ptr = ((const uint8_t *)peer_ptr) + buf_len; + retval += buf_len; + len -= buf_len; + + vring_inc_write(&pvc->tx_ring[1], buf_len); + } + atomic_unlock(); + + return (retval); +} + +static int +vclient_write_wav(struct cuse_dev *pdev __unused, int fflags __unused, + const void *peer_ptr __unused, int len __unused) +{ + return (CUSE_ERR_INVALID); +} + +static int +vclient_set_channels(vclient_t *pvc, int channels) +{ + if (pvc->channels == channels) + return (0); + return (vclient_setup_buffers(pvc, 0, 0, channels, 0, 0)); +} + +/* greatest common divisor, Euclid equation */ +static uint64_t +vclient_gcd_64(uint64_t a, uint64_t b) +{ + uint64_t an; + uint64_t bn; + + while (b != 0) { + an = b; + bn = a % b; + a = an; + b = bn; + } + return (a); +} + +static uint64_t +vclient_scale(uint64_t value, uint64_t mul, uint64_t div) +{ + uint64_t gcd = vclient_gcd_64(mul, div); + + mul /= gcd; + div /= gcd; + + return ((value * mul) / div); +} + +static int +vclient_ioctl_oss(struct cuse_dev *pdev, int fflags __unused, + unsigned long cmd, void *peer_data) +{ + union { + int val; + unsigned long long lval; + oss_sysinfo sysinfo; + oss_card_info card_info; + oss_audioinfo audioinfo; + audio_buf_info buf_info; + oss_count_t oss_count; + count_info oss_count_info; + audio_errinfo errinfo; + oss_label_t label; + oss_longname_t longname; + } data; + + vclient_t *pvc; + + uint64_t bytes; + + int len; + int error; + int temp; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (CUSE_ERR_INVALID); + + len = IOCPARM_LEN(cmd); + + if (len < 0 || len > (int)sizeof(data)) + return (CUSE_ERR_INVALID); + + if (cmd & IOC_IN) { + error = cuse_copy_in(peer_data, &data, len); + if (error) + return (error); + } else { + error = 0; + } + + atomic_lock(); + + switch (cmd) { + case OSS_GETVERSION: + data.val = SOUND_VERSION; + break; + case SNDCTL_SYSINFO: + memset(&data.sysinfo, 0, sizeof(data.sysinfo)); + strcpy(data.sysinfo.product, "VOSS"); + strcpy(data.sysinfo.version, "1.0"); + data.sysinfo.versionnum = SOUND_VERSION; + data.sysinfo.numaudios = 1; + data.sysinfo.numcards = 1; + data.sysinfo.numaudioengines = 1; + strcpy(data.sysinfo.license, "BSD"); + memset(data.sysinfo.filler, -1, sizeof(data.sysinfo.filler)); + break; + case SNDCTL_CARDINFO: + memset(&data.card_info, 0, sizeof(data.card_info)); + strlcpy(data.card_info.shortname, pvc->profile->oss_name, + sizeof(data.card_info.shortname)); + break; + case SNDCTL_AUDIOINFO: + case SNDCTL_AUDIOINFO_EX: + case SNDCTL_ENGINEINFO: + memset(&data.audioinfo, 0, sizeof(data.audioinfo)); + strlcpy(data.audioinfo.name, pvc->profile->oss_name, + sizeof(data.audioinfo.name)); + snprintf(data.audioinfo.devnode, sizeof(data.audioinfo.devnode), + "/dev/%s", pvc->profile->oss_name); + data.audioinfo.caps = DSP_CAP_INPUT | DSP_CAP_OUTPUT; + data.audioinfo.iformats = VSUPPORTED_AFMT; + data.audioinfo.oformats = VSUPPORTED_AFMT; + data.audioinfo.enabled = 1; + data.audioinfo.min_rate = (int)8000; + data.audioinfo.max_rate = (int)voss_dsp_sample_rate; + data.audioinfo.max_channels = pvc->profile->channels; + /* range check */ + if (voss_libsamplerate_enable == 0 || + data.audioinfo.min_rate > data.audioinfo.max_rate) + data.audioinfo.min_rate = data.audioinfo.max_rate; + data.audioinfo.nrates = 1; + data.audioinfo.rates[0] = (int)voss_dsp_sample_rate; + if (voss_libsamplerate_enable != 0 && + 96000 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 96000; + if (voss_libsamplerate_enable != 0 && + 48000 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 48000; + if (voss_libsamplerate_enable != 0 && + 44100 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 44100; + if (voss_libsamplerate_enable != 0 && + 24000 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 24000; + if (voss_libsamplerate_enable != 0 && + 16000 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 16000; + if (voss_libsamplerate_enable != 0 && + 8000 != voss_dsp_sample_rate) + data.audioinfo.rates[data.audioinfo.nrates++] = 8000; + data.audioinfo.latency = -1; + break; + case FIONREAD: + data.val = vclient_input_delay(pvc); + break; + case FIONWRITE: + data.val = vring_total_read_len(&pvc->tx_ring[1]); + break; + case FIOASYNC: + case SNDCTL_DSP_NONBLOCK: + case FIONBIO: + break; + case SNDCTL_DSP_SETBLKSIZE: + case _IOWR('P', 4, int): + error = vclient_setup_buffers(pvc, data.val, 0, 0, 0, 0); + /* FALLTHROUGH */ + case SNDCTL_DSP_GETBLKSIZE: + data.val = pvc->buffer_size; + break; + case SNDCTL_DSP_SETFRAGMENT: + if ((data.val & 0xFFFF) < 4) { + /* need at least 16 bytes of buffer */ + data.val &= ~0xFFFF; + data.val |= 4; + } else if ((data.val & 0xFFFF) > 24) { + /* no more than 16MBytes of buffer */ + data.val &= ~0xFFFF; + data.val |= 24; + } + error = vclient_setup_buffers(pvc, + (1 << (data.val & 0xFFFF)), (data.val >> 16), 0, 0, 0); + if (error) { + /* fallback to defaults */ + pvc->buffer_size_set = 0; + pvc->buffer_frags_set = 0; + error = vclient_setup_buffers(pvc, 0, 0, 0, 0, 0); + if (error) + break; + /* figure out log2() of actual buffer size */ + for (data.val = 0; + data.val < 24 && (1U << data.val) < pvc->buffer_size; + data.val++) + ; + /* or in the actual number of fragments */ + data.val |= (pvc->buffer_frags << 16); + } + break; + case SNDCTL_DSP_RESET: + error = vclient_setup_buffers(pvc, 0, 0, 0, 0, 0); + break; + case SNDCTL_DSP_SYNC: + break; + case SNDCTL_DSP_SPEED: + if (data.val >= 8000 && data.val <= 96000 && + voss_libsamplerate_enable != 0) { + error = vclient_setup_buffers(pvc, 0, 0, 0, 0, data.val); + } + /* return current speed */ + data.val = (int)pvc->sample_rate; + break; + case SOUND_PCM_READ_RATE: + data.val = (int)pvc->sample_rate; + break; + case SNDCTL_DSP_STEREO: + if (data.val != 0) { + error = vclient_set_channels(pvc, 2); + } else { + error = vclient_set_channels(pvc, 1); + } + data.val = (pvc->channels == 2); + break; + case SOUND_PCM_WRITE_CHANNELS: + if (data.val < 0) { + data.val = 0; + error = CUSE_ERR_INVALID; + break; + } + if (data.val == 0) { + data.val = pvc->channels; + } else { + error = vclient_set_channels(pvc, data.val); + } + break; + case SOUND_PCM_READ_CHANNELS: + data.val = pvc->channels; + break; + case AIOGFMT: + case SNDCTL_DSP_GETFMTS: + data.val = VSUPPORTED_AFMT | AFMT_FULLDUPLEX | + (pvc->profile->channels > 1 ? AFMT_STEREO : 0); + break; + case AIOSFMT: + case SNDCTL_DSP_SETFMT: + if (data.val != AFMT_QUERY) { + temp = data.val & VSUPPORTED_AFMT; + if (temp == 0 || (temp & (temp - 1)) != 0) { + error = CUSE_ERR_INVALID; + } else { + error = vclient_setup_buffers(pvc, 0, 0, 0, temp, 0); + } + } else { + data.val = pvc->format; + } + break; + case SNDCTL_DSP_GETISPACE: + memset(&data.buf_info, 0, sizeof(data.buf_info)); + data.buf_info.fragsize = pvc->buffer_size; + data.buf_info.fragstotal = pvc->buffer_frags; + bytes = (pvc->buffer_size * pvc->buffer_frags); + temp = vclient_input_delay(pvc); + if (temp < 0 || (uint64_t)temp > bytes) + temp = bytes; + data.buf_info.fragments = temp / pvc->buffer_size; + data.buf_info.bytes = temp; + break; + case SNDCTL_DSP_GETOSPACE: + memset(&data.buf_info, 0, sizeof(data.buf_info)); + data.buf_info.fragsize = pvc->buffer_size; + data.buf_info.fragstotal = pvc->buffer_frags; + bytes = (pvc->buffer_size * pvc->buffer_frags); + temp = vclient_output_delay(pvc); + if (temp < 0 || (uint64_t)temp >= bytes) { + /* buffer is full */ + data.buf_info.fragments = 0; + data.buf_info.bytes = 0; + } else { + /* buffer is not full */ + bytes -= temp; + data.buf_info.fragments = bytes / pvc->buffer_size; + data.buf_info.bytes = bytes; + } + break; + case SNDCTL_DSP_GETCAPS: + data.val = PCM_CAP_REALTIME | PCM_CAP_DUPLEX | + PCM_CAP_INPUT | PCM_CAP_OUTPUT | PCM_CAP_TRIGGER | + PCM_CAP_VIRTUAL; + break; + case SOUND_PCM_READ_BITS: + data.val = vclient_sample_bytes(pvc) * 8; + break; + case SNDCTL_DSP_SETTRIGGER: + if (data.val & PCM_ENABLE_INPUT) { + pvc->rx_enabled = 1; + } else { + pvc->rx_enabled = 0; + vring_reset(&pvc->rx_ring[1]); + } + + if (data.val & PCM_ENABLE_OUTPUT) { + pvc->tx_enabled = 1; + } else { + pvc->tx_enabled = 0; + vring_reset(&pvc->tx_ring[1]); + } + break; + case SNDCTL_DSP_GETTRIGGER: + data.val = 0; + if (pvc->rx_enabled) + data.val |= PCM_ENABLE_INPUT; + if (pvc->tx_enabled) + data.val |= PCM_ENABLE_OUTPUT; + break; + case SNDCTL_DSP_GETODELAY: + data.val = vclient_output_delay_adjusted(pvc); + break; + case SNDCTL_DSP_POST: + break; + case SNDCTL_DSP_SETDUPLEX: + break; + case SNDCTL_DSP_GETRECVOL: + temp = (pvc->rx_volume * 100) >> VVOLUME_UNIT_SHIFT; + data.val = (temp & 0x00FF) | + ((temp << 8) & 0xFF00); + break; + case SNDCTL_DSP_SETRECVOL: + pvc->rx_volume = ((data.val & 0xFF) << VVOLUME_UNIT_SHIFT) / 100; + break; + case SNDCTL_DSP_GETPLAYVOL: + temp = (pvc->tx_volume * 100) >> VVOLUME_UNIT_SHIFT; + data.val = (temp & 0x00FF) | + ((temp << 8) & 0xFF00); + break; + case SNDCTL_DSP_SETPLAYVOL: + pvc->tx_volume = ((data.val & 0xFF) << VVOLUME_UNIT_SHIFT) / 100; + break; + case SNDCTL_DSP_CURRENT_IPTR: + memset(&data.oss_count, 0, sizeof(data.oss_count)); + /* compute input samples per channel */ + data.oss_count.samples = + vclient_scale(pvc->rx_samples, pvc->sample_rate, voss_dsp_sample_rate); + data.oss_count.samples /= pvc->channels; + data.oss_count.fifo_samples = + vclient_input_delay(pvc) / (pvc->channels * vclient_sample_bytes(pvc)); + break; + case SNDCTL_DSP_CURRENT_OPTR: + memset(&data.oss_count, 0, sizeof(data.oss_count)); + /* compute output samples per channel */ + data.oss_count.samples = + vclient_scale(pvc->tx_samples, pvc->sample_rate, voss_dsp_sample_rate); + data.oss_count.samples /= pvc->channels; + data.oss_count.fifo_samples = + vclient_output_delay(pvc) / (pvc->channels * vclient_sample_bytes(pvc)); + break; + case SNDCTL_DSP_GETIPTR: + memset(&data.oss_count_info, 0, sizeof(data.oss_count_info)); + /* compute input bytes */ + bytes = + vclient_scale(pvc->rx_samples, pvc->sample_rate, voss_dsp_sample_rate) * + vclient_sample_bytes(pvc); + data.oss_count_info.bytes = bytes; + data.oss_count_info.blocks = bytes / pvc->buffer_size; + data.oss_count_info.ptr = bytes % (pvc->buffer_size * pvc->buffer_frags); + break; + case SNDCTL_DSP_GETOPTR: + memset(&data.oss_count_info, 0, sizeof(data.oss_count_info)); + /* compute output bytes */ + bytes = + vclient_scale(pvc->tx_samples, pvc->sample_rate, voss_dsp_sample_rate) * + vclient_sample_bytes(pvc); + data.oss_count_info.bytes = bytes; + data.oss_count_info.blocks = bytes / pvc->buffer_size; + data.oss_count_info.ptr = bytes % (pvc->buffer_size * pvc->buffer_frags); + break; + case SNDCTL_DSP_HALT_OUTPUT: + pvc->tx_enabled = 0; + break; + case SNDCTL_DSP_HALT_INPUT: + pvc->rx_enabled = 0; + break; + case SNDCTL_DSP_LOW_WATER: + if (data.val > 0 && data.val < + (int)(pvc->buffer_frags * pvc->buffer_size)) { + pvc->low_water = data.val; + } else { + error = CUSE_ERR_INVALID; + } + break; + case SNDCTL_DSP_GETERROR: + memset(&data.errinfo, 0, sizeof(data.errinfo)); + break; + case SNDCTL_DSP_SYNCGROUP: + case SNDCTL_DSP_SYNCSTART: + break; + case SNDCTL_DSP_POLICY: + break; + case SNDCTL_DSP_COOKEDMODE: + break; + case SNDCTL_DSP_GET_CHNORDER: + data.lval = CHNORDER_NORMAL; + break; + case SNDCTL_DSP_GETCHANNELMASK: + data.val = DSP_BIND_FRONT; + break; + case SNDCTL_DSP_BIND_CHANNEL: + break; + case SNDCTL_GETLABEL: + memset(&data.label, 0, sizeof(data.label)); + break; + case SNDCTL_SETLABEL: + break; + case SNDCTL_GETSONG: + memset(&data.longname, 0, sizeof(data.longname)); + break; + case SNDCTL_SETSONG: + break; + case SNDCTL_SETNAME: + break; + default: + error = CUSE_ERR_INVALID; + break; + } + atomic_unlock(); + + if (error == 0) { + if (cmd & IOC_OUT) + error = cuse_copy_out(&data, peer_data, len); + } + return (error); +} + +static int +vclient_ioctl_wav(struct cuse_dev *pdev, int fflags __unused, + unsigned long cmd, void *peer_data) +{ + union { + int val; + } data; + + vclient_t *pvc; + int len; + int error; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (CUSE_ERR_INVALID); + + len = IOCPARM_LEN(cmd); + + if (len < 0 || len > (int)sizeof(data)) + return (CUSE_ERR_INVALID); + + if (cmd & IOC_IN) { + error = cuse_copy_in(peer_data, &data, len); + if (error) + return (error); + } else { + error = 0; + } + + atomic_lock(); + switch (cmd) { + case FIONREAD: + data.val = vclient_input_delay(pvc); + break; + case FIOASYNC: + case SNDCTL_DSP_NONBLOCK: + case FIONBIO: + break; + default: + error = CUSE_ERR_INVALID; + break; + } + atomic_unlock(); + + if (error == 0) { + if (cmd & IOC_OUT) + error = cuse_copy_out(&data, peer_data, len); + } + return (error); +} + +static int +vclient_poll(struct cuse_dev *pdev, int fflags, int events) +{ + vclient_t *pvc; + + int retval = CUSE_POLL_NONE; + + pvc = cuse_dev_get_per_file_handle(pdev); + if (pvc == NULL) + return (retval); + + atomic_lock(); + if ((events & CUSE_POLL_READ) && (fflags & CUSE_FFLAG_READ)) { + pvc->rx_enabled = 1; + if (vclient_input_delay(pvc) >= pvc->low_water) + retval |= CUSE_POLL_READ; + } + if ((events & CUSE_POLL_WRITE) && (fflags & CUSE_FFLAG_WRITE)) { + const uint32_t out_dly = vclient_output_delay(pvc); + const uint32_t out_buf = (pvc->buffer_frags * pvc->buffer_size); + + if (out_dly < out_buf && (out_buf - out_dly) >= pvc->low_water) + retval |= CUSE_POLL_WRITE; + } + atomic_unlock(); + + return (retval); +} + +static const struct cuse_methods vclient_oss_methods = { + .cm_open = vclient_open_oss, + .cm_close = vclient_close, + .cm_read = vclient_read, + .cm_write = vclient_write_oss, + .cm_ioctl = vclient_ioctl_oss, + .cm_poll = vclient_poll, +}; + +static const struct cuse_methods vclient_wav_methods = { + .cm_open = vclient_open_wav, + .cm_close = vclient_close, + .cm_read = vclient_read, + .cm_write = vclient_write_wav, + .cm_ioctl = vclient_ioctl_wav, + .cm_poll = vclient_poll, +}; + +vprofile_head_t virtual_profile_client_head; +vprofile_head_t virtual_profile_loopback_head; + +vmonitor_head_t virtual_monitor_input; +vmonitor_head_t virtual_monitor_output; +vmonitor_head_t virtual_monitor_local; + +uint32_t voss_max_channels; +uint32_t voss_mix_channels; +uint32_t voss_dsp_samples; +uint32_t voss_dsp_max_channels; +uint32_t voss_dsp_sample_rate; +uint32_t voss_dsp_bits; +uint8_t voss_libsamplerate_enable; +uint8_t voss_libsamplerate_quality = SRC_SINC_FASTEST; +int voss_is_recording = 1; +int voss_has_synchronization; +volatile sig_atomic_t voss_exit = 0; + +static int voss_dsp_perm = 0666; +static int voss_do_background; +static const char *voss_pid_path; + +uint32_t voss_dsp_rx_refresh; +uint32_t voss_dsp_tx_refresh; +char voss_dsp_rx_device[VMAX_STRING]; +char voss_dsp_tx_device[VMAX_STRING]; +char voss_ctl_device[VMAX_STRING]; + +uint32_t voss_jitter_up; +uint32_t voss_jitter_down; + +struct voss_backend *voss_rx_backend; +struct voss_backend *voss_tx_backend; + +static int voss_dups; +static int voss_ntds; +static pthread_t *voss_tds; + +/* XXX I do not like the prefix argument... */ +static struct voss_backend * +voss_load_backend(const char *prefix, const char *name, const char *dir) +{ + struct voss_backend *backend; + void *hdl; + char lpath[64], bsym[64]; + + snprintf(lpath, sizeof(lpath), "%s/lib/virtual_oss/voss_%s.so", + prefix, name); + snprintf(bsym, sizeof(bsym), "voss_backend_%s_%s", name, dir); + + if ((hdl = dlopen(lpath, RTLD_NOW)) == NULL) + errx(1, "%s", dlerror()); + if ((backend = dlsym(hdl, bsym)) == NULL) { + warnx("%s", dlerror()); + dlclose(hdl); + exit(EXIT_FAILURE); + } + + return (backend); +} + +static void +voss_rx_backend_refresh(void) +{ + /* setup RX backend */ + if (strcmp(voss_dsp_rx_device, "/dev/null") == 0) { + voss_rx_backend = voss_load_backend("/usr", "null", "rec"); + } else if (strstr(voss_dsp_rx_device, "/dev/bluetooth/") == voss_dsp_rx_device) { + voss_rx_backend = voss_load_backend("/usr/local", "bt", "rec"); + } else if (strstr(voss_dsp_rx_device, "/dev/sndio/") == voss_dsp_rx_device) { + voss_rx_backend = voss_load_backend("/usr/local", "sndio", "rec"); + } else { + voss_rx_backend = voss_load_backend("/usr", "oss", "rec"); + } +} + +static void +voss_tx_backend_refresh(void) +{ + /* setup TX backend */ + if (strcmp(voss_dsp_tx_device, "/dev/null") == 0) { + voss_tx_backend = voss_load_backend("/usr", "null", "play"); + } else if (strstr(voss_dsp_tx_device, "/dev/bluetooth/") == voss_dsp_tx_device) { + voss_tx_backend = voss_load_backend("/usr/local", "bt", "play"); + } else if (strstr(voss_dsp_tx_device, "/dev/sndio/") == voss_dsp_tx_device) { + voss_tx_backend = voss_load_backend("/usr/local", "sndio", "play"); + } else { + voss_tx_backend = voss_load_backend("/usr", "oss", "play"); + } +} + +static void +usage(void) +{ + fprintf(stderr, "Usage: virtual_oss [options...] [device] \\\n" + "\t" "-C 2 -c 2 -r 48000 -b 16 -s 100.0ms -f /dev/dsp3 \\\n" + "\t" "-P /dev/dsp3 -R /dev/dsp1 \\\n" + "\t" "-O /dev/dsp3 -R /dev/null \\\n" + "\t" "-c 1 -m 0,0 [-w wav.0] -d dsp100.0 \\\n" + "\t" "-c 1 -m 0,0 [-w wav.0] -d vdsp.0 \\\n" + "\t" "-c 2 -m 0,0,1,1 [-w wav.1] -d vdsp.1 \\\n" + "\t" "-c 2 -m 0,0,1,1 [-w wav.loopback] -l vdsp.loopback \\\n" + "\t" "-c 2 -m 0,0,1,1 [-w wav.loopback] -L vdsp.loopback \\\n" + "\t" "-B # run in background \\\n" + "\t" "-s <samples> or <milliseconds>ms \\\n" + "\t" "-S # enable automatic resampling using libsamplerate \\\n" + "\t" "-Q <0,1,2> # quality of resampling 0=best,1=medium,2=fastest (default) \\\n" + "\t" "-b <bits> \\\n" + "\t" "-r <rate> \\\n" + "\t" "-i <rtprio> \\\n" + "\t" "-a <amp -63..63> \\\n" + "\t" "-a i,<rx_amp -63..63> \\\n" + "\t" "-a o,<tx_amp -63..63> \\\n" + "\t" "-g <knee,attack,decay> # enable device RX compressor\\\n" + "\t" "-x <knee,attack,decay> # enable output compressor\\\n" + "\t" "-p <pol 0..1> \\\n" + "\t" "-e <rxtx_mute 0..1> \\\n" + "\t" "-e <rx_mute 0..1>,<tx_mute 0..1> \\\n" + "\t" "-m <mapping> \\\n" + "\t" "-m <rx0,tx0,rx1,tx1...rxN,txN> \\\n" + "\t" "-C <mixchans>\\\n" + "\t" "-c <dspchans> \\\n" + "\t" "-M <monitorfilter> \\\n" + "\t" "-M i,<src>,<dst>,<pol>,<mute>,<amp> \\\n" + "\t" "-M o,<src>,<dst>,<pol>,<mute>,<amp> \\\n" + "\t" "-M x,<src>,<dst>,<pol>,<mute>,<amp> \\\n" + "\t" "-F <rx_filter_samples> or <milliseconds>ms \\\n" + "\t" "-G <tx_filter_samples> or <milliseconds>ms \\\n" + "\t" "-E <enable_recording, 0 or 1> \\\n" + "\t" "-N <max HTTP connections, default is 1> \\\n" + "\t" "-H <bind HTTP server to this host> \\\n" + "\t" "-o <bind HTTP server to this port, default is 80> \\\n" + "\t" "-J <bind RTP server to this network interface> \\\n" + "\t" "-k <bind RTP server to this port, default is 8080> \\\n" + "\t" "-t vdsp.ctl \n" + "\t" "Left channel = 0\n" + "\t" "Right channel = 1\n" + "\t" "Max channels = %d\n", VMAX_CHAN); + + exit(EX_USAGE); +} + +static void +init_compressor(struct virtual_profile *pvp) +{ + int x; + + memset(&pvp->rx_compressor_param, 0, sizeof(pvp->rx_compressor_param)); + + pvp->rx_compressor_param.knee = 85; + pvp->rx_compressor_param.attack = 3; + pvp->rx_compressor_param.decay = 20; + + for (x = 0; x != VMAX_CHAN; x++) + pvp->rx_compressor_gain[x] = 1.0; +} + +static void +init_mapping(struct virtual_profile *pvp) +{ + int x; + + for (x = 0; x != VMAX_CHAN; x++) { + pvp->rx_src[x] = x; + pvp->tx_dst[x] = x; + } +} + +static void +init_sndstat(vprofile_t *ptr) +{ + int err; + nvlist_t *nvl; + nvlist_t *di = NULL, *dichild = NULL; + struct sndstioc_nv_arg arg; + unsigned int min_rate, max_rate; + + nvl = nvlist_create(0); + if (nvl == NULL) { + warn("Failed to create nvlist"); + goto done; + } + + di = nvlist_create(0); + if (di == NULL) { + warn("Failed to create nvlist"); + goto done; + } + + dichild = nvlist_create(0); + if (dichild == NULL) { + warn("Failed to create nvlist"); + goto done; + } + + nvlist_add_string(di, SNDST_DSPS_PROVIDER, "virtual_oss"); + nvlist_add_string(di, SNDST_DSPS_DESC, "virtual_oss device"); + nvlist_add_number(di, SNDST_DSPS_PCHAN, 1); + nvlist_add_number(di, SNDST_DSPS_RCHAN, 1); + min_rate = 8000; + max_rate = voss_dsp_sample_rate; + if (voss_libsamplerate_enable == 0 || + min_rate > max_rate) + min_rate = max_rate; + if (voss_libsamplerate_enable != 0 && max_rate < 96000) + max_rate = 96000; + nvlist_add_number(dichild, SNDST_DSPS_INFO_MIN_RATE, min_rate); + nvlist_add_number(dichild, SNDST_DSPS_INFO_MAX_RATE, max_rate); + nvlist_add_number(dichild, SNDST_DSPS_INFO_FORMATS, VSUPPORTED_AFMT); + nvlist_add_number(dichild, SNDST_DSPS_INFO_MIN_CHN, ptr->channels); + nvlist_add_number(dichild, SNDST_DSPS_INFO_MAX_CHN, ptr->channels); + nvlist_add_nvlist(di, SNDST_DSPS_INFO_PLAY, dichild); + nvlist_add_nvlist(di, SNDST_DSPS_INFO_REC, dichild); + + nvlist_add_string(di, SNDST_DSPS_DEVNODE, + ptr->oss_name); + nvlist_append_nvlist_array(nvl, SNDST_DSPS, di); + + if (nvlist_error(nvl)) { + warn("Failed building nvlist"); + goto done; + } + + arg.buf = nvlist_pack(nvl, &arg.nbytes); + if (arg.buf == NULL) { + warn("Failed to pack nvlist"); + goto done; + } + err = ioctl(ptr->fd_sta, SNDSTIOC_ADD_USER_DEVS, &arg); + free(arg.buf); + if (err != 0) { + warn("Failed to issue ioctl(SNDSTIOC_ADD_USER_DEVS)"); + goto done; + } + +done: + nvlist_destroy(di); + nvlist_destroy(dichild); + nvlist_destroy(nvl); +} + +static const char * +dup_profile(vprofile_t *pvp, int *pamp, int pol, int rx_mute, + int tx_mute, int synchronized, int is_client) +{ + vprofile_t *ptr; + struct cuse_dev *pdev; + int x; + + rx_mute = rx_mute ? 1 : 0; + tx_mute = tx_mute ? 1 : 0; + pol = pol ? 1 : 0; + + /* Range check amplitude argument. */ + for (x = 0; x != 2; x++) { + if (pamp[x] < -63) + pamp[x] = -63; + else if (pamp[x] > 63) + pamp[x] = 63; + } + + ptr = malloc(sizeof(*ptr)); + if (ptr == NULL) + return ("Out of memory"); + + memcpy(ptr, pvp, sizeof(*ptr)); + + ptr->synchronized = synchronized; + ptr->fd_sta = -1; + TAILQ_INIT(&ptr->head); + + for (x = 0; x != ptr->channels; x++) { + ptr->tx_mute[x] = tx_mute; + ptr->rx_mute[x] = rx_mute; + ptr->tx_shift[x] = pamp[1]; + ptr->rx_shift[x] = pamp[0]; + ptr->tx_pol[x] = pol; + ptr->rx_pol[x] = pol; + } + + /* create DSP device */ + if (ptr->oss_name[0] != 0) { + /* + * Detect /dev/dsp creation and try to disable system + * basename cloning automatically: + */ + if (strcmp(ptr->oss_name, "dsp") == 0) + system("sysctl hw.snd.basename_clone=0"); + + /* create DSP character device */ + pdev = cuse_dev_create(&vclient_oss_methods, ptr, NULL, + 0, 0, voss_dsp_perm, ptr->oss_name); + if (pdev == NULL) { + free(ptr); + return ("Could not create CUSE DSP device"); + } + + /* register to sndstat */ + ptr->fd_sta = open("/dev/sndstat", O_WRONLY); + if (ptr->fd_sta < 0) { + warn("Could not open /dev/sndstat"); + } else { + init_sndstat(ptr); + } + } + /* create WAV device */ + if (ptr->wav_name[0] != 0) { + pdev = cuse_dev_create(&vclient_wav_methods, ptr, NULL, + 0, 0, voss_dsp_perm, ptr->wav_name); + if (pdev == NULL) { + free(ptr); + return ("Could not create CUSE WAV device"); + } + } + + atomic_lock(); + if (is_client) + TAILQ_INSERT_TAIL(&virtual_profile_client_head, ptr, entry); + else + TAILQ_INSERT_TAIL(&virtual_profile_loopback_head, ptr, entry); + atomic_unlock(); + + voss_dups++; + + /* need new names next time */ + memset(pvp->oss_name, 0, sizeof(pvp->oss_name)); + memset(pvp->wav_name, 0, sizeof(pvp->wav_name)); + + /* need to set new filter sizes */ + pvp->rx_filter_size = 0; + pvp->tx_filter_size = 0; + + /* need to specify new HTTP parameters next time */ + pvp->http.host = NULL; + pvp->http.port = NULL; + pvp->http.nstate = 0; + pvp->http.rtp_ifname = NULL; + pvp->http.rtp_port = NULL; + + /* need to specify new amplification next time */ + pamp[0] = 0; + pamp[1] = 0; + + /* need to set new compressor parameters next time */ + init_compressor(pvp); + + return (voss_httpd_start(ptr)); +} + +static void +virtual_pipe(int sig __unused) +{ + voss_dsp_tx_refresh = 1; + voss_dsp_rx_refresh = 1; +} + +static void +virtual_cuse_hup(int sig __unused) +{ + atomic_wakeup(); +} + +static void * +virtual_cuse_process(void *arg __unused) +{ + signal(SIGHUP, &virtual_cuse_hup); + + while (1) { + if (cuse_wait_and_process() != 0) + break; + } + return (NULL); +} + +static void +virtual_cuse_init_profile(struct virtual_profile *pvp) +{ + memset(pvp, 0, sizeof(*pvp)); + + init_compressor(pvp); + init_mapping(pvp); +} + +static void +virtual_sig_exit(int sig __unused) +{ + voss_exit = 1; +} + +static const char * +parse_options(int narg, char **pparg, int is_main) +{ + const char *ptr; + int a, b, c; + int val; + int idx; + int type; + int opt_mute[2] = {0, 0}; + int opt_amp[2] = {0, 0}; + int opt_pol = 0; + const char *optstr; + struct virtual_profile profile; + struct rtprio rtp; + float samples_ms; + + if (is_main) + optstr = "N:J:k:H:o:F:G:w:e:p:a:C:c:r:b:f:g:x:i:m:M:d:l:L:s:t:h?O:P:Q:R:SBD:E:"; + else + optstr = "F:G:w:e:p:a:c:b:f:m:M:d:l:L:s:O:P:R:E:"; + + virtual_cuse_init_profile(&profile); + + /* reset getopt parsing */ + optreset = 1; + optind = 1; + + while ((c = getopt(narg, pparg, optstr)) != -1) { + switch (c) { + case 'B': + voss_do_background = 1; + break; + case 'D': + voss_pid_path = optarg; + break; + case 'C': + if (voss_mix_channels != 0) { + return ("The -C argument may only be used once"); + } + voss_mix_channels = atoi(optarg); + if (voss_mix_channels >= VMAX_CHAN) { + return ("Number of mixing channels is too high"); + } + break; + case 'a': + switch (optarg[0]) { + case '-': + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + opt_amp[0] = -(opt_amp[1] = atoi(optarg)); + break; + case 'i': + if (optarg[1] != ',') + return ("Expected comma after 'i'"); + opt_amp[0] = atoi(optarg + 2); + break; + case 'o': + if (optarg[1] != ',') + return ("Expected comma after 'o'"); + opt_amp[1] = atoi(optarg + 2); + break; + default: + return ("Invalid syntax for amplitude argument"); + } + break; + case 'E': + voss_is_recording = (atoi(optarg) != 0); + break; + case 'e': + idx = 0; + ptr = optarg; + memset(opt_mute, 0, sizeof(opt_mute)); + while (1) { + c = *ptr++; + if (c == ',' || c == 0) { + idx++; + if (c == 0) + break; + continue; + } + if (idx < 2 && c >= '0' && c <= '1') { + opt_mute[idx] = c - '0'; + } else { + return ("Invalid -e parameter"); + } + } + switch (idx) { + case 1: + opt_mute[1] = opt_mute[0]; + break; + case 2: + break; + default: + return ("Invalid -e parameter"); + } + break; + case 'p': + opt_pol = atoi(optarg); + break; + case 'c': + profile.channels = atoi(optarg); + if (profile.channels == 0) + return ("Number of channels is zero"); + if (profile.channels > VMAX_CHAN) + return ("Number of channels is too high"); + break; + case 'r': + voss_dsp_sample_rate = atoi(optarg); + if (voss_dsp_sample_rate < 8000) + return ("Sample rate is too low, 8000 Hz"); + if (voss_dsp_sample_rate > 0xFFFFFF) + return ("Sample rate is too high"); + break; + case 'i': + memset(&rtp, 0, sizeof(rtp)); + rtp.type = RTP_PRIO_REALTIME; + rtp.prio = atoi(optarg); + if (rtprio(RTP_SET, getpid(), &rtp) != 0) + printf("Cannot set realtime priority\n"); + break; + case 'b': + profile.bits = atoi(optarg); + switch (profile.bits) { + case 8: + case 16: + case 24: + case 32: + break; + default: + return ("Invalid number of sample bits"); + } + break; + case 'g': + if (profile.rx_compressor_param.enabled) + return ("Compressor already enabled for this device"); + if (sscanf(optarg, "%d,%d,%d", &a, &b, &c) != 3 || + a < VIRTUAL_OSS_KNEE_MIN || + a > VIRTUAL_OSS_KNEE_MAX || + b < VIRTUAL_OSS_ATTACK_MIN || + b > VIRTUAL_OSS_ATTACK_MAX || + c < VIRTUAL_OSS_DECAY_MIN || + c > VIRTUAL_OSS_DECAY_MAX) + return ("Invalid device compressor argument(s)"); + profile.rx_compressor_param.enabled = 1; + profile.rx_compressor_param.knee = a; + profile.rx_compressor_param.attack = b; + profile.rx_compressor_param.decay = c; + break; + case 'x': + if (voss_output_compressor_param.enabled) + return ("Compressor already enabled for output"); + if (sscanf(optarg, "%d,%d,%d", &a, &b, &c) != 3 || + a < VIRTUAL_OSS_KNEE_MIN || + a > VIRTUAL_OSS_KNEE_MAX || + b < VIRTUAL_OSS_ATTACK_MIN || + b > VIRTUAL_OSS_ATTACK_MAX || + c < VIRTUAL_OSS_DECAY_MIN || + c > VIRTUAL_OSS_DECAY_MAX) + return ("Invalid output compressor argument(s)"); + voss_output_compressor_param.enabled = 1; + voss_output_compressor_param.knee = a; + voss_output_compressor_param.attack = b; + voss_output_compressor_param.decay = c; + break; + case 'f': + case 'O': + case 'P': + case 'R': + if (voss_dsp_sample_rate == 0 || voss_dsp_samples == 0) + return ("Missing -r or -s parameters"); + if (voss_dsp_bits == 0) { + if (profile.bits == 0) + return ("Missing -b parameter"); + voss_dsp_bits = profile.bits; + } + if (voss_dsp_max_channels == 0) { + if (profile.channels == 0) + return ("Missing -c parameter"); + voss_dsp_max_channels = profile.channels; + } + if (c == 'f' || c == 'R') { + if (strlen(optarg) > VMAX_STRING - 1) + return ("Device name too long"); + strncpy(voss_dsp_rx_device, optarg, sizeof(voss_dsp_rx_device)); + voss_rx_backend_refresh(); + voss_dsp_rx_refresh = 1; + } + if (c == 'f' || c == 'P' || c == 'O') { + if (strlen(optarg) > VMAX_STRING - 1) + return ("Device name too long"); + strncpy(voss_dsp_tx_device, optarg, sizeof(voss_dsp_tx_device)); + voss_tx_backend_refresh(); + voss_dsp_tx_refresh = 1; + + if (c == 'O' && voss_has_synchronization == 0) + voss_has_synchronization++; + } + break; + case 'w': + if (strlen(optarg) > VMAX_STRING - 1) + return ("Device name too long"); + strncpy(profile.wav_name, optarg, sizeof(profile.wav_name)); + break; + case 'd': + if (strlen(optarg) > VMAX_STRING - 1) + return ("Device name too long"); + strncpy(profile.oss_name, optarg, sizeof(profile.oss_name)); + + if (profile.bits == 0 || voss_dsp_sample_rate == 0 || + profile.channels == 0 || voss_dsp_samples == 0) + return ("Missing -b, -r, -c or -s parameters"); + + val = (voss_dsp_samples * + profile.bits * profile.channels) / 8; + if (val <= 0 || val >= (1024 * 1024)) + return ("-s option value is too big"); + + ptr = dup_profile(&profile, opt_amp, opt_pol, + opt_mute[0], opt_mute[1], 0, 1); + if (ptr != NULL) + return (ptr); + break; + case 'L': + case 'l': + if (strlen(optarg) > VMAX_STRING - 1) + return ("Device name too long"); + strncpy(profile.oss_name, optarg, sizeof(profile.oss_name)); + + if (profile.bits == 0 || voss_dsp_sample_rate == 0 || + profile.channels == 0 || voss_dsp_samples == 0) + return ("Missing -b, -r, -r or -s parameters"); + + val = (voss_dsp_samples * + profile.bits * profile.channels) / 8; + if (val <= 0 || val >= (1024 * 1024)) + return ("-s option value is too big"); + + ptr = dup_profile(&profile, opt_amp, opt_pol, + opt_mute[0], opt_mute[1], c == 'L', 0); + if (ptr != NULL) + return (ptr); + break; + case 'S': + voss_libsamplerate_enable = 1; + break; + case 'Q': + c = atoi(optarg); + switch (c) { + case 0: + voss_libsamplerate_quality = SRC_SINC_BEST_QUALITY; + break; + case 1: + voss_libsamplerate_quality = SRC_SINC_MEDIUM_QUALITY; + break; + default: + voss_libsamplerate_quality = SRC_SINC_FASTEST; + break; + } + break; + case 's': + if (voss_dsp_samples != 0) + return ("-s option may only be used once"); + if (profile.bits == 0 || profile.channels == 0) + return ("-s option requires -b and -c options"); + if (strlen(optarg) > 2 && + sscanf(optarg, "%f", &samples_ms) == 1 && + strcmp(optarg + strlen(optarg) - 2, "ms") == 0) { + if (voss_dsp_sample_rate == 0) + return ("-s <X>ms option requires -r option"); + if (samples_ms < 0.125 || samples_ms >= 1000.0) + return ("-s <X>ms option has invalid value"); + voss_dsp_samples = voss_dsp_sample_rate * samples_ms / 1000.0; + } else { + voss_dsp_samples = atoi(optarg); + } + if (voss_dsp_samples >= (1U << 24)) + return ("-s option requires a non-zero positive value"); + break; + case 't': + if (voss_ctl_device[0]) + return ("-t parameter may only be used once"); + + strlcpy(voss_ctl_device, optarg, sizeof(voss_ctl_device)); + break; + case 'm': + ptr = optarg; + val = 0; + idx = 0; + init_mapping(&profile); + while (1) { + c = *ptr++; + if (c == ',' || c == 0) { + if (idx >= (2 * VMAX_CHAN)) + return ("Too many channels in mask"); + if (idx & 1) + profile.tx_dst[idx / 2] = val; + else + profile.rx_src[idx / 2] = val; + if (c == 0) + break; + val = 0; + idx++; + continue; + } + if (c >= '0' && c <= '9') { + val *= 10; + val += c - '0'; + } + } + break; + case 'M': + ptr = optarg; + type = *ptr; + if (type == 'i' || type == 'o' || type == 'x') { + vmonitor_t *pvm; + + int src = 0; + int dst = 0; + int pol = 0; + int mute = 0; + int amp = 0; + int neg; + + ptr++; + if (*ptr == ',') + ptr++; + else if (type == 'i') + return ("Expected comma after 'i'"); + else if (type == 'o') + return ("Expected comma after 'o'"); + else + return ("Expected comma after 'x'"); + + val = 0; + neg = 0; + idx = 0; + while (1) { + c = *ptr++; + if (c == '-') { + neg = 1; + continue; + } + if (c == ',' || c == 0) { + switch (idx) { + case 0: + src = val; + break; + case 1: + dst = val; + break; + case 2: + pol = val ? 1 : 0; + break; + case 3: + mute = val ? 1 : 0; + break; + case 4: + if (val > 31) { + return ("Absolute amplitude " + "for -M parameter " + "cannot exceed 31"); + } + amp = neg ? -val : val; + break; + default: + break; + } + if (c == 0) + break; + val = 0; + neg = 0; + idx++; + continue; + } + if (c >= '0' && c <= '9') { + val *= 10; + val += c - '0'; + } + } + if (idx < 4) + return ("Too few parameters for -M"); + + pvm = vmonitor_alloc(&idx, + (type == 'i') ? &virtual_monitor_input : + (type == 'x') ? &virtual_monitor_local : + &virtual_monitor_output); + + if (pvm == NULL) + return ("Out of memory"); + + pvm->src_chan = src; + pvm->dst_chan = dst; + pvm->pol = pol; + pvm->mute = mute; + pvm->shift = amp; + } else { + return ("Invalid -M parameter"); + } + break; + case 'F': + if (strlen(optarg) > 2 && + sscanf(optarg, "%f", &samples_ms) == 1 && + strcmp(optarg + strlen(optarg) - 2, "ms") == 0) { + if (voss_dsp_sample_rate == 0) + return ("-F <X>ms option requires -r option"); + if (samples_ms < 0.125 || samples_ms >= 1000.0) + return ("-F <X>ms option has invalid value"); + profile.rx_filter_size = voss_dsp_sample_rate * samples_ms / 1000.0; + } else { + profile.rx_filter_size = atoi(optarg); + } + /* make value power of two */ + while ((profile.rx_filter_size - 1) & profile.rx_filter_size) + profile.rx_filter_size += ~(profile.rx_filter_size - 1) & profile.rx_filter_size; + /* range check */ + if (profile.rx_filter_size > VIRTUAL_OSS_FILTER_MAX) + return ("Invalid -F parameter is out of range"); + break; + case 'G': + if (strlen(optarg) > 2 && + sscanf(optarg, "%f", &samples_ms) == 1 && + strcmp(optarg + strlen(optarg) - 2, "ms") == 0) { + if (voss_dsp_sample_rate == 0) + return ("-G <X>ms option requires -r option"); + if (samples_ms < 0.125 || samples_ms >= 1000.0) + return ("-G <X>ms option has invalid value"); + profile.tx_filter_size = voss_dsp_sample_rate * samples_ms / 1000.0; + } else { + profile.tx_filter_size = atoi(optarg); + } + /* make value power of two */ + while ((profile.tx_filter_size - 1) & profile.tx_filter_size) + profile.tx_filter_size += ~(profile.tx_filter_size - 1) & profile.tx_filter_size; + /* range check */ + if (profile.tx_filter_size > VIRTUAL_OSS_FILTER_MAX) + return ("Invalid -F parameter is out of range"); + break; + case 'N': + profile.http.nstate = atoi(optarg); + break; + case 'H': + profile.http.host = optarg; + if (profile.http.port == NULL) + profile.http.port = "80"; + if (profile.http.nstate == 0) + profile.http.nstate = 1; + break; + case 'o': + profile.http.port = optarg; + break; + case 'J': + profile.http.rtp_ifname = optarg; + if (profile.http.rtp_port == NULL) + profile.http.rtp_port = "8080"; + break; + case 'k': + profile.http.rtp_port = optarg; + break; + default: + if (is_main) + usage(); + else + return ("Invalid option detected"); + break; + } + } + return (NULL); +} + +static void +create_threads(void) +{ + int idx; + + /* Give each DSP device 4 threads */ + voss_ntds = voss_dups * 4; + voss_tds = malloc(voss_ntds * sizeof(pthread_t)); + if (voss_tds == NULL) + err(1, "malloc"); + + for (idx = 0; idx < voss_ntds; idx++) { + if (pthread_create(&voss_tds[idx], NULL, &virtual_cuse_process, + NULL) != 0) + err(1, "pthread_create"); + } + + /* Reset until next time called */ + voss_dups = 0; +} + +static void +destroy_threads(void) +{ + int idx; + + for (idx = 0; idx < voss_ntds; idx++) + pthread_cancel(voss_tds[idx]); + free(voss_tds); +} + +void +voss_add_options(char *str) +{ + static char name[] = { "virtual_oss" }; + const char sep[] = "\t "; + const char *ptrerr; + char *parg[64]; + char *word; + char *brkt; + int narg = 0; + + parg[narg++] = name; + + for (word = strtok_r(str, sep, &brkt); word != NULL; + word = strtok_r(NULL, sep, &brkt)) { + if (narg >= 64) { + ptrerr = "Too many arguments"; + goto done; + } + parg[narg++] = word; + } + ptrerr = parse_options(narg, parg, 0); +done: + if (ptrerr != NULL) { + strlcpy(str, ptrerr, VIRTUAL_OSS_OPTIONS_MAX); + } else { + str[0] = 0; + create_threads(); + } +} + +int +main(int argc, char **argv) +{ + const char *ptrerr; + struct sigaction sa; + struct cuse_dev *pdev = NULL; + + TAILQ_INIT(&virtual_profile_client_head); + TAILQ_INIT(&virtual_profile_loopback_head); + + TAILQ_INIT(&virtual_monitor_input); + TAILQ_INIT(&virtual_monitor_output); + TAILQ_INIT(&virtual_monitor_local); + + atomic_init(); + + /* automagically load the cuse.ko module, if any */ + if (feature_present("cuse") == 0) { + if (system("kldload cuse") == -1) + warn("Failed to kldload cuse"); + } + + if (cuse_init() != 0) + errx(EX_USAGE, "Could not connect to cuse module"); + + signal(SIGPIPE, &virtual_pipe); + + memset(&sa, 0, sizeof(sa)); + sigfillset(&sa.sa_mask); + sa.sa_handler = virtual_sig_exit; + if (sigaction(SIGINT, &sa, NULL) < 0) + err(1, "sigaction(SIGINT)"); + if (sigaction(SIGTERM, &sa, NULL) < 0) + err(1, "sigaction(SIGTERM)"); + + ptrerr = parse_options(argc, argv, 1); + if (ptrerr != NULL) + errx(EX_USAGE, "%s", ptrerr); + + if (voss_dsp_rx_device[0] == 0 || voss_dsp_tx_device[0] == 0) + errx(EX_USAGE, "Missing -f argument"); + + /* use DSP channels as default */ + if (voss_mix_channels == 0) + voss_mix_channels = voss_dsp_max_channels; + + if (voss_mix_channels > voss_dsp_max_channels) + voss_max_channels = voss_mix_channels; + else + voss_max_channels = voss_dsp_max_channels; + + if (voss_dsp_samples > (voss_dsp_sample_rate / 4)) + errx(EX_USAGE, "Too many buffer samples given by -s argument"); + + /* check if daemon mode is requested */ + if (voss_do_background != 0 && daemon(0, 0) != 0) + errx(EX_SOFTWARE, "Cannot become daemon"); + + if (voss_pid_path != NULL) { + int pidfile = open(voss_pid_path, O_RDWR | O_CREAT | O_TRUNC, 0600); + pid_t mypid = getpid(); + char mypidstr[8]; + snprintf(mypidstr, sizeof(mypidstr), "%d\n", mypid); + if (pidfile < 0) + errx(EX_SOFTWARE, "Cannot create PID file '%s'", voss_pid_path); + if (write(pidfile, mypidstr, strlen(mypidstr)) != + (ssize_t)strlen(mypidstr)) + errx(EX_SOFTWARE, "Cannot write PID file"); + close(pidfile); + } + + /* setup audio delay unit */ + voss_ad_init(voss_dsp_sample_rate); + + /* Create CTL device */ + + if (voss_ctl_device[0] != 0) { + pdev = cuse_dev_create(&vctl_methods, NULL, NULL, + 0, 0, voss_dsp_perm, voss_ctl_device); + if (pdev == NULL) + errx(EX_USAGE, "Could not create '/dev/%s'", voss_ctl_device); + + voss_dups++; + } + + /* Create worker threads */ + create_threads(); + + /* Run DSP threads */ + + virtual_oss_process(NULL); + + destroy_threads(); + + if (voss_ctl_device[0] != 0) + cuse_dev_destroy(pdev); + + return (0); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/mul.c b/usr.sbin/virtual_oss/virtual_oss/mul.c new file mode 100644 index 000000000000..76cb570eef74 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/mul.c @@ -0,0 +1,175 @@ +/*- + * Copyright (c) 2017 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> + +#include <stdint.h> +#include <string.h> + +#include "int.h" + +#ifndef VOSS_X3_LOG2_COMBA +#define VOSS_X3_LOG2_COMBA 5 +#endif + +#if (VOSS_X3_LOG2_COMBA < 2) +#error "VOSS_X3_LOG2_COMBA must be greater than 1" +#endif + +struct voss_x3_input_double { + double a; + double b; +} __aligned(16); + +/* + * <input size> = "stride" + * <output size> = 2 * "stride" + */ +static void +voss_x3_multiply_sub_double(struct voss_x3_input_double *input, double *ptr_low, double *ptr_high, + const size_t stride, const uint8_t toggle) +{ + size_t x; + size_t y; + + if (stride >= (1UL << VOSS_X3_LOG2_COMBA)) { + const size_t strideh = stride >> 1; + + if (toggle) { + + /* inverse step */ + for (x = 0; x != strideh; x++) { + double a, b, c, d; + + a = ptr_low[x]; + b = ptr_low[x + strideh]; + c = ptr_high[x]; + d = ptr_high[x + strideh]; + + ptr_low[x + strideh] = a + b; + ptr_high[x] = a + b + c + d; + } + + voss_x3_multiply_sub_double(input, ptr_low, ptr_low + strideh, strideh, 1); + + for (x = 0; x != strideh; x++) + ptr_low[x + strideh] = -ptr_low[x + strideh]; + + voss_x3_multiply_sub_double(input + strideh, ptr_low + strideh, ptr_high + strideh, strideh, 1); + + /* forward step */ + for (x = 0; x != strideh; x++) { + double a, b, c, d; + + a = ptr_low[x]; + b = ptr_low[x + strideh]; + c = ptr_high[x]; + d = ptr_high[x + strideh]; + + ptr_low[x + strideh] = -a - b; + ptr_high[x] = c + b - d; + + input[x + strideh].a += input[x].a; + input[x + strideh].b += input[x].b; + } + + voss_x3_multiply_sub_double(input + strideh, ptr_low + strideh, ptr_high, strideh, 0); + } else { + voss_x3_multiply_sub_double(input + strideh, ptr_low + strideh, ptr_high, strideh, 1); + + /* inverse step */ + for (x = 0; x != strideh; x++) { + double a, b, c, d; + + a = ptr_low[x]; + b = ptr_low[x + strideh]; + c = ptr_high[x]; + d = ptr_high[x + strideh]; + + ptr_low[x + strideh] = -a - b; + ptr_high[x] = a + b + c + d; + + input[x + strideh].a -= input[x].a; + input[x + strideh].b -= input[x].b; + } + + voss_x3_multiply_sub_double(input + strideh, ptr_low + strideh, ptr_high + strideh, strideh, 0); + + for (x = 0; x != strideh; x++) + ptr_low[x + strideh] = -ptr_low[x + strideh]; + + voss_x3_multiply_sub_double(input, ptr_low, ptr_low + strideh, strideh, 0); + + /* forward step */ + for (x = 0; x != strideh; x++) { + double a, b, c, d; + + a = ptr_low[x]; + b = ptr_low[x + strideh]; + c = ptr_high[x]; + d = ptr_high[x + strideh]; + + ptr_low[x + strideh] = b - a; + ptr_high[x] = c - b - d; + } + } + } else { + for (x = 0; x != stride; x++) { + double value = input[x].a; + + for (y = 0; y != (stride - x); y++) { + ptr_low[x + y] += input[y].b * value; + } + + for (; y != stride; y++) { + ptr_high[x + y - stride] += input[y].b * value; + } + } + } +} + +/* + * <input size> = "max" + * <output size> = 2 * "max" + */ +void +voss_x3_multiply_double(const int64_t *va, const double *vb, double *pc, const size_t max) +{ + struct voss_x3_input_double input[max]; + size_t x; + + /* check for non-power of two */ + if (max & (max - 1)) + return; + + /* setup input vector */ + for (x = 0; x != max; x++) { + input[x].a = va[x]; + input[x].b = vb[x]; + } + + /* do multiplication */ + voss_x3_multiply_sub_double(input, pc, pc + max, max, 1); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/ring.c b/usr.sbin/virtual_oss/virtual_oss/ring.c new file mode 100644 index 000000000000..3c97bdfc2e84 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/ring.c @@ -0,0 +1,213 @@ +/*- + * Copyright (c) 2018 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> +#include <sys/types.h> + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <errno.h> +#include <time.h> + +#include "int.h" + +int +vring_alloc(struct virtual_ring *pvr, size_t size) +{ + + if (pvr->buf_start != NULL) + return (EBUSY); + pvr->buf_start = malloc(size); + if (pvr->buf_start == NULL) + return (ENOMEM); + pvr->pos_read = 0; + pvr->total_size = size; + pvr->len_write = 0; + return (0); +} + +void +vring_free(struct virtual_ring *pvr) +{ + + if (pvr->buf_start != NULL) { + free(pvr->buf_start); + pvr->buf_start = NULL; + } +} + +void +vring_reset(struct virtual_ring *pvr) +{ + pvr->pos_read = 0; + pvr->len_write = 0; +} + +void +vring_get_read(struct virtual_ring *pvr, uint8_t **pptr, size_t *plen) +{ + uint32_t delta; + + if (pvr->buf_start == NULL) { + *pptr = NULL; + *plen = 0; + return; + } + delta = pvr->total_size - pvr->pos_read; + if (delta > pvr->len_write) + delta = pvr->len_write; + + *pptr = pvr->buf_start + pvr->pos_read; + *plen = delta; +} + +void +vring_get_write(struct virtual_ring *pvr, uint8_t **pptr, size_t *plen) +{ + uint32_t delta; + uint32_t len_read; + uint32_t pos_write; + + if (pvr->buf_start == NULL) { + *pptr = NULL; + *plen = 0; + return; + } + pos_write = pvr->pos_read + pvr->len_write; + if (pos_write >= pvr->total_size) + pos_write -= pvr->total_size; + + len_read = pvr->total_size - pvr->len_write; + + delta = pvr->total_size - pos_write; + if (delta > len_read) + delta = len_read; + + *pptr = pvr->buf_start + pos_write; + *plen = delta; +} + +void +vring_inc_read(struct virtual_ring *pvr, size_t len) +{ + + pvr->pos_read += len; + pvr->len_write -= len; + + /* check for wrap-around */ + if (pvr->pos_read == pvr->total_size) + pvr->pos_read = 0; +} + +void +vring_inc_write(struct virtual_ring *pvr, size_t len) +{ + + pvr->len_write += len; +} + +size_t +vring_total_read_len(struct virtual_ring *pvr) +{ + + return (pvr->len_write); +} + +size_t +vring_total_write_len(struct virtual_ring *pvr) +{ + + return (pvr->total_size - pvr->len_write); +} + +size_t +vring_write_linear(struct virtual_ring *pvr, const uint8_t *src, size_t total) +{ + uint8_t *buf_ptr; + size_t buf_len; + size_t sum = 0; + + while (total != 0) { + vring_get_write(pvr, &buf_ptr, &buf_len); + if (buf_len == 0) + break; + if (buf_len > total) + buf_len = total; + memcpy(buf_ptr, src, buf_len); + vring_inc_write(pvr, buf_len); + src += buf_len; + sum += buf_len; + total -= buf_len; + } + return (sum); +} + +size_t +vring_read_linear(struct virtual_ring *pvr, uint8_t *dst, size_t total) +{ + uint8_t *buf_ptr; + size_t buf_len; + size_t sum = 0; + + if (total > vring_total_read_len(pvr)) + return (0); + + while (total != 0) { + vring_get_read(pvr, &buf_ptr, &buf_len); + if (buf_len == 0) + break; + if (buf_len > total) + buf_len = total; + memcpy(dst, buf_ptr, buf_len); + vring_inc_read(pvr, buf_len); + dst += buf_len; + sum += buf_len; + total -= buf_len; + } + return (sum); +} + +size_t +vring_write_zero(struct virtual_ring *pvr, size_t total) +{ + uint8_t *buf_ptr; + size_t buf_len; + size_t sum = 0; + + while (total != 0) { + vring_get_write(pvr, &buf_ptr, &buf_len); + if (buf_len == 0) + break; + if (buf_len > total) + buf_len = total; + memset(buf_ptr, 0, buf_len); + vring_inc_write(pvr, buf_len); + sum += buf_len; + total -= buf_len; + } + return (sum); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/utils.h b/usr.sbin/virtual_oss/virtual_oss/utils.h new file mode 100644 index 000000000000..f0998dc75dae --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/utils.h @@ -0,0 +1,31 @@ +/*- + * Copyright (c) 2019 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _VIRTUAL_UTILS_H_ +#define _VIRTUAL_UTILS_H_ + +int bt_speaker_main(int argc, char **argv); + +#endif /* _VIRTUAL_UTILS_H_ */ diff --git a/usr.sbin/virtual_oss/virtual_oss/virtual_oss.8 b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.8 new file mode 100644 index 000000000000..6aa9f1289b35 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.8 @@ -0,0 +1,355 @@ +.\" +.\" Copyright (c) 2017-2022 Hans Petter Selasky <hselasky@freebsd.org> +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd September 3, 2024 +.Dt VIRTUAL_OSS 8 +.Os +.Sh NAME +.Nm virtual_oss +.Nd daemon to multiplex and demultiplex an OSS device +.Sh SYNOPSIS +.Nm +.Op Fl h +.Sh DESCRIPTION +.Nm +is an audio mixing application that multiplexes and demultiplexes a +single OSS device into multiple customizable OSS compatible devices +using character devices from userspace. +These devices can be used to record played back audio and mix the individual +channels in multiple ways. +.Pp +.Nm +requires the +.Xr cuse 3 +kernel module. +To load the driver as a module at boot time, place the following line in +.Xr loader.conf 5 : +.Pp + cuse_load="YES" +.Pp +All channel numbers start at zero. +Left channel is zero and right channel is one. +.Pp +The following options are available: +.Bl -tag -width indent +.It Fl B +Run program in background. +.It Fl S +Enable automatic DSP rate resampling. +.It Fl Q Ar quality +Set resampling quality: 0=best, 1=medium and 2=fastest (default). +.It Fl b Ar bits +Set sample depth to +.Fa bits +for the subsequent commands. +Valid values are 8, 16, 24 and 32. +.It Fl r Ar rate +Set default sample-rate for the subsequent commands. +.It Fl s Ar value +Set default buffer size to +.Fa value . +If the argument is suffixed by "ms" it is interpreted as milliseconds. +Else the argument gives number of samples. +The buffer size specified is per channel. +If there are multiple channels, the total buffer size will be larger. +.It Fl i Ar priority +Set real-time priority to +.Fa priority . +Refer to +.Xr rtprio 1 +for more information. +.It Fl a Ar log2_amp +Set the default DSP output and input device amplification to +.Fa log2_amp . +The specified amplification is logarithmic. +Valid values range from -63 to 63 inclusivly. +The device input amplification gets set to minus +.Fa log2_amp +and the device output amplification gets set to +.Fa log2_amp . +.It Fl a Ar i,log2_amp +Set the default DSP input device amplification to +.Fa log2_amp . +The specified amplification is logarithmic. +Valid values range from -63 to 63 inclusivly. +.It Fl a Ar o,log2_amp +Set default DSP output device amplification to +.Fa log2_amp . +The specified amplification is logarithmic. +Valid values range from -63 to 63 inclusivly. +.It Fl p Ar polarity +Set default polarity of DSP device. +A value of zero means normal polarity. +A value of one means negative polarity. +.It Fl e Ar rx_mute,tx_mute +Set default mute state of DSP device. +A value of zero means unmuted. +A value of one means muted. +.It Fl m Ar rx_ch,tx_ch,.... +Set default channel mapping of DSP device, as a comma separated list of +integers. +The first integer selects the receive channel, the second value selects the +transmit channel and then it repeats. +A value of zero indicates the first receive or transmit channel. +.It Fl C Ar num +Set the maximum number of mix channels to +.Fa num . +.It Fl c Ar num +Set mix channels for the subsequent commands. +.It Fl M Ar type,src_ch,dst_ch,pol,mute,log2_gain +Add a monitoring filter. +The filter consists of a list of comma separated arguments. +The first argument indicates the type of monitoring filter: +.Bl -tag -width indent +.It i +Feedback one mix input channel into another mix output channel, for remote +feedback. +.It o +Add one mix output channel into another mix output channel, for creating a mix +of multiple output channels. +.It x +Feedback one mix output channel into another mix input channel, for local +feedback. +.El +The second argument gives the source mix channel. +The third argument gives the destination mix channel. +The fourth argument gives the polarity, default is zero. +The fifth argument gives the mute state, default is one or muted. +The sixth argument gives the amplitude, default is zero or no gain. +.It Fl t Ar devname +Set control device name. +.It Fl P Ar devname +Set playback DSP device only. +Specifying /dev/null is magic and means no playback device. +Specifying a +.Xr sndio 7 +device descriptor prefixed by "/dev/sndio/" is also magic, and will use a sndio +backend rather than an OSS device. +.It Fl O Ar devname +Set playback DSP device only which acts as a master device. +This option is used in conjunction with -R /dev/null . +.It Fl R Ar devname +Set recording DSP device only. +Specifying /dev/null is magic and means no recording device. +.It Fl f Ar devname +Set both playback and recording DSP device +.It Fl w Ar name +Create a WAV file format compatible companion device by given name. +This option should be specified before the -d and -l options. +.It Fl d Ar name +Create an OSS device by given name. +.It Fl l Ar name +Create a loopback OSS device by given name. +.It Fl L Ar name +Create a loopback OSS device which acts as a master device. +This option is used in conjunction with -f /dev/null . +.It Fl F Ar size +Set receive filter size in number of samples or <milliseconds>ms for the next +device to be created. +.It Fl G Ar size +Set transmit filter size in number of samples or <milliseconds>ms for the next +device to be created. +.It Fl D Ar file +Write process ID of virtual_oss to file. +.It Fl g Ar knee,attack,decay +Enable device compressor in receive direction. +See description of -x option. +.It Fl x Ar knee,attack,decay +Enable output compressor and set knee, attack and decay. +Knee is in the range 0..255, while attack and decay are between 0 and 62. +Samples having an absolute value lower than the knee are transmitted +unchanged. +Sample values over the knee are lowered "a little bit". +You can think about attack and decay as a measure of how fast or slow the +gain of the compressor will work. +It is advised that attack is low, so it reacts fast once too high +sample values appear. +It is also advised that the decay value is higher than the attack value so +that the gain reduction is gradually removed. +The reasoning behind this is that the compressor should react almost +immediately when high volume signals arrive to protect the hardware, +but it slowly changes gain when there are no loud signals to avoid +distorting the signal. +The default values are 85,3,20 . +.It Fl E Ar enable_recording +If the value passed is non-zero, recording is enabled. +Else recording is disabled. +This can be used to synchronize multiple recording streams. +.It Fl h +Show usage and all available options. +.El +.Sh EXAMPLES +Split a 2-channel OSS compatible sound device into multiple subdevices: +.Bd -literal -offset indent +virtual_oss \\ + -S \\ + -c 2 -r 48000 -b 16 -s 4ms -f /dev/dspX \\ + -a 0 -b 16 -c 2 -m 0,0,1,1 -d vdsp.zyn \\ + -a 0 -b 16 -c 2 -m 0,0,1,1 -d vdsp.fld \\ + -a 0 -b 16 -c 2 -m 0,0,1,1 -d dsp \\ + -a 0 -b 16 -c 2 -m 0,0,1,1 -w vdsp.jack.wav -d vdsp.jack \\ + -a 0 -b 16 -c 2 -m 0,0,1,1 -w vdsp.rec.wav -l vdsp.rec \\ + -M i,0,0,0,1,0 \\ + -M i,0,0,0,1,0 \\ + -M i,0,0,0,1,0 \\ + -M i,0,0,0,1,0 \\ + -t vdsp.ctl +.Ed +.Pp +Split an 8-channel 24-bit OSS compatible sound device into multiple subdevices: +.Bd -literal -offset indent +sysctl dev.pcm.X.rec.vchanformat=s24le:7.1 +sysctl dev.pcm.X.rec.vchanrate=48000 +sysctl dev.pcm.X.play.vchanformat=s24le:7.1 +sysctl dev.pcm.X.play.vchanrate=48000 +sysctl dev.pcm.X.bitperfect=1 + +mixer vol.volume=1 pcm.volume=1 + +virtual_oss \\ + -S \\ + -i 8 \\ + -x 85,3,20 \\ + -C 16 -c 8 -r 48000 -b 32 -s 4ms -f /dev/dspX \\ + -a 12 -b 16 -c 2 -m 0,4,1,5 -d dsp \\ + -a 12 -b 16 -c 2 -m 8,8,9,9 -d vdsp \\ + -a 13 -b 16 -c 2 -m 10,10,11,11 -d vdsp.fld \\ + -a 0 -b 32 -c 4 -m 4,2,5,3,6,4,7,5 -d vdsp.jack \\ + -a -3 -b 32 -c 2 -m 14,14,15,15 -d vdsp.zyn \\ + -e 0,1 \\ + -a 0 -b 32 -c 8 -m 0,8,1,9,2,8,3,9,4,8,5,9,6,8,7,9 -w vdsp.rec.mic.wav -d vdsp.rec.mic \\ + -a 0 -b 32 -c 2 -m 0,8,1,9 -w vdsp.rec.master.wav -d vdsp.master.mic \\ + -a 0 -b 32 -c 2 -m 10,10,11,11 -w vdsp.rec.fld.wav -l vdsp.rec.fld \\ + -a 0 -b 32 -c 2 -m 12,12,13,13 -w vdsp.rec.jack.wav -l vdsp.rec.jack \\ + -a 0 -b 32 -c 2 -m 14,14,15,15 -w vdsp.rec.zyn.wav -l vdsp.rec.zyn \\ + -M o,8,0,0,0,0 \\ + -M o,9,1,0,0,0 \\ + -M o,10,0,0,0,0 \\ + -M o,11,1,0,0,0 \\ + -M o,12,0,0,0,0 \\ + -M o,13,1,0,0,0 \\ + -M o,14,0,0,0,0 \\ + -M o,15,1,0,0,0 \\ + -M i,14,14,0,1,0 \\ + -M i,15,15,0,1,0 \\ + -M x,8,0,0,1,0 \\ + -M x,8,1,0,1,0 \\ + -t vdsp.ctl + +.Ed +.Pp +Create a secondary audio device sending its output audio into both +input and output channels of the main DSP device. +.Bd -literal -offset indent +virtual_oss \\ + -C 4 -c 2 \\ + -r 48000 \\ + -b 24 \\ + -s 4ms \\ + -f /dev/dsp3 \\ + -c 2 \\ + -d dsp \\ + -m 2,2,3,3 \\ + -d dsp.speech \\ + -M o,2,0,0,0,0 \\ + -M o,3,1,0,0,0 \\ + -M x,2,0,0,0,0 \\ + -M x,3,1,0,0,0 +.Ed +.Pp +Connect to a bluetooth audio headset, playback only: +.Bd -literal -offset indent +virtual_oss \\ + -C 2 -c 2 -r 48000 -b 16 -s 4ms \\ + -R /dev/null -P /dev/bluetooth/xx:xx:xx:xx:xx:xx -d dsp +.Ed +.Pp +Connect to a bluetooth audio headset, playback and recording: +.Bd -literal -offset indent +virtual_oss \\ + -C 2 -c 2 -r 48000 -b 16 -s 4ms \\ + -f /dev/bluetooth/xx:xx:xx:xx:xx:xx -d dsp +.Ed +.Pp +Create recording device which outputs a WAV-formatted file: +.Bd -literal -offset indent +virtual_oss \\ + -C 2 -c 2 -r 48000 -b 16 -s 4ms \\ + -f /dev/dspX -w dsp.wav -d dsp +.Ed +.Pp +Create a device named dsp.virtual which mix the samples written by all +clients and outputs the result for further processing into +dsp.virtual_out: +.Bd -literal -offset indent +virtual_oss \\ + -S -Q 0 -b 16 -c 2 -r 96000 -s 100ms -i 20 \\ + -f /dev/null -d dsp.virtual -L dsp.virtual_out +.Ed +.Pp +Create a playback-only audio device which sends its output to a remote +.Xr sndio 7 +server: +.Bd -literal -offset indent +virtual_oss \\ + -b 16 -c 2 -r 44100 -s 50ms \\ + -R /dev/null -O /dev/sndio/snd@remotehost/0 -d dsp +.Ed +.Pp +Create a full-duplex audio device exchanging audio using the default +.Xr sndio 7 +server: +.Bd -literal -offset indent +virtual_oss -S -b 16 -C 2 -c 2 -r 48000 -s 4ms \\ + -f /dev/sndio/default -d dsp +.Ed +.Pp +How to set intel based CPUs in performance mode: +.Bd -literal -offset indent +sysctl -aN | fgrep dev.hwpstate | fgrep epp | \ +while read OID +do +sysctl ${OID}=0 +done + +sysctl kern.sched.preempt_thresh=224 +.Ed +.Sh NOTES +All character devices are created using the 0666 mode which gives +everyone in the system access. +.Sh SEE ALSO +.Xr cuse 3 , +.Xr sound 4 , +.Xr loader.conf 5 , +.Xr sndio 7 , +.Xr mixer 8 , +.Xr sysctl 8 , +.Xr virtual_bt_speaker 8 , +.Xr virtual_equalizer 8 , +.Xr virtual_oss_cmd 8 +.Sh AUTHORS +.Nm +was written by +.An Hans Petter Selasky hselasky@freebsd.org . diff --git a/usr.sbin/virtual_oss/virtual_oss/virtual_oss.c b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.c new file mode 100644 index 000000000000..891653494f06 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.c @@ -0,0 +1,914 @@ +/*- + * Copyright (c) 2012-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/queue.h> +#include <sys/types.h> +#include <sys/soundcard.h> + +#include <stdint.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <err.h> +#include <time.h> +#include <assert.h> + +#include "backend.h" +#include "int.h" + +uint64_t +virtual_oss_delay_ns(void) +{ + uint64_t delay; + + delay = voss_dsp_samples; + delay *= 1000000000ULL; + delay /= voss_dsp_sample_rate; + + return (delay); +} + +void +virtual_oss_wait(void) +{ + struct timespec ts; + uint64_t delay; + uint64_t nsec; + + clock_gettime(CLOCK_MONOTONIC, &ts); + + nsec = ts.tv_sec * 1000000000ULL + ts.tv_nsec; + + /* TODO use virtual_oss_delay_ns() */ + delay = voss_dsp_samples; + delay *= 1000000000ULL; + delay /= voss_dsp_sample_rate; + + usleep((delay - (nsec % delay)) / 1000); +} + +uint64_t +virtual_oss_timestamp(void) +{ + struct timespec ts; + uint64_t nsec; + + clock_gettime(CLOCK_MONOTONIC, &ts); + + nsec = ts.tv_sec * 1000000000ULL + ts.tv_nsec; + return (nsec); +} + +static size_t +vclient_read_linear(struct virtual_client *pvc, struct virtual_ring *pvr, + int64_t *dst, size_t total) __requires_exclusive(atomic_mtx) +{ + size_t total_read = 0; + + pvc->sync_busy = 1; + while (1) { + size_t read = vring_read_linear(pvr, (uint8_t *)dst, 8 * total) / 8; + + total_read += read; + dst += read; + total -= read; + + if (!pvc->profile->synchronized || pvc->sync_wakeup || + total == 0) { + /* fill rest of buffer with silence, if any */ + if (total_read != 0 && total != 0) + memset(dst, 0, 8 * total); + break; + } + atomic_wait(); + } + pvc->sync_busy = 0; + if (pvc->sync_wakeup) + atomic_wakeup(); + + vclient_tx_equalizer(pvc, dst - total_read, total_read); + + return (total_read); +} + +static size_t +vclient_write_linear(struct virtual_client *pvc, struct virtual_ring *pvr, + int64_t *src, size_t total) __requires_exclusive(atomic_mtx) +{ + size_t total_written = 0; + + vclient_rx_equalizer(pvc, src, total); + + pvc->sync_busy = 1; + while (1) { + size_t written = vring_write_linear(pvr, (uint8_t *)src, total * 8) / 8; + + total_written += written; + src += written; + total -= written; + + if (!pvc->profile->synchronized || pvc->sync_wakeup || + total == 0) + break; + atomic_wait(); + } + pvc->sync_busy = 0; + if (pvc->sync_wakeup) + atomic_wakeup(); + + return (total_written); +} + +static inline void +virtual_oss_mixer_core_sub(const int64_t *src, int64_t *dst, + uint32_t *pnoise, int src_chan, int dst_chan, int num, + int64_t volume, int shift, int shift_orig, bool pol, + bool assign) +{ + if (pol) + volume = -volume; + + if (shift < 0) { + shift = -shift; + while (num--) { + if (assign) + *dst = (*src * volume) >> shift; + else + *dst += (*src * volume) >> shift; + if (__predict_true(pnoise != NULL)) + *dst += vclient_noise(pnoise, volume, shift_orig); + src += src_chan; + dst += dst_chan; + } + } else { + while (num--) { + if (assign) + *dst = (*src * volume) << shift; + else + *dst += (*src * volume) << shift; + if (__predict_true(pnoise != NULL)) + *dst += vclient_noise(pnoise, volume, shift_orig); + src += src_chan; + dst += dst_chan; + } + } +} + +static inline void +virtual_oss_mixer_core(const int64_t *src, int64_t *dst, + uint32_t *pnoise, int src_chan, int dst_chan, int num, + int64_t volume, int shift, int shift_orig, bool pol, + bool assign) +{ + const uint8_t selector = (shift_orig > 0) + assign * 2; + + /* optimize some cases */ + switch (selector) { + case 0: + virtual_oss_mixer_core_sub(src, dst, NULL, src_chan, dst_chan, + num, volume, shift, shift_orig, pol, false); + break; + case 1: + virtual_oss_mixer_core_sub(src, dst, pnoise, src_chan, dst_chan, + num, volume, shift, shift_orig, pol, false); + break; + case 2: + virtual_oss_mixer_core_sub(src, dst, NULL, src_chan, dst_chan, + num, volume, shift, shift_orig, pol, true); + break; + case 3: + virtual_oss_mixer_core_sub(src, dst, pnoise, src_chan, dst_chan, + num, volume, shift, shift_orig, pol, true); + break; + } +} + +void * +virtual_oss_process(void *arg __unused) +{ + vprofile_t *pvp; + vclient_t *pvc; + vmonitor_t *pvm; + struct voss_backend *rx_be = voss_rx_backend; + struct voss_backend *tx_be = voss_tx_backend; + int rx_fmt; + int tx_fmt; + int rx_chn; + int tx_chn; + int off; + int src_chans; + int dst_chans; + int src; + int len; + int samples; + int shift; + int shift_orig; + int shift_fmt; + int buffer_dsp_max_size; + int buffer_dsp_half_size; + int buffer_dsp_rx_sample_size; + int buffer_dsp_rx_size; + int buffer_dsp_tx_size_ref; + int buffer_dsp_tx_size; + uint64_t nice_timeout = 0; + uint64_t last_timestamp; + int blocks; + int volume; + int x_off; + int x; + int y; + + uint8_t *buffer_dsp; + int64_t *buffer_monitor; + int64_t *buffer_temp; + int64_t *buffer_data; + int64_t *buffer_local; + int64_t *buffer_orig; + + bool need_delay = false; + + buffer_dsp_max_size = voss_dsp_samples * + voss_dsp_max_channels * (voss_dsp_bits / 8); + buffer_dsp_half_size = (voss_dsp_samples / 2) * + voss_dsp_max_channels * (voss_dsp_bits / 8); + + buffer_dsp = malloc(buffer_dsp_max_size); + buffer_temp = malloc(voss_dsp_samples * voss_max_channels * 8); + buffer_monitor = malloc(voss_dsp_samples * voss_max_channels * 8); + buffer_local = malloc(voss_dsp_samples * voss_max_channels * 8); + buffer_data = malloc(voss_dsp_samples * voss_max_channels * 8); + buffer_orig = malloc(voss_dsp_samples * voss_max_channels * 8); + + if (buffer_dsp == NULL || buffer_temp == NULL || + buffer_monitor == NULL || buffer_local == NULL || + buffer_data == NULL || buffer_orig == NULL) + errx(1, "Cannot allocate buffer memory"); + + while (1) { + rx_be->close(rx_be); + tx_be->close(tx_be); + + if (voss_exit) + break; + if (need_delay) + sleep(2); + + voss_dsp_rx_refresh = 0; + voss_dsp_tx_refresh = 0; + + rx_be = voss_rx_backend; + tx_be = voss_tx_backend; + + switch (voss_dsp_bits) { + case 8: + rx_fmt = tx_fmt = + AFMT_S8 | AFMT_U8; + break; + case 16: + rx_fmt = tx_fmt = + AFMT_S16_BE | AFMT_S16_LE | + AFMT_U16_BE | AFMT_U16_LE; + break; + case 24: + rx_fmt = tx_fmt = + AFMT_S24_BE | AFMT_S24_LE | + AFMT_U24_BE | AFMT_U24_LE; + break; + case 32: + rx_fmt = tx_fmt = + AFMT_S32_BE | AFMT_S32_LE | + AFMT_U32_BE | AFMT_U32_LE | + AFMT_F32_BE | AFMT_F32_LE; + break; + default: + rx_fmt = tx_fmt = 0; + break; + } + + rx_chn = voss_dsp_max_channels; + + if (rx_be->open(rx_be, voss_dsp_rx_device, voss_dsp_sample_rate, + buffer_dsp_half_size, &rx_chn, &rx_fmt) < 0) { + need_delay = true; + continue; + } + + buffer_dsp_rx_sample_size = rx_chn * (voss_dsp_bits / 8); + buffer_dsp_rx_size = voss_dsp_samples * buffer_dsp_rx_sample_size; + + tx_chn = voss_dsp_max_channels; + if (tx_be->open(tx_be, voss_dsp_tx_device, voss_dsp_sample_rate, + buffer_dsp_max_size, &tx_chn, &tx_fmt) < 0) { + need_delay = true; + continue; + } + + buffer_dsp_tx_size_ref = voss_dsp_samples * + tx_chn * (voss_dsp_bits / 8); + + /* reset compressor gain */ + for (x = 0; x != VMAX_CHAN; x++) + voss_output_compressor_gain[x] = 1.0; + + /* reset local buffer */ + memset(buffer_local, 0, 8 * voss_dsp_samples * voss_max_channels); + + while (1) { + uint64_t delta_time; + + /* Check if DSP device should be re-opened */ + if (voss_exit) + break; + if (voss_dsp_rx_refresh || voss_dsp_tx_refresh) { + need_delay = false; + break; + } + delta_time = nice_timeout - virtual_oss_timestamp(); + + /* Don't service more than 2x sample rate */ + nice_timeout = virtual_oss_delay_ns() / 2; + if (delta_time >= 1000 && delta_time <= nice_timeout) { + /* convert from ns to us */ + usleep(delta_time / 1000); + } + /* Compute next timeout */ + nice_timeout += virtual_oss_timestamp(); + + /* Read in samples */ + len = rx_be->transfer(rx_be, buffer_dsp, buffer_dsp_rx_size); + if (len < 0 || (len % buffer_dsp_rx_sample_size) != 0) { + need_delay = true; + break; + } + if (len == 0) + continue; + + /* Convert to 64-bit samples */ + format_import(rx_fmt, buffer_dsp, len, buffer_data); + + samples = len / buffer_dsp_rx_sample_size; + src_chans = voss_mix_channels; + + /* Compute master input peak values */ + format_maximum(buffer_data, voss_input_peak, rx_chn, samples, 0); + + /* Remix format */ + format_remix(buffer_data, rx_chn, src_chans, samples); + + /* Refresh timestamp */ + last_timestamp = virtual_oss_timestamp(); + + atomic_lock(); + + if (TAILQ_FIRST(&virtual_monitor_input) != NULL) { + /* make a copy of the input data, in case of remote monitoring */ + memcpy(buffer_monitor, buffer_data, 8 * samples * src_chans); + } + + /* (0) Check for local monitoring of output data */ + + TAILQ_FOREACH(pvm, &virtual_monitor_local, entry) { + + int64_t val; + + if (pvm->mute != 0 || pvm->src_chan >= src_chans || + pvm->dst_chan >= src_chans) + continue; + + src = pvm->src_chan; + shift = pvm->shift; + x = pvm->dst_chan; + + if (pvm->pol) { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = -(buffer_local[(y * src_chans) + src] >> shift); + buffer_data[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = -(buffer_local[(y * src_chans) + src] << shift); + buffer_data[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } else { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = (buffer_local[(y * src_chans) + src] >> shift); + buffer_data[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = (buffer_local[(y * src_chans) + src] << shift); + buffer_data[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } + } + + /* make a copy of the input data */ + memcpy(buffer_orig, buffer_data, 8 * samples * src_chans); + + /* (1) Distribute input samples to all clients */ + + TAILQ_FOREACH(pvp, &virtual_profile_client_head, entry) { + + if (TAILQ_FIRST(&pvp->head) == NULL) + continue; + + /* check if compressor should be applied */ + voss_compressor(buffer_data, pvp->rx_compressor_gain, + &pvp->rx_compressor_param, samples * src_chans, + src_chans, (1ULL << (pvp->bits - 1)) - 1ULL); + + TAILQ_FOREACH(pvc, &pvp->head, entry) { + + dst_chans = pvc->channels; + + if (dst_chans > (int)voss_max_channels) + continue; + + shift_fmt = pvp->bits - (vclient_sample_bytes(pvc) * 8); + + for (x = 0; x != dst_chans; x++) { + src = pvp->rx_src[x]; + shift_orig = pvp->rx_shift[x] - shift_fmt; + shift = shift_orig - VVOLUME_UNIT_SHIFT; + volume = pvc->rx_volume; + + if (pvp->rx_mute[x] || src >= src_chans || volume == 0) { + for (y = 0; y != (samples * dst_chans); y += dst_chans) + buffer_temp[y + x] = 0; + continue; + } + + virtual_oss_mixer_core(buffer_data + src, buffer_temp + x, + &pvc->rx_noise_rem, src_chans, dst_chans, samples, + volume, shift, shift_orig, pvp->rx_pol[x], true); + } + + format_maximum(buffer_temp, pvp->rx_peak_value, + dst_chans, samples, shift_fmt); + + /* check if recording is disabled */ + if (pvc->rx_enabled == 0 || + (voss_is_recording == 0 && pvc->type != VTYPE_OSS_DAT)) + continue; + + pvc->rx_timestamp = last_timestamp; + pvc->rx_samples += samples * dst_chans; + + /* store data into ring buffer */ + vclient_write_linear(pvc, &pvc->rx_ring[0], + buffer_temp, samples * dst_chans); + } + + /* restore buffer, if any */ + if (pvp->rx_compressor_param.enabled) + memcpy(buffer_data, buffer_orig, 8 * samples * src_chans); + } + + /* fill main output buffer with silence */ + + memset(buffer_temp, 0, sizeof(buffer_temp[0]) * + samples * src_chans); + + /* (2) Run audio delay locator */ + + if (voss_ad_enabled != 0) { + y = (samples * voss_mix_channels); + for (x = 0; x != y; x += voss_mix_channels) { + buffer_temp[x + voss_ad_output_channel] += + voss_ad_getput_sample(buffer_data + [x + voss_ad_input_channel]); + } + } + + /* (3) Load output samples from all clients */ + + TAILQ_FOREACH(pvp, &virtual_profile_client_head, entry) { + TAILQ_FOREACH(pvc, &pvp->head, entry) { + + if (pvc->tx_enabled == 0) + continue; + + dst_chans = pvc->channels; + + if (dst_chans > (int)voss_max_channels) + continue; + + /* update counters regardless of data presence */ + pvc->tx_timestamp = last_timestamp; + pvc->tx_samples += samples * dst_chans; + + /* read data from ring buffer */ + if (vclient_read_linear(pvc, &pvc->tx_ring[0], + buffer_data, samples * dst_chans) == 0) + continue; + + shift_fmt = pvp->bits - (vclient_sample_bytes(pvc) * 8); + + format_maximum(buffer_data, pvp->tx_peak_value, + dst_chans, samples, shift_fmt); + + for (x = 0; x != pvp->channels; x++) { + src = pvp->tx_dst[x]; + shift_orig = pvp->tx_shift[x] + shift_fmt; + shift = shift_orig - VVOLUME_UNIT_SHIFT; + volume = pvc->tx_volume; + + if (pvp->tx_mute[x] || src >= src_chans || volume == 0) + continue; + + /* + * Automagically re-map + * channels when the client is + * requesting fewer channels + * than specified in the + * profile. This typically + * allows automagic mono to + * stereo conversion. + */ + if (__predict_false(x >= dst_chans)) + x_off = x % dst_chans; + else + x_off = x; + + virtual_oss_mixer_core(buffer_data + x_off, buffer_temp + src, + &pvc->tx_noise_rem, dst_chans, src_chans, samples, + volume, shift, shift_orig, pvp->tx_pol[x], false); + } + } + } + + /* (4) Load output samples from all loopbacks */ + + TAILQ_FOREACH(pvp, &virtual_profile_loopback_head, entry) { + TAILQ_FOREACH(pvc, &pvp->head, entry) { + + if (pvc->tx_enabled == 0) + continue; + + dst_chans = pvc->channels; + + if (dst_chans > (int)voss_max_channels) + continue; + + /* read data from ring buffer */ + if (vclient_read_linear(pvc, &pvc->tx_ring[0], + buffer_data, samples * dst_chans) == 0) + continue; + + pvc->tx_timestamp = last_timestamp; + pvc->tx_samples += samples * dst_chans; + + shift_fmt = pvp->bits - (vclient_sample_bytes(pvc) * 8); + + format_maximum(buffer_data, pvp->tx_peak_value, + dst_chans, samples, shift_fmt); + + for (x = 0; x != pvp->channels; x++) { + src = pvp->tx_dst[x]; + shift_orig = pvp->tx_shift[x] + shift_fmt; + shift = shift_orig - VVOLUME_UNIT_SHIFT; + volume = pvc->tx_volume; + + if (pvp->tx_mute[x] || src >= src_chans || volume == 0) + continue; + + /* + * Automagically re-map + * channels when the client is + * requesting fewer channels + * than specified in the + * profile. This typically + * allows automagic mono to + * stereo conversion. + */ + if (__predict_false(x >= dst_chans)) + x_off = x % dst_chans; + else + x_off = x; + + virtual_oss_mixer_core(buffer_data + x_off, buffer_temp + src, + &pvc->tx_noise_rem, dst_chans, src_chans, samples, + volume, shift, shift_orig, pvp->tx_pol[x], false); + } + } + } + + /* (5) Check for input monitoring */ + + TAILQ_FOREACH(pvm, &virtual_monitor_input, entry) { + + int64_t val; + + if (pvm->mute != 0 || pvm->src_chan >= src_chans || + pvm->dst_chan >= src_chans) + continue; + + src = pvm->src_chan; + shift = pvm->shift; + x = pvm->dst_chan; + + if (pvm->pol) { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = -(buffer_monitor[(y * src_chans) + src] >> shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = -(buffer_monitor[(y * src_chans) + src] << shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } else { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = (buffer_monitor[(y * src_chans) + src] >> shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = (buffer_monitor[(y * src_chans) + src] << shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } + } + + if (TAILQ_FIRST(&virtual_monitor_output) != NULL) { + memcpy(buffer_monitor, buffer_temp, + 8 * samples * src_chans); + } + + /* (6) Check for output monitoring */ + + TAILQ_FOREACH(pvm, &virtual_monitor_output, entry) { + + int64_t val; + + if (pvm->mute != 0 || pvm->src_chan >= src_chans || + pvm->dst_chan >= src_chans) + continue; + + src = pvm->src_chan; + shift = pvm->shift; + x = pvm->dst_chan; + + if (pvm->pol) { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = -(buffer_monitor[(y * src_chans) + src] >> shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = -(buffer_monitor[(y * src_chans) + src] << shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } else { + if (shift < 0) { + shift = -shift; + for (y = 0; y != samples; y++) { + val = (buffer_monitor[(y * src_chans) + src] >> shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } else { + for (y = 0; y != samples; y++) { + val = (buffer_monitor[(y * src_chans) + src] << shift); + buffer_temp[(y * src_chans) + x] += val; + if (val < 0) + val = -val; + if (val > pvm->peak_value) + pvm->peak_value = val; + } + } + } + } + + /* make a copy of the output data */ + memcpy(buffer_data, buffer_temp, 8 * samples * src_chans); + + /* make a copy for local monitoring, if any */ + if (TAILQ_FIRST(&virtual_monitor_local) != NULL) { + const int end = src_chans * (voss_dsp_samples - samples); + const int offs = src_chans * samples; + + assert(end >= 0); + + /* shift down samples */ + for (int xx = 0; xx != end; xx++) + buffer_local[xx] = buffer_local[xx + offs]; + /* copy in new ones */ + memcpy(buffer_local + end, buffer_temp, 8 * samples * src_chans); + } + + /* (7) Check for output recording */ + + TAILQ_FOREACH(pvp, &virtual_profile_loopback_head, entry) { + + if (TAILQ_FIRST(&pvp->head) == NULL) + continue; + + /* check if compressor should be applied */ + voss_compressor(buffer_temp, pvp->rx_compressor_gain, + &pvp->rx_compressor_param, samples, + samples * src_chans, (1ULL << (pvp->bits - 1)) - 1ULL); + + TAILQ_FOREACH(pvc, &pvp->head, entry) { + + dst_chans = pvc->channels; + + if (dst_chans > (int)voss_max_channels) + continue; + + shift_fmt = pvp->bits - (vclient_sample_bytes(pvc) * 8); + + for (x = 0; x != dst_chans; x++) { + src = pvp->rx_src[x]; + shift_orig = pvp->rx_shift[x] - shift_fmt; + shift = shift_orig - VVOLUME_UNIT_SHIFT; + volume = pvc->rx_volume; + + if (pvp->rx_mute[x] || src >= src_chans || volume == 0) { + for (y = 0; y != (samples * dst_chans); y += dst_chans) + buffer_monitor[y + x] = 0; + continue; + } + + virtual_oss_mixer_core(buffer_temp + src, buffer_monitor + x, + &pvc->rx_noise_rem, src_chans, dst_chans, samples, + volume, shift, shift_orig, pvp->rx_pol[x], true); + } + + format_maximum(buffer_monitor, pvp->rx_peak_value, + dst_chans, samples, shift_fmt); + + /* check if recording is disabled */ + if (pvc->rx_enabled == 0 || + (voss_is_recording == 0 && pvc->type != VTYPE_OSS_DAT)) + continue; + + pvc->rx_timestamp = last_timestamp; + pvc->rx_samples += samples * dst_chans; + + /* store data into ring buffer */ + vclient_write_linear(pvc, &pvc->rx_ring[0], + buffer_monitor, samples * dst_chans); + } + + /* restore buffer, if any */ + if (pvp->rx_compressor_param.enabled) + memcpy(buffer_temp, buffer_data, 8 * samples * src_chans); + } + + atomic_wakeup(); + + format_remix(buffer_temp, voss_mix_channels, tx_chn, samples); + + /* Compute master output peak values */ + + format_maximum(buffer_temp, voss_output_peak, + tx_chn, samples, 0); + + /* Apply compressor, if any */ + + voss_compressor(buffer_temp, voss_output_compressor_gain, + &voss_output_compressor_param, samples * tx_chn, + tx_chn, format_max(tx_fmt)); + + /* Recompute buffer DSP transmit size according to received number of samples */ + + buffer_dsp_tx_size = samples * tx_chn * (voss_dsp_bits / 8); + + /* Export and transmit resulting audio */ + + format_export(tx_fmt, buffer_temp, buffer_dsp, + buffer_dsp_tx_size); + + atomic_unlock(); + + /* Get output delay in bytes */ + tx_be->delay(tx_be, &blocks); + + /* + * Simple fix for jitter: Repeat data when too + * little. Skip data when too much. This + * should not happen during normal operation. + */ + if (blocks == 0) { + blocks = 2; /* buffer is empty */ + voss_jitter_up++; + } else if (blocks >= (3 * buffer_dsp_tx_size_ref)) { + blocks = 0; /* too much data */ + voss_jitter_down++; + } else { + blocks = 1; /* normal */ + } + + len = 0; + while (blocks--) { + off = 0; + while (off < (int)buffer_dsp_tx_size) { + len = tx_be->transfer(tx_be, buffer_dsp + off, + buffer_dsp_tx_size - off); + if (len <= 0) + break; + off += len; + } + if (len <= 0) + break; + } + + /* check for error only */ + if (len < 0) { + need_delay = true; + break; + } + } + } + + free(buffer_dsp); + free(buffer_temp); + free(buffer_monitor); + free(buffer_local); + free(buffer_data); + free(buffer_orig); + + return (NULL); +} diff --git a/usr.sbin/virtual_oss/virtual_oss/virtual_oss.h b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.h new file mode 100644 index 000000000000..616de2e1abd0 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss/virtual_oss.h @@ -0,0 +1,206 @@ +/*- + * Copyright (c) 2012-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _VIRTUAL_OSS_H_ +#define _VIRTUAL_OSS_H_ + +#include <sys/ioccom.h> + +#define VIRTUAL_OSS_NAME_MAX 32 +#define VIRTUAL_OSS_VERSION 0x00010008 +#define VIRTUAL_OSS_OPTIONS_MAX 1024 /* bytes */ +#define VIRTUAL_OSS_FILTER_MAX 65536 /* samples */ + +#define VIRTUAL_OSS_GET_VERSION _IOR('O', 0, int) + +struct virtual_oss_io_info { + int number; /* must be first */ + int channel; + char name[VIRTUAL_OSS_NAME_MAX]; + int bits; + int rx_amp; + int tx_amp; + int rx_chan; + int tx_chan; + int rx_mute; + int tx_mute; + int rx_pol; + int tx_pol; + int rx_delay; /* in samples */ + int rx_delay_limit; /* in samples */ +}; + +#define VIRTUAL_OSS_GET_DEV_INFO _IOWR('O', 1, struct virtual_oss_io_info) +#define VIRTUAL_OSS_SET_DEV_INFO _IOW('O', 2, struct virtual_oss_io_info) + +#define VIRTUAL_OSS_GET_LOOP_INFO _IOWR('O', 3, struct virtual_oss_io_info) +#define VIRTUAL_OSS_SET_LOOP_INFO _IOW('O', 4, struct virtual_oss_io_info) + +struct virtual_oss_mon_info { + int number; + int bits; + int src_chan; + int dst_chan; + int pol; + int mute; + int amp; +}; + +#define VIRTUAL_OSS_GET_INPUT_MON_INFO _IOWR('O', 5, struct virtual_oss_mon_info) +#define VIRTUAL_OSS_SET_INPUT_MON_INFO _IOW('O', 6, struct virtual_oss_mon_info) + +#define VIRTUAL_OSS_GET_OUTPUT_MON_INFO _IOWR('O', 7, struct virtual_oss_mon_info) +#define VIRTUAL_OSS_SET_OUTPUT_MON_INFO _IOW('O', 8, struct virtual_oss_mon_info) + +#define VIRTUAL_OSS_GET_LOCAL_MON_INFO _IOWR('O', 43, struct virtual_oss_mon_info) +#define VIRTUAL_OSS_SET_LOCAL_MON_INFO _IOW('O', 44, struct virtual_oss_mon_info) + +struct virtual_oss_io_peak { + int number; /* must be first */ + int channel; + char name[VIRTUAL_OSS_NAME_MAX]; + int bits; + long long rx_peak_value; + long long tx_peak_value; +}; + +#define VIRTUAL_OSS_GET_DEV_PEAK _IOWR('O', 9, struct virtual_oss_io_peak) +#define VIRTUAL_OSS_GET_LOOP_PEAK _IOWR('O', 10, struct virtual_oss_io_peak) + +struct virtual_oss_mon_peak { + int number; + int bits; + long long peak_value; +}; + +#define VIRTUAL_OSS_GET_INPUT_MON_PEAK _IOWR('O', 11, struct virtual_oss_mon_peak) +#define VIRTUAL_OSS_GET_OUTPUT_MON_PEAK _IOWR('O', 12, struct virtual_oss_mon_peak) +#define VIRTUAL_OSS_GET_LOCAL_MON_PEAK _IOWR('O', 45, struct virtual_oss_mon_peak) + +#define VIRTUAL_OSS_ADD_INPUT_MON _IOR('O', 13, int) +#define VIRTUAL_OSS_ADD_OUTPUT_MON _IOR('O', 14, int) +#define VIRTUAL_OSS_ADD_LOCAL_MON _IOR('O', 46, int) + +struct virtual_oss_compressor { + int enabled; + int knee; +#define VIRTUAL_OSS_KNEE_MAX 255 /* inclusive */ +#define VIRTUAL_OSS_KNEE_MIN 0 + int attack; +#define VIRTUAL_OSS_ATTACK_MAX 62 /* inclusive */ +#define VIRTUAL_OSS_ATTACK_MIN 0 + int decay; +#define VIRTUAL_OSS_DECAY_MAX 62 /* inclusive */ +#define VIRTUAL_OSS_DECAY_MIN 0 + int gain; /* read only */ +#define VIRTUAL_OSS_GAIN_MAX 1000 /* inclusive */ +#define VIRTUAL_OSS_GAIN_MIN 0 +}; + +#define VIRTUAL_OSS_SET_OUTPUT_LIMIT _IOW('O', 17, struct virtual_oss_compressor) +#define VIRTUAL_OSS_GET_OUTPUT_LIMIT _IOWR('O', 18, struct virtual_oss_compressor) + +struct virtual_oss_io_limit { + int number; /* must be first */ + struct virtual_oss_compressor param; +}; + +#define VIRTUAL_OSS_SET_DEV_LIMIT _IOW('O', 19, struct virtual_oss_io_limit) +#define VIRTUAL_OSS_GET_DEV_LIMIT _IOWR('O', 20, struct virtual_oss_io_limit) + +#define VIRTUAL_OSS_SET_LOOP_LIMIT _IOW('O', 21, struct virtual_oss_io_limit) +#define VIRTUAL_OSS_GET_LOOP_LIMIT _IOWR('O', 22, struct virtual_oss_io_limit) + +struct virtual_oss_master_peak { + int channel; + int bits; + long long peak_value; +}; + +#define VIRTUAL_OSS_GET_OUTPUT_PEAK _IOWR('O', 23, struct virtual_oss_master_peak) +#define VIRTUAL_OSS_GET_INPUT_PEAK _IOWR('O', 24, struct virtual_oss_master_peak) + +#define VIRTUAL_OSS_SET_RECORDING _IOW('O', 25, int) +#define VIRTUAL_OSS_GET_RECORDING _IOR('O', 26, int) + +struct virtual_oss_audio_delay_locator { + int channel_output; + int channel_input; + int channel_last; + int signal_output_level; /* 2**n */ + int signal_input_delay; /* in samples, roundtrip */ + int signal_delay_hz; /* in samples, HZ */ + int locator_enabled; +}; + +#define VIRTUAL_OSS_SET_AUDIO_DELAY_LOCATOR _IOW('O', 27, struct virtual_oss_audio_delay_locator) +#define VIRTUAL_OSS_GET_AUDIO_DELAY_LOCATOR _IOR('O', 28, struct virtual_oss_audio_delay_locator) +#define VIRTUAL_OSS_RST_AUDIO_DELAY_LOCATOR _IO('O', 29) + +struct virtual_oss_midi_delay_locator { + int channel_output; + int channel_input; + int signal_delay; + int signal_delay_hz; /* in samples, HZ */ + int locator_enabled; +}; + +#define VIRTUAL_OSS_SET_MIDI_DELAY_LOCATOR _IOW('O', 30, struct virtual_oss_midi_delay_locator) +#define VIRTUAL_OSS_GET_MIDI_DELAY_LOCATOR _IOR('O', 31, struct virtual_oss_midi_delay_locator) +#define VIRTUAL_OSS_RST_MIDI_DELAY_LOCATOR _IO('O', 32) + +#define VIRTUAL_OSS_ADD_OPTIONS _IOWR('O', 33, char [VIRTUAL_OSS_OPTIONS_MAX]) + +struct virtual_oss_fir_filter { + int number; /* must be first */ + int channel; + int filter_size; + double *filter_data; +}; + +#define VIRTUAL_OSS_GET_RX_DEV_FIR_FILTER _IOWR('O', 34, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_SET_RX_DEV_FIR_FILTER _IOWR('O', 35, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_GET_TX_DEV_FIR_FILTER _IOWR('O', 36, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_SET_TX_DEV_FIR_FILTER _IOWR('O', 37, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_GET_RX_LOOP_FIR_FILTER _IOWR('O', 38, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_SET_RX_LOOP_FIR_FILTER _IOWR('O', 39, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_GET_TX_LOOP_FIR_FILTER _IOWR('O', 40, struct virtual_oss_fir_filter) +#define VIRTUAL_OSS_SET_TX_LOOP_FIR_FILTER _IOWR('O', 41, struct virtual_oss_fir_filter) + +#define VIRTUAL_OSS_GET_SAMPLE_RATE _IOR('O', 42, int) + +struct virtual_oss_system_info { + unsigned tx_jitter_up; + unsigned tx_jitter_down; + unsigned sample_rate; + unsigned sample_bits; + unsigned sample_channels; + char rx_device_name[64]; + char tx_device_name[64]; +}; + +#define VIRTUAL_OSS_GET_SYSTEM_INFO _IOR('O', 43, struct virtual_oss_system_info) + +#endif /* _VIRTUAL_OSS_H_ */ diff --git a/usr.sbin/virtual_oss/virtual_oss_cmd/Makefile b/usr.sbin/virtual_oss/virtual_oss_cmd/Makefile new file mode 100644 index 000000000000..b209d3dca068 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss_cmd/Makefile @@ -0,0 +1,8 @@ +PROG= virtual_oss_cmd +MAN= ${PROG}.8 + +SRCS= command.c + +CFLAGS+= -I${SRCTOP}/usr.sbin/virtual_oss/virtual_oss + +.include <bsd.prog.mk> diff --git a/usr.sbin/virtual_oss/virtual_oss_cmd/command.c b/usr.sbin/virtual_oss/virtual_oss_cmd/command.c new file mode 100644 index 000000000000..64781992ddfd --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss_cmd/command.c @@ -0,0 +1,113 @@ +/*- + * Copyright (c) 2021-2022 Hans Petter Selasky + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <err.h> +#include <sysexits.h> +#include <stdarg.h> +#include <fcntl.h> + +#include "virtual_oss.h" + +static void +message(const char *fmt, ...) +{ + va_list list; + + va_start(list, fmt); + vfprintf(stderr, fmt, list); + va_end(list); +} + +static void +usage(void) +{ + message("Usage: virtual_oss_cmd /dev/vdsp.ctl [command line arguments to pass to virtual_oss]\n"); + exit(EX_USAGE); +} + +int +main(int argc, char **argv) +{ + char options[VIRTUAL_OSS_OPTIONS_MAX] = {}; + size_t offset = 0; + size_t len = VIRTUAL_OSS_OPTIONS_MAX - 1; + int fd; + + /* check if no options */ + if (argc < 2) + usage(); + + fd = open(argv[1], O_RDWR); + if (fd < 0) + errx(EX_SOFTWARE, "Could not open '%s'", argv[1]); + + for (int x = 2; x != argc; x++) { + size_t tmp = strlen(argv[x]) + 1; + if (tmp > len) + errx(EX_SOFTWARE, "Too many options passed"); + memcpy(options + offset, argv[x], tmp); + options[offset + tmp - 1] = ' '; + offset += tmp; + len -= tmp; + } + + if (options[0] == 0) { + struct virtual_oss_system_info info; + if (ioctl(fd, VIRTUAL_OSS_GET_SYSTEM_INFO, &info) < 0) + errx(EX_SOFTWARE, "Cannot get system information"); + + info.rx_device_name[sizeof(info.rx_device_name) - 1] = 0; + info.tx_device_name[sizeof(info.tx_device_name) - 1] = 0; + + printf("Sample rate: %u Hz\n" + "Sample width: %u bits\n" + "Sample channels: %u\n" + "Output jitter: %u / %u\n" + "Input device name: %s\n" + "Output device name: %s\n", + info.sample_rate, + info.sample_bits, + info.sample_channels, + info.tx_jitter_down, + info.tx_jitter_up, + info.rx_device_name, + info.tx_device_name); + } else { + /* execute options */ + if (ioctl(fd, VIRTUAL_OSS_ADD_OPTIONS, options) < 0) + errx(EX_SOFTWARE, "One or more invalid options"); + /* show error, if any */ + if (options[0] != '\0') + errx(EX_SOFTWARE, "%s", options); + } + + close(fd); + return (0); +} diff --git a/usr.sbin/virtual_oss/virtual_oss_cmd/virtual_oss_cmd.8 b/usr.sbin/virtual_oss/virtual_oss_cmd/virtual_oss_cmd.8 new file mode 100644 index 000000000000..a200d88a4a32 --- /dev/null +++ b/usr.sbin/virtual_oss/virtual_oss_cmd/virtual_oss_cmd.8 @@ -0,0 +1,103 @@ +.\" +.\" Copyright (c) 2021-2022 Hans Petter Selasky <hselasky@freebsd.org> +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd February 12, 2025 +.Dt VIRTUAL_OSS_CMD 8 +.Os +.Sh NAME +.Nm virtual_oss_cmd +.Nd modify a running +.Xr virtual_oss 8 +instance's options +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +pass additional command line arguments to a running +.Xr virtual_oss 8 +instance via its control device. +Supported command line arguments: +.Bl -tag -width indent +.It Fl E Ar xxx +.It Fl F Ar xxx +.It Fl G Ar xxx +.It Fl L Ar xxx +.It Fl M Ar xxx +.It Fl O Ar xxx +.It Fl P Ar xxx +.It Fl R Ar xxx +.It Fl a Ar xxx +.It Fl b Ar xxx +.It Fl c Ar xxx +.It Fl d Ar xxx +.It Fl e Ar xxx +.It Fl f Ar xxx +.It Fl l Ar xxx +.It Fl m Ar xxx +.It Fl p Ar xxx +.It Fl s Ar xxx +.It Fl w Ar xxx +.El +.Pp +Refer to +.Xr virtual_oss 8 +for a detailed description of the command line arguments. +.Sh EXAMPLES +To change the recording device: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl -R /dev/dsp4 + +.Ed +To change the playback device: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl -P /dev/dsp4 + +.Ed +To enable recording: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl -E 1 + +.Ed +To disable recording: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl -E 0 + +.Ed +To create a new DSP device on the fly: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl -b 16 -c 2 -d dsp.new + +.Ed +To show system information: +.Bd -literal -offset indent +virtual_oss_cmd /dev/vdsp.ctl + +.Ed +.Sh SEE ALSO +.Xr virtual_oss 8 +.Sh AUTHORS +.Nm +was written by +.An Hans Petter Selasky hselasky@freebsd.org . |