| Commit message (Collapse) | Author | Age | Files | Lines |
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This fixes a bug where a binary linked using max-page-size=0x200000
can result in a bogus relocation offset when running on a system
with a smaller page size. This causes samples to fall outside
the image mapping or be translated to the wrong address (resulting
in symbol resolution, or incorrect symbol resolution). We noticed
this at Netflix because we run a patchset enabling 16k pages on
amd64 and have been compiling userspace with a 2MB page size.
Since we started doing this profiling userspace binaries has been
wonky.
Reviewed by: ali_mashtizadeh.com
Differential Revision: https://reviews.freebsd.org/D59771
Sponsored by: Netflix
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Add support for reading the MPERF (MSR 0xE7) and APERF (MSR 0xE8)
model-specific registers on AMD/Intel CPUs through hwpmc(4). These
counters track maximum and actual performance frequency respectively,
and are used to compute effective CPU frequency scaling independent
of the nominal TSC rate. The name of the class was chosen as PERF
because later support for other PERF MSRs can be added to the same
class.
Extend libpmc(3) to expose the AMD/Intel MPERF/APERF counters added
to hwpmc(4) in the companion kernel change, so userland consumers
(pmcstat(8), etc.) can allocate and read these events by name.
Document the new PERF class and its MPERF/APERF counters in a new
pmc.perf.3 manual page, describing their semantics and how to read
them via pmc(3) and pmcstat(8).
Bump PMC_VERSION_MINOR.
Signed-off-by: Anderson Nascimento <anascime@amd.com>
Reviewed by: Ali Mashtizadeh <ali@mashtizadeh.com>, mhorne
Reviewed by: ziaee (manpages)
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D58647
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- consistently use Mt request within Aq. This makes author
e-mail addresses clickable in many frontends.
- @freebsd.org -> @FreeBSD.org
- (user@host.tld) -> Aq Mt user@host.tld
Event: Berlin Hackathon 202609
MFC after: 3 days
Reviewed by: ziaee
Differential Revision: https://reviews.freebsd.org/D59410
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This change adds support for AMD's UMC performance counters. It is a
bit more complicated than existing counters because the enable bit has
moved. This supports Zen 4 through most Zen 6 chips as UMC counters are
per-node, where a node does not necessarily translate to a NUMA domain.
A few follow up changes to PMC will address this limitation.
Reviewed by: mhorne
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/2368
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Fix two small bugs affecting the event parsing of AMD L3 counters.
AMD's manual and JSON disagree about the naming scheme on recent
processors. I use the naming scheme present in the recent PPRs to be
consistent, so in the JSON parser we rename 'allslices' to 'allsources'
just as we already do with sliceid and sourceid. Also ensure that we
parse the 0x prefix present in the newer JSON files.
Reviewed by: mhorne
Sponsored by: Netflix
MFC after: 1 week
Pull Request: https://github.com/freebsd/freebsd-src/pull/2180
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Register PMC_CLASS_RAPL in libpmc: event table, allocator, class-table
descriptor, and the event-name/class-listing lookups, all x86-guarded
and modeled on the TSC class. Energy events are read-only and
unqualified. The class prefix (RAPL-) supplies the friendly spelling, so
pmcstat -S rapl-energy-pkg resolves to the canonical ENERGY_PKG event.
Add a pmc.rapl.3 manual page documenting the events, counter scope, the
microjoule unit and wrap handling, and the NUMA/package domain mapping;
link it from pmc.3.
Reviewed by: mhorne
Discussed with: Ali Mashtizadeh <ali@mashtizadeh.com>
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D58029
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Add kernel and userland support for Zen6 IBS extensions per AMD pub
69205 (rev 1.00, March 2026): alternate fetch/op disable via ctl2[0],
fetch latency filtering, virtual address bit 63 filtering, and
streaming-store filtering. Decode the new IbsOpData2 StrmSt and
RmtSocket bits. Update libpmc, pmcstat and manpage.
Pre-Zen6 systems work unchanged with ibs_ctl2 == 0.
Signed-off-by: Andre Silva <andasilv@amd.com>
Reviewed by: Ali Mashtizadeh <ali@mashtizadeh.com>, mhorne
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D56914
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Ensure that the optional MSRs and the user flags are guarded by the
cpuid feature flags. This prevents the user from triggering undefined
behavior or crashes on AMD processors where some of these features are
not present. As part of this, I added the branch target and DATA4 MSRs
to the IBS op state as those are only present on a subset of the Zen
chips that I have tested.
Reviewed by: mhorne
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/2133
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The pmclog record header carries the raw TSC for each event. Export it
in struct pmclog_ev, fix JSON output to emit it unsigned, and preserve
the installed header ABI by overlaying pl_tsc with the legacy pl_ts
storage.
Update pmclog(3) to document the TSC semantics and the legacy alias.
Sponsored by: AMD
Signed-off-by: Andre Silva <andasilv@amd.com>
Reviewed by: imp, mhorne, Ali Mashtizadeh
Pull Request: https://github.com/freebsd/freebsd-src/pull/2085
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Fix the copyright attribution to Netflix and the date and missing SPDX
line in pmc.ibs man page.
Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2094
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This change adds support for three new Intel fields to jevents.c:
- MetricThreshold
- MetricgroupNoGroup
- DefaultMetricgroupName
Reviewed by: ali_mashtizadeh.com, mhorne
Differential Revision: https://reviews.freebsd.org/D56017
MFC after: 1 week
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Obtained from: Intel perfmon (JSON event definitions)
Tested by: bms, olivier
MFC after: 1 week
Reviewed by: ali_mashtizadeh.com, mhorne
Differential Revision: https://reviews.freebsd.org/D55641
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Add support to libpmc for parsing the IBS qualifiers and computing the
ctl register value as a function of the qualifiers and the sample rate.
This includes all of the flags available up to AMD Zen 5. Along side
these user facing changes I included the documentation for AMD IBS.
Reviewed by: mhorne
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/2081
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This change allows for fine-grained capabilities per counter index. This
is particularly useful for AMD where subclasses are not exposed to the
general PMC code, but other architectures also have asymmetric behaviors
when it comes to specific counter indices.
A new PMC_OP_GETCAPS op is added to the hwpmc(4) ioctl interface.
Reviewed by: mhorne
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/2058
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A small enhancement.
Reviewed by: Ali Mashtizadeh <ali@mashtizadeh.com>
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D55830
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Adds all missing Intel fields and turns jevents.c into an explicit white
list mechanism so that we no longer ignore important fields that often
invalidate the counter. The json event parser must now parse every
field on each architecture that we support. This has been tested by
running tinderbox and manually running jevent against our current json
repository. As a bonus I fixed spelling errors in the AMD JSON
definitions.
Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2055
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Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2049
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The pmu event definitions for AMD Zen 5 was updated since it was
imported into the tree. As a bonus I also updated the recommended json
counters for Zen 1-3 even though we do not use that file yet.
Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2048
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This patch adds support for AMD IBS. It adds a new class of performance
counter that cotains two events: ibs-fetch and ibs-op events. Unlike
most existing sampled events, IBS events provide a number of values
containing extra information regarding the sample. To support this we
use the existing callchain event, and introduce a new flag for multipart
payloads. The first 8 bytes of the pc_sample contains a header that
defines up to four payloads.
Sponsored by: Netflix
Reviewed by: imp,mhorne
Pull Request: https://github.com/freebsd/freebsd-src/pull/2022
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The PMC flags available for DF and L3 counters were not all implemented.
More importantly, the field encodings for the L3 counters changed in an
incompatible way between Family 17h and Family 19h. Similarly, the
field encodings for the DF coutners changed between Family 19h and 1Ah.
I also added the precise retire flag for the 3rd core counter.
Lastly, I added a warning in the jevent parser because ignoring the
unknown fields results in counters incorrectly programmed. We should
not just ignore that.
Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2040
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Reviewed by: mhorne
Sponsored by: Klara, Inc.
Obtained from: Intel perfmon (JSON event definitions)
Differential Revision: https://reviews.freebsd.org/D55081
MFC after: 2 days
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On AMD processors libpmc was using the topic field (based on filename) to
determine the counter's subclass. Unfortunately, the JSON definitions for
AMD Zen 1-4 have the L3 counters in files shared with other counters.
This change has libpmc to use the pmu field (which is derived from the Unit
field in JSON) to determine the correct counter subclass.
Reviewed by: mhorne
MFC after: 2 weeks
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/1984
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Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1954
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This commit adds alderlaken CPU model to hwpmc/libpmc. JSON event
definitions are imported from Intel perfmon version 1.16.
Reviewed by: mhorne
MFC after: 1 week
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D49229
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This commit adds emerald rapids CPU model to hwpmc/libpmc. JSON event
definitions are imported from Intel perfmon version 1.06.
Reviewed by: mhorne
MFC after: 1 week
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D49228
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Due to the size of libpmc.so.5, this reduces the size of the -utilities
package by 10%.
MFC after: 1 day
Reviewed by: manu, adrian, emaste
Differential Revision: https://reviews.freebsd.org/D52662
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According to [1], the CPU models 6-{b7,ba,bf} are also alderlake-family
models. This patch adds them to the mapfile.csv.
[1] https://github.com/torvalds/linux/blob/master/tools/perf/pmu-events/arch/x86/mapfile.csv#L2
Reviewed by: mhorne
MFC after: 3 days
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D49126
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- loader.efi.8: use proper way of printing a backslash.
- usr.bin/gzip/gzip.1: contained a non-breaking space (in utf-8, 0xC2A0).
- lib/libpmc/pmc.*.3: remove two duplicate .Xr lines
Signed-off-by: Graham Percival <gperciva@tarsnap.com>
Reviewed by: mhorne, Alexander Ziaee <concussious.bugzilla@runbox.com>
MFC after: 3 days
Sponsored by: Tarsnap Backup Inc.
Pull Request: https://github.com/freebsd/freebsd-src/pull/1523
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These were reported by `mandoc -T lint ...` as warnings.
Signed-off-by: Graham Percival <gperciva@tarsnap.com>
Reviewed by: mhorne
MFC after: 3 days
Sponsored by: Tarsnap Backup Inc.
Pull Request: https://github.com/freebsd/freebsd-src/pull/1475
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This is a residual of the $FreeBSD$ removal.
MFC After: 3 days (though I'll just run the command on the branches)
Sponsored by: Netflix
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fts has different types for its compare rotuine. Other systems, not
4.4BSD based, have a non-const version. Before we tested against
__GLIBC__, but now we test against __linux__ because that's Linux's API
and musl doesn't define __GLIBC__.
In addition, link against libftl on this platform since musl doesn't
include ftl routines in libc, but rather in libftl.
Co-authored-by: Val Packett <val@packett.cool>
Sponsored by: Netflix
Pull Request: https://github.com/freebsd/freebsd-src/pull/1066
Reviewed by: val_packett.cool
Differential Revision: https://reviews.freebsd.org/D45349
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gcc13 whines about this assert than an unsigned integer is >= 0.
Reviewed by: luporl
Fixes: b48a2770d48b9 powerpc64: add Power8 and Power9 PMCs
Differential Revision: https://reviews.freebsd.org/D45232
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MFC after: 1 week
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macOS, like Linux, does not include an outer const qualifier for its
fts_open callback arguments, so -Wincompatible-function-pointer-types
also picks this up and breaks the build now Clang 16 makes it an error
by default. Extend the existing Linux support to fix this.
MFC after: 1 week
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The glibc fts_open() callback type does not have the second const
qualifier and it appears that Clang 16 errors by default for mismatched
function pointer types. Add an ifdef to handle this case.
Reviewed By: imp, emaste
Differential Revision: https://reviews.freebsd.org/D43000
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Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.
Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/
Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/
Remove /\n+#if.*\n#endif.*\n+/
Remove /^#if.*\n#endif.*\n/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/
Sponsored by: Netflix
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Some leaf directories were missing Makefile.depend files or needed
architecture-specific Makefile.depend.* files.
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This is the first step in recognizing that the K8 microarchitecture
represents a small and aged subset of AMD CPUs supported by this class.
Future changes will update the code and documentation details to better
reflect this.
Keep the old filename as an alias.
Reviewed by: jkoshy
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41279
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This includes event definitions from sys/pmc_events.h, definitions from
sys/pmc.h, and the man pages.
Reviewed by: jkoshy
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41275
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Background:
The pm_ev field of struct pmc_op_pmcallocate and struct pmc
traditionally contains the index of the chosen event, corresponding to
the __PMC_EVENTS array in pmc_events.h. This is a static list of events,
maintained by FreeBSD.
In the usual case, libpmc translates the user supplied event name
(string) into the pm_ev index, which is passed as an argument to the
allocation syscall. On the kernel side, the allocation method for the
relevant hwpmc class translates the given index into the event code that
will be written to an event selection register.
In 2018, a new source of performance event definitions was introduced:
the pmu-events json files, which are maintained by the Linux kernel. The
result was better coverage for newer Intel processors with a reduced
maintenance burden for libpmc/hwpmc. Intel and AMD CPUs were
unconditionally switched to allocate events from pmu-events instead of
the traditional scheme (959826ca1bb0a, 81eb4dcf9e0d).
Under the pmu-events scheme, the pm_ev field contains an index
corresponding to the selected event from the pmu-events table, something
which the kernel has no knowledge of. The configuration for the
performance counting registers is instead passed via class-dependent
fields (struct pmc_md_op_pmcallocate).
In 2021 I changed the allocation logic so that it would attempt to
pull from the pmu-events table first, and fall-back to the traditional
method (dfb4fb41166bc3). Later, pmu-events support for arm64 and power8
CPUs was added (28dd6730a5d6 and b48a2770d48b).
The problem that remains is that the pm_ev field is overloaded, without
a definitive way to determine whether the event allocation came from the
pmu-events table or FreeBSD's statically-defined PMC events. This
resulted in a recent fix, 21f7397a61f7.
Change:
To disambiguate these two supported but separate use-cases, add a new
flag, PMC_F_EV_PMU, to be set as part of the allocation, indicating that
the event index came from pmu-events.
This is useful in two ways:
1. On the kernel side, we can validate the syscall arguments better.
Some classes support only the traditional event scheme (e.g.
hwpmc_armv7), while others support only the pmu-events method (e.g.
hwpmc_core for Intel). We can now check for this. The hwpmc_arm64
class supports both methods, so the new flag supersedes the existing
MD flag, PM_MD_EVENT_RAW.
2. The flag will be tracked in struct pmc for the duration of its
lifetime, meaning it is communicated back to userspace. This allows
libpmc to perform the reverse index-to-event-name translation
without speculating about the meaning of the index value.
Adding the flag is a backwards-incompatible ABI change. We recently
bumped the major version of the hwpmc module, so this breakage is
acceptable.
Reviewed by: jkoshy
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40753
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Have it call the platform-dependent version. For better layering, move
the reset logic inside the new function. This is mainly to facilitate an
upcoming change.
Reviewed by: jkoshy
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40752
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Remove /^\.\\"\n\.\\"\s*\$FreeBSD\$$\n/
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Remove /^\s*#[#!]?\s*\$FreeBSD\$.*$\n/
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Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
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Remove /^/[*/]\s*\$FreeBSD\$.*\n/
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Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/
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Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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This API is stable and should not be advertised as "currently under
development".
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
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These have been removed.
Fixes: d78896e46f1d ("pmc(3): remove Pentium-related man pages...")
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
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This replaces a set but unused noop variable with a more explicit
macro.
Reviewed by: jkoshy, mhorne
Differential Revision: https://reviews.freebsd.org/D40651
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