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* Correct assertion on vcpuid argument to vm_gpa_hold().John Baldwin2016-08-031-1/+1
* Increase number of I/O APIC pins from 24 to 32 to give PCI up to 16 IRQs.Alexander Motin2016-07-142-3/+5
* Don't repeat the the word 'the'Eitan Adler2016-05-171-1/+1
* vmm(4): Small spelling fixes.Pedro F. Giffuni2016-05-035-5/+5
* Allow guest writes to AMD microcode update[0xc0010020] MSR without updating a...Anish Gupta2016-04-111-0/+5
* Bump VM_MAX_MEMSEGS from 2 to 3 to match the number of VM segmentMarcel Moolenaar2016-02-261-1/+1
* As <machine/vm.h> is included from <vm/vm.h>, there is no need toSvatopluk Kraus2016-02-221-1/+0
* As <machine/vmparam.h> is included from <vm/vm_param.h>, there is noSvatopluk Kraus2016-02-221-1/+0
* As <machine/pmap.h> is included from <vm/pmap.h>, there is no need toSvatopluk Kraus2016-02-222-3/+0
* Move the 'devmem' device nodes from /dev/vmm to /dev/vmm.ioNeel Natu2015-07-061-1/+1
* verify_gla() needs to account for non-zero segment base addresses.Tycho Nightingale2015-06-261-7/+44
* Restore the host's GS.base before returning from 'svm_launch()'.Neel Natu2015-06-234-33/+24
* Restructure memory allocation in bhyve to support "devmem".Neel Natu2015-06-188-286/+649
* Support guest writes to the TSC by enabling the "use TSC offsetting"Tycho Nightingale2015-06-093-4/+26
* The 'verify_gla()' function is used to ensure that the effective addressNeel Natu2015-06-051-1/+1
* Use tunable 'hw.vmm.svm.features' to disable specific SVM features evenNeel Natu2015-06-041-5/+10
* Fix non-deterministic delays when accessing a vcpu that was in "running" orNeel Natu2015-05-285-28/+112
* Exceptions don't deliver an error code in real mode.Neel Natu2015-05-231-0/+11
* Remove the verification of instruction length after instruction decode. TheNeel Natu2015-05-221-16/+0
* Don't rely on the 'VM-exit instruction length' field in the VMCS to alwaysNeel Natu2015-05-222-13/+11
* CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than tenJung-uk Kim2015-05-221-1/+1
* Emulate the "CMP r/m, reg" instruction (opcode 39H).Neel Natu2015-05-211-6/+22
* Deprecate the 3-way return values from vm_gla2gpa() and vm_copy_setup().Neel Natu2015-05-063-84/+76
* Do a proper emulation of guest writes to MSR_EFER.Neel Natu2015-05-063-14/+128
* Emulate the 'CMP r/m8, imm8' instruction encountered when booting a WindowsNeel Natu2015-05-041-2/+14
* Don't advertise the Intel SMX capability to the guest.Neel Natu2015-05-021-1/+2
* Emulate machine check related MSRs to allow guest OSes like Windows to boot.Neel Natu2015-05-023-7/+24
* r281630 relaxed the limits on the vectors that can be asserted in the IRRs.Neel Natu2015-05-011-11/+9
* Emulate MSR_SYSCFG which is accessed by Linux on AMD cpus when MTRRs areNeel Natu2015-05-011-0/+2
* Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>.Neel Natu2015-04-3013-18/+0
* When an instruction cannot be decoded just return to userspace so bhyve(8)Neel Natu2015-04-301-2/+6
* Advertise the MTRR feature via CPUID and emulate the minimal set of MTRR MSRs.Neel Natu2015-04-303-3/+38
* Re-implement RTC current time calculation to eliminate the possibility ofNeel Natu2015-04-291-21/+32
* Emulate the 'bit test' instruction. Windows 7 uses 'bit test' to check theNeel Natu2015-04-291-0/+52
* Implement the century byte in the RTC. Some guests require this field to beNeel Natu2015-04-281-22/+44
* STOS/STOSB/STOSW/STOSD/STOSQ instruction emulation.Tycho Nightingale2015-04-251-0/+77
* Missing break in switch case.Marcelo Araujo2015-04-231-0/+1
* Relax the check on which vectors can be delivered through the APIC. AccordingNeel Natu2015-04-161-1/+5
* Prefer 'vcpu_should_yield()' over checking 'curthread->td_flags' directly.Neel Natu2015-04-161-1/+1
* Enhance the support for Group 1 Extended opcodes:Tycho Nightingale2015-04-061-38/+84
* Fix "MOVS" instruction memory to MMIO emulation. Currently updates toTycho Nightingale2015-04-013-34/+53
* Fix the RTC device model to operate correctly in 12-hour mode. The followingNeel Natu2015-03-281-6/+41
* When fetching an instruction in non-64bit mode, consider the value of theTycho Nightingale2015-03-244-6/+19
* Report ARAT (APIC-Timer-always-running) feature for virtual CPU.Alexander Motin2015-03-161-0/+6
* Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve whenNeel Natu2015-03-148-184/+8
* When ICW1 is issued the edge sense circuit is reset which means thatTycho Nightingale2015-03-061-0/+1
* Fix warnings/errors when building vmm.ko with gcc:Neel Natu2015-03-022-6/+12
* Allow passthrough devices to be hinted.Ryan Stone2015-03-012-34/+51
* Always emulate MSR_PAT on Intel processors and don't rely on PAT save/restoreNeel Natu2015-02-244-22/+56
* Add x2APIC support. Enable it by default if CPU is capable. TheKonstantin Belousov2015-02-091-5/+6
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