Commit message (Expand) | Author | Age | Files | Lines | |
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* | Implement mitigation for Spectre version 2 attacks on ARMv7. | Michal Meloun | 2018-01-27 | 1 | -0/+2 |
* | Implement tunable CPU quirks. | Michal Meloun | 2017-06-13 | 1 | -1/+3 |
* | ARM: Split identify_arm_cpu() into ARMv4 and ARMv6 variant. | Michal Meloun | 2016-10-09 | 1 | -2/+5 |
* | ARM: Add identifiers for ARM Cortex v8 and Marvell Sheeva v7 cores. | Michal Meloun | 2016-10-06 | 1 | -0/+8 |
* | Read the Multiprocessing Extensions bit from the Multiprocessor Affinity | Andrew Turner | 2016-10-04 | 1 | -0/+3 |
* | Set the correct values in the arm aux control register, based on chip type. | Ian Lepore | 2015-10-19 | 1 | -1/+18 |
* | Add minimum cache line sizes to struct cpuinfo, use them in the new cache | Ian Lepore | 2015-03-09 | 1 | -0/+6 |
* | Add new code to read and parse cpu identification data using the new CPUID | Ian Lepore | 2014-12-28 | 1 | -0/+91 |