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* Centralize compatability translation macros.Brooks Davis2020-04-141-8/+2
* Add MDIO PHY driver for NS2 ARM64 platform.Wojciech Macek2020-04-063-0/+795
* Retire procfs-based process debugging.John Baldwin2020-04-011-1/+0
* Expand generic subword atomic primitivesConrad Meyer2020-03-251-0/+9
* Remove the secondary_stacks array in arm64 and riscv kernels.Mark Johnston2020-03-242-18/+59
* [PowerPC][Book-E] Fix missing load base in elf_cpu_parse_dynamic().Brandon Bergren2020-03-181-1/+1
* Add the missing brackets to the logical expression.Michal Meloun2020-03-091-2/+2
* Add more are64 special register fieldsAndrew Turner2020-03-061-6/+54
* Update the hypervisor registersAndrew Turner2020-03-062-20/+98
* Mark the arm64 machdep.h as kernel onlyAndrew Turner2020-03-051-0/+4
* Fix the spelling of aliasing.Andrew Turner2020-03-032-3/+3
* Move the arm64 cache identification to identcpu.cAndrew Turner2020-03-034-13/+59
* Fix the spelling of the VIPT cache type fieldAndrew Turner2020-03-032-3/+3
* Store the boot exception level on arm64 so it can be queried laterAndrew Turner2020-03-034-3/+18
* Add a space missed in r358545Andrew Turner2020-03-021-1/+1
* Generate the offsets for struct arm64_bootparams and use it in locore.SAndrew Turner2020-03-022-6/+16
* Fix the following -Werror warning from clang 10.0.0:Dimitry Andric2020-02-291-1/+1
* Fix the cache type identificationAndrew Turner2020-02-261-2/+2
* Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)Pawel Biernacki2020-02-262-5/+8
* Teach the arm64 ident CPU code to print non-ID registersAndrew Turner2020-02-261-7/+75
* Generalise the arm64 ASID allocator.Andrew Turner2020-02-262-53/+91
* Start to support multiple stages in the arm64 pmap.Andrew Turner2020-02-262-15/+64
* Add more arm64 CTR_EL0 register fieldsAndrew Turner2020-02-262-9/+32
* Split out the stage 1 pte bits and add the stage 2 bitsAndrew Turner2020-02-244-120/+144
* debug_monitor: Avoid setting the PSR_D flag for 32bits binaries.Olivier Houchard2020-02-241-1/+8
* Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (13 of many)Pawel Biernacki2020-02-241-2/+2
* arm64: rockchip: rk808: Only init regulator not enabledEmmanuel Vadot2020-02-241-3/+9
* arm64: rockchip: rk_i2c: Bump to DELAY to 1000Emmanuel Vadot2020-02-241-3/+3
* arm64: remove no longer needed atomic_load_ptr castsMateusz Guzik2020-02-141-3/+2
* Add PCI Express driver for the ARM Neoverse N1 System DevelopmentRuslan Bukin2020-02-111-0/+1
* Implement the Linux/arm64 VDSO gettimeofday and clock_gettimeAndrew Turner2020-02-081-2/+7
* Define MAXCPU consistently between the kernel and KLDs.Mark Johnston2020-02-051-2/+2
* linuxulator: implement sendfileEd Maste2020-02-051-1/+0
* Print useful debug data on unhandled kernel fault on arm64Andrew Turner2020-02-041-2/+5
* Dynamically select LSE-based atomic(9)s on arm64.Mark Johnston2020-02-032-10/+57
* Add LSE-based atomic(9) implementations.Mark Johnston2020-02-031-25/+140
* Add wrappers for arm64 atomics.Mark Johnston2020-02-031-17/+72
* Provide a single implementation for each of the arm64 atomic(9) ops.Mark Johnston2020-02-031-492/+140
* Remove the GICv3 ITS irq and replace it with an IDAndrew Turner2020-02-031-11/+16
* Use a unique name for the GICv3 ITS vmemAndrew Turner2020-02-031-1/+1
* Disable the use of the quantum cache in the GICv3 ITSAndrew Turner2020-02-031-1/+1
* Reimplement stack capture of running threads on i386 and amd64.Mark Johnston2020-01-311-11/+9
* Call the MAPTI command earlier in the ITS driverAndrew Turner2020-01-311-7/+20
* Only create one ITS configuration tableAndrew Turner2020-01-311-13/+29
* Ignore the SMMUv3 and PMCG interrupt controller in the IORT tablesAndrew Turner2020-01-311-1/+39
* Shift the ITS processor ID after reading it.Andrew Turner2020-01-301-1/+2
* Enable USB3 support for Rockchip RK3328 SoC.Ganbold Tsagaankhuu2020-01-291-11/+20
* Add USB3 related clock definitions for Rockchip RK3328 SoC.Ganbold Tsagaankhuu2020-01-291-0/+99
* Print missing ID_AA64PFR{0,1}_EL1 register fields.Mark Johnston2020-01-232-0/+127
* arm64: Don't enable interrupts in init_secondary().Mark Johnston2020-01-231-6/+0