| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | machine/stdarg.h -> sys/stdarg.h | Brooks Davis | 2025-06-11 | 1 | -1/+1 |
| * | sys: Automated cleanup of cdefs and other formatting | Warner Losh | 2023-11-27 | 1 | -1/+0 |
| * | Add IDs for Intel BayTrail SATA. | Dmitry Luhtionov | 2023-10-30 | 1 | -0/+2 |
| * | sys: Remove $FreeBSD$: one-line .c pattern | Warner Losh | 2023-08-16 | 1 | -2/+0 |
| * | spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD | Warner Losh | 2023-05-12 | 1 | -1/+1 |
| * | sys/dev: further adoption of SPDX licensing ID tags. | Pedro F. Giffuni | 2017-11-27 | 1 | -0/+2 |
| * | Use "Ibex Peak" codename for "5 Series/3400 Series" chipsets. | Alexander Motin | 2017-08-09 | 1 | -6/+6 |
| * | Cleanup unnecessary semicolons from the kernel. | Pedro F. Giffuni | 2016-04-10 | 1 | -1/+1 |
| * | Increase reset assertion time from 10 to 100us. | Alexander Motin | 2015-11-15 | 1 | -1/+1 |
| * | Disable 32-bit PIO for 6Gbit/s Intel SATA controllers. | Alexander Motin | 2015-08-08 | 1 | -21/+23 |
| * | Remove from legacy ata(4) driver support for hardware, supported by newer | Alexander Motin | 2015-03-24 | 1 | -77/+3 |
| * | Reduce priority of ATA/SATA drivers. | Alexander Motin | 2015-03-23 | 1 | -1/+1 |
| * | Add bunch of PCI IDs of Intel Wildcat Point (9 Series) chipsets. | Alexander Motin | 2014-11-26 | 1 | -0/+12 |
| * | Add some more IDs for Intel ATA, AHCI and USB controllers. | Alexander Motin | 2013-11-15 | 1 | -0/+12 |
| * | Add new Coleto Creek device support: SATA, SMBus, and Watchdog devices. | Jack F Vogel | 2013-07-19 | 1 | -0/+3 |
| * | Add test for SATA registers writability and skip using them if it failed. | Alexander Motin | 2013-06-25 | 1 | -5/+30 |
| * | - With the demise of !ATA_CAM, ATA_STATIC_ID is the only ata(4) related | Marius Strobl | 2013-04-06 | 1 | -1/+0 |
| * | Remove all legacy ATA code parts, not used since options ATA_CAM enabled in | Alexander Motin | 2013-04-04 | 1 | -29/+0 |
| * | Add Intel Lynx Point PCH SATA Controller Device IDs | Jack F Vogel | 2013-01-02 | 1 | -0/+12 |
| * | Remove duplicate const specifiers in many drivers (I hope I got all of | Dimitry Andric | 2012-11-05 | 1 | -1/+1 |
| * | - First pass at const'ifying ata(4) as appropriate. | Marius Strobl | 2012-03-21 | 1 | -3/+5 |
| * | Convert files to UTF-8 | Ulrich Spörlein | 2012-01-15 | 1 | -1/+1 |
| * | Add 0x2826 device ID for C600 (Patsburg) SATA controller in RAID mode. | Jim Harris | 2012-01-06 | 1 | -0/+1 |
| * | Add PCI IDs for the Intel ICH9M SATA controllers. | Alexander Motin | 2011-12-14 | 1 | -0/+4 |
| * | - Use mutex to serialize index/data register pair usage, when | Alexander Motin | 2011-07-22 | 1 | -7/+45 |
| * | Skip BAR(5) usage for SATA registers access on ICH8M Apples, because for | Alexander Motin | 2011-06-14 | 1 | -1/+3 |
| * | Chipset support for the new Intel Panther Point PCH, thanks | Jack F Vogel | 2011-05-11 | 1 | -0/+12 |
| * | According to ATA specifications, when ATAPI master is the only device, it | Alexander Motin | 2011-04-21 | 1 | -11/+21 |
| * | - Fix mapping of the last two SATA ports on 6-port Intel controllers. | Alexander Motin | 2011-04-21 | 1 | -2/+2 |
| * | Support for the new Patsburg PCH chipset: | Jack F Vogel | 2011-02-01 | 1 | -0/+5 |
| * | Support for the new DH89xxCC PCH chipset including: | Jack F Vogel | 2011-01-31 | 1 | -0/+1 |
| * | ICH7 SATA controller in legacy mode can provide access to SATA registers | Alexander Motin | 2011-01-24 | 1 | -14/+104 |
| * | Remove stale line, accidentally slipped into r214016. | Alexander Motin | 2010-11-02 | 1 | -1/+0 |
| * | Set of legacy mode SATA enchancements: | Alexander Motin | 2010-10-18 | 1 | -88/+318 |
| * | Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing | Alexander Motin | 2010-08-28 | 1 | -16/+20 |
| * | If ata_sata_phy_reset() failed and ata_generic_reset() is not called, mark | Alexander Motin | 2010-07-10 | 1 | -0/+4 |
| * | Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but | Alexander Motin | 2010-07-10 | 1 | -1/+2 |
| * | Fix PCH chipset IDs. They are 0x3bxx, not 0x3axx. | Alexander Motin | 2010-06-04 | 1 | -16/+16 |
| * | Oops! Wrong word order. :( | Alexander Motin | 2010-02-22 | 1 | -16/+16 |
| * | Add Intel PCH SATA controller IDs. | Alexander Motin | 2010-02-22 | 1 | -0/+16 |
| * | Add support for Intel SCH PATA controller. | Alexander Motin | 2009-12-22 | 1 | -2/+39 |
| * | MFp4: | Alexander Motin | 2009-12-06 | 1 | -101/+80 |
| * | Release over-agressive WDMA0 mode timings as close to spec as chip can. | Alexander Motin | 2009-11-22 | 1 | -1/+1 |
| * | Fix Intel PATA UDMA timings setting, affecting write performance. | Alexander Motin | 2009-11-22 | 1 | -2/+2 |
| * | Add more ICH10 chip IDs. | Alexander Motin | 2009-11-09 | 1 | -0/+4 |
| * | MFp4: | Alexander Motin | 2009-10-31 | 1 | -5/+5 |
| * | MFp4: | Alexander Motin | 2009-06-24 | 1 | -1/+1 |
| * | According to Intel documentation (307013), 3Gbps mode is supported on | Xin LI | 2009-06-01 | 1 | -3/+3 |
| * | Integrate user/mav/ata branch: | Alexander Motin | 2009-03-30 | 1 | -1/+1 |
| * | Remove the local management of INTx as this is now taken care of by pci. | Robert Noland | 2009-03-04 | 1 | -4/+0 |
