| Commit message (Collapse) | Author | Age | Files | Lines |
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When "options RSS" is configured, opt_rss.h defines the "RSS" token.
PR: 291068
Fixes: 17b4a0acfaf5 ("cxgbe(4): T7 related updates to shared code")
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Fixes: 7b80c8b7d8d9 cxgbe(4): Expanded interrupt handling for T7
MFC after: 1 week
Sponsored by: Chelsio Communications
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- Catch up with the new cause/perr registers. The high level approach
is the same but the T7 has an extra top level INT_CAUSE concentrator
and a PERR_CAUSE concentrator with a changed layout.
- Add various flags to control the interrupt handlers' behavior.
- Implement a t4_intr_clear that internally use the slow handler as an
iterator over known cause/perr registers. This lets the driver clear
all of the interrupt sources that it knows about. The firmware sets
up the interrupt enables and clears the causes normally so this call
should be redundant.
MFC after: 1 week
Sponsored by: Chelsio Communications
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- Avoid some more registers with read side-effects during regdump.
- mps_tcam_size is 3x the size of T6/T5.
- Update rss_rd_row to work with T7.
Obtained from: Chelsio Communications
MFC after: 1 week
Sponsored by: Chelsio Communications
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This is the first of a series of commits that will add T7 support to
cxgbe. The ASIC is gen5x16 on the PCIe side and has a 400Gbps MAC on
the Ethernet side. NICs using the T7 will come in the following
variants:
* 1 x 400Gbps with QSFP-DD connector
* 2 x 200/100/40Gbps with QSFP56/QSFP28/QSFP+ connectors
* 4 x 50/25/10/1Gbps with SFP28/SFP+/SFP connectors
There are 8 general purpose ARM A72 cores available on select
SmartNIC/DPU boards.
Obtained from: Chelsio Communications
MFC after: 3 days
Sponsored by: Chelsio Communications
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The port's tx channel and its hardware index are different things that
happen to have the same value on NICs using T4 through T6. This is
going to change so use the correct spelling all over the driver.
Specifically, the firmware expects the hw port index in all of these:
* PCIe channel for queues
* TX interface for TX CPLs
* PORTID in FW_PORT commands
* PORTID in t4_alloc_vi
* flowid in all the firmware flowc WRs
* mbox commands that deal with the tx scheduler
Also, create a port_id lookup table for hw_port, just like the one for
tx_chan. Use it to lookup the port softc in the port_info handler.
MFC after: 3 days
Sponsored by: Chelsio Communications
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No functional change intended.
MFC after: 3 days
Sponsored by: Chelsio Communications
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Co-Authored-by: Navdeep Parhar <np@FreeBSD.org>
MFC after: 2 weeks
Sponsored by: Orange Business Services
Differential Revision: https://reviews.freebsd.org/D45428
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MFC after: 1 week
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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It is the equivalent of tx_chan but for receive so rx_chan is a better
name. Initialize both using helper functions and make sure both are
displayed in the sysctl MIB.
MFC after: 1 week
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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PORTVEC obtained from the firmware is the authoritative source of this
information, and nports (calculated from PORTVEC) is available by the
time t4_port_init runs.
MFC after: 1 week
Sponsored by: Chelsio Communications
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Obtained from: Chelsio Communications
MFC after: 1 week
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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The firmware clears the interrupts already and it has a better idea of
exactly what to clear for which generation of the ASIC. There is no
need for the driver to get involved.
MFC after: 1 week
Sponsored by: Chelsio Communications
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These register blocks are at different locations in different chips.
MFC after: 1 week
Sponsored by: Chelsio Communications
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The driver always uses the same modulation queue as the channel and the
table is unnecessary.
MFC after: 1 week
Sponsored by: Chelsio Communications
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The logic analyzer in the T6 CIM block has a different capture size than
previous chips.
MFC after: 1 week
Sponsored by: Chelsio Communications
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Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
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Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.
Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix
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MFC after: 1 week
Sponsored by: Chelsio Communications
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The firmware doesn't report FORCE_FEC in pcaps if the transceiver
plugged in at that time does not support a speed that may use FEC. It
is incorrect for the driver to assume that the FORCE_FEC value it read
during attach (in init_link_config) is permanent. Instead, it should
check pcaps just before issuing the L1CFG command.
MFC after: 1 week
Sponsored by: Chelsio Communications
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* New error_flags that can be used from the error ithread and elsewhere
without a synch_op.
* Stop the adapter immediately in t4_fatal_err but defer most of the
rest of the handling to a task. The task is allowed to sleep, unlike
the ithread. Remove async_event_task as it is no longer needed.
* Dump the devlog, CIMLA, and PCIE_FW exactly once on any fatal error
involving the firmware or the CIM block. While here, dump some
additional info (see dump_cim_regs) for these errors.
* If both reset_on_fatal_err and panic_on_fatal_err are set then attempt
a reset first and do not panic the system if it is successful.
MFC after: 1 week
Sponsored by: Chelsio Communications
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Fixes: f3c2987f2f5c91f0801fa8bbf9e1bc09d91aeb46
MFC after: 3 days
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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This eliminates error messages like this from the driver when running at
50Gbps with 100G cables:
[3726] cc0: l1cfg failed: 71
[4407] cc0: l1cfg failed: 71
Note that link comes up anyway with or without this change.
Reported by: Suhas Lokesha @ Chelsio
MFC after: 1 week
Sponsored by: Chelsio Communications
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This fixes a driver panic during stats collection when a port's id does
not match its tx channel. The bug affected only the T580 card running
with a non-default VPD.
Reported by: Suhas Lokesha @ Chelsio
MFC after: 1 week
Sponsored by: Chelsio Communications
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Modify the GPIO pins only on the Base-T cards and even there drive all
of them low instead of putting them in hi-z state. For the rest (this
is the common case), directly power off the PLLs of the high speed
serdes. This is the simplest method that does not involve or conflict
with the firmware but still works with all T4-T6 cards regardless of
what's plugged into the port.
This fixes a problem where the peer wouldn't always see a link down if
it is connected to the device using a -CR4 copper cable.
MFC after: 3 weeks
Sponsored by: Chelsio Communications
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MFC after: 1 week
Sponsored by: Chelsio Communications
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Recent firmwares have support for autonomous FEC selection and a "force"
knob to let the driver control this behavior (or not) in a fine grained
manner. This change adds a driver knob so that all the different ways of
configuring the link FEC can be exercised. Note that this controls the
internal driver/firmware interaction for link configuration and is not
meant for general use.
MFC after: 1 week
Sponsored by: Chelsio Communications
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dev.<port>.<inst>.rcaps
# sysctl dev.cc | grep rcaps
dev.cc.1.rcaps: 581107776
dev.cc.0.rcaps: 582156414
MFC after: 1 week
Sponsored by: Chelsio Communications
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This should have been added with initial T6 support many years ago.
MFC after: 1 week
Sponsored by: Chelsio Communications
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These registers have read side effects and a read at just the right
(wrong?) time can trash some internal hw state.
Obtained from: Chelsio Communications
MFC after: 1 week
Sponsored by: Chelsio Communications
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Recent firmwares are able to utilize the traffic classes of tx channels
that were previously unused. This effectively doubles the number of
traffic classes available per port for 2 port cards. Stop using the raw
per-channel value in the driver and ask the firmware for the number of
usable traffic classes instead.
MFC after: 2 weeks
Sponsored by: Chelsio Communications
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Firmwares >= 1.25.6.0 support 512 SGL entries in a single memory
registration request.
Obtained from: Chelsio Communications
MFC after: 1 week
Sponsored by: Chelsio Communications
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The hw.cxgbe.kern_tls tunable was used for this in the past and if it
was set then all T6 adapters would be configured for NIC TLS operation
and could not be reconfigured for TOE without a reload. With this
change ifconfig can be used to manipulate toe and txtls caps like any
other caps. hw.cxgbe.kern_tls continues to work as usual but its
effects are not permanent any more.
* Enable nic_ktls_ofld in the default configuration file and use the
firmware instead of direct register manipulation to apply/rollback
NIC TLS configuration. This allows the driver to switch the hardware
between TOE and NIC TLS mode in a safe manner. Note that the
configuration is adapter-wide and not per-port.
* Remove the kern_tls config file as it works with 100G T6 cards only
and leads to firmware crashes with 25G cards. The configurations
included with the driver (with the exception of the FPGA configs) are
supposed to work with all adapters.
Reported by: Veeresh U.K. at Chelsio
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Reviewed by: jhb@
Differential Revision: https://reviews.freebsd.org/D29291
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MFC after: 1 week
Sponsored by: Chelsio Communications
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T5 and above have extra bits for the optional filter fields. This is a
correctness issue and not just a waste because a filter mode valid on a
T4 (36b) may not be valid on a T5+ (40b).
MFC after: 2 weeks
Sponsored by: Chelsio Communications
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1. Query the firmware for filter mode, mask, and related ingress config
instead of trying to figure them out from hardware registers. Read
configuration from the registers only when the firmware does not
support this query.
2. Use the firmware to set the filter mode. This is the correct way to
do it and is more flexible as well. The filter mode (and associated
ingress config) can now be changed any time it is safe to do so.
The user can specify a subset of a valid mode and the driver will
enable enough bits to make sure that the mode is maxed out -- that
is, it is not possible to set another bit without exceeding the
total width for optional filter fields. This is a hardware
requirement that was not enforced by the driver previously.
MFC after: 2 weeks
Sponsored by: Chelsio Communications
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Read the PF-only hardware settings directly in get_params__post_init.
Split the rest into two routines used by both the PF and VF drivers: one
that reads the SGE rx buffer configuration and another that verifies
miscellaneous hardware configuration.
MFC after: 1 week
Sponsored by: Chelsio Communications
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The issue was found while building cxgbe with gcc 10 (in illumos),
the array subscription check is warning us about outside the bounds
access.
See also: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
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dev.<nexus>.<instance>.misc.tid_stats
dev.<nexus>.<instance>.misc.tnl_stats
MFC after: 3 days
Sponsored by: Chelsio Communications
Notes:
svn path=/head/; revision=368313
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It is common for freelists to be starving when a netmap application
stops. Mailbox commands to free queues can hang in such a situation.
Avoid that by not freeing the queues when netmap is switched off.
Instead, use an alternate method to stop the queues without releasing
the context ids. If netmap is enabled again later then the same queue
is reinitialized for use. Move alloc_nm_rxq and txq to t4_netmap.c
while here.
MFC after: 1 week
Sponsored by: Chelsio Communications
Notes:
svn path=/head/; revision=368296
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The MAC address can be set with the optional mac-addr property in the VF
section of the iovctl.conf(5) used to instantiate the VFs.
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Notes:
svn path=/head/; revision=367502
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Query the firmware for the MAC address set by the PF for the VF and use
it instead of the firmware generated MAC if it's available.
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Notes:
svn path=/head/; revision=367497
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PR: 250449
Reported by: freqlabs@
MFC after: 1 week
Sponsored by: Chelsio Communications
Notes:
svn path=/head/; revision=366853
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