| Commit message (Collapse) | Author | Age | Files | Lines |
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The SEC QMan interface stores context in context_a and context_b, so add
them to the frame queue creation.
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Reduce the code executed in the DQRR dequeue loop, and move the
heavy-weight operations to post-dequeue loop.
* Batch if_input() after DQRR dispatch loop completes. Only do the
DQRR_CI_CINH write at the end of the loop, so only up to 16 entries
will be processed.
* Add software LRO per FQ. Each per-CPU RX FQ gets its own LRO tracking
structure.
Since LRO is configured at FQ initialization time, allocate the ifnet
earlier in attach to prevent a panic.
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Grow sc_nrxfqs from 1 to the CPU total, and hash the RX
5-tuple across the range with the KG driver from the prior commit.
Each FQ lands on its own per-CPU QMan channel, so a given core
drains only its own share of RX work and gets frame annotation +
data-head stashed into its cache.
* Add alignment parameter to qman_alloc_fqid_range() to meet KeyGen
requirements.
* Initialize 1 frame queue (FQ) per CPU in dpaa_eth_fm_port_rx_init(),
using a 5-tuple to spread the load across CPUs.
* Channel ownership for TX confirms moved from rx_init/free to
tx_init/free -- sc_rx_channel is now a TX-confirm-only per-port
pool channel.
Fallbacks/degradation:
* If any per-CPU channel is -1 (no portal attached)
the port fails to attach with a clear message.
* If the FQID range can't be allocated aligned, the port fails
attach.
* If KG scheme allocation fails at port setup, the port keeps
its N FQs but only FQ #0 sees traffic.
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Preparation for FMan KeyGen-driven multi-queue RX. Replace the
single sc_rx_fq / sc_rx_fqid pair with a sc_rx_fqs[] array (currently
one entry) and sc_rx_fqid_base. Each entry carries a back-pointer
to the softc for use by the RX callback.
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The TX SG-build loop in dpaa_eth_if_start_locked() walked page
boundaries with PAGE_MASK arithmetic even for buffers that lived
entirely within one page -- the common case, since MCLBYTES
is smaller than PAGE_SIZE. Add a fast path that emits a single SGT
entry for wholly-in-one-page segments and skips the inner while
entirely.
Fix the following bugs while we're here:
1. "if (m->m_len == 0) continue;" in the outer loop never
advanced m -- any zero-length mbuf hung the TX path in an
infinite loop. Fix this by switching to a for loop, with the
advancement in the post-clause.
2. In the inner (page-splitting) loop, the cap
"if (m->m_len < ssize) ssize = m->m_len;" compared against
the mbuf's original length, not the remaining bytes. A single mbuf
whose data started mid-page and ran into a second page would produce
a second SGT entry with ssize > rem, over-reading past the buffer end
into whatever followed in kernel memory. Fixed by tracking a local
rem and capping ssize against it.
3. If the whole mbuf chain consisted of zero-length segments,
the final-flag store "fi_sgt[i - 1].final = 1" wrote to
index -1. Reject empty frames up front now instead.
As part of this, rename the inner counter from dsize to rem for clarity
instead of playing double-duty in both inner and outer loops.
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* Add interrupt coalescing for DQRR and MR, with thresholds and period
as tunable sysctls under the `hw.qman` tree.
* Do lazy/sloppy buffer management to avoid constantly checking
thresholds via QMan portal round-trips.
* Add cache stashing to prewarm caches, reducing latency.
* Fix the definition of Context_A in the init_fq MC command/result
structures, they're 64-bit fields, not 32-bit.
* Reorder the dpaa_eth_frame_info as a bit of cleanup.
* Take advantage of the fact that UMA small allocations are returned in
the DMAP, and avoid pmap_kextract().
These changes together improve throughput by ~1.5%
(925Mbps->935-940Mbps) consistently, and reduce CPU usage by a bit,
increasing idle CPU from 30%->35% minimum.
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Enable the FMan hardware parser to take advantage of some offloading.
This enables receive and transmit checksum offloading for both IPv4 and
IPv6.
Additional offloading capabilities the DPAA supports include:
* vlan parsing
* Transmit rate limiting
* IEEE-1588 timestamps
* Soft parsing for custom protocol checking
* Congestion handling
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The NCSW reference base requires tuning for each target, and currently
is configured for FMANv2. This doesn't readily work on FMANv3 devices,
such as the T-series powerpc, or the LS1043 ARM. Since Freescale/NXP
abandoned the NCSW driver a decade ago, it makes sense to abandon it
ourselves as well. This new driver uses a combination of the NCSW
driver and the Linux driver (BSD/GPL dual licensed) as a reference, but
contains no actual code from them.
The DPAA (Data Path Acceleration Architecture) subsystem consists of the
following components:
* BMan -- Buffer Manager. Manages buffer pools of different sizes (one
size per pool, up to 64 pools)
* QMan -- Queue Manager. Manages the interfaces between DPAA-based
components and the CPU(s).
* FMan -- Frame Manager. Responsible for all ethernet-related
processing. Consists itself of the following components:
* Ports -- interfaces to the QMan. An ethernet interface consists of
2 ports.
Ports use "Next-invoked action" (NIA) descriptors to form a pipeline
for processing on receive and transmit.
* Parser -- performs protocol header parsing and validation. Both
hardware and software parsers are available.
* KeyGen -- Key generator, used to start the classification process
(for the Policer), generating FQIDs and other keys based on the
frame input.
* Policer -- performs traffic shaping and classification
* MAC -- SoC specific ethernet MAC (dTSEC, TGEC, mEMAC). Currently
supports dTSEC and mEMAC, along with their MDIO blocks.
Additional components not yet handled:
SEC -- Security engine (crypto)
RE -- RAID engine
RapidIO
DCE -- Decompression/Compression engine, supports ZLIB, DEFLATE, and
GZIP, as well as base64 encoding and decoding.
BMan and QMan are accessed via cache-coherent portals, using ring
buffers as I/O. The intent is for portals to be per-CPU (core/thread)
to reduce locking contention and improve performance. This driver pins
interrupt handlers to the CPU "owning" a given portal, and uses critical
sections to prevent switching while accessing the portal.
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