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* gpio: remove gpiobus_attach_busAhmad Khalifa2025-08-131-1/+2
| | | | | | | | | | | | Since gpiobus_attach_bus can attach the gpiobus child along with its children in the same bus pass, the parent controller's reference to gpiobus might not be set by the time the children need it. Instead, drivers should use gpiobus_add_bus and explicitly call bus_attach_children. Reviewed by: mmel, imp (older version) Approved by: imp (mentor) Differential Revision: https://reviews.freebsd.org/D51578
* sys: Remove $FreeBSD$: two-line .h patternWarner Losh2023-08-161-2/+0
| | | | Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
* nctgpio: Enable all the 9 groups for NCT6116D and remove FIXMEsStéphane Rochoy2023-08-041-10/+10
| | | | | Reviewed by: emaste Pull Request: https://github.com/freebsd/freebsd-src/pull/810
* nctgpio: Populate the cache earlierStéphane Rochoy2023-07-011-27/+26
| | | | | Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/719
* superio+nctgpio: Add support for new (weird) chipsStéphane Rochoy2023-07-011-2/+509
| | | | | | | | | | | | Add support for the following chips: - Nuvoton NCT5585D - Nuvoton NCT6796D-E - Nuvoton NCT6779 - Nuvoton NCT6116D - and Winbond 83627DHG Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/719
* superio+nctgpio: Prepare to support some new (weird) chipsStéphane Rochoy2023-07-011-240/+465
| | | | | | | | | | - Increase verbosity to direct i/o code path (iores != 0) - Fix pin inversion configuration - Allow forcing the use of indirect access channel via hint.gpio.0.flags=2 - Document the PREFER_INDIRECT_CHANNEL tunable in nctgpio(4) Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/719
* gpio: Remove unused devclass arguments to DRIVER_MODULE.John Baldwin2022-05-091-3/+1
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* nctgpio: improve performance (latency) of operationAndriy Gapon2019-10-221-154/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change consists of two parts. First, nctgpio now supports hardware access via an I/O port window if it's configured by firmware. For instance, PC Engines firmware v4.10.0.2 does that. This is faster than going through the Super I/O configuration registers. Second, nctgpio now caches values of bits that it controls. For example, the driver does not need to access the hardware to determine if a pin is an output or an input, or a state of an output. Also, the driver makes use of the fact that the hardware preserves an output state of a pin accross a switch to the input mode and back. With this change I am able to use the 1-Wire bus over nctgpio whereas previously the driver introduced too much latency to be compliant with the relatively strict protocol timings. superio0: <Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)> at port 0x2e-0x2f on isa0 gpio1: <Nuvoton GPIO controller> at GPIO ldn 0x07 on superio0 pcib0: allocated type 4 (0x220-0x226) for rid 0 of gpio1 gpiobus1: <GPIO bus> on gpio1 owc0: <GPIO attached one-wire bus> at pin 4 on gpiobus1 ow0: <1 Wire Bus> on owc0 ow0: romid 28:b2:9e:45:92:10:02:34: no driver ow_temp0: <Advanced One Wire Temperature> romid 28:b2:9e:45:92:10:02:34 on ow0 MFC after: 4 weeks Notes: svn path=/head/; revision=353887
* move nctgpio to superio(4) busAndriy Gapon2019-10-161-218/+57
| | | | | | | | | | | | This is where it logically belongs. The change allows to drop a bunch of low lewel code. Reviewed by: gonzo MFC after: 19 days Differential Revision: https://reviews.freebsd.org/D21980 Notes: svn path=/head/; revision=353643
* nctgpio: change default pin names to those used by the datasheet(s)Andriy Gapon2019-07-011-1/+1
| | | | | | | | | | | | | | That is, instead of the current GPIO00 - GPIO15 the names will be GPIO00 - GPIO07, GPIO10 - GPIO17. The first digit is a GPIO "bank" / group number and the second one is a pin number within the bank. Alternative view is that the pin names are changed from decimal numbering scheme to octal one (as there are 8 pins per bank). Discussed with: cem, gonzo MFC after: 2 weeks Notes: svn path=/head/; revision=349579
* nctgpio: add new device id for the GPIO chip in PCEngines APU3Oleksandr Tymoshenko2018-01-021-0/+4
| | | | | | | | | PR: 224512 Submitted by: mike@sentex.net MFC after: 2 weeks Notes: svn path=/head/; revision=327502
* nctgpio(4): Don't index past the end of sc->pins arrayConrad Meyer2016-04-201-1/+1
| | | | | | | | | | | | | This driver thinks that the NCT_MAX_PIN index is a valid index in a few places (nct_attach() for-loop, as well as NCT_IS_VALID_PIN()). Allocate room for NCT_MAX_PIN as an index, that is, NCT_MAX_PIN + 1 elements. Reported by: Coverity CIDs: 1353806, 1353807, 1353808, 1353809, 1353810 Sponsored by: EMC / Isilon Storage Division Notes: svn path=/head/; revision=298322
* sys/dev: use our nitems() macro when it is avaliable through param.h.Pedro F. Giffuni2016-04-191-2/+2
| | | | | | | | | | No functional change, only trivial cases are done in this sweep, Drivers that can get further enhancements will be done independently. Discussed in: freebsd-current Notes: svn path=/head/; revision=298307
* Add support for the Nuvoton NCT5104D.Adrian Chadd2016-03-311-0/+802
Make it compile only for i386/amd64 for now as it's been tested there. It's quite possible it'll show up elsewhere and we can enable it for other architectures later. Tested: * PC Engines APU1C4 Submitted by: Daniel Wyatt <daniel@dewyatt.com> Reviewed by: adrian, loos Differential Revision: https://reviews.freebsd.org/D5389 Notes: svn path=/head/; revision=297443
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