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* mips: Remove sys/mipsWarner Losh2021-12-3184-11213/+0
| | | | | | | | Remove sys/mips as the next step of decomissioning mips from the tree. Remove mips special cases from the kernel make files. Remove the mips specific linker scripts. Sponsored by: Netflix
* Simplify swi for bus_dma.John Baldwin2021-12-282-4/+0
| | | | | | | | | | | | | | | | | | | | | | | When a DMA request using bounce pages completes, a swi is triggered to schedule pending DMA requests using the just-freed bounce pages. For a long time this bus_dma swi has been tied to a "virtual memory" swi (swi_vm). However, all of the swi_vm implementations are the same and consist of checking a flag (busdma_swi_pending) which is always true and if set calling busdma_swi. I suspect this dates back to the pre-SMPng days and that the intention was for swi_vm to serve as a mux. However, in the current scheme there's no need for the mux. Instead, remove swi_vm and vm_ih. Each bus_dma implementation that uses bounce pages is responsible for creating its own swi (busdma_ih) which it now schedules directly. This swi invokes busdma_swi directly removing the need for busdma_swi_pending. One consequence is that the swi now works on RISC-V which had previously failed to invoke busdma_swi from swi_vm. Reviewed by: imp, kib Sponsored by: Netflix Differential Revision: https://reviews.freebsd.org/D33447
* Add <machine/tls.h> header to hold MD constants and helpers for TLS.John Baldwin2021-12-091-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The header exports the following: - Definition of struct tcb. - Helpers to get/set the tcb for the current thread. - TLS_TCB_SIZE (size of TCB) - TLS_TCB_ALIGN (alignment of TCB) - TLS_VARIANT_I or TLS_VARIANT_II - TLS_DTV_OFFSET (bias of pointers in dtv[]) - TLS_TP_OFFSET (bias of "thread pointer" relative to TCB) Note that TLS_TP_OFFSET does not account for if the unbiased thread pointer points to the start of the TCB (arm and x86) or the end of the TCB (MIPS, PowerPC, and RISC-V). Note also that for amd64, the struct tcb does not include the unused tcb_spare field included in the current structure in libthr. libthr does not use this field, and the existing calls in libc and rtld that allocate a TCB for amd64 assume it is the size of 3 Elf_Addr's (and thus do not allocate room for tcb_spare). A <sys/_tls_variant_i.h> header is used by architectures using Variant I TLS which uses a common struct tcb. Reviewed by: kib (older version of x86/tls.h), jrtc27 Sponsored by: The University of Cambridge, Google Inc. Differential Revision: https://reviews.freebsd.org/D33351
* mips: Rename TLS_DTP_OFFSET to TLS_DTV_OFFSET.John Baldwin2021-12-091-1/+1
| | | | | | | | | | | This is the more standard name for the bias of dtv pointers used on other platforms. This also fixes a few other places that were using the wrong bias previously on MIPS such as dlpi_tls_data in struct dl_phdr_info and the recently added __libc_tls_get_addr(). Reviewed by: kib, jrtc27 Sponsored by: The University of Cambridge, Google Inc. Differential Revision: https://reviews.freebsd.org/D33346
* Make struct syscall_args machine independentBrooks Davis2021-12-081-8/+0
| | | | | | | | | | | | | | | | | | After a round of cleanups in late 2020, all definitions are functionally identical. This removes a rotted __aligned(8) on arm. It was added in b7112ead32bc50ef9744099bdbb1cfbd6e906b2a and was intended to align the args member so that 64-bit types (off_t, etc) could be safely read on armeb compiled with clang. With the removal of armev, this is no longer needed (armv7 requires that 32-bit aligned reads of 64-bit values be supported and we enable such support on armv6). As further evidence this is unnecessary, cleanups to struct syscall_args have resulted in args being 32-bit aligned on 32-bit systems. The sole effect is to bloat the struct by 4 bytes. Reviewed by: kib, jhb, imp Differential Revision: https://reviews.freebsd.org/D33308
* Implement GET_STACK_USAGE on remaining archsMitchell Horne2021-11-301-0/+11
| | | | | | | | | | | | | | | | This definition enables callers to estimate remaining space on the kstack, and take action on it. Notably, it enables optimizations in the GEOM and netgraph subsystems to directly dispatch work items when there is sufficient stack space, rather than queuing them for a worker thread. Implement it for riscv, arm, and mips. Remove the #ifdefs, so it will not go unimplemented elsewhere. PR: 259157 Reviewed by: mav, kib, markj (previous version) MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D32580
* netinet: Remove in_cksum_update()Mark Johnston2021-11-241-29/+0
| | | | | | | | | | It was never implemented on powerpc or riscv and appears to have been unused since it was added in 1998. No functional change intended. Reviewed by: kp, glebius, cy MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D33093
* minidump: Parameterize minidumpsys()Mitchell Horne2021-11-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The minidump code is written assuming that certain global state will not change, and rightly so, since it executes from a kernel debugger context. In order to support taking minidumps of a live system, we should allow copies of relevant global state that is likely to change to be passed as parameters to the minidumpsys() function. This patch does the work of parameterizing this function, by adding a struct minidumpstate argument. For now, this struct allows for copies of the kernel message buffer, and the bitset that tracks which pages should be dumped (vm_page_dump). Follow-up changes will actually make use of these arguments. Notably, dump_avail[] does not need a snapshot, since it is not expected to change after system initialization. The existing minidumpsys() definitions are renamed, and a thin MI wrapper is added to kern_dump.c, which handles the construction of the state struct. Thus, calling minidumpsys() remains as simple as before. Reviewed by: kib, markj, jhb Sponsored by: Juniper Networks, Inc. Sponsored by: Klara, Inc. MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D31989
* minidump: De-duplicate the progress barMitchell Horne2021-09-291-0/+3
| | | | | | | | | | | | | The implementation of the progress bar is simple, but duplicated for most minidump implementations. Extract the common bits to kern_dump.c. Ensure that the bar is reset with each subsequent dump; this was only done on some platforms previously. Reviewed by: markj MFC after: 2 weeks Sponsored by: Juniper Networks, Inc. Sponsored by: Klara, Inc. Differential Revision: https://reviews.freebsd.org/D31885
* Create sys/reg.h for the common code previously in machine/reg.hAndrew Turner2021-08-302-17/+1
| | | | | | | | | | Move the common kernel function signatures from machine/reg.h to a new sys/reg.h. This is in preperation for adding PT_GETREGSET to ptrace(2). Reviewed by: imp, markj Sponsored by: DARPA, AFRL (original work) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D19830
* Fix a common typo in source code commentsGordon Bergling2021-08-141-1/+1
| | | | | | - s/definitons/definitions/ MFC after: 5 days
* Remove "All Rights Reserved" from FreeBSD Foundation sys/ copyrightsEd Maste2021-08-081-1/+0
| | | | | | | These ones were unambiguous cases where the Foundation was the only listed copyright holder (in the associated license block). Sponsored by: The FreeBSD Foundation
* Add pmap_vm_page_alloc_check()Konstantin Belousov2021-07-311-0/+2
| | | | | | | | | | | | which is the place to put MD asserts about allocated pages. On amd64, verify that allocated page does not belong to the kernel (text, data) or early allocated pages. Reviewed by: markj Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D31121
* Pass the syscall number to capsicum permission-denied signalsDavid Chisnall2021-07-161-0/+1
| | | | | | | | | | | | | | | | | | The syscall number is stored in the same register as the syscall return on amd64 (and possibly other architectures) and so it is impossible to recover in the signal handler after the call has returned. This small tweak delivers it in the `si_value` field of the signal, which is sufficient to catch capability violations and emulate them with a call to a more-privileged process in the signal handler. This reapplies 3a522ba1bc852c3d4660a4fa32e4a94999d09a47 with a fix for the static assertion failure on i386. Approved by: markj (mentor) Reviewed by: kib, bcr (manpages) Differential Revision: https://reviews.freebsd.org/D29185
* Revert "Pass the syscall number to capsicum permission-denied signals"David Chisnall2021-07-101-1/+0
| | | | | | This broke the i386 build. This reverts commit 3a522ba1bc852c3d4660a4fa32e4a94999d09a47.
* Pass the syscall number to capsicum permission-denied signalsDavid Chisnall2021-07-101-0/+1
| | | | | | | | | | | | | | | The syscall number is stored in the same register as the syscall return on amd64 (and possibly other architectures) and so it is impossible to recover in the signal handler after the call has returned. This small tweak delivers it in the `si_value` field of the signal, which is sufficient to catch capability violations and emulate them with a call to a more-privileged process in the signal handler. Approved by: markj (mentor) Reviewed by: kib, bcr (manpages) Differential Revision: https://reviews.freebsd.org/D29185
* Reduce code duplication in machine/_types.hAlex Richardson2021-06-141-58/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Many of these typedefs are the same across all architectures or can be set based on an architecture-independent compiler-provided macro (e.g. __SIZEOF_SIZE_T__). These macros have been available since GCC 4.6 and Clang sometime before 3.0 (godbolt.org does not have any older clang versions installed). I originally considered using the compiler-provided `__FOO_TYPE__` directly. However, in order to do so we have to check that those match the previous typedef exactly (not just that they have the same size) since any change would be an ABI break. For example, changing `long` to `long long` results in different C++ name mangling. Additionally, Clang and GCC disagree on the underlying type for some of (u)int*_fast_t types, so this change only moves the definitions that are identical across all architectures and does not touch those types. This de-deduplication will allow us to have a smaller diff downstream in CheriBSD: we only have to only change the (u)intptr_t definition in sys/_types.h in CheriBSD instead of having to change machine/_types.h for all CHERI-enabled architectures (currently RISC-V, AArch64 and MIPS). Reviewed By: imp, kib Differential Revision: https://reviews.freebsd.org/D29895
* Create VM_MEMATTR_DEVICE on all architecturesAndrew Turner2021-04-121-0/+1
| | | | | | | | | | | This is intended to be used with memory mapped IO, e.g. from bus_space_map with no flags, or pmap_mapdev. Use this new memory type in the map request configured by resource_init_map_request, and in pciconf. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D29692
* Clean up a couple of MD warts in vm_fault_populate():Jason A. Harmening2021-03-311-0/+6
| | | | | | | | | | | | | | | | | | | | --Eliminate a big ifdef that encompassed all currently-supported architectures except mips and powerpc32. This applied to the case in which we've allocated a superpage but the pager-populated range is insufficient for a superpage mapping. For platforms that don't support superpages the check should be inexpensive as we shouldn't get a superpage in the first place. Make the normal-page fallback logic identical for all platforms and provide a simple implementation of pmap_ps_enabled() for MIPS and Book-E/AIM32 powerpc. --Apply the logic for handling pmap_enter() failure if a superpage mapping can't be supported due to additional protection policy. Use KERN_PROTECTION_FAILURE instead of KERN_FAILURE for this case, and note Intel PKU on amd64 as the first example of such protection policy. Reviewed by: kib, markj, bdragon Differential Revision: https://reviews.freebsd.org/D29439
* gdb: report specific stop reason for watchpointsMitchell Horne2021-03-301-0/+6
| | | | | | | | | | | | | | | | The remote protocol allows for implementations to report more specific reasons for the break in execution back to the client [1]. This is entirely optional, so it is only implemented for amd64, arm64, and i386 at the moment. [1] https://sourceware.org/gdb/current/onlinedocs/gdb/Stop-Reply-Packets.html Reviewed by: jhb MFC after: 3 weeks Sponsored by: NetApp, Inc. Sponsored by: Klara, Inc. NetApp PR: 51 Differential Revision: https://reviews.freebsd.org/D29174
* Introduce kdb-level watchpoint functionsMitchell Horne2021-03-291-0/+15
| | | | | | | | | | | | | | | | | | | This basically mirrors what already exists in ddb, but provides a slightly improved interface. It allows the caller to specify the watchpoint access type, and returns more specific error codes to differentiate failure cases. This will be used to support hardware watchpoints in gdb(4). Stubs are provided for architectures lacking hardware watchpoint logic (mips, powerpc, riscv), while other architectures are added individually in follow-up commits. Reviewed by: jhb, kib, markj MFC after: 3 weeks Sponsored by: NetApp, Inc. Sponsored by: Klara, Inc. Differential Revision: https://reviews.freebsd.org/D29155
* Consolidate machine/endian.h definitionsMitchell Horne2021-03-261-105/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This change serves two purposes. First, we take advantage of the compiler provided endian definitions to eliminate some long-standing duplication between the different versions of this header. __BYTE_ORDER__ has been defined since GCC 4.6, so there is no need to rely on platform defaults or e.g. __MIPSEB__ to determine endianness. A new common sub-header is added, but there should be no changes to the visibility of these definitions. Second, this eliminates the hand-rolled __bswapNN() routines, again in favor of the compiler builtins. This was done already for x86 in e6ff6154d203. The benefit here is that we no longer have to maintain our own implementations on each arch, and can instead rely on the compiler to emit appropriate instructions or libcalls, as available. This should result in equivalent or better code generation. Notably 32-bit arm will start using the `rev` instruction for these routines, which is available on armv6+. PR: 236920 Reviewed by: arichardson, imp Tested by: bdragon (BE powerpc) MFC after: 3 weeks Differential Revision: https://reviews.freebsd.org/D29012
* Remove PCPU_INCJason A. Harmening2021-03-211-1/+0
| | | | | | | | | | | | | | | | e4b8deb22227 removed the last in-tree uses of PCPU_INC(). Its potential benefit is also practically nonexistent. Non-x86 platforms already implement it as PCPU_ADD(..., 1), and according to [0] there are no recent x86 processors for which the 'inc' instruction provides a performance benefit over the equivalent memory-operand form of the 'add' instruction. The only remaining benefit of 'inc' is smaller instruction size, which in this case is inconsequential given the limited number of per-CPU data consumers. [0]: https://www.agner.org/optimize/instruction_tables.pdf Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D29308
* Remove 'struct trapframe' pointer from mips64's 'struct syscall_args'.Edward Tomasz Napierala2020-11-061-2/+2
| | | | | | | | | | | | | While here, use MAXARGS. This brings its 'struct syscall_args' in sync with most other architectures. Reviewed by: arichardson, brooks MFC after: 2 weeks Sponsored by: EPSRC Differential Revision: https://reviews.freebsd.org/D26619 Notes: svn path=/head/; revision=367429
* Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.Edward Tomasz Napierala2020-09-271-1/+0
| | | | | | | | | Reviewed by: kib Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D26458 Notes: svn path=/head/; revision=366205
* Check for the only 32-bit MIPS ABIs we support, rather than !n64Justin Hibbits2020-09-261-1/+1
| | | | | | | | | | | There may be additional 64-bit ABIs supported, so use a positive check rather than a negative check. Suggested by: imp MFC after: 1 week Sponsored by: Juniper Networks, Inc Notes: svn path=/head/; revision=366188
* mips: Fix compat32 library builds from r366162Justin Hibbits2020-09-251-0/+4
| | | | | | | | | | Re-add the a_ptr and a_fcn fields to Elf32_Auxinfo. MFC after: 1 week Sponsored by: Juniper Networks, Inc. Notes: svn path=/head/; revision=366169
* Fix compat32 on mips64Justin Hibbits2020-09-251-2/+0
| | | | | | | | | | | | | | | | | | Summary: Two bugs: * Elf32_Auxinfo is broken, using pointers in the union, which are 64-bits not 32. * freebsd32_sysarch() doesn't update the 'user local' register when handling MIPS_SET_TLS, leading to a NULL pointer dereference in the 32-bit application. Reviewed by: #mips, brooks MFC after: 1 week Sponsored by: Juniper Networks, Inc Differential Revision: https://reviews.freebsd.org/D26556 Notes: svn path=/head/; revision=366162
* Add a vmparam.h constant indicating pmap support for large pages.Mark Johnston2020-09-231-0/+5
| | | | | | | | | | | Enable SHM_LARGEPAGE support on arm64. Reviewed by: alc, kib Sponsored by: Juniper Networks, Inc., Klara, Inc. Differential Revision: https://reviews.freebsd.org/D26467 Notes: svn path=/head/; revision=366090
* Sparsify the vm_page_dump bitmapD Scott Phillips2020-09-211-1/+2
| | | | | | | | | | | | | | | | | | | On Ampere Altra systems, the sparse population of RAM within the physical address space causes the vm_page_dump bitmap to be much larger than necessary, increasing the size from ~8 Mib to > 2 Gib (and overflowing `int` for the size). Changing the page dump bitmap also changes the minidump file format, so changes are also necessary in libkvm. Reviewed by: jhb Approved by: scottl (implicit) MFC after: 1 week Sponsored by: Ampere Computing, Inc. Differential Revision: https://reviews.freebsd.org/D26131 Notes: svn path=/head/; revision=365978
* Move vm_page_dump bitset array definition to MI codeD Scott Phillips2020-09-212-4/+5
| | | | | | | | | | | | | | | | | | | These definitions were repeated by all architectures, with small variations. Consolidate the common definitons in machine independent code and use bitset(9) macros for manipulation. Many opportunities for deduplication remain in the machine dependent minidump logic. The only intended functional change is increasing the bit index type to vm_pindex_t, allowing the indexing of pages with address of 8 TiB and greater. Reviewed by: kib, markj Approved by: scottl (implicit) MFC after: 1 week Sponsored by: Ampere Computing, Inc. Differential Revision: https://reviews.freebsd.org/D26129 Notes: svn path=/head/; revision=365977
* Add missing assignment forgotten in r365899Michal Meloun2020-09-201-0/+1
| | | | | | | | | Noticed by: mav MFC after: 1 month MFC with: r365899 Notes: svn path=/head/; revision=365926
* Add NetBSD compatible bus_space_peek_N() and bus_space_poke_N() functions.Michal Meloun2020-09-191-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | One problem with the bus_space_read_N() and bus_space_write_N() family of functions is that they provide no protection against exceptions which can occur when no physical hardware or device responds to the read or write cycles. In such a situation, the system typically would panic due to a kernel-mode bus error. The bus_space_peek_N() and bus_space_poke_N() family of functions provide a mechanism to handle these exceptions gracefully without the risk of crashing the system. Typical example is access to PCI(e) configuration space in bus enumeration function on badly implemented PCI(e) root complexes (RK3399 or Neoverse N1 N1SDP and/or access to PCI(e) register when device is in deep sleep state. This commit adds a real implementation for arm64 only. The remaining architectures have bus_space_peek()/bus_space_poke() emulated by using bus_space_read()/bus_space_write() (without exception handling). MFC after: 1 month Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D25371 Notes: svn path=/head/; revision=365899
* Add the MEM_EXTRACT_PADDR ioctl to /dev/mem.Mark Johnston2020-09-021-1/+1
| | | | | | | | | | | | | | | This allows privileged userspace processes to find information about the physical page backing a given mapping. It is useful in applications such as DPDK which perform some of their own memory management. Reviewed by: kib, jhb (previous version) MFC after: 2 weeks Sponsored by: Juniper Networks, Inc. Sponsored by: Klara Inc. Differential Revision: https://reviews.freebsd.org/D26237 Notes: svn path=/head/; revision=365265
* mips: clean up empty lines in .c and .h filesMateusz Guzik2020-09-016-18/+2
| | | | Notes: svn path=/head/; revision=365076
* Various fixes to TLS for MIPS.John Baldwin2020-06-121-3/+1
| | | | | | | | | | | | | | | | | | | | | | - Clear the current thread's TLS pointer on exec. Previously the TLS pointer (and register) remain unchanged. - Explicitly clear the TLS pointer when new threads are created. - Make md_tls_tcb_offset per-process instead of per-thread. The layout of the TLS and TCB are identical for all threads in a process, it is only the TLS pointer values themselves that vary by thread. This also makes setting md_tls_tcb_offset in cpu_set_user_tls() redundant with the setting in exec_setregs(), so only set it in exec_setregs(). Submitted by: Alfredo Mazzinghi (1) Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D24957 Notes: svn path=/head/; revision=362122
* Print CPU informtion later in boot.John Baldwin2020-05-201-0/+3
| | | | | | | | | | | | | | | | | Match other architectures and print CPU information during cpu_startup(). In particular, this prints the information after the message buffer is initialized which allows it to be retrieved after boot via dmesg(8). While here, add some extern declarations to <machine/md_var.h> in place of duplicated declarations in various source files. Reviewed by: brooks Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D24936 Notes: svn path=/head/; revision=361297
* Simplify hot-patching cpu_switch() for lack of UserLocal register.John Baldwin2020-05-201-0/+1
| | | | | | | | | | | | | Rather than walking all of cpu_switch looking for the sequence of instructions to patch, add a global label at the location that needs the patch applied. Reviewed by: brooks, Alfredo Mazzinghi <alfredo.mazzinghi_cl.cam.ac.uk> Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D24931 Notes: svn path=/head/; revision=361296
* Use the right type for 64-bit coprocessor registers.John Baldwin2020-04-171-4/+4
| | | | | | | | | | | | | | | The use of "int" here caused the compiler to believe that it needs to insert a "sll $n, $n, 0" to sign extend as part of the implicit cast to uint64_t. Submitted by: Nathaniel Filardo <nwf20@cl.cam.ac.uk> Reviewed by: brooks, arichardson Obtained from: CheriBSD Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D24457 Notes: svn path=/head/; revision=360050
* mips: fix kernel build after r357804Kyle Evans2020-02-141-1/+1
| | | | | | | | Drop the padding down the size of a single uintptr_t to account for pc_zpcpu_offset Notes: svn path=/head/; revision=357935
* [PowerPC] [MIPS] Implement 32-bit kernel emulation of atomic64 operationsBrandon Bergren2020-01-021-0/+4
| | | | | | | | | | | | | | | | | | | This is a lock-based emulation of 64-bit atomics for kernel use, split off from an earlier patch by jhibbits. This is needed to unblock future improvements that reduce the need for locking on 64-bit platforms by using atomic updates. The implementation allows for future integration with userland atomic64, but as that implies going through sysarch for every use, the current status quo of userland doing its own locking may be for the best. Submitted by: jhibbits (original patch), kevans (mips bits) Reviewed by: jhibbits, jeff, kevans Differential Revision: https://reviews.freebsd.org/D22976 Notes: svn path=/head/; revision=356308
* Two minor issues:Warner Losh2019-12-171-1/+7
| | | | | | | | | (1) Don't define load/store 64 atomics for o32. They aren't atomic there. (2) Add comment about why we need 64 atomic define on n32 only. Notes: svn path=/head/; revision=355841
* Introduce vm_page_astate.Mark Johnston2019-12-101-1/+1
| | | | | | | | | | | | | | | | | This is a 32-bit structure embedded in each vm_page, consisting mostly of page queue state. The use of a structure makes it easy to store a snapshot of a page's queue state in a stack variable and use cmpset loops to update that state without requiring the page lock. This change merely adds the structure and updates references to atomic state fields. No functional change intended. Reviewed by: alc, jeff, kib Sponsored by: Netflix, Intel Differential Revision: https://reviews.freebsd.org/D22650 Notes: svn path=/head/; revision=355586
* Regularize my copyright noticeWarner Losh2019-12-042-3/+2
| | | | | | | | | | | | o Remove All Rights Reserved from my notices o imp@FreeBSD.org everywhere o regularize punctiation, eliminate date ranges o Make sure that it's clear that I don't claim All Rights reserved by listing All Rights Reserved on same line as other copyright holders (but not me). Other such holders are also listed last where it's clear. Notes: svn path=/head/; revision=355394
* Remove two obsolete comments that reference splhigh/splx.Warner Losh2019-11-211-7/+0
| | | | Notes: svn path=/head/; revision=354972
* add atomic_load_64 for mipsn32Andriy Gapon2019-10-071-0/+4
| | | | | | | | | It's just an alias for atomic_load_acq_64 (same as on i386). MFC after: 1 week Notes: svn path=/head/; revision=353166
* mips: use generic sub-word atomic *cmpsetKyle Evans2019-10-021-68/+74
| | | | | | | | | | Most of this diff is refactoring to reduce duplication between the different acq_ and rel_ variants. Differential Revision: https://reviews.freebsd.org/D21822 Notes: svn path=/head/; revision=353016
* mips: fcmpset: do not spin on sc failureKyle Evans2019-10-021-12/+18
| | | | | | | | | | | | | | For ll/sc architectures, atomic(9) allows failure modes where *old == val due to write failure and callers should compensate for this. Do not retry on failure, just leave 0 in ret and fail the operation if we couldn't sc it. This lets the caller determine if it should retry or not. Reviewed by: kib Looks ok: imp Differential Revision: https://reviews.freebsd.org/D21836 Notes: svn path=/head/; revision=353008
* mips: move support for temporary mappings above KSEG0 to per-CPU dataJason A. Harmening2019-09-171-1/+7
| | | | | | | | | | | | This is derived from similar work done in r310481 for i386 and r312610 for armv6/armv7. Additionally, use a critical section to keep the thread pinned for per-CPU operations instead of completely disabling local interrupts. No objections from: adrian, jmallett, imp Differential Revision: https://reviews.freebsd.org/D18593 Notes: svn path=/head/; revision=352434
* mips: fix some mcount nitsKyle Evans2019-09-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The symbol version for _mcount was removed 12 years ago in r169525 from gmon/Symbol.map, to be added to the per-arch Symbol.map. mips was overlooked in this, so _mcount has no symver. Add it back to where it should have been, rather than where it would go if it were added today, since we're correcting a historical mistake. Additionally, _mcount is getting thrown into .mdebug.abi32 in the llvm80/90 world as it's not getting explicitly thrown into .text, so do this now. This fixes the libc build that was previously failing due to relocations in .mdebug.abi32. This is specifically due to the way clang's integrated AS works and that they emit the .mdebug.abiNN section early in the process. An LLVM bug has been submitted[0] and an agreement has been made that the mips backend should switch to .text following .mdebug.abiNN for compatibility. [0] https://bugs.llvm.org/show_bug.cgi?id=43119 Reviewed by: imp, arichardson MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D21435 Notes: svn path=/head/; revision=351681
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