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* aq(4): add Atlantic 2 (AQC113) device supportNick Price2026-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Marvell Atlantic 2 (AQC113/114/115/116) controllers, a new chip generation that is not register-compatible with the Atlantic 1 parts aq(4) supports today. Adapted from the OpenBSD/NetBSD if_aq driver. Register and device definitions (aq2_hw.h): the firmware handshake (MIF_BOOT / MCP_HOST_REQ_INT / MIF_HOST_FINISHED), the 0x12000/0x13000 firmware interface windows, and the action-resolver table (ART) that replaces Atlantic 1's discrete RX filters, plus the Atlantic 2 PCI device ids and the aq_is_atlantic2() helper. Reserve a chip-feature bit (AQ_HW_CHIP_ATLANTIC2) and add the aq_hw fields the firmware fills at boot (ART base index, statistics interface version A0/B0). The per-VLAN-filter resolver-tag field comes from the Linux driver; the BSD sources never write it. Firmware operations (aq_fwa2.c): Atlantic 2 talks to the management CPU through the 0x12000/0x13000 register windows plus the boot handshake, rather than Atlantic 1's mailbox in shared RAM. Implement that as a third aq_firmware_ops vtable (reset, set_mode, get_mode, get_mac_addr, get_stats); aq_fwa2_reboot() boots the firmware, selects the A2 ops, and reads the version and ART base index, failing fast on the crash-init / boot-failed bits. fwa2_set_mode advertises full duplex only (the media model exposes no half-duplex types) and writes and acks the link options before raising ACTIVE mode, so a forced media change does not begin negotiation with a stale rate mask. enum aq_fw_link_speed gains aq_fw_10M, which Atlantic 2 supports and Atlantic 1 does not. Probe and attach: list the device ids with their media types and link speeds (all copper; AQC113* up to 10G, AQC116C to 1G), populate hw->device_id, and tag the generation with AQ_HW_CHIP_ATLANTIC2 so IS_CHIP_FEATURE() recognises it uniformly. Branch firmware bring-up and reset on the generation: aq_hw_init_ucp() and aq_hw_reset() reboot the MCP instead of the Atlantic 1 RBL/FLB reset -- without a real datapath reset every stop/init cycle reprograms the rings on a live, desynced RX DMA engine and the receive path stays dead. aq_hw_init() programs the Atlantic 2 launch-time clock ratio in place of the Atlantic 1 MRRS / TX-DMA request-limit clamp. Add an AQ_LINK_10M capability bit (Atlantic 2 links at 10M, Atlantic 1 cannot), offer 10baseT media, and map IFM_10_T to aq_fw_10M. With every supported media type now present, replace the per-speed switch statements in aq_media.c with a single {link bit, fw rate, IFM_* subtype, Mbit/s} table -- one source of truth for the supported link speeds. With this an Atlantic 2 card probes, brings up its firmware, reads its MAC, and negotiates link; the RX action-resolver datapath comes next. Reviewed by: adrian Differential Revision: https://reviews.freebsd.org/D58141
* aq(4): Add build infrastructureEd Maste2025-12-181-0/+12
Reviewed by: adrian Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D53839