src - FreeBSD source tree

	Commit message (Expand)	Author	Age	Files	Lines
*	riscv: Rework CPU identification (second part)	Mitchell Horne	2023-06-12	1	-9/+23
*	riscv: Call identify_cpu() earlier for CPU 0	Mitchell Horne	2023-06-12	1	-0/+1
*	riscv: reject CPUs with mmu-type "riscv,none"	Mitchell Horne	2022-10-28	1	-13/+15
*	riscv: drop a dead declaration	Mitchell Horne	2022-10-24	1	-2/+0
*	arm64, riscv: size boot stacks appropriately	Kyle Evans	2022-09-18	1	-3/+7
*	Fix the test used to wait for AP startup on x86, arm64, riscv	Mark Johnston	2022-06-29	1	-12/+15
*	sched: separate out schedinit_ap()	Kyle Evans	2022-02-10	1	-0/+1
*	riscv: set kernel_pmap hart mask more precisely	Mitchell Horne	2020-11-05	1	-0/+4
*	riscv: remove sbi_clear_ipi()	Mitchell Horne	2020-10-26	1	-1/+1
*	Use the HSM SBI extension to start APs	Mitchell Horne	2020-05-01	1	-1/+21
*	Remove the secondary_stacks array in arm64 and riscv kernels.	Mark Johnston	2020-03-24	1	-8/+46
*	riscv: Remove unused variable	Kristof Provost	2019-12-31	1	-1/+1
*	riscv: Remove pointless loop	Kristof Provost	2019-12-31	1	-6/+1
*	RISC-V: Support EARLY_AP_STARTUP	Mitchell Horne	2019-09-16	1	-0/+2
*	Centralize __pcpu definitions.	Konstantin Belousov	2019-08-29	1	-2/+0
*	Fix global pointer relaxations in the RISC-V kernel	Mitchell Horne	2019-06-09	1	-1/+1
*	Extract eventfilter declarations to sys/_eventfilter.h	Conrad Meyer	2019-05-20	1	-0/+1
*	Add support for HiFive Unleashed -- the board with a multi-core RISC-V SoC	Ruslan Bukin	2019-05-12	1	-27/+63
*	Implement per-CPU pmap activation tracking for RISC-V.	Mark Johnston	2019-02-13	1	-0/+4
*	Don't enable interrupts in init_secondary().	Mark Johnston	2019-01-04	1	-4/+0
*	SBI calls expect a pointer to a u_long rather than a pointer.	John Baldwin	2018-11-01	1	-1/+1
*	Various fixes for TLB management on RISC-V.	John Baldwin	2018-10-15	1	-0/+6
*	Eliminate kmem_malloc()'s unused arena parameter. (The arena parameter	Alan Cox	2018-08-21	1	-2/+1
*	o Add driver for PLIC (Platform-Level Interrupt Controller) device.	Ruslan Bukin	2018-06-12	1	-0/+3
*	Release secondary cores from WFI (wait for interrupt) by sending them	Ruslan Bukin	2018-06-12	1	-0/+14
*	Add full softfloat and hardfloat support for RISC-V.	Ruslan Bukin	2016-11-16	1	-7/+0
*	o Remove operation in machine mode.	Ruslan Bukin	2016-08-10	1	-10/+2
*	Add support for symmetric multiprocessing (SMP).	Ruslan Bukin	2016-02-24	1	-0/+453