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This commit updates the driver code to conform with an undocumented
convention which says that certain functions need always be implemented
together regardless of their content (or lack of). It's been said that
unimplemented KOBJ methods become stubs which return ENXIO so this
commit does not imply a functional change.
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D52042
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Since gpiobus_attach_bus can attach the gpiobus child along with its
children in the same bus pass, the parent controller's reference to
gpiobus might not be set by the time the children need it. Instead,
drivers should use gpiobus_add_bus and explicitly call
bus_attach_children.
Reviewed by: mmel, imp (older version)
Approved by: imp (mentor)
Differential Revision: https://reviews.freebsd.org/D51578
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JH7110 has two PCIE controller devices. First one is used by board's
integrated USB which has no driver. Switching PHY to USB mode is not
currently implemented. This functionality could be added in a form of a
separate PCIE PHY driver if needed. PHY is on by default and there's no
need to switch it on.
Pre/post_ithread and post_filter methods are not used for interrupt
masking since they are meant for level-triggered interrupts whereas
JH7110's MSI interrupts are edge triggered (and INTx interrupts do not
use this irqsrc scheme at all). Pre_ithread method is nevertheless used
for MSI bottom acking.
The driver has been tested with Kingston SNV2S NVME SSD The
functionality of INTx and MSI interrupts (as opposed to default MSIx)
has been tested by forcing NVME to use them.
Reviewed by: mhorne
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D47919
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Basic functionality implemented; fdt_pinctrl interface to be added in
the future.
Reviewed by: mhorne
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D43034
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Found on the VisionFive v2 SBC, and similar.
Reviewed by: mhorne
Tested by: mhorne
Discussed with: sos
Differential Revision: https://reviews.freebsd.org/D45600
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This is identical to AON clocks. The only difference is
BUS_PASS_ORDER_LAST which was needed for some reason. This has clocks
needed by PCIe controller driver.
Reviewed by: mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D47920
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Implement a core clknode driver for the JH7110 (StarFive VisionFive v2)
platform.
Add clock/reset generator drivers for the PLL, SYS, and AON clock
groupings.
Co-authored-by: mhorne
Reviewed by: mhorne
Sponsored by: The FreeBSD Foundation (mhorne's contributions)
Differential Revision: https://reviews.freebsd.org/D43037
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I did not set the author field properly; revert to fix this.
This reverts commit 5d6d6278979b9eab598a23c804d23e930d2f7268.
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Add a variant of the existing dwmmc driver, and enable it in the GENERIC
kernel.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D44026
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Implement a core clknode driver for the JH7110 (StarFive VisionFive v2)
platform.
Add clock/reset generator drivers for the PLL, SYS, and AON clock
groupings.
Co-authored-by: mhorne
Reviewed by: mhorne
Sponsored by: The FreeBSD Foundation (mhorne's contributions)
Differential Revision: https://reviews.freebsd.org/D43037
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It serves the purpose of attaching syscon devices as early as possible;
this is required for early attachment of the PLL clock driver.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D44270
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Enable the Synopsis UART driver. Other drivers will be added in the
future.
Reviewed by: jrtc27
Sponsored by: The FreeBSD Foundatino
Differential Revision: https://reviews.freebsd.org/D44105
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