path: root/sys/x86/pci
Commit message (Expand)AuthorAgeFilesLines
* x86: clean up empty lines in .c and .h filesMateusz Guzik2020-09-012-4/+0
* Add pci_early function to detect Intel stolen memory.Konstantin Belousov2018-10-312-0/+766
* Add ISA PNP tables to ISA drivers. Fix a few incidental comments.Warner Losh2018-01-291-2/+2
* sys/x86: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-272-0/+4
* Enhance qpi.c to make it usable on all Core-microarchitecture Xeons.Konstantin Belousov2017-09-081-15/+27
* Consistently use tabs for indent.Konstantin Belousov2017-09-081-7/+7
* Fix typos. Stop claiming that two children are created.Konstantin Belousov2017-09-061-3/+3
* Convert PCIe Hot Plug to using pci_request_featureWarner Losh2017-02-251-0/+1
* "Buses" is the preferred plural of "bus"Conrad Meyer2017-01-151-3/+3
* Convert rman to use rman_res_t instead of u_longJustin Hibbits2016-01-272-5/+5
* Add domain support to PCI bus allocationZbigniew Bodek2015-09-162-2/+2
* Reassign copyright statements on several files from AdvancedJohn Baldwin2015-04-231-1/+1
* Pull in r267961 and r267973 again. Fix for issues reported will follow.Hans Petter Selasky2014-06-281-1/+0
* Revert r267961, r267973:Glen Barber2014-06-271-0/+1
* Extend the meaning of the CTLFLAG_TUN flag to automatically check ifHans Petter Selasky2014-06-271-1/+0
* Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridgeJohn Baldwin2014-02-122-3/+55
* - Reuse legacy_pcib_(read|write)_config() methods in the QPI pcib driver.John Baldwin2014-01-212-44/+9
* Trim stray blank line.John Baldwin2012-04-111-1/+0
* Move the legacy(4) driver to x86.John Baldwin2012-03-301-1/+1
* Use a more proper fix for enabling HT MSI mapping windows on Host-PCIJohn Baldwin2012-03-291-3/+19
* - There's no need to overwrite the default device method with the defaultMarius Strobl2011-11-222-4/+2
* Move {amd64,i386}/pci/pci_bus.c and {amd64,i386}/include/pci_cfgreg.h toJohn Baldwin2011-06-221-0/+719
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously theJohn Baldwin2011-05-031-0/+1
* Each processor socket in a QPI system has a special PCI bus for theJohn Baldwin2010-09-071-13/+45
* Correctly ensure that the CPU family is 0x6, not non-zero.John Baldwin2010-08-251-1/+2
* Intel QPI chipsets actually provide two extra "non-core" PCI buses thatJohn Baldwin2010-08-251-0/+286