aboutsummaryrefslogtreecommitdiff
path: root/sys/i4b/layer1/i4b_tel_s0163.c
blob: 0d36135ce9e36f7ec26e520a3c41af096ba9095c (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
/*
 *   Copyright (c) 1996 Arne Helme. All rights reserved.
 *
 *   Copyright (c) 1996 Gary Jennejohn. All rights reserved. 
 *
 *   Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *   1. Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *   2. Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in the
 *      documentation and/or other materials provided with the distribution.
 *   3. Neither the name of the author nor the names of any co-contributors
 *      may be used to endorse or promote products derived from this software
 *      without specific prior written permission.
 *   4. Altered versions must be plainly marked as such, and must not be
 *      misrepresented as being the original software and/or documentation.
 *   
 *   THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *   ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *   ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 *   FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *   DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *   OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *   LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *   OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *   SUCH DAMAGE.
 *
 *---------------------------------------------------------------------------
 *
 *	isic - I4B Siemens ISDN Chipset Driver for Teles S0/16.3
 *	========================================================
 *
 * $FreeBSD$ 
 *
 *      last edit-date: [Mon Jul 26 10:59:38 1999]
 *
 *	-hm	clean up
 *	-hm	more cleanup
 *      -hm     NetBSD patches from Martin
 *	-hm	VSTR detection for older 16.3 cards
 *
 *---------------------------------------------------------------------------*/

#if defined(__FreeBSD__)
#include "isic.h"
#include "opt_i4b.h"
#else
#define	NISIC 1
#endif
#if NISIC > 0 && defined(TEL_S0_16_3)

#include <sys/param.h>
#if defined(__FreeBSD__) && __FreeBSD__ >= 3
#include <sys/ioccom.h>
#else
#include <sys/ioctl.h>
#endif
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/mbuf.h>

#ifdef __FreeBSD__
#include <machine/clock.h>
#include <i386/isa/isa_device.h>
#elif defined(__bsdi__)
	/* XXX */
#else
#include <machine/bus.h>
#include <sys/device.h>
#endif

#include <sys/socket.h>
#include <net/if.h>

#ifdef __FreeBSD__
#include <machine/i4b_debug.h>
#include <machine/i4b_ioctl.h>
#else
#include <i4b/i4b_debug.h>
#include <i4b/i4b_ioctl.h>
#endif

#include <i4b/layer1/i4b_l1.h>
#include <i4b/layer1/i4b_isac.h>
#include <i4b/layer1/i4b_hscx.h>

#include <i4b/include/i4b_global.h>
#include <i4b/include/i4b_l1l2.h>
#include <i4b/include/i4b_mbuf.h>

static u_char intr_no[] = { 1, 1, 0, 2, 4, 6, 1, 1, 1, 0, 8, 10, 12, 1, 1, 14 };

#if !defined(__FreeBSD__) && !defined(__bsdi__)
static u_int8_t tels0163_read_reg __P((struct isic_softc *sc, int what, bus_size_t offs));
static void tels0163_write_reg __P((struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data));
static void tels0163_read_fifo __P((struct isic_softc *sc, int what, void *buf, size_t size));
static void tels0163_write_fifo __P((struct isic_softc *sc, int what, const void *data, size_t size));
#endif

/*---------------------------------------------------------------------------*
 *      Teles S0/16.3 read fifo routine
 *---------------------------------------------------------------------------*/
#if defined(__FreeBSD__) || defined(__bsdi__)

static void             
tels0163_read_fifo(void *buf, const void *base, size_t len)
{
        insb((int)base + 0x3e, (u_char *)buf, (u_int)len);
}

#else

static void
tels0163_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
{
        bus_space_tag_t t = sc->sc_maps[what+1].t;
        bus_space_handle_t h = sc->sc_maps[what+1].h;
        bus_size_t o = sc->sc_maps[what+1].offset;
        bus_space_read_multi_1(t, h, o + 0x1e, buf, size);
}

#endif

/*---------------------------------------------------------------------------*
 *      Teles S0/16.3 write fifo routine
 *---------------------------------------------------------------------------*/
#if defined(__FreeBSD__) || defined(__bsdi__)

static void
tels0163_write_fifo(void *base, const void *buf, size_t len)
{
        outsb((int)base + 0x3e, (u_char *)buf, (u_int)len);
}

#else

static void
tels0163_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
{
        bus_space_tag_t t = sc->sc_maps[what+1].t;
        bus_space_handle_t h = sc->sc_maps[what+1].h;
        bus_size_t o = sc->sc_maps[what+1].offset;
        bus_space_write_multi_1(t, h, o + 0x1e, (u_int8_t*)buf, size);
}
#endif

/*---------------------------------------------------------------------------*
 *      Teles S0/16.3 ISAC put register routine
 *---------------------------------------------------------------------------*/
#if defined(__FreeBSD__) || defined(__bsdi__)

static void
tels0163_write_reg(u_char *base, u_int offset, u_int v)
{
        outb((int)base + offset, (u_char)v);
}

#else

static void
tels0163_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
{
	bus_space_tag_t t = sc->sc_maps[what+1].t;
	bus_space_handle_t h = sc->sc_maps[what+1].h;
	bus_size_t o = sc->sc_maps[what+1].offset;
	bus_space_write_1(t, h, o + offs - 0x20, data);
}
#endif

/*---------------------------------------------------------------------------*
 *	Teles S0/16.3 ISAC get register routine
 *---------------------------------------------------------------------------*/
#if defined(__FreeBSD__) || defined(__bsdi__)

static u_char
tels0163_read_reg(u_char *base, u_int offset)
{
	return (inb((int)base + offset));
}

#else

static u_int8_t
tels0163_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
{
	bus_space_tag_t t = sc->sc_maps[what+1].t;
	bus_space_handle_t h = sc->sc_maps[what+1].h;
	bus_size_t o = sc->sc_maps[what+1].offset;
	return bus_space_read_1(t, h, o + offs - 0x20);
}

#endif

/*---------------------------------------------------------------------------*
 *	isic_probe_s0163 - probe for Teles S0/16.3 and compatibles
 *---------------------------------------------------------------------------*/
#ifdef __FreeBSD__
int
isic_probe_s0163(struct isa_device *dev)
{
	struct isic_softc *sc = &isic_sc[dev->id_unit];
	u_char byte;
	
	/* check max unit range */
	
	if(dev->id_unit >= ISIC_MAXUNIT)
	{
		printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for Teles S0/16.3!\n",
				dev->id_unit, dev->id_unit);
		return(0);	
	}	
	sc->sc_unit = dev->id_unit;

	/* check IRQ validity */

	if((intr_no[ffs(dev->id_irq) - 1]) == 1)
	{
		printf("isic%d: Error, invalid IRQ [%d] specified for Teles S0/16.3!\n",
			dev->id_unit, ffs(dev->id_irq)-1);
		return(0);
	}
	sc->sc_irq = dev->id_irq;

	/* check if memory addr specified */

	if(dev->id_maddr)
	{
		printf("isic%d: Error, mem addr 0x%lx specified for Teles S0/16.3!\n",
			dev->id_unit, (u_long)dev->id_maddr);
		return(0);
	}
		
	dev->id_msize = 0;
	
	/* check if we got an iobase */

	switch(dev->id_iobase)
	{
		case 0xd80:
		case 0xe80:
		case 0xf80:
			break;
			
		default:
			printf("isic%d: Error, invalid iobase 0x%x specified for Teles S0/16.3!\n",
				dev->id_unit, dev->id_iobase);
			return(0);
			break;
	}
	sc->sc_port = dev->id_iobase;
	
	if(((byte = inb(sc->sc_port)) != 0x51) && (byte != 0x10))
	{
		printf("isic%d: Error, signature 1 0x%x != 0x51 or 0x10 for Teles S0/16.3!\n",
			dev->id_unit, byte);
		return(0);
	}
	
	if((byte = inb(sc->sc_port + 1)) != 0x93)
	{
		printf("isic%d: Error, signature 2 0x%x != 0x93 for Teles S0/16.3!\n",
			dev->id_unit, byte);
		return(0);
	}

	if((byte = inb(sc->sc_port + 2)) != 0x1c)	
	{
		printf("isic%d: Error, signature 3 0x%x != 0x1c for Teles S0/16.3!\n",
			dev->id_unit, byte);
		return(0);
	}

	/* setup access routines */

	sc->clearirq = NULL;
	sc->readreg = tels0163_read_reg;
	sc->writereg = tels0163_write_reg;

	sc->readfifo = tels0163_read_fifo;
	sc->writefifo = tels0163_write_fifo;

	/* setup card type */
	
	sc->sc_cardtyp= CARD_TYPEP_16_3;

	/* setup IOM bus type */
	
	sc->sc_bustyp = BUS_TYPE_IOM2;

	sc->sc_ipac = 0;
	sc->sc_bfifolen = HSCX_FIFO_LEN;	

	/* setup ISAC and HSCX base addr */
	
	switch(dev->id_iobase)
	{
		case 0xd80:
		        ISAC_BASE = (caddr_t) 0x960;
			HSCX_A_BASE = (caddr_t) 0x160;
			HSCX_B_BASE = (caddr_t) 0x560;
			break;
		
		case 0xe80:
	        	ISAC_BASE = (caddr_t) 0xa60;
			HSCX_A_BASE = (caddr_t) 0x260;
			HSCX_B_BASE = (caddr_t) 0x660;
			break;

		case 0xf80:
		        ISAC_BASE = (caddr_t) 0xb60;
			HSCX_A_BASE = (caddr_t) 0x360;
			HSCX_B_BASE = (caddr_t) 0x760;
			break;
	}

	/* 
	 * Read HSCX A/B VSTR.  Expected value for the S0/16.3 card is
	 * 0x05 or 0x04 (for older 16.3's) in the least significant bits.
	 */

	if( (((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) &&
	     ((HSCX_READ(0, H_VSTR) & 0xf) != 0x4))	||
            (((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) &&
	     ((HSCX_READ(1, H_VSTR) & 0xf) != 0x4)) )  
	{
		printf("isic%d: HSCX VSTR test failed for Teles S0/16.3\n",
			dev->id_unit);
		printf("isic%d: HSC0: VSTR: %#x\n",
			dev->id_unit, HSCX_READ(0, H_VSTR));
		printf("isic%d: HSC1: VSTR: %#x\n",
			dev->id_unit, HSCX_READ(1, H_VSTR));
		return (0);
	}                   

	return (1);
}

#elif defined(__bsdi__)

static int
set_softc(struct isic_softc *sc, struct isa_attach_args *ia, int unit)
{
	sc->sc_irq = ia->ia_irq;

	/* check if we got an iobase */

	switch(ia->ia_iobase)
	{
		case 0xd80:
		case 0xe80:
		case 0xf80:
			break;
			
		default:
			printf("isic%d: Error, invalid iobase 0x%x specified for Teles S0/16.3!\n",
				unit, ia->ia_iobase);
			return(0);
			break;
	}
	sc->sc_port = ia->ia_iobase;
	
	/* setup access routines */

	sc->clearirq = NULL;
	sc->readreg = tels0163_read_reg;
	sc->writereg = tels0163_write_reg;

	sc->readfifo = tels0163_read_fifo;
	sc->writefifo = tels0163_write_fifo;

	/* setup card type */
	
	sc->sc_cardtyp= CARD_TYPEP_16_3;

	/* setup IOM bus type */
	
	sc->sc_bustyp = BUS_TYPE_IOM2;

	sc->sc_ipac = 0;
	sc->sc_bfifolen = HSCX_FIFO_LEN;	

	/* setup ISAC and HSCX base addr */
	
	switch(ia->ia_iobase)
	{
		case 0xd80:
		        ISAC_BASE = (caddr_t) 0x960;
			HSCX_A_BASE = (caddr_t) 0x160;
			HSCX_B_BASE = (caddr_t) 0x560;
			break;
		
		case 0xe80:
	        	ISAC_BASE = (caddr_t) 0xa60;
			HSCX_A_BASE = (caddr_t) 0x260;
			HSCX_B_BASE = (caddr_t) 0x660;
			break;

		case 0xf80:
		        ISAC_BASE = (caddr_t) 0xb60;
			HSCX_A_BASE = (caddr_t) 0x360;
			HSCX_B_BASE = (caddr_t) 0x760;
			break;
	}
	return 1;
}

int
isic_probe_s0163(struct device *dev, struct cfdata *cf,
		struct isa_attach_args *ia)
{
	u_char byte;
	struct isic_softc dummysc, *sc = &dummysc;
	
	if((intr_no[ffs(ia->ia_irq) - 1]) == 1)
	{
		printf("isic%d: Error, invalid IRQ [%d] specified for Teles S0/16.3!\n",
			cf->cf_unit, ffs(ia->ia_irq)-1);
		return(0);
	}

	/* check if memory addr specified */

	if(ia->ia_maddr)
	{
		printf("isic%d: Error, mem addr 0x%lx specified for Teles S0/16.3!\n",
			cf->cf_unit, (u_long)ia->ia_maddr);
		return 0;
	}

	/* Set up a temporary softc for the probe */

	if (set_softc(sc, ia, cf->cf_unit) == 0)
		return 0;
	
	if((byte = inb(sc->sc_port)) != 0x51)
	{
		printf("isic%d: Error, signature 1 0x%x != 0x51 for Teles S0/16.3!\n",
			cf->cf_unit, byte);
		return(0);
	}
	
	if((byte = inb(sc->sc_port + 1)) != 0x93)
	{
		printf("isic%d: Error, signature 2 0x%x != 0x93 for Teles S0/16.3!\n",
			cf->cf_unit, byte);
		return(0);
	}

	if((byte = inb(sc->sc_port + 2)) != 0x1c)	
	{
		printf("isic%d: Error, signature 3 0x%x != 0x1c for Teles S0/16.3!\n",
			cf->cf_unit, byte);
		return(0);
	}

	/* 
	 * Read HSCX A/B VSTR.  Expected value for the S0/16.3 card is
	 * 0x05 or 0x04 (for older 16.3's) in the least significant bits.
	 */

	if( (((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) &&
	     ((HSCX_READ(0, H_VSTR) & 0xf) != 0x4))	||
            (((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) &&
	     ((HSCX_READ(1, H_VSTR) & 0xf) != 0x4)) )  
	{
		printf("isic%d: HSCX VSTR test failed for Teles S0/16.3\n",
			cf->cf_unit);
		printf("isic%d: HSC0: VSTR: %#x\n",
			cf->cf_unit, HSCX_READ(0, H_VSTR));
		printf("isic%d: HSC1: VSTR: %#x\n",
			cf->cf_unit, HSCX_READ(1, H_VSTR));
		return (0);
	}                   

	return (1);
}


#else

int
isic_probe_s0163(struct isic_attach_args *ia)
{
	bus_space_tag_t t = ia->ia_maps[0].t;
	bus_space_handle_t h = ia->ia_maps[0].h;
	u_int8_t b0, b1, b2;

	b0 = bus_space_read_1(t, h, 0);
	b1 = bus_space_read_1(t, h, 1);
	b2 = bus_space_read_1(t, h, 2);

	if (b0 == 0x51 && b1 == 0x93 && b2 == 0x1c)
		return 1;

	return 0;
}
#endif

/*---------------------------------------------------------------------------*
 *	isic_attach_s0163 - attach Teles S0/16.3 and compatibles
 *---------------------------------------------------------------------------*/
#ifdef __FreeBSD__
int
isic_attach_s0163(struct isa_device *dev)
{
	u_char irq;

	if((irq = intr_no[ffs(dev->id_irq) - 1]) == 1)
	{
		printf("isic%d: Attach error, invalid IRQ [%d] specified for Teles S0/16.3!\n",
			dev->id_unit, ffs(dev->id_irq)-1);
		return(0);
	}

	/* configure IRQ */
	
	DELAY(SEC_DELAY / 10);
	outb(dev->id_iobase + 4, irq);

	DELAY(SEC_DELAY / 10);
	outb(dev->id_iobase + 4, irq | 0x01);	

	return (1);
}

#elif defined(__bsdi__)

extern int
isic_attach_s0163(struct device *parent, struct device *self, struct isa_attach_args *ia)
{
	u_char irq;
	struct isic_softc *sc = (struct isic_softc *)self;
	int unit = sc->sc_dev.dv_unit;

	/* Commit the probed attachement values */

	if (set_softc(sc, ia, unit) == 0)
		panic("isic_attach_s0163: set_softc");

	if (((unsigned)sc->sc_unit) >= NISIC)
		panic("attach isic%d; NISIC=%d", sc->sc_unit, NISIC);
	isic_sc[sc->sc_unit] = sc;
	irq = intr_no[ffs(sc->sc_irq) - 1];
	/* configure IRQ */
	
	DELAY(SEC_DELAY / 10);
	outb(sc->sc_port + 4, irq);

	DELAY(SEC_DELAY / 10);
	outb(sc->sc_port + 4, irq | 0x01);	

	return 1;
}
#else

int
isic_attach_s0163(struct isic_softc *sc)
{
	bus_space_tag_t t = sc->sc_maps[0].t;
	bus_space_handle_t h = sc->sc_maps[0].h;
	u_int8_t irq = intr_no[sc->sc_irq];

	/* configure IRQ */
	
	DELAY(SEC_DELAY / 10);
	bus_space_write_1(t, h, 4, irq);

	DELAY(SEC_DELAY / 10);
	bus_space_write_1(t, h, 4, irq | 0x01);

	/* setup access routines */

	sc->clearirq = NULL;
	sc->readreg = tels0163_read_reg;
	sc->writereg = tels0163_write_reg;

	sc->readfifo = tels0163_read_fifo;
	sc->writefifo = tels0163_write_fifo;

	/* setup card type */
	
	sc->sc_cardtyp= CARD_TYPEP_16_3;

	/* setup IOM bus type */
	
	sc->sc_bustyp = BUS_TYPE_IOM2;

	sc->sc_ipac = 0;
	sc->sc_bfifolen = HSCX_FIFO_LEN;

	return (1);
}
#endif

#endif /* ISIC > 0 */