aboutsummaryrefslogtreecommitdiff
path: root/cad/veryl
diff options
context:
space:
mode:
authorMikael Urankar <mikael@FreeBSD.org>2024-01-09 12:14:59 +0000
committerMikael Urankar <mikael@FreeBSD.org>2024-01-09 12:15:54 +0000
commit109c3d4629b84972e660b689d169ac0761c1a519 (patch)
tree69272eb584af95a4b5848d1ab47aed04358fc499 /cad/veryl
parentd0c14d04136e43828d0c8184efc8d9105c9fd502 (diff)
downloadports-109c3d4629b84972e660b689d169ac0761c1a519.tar.gz
ports-109c3d4629b84972e660b689d169ac0761c1a519.zip
lang/rust: Bump revisions after 1.75.0
PR: 276033
Diffstat (limited to 'cad/veryl')
-rw-r--r--cad/veryl/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/veryl/Makefile b/cad/veryl/Makefile
index 4c4ddf0dba58..cebcd1adf17f 100644
--- a/cad/veryl/Makefile
+++ b/cad/veryl/Makefile
@@ -1,7 +1,7 @@
PORTNAME= veryl
DISTVERSIONPREFIX= veryl-v
DISTVERSION= 0.5.6
-PORTREVISION= 2
+PORTREVISION= 3
CATEGORIES= cad
MAINTAINER= yuri@FreeBSD.org