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-rw-r--r--cad/atlc/Makefile1
-rw-r--r--cad/atlc/pkg-comment1
-rw-r--r--cad/cascade/Makefile1
-rw-r--r--cad/cascade/pkg-comment1
-rw-r--r--cad/iverilog/Makefile1
-rw-r--r--cad/iverilog/pkg-comment1
-rw-r--r--cad/sceptre/Makefile1
-rw-r--r--cad/sceptre/pkg-comment1
-rw-r--r--cad/vipec/Makefile1
-rw-r--r--cad/vipec/pkg-comment1
10 files changed, 5 insertions, 5 deletions
diff --git a/cad/atlc/Makefile b/cad/atlc/Makefile
index 2cbe7bc963b5..ddda41b4f8d9 100644
--- a/cad/atlc/Makefile
+++ b/cad/atlc/Makefile
@@ -12,6 +12,7 @@ MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:S/%SUBDIR%/atlc/}
DISTNAME= ${PORTNAME}-${PORTVERSION}
MAINTAINER= blackend@FreeBSD.org
+COMMENT= A tool to calculate the impedance of transmission lines
USE_REINPLACE= YES
GNU_CONFIGURE= YES
diff --git a/cad/atlc/pkg-comment b/cad/atlc/pkg-comment
deleted file mode 100644
index 835c6dfd3795..000000000000
--- a/cad/atlc/pkg-comment
+++ /dev/null
@@ -1 +0,0 @@
-A tool to calculate the impedance of transmission lines
diff --git a/cad/cascade/Makefile b/cad/cascade/Makefile
index 7e688f761044..a03d34bfa6a9 100644
--- a/cad/cascade/Makefile
+++ b/cad/cascade/Makefile
@@ -12,6 +12,7 @@ MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:S/%SUBDIR%/rfcascade/}
DISTNAME= ${PORTNAME}-${PORTVERSION}
MAINTAINER= blackend@FreeBSD.org
+COMMENT= A simple tool to analyze noise and distortion of a RF system
GNU_CONFIGURE= YES
diff --git a/cad/cascade/pkg-comment b/cad/cascade/pkg-comment
deleted file mode 100644
index aed730d8f1d7..000000000000
--- a/cad/cascade/pkg-comment
+++ /dev/null
@@ -1 +0,0 @@
-A simple tool to analyze noise and distortion of a RF system
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile
index c54e737371aa..da95c1926c41 100644
--- a/cad/iverilog/Makefile
+++ b/cad/iverilog/Makefile
@@ -13,6 +13,7 @@ MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION}/
DISTNAME= verilog-${PORTVERSION}
MAINTAINER= keichii@FreeBSD.org
+COMMENT= Icarus Verilog is a Verilog simulation and synthesis tool
GNU_CONFIGURE= yes
diff --git a/cad/iverilog/pkg-comment b/cad/iverilog/pkg-comment
deleted file mode 100644
index 55674ec9ee77..000000000000
--- a/cad/iverilog/pkg-comment
+++ /dev/null
@@ -1 +0,0 @@
-Icarus Verilog is a Verilog simulation and synthesis tool
diff --git a/cad/sceptre/Makefile b/cad/sceptre/Makefile
index 8b7c34a2d15b..ba649c86bfae 100644
--- a/cad/sceptre/Makefile
+++ b/cad/sceptre/Makefile
@@ -11,6 +11,7 @@ CATEGORIES= cad
MASTER_SITES= ftp://novilux.fh-friedberg.de/pub/sceptre/
MAINTAINER= grog@FreeBSD.org
+COMMENT= SCEPTRE is a general purpose circuit analysis program
BUILD_DEPENDS= f77:${PORTSDIR}/lang/f77
diff --git a/cad/sceptre/pkg-comment b/cad/sceptre/pkg-comment
deleted file mode 100644
index b53dcbb64563..000000000000
--- a/cad/sceptre/pkg-comment
+++ /dev/null
@@ -1 +0,0 @@
-SCEPTRE is a general purpose circuit analysis program
diff --git a/cad/vipec/Makefile b/cad/vipec/Makefile
index fdc46f75d6d7..8d465cbf0558 100644
--- a/cad/vipec/Makefile
+++ b/cad/vipec/Makefile
@@ -14,6 +14,7 @@ MASTER_SITE_SUBDIR= ${PORTNAME}
DISTNAME= ViPEC-${PORTVERSION}
MAINTAINER= kde@freebsd.org
+COMMENT= Analyze high frequency, linear electrical networks
BUILD_DEPENDS= tmake:${PORTSDIR}/devel/tmake
diff --git a/cad/vipec/pkg-comment b/cad/vipec/pkg-comment
deleted file mode 100644
index 45c1059afb52..000000000000
--- a/cad/vipec/pkg-comment
+++ /dev/null
@@ -1 +0,0 @@
-Analyze high frequency, linear electrical networks