| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Bump PORTREVISION for ports depending on the canonical version of GCC | Gerald Pfeifer | 2018-12-12 | 1 | -1/+1 |
| * | - Update to 20181005 snapshot | Li-Wen Hsu | 2018-10-05 | 6 | -16/+21 |
| * | Bump PORTREVISION for ports depending on the canonical version of GCC | Gerald Pfeifer | 2018-07-29 | 1 | -1/+1 |
| * | - Update to 20180103 snapshot | Li-Wen Hsu | 2018-01-07 | 2 | -5/+5 |
| * | Bump PORTREVISION for ports depending on the canonical version of GCC | Gerald Pfeifer | 2017-09-10 | 1 | -1/+1 |
| * | - Update to 20170809 snapshot | Li-Wen Hsu | 2017-08-11 | 5 | -17/+20 |
| * | Bump PORTREVISIONs for ports depending on the canonical version of GCC and | Gerald Pfeifer | 2017-04-01 | 1 | -1/+1 |
| * | - Makr only for amd64 | Li-Wen Hsu | 2017-02-08 | 1 | -0/+2 |
| * | Add RISC-V ISA Simulator: | Li-Wen Hsu | 2017-02-07 | 7 | -0/+145 |
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