blob: 12a4cc5a7155b7402216b79243a0add202c10d85 (
plain) (
blame)
1
2
3
|
The goals of the FreeHDL project are to develop a VHDL simulator that has
a graphical waveform viewer and a source level debugger. It also aims at
VHDL-93 compliancy. The project is at a very early development stage.
|
