mips: Remove sys/mips

Remove sys/mips as the next step of decomissioning mips from the tree.
Remove mips special cases from the kernel make files. Remove the mips
specific linker scripts.

Sponsored by:		Netflix

594 files changed, 4 insertions, 134562 deletions

diff --git a/sys/conf/Makefile.mips b/sys/conf/Makefile.mips
deleted file mode 100644
index e8dd61d10a1d..000000000000
--- a/sys/conf/Makefile.mips
+++ /dev/null
@@ -1,110 +0,0 @@
-# Makefile.mips
-# $FreeBSD$
-#
-# Makefile for FreeBSD
-#
-# This makefile is constructed from a machine description:
-#	config machineid
-# Most changes should be made in the machine description
-#	/sys/mips/conf/``machineid''
-# after which you should do
-#	 config machineid
-# Generic makefile changes should be made in
-#	/sys/conf/Makefile.mips
-# after which config should be rerun for all machines.
-#
-
-# Which version of config(8) is required.
-%VERSREQ=	600012
-
-STD8X16FONT?=	iso
-
-.if !defined(S)
-.if exists(./@/.)
-S=	./@
-.else
-S=	../../..
-.endif
-.endif
-.include "$S/conf/kern.pre.mk"
-
-INCLUDES+= -I$S/contrib/libfdt -I$S/contrib/device-tree/include
-
-LDSCRIPT_NAME?=ldscript.$M
-SYSTEM_LD:= ${SYSTEM_LD:$S/conf/${LDSCRIPT_NAME}=${LDSCRIPT_NAME}}
-SYSTEM_DEP:= ${SYSTEM_DEP:$S/conf/${LDSCRIPT_NAME}=${LDSCRIPT_NAME}}
-
-KERNLOADADDR?=0x80001000
-# This obscure value is defined by CFE for WR160N
-# To be changed later
-TRAMPLOADADDR?=0x807963c0
-
-# We default to the MIPS32 ISA for O32 and MIPS64 ISA for N64 and N32
-# if none is specified in the kernel configuration file.
-.if ${MACHINE_ARCH:Mmips64*} != "" || ${MACHINE_ARCH:Mmipsn32*} != ""
-ARCH_FLAGS?=-march=mips64
-.else
-ARCH_FLAGS?=-march=mips32
-.endif
-ARCH_FLAGS+=-mabi=${MIPS_ABI}
-EXTRA_FLAGS=-fno-pic -mno-abicalls -G0 -DKERNLOADADDR=${KERNLOADADDR}
-EXTRA_FLAGS+=-${MIPS_ENDIAN}
-
-# We add the -fno-pic flag to kernels because otherwise performance
-# is extremely poor, as well as -mno-abicalls to force no ABI usage.
-CFLAGS+=${EXTRA_FLAGS} $(ARCH_FLAGS)
-TRAMP_ARCH_FLAGS?=$(ARCH_FLAGS)
-TRAMP_EXTRA_FLAGS=${EXTRA_FLAGS} ${TRAMP_ARCH_FLAGS}
-# Kernel code is always compiled with soft-float on MIPS
-TRAMP_EXTRA_FLAGS+=-msoft-float
-# No standard library available
-TRAMP_EXTRA_FLAGS+=-ffreestanding
-.if ${MACHINE_ARCH:Mmips64*} != ""
-TRAMP_ELFSIZE=64
-.else
-TRAMP_ELFSIZE=32
-.endif
-
-ASM_CFLAGS+=${CFLAGS} -D_LOCORE -DLOCORE
-
-.if !defined(WITHOUT_KERNEL_TRAMPOLINE)
-KERNEL_EXTRA=trampoline
-KERNEL_EXTRA_INSTALL=${KERNEL_KO}.tramp.bin
-trampoline: ${KERNEL_KO}.tramp.bin
-${KERNEL_KO}.tramp.bin: ${KERNEL_KO} $S/$M/$M/elf_trampoline.c \
-	$S/$M/$M/inckern.S 
-	${OBJCOPY} --strip-symbol '$$d' --strip-symbol '$$a' \
-		-g --strip-symbol '$$t' ${FULLKERNEL} ${KERNEL_KO}.tmp
-	sed -e s/${KERNLOADADDR}/${TRAMPLOADADDR}/ -e s/" + SIZEOF_HEADERS"// \
-		 ${LDSCRIPT_NAME} > ${LDSCRIPT_NAME}.tramp.noheader
-	${CC} -O -nostdlib -I. -I$S ${TRAMP_EXTRA_FLAGS} ${TRAMP_LDFLAGS} -Xlinker \
-		-T -Xlinker ${LDSCRIPT_NAME}.tramp.noheader \
-		-DKERNNAME="\"${KERNEL_KO}.tmp\"" -DELFSIZE=${TRAMP_ELFSIZE} \
-		-fno-asynchronous-unwind-tables \
-		$S/$M/$M/inckern.S $S/$M/$M/elf_trampoline.c \
-		-o ${KERNEL_KO}.tramp.elf
-	${OBJCOPY} -S -O binary ${KERNEL_KO}.tramp.elf \
-		${KERNEL_KO}.tramp.bin
-.endif
-
-%BEFORE_DEPEND
-
-%OBJS
-
-%FILES.c
-
-%FILES.s
-
-%FILES.m
-
-%CLEAN
-
-CLEAN+=	${LDSCRIPT_NAME} ${LDSCRIPT_NAME}.tramp.noheader \
-	${KERNEL_KO}.tramp.elf ${KERNEL_KO}.tramp.bin
-
-${LDSCRIPT_NAME}: $S/conf/${LDSCRIPT_NAME}
-	sed s/KERNLOADADDR/${KERNLOADADDR}/g $S/conf/${LDSCRIPT_NAME} \
-		> ${LDSCRIPT_NAME}
-%RULES
-
-.include "$S/conf/kern.post.mk"
diff --git a/sys/conf/config.mk b/sys/conf/config.mk
index fb0545daaf75..96b03da27980 100644
--- a/sys/conf/config.mk
+++ b/sys/conf/config.mk
@@ -10,11 +10,9 @@
 .if !defined(KERNBUILDDIR)
 opt_global.h:
 	touch ${.TARGET}
-.if ${MACHINE} != "mips"
 	@echo "#define SMP 1" >> ${.TARGET}
 	@echo "#define MAC 1" >> ${.TARGET}
 	@echo "#define VIMAGE 1" >> ${.TARGET}
-.endif
 .if ${MK_BHYVE_SNAPSHOT} != "no"
 opt_bhyve_snapshot.h:
 	@echo "#define BHYVE_SNAPSHOT 1" > ${.TARGET}
diff --git a/sys/conf/files.mips b/sys/conf/files.mips
deleted file mode 100644
index 777d4af57c06..000000000000
--- a/sys/conf/files.mips
+++ /dev/null
@@ -1,114 +0,0 @@
-# This file tells config what files go into building a kernel,
-# files marked standard are always included.
-#
-# $FreeBSD$
-#
-
-# Arch dependent files
-mips/mips/autoconf.c			standard
-mips/mips/bus_space_generic.c		standard
-mips/mips/busdma_machdep.c		standard
-mips/mips/cache.c			standard
-mips/mips/cache_mipsNN.c		standard
-mips/mips/cpu.c				standard
-mips/mips/db_disasm.c			optional	ddb
-mips/mips/db_interface.c		optional	ddb
-mips/mips/db_trace.c			optional	ddb
-mips/mips/dump_machdep.c		standard
-mips/mips/elf_machdep.c			standard
-mips/mips/exception.S			standard
-mips/mips/fp.S				standard
-mips/mips/freebsd32_machdep.c		optional	compat_freebsd32
-mips/mips/gdb_machdep.c			standard
-mips/mips/libkern_machdep.c		standard
-mips/mips/locore.S			standard	no-obj
-mips/mips/machdep.c			standard
-mips/mips/mem.c				optional	mem
-mips/mips/minidump_machdep.c		standard
-mips/mips/mp_machdep.c			optional	smp
-mips/mips/mpboot.S			optional	smp
-mips/mips/nexus.c			standard
-mips/mips/ofw_machdep.c			optional	fdt
-mips/mips/pm_machdep.c			standard
-mips/mips/pmap.c			standard
-mips/mips/ptrace_machdep.c		standard
-mips/mips/sc_machdep.c			standard
-mips/mips/stack_machdep.c		optional	ddb | stack
-mips/mips/stdatomic.c			standard \
-	compile-with "${NORMAL_C:N-Wmissing-prototypes}"
-mips/mips/support.S			standard
-mips/mips/bcopy.S			standard
-mips/mips/swtch.S			standard
-mips/mips/sys_machdep.c			standard
-mips/mips/tlb.c				standard
-mips/mips/trap.c			standard
-mips/mips/uio_machdep.c			standard
-mips/mips/uma_machdep.c			standard
-mips/mips/vm_machdep.c			standard
-
-# misc opt-in bits
-kern/link_elf_obj.c			standard
-kern/subr_atomic64.c			optional	mips | mipsel | mipshf | mipselhf
-kern/subr_busdma_bufalloc.c		standard
-kern/subr_dummy_vdso_tc.c		standard
-kern/subr_sfbuf.c			optional	mips | mipsel | mipsn32
-kern/subr_sfbuf.c			optional	mipshf | mipselhf
-
-# gcc/clang runtime
-libkern/ffsl.c				standard
-libkern/ffsll.c				standard
-libkern/fls.c				standard
-libkern/flsl.c				standard
-libkern/flsll.c				standard
-libkern/cmpdi2.c			optional	mips | mipshf | mipsel | mipselhf
-libkern/ucmpdi2.c			optional	mips | mipshf | mipsel | mipselhf
-libkern/ashldi3.c			standard
-libkern/ashrdi3.c			standard
-libkern/memcmp.c			standard
-libkern/strlen.c			standard
-
-# cfe support
-dev/cfe/cfe_api.c			optional	cfe
-dev/cfe/cfe_console.c			optional	cfe_console
-dev/cfe/cfe_env.c			optional	cfe_env
-
-# syscons support
-dev/fb/fb.c				optional	sc
-dev/syscons/scgfbrndr.c			optional	sc
-mips/mips/sc_machdep.c			optional	sc
-
-# FDT support
-dev/uart/uart_cpu_fdt.c			optional	uart fdt
-
-# crypto support -- use generic
-crypto/des/des_enc.c			optional	netsmb
-
-# AP common nvram interface MIPS specific, but maybe should be more generic
-dev/nvram2env/nvram2env_mips.c		optional	nvram2env
-dev/nvram2env/nvram2env.c		optional	nvram2env
-
-# hwpmc support
-dev/hwpmc/hwpmc_beri.c			optional	hwpmc_beri
-dev/hwpmc/hwpmc_mips.c			optional	hwpmc_mips24k | \
-	hwpmc_mips74k
-dev/hwpmc/hwpmc_mips24k.c		optional	hwpmc_mips24k
-dev/hwpmc/hwpmc_mips74k.c		optional	hwpmc_mips74k
-
-# ofw support
-dev/ofw/ofw_pcib.c			optional	fdt pci
-
-# INTRNG support code
-kern/msi_if.m				optional	intrng
-kern/pic_if.m				optional	intrng
-kern/subr_intr.c			optional	intrng
-# INTRNG compatible MIPS32 interrupt controller
-mips/mips/mips_pic.c			optional	intrng
-
-# DTrace
-cddl/compat/opensolaris/kern/opensolaris_atomic.c	optional zfs | dtrace compile-with "${CDDL_C}"
-cddl/dev/dtrace/mips/dtrace_asm.S			optional dtrace compile-with "${DTRACE_S}"
-cddl/dev/dtrace/mips/dtrace_subr.c			optional dtrace compile-with "${DTRACE_C}"
-cddl/dev/fbt/mips/fbt_isa.c				optional dtrace_fbt | dtraceall compile-with "${FBT_C}"
-
-# Zstd
-contrib/zstd/lib/freebsd/zstd_kfreebsd.c		optional zstdio compile-with ${ZSTD_C}
diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk
index 859719db0083..3d71f9e2b5e2 100644
--- a/sys/conf/kern.mk
+++ b/sys/conf/kern.mk
@@ -193,14 +193,6 @@ CFLAGS+=	-mabi=elfv2
 .endif
 
 #
-# For MIPS we also tell gcc to use floating point emulation
-#
-.if ${MACHINE_CPUARCH} == "mips"
-CFLAGS+=	-msoft-float
-INLINE_LIMIT?=	8000
-.endif
-
-#
 # GCC 3.0 and above like to do certain optimizations based on the
 # assumption that the program is linked against libc.  Stop this.
 #
@@ -307,16 +299,6 @@ LD_EMULATION_arm=armelf_fbsd
 LD_EMULATION_armv6=armelf_fbsd
 LD_EMULATION_armv7=armelf_fbsd
 LD_EMULATION_i386=elf_i386_fbsd
-LD_EMULATION_mips= elf32btsmip_fbsd
-LD_EMULATION_mipshf= elf32btsmip_fbsd
-LD_EMULATION_mips64= elf64btsmip_fbsd
-LD_EMULATION_mips64hf= elf64btsmip_fbsd
-LD_EMULATION_mipsel= elf32ltsmip_fbsd
-LD_EMULATION_mipselhf= elf32ltsmip_fbsd
-LD_EMULATION_mips64el= elf64ltsmip_fbsd
-LD_EMULATION_mips64elhf= elf64ltsmip_fbsd
-LD_EMULATION_mipsn32= elf32btsmipn32_fbsd
-LD_EMULATION_mipsn32el= elf32btsmipn32_fbsd   # I don't think this is a thing that works
 LD_EMULATION_powerpc= elf32ppc_fbsd
 LD_EMULATION_powerpcspe= elf32ppc_fbsd
 LD_EMULATION_powerpc64= elf64ppc_fbsd
diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk
index 7361cdd70076..20c6b4153d11 100644
--- a/sys/conf/kern.opts.mk
+++ b/sys/conf/kern.opts.mk
@@ -79,10 +79,6 @@ BROKEN_OPTIONS+= CDDL ZFS
 . endif
 .endif
 
-.if ${MACHINE_CPUARCH} == "mips"
-BROKEN_OPTIONS+= CDDL ZFS SSP
-.endif
-
 .if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} == "powerpc"
 BROKEN_OPTIONS+= ZFS
 .endif
@@ -98,8 +94,8 @@ BROKEN_OPTIONS+= OFED
 BROKEN_OPTIONS+= KERNEL_RETPOLINE
 .endif
 
-# EFI doesn't exist on mips, powerpc, or riscv.
-.if ${MACHINE:Mmips} || ${MACHINE:Mpowerpc} || ${MACHINE:Mriscv}
+# EFI doesn't exist on powerpc, or riscv
+.if ${MACHINE:Mpowerpc} || ${MACHINE:Mriscv}
 BROKEN_OPTIONS+=EFI
 .endif
 
diff --git a/sys/conf/kern.pre.mk b/sys/conf/kern.pre.mk
index 0daf5a54938b..ac0580927ef8 100644
--- a/sys/conf/kern.pre.mk
+++ b/sys/conf/kern.pre.mk
@@ -74,9 +74,6 @@ CFLAGS=	${COPTFLAGS} ${DEBUG}
 CFLAGS+= ${INCLUDES} -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h
 CFLAGS_PARAM_INLINE_UNIT_GROWTH?=100
 CFLAGS_PARAM_LARGE_FUNCTION_GROWTH?=1000
-.if ${MACHINE_CPUARCH} == "mips"
-CFLAGS_ARCH_PARAMS?=--param max-inline-insns-single=1000 -DMACHINE_ARCH='"${MACHINE_ARCH}"'
-.endif
 CFLAGS.gcc+= -fms-extensions -finline-limit=${INLINE_LIMIT}
 CFLAGS.gcc+= --param inline-unit-growth=${CFLAGS_PARAM_INLINE_UNIT_GROWTH}
 CFLAGS.gcc+= --param large-function-growth=${CFLAGS_PARAM_LARGE_FUNCTION_GROWTH}
diff --git a/sys/conf/kmod.mk b/sys/conf/kmod.mk
index c0ad352bf625..ee6aaa8aba0b 100644
--- a/sys/conf/kmod.mk
+++ b/sys/conf/kmod.mk
@@ -80,8 +80,8 @@ OBJCOPY?=	objcopy
 
 .SUFFIXES: .out .o .c .cc .cxx .C .y .l .s .S .m
 
-# amd64 and mips use direct linking for kmod, all others use shared binaries
-.if ${MACHINE_CPUARCH} != amd64 && ${MACHINE_CPUARCH} != mips
+# amd64 uses direct linking for kmod, all others use shared binaries
+.if ${MACHINE_CPUARCH} != amd64
 __KLD_SHARED=yes
 .else
 __KLD_SHARED=no
@@ -173,10 +173,6 @@ LDFLAGS+=	--no-toc-optimize
 .endif
 .endif
 
-.if ${MACHINE_CPUARCH} == mips
-CFLAGS+=	-G0 -fno-pic -mno-abicalls -mlong-calls
-.endif
-
 .if defined(DEBUG) || defined(DEBUG_FLAGS)
 CTFFLAGS+=	-g
 .endif
diff --git a/sys/conf/ldscript.mips b/sys/conf/ldscript.mips
deleted file mode 100644
index 5fb902c601d6..000000000000
--- a/sys/conf/ldscript.mips
+++ /dev/null
@@ -1,300 +0,0 @@
-/*-
- * Copyright (c) 2001, 2004, 2008, Juniper Networks, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the Juniper Networks, Inc. nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: ldscript.mips,v 1.3 2006/10/11 06:12:04
- * $FreeBSD$
- */
-
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SEARCH_DIR(/usr/lib);
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = KERNLOADADDR + SIZEOF_HEADERS;
-  .text      :
-  {
-    *(.trap)
-    *(.text)
-    *(.text.*)
-    *(.stub)
-    /* .gnu.warning sections are handled specially by elf32.em.  */
-    *(.gnu.warning)
-    *(.gnu.linkonce.t.*)
-  } =0x1000000
-  .fini      :
-  {
-    KEEP (*(.fini))
-  } =0x1000000
-  PROVIDE (__etext = .);
-  PROVIDE (_etext = .);
-  PROVIDE (etext = .);
-  .rodata   : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) }
-  .rodata1   : { *(.rodata1) }
-  .interp     : { *(.interp) 	}
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .gnu.version   : { *(.gnu.version)	}
-  .gnu.version_d   : { *(.gnu.version_d)	}
-  .gnu.version_r   : { *(.gnu.version_r)	}
-  .note.gnu.build-id : {
-    PROVIDE (__build_id_start = .);
-    *(.note.gnu.build-id)
-    PROVIDE (__build_id_end = .);
-  }
-  .rel.init      : { *(.rel.init)	}
-  .rela.init     : { *(.rela.init)	}
-  .rel.text      :
-    {
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-  .rel.fini      : { *(.rel.fini)	}
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-  .rel.plt       : { *(.rel.plt)		}
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-  . = ALIGN(0x2000) + (. & (0x2000 - 1));
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-  .eh_frame : { KEEP (*(.eh_frame)) }
-  .gcc_except_table : { *(.gcc_except_table) }
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-       the constructors, so we make sure it is
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-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
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-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
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-    *(.sbss)
-    *(.sbss.*)
-    *(.gnu.linkonce.sb.*)
-    *(.scommon)
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-  .bss       :
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-  .comment 0 : { *(.comment) }
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-     of the section so we begin them at 0.  */
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-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
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-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
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diff --git a/sys/conf/ldscript.mips.cfe b/sys/conf/ldscript.mips.cfe
deleted file mode 100644
index 48ed30ca68cc..000000000000
--- a/sys/conf/ldscript.mips.cfe
+++ /dev/null
@@ -1,317 +0,0 @@
-/*-
- * Copyright (c) 2001, 2004, 2008, Juniper Networks, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the Juniper Networks, Inc. nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: ldscript.mips,v 1.3 2006/10/11 06:12:04
- * $FreeBSD$
- */
-
-/*
- * This linker script is needed to build a kernel for use by Broadcom CFE
- * when loaded over TFTP; its ELF loader does not support backwards seek
- * on network I/O streams.
- * Furthermore, CFE will only load PT_LOAD segments, therefore the dynamic
- * sections must be placed in their own segment.
- */
-
-ENTRY(_start)
-SEARCH_DIR(/usr/lib);
-
-PHDRS
-{
- headers PT_PHDR FILEHDR PHDRS ;
- interp PT_INTERP ;
- text PT_LOAD ;
- dynamic PT_LOAD ;
- data PT_LOAD ;
-}
-
-SECTIONS
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-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
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-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
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-  .debug          0 : { *(.debug) }
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-  /* GNU DWARF 1 extensions */
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-  /* These must appear regardless of  .  */
-}
diff --git a/sys/conf/ldscript.mips.mips64 b/sys/conf/ldscript.mips.mips64
deleted file mode 100644
index fcb03a74933b..000000000000
--- a/sys/conf/ldscript.mips.mips64
+++ /dev/null
@@ -1,301 +0,0 @@
-/*-
- * Copyright (c) 2001, 2004, 2008, Juniper Networks, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the Juniper Networks, Inc. nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: ldscript.mips,v 1.3 2006/10/11 06:12:04
- * $FreeBSD$
- */
-
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SEARCH_DIR(/usr/lib);
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = KERNLOADADDR + SIZEOF_HEADERS;
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-    KEEP (*crtbegin.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-  }
-   .dtors         :
-  {
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-  }
-  .plt      : { *(.plt)	}
-  _gp = ALIGN(16) + 0x7ff0;
-  .got		  : { *(.got.plt) *(.got) }
-  .dynamic       : { *(.dynamic) }
-  /* We want the small data sections together, so single-instruction offsets
-     can access them all, and initialized data all before uninitialized, so
-     we can shorten the on-disk segment size.  */
-  .sdata     : 
-  {
-    *(.sdata) 
-    *(.sdata.*)
-    *(.gnu.linkonce.s.*)
-  }
-  _edata = .;
-  PROVIDE (edata = .);
-  __bss_start = .;
-  .sbss      :
-  {
-    PROVIDE (__sbss_start = .);
-    PROVIDE (___sbss_start = .);
-    *(.dynsbss)
-    *(.sbss)
-    *(.sbss.*)
-    *(.gnu.linkonce.sb.*)
-    *(.scommon)
-    PROVIDE (__sbss_end = .);
-    PROVIDE (___sbss_end = .);
-  }
-  .bss       :
-  {
-   *(.dynbss)
-   *(.bss)
-   *(.bss.*)
-   *(.gnu.linkonce.b.*)
-   *(COMMON)
-   /* Align here to ensure that the .bss section occupies space up to
-      _end.  Align after .bss to ensure correct alignment even if the
-      .bss section disappears because there are no input sections.  */
-   . = ALIGN(64 / 8);
-  }
-  . = ALIGN(64 / 8);
-  _end = .;
-  PROVIDE (end = .);
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment 0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-  /* These must appear regardless of  .  */
-}
diff --git a/sys/conf/ldscript.mips.octeon1 b/sys/conf/ldscript.mips.octeon1
deleted file mode 100644
index 598afc2da5b0..000000000000
--- a/sys/conf/ldscript.mips.octeon1
+++ /dev/null
@@ -1,66 +0,0 @@
-/* $FreeBSD$ */
-
-ENTRY(_start)
-
-PHDRS {
-	text PT_LOAD FLAGS(0x7);
-}
-
-SECTIONS {
-	. = KERNLOADADDR + SIZEOF_HEADERS;
-
-	.text : {
-		*(.text)
-		etext = .;
-		_etext = .;
-		. = ALIGN(0x2000);
-	} : text
-
-	. = ALIGN(0x2000);
-	.rodata : {
-		_fdata = .;
-	    	*(.rodata)
-		. = ALIGN(32);
-	}
-
-	.note.gnu.build-id : {
-		PROVIDE (__build_id_start = .);
-		*(.note.gnu.build-id)
-		PROVIDE (__build_id_end = .);
-	}
-	
-	.data : {
-                _rwdata = .;
-	    	*(.data)
-		. = ALIGN(32);
-	}
-	.plt : { *(.plt) }
-	_gp = ALIGN(16) + 0x7ff0;
-	.got : { *(.got.plt) *(.got) }
-	.dynamic : { *(.dynamic) }
-
-	.sdata : {
-                _small_start = .;
-		*(.sdata)
-		. = ALIGN(32);
-		edata = .;
-		_edata = .;
-	} : text
-
-	.sbss : {
-		__bss_start = .;
-		_fbss = .;
-		*(.sbss) *(.scommon)
-                _small_end = .;
-		. = ALIGN(32);
-	}
-
-	.bss : {
-		*(.bss)
-		*(COMMON)
-		. = ALIGN(32);
-		_end = .;
-		end = .;
-	}
-
-}
diff --git a/sys/mips/atheros/apb.c b/sys/mips/atheros/apb.c
deleted file mode 100644
index 47dd77de18d7..000000000000
--- a/sys/mips/atheros/apb.c
+++ /dev/null
@@ -1,537 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/pmc.h>
-#include <sys/pmckern.h>
-
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-
-#include <mips/atheros/apbvar.h>
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_setup.h>
-
-#define	APB_INTR_PMC	5
-
-#undef APB_DEBUG
-#ifdef APB_DEBUG
-#define dprintf printf
-#else 
-#define dprintf(x, arg...)
-#endif  /* APB_DEBUG */
-
-#define	DEVTOAPB(dev)	((struct apb_ivar *) device_get_ivars(dev))
-
-static int	apb_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	apb_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		apb_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	apb_attach(device_t);
-static int	apb_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		apb_get_resource_list(device_t, device_t);
-static void	apb_hinted_child(device_t, const char *, int);
-static int	apb_filter(void *);
-static int	apb_probe(device_t);
-static int	apb_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	apb_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	apb_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-
-static void 
-apb_mask_irq(void *source)
-{
-	unsigned int irq = (unsigned int)source;
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK);
-	ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg & ~(1 << irq));
-
-}
-
-static void 
-apb_unmask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK);
-	ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg | (1 << irq));
-}
-
-static int
-apb_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-apb_attach(device_t dev)
-{
-	struct apb_softc *sc = device_get_softc(dev);
-	int rid = 0;
-
-	device_set_desc(dev, "APB Bus bridge");
-
-	sc->apb_mem_rman.rm_type = RMAN_ARRAY;
-	sc->apb_mem_rman.rm_descr = "APB memory window";
-
-	if (rman_init(&sc->apb_mem_rman) != 0 ||
-	    rman_manage_region(&sc->apb_mem_rman, 
-			AR71XX_APB_BASE, 
-			AR71XX_APB_BASE + AR71XX_APB_SIZE - 1) != 0)
-		panic("apb_attach: failed to set up memory rman");
-
-	sc->apb_irq_rman.rm_type = RMAN_ARRAY;
-	sc->apb_irq_rman.rm_descr = "APB IRQ";
-
-	if (rman_init(&sc->apb_irq_rman) != 0 ||
-	    rman_manage_region(&sc->apb_irq_rman, 
-			APB_IRQ_BASE, APB_IRQ_END) != 0)
-		panic("apb_attach: failed to set up IRQ rman");
-
-	if ((sc->sc_misc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_misc_irq, INTR_TYPE_MISC, 
-	    apb_filter, NULL, sc, &sc->sc_misc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	/*
-	 * Unmask performance counter IRQ
-	 */
-	apb_unmask_irq((void*)APB_INTR_PMC);
-	sc->sc_intr_counter[APB_INTR_PMC] = mips_intrcnt_create("apb irq5: pmc");
-
-	return (0);
-}
-
-static struct resource *
-apb_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct apb_softc		*sc = device_get_softc(bus);
-	struct apb_ivar			*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end));
-	needactivate = flags & RF_ACTIVE;
-	/*
-	 * Pass memory requests to nexus device
-	 */
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	dprintf("%s: entry (%p, %p, %d, %d, %p, %p, %jd, %d)\n",
-	    __func__, bus, child, type, *rid, (void *)(intptr_t)start,
-	    (void *)(intptr_t)end, count, flags);
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL) {
-			return (NULL);
-		}
-
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-
-		dprintf("%s: default resource (%p, %p, %ld)\n",
-		    __func__, (void *)(intptr_t)start,
-		    (void *)(intptr_t)end, count);
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->apb_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->apb_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource\n", __func__);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-apb_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-apb_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-apb_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = apb_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-apb_setup_intr(device_t bus, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct apb_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-
-	if (irq > APB_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    apb_mask_irq, apb_unmask_irq,
-		    NULL, NULL,
-		    "apb intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irq] = event;
-			sc->sc_intr_counter[irq] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return (error);
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-	mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
-
-	apb_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-apb_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct apb_softc *sc = device_get_softc(dev);
-	int irq, result;
-
-	irq = rman_get_start(ires);
-	if (irq > APB_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	apb_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-}
-
-static int
-apb_filter(void *arg)
-{
-	struct apb_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq;
-	struct thread *td;
-	struct trapframe *tf;
-
-	reg = ATH_READ_REG(AR71XX_MISC_INTR_STATUS);
-	for (irq = 0; irq < APB_NIRQS; irq++) {
-		if (reg & (1 << irq)) {
-			switch (ar71xx_soc) {
-			case AR71XX_SOC_AR7240:
-			case AR71XX_SOC_AR7241:
-			case AR71XX_SOC_AR7242:
-			case AR71XX_SOC_AR9330:
-			case AR71XX_SOC_AR9331:
-			case AR71XX_SOC_AR9341:
-			case AR71XX_SOC_AR9342:
-			case AR71XX_SOC_AR9344:
-			case AR71XX_SOC_QCA9533:
-			case AR71XX_SOC_QCA9533_V2:
-			case AR71XX_SOC_QCA9556:
-			case AR71XX_SOC_QCA9558:
-				/* ACK/clear the given interrupt */
-				ATH_WRITE_REG(AR71XX_MISC_INTR_STATUS,
-				    (1 << irq));
-				break;
-			default:
-				/* fallthrough */
-				break;
-			}
-
-			event = sc->sc_eventstab[irq];
-			/* always count interrupts; spurious or otherwise */
-			mips_intrcnt_inc(sc->sc_intr_counter[irq]);
-			if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-				if (irq == APB_INTR_PMC) {
-					td = PCPU_GET(curthread);
-					tf = td->td_intr_frame;
-
-					if (pmc_intr)
-						(*pmc_intr)(tf);
-					continue;
-				}
-				/* Ignore timer interrupts */
-				if (irq != 0 && irq != 8 && irq != 9 && irq != 10)
-					printf("Stray APB IRQ %d\n", irq);
-				continue;
-			}
-
-			intr_event_handle(event, PCPU_GET(curthread)->td_intr_frame);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-apb_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t		child;
-	long			maddr;
-	int			msize;
-	int			irq;
-	int			result;
-	int			mem_hints_count;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	mem_hints_count = 0;
-	if (resource_long_value(dname, dunit, "maddr", &maddr) == 0)
-		mem_hints_count++;
-	if (resource_int_value(dname, dunit, "msize", &msize) == 0)
-		mem_hints_count++;
-
-	/* check if all info for mem resource has been provided */
-	if ((mem_hints_count > 0) && (mem_hints_count < 2)) {
-		printf("Either maddr or msize hint is missing for %s%d\n",
-		    dname, dunit);
-	} else if (mem_hints_count) {
-		result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-		    maddr, msize);
-		if (result != 0)
-			device_printf(bus, 
-			    "warning: bus_set_resource() failed\n");
-	}
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static device_t
-apb_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct apb_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct apb_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-apb_get_resource_list(device_t dev, device_t child)
-{
-	struct apb_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-static int
-apb_print_all_resources(device_t dev)
-{
-	struct apb_ivar *ndev = DEVTOAPB(dev);
-	struct resource_list *rl = &ndev->resources;
-	int retval = 0;
-
-	if (STAILQ_FIRST(rl))
-		retval += printf(" at");
-
-	retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
-	retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
-
-	return (retval);
-}
-
-static int
-apb_print_child(device_t bus, device_t child)
-{
-	int retval = 0;
-
-	retval += bus_print_child_header(bus, child);
-	retval += apb_print_all_resources(child);
-	if (device_get_flags(child))
-		retval += printf(" flags %#x", device_get_flags(child));
-	retval += printf(" on %s\n", device_get_nameunit(bus));
-
-	return (retval);
-}
-
-static device_method_t apb_methods[] = {
-	DEVMETHOD(bus_activate_resource,	apb_activate_resource),
-	DEVMETHOD(bus_add_child,		apb_add_child),
-	DEVMETHOD(bus_alloc_resource,		apb_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	apb_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	apb_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		apb_hinted_child),
-	DEVMETHOD(bus_release_resource,		apb_release_resource),
-	DEVMETHOD(bus_setup_intr,		apb_setup_intr),
-	DEVMETHOD(bus_teardown_intr,		apb_teardown_intr),
-	DEVMETHOD(device_attach,		apb_attach),
-	DEVMETHOD(device_probe,			apb_probe),
-	DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-	DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-	DEVMETHOD(bus_print_child,		apb_print_child),
-
-	DEVMETHOD_END
-};
-
-static driver_t apb_driver = {
-	"apb",
-	apb_methods,
-	sizeof(struct apb_softc),
-};
-static devclass_t apb_devclass;
-
-DRIVER_MODULE(apb, nexus, apb_driver, apb_devclass, 0, 0);
diff --git a/sys/mips/atheros/apbvar.h b/sys/mips/atheros/apbvar.h
deleted file mode 100644
index 5d7a1c5ad02d..000000000000
--- a/sys/mips/atheros/apbvar.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _APBVAR_H_
-#define _APBVAR_H_
-
-#define	APB_IRQ_BASE		0
-#define	APB_IRQ_END		31
-#define	APB_NIRQS		32
-
-struct apb_softc {
-	struct rman		apb_irq_rman;
-	struct rman		apb_mem_rman;
-	/* IRQ events structs for child devices */
-	struct intr_event	*sc_eventstab[APB_NIRQS];
-	mips_intrcnt_t		sc_intr_counter[APB_NIRQS];
-	/* Resources and cookies for MIPS CPU INTs */
-	struct resource		*sc_misc_irq;
-	void			*sc_misc_ih;
-};
-
-struct apb_ivar {
-	struct resource_list	resources;
-};
-
-#endif /* _APBVAR_H_ */
diff --git a/sys/mips/atheros/ar531x/apb.c b/sys/mips/atheros/ar531x/apb.c
deleted file mode 100644
index f81f63d18c04..000000000000
--- a/sys/mips/atheros/ar531x/apb.c
+++ /dev/null
@@ -1,753 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include "opt_platform.h"
-#include "opt_ar531x.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/pmc.h>
-#include <sys/pmckern.h>
-
-#include <machine/bus.h>
-#ifdef INTRNG
-#include <machine/intr.h>
-#else
-#include <machine/intr_machdep.h>
-#endif
-
-#ifdef INTRNG
-#include "pic_if.h"
-
-#define PIC_INTR_ISRC(sc, irq)	(&(sc)->pic_irqs[(irq)].isrc)
-#endif
-
-#include <mips/atheros/ar531x/apbvar.h>
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5312reg.h>
-#include <mips/atheros/ar531x/ar5315_setup.h>
-
-#ifdef AR531X_APB_DEBUG
-#define dprintf printf
-#else 
-#define dprintf(x, arg...)
-#endif  /* AR531X_APB_DEBUG */
-
-static int	apb_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static device_t	apb_add_child(device_t, u_int, const char *, int);
-static struct resource *
-		apb_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static int	apb_attach(device_t);
-static int	apb_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static struct resource_list *
-		apb_get_resource_list(device_t, device_t);
-static void	apb_hinted_child(device_t, const char *, int);
-static int	apb_filter(void *);
-static int	apb_probe(device_t);
-static int	apb_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-#ifndef INTRNG
-static int	apb_setup_intr(device_t, device_t, struct resource *, int,
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int	apb_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-#endif
-
-static void 
-apb_mask_irq(void *source)
-{
-	unsigned int irq = (unsigned int)source;
-	uint32_t reg;
-
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		reg = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTMASK);
-		ATH_WRITE_REG(AR5315_SYSREG_BASE
-			+ AR5315_SYSREG_MISC_INTMASK, reg & ~(1 << irq));
-	} else {
-		reg = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTMASK);
-		ATH_WRITE_REG(AR5312_SYSREG_BASE
-			+ AR5312_SYSREG_MISC_INTMASK, reg & ~(1 << irq));
-	}
-}
-
-static void 
-apb_unmask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		reg = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTMASK);
-		ATH_WRITE_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTMASK, reg | (1 << irq));
-	} else {
-		reg = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTMASK);
-		ATH_WRITE_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTMASK, reg | (1 << irq));
-	}
-}
-
-#ifdef INTRNG
-static int
-apb_pic_register_isrcs(struct apb_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->apb_dev);
-	for (irq = 0; irq < APB_NIRQS; irq++) {
-		sc->pic_irqs[irq].irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->apb_dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->apb_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static inline intptr_t
-pic_xref(device_t dev)
-{
-        return (0);
-}
-#endif
-
-static int
-apb_probe(device_t dev)
-{
-#ifdef INTRNG
-	device_set_desc(dev, "APB Bus bridge INTRNG");
-#else
-	device_set_desc(dev, "APB Bus bridge");
-#endif
-
-	return (0);
-}
-
-static int
-apb_attach(device_t dev)
-{
-	struct apb_softc *sc = device_get_softc(dev);
-#ifdef INTRNG
-	intptr_t xref = pic_xref(dev);
-	int miscirq;
-#else
-	int rid = 0;
-#endif
-
-	sc->apb_dev = dev;
-
-	sc->apb_mem_rman.rm_type = RMAN_ARRAY;
-	sc->apb_mem_rman.rm_descr = "APB memory window";
-
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		if (rman_init(&sc->apb_mem_rman) != 0 ||
-		    rman_manage_region(&sc->apb_mem_rman, 
-			AR5315_APB_BASE, 
-			AR5315_APB_BASE + AR5315_APB_SIZE - 1) != 0)
-			panic("apb_attach: failed to set up memory rman");
-	} else {
-		if (rman_init(&sc->apb_mem_rman) != 0 ||
-		    rman_manage_region(&sc->apb_mem_rman, 
-			AR5312_APB_BASE, 
-			AR5312_APB_BASE + AR5312_APB_SIZE - 1) != 0)
-			panic("apb_attach: failed to set up memory rman");
-	}
-
-	sc->apb_irq_rman.rm_type = RMAN_ARRAY;
-	sc->apb_irq_rman.rm_descr = "APB IRQ";
-
-	if (rman_init(&sc->apb_irq_rman) != 0 ||
-	    rman_manage_region(&sc->apb_irq_rman, 
-			APB_IRQ_BASE, APB_IRQ_END) != 0)
-		panic("apb_attach: failed to set up IRQ rman");
-
-#ifndef INTRNG
-	if ((sc->sc_misc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_misc_irq, INTR_TYPE_MISC, 
-	    apb_filter, NULL, sc, &sc->sc_misc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-#else
-	/* Register the interrupts */
-	if (apb_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		return (ENXIO);
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		return (ENXIO);
-	}
-
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		miscirq = AR5315_CPU_IRQ_MISC;
-	} else {
-		miscirq = AR5312_IRQ_MISC;
-	}
-	cpu_establish_hardintr("aric", apb_filter, NULL, sc, miscirq,
-	    INTR_TYPE_MISC, NULL);
-#endif
-
-	/* mask all misc interrupt */
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		ATH_WRITE_REG(AR5315_SYSREG_BASE
-			+ AR5315_SYSREG_MISC_INTMASK, 0);
-	} else {
-		ATH_WRITE_REG(AR5312_SYSREG_BASE
-			+ AR5312_SYSREG_MISC_INTMASK, 0);
-	}
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-apb_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct apb_softc		*sc = device_get_softc(bus);
-	struct apb_ivar			*ivar = device_get_ivars(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end));
-	needactivate = flags & RF_ACTIVE;
-	/*
-	 * Pass memory requests to nexus device
-	 */
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	dprintf("%s: entry (%p, %p, %d, %d, %p, %p, %jd, %d)\n",
-	    __func__, bus, child, type, *rid, (void *)(intptr_t)start,
-	    (void *)(intptr_t)end, count, flags);
-
-	if (passthrough)
-		return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
-		    rid, start, end, count, flags));
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-
-	if (isdefault) {
-		rle = resource_list_find(&ivar->resources, type, *rid);
-		if (rle == NULL) {
-			return (NULL);
-		}
-
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-
-		dprintf("%s: default resource (%p, %p, %jd)\n",
-		    __func__, (void *)(intptr_t)start,
-		    (void *)(intptr_t)end, count);
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->apb_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->apb_mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource %d\n", __func__, type);
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-apb_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-apb_deactivate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-
-	/* XXX: should we mask/unmask IRQ here? */
-	return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child,
-		type, rid, r));
-}
-
-static int
-apb_release_resource(device_t dev, device_t child, int type,
-    int rid, struct resource *r)
-{
-	struct resource_list *rl;
-	struct resource_list_entry *rle;
-
-	rl = apb_get_resource_list(dev, child);
-	if (rl == NULL)
-		return (EINVAL);
-	rle = resource_list_find(rl, type, rid);
-	if (rle == NULL)
-		return (EINVAL);
-	rman_release_resource(r);
-	rle->res = NULL;
-
-	return (0);
-}
-
-static int
-apb_setup_intr(device_t bus, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct apb_softc *sc = device_get_softc(bus);
-	int error;
-	int irq;
-#ifndef INTRNG
-	struct intr_event *event;
-#endif
-
-#ifdef INTRNG
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	if ((rman_get_flags(ires) & RF_SHAREABLE) == 0)
-		flags |= INTR_EXCL;
-
-	irq = rman_get_start(ires);
-	isrc = PIC_INTR_ISRC(sc, irq);
-	if(isrc->isrc_event == 0) {
-		error = intr_event_create(&isrc->isrc_event, (void *)irq,
-		    0, irq, apb_mask_irq, apb_unmask_irq,
-		    NULL, NULL, "apb intr%d:", irq);
-		if(error != 0)
-			return(error);
-	}
-	name = device_get_nameunit(child);
-	error = intr_event_add_handler(isrc->isrc_event, name, filt, handler,
-            arg, intr_priority(flags), flags, cookiep);
-	return(error);
-#else
-	irq = rman_get_start(ires);
-
-	if (irq > APB_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    apb_mask_irq, apb_unmask_irq,
-		    NULL, NULL,
-		    "apb intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irq] = event;
-			sc->sc_intr_counter[irq] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return (error);
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-	mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
-
-	apb_unmask_irq((void*)irq);
-
-	return (0);
-#endif
-}
-
-#ifndef INTRNG
-static int
-apb_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-#ifdef INTRNG
-	 return (intr_teardown_irq(child, ires, cookie));
-#else
-	struct apb_softc *sc = device_get_softc(dev);
-	int irq, result;
-
-	irq = rman_get_start(ires);
-	if (irq > APB_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	apb_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-#endif
-}
-
-static int
-apb_filter(void *arg)
-{
-	struct apb_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq;
-
-	if(ar531x_soc >= AR531X_SOC_AR5315)
-		reg = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTSTAT);
-	else
-		reg = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTSTAT);
-
-	for (irq = 0; irq < APB_NIRQS; irq++) {
-		if (reg & (1 << irq)) {
-			if(ar531x_soc >= AR531X_SOC_AR5315) {
-				ATH_WRITE_REG(AR5315_SYSREG_BASE +
-				    AR5315_SYSREG_MISC_INTSTAT,
-				    reg & ~(1 << irq));
-			} else {
-				ATH_WRITE_REG(AR5312_SYSREG_BASE +
-				    AR5312_SYSREG_MISC_INTSTAT,
-				    reg & ~(1 << irq));
-			}
-
-			event = sc->sc_eventstab[irq];
-			if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-				if(irq == 1 && ar531x_soc < AR531X_SOC_AR5315) {
-					ATH_READ_REG(AR5312_SYSREG_BASE +
-						AR5312_SYSREG_AHBPERR);
-					ATH_READ_REG(AR5312_SYSREG_BASE +
-						AR5312_SYSREG_AHBDMAE);
-				}
-				/* Ignore non handle interrupts */
-				if (irq != 0 && irq != 6)
-					printf("Stray APB IRQ %d\n", irq);
-
-				continue;
-			}
-
-			intr_event_handle(event, PCPU_GET(curthread)->td_intr_frame);
-			mips_intrcnt_inc(sc->sc_intr_counter[irq]);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-#else
-static int
-apb_filter(void *arg)
-{
-	struct apb_softc *sc = arg;
-	struct thread *td;
-	uint32_t i, intr;
-
-	td = curthread;
-	/* Workaround: do not inflate intr nesting level */
-	td->td_intr_nesting_level--;
-
-	if(ar531x_soc >= AR531X_SOC_AR5315)
-		intr = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTSTAT);
-	else
-		intr = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTSTAT);
-
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if(i == 1 && ar531x_soc < AR531X_SOC_AR5315) {
-			ATH_READ_REG(AR5312_SYSREG_BASE +
-			    AR5312_SYSREG_AHBPERR);
-			ATH_READ_REG(AR5312_SYSREG_BASE +
-			    AR5312_SYSREG_AHBDMAE);
-		}
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->apb_dev,
-			    "Stray interrupt %u detected\n", i);
-			apb_mask_irq((void*)i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	td->td_intr_nesting_level++;
-
-	return (FILTER_HANDLED);
-
-}
-
-#endif
-
-static void
-apb_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t		child;
-	long			maddr;
-	int			msize;
-	int			irq;
-	int			result;
-	int			mem_hints_count;
-
-	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	mem_hints_count = 0;
-	if (resource_long_value(dname, dunit, "maddr", &maddr) == 0)
-		mem_hints_count++;
-	if (resource_int_value(dname, dunit, "msize", &msize) == 0)
-		mem_hints_count++;
-
-	/* check if all info for mem resource has been provided */
-	if ((mem_hints_count > 0) && (mem_hints_count < 2)) {
-		printf("Either maddr or msize hint is missing for %s%d\n",
-		    dname, dunit);
-	} else if (mem_hints_count) {
-		result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-		    maddr, msize);
-		if (result != 0)
-			device_printf(bus, 
-			    "warning: bus_set_resource() failed\n");
-	}
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-static device_t
-apb_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t		child;
-	struct apb_ivar	*ivar;
-
-	ivar = malloc(sizeof(struct apb_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
-	if (ivar == NULL) {
-		printf("Failed to allocate ivar\n");
-		return (0);
-	}
-	resource_list_init(&ivar->resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		printf("Can't add child %s%d ordered\n", name, unit);
-		return (0);
-	}
-
-	device_set_ivars(child, ivar);
-
-	return (child);
-}
-
-/*
- * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
- * Provides pointer to resource_list for these routines
- */
-static struct resource_list *
-apb_get_resource_list(device_t dev, device_t child)
-{
-	struct apb_ivar *ivar;
-
-	ivar = device_get_ivars(child);
-	return (&(ivar->resources));
-}
-
-#ifdef INTRNG
-static void
-apb_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct apb_pic_irqsrc *)isrc)->irq;
-	apb_unmask_irq((void*)irq);
-}
-
-static void
-apb_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct apb_pic_irqsrc *)isrc)->irq;
-	apb_mask_irq((void*)irq);
-}
-
-static void
-apb_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	apb_pic_disable_intr(dev, isrc);
-}
-
-static void
-apb_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	apb_pic_enable_intr(dev, isrc);
-}
-
-static void
-apb_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-	uint32_t reg, irq;
-
-	irq = ((struct apb_pic_irqsrc *)isrc)->irq;
-	if(ar531x_soc >= AR531X_SOC_AR5315) {
-		reg = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_MISC_INTSTAT);
-		ATH_WRITE_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_MISC_INTSTAT,
-		    reg & ~(1 << irq));
-	} else {
-		reg = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_MISC_INTSTAT);
-		ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_MISC_INTSTAT,
-		    reg & ~(1 << irq));
-	}
-}
-
-static int
-apb_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	return (ENOTSUP);
-}
-
-#endif
-
-static device_method_t apb_methods[] = {
-	DEVMETHOD(bus_activate_resource,	apb_activate_resource),
-	DEVMETHOD(bus_add_child,		apb_add_child),
-	DEVMETHOD(bus_alloc_resource,		apb_alloc_resource),
-	DEVMETHOD(bus_deactivate_resource,	apb_deactivate_resource),
-	DEVMETHOD(bus_get_resource_list,	apb_get_resource_list),
-	DEVMETHOD(bus_hinted_child,		apb_hinted_child),
-	DEVMETHOD(bus_release_resource,		apb_release_resource),
-	DEVMETHOD(device_attach,		apb_attach),
-	DEVMETHOD(device_probe,			apb_probe),
-	DEVMETHOD(bus_get_resource,		bus_generic_rl_get_resource),
-	DEVMETHOD(bus_set_resource,		bus_generic_rl_set_resource),
-#ifdef INTRNG
-	DEVMETHOD(pic_disable_intr,		apb_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,		apb_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,			apb_pic_map_intr),
-	DEVMETHOD(pic_post_filter,		apb_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,		apb_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,		apb_pic_pre_ithread),
-
-//	DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
-#else
-	DEVMETHOD(bus_teardown_intr,		apb_teardown_intr),
-#endif
-	DEVMETHOD(bus_setup_intr,		apb_setup_intr),
-
-	DEVMETHOD_END
-};
-
-static driver_t apb_driver = {
-	"apb",
-	apb_methods,
-	sizeof(struct apb_softc),
-};
-static devclass_t apb_devclass;
-
-EARLY_DRIVER_MODULE(apb, nexus, apb_driver, apb_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/atheros/ar531x/apbvar.h b/sys/mips/atheros/ar531x/apbvar.h
deleted file mode 100644
index 5fb1f556413b..000000000000
--- a/sys/mips/atheros/ar531x/apbvar.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _APBVAR_H_
-#define _APBVAR_H_
-
-#define	APB_IRQ_BASE		0
-#define	APB_IRQ_END		31
-#define	APB_NIRQS		32
-
-struct apb_pic_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct apb_softc {
-	device_t		apb_dev;
-	struct rman		apb_irq_rman;
-	struct rman		apb_mem_rman;
-	/* IRQ events structs for child devices */
-	struct intr_event	*sc_eventstab[APB_NIRQS];
-#ifndef INTRNG
-	mips_intrcnt_t		sc_intr_counter[APB_NIRQS];
-#endif
-	/* Resources and cookies for MIPS CPU INTs */
-	struct resource		*sc_misc_irq;
-	void			*sc_misc_ih;
-#ifdef INTRNG
-	struct apb_pic_irqsrc	pic_irqs[APB_NIRQS];
-#endif
-};
-
-struct apb_ivar {
-	struct resource_list	resources;
-};
-
-#endif /* _APBVAR_H_ */
diff --git a/sys/mips/atheros/ar531x/ar5312_chip.c b/sys/mips/atheros/ar531x/ar5312_chip.c
deleted file mode 100644
index 440334cf604c..000000000000
--- a/sys/mips/atheros/ar531x/ar5312_chip.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/*-
- * Copyright (c) 2016 Hiroki Mori
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar531x/ar5312reg.h>
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-#include <mips/atheros/ar531x/ar5315_setup.h>
-
-static void
-ar5312_chip_detect_mem_size(void)
-{
-	uint32_t memsize;
-	uint32_t memcfg, bank0, bank1;
-
-	/*
-	 * Determine the memory size as established by system
-	 * firmware.
-	 *
-	 * NB: we allow compile time override
-	 */
-	memcfg = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1);
-	bank0 = __SHIFTOUT(memcfg, AR5312_MEM_CFG1_BANK0);
-	bank1 = __SHIFTOUT(memcfg, AR5312_MEM_CFG1_BANK1);
-
-	memsize = (bank0 ? (1 << (bank0 + 1)) : 0) +
-	    (bank1 ? (1 << (bank1 + 1)) : 0);
-	memsize <<= 20;
-
-	realmem = memsize;
-}
-
-static void
-ar5312_chip_detect_sys_frequency(void)
-{
-	uint32_t	predivisor;
-	uint32_t	multiplier;
-
-	const uint32_t clockctl = ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_CLOCKCTL);
-	if(ar531x_soc == AR531X_SOC_AR5313) {
-		predivisor = __SHIFTOUT(clockctl, AR2313_CLOCKCTL_PREDIVIDE);
-		multiplier = __SHIFTOUT(clockctl, AR2313_CLOCKCTL_MULTIPLIER);
-	} else {
-		predivisor = __SHIFTOUT(clockctl, AR5312_CLOCKCTL_PREDIVIDE);
-		multiplier = __SHIFTOUT(clockctl, AR5312_CLOCKCTL_MULTIPLIER);
-	}
-
-	const uint32_t divisor = (0x5421 >> (predivisor * 4)) & 15;
-
-	const uint32_t cpufreq = (40000000 / divisor) * multiplier;
-
-	u_ar531x_cpu_freq = cpufreq;
-	u_ar531x_ahb_freq = cpufreq / 4;
-	u_ar531x_ddr_freq = 0;
-}
-
-/*
- * This does not lock the CPU whilst doing the work!
- */
-static void
-ar5312_chip_device_reset(void)
-{
-	ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_RESETCTL,
-		AR5312_RESET_SYSTEM);
-}
-
-static void
-ar5312_chip_device_start(void)
-{
-	uint32_t cfg0, cfg1;
-	uint32_t bank0, bank1;
-	uint32_t size0, size1;
-
-	cfg0 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG0);
-	cfg1 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1);
-
-	bank0 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK0);
-	bank1 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK1);
-
-	size0 = bank0 ? (1 << (bank0 + 1)) : 0;
-	size1 = bank1 ? (1 << (bank1 + 1)) : 0;
-
-	size0 <<= 20;
-	size1 <<= 20;
-
-	printf("SDRMCTL %x %x %x %x\n", cfg0, cfg1, size0, size1);
-
-	ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_AHBPERR);
-	ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_AHBDMAE);
-//	ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_WDOG_CTL, 0);
-	ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_ENABLE, 0);
-
-	ATH_WRITE_REG(AR5312_SYSREG_BASE+AR5312_SYSREG_ENABLE,
-		ATH_READ_REG(AR5312_SYSREG_BASE+AR5312_SYSREG_ENABLE) |
-		AR5312_ENABLE_ENET0 | AR5312_ENABLE_ENET1);
-
-}
-
-static int
-ar5312_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_RESETCTL);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar5312_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-}
-
-/* Speed is either 10, 100 or 1000 */
-static void
-ar5312_chip_set_pll_ge(int unit, int speed)
-{
-}
-
-static void
-ar5312_chip_ddr_flush_ge(int unit)
-{
-}
-
-static void
-ar5312_chip_soc_init(void)
-{
-
-	u_ar531x_uart_addr = MIPS_PHYS_TO_KSEG1(AR5312_UART0_BASE);
-
-	u_ar531x_gpio_di = AR5312_GPIO_DI;
-	u_ar531x_gpio_do = AR5312_GPIO_DO;
-	u_ar531x_gpio_cr = AR5312_GPIO_CR;
-	u_ar531x_gpio_pins = AR5312_GPIO_PINS;
-
-	u_ar531x_wdog_ctl = AR5312_SYSREG_WDOG_CTL;
-	u_ar531x_wdog_timer = AR5312_SYSREG_WDOG_TIMER;
-
-}
-
-static uint32_t
-ar5312_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	return 0;
-}
-
-struct ar5315_cpu_def ar5312_chip_def = {
-	&ar5312_chip_detect_mem_size,
-	&ar5312_chip_detect_sys_frequency,
-	&ar5312_chip_device_reset,
-	&ar5312_chip_device_start,
-	&ar5312_chip_device_stopped,
-	&ar5312_chip_set_pll_ge,
-	&ar5312_chip_set_mii_speed,
-	&ar5312_chip_ddr_flush_ge,
-	&ar5312_chip_get_eth_pll,
-	&ar5312_chip_soc_init,
-};
diff --git a/sys/mips/atheros/ar531x/ar5312_chip.h b/sys/mips/atheros/ar531x/ar5312_chip.h
deleted file mode 100644
index a2135de03edd..000000000000
--- a/sys/mips/atheros/ar531x/ar5312_chip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*-
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR5312_CHIP_H__
-#define	__AR5312_CHIP_H__
-
-extern struct ar5315_cpu_def ar5312_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar531x/ar5312reg.h b/sys/mips/atheros/ar531x/ar5312reg.h
deleted file mode 100644
index 470187969bef..000000000000
--- a/sys/mips/atheros/ar531x/ar5312reg.h
+++ /dev/null
@@ -1,239 +0,0 @@
-/* $Id: ar5312reg.h,v 1.4 2011/07/07 05:06:44 matt Exp $ */
-/*
- * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
- * Copyright (c) 2006 Garrett D'Amore.
- * All rights reserved.
- *
- * This code was written by Garrett D'Amore for the Champaign-Urbana
- * Community Wireless Network Project.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. All advertising materials mentioning features or use of this
- *    software must display the following acknowledgements:
- *      This product includes software developed by the Urbana-Champaign
- *      Independent Media Center.
- *	This product includes software developed by Garrett D'Amore.
- * 4. Urbana-Champaign Independent Media Center's name and Garrett
- *    D'Amore's name may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_ATHEROS_AR5312REG_H_
-#define	_MIPS_ATHEROS_AR5312REG_H_
-
-#define	AR5312_MEM0_BASE		0x00000000	/* sdram */
-#define	AR5312_MEM1_BASE		0x08000000	/* sdram/flash */
-#define	AR5312_MEM3_BASE		0x10000000	/* flash */
-#define	AR5312_WLAN0_BASE		0x18000000
-#define	AR5312_ENET0_BASE		0x18100000
-#define	AR5312_ENET1_BASE		0x18200000
-#define	AR5312_SDRAMCTL_BASE		0x18300000
-#define	AR5312_FLASHCTL_BASE		0x18400000
-#define	AR5312_WLAN1_BASE		0x18500000
-#define	AR5312_UART0_BASE		0x1C000000	/* high speed */
-#define	AR5312_UART1_BASE		0x1C001000
-#define	AR5312_GPIO_BASE		0x1C002000
-#define	AR5312_SYSREG_BASE		0x1C003000
-#define	AR5312_UARTDMA_BASE		0x1C004000
-#define	AR5312_FLASH_BASE		0x1E000000
-#define	AR5312_FLASH_END		0x20000000	/* possibly aliased */
-
-/*
- * FLASHCTL registers  -- offset relative to AR531X_FLASHCTL_BASE
- */
-#define	AR5312_FLASHCTL_0		0x00
-#define	AR5312_FLASHCTL_1		0x04
-#define	AR5312_FLASHCTL_2		0x08
-
-#define	AR5312_FLASHCTL_IDCY		__BITS(0,3)	/* idle cycle turn */
-#define	AR5312_FLASHCTL_WST1		__BITS(5,9)	/* wait state 1 */
-#define AR5312_FLASHCTL_RBLE		__BIT(10)	/* rd byte enable */
-#define	AR5312_FLASHCTL_WST2		__BITS(11,15)	/* wait state 1 */
-#define	AR5312_FLASHCTL_AC		__BITS(16,18)	/* addr chk */
-#define	AR5312_FLASHCTL_AC_128K		0
-#define	AR5312_FLASHCTL_AC_256K		1
-#define	AR5312_FLASHCTL_AC_512K		2
-#define	AR5312_FLASHCTL_AC_1M		3
-#define	AR5312_FLASHCTL_AC_2M		4
-#define	AR5312_FLASHCTL_AC_4M		5
-#define	AR5312_FLASHCTL_AC_8M		6
-#define	AR5312_FLASHCTL_AC_16M		7
-#define AR5312_FLASHCTL_E		__BIT(19)	/* enable */
-#define AR5312_FLASHCTL_BUSERR		__BIT(24)	/* buserr */
-#define AR5312_FLASHCTL_WPERR		__BIT(25)	/* wperr */
-#define AR5312_FLASHCTL_WP		__BIT(26)	/* wp */
-#define AR5312_FLASHCTL_BM		__BIT(27)	/* bm */
-#define AR5312_FLASHCTL_MW		__BITS(28,29)	/* mem width */
-#define AR5312_FLASHCTL_AT		__BITS(31,30)	/* access type */
-
-/*
- * GPIO registers  -- offset relative to AR531X_GPIO_BASE
- */
-#define AR5312_GPIO_DO			0
-#define AR5312_GPIO_DI			4
-#define AR5312_GPIO_CR			8
-
-#define AR5312_GPIO_PINS		8
-
-/*
- * SYSREG registers  -- offset relative to AR531X_SYSREG_BASE
- */
-#define	AR5312_SYSREG_TIMER		0x0000
-#define	AR5312_SYSREG_TIMER_RELOAD	0x0004
-#define	AR5312_SYSREG_WDOG_CTL		0x0008
-#define	AR5312_SYSREG_WDOG_TIMER	0x000c
-#define	AR5312_SYSREG_MISC_INTSTAT	0x0010
-#define	AR5312_SYSREG_MISC_INTMASK	0x0014
-#define	AR5312_SYSREG_INTSTAT		0x0018
-#define	AR5312_SYSREG_RESETCTL		0x0020
-#define	AR5312_SYSREG_CLOCKCTL		0x0064
-#define	AR5312_SYSREG_SCRATCH		0x006c
-#define	AR5312_SYSREG_AHBPERR		0x0070
-#define	AR5312_SYSREG_PROC		0x0074
-#define	AR5312_SYSREG_AHBDMAE		0x0078
-#define	AR5312_SYSREG_ENABLE		0x0080
-#define	AR5312_SYSREG_REVISION		0x0090
-
-/* WDOG_CTL watchdog control bits */
-#define	AR5312_WDOG_CTL_IGNORE		0x0000
-#define	AR5312_WDOG_CTL_NMI		0x0001
-#define	AR5312_WDOG_CTL_RESET		0x0002
-
-/* Resets */
-#define	AR5312_RESET_SYSTEM		__BIT(0)
-#define	AR5312_RESET_CPU		__BIT(1)
-#define	AR5312_RESET_WLAN0		__BIT(2)	/* mac & bb */
-#define	AR5312_RESET_PHY0		__BIT(3)	/* enet phy */
-#define	AR5312_RESET_PHY1		__BIT(4)	/* enet phy */
-#define	AR5312_RESET_ENET0		__BIT(5)	/* mac */
-#define	AR5312_RESET_ENET1		__BIT(6)	/* mac */
-#define	AR5312_RESET_UART0		__BIT(8)	/* mac */
-#define	AR5312_RESET_WLAN1		__BIT(9)	/* mac & bb */
-#define	AR5312_RESET_APB		__BIT(10)	/* bridge */
-#define	AR5312_RESET_WARM_CPU		__BIT(16)
-#define	AR5312_RESET_WARM_WLAN0_MAC	__BIT(17)
-#define	AR5312_RESET_WARM_WLAN0_BB	__BIT(18)
-#define	AR5312_RESET_NMI		__BIT(20)
-#define	AR5312_RESET_WARM_WLAN1_MAC	__BIT(21)
-#define	AR5312_RESET_WARM_WLAN1_BB	__BIT(22)
-#define	AR5312_RESET_LOCAL_BUS		__BIT(23)
-#define	AR5312_RESET_WDOG		__BIT(24)
-
-/* AR5312/2312 clockctl bits */
-#define	AR5312_CLOCKCTL_PREDIVIDE	__BITS(4,5)
-#define	AR5312_CLOCKCTL_MULTIPLIER	__BITS(8,12)
-#define	AR5312_CLOCKCTL_DOUBLER		__BIT(16)
-
-/* AR2313 clockctl */
-#define	AR2313_CLOCKCTL_PREDIVIDE	__BITS(12,13)
-#define	AR2313_CLOCKCTL_MULTIPLIER	__BITS(16,20)
-
-/* Enables */
-#define	AR5312_ENABLE_WLAN0		__BIT(0)
-#define	AR5312_ENABLE_ENET0		__BIT(1)
-#define	AR5312_ENABLE_ENET1		__BIT(2)
-#define	AR5312_ENABLE_WLAN1		__BITS(7,8)	/* both DMA and PIO */
-
-/* Revision ids */
-#define	AR5312_REVISION_WMAC_MAJOR(x)	(((x) >> 12) & 0xf)
-#define	AR5312_REVISION_WMAC_MINOR(x)	(((x) >> 8) & 0xf)
-#define	AR5312_REVISION_WMAC(x)		(((x) >> 8) & 0xff)
-#define	AR5312_REVISION_MAJOR(x)	(((x) >> 4) & 0xf)
-#define	AR5312_REVISION_MINOR(x)	(((x) >> 0) & 0xf)
-
-#define	AR5312_REVISION_MAJ_AR5311	0x1
-#define	AR5312_REVISION_MAJ_AR5312	0x4
-#define	AR5312_REVISION_MAJ_AR2313	0x5
-#define	AR5312_REVISION_MAJ_AR5315	0xB
-
-/*
- * SDRAMCTL registers  -- offset relative to SDRAMCTL
- */
-#define	AR5312_SDRAMCTL_MEM_CFG0	0x0000
-#define	AR5312_SDRAMCTL_MEM_CFG1	0x0004
-
-/* memory config 1 bits */
-#define	AR5312_MEM_CFG1_BANK0		__BITS(8,10)
-#define	AR5312_MEM_CFG1_BANK1		__BITS(12,15)
-
-/* helper macro for accessing system registers without bus space */
-#define	REGVAL(x)	*((volatile uint32_t *)(MIPS_PHYS_TO_KSEG1((x))))
-#define	GETSYSREG(x)	REGVAL((x) + AR5312_SYSREG_BASE)
-#define	PUTSYSREG(x,v)	(REGVAL((x) + AR5312_SYSREG_BASE)) = (v)
-#define	GETSDRAMREG(x)	REGVAL((x) + AR5312_SDRAMCTL_BASE)
-#define	PUTSDRAMREG(x,v)	(REGVAL((x) + AR5312_SDRAMCTL_BASE)) = (v)
-
-/*
- * Interrupts.
- */
-#define	AR5312_IRQ_WLAN0		0
-#define	AR5312_IRQ_ENET0		1
-#define	AR5312_IRQ_ENET1		2
-#define	AR5312_IRQ_WLAN1		3
-#define	AR5312_IRQ_MISC			4
-
-#define	AR5312_MISC_IRQ_TIMER		1
-#define	AR5312_MISC_IRQ_AHBPERR		2
-#define	AR5312_MISC_IRQ_AHBDMAE		3
-#define	AR5312_MISC_IRQ_GPIO		4
-#define	AR5312_MISC_IRQ_UART0		5
-#define	AR5312_MISC_IRQ_UART0_DMA	6
-#define	AR5312_MISC_IRQ_WDOG		7
-
-/*
- * Board data.  This is located in flash somewhere, ar531x_board_info
- * locates it.
- */
-#include <dev/ath/ath_hal/ah_soc.h>	/* XXX really doesn't belong in hal */
-
-/* XXX write-around for now */
-#define	AR5312_BOARD_MAGIC		AR531X_BD_MAGIC
-
-/* config bits */
-#define	AR5312_BOARD_CONFIG_ENET0	BD_ENET0
-#define	AR5312_BOARD_CONFIG_ENET1	BD_ENET1
-#define	AR5312_BOARD_CONFIG_UART1	BD_UART1
-#define	AR5312_BOARD_CONFIG_UART0	BD_UART0
-#define	AR5312_BOARD_CONFIG_RSTFACTORY	BD_RSTFACTORY
-#define	AR5312_BOARD_CONFIG_SYSLED	BD_SYSLED
-#define	AR5312_BOARD_CONFIG_EXTUARTCLK	BD_EXTUARTCLK
-#define	AR5312_BOARD_CONFIG_CPUFREQ	BD_CPUFREQ
-#define	AR5312_BOARD_CONFIG_SYSFREQ	BD_SYSFREQ
-#define	AR5312_BOARD_CONFIG_WLAN0	BD_WLAN0
-#define	AR5312_BOARD_CONFIG_MEMCAP	BD_MEMCAP
-#define	AR5312_BOARD_CONFIG_DISWDOG	BD_DISWATCHDOG
-#define	AR5312_BOARD_CONFIG_WLAN1	BD_WLAN1
-#define	AR5312_BOARD_CONFIG_AR2312	BD_ISCASPER
-#define	AR5312_BOARD_CONFIG_WLAN0_2G	BD_WLAN0_2G_EN
-#define	AR5312_BOARD_CONFIG_WLAN0_5G	BD_WLAN0_5G_EN
-#define	AR5312_BOARD_CONFIG_WLAN1_2G	BD_WLAN1_2G_EN
-#define	AR5312_BOARD_CONFIG_WLAN1_5G	BD_WLAN1_5G_EN
-
-#define AR5312_APB_BASE         AR5312_UART0_BASE
-#define AR5312_APB_SIZE         0x02000000
-
-#endif	/* _MIPS_ATHEROS_AR531XREG_H_ */
diff --git a/sys/mips/atheros/ar531x/ar5315_chip.c b/sys/mips/atheros/ar531x/ar5315_chip.c
deleted file mode 100644
index f04b3aabfe5f..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_chip.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*-
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- * Copyright (c) 2016, Hiroki Mori
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_chip.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-
-/* XXX these shouldn't be in here - this file is a per-chip file */
-/* XXX these should be in the top-level ar5315 type, not ar5315 -chip */
-uint32_t u_ar531x_cpu_freq;
-uint32_t u_ar531x_ahb_freq;
-uint32_t u_ar531x_ddr_freq;
-
-uint32_t u_ar531x_uart_addr;
-
-uint32_t u_ar531x_gpio_di;
-uint32_t u_ar531x_gpio_do;
-uint32_t u_ar531x_gpio_cr;  
-uint32_t u_ar531x_gpio_pins;
-
-uint32_t u_ar531x_wdog_ctl;
-uint32_t u_ar531x_wdog_timer;
-
-static void
-ar5315_chip_detect_mem_size(void)
-{
-	uint32_t	memsize = 0;
-	uint32_t	memcfg, cw, rw, dw;
-
-	/*
-	 * Determine the memory size.  We query the board info.
-	 */
-	memcfg = ATH_READ_REG(AR5315_SDRAMCTL_BASE + AR5315_SDRAMCTL_MEM_CFG);
-	cw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_COL_WIDTH);
-	cw += 1;
-	rw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_ROW_WIDTH);
-	rw += 1;
-
-	/* XXX: according to redboot, this could be wrong if DDR SDRAM */
-	dw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_DATA_WIDTH);
-	dw += 1;
-	dw *= 8;	/* bits */
-
-	/* not too sure about this math, but it _seems_ to add up */
-	memsize = (1 << cw) * (1 << rw) * dw;
-#if 0
-	printf("SDRAM_MEM_CFG =%x, cw=%d rw=%d dw=%d xmemsize=%d\n", memcfg,
-	    cw, rw, dw, memsize);
-#endif
-	realmem = memsize;
-}
-
-static void
-ar5315_chip_detect_sys_frequency(void)
-{
-	uint32_t freq_ref, freq_pll;
-	static const uint8_t pll_divide_table[] = {
-		2, 3, 4, 6, 3,
-		/*
-		 * these entries are bogus, but it avoids a possible
-		 * bad table dereference
-		 */
-		1, 1, 1
-	};
-	static const uint8_t pre_divide_table[] = {
-		1, 2, 4, 5
-	};
-
-	const uint32_t pllc = ATH_READ_REG(AR5315_SYSREG_BASE + 
-		AR5315_SYSREG_PLLC_CTL);
-
-	const uint32_t refdiv = pre_divide_table[AR5315_PLLC_REF_DIV(pllc)];
-	const uint32_t fbdiv = AR5315_PLLC_FB_DIV(pllc);
-	const uint32_t div2 = (AR5315_PLLC_DIV_2(pllc) + 1) * 2; /* results in 2 or 4 */
-
-	freq_ref = 40000000;
-
-	/* 40MHz reference clk, reference and feedback dividers */
-	freq_pll = (freq_ref / refdiv) * div2 * fbdiv;
-
-	const uint32_t pllout[4] = {
-	    /* CLKM select */
-	    [0] = freq_pll / pll_divide_table[AR5315_PLLC_CLKM(pllc)],
-	    [1] = freq_pll / pll_divide_table[AR5315_PLLC_CLKM(pllc)],
-
-	    /* CLKC select */
-	    [2] = freq_pll / pll_divide_table[AR5315_PLLC_CLKC(pllc)],
-
-	    /* ref_clk select */
-	    [3] = freq_ref, /* use original reference clock */
-	};
-
-	const uint32_t amba_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE +
-		AR5315_SYSREG_AMBACLK);
-	uint32_t ambadiv = AR5315_CLOCKCTL_DIV(amba_clkctl);
-	ambadiv = ambadiv ? (ambadiv * 2) : 1;
-	u_ar531x_ahb_freq = pllout[AR5315_CLOCKCTL_SELECT(amba_clkctl)] / ambadiv;
-
-	const uint32_t cpu_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE +
-		AR5315_SYSREG_CPUCLK);
-	uint32_t cpudiv = AR5315_CLOCKCTL_DIV(cpu_clkctl);
-	cpudiv = cpudiv ? (cpudiv * 2) : 1;
-	u_ar531x_cpu_freq = pllout[AR5315_CLOCKCTL_SELECT(cpu_clkctl)] / cpudiv;
-
-	u_ar531x_ddr_freq = 0;
-}
-
-/*
- * This does not lock the CPU whilst doing the work!
- */
-static void
-ar5315_chip_device_reset(void)
-{
-	ATH_WRITE_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_COLDRESET,
-		AR5315_COLD_AHB | AR5315_COLD_APB | AR5315_COLD_CPU);
-}
-
-static void
-ar5315_chip_device_start(void)
-{
-	ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ERR0,
-		AR5315_AHB_ERROR_DET);
-	ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ERR1);
-	ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_WDOG_CTL, 
-		AR5315_WDOG_CTL_IGNORE);
-
-	// set Ethernet AHB master arbitration control
-	// Maybe RedBoot was enabled. But to make sure.
-	ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL,
-		ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL) |
-		AR5315_ARB_ENET);
-
-	// set Ethernet controller byteswap control
-/*
-	ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN,
-		ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN) |
-		AR5315_ENDIAN_ENET);
-*/
-	/* Disable interrupts for all gpio pins. */
-	ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_GPIO_INT, 0);
-
-	printf("AHB Master Arbitration Control %08x\n",
-		ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL));
-	printf("Byteswap Control %08x\n",
-		ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN));
-}
-
-static int
-ar5315_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_COLDRESET);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar5315_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-}
-
-/* Speed is either 10, 100 or 1000 */
-static void
-ar5315_chip_set_pll_ge(int unit, int speed)
-{
-}
-
-static void
-ar5315_chip_ddr_flush_ge(int unit)
-{
-}
-
-static void
-ar5315_chip_soc_init(void)
-{
-	u_ar531x_uart_addr = MIPS_PHYS_TO_KSEG1(AR5315_UART_BASE);
-
-	u_ar531x_gpio_di = AR5315_SYSREG_GPIO_DI;
-	u_ar531x_gpio_do = AR5315_SYSREG_GPIO_DO;
-	u_ar531x_gpio_cr = AR5315_SYSREG_GPIO_CR;
-	u_ar531x_gpio_pins = AR5315_GPIO_PINS;
-
-	u_ar531x_wdog_ctl = AR5315_SYSREG_WDOG_CTL;
-	u_ar531x_wdog_timer = AR5315_SYSREG_WDOG_TIMER;
-}
-
-static uint32_t
-ar5315_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	return 0;
-}
-
-struct ar5315_cpu_def ar5315_chip_def = {
-	&ar5315_chip_detect_mem_size,
-	&ar5315_chip_detect_sys_frequency,
-	&ar5315_chip_device_reset,
-	&ar5315_chip_device_start,
-	&ar5315_chip_device_stopped,
-	&ar5315_chip_set_pll_ge,
-	&ar5315_chip_set_mii_speed,
-	&ar5315_chip_ddr_flush_ge,
-	&ar5315_chip_get_eth_pll,
-	&ar5315_chip_soc_init,
-};
diff --git a/sys/mips/atheros/ar531x/ar5315_chip.h b/sys/mips/atheros/ar531x/ar5315_chip.h
deleted file mode 100644
index dc20004e8f93..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_chip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*-
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR5315_CHIP_H__
-#define	__AR5315_CHIP_H__
-
-extern struct ar5315_cpu_def ar5315_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar531x/ar5315_cpudef.h b/sys/mips/atheros/ar531x/ar5315_cpudef.h
deleted file mode 100644
index 370b10e9b531..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_cpudef.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*-
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR5315_CPUDEF_H__
-#define	__AR5315_CPUDEF_H__
-
-struct ar5315_cpu_def {
-	void (* detect_mem_size) (void);
-	void (* detect_sys_frequency) (void);
-	void (* ar5315_chip_device_reset) (void);
-	void (* ar5315_chip_device_start) (void);
-	int (* ar5315_chip_device_stopped) (uint32_t);
-	void (* ar5315_chip_set_pll_ge) (int, int);
-	void (* ar5315_chip_set_mii_speed) (uint32_t, uint32_t);
-	void (* ar5315_chip_ddr_flush_ge) (int);
-	uint32_t (* ar5315_chip_get_eth_pll) (unsigned int, int);
-	void (* ar5315_chip_soc_init) (void);
-
-	/*
-	 * Allow to change MII bus mode:
-	 * AR5315_ARGE_MII_MODE_MII
-	 * AR5315_ARGE_MII_MODE_RMII
-	 * AR5315_ARGE_MII_MODE_GMII
-	 * AR5315_ARGE_MII_MODE_RGMII
-	 * mii_mode(unit, mode);
-	 */
-#define	AR5315_ARGE_MII_MODE_MII	0x0100
-#define	AR5315_ARGE_MII_MODE_RMII	0x0101
-#define	AR5315_ARGE_MII_MODE_GMII	0x1000
-#define	AR5315_ARGE_MII_MODE_RGMII	0x1001
-	void (* ar5315_chip_set_mii_mode) (int, int, int);
-};
-
-extern struct ar5315_cpu_def * ar5315_cpu_ops;
-
-static inline void ar531x_detect_mem_size(void)
-{
-	ar5315_cpu_ops->detect_mem_size();
-}
-
-static inline void ar531x_detect_sys_frequency(void)
-{
-	ar5315_cpu_ops->detect_sys_frequency();
-}
-
-static inline void ar531x_device_reset(void)
-{
-	ar5315_cpu_ops->ar5315_chip_device_reset();
-}
-
-static inline void ar531x_device_start(void)
-{
-	ar5315_cpu_ops->ar5315_chip_device_start();
-}
-
-static inline int ar531x_device_stopped(uint32_t mask)
-{
-	return ar5315_cpu_ops->ar5315_chip_device_stopped(mask);
-}
-
-static inline void ar531x_device_set_pll_ge(int unit, int speed)
-{
-	ar5315_cpu_ops->ar5315_chip_set_pll_ge(unit, speed);
-}
-
-static inline void ar531x_device_set_mii_speed(int unit, int speed)
-{
-	ar5315_cpu_ops->ar5315_chip_set_mii_speed(unit, speed);
-}
-
-static inline void ar531x_device_flush_ddr_ge(int unit)
-{
-	ar5315_cpu_ops->ar5315_chip_ddr_flush_ge(unit);
-}
-
-static inline void ar531x_device_soc_init(void)
-{
-	ar5315_cpu_ops->ar5315_chip_soc_init();
-}
-
-static inline void ar531x_device_set_mii_mode(int unit, int mode, int speed)
-{
-	ar5315_cpu_ops->ar5315_chip_set_mii_mode(unit, mode, speed);
-}
-
-/* XXX shouldn't be here! */
-extern uint32_t u_ar531x_cpu_freq;
-extern uint32_t u_ar531x_ahb_freq;
-extern uint32_t u_ar531x_ddr_freq;
-
-extern uint32_t u_ar531x_uart_addr;
-
-extern uint32_t u_ar531x_gpio_di;
-extern uint32_t u_ar531x_gpio_do;
-extern uint32_t u_ar531x_gpio_cr;
-extern uint32_t u_ar531x_gpio_pins;
-
-extern uint32_t u_ar531x_wdog_ctl;
-extern uint32_t u_ar531x_wdog_timer;
-static inline uint32_t ar531x_cpu_freq(void) { return u_ar531x_cpu_freq; }
-static inline uint32_t ar531x_ahb_freq(void) { return u_ar531x_ahb_freq; }
-static inline uint32_t ar531x_ddr_freq(void) { return u_ar531x_ddr_freq; }
-static inline uint32_t ar531x_uart_addr(void) { return u_ar531x_uart_addr; }
-static inline uint32_t ar531x_gpio_di(void) { return u_ar531x_gpio_di; }
-static inline uint32_t ar531x_gpio_cr(void) { return u_ar531x_gpio_cr; }
-static inline uint32_t ar531x_gpio_do(void) { return u_ar531x_gpio_do; }
-static inline uint32_t ar531x_gpio_pins(void) { return u_ar531x_gpio_pins; }
-static inline uint32_t ar531x_wdog_ctl(void) { return u_ar531x_wdog_ctl; }
-static inline uint32_t ar531x_wdog_timer(void) { return u_ar531x_wdog_timer; }
-#endif
diff --git a/sys/mips/atheros/ar531x/ar5315_gpio.c b/sys/mips/atheros/ar531x/ar5315_gpio.c
deleted file mode 100644
index 8e824cd237c0..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_gpio.c
+++ /dev/null
@@ -1,532 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2009, Luiz Otavio O Souza. 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * GPIO driver for AR5315 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-#include <mips/atheros/ar531x/ar5315_gpiovar.h>
-#include <dev/gpio/gpiobusvar.h>
-
-#include "gpio_if.h"
-
-#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
-
-/*
- * Helpers
- */
-static void ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc, 
-    uint32_t mask);
-static void ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc, 
-    uint32_t mask);
-static void ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc, 
-    struct gpio_pin *pin, uint32_t flags);
-
-/*
- * Driver stuff
- */
-static int ar5315_gpio_probe(device_t dev);
-static int ar5315_gpio_attach(device_t dev);
-static int ar5315_gpio_detach(device_t dev);
-static int ar5315_gpio_filter(void *arg);
-static void ar5315_gpio_intr(void *arg);
-
-/*
- * GPIO interface
- */
-static device_t ar5315_gpio_get_bus(device_t);
-static int ar5315_gpio_pin_max(device_t dev, int *maxpin);
-static int ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
-static int ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
-    *flags);
-static int ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
-static int ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
-static int ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
-static int ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
-static int ar5315_gpio_pin_toggle(device_t dev, uint32_t pin);
-
-/*
- * Enable/disable the GPIO function control space.
- *
- * This is primarily for the AR5315, which has SPI CS1/CS2, UART, SLIC, I2S
- * as GPIO pin options.
- */
-static void
-ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc, uint32_t mask)
-{
-//		GPIO_SET_BITS(sc, AR5315_GPIO_FUNCTION, mask);
-}
-
-static void
-ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc, uint32_t mask)
-{
-//		GPIO_CLEAR_BITS(sc, AR5315_GPIO_FUNCTION, mask);
-}
-
-static void
-ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc, struct gpio_pin *pin,
-    unsigned int flags)
-{
-	uint32_t mask;
-
-	mask = 1 << pin->gp_pin;
-
-	/*
-	 * Manage input/output
-	 */
-	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
-		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
-		if (flags & GPIO_PIN_OUTPUT) {
-			pin->gp_flags |= GPIO_PIN_OUTPUT;
-			GPIO_SET_BITS(sc, ar531x_gpio_cr(), mask);
-		}
-		else {
-			pin->gp_flags |= GPIO_PIN_INPUT;
-			GPIO_CLEAR_BITS(sc, ar531x_gpio_cr(), mask);
-		}
-	}
-}
-
-static device_t
-ar5315_gpio_get_bus(device_t dev)
-{
-	struct ar5315_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-ar5315_gpio_pin_max(device_t dev, int *maxpin)
-{
-
-	*maxpin = ar531x_gpio_pins() - 1;
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*caps = sc->gpio_pins[i].gp_caps;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	int i;
-	int dir;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	dir = GPIO_READ(sc, ar531x_gpio_cr()) & (1 << pin);
-
-	*flags = dir ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
-
-/*
-	GPIO_LOCK(sc);
-	*flags = sc->gpio_pins[i].gp_flags;
-	GPIO_UNLOCK(sc);
-*/
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	int i;
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	ar5315_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	uint32_t state;
-
-	state = GPIO_READ(sc, ar531x_gpio_do());
-
-	if(value == 1) {
-		state |= (1 << pin);
-	} else {
-		state &= ~(1 << pin);
-	}
-
-	GPIO_WRITE(sc, ar531x_gpio_do(), state);
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	*val = (GPIO_READ(sc, ar531x_gpio_di()) & (1 << pin)) ? 1 : 0;
-
-	return (0);
-}
-
-static int
-ar5315_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	int res, i;
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	res = (GPIO_READ(sc, ar531x_gpio_do()) & (1 << pin)) ? 1 : 0;
-	if (res)
-		GPIO_CLEAR_BITS(sc, ar531x_gpio_do(), pin);
-	else
-		GPIO_SET_BITS(sc, ar531x_gpio_do(), pin);
-
-	return (0);
-}
-
-static int
-ar5315_gpio_filter(void *arg)
-{
-
-	/* TODO: something useful */
-	return (FILTER_STRAY);
-}
-
-static void
-ar5315_gpio_intr(void *arg)
-{
-	struct ar5315_gpio_softc *sc = arg;
-	GPIO_LOCK(sc);
-	/* TODO: something useful */
-	GPIO_UNLOCK(sc);
-}
-
-static int
-ar5315_gpio_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Atheros AR531x GPIO driver");
-	return (0);
-}
-
-static int
-ar5315_gpio_attach(device_t dev)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-	int i, j, maxpin;
-	int mask, pinon;
-	uint32_t oe;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("ar5315_gpio: Only one gpio module supported"));
-
-	mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
-
-	/* Map control/status registers. */
-	sc->gpio_mem_rid = 0;
-	sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->gpio_mem_rid, RF_ACTIVE);
-
-	if (sc->gpio_mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		ar5315_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		ar5315_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 
-	    ar5315_gpio_filter, ar5315_gpio_intr, sc, &sc->gpio_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		ar5315_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	sc->dev = dev;
-
-	/* Enable function bits that are required */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "function_set", &mask) == 0) {
-		device_printf(dev, "function_set: 0x%x\n", mask);
-		ar5315_gpio_function_enable(sc, mask);
-	}
-	/* Disable function bits that are required */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "function_clear", &mask) == 0) {
-		device_printf(dev, "function_clear: 0x%x\n", mask);
-		ar5315_gpio_function_disable(sc, mask);
-	}
-
-	/* Initialise all pins specified in the mask, up to the pin count */
-	(void) ar5315_gpio_pin_max(dev, &maxpin);
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "pinmask", &mask) != 0)
-		mask = 0;
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "pinon", &pinon) != 0)
-		pinon = 0;
-	device_printf(dev, "gpio pinmask=0x%x\n", mask);
-	for (j = 0; j <= maxpin; j++) {
-		if ((mask & (1 << j)) == 0)
-			continue;
-		sc->gpio_npins++;
-	}
-
-	/* Iniatilize the GPIO pins, keep the loader settings. */
-	oe = GPIO_READ(sc, ar531x_gpio_cr());
-	sc->gpio_pins = malloc(sizeof(struct gpio_pin) * sc->gpio_npins,
-	    M_DEVBUF, M_WAITOK | M_ZERO);
-	for (i = 0, j = 0; j <= maxpin; j++) {
-		if ((mask & (1 << j)) == 0)
-			continue;
-		snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
-		    "pin %d", j);
-		sc->gpio_pins[i].gp_pin = j;
-		sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
-		if (oe & (1 << j))
-			sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
-		else
-			sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
-		i++;
-	}
-
-#if 0
-	/* Turn on the hinted pins. */
-	for (i = 0; i < sc->gpio_npins; i++) {
-		j = sc->gpio_pins[i].gp_pin;
-		if ((pinon & (1 << j)) != 0) {
-			ar5315_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
-			ar5315_gpio_pin_set(dev, j, 1);
-		}
-	}
-
-	/*
-	 * Search through the function hints, in case there's some
-	 * overrides such as LNA control.
-	 *
-	 * hint.gpio.X.func.<pin>.gpiofunc=<func value>
-	 * hint.gpio.X.func.<pin>.gpiomode=1 (for output, default low)
-	 */
-	for (i = 0; i <= maxpin; i++) {
-		char buf[32];
-		int gpiofunc, gpiomode;
-
-		snprintf(buf, 32, "func.%d.gpiofunc", i);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev),
-		    buf,
-		    &gpiofunc) != 0)
-			continue;
-		/* Get the mode too */
-		snprintf(buf, 32, "func.%d.gpiomode", i);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev),
-		    buf,
-		    &gpiomode) != 0)
-			continue;
-
-		/* We only handle mode=1 for now */
-		if (gpiomode != 1)
-			continue;
-
-		device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n",
-		    __func__,
-		    i,
-		    gpiofunc,
-		    gpiomode);
-
-		/* Set output (bit == 0) */
-		oe = GPIO_READ(sc, ar531x_gpio_cr());
-		oe &= ~ (1 << i);
-		GPIO_WRITE(sc, ar531x_gpio_cr(), oe);
-
-		/* Set pin value = 0, so it stays low by default */
-		oe = GPIO_READ(sc, ar531x_gpio_do());
-		oe &= ~ (1 << i);
-		GPIO_WRITE(sc, ar531x_gpio_do(), oe);
-
-		/* Finally: Set the output config */
-//		ar5315_gpio_ouput_configure(i, gpiofunc);
-	}
-#endif
-
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL) {
-		ar5315_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-ar5315_gpio_detach(device_t dev)
-{
-	struct ar5315_gpio_softc *sc = device_get_softc(dev);
-
-	KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
-
-	gpiobus_detach_bus(dev);
-	if (sc->gpio_ih)
-		bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
-	if (sc->gpio_irq_res)
-		bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
-		    sc->gpio_irq_res);
-	if (sc->gpio_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
-		    sc->gpio_mem_res);
-	if (sc->gpio_pins)
-		free(sc->gpio_pins, M_DEVBUF);
-	mtx_destroy(&sc->gpio_mtx);
-
-	return(0);
-}
-
-static device_method_t ar5315_gpio_methods[] = {
-	DEVMETHOD(device_probe, ar5315_gpio_probe),
-	DEVMETHOD(device_attach, ar5315_gpio_attach),
-	DEVMETHOD(device_detach, ar5315_gpio_detach),
-
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus, ar5315_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max, ar5315_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname, ar5315_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags, ar5315_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps, ar5315_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags, ar5315_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get, ar5315_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set, ar5315_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle, ar5315_gpio_pin_toggle),
-	{0, 0},
-};
-
-static driver_t ar5315_gpio_driver = {
-	"gpio",
-	ar5315_gpio_methods,
-	sizeof(struct ar5315_gpio_softc),
-};
-static devclass_t ar5315_gpio_devclass;
-
-DRIVER_MODULE(ar5315_gpio, apb, ar5315_gpio_driver, ar5315_gpio_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar531x/ar5315_gpiovar.h b/sys/mips/atheros/ar531x/ar5315_gpiovar.h
deleted file mode 100644
index b4938d129047..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_gpiovar.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2009, Luiz Otavio O Souza.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __AR5315_GPIOVAR_H__
-#define __AR5315_GPIOVAR_H__
-
-#include <sys/timepps.h>
-
-#define GPIO_LOCK(_sc)		mtx_lock(&(_sc)->gpio_mtx)
-#define GPIO_UNLOCK(_sc)	mtx_unlock(&(_sc)->gpio_mtx)
-#define GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
-
-/*
- * register space access macros
- */
-#define GPIO_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->gpio_mem_res, (reg), (val)); \
-	} while (0)
-
-#define GPIO_READ(sc, reg)	 bus_read_4(sc->gpio_mem_res, (reg))
-
-#define GPIO_SET_BITS(sc, reg, bits)	\
-	GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits))
-
-#define GPIO_CLEAR_BITS(sc, reg, bits)	\
-	GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits))
-
-#define	AR5315_GPIO_PINS	23
-#define	AR5312_GPIO_PINS	8
-
-struct ar5315_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct mtx		gpio_mtx;
-	struct resource		*gpio_mem_res;
-	int			gpio_mem_rid;
-	struct resource		*gpio_irq_res;
-	int			gpio_irq_rid;
-	void			*gpio_ih;
-	int			gpio_npins;
-	struct gpio_pin		*gpio_pins;
-	int			gpio_ppspin;
-	struct pps_state	gpio_pps;
-	uint32_t		gpio_ppsenable;
-};
-
-#endif	/* __AR5315_GPIOVAR_H__ */
diff --git a/sys/mips/atheros/ar531x/ar5315_machdep.c b/sys/mips/atheros/ar531x/ar5315_machdep.c
deleted file mode 100644
index 6a9332e02a96..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_machdep.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_ar531x.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-#include <sys/boot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-
-#include <mips/atheros/ar531x/ar5315_setup.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-
-extern char edata[], end[];
-
-uint32_t ar711_base_mac[ETHER_ADDR_LEN];
-/* 4KB static data aread to keep a copy of the bootload env until
-   the dynamic kenv is setup */
-char boot1_env[4096];
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-void
-platform_reset(void)
-{
-	ar531x_device_reset();
-	/* Wait for reset */
-	while(1)
-		;
-}
-
-/*
- * Obtain the MAC address via the Redboot environment.
- */
-static void
-ar5315_redboot_get_macaddr(void)
-{
-	char *var;
-	int count = 0;
-
-	/*
-	 * "ethaddr" is passed via envp on RedBoot platforms
-	 * "kmac" is passed via argv on RouterBOOT platforms
-	 */
-	if ((var = kern_getenv("ethaddr")) != NULL ||
-	    (var = kern_getenv("kmac")) != NULL) {
-		count = sscanf(var, "%x%*c%x%*c%x%*c%x%*c%x%*c%x",
-		    &ar711_base_mac[0], &ar711_base_mac[1],
-		    &ar711_base_mac[2], &ar711_base_mac[3],
-		    &ar711_base_mac[4], &ar711_base_mac[5]);
-		if (count < 6)
-			memset(ar711_base_mac, 0,
-			    sizeof(ar711_base_mac));
-		freeenv(var);
-	}
-}
-
-#if defined(SOC_VENDOR) || defined(SOC_MODEL) || defined(SOC_REV)
-static SYSCTL_NODE(_hw, OID_AUTO, soc, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
-    "System on Chip information");
-#endif
-#if defined(SOC_VENDOR)
-static char hw_soc_vendor[] = SOC_VENDOR;
-SYSCTL_STRING(_hw_soc, OID_AUTO, vendor, CTLFLAG_RD, hw_soc_vendor, 0,
-	   "SoC vendor");
-#endif
-#if defined(SOC_MODEL)
-static char hw_soc_model[] = SOC_MODEL;
-SYSCTL_STRING(_hw_soc, OID_AUTO, model, CTLFLAG_RD, hw_soc_model, 0,
-	   "SoC model");
-#endif
-#if defined(SOC_REV)
-static char hw_soc_revision[] = SOC_REV;
-SYSCTL_STRING(_hw_soc, OID_AUTO, revision, CTLFLAG_RD, hw_soc_revision, 0,
-	   "SoC revision");
-#endif
-
-#if defined(DEVICE_VENDOR) || defined(DEVICE_MODEL) || defined(DEVICE_REV)
-static SYSCTL_NODE(_hw, OID_AUTO, device, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
-    "Board information");
-#endif
-#if defined(DEVICE_VENDOR)
-static char hw_device_vendor[] = DEVICE_VENDOR;
-SYSCTL_STRING(_hw_device, OID_AUTO, vendor, CTLFLAG_RD, hw_device_vendor, 0,
-	   "Board vendor");
-#endif
-#if defined(DEVICE_MODEL)
-static char hw_device_model[] = DEVICE_MODEL;
-SYSCTL_STRING(_hw_device, OID_AUTO, model, CTLFLAG_RD, hw_device_model, 0,
-	   "Board model");
-#endif
-#if defined(DEVICE_REV)
-static char hw_device_revision[] = DEVICE_REV;
-SYSCTL_STRING(_hw_device, OID_AUTO, revision, CTLFLAG_RD, hw_device_revision, 0,
-	   "Board revision");
-#endif
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	uint64_t platform_counter_freq;
-	int argc = 0, i;
-	char **argv = NULL;
-#ifndef	AR531X_ENV_UBOOT
-	char **envp = NULL;
-#endif
-	vm_offset_t kernend;
-
-	/* 
-	 * clear the BSS and SBSS segments, this should be first call in
-	 * the function
-	 */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/*
-	 * Until some more sensible abstractions for uboot/redboot
-	 * environment handling, we have to make this a compile-time
-	 * hack.  The existing code handles the uboot environment
-	 * very incorrectly so we should just ignore initialising
-	 * the relevant pointers.
-	 */
-#ifndef	AR531X_ENV_UBOOT
-	argc = a0;
-	argv = (char**)a1;
-	envp = (char**)a2;
-#endif
-	/* 
-	 * Protect ourselves from garbage in registers 
-	 */
-	if (MIPS_IS_VALID_PTR(envp)) {
-		for (i = 0; envp[i]; i += 2) {
-			if (strcmp(envp[i], "memsize") == 0)
-				realmem = btoc(strtoul(envp[i+1], NULL, 16));
-		}
-	}
-
-	ar5315_detect_sys_type();
-
-// RedBoot SDRAM Detect is missing
-//	ar531x_detect_mem_size();
-
-	/*
-	 * Just wild guess. RedBoot let us down and didn't reported 
-	 * memory size
-	 */
-	if (realmem == 0)
-		realmem = btoc(16*1024*1024);
-
-	/*
-	 * Allow build-time override in case Redboot lies
-	 * or in other situations (eg where there's u-boot)
-	 * where there isn't (yet) a convienent method of
-	 * being told how much RAM is available.
-	 *
-	 * This happens on at least the Ubiquiti LS-SR71A
-	 * board, where redboot says there's 16mb of RAM
-	 * but in fact there's 32mb.
-	 */
-#if	defined(AR531X_REALMEM)
-		realmem = btoc(AR531X_REALMEM);
-#endif
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = phys_avail[0];
-	dump_avail[1] = phys_avail[1] - phys_avail[0];
-
-	physmem = realmem;
-
-	/*
-	 * ns8250 uart code uses DELAY so ticker should be inititalized 
-	 * before cninit. And tick_init_params refers to hz, so * init_param1 
-	 * should be called first.
-	 */
-	init_param1();
-	boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */
-//	boothowto |= RB_VERBOSE;
-//	boothowto |= (RB_SINGLE);
-
-	/* Detect the system type - this is needed for subsequent chipset-specific calls */
-
-	ar531x_device_soc_init();
-	ar531x_detect_sys_frequency();
-
-	platform_counter_freq = ar531x_cpu_freq();
-	mips_timer_init_params(platform_counter_freq, 1);
-	cninit();
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-
-	printf("CPU platform: %s\n", ar5315_get_system_type());
-	printf("CPU Frequency=%d MHz\n", ar531x_cpu_freq() / 1000000);
-	printf("CPU DDR Frequency=%d MHz\n", ar531x_ddr_freq() / 1000000);
-	printf("CPU AHB Frequency=%d MHz\n", ar531x_ahb_freq() / 1000000); 
-
-	printf("platform frequency: %lld\n", platform_counter_freq);
-	printf("arguments: \n");
-	printf("  a0 = %08x\n", a0);
-	printf("  a1 = %08x\n", a1);
-	printf("  a2 = %08x\n", a2);
-	printf("  a3 = %08x\n", a3);
-
-	strcpy(cpu_model, ar5315_get_system_type());
-
-	/*
-	 * XXX this code is very redboot specific.
-	 */
-	printf("Cmd line:");
-	if (MIPS_IS_VALID_PTR(argv)) {
-		for (i = 0; i < argc; i++) {
-			printf(" %s", argv[i]);
-			boothowto |= boot_parse_arg(argv[i]);
-		}
-	}
-	else
-		printf ("argv is invalid");
-	printf("\n");
-
-	printf("Environment:\n");
-#if 0
-	if (MIPS_IS_VALID_PTR(envp)) {
-		if (envp[0] && strchr(envp[0], '=') ) {
-			char *env_val; //
-			for (i = 0; envp[i]; i++) {
-				env_val = strchr(envp[i], '=');
-				/* Not sure if we correct to change data, but env in RAM */
-				*(env_val++) = '\0';
-				printf("=  %s = %s\n", envp[i], env_val);
-				kern_setenv(envp[i], env_val);
-			}
-		} else {
-			for (i = 0; envp[i]; i+=2) {
-				printf("  %s = %s\n", envp[i], envp[i+1]);
-				kern_setenv(envp[i], envp[i+1]);
-			}
-		}
-	}
-	else 
-		printf ("envp is invalid\n");
-#else
-	printf ("envp skiped\n");
-#endif
-
-	/* Redboot if_are MAC address is in the environment */
-	ar5315_redboot_get_macaddr();
-
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-
-	ar531x_device_start();
-
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-
-}
diff --git a/sys/mips/atheros/ar531x/ar5315_setup.c b/sys/mips/atheros/ar531x/ar5315_setup.c
deleted file mode 100644
index a0d6453f260e..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_setup.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_ar531x.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5312reg.h>
-#include <mips/atheros/ar531x/ar5315_setup.h>
-
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-
-#include <mips/atheros/ar531x/ar5315_chip.h>
-#include <mips/atheros/ar531x/ar5312_chip.h>
-#include <mips/atheros/ar724x_chip.h>
-#include <mips/atheros/ar91xx_chip.h>
-
-#include <dev/ath/ath_hal/ah_soc.h>
-
-#define	AR5315_SYS_TYPE_LEN		128
-
-static char ar5315_sys_type[AR5315_SYS_TYPE_LEN];
-enum ar531x_soc_type ar531x_soc;
-struct ar5315_cpu_def * ar5315_cpu_ops = NULL;
-
-void
-ar5315_detect_sys_type(void)
-{
-	char *chip = "????";
-	uint32_t ver = 0;
-	uint32_t rev = 0;
-#if 0
-	const uint8_t *ptr, *end;
-	static const struct ar531x_boarddata *board = NULL;
-
-	ptr = (const uint8_t *) MIPS_PHYS_TO_KSEG1(AR5315_CONFIG_END
-		- 0x1000);
-
-	end = (const uint8_t *)AR5315_CONFIG_BASE;
-
-	for (; ptr > end; ptr -= 0x1000) {
-		if (*(const uint32_t *)ptr == AR531X_BD_MAGIC) {
-			board = (const struct ar531x_boarddata *) ptr;
-			rev = board->major;
-			break;
-		}
-	}
-#endif
-	int soctype;
-
-#ifdef AR531X_1ST_GENERATION
-	soctype = AR_FIRST_GEN;
-#else
-	soctype = AR_SECOND_GEN;
-#endif
-
-	if(soctype == AR_SECOND_GEN) {
-		ar5315_cpu_ops = &ar5315_chip_def;
-
-		ver = ATH_READ_REG(AR5315_SYSREG_BASE +
-			AR5315_SYSREG_SREV);
-
-		switch (ver) {
-		case 0x86:
-			ar531x_soc = AR531X_SOC_AR5315;
-			chip = "2315";
-			break;
-		case 0x87:
-			ar531x_soc = AR531X_SOC_AR5316;
-			chip = "2316";
-			break;
-		case 0x90:
-			ar531x_soc = AR531X_SOC_AR5317;
-			chip = "2317";
-			break;
-		case 0x91:
-			ar531x_soc = AR531X_SOC_AR5318;
-			chip = "2318";
-			break;
-		}
-	} else {
-		ar5315_cpu_ops = &ar5312_chip_def;
-
-		ver = ATH_READ_REG(AR5312_SYSREG_BASE +
-			AR5312_SYSREG_REVISION);
-		rev = AR5312_REVISION_MINOR(ver);
-
-		switch (AR5312_REVISION_MAJOR(ver)) {
-		case AR5312_REVISION_MAJ_AR5311:
-			ar531x_soc = AR531X_SOC_AR5311;
-			chip = "5311";
-			break;
-		case AR5312_REVISION_MAJ_AR5312:
-			ar531x_soc = AR531X_SOC_AR5312;
-			chip = "5312";
-			break;
-		case AR5312_REVISION_MAJ_AR2313:
-			ar531x_soc = AR531X_SOC_AR5313;
-			chip = "2313";
-			break;
-		}
-	}
-
-	sprintf(ar5315_sys_type, "Atheros AR%s rev %u", chip, rev);
-}
-
-const char *
-ar5315_get_system_type(void)
-{
-	return ar5315_sys_type;
-}
diff --git a/sys/mips/atheros/ar531x/ar5315_setup.h b/sys/mips/atheros/ar531x/ar5315_setup.h
deleted file mode 100644
index 1cd178179760..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_setup.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*-
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR5315_SETUP_H__
-#define	__AR5315_SETUP_H__
-
-enum ar531x_soc_type {
-        AR531X_SOC_UNKNOWN,
-        AR531X_SOC_AR5311,
-        AR531X_SOC_AR5312,
-        AR531X_SOC_AR5313,
-        AR531X_SOC_AR5314,
-        AR531X_SOC_AR5315,
-        AR531X_SOC_AR5316,
-        AR531X_SOC_AR5317,
-        AR531X_SOC_AR5318,
-};
-extern enum ar531x_soc_type ar531x_soc;
-
-extern void ar5315_detect_sys_type(void);
-extern const char *ar5315_get_system_type(void);
-
-#define AR_FIRST_GEN	1
-#define AR_SECOND_GEN	2
-
-#endif
diff --git a/sys/mips/atheros/ar531x/ar5315_spi.c b/sys/mips/atheros/ar531x/ar5315_spi.c
deleted file mode 100644
index 213a00b7f430..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_spi.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/pmap.h>
-
-#include <dev/spibus/spi.h>
-#include <dev/spibus/spibusvar.h>
-#include "spibus_if.h"
-
-#include <mips/atheros/ar531x/arspireg.h>
-#include <mips/atheros/ar531x/ar5315reg.h>
-
-#undef AR531X_SPI_DEBUG
-#ifdef AR531X_SPI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * register space access macros
- */
-#define SPI_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->sc_mem_res, (reg), (val)); \
-	} while (0)
-
-#define SPI_READ(sc, reg)	 bus_read_4(sc->sc_mem_res, (reg))
-
-#define SPI_SET_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
-
-#define SPI_CLEAR_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
-
-struct ar5315_spi_softc {
-	device_t		sc_dev;
-	struct resource		*sc_mem_res;
-	uint32_t		sc_reg_ctrl;
-	uint32_t		sc_debug;
-};
-
-static void
-ar5315_spi_attach_sysctl(device_t dev)
-{
-	struct ar5315_spi_softc *sc;
-	struct sysctl_ctx_list *ctx;
-	struct sysctl_oid *tree;
-
-	sc = device_get_softc(dev);
-	ctx = device_get_sysctl_ctx(dev);
-	tree = device_get_sysctl_tree(dev);
-
-	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"debug", CTLFLAG_RW, &sc->sc_debug, 0,
-		"ar5315_spi debugging flags");
-}
-
-static int
-ar5315_spi_probe(device_t dev)
-{
-	device_set_desc(dev, "AR5315 SPI");
-	return (0);
-}
-
-static int
-ar5315_spi_attach(device_t dev)
-{
-	struct ar5315_spi_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->sc_dev = dev;
-        rid = 0;
-	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 
-	    RF_ACTIVE);
-	if (!sc->sc_mem_res) {
-		device_printf(dev, "Could not map memory\n");
-		return (ENXIO);
-	}
-
-	device_add_child(dev, "spibus", -1);
-	ar5315_spi_attach_sysctl(dev);
-
-	return (bus_generic_attach(dev));
-}
-
-static void
-ar5315_spi_chip_activate(struct ar5315_spi_softc *sc, int cs)
-{
-}
-
-static void
-ar5315_spi_chip_deactivate(struct ar5315_spi_softc *sc, int cs)
-{
-}
-
-static int
-ar5315_spi_get_block(off_t offset, caddr_t data, off_t count)
-{
-	int i;
-	for(i = 0; i < count / 4; ++i) {
-		*((uint32_t *)data + i) = ATH_READ_REG(AR5315_MEM1_BASE + offset + i * 4);
-	}
-//	printf("ar5315_spi_get_blockr: %x %x %x\n", 
-//		(int)offset, (int)count, *(uint32_t *)data);
-	return (0);
-}
-
-static int
-ar5315_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
-{
-	struct ar5315_spi_softc *sc;
-	uint8_t *buf_in, *buf_out;
-	int lin, lout;
-	uint32_t ctl, cnt, op, rdat, cs;
-	int i, j;
-
-	sc = device_get_softc(dev);
-
-	if (sc->sc_debug & 0x8000)
-		printf("ar5315_spi_transfer: CMD ");
-
-	spibus_get_cs(child, &cs);
-
-	cs &= ~SPIBUS_CS_HIGH;
-
-	/* Open SPI controller interface */
-	ar5315_spi_chip_activate(sc, cs);
-
-	do {
-		ctl = SPI_READ(sc, ARSPI_REG_CTL);
-	} while (ctl & ARSPI_CTL_BUSY);
-
-	/*
-	 * Transfer command
-	 */
-	buf_out = (uint8_t *)cmd->tx_cmd;
-	op = buf_out[0];
-	if(op == 0x0b) {
-		int offset = buf_out[1] << 16 | buf_out[2] << 8 | buf_out[3];
-		ar5315_spi_get_block(offset, cmd->rx_data, cmd->rx_data_sz);
-		return (0);
-	}
-	do {
-		ctl = SPI_READ(sc, ARSPI_REG_CTL);
-	} while (ctl & ARSPI_CTL_BUSY);
-	if (sc->sc_debug & 0x8000) {
-		printf("%08x ", op);
-		printf("tx_cmd_sz=%d rx_cmd_sz=%d ", cmd->tx_cmd_sz,
-			cmd->rx_cmd_sz);
-		if(cmd->tx_cmd_sz != 1) {
-			printf("%08x ", *((uint32_t *)cmd->tx_cmd));
-			printf("%08x ", *((uint32_t *)cmd->tx_cmd + 1));
-		}
-	}
-	SPI_WRITE(sc, ARSPI_REG_OPCODE, op);
-
-	/* clear all of the tx and rx bits */
-	ctl &= ~(ARSPI_CTL_TXCNT_MASK | ARSPI_CTL_RXCNT_MASK);
-
-	/* now set txcnt */
-	cnt = 1;
-
-	ctl |= (cnt << ARSPI_CTL_TXCNT_SHIFT);
-
-	cnt = 24;
-	/* now set txcnt */
-	if(cmd->rx_cmd_sz < 24)
-		cnt = cmd->rx_cmd_sz;
-	ctl |= (cnt << ARSPI_CTL_RXCNT_SHIFT);
-
-	ctl |= ARSPI_CTL_START;
-
-	SPI_WRITE(sc, ARSPI_REG_CTL, ctl);
-
-	if(op == 0x0b)
-		SPI_WRITE(sc, ARSPI_REG_DATA, 0);
-	if (sc->sc_debug & 0x8000)
-		printf("\nDATA ");
-	/*
-	 * Receive/transmit data (depends on  command)
-	 */
-//	buf_out = (uint8_t *)cmd->tx_data;
-	buf_in = (uint8_t *)cmd->rx_cmd;
-//	lout = cmd->tx_data_sz;
-	lin = cmd->rx_cmd_sz;
-	if (sc->sc_debug & 0x8000)
-		printf("t%d r%d ", lout, lin);
-	for(i = 0; i <= (cnt - 1) / 4; ++i) {
-		do {
-			ctl = SPI_READ(sc, ARSPI_REG_CTL);
-		} while (ctl & ARSPI_CTL_BUSY);
-
-		rdat = SPI_READ(sc, ARSPI_REG_DATA);
-		if (sc->sc_debug & 0x8000)
-			printf("I%08x ", rdat);
-
-		for(j = 0; j < 4; ++j) {
-			buf_in[i * 4 + j + 1] = 0xff & (rdat >> (8 * j));
-			if(i * 4 + j  + 2 == cnt)
-				break;
-		}
-	}
-
-	ar5315_spi_chip_deactivate(sc, cs);
-	/*
-	 * Close SPI controller interface, restore flash memory mapped access.
-	 */
-	if (sc->sc_debug & 0x8000)
-		printf("\n");
-
-	return (0);
-}
-
-static int
-ar5315_spi_detach(device_t dev)
-{
-	struct ar5315_spi_softc *sc = device_get_softc(dev);
-
-	if (sc->sc_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-
-	return (0);
-}
-
-static device_method_t ar5315_spi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		ar5315_spi_probe),
-	DEVMETHOD(device_attach,	ar5315_spi_attach),
-	DEVMETHOD(device_detach,	ar5315_spi_detach),
-
-	DEVMETHOD(spibus_transfer,	ar5315_spi_transfer),
-//	DEVMETHOD(spibus_get_block,	ar5315_spi_get_block),
-
-	DEVMETHOD_END
-};
-
-static driver_t ar5315_spi_driver = {
-	"spi",
-	ar5315_spi_methods,
-	sizeof(struct ar5315_spi_softc),
-};
-
-static devclass_t ar5315_spi_devclass;
-
-DRIVER_MODULE(ar5315_spi, nexus, ar5315_spi_driver, ar5315_spi_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar531x/ar5315_wdog.c b/sys/mips/atheros/ar531x/ar5315_wdog.c
deleted file mode 100644
index f47d5b328082..000000000000
--- a/sys/mips/atheros/ar531x/ar5315_wdog.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*-
- * Copyright (c) 2016, Hiroki Mori
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Watchdog driver for AR5315
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/watchdog.h>
-#include <sys/bus.h>
-#include <sys/eventhandler.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/sysctl.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-
-struct ar5315_wdog_softc {
-	device_t dev;
-	int armed;
-	int reboot_from_watchdog;
-	int debug;
-};
-
-static void
-ar5315_wdog_watchdog_fn(void *private, u_int cmd, int *error)
-{
-	struct ar5315_wdog_softc *sc = private;
-	uint64_t timer_val;
-
-	cmd &= WD_INTERVAL;
-	if (sc->debug)
-		device_printf(sc->dev, "ar5315_wdog_watchdog_fn: cmd: %x\n", cmd);
-	if (cmd > 0) {
-		timer_val = (uint64_t)(1ULL << cmd) * ar531x_ahb_freq() /
-		    1000000000;
-		if (sc->debug)
-			device_printf(sc->dev, "ar5315_wdog_watchdog_fn: programming timer: %jx\n", (uintmax_t) timer_val);
-		/*
-		 * Load timer with large enough value to prevent spurious
-		 * reset
-		 */
-		ATH_WRITE_REG(ar531x_wdog_timer(), 
-		    ar531x_ahb_freq() * 10);
-		ATH_WRITE_REG(ar531x_wdog_ctl(), 
-		    AR5315_WDOG_CTL_RESET);
-		ATH_WRITE_REG(ar531x_wdog_timer(), 
-		    (timer_val & 0xffffffff));
-		sc->armed = 1;
-		*error = 0;
-	} else {
-		if (sc->debug)
-			device_printf(sc->dev, "ar5315_wdog_watchdog_fn: disarming\n");
-		if (sc->armed) {
-			ATH_WRITE_REG(ar531x_wdog_ctl(),
-			    AR5315_WDOG_CTL_IGNORE);
-			sc->armed = 0;
-		}
-	}
-}
-
-static int
-ar5315_wdog_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Atheros AR531x watchdog timer");
-	return (0);
-}
-
-static void
-ar5315_wdog_sysctl(device_t dev)
-{
-	struct ar5315_wdog_softc *sc = device_get_softc(dev);
-
-        struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
-        struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev);
-
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "debug", CTLFLAG_RW, &sc->debug, 0,
-                "enable watchdog debugging");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "armed", CTLFLAG_RD, &sc->armed, 0,
-                "whether the watchdog is armed");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "reboot_from_watchdog", CTLFLAG_RD, &sc->reboot_from_watchdog, 0,
-                "whether the system rebooted from the watchdog");
-}
-
-static int
-ar5315_wdog_attach(device_t dev)
-{
-	struct ar5315_wdog_softc *sc = device_get_softc(dev);
-
-	/* Initialise */
-	sc->reboot_from_watchdog = 0;
-	sc->armed = 0;
-	sc->debug = 0;
-	ATH_WRITE_REG(ar531x_wdog_ctl(), AR5315_WDOG_CTL_IGNORE);
-
-	sc->dev = dev;
-	EVENTHANDLER_REGISTER(watchdog_list, ar5315_wdog_watchdog_fn, sc, 0);
-	ar5315_wdog_sysctl(dev);
-
-	return (0);
-}
-
-static device_method_t ar5315_wdog_methods[] = {
-	DEVMETHOD(device_probe, ar5315_wdog_probe),
-	DEVMETHOD(device_attach, ar5315_wdog_attach),
-	DEVMETHOD_END
-};
-
-static driver_t ar5315_wdog_driver = {
-	"ar5315_wdog",
-	ar5315_wdog_methods,
-	sizeof(struct ar5315_wdog_softc),
-};
-static devclass_t ar5315_wdog_devclass;
-
-DRIVER_MODULE(ar5315_wdog, apb, ar5315_wdog_driver, ar5315_wdog_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar531x/ar5315reg.h b/sys/mips/atheros/ar531x/ar5315reg.h
deleted file mode 100644
index 5851d8bd4018..000000000000
--- a/sys/mips/atheros/ar531x/ar5315reg.h
+++ /dev/null
@@ -1,244 +0,0 @@
-/* $Id: ar5315reg.h,v 1.3 2011/07/07 05:06:44 matt Exp $ */
-/*
- * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
- * Copyright (c) 2006 Garrett D'Amore.
- * All rights reserved.
- *
- * This code was written by Garrett D'Amore for the Champaign-Urbana
- * Community Wireless Network Project.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. All advertising materials mentioning features or use of this
- *    software must display the following acknowledgements:
- *      This product includes software developed by the Urbana-Champaign
- *      Independent Media Center.
- *	This product includes software developed by Garrett D'Amore.
- * 4. Urbana-Champaign Independent Media Center's name and Garrett
- *    D'Amore's name may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_ATHEROS_AR5315REG_H_
-#define	_MIPS_ATHEROS_AR5315REG_H_
-
-#define	AR5315_MEM0_BASE		0x00000000	/* sdram */
-#define	AR5315_MEM1_BASE		0x08000000	/* spi flash */
-#define	AR5315_WLAN_BASE		0x10000000
-#define	AR5315_PCI_BASE			0x10100000
-#define	AR5315_SDRAMCTL_BASE		0x10300000
-#define	AR5315_LOCAL_BASE		0x10400000	/* local bus */
-#define	AR5315_ENET_BASE		0x10500000
-#define	AR5315_SYSREG_BASE		0x11000000
-#define	AR5315_UART_BASE		0x11100000
-#define	AR5315_SPI_BASE			0x11300000	/* spi flash */
-#define	AR5315_BOOTROM_BASE		0x1FC00000	/* boot rom */
-#define	AR5315_CONFIG_BASE		0x087D0000	/* flash start */
-#define	AR5315_CONFIG_END		0x087FF000	/* flash end */
-#define	AR5315_RADIO_END		0x1FFFF000	/* radio end */
-
-#if 0
-#define	AR5315_PCIEXT_BASE		0x80000000	/* pci external */
-#define	AR5315_RAM2_BASE		0xc0000000
-#define	AR5315_RAM3_BASE		0xe0000000
-#endif
-
-/*
- * SYSREG registers  -- offset relative to AR531X_SYSREG_BASE
- */
-#define	AR5315_SYSREG_COLDRESET		0x0000
-#define	AR5315_SYSREG_RESETCTL		0x0004
-#define	AR5315_SYSREG_AHB_ARB_CTL	0x0008
-#define	AR5315_SYSREG_ENDIAN		0x000c
-#define	AR5315_SYSREG_NMI_CTL		0x0010
-#define	AR5315_SYSREG_SREV		0x0014
-#define	AR5315_SYSREG_IF_CTL		0x0018
-#define	AR5315_SYSREG_MISC_INTSTAT	0x0020
-#define	AR5315_SYSREG_MISC_INTMASK	0x0024
-#define	AR5315_SYSREG_GISR		0x0028
-#define	AR5315_SYSREG_TIMER		0x0030
-#define	AR5315_SYSREG_RELOAD		0x0034
-#define	AR5315_SYSREG_WDOG_TIMER	0x0038
-#define	AR5315_SYSREG_WDOG_CTL		0x003c
-#define	AR5315_SYSREG_PERFCNT0		0x0048
-#define	AR5315_SYSREG_PERFCNT1		0x004c
-#define	AR5315_SYSREG_AHB_ERR0		0x0050
-#define	AR5315_SYSREG_AHB_ERR1		0x0054
-#define	AR5315_SYSREG_AHB_ERR2		0x0058
-#define	AR5315_SYSREG_AHB_ERR3		0x005c
-#define	AR5315_SYSREG_AHB_ERR4		0x0060
-#define	AR5315_SYSREG_PLLC_CTL		0x0064
-#define	AR5315_SYSREG_PLLV_CTL		0x0068
-#define	AR5315_SYSREG_CPUCLK		0x006c
-#define	AR5315_SYSREG_AMBACLK		0x0070
-#define	AR5315_SYSREG_SYNCCLK		0x0074
-#define	AR5315_SYSREG_DSL_SLEEP_CTL	0x0080
-#define	AR5315_SYSREG_DSL_SLEEP_DUR	0x0084
-#define	AR5315_SYSREG_GPIO_DI		0x0088
-#define	AR5315_SYSREG_GPIO_DO		0x0090
-#define	AR5315_SYSREG_GPIO_CR		0x0098
-#define	AR5315_SYSREG_GPIO_INT		0x00a0
-
-#define AR5315_GPIO_PINS		23
-
-/* Cold resets (AR5315_SYSREG_COLDRESET) */
-#define	AR5315_COLD_AHB				0x00000001
-#define	AR5315_COLD_APB				0x00000002
-#define	AR5315_COLD_CPU				0x00000004
-#define	AR5315_COLD_CPU_WARM			0x00000008
-
-/* Resets (AR5315_SYSREG_RESETCTL) */
-#define	AR5315_RESET_WARM_WLAN0_MAC		0x00000001
-#define	AR5315_RESET_WARM_WLAN0_BB		0x00000002
-#define	AR5315_RESET_MPEGTS			0x00000004	/* MPEG-TS */
-#define	AR5315_RESET_PCIDMA			0x00000008	/* PCI dma */
-#define	AR5315_RESET_MEMCTL			0x00000010
-#define	AR5315_RESET_LOCAL			0x00000020	/* local bus */
-#define	AR5315_RESET_I2C			0x00000040	/* i2c */
-#define	AR5315_RESET_SPI			0x00000080	/* SPI */
-#define	AR5315_RESET_UART			0x00000100
-#define	AR5315_RESET_IR				0x00000200	/* infrared */
-#define	AR5315_RESET_PHY0			0x00000400	/* enet phy */
-#define	AR5315_RESET_ENET0			0x00000800
-
-/* Watchdog control (AR5315_SYSREG_WDOG_CTL) */
-#define	AR5315_WDOG_CTL_IGNORE			0x0000
-#define	AR5315_WDOG_CTL_NMI			0x0001
-#define	AR5315_WDOG_CTL_RESET			0x0002
-
-/* AR5315 AHB arbitration control (AR5315_SYSREG_AHB_ARB_CTL) */
-#define	AR5315_ARB_CPU				0x00001
-#define	AR5315_ARB_WLAN				0x00002
-#define	AR5315_ARB_MPEGTS			0x00004
-#define	AR5315_ARB_LOCAL			0x00008
-#define	AR5315_ARB_PCI				0x00010
-#define	AR5315_ARB_ENET				0x00020
-#define	AR5315_ARB_RETRY			0x00100
-
-/* AR5315 endianness control (AR5315_SYSREG_ENDIAN) */
-#define	AR5315_ENDIAN_AHB			0x00001
-#define	AR5315_ENDIAN_WLAN			0x00002
-#define	AR5315_ENDIAN_MPEGTS			0x00004
-#define	AR5315_ENDIAN_PCI			0x00008
-#define	AR5315_ENDIAN_MEMCTL			0x00010
-#define	AR5315_ENDIAN_LOCAL			0x00020
-#define	AR5315_ENDIAN_ENET			0x00040
-#define	AR5315_ENDIAN_MERGE			0x00200
-#define	AR5315_ENDIAN_CPU			0x00400
-#define	AR5315_ENDIAN_PCIAHB			0x00800
-#define	AR5315_ENDIAN_PCIAHB_BRIDGE		0x01000
-#define	AR5315_ENDIAN_SPI			0x08000
-#define	AR5315_ENDIAN_CPU_DRAM			0x10000
-#define	AR5315_ENDIAN_CPU_PCI			0x20000
-#define	AR5315_ENDIAN_CPU_MMR			0x40000
-
-/* AR5315 AHB error bits */
-#define	AR5315_AHB_ERROR_DET			1	/* error detected */
-#define	AR5315_AHB_ERROR_OVR			2	/* AHB overflow */
-#define	AR5315_AHB_ERROR_WDT			4	/* wdt (not hresp) */
-
-/* AR5315 clocks */
-#define	AR5315_PLLC_REF_DIV(reg)		((reg) & 0x3)
-#define	AR5315_PLLC_FB_DIV(reg)			(((reg) & 0x7c) >> 2)
-#define	AR5315_PLLC_DIV_2(reg)			(((reg) & 0x80) >> 7)
-#define	AR5315_PLLC_CLKC(reg)			(((reg) & 0x1c000) >> 14)
-#define	AR5315_PLLC_CLKM(reg)			(((reg) & 0x700000) >> 20)
-
-#define	AR5315_CLOCKCTL_SELECT(reg)		((reg) & 0x3)
-#define	AR5315_CLOCKCTL_DIV(reg)		(((reg) & 0xc) >> 2)
-
-/*
- * SDRAMCTL registers  -- offset relative to SDRAMCTL
- */
-#define	AR5315_SDRAMCTL_MEM_CFG			0x0000
-#define	AR5315_MEM_CFG_DATA_WIDTH		__BITS(13,14)
-#define	AR5315_MEM_CFG_COL_WIDTH		__BITS(9,12)
-#define	AR5315_MEM_CFG_ROW_WIDTH		__BITS(5,8)
-
-/* memory config 1 bits */
-#define	AR531X_MEM_CFG1_BANK0		__BITS(8,10)
-#define	AR531X_MEM_CFG1_BANK1		__BITS(12,14)
-
-/*
- * PCI configuration stuff.  I don't pretend to fully understand these
- * registers, they seem to be magic numbers in the Linux code.
- */
-#define	AR5315_PCI_MAC_RC			0x4000
-#define	AR5315_PCI_MAC_SCR			0x4004
-#define	AR5315_PCI_MAC_INTPEND			0x4008
-#define	AR5315_PCI_MAC_SFR			0x400c
-#define	AR5315_PCI_MAC_PCICFG			0x4010
-#define	AR5315_PCI_MAC_SREV			0x4020
-
-#define	PCI_MAC_RC_MAC				0x1
-#define	PCI_MAC_RC_BB				0x2
-
-#define	PCI_MAC_SCR_SLM_MASK			0x00030000
-#define	PCI_MAC_SCR_SLM_FWAKE			0x00000000
-#define	PCI_MAC_SCR_SLM_FSLEEP			0x00010000
-#define	PCI_MAC_SCR_SLM_NORMAL			0x00020000
-
-#define PCI_MAC_PCICFG_SPWR_DN			0x00010000
-
-/* IRQS */
-#define	AR5315_CPU_IRQ_MISC			0
-#define	AR5315_CPU_IRQ_WLAN			1
-#define	AR5315_CPU_IRQ_ENET			2
-
-#define	AR5315_MISC_IRQ_UART			0
-#define	AR5315_MISC_IRQ_I2C			1
-#define	AR5315_MISC_IRQ_SPI			2
-#define	AR5315_MISC_IRQ_AHBE			3
-#define	AR5315_MISC_IRQ_AHPE			4
-#define	AR5315_MISC_IRQ_TIMER			5
-#define	AR5315_MISC_IRQ_GPIO			6
-#define	AR5315_MISC_IRQ_WDOG			7
-#define	AR5315_MISC_IRQ_IR			8
-
-#define AR5315_APB_BASE         AR5315_SYSREG_BASE
-#define AR5315_APB_SIZE         0x06000000
-
-#define ATH_READ_REG(reg) \
-    *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg)))
-
-#define ATH_WRITE_REG(reg, val) \
-    *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val)
-
-/* Helpers from NetBSD cdefs.h */
-/* __BIT(n): nth bit, where __BIT(0) == 0x1. */
-#define __BIT(__n)      \
-        (((__n) >= NBBY * sizeof(uintmax_t)) ? 0 : ((uintmax_t)1 << (__n)))
-
-/* __BITS(m, n): bits m through n, m < n. */
-#define __BITS(__m, __n)        \
-        ((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1))
-
-/* find least significant bit that is set */
-#define	__LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask))
-
-#define	__SHIFTOUT(__x, __mask)	(((__x) & (__mask)) / __LOWEST_SET_BIT(__mask))
-#define	__SHIFTOUT_MASK(__mask) __SHIFTOUT((__mask), (__mask))
-#endif	/* _MIPS_ATHEROS_AR531XREG_H_ */
diff --git a/sys/mips/atheros/ar531x/arspireg.h b/sys/mips/atheros/ar531x/arspireg.h
deleted file mode 100644
index 04f0ba42d460..000000000000
--- a/sys/mips/atheros/ar531x/arspireg.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* $NetBSD: arspireg.h,v 1.1 2006/10/14 15:33:23 gdamore Exp $ */
-
-/*-
- * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
- * Copyright (c) 2006 Garrett D'Amore.
- * All rights reserved.
- *
- * Portions of this code were written by Garrett D'Amore for the
- * Champaign-Urbana Community Wireless Network Project.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. All advertising materials mentioning features or use of this
- *    software must display the following acknowledgements:
- *      This product includes software developed by the Urbana-Champaign
- *      Independent Media Center.
- *	This product includes software developed by Garrett D'Amore.
- * 4. Urbana-Champaign Independent Media Center's name and Garrett
- *    D'Amore's name may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
- * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_ATHEROS_DEV_ARSPIREG_H
-#define	_MIPS_ATHEROS_DEV_ARSPIREG_H
-
-#define	ARSPI_REG_CTL		0x00
-#define	ARSPI_REG_OPCODE	0x04
-#define	ARSPI_REG_DATA		0x08
-
-#define	ARSPI_CTL_START		0x00000100
-#define	ARSPI_CTL_BUSY		0x00010000
-#define	ARSPI_CTL_TXCNT_MASK	0x0000000f
-#define	ARSPI_CTL_TXCNT_SHIFT	0
-#define	ARSPI_CTL_RXCNT_MASK	0x000000f0
-#define	ARSPI_CTL_RXCNT_SHIFT	4
-#define	ARSPI_CTL_SIZE_MASK	0x00060000
-#define	ARSPI_CTL_CLKSEL_MASK	0x03000000
-
-#endif /* _MIPS_ATHEROS_DEV_ARSPIREG_H */
diff --git a/sys/mips/atheros/ar531x/files.ar5315 b/sys/mips/atheros/ar531x/files.ar5315
deleted file mode 100644
index 0d85d4134714..000000000000
--- a/sys/mips/atheros/ar531x/files.ar5315
+++ /dev/null
@@ -1,20 +0,0 @@
-# $FreeBSD$
-
-mips/atheros/ar531x/apb.c			standard
-mips/atheros/ar531x/if_are.c			optional are
-mips/atheros/ar531x/ar5315_spi.c		optional ar5315_spi
-mips/atheros/ar531x/ar5315_wdog.c		optional ar5315_wdog
-mips/atheros/ar531x/ar5315_gpio.c		optional gpio
-mips/atheros/ar531x/ar5315_machdep.c		standard
-mips/atheros/ar531x/ar5315_chip.c		standard
-mips/atheros/ar531x/ar5315_setup.c		standard
-mips/atheros/ar531x/uart_bus_ar5315.c		optional uart_ar5315
-mips/atheros/ar531x/uart_cpu_ar5315.c		optional uart_ar5315
-
-mips/atheros/ar531x/ar5312_chip.c		standard
-
-mips/atheros/ar71xx_bus_space_reversed.c	standard
-mips/mips/tick.c				standard
-
-# Non Intrng
-mips/mips/intr_machdep.c			optional !intrng
diff --git a/sys/mips/atheros/ar531x/if_are.c b/sys/mips/atheros/ar531x/if_are.c
deleted file mode 100644
index 5460c6fffcaa..000000000000
--- a/sys/mips/atheros/ar531x/if_are.c
+++ /dev/null
@@ -1,1758 +0,0 @@
-/*-
- * Copyright (c) 2016 Hiroki Mori. All rights reserved.
- * Copyright (C) 2007 
- *	Oleksandr Tymoshenko <gonzo@freebsd.org>. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $Id: $
- * 
- */
-
-#include "opt_platform.h"
-#include "opt_ar531x.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * AR531x Ethernet interface driver
- * copy from mips/idt/if_kr.c and netbsd code
- */
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/socket.h>
-#include <sys/taskqueue.h>
-#include <sys/kdb.h>
-
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-
-#include <net/bpf.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-
-#ifdef INTRNG
-#include <machine/intr.h>
-#endif
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#ifdef ARE_MDIO
-#include <dev/mdio/mdio.h>
-#include <dev/etherswitch/miiproxy.h>
-#include "mdio_if.h"
-#endif
-
-MODULE_DEPEND(are, ether, 1, 1, 1);
-MODULE_DEPEND(are, miibus, 1, 1, 1);
-
-#include "miibus_if.h"
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5312reg.h>
-#include <mips/atheros/ar531x/ar5315_setup.h>
-#include <mips/atheros/ar531x/if_arereg.h>
-
-#ifdef ARE_DEBUG
-void dump_txdesc(struct are_softc *, int);
-void dump_status_reg(struct are_softc *);
-#endif
-
-static int are_attach(device_t);
-static int are_detach(device_t);
-static int are_ifmedia_upd(struct ifnet *);
-static void are_ifmedia_sts(struct ifnet *, struct ifmediareq *);
-static int are_ioctl(struct ifnet *, u_long, caddr_t);
-static void are_init(void *);
-static void are_init_locked(struct are_softc *);
-static void are_link_task(void *, int);
-static int are_miibus_readreg(device_t, int, int);
-static void are_miibus_statchg(device_t);
-static int are_miibus_writereg(device_t, int, int, int);
-static int are_probe(device_t);
-static void are_reset(struct are_softc *);
-static int are_resume(device_t);
-static int are_rx_ring_init(struct are_softc *);
-static int are_tx_ring_init(struct are_softc *);
-static int are_shutdown(device_t);
-static void are_start(struct ifnet *);
-static void are_start_locked(struct ifnet *);
-static void are_stop(struct are_softc *);
-static int are_suspend(device_t);
-
-static void are_rx(struct are_softc *);
-static void are_tx(struct are_softc *);
-static void are_intr(void *);
-static void are_tick(void *);
-
-static void are_dmamap_cb(void *, bus_dma_segment_t *, int, int);
-static int are_dma_alloc(struct are_softc *);
-static void are_dma_free(struct are_softc *);
-static int are_newbuf(struct are_softc *, int);
-static __inline void are_fixup_rx(struct mbuf *);
-
-static void are_hinted_child(device_t bus, const char *dname, int dunit);
-
-static device_method_t are_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		are_probe),
-	DEVMETHOD(device_attach,	are_attach),
-	DEVMETHOD(device_detach,	are_detach),
-	DEVMETHOD(device_suspend,	are_suspend),
-	DEVMETHOD(device_resume,	are_resume),
-	DEVMETHOD(device_shutdown,	are_shutdown),
-
-	/* MII interface */
-	DEVMETHOD(miibus_readreg,	are_miibus_readreg),
-	DEVMETHOD(miibus_writereg,	are_miibus_writereg),
-	DEVMETHOD(miibus_statchg,	are_miibus_statchg),
-
-	/* bus interface */
-	DEVMETHOD(bus_add_child,	device_add_child_ordered),
-	DEVMETHOD(bus_hinted_child,	are_hinted_child),
-
-	DEVMETHOD_END
-};
-
-static driver_t are_driver = {
-	"are",
-	are_methods,
-	sizeof(struct are_softc)
-};
-
-static devclass_t are_devclass;
-
-DRIVER_MODULE(are, nexus, are_driver, are_devclass, 0, 0);
-#ifdef ARE_MII
-DRIVER_MODULE(miibus, are, miibus_driver, miibus_devclass, 0, 0);
-#endif
-
-#ifdef ARE_MDIO
-static int aremdio_probe(device_t);
-static int aremdio_attach(device_t);
-static int aremdio_detach(device_t);
-
-/*
- * Declare an additional, separate driver for accessing the MDIO bus.
- */
-static device_method_t aremdio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		aremdio_probe),
-	DEVMETHOD(device_attach,	aremdio_attach),
-	DEVMETHOD(device_detach,	aremdio_detach),
-
-	/* bus interface */
-	DEVMETHOD(bus_add_child,	device_add_child_ordered),
-        
-	/* MDIO access */
-	DEVMETHOD(mdio_readreg,		are_miibus_readreg),
-	DEVMETHOD(mdio_writereg,	are_miibus_writereg),
-};
-
-DEFINE_CLASS_0(aremdio, aremdio_driver, aremdio_methods,
-    sizeof(struct are_softc));
-static devclass_t aremdio_devclass;
-
-DRIVER_MODULE(miiproxy, are, miiproxy_driver, miiproxy_devclass, 0, 0);
-DRIVER_MODULE(aremdio, nexus, aremdio_driver, aremdio_devclass, 0, 0);
-DRIVER_MODULE(mdio, aremdio, mdio_driver, mdio_devclass, 0, 0);
-#endif
-
-static int 
-are_probe(device_t dev)
-{
-
-	device_set_desc(dev, "AR531x Ethernet interface");
-	return (0);
-}
-
-static int
-are_attach(device_t dev)
-{
-	struct ifnet		*ifp;
-	struct are_softc		*sc;
-	int			error = 0;
-#ifdef INTRNG
-	int			enetirq;
-#else
-	int			rid;
-#endif
-	int			unit;
-	char *			local_macstr;
-	int			count;
-	int			i;
-
-	sc = device_get_softc(dev);
-	unit = device_get_unit(dev);
-	sc->are_dev = dev;
-
-	/* hardcode macaddress */
-	sc->are_eaddr[0] = 0x00;
-	sc->are_eaddr[1] = 0x0C;
-	sc->are_eaddr[2] = 0x42;
-	sc->are_eaddr[3] = 0x09;
-	sc->are_eaddr[4] = 0x5E;
-	sc->are_eaddr[5] = 0x6B;
-
-	/* try to get from hints */
-	if (!resource_string_value(device_get_name(dev),
-		device_get_unit(dev), "macaddr", (const char **)&local_macstr)) {
-		uint32_t tmpmac[ETHER_ADDR_LEN];
-
-		/* Have a MAC address; should use it */
-		device_printf(dev, "Overriding MAC address from environment: '%s'\n",
-		    local_macstr);
-
-		/* Extract out the MAC address */
-		/* XXX this should all be a generic method */
-		count = sscanf(local_macstr, "%x%*c%x%*c%x%*c%x%*c%x%*c%x",
-		    &tmpmac[0], &tmpmac[1],
-		    &tmpmac[2], &tmpmac[3],
-		    &tmpmac[4], &tmpmac[5]);
-		if (count == 6) {
-			/* Valid! */
-			for (i = 0; i < ETHER_ADDR_LEN; i++)
-				sc->are_eaddr[i] = tmpmac[i];
-		}
-	}
-
-	mtx_init(&sc->are_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
-	    MTX_DEF);
-	callout_init_mtx(&sc->are_stat_callout, &sc->are_mtx, 0);
-	TASK_INIT(&sc->are_link_task, 0, are_link_task, sc);
-
-	/* Map control/status registers. */
-	sc->are_rid = 0;
-	sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->are_rid, 
-	    RF_ACTIVE | RF_SHAREABLE);
-
-	if (sc->are_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	sc->are_btag = rman_get_bustag(sc->are_res);
-	sc->are_bhandle = rman_get_bushandle(sc->are_res);
-
-#ifndef INTRNG
-	/* Allocate interrupts */
-	rid = 0;
-	sc->are_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 
-	    RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->are_irq == NULL) {
-		device_printf(dev, "couldn't map interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-#endif
-
-	/* Allocate ifnet structure. */
-	ifp = sc->are_ifp = if_alloc(IFT_ETHER);
-
-	if (ifp == NULL) {
-		device_printf(dev, "couldn't allocate ifnet structure\n");
-		error = ENOSPC;
-		goto fail;
-	}
-	ifp->if_softc = sc;
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	ifp->if_ioctl = are_ioctl;
-	ifp->if_start = are_start;
-	ifp->if_init = are_init;
-	sc->are_if_flags = ifp->if_flags;
-
-	/* ifqmaxlen is sysctl value in net/if.c */
-	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
-	ifp->if_snd.ifq_maxlen = ifqmaxlen;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	/* Tell the upper layer(s) we support long frames. */
-	ifp->if_capabilities |= IFCAP_VLAN_MTU;
-
-	ifp->if_capenable = ifp->if_capabilities;
-
-	if (are_dma_alloc(sc) != 0) {
-		error = ENXIO;
-		goto fail;
-	}
-
-	CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR);
-	DELAY(1000);
-
-#ifdef ARE_MDIO
-	sc->are_miiproxy = mii_attach_proxy(sc->are_dev);
-#endif
-
-#ifdef ARE_MII
-	/* Do MII setup. */
-	error = mii_attach(dev, &sc->are_miibus, ifp, are_ifmedia_upd,
-	    are_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
-	if (error != 0) {
-		device_printf(dev, "attaching PHYs failed\n");
-		goto fail;
-	}
-#else
-	ifmedia_init(&sc->are_ifmedia, 0, are_ifmedia_upd, are_ifmedia_sts);
-
-	ifmedia_add(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
-	ifmedia_set(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO);
-#endif
-
-	/* Call MI attach routine. */
-	ether_ifattach(ifp, sc->are_eaddr);
-
-#ifdef INTRNG
-	char *name;
-	if (ar531x_soc >= AR531X_SOC_AR5315) {
-		enetirq = AR5315_CPU_IRQ_ENET;
-		name = "enet";
-	} else {
-		if (device_get_unit(dev) == 0) {
-			enetirq = AR5312_IRQ_ENET0;
-			name = "enet0";
-		} else {
-			enetirq = AR5312_IRQ_ENET1;
-			name = "enet1";
-		}
-	}
-	cpu_establish_hardintr(name, NULL, are_intr, sc, enetirq,
-	    INTR_TYPE_NET, NULL);
-#else
-	/* Hook interrupt last to avoid having to lock softc */
-	error = bus_setup_intr(dev, sc->are_irq, INTR_TYPE_NET | INTR_MPSAFE,
-	    NULL, are_intr, sc, &sc->are_intrhand);
-
-	if (error) {
-		device_printf(dev, "couldn't set up irq\n");
-		ether_ifdetach(ifp);
-		goto fail;
-	}
-#endif
-
-fail:
-	if (error) 
-		are_detach(dev);
-
-	return (error);
-}
-
-static int
-are_detach(device_t dev)
-{
-	struct are_softc		*sc = device_get_softc(dev);
-	struct ifnet		*ifp = sc->are_ifp;
-
-	KASSERT(mtx_initialized(&sc->are_mtx), ("vr mutex not initialized"));
-
-	/* These should only be active if attach succeeded */
-	if (device_is_attached(dev)) {
-		ARE_LOCK(sc);
-		sc->are_detach = 1;
-		are_stop(sc);
-		ARE_UNLOCK(sc);
-		taskqueue_drain(taskqueue_swi, &sc->are_link_task);
-		ether_ifdetach(ifp);
-	}
-#ifdef ARE_MII
-	if (sc->are_miibus)
-		device_delete_child(dev, sc->are_miibus);
-#endif
-	bus_generic_detach(dev);
-
-	if (sc->are_intrhand)
-		bus_teardown_intr(dev, sc->are_irq, sc->are_intrhand);
-	if (sc->are_irq)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->are_irq);
-
-	if (sc->are_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->are_rid, 
-		    sc->are_res);
-
-	if (ifp)
-		if_free(ifp);
-
-	are_dma_free(sc);
-
-	mtx_destroy(&sc->are_mtx);
-
-	return (0);
-
-}
-
-static int
-are_suspend(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-are_resume(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-are_shutdown(device_t dev)
-{
-	struct are_softc	*sc;
-
-	sc = device_get_softc(dev);
-
-	ARE_LOCK(sc);
-	are_stop(sc);
-	ARE_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-are_miibus_readreg(device_t dev, int phy, int reg)
-{
-	struct are_softc * sc = device_get_softc(dev);
-	uint32_t	addr;
-	int		i;
-
-	addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT);
-	CSR_WRITE_4(sc, CSR_MIIADDR, addr);
-	for (i = 0; i < 100000000; i++) {
-		if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)
-			break;
-	}
-
-	return (CSR_READ_4(sc, CSR_MIIDATA) & 0xffff);
-}
-
-static int
-are_miibus_writereg(device_t dev, int phy, int reg, int data)
-{
-	struct are_softc * sc = device_get_softc(dev);
-	uint32_t	addr;
-	int		i;
-
-	/* write the data register */
-	CSR_WRITE_4(sc, CSR_MIIDATA, data);
-
-	/* write the address to latch it in */
-	addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT) |
-	    MIIADDR_WRITE;
-	CSR_WRITE_4(sc, CSR_MIIADDR, addr);
-
-	for (i = 0; i < 100000000; i++) {
-		if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)
-			break;
-	}
-
-	return (0);
-}
-
-static void
-are_miibus_statchg(device_t dev)
-{
-	struct are_softc		*sc;
-
-	sc = device_get_softc(dev);
-	taskqueue_enqueue(taskqueue_swi, &sc->are_link_task);
-}
-
-static void
-are_link_task(void *arg, int pending)
-{
-#ifdef ARE_MII
-	struct are_softc		*sc;
-	struct mii_data		*mii;
-	struct ifnet		*ifp;
-	/* int			lfdx, mfdx; */
-
-	sc = (struct are_softc *)arg;
-
-	ARE_LOCK(sc);
-	mii = device_get_softc(sc->are_miibus);
-	ifp = sc->are_ifp;
-	if (mii == NULL || ifp == NULL ||
-	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
-		ARE_UNLOCK(sc);
-		return;
-	}
-
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
-			sc->are_link_status = 1;
-	} else
-		sc->are_link_status = 0;
-
-	ARE_UNLOCK(sc);
-#endif
-}
-
-static void
-are_reset(struct are_softc *sc)
-{
-	int		i;
-
-	CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR);
-
-	/*
-	 * The chip doesn't take itself out of reset automatically.
-	 * We need to do so after 2us.
-	 */
-	DELAY(10);
-	CSR_WRITE_4(sc, CSR_BUSMODE, 0);
-
-	for (i = 0; i < 1000; i++) {
-		/*
-		 * Wait a bit for the reset to complete before peeking
-		 * at the chip again.
-		 */
-		DELAY(10);
-		if ((CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR) == 0)
-			break;
-	}
-
-	if (CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR)
-		device_printf(sc->are_dev, "reset time out\n");
-
-	DELAY(1000);
-}
-
-static void
-are_init(void *xsc)
-{
-	struct are_softc	 *sc = xsc;
-
-	ARE_LOCK(sc);
-	are_init_locked(sc);
-	ARE_UNLOCK(sc);
-}
-
-static void
-are_init_locked(struct are_softc *sc)
-{
-	struct ifnet		*ifp = sc->are_ifp;
-#ifdef ARE_MII
-	struct mii_data		*mii;
-#endif
-
-	ARE_LOCK_ASSERT(sc);
-
-#ifdef ARE_MII
-	mii = device_get_softc(sc->are_miibus);
-#endif
-
-	are_stop(sc);
-	are_reset(sc);
-
-	/* Init circular RX list. */
-	if (are_rx_ring_init(sc) != 0) {
-		device_printf(sc->are_dev,
-		    "initialization failed: no memory for rx buffers\n");
-		are_stop(sc);
-		return;
-	}
-
-	/* Init tx descriptors. */
-	are_tx_ring_init(sc);
-
-	/*
-	 * Initialize the BUSMODE register.
-	 */
-	CSR_WRITE_4(sc, CSR_BUSMODE,
-	    /* XXX: not sure if this is a good thing or not... */
-	    BUSMODE_BAR | BUSMODE_BLE | BUSMODE_PBL_4LW);
-
-	/*
-	 * Initialize the interrupt mask and enable interrupts.
-	 */
-	/* normal interrupts */
-	sc->sc_inten =  STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
-
-	/* abnormal interrupts */
-	sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
-	    STATUS_RU | STATUS_RPS | STATUS_SE | STATUS_AIS;
-
-	sc->sc_rxint_mask = STATUS_RI|STATUS_RU;
-	sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
-
-	sc->sc_rxint_mask &= sc->sc_inten;
-	sc->sc_txint_mask &= sc->sc_inten;
-
-	CSR_WRITE_4(sc, CSR_INTEN, sc->sc_inten);
-	CSR_WRITE_4(sc, CSR_STATUS, 0xffffffff);
-
-	/*
-	 * Give the transmit and receive rings to the chip.
-	 */
-	CSR_WRITE_4(sc, CSR_TXLIST, ARE_TX_RING_ADDR(sc, 0));
-	CSR_WRITE_4(sc, CSR_RXLIST, ARE_RX_RING_ADDR(sc, 0));
-
-	/*
-	 * Set the station address.
-	 */
-	CSR_WRITE_4(sc, CSR_MACHI, sc->are_eaddr[5] << 16 | sc->are_eaddr[4]);
-	CSR_WRITE_4(sc, CSR_MACLO, sc->are_eaddr[3] << 24 |
-	    sc->are_eaddr[2] << 16 | sc->are_eaddr[1] << 8 | sc->are_eaddr[0]);
-
-	/*
-	 * Start the mac.
-	 */
-	CSR_WRITE_4(sc, CSR_FLOWC, FLOWC_FCE);
-	CSR_WRITE_4(sc, CSR_MACCTL, MACCTL_RE | MACCTL_TE |
-	    MACCTL_PM | MACCTL_FDX | MACCTL_HBD | MACCTL_RA);
-
-	/*
-	 * Write out the opmode.
-	 */
-	CSR_WRITE_4(sc, CSR_OPMODE, OPMODE_SR | OPMODE_ST | OPMODE_SF |
-	    OPMODE_TR_64);
-
-	/*
-	 * Start the receive process.
-	 */
-	CSR_WRITE_4(sc, CSR_RXPOLL, RXPOLL_RPD);
-
-	sc->are_link_status = 1;
-#ifdef ARE_MII
-	mii_mediachg(mii);
-#endif
-
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-	callout_reset(&sc->are_stat_callout, hz, are_tick, sc);
-}
-
-static void
-are_start(struct ifnet *ifp)
-{
-	struct are_softc	 *sc;
-
-	sc = ifp->if_softc;
-
-	ARE_LOCK(sc);
-	are_start_locked(ifp);
-	ARE_UNLOCK(sc);
-}
-
-/*
- * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
- * pointers to the fragment pointers.
- */
-static int
-are_encap(struct are_softc *sc, struct mbuf **m_head)
-{
-	struct are_txdesc	*txd;
-	struct are_desc		*desc, *prev_desc;
-	struct mbuf		*m;
-	bus_dma_segment_t	txsegs[ARE_MAXFRAGS];
-	uint32_t		link_addr;
-	int			error, i, nsegs, prod, si, prev_prod;
-	int			txstat;
-	int			startcount;
-	int			padlen;
-
-	startcount = sc->are_cdata.are_tx_cnt;
-
-	ARE_LOCK_ASSERT(sc);
-
-	/*
-	 * Some VIA Rhine wants packet buffers to be longword
-	 * aligned, but very often our mbufs aren't. Rather than
-	 * waste time trying to decide when to copy and when not
-	 * to copy, just do it all the time.
-	 */
-	m = m_defrag(*m_head, M_NOWAIT);
-	if (m == NULL) {
-		device_printf(sc->are_dev, "are_encap m_defrag error\n");
-		m_freem(*m_head);
-		*m_head = NULL;
-		return (ENOBUFS);
-	}
-	*m_head = m;
-
-	/*
-	 * The Rhine chip doesn't auto-pad, so we have to make
-	 * sure to pad short frames out to the minimum frame length
-	 * ourselves.
-	 */
-	if ((*m_head)->m_pkthdr.len < ARE_MIN_FRAMELEN) {
-		m = *m_head;
-		padlen = ARE_MIN_FRAMELEN - m->m_pkthdr.len;
-		if (M_WRITABLE(m) == 0) {
-			/* Get a writable copy. */
-			m = m_dup(*m_head, M_NOWAIT);
-			m_freem(*m_head);
-			if (m == NULL) {
-				device_printf(sc->are_dev, "are_encap m_dup error\n");
-				*m_head = NULL;
-				return (ENOBUFS);
-			}
-			*m_head = m;
-		}
-		if (m->m_next != NULL || M_TRAILINGSPACE(m) < padlen) {
-			m = m_defrag(m, M_NOWAIT);
-			if (m == NULL) {
-				device_printf(sc->are_dev, "are_encap m_defrag error\n");
-				m_freem(*m_head);
-				*m_head = NULL;
-				return (ENOBUFS);
-			}
-		}
-		/*
-		 * Manually pad short frames, and zero the pad space
-		 * to avoid leaking data.
-		 */
-		bzero(mtod(m, char *) + m->m_pkthdr.len, padlen);
-		m->m_pkthdr.len += padlen;
-		m->m_len = m->m_pkthdr.len;
-		*m_head = m;
-	}
-
-	prod = sc->are_cdata.are_tx_prod;
-	txd = &sc->are_cdata.are_txdesc[prod];
-	error = bus_dmamap_load_mbuf_sg(sc->are_cdata.are_tx_tag,
-	    txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
-	if (error == EFBIG) {
-		device_printf(sc->are_dev, "are_encap EFBIG error\n");
-		m = m_defrag(*m_head, M_NOWAIT);
-		if (m == NULL) {
-			m_freem(*m_head);
-			*m_head = NULL;
-			return (ENOBUFS);
-		}
-		*m_head = m;
-		error = bus_dmamap_load_mbuf_sg(sc->are_cdata.are_tx_tag,
-		    txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
-		if (error != 0) {
-			m_freem(*m_head);
-			*m_head = NULL;
-			return (error);
-		}
-
-	} else if (error != 0)
-		return (error);
-	if (nsegs == 0) {
-		m_freem(*m_head);
-		*m_head = NULL;
-		return (EIO);
-	}
-
-	/* Check number of available descriptors. */
-	if (sc->are_cdata.are_tx_cnt + nsegs >= (ARE_TX_RING_CNT - 1)) {
-		bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap);
-		return (ENOBUFS);
-	}
-
-	txd->tx_m = *m_head;
-	bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap,
-	    BUS_DMASYNC_PREWRITE);
-
-	si = prod;
-
-	/* 
-	 * Make a list of descriptors for this packet. DMA controller will
-	 * walk through it while are_link is not zero. The last one should
-	 * have COF flag set, to pickup next chain from NDPTR
-	 */
-	prev_prod = prod;
-	desc = prev_desc = NULL;
-	for (i = 0; i < nsegs; i++) {
-		desc = &sc->are_rdata.are_tx_ring[prod];
-		desc->are_stat = ADSTAT_OWN;
-		desc->are_devcs = ARE_DMASIZE(txsegs[i].ds_len);
-		desc->are_addr = txsegs[i].ds_addr;
-		/* link with previous descriptor */
-		/* end of descriptor */
-		if (prod == ARE_TX_RING_CNT - 1)
-			desc->are_devcs |= ADCTL_ER;
-
-		sc->are_cdata.are_tx_cnt++;
-		prev_desc = desc;
-		ARE_INC(prod, ARE_TX_RING_CNT);
-	}
-
-	/* 
-	 * Set mark last fragment with LD flag
-	 */
-	if (desc) {
-		desc->are_devcs |= ADCTL_Tx_IC;
-		desc->are_devcs |= ADCTL_Tx_LS;
-	}
-
-	/* Update producer index. */
-	sc->are_cdata.are_tx_prod = prod;
-
-	/* Sync descriptors. */
-	bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
-	    sc->are_cdata.are_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	/* Start transmitting */
-	/* Check if new list is queued in NDPTR */
-	txstat = (CSR_READ_4(sc, CSR_STATUS) >> 20) & 7;
-	if (startcount == 0 && (txstat == 0 || txstat == 6)) {
-		desc = &sc->are_rdata.are_tx_ring[si];
-		desc->are_devcs |= ADCTL_Tx_FS;
-	}
-	else {
-		link_addr = ARE_TX_RING_ADDR(sc, si);
-		/* Get previous descriptor */
-		si = (si + ARE_TX_RING_CNT - 1) % ARE_TX_RING_CNT;
-		desc = &sc->are_rdata.are_tx_ring[si];
-		desc->are_devcs &= ~(ADCTL_Tx_IC | ADCTL_Tx_LS);
-	}
-
-	return (0);
-}
-
-static void
-are_start_locked(struct ifnet *ifp)
-{
-	struct are_softc		*sc;
-	struct mbuf		*m_head;
-	int			enq;
-	int			txstat;
-
-	sc = ifp->if_softc;
-
-	ARE_LOCK_ASSERT(sc);
-
-	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING || sc->are_link_status == 0 )
-		return;
-
-	for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
-	    sc->are_cdata.are_tx_cnt < ARE_TX_RING_CNT - 2; ) {
-		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
-		if (m_head == NULL)
-			break;
-		/*
-		 * Pack the data into the transmit ring. If we
-		 * don't have room, set the OACTIVE flag and wait
-		 * for the NIC to drain the ring.
-		 */
-		if (are_encap(sc, &m_head)) {
-			if (m_head == NULL)
-				break;
-			IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
-			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-			break;
-		}
-
-		enq++;
-		/*
-		 * If there's a BPF listener, bounce a copy of this frame
-		 * to him.
-		 */
-		ETHER_BPF_MTAP(ifp, m_head);
-	}
-
-	if (enq > 0) { 
-		txstat = (CSR_READ_4(sc, CSR_STATUS) >> 20) & 7;
-		if (txstat == 0 || txstat == 6) {
-			/* Transmit Process Stat is stop or suspended */
-			CSR_WRITE_4(sc, CSR_TXPOLL, TXPOLL_TPD);
-		}
-	}
-}
-
-static void
-are_stop(struct are_softc *sc)
-{
-	struct ifnet	    *ifp;
-
-	ARE_LOCK_ASSERT(sc);
-
-	ifp = sc->are_ifp;
-	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-	callout_stop(&sc->are_stat_callout);
-
-	/* Disable interrupts. */
-	CSR_WRITE_4(sc, CSR_INTEN, 0);
-
-	/* Stop the transmit and receive processes. */
-	CSR_WRITE_4(sc, CSR_OPMODE, 0);
-	CSR_WRITE_4(sc, CSR_RXLIST, 0);
-	CSR_WRITE_4(sc, CSR_TXLIST, 0);
-	CSR_WRITE_4(sc, CSR_MACCTL, 
-	    CSR_READ_4(sc, CSR_MACCTL) & ~(MACCTL_TE | MACCTL_RE));
-
-}
-
-static int
-are_set_filter(struct are_softc *sc)
-{
-	struct ifnet	    *ifp;
-	int mchash[2];
-	int macctl;
-
-	ifp = sc->are_ifp;
-
-	macctl = CSR_READ_4(sc, CSR_MACCTL);
-	macctl &= ~(MACCTL_PR | MACCTL_PM);
-	macctl |= MACCTL_HBD;
-
-	if (ifp->if_flags & IFF_PROMISC)
-		macctl |= MACCTL_PR;
-
-	/* Todo: hash table set. 
-	 * But I don't know how to use multicast hash table at this soc.
-	 */
-
-	/* this is allmulti */
-	mchash[0] = mchash[1] = 0xffffffff;
-	macctl |= MACCTL_PM;
-
-	CSR_WRITE_4(sc, CSR_HTLO, mchash[0]);
-	CSR_WRITE_4(sc, CSR_HTHI, mchash[1]);
-	CSR_WRITE_4(sc, CSR_MACCTL, macctl);
-
-	return 0;
-}
-
-static int
-are_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
-	struct are_softc		*sc = ifp->if_softc;
-	struct ifreq		*ifr = (struct ifreq *) data;
-#ifdef ARE_MII
-	struct mii_data		*mii;
-#endif
-	int			error;
-
-	switch (command) {
-	case SIOCSIFFLAGS:
-		ARE_LOCK(sc);
-		if (ifp->if_flags & IFF_UP) {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
-				if ((ifp->if_flags ^ sc->are_if_flags) &
-				    (IFF_PROMISC | IFF_ALLMULTI))
-					are_set_filter(sc);
-			} else {
-				if (sc->are_detach == 0)
-					are_init_locked(sc);
-			}
-		} else {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
-				are_stop(sc);
-		}
-		sc->are_if_flags = ifp->if_flags;
-		ARE_UNLOCK(sc);
-		error = 0;
-		break;
-	case SIOCADDMULTI:
-	case SIOCDELMULTI:
-		ARE_LOCK(sc);
-		are_set_filter(sc);
-		ARE_UNLOCK(sc);
-		error = 0;
-		break;
-	case SIOCGIFMEDIA:
-	case SIOCSIFMEDIA:
-#ifdef ARE_MII
-		mii = device_get_softc(sc->are_miibus);
-		error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
-#else
-		error = ifmedia_ioctl(ifp, ifr, &sc->are_ifmedia, command);
-#endif
-		break;
-	case SIOCSIFCAP:
-		error = 0;
-		break;
-	default:
-		error = ether_ioctl(ifp, command, data);
-		break;
-	}
-
-	return (error);
-}
-
-/*
- * Set media options.
- */
-static int
-are_ifmedia_upd(struct ifnet *ifp)
-{
-#ifdef ARE_MII
-	struct are_softc		*sc;
-	struct mii_data		*mii;
-	struct mii_softc	*miisc;
-	int			error;
-
-	sc = ifp->if_softc;
-	ARE_LOCK(sc);
-	mii = device_get_softc(sc->are_miibus);
-	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
-		PHY_RESET(miisc);
-	error = mii_mediachg(mii);
-	ARE_UNLOCK(sc);
-
-	return (error);
-#else
-	return (0);
-#endif
-}
-
-/*
- * Report current media status.
- */
-static void
-are_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-#ifdef ARE_MII
-	struct are_softc		*sc = ifp->if_softc;
-	struct mii_data		*mii;
-
-	mii = device_get_softc(sc->are_miibus);
-	ARE_LOCK(sc);
-	mii_pollstat(mii);
-	ifmr->ifm_active = mii->mii_media_active;
-	ifmr->ifm_status = mii->mii_media_status;
-	ARE_UNLOCK(sc);
-#else
-	ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
-#endif
-}
-
-struct are_dmamap_arg {
-	bus_addr_t	are_busaddr;
-};
-
-static void
-are_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	struct are_dmamap_arg	*ctx;
-
-	if (error != 0)
-		return;
-	ctx = arg;
-	ctx->are_busaddr = segs[0].ds_addr;
-}
-
-static int
-are_dma_alloc(struct are_softc *sc)
-{
-	struct are_dmamap_arg	ctx;
-	struct are_txdesc	*txd;
-	struct are_rxdesc	*rxd;
-	int			error, i;
-
-	/* Create parent DMA tag. */
-	error = bus_dma_tag_create(
-	    bus_get_dma_tag(sc->are_dev),	/* parent */
-	    1, 0,			/* alignment, boundary */
-	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsize */
-	    0,				/* nsegments */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->are_cdata.are_parent_tag);
-	if (error != 0) {
-		device_printf(sc->are_dev, "failed to create parent DMA tag\n");
-		goto fail;
-	}
-	/* Create tag for Tx ring. */
-	error = bus_dma_tag_create(
-	    sc->are_cdata.are_parent_tag,	/* parent */
-	    ARE_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    ARE_TX_RING_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    ARE_TX_RING_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->are_cdata.are_tx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->are_dev, "failed to create Tx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx ring. */
-	error = bus_dma_tag_create(
-	    sc->are_cdata.are_parent_tag,	/* parent */
-	    ARE_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    ARE_RX_RING_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    ARE_RX_RING_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->are_cdata.are_rx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->are_dev, "failed to create Rx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Tx buffers. */
-	error = bus_dma_tag_create(
-	    sc->are_cdata.are_parent_tag,	/* parent */
-	    sizeof(uint32_t), 0,	/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES * ARE_MAXFRAGS,	/* maxsize */
-	    ARE_MAXFRAGS,		/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->are_cdata.are_tx_tag);
-	if (error != 0) {
-		device_printf(sc->are_dev, "failed to create Tx DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx buffers. */
-	error = bus_dma_tag_create(
-	    sc->are_cdata.are_parent_tag,	/* parent */
-	    ARE_RX_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES,			/* maxsize */
-	    1,				/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->are_cdata.are_rx_tag);
-	if (error != 0) {
-		device_printf(sc->are_dev, "failed to create Rx DMA tag\n");
-		goto fail;
-	}
-
-	/* Allocate DMA'able memory and load the DMA map for Tx ring. */
-	error = bus_dmamem_alloc(sc->are_cdata.are_tx_ring_tag,
-	    (void **)&sc->are_rdata.are_tx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_tx_ring_map);
-	if (error != 0) {
-		device_printf(sc->are_dev,
-		    "failed to allocate DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-
-	ctx.are_busaddr = 0;
-	error = bus_dmamap_load(sc->are_cdata.are_tx_ring_tag,
-	    sc->are_cdata.are_tx_ring_map, sc->are_rdata.are_tx_ring,
-	    ARE_TX_RING_SIZE, are_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.are_busaddr == 0) {
-		device_printf(sc->are_dev,
-		    "failed to load DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-	sc->are_rdata.are_tx_ring_paddr = ctx.are_busaddr;
-
-	/* Allocate DMA'able memory and load the DMA map for Rx ring. */
-	error = bus_dmamem_alloc(sc->are_cdata.are_rx_ring_tag,
-	    (void **)&sc->are_rdata.are_rx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_rx_ring_map);
-	if (error != 0) {
-		device_printf(sc->are_dev,
-		    "failed to allocate DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-
-	ctx.are_busaddr = 0;
-	error = bus_dmamap_load(sc->are_cdata.are_rx_ring_tag,
-	    sc->are_cdata.are_rx_ring_map, sc->are_rdata.are_rx_ring,
-	    ARE_RX_RING_SIZE, are_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.are_busaddr == 0) {
-		device_printf(sc->are_dev,
-		    "failed to load DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-	sc->are_rdata.are_rx_ring_paddr = ctx.are_busaddr;
-
-	/* Create DMA maps for Tx buffers. */
-	for (i = 0; i < ARE_TX_RING_CNT; i++) {
-		txd = &sc->are_cdata.are_txdesc[i];
-		txd->tx_m = NULL;
-		txd->tx_dmamap = NULL;
-		error = bus_dmamap_create(sc->are_cdata.are_tx_tag, 0,
-		    &txd->tx_dmamap);
-		if (error != 0) {
-			device_printf(sc->are_dev,
-			    "failed to create Tx dmamap\n");
-			goto fail;
-		}
-	}
-	/* Create DMA maps for Rx buffers. */
-	if ((error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0,
-	    &sc->are_cdata.are_rx_sparemap)) != 0) {
-		device_printf(sc->are_dev,
-		    "failed to create spare Rx dmamap\n");
-		goto fail;
-	}
-	for (i = 0; i < ARE_RX_RING_CNT; i++) {
-		rxd = &sc->are_cdata.are_rxdesc[i];
-		rxd->rx_m = NULL;
-		rxd->rx_dmamap = NULL;
-		error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0,
-		    &rxd->rx_dmamap);
-		if (error != 0) {
-			device_printf(sc->are_dev,
-			    "failed to create Rx dmamap\n");
-			goto fail;
-		}
-	}
-
-fail:
-	return (error);
-}
-
-static void
-are_dma_free(struct are_softc *sc)
-{
-	struct are_txdesc	*txd;
-	struct are_rxdesc	*rxd;
-	int			i;
-
-	/* Tx ring. */
-	if (sc->are_cdata.are_tx_ring_tag) {
-		if (sc->are_rdata.are_tx_ring_paddr)
-			bus_dmamap_unload(sc->are_cdata.are_tx_ring_tag,
-			    sc->are_cdata.are_tx_ring_map);
-		if (sc->are_rdata.are_tx_ring)
-			bus_dmamem_free(sc->are_cdata.are_tx_ring_tag,
-			    sc->are_rdata.are_tx_ring,
-			    sc->are_cdata.are_tx_ring_map);
-		sc->are_rdata.are_tx_ring = NULL;
-		sc->are_rdata.are_tx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->are_cdata.are_tx_ring_tag);
-		sc->are_cdata.are_tx_ring_tag = NULL;
-	}
-	/* Rx ring. */
-	if (sc->are_cdata.are_rx_ring_tag) {
-		if (sc->are_rdata.are_rx_ring_paddr)
-			bus_dmamap_unload(sc->are_cdata.are_rx_ring_tag,
-			    sc->are_cdata.are_rx_ring_map);
-		if (sc->are_rdata.are_rx_ring)
-			bus_dmamem_free(sc->are_cdata.are_rx_ring_tag,
-			    sc->are_rdata.are_rx_ring,
-			    sc->are_cdata.are_rx_ring_map);
-		sc->are_rdata.are_rx_ring = NULL;
-		sc->are_rdata.are_rx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->are_cdata.are_rx_ring_tag);
-		sc->are_cdata.are_rx_ring_tag = NULL;
-	}
-	/* Tx buffers. */
-	if (sc->are_cdata.are_tx_tag) {
-		for (i = 0; i < ARE_TX_RING_CNT; i++) {
-			txd = &sc->are_cdata.are_txdesc[i];
-			if (txd->tx_dmamap) {
-				bus_dmamap_destroy(sc->are_cdata.are_tx_tag,
-				    txd->tx_dmamap);
-				txd->tx_dmamap = NULL;
-			}
-		}
-		bus_dma_tag_destroy(sc->are_cdata.are_tx_tag);
-		sc->are_cdata.are_tx_tag = NULL;
-	}
-	/* Rx buffers. */
-	if (sc->are_cdata.are_rx_tag) {
-		for (i = 0; i < ARE_RX_RING_CNT; i++) {
-			rxd = &sc->are_cdata.are_rxdesc[i];
-			if (rxd->rx_dmamap) {
-				bus_dmamap_destroy(sc->are_cdata.are_rx_tag,
-				    rxd->rx_dmamap);
-				rxd->rx_dmamap = NULL;
-			}
-		}
-		if (sc->are_cdata.are_rx_sparemap) {
-			bus_dmamap_destroy(sc->are_cdata.are_rx_tag,
-			    sc->are_cdata.are_rx_sparemap);
-			sc->are_cdata.are_rx_sparemap = 0;
-		}
-		bus_dma_tag_destroy(sc->are_cdata.are_rx_tag);
-		sc->are_cdata.are_rx_tag = NULL;
-	}
-
-	if (sc->are_cdata.are_parent_tag) {
-		bus_dma_tag_destroy(sc->are_cdata.are_parent_tag);
-		sc->are_cdata.are_parent_tag = NULL;
-	}
-}
-
-/*
- * Initialize the transmit descriptors.
- */
-static int
-are_tx_ring_init(struct are_softc *sc)
-{
-	struct are_ring_data	*rd;
-	struct are_txdesc	*txd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->are_cdata.are_tx_prod = 0;
-	sc->are_cdata.are_tx_cons = 0;
-	sc->are_cdata.are_tx_cnt = 0;
-	sc->are_cdata.are_tx_pkts = 0;
-
-	rd = &sc->are_rdata;
-	bzero(rd->are_tx_ring, ARE_TX_RING_SIZE);
-	for (i = 0; i < ARE_TX_RING_CNT; i++) {
-		if (i == ARE_TX_RING_CNT - 1)
-			addr = ARE_TX_RING_ADDR(sc, 0);
-		else
-			addr = ARE_TX_RING_ADDR(sc, i + 1);
-		rd->are_tx_ring[i].are_stat = 0;
-		rd->are_tx_ring[i].are_devcs = 0;
-		rd->are_tx_ring[i].are_addr = 0;
-		rd->are_tx_ring[i].are_link = addr;
-		txd = &sc->are_cdata.are_txdesc[i];
-		txd->tx_m = NULL;
-	}
-
-	bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
-	    sc->are_cdata.are_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Initialize the RX descriptors and allocate mbufs for them. Note that
- * we arrange the descriptors in a closed ring, so that the last descriptor
- * points back to the first.
- */
-static int
-are_rx_ring_init(struct are_softc *sc)
-{
-	struct are_ring_data	*rd;
-	struct are_rxdesc	*rxd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->are_cdata.are_rx_cons = 0;
-
-	rd = &sc->are_rdata;
-	bzero(rd->are_rx_ring, ARE_RX_RING_SIZE);
-	for (i = 0; i < ARE_RX_RING_CNT; i++) {
-		rxd = &sc->are_cdata.are_rxdesc[i];
-		rxd->rx_m = NULL;
-		rxd->desc = &rd->are_rx_ring[i];
-		if (i == ARE_RX_RING_CNT - 1)
-			addr = ARE_RX_RING_ADDR(sc, 0);
-		else
-			addr = ARE_RX_RING_ADDR(sc, i + 1);
-		rd->are_rx_ring[i].are_stat = ADSTAT_OWN;
-		rd->are_rx_ring[i].are_devcs = ADCTL_CH;
-		if (i == ARE_RX_RING_CNT - 1)
-			rd->are_rx_ring[i].are_devcs |= ADCTL_ER;
-		rd->are_rx_ring[i].are_addr = 0;
-		rd->are_rx_ring[i].are_link = addr;
-		if (are_newbuf(sc, i) != 0)
-			return (ENOBUFS);
-	}
-
-	bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
-	    sc->are_cdata.are_rx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Initialize an RX descriptor and attach an MBUF cluster.
- */
-static int
-are_newbuf(struct are_softc *sc, int idx)
-{
-	struct are_desc		*desc;
-	struct are_rxdesc	*rxd;
-	struct mbuf		*m;
-	bus_dma_segment_t	segs[1];
-	bus_dmamap_t		map;
-	int			nsegs;
-
-	m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-	if (m == NULL)
-		return (ENOBUFS);
-	m->m_len = m->m_pkthdr.len = MCLBYTES;
-
-	/* tcp header boundary margin */
-	m_adj(m, 4);
-
-	if (bus_dmamap_load_mbuf_sg(sc->are_cdata.are_rx_tag,
-	    sc->are_cdata.are_rx_sparemap, m, segs, &nsegs, 0) != 0) {
-		m_freem(m);
-		return (ENOBUFS);
-	}
-	KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
-
-	rxd = &sc->are_cdata.are_rxdesc[idx];
-	if (rxd->rx_m != NULL) {
-		/*
-		 * THis is if_kr.c original code but make bug. Make scranble on buffer data.
-		 * bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
-		 *    BUS_DMASYNC_POSTREAD);
-		 */
-		bus_dmamap_unload(sc->are_cdata.are_rx_tag, rxd->rx_dmamap);
-	}
-	map = rxd->rx_dmamap;
-	rxd->rx_dmamap = sc->are_cdata.are_rx_sparemap;
-	sc->are_cdata.are_rx_sparemap = map;
-	bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
-	    BUS_DMASYNC_PREREAD);
-	rxd->rx_m = m;
-	desc = rxd->desc;
-	desc->are_addr = segs[0].ds_addr;
-	desc->are_devcs |= ARE_DMASIZE(segs[0].ds_len);
-	rxd->saved_ca = desc->are_addr ;
-	rxd->saved_ctl = desc->are_stat ;
-
-	return (0);
-}
-
-static __inline void
-are_fixup_rx(struct mbuf *m)
-{
-        int		i;
-        uint16_t	*src, *dst;
-
-	src = mtod(m, uint16_t *);
-	dst = src - 1;
-
-	for (i = 0; i < m->m_len / sizeof(uint16_t); i++) {
-		*dst++ = *src++;
-	}
-
-	if (m->m_len % sizeof(uint16_t))
-		*(uint8_t *)dst = *(uint8_t *)src;
-
-	m->m_data -= ETHER_ALIGN;
-}
-
-static void
-are_tx(struct are_softc *sc)
-{
-	struct are_txdesc	*txd;
-	struct are_desc		*cur_tx;
-	struct ifnet		*ifp;
-	uint32_t		ctl, devcs;
-	int			cons, prod;
-
-	ARE_LOCK_ASSERT(sc);
-
-	cons = sc->are_cdata.are_tx_cons;
-	prod = sc->are_cdata.are_tx_prod;
-	if (cons == prod)
-		return;
-
-	bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
-	    sc->are_cdata.are_tx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	ifp = sc->are_ifp;
-	/*
-	 * Go through our tx list and free mbufs for those
-	 * frames that have been transmitted.
-	 */
-	for (; cons != prod; ARE_INC(cons, ARE_TX_RING_CNT)) {
-		cur_tx = &sc->are_rdata.are_tx_ring[cons];
-		ctl = cur_tx->are_stat;
-		devcs = cur_tx->are_devcs;
-		/* Check if descriptor has "finished" flag */
-		if (ARE_DMASIZE(devcs) == 0)
-			break;
-
-		sc->are_cdata.are_tx_cnt--;
-		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-		txd = &sc->are_cdata.are_txdesc[cons];
-
-		if ((ctl & ADSTAT_Tx_ES) == 0)
-			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-		else {
-			if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-		}
-
-		bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap,
-		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap);
-
-		/* Free only if it's first descriptor in list */
-		if (txd->tx_m)
-			m_freem(txd->tx_m);
-		txd->tx_m = NULL;
-
-		/* reset descriptor */
-		cur_tx->are_stat = 0;
-		cur_tx->are_devcs = 0;
-		cur_tx->are_addr = 0;
-	}
-
-	sc->are_cdata.are_tx_cons = cons;
-
-	bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
-	    sc->are_cdata.are_tx_ring_map, BUS_DMASYNC_PREWRITE);
-}
-
-static void
-are_rx(struct are_softc *sc)
-{
-	struct are_rxdesc	*rxd;
-	struct ifnet		*ifp = sc->are_ifp;
-	int			cons, prog, packet_len, error;
-	struct are_desc		*cur_rx;
-	struct mbuf		*m;
-
-	ARE_LOCK_ASSERT(sc);
-
-	cons = sc->are_cdata.are_rx_cons;
-
-	bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
-	    sc->are_cdata.are_rx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	for (prog = 0; prog < ARE_RX_RING_CNT; ARE_INC(cons, ARE_RX_RING_CNT)) {
-		cur_rx = &sc->are_rdata.are_rx_ring[cons];
-		rxd = &sc->are_cdata.are_rxdesc[cons];
-		m = rxd->rx_m;
-
-		if ((cur_rx->are_stat & ADSTAT_OWN) == ADSTAT_OWN)
-		       break;	
-
-		prog++;
-
-		packet_len = ADSTAT_Rx_LENGTH(cur_rx->are_stat);
-		/* Assume it's error */
-		error = 1;
-
-		if (packet_len < 64)
-			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
-		else if ((cur_rx->are_stat & ADSTAT_Rx_DE) == 0) {
-			error = 0;
-			bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
-			    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-			m = rxd->rx_m;
-			/* Skip 4 bytes of CRC */
-			m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN;
-			are_fixup_rx(m);
-			m->m_pkthdr.rcvif = ifp;
-			if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-
-			ARE_UNLOCK(sc);
-			(*ifp->if_input)(ifp, m);
-			ARE_LOCK(sc);
-		}
-
-		if (error) {
-			/* Restore CONTROL and CA values, reset DEVCS */
-			cur_rx->are_stat = rxd->saved_ctl;
-			cur_rx->are_addr = rxd->saved_ca;
-			cur_rx->are_devcs = 0;
-		}
-		else {
-			/* Reinit descriptor */
-			cur_rx->are_stat = ADSTAT_OWN;
-			cur_rx->are_devcs = 0;
-			if (cons == ARE_RX_RING_CNT - 1)
-				cur_rx->are_devcs |= ADCTL_ER;
-			cur_rx->are_addr = 0;
-			if (are_newbuf(sc, cons) != 0) {
-				device_printf(sc->are_dev, 
-				    "Failed to allocate buffer\n");
-				break;
-			}
-		}
-
-		bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
-		    sc->are_cdata.are_rx_ring_map,
-		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-	}
-
-	if (prog > 0) {
-		sc->are_cdata.are_rx_cons = cons;
-
-		bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
-		    sc->are_cdata.are_rx_ring_map,
-		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-	}
-}
-
-static void
-are_intr(void *arg)
-{
-	struct are_softc		*sc = arg;
-	uint32_t		status;
-	struct ifnet		*ifp = sc->are_ifp;
-
-	ARE_LOCK(sc);
-
-	/* mask out interrupts */
-
-	status = CSR_READ_4(sc, CSR_STATUS);
-	if (status) {
-		CSR_WRITE_4(sc, CSR_STATUS, status);
-	}
-	if (status & sc->sc_rxint_mask) {
-		are_rx(sc);
-	}
-	if (status & sc->sc_txint_mask) {
-		are_tx(sc);
-	}
-
-	/* Try to get more packets going. */
-	are_start(ifp);
-
-	ARE_UNLOCK(sc);
-}
-
-static void
-are_tick(void *xsc)
-{
-#ifdef ARE_MII
-	struct are_softc		*sc = xsc;
-	struct mii_data		*mii;
-
-	ARE_LOCK_ASSERT(sc);
-
-	mii = device_get_softc(sc->are_miibus);
-	mii_tick(mii);
-	callout_reset(&sc->are_stat_callout, hz, are_tick, sc);
-#endif
-}
-
-static void
-are_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	BUS_ADD_CHILD(bus, 0, dname, dunit);
-	device_printf(bus, "hinted child %s%d\n", dname, dunit);
-}
-
-#ifdef ARE_MDIO
-static int
-aremdio_probe(device_t dev)
-{
-	device_set_desc(dev, "Atheros AR531x built-in ethernet interface, MDIO controller");
-	return(0);
-}
-
-static int
-aremdio_attach(device_t dev)
-{
-	struct are_softc	*sc;
-	int			error = 0;
-
-	sc = device_get_softc(dev);
-	sc->are_dev = dev;
-	sc->are_rid = 0;
-	sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 
-	    &sc->are_rid, RF_ACTIVE | RF_SHAREABLE);
-	if (sc->are_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	sc->are_btag = rman_get_bustag(sc->are_res);
-	sc->are_bhandle = rman_get_bushandle(sc->are_res);
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	error = bus_generic_attach(dev);
-fail:
-	return (error);
-}
-
-static int
-aremdio_detach(device_t dev)
-{
-	return(0);
-}
-#endif
-
-#ifdef ARE_DEBUG
-void
-dump_txdesc(struct are_softc *sc, int pos)
-{
-	struct are_desc		*desc;
-
-	desc = &sc->are_rdata.are_tx_ring[pos];
-	device_printf(sc->are_dev, "CSR_TXLIST %08x\n", CSR_READ_4(sc, CSR_TXLIST));
-	device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA));
-	device_printf(sc->are_dev, "%d TDES0:%08x TDES1:%08x TDES2:%08x TDES3:%08x\n",
-	    pos, desc->are_stat, desc->are_devcs, desc->are_addr, desc->are_link);
-}
-
-void 
-dump_status_reg(struct are_softc *sc)
-{
-	uint32_t		status;
-
-	/* mask out interrupts */
-
-	device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA));
-	status = CSR_READ_4(sc, CSR_STATUS);
-	device_printf(sc->are_dev, "CSR5 Status Register EB:%d TS:%d RS:%d NIS:%d AIS:%d ER:%d SE:%d LNF:%d TM:%d RWT:%d RPS:%d RU:%d RI:%d UNF:%d LNP/ANC:%d TJT:%d TU:%d TPS:%d TI:%d\n", 
-	    (status >> 23 ) & 7,
-	    (status >> 20 ) & 7,
-	    (status >> 17 ) & 7,
-	    (status >> 16 ) & 1,
-	    (status >> 15 ) & 1,
-	    (status >> 14 ) & 1,
-	    (status >> 13 ) & 1,
-	    (status >> 12 ) & 1,
-	    (status >> 11 ) & 1,
-	    (status >> 9 ) & 1,
-	    (status >> 8 ) & 1,
-	    (status >> 7 ) & 1,
-	    (status >> 6 ) & 1,
-	    (status >> 5 ) & 1,
-	    (status >> 4 ) & 1,
-	    (status >> 3 ) & 1,
-	    (status >> 2 ) & 1,
-	    (status >> 1 ) & 1,
-	    (status >> 0 ) & 1);
-
-}
-#endif
diff --git a/sys/mips/atheros/ar531x/if_arereg.h b/sys/mips/atheros/ar531x/if_arereg.h
deleted file mode 100644
index b2483e52eb6e..000000000000
--- a/sys/mips/atheros/ar531x/if_arereg.h
+++ /dev/null
@@ -1,401 +0,0 @@
-/*-
- * Copyright (C) 2007 
- *	Oleksandr Tymoshenko <gonzo@freebsd.org>. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __IF_AREREG_H__
-#define __IF_AREREG_H__
-
-struct are_desc {
-	uint32_t	are_stat;
-	uint32_t	are_devcs;
-	uint32_t	are_addr;
-	uint32_t	are_link;
-};
-
-#define	ARE_DMASIZE(len)		((len)  & ((1 << 11)-1))		
-#define	ARE_PKTSIZE(len)		((len & 0xffff0000) >> 16)
-
-#define	ARE_RX_RING_CNT		128
-#define	ARE_TX_RING_CNT		128
-#define	ARE_TX_RING_SIZE		sizeof(struct are_desc) * ARE_TX_RING_CNT
-#define	ARE_RX_RING_SIZE		sizeof(struct are_desc) * ARE_RX_RING_CNT
-
-#define	ARE_MIN_FRAMELEN		60
-#define	ARE_RING_ALIGN		sizeof(struct are_desc)
-#define	ARE_RX_ALIGN		sizeof(uint32_t)
-#define	ARE_MAXFRAGS		8
-#define	ARE_TX_INTR_THRESH	8
-
-#define	ARE_TX_RING_ADDR(sc, i)	\
-    ((sc)->are_rdata.are_tx_ring_paddr + sizeof(struct are_desc) * (i))
-#define	ARE_RX_RING_ADDR(sc, i)	\
-    ((sc)->are_rdata.are_rx_ring_paddr + sizeof(struct are_desc) * (i))
-#define	ARE_INC(x,y)		(x) = (((x) + 1) % y)
-
-struct are_txdesc {
-	struct mbuf	*tx_m;
-	bus_dmamap_t	tx_dmamap;
-};
-
-struct are_rxdesc {
-	struct mbuf	*rx_m;
-	bus_dmamap_t	rx_dmamap;
-	struct are_desc	*desc;
-	/* Use this values on error instead of allocating new mbuf */
-	uint32_t	saved_ctl, saved_ca; 
-};
-
-struct are_chain_data {
-	bus_dma_tag_t		are_parent_tag;
-	bus_dma_tag_t		are_tx_tag;
-	struct are_txdesc	are_txdesc[ARE_TX_RING_CNT];
-	bus_dma_tag_t		are_rx_tag;
-	struct are_rxdesc	are_rxdesc[ARE_RX_RING_CNT];
-	bus_dma_tag_t		are_tx_ring_tag;
-	bus_dma_tag_t		are_rx_ring_tag;
-	bus_dmamap_t		are_tx_ring_map;
-	bus_dmamap_t		are_rx_ring_map;
-	bus_dmamap_t		are_rx_sparemap;
-	int			are_tx_pkts;
-	int			are_tx_prod;
-	int			are_tx_cons;
-	int			are_tx_cnt;
-	int			are_rx_cons;
-};
-
-struct are_ring_data {
-	struct are_desc		*are_rx_ring;
-	struct are_desc		*are_tx_ring;
-	bus_addr_t		are_rx_ring_paddr;
-	bus_addr_t		are_tx_ring_paddr;
-};
-
-struct are_softc {
-	struct ifnet		*are_ifp;	/* interface info */
-	bus_space_handle_t	are_bhandle;	/* bus space handle */
-	bus_space_tag_t		are_btag;	/* bus space tag */
-	device_t		are_dev;
-	uint8_t			are_eaddr[ETHER_ADDR_LEN];
-	struct resource		*are_res;
-	int			are_rid;
-	struct resource		*are_irq;
-	void			*are_intrhand;
-	u_int32_t		sc_inten;	/* copy of CSR_INTEN */
-	u_int32_t		sc_rxint_mask;	/* mask of Rx interrupts we want */
-	u_int32_t		sc_txint_mask;	/* mask of Tx interrupts we want */
-#ifdef ARE_MII
-	device_t		are_miibus;
-#else
-	struct ifmedia		are_ifmedia;
-#endif
-#ifdef ARE_MDIO
-	device_t		are_miiproxy;
-#endif
-	bus_dma_tag_t		are_parent_tag;
-	bus_dma_tag_t		are_tag;
-	struct mtx		are_mtx;
-	struct callout		are_stat_callout;
-	struct task		are_link_task;
-	struct are_chain_data	are_cdata;
-	struct are_ring_data	are_rdata;
-	int			are_link_status;
-	int			are_detach;
-	int			are_if_flags;   /* last if flags */
-};
-
-#define	ARE_LOCK(_sc)		mtx_lock(&(_sc)->are_mtx)
-#define	ARE_UNLOCK(_sc)		mtx_unlock(&(_sc)->are_mtx)
-#define	ARE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->are_mtx, MA_OWNED)
-
-/*
- * register space access macros
- */
-#define	CSR_WRITE_4(sc, reg, val)	\
-    bus_space_write_4(sc->are_btag, sc->are_bhandle, reg, val)
-
-#define	CSR_READ_4(sc, reg)		\
-    bus_space_read_4(sc->are_btag, sc->are_bhandle, reg)
-
-/*	$NetBSD: aereg.h,v 1.2 2008/04/28 20:23:28 martin Exp $	*/
-
-/*-
- * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Descriptor Status bits common to transmit and receive.
- */
-#define	ADSTAT_OWN	0x80000000	/* Tulip owns descriptor */
-#define	ADSTAT_ES	0x00008000	/* Error Summary */
-
-/*
- * Descriptor Status bits for Receive Descriptor.
- */
-#define	ADSTAT_Rx_FF	0x40000000	/* Filtering Fail */
-#define	ADSTAT_Rx_FL	0x3fff0000	/* Frame Length including CRC */
-#define	ADSTAT_Rx_DE	0x00004000	/* Descriptor Error */
-#define	ADSTAT_Rx_LE	0x00001000	/* Length Error */
-#define	ADSTAT_Rx_RF	0x00000800	/* Runt Frame */
-#define	ADSTAT_Rx_MF	0x00000400	/* Multicast Frame */
-#define	ADSTAT_Rx_FS	0x00000200	/* First Descriptor */
-#define	ADSTAT_Rx_LS	0x00000100	/* Last Descriptor */
-#define	ADSTAT_Rx_TL	0x00000080	/* Frame Too Long */
-#define	ADSTAT_Rx_CS	0x00000040	/* Collision Seen */
-#define	ADSTAT_Rx_RT	0x00000020	/* Frame Type */
-#define	ADSTAT_Rx_RW	0x00000010	/* Receive Watchdog */
-#define	ADSTAT_Rx_RE	0x00000008	/* Report on MII Error */
-#define	ADSTAT_Rx_DB	0x00000004	/* Dribbling Bit */
-#define	ADSTAT_Rx_CE	0x00000002	/* CRC Error */
-#define	ADSTAT_Rx_ZER	0x00000001	/* Zero (always 0) */
-
-#define	ADSTAT_Rx_LENGTH(x)	(((x) & ADSTAT_Rx_FL) >> 16)
-
-/*
- * Descriptor Status bits for Transmit Descriptor.
- */
-#define	ADSTAT_Tx_ES	0x00008000	/* Error Summary */
-#define	ADSTAT_Tx_TO	0x00004000	/* Transmit Jabber Timeout */
-#define	ADSTAT_Tx_LO	0x00000800	/* Loss of Carrier */
-#define	ADSTAT_Tx_NC	0x00000400	/* No Carrier */
-#define	ADSTAT_Tx_LC	0x00000200	/* Late Collision */
-#define	ADSTAT_Tx_EC	0x00000100	/* Excessive Collisions */
-#define	ADSTAT_Tx_HF	0x00000080	/* Heartbeat Fail */
-#define	ADSTAT_Tx_CC	0x00000078	/* Collision Count */
-#define	ADSTAT_Tx_ED	0x00000004	/* Excessive Deferral */
-#define	ADSTAT_Tx_UF	0x00000002	/* Underflow Error */
-#define	ADSTAT_Tx_DE	0x00000001	/* Deferred */
-
-#define	ADSTAT_Tx_COLLISIONS(x)	(((x) & ADSTAT_Tx_CC) >> 3)
-
-/*
- * Descriptor Control bits common to transmit and receive.
- */
-#define	ADCTL_SIZE1	0x000007ff	/* Size of buffer 1 */
-#define	ADCTL_SIZE1_SHIFT 0
-
-#define	ADCTL_SIZE2	0x003ff800	/* Size of buffer 2 */
-#define	ADCTL_SIZE2_SHIFT 11
-
-#define	ADCTL_ER	0x02000000	/* End of Ring */
-#define	ADCTL_CH	0x01000000	/* Second Address Chained */
-
-/*
- * Descriptor Control bits for Transmit Descriptor.
- */
-#define	ADCTL_Tx_IC	0x80000000	/* Interrupt on Completion */
-#define	ADCTL_Tx_LS	0x40000000	/* Last Segment */
-#define	ADCTL_Tx_FS	0x20000000	/* First Segment */
-#define	ADCTL_Tx_AC	0x04000000	/* Add CRC Disable */
-#define	ADCTL_Tx_DPD	0x00800000	/* Disabled Padding */
-
-/*
- * Control registers.
- */
-
-/* tese are registers only found on this part */
-#define	CSR_MACCTL	0x0000		/* mac control */
-#define	CSR_MACHI	0x0004
-#define	CSR_MACLO	0x0008
-#define	CSR_HTHI	0x000C		/* multicast table high */
-#define	CSR_HTLO	0x0010		/* multicast table low */
-#define	CSR_MIIADDR	0x0014		/* mii address */
-#define	CSR_MIIDATA	0x0018		/* mii data */
-#define	CSR_FLOWC	0x001C		/* flow control */
-#define	CSR_VL1		0x0020		/* vlan 1 tag */
-
-/* these are more or less normal Tulip registers */
-#define	CSR_BUSMODE	0x1000		/* bus mode */
-#define	CSR_TXPOLL	0x1004		/* tx poll demand */
-#define	CSR_RXPOLL	0x1008		/* rx poll demand */
-#define	CSR_RXLIST	0x100C		/* rx base descriptor address */
-#define	CSR_TXLIST	0x1010		/* tx base descriptor address */
-#define	CSR_STATUS	0x1014		/* (interrupt) status */
-#define	CSR_OPMODE	0x1018		/* operation mode */
-#define	CSR_INTEN	0x101C		/* interrupt enable */
-#define	CSR_MISSED	0x1020		/* missed frame counter */
-#define	CSR_HTBA	0x1050		/* host tx buffer address (ro) */
-#define	CSR_HRBA	0x1054		/* host rx buffer address (ro) */
-
-/* CSR_MACCTL - Mac Control */
-#define	MACCTL_RE		0x00000004	/* rx enable */
-#define	MACCTL_TE		0x00000008	/* tx enable */
-#define	MACCTL_DC		0x00000020	/* deferral check */
-#define	MACCTL_PSTR		0x00000100	/* automatic pad strip */
-#define	MACCTL_DTRY		0x00000400	/* disable retry */
-#define	MACCTL_DBF		0x00000800	/* disable broadcast frames */
-#define	MACCTL_LCC		0x00001000	/* late collision control */
-#define	MACCTL_HASH		0x00002000	/* hash filtering enable */
-#define	MACCTL_HO		0x00008000	/* disable perfect filtering */
-#define	MACCTL_PB		0x00010000	/* pass bad frames */
-#define	MACCTL_IF		0x00020000	/* inverse filtering */
-#define	MACCTL_PR		0x00040000	/* promiscuous mode */
-#define	MACCTL_PM		0x00080000	/* pass all multicast */
-#define	MACCTL_FDX		0x00100000	/* full duplex mode */
-#define	MACCTL_LOOP		0x00600000	/* loopback mask */
-#define	MACCTL_LOOP_INT		0x00200000	/* internal loopback */
-#define	MACCTL_LOOP_EXT		0x00400000	/* external loopback */
-#define	MACCTL_LOOP_NONE	0x00000000
-#define	MACCTL_DRO		0x00800000	/* disable receive own */
-#define	MACCTL_PS		0x08000000	/* port select, 0 = mii */
-#define	MACCTL_HBD		0x10000000	/* heartbeat disable */
-#define	MACCTL_BLE		0x40000000	/* mac big endian */
-#define	MACCTL_RA		0x80000000	/* receive all packets */
-
-/* CSR_MIIADDR - MII Addess */
-#define	MIIADDR_BUSY		0x00000001	/* mii busy */
-#define	MIIADDR_WRITE		0x00000002	/* mii write */
-#define	MIIADDR_REG_MASK	0x000007C0	/* mii register */
-#define	MIIADDR_REG_SHIFT	6
-#define	MIIADDR_PHY_MASK	0x0000F800	/* mii phy */
-#define	MIIADDR_PHY_SHIFT	11
-
-#define	MIIADDR_GETREG(x)	(((x) & MIIADDR_REG) >> 6)
-#define	MIIADDR_PUTREG(x)	(((x) << 6) & MIIADR_REG)
-#define	MIIADDR_GETPHY(x)	(((x) & MIIADDR_PHY) >> 11)
-#define	MIIADDR_PUTPHY(x)	(((x) << 6) & MIIADR_PHY)
-
-/* CSR_FLOWC - Flow Control */
-#define	FLOWC_FCB		0x00000001	/* flow control busy */
-#define	FLOWC_FCE		0x00000002	/* flow control enable */
-#define	FLOWC_PCF		0x00000004	/* pass control frames */
-#define	FLOWC_PT		0xffff0000	/* pause time */
-
-/* CSR_BUSMODE - Bus Mode */
-#define	BUSMODE_SWR		0x00000001	/* software reset */
-#define	BUSMODE_BAR		0x00000002	/* bus arbitration */
-#define	BUSMODE_DSL		0x0000007c	/* descriptor skip length */
-#define	BUSMODE_BLE		0x00000080	/* data buf endian */
-						/* programmable burst length */
-#define	BUSMODE_PBL_DEFAULT	0x00000000	/*     default value */
-#define	BUSMODE_PBL_1LW		0x00000100	/*     1 longword */
-#define	BUSMODE_PBL_2LW		0x00000200	/*     2 longwords */
-#define	BUSMODE_PBL_4LW		0x00000400	/*     4 longwords */
-#define	BUSMODE_PBL_8LW		0x00000800	/*     8 longwords */
-#define	BUSMODE_PBL_16LW	0x00001000	/*    16 longwords */
-#define	BUSMODE_PBL_32LW	0x00002000	/*    32 longwords */
-#define	BUSMODE_DBO		0x00100000	/* descriptor endian */
-#define	BUSMODE_ALIGN_16B	0x01000000	/* force oddhw rx buf align */
-
-/* CSR_TXPOLL - Transmit Poll Demand */
-#define	TXPOLL_TPD		0x00000001	/* transmit poll demand */
-
-/* CSR_RXPOLL - Receive Poll Demand */
-#define	RXPOLL_RPD		0x00000001	/* receive poll demand */
-
-/* CSR_STATUS - Status */
-#define	STATUS_TI		0x00000001	/* transmit interrupt */
-#define	STATUS_TPS		0x00000002	/* transmit process stopped */
-#define	STATUS_TU		0x00000004	/* transmit buffer unavail */
-#define	STATUS_TJT		0x00000008	/* transmit jabber timeout */
-#define	STATUS_UNF		0x00000020	/* transmit underflow */
-#define	STATUS_RI		0x00000040	/* receive interrupt */
-#define	STATUS_RU		0x00000080	/* receive buffer unavail */
-#define	STATUS_RPS		0x00000100	/* receive process stopped */
-#define	STATUS_ETI		0x00000400	/* early transmit interrupt */
-#define	STATUS_SE		0x00002000	/* system error */
-#define	STATUS_ER		0x00004000	/* early receive (21041) */
-#define	STATUS_AIS		0x00008000	/* abnormal intr summary */
-#define	STATUS_NIS		0x00010000	/* normal interrupt summary */
-#define	STATUS_RS		0x000e0000	/* receive process state */
-#define	STATUS_RS_STOPPED	0x00000000	/* Stopped */
-#define	STATUS_RS_FETCH		0x00020000	/* Running - fetch receive
-						   descriptor */
-#define	STATUS_RS_CHECK		0x00040000	/* Running - check for end
-						   of receive */
-#define	STATUS_RS_WAIT		0x00060000	/* Running - wait for packet */
-#define	STATUS_RS_SUSPENDED	0x00080000	/* Suspended */
-#define	STATUS_RS_CLOSE		0x000a0000	/* Running - close receive
-						   descriptor */
-#define	STATUS_RS_FLUSH		0x000c0000	/* Running - flush current
-						   frame from FIFO */
-#define	STATUS_RS_QUEUE		0x000e0000	/* Running - queue current
-						   frame from FIFO into
-						   buffer */
-#define	STATUS_TS		0x00700000	/* transmit process state */
-#define	STATUS_TS_STOPPED	0x00000000	/* Stopped */
-#define	STATUS_TS_FETCH		0x00100000	/* Running - fetch transmit
-						   descriptor */
-#define	STATUS_TS_WAIT		0x00200000	/* Running - wait for end
-						   of transmission */
-#define	STATUS_TS_READING	0x00300000	/* Running - read buffer from
-						   memory and queue into
-						   FIFO */
-#define	STATUS_TS_SUSPENDED	0x00600000	/* Suspended */
-#define	STATUS_TS_CLOSE		0x00700000	/* Running - close transmit
-						   descriptor */
-#define	STATUS_TX_ABORT		0x00800000	/* Transmit bus abort */
-#define	STATUS_RX_ABORT		0x01000000	/* Transmit bus abort */
-
-/* CSR_OPMODE - Operation Mode */
-#define	OPMODE_SR		0x00000002	/* start receive */
-#define	OPMODE_OSF		0x00000004	/* operate on second frame */
-#define	OPMODE_ST		0x00002000	/* start transmitter */
-#define	OPMODE_TR		0x0000c000	/* threshold control */
-#define	OPMODE_TR_32		0x00000000	/*     32 words */
-#define	OPMODE_TR_64		0x00004000	/*     64 words */
-#define	OPMODE_TR_128		0x00008000	/*    128 words */
-#define	OPMODE_TR_256		0x0000c000	/*    256 words */
-#define	OPMODE_SF		0x00200000	/* store and forward mode */
-
-/* CSR_INTEN - Interrupt Enable */
-	/* See bits for CSR_STATUS -- Status */
-
-/* CSR_MISSED - Missed Frames */
-#define	MISSED_MFC		0xffff0000	/* missed packet count */
-#define	MISSED_FOC		0x0000ffff	/* fifo overflow counter */
-
-#define	MISSED_GETMFC(x)	((x) & MISSED_MFC)
-#define	MISSED_GETFOC(x)	(((x) & MISSED_FOC) >> 16)
-
-#endif /* __IF_AREREG_H__ */
diff --git a/sys/mips/atheros/ar531x/uart_bus_ar5315.c b/sys/mips/atheros/ar531x/uart_bus_ar5315.c
deleted file mode 100644
index 425b3849e0dc..000000000000
--- a/sys/mips/atheros/ar531x/uart_bus_ar5315.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-
-#include "uart_if.h"
-
-static int uart_ar5315_probe(device_t dev);
-extern struct uart_class uart_ar5315_uart_class;
-
-static device_method_t uart_ar5315_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_ar5315_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	DEVMETHOD_END
-};
-
-static driver_t uart_ar5315_driver = {
-	uart_driver_name,
-	uart_ar5315_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_ar5315_probe(device_t dev)
-{
-	struct uart_softc *sc;
-	uint64_t freq;
-
-	freq = ar531x_ahb_freq();
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.regshft = 2;
-	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
-	sc->sc_sysdev->bas.bsh = ar531x_uart_addr() + 3;
-	sc->sc_bas.regshft = 2;
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = ar531x_uart_addr() + 3;
-
-	return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0));
-}
-
-DRIVER_MODULE(uart, apb, uart_ar5315_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar531x/uart_cpu_ar5315.c b/sys/mips/atheros/ar531x/uart_cpu_ar5315.c
deleted file mode 100644
index 084a7f16c964..000000000000
--- a/sys/mips/atheros/ar531x/uart_cpu_ar5315.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*-
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/atheros/ar531x/ar5315reg.h>
-#include <mips/atheros/ar531x/ar5315_cpudef.h>
-#include <mips/atheros/ar71xx_bus_space_reversed.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	uint64_t freq;
-
-	freq = ar531x_ahb_freq();
-
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = ar71xx_bus_space_reversed;
-	di->bas.regshft = 2;
-	di->bas.rclk = freq;
-	di->baudrate = 9600;	// RedBoot default is 9600
-	di->databits = 8;
-	di->stopbits = 1;
-
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = ar71xx_bus_space_reversed;
-	di->bas.bsh = ar531x_uart_addr();
-	return (0);
-}
diff --git a/sys/mips/atheros/ar71xx_bus_space_reversed.c b/sys/mips/atheros/ar71xx_bus_space_reversed.c
deleted file mode 100644
index f889de30773c..000000000000
--- a/sys/mips/atheros/ar71xx_bus_space_reversed.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-#include <mips/atheros/ar71xx_bus_space_reversed.h>
-
-static bs_r_1_proto(reversed);
-static bs_r_2_proto(reversed);
-static bs_w_1_proto(reversed);
-static bs_w_2_proto(reversed);
-
-/*
- * Bus space that handles offsets in word for 1/2 bytes read/write access.
- * Byte order of values is handled by device drivers itself. 
- */
-static struct bus_space bus_space_reversed = {
-	/* cookie */
-	(void *) 0,
-
-	/* mapping/unmapping */
-	generic_bs_map,
-	generic_bs_unmap,
-	generic_bs_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	generic_bs_barrier,
-
-	/* read (single) */
-	reversed_bs_r_1,
-	reversed_bs_r_2,
-	generic_bs_r_4,
-	NULL,
-
-	/* read multiple */
-	generic_bs_rm_1,
-	generic_bs_rm_2,
-	generic_bs_rm_4,
-	NULL,
-
-	/* read region */
-	generic_bs_rr_1,
-	generic_bs_rr_2,
-	generic_bs_rr_4,
-	NULL,
-
-	/* write (single) */
-	reversed_bs_w_1,
-	reversed_bs_w_2,
-	generic_bs_w_4,
-	NULL,
-
-	/* write multiple */
-	generic_bs_wm_1,
-	generic_bs_wm_2,
-	generic_bs_wm_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	generic_bs_wr_2,
-	generic_bs_wr_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	generic_bs_sr_2,
-	generic_bs_sr_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	generic_bs_c_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	generic_bs_r_1,
-	generic_bs_r_2,
-	generic_bs_r_4,
-	NULL,
-
-	/* read multiple stream */
-	generic_bs_rm_1,
-	generic_bs_rm_2,
-	generic_bs_rm_4,
-	NULL,
-
-	/* read region stream */
-	generic_bs_rr_1,
-	generic_bs_rr_2,
-	generic_bs_rr_4,
-	NULL,
-
-	/* write (single) stream */
-	generic_bs_w_1,
-	generic_bs_w_2,
-	generic_bs_w_4,
-	NULL,
-
-	/* write multiple stream */
-	generic_bs_wm_1,
-	generic_bs_wm_2,
-	generic_bs_wm_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	generic_bs_wr_2,
-	generic_bs_wr_4,
-	NULL,
-};
-
-bus_space_tag_t ar71xx_bus_space_reversed = &bus_space_reversed;
-
-static uint8_t
-reversed_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
-{
-
-	return readb(h + (o &~ 3) + (3 - (o & 3)));
-}
-
-static void
-reversed_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
-{
-
-	writeb(h + (o &~ 3) + (3 - (o & 3)), v);
-}
-
-static uint16_t
-reversed_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
-{
-
-	return readw(h + (o &~ 3) + (2 - (o & 3)));
-}
-
-static void
-reversed_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
-{
-
-	writew(h + (o &~ 3) + (2 - (o & 3)), v);
-}
diff --git a/sys/mips/atheros/ar71xx_bus_space_reversed.h b/sys/mips/atheros/ar71xx_bus_space_reversed.h
deleted file mode 100644
index cd23b7d61f03..000000000000
--- a/sys/mips/atheros/ar71xx_bus_space_reversed.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __AR71XX_BUS_SPACE_REVERSEDH__
-#define __AR71XX_BUS_SPACE_REVERSEDH__
-
-extern bus_space_tag_t ar71xx_bus_space_reversed;
-
-#endif /* __AR71XX_BUS_SPACE_REVERSEDH__ */
diff --git a/sys/mips/atheros/ar71xx_caldata.c b/sys/mips/atheros/ar71xx_caldata.c
deleted file mode 100644
index e28f6d2ff4d3..000000000000
--- a/sys/mips/atheros/ar71xx_caldata.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*-
- * Copyright (c) 2017, Adrian Chadd <adrian@FreeBSD.org>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <sys/linker.h>
-#include <sys/firmware.h>
-
-struct ar71xx_caldata_softc {
-	device_t		sc_dev;
-};
-
-static int
-ar71xx_caldata_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-/* XXX TODO: unify with what's in ar71xx_fixup.c */
-
-/*
- * Create a calibration block from memory mapped SPI data for use by
- * various drivers.  Right now it's just ath(4) but later board support
- * will include 802.11ac NICs with calibration data in NOR flash.
- *
- * (Yes, there are a handful of QCA MIPS boards with QCA9880v2 802.11ac chips
- * with calibration data in flash..)
- */
-static void
-ar71xx_platform_create_cal_data(device_t dev, int id, long int flash_addr,
-    int size)
-{
-	char buf[64];
-	uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr);
-	void *eeprom = NULL;
-	const struct firmware *fw = NULL;
-
-	device_printf(dev, "EEPROM firmware: 0x%lx @ %d bytes\n",
-	    flash_addr, size);
-
-	eeprom = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
-	if (! eeprom) {
-		device_printf(dev, "%s: malloc failed for '%s', aborting EEPROM\n",
-		__func__, buf);
-		return;
-	}
-
-	memcpy(eeprom, cal_data, size);
-
-	/*
-	 * Generate a flash EEPROM 'firmware' from the given memory
-	 * region.  Since the SPI controller will eventually
-	 * go into port-IO mode instead of memory-mapped IO
-	 * mode, a copy of the EEPROM contents is required.
-	 */
-
-	snprintf(buf, sizeof(buf), "%s.%d.map.%d.eeprom_firmware",
-	    device_get_name(dev),
-	    device_get_unit(dev),
-	    id);
-
-	fw = firmware_register(buf, eeprom, size, 1, NULL);
-	if (fw == NULL) {
-		device_printf(dev, "%s: firmware_register (%s) failed\n",
-		    __func__, buf);
-		free(eeprom, M_DEVBUF);
-		return;
-	}
-	device_printf(dev, "device EEPROM '%s' registered\n", buf);
-}
-
-/*
- * Iterate through a list of early-boot hints creating calibration
- * data firmware chunks for AHB (ie, non-PCI) devices with calibration
- * data.
- */
-static int
-ar71xx_platform_check_eeprom_hints(device_t dev)
-{
-	char buf[64];
-	long int addr;
-	int size;
-	int i;
-
-	for (i = 0; i < 8; i++) {
-		snprintf(buf, sizeof(buf), "map.%d.ath_fixup_addr", i);
-		if (resource_long_value(device_get_name(dev),
-		    device_get_unit(dev), buf, &addr) != 0)
-			break;
-		snprintf(buf, sizeof(buf), "map.%d.ath_fixup_size", i);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev), buf, &size) != 0)
-			break;
-		device_printf(dev, "map.%d.ath_fixup_addr=0x%08x; size=%d\n",
-		    i, (int) addr, size);
-		(void) ar71xx_platform_create_cal_data(dev, i, addr, size);
-        }
-
-        return (0);
-}
-
-static int
-ar71xx_caldata_attach(device_t dev)
-{
-
-	device_add_child(dev, "nexus", -1);
-	ar71xx_platform_check_eeprom_hints(dev);
-	return (bus_generic_attach(dev));
-}
-
-static device_method_t ar71xx_caldata_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		ar71xx_caldata_probe),
-	DEVMETHOD(device_attach,	ar71xx_caldata_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-	DEVMETHOD_END
-};
-
-static driver_t ar71xx_caldata_driver = {
-	"ar71xx_caldata",
-	ar71xx_caldata_methods,
-	sizeof(struct ar71xx_caldata_softc),
-};
-
-static devclass_t ar71xx_caldata_devclass;
-
-DRIVER_MODULE(ar71xx_caldata, nexus, ar71xx_caldata_driver, ar71xx_caldata_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xx_chip.c b/sys/mips/atheros/ar71xx_chip.c
deleted file mode 100644
index b6975989f083..000000000000
--- a/sys/mips/atheros/ar71xx_chip.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-
-/* XXX these should replace the current definitions in ar71xxreg.h */
-/* XXX perhaps an ar71xx_chip.h header file? */
-#define AR71XX_PLL_REG_CPU_CONFIG       AR71XX_PLL_CPU_BASE + 0x00
-#define AR71XX_PLL_REG_SEC_CONFIG       AR71XX_PLL_CPU_BASE + 0x04
-#define AR71XX_PLL_REG_ETH0_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x10
-#define AR71XX_PLL_REG_ETH1_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x14
-
-#define AR71XX_PLL_DIV_SHIFT            3
-#define AR71XX_PLL_DIV_MASK             0x1f
-#define AR71XX_CPU_DIV_SHIFT            16
-#define AR71XX_CPU_DIV_MASK             0x3
-#define AR71XX_DDR_DIV_SHIFT            18
-#define AR71XX_DDR_DIV_MASK             0x3
-#define AR71XX_AHB_DIV_SHIFT            20
-#define AR71XX_AHB_DIV_MASK             0x7
-
-/* XXX these shouldn't be in here - this file is a per-chip file */
-/* XXX these should be in the top-level ar71xx type, not ar71xx -chip */
-uint32_t u_ar71xx_cpu_freq;
-uint32_t u_ar71xx_ahb_freq;
-uint32_t u_ar71xx_ddr_freq;
-uint32_t u_ar71xx_uart_freq;
-uint32_t u_ar71xx_wdt_freq;
-uint32_t u_ar71xx_refclk;
-uint32_t u_ar71xx_mdio_freq;
-
-static void
-ar71xx_chip_detect_mem_size(void)
-{
-}
-
-static void
-ar71xx_chip_detect_sys_frequency(void)
-{
-	uint32_t pll;
-	uint32_t freq;
-	uint32_t div;
-
-	u_ar71xx_mdio_freq = u_ar71xx_refclk = AR71XX_BASE_FREQ;
-
-	pll = ATH_READ_REG(AR71XX_PLL_REG_CPU_CONFIG);
-
-	div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;
-	freq = div * AR71XX_BASE_FREQ;
-
-	div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;
-	u_ar71xx_cpu_freq = freq / div;
-
-	div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;
-	u_ar71xx_ddr_freq = freq / div;
-
-	div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;
-	u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div;
-}
-
-/*
- * This does not lock the CPU whilst doing the work!
- */
-static void
-ar71xx_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR71XX_RST_RESET);
-	ATH_WRITE_REG(AR71XX_RST_RESET, reg | mask);
-}
-
-static void
-ar71xx_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR71XX_RST_RESET);
-	ATH_WRITE_REG(AR71XX_RST_RESET, reg & ~mask);
-}
-
-static int
-ar71xx_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR71XX_RST_RESET);
-	return ((reg & mask) == mask);
-}
-
-void
-ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-	uint32_t val, reg, ctrl;
-
-	switch (unit) {
-	case 0:
-		reg = AR71XX_MII0_CTRL;
-		break;
-	case 1:
-		reg = AR71XX_MII1_CTRL;
-		break;
-	default:
-		printf("%s: invalid MII unit set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-
-	switch (speed) {
-	case 10:
-		ctrl = MII_CTRL_SPEED_10;
-		break;
-	case 100:
-		ctrl = MII_CTRL_SPEED_100;
-		break;
-	case 1000:
-		ctrl = MII_CTRL_SPEED_1000;
-		break;
-	default:
-		printf("%s: invalid MII speed (%d) set for arge unit: %d\n",
-		    __func__, speed, unit);
-		return;
-	}
-
-	val = ATH_READ_REG(reg);
-	val &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT);
-	val |= (ctrl & MII_CTRL_SPEED_MASK) << MII_CTRL_SPEED_SHIFT;
-	ATH_WRITE_REG(reg, val);
-}
-
-void
-ar71xx_chip_set_mii_if(uint32_t unit, uint32_t mii_mode)
-{
-	uint32_t val, reg, mii_if;
-
-	switch (unit) {
-	case 0:
-		reg = AR71XX_MII0_CTRL;
-		if (mii_mode == AR71XX_MII_MODE_GMII)
-			mii_if = MII0_CTRL_IF_GMII;
-		else if (mii_mode == AR71XX_MII_MODE_MII)
-			mii_if = MII0_CTRL_IF_MII;
-		else if (mii_mode == AR71XX_MII_MODE_RGMII)
-			mii_if = MII0_CTRL_IF_RGMII;
-		else if (mii_mode == AR71XX_MII_MODE_RMII)
-			mii_if = MII0_CTRL_IF_RMII;
-		else {
-			printf("%s: invalid MII mode (%d) for unit %d\n",
-			    __func__, mii_mode, unit);
-			return;
-		}
-		break;
-	case 1:
-		reg = AR71XX_MII1_CTRL;
-		if (mii_mode == AR71XX_MII_MODE_RGMII)
-			mii_if = MII1_CTRL_IF_RGMII;
-		else if (mii_mode == AR71XX_MII_MODE_RMII)
-			mii_if = MII1_CTRL_IF_RMII;
-		else {
-			printf("%s: invalid MII mode (%d) for unit %d\n",
-			    __func__, mii_mode, unit);
-			return;
-		}
-		break;
-	default:
-		printf("%s: invalid MII unit set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-
-	val = ATH_READ_REG(reg);
-	val &= ~(MII_CTRL_IF_MASK << MII_CTRL_IF_SHIFT);
-	val |= (mii_if & MII_CTRL_IF_MASK) << MII_CTRL_IF_SHIFT;
-	ATH_WRITE_REG(reg, val);
-}
-
-/* Speed is either 10, 100 or 1000 */
-static void
-ar71xx_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-
-	switch (unit) {
-	case 0:
-		ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG,
-		    AR71XX_PLL_ETH_INT0_CLK, pll,
-		    AR71XX_PLL_ETH0_SHIFT);
-		break;
-	case 1:
-		ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG,
-		    AR71XX_PLL_ETH_INT1_CLK, pll,
-		    AR71XX_PLL_ETH1_SHIFT);
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-ar71xx_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(AR71XX_WB_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE:
-		ar71xx_ddr_flush(AR71XX_WB_FLUSH_PCI);
-		break;
-	default:
-		printf("%s: invalid DDR flush id (%d)\n", __func__, id);
-		break;
-	}
-}
-
-static uint32_t
-ar71xx_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch (speed) {
-	case 10:
-		pll = PLL_ETH_INT_CLK_10;
-		break;
-	case 100:
-		pll = PLL_ETH_INT_CLK_100;
-		break;
-	case 1000:
-		pll = PLL_ETH_INT_CLK_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-
-	return (pll);
-}
-
-static void
-ar71xx_chip_init_usb_peripheral(void)
-{
-
-	ar71xx_device_stop(RST_RESET_USB_OHCI_DLL |
-	    RST_RESET_USB_HOST | RST_RESET_USB_PHY);
-	DELAY(1000);
-
-	ar71xx_device_start(RST_RESET_USB_OHCI_DLL |
-	    RST_RESET_USB_HOST | RST_RESET_USB_PHY);
-	DELAY(1000);
-
-	ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG,
-	    USB_CTRL_CONFIG_OHCI_DES_SWAP |
-	    USB_CTRL_CONFIG_OHCI_BUF_SWAP |
-	    USB_CTRL_CONFIG_EHCI_DES_SWAP |
-	    USB_CTRL_CONFIG_EHCI_BUF_SWAP);
-
-	ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
-	    (32 << USB_CTRL_FLADJ_HOST_SHIFT) |
-	    (3 << USB_CTRL_FLADJ_A5_SHIFT));
-
-	DELAY(1000);
-}
-
-struct ar71xx_cpu_def ar71xx_chip_def = {
-	&ar71xx_chip_detect_mem_size,
-	&ar71xx_chip_detect_sys_frequency,
-	&ar71xx_chip_device_stop,
-	&ar71xx_chip_device_start,
-	&ar71xx_chip_device_stopped,
-	&ar71xx_chip_set_pll_ge,
-	&ar71xx_chip_set_mii_speed,
-	&ar71xx_chip_set_mii_if,
-	&ar71xx_chip_get_eth_pll,
-	&ar71xx_chip_ddr_flush,
-	&ar71xx_chip_init_usb_peripheral,
-};
diff --git a/sys/mips/atheros/ar71xx_chip.h b/sys/mips/atheros/ar71xx_chip.h
deleted file mode 100644
index 64f80a7fa9af..000000000000
--- a/sys/mips/atheros/ar71xx_chip.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR71XX_CHIP_H__
-#define	__AR71XX_CHIP_H__
-
-extern struct ar71xx_cpu_def ar71xx_chip_def;
-extern void ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed);
-extern void ar71xx_chip_set_mii_if(uint32_t unit, uint32_t mii_if);
-
-#endif
diff --git a/sys/mips/atheros/ar71xx_cpudef.h b/sys/mips/atheros/ar71xx_cpudef.h
deleted file mode 100644
index a8028be51720..000000000000
--- a/sys/mips/atheros/ar71xx_cpudef.h
+++ /dev/null
@@ -1,182 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR71XX_CPUDEF_H__
-#define	__AR71XX_CPUDEF_H__
-
-typedef enum {
-	AR71XX_CPU_DDR_FLUSH_GE0,
-	AR71XX_CPU_DDR_FLUSH_GE1,
-	AR71XX_CPU_DDR_FLUSH_USB,
-	AR71XX_CPU_DDR_FLUSH_PCIE,
-	AR71XX_CPU_DDR_FLUSH_WMAC,
-	AR71XX_CPU_DDR_FLUSH_PCIE_EP,
-	AR71XX_CPU_DDR_FLUSH_CHECKSUM,
-} ar71xx_flush_ddr_id_t;
-
-struct ar71xx_cpu_def {
-	void (* detect_mem_size) (void);
-	void (* detect_sys_frequency) (void);
-	void (* ar71xx_chip_device_stop) (uint32_t);
-	void (* ar71xx_chip_device_start) (uint32_t);
-	int (* ar71xx_chip_device_stopped) (uint32_t);
-	void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t);
-	void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t);
-	void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode);
-	uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int);
-
-	/*
-	 * From Linux - Handling this IRQ is a bit special.
-	 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI
-	 * AR724x - AR724X_DDR_REG_FLUSH_PCIE
-	 * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC
-	 *
-	 * These are set when STATUSF_IP2 is set in regiser c0.
-	 * This flush is done before the IRQ is handled to make
-	 * sure the driver correctly sees any memory updates.
-	 */
-	void (* ar71xx_chip_ddr_flush) (ar71xx_flush_ddr_id_t id);
-	/*
-	 * The USB peripheral init code is subtly different for
-	 * each chip.
-	 */
-	void (* ar71xx_chip_init_usb_peripheral) (void);
-
-	void (* ar71xx_chip_reset_ethernet_switch) (void);
-
-	void (* ar71xx_chip_reset_wmac) (void);
-
-	void (* ar71xx_chip_init_gmac) (void);
-
-	void (* ar71xx_chip_reset_nfc) (int);
-
-	void (* ar71xx_chip_gpio_out_configure) (int, uint8_t);
-};
-
-extern struct ar71xx_cpu_def * ar71xx_cpu_ops;
-
-static inline void ar71xx_detect_sys_frequency(void)
-{
-	ar71xx_cpu_ops->detect_sys_frequency();
-}
-
-static inline void ar71xx_device_stop(uint32_t mask)
-{
-	ar71xx_cpu_ops->ar71xx_chip_device_stop(mask);
-}
-
-static inline void ar71xx_device_start(uint32_t mask)
-{
-	ar71xx_cpu_ops->ar71xx_chip_device_start(mask);
-}
-
-static inline int ar71xx_device_stopped(uint32_t mask)
-{
-	return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask);
-}
-
-static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-	ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll);
-}
-
-static inline void ar71xx_device_set_mii_speed(int unit, int speed)
-{
-	ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed);
-}
-
-static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg)
-{
-	ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg);
-}
-
-static inline void ar71xx_device_flush_ddr(ar71xx_flush_ddr_id_t id)
-{
-	ar71xx_cpu_ops->ar71xx_chip_ddr_flush(id);
-}
-
-static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed)
-{
-	return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed));
-}
-
-static inline void ar71xx_init_usb_peripheral(void)
-{
-	ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral();
-}
-
-static inline void ar71xx_reset_ethernet_switch(void)
-{
-	if (ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch)
-		ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch();
-}
-
-static inline void ar71xx_reset_wmac(void)
-{
-	if (ar71xx_cpu_ops->ar71xx_chip_reset_wmac)
-		ar71xx_cpu_ops->ar71xx_chip_reset_wmac();
-}
-
-static inline void ar71xx_init_gmac(void)
-{
-	if (ar71xx_cpu_ops->ar71xx_chip_init_gmac)
-		ar71xx_cpu_ops->ar71xx_chip_init_gmac();
-}
-
-static inline void ar71xx_reset_nfc(int active)
-{
-
-	if (ar71xx_cpu_ops->ar71xx_chip_reset_nfc)
-		ar71xx_cpu_ops->ar71xx_chip_reset_nfc(active);
-}
-
-static inline void ar71xx_gpio_ouput_configure(int gpio, uint8_t func)
-{
-	if (ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure)
-		ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure(gpio, func);
-}
-
-/* XXX shouldn't be here! */
-extern uint32_t u_ar71xx_refclk;
-extern uint32_t u_ar71xx_cpu_freq;
-extern uint32_t u_ar71xx_ahb_freq;
-extern uint32_t u_ar71xx_ddr_freq;
-extern uint32_t u_ar71xx_uart_freq;
-extern uint32_t u_ar71xx_wdt_freq;
-extern uint32_t u_ar71xx_mdio_freq;
-static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
-static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
-static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
-static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; }
-static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; }
-static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; }
-static inline uint64_t ar71xx_mdio_freq(void) { return u_ar71xx_mdio_freq; }
-
-#endif
diff --git a/sys/mips/atheros/ar71xx_ehci.c b/sys/mips/atheros/ar71xx_ehci.c
deleted file mode 100644
index a8d93da531ba..000000000000
--- a/sys/mips/atheros/ar71xx_ehci.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2008 Sam Leffler.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * AR71XX attachment driver for the USB Enhanced Host Controller.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_bus.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/condvar.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-#include <dev/usb/controller/ehci.h>
-#include <dev/usb/controller/ehcireg.h>
-
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_bus_space_reversed.h>
-
-#define EHCI_HC_DEVSTR		"AR71XX Integrated USB 2.0 controller"
-
-#define	EHCI_USBMODE		0x68	/* USB Device mode register */
-#define	EHCI_UM_CM		0x00000003	/* R/WO Controller Mode */
-#define	EHCI_UM_CM_HOST		0x3	/* Host Controller */
-
-struct ar71xx_ehci_softc {
-	ehci_softc_t		base;	/* storage for EHCI code */
-};
-
-static device_attach_t ar71xx_ehci_attach;
-static device_detach_t ar71xx_ehci_detach;
-
-bs_r_1_proto(reversed);
-bs_w_1_proto(reversed);
-
-static void
-ar71xx_ehci_post_reset(struct ehci_softc *ehci_softc)
-{
-	uint32_t usbmode;
-
-	/* Force HOST mode */
-	usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
-	usbmode &= ~EHCI_UM_CM;
-	usbmode |= EHCI_UM_CM_HOST;
-	EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
-}
-
-static int
-ar71xx_ehci_probe(device_t self)
-{
-
-	device_set_desc(self, EHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-ar71xx_ehci_intr(void *arg)
-{
-
-	/* XXX TODO: should really see if this was our interrupt.. */
-	ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
-	ehci_interrupt(arg);
-}
-
-static int
-ar71xx_ehci_attach(device_t self)
-{
-	struct ar71xx_ehci_softc *isc = device_get_softc(self);
-	ehci_softc_t *sc = &isc->base;
-	int err;
-	int rid;
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
-		return (ENOMEM);
-	}
-
-	sc->sc_bus.usbrev = USB_REV_2_0;
-
-	/* NB: hints fix the memory location and irq */
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-
-	/*
-	 * Craft special resource for bus space ops that handle
-	 * byte-alignment of non-word addresses.  
-	 */
-	sc->sc_io_tag = ar71xx_bus_space_reversed;
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-	    RF_ACTIVE | RF_SHAREABLE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!sc->sc_bus.bdev) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "Atheros");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-	    NULL, ar71xx_ehci_intr, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	/*
-	 * Arrange to force Host mode, select big-endian byte alignment,
-	 * and arrange to not terminate reset operations (the adapter
-	 * will ignore it if we do but might as well save a reg write).
-	 * Also, the controller has an embedded Transaction Translator
-	 * which means port speed must be read from the Port Status
-	 * register following a port enable.
-	 */
-	sc->sc_flags = 0;
-	sc->sc_vendor_post_reset = ar71xx_ehci_post_reset;
-
-	switch (ar71xx_soc) {
-		case AR71XX_SOC_AR7241:
-		case AR71XX_SOC_AR7242:
-		case AR71XX_SOC_AR9130:
-		case AR71XX_SOC_AR9132:
-		case AR71XX_SOC_AR9330:
-		case AR71XX_SOC_AR9331:
-		case AR71XX_SOC_AR9341:
-		case AR71XX_SOC_AR9342:
-		case AR71XX_SOC_AR9344:
-		case AR71XX_SOC_QCA9533:
-		case AR71XX_SOC_QCA9533_V2:
-		case AR71XX_SOC_QCA9556:
-		case AR71XX_SOC_QCA9558:
-			sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
-			sc->sc_vendor_get_port_speed =
-			    ehci_get_port_speed_portsc;
-			break;
-		default:
-			/* fallthrough */
-			break;
-	}
-
-	/*
-	 * ehci_reset() needs the correct offset to access the host controller
-	 * registers. The AR724x/AR913x offsets aren't 0.
-	*/
-	sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
-
-	(void) ehci_reset(sc);
-
-	err = ehci_init(sc);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	ar71xx_ehci_detach(self);
-	return (ENXIO);
-}
-
-static int
-ar71xx_ehci_detach(device_t self)
-{
-	struct ar71xx_ehci_softc *isc = device_get_softc(self);
-	ehci_softc_t *sc = &isc->base;
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
- 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ehci_detach() after ehci_init()
-		 */
-		ehci_detach(sc);
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-
-		if (err)
-			/* XXX or should we panic? */
-			device_printf(self, "Could not tear down irq, %d\n",
-			    err);
-		sc->sc_intr_hdl = NULL;
-	}
-
- 	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ehci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ar71xx_ehci_probe),
-	DEVMETHOD(device_attach, ar71xx_ehci_attach),
-	DEVMETHOD(device_detach, ar71xx_ehci_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ehci_driver = {
-	.name = "ehci",
-	.methods = ehci_methods,
-	.size = sizeof(struct ar71xx_ehci_softc),
-};
-
-static devclass_t ehci_devclass;
-
-DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
-DRIVER_MODULE(ehci, apb, ehci_driver, ehci_devclass, 0, 0);
-
-MODULE_DEPEND(ehci, usb, 1, 1, 1);
diff --git a/sys/mips/atheros/ar71xx_fixup.c b/sys/mips/atheros/ar71xx_fixup.c
deleted file mode 100644
index d8013b5888df..000000000000
--- a/sys/mips/atheros/ar71xx_fixup.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_pci_bus_space.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#include <sys/linker.h>
-#include <sys/firmware.h>
-
-#include <mips/atheros/ar71xx_fixup.h>
-
-/*
- * Take a copy of the EEPROM contents and squirrel it away in a firmware.
- * The SPI flash will eventually cease to be memory-mapped, so we need
- * to take a copy of this before the SPI driver initialises.
- */
-void
-ar71xx_pci_slot_create_eeprom_firmware(device_t dev, u_int bus, u_int slot,
-    u_int func, long int flash_addr, int size)
-{
-	char buf[64];
-	uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr);
-	void *eeprom = NULL;
-	const struct firmware *fw = NULL;
-
-	device_printf(dev, "EEPROM firmware: 0x%lx @ %d bytes\n",
-	    flash_addr, size);
-
-	eeprom = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
-	if (! eeprom) {
-		device_printf(dev,
-			    "%s: malloc failed for '%s', aborting EEPROM\n",
-			    __func__, buf);
-			return;
-	}
-
-	memcpy(eeprom, cal_data, size);
-
-	/*
-	 * Generate a flash EEPROM 'firmware' from the given memory
-	 * region.  Since the SPI controller will eventually
-	 * go into port-IO mode instead of memory-mapped IO
-	 * mode, a copy of the EEPROM contents is required.
-	 */
-	snprintf(buf, sizeof(buf), "%s.%d.bus.%d.%d.%d.eeprom_firmware",
-	    device_get_name(dev), device_get_unit(dev), bus, slot, func);
-	fw = firmware_register(buf, eeprom, size, 1, NULL);
-	if (fw == NULL) {
-		device_printf(dev, "%s: firmware_register (%s) failed\n",
-		    __func__, buf);
-		free(eeprom, M_DEVBUF);
-		return;
-	}
-	device_printf(dev, "device EEPROM '%s' registered\n", buf);
-}
diff --git a/sys/mips/atheros/ar71xx_fixup.h b/sys/mips/atheros/ar71xx_fixup.h
deleted file mode 100644
index 8e4b4c1f6baa..000000000000
--- a/sys/mips/atheros/ar71xx_fixup.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012, Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	__ATHEROS_AR71XX_FIXUP_H__
-#define	__ATHEROS_AR71XX_FIXUP_H__
-
-extern	void ar71xx_pci_slot_create_eeprom_firmware(device_t dev,
-    u_int bus, u_int slot, u_int func, long int flash_addr, int size);
-
-#endif /* __ATHEROS_AR71XX_FIXUP_H__ */
diff --git a/sys/mips/atheros/ar71xx_gpio.c b/sys/mips/atheros/ar71xx_gpio.c
deleted file mode 100644
index 539e108cb798..000000000000
--- a/sys/mips/atheros/ar71xx_gpio.c
+++ /dev/null
@@ -1,641 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2009, Luiz Otavio O Souza. 
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * GPIO driver for AR71xx 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_gpiovar.h>
-#include <dev/gpio/gpiobusvar.h>
-#include <mips/atheros/ar933xreg.h>
-#include <mips/atheros/ar934xreg.h>
-#include <mips/atheros/qca953xreg.h>
-#include <mips/atheros/qca955xreg.h>
-
-#include "gpio_if.h"
-
-#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
-
-/*
- * Helpers
- */
-static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, 
-    uint32_t mask);
-static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, 
-    uint32_t mask);
-static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, 
-    struct gpio_pin *pin, uint32_t flags);
-
-/*
- * Driver stuff
- */
-static int ar71xx_gpio_probe(device_t dev);
-static int ar71xx_gpio_attach(device_t dev);
-static int ar71xx_gpio_detach(device_t dev);
-static int ar71xx_gpio_filter(void *arg);
-static void ar71xx_gpio_intr(void *arg);
-
-/*
- * GPIO interface
- */
-static device_t ar71xx_gpio_get_bus(device_t);
-static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
-static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
-static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
-    *flags);
-static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
-static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
-static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
-static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
-static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
-
-/*
- * Enable/disable the GPIO function control space.
- *
- * This is primarily for the AR71xx, which has SPI CS1/CS2, UART, SLIC, I2S
- * as GPIO pin options.
- */
-static void
-ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
-{
-
-	/*
-	 * XXX TODO: refactor this out into a per-chipset method.
-	 */
-	if (ar71xx_soc == AR71XX_SOC_AR9341 ||
-	    ar71xx_soc == AR71XX_SOC_AR9342 ||
-	    ar71xx_soc == AR71XX_SOC_AR9344 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9533 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9556 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9558)
-		GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
-	else
-		GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
-}
-
-static void
-ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
-{
-
-	/*
-	 * XXX TODO: refactor this out into a per-chipset method.
-	 */
-	if (ar71xx_soc == AR71XX_SOC_AR9341 ||
-	    ar71xx_soc == AR71XX_SOC_AR9342 ||
-	    ar71xx_soc == AR71XX_SOC_AR9344 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9533 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9556 ||
-	    ar71xx_soc == AR71XX_SOC_QCA9558)
-		GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
-	else
-		GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
-}
-
-/*
- * On most platforms, GPIO_OE is a bitmap where the bit set
- * means "enable output."
- *
- * On AR934x and QCA953x, it's the opposite - the bit set means
- * "input enable".
- */
-static int
-ar71xx_gpio_oe_is_high(void)
-{
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR9341:
-	case AR71XX_SOC_AR9342:
-	case AR71XX_SOC_AR9344:
-	case AR71XX_SOC_QCA9533:
-	case AR71XX_SOC_QCA9533_V2:
-		return 0;
-	default:
-		return 1;
-	}
-}
-
-static void
-ar71xx_gpio_oe_set_output(struct ar71xx_gpio_softc *sc, int b)
-{
-	uint32_t mask;
-
-	mask = 1 << b;
-
-	if (ar71xx_gpio_oe_is_high())
-		GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
-	else
-		GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
-}
-
-static void
-ar71xx_gpio_oe_set_input(struct ar71xx_gpio_softc *sc, int b)
-{
-	uint32_t mask;
-
-	mask = 1 << b;
-
-	if (ar71xx_gpio_oe_is_high())
-		GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
-	else
-		GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
-}
-
-static void
-ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
-    unsigned int flags)
-{
-
-	/*
-	 * Manage input/output
-	 */
-	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
-		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
-		if (flags & GPIO_PIN_OUTPUT) {
-			pin->gp_flags |= GPIO_PIN_OUTPUT;
-			ar71xx_gpio_oe_set_output(sc, pin->gp_pin);
-		} else {
-			pin->gp_flags |= GPIO_PIN_INPUT;
-			ar71xx_gpio_oe_set_input(sc, pin->gp_pin);
-		}
-	}
-}
-
-static device_t
-ar71xx_gpio_get_bus(device_t dev)
-{
-	struct ar71xx_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-ar71xx_gpio_pin_max(device_t dev, int *maxpin)
-{
-
-	switch (ar71xx_soc) {
-		case AR71XX_SOC_AR9130:
-		case AR71XX_SOC_AR9132:
-			*maxpin = AR91XX_GPIO_PINS - 1;
-			break;
-		case AR71XX_SOC_AR7240:
-		case AR71XX_SOC_AR7242:
-			*maxpin = AR724X_GPIO_PINS - 1;
-			break;
-		case AR71XX_SOC_AR7241:
-			*maxpin = AR7241_GPIO_PINS - 1;
-			break;
-		case AR71XX_SOC_AR9330:
-		case AR71XX_SOC_AR9331:
-			*maxpin = AR933X_GPIO_COUNT - 1;
-			break;
-		case AR71XX_SOC_AR9341:
-		case AR71XX_SOC_AR9342:
-		case AR71XX_SOC_AR9344:
-			*maxpin = AR934X_GPIO_COUNT - 1;
-			break;
-		case AR71XX_SOC_QCA9533:
-		case AR71XX_SOC_QCA9533_V2:
-			*maxpin = QCA953X_GPIO_COUNT - 1;
-			break;
-		case AR71XX_SOC_QCA9556:
-		case AR71XX_SOC_QCA9558:
-			*maxpin = QCA955X_GPIO_COUNT - 1;
-			break;
-		default:
-			*maxpin = AR71XX_GPIO_PINS - 1;
-	}
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*caps = sc->gpio_pins[i].gp_caps;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*flags = sc->gpio_pins[i].gp_flags;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	int i;
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	if (value)
-		GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
-	else
-		GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	*val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	int res, i;
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
-	if (res)
-		GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
-	else
-		GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_filter(void *arg)
-{
-
-	/* TODO: something useful */
-	return (FILTER_STRAY);
-}
-
-static void
-ar71xx_gpio_intr(void *arg)
-{
-	struct ar71xx_gpio_softc *sc = arg;
-	GPIO_LOCK(sc);
-	/* TODO: something useful */
-	GPIO_UNLOCK(sc);
-}
-
-static int
-ar71xx_gpio_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Atheros AR71XX GPIO driver");
-	return (0);
-}
-
-static int
-ar71xx_gpio_attach(device_t dev)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-	int i, j, maxpin;
-	int mask, pinon;
-	uint32_t oe;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("ar71xx_gpio: Only one gpio module supported"));
-
-	mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
-
-	/* Map control/status registers. */
-	sc->gpio_mem_rid = 0;
-	sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->gpio_mem_rid, RF_ACTIVE);
-
-	if (sc->gpio_mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		ar71xx_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		ar71xx_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 
-	    ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		ar71xx_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	sc->dev = dev;
-
-	/* Enable function bits that are required */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "function_set", &mask) == 0) {
-		device_printf(dev, "function_set: 0x%x\n", mask);
-		ar71xx_gpio_function_enable(sc, mask);
-	}
-	/* Disable function bits that are required */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "function_clear", &mask) == 0) {
-		device_printf(dev, "function_clear: 0x%x\n", mask);
-		ar71xx_gpio_function_disable(sc, mask);
-	}
-
-	/* Disable interrupts for all pins. */
-	GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
-
-	/* Initialise all pins specified in the mask, up to the pin count */
-	(void) ar71xx_gpio_pin_max(dev, &maxpin);
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "pinmask", &mask) != 0)
-		mask = 0;
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "pinon", &pinon) != 0)
-		pinon = 0;
-	device_printf(dev, "gpio pinmask=0x%x\n", mask);
-	for (j = 0; j <= maxpin; j++) {
-		if ((mask & (1 << j)) == 0)
-			continue;
-		sc->gpio_npins++;
-	}
-	/* Iniatilize the GPIO pins, keep the loader settings. */
-	oe = GPIO_READ(sc, AR71XX_GPIO_OE);
-	/*
-	 * For AR934x and QCA953x, the meaning of oe is inverted;
-	 * so flip it the right way around so we can parse the GPIO
-	 * state.
-	 */
-	if (!ar71xx_gpio_oe_is_high())
-		oe = ~oe;
-
-	sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins,
-	    M_DEVBUF, M_WAITOK | M_ZERO);
-	for (i = 0, j = 0; j <= maxpin; j++) {
-		if ((mask & (1 << j)) == 0)
-			continue;
-		snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
-		    "pin %d", j);
-		sc->gpio_pins[i].gp_pin = j;
-		sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
-		if (oe & (1 << j))
-			sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
-		else
-			sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
-		i++;
-	}
-
-	/* Turn on the hinted pins. */
-	for (i = 0; i < sc->gpio_npins; i++) {
-		j = sc->gpio_pins[i].gp_pin;
-		if ((pinon & (1 << j)) != 0) {
-			ar71xx_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
-			ar71xx_gpio_pin_set(dev, j, 1);
-		}
-	}
-
-	/*
-	 * Search through the function hints, in case there's some
-	 * overrides such as LNA control.
-	 *
-	 * hint.gpio.X.func.<pin>.gpiofunc=<func value>
-	 * hint.gpio.X.func.<pin>.gpiomode=1 (for output, default low)
-	 */
-	for (i = 0; i <= maxpin; i++) {
-		char buf[32];
-		int gpiofunc, gpiomode;
-
-		snprintf(buf, 32, "func.%d.gpiofunc", i);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev),
-		    buf,
-		    &gpiofunc) != 0)
-			continue;
-		/* Get the mode too */
-		snprintf(buf, 32, "func.%d.gpiomode", i);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev),
-		    buf,
-		    &gpiomode) != 0)
-			continue;
-
-		/* We only handle mode=1 (output) for now */
-		if (gpiomode != 1)
-			continue;
-
-		device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n",
-		    __func__,
-		    i,
-		    gpiofunc,
-		    gpiomode);
-
-		/* Set pin value = 0, so it stays low by default */
-		oe = GPIO_READ(sc, AR71XX_GPIO_OUT);
-		oe &= ~ (1 << i);
-		GPIO_WRITE(sc, AR71XX_GPIO_OUT, oe);
-
-		/* Set output */
-		ar71xx_gpio_oe_set_output(sc, i);
-
-		/* Finally: Set the output config */
-		ar71xx_gpio_ouput_configure(i, gpiofunc);
-	}
-
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL) {
-		ar71xx_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-ar71xx_gpio_detach(device_t dev)
-{
-	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
-
-	KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
-
-	gpiobus_detach_bus(dev);
-	if (sc->gpio_ih)
-		bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
-	if (sc->gpio_irq_res)
-		bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
-		    sc->gpio_irq_res);
-	if (sc->gpio_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
-		    sc->gpio_mem_res);
-	if (sc->gpio_pins)
-		free(sc->gpio_pins, M_DEVBUF);
-	mtx_destroy(&sc->gpio_mtx);
-
-	return(0);
-}
-
-static device_method_t ar71xx_gpio_methods[] = {
-	DEVMETHOD(device_probe, ar71xx_gpio_probe),
-	DEVMETHOD(device_attach, ar71xx_gpio_attach),
-	DEVMETHOD(device_detach, ar71xx_gpio_detach),
-
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus, ar71xx_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
-	{0, 0},
-};
-
-static driver_t ar71xx_gpio_driver = {
-	"gpio",
-	ar71xx_gpio_methods,
-	sizeof(struct ar71xx_gpio_softc),
-};
-static devclass_t ar71xx_gpio_devclass;
-
-DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xx_gpiovar.h b/sys/mips/atheros/ar71xx_gpiovar.h
deleted file mode 100644
index 35af376313f5..000000000000
--- a/sys/mips/atheros/ar71xx_gpiovar.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2009, Luiz Otavio O Souza.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __AR71XX_GPIOVAR_H__
-#define __AR71XX_GPIOVAR_H__
-
-#define GPIO_LOCK(_sc)		mtx_lock(&(_sc)->gpio_mtx)
-#define GPIO_UNLOCK(_sc)	mtx_unlock(&(_sc)->gpio_mtx)
-#define GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
-
-/*
- * register space access macros
- */
-#define GPIO_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->gpio_mem_res, (reg), (val)); \
-	} while (0)
-
-#define GPIO_READ(sc, reg)	 bus_read_4(sc->gpio_mem_res, (reg))
-
-#define GPIO_SET_BITS(sc, reg, bits)	\
-	GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits))
-
-#define GPIO_CLEAR_BITS(sc, reg, bits)	\
-	GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits))
-
-#define	AR71XX_GPIO_PINS	12
-#define	AR724X_GPIO_PINS	18
-#define	AR7241_GPIO_PINS	20
-#define	AR91XX_GPIO_PINS	22
-
-struct ar71xx_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct mtx		gpio_mtx;
-	struct resource		*gpio_mem_res;
-	int			gpio_mem_rid;
-	struct resource		*gpio_irq_res;
-	int			gpio_irq_rid;
-	void			*gpio_ih;
-	int			gpio_npins;
-	struct gpio_pin		*gpio_pins;
-};
-
-#endif	/* __AR71XX_GPIOVAR_H__ */
diff --git a/sys/mips/atheros/ar71xx_macaddr.c b/sys/mips/atheros/ar71xx_macaddr.c
deleted file mode 100644
index 5b85820c3ba0..000000000000
--- a/sys/mips/atheros/ar71xx_macaddr.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*-
- * Copyright (c) 2015, Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/types.h>
-#include <sys/libkern.h>
-
-#include <net/ethernet.h>
-
-#include <mips/atheros/ar71xx_macaddr.h>
-
-/*
- * Some boards don't have a separate MAC address for each individual
- * device on-board, but instead need to derive them from a single MAC
- * address stored somewhere.
- */
-uint8_t ar71xx_board_mac_addr[ETHER_ADDR_LEN];
-
-/*
- * Initialise a MAC address 'dst' from a MAC address 'src'.
- *
- * 'offset' is added to the low three bytes to allow for sequential
- * MAC addresses to be derived from a single one.
- *
- * 'is_local' is whether this 'dst' should be made a local MAC address.
- *
- * Returns 0 if it was successfully initialised, -1 on error.
- */
-int
-ar71xx_mac_addr_init(unsigned char *dst, const unsigned char *src,
-    int offset, int is_local)
-{
-	int t;
-
-	if (dst == NULL || src == NULL)
-		return (-1);
-
-	/* XXX TODO: validate 'src' is a valid MAC address */
-
-	t = (((uint32_t) src[3]) << 16)
-	    + (((uint32_t) src[4]) << 8)
-	    + ((uint32_t) src[5]);
-
-	/* Note: this is handles both positive and negative offsets */
-	t += offset;
-
-	dst[0] = src[0];
-	dst[1] = src[1];
-	dst[2] = src[2];
-	dst[3] = (t >> 16) & 0xff;
-	dst[4] = (t >> 8) & 0xff;
-	dst[5] = t & 0xff;
-
-	if (is_local)
-		dst[0] |= 0x02;
-
-	/* Everything's okay */
-	return (0);
-}
-
-/*
- * Initialise a random MAC address for use by if_arge.c and whatever
- * else requires it.
- *
- * Returns 0 on success, -1 on error.
- */
-int
-ar71xx_mac_addr_random_init(struct ifnet *ifp, struct ether_addr *dst)
-{
-
-	ether_gen_addr(ifp, dst);
-	return (0);
-}
diff --git a/sys/mips/atheros/ar71xx_macaddr.h b/sys/mips/atheros/ar71xx_macaddr.h
deleted file mode 100644
index 9f9ede84ca44..000000000000
--- a/sys/mips/atheros/ar71xx_macaddr.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*-
- * Copyright (c) 2015, Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	__ATHEROS_AR71XX_MACADDR_H__
-#define	__ATHEROS_AR71XX_MACADDR_H__
-
-extern	uint8_t ar71xx_board_mac_addr[ETHER_ADDR_LEN];
-
-extern	int ar71xx_mac_addr_init(unsigned char *dst, const unsigned char *src,
-	    int offset, int is_local);
-extern	int ar71xx_mac_addr_random_init(struct ifnet *ifp, struct ether_addr *dst);
-
-#endif /* __ATHEROS_AR71XX_MACADDR_H__ */
diff --git a/sys/mips/atheros/ar71xx_machdep.c b/sys/mips/atheros/ar71xx_machdep.c
deleted file mode 100644
index 72beec972de2..000000000000
--- a/sys/mips/atheros/ar71xx_machdep.c
+++ /dev/null
@@ -1,457 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/boot.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-
-#include <mips/atheros/ar71xxreg.h>
-
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_macaddr.h>
-
-extern char edata[], end[];
-
-/* 4KB static data aread to keep a copy of the bootload env until
-   the dynamic kenv is setup */
-char boot1_env[4096];
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-void
-platform_reset(void)
-{
-	while(1) {
-		printf("%s: resetting via AHB FULL_CHIP register...\n", __func__);
-		ar71xx_device_start(RST_RESET_FULL_CHIP);
-		DELAY(100 * 1000);
-		ar71xx_device_stop(RST_RESET_FULL_CHIP);
-		DELAY(1000 * 1000);
-	}
-}
-
-/*
- * Obtain the MAC address via the Redboot environment.
- */
-static int
-ar71xx_redboot_get_macaddr(void)
-{
-	char *var;
-	int count = 0, i;
-	uint32_t macaddr[ETHER_ADDR_LEN];
-	uint8_t tmpmac[ETHER_ADDR_LEN];
-
-	/*
-	 * "ethaddr" is passed via envp on RedBoot platforms
-	 * "kmac" is passed via argv on RouterBOOT platforms
-	 */
-	if ((var = kern_getenv("ethaddr")) != NULL ||
-	    (var = kern_getenv("kmac")) != NULL) {
-		count = sscanf(var, "%x%*c%x%*c%x%*c%x%*c%x%*c%x",
-		    &macaddr[0], &macaddr[1],
-		    &macaddr[2], &macaddr[3],
-		    &macaddr[4], &macaddr[5]);
-
-		if (count < 6) {
-			memset(macaddr, 0,
-			    sizeof(macaddr));
-		} else {
-			for (i = 0; i < ETHER_ADDR_LEN; i++)
-				tmpmac[i] = macaddr[i] & 0xff;
-			(void) ar71xx_mac_addr_init(ar71xx_board_mac_addr,
-			    tmpmac,
-			    0, /* offset */
-			    0); /* is_local */
-		}
-		freeenv(var);
-		return (0);
-	}
-	return (-1);
-}
-
-#ifdef	AR71XX_ENV_ROUTERBOOT
-/*
- * RouterBoot gives us the board memory in a command line argument.
- */
-static int
-ar71xx_routerboot_get_mem(int argc, char **argv)
-{
-	int i, board_mem;
-
-	/*
-	 * Protect ourselves from garbage in registers.
-	 */
-	if (!MIPS_IS_VALID_PTR(argv))
-		return (0);
-
-	for (i = 0; i < argc; i++) {
-		if (argv[i] == NULL)
-			continue;
-		if (strncmp(argv[i], "mem=", 4) == 0) {
-			if (sscanf(argv[i] + 4, "%dM", &board_mem) == 1)
-				return (btoc(board_mem * 1024 * 1024));
-		}
-	}
-
-	return (0);
-}
-#endif
-
-/*
- * Handle initialising the MAC address from a specific EEPROM
- * offset.
- *
- * This is done during (very) early boot.
- *
- * hint.ar71xx.0.eeprom_mac_addr=<address to read from>
- * hint.ar71xx.0.eeprom_mac_isascii=<0|1>
- */
-static int
-ar71xx_platform_read_eeprom_mac(void)
-{
-	long eeprom_mac_addr = 0;
-	const char *mac;
-	int i, readascii = 0;
-	uint8_t macaddr[ETHER_ADDR_LEN];
-
-	if (resource_long_value("ar71xx", 0, "eeprom_mac_addr",
-	    &eeprom_mac_addr) != 0)
-		return (-1);
-
-	/* get a pointer to the EEPROM MAC address */
-
-	mac = (const char *) MIPS_PHYS_TO_KSEG1(eeprom_mac_addr);
-
-	/* Check if it's ASCII or not */
-	if (resource_int_value("ar71xx", 0, "eeprom_mac_isascii",
-	    &readascii) == 0 && readascii == 1) {
-		printf("ar71xx: Overriding MAC from EEPROM (ascii)\n");
-		for (i = 0; i < 6; i++) {
-			macaddr[i] = strtol(&(mac[i*3]), NULL, 16);
-		}
-	} else {
-		printf("ar71xx: Overriding MAC from EEPROM\n");
-		for (i = 0; i < 6; i++) {
-			macaddr[i] = mac[i];
-		}
-	}
-
-	/* Set the default board MAC */
-	(void) ar71xx_mac_addr_init(ar71xx_board_mac_addr,
-	    macaddr,
-	    0, /* offset */
-	    0); /* is_local */
-	printf("ar71xx: Board MAC: %6D\n", ar71xx_board_mac_addr, ":");
-	return (0);
-}
-
-/*
- * Populate a kenv hint for the given device based on the given
- * MAC address and offset.
- *
- * Returns 0 if ok, < 0 on error.
- */
-static int
-ar71xx_platform_set_mac_hint(const char *dev, int unit,
-    const uint8_t *macaddr, int offset, int islocal)
-{
-	char macstr[32];
-	uint8_t lclmac[ETHER_ADDR_LEN];
-	char devstr[32];
-
-	/* Initialise the MAC address, plus/minus the offset */
-	if (ar71xx_mac_addr_init(lclmac, macaddr, offset, islocal) != 0) {
-		return (-1);
-	}
-
-	/* Turn it into a string */
-	snprintf(macstr, 32, "%6D", lclmac, ":");
-	snprintf(devstr, 32, "hint.%s.%d.macaddr", dev, unit);
-
-	printf("  %s => %s\n", devstr, macstr);
-
-	/* Call setenv */
-	if (kern_setenv(devstr, macstr) != 0) {
-		printf("%s: failed to set hint (%s => %s)\n",
-		    __func__,
-		    devstr,
-		    macstr);
-		return (-1);
-	}
-
-	return (0);
-}
-
-/*
- * Iterate through the list of boot time hints that populate
- * a device MAC address hint based on the "board" MAC address.
- *
- * ar71xx_mac_map.X.devid=<device id, eg ath>
- * ar71xx_mac_map.X.unitid=<unit id, eg 0>
- * ar71xx_mac_map.X.offset=<mac address value offset>
- * ar71xx_mac_map.X.is_local=<1 or 0>
- */
-static int
-ar71xx_platform_check_mac_hints(void)
-{
-	int i;
-	const char *devid;
-	int offset, is_local, unitid;
-
-	for (i = 0; i < 8; i++) {
-		if (resource_string_value("ar71xx_mac_map", i, "devid",
-		    &devid) != 0)
-			break;
-		if (resource_int_value("ar71xx_mac_map", i, "unitid",
-		    &unitid) != 0)
-			break;
-		if (resource_int_value("ar71xx_mac_map", i, "offset",
-		    &offset) != 0)
-			break;
-		if (resource_int_value("ar71xx_mac_map", i, "is_local",
-		    &is_local) != 0)
-			break;
-		printf("ar71xx: devid '%s.%d', MAC offset '%d'\n",
-		    devid, unitid, offset);
-		(void) ar71xx_platform_set_mac_hint(devid, unitid,
-		    ar71xx_board_mac_addr, offset, is_local);
-	}
-
-	return (0);
-}
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	uint64_t platform_counter_freq;
-	int argc = 0, i;
-	char **argv = NULL, **envp = NULL;
-	vm_offset_t kernend;
-
-	/* 
-	 * clear the BSS and SBSS segments, this should be first call in
-	 * the function
-	 */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/*
-	 * Until some more sensible abstractions for uboot/redboot
-	 * environment handling, we have to make this a compile-time
-	 * hack.  The existing code handles the uboot environment
-	 * very incorrectly so we should just ignore initialising
-	 * the relevant pointers.
-	 */
-#ifndef	AR71XX_ENV_UBOOT
-	argc = a0;
-	argv = (char**)a1;
-	envp = (char**)a2;
-#endif
-	/* 
-	 * Protect ourselves from garbage in registers 
-	 */
-	if (MIPS_IS_VALID_PTR(envp)) {
-		for (i = 0; envp[i]; i += 2) {
-			if (strcmp(envp[i], "memsize") == 0)
-				realmem = btoc(strtoul(envp[i+1], NULL, 16));
-			else if (strcmp(envp[i], "bootverbose") == 0)
-				bootverbose = btoc(strtoul(envp[i+1], NULL, 10));
-		}
-	}
-	bootverbose = 1;
-
-#ifdef	AR71XX_ENV_ROUTERBOOT
-	/*
-	 * RouterBoot informs the board memory as a command line argument.
-	 */
-	if (realmem == 0)
-		realmem = ar71xx_routerboot_get_mem(argc, argv);
-#endif
-
-	/*
-	 * Just wild guess. RedBoot let us down and didn't reported 
-	 * memory size
-	 */
-	if (realmem == 0)
-		realmem = btoc(32*1024*1024);
-
-	/*
-	 * Allow build-time override in case Redboot lies
-	 * or in other situations (eg where there's u-boot)
-	 * where there isn't (yet) a convienent method of
-	 * being told how much RAM is available.
-	 *
-	 * This happens on at least the Ubiquiti LS-SR71A
-	 * board, where redboot says there's 16mb of RAM
-	 * but in fact there's 32mb.
-	 */
-#if	defined(AR71XX_REALMEM)
-		realmem = btoc(AR71XX_REALMEM);
-#endif
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = 0;
-	dump_avail[1] = phys_avail[1];
-
-	physmem = realmem;
-
-	/*
-	 * ns8250 uart code uses DELAY so ticker should be inititalized 
-	 * before cninit. And tick_init_params refers to hz, so * init_param1 
-	 * should be called first.
-	 */
-	init_param1();
-
-	/* Detect the system type - this is needed for subsequent chipset-specific calls */
-	ar71xx_detect_sys_type();
-	ar71xx_detect_sys_frequency();
-
-	platform_counter_freq = ar71xx_cpu_freq();
-	mips_timer_init_params(platform_counter_freq, 1);
-	cninit();
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-
-	printf("CPU platform: %s\n", ar71xx_get_system_type());
-	printf("CPU Frequency=%d MHz\n", u_ar71xx_cpu_freq / 1000000);
-	printf("CPU DDR Frequency=%d MHz\n", u_ar71xx_ddr_freq / 1000000);
-	printf("CPU AHB Frequency=%d MHz\n", u_ar71xx_ahb_freq / 1000000);
-	printf("platform frequency: %lld MHz\n", platform_counter_freq / 1000000);
-	printf("CPU reference clock: %d MHz\n", u_ar71xx_refclk / 1000000);
-	printf("CPU MDIO clock: %d MHz\n", u_ar71xx_mdio_freq / 1000000);
-	printf("arguments: \n");
-	printf("  a0 = %08x\n", a0);
-	printf("  a1 = %08x\n", a1);
-	printf("  a2 = %08x\n", a2);
-	printf("  a3 = %08x\n", a3);
-
-	strcpy(cpu_model, ar71xx_get_system_type());
-
-	/*
-	 * XXX this code is very redboot specific.
-	 */
-	printf("Cmd line:");
-	if (MIPS_IS_VALID_PTR(argv)) {
-		for (i = 0; i < argc; i++) {
-			printf(" %s", argv[i]);
-			boothowto |= boot_parse_arg(argv[i]);
-		}
-	}
-	else
-		printf ("argv is invalid");
-	printf("\n");
-
-	printf("Environment:\n");
-	if (MIPS_IS_VALID_PTR(envp)) {
-		for (i = 0; envp[i]; i+=2) {
-			printf("  %s = %s\n", envp[i], envp[i+1]);
-			kern_setenv(envp[i], envp[i+1]);
-		}
-	}
-	else 
-		printf ("envp is invalid\n");
-
-	/* Platform setup */
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-
-	/*
-	 * Reset USB devices 
-	 */
-	ar71xx_init_usb_peripheral();
-
-	/*
-	 * Reset internal ethernet switch, if one exists
-	 */
-	ar71xx_reset_ethernet_switch();
-
-	/*
-	 * Initialise the gmac driver.
-	 */
-	ar71xx_init_gmac();
-
-	/* Redboot if_arge MAC address is in the environment */
-	(void) ar71xx_redboot_get_macaddr();
-
-	/* Various other boards need things to come out of EEPROM */
-	(void) ar71xx_platform_read_eeprom_mac();
-
-	/* Initialise the MAC address hint map */
-	ar71xx_platform_check_mac_hints();
-
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
diff --git a/sys/mips/atheros/ar71xx_ohci.c b/sys/mips/atheros/ar71xx_ohci.c
deleted file mode 100644
index cb1601b019c4..000000000000
--- a/sys/mips/atheros/ar71xx_ohci.c
+++ /dev/null
@@ -1,221 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/condvar.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-#include <dev/usb/controller/ohci.h>
-#include <dev/usb/controller/ohcireg.h>
-
-#include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
-#include <mips/atheros/ar71xx_cpudef.h>
-
-static int ar71xx_ohci_attach(device_t dev);
-static int ar71xx_ohci_detach(device_t dev);
-static int ar71xx_ohci_probe(device_t dev);
-
-struct ar71xx_ohci_softc
-{
-	struct ohci_softc sc_ohci;
-};
-
-static int
-ar71xx_ohci_probe(device_t dev)
-{
-	device_set_desc(dev, "AR71XX integrated OHCI controller");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static void
-ar71xx_ohci_intr(void *arg)
-{
-
-	/* XXX TODO: should really see if this was our interrupt.. */
-	ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
-	ohci_interrupt(arg);
-}
-
-static int
-ar71xx_ohci_attach(device_t dev)
-{
-	struct ar71xx_ohci_softc *sc = device_get_softc(dev);
-	int err;
-	int rid;
-
-	/* initialise some bus fields */
-	sc->sc_ohci.sc_bus.parent = dev;
-	sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
-	sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
-	sc->sc_ohci.sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
-	    USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
-		return (ENOMEM);
-	}
-
-	sc->sc_ohci.sc_dev = dev;
-
-	rid = 0;
-	sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (sc->sc_ohci.sc_io_res == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
-	sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
-	sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
-
-	rid = 0;
-	sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_ACTIVE);
-	if (sc->sc_ohci.sc_irq_res == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (sc->sc_ohci.sc_bus.bdev == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
-
-	err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, 
-	    INTR_TYPE_BIO | INTR_MPSAFE, NULL, 
-	    ar71xx_ohci_intr, sc, &sc->sc_ohci.sc_intr_hdl);
-	if (err) {
-		err = ENXIO;
-		goto error;
-	}
-
-	strlcpy(sc->sc_ohci.sc_vendor, "Atheros", sizeof(sc->sc_ohci.sc_vendor));
-
-	bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0);
-
-	err = ohci_init(&sc->sc_ohci);
-	if (!err)
-		err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
-
-	if (err)
-		goto error;
-	return (0);
-
-error:
-	if (err) {
-		ar71xx_ohci_detach(dev);
-		return (err);
-	}
-	return (err);
-}
-
-static int
-ar71xx_ohci_detach(device_t dev)
-{
-	struct ar71xx_ohci_softc *sc = device_get_softc(dev);
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	/*
-	 * Put the controller into reset, then disable clocks and do
-	 * the MI tear down.  We have to disable the clocks/hardware
-	 * after we do the rest of the teardown.  We also disable the
-	 * clocks in the opposite order we acquire them, but that
-	 * doesn't seem to be absolutely necessary.  We free up the
-	 * clocks after we disable them, so the system could, in
-	 * theory, reuse them.
-	 */
-	bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
-	    OHCI_CONTROL, 0);
-
-	if (sc->sc_ohci.sc_intr_hdl) {
-		bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl);
-		sc->sc_ohci.sc_intr_hdl = NULL;
-	}
-
-	if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
-		/*
-		 * only call ohci_detach() after ohci_init()
-		 */
-		ohci_detach(&sc->sc_ohci);
-
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
-		sc->sc_ohci.sc_irq_res = NULL;
-	}
-	if (sc->sc_ohci.sc_io_res) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res);
-		sc->sc_ohci.sc_io_res = NULL;
-		sc->sc_ohci.sc_io_tag = 0;
-		sc->sc_ohci.sc_io_hdl = 0;
-	}
-	usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ohci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ar71xx_ohci_probe),
-	DEVMETHOD(device_attach, ar71xx_ohci_attach),
-	DEVMETHOD(device_detach, ar71xx_ohci_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ohci_driver = {
-	.name = "ohci",
-	.methods = ohci_methods,
-	.size = sizeof(struct ar71xx_ohci_softc),
-};
-
-static devclass_t ohci_devclass;
-
-DRIVER_MODULE(ohci, apb, ohci_driver, ohci_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xx_pci.c b/sys/mips/atheros/ar71xx_pci.c
deleted file mode 100644
index 145bdc933e13..000000000000
--- a/sys/mips/atheros/ar71xx_pci.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_pci_bus_space.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#ifdef	AR71XX_ATH_EEPROM
-#include <mips/atheros/ar71xx_fixup.h>
-#endif	/* AR71XX_ATH_EEPROM */
-
-#undef	AR71XX_PCI_DEBUG
-#ifdef	AR71XX_PCI_DEBUG
-#define	dprintf printf
-#else
-#define	dprintf(x, arg...)
-#endif
-
-struct mtx ar71xx_pci_mtx;
-MTX_SYSINIT(ar71xx_pci_mtx, &ar71xx_pci_mtx, "ar71xx PCI space mutex",
-    MTX_SPIN);
-
-struct ar71xx_pci_softc {
-	device_t		sc_dev;
-
-	int			sc_busno;
-	int			sc_baseslot;
-	struct rman		sc_mem_rman;
-	struct rman		sc_irq_rman;
-
-	struct intr_event	*sc_eventstab[AR71XX_PCI_NIRQS];	
-	mips_intrcnt_t		sc_intr_counter[AR71XX_PCI_NIRQS];	
-	struct resource		*sc_irq;
-	void			*sc_ih;
-};
-
-static int ar71xx_pci_setup_intr(device_t, device_t, struct resource *, int, 
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int ar71xx_pci_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-static int ar71xx_pci_intr(void *);
-
-static void
-ar71xx_pci_mask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	/* XXX is the PCI lock required here? */
-	reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
-	/* flush */
-	reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
-	ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg & ~(1 << irq));
-}
-
-static void
-ar71xx_pci_unmask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	/* XXX is the PCI lock required here? */
-	reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
-	ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg | (1 << irq));
-	/* flush */
-	reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
-}
-
-/*
- * get bitmask for bytes of interest:
- *   0 - we want this byte, 1 - ignore it. e.g: we read 1 byte
- *   from register 7. Bitmask would be: 0111
- */
-static uint32_t
-ar71xx_get_bytes_to_read(int reg, int bytes)
-{
-	uint32_t bytes_to_read = 0;
-
-	if ((bytes % 4) == 0)
-		bytes_to_read = 0;
-	else if ((bytes % 4) == 1)
-		bytes_to_read = (~(1 << (reg % 4))) & 0xf;
-	else if ((bytes % 4) == 2)
-		bytes_to_read = (~(3 << (reg % 4))) & 0xf;
-	else
-		panic("%s: wrong combination", __func__);
-
-	return (bytes_to_read);
-}
-
-static int
-ar71xx_pci_check_bus_error(void)
-{
-	uint32_t error, addr, has_errors = 0;
-
-	mtx_assert(&ar71xx_pci_mtx, MA_OWNED);
-
-	error = ATH_READ_REG(AR71XX_PCI_ERROR) & 0x3;
-	dprintf("%s: PCI error = %02x\n", __func__, error);
-	if (error) {
-		addr = ATH_READ_REG(AR71XX_PCI_ERROR_ADDR);
-
-		/* Do not report it yet */
-#if 0
-		printf("PCI bus error %d at addr 0x%08x\n", error, addr);
-#endif
-		ATH_WRITE_REG(AR71XX_PCI_ERROR, error);
-		has_errors = 1;
-	}
-
-	error = ATH_READ_REG(AR71XX_PCI_AHB_ERROR) & 0x1;
-	dprintf("%s: AHB error = %02x\n", __func__, error);
-	if (error) {
-		addr = ATH_READ_REG(AR71XX_PCI_AHB_ERROR_ADDR);
-		/* Do not report it yet */
-#if 0
-		printf("AHB bus error %d at addr 0x%08x\n", error, addr);
-#endif
-		ATH_WRITE_REG(AR71XX_PCI_AHB_ERROR, error);
-		has_errors = 1;
-	}
-
-	return (has_errors);
-}
-
-static uint32_t
-ar71xx_pci_make_addr(int bus, int slot, int func, int reg)
-{
-	if (bus == 0) {
-		return ((1 << slot) | (func << 8) | (reg & ~3));
-	} else {
-		return ((bus << 16) | (slot << 11) | (func << 8)
-		    | (reg  & ~3) | 1);
-	}
-}
-
-static int
-ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes,
-    uint32_t cmd)
-{
-	uint32_t addr = ar71xx_pci_make_addr(bus, slot, func, (reg & ~3));
-
-	mtx_assert(&ar71xx_pci_mtx, MA_OWNED);
-
-	cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 4);
-	ATH_WRITE_REG(AR71XX_PCI_CONF_ADDR, addr);
-	ATH_WRITE_REG(AR71XX_PCI_CONF_CMD, cmd);
-
-	dprintf("%s: tag (%x, %x, %x) %d/%d addr=%08x, cmd=%08x\n", __func__, 
-	    bus, slot, func, reg, bytes, addr, cmd);
-
-	return ar71xx_pci_check_bus_error();
-}
-
-static uint32_t
-ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
-    u_int reg, int bytes)
-{
-	uint32_t data;
-	uint32_t shift, mask;
-
-	/* register access is 32-bit aligned */
-	shift = (reg & 3) * 8;
-
-	/* Create a mask based on the width, post-shift */
-	if (bytes == 2)
-		mask = 0xffff;
-	else if (bytes == 1)
-		mask = 0xff;
-	else
-		mask = 0xffffffff;
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, 
-	    func, reg, bytes);
-
-	mtx_lock_spin(&ar71xx_pci_mtx);
-	 if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, 
-	     PCI_CONF_CMD_READ) == 0)
-		 data = ATH_READ_REG(AR71XX_PCI_CONF_READ_DATA);
-	 else
-		 data = -1;
-	mtx_unlock_spin(&ar71xx_pci_mtx);
-
-	/* get request bytes from 32-bit word */
-	data = (data >> shift) & mask;
-
-	dprintf("%s: read 0x%x\n", __func__, data);
-
-	return (data);
-}
-
-static void
-ar71xx_pci_local_write(device_t dev, uint32_t reg, uint32_t data, int bytes)
-{
-	uint32_t cmd;
-
-	dprintf("%s: local write reg %d(%d)\n", __func__, reg, bytes);
-
-	data = data << (8*(reg % 4));
-	cmd = PCI_LCONF_CMD_WRITE | (reg & ~3);
-	cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 20);
-	mtx_lock_spin(&ar71xx_pci_mtx);
-	ATH_WRITE_REG(AR71XX_PCI_LCONF_CMD, cmd);
-	ATH_WRITE_REG(AR71XX_PCI_LCONF_WRITE_DATA, data);
-	mtx_unlock_spin(&ar71xx_pci_mtx);
-}
-
-static void
-ar71xx_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
-    u_int reg, uint32_t data, int bytes)
-{
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot,
-	    func, reg, bytes);
-
-	data = data << (8*(reg % 4));
-	mtx_lock_spin(&ar71xx_pci_mtx);
-	 if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes,
-	     PCI_CONF_CMD_WRITE) == 0)
-		 ATH_WRITE_REG(AR71XX_PCI_CONF_WRITE_DATA, data);
-	mtx_unlock_spin(&ar71xx_pci_mtx);
-}
-
-#ifdef	AR71XX_ATH_EEPROM
-/*
- * Some embedded boards (eg AP94) have the MAC attached via PCI but they
- * don't have the MAC-attached EEPROM.  The register initialisation
- * values and calibration data are stored in the on-board flash.
- * This routine initialises the NIC via the EEPROM register contents
- * before the probe/attach routines get a go at things.
- */
-static void
-ar71xx_pci_fixup(device_t dev, u_int bus, u_int slot, u_int func,
-    long flash_addr, int len)
-{
-	uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr);
-	uint32_t reg, val, bar0;
-
-	if (bootverbose)
-		device_printf(dev, "%s: flash_addr=%lx, cal_data=%p\n",
-		    __func__, flash_addr, cal_data);
-
-	/* XXX check 0xa55a */
-	/* Save bar(0) address - just to flush bar(0) (SoC WAR) ? */
-	bar0 = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_BAR(0), 4);
-	ar71xx_pci_write_config(dev, bus, slot, func, PCIR_BAR(0),
-	    AR71XX_PCI_MEM_BASE, 4);
-
-	val = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_COMMAND, 2);
-	val |= (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
-	ar71xx_pci_write_config(dev, bus, slot, func, PCIR_COMMAND, val, 2); 
-
-	cal_data += 3;
-	while (*cal_data != 0xffff) {
-		reg = *cal_data++;
-		val = *cal_data++;
-		val |= (*cal_data++) << 16;
-		if (bootverbose)
-			printf("  reg: %x, val=%x\n", reg, val);
-
-		/* Write eeprom fixup data to device memory */
-		ATH_WRITE_REG(AR71XX_PCI_MEM_BASE + reg, val);
-		DELAY(100);
-	}
-
-	val = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_COMMAND, 2);
-	val &= ~(PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
-	ar71xx_pci_write_config(dev, bus, slot, func, PCIR_COMMAND, val, 2);
-
-	/* Write the saved bar(0) address */
-	ar71xx_pci_write_config(dev, bus, slot, func, PCIR_BAR(0), bar0, 4);
-}
-
-static void
-ar71xx_pci_slot_fixup(device_t dev, u_int bus, u_int slot, u_int func)
-{
-	long int flash_addr;
-	char buf[64];
-	int size;
-
-	/*
-	 * Check whether the given slot has a hint to poke.
-	 */
-	if (bootverbose)
-	device_printf(dev, "%s: checking dev %s, %d/%d/%d\n",
-	    __func__, device_get_nameunit(dev), bus, slot, func);
-
-	snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_addr",
-	    bus, slot, func);
-
-	if (resource_long_value(device_get_name(dev), device_get_unit(dev),
-	    buf, &flash_addr) == 0) {
-		snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_size",
-		    bus, slot, func);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev), buf, &size) != 0) {
-			device_printf(dev,
-			    "%s: missing hint '%s', aborting EEPROM\n",
-			    __func__, buf);
-			return;
-		}
-
-		device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n",
-		    flash_addr, bus, slot, func);
-		ar71xx_pci_fixup(dev, bus, slot, func, flash_addr, size);
-		ar71xx_pci_slot_create_eeprom_firmware(dev, bus, slot, func,
-		    flash_addr, size);
-	}
-}
-#endif	/* AR71XX_ATH_EEPROM */
-
-static int
-ar71xx_pci_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-ar71xx_pci_attach(device_t dev)
-{
-	int rid = 0;
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "ar71xx PCI memory window";
-	if (rman_init(&sc->sc_mem_rman) != 0 || 
-	    rman_manage_region(&sc->sc_mem_rman, AR71XX_PCI_MEM_BASE, 
-		AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1) != 0) {
-		panic("ar71xx_pci_attach: failed to set up I/O rman");
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "ar71xx PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, 
-	        AR71XX_PCI_IRQ_END) != 0)
-		panic("ar71xx_pci_attach: failed to set up IRQ rman");
-
-	/*
-	 * Check if there is a base slot hint. Otherwise use default value.
-	 */
-	if (resource_int_value(device_get_name(dev),
-	    device_get_unit(dev), "baseslot", &sc->sc_baseslot) != 0) {
-		device_printf(dev,
-		    "%s: missing hint '%s', default to AR71XX_PCI_BASE_SLOT\n",
-		    __func__, "baseslot");
-		sc->sc_baseslot = AR71XX_PCI_BASE_SLOT;
-	}
-
-	ATH_WRITE_REG(AR71XX_PCI_INTR_STATUS, 0);
-	ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, 0);
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return ENXIO;
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC,
-			    ar71xx_pci_intr, NULL, sc, &sc->sc_ih))) {
-		device_printf(dev,
-		    "WARNING: unable to register interrupt handler\n");
-		return ENXIO;
-	}
-
-	/* reset PCI core and PCI bus */
-	ar71xx_device_stop(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
-	DELAY(100000);
-
-	ar71xx_device_start(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
-	DELAY(100000);
-
-	/* Init PCI windows */
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW1, PCI_WINDOW1_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW2, PCI_WINDOW2_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW3, PCI_WINDOW3_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW4, PCI_WINDOW4_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW5, PCI_WINDOW5_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW6, PCI_WINDOW6_ADDR);
-	ATH_WRITE_REG(AR71XX_PCI_WINDOW7, PCI_WINDOW7_CONF_ADDR);
-	DELAY(100000);
-
-	mtx_lock_spin(&ar71xx_pci_mtx);
-	ar71xx_pci_check_bus_error();
-	mtx_unlock_spin(&ar71xx_pci_mtx);
-
-	/* Fixup internal PCI bridge */
-	ar71xx_pci_local_write(dev, PCIR_COMMAND,
-            PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN
-	    | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK
-	    | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 4);
-
-#ifdef	AR71XX_ATH_EEPROM
-	/*
-	 * Hard-code a check for slot 17 and 18 - these are
-	 * the two PCI slots which may have a PCI device that
-	 * requires "fixing".
-	 */
-	ar71xx_pci_slot_fixup(dev, 0, 17, 0);
-	ar71xx_pci_slot_fixup(dev, 0, 18, 0);
-#endif	/* AR71XX_ATH_EEPROM */
-
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-ar71xx_pci_read_ivar(device_t dev, device_t child, int which,
-    uintptr_t *result)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-ar71xx_pci_write_ivar(device_t dev, device_t child, int which,
-    uintptr_t result)
-{
-	struct ar71xx_pci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static struct resource *
-ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);
-	struct resource *rv;
-	struct rman *rm;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if (flags & RF_ACTIVE) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-	return (rv);
-}
-
-static int
-ar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
-	    child, type, rid, r));
-
-	if (!res) {
-		switch(type) {
-		case SYS_RES_MEMORY:
-		case SYS_RES_IOPORT:
-			rman_set_bustag(r, ar71xx_bus_space_pcimem);
-			break;
-		}
-	}
-	return (res);
-}
-
-static int
-ar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
-	    int flags, driver_filter_t *filt, driver_intr_t *handler,
-	    void *arg, void **cookiep)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    ar71xx_pci_mask_irq, ar71xx_pci_unmask_irq, NULL, NULL,
-		    "pci intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irq] = event;
-			sc->sc_intr_counter[irq] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return (error);
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-	mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
-
-	ar71xx_pci_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-ar71xx_pci_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	int irq, result;
-
-	irq = rman_get_start(ires);
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	ar71xx_pci_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-}
-
-static int
-ar71xx_pci_intr(void *arg)
-{
-	struct ar71xx_pci_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq, mask;
-
-	reg = ATH_READ_REG(AR71XX_PCI_INTR_STATUS);
-	mask = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
-	/*
-	 * Handle only unmasked interrupts
-	 */
-	reg &= mask;
-	for (irq = AR71XX_PCI_IRQ_START; irq <= AR71XX_PCI_IRQ_END; irq++) {
-		if (reg & (1 << irq)) {
-			event = sc->sc_eventstab[irq];
-			if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-				/* Ignore timer interrupts */
-				if (irq != 0)
-					printf("Stray IRQ %d\n", irq);
-				continue;
-			}
-
-			/* Flush DDR FIFO for PCI/PCIe */
-			ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE);
-
-			/* TODO: frame instead of NULL? */
-			intr_event_handle(event, NULL);
-			mips_intrcnt_inc(sc->sc_intr_counter[irq]);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static int
-ar71xx_pci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static int
-ar71xx_pci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(pcib);
-
-	if (pci_get_slot(device) < sc->sc_baseslot)
-		panic("%s: PCI slot %d is less then AR71XX_PCI_BASE_SLOT",
-		    __func__, pci_get_slot(device));
-
-	return (pci_get_slot(device) - sc->sc_baseslot);
-}
-
-static device_method_t ar71xx_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		ar71xx_pci_probe),
-	DEVMETHOD(device_attach,	ar71xx_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	ar71xx_pci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	ar71xx_pci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	ar71xx_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, ar71xx_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	ar71xx_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	ar71xx_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	ar71xx_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	ar71xx_pci_read_config),
-	DEVMETHOD(pcib_write_config,	ar71xx_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	ar71xx_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t ar71xx_pci_driver = {
-	"pcib",
-	ar71xx_pci_methods,
-	sizeof(struct ar71xx_pci_softc),
-};
-
-static devclass_t ar71xx_pci_devclass;
-
-DRIVER_MODULE(ar71xx_pci, nexus, ar71xx_pci_driver, ar71xx_pci_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xx_pci_bus_space.c b/sys/mips/atheros/ar71xx_pci_bus_space.c
deleted file mode 100644
index def31bd60dff..000000000000
--- a/sys/mips/atheros/ar71xx_pci_bus_space.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-
-#include <machine/bus.h>
-#include <mips/atheros/ar71xx_pci_bus_space.h>
-
-static bs_r_1_s_proto(pcimem);
-static bs_r_2_s_proto(pcimem);
-static bs_r_4_s_proto(pcimem);
-static bs_w_1_s_proto(pcimem);
-static bs_w_2_s_proto(pcimem);
-static bs_w_4_s_proto(pcimem);
-
-/*
- * Bus space that handles offsets in word for 1/2 bytes read/write access.
- * Byte order of values is handled by device drivers itself. 
- */
-static struct bus_space bus_space_pcimem = {
-	/* cookie */
-	(void *) 0,
-
-	/* mapping/unmapping */
-	generic_bs_map,
-	generic_bs_unmap,
-	generic_bs_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	generic_bs_barrier,
-
-	/* read (single) */
-	generic_bs_r_1,
-	generic_bs_r_2,
-	generic_bs_r_4,
-	NULL,
-
-	/* read multiple */
-	generic_bs_rm_1,
-	generic_bs_rm_2,
-	generic_bs_rm_4,
-	NULL,
-
-	/* read region */
-	generic_bs_rr_1,
-	generic_bs_rr_2,
-	generic_bs_rr_4,
-	NULL,
-
-	/* write (single) */
-	generic_bs_w_1,
-	generic_bs_w_2,
-	generic_bs_w_4,
-	NULL,
-
-	/* write multiple */
-	generic_bs_wm_1,
-	generic_bs_wm_2,
-	generic_bs_wm_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	generic_bs_wr_2,
-	generic_bs_wr_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	generic_bs_sr_2,
-	generic_bs_sr_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	generic_bs_c_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	pcimem_bs_r_1_s,
-	pcimem_bs_r_2_s,
-	pcimem_bs_r_4_s,
-	NULL,
-
-	/* read multiple stream */
-	generic_bs_rm_1,
-	generic_bs_rm_2,
-	generic_bs_rm_4,
-	NULL,
-
-	/* read region stream */
-	generic_bs_rr_1,
-	generic_bs_rr_2,
-	generic_bs_rr_4,
-	NULL,
-
-	/* write (single) stream */
-	pcimem_bs_w_1_s,
-	pcimem_bs_w_2_s,
-	pcimem_bs_w_4_s,
-	NULL,
-
-	/* write multiple stream */
-	generic_bs_wm_1,
-	generic_bs_wm_2,
-	generic_bs_wm_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	generic_bs_wr_2,
-	generic_bs_wr_4,
-	NULL,
-};
-
-bus_space_tag_t ar71xx_bus_space_pcimem = &bus_space_pcimem;
-
-static uint8_t
-pcimem_bs_r_1_s(void *t, bus_space_handle_t h, bus_size_t o)
-{
-
-	return readb(h + (o &~ 3) + (3 - (o & 3)));
-}
-
-static void
-pcimem_bs_w_1_s(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
-{
-
-	writeb(h + (o &~ 3) + (3 - (o & 3)), v);
-}
-
-static uint16_t
-pcimem_bs_r_2_s(void *t, bus_space_handle_t h, bus_size_t o)
-{
-
-	return readw(h + (o &~ 3) + (2 - (o & 3)));
-}
-
-static void
-pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
-{
-
-	writew(h + (o &~ 3) + (2 - (o & 3)), v);
-}
-
-static uint32_t
-pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o)
-{
-
-	return le32toh(readl(h + o));
-}
-
-static void
-pcimem_bs_w_4_s(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
-{
-
-	writel(h + o, htole32(v));
-}
diff --git a/sys/mips/atheros/ar71xx_pci_bus_space.h b/sys/mips/atheros/ar71xx_pci_bus_space.h
deleted file mode 100644
index 35de2fc22b04..000000000000
--- a/sys/mips/atheros/ar71xx_pci_bus_space.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __AR71XX_PCI_BUS_SPACEH__
-#define __AR71XX_PCI_BUS_SPACEH__
-
-extern bus_space_tag_t ar71xx_bus_space_pcimem;
-
-#endif /* __AR71XX_PCI_BUS_SPACEH__ */
diff --git a/sys/mips/atheros/ar71xx_setup.c b/sys/mips/atheros/ar71xx_setup.c
deleted file mode 100644
index 897f1360feaf..000000000000
--- a/sys/mips/atheros/ar71xx_setup.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar933xreg.h>
-#include <mips/atheros/ar934xreg.h>
-#include <mips/atheros/qca955xreg.h>
-#include <mips/atheros/qca953xreg.h>
-
-#include <mips/atheros/ar71xx_setup.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar724x_chip.h>
-#include <mips/atheros/ar91xx_chip.h>
-#include <mips/atheros/ar933x_chip.h>
-#include <mips/atheros/ar934x_chip.h>
-#include <mips/atheros/qca953x_chip.h>
-#include <mips/atheros/qca955x_chip.h>
-
-#define	AR71XX_SYS_TYPE_LEN		128
-
-static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN];
-enum ar71xx_soc_type ar71xx_soc;
-struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL;
-
-void
-ar71xx_detect_sys_type(void)
-{
-	char *chip = "????";
-	uint32_t id;
-	uint32_t major;
-	uint32_t minor;
-	uint32_t rev = 0;
-
-	id = ATH_READ_REG(AR71XX_RST_RESET_REG_REV_ID);
-	major = id & REV_ID_MAJOR_MASK;
-
-	switch (major) {
-	case REV_ID_MAJOR_AR71XX:
-		minor = id & AR71XX_REV_ID_MINOR_MASK;
-		rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
-		rev &= AR71XX_REV_ID_REVISION_MASK;
-		ar71xx_cpu_ops = &ar71xx_chip_def;
-		switch (minor) {
-		case AR71XX_REV_ID_MINOR_AR7130:
-			ar71xx_soc = AR71XX_SOC_AR7130;
-			chip = "7130";
-			break;
-
-		case AR71XX_REV_ID_MINOR_AR7141:
-			ar71xx_soc = AR71XX_SOC_AR7141;
-			chip = "7141";
-			break;
-
-		case AR71XX_REV_ID_MINOR_AR7161:
-			ar71xx_soc = AR71XX_SOC_AR7161;
-			chip = "7161";
-			break;
-		}
-		break;
-
-	case REV_ID_MAJOR_AR7240:
-		ar71xx_soc = AR71XX_SOC_AR7240;
-		chip = "7240";
-		ar71xx_cpu_ops = &ar724x_chip_def;
-		rev = (id & AR724X_REV_ID_REVISION_MASK);
-		break;
-
-	case REV_ID_MAJOR_AR7241:
-		ar71xx_soc = AR71XX_SOC_AR7241;
-		chip = "7241";
-		ar71xx_cpu_ops = &ar724x_chip_def;
-		rev = (id & AR724X_REV_ID_REVISION_MASK);
-		break;
-
-	case REV_ID_MAJOR_AR7242:
-		ar71xx_soc = AR71XX_SOC_AR7242;
-		chip = "7242";
-		ar71xx_cpu_ops = &ar724x_chip_def;
-		rev = (id & AR724X_REV_ID_REVISION_MASK);
-		break;
-
-	case REV_ID_MAJOR_AR913X:
-		minor = id & AR91XX_REV_ID_MINOR_MASK;
-		rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
-		rev &= AR91XX_REV_ID_REVISION_MASK;
-		ar71xx_cpu_ops = &ar91xx_chip_def;
-		switch (minor) {
-		case AR91XX_REV_ID_MINOR_AR9130:
-			ar71xx_soc = AR71XX_SOC_AR9130;
-			chip = "9130";
-			break;
-
-		case AR91XX_REV_ID_MINOR_AR9132:
-			ar71xx_soc = AR71XX_SOC_AR9132;
-			chip = "9132";
-			break;
-		}
-		break;
-	case REV_ID_MAJOR_AR9330:
-		minor = 0;
-		rev = (id & AR933X_REV_ID_REVISION_MASK);
-		chip = "9330";
-		ar71xx_cpu_ops = &ar933x_chip_def;
-		ar71xx_soc = AR71XX_SOC_AR9330;
-		break;
-	case REV_ID_MAJOR_AR9331:
-		minor = 1;
-		rev = (id & AR933X_REV_ID_REVISION_MASK);
-		chip = "9331";
-		ar71xx_soc = AR71XX_SOC_AR9331;
-		ar71xx_cpu_ops = &ar933x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_AR9341:
-		minor = 0;
-		rev = (id & AR934X_REV_ID_REVISION_MASK);
-		chip = "9341";
-		ar71xx_soc = AR71XX_SOC_AR9341;
-		ar71xx_cpu_ops = &ar934x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_AR9342:
-		minor = 0;
-		rev = (id & AR934X_REV_ID_REVISION_MASK);
-		chip = "9342";
-		ar71xx_soc = AR71XX_SOC_AR9342;
-		ar71xx_cpu_ops = &ar934x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_AR9344:
-		minor = 0;
-		rev = (id & AR934X_REV_ID_REVISION_MASK);
-		chip = "9344";
-		ar71xx_soc = AR71XX_SOC_AR9344;
-		ar71xx_cpu_ops = &ar934x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_QCA9533:
-		minor = 0;
-		rev = (id & QCA953X_REV_ID_REVISION_MASK);
-		chip = "9533";
-		ar71xx_soc = AR71XX_SOC_QCA9533;
-		ar71xx_cpu_ops = &qca953x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_QCA9533_V2:
-		minor = 0;
-		rev = (id & QCA953X_REV_ID_REVISION_MASK);
-		chip = "9533v2";
-		ar71xx_soc = AR71XX_SOC_QCA9533_V2;
-		ar71xx_cpu_ops = &qca953x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_QCA9556:
-		minor = 0;
-		rev = (id & QCA955X_REV_ID_REVISION_MASK);
-		chip = "9556";
-		ar71xx_soc = AR71XX_SOC_QCA9556;
-		ar71xx_cpu_ops = &qca955x_chip_def;
-		break;
-
-	case REV_ID_MAJOR_QCA9558:
-		minor = 0;
-		rev = (id & QCA955X_REV_ID_REVISION_MASK);
-		chip = "9558";
-		ar71xx_soc = AR71XX_SOC_QCA9558;
-		ar71xx_cpu_ops = &qca955x_chip_def;
-		break;
-
-	default:
-		panic("ar71xx: unknown chip id:0x%08x\n", id);
-	}
-
-	sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev);
-}
-
-const char *
-ar71xx_get_system_type(void)
-{
-	return ar71xx_sys_type;
-}
diff --git a/sys/mips/atheros/ar71xx_setup.h b/sys/mips/atheros/ar71xx_setup.h
deleted file mode 100644
index 3b6fd327d657..000000000000
--- a/sys/mips/atheros/ar71xx_setup.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR71XX_SETUP_H__
-#define	__AR71XX_SETUP_H__
-
-enum ar71xx_soc_type {
-	AR71XX_SOC_UNKNOWN,
-	AR71XX_SOC_AR7130,
-	AR71XX_SOC_AR7141,
-	AR71XX_SOC_AR7161,
-	AR71XX_SOC_AR7240,
-	AR71XX_SOC_AR7241,
-	AR71XX_SOC_AR7242,
-	AR71XX_SOC_AR9130,
-	AR71XX_SOC_AR9132,
-	AR71XX_SOC_AR9330,
-	AR71XX_SOC_AR9331,
-	AR71XX_SOC_AR9341,
-	AR71XX_SOC_AR9342,
-	AR71XX_SOC_AR9344,
-	AR71XX_SOC_QCA9556,
-	AR71XX_SOC_QCA9558,
-	AR71XX_SOC_QCA9533,
-	AR71XX_SOC_QCA9533_V2,
-};
-extern enum ar71xx_soc_type ar71xx_soc;
-
-extern void ar71xx_detect_sys_type(void);
-extern const char *ar71xx_get_system_type(void);
-
-#endif
diff --git a/sys/mips/atheros/ar71xx_spi.c b/sys/mips/atheros/ar71xx_spi.c
deleted file mode 100644
index f851667dbf6b..000000000000
--- a/sys/mips/atheros/ar71xx_spi.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <dev/spibus/spi.h>
-#include <dev/spibus/spibusvar.h>
-#include "spibus_if.h"
-
-#include <mips/atheros/ar71xxreg.h>
-
-#undef AR71XX_SPI_DEBUG
-#ifdef AR71XX_SPI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * register space access macros
- */
-
-#define	SPI_BARRIER_WRITE(sc)		bus_barrier((sc)->sc_mem_res, 0, 0, 	\
-					    BUS_SPACE_BARRIER_WRITE)
-#define	SPI_BARRIER_READ(sc)	bus_barrier((sc)->sc_mem_res, 0, 0, 	\
-					    BUS_SPACE_BARRIER_READ)
-#define	SPI_BARRIER_RW(sc)		bus_barrier((sc)->sc_mem_res, 0, 0, 	\
-					    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
-
-#define SPI_WRITE(sc, reg, val)	do {				\
-		bus_write_4(sc->sc_mem_res, (reg), (val));	\
-	} while (0)
-
-#define SPI_READ(sc, reg)	 bus_read_4(sc->sc_mem_res, (reg))
-
-#define SPI_SET_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
-
-#define SPI_CLEAR_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
-
-struct ar71xx_spi_softc {
-	device_t		sc_dev;
-	struct resource		*sc_mem_res;
-	uint32_t		sc_reg_ctrl;
-};
-
-static int
-ar71xx_spi_probe(device_t dev)
-{
-	device_set_desc(dev, "AR71XX SPI");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-ar71xx_spi_attach(device_t dev)
-{
-	struct ar71xx_spi_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->sc_dev = dev;
-        rid = 0;
-	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 
-	    RF_ACTIVE);
-	if (!sc->sc_mem_res) {
-		device_printf(dev, "Could not map memory\n");
-		return (ENXIO);
-	}
-
-	SPI_WRITE(sc, AR71XX_SPI_FS, 1);
-
-	/* Flush out read before reading the control register */
-	SPI_BARRIER_WRITE(sc);
-
-	sc->sc_reg_ctrl  = SPI_READ(sc, AR71XX_SPI_CTRL);
-
-	/*
-	 * XXX TODO: document what the SPI control register does.
-	 */
-	SPI_WRITE(sc, AR71XX_SPI_CTRL, 0x43);
-
-	/*
-	 * Ensure the config register write has gone out before configuring
-	 * the chip select mask.
-	 */
-	SPI_BARRIER_WRITE(sc);
-	SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CSMASK);
-
-	/*
-	 * .. and ensure the write has gone out before continuing.
-	 */
-	SPI_BARRIER_WRITE(sc);
-
-	device_add_child(dev, "spibus", -1);
-	return (bus_generic_attach(dev));
-}
-
-static void
-ar71xx_spi_chip_activate(struct ar71xx_spi_softc *sc, int cs)
-{
-	uint32_t ioctrl = SPI_IO_CTRL_CSMASK;
-	/*
-	 * Put respective CSx to low
-	 */
-	ioctrl &= ~(SPI_IO_CTRL_CS0 << cs);
-
-	/*
-	 * Make sure any other writes have gone out to the
-	 * device before changing the chip select line;
-	 * then ensure that it has made it out to the device
-	 * before continuing.
-	 */
-	SPI_BARRIER_WRITE(sc);
-	SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, ioctrl);
-	SPI_BARRIER_WRITE(sc);
-}
-
-static void
-ar71xx_spi_chip_deactivate(struct ar71xx_spi_softc *sc, int cs)
-{
-	/*
-	 * Put all CSx to high
-	 */
-	SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CSMASK);
-}
-
-static uint8_t
-ar71xx_spi_txrx(struct ar71xx_spi_softc *sc, int cs, uint8_t data)
-{
-	int bit;
-	/* CS0 */
-	uint32_t ioctrl = SPI_IO_CTRL_CSMASK;
-	/*
-	 * low-level for selected CS
-	 */
-	ioctrl &= ~(SPI_IO_CTRL_CS0 << cs);
-
-	uint32_t iod, rds;
-	for (bit = 7; bit >=0; bit--) {
-		if (data & (1 << bit))
-			iod = ioctrl | SPI_IO_CTRL_DO;
-		else
-			iod = ioctrl & ~SPI_IO_CTRL_DO;
-		SPI_BARRIER_WRITE(sc);
-		SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod);
-		SPI_BARRIER_WRITE(sc);
-		SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod | SPI_IO_CTRL_CLK);
-	}
-
-	/*
-	 * Provide falling edge for connected device by clear clock bit.
-	 */
-	SPI_BARRIER_WRITE(sc);
-	SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod);
-	SPI_BARRIER_WRITE(sc);
-	rds = SPI_READ(sc, AR71XX_SPI_RDS);
-
-	return (rds & 0xff);
-}
-
-static int
-ar71xx_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
-{
-	struct ar71xx_spi_softc *sc;
-	uint32_t cs;
-	uint8_t *buf_in, *buf_out;
-	int i;
-
-	sc = device_get_softc(dev);
-
-	spibus_get_cs(child, &cs);
-
-	cs &= ~SPIBUS_CS_HIGH;
-
-	ar71xx_spi_chip_activate(sc, cs);
-
-	KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, 
-	    ("TX/RX command sizes should be equal"));
-	KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, 
-	    ("TX/RX data sizes should be equal"));
-
-	/*
-	 * Transfer command
-	 */
-	buf_out = (uint8_t *)cmd->tx_cmd;
-	buf_in = (uint8_t *)cmd->rx_cmd;
-	for (i = 0; i < cmd->tx_cmd_sz; i++)
-		buf_in[i] = ar71xx_spi_txrx(sc, cs, buf_out[i]);
-
-	/*
-	 * Receive/transmit data (depends on  command)
-	 */
-	buf_out = (uint8_t *)cmd->tx_data;
-	buf_in = (uint8_t *)cmd->rx_data;
-	for (i = 0; i < cmd->tx_data_sz; i++)
-		buf_in[i] = ar71xx_spi_txrx(sc, cs, buf_out[i]);
-
-	ar71xx_spi_chip_deactivate(sc, cs);
-
-	return (0);
-}
-
-static int
-ar71xx_spi_detach(device_t dev)
-{
-	struct ar71xx_spi_softc *sc = device_get_softc(dev);
-
-	/*
-	 * Ensure any other writes to the device are finished
-	 * before we tear down the SPI device.
-	 */
-	SPI_BARRIER_WRITE(sc);
-
-	/*
-	 * Restore the control register; ensure it has hit the
-	 * hardware before continuing.
-	 */
-	SPI_WRITE(sc, AR71XX_SPI_CTRL, sc->sc_reg_ctrl);
-	SPI_BARRIER_WRITE(sc);
-
-	/*
-	 * And now, put the flash back into mapped IO mode and
-	 * ensure _that_ has completed before we finish up.
-	 */
-	SPI_WRITE(sc, AR71XX_SPI_FS, 0);
-	SPI_BARRIER_WRITE(sc);
-
-	if (sc->sc_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-
-	return (0);
-}
-
-static device_method_t ar71xx_spi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		ar71xx_spi_probe),
-	DEVMETHOD(device_attach,	ar71xx_spi_attach),
-	DEVMETHOD(device_detach,	ar71xx_spi_detach),
-
-	DEVMETHOD(spibus_transfer,	ar71xx_spi_transfer),
-	{0, 0}
-};
-
-static driver_t ar71xx_spi_driver = {
-	"spi",
-	ar71xx_spi_methods,
-	sizeof(struct ar71xx_spi_softc),
-};
-
-static devclass_t ar71xx_spi_devclass;
-
-DRIVER_MODULE(ar71xx_spi, nexus, ar71xx_spi_driver, ar71xx_spi_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xx_wdog.c b/sys/mips/atheros/ar71xx_wdog.c
deleted file mode 100644
index 1d92b16ec5cf..000000000000
--- a/sys/mips/atheros/ar71xx_wdog.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Watchdog driver for AR71xx 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/eventhandler.h>
-#include <sys/systm.h>
-#include <sys/watchdog.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/sysctl.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-
-struct ar71xx_wdog_softc {
-	device_t dev;
-	int armed;
-	int reboot_from_watchdog;
-	int watchdog_nmi;
-	int debug;
-};
-
-static void
-ar71xx_wdog_watchdog_fn(void *private, u_int cmd, int *error)
-{
-	struct ar71xx_wdog_softc *sc = private;
-	uint64_t timer_val;
-	int action;
-
-	action = RST_WDOG_ACTION_RESET;
-	if (sc->watchdog_nmi != 0)
-		action = RST_WDOG_ACTION_NMI;
-
-	cmd &= WD_INTERVAL;
-	if (sc->debug)
-		device_printf(sc->dev, "%s: : cmd: %x\n", __func__, cmd);
-	if (cmd > 0) {
-		timer_val = (uint64_t)(1ULL << cmd) * ar71xx_ahb_freq() /
-		    1000000000;
-
-		/*
-		 * Clamp the timer value in case we overflow.
-		 */
-		if (timer_val > 0xffffffff)
-			timer_val = 0xffffffff;
-		if (sc->debug)
-			device_printf(sc->dev, "%s: programming timer: %jx\n",
-			    __func__, (uintmax_t) timer_val);
-		/*
-		 * Make sure the watchdog is set to NOACTION and give it
-		 * time to take.
-		 */
-		ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, RST_WDOG_ACTION_NOACTION);
-		wmb();
-		DELAY(100);
-
-		/*
-		 * Update the timer value.  It's already clamped at this
-		 * point so we don't have to wrap/clamp it here.
-		 */
-		ATH_WRITE_REG(AR71XX_RST_WDOG_TIMER, timer_val);
-		wmb();
-		DELAY(100);
-
-		/*
-		 * And now, arm.
-		 */
-		ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, action);
-		sc->armed = 1;
-		*error = 0;
-	} else {
-		if (sc->debug)
-			device_printf(sc->dev, "%s: disarming\n", __func__);
-		if (sc->armed) {
-			ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL,
-			    RST_WDOG_ACTION_NOACTION);
-			sc->armed = 0;
-		}
-	}
-}
-
-static int
-ar71xx_wdog_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Atheros AR71XX watchdog timer");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-ar71xx_wdog_sysctl(device_t dev)
-{
-	struct ar71xx_wdog_softc *sc = device_get_softc(dev);
-
-        struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
-        struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev);
-
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "debug", CTLFLAG_RW, &sc->debug, 0,
-                "enable watchdog debugging");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "nmi", CTLFLAG_RW, &sc->watchdog_nmi, 0,
-                "watchdog triggers NMI instead of reset");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "armed", CTLFLAG_RD, &sc->armed, 0,
-                "whether the watchdog is armed");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "reboot_from_watchdog", CTLFLAG_RD, &sc->reboot_from_watchdog, 0,
-                "whether the system rebooted from the watchdog");
-}
-
-static int
-ar71xx_wdog_attach(device_t dev)
-{
-	struct ar71xx_wdog_softc *sc = device_get_softc(dev);
-
-	/* Initialise */
-	sc->reboot_from_watchdog = 0;
-	sc->armed = 0;
-	sc->debug = 0;
-
-	if (ATH_READ_REG(AR71XX_RST_WDOG_CONTROL) & RST_WDOG_LAST) {
-		device_printf (dev, 
-		    "Previous reset was due to watchdog timeout\n");
-		sc->reboot_from_watchdog = 1;
-	}
-
-	ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, RST_WDOG_ACTION_NOACTION);
-
-	sc->dev = dev;
-	EVENTHANDLER_REGISTER(watchdog_list, ar71xx_wdog_watchdog_fn, sc, 0);
-	ar71xx_wdog_sysctl(dev);
-
-	return (0);
-}
-
-static device_method_t ar71xx_wdog_methods[] = {
-	DEVMETHOD(device_probe, ar71xx_wdog_probe),
-	DEVMETHOD(device_attach, ar71xx_wdog_attach),
-	{0, 0},
-};
-
-static driver_t ar71xx_wdog_driver = {
-	"ar71xx_wdog",
-	ar71xx_wdog_methods,
-	sizeof(struct ar71xx_wdog_softc),
-};
-static devclass_t ar71xx_wdog_devclass;
-
-DRIVER_MODULE(ar71xx_wdog, nexus, ar71xx_wdog_driver, ar71xx_wdog_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h
deleted file mode 100644
index bddecbce5820..000000000000
--- a/sys/mips/atheros/ar71xxreg.h
+++ /dev/null
@@ -1,576 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef _AR71XX_REG_H_
-#define _AR71XX_REG_H_
-
-/* PCI region */
-#define AR71XX_PCI_MEM_BASE		0x10000000
-/* 
- * PCI mem windows is 0x08000000 bytes long but we exclude control 
- * region from the resource manager
- */
-#define AR71XX_PCI_MEM_SIZE		0x07000000
-#define AR71XX_PCI_IRQ_START		0
-#define AR71XX_PCI_IRQ_END		2
-#define AR71XX_PCI_NIRQS		3
-/*
- * PCI devices slots are starting from this number
- */
-#define	AR71XX_PCI_BASE_SLOT		17
-
-/* PCI config registers */
-#define	AR71XX_PCI_LCONF_CMD		0x17010000
-#define			PCI_LCONF_CMD_READ	0x00000000
-#define			PCI_LCONF_CMD_WRITE	0x00010000
-#define	AR71XX_PCI_LCONF_WRITE_DATA	0x17010004
-#define	AR71XX_PCI_LCONF_READ_DATA	0x17010008
-#define	AR71XX_PCI_CONF_ADDR		0x1701000C
-#define	AR71XX_PCI_CONF_CMD		0x17010010
-#define			PCI_CONF_CMD_READ	0x0000000A
-#define			PCI_CONF_CMD_WRITE	0x0000000B
-#define	AR71XX_PCI_CONF_WRITE_DATA	0x17010014
-#define	AR71XX_PCI_CONF_READ_DATA	0x17010018
-#define	AR71XX_PCI_ERROR		0x1701001C
-#define	AR71XX_PCI_ERROR_ADDR		0x17010020
-#define	AR71XX_PCI_AHB_ERROR		0x17010024
-#define	AR71XX_PCI_AHB_ERROR_ADDR	0x17010028
-
-/* APB region */
-/*
- * Size is not really true actual APB window size is 
- * 0x01000000 but it should handle OHCI memory as well
- * because this controller's interrupt is routed through 
- * APB. 
- */
-#define AR71XX_APB_BASE         0x18000000
-#define AR71XX_APB_SIZE         0x06000000
-
-/* DDR registers */
-#define AR71XX_DDR_CONFIG		0x18000000
-#define AR71XX_DDR_CONFIG2		0x18000004
-#define AR71XX_DDR_MODE_REGISTER	0x18000008
-#define AR71XX_DDR_EXT_MODE_REGISTER	0x1800000C
-#define AR71XX_DDR_CONTROL		0x18000010
-#define AR71XX_DDR_REFRESH		0x18000014
-#define AR71XX_DDR_RD_DATA_THIS_CYCLE	0x18000018
-#define AR71XX_TAP_CONTROL0		0x1800001C
-#define AR71XX_TAP_CONTROL1		0x18000020
-#define AR71XX_TAP_CONTROL2		0x18000024
-#define AR71XX_TAP_CONTROL3		0x18000028
-#define AR71XX_PCI_WINDOW0		0x1800007C
-#define AR71XX_PCI_WINDOW1		0x18000080
-#define AR71XX_PCI_WINDOW2		0x18000084
-#define AR71XX_PCI_WINDOW3		0x18000088
-#define AR71XX_PCI_WINDOW4		0x1800008C
-#define AR71XX_PCI_WINDOW5		0x18000090
-#define AR71XX_PCI_WINDOW6		0x18000094
-#define AR71XX_PCI_WINDOW7		0x18000098
-#define AR71XX_WB_FLUSH_GE0		0x1800009C
-#define AR71XX_WB_FLUSH_GE1		0x180000A0
-#define AR71XX_WB_FLUSH_USB		0x180000A4
-#define AR71XX_WB_FLUSH_PCI		0x180000A8
-
-/*
- * Values for PCI_WINDOW_X registers 
- */
-#define PCI_WINDOW0_ADDR		0x10000000
-#define PCI_WINDOW1_ADDR		0x11000000
-#define PCI_WINDOW2_ADDR		0x12000000
-#define PCI_WINDOW3_ADDR		0x13000000
-#define PCI_WINDOW4_ADDR		0x14000000
-#define PCI_WINDOW5_ADDR		0x15000000
-#define PCI_WINDOW6_ADDR		0x16000000
-#define PCI_WINDOW7_ADDR		0x17000000
-/* This value enables acces to PCI config registers */
-#define PCI_WINDOW7_CONF_ADDR		0x07000000
-
-#define	AR71XX_UART_ADDR		0x18020000
-#define		AR71XX_UART_THR		0x0
-#define		AR71XX_UART_LSR		0x14
-#define		AR71XX_UART_LSR_THRE	(1 << 5)
-#define		AR71XX_UART_LSR_TEMT	(1 << 6)
-
-#define	AR71XX_USB_CTRL_FLADJ		0x18030000
-#define		USB_CTRL_FLADJ_HOST_SHIFT	12
-#define		USB_CTRL_FLADJ_A5_SHIFT		10
-#define		USB_CTRL_FLADJ_A4_SHIFT		8
-#define		USB_CTRL_FLADJ_A3_SHIFT		6
-#define		USB_CTRL_FLADJ_A2_SHIFT		4
-#define		USB_CTRL_FLADJ_A1_SHIFT		2
-#define		USB_CTRL_FLADJ_A0_SHIFT		0
-#define	AR71XX_USB_CTRL_CONFIG		0x18030004
-#define		USB_CTRL_CONFIG_OHCI_DES_SWAP	(1 << 19)
-#define		USB_CTRL_CONFIG_OHCI_BUF_SWAP	(1 << 18)
-#define		USB_CTRL_CONFIG_EHCI_DES_SWAP	(1 << 17)
-#define		USB_CTRL_CONFIG_EHCI_BUF_SWAP	(1 << 16)
-#define		USB_CTRL_CONFIG_DISABLE_XTL	(1 << 13)
-#define		USB_CTRL_CONFIG_OVERRIDE_XTL	(1 << 12)
-#define		USB_CTRL_CONFIG_CLK_SEL_SHIFT	4
-#define		USB_CTRL_CONFIG_CLK_SEL_MASK	3
-#define		USB_CTRL_CONFIG_CLK_SEL_12	0
-#define		USB_CTRL_CONFIG_CLK_SEL_24	1
-#define		USB_CTRL_CONFIG_CLK_SEL_48	2
-#define		USB_CTRL_CONFIG_OVER_CURRENT_AS_GPIO	(1 << 8)
-#define		USB_CTRL_CONFIG_SS_SIMULATION_MODE	(1 << 2)
-#define		USB_CTRL_CONFIG_RESUME_UTMI_PLS_DIS	(1 << 1)
-#define		USB_CTRL_CONFIG_UTMI_BACKWARD_ENB	(1 << 0)
-
-#define	AR71XX_GPIO_BASE		0x18040000
-#define		AR71XX_GPIO_OE			0x00
-#define		AR71XX_GPIO_IN			0x04
-#define		AR71XX_GPIO_OUT			0x08
-#define		AR71XX_GPIO_SET			0x0c
-#define		AR71XX_GPIO_CLEAR		0x10
-#define		AR71XX_GPIO_INT			0x14
-#define		AR71XX_GPIO_INT_TYPE		0x18
-#define		AR71XX_GPIO_INT_POLARITY	0x1c
-#define		AR71XX_GPIO_INT_PENDING		0x20
-#define		AR71XX_GPIO_INT_MASK		0x24
-#define		AR71XX_GPIO_FUNCTION		0x28
-#define			GPIO_FUNC_STEREO_EN     (1 << 17)
-#define			GPIO_FUNC_SLIC_EN       (1 << 16)
-#define			GPIO_FUNC_SPI_CS2_EN    (1 << 13)
-				/* CS2 is shared with GPIO_1 */
-#define			GPIO_FUNC_SPI_CS1_EN    (1 << 12)
-				/* CS1 is shared with GPIO_0 */
-#define			GPIO_FUNC_UART_EN       (1 << 8)
-#define			GPIO_FUNC_USB_OC_EN     (1 << 4)
-#define			GPIO_FUNC_USB_CLK_EN    (0)
-
-#define	AR71XX_BASE_FREQ		40000000
-#define	AR71XX_PLL_CPU_BASE		0x18050000
-#define	AR71XX_PLL_CPU_CONFIG		0x18050000
-#define		PLL_SW_UPDATE			(1U << 31)
-#define		PLL_LOCKED			(1 << 30)
-#define		PLL_AHB_DIV_SHIFT		20
-#define		PLL_AHB_DIV_MASK		7
-#define		PLL_DDR_DIV_SEL_SHIFT		18
-#define		PLL_DDR_DIV_SEL_MASK		3
-#define		PLL_CPU_DIV_SEL_SHIFT		16
-#define		PLL_CPU_DIV_SEL_MASK		3
-#define		PLL_LOOP_BW_SHIFT		12
-#define		PLL_LOOP_BW_MASK		0xf
-#define		PLL_DIV_IN_SHIFT		10
-#define		PLL_DIV_IN_MASK			3
-#define		PLL_DIV_OUT_SHIFT		8
-#define		PLL_DIV_OUT_MASK		3
-#define		PLL_FB_SHIFT			3
-#define		PLL_FB_MASK			0x1f
-#define		PLL_BYPASS			(1 << 1)
-#define		PLL_POWER_DOWN			(1 << 0)
-#define	AR71XX_PLL_SEC_CONFIG		0x18050004
-#define		AR71XX_PLL_ETH0_SHIFT		17
-#define		AR71XX_PLL_ETH1_SHIFT		19
-#define	AR71XX_PLL_CPU_CLK_CTRL		0x18050008
-#define	AR71XX_PLL_ETH_INT0_CLK		0x18050010
-#define	AR71XX_PLL_ETH_INT1_CLK		0x18050014
-#define		XPLL_ETH_INT_CLK_10		0x00991099
-#define		XPLL_ETH_INT_CLK_100		0x00441011
-#define		XPLL_ETH_INT_CLK_1000		0x13110000
-#define		XPLL_ETH_INT_CLK_1000_GMII	0x14110000
-#define		PLL_ETH_INT_CLK_10		0x00991099
-#define		PLL_ETH_INT_CLK_100		0x00001099
-#define		PLL_ETH_INT_CLK_1000		0x00110000
-#define	AR71XX_PLL_ETH_EXT_CLK		0x18050018
-#define	AR71XX_PLL_PCI_CLK		0x1805001C
-
-/* Reset block */
-#define	AR71XX_RST_BLOCK_BASE	0x18060000
-
-#define AR71XX_RST_WDOG_CONTROL	0x18060008
-#define		RST_WDOG_LAST			(1U << 31)
-#define		RST_WDOG_ACTION_MASK		3
-#define		RST_WDOG_ACTION_RESET		3
-#define		RST_WDOG_ACTION_NMI		2
-#define		RST_WDOG_ACTION_GP_INTR		1
-#define		RST_WDOG_ACTION_NOACTION	0
-
-#define AR71XX_RST_WDOG_TIMER	0x1806000C
-/* 
- * APB interrupt status and mask register and interrupt bit numbers for 
- */
-#define AR71XX_MISC_INTR_STATUS	0x18060010
-#define AR71XX_MISC_INTR_MASK	0x18060014
-#define		MISC_INTR_TIMER		0
-#define		MISC_INTR_ERROR		1
-#define		MISC_INTR_GPIO		2
-#define		MISC_INTR_UART		3
-#define		MISC_INTR_WATCHDOG	4
-#define		MISC_INTR_PERF		5
-#define		MISC_INTR_OHCI		6
-#define		MISC_INTR_DMA		7
-
-#define AR71XX_PCI_INTR_STATUS	0x18060018
-#define AR71XX_PCI_INTR_MASK	0x1806001C
-#define		PCI_INTR_CORE		(1 << 4)
-
-#define AR71XX_RST_RESET	0x18060024
-#define		RST_RESET_FULL_CHIP	(1 << 24) /* Same as pulling
-							     the reset pin */
-#define		RST_RESET_CPU_COLD	(1 << 20) /* Cold reset */
-#define		RST_RESET_GE1_MAC	(1 << 13)
-#define		RST_RESET_GE1_PHY	(1 << 12)
-#define		RST_RESET_GE0_MAC	(1 <<  9)
-#define		RST_RESET_GE0_PHY	(1 <<  8)
-#define		RST_RESET_USB_OHCI_DLL	(1 <<  6)
-#define		RST_RESET_USB_HOST	(1 <<  5)
-#define		RST_RESET_USB_PHY	(1 <<  4)
-#define		RST_RESET_PCI_BUS	(1 <<  1)
-#define		RST_RESET_PCI_CORE	(1 <<  0)
-
-/* Chipset revision details */
-#define	AR71XX_RST_RESET_REG_REV_ID	0x18060090
-#define		REV_ID_MAJOR_MASK	0xfff0
-#define		REV_ID_MAJOR_AR71XX	0x00a0
-#define		REV_ID_MAJOR_AR913X	0x00b0
-#define		REV_ID_MAJOR_AR7240	0x00c0
-#define		REV_ID_MAJOR_AR7241	0x0100
-#define		REV_ID_MAJOR_AR7242	0x1100
-
-/* AR71XX chipset revision details */
-#define		AR71XX_REV_ID_MINOR_MASK	0x3
-#define		AR71XX_REV_ID_MINOR_AR7130	0x0
-#define		AR71XX_REV_ID_MINOR_AR7141	0x1
-#define		AR71XX_REV_ID_MINOR_AR7161	0x2
-#define		AR71XX_REV_ID_REVISION_MASK	0x3
-#define		AR71XX_REV_ID_REVISION_SHIFT	2
-
-/* AR724X chipset revision details */
-#define		AR724X_REV_ID_REVISION_MASK	0x3
-
-/* AR91XX chipset revision details */
-#define		AR91XX_REV_ID_MINOR_MASK	0x3
-#define		AR91XX_REV_ID_MINOR_AR9130	0x0
-#define		AR91XX_REV_ID_MINOR_AR9132	0x1
-#define		AR91XX_REV_ID_REVISION_MASK	0x3
-#define		AR91XX_REV_ID_REVISION_SHIFT	2
-
-typedef enum {
-	AR71XX_MII_MODE_NONE = 0,
-	AR71XX_MII_MODE_GMII,
-	AR71XX_MII_MODE_MII,
-	AR71XX_MII_MODE_RGMII,
-	AR71XX_MII_MODE_RMII,
-	AR71XX_MII_MODE_SGMII	/* not hardware defined, though! */
-} ar71xx_mii_mode;
-
-/*
- * AR71xx MII control region
- */
-#define	AR71XX_MII0_CTRL	0x18070000
-#define			MII_CTRL_SPEED_SHIFT	4
-#define			MII_CTRL_SPEED_MASK	3
-#define				MII_CTRL_SPEED_10	0
-#define				MII_CTRL_SPEED_100	1
-#define				MII_CTRL_SPEED_1000	2
-#define			MII_CTRL_IF_MASK	3
-#define			MII_CTRL_IF_SHIFT	0
-#define				MII0_CTRL_IF_GMII	0
-#define				MII0_CTRL_IF_MII	1
-#define				MII0_CTRL_IF_RGMII	2
-#define				MII0_CTRL_IF_RMII	3
-
-#define	AR71XX_MII1_CTRL	0x18070004
-
-#define				MII1_CTRL_IF_RGMII	0
-#define				MII1_CTRL_IF_RMII	1
-
-/*
- * GigE adapters region
- */
-#define AR71XX_MAC0_BASE	0x19000000
-#define AR71XX_MAC1_BASE	0x1A000000
-
-#define		AR71XX_MAC_CFG1			0x00
-#define			MAC_CFG1_SOFT_RESET		(1U << 31)
-#define			MAC_CFG1_SIMUL_RESET		(1 << 30)
-#define			MAC_CFG1_MAC_RX_BLOCK_RESET	(1 << 19)
-#define			MAC_CFG1_MAC_TX_BLOCK_RESET	(1 << 18)
-#define			MAC_CFG1_RX_FUNC_RESET		(1 << 17)
-#define			MAC_CFG1_TX_FUNC_RESET		(1 << 16)
-#define			MAC_CFG1_LOOPBACK		(1 <<  8)
-#define			MAC_CFG1_RXFLOW_CTRL		(1 <<  5)
-#define			MAC_CFG1_TXFLOW_CTRL		(1 <<  4)
-#define			MAC_CFG1_SYNC_RX		(1 <<  3)
-#define			MAC_CFG1_RX_ENABLE		(1 <<  2)
-#define			MAC_CFG1_SYNC_TX		(1 <<  1)
-#define			MAC_CFG1_TX_ENABLE		(1 <<  0)
-#define		AR71XX_MAC_CFG2			0x04
-#define			MAC_CFG2_PREAMBLE_LEN_MASK	0xf
-#define			MAC_CFG2_PREAMBLE_LEN_SHIFT	12
-#define			MAC_CFG2_IFACE_MODE_1000	(2 << 8)
-#define			MAC_CFG2_IFACE_MODE_10_100	(1 << 8)
-#define			MAC_CFG2_IFACE_MODE_SHIFT	8
-#define			MAC_CFG2_IFACE_MODE_MASK	3
-#define			MAC_CFG2_HUGE_FRAME		(1 << 5)
-#define			MAC_CFG2_LENGTH_FIELD		(1 << 4)
-#define			MAC_CFG2_ENABLE_PADCRC		(1 << 2)
-#define			MAC_CFG2_ENABLE_CRC		(1 << 1)
-#define			MAC_CFG2_FULL_DUPLEX		(1 << 0)
-#define		AR71XX_MAC_IFG			0x08
-#define		AR71XX_MAC_HDUPLEX		0x0C
-#define		AR71XX_MAC_MAX_FRAME_LEN	0x10
-#define		AR71XX_MAC_MII_CFG		0x20
-#define			MAC_MII_CFG_RESET		(1U << 31)
-#define			MAC_MII_CFG_SCAN_AUTO_INC	(1 <<  5)
-#define			MAC_MII_CFG_PREAMBLE_SUP	(1 <<  4)
-#define			MAC_MII_CFG_CLOCK_SELECT_MASK	0x7
-#define			MAC_MII_CFG_CLOCK_SELECT_MASK_AR933X	0xf
-#define			MAC_MII_CFG_CLOCK_DIV_4		0
-#define			MAC_MII_CFG_CLOCK_DIV_6		2
-#define			MAC_MII_CFG_CLOCK_DIV_8		3
-#define			MAC_MII_CFG_CLOCK_DIV_10	4
-#define			MAC_MII_CFG_CLOCK_DIV_14	5
-#define			MAC_MII_CFG_CLOCK_DIV_20	6
-#define			MAC_MII_CFG_CLOCK_DIV_28	7
-
-/* .. and the AR933x/AR934x extensions */
-#define			MAC_MII_CFG_CLOCK_DIV_34	8
-#define			MAC_MII_CFG_CLOCK_DIV_42	9
-#define			MAC_MII_CFG_CLOCK_DIV_50	10
-#define			MAC_MII_CFG_CLOCK_DIV_58	11
-#define			MAC_MII_CFG_CLOCK_DIV_66	12
-#define			MAC_MII_CFG_CLOCK_DIV_74	13
-#define			MAC_MII_CFG_CLOCK_DIV_82	14
-#define			MAC_MII_CFG_CLOCK_DIV_98	15
-
-#define		AR71XX_MAC_MII_CMD		0x24
-#define			MAC_MII_CMD_SCAN_CYCLE		(1 << 1)
-#define			MAC_MII_CMD_READ		1
-#define			MAC_MII_CMD_WRITE		0
-#define		AR71XX_MAC_MII_ADDR		0x28
-#define			MAC_MII_PHY_ADDR_SHIFT		8
-#define			MAC_MII_PHY_ADDR_MASK		0xff
-#define			MAC_MII_REG_MASK		0x1f
-#define		AR71XX_MAC_MII_CONTROL		0x2C
-#define			MAC_MII_CONTROL_MASK		0xffff
-#define		AR71XX_MAC_MII_STATUS		0x30
-#define			MAC_MII_STATUS_MASK		0xffff
-#define		AR71XX_MAC_MII_INDICATOR	0x34
-#define			MAC_MII_INDICATOR_NOT_VALID	(1 << 2)
-#define			MAC_MII_INDICATOR_SCANNING	(1 << 1)
-#define			MAC_MII_INDICATOR_BUSY		(1 << 0)
-#define		AR71XX_MAC_IFCONTROL		0x38
-#define			MAC_IFCONTROL_SPEED	(1 << 16)
-#define		AR71XX_MAC_STA_ADDR1		0x40
-#define		AR71XX_MAC_STA_ADDR2		0x44
-#define		AR71XX_MAC_FIFO_CFG0		0x48
-#define			FIFO_CFG0_TX_FABRIC		(1 << 4)
-#define			FIFO_CFG0_TX_SYSTEM		(1 << 3)
-#define			FIFO_CFG0_RX_FABRIC		(1 << 2)
-#define			FIFO_CFG0_RX_SYSTEM		(1 << 1)
-#define			FIFO_CFG0_WATERMARK		(1 << 0)
-#define			FIFO_CFG0_ALL			((1 << 5) - 1)
-#define			FIFO_CFG0_ENABLE_SHIFT		8
-#define		AR71XX_MAC_FIFO_CFG1		0x4C
-#define		AR71XX_MAC_FIFO_CFG2		0x50
-#define		AR71XX_MAC_FIFO_TX_THRESHOLD	0x54
-#define		AR71XX_MAC_FIFO_RX_FILTMATCH	0x58
-/* 
- * These flags applicable both to AR71XX_MAC_FIFO_RX_FILTMASK and
- * to AR71XX_MAC_FIFO_RX_FILTMATCH
- */
-#define			FIFO_RX_MATCH_UNICAST		(1 << 17)
-#define			FIFO_RX_MATCH_TRUNC_FRAME	(1 << 16)
-#define			FIFO_RX_MATCH_VLAN_TAG		(1 << 15)
-#define			FIFO_RX_MATCH_UNSUP_OPCODE	(1 << 14)
-#define			FIFO_RX_MATCH_PAUSE_FRAME	(1 << 13)
-#define			FIFO_RX_MATCH_CTRL_FRAME	(1 << 12)
-#define			FIFO_RX_MATCH_LONG_EVENT	(1 << 11)
-#define			FIFO_RX_MATCH_DRIBBLE_NIBBLE	(1 << 10)
-#define			FIFO_RX_MATCH_BCAST		(1 <<  9)
-#define			FIFO_RX_MATCH_MCAST		(1 <<  8)
-#define			FIFO_RX_MATCH_OK		(1 <<  7)
-#define			FIFO_RX_MATCH_OORANGE		(1 <<  6)
-#define			FIFO_RX_MATCH_LEN_MSMTCH	(1 <<  5)
-#define			FIFO_RX_MATCH_CRC_ERROR		(1 <<  4)
-#define			FIFO_RX_MATCH_CODE_ERROR	(1 <<  3)
-#define			FIFO_RX_MATCH_FALSE_CARRIER	(1 <<  2)
-#define			FIFO_RX_MATCH_RX_DV_EVENT	(1 <<  1)
-#define			FIFO_RX_MATCH_DROP_EVENT	(1 <<  0)
-/*
- * Exclude unicast and truncated frames from matching
- */
-#define			FIFO_RX_FILTMATCH_DEFAULT		\
-				(FIFO_RX_MATCH_VLAN_TAG		| \
-				FIFO_RX_MATCH_UNSUP_OPCODE	| \
-				FIFO_RX_MATCH_PAUSE_FRAME	| \
-				FIFO_RX_MATCH_CTRL_FRAME	| \
-				FIFO_RX_MATCH_LONG_EVENT	| \
-				FIFO_RX_MATCH_DRIBBLE_NIBBLE	| \
-				FIFO_RX_MATCH_BCAST		| \
-				FIFO_RX_MATCH_MCAST		| \
-				FIFO_RX_MATCH_OK		| \
-				FIFO_RX_MATCH_OORANGE		| \
-				FIFO_RX_MATCH_LEN_MSMTCH	| \
-				FIFO_RX_MATCH_CRC_ERROR		| \
-				FIFO_RX_MATCH_CODE_ERROR	| \
-				FIFO_RX_MATCH_FALSE_CARRIER	| \
-				FIFO_RX_MATCH_RX_DV_EVENT	| \
-				FIFO_RX_MATCH_DROP_EVENT)
-#define		AR71XX_MAC_FIFO_RX_FILTMASK	0x5C
-#define			FIFO_RX_MASK_BYTE_MODE		(1 << 19)
-#define			FIFO_RX_MASK_NO_SHORT_FRAME	(1 << 18)
-#define			FIFO_RX_MASK_BIT17		(1 << 17)
-#define			FIFO_RX_MASK_BIT16		(1 << 16)
-#define			FIFO_RX_MASK_TRUNC_FRAME	(1 << 15)
-#define			FIFO_RX_MASK_LONG_EVENT		(1 << 14)
-#define			FIFO_RX_MASK_VLAN_TAG		(1 << 13)
-#define			FIFO_RX_MASK_UNSUP_OPCODE	(1 << 12)
-#define			FIFO_RX_MASK_PAUSE_FRAME	(1 << 11)
-#define			FIFO_RX_MASK_CTRL_FRAME		(1 << 10)
-#define			FIFO_RX_MASK_DRIBBLE_NIBBLE	(1 <<  9)
-#define			FIFO_RX_MASK_BCAST		(1 <<  8)
-#define			FIFO_RX_MASK_MCAST		(1 <<  7)
-#define			FIFO_RX_MASK_OK			(1 <<  6)
-#define			FIFO_RX_MASK_OORANGE		(1 <<  5)
-#define			FIFO_RX_MASK_LEN_MSMTCH		(1 <<  4)
-#define			FIFO_RX_MASK_CODE_ERROR		(1 <<  3)
-#define			FIFO_RX_MASK_FALSE_CARRIER	(1 <<  2)
-#define			FIFO_RX_MASK_RX_DV_EVENT	(1 <<  1)
-#define			FIFO_RX_MASK_DROP_EVENT		(1 <<  0)
-
-/*
- *  Len. mismatch, unsup. opcode and short frmae bits excluded
- */
-#define			FIFO_RX_FILTMASK_DEFAULT \
-				(FIFO_RX_MASK_NO_SHORT_FRAME	| \
-				FIFO_RX_MASK_BIT17		| \
-				FIFO_RX_MASK_BIT16		| \
-				FIFO_RX_MASK_TRUNC_FRAME	| \
-				FIFO_RX_MASK_LONG_EVENT		| \
-				FIFO_RX_MASK_VLAN_TAG		| \
-				FIFO_RX_MASK_PAUSE_FRAME	| \
-				FIFO_RX_MASK_CTRL_FRAME		| \
-				FIFO_RX_MASK_DRIBBLE_NIBBLE	| \
-				FIFO_RX_MASK_BCAST		| \
-				FIFO_RX_MASK_MCAST		| \
-				FIFO_RX_MASK_OK			| \
-				FIFO_RX_MASK_OORANGE		| \
-				FIFO_RX_MASK_CODE_ERROR		| \
-				FIFO_RX_MASK_FALSE_CARRIER	| \
-				FIFO_RX_MASK_RX_DV_EVENT	| \
-				FIFO_RX_MASK_DROP_EVENT)
-
-#define		AR71XX_MAC_FIFO_RAM0		0x60
-#define		AR71XX_MAC_FIFO_RAM1		0x64
-#define		AR71XX_MAC_FIFO_RAM2		0x68
-#define		AR71XX_MAC_FIFO_RAM3		0x6C
-#define		AR71XX_MAC_FIFO_RAM4		0x70
-#define		AR71XX_MAC_FIFO_RAM5		0x74
-#define		AR71XX_MAC_FIFO_RAM6		0x78
-#define		AR71XX_DMA_TX_CONTROL		0x180
-#define			DMA_TX_CONTROL_EN		(1 << 0)
-#define		AR71XX_DMA_TX_DESC		0x184
-#define		AR71XX_DMA_TX_STATUS		0x188
-#define			DMA_TX_STATUS_PCOUNT_MASK	0xff
-#define			DMA_TX_STATUS_PCOUNT_SHIFT	16
-#define			DMA_TX_STATUS_BUS_ERROR		(1 << 3) 
-#define			DMA_TX_STATUS_UNDERRUN		(1 << 1) 
-#define			DMA_TX_STATUS_PKT_SENT		(1 << 0) 
-#define		AR71XX_DMA_RX_CONTROL		0x18C
-#define			DMA_RX_CONTROL_EN		(1 << 0)
-#define		AR71XX_DMA_RX_DESC		0x190
-#define		AR71XX_DMA_RX_STATUS		0x194
-#define			DMA_RX_STATUS_PCOUNT_MASK	0xff
-#define			DMA_RX_STATUS_PCOUNT_SHIFT	16
-#define			DMA_RX_STATUS_BUS_ERROR		(1 << 3)
-#define			DMA_RX_STATUS_OVERFLOW		(1 << 2)
-#define			DMA_RX_STATUS_PKT_RECVD		(1 << 0)
-#define		AR71XX_DMA_INTR				0x198
-#define		AR71XX_DMA_INTR_STATUS			0x19C
-#define			DMA_INTR_ALL			((1 << 8) - 1)
-#define			DMA_INTR_RX_BUS_ERROR		(1 << 7)
-#define			DMA_INTR_RX_OVERFLOW		(1 << 6)
-#define			DMA_INTR_RX_PKT_RCVD		(1 << 4)
-#define			DMA_INTR_TX_BUS_ERROR		(1 << 3)
-#define			DMA_INTR_TX_UNDERRUN		(1 << 1)
-#define			DMA_INTR_TX_PKT_SENT		(1 << 0)
-
-#define	AR71XX_SPI_BASE	0x1f000000
-#define		AR71XX_SPI_FS		0x00
-#define		AR71XX_SPI_CTRL		0x04
-#define			SPI_CTRL_REMAP_DISABLE		(1 << 6)
-#define			SPI_CTRL_CLOCK_DIVIDER_MASK	((1 << 6) - 1)
-#define		AR71XX_SPI_IO_CTRL	0x08
-#define			SPI_IO_CTRL_CS2			(1 << 18)
-#define			SPI_IO_CTRL_CS1			(1 << 17)
-#define			SPI_IO_CTRL_CS0			(1 << 16)
-#define			SPI_IO_CTRL_CSMASK		(7 << 16)
-#define			SPI_IO_CTRL_CLK			(1 << 8)
-#define			SPI_IO_CTRL_DO			1
-#define		AR71XX_SPI_RDS		0x0C
-
-#define ATH_READ_REG(reg) \
-	*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg)))
-/*
- * Note: Don't put a flush read here; some users (eg the AR724x PCI fixup code)
- * requires write-only space to certain registers.  Doing the read afterwards
- * causes things to break.
- */
-#define ATH_WRITE_REG(reg, val) \
-      *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val)
-
-static inline void
-ar71xx_ddr_flush(uint32_t reg)
-{ 
-	ATH_WRITE_REG(reg, 1);
-	while ((ATH_READ_REG(reg) & 0x1))
-		;
-	ATH_WRITE_REG(reg, 1);
-	while ((ATH_READ_REG(reg) & 0x1))
-		;
-} 
-
-static inline void
-ar71xx_write_pll(uint32_t cfg_reg, uint32_t pll_reg, uint32_t pll, uint32_t pll_reg_shift)
-{
-	uint32_t sec_cfg;
-
-	/* set PLL registers */
-	sec_cfg = ATH_READ_REG(cfg_reg);
-	sec_cfg &= ~(3 << pll_reg_shift);
-	sec_cfg |= (2 << pll_reg_shift);
-
-	ATH_WRITE_REG(cfg_reg, sec_cfg);
-	DELAY(100);
-
-	ATH_WRITE_REG(pll_reg, pll);
-	sec_cfg |= (3 << pll_reg_shift);
-	ATH_WRITE_REG(cfg_reg, sec_cfg);
-	DELAY(100);
-
-	sec_cfg &= ~(3 << pll_reg_shift);
-	ATH_WRITE_REG(cfg_reg, sec_cfg);
-	DELAY(100);
-}
-
-#endif /* _AR71XX_REG_H_ */
diff --git a/sys/mips/atheros/ar724x_chip.c b/sys/mips/atheros/ar724x_chip.c
deleted file mode 100644
index cbd831b4095b..000000000000
--- a/sys/mips/atheros/ar724x_chip.c
+++ /dev/null
@@ -1,246 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar724xreg.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar724x_chip.h>
-
-static void
-ar724x_chip_detect_mem_size(void)
-{
-}
-
-static void
-ar724x_chip_detect_sys_frequency(void)
-{
-	uint32_t pll;
-	uint32_t freq;
-	uint32_t div;
-
-	u_ar71xx_mdio_freq = u_ar71xx_refclk = AR724X_BASE_FREQ;
-
-	pll = ATH_READ_REG(AR724X_PLL_REG_CPU_CONFIG);
-
-	div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
-	freq = div * AR724X_BASE_FREQ;
-
-	div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
-	freq *= div;
-
-	u_ar71xx_cpu_freq = freq;
-
-	div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
-	u_ar71xx_ddr_freq = freq / div;
-
-	div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
-	u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div;
-}
-
-static void
-ar724x_chip_device_stop(uint32_t mask)
-{
-	uint32_t mask_inv, reg;
-
-	mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL;
-	reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
-	reg |= mask;
-	reg &= ~mask_inv;
-	ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg);
-}
-
-static void
-ar724x_chip_device_start(uint32_t mask)
-{
-	uint32_t mask_inv, reg;
-
-	mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL;
-	reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
-	reg &= ~mask;
-	reg |= mask_inv;
-	ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg);
-}
-
-static int
-ar724x_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar724x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-
-	/* XXX TODO */
-	return;
-}
-
-/*
- * XXX TODO: set the PLL for arge0 only on AR7242.
- * The PLL/clock requirements are different.
- *
- * Otherwise, it's a NULL function for AR7240, AR7241 and
- * AR7242 arge1.
- */
-static void
-ar724x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-
-	switch (unit) {
-	case 0:
-		/* XXX TODO */
-		break;
-	case 1:
-		/* XXX TODO */
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-ar724x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE:
-		ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
-		break;
-	default:
-		printf("%s: invalid DDR flush id (%d)\n", __func__, id);
-		break;
-	}
-}
-
-static uint32_t
-ar724x_chip_get_eth_pll(unsigned int mac, int speed)
-{
-
-	return (0);
-}
-
-static void
-ar724x_chip_init_usb_peripheral(void)
-{
-
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR7240:
-		ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
-		    AR724X_RESET_USB_HOST);
-		DELAY(1000);
-
-		ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL |
-		    AR724X_RESET_USB_HOST);
-		DELAY(1000);
-
-		/*
-		 * WAR for HW bug. Here it adjusts the duration
-		 * between two SOFS.
-		 */
-		ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
-		    (3 << USB_CTRL_FLADJ_A0_SHIFT));
-
-		break;
-
-	case AR71XX_SOC_AR7241:
-	case AR71XX_SOC_AR7242:
-		ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
-		DELAY(100);
-
-		ar71xx_device_start(AR724X_RESET_USB_HOST);
-		DELAY(100);
-
-		ar71xx_device_start(AR724X_RESET_USB_PHY);
-		DELAY(100);
-
-		break;
-
-	default:
-		break;
-	}
-}
-
-struct ar71xx_cpu_def ar724x_chip_def = {
-	&ar724x_chip_detect_mem_size,
-	&ar724x_chip_detect_sys_frequency,
-	&ar724x_chip_device_stop,
-	&ar724x_chip_device_start,
-	&ar724x_chip_device_stopped,
-	&ar724x_chip_set_pll_ge,
-	&ar724x_chip_set_mii_speed,
-	&ar71xx_chip_set_mii_if,
-	&ar724x_chip_get_eth_pll,
-	&ar724x_chip_ddr_flush,
-	&ar724x_chip_init_usb_peripheral
-};
diff --git a/sys/mips/atheros/ar724x_chip.h b/sys/mips/atheros/ar724x_chip.h
deleted file mode 100644
index 0ee95ab88f90..000000000000
--- a/sys/mips/atheros/ar724x_chip.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR724X_CHIP_H__
-#define	__AR724X_CHIP_H__
-
-extern struct ar71xx_cpu_def ar724x_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar724x_pci.c b/sys/mips/atheros/ar724x_pci.c
deleted file mode 100644
index 74fb91a29d37..000000000000
--- a/sys/mips/atheros/ar724x_pci.c
+++ /dev/null
@@ -1,672 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Luiz Otavio O Souza.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar724xreg.h>
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_pci_bus_space.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#ifdef	AR71XX_ATH_EEPROM
-#include <mips/atheros/ar71xx_fixup.h>
-#endif	/* AR71XX_ATH_EEPROM */
-
-#undef	AR724X_PCI_DEBUG
-#ifdef AR724X_PCI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-struct ar71xx_pci_softc {
-	device_t		sc_dev;
-
-	int			sc_busno;
-	struct rman		sc_mem_rman;
-	struct rman		sc_irq_rman;
-
-	struct intr_event	*sc_eventstab[AR71XX_PCI_NIRQS];	
-	mips_intrcnt_t		sc_intr_counter[AR71XX_PCI_NIRQS];	
-	struct resource		*sc_irq;
-	void			*sc_ih;
-};
-
-static int ar724x_pci_setup_intr(device_t, device_t, struct resource *, int, 
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int ar724x_pci_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-static int ar724x_pci_intr(void *);
-
-static void
-ar724x_pci_write(uint32_t reg, uint32_t offset, uint32_t data, int bytes)
-{
-	uint32_t val, mask, shift;
-
-	/* Register access is 32-bit aligned */
-	shift = (offset & 3) * 8;
-	if (bytes % 4)
-		mask = (1 << (bytes * 8)) - 1;
-	else
-		mask = 0xffffffff;
-
-	rmb();
-	val = ATH_READ_REG(reg + (offset & ~3));
-	val &= ~(mask << shift);
-	val |= ((data & mask) << shift);
-	ATH_WRITE_REG(reg + (offset & ~3), val);
-	wmb();
-
-	dprintf("%s: %#x/%#x addr=%#x, data=%#x(%#x), bytes=%d\n", __func__, 
-	    reg, reg + (offset & ~3), offset, data, val, bytes);
-}
-
-static uint32_t
-ar724x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, 
-    u_int reg, int bytes)
-{
-	uint32_t data, shift, mask;
-
-	/* Register access is 32-bit aligned */
-	shift = (reg & 3) * 8;
-
-	/* Create a mask based on the width, post-shift */
-	if (bytes == 2)
-		mask = 0xffff;
-	else if (bytes == 1)
-		mask = 0xff;
-	else
-		mask = 0xffffffff;
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot,
-	    func, reg, bytes);
-
-	rmb();
-	if ((bus == 0) && (slot == 0) && (func == 0))
-		data = ATH_READ_REG(AR724X_PCI_CFG_BASE + (reg & ~3));
-	else
-		data = -1;
-
-	/* Get request bytes from 32-bit word */
-	data = (data >> shift) & mask;
-
-	dprintf("%s: read 0x%x\n", __func__, data);
-
-	return (data);
-}
-
-static void
-ar724x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, 
-    u_int reg, uint32_t data, int bytes)
-{
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d): %x\n", __func__, bus, slot, 
-	    func, reg, bytes, data);
-
-	if ((bus != 0) || (slot != 0) || (func != 0))
-		return;
-
-	/*
-	 * WAR for BAR issue on AR7240 - We are unable to access the PCI
-	 * device space if we set the BAR with proper base address.
-	 *
-	 * However, we _do_ want to allow programming in the probe value
-	 * (0xffffffff) so the PCI code can find out how big the memory
-	 * map is for this device.  Without it, it'll think the memory
-	 * map is 32 bits wide, the PCI code will then end up thinking
-	 * the register window is '0' and fail to allocate resources.
-	 *
-	 * Note: Test on AR7241/AR7242/AR9344! Those use a WAR value of
-	 * 0x1000ffff.
-	 */
-	if (reg == PCIR_BAR(0) && bytes == 4
-	    && ar71xx_soc == AR71XX_SOC_AR7240
-	    && data != 0xffffffff)
-		ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, 0xffff, bytes);
-	else
-		ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, data, bytes);
-}
-
-static void 
-ar724x_pci_mask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	/* XXX - Only one interrupt ? Only one device ? */
-	if (irq != AR71XX_PCI_IRQ_START)
-		return;
-
-	/* Update the interrupt mask reg */
-	reg = ATH_READ_REG(AR724X_PCI_INTR_MASK);
-	ATH_WRITE_REG(AR724X_PCI_INTR_MASK,
-	    reg & ~AR724X_PCI_INTR_DEV0);
-
-	/* Clear any pending interrupt */
-	reg = ATH_READ_REG(AR724X_PCI_INTR_STATUS);
-	ATH_WRITE_REG(AR724X_PCI_INTR_STATUS,
-	    reg | AR724X_PCI_INTR_DEV0);
-}
-
-static void 
-ar724x_pci_unmask_irq(void *source)
-{
-	uint32_t reg;
-	unsigned int irq = (unsigned int)source;
-
-	/* XXX */
-	if (irq != AR71XX_PCI_IRQ_START)
-		return;
-
-	/* Update the interrupt mask reg */
-	reg = ATH_READ_REG(AR724X_PCI_INTR_MASK);
-	ATH_WRITE_REG(AR724X_PCI_INTR_MASK,
-	    reg | AR724X_PCI_INTR_DEV0);
-}
-
-static int
-ar724x_pci_setup(device_t dev)
-{
-	uint32_t reg;
-
-	/* setup COMMAND register */
-	reg = PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_SERRESPEN |
-	    PCIM_CMD_BACKTOBACK | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN;
-
-	ar724x_pci_write(AR724X_PCI_CRP_BASE, PCIR_COMMAND, reg, 2);
-	ar724x_pci_write(AR724X_PCI_CRP_BASE, 0x20, 0x1ff01000, 4);
-	ar724x_pci_write(AR724X_PCI_CRP_BASE, 0x24, 0x1ff01000, 4);
-
-	reg = ATH_READ_REG(AR724X_PCI_RESET);
-	if (reg != 0x7) {
-		DELAY(100000);
-		ATH_WRITE_REG(AR724X_PCI_RESET, 0);
-		DELAY(100);
-		ATH_WRITE_REG(AR724X_PCI_RESET, 4);
-		DELAY(100000);
-	}
-
-	if (ar71xx_soc == AR71XX_SOC_AR7240)
-		reg = AR724X_PCI_APP_LTSSM_ENABLE;
-	else
-		reg = 0x1ffc1;
-	ATH_WRITE_REG(AR724X_PCI_APP, reg);
-	/* Flush write */
-	(void) ATH_READ_REG(AR724X_PCI_APP);
-
-	DELAY(1000);
-
-	reg = ATH_READ_REG(AR724X_PCI_RESET);
-	if ((reg & AR724X_PCI_RESET_LINK_UP) == 0) {
-		device_printf(dev, "no PCIe controller found\n");
-		return (ENXIO);
-	}
-
-	if (ar71xx_soc == AR71XX_SOC_AR7241 ||
-	    ar71xx_soc == AR71XX_SOC_AR7242) {
-		reg = ATH_READ_REG(AR724X_PCI_APP);
-		reg |= (1 << 16);
-		ATH_WRITE_REG(AR724X_PCI_APP, reg);
-	}
-
-	return (0);
-}
-
-#ifdef	AR71XX_ATH_EEPROM
-#define	AR5416_EEPROM_MAGIC		0xa55a
-
-/*
- * XXX - This should not be here ! And this looks like Atheros (if_ath) only.
- */
-static void
-ar724x_pci_fixup(device_t dev, long flash_addr, int len)
-{
-	uint32_t bar0, reg, val;
-	uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr);
-
-#if 0
-	if (cal_data[0] != AR5416_EEPROM_MAGIC) {
-		device_printf(dev, "%s: Invalid calibration data from 0x%x\n",
-		    __func__, (uintptr_t) flash_addr);
-		return;
-	}
-#endif
-
-	/* Save bar(0) address - just to flush bar(0) (SoC WAR) ? */
-	bar0 = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_BAR(0), 4);
-
-	/* Write temporary BAR0 to map the NIC into a fixed location */
-	/* XXX AR7240: 0xffff; 7241/7242/9344: 0x1000ffff */
-	ar724x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0),
-	    AR71XX_PCI_MEM_BASE, 4);
-
-	val = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_COMMAND, 2);
-	val |= (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
-	ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, val, 2); 
-
-	/* set pointer to first reg address */
-	cal_data += 3;
-	while (*cal_data != 0xffff) {
-		reg = *cal_data++;
-		val = *cal_data++;
-		val |= (*cal_data++) << 16;
-
-		if (bootverbose)
-			printf("    0x%08x=0x%08x\n", reg, val);
-
-		/* Write eeprom fixup data to device memory */
-		ATH_WRITE_REG(AR71XX_PCI_MEM_BASE + reg, val);
-		DELAY(100);
-	}
-
-	val = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_COMMAND, 2);
-	val &= ~(PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
-	ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, val, 2); 
-
-	/* Write the saved bar(0) address */
-	ar724x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), bar0, 4);
-}
-#undef	AR5416_EEPROM_MAGIC
-
-/*
- * XXX This is (mostly) duplicated with ar71xx_pci.c.
- * It should at some point be fixed.
- */
-static void
-ar724x_pci_slot_fixup(device_t dev)
-{
-	long int flash_addr;
-	char buf[64];
-	int size;
-
-	/*
-	 * Check whether the given slot has a hint to poke.
-	 */
-	if (bootverbose)
-	device_printf(dev, "%s: checking dev %s, %d/%d/%d\n",
-	    __func__, device_get_nameunit(dev), 0, 0, 0);
-
-	snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_addr",
-	    0, 0, 0);
-
-	if (resource_long_value(device_get_name(dev), device_get_unit(dev),
-	    buf, &flash_addr) == 0) {
-		snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_size",
-		    0, 0, 0);
-		if (resource_int_value(device_get_name(dev),
-		    device_get_unit(dev), buf, &size) != 0) {
-			device_printf(dev,
-			    "%s: missing hint '%s', aborting EEPROM\n",
-			    __func__, buf);
-			return;
-		}
-
-		device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n",
-		    flash_addr, 0, 0, 0);
-		ar724x_pci_fixup(dev, flash_addr, size);
-		ar71xx_pci_slot_create_eeprom_firmware(dev, 0, 0, 0,
-		    flash_addr, size);
-	}
-}
-#endif	/* AR71XX_ATH_EEPROM */
-
-static int
-ar724x_pci_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-ar724x_pci_attach(device_t dev)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	int rid = 0;
-
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "ar724x PCI memory window";
-	if (rman_init(&sc->sc_mem_rman) != 0 || 
-	    rman_manage_region(&sc->sc_mem_rman, AR71XX_PCI_MEM_BASE, 
-		AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1) != 0) {
-		panic("ar724x_pci_attach: failed to set up I/O rman");
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "ar724x PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, 
-	        AR71XX_PCI_IRQ_END) != 0)
-		panic("ar724x_pci_attach: failed to set up IRQ rman");
-
-	/* Disable interrupts */
-	ATH_WRITE_REG(AR724X_PCI_INTR_STATUS, 0);
-	ATH_WRITE_REG(AR724X_PCI_INTR_MASK, 0);
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC,
-			    ar724x_pci_intr, NULL, sc, &sc->sc_ih))) {
-		device_printf(dev, 
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* Reset PCIe core and PCIe PHY */
-	ar71xx_device_stop(AR724X_RESET_PCIE);
-	ar71xx_device_stop(AR724X_RESET_PCIE_PHY);
-	ar71xx_device_stop(AR724X_RESET_PCIE_PHY_SERIAL);
-	DELAY(100);
-
-	ar71xx_device_start(AR724X_RESET_PCIE_PHY_SERIAL);
-	DELAY(100);
-	ar71xx_device_start(AR724X_RESET_PCIE_PHY);
-	ar71xx_device_start(AR724X_RESET_PCIE);
-
-	if (ar724x_pci_setup(dev))
-		return (ENXIO);
-
-#ifdef	AR71XX_ATH_EEPROM
-	ar724x_pci_slot_fixup(dev);
-#endif	/* AR71XX_ATH_EEPROM */
-
-	/* Fixup internal PCI bridge */
-	ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, 
-            PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN 
-	    | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK
-	    | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2);
-
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-ar724x_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-ar724x_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	struct ar71xx_pci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static struct resource *
-ar724x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);	
-	struct resource *rv;
-	struct rman *rm;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if (flags & RF_ACTIVE) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	} 
-
-	return (rv);
-}
-
-static int
-ar724x_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
-	    child, type, rid, r));
-
-	if (!res) {
-		switch(type) {
-		case SYS_RES_MEMORY:
-		case SYS_RES_IOPORT:
-
-			rman_set_bustag(r, ar71xx_bus_space_pcimem);
-			break;
-		}
-	}
-
-	return (res);
-}
-
-static int
-ar724x_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq, 
-		    ar724x_pci_mask_irq, ar724x_pci_unmask_irq, NULL, NULL,
-		    "pci intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irq] = event;
-			sc->sc_intr_counter[irq] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return error;
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-	mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
-
-	ar724x_pci_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-ar724x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	int irq, result;
-
-	irq = rman_get_start(ires);
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	ar724x_pci_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-}
-
-static int
-ar724x_pci_intr(void *arg)
-{
-	struct ar71xx_pci_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq, mask;
-
-	reg = ATH_READ_REG(AR724X_PCI_INTR_STATUS);
-	mask = ATH_READ_REG(AR724X_PCI_INTR_MASK);
-	/*
-	 * Handle only unmasked interrupts
-	 */
-	reg &= mask;
-	if (reg & AR724X_PCI_INTR_DEV0) {
-		irq = AR71XX_PCI_IRQ_START;
-		event = sc->sc_eventstab[irq];
-		if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-			printf("Stray IRQ %d\n", irq);
-			return (FILTER_STRAY);
-		}
-
-		/* Flush pending memory transactions */
-		ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE);
-
-		/* TODO: frame instead of NULL? */
-		intr_event_handle(event, NULL);
-		mips_intrcnt_inc(sc->sc_intr_counter[irq]);
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static int
-ar724x_pci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static int
-ar724x_pci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-
-	return (pci_get_slot(device));
-}
-
-static device_method_t ar724x_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		ar724x_pci_probe),
-	DEVMETHOD(device_attach,	ar724x_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	ar724x_pci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	ar724x_pci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	ar724x_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, ar724x_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	ar724x_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	ar724x_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	ar724x_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	ar724x_pci_read_config),
-	DEVMETHOD(pcib_write_config,	ar724x_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	ar724x_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t ar724x_pci_driver = {
-	"pcib",
-	ar724x_pci_methods,
-	sizeof(struct ar71xx_pci_softc),
-};
-
-static devclass_t ar724x_pci_devclass;
-
-DRIVER_MODULE(ar724x_pci, nexus, ar724x_pci_driver, ar724x_pci_devclass, 0, 0);
diff --git a/sys/mips/atheros/ar724xreg.h b/sys/mips/atheros/ar724xreg.h
deleted file mode 100644
index 8e2e1329f8a8..000000000000
--- a/sys/mips/atheros/ar724xreg.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR72XX_REG_H__
-#define	__AR72XX_REG_H__
-
-#define	AR724X_PLL_REG_CPU_CONFIG	AR71XX_PLL_CPU_BASE + 0x00
-#define	AR724X_PLL_REG_PCIE_CONFIG	AR71XX_PLL_CPU_BASE + 0x18
-
-#define	AR724X_PLL_DIV_SHIFT		0
-#define	AR724X_PLL_DIV_MASK		0x3ff
-#define	AR724X_PLL_REF_DIV_SHIFT	10
-#define	AR724X_PLL_REF_DIV_MASK		0xf
-#define	AR724X_AHB_DIV_SHIFT		19
-#define	AR724X_AHB_DIV_MASK		0x1
-#define	AR724X_DDR_DIV_SHIFT		22
-#define	AR724X_DDR_DIV_MASK		0x3
-
-#define	AR724X_PLL_VAL_1000		0x00110000
-#define	AR724X_PLL_VAL_100		0x00001099
-#define	AR724X_PLL_VAL_10		0x00991099
-
-#define	AR724X_BASE_FREQ		5000000
-
-#define	AR724X_DDR_REG_FLUSH_GE0	(AR71XX_DDR_CONFIG + 0x7c)
-#define	AR724X_DDR_REG_FLUSH_GE1	(AR71XX_DDR_CONFIG + 0x80)
-#define	AR724X_DDR_REG_FLUSH_USB	(AR71XX_DDR_CONFIG + 0x84)
-#define	AR724X_DDR_REG_FLUSH_PCIE	(AR71XX_DDR_CONFIG + 0x88)
-
-#define	AR724X_RESET_REG_RESET_MODULE	AR71XX_RST_BLOCK_BASE + 0x1c
-#define	AR724X_RESET_USB_HOST			(1 << 5)
-#define	AR724X_RESET_USB_PHY			(1 << 4)
-#define	AR724X_RESET_MODULE_USB_OHCI_DLL	(1 << 3)
-
-#define	AR724X_RESET_GE1_MDIO			(1 << 23)
-#define	AR724X_RESET_GE0_MDIO			(1 << 22)
-#define	AR724X_RESET_PCIE_PHY_SERIAL		(1 << 10)
-#define	AR724X_RESET_PCIE_PHY			(1 << 7)
-#define	AR724X_RESET_PCIE			(1 << 6)
-#define	AR724X_RESET_USB_HOST			(1 << 5)
-#define	AR724X_RESET_USB_PHY			(1 << 4)
-#define	AR724X_RESET_USBSUS_OVERRIDE		(1 << 3)
-
-/* XXX so USB requires different init code? -adrian */
-#define	AR7240_OHCI_BASE		0x1b000000
-#define	AR7240_OHCI_SIZE		0x01000000
-
-#define	AR724X_PCI_CRP_BASE		(AR71XX_APB_BASE + 0x000C0000)
-#define	AR724X_PCI_CRP_SIZE		0x100
-#define	AR724X_PCI_CFG_BASE		0x14000000
-#define	AR724X_PCI_CFG_SIZE		0x1000
-
-#define	AR724X_PCI_CTRL_BASE		(AR71XX_APB_BASE + 0x000F0000)
-#define	AR724X_PCI_CTRL_SIZE		0x100
-
-/* PCI config registers - AR724X_PCI_CTRL_BASE */
-#define	AR724X_PCI_APP			0x180f0000
-#define	AR724X_PCI_APP_LTSSM_ENABLE	(1 << 0)
-#define	AR724X_PCI_RESET		0x180f0018
-#define	AR724X_PCI_RESET_LINK_UP	(1 << 0)
-#define	AR724X_PCI_INTR_STATUS		0x180f004c
-#define	AR724X_PCI_INTR_MASK		0x180f0050
-#define	AR724X_PCI_INTR_DEV0		(1 << 14)
-
-#define	AR724X_GPIO_FUNC_GE0_MII_CLK_EN		(1 << 19)
-#define	AR724X_GPIO_FUNC_SPI_EN			(1 << 18)
-#define	AR724X_GPIO_FUNC_SPI_CS_EN2		(1 << 14)
-#define	AR724X_GPIO_FUNC_SPI_CS_EN1		(1 << 13)
-#define	AR724X_GPIO_FUNC_CLK_OBS5_EN		(1 << 12)
-#define	AR724X_GPIO_FUNC_CLK_OBS4_EN		(1 << 11)
-#define	AR724X_GPIO_FUNC_CLK_OBS3_EN		(1 << 10)
-#define	AR724X_GPIO_FUNC_CLK_OBS2_EN		(1 << 9)
-#define	AR724X_GPIO_FUNC_CLK_OBS1_EN		(1 << 8)
-#define	AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN	(1 << 7)
-#define	AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN	(1 << 6)
-#define	AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN	(1 << 5)
-#define	AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN	(1 << 4)
-#define	AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN	(1 << 3)
-#define	AR724X_GPIO_FUNC_UART_RTS_CTS_EN	(1 << 2)
-#define	AR724X_GPIO_FUNC_UART_EN		(1 << 1)
-#define	AR724X_GPIO_FUNC_JTAG_DISABLE		(1 << 0)
-
-#endif
diff --git a/sys/mips/atheros/ar91xx_chip.c b/sys/mips/atheros/ar91xx_chip.c
deleted file mode 100644
index 216ef2b9c1be..000000000000
--- a/sys/mips/atheros/ar91xx_chip.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar91xxreg.h>
-#include <mips/atheros/ar91xx_chip.h>
-
-static void
-ar91xx_chip_detect_mem_size(void)
-{
-}
-
-static void
-ar91xx_chip_detect_sys_frequency(void)
-{
-	uint32_t pll;
-	uint32_t freq;
-	uint32_t div;
-
-	u_ar71xx_mdio_freq = u_ar71xx_refclk = AR91XX_BASE_FREQ;
-
-	pll = ATH_READ_REG(AR91XX_PLL_REG_CPU_CONFIG);
-
-	div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK);
-	freq = div * AR91XX_BASE_FREQ;
-	u_ar71xx_cpu_freq = freq;
-
-	div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1;
-	u_ar71xx_ddr_freq = freq / div;
-
-	div = (((pll >> AR91XX_AHB_DIV_SHIFT) & AR91XX_AHB_DIV_MASK) + 1) * 2;
-	u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div;
-	u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div;
-}
-
-static void
-ar91xx_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg | mask);
-}
-
-static void
-ar91xx_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg & ~mask);
-}
-
-static int
-ar91xx_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar91xx_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-
-	switch (unit) {
-	case 0:
-		ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
-		    AR91XX_PLL_REG_ETH0_INT_CLOCK, pll,
-		    AR91XX_ETH0_PLL_SHIFT);
-		break;
-	case 1:
-		ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
-		    AR91XX_PLL_REG_ETH1_INT_CLOCK, pll,
-		    AR91XX_ETH1_PLL_SHIFT);
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-ar91xx_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_WMAC:
-		ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
-		break;
-	default:
-		printf("%s: invalid DDR flush id (%d)\n", __func__, id);
-		break;
-	}
-}
-
-static uint32_t
-ar91xx_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch(speed) {
-	case 10:
-		pll = AR91XX_PLL_VAL_10;
-		break;
-	case 100:
-		pll = AR91XX_PLL_VAL_100;
-		break;
-	case 1000:
-		pll = AR91XX_PLL_VAL_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-
-	return (pll);
-}
-
-static void
-ar91xx_chip_init_usb_peripheral(void)
-{
-
-	ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE);
-	DELAY(100);
-
-	ar71xx_device_start(RST_RESET_USB_HOST);
-	DELAY(100);
-
-	ar71xx_device_start(RST_RESET_USB_PHY);
-	DELAY(100);
-
-	/* Wireless */
-	ar71xx_device_stop(AR91XX_RST_RESET_MODULE_AMBA2WMAC);
-	DELAY(1000);
-
-	ar71xx_device_start(AR91XX_RST_RESET_MODULE_AMBA2WMAC);
-	DELAY(1000);
-}
-
-struct ar71xx_cpu_def ar91xx_chip_def = {
-	&ar91xx_chip_detect_mem_size,
-	&ar91xx_chip_detect_sys_frequency,
-	&ar91xx_chip_device_stop,
-	&ar91xx_chip_device_start,
-	&ar91xx_chip_device_stopped,
-	&ar91xx_chip_set_pll_ge,
-	&ar71xx_chip_set_mii_speed,
-	&ar71xx_chip_set_mii_if,
-	&ar91xx_chip_get_eth_pll,
-	&ar91xx_chip_ddr_flush,
-	&ar91xx_chip_init_usb_peripheral,
-};
diff --git a/sys/mips/atheros/ar91xx_chip.h b/sys/mips/atheros/ar91xx_chip.h
deleted file mode 100644
index e75f6cc406b3..000000000000
--- a/sys/mips/atheros/ar91xx_chip.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR91XX_CHIP_H__
-#define	__AR91XX_CHIP_H__
-
-extern struct ar71xx_cpu_def ar91xx_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar91xxreg.h b/sys/mips/atheros/ar91xxreg.h
deleted file mode 100644
index e4815e4034ab..000000000000
--- a/sys/mips/atheros/ar91xxreg.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Adrian Chadd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR91XX_REG_H__
-#define	__AR91XX_REG_H__
-
-#define	AR91XX_BASE_FREQ		5000000
-
-/* reset block */
-#define	AR91XX_RESET_REG_RESET_MODULE	AR71XX_RST_BLOCK_BASE + 0x1c
-
-#define	AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE	(1 << 10)
-#define	AR91XX_RST_RESET_MODULE_AMBA2WMAC	(1 << 22)
-
-/* PLL block */
-#define	AR91XX_PLL_REG_CPU_CONFIG       AR71XX_PLL_CPU_BASE + 0x00
-#define	AR91XX_PLL_REG_ETH_CONFIG       AR71XX_PLL_CPU_BASE + 0x04
-#define	AR91XX_PLL_REG_ETH0_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x14
-#define	AR91XX_PLL_REG_ETH1_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x18
-
-#define	AR91XX_PLL_DIV_SHIFT		0
-#define	AR91XX_PLL_DIV_MASK		0x3ff
-#define	AR91XX_DDR_DIV_SHIFT		22
-#define	AR91XX_DDR_DIV_MASK		0x3
-#define	AR91XX_AHB_DIV_SHIFT		19
-#define	AR91XX_AHB_DIV_MASK		0x1
-
-#define	AR91XX_ETH0_PLL_SHIFT		20
-#define	AR91XX_ETH1_PLL_SHIFT		22
-
-#define	AR91XX_PLL_VAL_1000		0x1a000000
-#define	AR91XX_PLL_VAL_100		0x13000a44
-#define	AR91XX_PLL_VAL_10		0x00441099
-
-/* DDR block */
-#define	AR91XX_DDR_CTRLBASE		(AR71XX_APB_BASE + 0)
-#define	AR91XX_DDR_CTRL_SIZE		0x10000
-#define	AR91XX_DDR_REG_FLUSH_GE0	AR91XX_DDR_CTRLBASE + 0x7c
-#define	AR91XX_DDR_REG_FLUSH_GE1	AR91XX_DDR_CTRLBASE + 0x80
-#define	AR91XX_DDR_REG_FLUSH_USB	AR91XX_DDR_CTRLBASE + 0x84
-#define	AR91XX_DDR_REG_FLUSH_WMAC	AR91XX_DDR_CTRLBASE + 0x88
-
-/* WMAC stuff */
-#define	AR91XX_WMAC_BASE		(AR71XX_APB_BASE + 0x000C0000)
-#define	AR91XX_WMAC_SIZE		0x30000
-
-/* GPIO stuff */
-#define	AR91XX_GPIO_FUNC_WMAC_LED_EN	(1 << 22)
-#define	AR91XX_GPIO_FUNC_EXP_PORT_CS_EN	(1 << 21)
-#define	AR91XX_GPIO_FUNC_I2S_REFCLKEN	(1 << 20)
-#define	AR91XX_GPIO_FUNC_I2S_MCKEN	(1 << 19)
-#define	AR91XX_GPIO_FUNC_I2S1_EN	(1 << 18)
-#define	AR91XX_GPIO_FUNC_I2S0_EN	(1 << 17)
-#define	AR91XX_GPIO_FUNC_SLIC_EN	(1 << 16)
-#define	AR91XX_GPIO_FUNC_UART_RTSCTS_EN	(1 << 9)
-#define	AR91XX_GPIO_FUNC_UART_EN	(1 << 8)
-#define	AR91XX_GPIO_FUNC_USB_CLK_EN	(1 << 4)
-
-#endif
diff --git a/sys/mips/atheros/ar933x_chip.c b/sys/mips/atheros/ar933x_chip.c
deleted file mode 100644
index 73000a0220e1..000000000000
--- a/sys/mips/atheros/ar933x_chip.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar933xreg.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_setup.h>
-
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar933x_chip.h>
-
-static void
-ar933x_chip_detect_mem_size(void)
-{
-}
-
-static void
-ar933x_chip_detect_sys_frequency(void)
-{
-	uint32_t clock_ctrl;
-	uint32_t cpu_config;
-	uint32_t freq;
-	uint32_t t;
-
-	t = ATH_READ_REG(AR933X_RESET_REG_BOOTSTRAP);
-	if (t & AR933X_BOOTSTRAP_REF_CLK_40)
-		u_ar71xx_refclk = (40 * 1000 * 1000);
-	else
-		u_ar71xx_refclk = (25 * 1000 * 1000);
-
-	clock_ctrl = ATH_READ_REG(AR933X_PLL_CLOCK_CTRL_REG);
-	if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) {
-		u_ar71xx_cpu_freq = u_ar71xx_refclk;
-		u_ar71xx_ahb_freq = u_ar71xx_refclk;
-		u_ar71xx_ddr_freq = u_ar71xx_refclk;
-	} else {
-		cpu_config = ATH_READ_REG(AR933X_PLL_CPU_CONFIG_REG);
-
-		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-		    AR933X_PLL_CPU_CONFIG_REFDIV_MASK;
-		freq = u_ar71xx_refclk / t;
-
-		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) &
-		    AR933X_PLL_CPU_CONFIG_NINT_MASK;
-		freq *= t;
-
-		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-		    AR933X_PLL_CPU_CONFIG_OUTDIV_MASK;
-		if (t == 0)
-			t = 1;
-
-		freq >>= t;
-
-		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) &
-		     AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK) + 1;
-		u_ar71xx_cpu_freq = freq / t;
-
-		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) &
-		      AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK) + 1;
-		u_ar71xx_ddr_freq = freq / t;
-
-		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) &
-		     AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1;
-		u_ar71xx_ahb_freq = freq / t;
-	}
-
-	/*
-	 * On the AR933x, the UART frequency is the reference clock,
-	 * not the AHB bus clock.
-	 */
-	u_ar71xx_uart_freq = u_ar71xx_refclk;
-
-	/*
-	 * XXX TODO: check whether the mdio frequency is always the
-	 * refclock frequency, or whether it's variable like on the
-	 * AR934x.
-	 */
-	u_ar71xx_mdio_freq = u_ar71xx_refclk;
-
-	/*
-	 * XXX check what the watchdog frequency should be?
-	 */
-	u_ar71xx_wdt_freq = u_ar71xx_ahb_freq;
-}
-
-static void
-ar933x_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR933X_RESET_REG_RESET_MODULE, reg | mask);
-}
-
-static void
-ar933x_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR933X_RESET_REG_RESET_MODULE, reg & ~mask);
-}
-
-static int
-ar933x_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar933x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-
-	/* XXX TODO */
-	return;
-}
-
-/*
- * XXX TODO !!
- */
-static void
-ar933x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-
-	switch (unit) {
-	case 0:
-		/* XXX TODO */
-		break;
-	case 1:
-		/* XXX TODO */
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-ar933x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_WMAC:
-		ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_WMAC);
-		break;
-	default:
-		printf("%s: invalid DDR flush id (%d)\n", __func__, id);
-		break;
-	}
-}
-
-static uint32_t
-ar933x_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch (speed) {
-	case 10:
-		pll = AR933X_PLL_VAL_10;
-		break;
-	case 100:
-		pll = AR933X_PLL_VAL_100;
-		break;
-	case 1000:
-		pll = AR933X_PLL_VAL_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-	return (pll);
-}
-
-static void
-ar933x_chip_init_usb_peripheral(void)
-{
-	ar71xx_device_stop(AR933X_RESET_USBSUS_OVERRIDE);
-	DELAY(100);
-
-	ar71xx_device_start(AR933X_RESET_USB_HOST);
-	DELAY(100);
-
-	ar71xx_device_start(AR933X_RESET_USB_PHY);
-	DELAY(100);
-}
-
-static void
-ar933x_configure_gmac(uint32_t gmac_cfg)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR933X_GMAC_REG_ETH_CFG);
-
-	/*
-	 * The relevant bits here include:
-	 *
-	 * + AR933X_ETH_CFG_SW_PHY_SWAP
-	 * + AR933X_ETH_CFG_SW_PHY_ADDR_SWAP
-	 *
-	 * There are other things; look at what openwrt exposes so
-	 * it can be correctly exposed.
-	 *
-	 * TODO: what about ethernet switch support? How's that work?
-	 */
-	if (bootverbose)
-		printf("%s: GMAC config was 0x%08x\n", __func__, reg);
-        reg &= ~(AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP);
-	reg |= gmac_cfg;
-	if (bootverbose)
-		printf("%s: GMAC setting is 0x%08x; register is now 0x%08x\n",
-		    __func__,
-		    gmac_cfg,
-		    reg);
-	ATH_WRITE_REG(AR933X_GMAC_REG_ETH_CFG, reg);
-}
-
-static void
-ar933x_chip_init_gmac(void)
-{
-	int val;
-	uint32_t gmac_cfg = 0;
-
-	/*
-	 * These two bits need a bit better explanation.
-	 *
-	 * The default configuration in the hardware is to map both
-	 * ports to the internal switch.
-	 *
-	 * Here, GE0 == arge0, GE1 == arge1.
-	 *
-	 * The internal switch has:
-	 * + 5 MAC ports, MAC0->MAC4.
-	 * + 5 PHY ports, PHY0->PHY4,
-	 * + MAC0 connects to GE1;
-	 * + GE0 connects to PHY4;
-	 * + The other mappings are MAC1->PHY0, MAC2->PHY1 .. MAC4->PHY3.
-	 *
-	 * The GE1 port is linked in via 1000MBit/full, supplying what is
-	 * normally the 'WAN' switch ports.
-	 *
-	 * The switch is connected the MDIO bus on GE1.  It looks like
-	 * a normal AR7240 on-board switch.
-	 *
-	 * The GE0 port is connected via MII to PHY4, and can operate in
-	 * 10/100mbit, full/half duplex.  Ie, you can speak to PHY4 on
-	 * the MDIO bus and everything will simply 'work'.
-	 *
-	 * So far so good.  This looks just like an AR7240 SoC.
-	 *
-	 * However, some configurations will just expose one or two
-	 * physical ports.  In this case, some configuration bits can
-	 * be set to tweak this.
-	 *
-	 * + CFG_SW_PHY_ADDR_SWAP swaps PHY port 0 with PHY port 4.
-	 *   Ie, GE0's PHY shows up as PHY 0.  So if there's only
-	 *   one physical port, there's no need to involve the
-	 *   switch framework - it can just show up as a default,
-	 *   normal single PHY.
-	 *
-	 * + CFG_SW_PHY_SWAP swaps the internal switch connection
-	 *   between PHY0 and PHY4.  Ie, PHY4 connects to MAc1,
-	 *   PHY0 connects to GE0.
-	 */
-	if ((resource_int_value("ar933x_gmac", 0, "override_phy", &val) == 0)
-	    && (val == 0))
-		return;
-	if ((resource_int_value("ar933x_gmac", 0, "swap_phy", &val) == 0)
-	    && (val == 1))
-		gmac_cfg |= AR933X_ETH_CFG_SW_PHY_SWAP;
-	if ((resource_int_value("ar933x_gmac", 0, "swap_phy_addr", &val) == 0)
-	    && (val == 1))
-		gmac_cfg |= AR933X_ETH_CFG_SW_PHY_ADDR_SWAP;
-	ar933x_configure_gmac(gmac_cfg);
-}
-
-struct ar71xx_cpu_def ar933x_chip_def = {
-	&ar933x_chip_detect_mem_size,
-	&ar933x_chip_detect_sys_frequency,
-	&ar933x_chip_device_stop,
-	&ar933x_chip_device_start,
-	&ar933x_chip_device_stopped,
-	&ar933x_chip_set_pll_ge,
-	&ar933x_chip_set_mii_speed,
-	&ar71xx_chip_set_mii_if,
-	&ar933x_chip_get_eth_pll,
-	&ar933x_chip_ddr_flush,
-	&ar933x_chip_init_usb_peripheral,
-	NULL,
-	NULL,
-	&ar933x_chip_init_gmac,
-};
diff --git a/sys/mips/atheros/ar933x_chip.h b/sys/mips/atheros/ar933x_chip.h
deleted file mode 100644
index 3b1545ab0e2d..000000000000
--- a/sys/mips/atheros/ar933x_chip.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR933X_CHIP_H__
-#define	__AR933X_CHIP_H__
-
-extern struct ar71xx_cpu_def ar933x_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar933x_uart.h b/sys/mips/atheros/ar933x_uart.h
deleted file mode 100644
index 7cdf0ebc75ea..000000000000
--- a/sys/mips/atheros/ar933x_uart.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- *  Atheros AR933x SoC UART registers
- */
-#ifndef	__AR933X_UART_H__
-#define	__AR933X_UART_H__
-
-#define	AR933X_UART_REGS_SIZE		20
-#define	AR933X_UART_FIFO_SIZE		16
-
-#define	AR933X_UART_DATA_REG		0x00
-#define	AR933X_UART_CS_REG		0x04
-#define	AR933X_UART_CLOCK_REG		0x08
-#define	AR933X_UART_INT_REG		0x0c
-#define	AR933X_UART_INT_EN_REG		0x10
-
-#define	AR933X_UART_DATA_TX_RX_MASK	0xff
-#define	AR933X_UART_DATA_RX_CSR		(1 << 8)
-#define	AR933X_UART_DATA_TX_CSR		(1 << 9)
-
-#define	AR933X_UART_CS_PARITY_S		0
-#define	AR933X_UART_CS_PARITY_M		0x3
-#define	  AR933X_UART_CS_PARITY_NONE	0
-#define	  AR933X_UART_CS_PARITY_ODD	1
-#define	  AR933X_UART_CS_PARITY_EVEN	2
-#define	AR933X_UART_CS_IF_MODE_S	2
-#define	AR933X_UART_CS_IF_MODE_M	0x3
-#define	  AR933X_UART_CS_IF_MODE_NONE	0
-#define	  AR933X_UART_CS_IF_MODE_DTE	1
-#define	  AR933X_UART_CS_IF_MODE_DCE	2
-#define	AR933X_UART_CS_FLOW_CTRL_S	4
-#define	AR933X_UART_CS_FLOW_CTRL_M	0x3
-#define	AR933X_UART_CS_DMA_EN		(1 << 6)
-#define	AR933X_UART_CS_TX_READY_ORIDE	(1 << 7)
-#define	AR933X_UART_CS_RX_READY_ORIDE	(1 << 8)
-#define	AR933X_UART_CS_TX_READY		(1 << 9)
-#define	AR933X_UART_CS_RX_BREAK		(1 << 10)
-#define	AR933X_UART_CS_TX_BREAK		(1 << 11)
-#define	AR933X_UART_CS_HOST_INT		(1 << 12)
-#define	AR933X_UART_CS_HOST_INT_EN	(1 << 13)
-#define	AR933X_UART_CS_TX_BUSY		(1 << 14)
-#define	AR933X_UART_CS_RX_BUSY		(1 << 15)
-
-#define	AR933X_UART_CLOCK_SCALE_M	0xff
-#define	AR933X_UART_CLOCK_SCALE_S	16
-#define	AR933X_UART_CLOCK_STEP_M	0xffff
-#define	AR933X_UART_CLOCK_STEP_S	0
-
-#define	AR933X_UART_MAX_SCALE		0xff
-#define	AR933X_UART_MAX_STEP		0xffff
-
-#define	AR933X_UART_INT_RX_VALID	(1 << 0)
-#define	AR933X_UART_INT_TX_READY	(1 << 1)
-#define	AR933X_UART_INT_RX_FRAMING_ERR	(1 << 2)
-#define	AR933X_UART_INT_RX_OFLOW_ERR	(1 << 3)
-#define	AR933X_UART_INT_TX_OFLOW_ERR	(1 << 4)
-#define	AR933X_UART_INT_RX_PARITY_ERR	(1 << 5)
-#define	AR933X_UART_INT_RX_BREAK_ON	(1 << 6)
-#define	AR933X_UART_INT_RX_BREAK_OFF	(1 << 7)
-#define	AR933X_UART_INT_RX_FULL		(1 << 8)
-#define	AR933X_UART_INT_TX_EMPTY	(1 << 9)
-#define	AR933X_UART_INT_ALLINTS		0x3ff
-
-#endif /* __AR933X_UART_H__ */
diff --git a/sys/mips/atheros/ar933xreg.h b/sys/mips/atheros/ar933xreg.h
deleted file mode 100644
index ffd778ab686d..000000000000
--- a/sys/mips/atheros/ar933xreg.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	__AR93XX_REG_H__
-#define	__AR93XX_REG_H__
-
-#define	REV_ID_MAJOR_AR9330		0x0110
-#define	REV_ID_MAJOR_AR9331		0x1110
-
-#define	AR933X_REV_ID_REVISION_MASK	0x3
-
-#define	AR933X_GPIO_COUNT		30
-
-#define	AR933X_UART_BASE	(AR71XX_APB_BASE + 0x00020000)
-#define	AR933X_UART_SIZE	0x14
-
-#define	AR933X_GMAC_BASE	(AR71XX_APB_BASE + 0x00070000)
-#define	AR933X_GMAC_SIZE	0x04
-
-#define	AR933X_GMAC_REG_ETH_CFG		(AR933X_GMAC_BASE + 0x00)
-
-#define	AR933X_ETH_CFG_RGMII_GE0	(1 << 0)
-#define	AR933X_ETH_CFG_MII_GE0		(1 << 1)
-#define	AR933X_ETH_CFG_GMII_GE0		(1 << 2)
-#define	AR933X_ETH_CFG_MII_GE0_MASTER	(1 << 3)
-#define	AR933X_ETH_CFG_MII_GE0_SLAVE	(1 << 4)
-#define	AR933X_ETH_CFG_MII_GE0_ERR_EN	(1 << 5)
-#define	AR933X_ETH_CFG_SW_PHY_SWAP	(1 << 7)
-#define	AR933X_ETH_CFG_SW_PHY_ADDR_SWAP	(1 << 8)
-#define	AR933X_ETH_CFG_RMII_GE0		(1 << 9)
-#define	AR933X_ETH_CFG_RMII_GE0_SPD_10		0
-#define	AR933X_ETH_CFG_RMII_GE0_SPD_100		(1 << 10)
-
-#define	AR933X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
-#define	AR933X_WMAC_SIZE	0x20000
-#define	AR933X_EHCI_BASE	0x1b000000
-#define	AR933X_EHCI_SIZE	0x1000
-
-#define	AR933X_DDR_REG_FLUSH_GE0	(AR71XX_APB_BASE + 0x7c)
-#define	AR933X_DDR_REG_FLUSH_GE1	(AR71XX_APB_BASE + 0x80)
-#define	AR933X_DDR_REG_FLUSH_USB	(AR71XX_APB_BASE + 0x84)
-#define	AR933X_DDR_REG_FLUSH_WMAC	(AR71XX_APB_BASE + 0x88)
-
-#define	AR933X_PLL_CPU_CONFIG_REG	(AR71XX_PLL_CPU_BASE + 0x00)
-#define	AR933X_PLL_CLOCK_CTRL_REG	(AR71XX_PLL_CPU_BASE + 0x08)
-
-#define	AR933X_PLL_CPU_CONFIG_NINT_SHIFT	10
-#define	AR933X_PLL_CPU_CONFIG_NINT_MASK		0x3f
-#define	AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT	16
-#define	AR933X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f
-#define	AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT	23
-#define	AR933X_PLL_CPU_CONFIG_OUTDIV_MASK	0x7
-
-#define	AR933X_PLL_CLOCK_CTRL_BYPASS		(1 << 2)
-#define	AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT	5
-#define	AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK	0x3
-#define	AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT	10
-#define	AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK	0x3
-#define	AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT	15
-#define	AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK	0x7
-
-#define	AR933X_RESET_REG_RESET_MODULE		(AR71XX_RST_BLOCK_BASE + 0x1c)
-#define	AR933X_RESET_REG_BOOTSTRAP		(AR71XX_RST_BLOCK_BASE + 0xac)
-#define	AR933X_RESET_WMAC			(1 << 11)
-#define	AR933X_RESET_USB_HOST			(1 << 5)
-#define	AR933X_RESET_USB_PHY			(1 << 4)
-#define	AR933X_RESET_USBSUS_OVERRIDE		(1 << 3)
-
-#define	AR933X_BOOTSTRAP_REF_CLK_40		(1 << 0)
-
-#define	AR933X_PLL_VAL_1000			0x00110000
-#define	AR933X_PLL_VAL_100			0x00001099
-#define	AR933X_PLL_VAL_10			0x00991099
-
-#endif	/* __AR93XX_REG_H__ */
diff --git a/sys/mips/atheros/ar934x_chip.c b/sys/mips/atheros/ar934x_chip.c
deleted file mode 100644
index 0bd0547ecaca..000000000000
--- a/sys/mips/atheros/ar934x_chip.c
+++ /dev/null
@@ -1,475 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar934xreg.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_setup.h>
-
-#include <mips/atheros/ar71xx_chip.h>
-#include <mips/atheros/ar934x_chip.h>
-
-static void
-ar934x_chip_detect_mem_size(void)
-{
-}
-
-static uint32_t
-ar934x_get_pll_freq(uint32_t ref, uint32_t ref_div, uint32_t nint,
-    uint32_t nfrac, uint32_t frac, uint32_t out_div)
-{
-	uint64_t t;
-	uint32_t ret;
-
-	t = u_ar71xx_refclk;
-	t *= nint;
-	t = t / ref_div;
-	ret = t;
-
-	t = u_ar71xx_refclk;
-	t *= nfrac;
-	t = t / (ref_div * frac);
-	ret += t;
-
-	ret /= (1 << out_div);
-	return (ret);
-}
-
-static void
-ar934x_chip_detect_sys_frequency(void)
-{
-	uint32_t pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;
-	uint32_t cpu_pll, ddr_pll;
-	uint32_t bootstrap;
-	uint32_t reg;
-
-	bootstrap = ATH_READ_REG(AR934X_RESET_REG_BOOTSTRAP);
-	if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40)
-		u_ar71xx_refclk = 40 * 1000 * 1000;
-	else
-		u_ar71xx_refclk = 25 * 1000 * 1000;
-
-	pll = ATH_READ_REG(AR934X_SRIF_CPU_DPLL2_REG);
-	if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
-		out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
-		    AR934X_SRIF_DPLL2_OUTDIV_MASK;
-		pll = ATH_READ_REG(AR934X_SRIF_CPU_DPLL1_REG);
-		nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
-		    AR934X_SRIF_DPLL1_NINT_MASK;
-		nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
-		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
-		    AR934X_SRIF_DPLL1_REFDIV_MASK;
-		frac = 1 << 18;
-	} else {
-		pll = ATH_READ_REG(AR934X_PLL_CPU_CONFIG_REG);
-		out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-			AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
-		ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-			  AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
-		nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
-		       AR934X_PLL_CPU_CONFIG_NINT_MASK;
-		nfrac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-			AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
-		frac = 1 << 6;
-	}
-
-	cpu_pll = ar934x_get_pll_freq(u_ar71xx_refclk, ref_div, nint,
-	    nfrac, frac, out_div);
-
-	pll = ATH_READ_REG(AR934X_SRIF_DDR_DPLL2_REG);
-	if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
-		out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
-		    AR934X_SRIF_DPLL2_OUTDIV_MASK;
-		pll = ATH_READ_REG(AR934X_SRIF_DDR_DPLL1_REG);
-		nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
-		    AR934X_SRIF_DPLL1_NINT_MASK;
-		nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
-		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
-		    AR934X_SRIF_DPLL1_REFDIV_MASK;
-		frac = 1 << 18;
-	} else {
-		pll = ATH_READ_REG(AR934X_PLL_DDR_CONFIG_REG);
-		out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-		    AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
-		ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-		    AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
-		nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
-		    AR934X_PLL_DDR_CONFIG_NINT_MASK;
-		nfrac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-		    AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
-		frac = 1 << 10;
-	}
-
-	ddr_pll = ar934x_get_pll_freq(u_ar71xx_refclk, ref_div, nint,
-	    nfrac, frac, out_div);
-
-	clk_ctrl = ATH_READ_REG(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
-
-	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &
-	    AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK;
-
-	if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS)
-	    u_ar71xx_cpu_freq = u_ar71xx_refclk;
-	else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL)
-		u_ar71xx_cpu_freq = cpu_pll / (postdiv + 1);
-	else
-		u_ar71xx_cpu_freq = ddr_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &
-	    AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK;
-
-	if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS)
-		u_ar71xx_ddr_freq = u_ar71xx_refclk;
-	else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL)
-		u_ar71xx_ddr_freq = ddr_pll / (postdiv + 1);
-	else
-		u_ar71xx_ddr_freq = cpu_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &
-		  AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK;
-
-	if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS)
-		u_ar71xx_ahb_freq = u_ar71xx_refclk;
-	else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL)
-		u_ar71xx_ahb_freq = ddr_pll / (postdiv + 1);
-	else
-		u_ar71xx_ahb_freq = cpu_pll / (postdiv + 1);
-
-	u_ar71xx_wdt_freq = u_ar71xx_refclk;
-	u_ar71xx_uart_freq = u_ar71xx_refclk;
-
-	/*
-	 * Next, fetch reference clock speed for MDIO bus.
-	 */
-	reg = ATH_READ_REG(AR934X_PLL_SWITCH_CLOCK_CONTROL_REG);
-	if (reg & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) {
-		printf("%s: mdio=100MHz\n", __func__);
-		u_ar71xx_mdio_freq = (100 * 1000 * 1000);
-	} else {
-		printf("%s: mdio=%d Hz\n", __func__, u_ar71xx_refclk);
-		u_ar71xx_mdio_freq = u_ar71xx_refclk;
-	}
-}
-
-static void
-ar934x_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR934X_RESET_REG_RESET_MODULE, reg | mask);
-}
-
-static void
-ar934x_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(AR934X_RESET_REG_RESET_MODULE, reg & ~mask);
-}
-
-static int
-ar934x_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-ar934x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-
-	/* XXX TODO */
-	return;
-}
-
-/*
- * XXX TODO !!
- */
-static void
-ar934x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-
-	switch (unit) {
-	case 0:
-		ATH_WRITE_REG(AR934X_PLL_ETH_XMII_CONTROL_REG, pll);
-		break;
-	case 1:
-		/* XXX nothing */
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-ar934x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE:
-		ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_PCIE);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_WMAC:
-		ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_WMAC);
-		break;
-	default:
-		printf("%s: invalid DDR flush id (%d)\n", __func__, id);
-		break;
-	}
-}
-
-static uint32_t
-ar934x_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch (speed) {
-	case 10:
-		pll = AR934X_PLL_VAL_10;
-		break;
-	case 100:
-		pll = AR934X_PLL_VAL_100;
-		break;
-	case 1000:
-		pll = AR934X_PLL_VAL_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-	return (pll);
-}
-
-static void
-ar934x_chip_reset_ethernet_switch(void)
-{
-
-	ar71xx_device_stop(AR934X_RESET_ETH_SWITCH);
-	DELAY(100);
-	ar71xx_device_start(AR934X_RESET_ETH_SWITCH);
-	DELAY(100);
-	ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG);
-	DELAY(100);
-	ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG);
-	DELAY(100);
-}
-
-static void
-ar934x_configure_gmac(uint32_t gmac_cfg)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR934X_GMAC_REG_ETH_CFG);
-	printf("%s: ETH_CFG=0x%08x\n", __func__, reg);
-
-	reg &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
-	    AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE |
-	    AR934X_ETH_CFG_SW_PHY_SWAP);
-
-	reg |= gmac_cfg;
-
-	ATH_WRITE_REG(AR934X_GMAC_REG_ETH_CFG, reg);
-}
-
-static void
-ar934x_chip_init_usb_peripheral(void)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(AR934X_RESET_REG_BOOTSTRAP);
-	if (reg & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
-		return;
-
-	ar71xx_device_stop(AR934X_RESET_USBSUS_OVERRIDE);
-	DELAY(100);
-
-	ar71xx_device_start(AR934X_RESET_USB_PHY);
-	DELAY(100);
-
-	ar71xx_device_start(AR934X_RESET_USB_PHY_ANALOG);
-	DELAY(100);
-
-	ar71xx_device_start(AR934X_RESET_USB_HOST);
-	DELAY(100);
-}
-
-static void
-ar934x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode)
-{
-
-	/*
-	 * XXX !
-	 *
-	 * Nothing to see here; although gmac0 can have its
-	 * MII configuration changed, the register values
-	 * are slightly different.
-	 */
-}
-
-/*
- * XXX TODO: fetch default MII divider configuration
- */
-
-static void
-ar934x_chip_reset_wmac(void)
-{
-
-	/* XXX TODO */
-}
-
-static void
-ar934x_chip_init_gmac(void)
-{
-	long gmac_cfg;
-
-	if (resource_long_value("ar934x_gmac", 0, "gmac_cfg",
-	    &gmac_cfg) == 0) {
-		printf("%s: gmac_cfg=0x%08lx\n",
-		    __func__,
-		    (long) gmac_cfg);
-		ar934x_configure_gmac((uint32_t) gmac_cfg);
-	}
-}
-
-/*
- * Reset the NAND Flash Controller.
- *
- * + active=1 means "make it active".
- * + active=0 means "make it inactive".
- */
-static void
-ar934x_chip_reset_nfc(int active)
-{
-
-	if (active) {
-		ar71xx_device_start(AR934X_RESET_NANDF);
-		DELAY(100);
-
-		ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG);
-		DELAY(250);
-	} else {
-		ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG);
-		DELAY(250);
-
-		ar71xx_device_stop(AR934X_RESET_NANDF);
-		DELAY(100);
-	}
-}
-
-/*
- * Configure the GPIO output mux setup.
- *
- * The AR934x introduced an output mux which allowed
- * certain functions to be configured on any pin.
- * Specifically, the switch PHY link LEDs and
- * WMAC external RX LNA switches are not limited to
- * a specific GPIO pin.
- */
-static void
-ar934x_chip_gpio_output_configure(int gpio, uint8_t func)
-{
-	uint32_t reg, s;
-	uint32_t t;
-
-	if (gpio > AR934X_GPIO_COUNT)
-		return;
-
-	reg = AR934X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4);
-	s = 8 * (gpio % 4);
-
-	/* read-modify-write */
-	t = ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-	t &= ~(0xff << s);
-	t |= func << s;
-	ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t);
-
-	/* flush write */
-	ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-}
-
-struct ar71xx_cpu_def ar934x_chip_def = {
-	&ar934x_chip_detect_mem_size,
-	&ar934x_chip_detect_sys_frequency,
-	&ar934x_chip_device_stop,
-	&ar934x_chip_device_start,
-	&ar934x_chip_device_stopped,
-	&ar934x_chip_set_pll_ge,
-	&ar934x_chip_set_mii_speed,
-	&ar934x_chip_set_mii_if,
-	&ar934x_chip_get_eth_pll,
-	&ar934x_chip_ddr_flush,
-	&ar934x_chip_init_usb_peripheral,
-	&ar934x_chip_reset_ethernet_switch,
-	&ar934x_chip_reset_wmac,
-	&ar934x_chip_init_gmac,
-	&ar934x_chip_reset_nfc,
-	&ar934x_chip_gpio_output_configure,
-};
diff --git a/sys/mips/atheros/ar934x_chip.h b/sys/mips/atheros/ar934x_chip.h
deleted file mode 100644
index 1f9a792a235d..000000000000
--- a/sys/mips/atheros/ar934x_chip.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__AR934X_CHIP_H__
-#define	__AR934X_CHIP_H__
-
-extern struct ar71xx_cpu_def ar934x_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/ar934x_nfcreg.h b/sys/mips/atheros/ar934x_nfcreg.h
deleted file mode 100644
index 12894327bb4d..000000000000
--- a/sys/mips/atheros/ar934x_nfcreg.h
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (c) 2014 Adrian Chadd <adrian@FreeBSD.org>.
- *  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-/*
- * Register definitions for the built-in NAND controller
- * of the Atheros AR934x and QCA955x SoCs.
- *
- * This file is based on the AR934x SoC driver from OpenWRT.
- *
- * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
- *
- * Used with permission.
- */
-#ifndef	__AR934X_NFCREG_H__
-#define	__AR934X_NFCREG_H__
-
-#define	BIT(x)		(1 << (x))
-
-#define AR934X_NFC_REG_CMD		0x00
-#define AR934X_NFC_REG_CTRL		0x04
-#define AR934X_NFC_REG_STATUS		0x08
-#define AR934X_NFC_REG_INT_MASK		0x0c
-#define AR934X_NFC_REG_INT_STATUS	0x10
-#define AR934X_NFC_REG_ECC_CTRL		0x14
-#define AR934X_NFC_REG_ECC_OFFSET	0x18
-#define AR934X_NFC_REG_ADDR0_0		0x1c
-#define AR934X_NFC_REG_ADDR0_1		0x24
-#define AR934X_NFC_REG_ADDR1_0		0x20
-#define AR934X_NFC_REG_ADDR1_1		0x28
-#define AR934X_NFC_REG_SPARE_SIZE	0x30
-#define AR934X_NFC_REG_PROTECT		0x38
-#define AR934X_NFC_REG_LOOKUP_EN	0x40
-#define AR934X_NFC_REG_LOOKUP(_x)	(0x44 + (_i) * 4)
-#define AR934X_NFC_REG_DMA_ADDR		0x64
-#define AR934X_NFC_REG_DMA_COUNT	0x68
-#define AR934X_NFC_REG_DMA_CTRL		0x6c
-#define AR934X_NFC_REG_MEM_CTRL		0x80
-#define AR934X_NFC_REG_DATA_SIZE	0x84
-#define AR934X_NFC_REG_READ_STATUS	0x88
-#define AR934X_NFC_REG_TIME_SEQ		0x8c
-#define AR934X_NFC_REG_TIMINGS_ASYN	0x90
-#define AR934X_NFC_REG_TIMINGS_SYN	0x94
-#define AR934X_NFC_REG_FIFO_DATA	0x98
-#define AR934X_NFC_REG_TIME_MODE	0x9c
-#define AR934X_NFC_REG_DMA_ADDR_OFFS	0xa0
-#define AR934X_NFC_REG_FIFO_INIT	0xb0
-#define AR934X_NFC_REG_GEN_SEQ_CTRL	0xb4
-
-#define AR934X_NFC_CMD_CMD_SEQ_S		0
-#define AR934X_NFC_CMD_CMD_SEQ_M		0x3f
-#define   AR934X_NFC_CMD_SEQ_1C			0x00
-#define   AR934X_NFC_CMD_SEQ_ERASE		0x0e
-#define   AR934X_NFC_CMD_SEQ_12			0x0c
-#define   AR934X_NFC_CMD_SEQ_1C1AXR		0x21
-#define   AR934X_NFC_CMD_SEQ_S			0x24
-#define   AR934X_NFC_CMD_SEQ_1C3AXR		0x27
-#define   AR934X_NFC_CMD_SEQ_1C5A1CXR		0x2a
-#define   AR934X_NFC_CMD_SEQ_18			0x32
-#define AR934X_NFC_CMD_INPUT_SEL_SIU		0
-#define AR934X_NFC_CMD_INPUT_SEL_DMA		BIT(6)
-#define AR934X_NFC_CMD_ADDR_SEL_0		0
-#define AR934X_NFC_CMD_ADDR_SEL_1		BIT(7)
-#define AR934X_NFC_CMD_CMD0_S			8
-#define AR934X_NFC_CMD_CMD0_M			0xff
-#define AR934X_NFC_CMD_CMD1_S			16
-#define AR934X_NFC_CMD_CMD1_M			0xff
-#define AR934X_NFC_CMD_CMD2_S			24
-#define AR934X_NFC_CMD_CMD2_M			0xff
-
-#define AR934X_NFC_CTRL_ADDR_CYCLE0_M		0x7
-#define AR934X_NFC_CTRL_ADDR_CYCLE0_S		0
-#define AR934X_NFC_CTRL_SPARE_EN		BIT(3)
-#define AR934X_NFC_CTRL_INT_EN			BIT(4)
-#define AR934X_NFC_CTRL_ECC_EN			BIT(5)
-#define AR934X_NFC_CTRL_BLOCK_SIZE_S		6
-#define AR934X_NFC_CTRL_BLOCK_SIZE_M		0x3
-#define   AR934X_NFC_CTRL_BLOCK_SIZE_32		0
-#define   AR934X_NFC_CTRL_BLOCK_SIZE_64		1
-#define   AR934X_NFC_CTRL_BLOCK_SIZE_128	2
-#define   AR934X_NFC_CTRL_BLOCK_SIZE_256	3
-#define AR934X_NFC_CTRL_PAGE_SIZE_S		8
-#define AR934X_NFC_CTRL_PAGE_SIZE_M		0x7
-#define   AR934X_NFC_CTRL_PAGE_SIZE_256		0
-#define   AR934X_NFC_CTRL_PAGE_SIZE_512		1
-#define   AR934X_NFC_CTRL_PAGE_SIZE_1024	2
-#define   AR934X_NFC_CTRL_PAGE_SIZE_2048	3
-#define   AR934X_NFC_CTRL_PAGE_SIZE_4096	4
-#define   AR934X_NFC_CTRL_PAGE_SIZE_8192	5
-#define   AR934X_NFC_CTRL_PAGE_SIZE_16384	6
-#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN		BIT(11)
-#define AR934X_NFC_CTRL_IO_WIDTH_8BITS		0
-#define AR934X_NFC_CTRL_IO_WIDTH_16BITS		BIT(12)
-#define AR934X_NFC_CTRL_LOOKUP_EN		BIT(13)
-#define AR934X_NFC_CTRL_PROT_EN			BIT(14)
-#define AR934X_NFC_CTRL_WORK_MODE_ASYNC		0
-#define AR934X_NFC_CTRL_WORK_MODE_SYNC		BIT(15)
-#define AR934X_NFC_CTRL_ADDR0_AUTO_INC		BIT(16)
-#define AR934X_NFC_CTRL_ADDR1_AUTO_INC		BIT(17)
-#define AR934X_NFC_CTRL_ADDR_CYCLE1_M		0x7
-#define AR934X_NFC_CTRL_ADDR_CYCLE1_S		18
-#define AR934X_NFC_CTRL_SMALL_PAGE		BIT(21)
-
-#define AR934X_NFC_DMA_CTRL_DMA_START		BIT(7)
-#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE	0
-#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ	BIT(6)
-#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG		BIT(5)
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_S		2
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_0		0
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_1		1
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_2		2
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_3		3
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_4		4
-#define AR934X_NFC_DMA_CTRL_DMA_BURST_5		5
-#define AR934X_NFC_DMA_CTRL_ERR_FLAG		BIT(1)
-#define AR934X_NFC_DMA_CTRL_DMA_READY		BIT(0)
-
-#define AR934X_NFC_INT_DEV_RDY(_x)		BIT(4 + (_x))
-#define AR934X_NFC_INT_CMD_END			BIT(1)
-
-#define AR934X_NFC_ECC_CTRL_ERR_THRES_S		8
-#define AR934X_NFC_ECC_CTRL_ERR_THRES_M		0x1f
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_S		5
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_M		0x7
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_2		0
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_4		1
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_6		2
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_8		3
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_10		4
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_12		5
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_14		6
-#define AR934X_NFC_ECC_CTRL_ECC_CAP_16		7
-#define AR934X_NFC_ECC_CTRL_ERR_OVER		BIT(2)
-#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT	BIT(1)
-#define AR934X_NFC_ECC_CTRL_ERR_CORRECT		BIT(0)
-
-#define AR934X_NFC_ECC_OFFS_OFSET_M		0xffff
-
-/* default timing values */
-#define AR934X_NFC_TIME_SEQ_DEFAULT	0x7fff
-#define AR934X_NFC_TIMINGS_ASYN_DEFAULT	0x22
-#define AR934X_NFC_TIMINGS_SYN_DEFAULT	0xf
-
-#define AR934X_NFC_ID_BUF_SIZE		8
-#define AR934X_NFC_DEV_READY_TIMEOUT	25 /* msecs */
-#define AR934X_NFC_DMA_READY_TIMEOUT	25 /* msecs */
-#define AR934X_NFC_DONE_TIMEOUT		1000
-#define AR934X_NFC_DMA_RETRIES		20
-
-#define AR934X_NFC_IRQ_MASK		AR934X_NFC_INT_DEV_RDY(0)
-
-#define  AR934X_NFC_GENSEQ_SMALL_PAGE_READ	0x30043
-
-#endif /* __AR934X_NFCREG_H__ */
diff --git a/sys/mips/atheros/ar934xreg.h b/sys/mips/atheros/ar934xreg.h
deleted file mode 100644
index e93d1f3ed4d0..000000000000
--- a/sys/mips/atheros/ar934xreg.h
+++ /dev/null
@@ -1,241 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	__AR934X_REG_H__
-#define	__AR934X_REG_H__
-
-#define	AR934X_GMAC_BASE	(AR71XX_APB_BASE + 0x00070000)
-#define	AR934X_GMAC_SIZE	0x14
-#define	AR934X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
-#define	AR934X_WMAC_SIZE	0x20000
-#define	AR934X_EHCI_BASE	0x1b000000
-#define	AR934X_EHCI_SIZE	0x200
-#define	AR934X_SRIF_BASE	(AR71XX_APB_BASE + 0x00116000)
-#define	AR934X_SRIF_SIZE	0x1000
-
-/* AR934x GMAC configuration */
-#define	AR934X_GMAC_REG_ETH_CFG		(AR934X_GMAC_BASE + 0x00)
-
-#define	AR934X_ETH_CFG_RGMII_GMAC0		(1 << 0)
-#define	AR934X_ETH_CFG_MII_GMAC0		(1 << 1)
-#define	AR934X_ETH_CFG_GMII_GMAC0		(1 << 2)
-#define	AR934X_ETH_CFG_MII_GMAC0_MASTER		(1 << 3)
-#define	AR934X_ETH_CFG_MII_GMAC0_SLAVE		(1 << 4)
-#define	AR934X_ETH_CFG_MII_GMAC0_ERR_EN		(1 << 5)
-#define	AR934X_ETH_CFG_SW_ONLY_MODE		(1 << 6)
-#define	AR934X_ETH_CFG_SW_PHY_SWAP		(1 << 7)
-#define	AR934X_ETH_CFG_SW_APB_ACCESS		(1 << 9)
-#define	AR934X_ETH_CFG_RMII_GMAC0		(1 << 10)
-#define	AR933X_ETH_CFG_MII_CNTL_SPEED		(1 << 11)
-#define	AR934X_ETH_CFG_RMII_GMAC0_MASTER	(1 << 12)
-#define	AR934X_ETH_CFG_SW_ACC_MSB_FIRST		(1 << 13)
-
-#define	AR934X_DDR_REG_FLUSH_GE0	(AR71XX_APB_BASE + 0x9c)
-#define	AR934X_DDR_REG_FLUSH_GE1	(AR71XX_APB_BASE + 0xa0)
-#define	AR934X_DDR_REG_FLUSH_USB	(AR71XX_APB_BASE + 0xa4)
-#define	AR934X_DDR_REG_FLUSH_PCIE	(AR71XX_APB_BASE + 0xa8)
-#define	AR934X_DDR_REG_FLUSH_WMAC	(AR71XX_APB_BASE + 0xac)
-
-#define	AR934X_PLL_CPU_CONFIG_REG	(AR71XX_PLL_CPU_BASE + 0x00)
-#define	AR934X_PLL_DDR_CONFIG_REG	(AR71XX_PLL_CPU_BASE + 0x04)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_REG	(AR71XX_PLL_CPU_BASE + 0x08)
-#define	AR934X_PLL_SWITCH_CLOCK_CONTROL_REG	(AR71XX_PLL_CPU_BASE + 0x24)
-#define		AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL   (1 << 6)
-#define	AR934X_PLL_ETH_XMII_CONTROL_REG	(AR71XX_PLL_CPU_BASE + 0x2c)
-
-#define	AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT	0
-#define	AR934X_PLL_CPU_CONFIG_NFRAC_MASK	0x3f
-#define	AR934X_PLL_CPU_CONFIG_NINT_SHIFT	6
-#define	AR934X_PLL_CPU_CONFIG_NINT_MASK		0x3f
-#define	AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT	12
-#define	AR934X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f
-#define	AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT	19
-#define	AR934X_PLL_CPU_CONFIG_OUTDIV_MASK	0x3
-
-#define	AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT	0
-#define	AR934X_PLL_DDR_CONFIG_NFRAC_MASK	0x3ff
-#define	AR934X_PLL_DDR_CONFIG_NINT_SHIFT	10
-#define	AR934X_PLL_DDR_CONFIG_NINT_MASK		0x3f
-#define	AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT	16
-#define	AR934X_PLL_DDR_CONFIG_REFDIV_MASK	0x1f
-#define	AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT	23
-#define	AR934X_PLL_DDR_CONFIG_OUTDIV_MASK	0x7
-
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS	(1 << 2)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS	(1 << 3)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS	(1 << 4)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT	5
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK	0x1f
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT	10
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK	0x1f
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT	15
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK	0x1f
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL	(1 << 20)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL	(1 << 21)
-#define	AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL	(1 << 24)
-
-#define	AR934X_RESET_REG_RESET_MODULE		(AR71XX_RST_BLOCK_BASE + 0x1c)
-#define	AR934X_RESET_REG_BOOTSTRAP		(AR71XX_RST_BLOCK_BASE + 0xb0)
-#define	AR934X_RESET_REG_PCIE_WMAC_INT_STATUS	(AR71XX_RST_BLOCK_BASE + 0xac)
-
-#define	AR934X_RESET_HOST		(1U << 31)
-#define	AR934X_RESET_SLIC		(1 << 30)
-#define	AR934X_RESET_HDMA		(1 << 29)
-#define	AR934X_RESET_EXTERNAL		(1 << 28)
-#define	AR934X_RESET_RTC		(1 << 27)
-#define	AR934X_RESET_PCIE_EP_INT	(1 << 26)
-#define	AR934X_RESET_CHKSUM_ACC		(1 << 25)
-#define	AR934X_RESET_FULL_CHIP		(1 << 24)
-#define	AR934X_RESET_GE1_MDIO		(1 << 23)
-#define	AR934X_RESET_GE0_MDIO		(1 << 22)
-#define	AR934X_RESET_CPU_NMI		(1 << 21)
-#define	AR934X_RESET_CPU_COLD		(1 << 20)
-#define	AR934X_RESET_HOST_RESET_INT	(1 << 19)
-#define	AR934X_RESET_PCIE_EP		(1 << 18)
-#define	AR934X_RESET_UART1		(1 << 17)
-#define	AR934X_RESET_DDR		(1 << 16)
-#define	AR934X_RESET_USB_PHY_PLL_PWD_EXT	(1 << 15)
-#define	AR934X_RESET_NANDF		(1 << 14)
-#define	AR934X_RESET_GE1_MAC		(1 << 13)
-#define	AR934X_RESET_ETH_SWITCH_ANALOG	(1 << 12)
-#define	AR934X_RESET_USB_PHY_ANALOG	(1 << 11)
-#define	AR934X_RESET_HOST_DMA_INT	(1 << 10)
-#define	AR934X_RESET_GE0_MAC		(1 << 9)
-#define	AR934X_RESET_ETH_SWITCH		(1 << 8)
-#define	AR934X_RESET_PCIE_PHY		(1 << 7)
-#define	AR934X_RESET_PCIE		(1 << 6)
-#define	AR934X_RESET_USB_HOST		(1 << 5)
-#define	AR934X_RESET_USB_PHY		(1 << 4)
-#define	AR934X_RESET_USBSUS_OVERRIDE	(1 << 3)
-#define	AR934X_RESET_LUT		(1 << 2)
-#define	AR934X_RESET_MBOX		(1 << 1)
-#define	AR934X_RESET_I2S		(1 << 0)
-
-#define	AR934X_BOOTSTRAP_SW_OPTION8	(1 << 23)
-#define	AR934X_BOOTSTRAP_SW_OPTION7	(1 << 22)
-#define	AR934X_BOOTSTRAP_SW_OPTION6	(1 << 21)
-#define	AR934X_BOOTSTRAP_SW_OPTION5	(1 << 20)
-#define	AR934X_BOOTSTRAP_SW_OPTION4	(1 << 19)
-#define	AR934X_BOOTSTRAP_SW_OPTION3	(1 << 18)
-#define	AR934X_BOOTSTRAP_SW_OPTION2	(1 << 17)
-#define	AR934X_BOOTSTRAP_SW_OPTION1	(1 << 16)
-#define	AR934X_BOOTSTRAP_USB_MODE_DEVICE	(1 << 7)
-#define	AR934X_BOOTSTRAP_PCIE_RC	(1 << 6)
-#define	AR934X_BOOTSTRAP_EJTAG_MODE	(1 << 5)
-#define	AR934X_BOOTSTRAP_REF_CLK_40	(1 << 4)
-#define	AR934X_BOOTSTRAP_BOOT_FROM_SPI	(1 << 2)
-#define	AR934X_BOOTSTRAP_SDRAM_DISABLED	(1 << 1)
-#define	AR934X_BOOTSTRAP_DDR1		(1 << 0)
-
-#define	AR934X_PCIE_WMAC_INT_WMAC_MISC	(1 << 0)
-#define	AR934X_PCIE_WMAC_INT_WMAC_TX	(1 << 1)
-#define	AR934X_PCIE_WMAC_INT_WMAC_RXLP	(1 << 2)
-#define	AR934X_PCIE_WMAC_INT_WMAC_RXHP	(1 << 3)
-#define	AR934X_PCIE_WMAC_INT_PCIE_RC	(1 << 4)
-#define	AR934X_PCIE_WMAC_INT_PCIE_RC0	(1 << 5)
-#define	AR934X_PCIE_WMAC_INT_PCIE_RC1	(1 << 6)
-#define	AR934X_PCIE_WMAC_INT_PCIE_RC2	(1 << 7)
-#define	AR934X_PCIE_WMAC_INT_PCIE_RC3	(1 << 8)
-#define	AR934X_PCIE_WMAC_INT_WMAC_ALL \
-        (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \
-         AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP)
-
-#define	AR934X_PCIE_WMAC_INT_PCIE_ALL \
-        (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \
-         AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
-         AR934X_PCIE_WMAC_INT_PCIE_RC3)
-
-#define	REV_ID_MAJOR_AR9341		0x0120
-#define	REV_ID_MAJOR_AR9342		0x1120
-#define	REV_ID_MAJOR_AR9344		0x2120
-
-#define	AR934X_REV_ID_REVISION_MASK     0xf
-
-/*
- * GPIO block
- */
-#define	AR934X_GPIO_REG_OUT_FUNC0	0x2c
-#define	AR934X_GPIO_REG_OUT_FUNC1	0x30
-#define	AR934X_GPIO_REG_OUT_FUNC2	0x34
-#define	AR934X_GPIO_REG_OUT_FUNC3	0x38
-#define	AR934X_GPIO_REG_OUT_FUNC4	0x3c
-#define	AR934X_GPIO_REG_OUT_FUNC5	0x40
-#define	AR934X_GPIO_REG_FUNC		0x6c
-#define	AR934X_GPIO_COUNT		23
-
-/* GPIO functions */
-#define	AR934X_GPIO_FUNC_CLK_OBS7_EN           (1 << 9)
-#define	AR934X_GPIO_FUNC_CLK_OBS6_EN           (1 << 8)
-#define	AR934X_GPIO_FUNC_CLK_OBS5_EN           (1 << 7)
-#define	AR934X_GPIO_FUNC_CLK_OBS4_EN           (1 << 6)
-#define	AR934X_GPIO_FUNC_CLK_OBS3_EN           (1 << 5)
-#define	AR934X_GPIO_FUNC_CLK_OBS2_EN           (1 << 4)
-#define	AR934X_GPIO_FUNC_CLK_OBS1_EN           (1 << 3)
-#define	AR934X_GPIO_FUNC_CLK_OBS0_EN           (1 << 2)
-#define	AR934X_GPIO_FUNC_JTAG_DISABLE          (1 << 1)
-
-/* GPIO MUX output function: AR934X_GPIO_REG_OUT_FUNCx */
-#define	AR934X_GPIO_OUT_GPIO		0	/* I'm a GPIO */
-#define	AR934X_GPIO_OUT_SPI_CS1		7	/* I'm SPI CS1 */
-#define	AR934X_GPIO_OUT_LED_LINK0	41	/* I'm switch phy link0 */
-#define	AR934X_GPIO_OUT_LED_LINK1	42
-#define	AR934X_GPIO_OUT_LED_LINK2	43
-#define	AR934X_GPIO_OUT_LED_LINK3	44
-#define	AR934X_GPIO_OUT_LED_LINK4	45
-#define	AR934X_GPIO_OUT_EXT_LNA0	46	/* I'm WMAC EXT LNA chain 0 */
-#define	AR934X_GPIO_OUT_EXT_LNA1	47	/* I'm WMAC EXT LNA chain 1 */
-
-/*
- * SRIF block
- */
-#define	AR934X_SRIF_CPU_DPLL1_REG	(AR934X_SRIF_BASE + 0x1c0)
-#define	AR934X_SRIF_CPU_DPLL2_REG	(AR934X_SRIF_BASE + 0x1c4)
-#define	AR934X_SRIF_CPU_DPLL3_REG	(AR934X_SRIF_BASE + 0x1c8)
-
-#define	AR934X_SRIF_DDR_DPLL1_REG	(AR934X_SRIF_BASE + 0x240)
-#define	AR934X_SRIF_DDR_DPLL2_REG	(AR934X_SRIF_BASE + 0x244)
-#define	AR934X_SRIF_DDR_DPLL3_REG	(AR934X_SRIF_BASE + 0x248)
-
-#define	AR934X_SRIF_DPLL1_REFDIV_SHIFT	27
-#define	AR934X_SRIF_DPLL1_REFDIV_MASK	0x1f
-#define	AR934X_SRIF_DPLL1_NINT_SHIFT	18
-#define	AR934X_SRIF_DPLL1_NINT_MASK	0x1ff
-#define	AR934X_SRIF_DPLL1_NFRAC_MASK	0x0003ffff
-
-#define	AR934X_SRIF_DPLL2_LOCAL_PLL	(1 << 30)
-#define	AR934X_SRIF_DPLL2_OUTDIV_SHIFT	13
-#define	AR934X_SRIF_DPLL2_OUTDIV_MASK	0x7
-
-/* XXX verify! */
-#define	AR934X_PLL_VAL_1000		0x16000000
-#define	AR934X_PLL_VAL_100		0x00000101
-#define	AR934X_PLL_VAL_10		0x00001616
-
-#endif	/* __AR934X_REG_H__ */
diff --git a/sys/mips/atheros/files.ar71xx b/sys/mips/atheros/files.ar71xx
deleted file mode 100644
index 87d5240627ef..000000000000
--- a/sys/mips/atheros/files.ar71xx
+++ /dev/null
@@ -1,35 +0,0 @@
-# $FreeBSD$
-
-mips/atheros/apb.c		optional ar71xx_apb
-mips/atheros/ar71xx_caldata.c	optional ar71xx_caldata
-mips/atheros/ar71xx_gpio.c	optional gpio
-mips/atheros/ar71xx_machdep.c	standard
-mips/atheros/ar71xx_ehci.c	optional ehci
-mips/atheros/ar71xx_ohci.c	optional ohci
-mips/atheros/ar71xx_pci.c	optional ar71xx_pci pci
-mips/atheros/ar724x_pci.c	optional ar724x_pci pci
-mips/atheros/ar71xx_pci_bus_space.c	optional pci
-mips/atheros/ar71xx_spi.c	optional ar71xx_spi
-mips/atheros/ar71xx_macaddr.c	standard
-mips/atheros/pcf2123_rtc.c	optional pcf2123_rtc ar71xx_spi
-mips/atheros/ar71xx_wdog.c	optional ar71xx_wdog
-mips/atheros/if_arge.c		optional arge
-mips/atheros/uart_bus_ar71xx.c	optional uart_ar71xx
-mips/atheros/uart_cpu_ar71xx.c	optional uart_ar71xx
-mips/atheros/uart_bus_ar933x.c	optional uart_ar933x
-mips/atheros/uart_cpu_ar933x.c	optional uart_ar933x
-mips/atheros/uart_dev_ar933x.c	optional uart_ar933x
-mips/atheros/ar71xx_bus_space_reversed.c	standard
-mips/mips/intr_machdep.c        standard
-mips/mips/tick.c		standard
-mips/atheros/ar71xx_setup.c	standard
-mips/atheros/ar71xx_chip.c	standard
-mips/atheros/ar724x_chip.c	standard
-mips/atheros/ar91xx_chip.c	standard
-mips/atheros/ar933x_chip.c	standard
-mips/atheros/ar934x_chip.c	standard
-mips/atheros/qca953x_chip.c	standard
-mips/atheros/qca955x_chip.c	standard
-mips/atheros/ar71xx_fixup.c	optional ar71xx_ath_eeprom
-mips/atheros/qca955x_apb.c	optional qca955x_apb
-mips/atheros/qca955x_pci.c	optional qca955x_pci pci
diff --git a/sys/mips/atheros/if_arge.c b/sys/mips/atheros/if_arge.c
deleted file mode 100644
index df7f80135c12..000000000000
--- a/sys/mips/atheros/if_arge.c
+++ /dev/null
@@ -1,2796 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * AR71XX gigabit ethernet driver
- */
-#ifdef HAVE_KERNEL_OPTION_HEADERS
-#include "opt_device_polling.h"
-#endif
-
-#include "opt_arge.h"
-
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/lock.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/socket.h>
-#include <sys/taskqueue.h>
-#include <sys/sysctl.h>
-
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_media.h>
-#include <net/ethernet.h>
-#include <net/if_types.h>
-
-#include <net/bpf.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-#include <machine/resource.h>
-#include <vm/vm_param.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-
-#include "opt_arge.h"
-
-#if defined(ARGE_MDIO)
-#include <dev/mdio/mdio.h>
-#include <dev/etherswitch/miiproxy.h>
-#include "mdio_if.h"
-#endif
-
-MODULE_DEPEND(arge, ether, 1, 1, 1);
-MODULE_DEPEND(arge, miibus, 1, 1, 1);
-MODULE_VERSION(arge, 1);
-
-#include "miibus_if.h"
-
-#include <net/ethernet.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar934xreg.h>	/* XXX tsk! */
-#include <mips/atheros/qca953xreg.h>	/* XXX tsk! */
-#include <mips/atheros/qca955xreg.h>	/* XXX tsk! */
-#include <mips/atheros/if_argevar.h>
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_macaddr.h>
-
-typedef enum {
-	ARGE_DBG_MII 	=	0x00000001,
-	ARGE_DBG_INTR	=	0x00000002,
-	ARGE_DBG_TX	=	0x00000004,
-	ARGE_DBG_RX	=	0x00000008,
-	ARGE_DBG_ERR	=	0x00000010,
-	ARGE_DBG_RESET	=	0x00000020,
-	ARGE_DBG_PLL	=	0x00000040,
-	ARGE_DBG_ANY	=	0xffffffff,
-} arge_debug_flags;
-
-static const char * arge_miicfg_str[] = {
-	"NONE",
-	"GMII",
-	"MII",
-	"RGMII",
-	"RMII",
-	"SGMII"
-};
-
-#ifdef ARGE_DEBUG
-#define	ARGEDEBUG(_sc, _m, ...) 					\
-	do {								\
-		if (((_m) & (_sc)->arge_debug) || ((_m) == ARGE_DBG_ANY)) \
-			device_printf((_sc)->arge_dev, __VA_ARGS__);	\
-	} while (0)
-#else
-#define	ARGEDEBUG(_sc, _m, ...)
-#endif
-
-static int arge_attach(device_t);
-static int arge_detach(device_t);
-static void arge_flush_ddr(struct arge_softc *);
-static int arge_ifmedia_upd(struct ifnet *);
-static void arge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
-static int arge_ioctl(struct ifnet *, u_long, caddr_t);
-static void arge_init(void *);
-static void arge_init_locked(struct arge_softc *);
-static void arge_link_task(void *, int);
-static void arge_update_link_locked(struct arge_softc *sc);
-static void arge_set_pll(struct arge_softc *, int, int);
-static int arge_miibus_readreg(device_t, int, int);
-static void arge_miibus_statchg(device_t);
-static int arge_miibus_writereg(device_t, int, int, int);
-static int arge_probe(device_t);
-static void arge_reset_dma(struct arge_softc *);
-static int arge_resume(device_t);
-static int arge_rx_ring_init(struct arge_softc *);
-static void arge_rx_ring_free(struct arge_softc *sc);
-static int arge_tx_ring_init(struct arge_softc *);
-static void arge_tx_ring_free(struct arge_softc *);
-#ifdef DEVICE_POLLING
-static int arge_poll(struct ifnet *, enum poll_cmd, int);
-#endif
-static int arge_shutdown(device_t);
-static void arge_start(struct ifnet *);
-static void arge_start_locked(struct ifnet *);
-static void arge_stop(struct arge_softc *);
-static int arge_suspend(device_t);
-
-static int arge_rx_locked(struct arge_softc *);
-static void arge_tx_locked(struct arge_softc *);
-static void arge_intr(void *);
-static int arge_intr_filter(void *);
-static void arge_tick(void *);
-
-static void arge_hinted_child(device_t bus, const char *dname, int dunit);
-
-/*
- * ifmedia callbacks for multiPHY MAC
- */
-void arge_multiphy_mediastatus(struct ifnet *, struct ifmediareq *);
-int arge_multiphy_mediachange(struct ifnet *);
-
-static void arge_dmamap_cb(void *, bus_dma_segment_t *, int, int);
-static int arge_dma_alloc(struct arge_softc *);
-static void arge_dma_free(struct arge_softc *);
-static int arge_newbuf(struct arge_softc *, int);
-static __inline void arge_fixup_rx(struct mbuf *);
-
-static device_method_t arge_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		arge_probe),
-	DEVMETHOD(device_attach,	arge_attach),
-	DEVMETHOD(device_detach,	arge_detach),
-	DEVMETHOD(device_suspend,	arge_suspend),
-	DEVMETHOD(device_resume,	arge_resume),
-	DEVMETHOD(device_shutdown,	arge_shutdown),
-
-	/* MII interface */
-	DEVMETHOD(miibus_readreg,	arge_miibus_readreg),
-	DEVMETHOD(miibus_writereg,	arge_miibus_writereg),
-	DEVMETHOD(miibus_statchg,	arge_miibus_statchg),
-
-	/* bus interface */
-	DEVMETHOD(bus_add_child,	device_add_child_ordered),
-	DEVMETHOD(bus_hinted_child,	arge_hinted_child),
-
-	DEVMETHOD_END
-};
-
-static driver_t arge_driver = {
-	"arge",
-	arge_methods,
-	sizeof(struct arge_softc)
-};
-
-static devclass_t arge_devclass;
-
-DRIVER_MODULE(arge, nexus, arge_driver, arge_devclass, 0, 0);
-DRIVER_MODULE(miibus, arge, miibus_driver, miibus_devclass, 0, 0);
-
-#if defined(ARGE_MDIO)
-static int argemdio_probe(device_t);
-static int argemdio_attach(device_t);
-static int argemdio_detach(device_t);
-
-/*
- * Declare an additional, separate driver for accessing the MDIO bus.
- */
-static device_method_t argemdio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		argemdio_probe),
-	DEVMETHOD(device_attach,	argemdio_attach),
-	DEVMETHOD(device_detach,	argemdio_detach),
-
-	/* bus interface */
-	DEVMETHOD(bus_add_child,	device_add_child_ordered),
-
-	/* MDIO access */
-	DEVMETHOD(mdio_readreg,		arge_miibus_readreg),
-	DEVMETHOD(mdio_writereg,	arge_miibus_writereg),
-};
-
-DEFINE_CLASS_0(argemdio, argemdio_driver, argemdio_methods,
-    sizeof(struct arge_softc));
-static devclass_t argemdio_devclass;
-
-DRIVER_MODULE(miiproxy, arge, miiproxy_driver, miiproxy_devclass, 0, 0);
-DRIVER_MODULE(argemdio, nexus, argemdio_driver, argemdio_devclass, 0, 0);
-DRIVER_MODULE(mdio, argemdio, mdio_driver, mdio_devclass, 0, 0);
-#endif
-
-static struct mtx miibus_mtx;
-
-MTX_SYSINIT(miibus_mtx, &miibus_mtx, "arge mii lock", MTX_DEF);
-
-/*
- * Flushes all
- *
- * XXX this needs to be done at interrupt time! Grr!
- */
-static void
-arge_flush_ddr(struct arge_softc *sc)
-{
-	switch (sc->arge_mac_unit) {
-	case 0:
-		ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE0);
-		break;
-	case 1:
-		ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE1);
-		break;
-	default:
-		device_printf(sc->arge_dev, "%s: unknown unit (%d)\n",
-		    __func__,
-		    sc->arge_mac_unit);
-		break;
-	}
-}
-
-static int
-arge_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Atheros AR71xx built-in ethernet interface");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-#ifdef	ARGE_DEBUG
-static void
-arge_attach_intr_sysctl(device_t dev, struct sysctl_oid_list *parent)
-{
-	struct arge_softc *sc = device_get_softc(dev);
-	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
-	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
-	char sn[8];
-	int i;
-
-	tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "intr",
-	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Interrupt statistics");
-	child = SYSCTL_CHILDREN(tree);
-	for (i = 0; i < 32; i++) {
-		snprintf(sn, sizeof(sn), "%d", i);
-		SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD,
-		    &sc->intr_stats.count[i], 0, "");
-	}
-}
-#endif
-
-static void
-arge_attach_sysctl(device_t dev)
-{
-	struct arge_softc *sc = device_get_softc(dev);
-	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
-	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-
-#ifdef	ARGE_DEBUG
-	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"debug", CTLFLAG_RW, &sc->arge_debug, 0,
-		"arge interface debugging flags");
-	arge_attach_intr_sysctl(dev, SYSCTL_CHILDREN(tree));
-#endif
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_aligned", CTLFLAG_RW, &sc->stats.tx_pkts_aligned, 0,
-		"number of TX aligned packets");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_unaligned", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned,
-		0, "number of TX unaligned packets");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_unaligned_start", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned_start,
-		0, "number of TX unaligned packets (start)");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_unaligned_len", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned_len,
-		0, "number of TX unaligned packets (len)");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_unaligned_tooshort", CTLFLAG_RW,
-		&sc->stats.tx_pkts_unaligned_tooshort,
-		0, "number of TX unaligned packets (mbuf length < 4 bytes)");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_pkts_nosegs", CTLFLAG_RW, &sc->stats.tx_pkts_nosegs,
-		0, "number of TX packets fail with no ring slots avail");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"intr_stray_filter", CTLFLAG_RW, &sc->stats.intr_stray,
-		0, "number of stray interrupts (filter)");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"intr_stray_intr", CTLFLAG_RW, &sc->stats.intr_stray2,
-		0, "number of stray interrupts (intr)");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"intr_ok", CTLFLAG_RW, &sc->stats.intr_ok,
-		0, "number of OK interrupts");
-
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"tx_underflow", CTLFLAG_RW, &sc->stats.tx_underflow,
-		0, "Number of TX underflows");
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"rx_overflow", CTLFLAG_RW, &sc->stats.rx_overflow,
-		0, "Number of RX overflows");
-#ifdef	ARGE_DEBUG
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_prod",
-	    CTLFLAG_RW, &sc->arge_cdata.arge_tx_prod, 0, "");
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_cons",
-	    CTLFLAG_RW, &sc->arge_cdata.arge_tx_cons, 0, "");
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_cnt",
-	    CTLFLAG_RW, &sc->arge_cdata.arge_tx_cnt, 0, "");
-#endif
-}
-
-static void
-arge_reset_mac(struct arge_softc *sc)
-{
-	uint32_t reg;
-	uint32_t reset_reg;
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s called\n", __func__);
-
-	/* Step 1. Soft-reset MAC */
-	ARGE_SET_BITS(sc, AR71XX_MAC_CFG1, MAC_CFG1_SOFT_RESET);
-	DELAY(20);
-
-	/* Step 2. Punt the MAC core from the central reset register */
-	/*
-	 * XXX TODO: migrate this (and other) chip specific stuff into
-	 * a chipdef method.
-	 */
-	if (sc->arge_mac_unit == 0) {
-		reset_reg = RST_RESET_GE0_MAC;
-	} else {
-		reset_reg = RST_RESET_GE1_MAC;
-	}
-
-	/*
-	 * AR934x (and later) also needs the MDIO block reset.
-	 * XXX should methodize this!
-	 */
-	if (ar71xx_soc == AR71XX_SOC_AR9341 ||
-	   ar71xx_soc == AR71XX_SOC_AR9342 ||
-	   ar71xx_soc == AR71XX_SOC_AR9344) {
-		if (sc->arge_mac_unit == 0) {
-			reset_reg |= AR934X_RESET_GE0_MDIO;
-		} else {
-			reset_reg |= AR934X_RESET_GE1_MDIO;
-		}
-	}
-
-	if (ar71xx_soc == AR71XX_SOC_QCA9556 ||
-	   ar71xx_soc == AR71XX_SOC_QCA9558) {
-		if (sc->arge_mac_unit == 0) {
-			reset_reg |= QCA955X_RESET_GE0_MDIO;
-		} else {
-			reset_reg |= QCA955X_RESET_GE1_MDIO;
-		}
-	}
-
-	if (ar71xx_soc == AR71XX_SOC_QCA9533 ||
-	   ar71xx_soc == AR71XX_SOC_QCA9533_V2) {
-		if (sc->arge_mac_unit == 0) {
-			reset_reg |= QCA953X_RESET_GE0_MDIO;
-		} else {
-			reset_reg |= QCA953X_RESET_GE1_MDIO;
-		}
-	}
-
-	ar71xx_device_stop(reset_reg);
-	DELAY(100);
-	ar71xx_device_start(reset_reg);
-
-	/* Step 3. Reconfigure MAC block */
-	ARGE_WRITE(sc, AR71XX_MAC_CFG1,
-		MAC_CFG1_SYNC_RX | MAC_CFG1_RX_ENABLE |
-		MAC_CFG1_SYNC_TX | MAC_CFG1_TX_ENABLE);
-
-	reg = ARGE_READ(sc, AR71XX_MAC_CFG2);
-	reg |= MAC_CFG2_ENABLE_PADCRC | MAC_CFG2_LENGTH_FIELD ;
-	ARGE_WRITE(sc, AR71XX_MAC_CFG2, reg);
-
-	ARGE_WRITE(sc, AR71XX_MAC_MAX_FRAME_LEN, 1536);
-}
-
-/*
- * These values map to the divisor values programmed into
- * AR71XX_MAC_MII_CFG.
- *
- * The index of each value corresponds to the divisor section
- * value in AR71XX_MAC_MII_CFG (ie, table[0] means '0' in
- * AR71XX_MAC_MII_CFG, table[1] means '1', etc.)
- */
-static const uint32_t ar71xx_mdio_div_table[] = {
-	4, 4, 6, 8, 10, 14, 20, 28,
-};
-
-static const uint32_t ar7240_mdio_div_table[] = {
-	2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96,
-};
-
-static const uint32_t ar933x_mdio_div_table[] = {
-	4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98,
-};
-
-/*
- * Lookup the divisor to use based on the given frequency.
- *
- * Returns the divisor to use, or -ve on error.
- */
-static int
-arge_mdio_get_divider(struct arge_softc *sc, unsigned long mdio_clock)
-{
-	unsigned long ref_clock, t;
-	const uint32_t *table;
-	int ndivs;
-	int i;
-
-	/*
-	 * This is the base MDIO frequency on the SoC.
-	 * The dividers .. well, divide. Duh.
-	 */
-	ref_clock = ar71xx_mdio_freq();
-
-	/*
-	 * If either clock is undefined, just tell the
-	 * caller to fall through to the defaults.
-	 */
-	if (ref_clock == 0 || mdio_clock == 0)
-		return (-EINVAL);
-
-	/*
-	 * Pick the correct table!
-	 */
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR9330:
-	case AR71XX_SOC_AR9331:
-	case AR71XX_SOC_AR9341:
-	case AR71XX_SOC_AR9342:
-	case AR71XX_SOC_AR9344:
-	case AR71XX_SOC_QCA9533:
-	case AR71XX_SOC_QCA9533_V2:
-	case AR71XX_SOC_QCA9556:
-	case AR71XX_SOC_QCA9558:
-		table = ar933x_mdio_div_table;
-		ndivs = nitems(ar933x_mdio_div_table);
-		break;
-
-	case AR71XX_SOC_AR7240:
-	case AR71XX_SOC_AR7241:
-	case AR71XX_SOC_AR7242:
-		table = ar7240_mdio_div_table;
-		ndivs = nitems(ar7240_mdio_div_table);
-		break;
-
-	default:
-		table = ar71xx_mdio_div_table;
-		ndivs = nitems(ar71xx_mdio_div_table);
-	}
-
-	/*
-	 * Now, walk through the list and find the first divisor
-	 * that falls under the target MDIO frequency.
-	 *
-	 * The divisors go up, but the corresponding frequencies
-	 * are actually decreasing.
-	 */
-	for (i = 0; i < ndivs; i++) {
-		t = ref_clock / table[i];
-		if (t <= mdio_clock) {
-			return (i);
-		}
-	}
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET,
-	    "No divider found; MDIO=%lu Hz; target=%lu Hz\n",
-		ref_clock, mdio_clock);
-	return (-ENOENT);
-}
-
-/*
- * Fetch the MDIO bus clock rate.
- *
- * For now, the default is DIV_28 for everything
- * bar AR934x, which will be DIV_58.
- *
- * It will definitely need updating to take into account
- * the MDIO bus core clock rate and the target clock
- * rate for the chip.
- */
-static uint32_t
-arge_fetch_mdiobus_clock_rate(struct arge_softc *sc)
-{
-	int mdio_freq, div;
-
-	/*
-	 * Is the MDIO frequency defined? If so, find a divisor that
-	 * makes reasonable sense.  Don't overshoot the frequency.
-	 */
-	if (resource_int_value(device_get_name(sc->arge_dev),
-	    device_get_unit(sc->arge_dev),
-	    "mdio_freq",
-	    &mdio_freq) == 0) {
-		sc->arge_mdiofreq = mdio_freq;
-		div = arge_mdio_get_divider(sc, sc->arge_mdiofreq);
-		if (bootverbose)
-			device_printf(sc->arge_dev,
-			    "%s: mdio ref freq=%llu Hz, target freq=%llu Hz,"
-			    " divisor index=%d\n",
-			    __func__,
-			    (unsigned long long) ar71xx_mdio_freq(),
-			    (unsigned long long) mdio_freq,
-			    div);
-		if (div >= 0)
-			return (div);
-	}
-
-	/*
-	 * Default value(s).
-	 *
-	 * XXX obviously these need .. fixing.
-	 *
-	 * From Linux/OpenWRT:
-	 *
-	 * + 7240? DIV_6
-	 * + Builtin-switch port and not 934x? DIV_10
-	 * + Not built-in switch port and 934x? DIV_58
-	 * + .. else DIV_28.
-	 */
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR9341:
-	case AR71XX_SOC_AR9342:
-	case AR71XX_SOC_AR9344:
-	case AR71XX_SOC_QCA9533:
-	case AR71XX_SOC_QCA9533_V2:
-	case AR71XX_SOC_QCA9556:
-	case AR71XX_SOC_QCA9558:
-		return (MAC_MII_CFG_CLOCK_DIV_58);
-		break;
-	default:
-		return (MAC_MII_CFG_CLOCK_DIV_28);
-	}
-}
-
-static void
-arge_reset_miibus(struct arge_softc *sc)
-{
-	uint32_t mdio_div;
-
-	mdio_div = arge_fetch_mdiobus_clock_rate(sc);
-
-	/*
-	 * XXX AR934x and later; should we be also resetting the
-	 * MDIO block(s) using the reset register block?
-	 */
-
-	/* Reset MII bus; program in the default divisor */
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET | mdio_div);
-	DELAY(100);
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, mdio_div);
-	DELAY(100);
-}
-
-static void
-arge_fetch_pll_config(struct arge_softc *sc)
-{
-	long int val;
-
-	if (resource_long_value(device_get_name(sc->arge_dev),
-	    device_get_unit(sc->arge_dev),
-	    "pll_10", &val) == 0) {
-		sc->arge_pllcfg.pll_10 = val;
-		device_printf(sc->arge_dev, "%s: pll_10 = 0x%x\n",
-		    __func__, (int) val);
-	}
-	if (resource_long_value(device_get_name(sc->arge_dev),
-	    device_get_unit(sc->arge_dev),
-	    "pll_100", &val) == 0) {
-		sc->arge_pllcfg.pll_100 = val;
-		device_printf(sc->arge_dev, "%s: pll_100 = 0x%x\n",
-		    __func__, (int) val);
-	}
-	if (resource_long_value(device_get_name(sc->arge_dev),
-	    device_get_unit(sc->arge_dev),
-	    "pll_1000", &val) == 0) {
-		sc->arge_pllcfg.pll_1000 = val;
-		device_printf(sc->arge_dev, "%s: pll_1000 = 0x%x\n",
-		    __func__, (int) val);
-	}
-}
-
-static int
-arge_attach(device_t dev)
-{
-	struct ifnet		*ifp;
-	struct arge_softc	*sc;
-	int			error = 0, rid, i;
-	uint32_t		hint;
-	long			eeprom_mac_addr = 0;
-	int			miicfg = 0;
-	int			readascii = 0;
-	int			local_mac = 0;
-	uint8_t			local_macaddr[ETHER_ADDR_LEN];
-	char *			local_macstr;
-	char			devid_str[32];
-	int			count;
-
-	sc = device_get_softc(dev);
-	sc->arge_dev = dev;
-	sc->arge_mac_unit = device_get_unit(dev);
-
-	/*
-	 * See if there's a "board" MAC address hint available for
-	 * this particular device.
-	 *
-	 * This is in the environment - it'd be nice to use the resource_*()
-	 * routines, but at the moment the system is booting, the resource hints
-	 * are set to the 'static' map so they're not pulling from kenv.
-	 */
-	snprintf(devid_str, 32, "hint.%s.%d.macaddr",
-	    device_get_name(dev),
-	    device_get_unit(dev));
-	if ((local_macstr = kern_getenv(devid_str)) != NULL) {
-		uint32_t tmpmac[ETHER_ADDR_LEN];
-
-		/* Have a MAC address; should use it */
-		device_printf(dev, "Overriding MAC address from environment: '%s'\n",
-		    local_macstr);
-
-		/* Extract out the MAC address */
-		/* XXX this should all be a generic method */
-		count = sscanf(local_macstr, "%x%*c%x%*c%x%*c%x%*c%x%*c%x",
-		    &tmpmac[0], &tmpmac[1],
-		    &tmpmac[2], &tmpmac[3],
-		    &tmpmac[4], &tmpmac[5]);
-		if (count == 6) {
-			/* Valid! */
-			local_mac = 1;
-			for (i = 0; i < ETHER_ADDR_LEN; i++)
-				local_macaddr[i] = tmpmac[i];
-		}
-		/* Done! */
-		freeenv(local_macstr);
-		local_macstr = NULL;
-	}
-
-	/*
-	 * Hardware workarounds.
-	 */
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR9330:
-	case AR71XX_SOC_AR9331:
-	case AR71XX_SOC_AR9341:
-	case AR71XX_SOC_AR9342:
-	case AR71XX_SOC_AR9344:
-	case AR71XX_SOC_QCA9533:
-	case AR71XX_SOC_QCA9533_V2:
-	case AR71XX_SOC_QCA9556:
-	case AR71XX_SOC_QCA9558:
-		/* Arbitrary alignment */
-		sc->arge_hw_flags |= ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE;
-		sc->arge_hw_flags |= ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE;
-		break;
-	default:
-		sc->arge_hw_flags |= ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE;
-		sc->arge_hw_flags |= ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE;
-		break;
-	}
-
-	/*
-	 * Some units (eg the TP-Link WR-1043ND) do not have a convenient
-	 * EEPROM location to read the ethernet MAC address from.
-	 * OpenWRT simply snaffles it from a fixed location.
-	 *
-	 * Since multiple units seem to use this feature, include
-	 * a method of setting the MAC address based on an flash location
-	 * in CPU address space.
-	 *
-	 * Some vendors have decided to store the mac address as a literal
-	 * string of 18 characters in xx:xx:xx:xx:xx:xx format instead of
-	 * an array of numbers.  Expose a hint to turn on this conversion
-	 * feature via strtol()
-	 */
-	 if (local_mac == 0 && resource_long_value(device_get_name(dev),
-	     device_get_unit(dev), "eeprommac", &eeprom_mac_addr) == 0) {
-		local_mac = 1;
-		int i;
-		const char *mac =
-		    (const char *) MIPS_PHYS_TO_KSEG1(eeprom_mac_addr);
-		device_printf(dev, "Overriding MAC from EEPROM\n");
-		if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-			"readascii", &readascii) == 0) {
-			device_printf(dev, "Vendor stores MAC in ASCII format\n");
-			for (i = 0; i < 6; i++) {
-				local_macaddr[i] = strtol(&(mac[i*3]), NULL, 16);
-			}
-		} else {
-			for (i = 0; i < 6; i++) {
-				local_macaddr[i] = mac[i];
-			}
-		}
-	}
-
-	KASSERT(((sc->arge_mac_unit == 0) || (sc->arge_mac_unit == 1)),
-	    ("if_arge: Only MAC0 and MAC1 supported"));
-
-	/*
-	 * Fetch the PLL configuration.
-	 */
-	arge_fetch_pll_config(sc);
-
-	/*
-	 * Get the MII configuration, if applicable.
-	 */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "miimode", &miicfg) == 0) {
-		/* XXX bounds check? */
-		device_printf(dev, "%s: overriding MII mode to '%s'\n",
-		    __func__, arge_miicfg_str[miicfg]);
-		sc->arge_miicfg = miicfg;
-	}
-
-	/*
-	 *  Get which PHY of 5 available we should use for this unit
-	 */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev), 
-	    "phymask", &sc->arge_phymask) != 0) {
-		/*
-		 * Use port 4 (WAN) for GE0. For any other port use
-		 * its PHY the same as its unit number
-		 */
-		if (sc->arge_mac_unit == 0)
-			sc->arge_phymask = (1 << 4);
-		else
-			/* Use all phys up to 4 */
-			sc->arge_phymask = (1 << 4) - 1;
-
-		device_printf(dev, "No PHY specified, using mask %d\n", sc->arge_phymask);
-	}
-
-	/*
-	 * Get default/hard-coded media & duplex mode.
-	 */
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "media", &hint) != 0)
-		hint = 0;
-
-	if (hint == 1000)
-		sc->arge_media_type = IFM_1000_T;
-	else if (hint == 100)
-		sc->arge_media_type = IFM_100_TX;
-	else if (hint == 10)
-		sc->arge_media_type = IFM_10_T;
-	else
-		sc->arge_media_type = 0;
-
-	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
-	    "fduplex", &hint) != 0)
-		hint = 1;
-
-	if (hint)
-		sc->arge_duplex_mode = IFM_FDX;
-	else
-		sc->arge_duplex_mode = 0;
-
-	mtx_init(&sc->arge_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
-	    MTX_DEF);
-	callout_init_mtx(&sc->arge_stat_callout, &sc->arge_mtx, 0);
-	TASK_INIT(&sc->arge_link_task, 0, arge_link_task, sc);
-
-	/* Map control/status registers. */
-	sc->arge_rid = 0;
-	sc->arge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 
-	    &sc->arge_rid, RF_ACTIVE | RF_SHAREABLE);
-
-	if (sc->arge_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	/* Allocate interrupts */
-	rid = 0;
-	sc->arge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE);
-
-	if (sc->arge_irq == NULL) {
-		device_printf(dev, "couldn't map interrupt\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	/* Allocate ifnet structure. */
-	ifp = sc->arge_ifp = if_alloc(IFT_ETHER);
-
-	if (ifp == NULL) {
-		device_printf(dev, "couldn't allocate ifnet structure\n");
-		error = ENOSPC;
-		goto fail;
-	}
-
-	ifp->if_softc = sc;
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	ifp->if_ioctl = arge_ioctl;
-	ifp->if_start = arge_start;
-	ifp->if_init = arge_init;
-	sc->arge_if_flags = ifp->if_flags;
-
-	/* XXX: add real size */
-	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
-	ifp->if_snd.ifq_maxlen = ifqmaxlen;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	/* Tell the upper layer(s) we support long frames. */
-	ifp->if_capabilities |= IFCAP_VLAN_MTU;
-
-	ifp->if_capenable = ifp->if_capabilities;
-#ifdef DEVICE_POLLING
-	ifp->if_capabilities |= IFCAP_POLLING;
-#endif
-
-	/* If there's a local mac defined, copy that in */
-	if (local_mac == 1) {
-		(void) ar71xx_mac_addr_init(sc->arge_eaddr,
-		    local_macaddr, 0, 0);
-	} else {
-		/*
-		 * No MAC address configured. Generate the random one.
-		 */
-		if  (bootverbose)
-			device_printf(dev,
-			    "Generating random ethernet address.\n");
-		if (ar71xx_mac_addr_random_init(ifp, (void *) sc->arge_eaddr) < 0) {
-			device_printf(dev, "Failed to choose random MAC address\n");
-			error = EINVAL;
-			goto fail;
-		}
-	}
-
-	if (arge_dma_alloc(sc) != 0) {
-		error = ENXIO;
-		goto fail;
-	}
-
-	/*
-	 * Don't do this for the MDIO bus case - it's already done
-	 * as part of the MDIO bus attachment.
-	 *
-	 * XXX TODO: if we don't do this, we don't ever release the MAC
-	 * from reset and we can't use the port.  Now, if we define ARGE_MDIO
-	 * but we /don't/ define two MDIO busses, then we can't actually
-	 * use both MACs.
-	 */
-#if !defined(ARGE_MDIO)
-	/* Initialize the MAC block */
-	arge_reset_mac(sc);
-	arge_reset_miibus(sc);
-#endif
-
-	/* Configure MII mode, just for convienence */
-	if (sc->arge_miicfg != 0)
-		ar71xx_device_set_mii_if(sc->arge_mac_unit, sc->arge_miicfg);
-
-	/*
-	 * Set all Ethernet address registers to the same initial values
-	 * set all four addresses to 66-88-aa-cc-dd-ee
-	 */
-	ARGE_WRITE(sc, AR71XX_MAC_STA_ADDR1, (sc->arge_eaddr[2] << 24)
-	    | (sc->arge_eaddr[3] << 16) | (sc->arge_eaddr[4] << 8)
-	    | sc->arge_eaddr[5]);
-	ARGE_WRITE(sc, AR71XX_MAC_STA_ADDR2, (sc->arge_eaddr[0] << 8)
-	    | sc->arge_eaddr[1]);
-
-	ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG0,
-	    FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT);
-
-	/*
-	 * SoC specific bits.
-	 */
-	switch (ar71xx_soc) {
-		case AR71XX_SOC_AR7240:
-		case AR71XX_SOC_AR7241:
-		case AR71XX_SOC_AR7242:
-		case AR71XX_SOC_AR9330:
-		case AR71XX_SOC_AR9331:
-		case AR71XX_SOC_AR9341:
-		case AR71XX_SOC_AR9342:
-		case AR71XX_SOC_AR9344:
-		case AR71XX_SOC_QCA9533:
-		case AR71XX_SOC_QCA9533_V2:
-		case AR71XX_SOC_QCA9556:
-		case AR71XX_SOC_QCA9558:
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x015500aa);
-			break;
-		/* AR71xx, AR913x */
-		default:
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0fff0000);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x00001fff);
-	}
-
-	ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMATCH,
-	    FIFO_RX_FILTMATCH_DEFAULT);
-
-	ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK,
-	    FIFO_RX_FILTMASK_DEFAULT);
-
-#if defined(ARGE_MDIO)
-	sc->arge_miiproxy = mii_attach_proxy(sc->arge_dev);
-#endif
-
-	device_printf(sc->arge_dev, "finishing attachment, phymask %04x"
-	    ", proxy %s \n", sc->arge_phymask, sc->arge_miiproxy == NULL ?
-	    "null" : "set");
-	for (i = 0; i < ARGE_NPHY; i++) {
-		if (((1 << i) & sc->arge_phymask) != 0) {
-			error = mii_attach(sc->arge_miiproxy != NULL ?
-			    sc->arge_miiproxy : sc->arge_dev,
-			    &sc->arge_miibus, sc->arge_ifp,
-			    arge_ifmedia_upd, arge_ifmedia_sts,
-			    BMSR_DEFCAPMASK, i, MII_OFFSET_ANY, 0);
-			if (error != 0) {
-				device_printf(sc->arge_dev, "unable to attach"
-				    " PHY %d: %d\n", i, error);
-				goto fail;
-			}
-		}
-	}
-
-	if (sc->arge_miibus == NULL) {
-		/* no PHY, so use hard-coded values */
-		ifmedia_init(&sc->arge_ifmedia, 0,
-		    arge_multiphy_mediachange,
-		    arge_multiphy_mediastatus);
-		ifmedia_add(&sc->arge_ifmedia,
-		    IFM_ETHER | sc->arge_media_type  | sc->arge_duplex_mode,
-		    0, NULL);
-		ifmedia_set(&sc->arge_ifmedia,
-		    IFM_ETHER | sc->arge_media_type  | sc->arge_duplex_mode);
-		arge_set_pll(sc, sc->arge_media_type, sc->arge_duplex_mode);
-	}
-
-	/* Call MI attach routine. */
-	ether_ifattach(sc->arge_ifp, sc->arge_eaddr);
-
-	/* Hook interrupt last to avoid having to lock softc */
-	error = bus_setup_intr(sc->arge_dev, sc->arge_irq, INTR_TYPE_NET | INTR_MPSAFE,
-	    arge_intr_filter, arge_intr, sc, &sc->arge_intrhand);
-
-	if (error) {
-		device_printf(sc->arge_dev, "couldn't set up irq\n");
-		ether_ifdetach(sc->arge_ifp);
-		goto fail;
-	}
-
-	/* setup sysctl variables */
-	arge_attach_sysctl(sc->arge_dev);
-
-fail:
-	if (error) 
-		arge_detach(dev);
-
-	return (error);
-}
-
-static int
-arge_detach(device_t dev)
-{
-	struct arge_softc	*sc = device_get_softc(dev);
-	struct ifnet		*ifp = sc->arge_ifp;
-
-	KASSERT(mtx_initialized(&sc->arge_mtx),
-	    ("arge mutex not initialized"));
-
-	/* These should only be active if attach succeeded */
-	if (device_is_attached(dev)) {
-		ARGE_LOCK(sc);
-		sc->arge_detach = 1;
-#ifdef DEVICE_POLLING
-		if (ifp->if_capenable & IFCAP_POLLING)
-			ether_poll_deregister(ifp);
-#endif
-
-		arge_stop(sc);
-		ARGE_UNLOCK(sc);
-		taskqueue_drain(taskqueue_swi, &sc->arge_link_task);
-		ether_ifdetach(ifp);
-	}
-
-	if (sc->arge_miibus)
-		device_delete_child(dev, sc->arge_miibus);
-
-	if (sc->arge_miiproxy)
-		device_delete_child(dev, sc->arge_miiproxy);
-
-	bus_generic_detach(dev);
-
-	if (sc->arge_intrhand)
-		bus_teardown_intr(dev, sc->arge_irq, sc->arge_intrhand);
-
-	if (sc->arge_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->arge_rid,
-		    sc->arge_res);
-
-	if (ifp)
-		if_free(ifp);
-
-	arge_dma_free(sc);
-
-	mtx_destroy(&sc->arge_mtx);
-
-	return (0);
-
-}
-
-static int
-arge_suspend(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-arge_resume(device_t dev)
-{
-
-	panic("%s", __func__);
-	return 0;
-}
-
-static int
-arge_shutdown(device_t dev)
-{
-	struct arge_softc	*sc;
-
-	sc = device_get_softc(dev);
-
-	ARGE_LOCK(sc);
-	arge_stop(sc);
-	ARGE_UNLOCK(sc);
-
-	return (0);
-}
-
-static void
-arge_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	BUS_ADD_CHILD(bus, 0, dname, dunit);
-	device_printf(bus, "hinted child %s%d\n", dname, dunit);
-}
-
-static int
-arge_mdio_busy(struct arge_softc *sc)
-{
-	int i,result;
-
-	for (i = 0; i < ARGE_MII_TIMEOUT; i++) {
-		DELAY(5);
-		ARGE_MDIO_BARRIER_READ(sc);
-		result = ARGE_MDIO_READ(sc, AR71XX_MAC_MII_INDICATOR);
-		if (! result)
-			return (0);
-		DELAY(5);
-	}
-	return (-1);
-}
-
-static int
-arge_miibus_readreg(device_t dev, int phy, int reg)
-{
-	struct arge_softc * sc = device_get_softc(dev);
-	int result;
-	uint32_t addr = (phy << MAC_MII_PHY_ADDR_SHIFT)
-	    | (reg & MAC_MII_REG_MASK);
-
-	mtx_lock(&miibus_mtx);
-	ARGE_MDIO_BARRIER_RW(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
-	ARGE_MDIO_BARRIER_WRITE(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
-	ARGE_MDIO_BARRIER_WRITE(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_READ);
-
-	if (arge_mdio_busy(sc) != 0) {
-		mtx_unlock(&miibus_mtx);
-		ARGEDEBUG(sc, ARGE_DBG_ANY, "%s timedout\n", __func__);
-		/* XXX: return ERRNO istead? */
-		return (-1);
-	}
-
-	ARGE_MDIO_BARRIER_READ(sc);
-	result = ARGE_MDIO_READ(sc, AR71XX_MAC_MII_STATUS) & MAC_MII_STATUS_MASK;
-	ARGE_MDIO_BARRIER_RW(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
-	mtx_unlock(&miibus_mtx);
-
-	ARGEDEBUG(sc, ARGE_DBG_MII,
-	    "%s: phy=%d, reg=%02x, value[%08x]=%04x\n",
-	    __func__, phy, reg, addr, result);
-
-	return (result);
-}
-
-static int
-arge_miibus_writereg(device_t dev, int phy, int reg, int data)
-{
-	struct arge_softc * sc = device_get_softc(dev);
-	uint32_t addr =
-	    (phy << MAC_MII_PHY_ADDR_SHIFT) | (reg & MAC_MII_REG_MASK);
-
-	ARGEDEBUG(sc, ARGE_DBG_MII, "%s: phy=%d, reg=%02x, value=%04x\n", __func__, 
-	    phy, reg, data);
-
-	mtx_lock(&miibus_mtx);
-	ARGE_MDIO_BARRIER_RW(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
-	ARGE_MDIO_BARRIER_WRITE(sc);
-	ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CONTROL, data);
-	ARGE_MDIO_BARRIER_WRITE(sc);
-
-	if (arge_mdio_busy(sc) != 0) {
-		mtx_unlock(&miibus_mtx);
-		ARGEDEBUG(sc, ARGE_DBG_ANY, "%s timedout\n", __func__);
-		/* XXX: return ERRNO istead? */
-		return (-1);
-	}
-
-	mtx_unlock(&miibus_mtx);
-	return (0);
-}
-
-static void
-arge_miibus_statchg(device_t dev)
-{
-	struct arge_softc	*sc;
-
-	sc = device_get_softc(dev);
-	taskqueue_enqueue(taskqueue_swi, &sc->arge_link_task);
-}
-
-static void
-arge_link_task(void *arg, int pending)
-{
-	struct arge_softc	*sc;
-	sc = (struct arge_softc *)arg;
-
-	ARGE_LOCK(sc);
-	arge_update_link_locked(sc);
-	ARGE_UNLOCK(sc);
-}
-
-static void
-arge_update_link_locked(struct arge_softc *sc)
-{
-	struct mii_data		*mii;
-	struct ifnet		*ifp;
-	uint32_t		media, duplex;
-
-	mii = device_get_softc(sc->arge_miibus);
-	ifp = sc->arge_ifp;
-	if (mii == NULL || ifp == NULL ||
-	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
-		return;
-	}
-
-	/*
-	 * If we have a static media type configured, then
-	 * use that.  Some PHY configurations (eg QCA955x -> AR8327)
-	 * use a static speed/duplex between the SoC and switch,
-	 * even though the front-facing PHY speed changes.
-	 */
-	if (sc->arge_media_type != 0) {
-		ARGEDEBUG(sc, ARGE_DBG_MII, "%s: fixed; media=%d, duplex=%d\n",
-		    __func__,
-		    sc->arge_media_type,
-		    sc->arge_duplex_mode);
-		if (mii->mii_media_status & IFM_ACTIVE) {
-			sc->arge_link_status = 1;
-		} else {
-			sc->arge_link_status = 0;
-		}
-		arge_set_pll(sc, sc->arge_media_type, sc->arge_duplex_mode);
-	}
-
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		media = IFM_SUBTYPE(mii->mii_media_active);
-		if (media != IFM_NONE) {
-			sc->arge_link_status = 1;
-			duplex = mii->mii_media_active & IFM_GMASK;
-			ARGEDEBUG(sc, ARGE_DBG_MII, "%s: media=%d, duplex=%d\n",
-			    __func__,
-			    media,
-			    duplex);
-			arge_set_pll(sc, media, duplex);
-		}
-	} else {
-		sc->arge_link_status = 0;
-	}
-}
-
-static void
-arge_set_pll(struct arge_softc *sc, int media, int duplex)
-{
-	uint32_t		cfg, ifcontrol, rx_filtmask;
-	uint32_t		fifo_tx, pll;
-	int if_speed;
-
-	/*
-	 * XXX Verify - is this valid for all chips?
-	 * QCA955x (and likely some of the earlier chips!) define
-	 * this as nibble mode and byte mode, and those have to do
-	 * with the interface type (MII/SMII versus GMII/RGMII.)
-	 */
-	ARGEDEBUG(sc, ARGE_DBG_PLL, "set_pll(%04x, %s)\n", media,
-	    duplex == IFM_FDX ? "full" : "half");
-	cfg = ARGE_READ(sc, AR71XX_MAC_CFG2);
-	cfg &= ~(MAC_CFG2_IFACE_MODE_1000
-	    | MAC_CFG2_IFACE_MODE_10_100
-	    | MAC_CFG2_FULL_DUPLEX);
-
-	if (duplex == IFM_FDX)
-		cfg |= MAC_CFG2_FULL_DUPLEX;
-
-	ifcontrol = ARGE_READ(sc, AR71XX_MAC_IFCONTROL);
-	ifcontrol &= ~MAC_IFCONTROL_SPEED;
-	rx_filtmask =
-	    ARGE_READ(sc, AR71XX_MAC_FIFO_RX_FILTMASK);
-	rx_filtmask &= ~FIFO_RX_MASK_BYTE_MODE;
-
-	switch(media) {
-	case IFM_10_T:
-		cfg |= MAC_CFG2_IFACE_MODE_10_100;
-		if_speed = 10;
-		break;
-	case IFM_100_TX:
-		cfg |= MAC_CFG2_IFACE_MODE_10_100;
-		ifcontrol |= MAC_IFCONTROL_SPEED;
-		if_speed = 100;
-		break;
-	case IFM_1000_T:
-	case IFM_1000_SX:
-		cfg |= MAC_CFG2_IFACE_MODE_1000;
-		rx_filtmask |= FIFO_RX_MASK_BYTE_MODE;
-		if_speed = 1000;
-		break;
-	default:
-		if_speed = 100;
-		device_printf(sc->arge_dev,
-		    "Unknown media %d\n", media);
-	}
-
-	ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: if_speed=%d\n", __func__, if_speed);
-
-	switch (ar71xx_soc) {
-		case AR71XX_SOC_AR7240:
-		case AR71XX_SOC_AR7241:
-		case AR71XX_SOC_AR7242:
-		case AR71XX_SOC_AR9330:
-		case AR71XX_SOC_AR9331:
-		case AR71XX_SOC_AR9341:
-		case AR71XX_SOC_AR9342:
-		case AR71XX_SOC_AR9344:
-		case AR71XX_SOC_QCA9533:
-		case AR71XX_SOC_QCA9533_V2:
-		case AR71XX_SOC_QCA9556:
-		case AR71XX_SOC_QCA9558:
-			fifo_tx = 0x01f00140;
-			break;
-		case AR71XX_SOC_AR9130:
-		case AR71XX_SOC_AR9132:
-			fifo_tx = 0x00780fff;
-			break;
-		/* AR71xx */
-		default:
-			fifo_tx = 0x008001ff;
-	}
-
-	ARGE_WRITE(sc, AR71XX_MAC_CFG2, cfg);
-	ARGE_WRITE(sc, AR71XX_MAC_IFCONTROL, ifcontrol);
-	ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK,
-	    rx_filtmask);
-	ARGE_WRITE(sc, AR71XX_MAC_FIFO_TX_THRESHOLD, fifo_tx);
-
-	/* fetch PLL registers */
-	pll = ar71xx_device_get_eth_pll(sc->arge_mac_unit, if_speed);
-	ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: pll=0x%x\n", __func__, pll);
-
-	/* Override if required by platform data */
-	if (if_speed == 10 && sc->arge_pllcfg.pll_10 != 0)
-		pll = sc->arge_pllcfg.pll_10;
-	else if (if_speed == 100 && sc->arge_pllcfg.pll_100 != 0)
-		pll = sc->arge_pllcfg.pll_100;
-	else if (if_speed == 1000 && sc->arge_pllcfg.pll_1000 != 0)
-		pll = sc->arge_pllcfg.pll_1000;
-	ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: final pll=0x%x\n", __func__, pll);
-
-	/* XXX ensure pll != 0 */
-	ar71xx_device_set_pll_ge(sc->arge_mac_unit, if_speed, pll);
-
-	/* set MII registers */
-	/*
-	 * This was introduced to match what the Linux ag71xx ethernet
-	 * driver does.  For the AR71xx case, it does set the port
-	 * MII speed.  However, if this is done, non-gigabit speeds
-	 * are not at all reliable when speaking via RGMII through
-	 * 'bridge' PHY port that's pretending to be a local PHY.
-	 *
-	 * Until that gets root caused, and until an AR71xx + normal
-	 * PHY board is tested, leave this disabled.
-	 */
-#if 0
-	ar71xx_device_set_mii_speed(sc->arge_mac_unit, if_speed);
-#endif
-}
-
-static void
-arge_reset_dma(struct arge_softc *sc)
-{
-	uint32_t val;
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: called\n", __func__);
-
-	ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, 0);
-	ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, 0);
-
-	/* Give hardware a chance to finish */
-	DELAY(1000);
-
-	ARGE_WRITE(sc, AR71XX_DMA_RX_DESC, 0);
-	ARGE_WRITE(sc, AR71XX_DMA_TX_DESC, 0);
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: RX_STATUS=%08x, TX_STATUS=%08x\n",
-	    __func__,
-	    ARGE_READ(sc, AR71XX_DMA_RX_STATUS),
-	    ARGE_READ(sc, AR71XX_DMA_TX_STATUS));
-
-	/* Clear all possible RX interrupts */
-	while(ARGE_READ(sc, AR71XX_DMA_RX_STATUS) & DMA_RX_STATUS_PKT_RECVD)
-		ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_PKT_RECVD);
-
-	/*
-	 * Clear all possible TX interrupts
-	 */
-	while(ARGE_READ(sc, AR71XX_DMA_TX_STATUS) & DMA_TX_STATUS_PKT_SENT)
-		ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_PKT_SENT);
-
-	/*
-	 * Now Rx/Tx errors
-	 */
-	ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS,
-	    DMA_RX_STATUS_BUS_ERROR | DMA_RX_STATUS_OVERFLOW);
-	ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS,
-	    DMA_TX_STATUS_BUS_ERROR | DMA_TX_STATUS_UNDERRUN);
-
-	/*
-	 * Force a DDR flush so any pending data is properly
-	 * flushed to RAM before underlying buffers are freed.
-	 */
-	arge_flush_ddr(sc);
-
-	/* Check if we cleared RX status */
-	val = ARGE_READ(sc, AR71XX_DMA_RX_STATUS);
-	if (val != 0) {
-		device_printf(sc->arge_dev,
-		    "%s: unable to clear DMA_RX_STATUS: %08x\n",
-		    __func__, val);
-	}
-
-	/* Check if we cleared TX status */
-	val = ARGE_READ(sc, AR71XX_DMA_TX_STATUS);
-	/* Mask out reserved bits */
-	val = val & 0x00ffffff;
-	if (val != 0) {
-		device_printf(sc->arge_dev,
-		    "%s: unable to clear DMA_TX_STATUS: %08x\n",
-		    __func__, val);
-	}
-}
-
-static void
-arge_init(void *xsc)
-{
-	struct arge_softc	 *sc = xsc;
-
-	ARGE_LOCK(sc);
-	arge_init_locked(sc);
-	ARGE_UNLOCK(sc);
-}
-
-static void
-arge_init_locked(struct arge_softc *sc)
-{
-	struct ifnet		*ifp = sc->arge_ifp;
-	struct mii_data		*mii;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: called\n", __func__);
-
-	if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
-		return;
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: init'ing\n", __func__);
-
-	/* Init circular RX list. */
-	if (arge_rx_ring_init(sc) != 0) {
-		device_printf(sc->arge_dev,
-		    "initialization failed: no memory for rx buffers\n");
-		arge_stop(sc);
-		return;
-	}
-
-	/* Init tx descriptors. */
-	arge_tx_ring_init(sc);
-
-	/* Restart DMA */
-	arge_reset_dma(sc);
-
-	if (sc->arge_miibus) {
-		mii = device_get_softc(sc->arge_miibus);
-		mii_mediachg(mii);
-	}
-	else {
-		/*
-		 * Sun always shines over multiPHY interface
-		 */
-		sc->arge_link_status = 1;
-	}
-
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-	if (sc->arge_miibus) {
-		callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
-		arge_update_link_locked(sc);
-	}
-
-	ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: desc ring; TX=0x%x, RX=0x%x\n",
-	    __func__,
-	    ARGE_TX_RING_ADDR(sc, 0),
-	    ARGE_RX_RING_ADDR(sc, 0));
-
-	ARGE_WRITE(sc, AR71XX_DMA_TX_DESC, ARGE_TX_RING_ADDR(sc, 0));
-	ARGE_WRITE(sc, AR71XX_DMA_RX_DESC, ARGE_RX_RING_ADDR(sc, 0));
-
-	/* Start listening */
-	ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, DMA_RX_CONTROL_EN);
-
-	/* Enable interrupts */
-	ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL);
-}
-
-/*
- * Return whether the mbuf chain is correctly aligned
- * for the arge TX engine.
- *
- * All the MACs have a length requirement: any non-final
- * fragment (ie, descriptor with MORE bit set) needs to have
- * a length divisible by 4.
- *
- * The AR71xx, AR913x require the start address also be
- * DWORD aligned.  The later MACs don't.
- */
-static int
-arge_mbuf_chain_is_tx_aligned(struct arge_softc *sc, struct mbuf *m0)
-{
-	struct mbuf *m;
-
-	for (m = m0; m != NULL; m = m->m_next) {
-		/*
-		 * Only do this for chips that require it.
-		 */
-		if ((sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE) &&
-		    (mtod(m, intptr_t) & 3) != 0) {
-			sc->stats.tx_pkts_unaligned_start++;
-			return 0;
-		}
-
-		/*
-		 * All chips have this requirement for length.
-		 */
-		if ((m->m_next != NULL) && ((m->m_len & 0x03) != 0)) {
-			sc->stats.tx_pkts_unaligned_len++;
-			return 0;
-		}
-
-		/*
-		 * All chips have this requirement for length being greater
-		 * than 4.
-		 */
-		if ((m->m_next != NULL) && ((m->m_len < 4))) {
-			sc->stats.tx_pkts_unaligned_tooshort++;
-			return 0;
-		}
-	}
-	return 1;
-}
-
-/*
- * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
- * pointers to the fragment pointers.
- */
-static int
-arge_encap(struct arge_softc *sc, struct mbuf **m_head)
-{
-	struct arge_txdesc	*txd;
-	struct arge_desc	*desc, *prev_desc;
-	bus_dma_segment_t	txsegs[ARGE_MAXFRAGS];
-	int			error, i, nsegs, prod, prev_prod;
-	struct mbuf		*m;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	/*
-	 * Fix mbuf chain based on hardware alignment constraints.
-	 */
-	m = *m_head;
-	if (! arge_mbuf_chain_is_tx_aligned(sc, m)) {
-		sc->stats.tx_pkts_unaligned++;
-		m = m_defrag(*m_head, M_NOWAIT);
-		if (m == NULL) {
-			m_freem(*m_head);
-			*m_head = NULL;
-			return (ENOBUFS);
-		}
-		*m_head = m;
-	} else
-		sc->stats.tx_pkts_aligned++;
-
-	prod = sc->arge_cdata.arge_tx_prod;
-	txd = &sc->arge_cdata.arge_txdesc[prod];
-	error = bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_tx_tag,
-	    txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
-
-	if (error == EFBIG) {
-		panic("EFBIG");
-	} else if (error != 0)
-		return (error);
-
-	if (nsegs == 0) {
-		m_freem(*m_head);
-		*m_head = NULL;
-		return (EIO);
-	}
-
-	/* Check number of available descriptors. */
-	if (sc->arge_cdata.arge_tx_cnt + nsegs >= (ARGE_TX_RING_COUNT - 2)) {
-		bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap);
-		sc->stats.tx_pkts_nosegs++;
-		return (ENOBUFS);
-	}
-
-	txd->tx_m = *m_head;
-	bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap,
-	    BUS_DMASYNC_PREWRITE);
-
-	/*
-	 * Make a list of descriptors for this packet. DMA controller will
-	 * walk through it while arge_link is not zero.
-	 *
-	 * Since we're in a endless circular buffer, ensure that
-	 * the first descriptor in a multi-descriptor ring is always
-	 * set to EMPTY, then un-do it when we're done populating.
-	 */
-	prev_prod = prod;
-	desc = prev_desc = NULL;
-	for (i = 0; i < nsegs; i++) {
-		uint32_t tmp;
-
-		desc = &sc->arge_rdata.arge_tx_ring[prod];
-
-		/*
-		 * Set DESC_EMPTY so the hardware (hopefully) stops at this
-		 * point.  We don't want it to start transmitting descriptors
-		 * before we've finished fleshing this out.
-		 */
-		tmp = ARGE_DMASIZE(txsegs[i].ds_len);
-		if (i == 0)
-			tmp |= ARGE_DESC_EMPTY;
-		desc->packet_ctrl = tmp;
-
-		ARGEDEBUG(sc, ARGE_DBG_TX, " [%d / %d] addr=0x%x, len=%d\n",
-		    i,
-		    prod,
-		    (uint32_t) txsegs[i].ds_addr, (int) txsegs[i].ds_len);
-
-		/* XXX Note: only relevant for older MACs; but check length! */
-		if ((sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE) &&
-		    (txsegs[i].ds_addr & 3))
-			panic("TX packet address unaligned\n");
-
-		desc->packet_addr = txsegs[i].ds_addr;
-
-		/* link with previous descriptor */
-		if (prev_desc)
-			prev_desc->packet_ctrl |= ARGE_DESC_MORE;
-
-		sc->arge_cdata.arge_tx_cnt++;
-		prev_desc = desc;
-		ARGE_INC(prod, ARGE_TX_RING_COUNT);
-	}
-
-	/* Update producer index. */
-	sc->arge_cdata.arge_tx_prod = prod;
-
-	/*
-	 * The descriptors are updated, so enable the first one.
-	 */
-	desc = &sc->arge_rdata.arge_tx_ring[prev_prod];
-	desc->packet_ctrl &= ~ ARGE_DESC_EMPTY;
-
-	/* Sync descriptors. */
-	bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag,
-	    sc->arge_cdata.arge_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	/* Flush writes */
-	ARGE_BARRIER_WRITE(sc);
-
-	/* Start transmitting */
-	ARGEDEBUG(sc, ARGE_DBG_TX, "%s: setting DMA_TX_CONTROL_EN\n",
-	    __func__);
-	ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, DMA_TX_CONTROL_EN);
-	return (0);
-}
-
-static void
-arge_start(struct ifnet *ifp)
-{
-	struct arge_softc	 *sc;
-
-	sc = ifp->if_softc;
-
-	ARGE_LOCK(sc);
-	arge_start_locked(ifp);
-	ARGE_UNLOCK(sc);
-}
-
-static void
-arge_start_locked(struct ifnet *ifp)
-{
-	struct arge_softc	*sc;
-	struct mbuf		*m_head;
-	int			enq = 0;
-
-	sc = ifp->if_softc;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	ARGEDEBUG(sc, ARGE_DBG_TX, "%s: beginning\n", __func__);
-
-	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING || sc->arge_link_status == 0 )
-		return;
-
-	/*
-	 * Before we go any further, check whether we're already full.
-	 * The below check errors out immediately if the ring is full
-	 * and never gets a chance to set this flag. Although it's
-	 * likely never needed, this at least avoids an unexpected
-	 * situation.
-	 */
-	if (sc->arge_cdata.arge_tx_cnt >= ARGE_TX_RING_COUNT - 2) {
-		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-		ARGEDEBUG(sc, ARGE_DBG_ERR,
-		    "%s: tx_cnt %d >= max %d; setting IFF_DRV_OACTIVE\n",
-		    __func__, sc->arge_cdata.arge_tx_cnt,
-		    ARGE_TX_RING_COUNT - 2);
-		return;
-	}
-
-	arge_flush_ddr(sc);
-
-	for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
-	    sc->arge_cdata.arge_tx_cnt < ARGE_TX_RING_COUNT - 2; ) {
-		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
-		if (m_head == NULL)
-			break;
-
-		/*
-		 * Pack the data into the transmit ring.
-		 */
-		if (arge_encap(sc, &m_head)) {
-			if (m_head == NULL)
-				break;
-			IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
-			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
-			break;
-		}
-
-		enq++;
-		/*
-		 * If there's a BPF listener, bounce a copy of this frame
-		 * to him.
-		 */
-		ETHER_BPF_MTAP(ifp, m_head);
-	}
-	ARGEDEBUG(sc, ARGE_DBG_TX, "%s: finished; queued %d packets\n",
-	    __func__, enq);
-}
-
-static void
-arge_stop(struct arge_softc *sc)
-{
-	struct ifnet	    *ifp;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	ifp = sc->arge_ifp;
-	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-	if (sc->arge_miibus)
-		callout_stop(&sc->arge_stat_callout);
-
-	/* mask out interrupts */
-	ARGE_WRITE(sc, AR71XX_DMA_INTR, 0);
-
-	arge_reset_dma(sc);
-
-	/* Flush FIFO and free any existing mbufs */
-	arge_flush_ddr(sc);
-	arge_rx_ring_free(sc);
-	arge_tx_ring_free(sc);
-}
-
-static int
-arge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
-	struct arge_softc		*sc = ifp->if_softc;
-	struct ifreq		*ifr = (struct ifreq *) data;
-	struct mii_data		*mii;
-	int			error;
-#ifdef DEVICE_POLLING
-	int			mask;
-#endif
-
-	switch (command) {
-	case SIOCSIFFLAGS:
-		ARGE_LOCK(sc);
-		if ((ifp->if_flags & IFF_UP) != 0) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-				if (((ifp->if_flags ^ sc->arge_if_flags)
-				    & (IFF_PROMISC | IFF_ALLMULTI)) != 0) {
-					/* XXX: handle promisc & multi flags */
-				}
-
-			} else {
-				if (!sc->arge_detach)
-					arge_init_locked(sc);
-			}
-		} else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-			ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
-			arge_stop(sc);
-		}
-		sc->arge_if_flags = ifp->if_flags;
-		ARGE_UNLOCK(sc);
-		error = 0;
-		break;
-	case SIOCADDMULTI:
-	case SIOCDELMULTI:
-		/* XXX: implement SIOCDELMULTI */
-		error = 0;
-		break;
-	case SIOCGIFMEDIA:
-	case SIOCSIFMEDIA:
-		if (sc->arge_miibus) {
-			mii = device_get_softc(sc->arge_miibus);
-			error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
-			    command);
-		}
-		else
-			error = ifmedia_ioctl(ifp, ifr, &sc->arge_ifmedia,
-			    command);
-		break;
-	case SIOCSIFCAP:
-		/* XXX: Check other capabilities */
-#ifdef DEVICE_POLLING
-		mask = ifp->if_capenable ^ ifr->ifr_reqcap;
-		if (mask & IFCAP_POLLING) {
-			if (ifr->ifr_reqcap & IFCAP_POLLING) {
-				ARGE_WRITE(sc, AR71XX_DMA_INTR, 0);
-				error = ether_poll_register(arge_poll, ifp);
-				if (error)
-					return error;
-				ARGE_LOCK(sc);
-				ifp->if_capenable |= IFCAP_POLLING;
-				ARGE_UNLOCK(sc);
-			} else {
-				ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL);
-				error = ether_poll_deregister(ifp);
-				ARGE_LOCK(sc);
-				ifp->if_capenable &= ~IFCAP_POLLING;
-				ARGE_UNLOCK(sc);
-			}
-		}
-		error = 0;
-		break;
-#endif
-	default:
-		error = ether_ioctl(ifp, command, data);
-		break;
-	}
-
-	return (error);
-}
-
-/*
- * Set media options.
- */
-static int
-arge_ifmedia_upd(struct ifnet *ifp)
-{
-	struct arge_softc		*sc;
-	struct mii_data		*mii;
-	struct mii_softc	*miisc;
-	int			error;
-
-	sc = ifp->if_softc;
-	ARGE_LOCK(sc);
-	mii = device_get_softc(sc->arge_miibus);
-	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
-		PHY_RESET(miisc);
-	error = mii_mediachg(mii);
-	ARGE_UNLOCK(sc);
-
-	return (error);
-}
-
-/*
- * Report current media status.
- */
-static void
-arge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct arge_softc		*sc = ifp->if_softc;
-	struct mii_data		*mii;
-
-	mii = device_get_softc(sc->arge_miibus);
-	ARGE_LOCK(sc);
-	mii_pollstat(mii);
-	ifmr->ifm_active = mii->mii_media_active;
-	ifmr->ifm_status = mii->mii_media_status;
-	ARGE_UNLOCK(sc);
-}
-
-struct arge_dmamap_arg {
-	bus_addr_t	arge_busaddr;
-};
-
-static void
-arge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	struct arge_dmamap_arg	*ctx;
-
-	if (error != 0)
-		return;
-	ctx = arg;
-	ctx->arge_busaddr = segs[0].ds_addr;
-}
-
-static int
-arge_dma_alloc(struct arge_softc *sc)
-{
-	struct arge_dmamap_arg	ctx;
-	struct arge_txdesc	*txd;
-	struct arge_rxdesc	*rxd;
-	int			error, i;
-	int			arge_tx_align, arge_rx_align;
-
-	/* Assume 4 byte alignment by default */
-	arge_tx_align = 4;
-	arge_rx_align = 4;
-
-	if (sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE)
-		arge_tx_align = 1;
-	if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE)
-		arge_rx_align = 1;
-
-	/* Create parent DMA tag. */
-	error = bus_dma_tag_create(
-	    bus_get_dma_tag(sc->arge_dev),	/* parent */
-	    1, 0,			/* alignment, boundary */
-	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsize */
-	    0,				/* nsegments */
-	    BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->arge_cdata.arge_parent_tag);
-	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create parent DMA tag\n");
-		goto fail;
-	}
-	/* Create tag for Tx ring. */
-	error = bus_dma_tag_create(
-	    sc->arge_cdata.arge_parent_tag,	/* parent */
-	    ARGE_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    ARGE_TX_DMA_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    ARGE_TX_DMA_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->arge_cdata.arge_tx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create Tx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx ring. */
-	error = bus_dma_tag_create(
-	    sc->arge_cdata.arge_parent_tag,	/* parent */
-	    ARGE_RING_ALIGN, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    ARGE_RX_DMA_SIZE,		/* maxsize */
-	    1,				/* nsegments */
-	    ARGE_RX_DMA_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->arge_cdata.arge_rx_ring_tag);
-	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create Rx ring DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Tx buffers. */
-	error = bus_dma_tag_create(
-	    sc->arge_cdata.arge_parent_tag,	/* parent */
-	    arge_tx_align, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES * ARGE_MAXFRAGS,	/* maxsize */
-	    ARGE_MAXFRAGS,		/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->arge_cdata.arge_tx_tag);
-	if (error != 0) {
-		device_printf(sc->arge_dev, "failed to create Tx DMA tag\n");
-		goto fail;
-	}
-
-	/* Create tag for Rx buffers. */
-	error = bus_dma_tag_create(
-	    sc->arge_cdata.arge_parent_tag,	/* parent */
-	    arge_rx_align, 0,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR,		/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    MCLBYTES,			/* maxsize */
-	    ARGE_MAXFRAGS,		/* nsegments */
-	    MCLBYTES,			/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->arge_cdata.arge_rx_tag);
-	if (error != 0) {
-		device_printf(sc->arge_dev, "failed to create Rx DMA tag\n");
-		goto fail;
-	}
-
-	/* Allocate DMA'able memory and load the DMA map for Tx ring. */
-	error = bus_dmamem_alloc(sc->arge_cdata.arge_tx_ring_tag,
-	    (void **)&sc->arge_rdata.arge_tx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO,
-	    &sc->arge_cdata.arge_tx_ring_map);
-	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to allocate DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-
-	ctx.arge_busaddr = 0;
-	error = bus_dmamap_load(sc->arge_cdata.arge_tx_ring_tag,
-	    sc->arge_cdata.arge_tx_ring_map, sc->arge_rdata.arge_tx_ring,
-	    ARGE_TX_DMA_SIZE, arge_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.arge_busaddr == 0) {
-		device_printf(sc->arge_dev,
-		    "failed to load DMA'able memory for Tx ring\n");
-		goto fail;
-	}
-	sc->arge_rdata.arge_tx_ring_paddr = ctx.arge_busaddr;
-
-	/* Allocate DMA'able memory and load the DMA map for Rx ring. */
-	error = bus_dmamem_alloc(sc->arge_cdata.arge_rx_ring_tag,
-	    (void **)&sc->arge_rdata.arge_rx_ring, BUS_DMA_WAITOK |
-	    BUS_DMA_COHERENT | BUS_DMA_ZERO,
-	    &sc->arge_cdata.arge_rx_ring_map);
-	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to allocate DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-
-	ctx.arge_busaddr = 0;
-	error = bus_dmamap_load(sc->arge_cdata.arge_rx_ring_tag,
-	    sc->arge_cdata.arge_rx_ring_map, sc->arge_rdata.arge_rx_ring,
-	    ARGE_RX_DMA_SIZE, arge_dmamap_cb, &ctx, 0);
-	if (error != 0 || ctx.arge_busaddr == 0) {
-		device_printf(sc->arge_dev,
-		    "failed to load DMA'able memory for Rx ring\n");
-		goto fail;
-	}
-	sc->arge_rdata.arge_rx_ring_paddr = ctx.arge_busaddr;
-
-	/* Create DMA maps for Tx buffers. */
-	for (i = 0; i < ARGE_TX_RING_COUNT; i++) {
-		txd = &sc->arge_cdata.arge_txdesc[i];
-		txd->tx_m = NULL;
-		txd->tx_dmamap = NULL;
-		error = bus_dmamap_create(sc->arge_cdata.arge_tx_tag, 0,
-		    &txd->tx_dmamap);
-		if (error != 0) {
-			device_printf(sc->arge_dev,
-			    "failed to create Tx dmamap\n");
-			goto fail;
-		}
-	}
-	/* Create DMA maps for Rx buffers. */
-	if ((error = bus_dmamap_create(sc->arge_cdata.arge_rx_tag, 0,
-	    &sc->arge_cdata.arge_rx_sparemap)) != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create spare Rx dmamap\n");
-		goto fail;
-	}
-	for (i = 0; i < ARGE_RX_RING_COUNT; i++) {
-		rxd = &sc->arge_cdata.arge_rxdesc[i];
-		rxd->rx_m = NULL;
-		rxd->rx_dmamap = NULL;
-		error = bus_dmamap_create(sc->arge_cdata.arge_rx_tag, 0,
-		    &rxd->rx_dmamap);
-		if (error != 0) {
-			device_printf(sc->arge_dev,
-			    "failed to create Rx dmamap\n");
-			goto fail;
-		}
-	}
-
-fail:
-	return (error);
-}
-
-static void
-arge_dma_free(struct arge_softc *sc)
-{
-	struct arge_txdesc	*txd;
-	struct arge_rxdesc	*rxd;
-	int			i;
-
-	/* Tx ring. */
-	if (sc->arge_cdata.arge_tx_ring_tag) {
-		if (sc->arge_rdata.arge_tx_ring_paddr)
-			bus_dmamap_unload(sc->arge_cdata.arge_tx_ring_tag,
-			    sc->arge_cdata.arge_tx_ring_map);
-		if (sc->arge_rdata.arge_tx_ring)
-			bus_dmamem_free(sc->arge_cdata.arge_tx_ring_tag,
-			    sc->arge_rdata.arge_tx_ring,
-			    sc->arge_cdata.arge_tx_ring_map);
-		sc->arge_rdata.arge_tx_ring = NULL;
-		sc->arge_rdata.arge_tx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->arge_cdata.arge_tx_ring_tag);
-		sc->arge_cdata.arge_tx_ring_tag = NULL;
-	}
-	/* Rx ring. */
-	if (sc->arge_cdata.arge_rx_ring_tag) {
-		if (sc->arge_rdata.arge_rx_ring_paddr)
-			bus_dmamap_unload(sc->arge_cdata.arge_rx_ring_tag,
-			    sc->arge_cdata.arge_rx_ring_map);
-		if (sc->arge_rdata.arge_rx_ring)
-			bus_dmamem_free(sc->arge_cdata.arge_rx_ring_tag,
-			    sc->arge_rdata.arge_rx_ring,
-			    sc->arge_cdata.arge_rx_ring_map);
-		sc->arge_rdata.arge_rx_ring = NULL;
-		sc->arge_rdata.arge_rx_ring_paddr = 0;
-		bus_dma_tag_destroy(sc->arge_cdata.arge_rx_ring_tag);
-		sc->arge_cdata.arge_rx_ring_tag = NULL;
-	}
-	/* Tx buffers. */
-	if (sc->arge_cdata.arge_tx_tag) {
-		for (i = 0; i < ARGE_TX_RING_COUNT; i++) {
-			txd = &sc->arge_cdata.arge_txdesc[i];
-			if (txd->tx_dmamap) {
-				bus_dmamap_destroy(sc->arge_cdata.arge_tx_tag,
-				    txd->tx_dmamap);
-				txd->tx_dmamap = NULL;
-			}
-		}
-		bus_dma_tag_destroy(sc->arge_cdata.arge_tx_tag);
-		sc->arge_cdata.arge_tx_tag = NULL;
-	}
-	/* Rx buffers. */
-	if (sc->arge_cdata.arge_rx_tag) {
-		for (i = 0; i < ARGE_RX_RING_COUNT; i++) {
-			rxd = &sc->arge_cdata.arge_rxdesc[i];
-			if (rxd->rx_dmamap) {
-				bus_dmamap_destroy(sc->arge_cdata.arge_rx_tag,
-				    rxd->rx_dmamap);
-				rxd->rx_dmamap = NULL;
-			}
-		}
-		if (sc->arge_cdata.arge_rx_sparemap) {
-			bus_dmamap_destroy(sc->arge_cdata.arge_rx_tag,
-			    sc->arge_cdata.arge_rx_sparemap);
-			sc->arge_cdata.arge_rx_sparemap = 0;
-		}
-		bus_dma_tag_destroy(sc->arge_cdata.arge_rx_tag);
-		sc->arge_cdata.arge_rx_tag = NULL;
-	}
-
-	if (sc->arge_cdata.arge_parent_tag) {
-		bus_dma_tag_destroy(sc->arge_cdata.arge_parent_tag);
-		sc->arge_cdata.arge_parent_tag = NULL;
-	}
-}
-
-/*
- * Initialize the transmit descriptors.
- */
-static int
-arge_tx_ring_init(struct arge_softc *sc)
-{
-	struct arge_ring_data	*rd;
-	struct arge_txdesc	*txd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->arge_cdata.arge_tx_prod = 0;
-	sc->arge_cdata.arge_tx_cons = 0;
-	sc->arge_cdata.arge_tx_cnt = 0;
-
-	rd = &sc->arge_rdata;
-	bzero(rd->arge_tx_ring, sizeof(*rd->arge_tx_ring));
-	for (i = 0; i < ARGE_TX_RING_COUNT; i++) {
-		if (i == ARGE_TX_RING_COUNT - 1)
-			addr = ARGE_TX_RING_ADDR(sc, 0);
-		else
-			addr = ARGE_TX_RING_ADDR(sc, i + 1);
-		rd->arge_tx_ring[i].packet_ctrl = ARGE_DESC_EMPTY;
-		rd->arge_tx_ring[i].next_desc = addr;
-		txd = &sc->arge_cdata.arge_txdesc[i];
-		txd->tx_m = NULL;
-	}
-
-	bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag,
-	    sc->arge_cdata.arge_tx_ring_map,
-	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Free the Tx ring, unload any pending dma transaction and free the mbuf.
- */
-static void
-arge_tx_ring_free(struct arge_softc *sc)
-{
-	struct arge_txdesc	*txd;
-	int			i;
-
-	/* Free the Tx buffers. */
-	for (i = 0; i < ARGE_TX_RING_COUNT; i++) {
-		txd = &sc->arge_cdata.arge_txdesc[i];
-		if (txd->tx_dmamap) {
-			bus_dmamap_sync(sc->arge_cdata.arge_tx_tag,
-			    txd->tx_dmamap, BUS_DMASYNC_POSTWRITE);
-			bus_dmamap_unload(sc->arge_cdata.arge_tx_tag,
-			    txd->tx_dmamap);
-		}
-		if (txd->tx_m)
-			m_freem(txd->tx_m);
-		txd->tx_m = NULL;
-	}
-}
-
-/*
- * Initialize the RX descriptors and allocate mbufs for them. Note that
- * we arrange the descriptors in a closed ring, so that the last descriptor
- * points back to the first.
- */
-static int
-arge_rx_ring_init(struct arge_softc *sc)
-{
-	struct arge_ring_data	*rd;
-	struct arge_rxdesc	*rxd;
-	bus_addr_t		addr;
-	int			i;
-
-	sc->arge_cdata.arge_rx_cons = 0;
-
-	rd = &sc->arge_rdata;
-	bzero(rd->arge_rx_ring, sizeof(*rd->arge_rx_ring));
-	for (i = 0; i < ARGE_RX_RING_COUNT; i++) {
-		rxd = &sc->arge_cdata.arge_rxdesc[i];
-		if (rxd->rx_m != NULL) {
-			device_printf(sc->arge_dev,
-			    "%s: ring[%d] rx_m wasn't free?\n",
-			    __func__,
-			    i);
-		}
-		rxd->rx_m = NULL;
-		rxd->desc = &rd->arge_rx_ring[i];
-		if (i == ARGE_RX_RING_COUNT - 1)
-			addr = ARGE_RX_RING_ADDR(sc, 0);
-		else
-			addr = ARGE_RX_RING_ADDR(sc, i + 1);
-		rd->arge_rx_ring[i].next_desc = addr;
-		if (arge_newbuf(sc, i) != 0) {
-			return (ENOBUFS);
-		}
-	}
-
-	bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag,
-	    sc->arge_cdata.arge_rx_ring_map,
-	    BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Free all the buffers in the RX ring.
- *
- * TODO: ensure that DMA is disabled and no pending DMA
- * is lurking in the FIFO.
- */
-static void
-arge_rx_ring_free(struct arge_softc *sc)
-{
-	int i;
-	struct arge_rxdesc	*rxd;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	for (i = 0; i < ARGE_RX_RING_COUNT; i++) {
-		rxd = &sc->arge_cdata.arge_rxdesc[i];
-		/* Unmap the mbuf */
-		if (rxd->rx_m != NULL) {
-			bus_dmamap_unload(sc->arge_cdata.arge_rx_tag,
-			    rxd->rx_dmamap);
-			m_free(rxd->rx_m);
-			rxd->rx_m = NULL;
-		}
-	}
-}
-
-/*
- * Initialize an RX descriptor and attach an MBUF cluster.
- */
-static int
-arge_newbuf(struct arge_softc *sc, int idx)
-{
-	struct arge_desc		*desc;
-	struct arge_rxdesc	*rxd;
-	struct mbuf		*m;
-	bus_dma_segment_t	segs[1];
-	bus_dmamap_t		map;
-	int			nsegs;
-
-	/* XXX TODO: should just allocate an explicit 2KiB buffer */
-	m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-	if (m == NULL)
-		return (ENOBUFS);
-	m->m_len = m->m_pkthdr.len = MCLBYTES;
-
-	/*
-	 * Add extra space to "adjust" (copy) the packet back to be aligned
-	 * for purposes of IPv4/IPv6 header contents.
-	 */
-	if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE)
-		m_adj(m, sizeof(uint64_t));
-	/*
-	 * If it's a 1-byte aligned buffer, then just offset it two bytes
-	 * and that will give us a hopefully correctly DWORD aligned
-	 * L3 payload - and we won't have to undo it afterwards.
-	 */
-	else if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE)
-		m_adj(m, sizeof(uint16_t));
-
-	if (bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_rx_tag,
-	    sc->arge_cdata.arge_rx_sparemap, m, segs, &nsegs, 0) != 0) {
-		m_freem(m);
-		return (ENOBUFS);
-	}
-	KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
-
-	rxd = &sc->arge_cdata.arge_rxdesc[idx];
-	if (rxd->rx_m != NULL) {
-		bus_dmamap_unload(sc->arge_cdata.arge_rx_tag, rxd->rx_dmamap);
-	}
-	map = rxd->rx_dmamap;
-	rxd->rx_dmamap = sc->arge_cdata.arge_rx_sparemap;
-	sc->arge_cdata.arge_rx_sparemap = map;
-	rxd->rx_m = m;
-	desc = rxd->desc;
-	if ((sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE) &&
-	    segs[0].ds_addr & 3)
-		panic("RX packet address unaligned");
-	desc->packet_addr = segs[0].ds_addr;
-	desc->packet_ctrl = ARGE_DESC_EMPTY | ARGE_DMASIZE(segs[0].ds_len);
-
-	bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag,
-	    sc->arge_cdata.arge_rx_ring_map,
-	    BUS_DMASYNC_PREWRITE);
-
-	return (0);
-}
-
-/*
- * Move the data backwards 16 bits to (hopefully!) ensure the
- * IPv4/IPv6 payload is aligned.
- *
- * This is required for earlier hardware where the RX path
- * requires DWORD aligned buffers.
- */
-static __inline void
-arge_fixup_rx(struct mbuf *m)
-{
-	int		i;
-	uint16_t	*src, *dst;
-
-	src = mtod(m, uint16_t *);
-	dst = src - 1;
-
-	for (i = 0; i < m->m_len / sizeof(uint16_t); i++) {
-		*dst++ = *src++;
-	}
-
-	if (m->m_len % sizeof(uint16_t))
-		*(uint8_t *)dst = *(uint8_t *)src;
-
-	m->m_data -= ETHER_ALIGN;
-}
-
-#ifdef DEVICE_POLLING
-static int
-arge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
-{
-	struct arge_softc *sc = ifp->if_softc;
-	int rx_npkts = 0;
-
-	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
-		ARGE_LOCK(sc);
-		arge_tx_locked(sc);
-		rx_npkts = arge_rx_locked(sc);
-		ARGE_UNLOCK(sc);
-	}
-
-	return (rx_npkts);
-}
-#endif /* DEVICE_POLLING */
-
-static void
-arge_tx_locked(struct arge_softc *sc)
-{
-	struct arge_txdesc	*txd;
-	struct arge_desc	*cur_tx;
-	struct ifnet		*ifp;
-	uint32_t		ctrl;
-	int			cons, prod;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	cons = sc->arge_cdata.arge_tx_cons;
-	prod = sc->arge_cdata.arge_tx_prod;
-
-	ARGEDEBUG(sc, ARGE_DBG_TX, "%s: cons=%d, prod=%d\n", __func__, cons,
-	    prod);
-
-	if (cons == prod)
-		return;
-
-	bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag,
-	    sc->arge_cdata.arge_tx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	ifp = sc->arge_ifp;
-	/*
-	 * Go through our tx list and free mbufs for those
-	 * frames that have been transmitted.
-	 */
-	for (; cons != prod; ARGE_INC(cons, ARGE_TX_RING_COUNT)) {
-		cur_tx = &sc->arge_rdata.arge_tx_ring[cons];
-		ctrl = cur_tx->packet_ctrl;
-		/* Check if descriptor has "finished" flag */
-		if ((ctrl & ARGE_DESC_EMPTY) == 0)
-			break;
-
-		ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_PKT_SENT);
-
-		sc->arge_cdata.arge_tx_cnt--;
-		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
-		txd = &sc->arge_cdata.arge_txdesc[cons];
-
-		if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-
-		bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap,
-		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap);
-
-		/* Free only if it's first descriptor in list */
-		if (txd->tx_m)
-			m_freem(txd->tx_m);
-		txd->tx_m = NULL;
-
-		/* reset descriptor */
-		cur_tx->packet_addr = 0;
-	}
-
-	sc->arge_cdata.arge_tx_cons = cons;
-
-	bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag,
-	    sc->arge_cdata.arge_tx_ring_map, BUS_DMASYNC_PREWRITE);
-}
-
-static int
-arge_rx_locked(struct arge_softc *sc)
-{
-	struct arge_rxdesc	*rxd;
-	struct ifnet		*ifp = sc->arge_ifp;
-	int			cons, prog, packet_len, i;
-	struct arge_desc	*cur_rx;
-	struct mbuf		*m;
-	int			rx_npkts = 0;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	cons = sc->arge_cdata.arge_rx_cons;
-
-	bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag,
-	    sc->arge_cdata.arge_rx_ring_map,
-	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
-	for (prog = 0; prog < ARGE_RX_RING_COUNT;
-	    ARGE_INC(cons, ARGE_RX_RING_COUNT)) {
-		cur_rx = &sc->arge_rdata.arge_rx_ring[cons];
-		rxd = &sc->arge_cdata.arge_rxdesc[cons];
-		m = rxd->rx_m;
-
-		if ((cur_rx->packet_ctrl & ARGE_DESC_EMPTY) != 0)
-		       break;
-
-		ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_PKT_RECVD);
-
-		prog++;
-
-		packet_len = ARGE_DMASIZE(cur_rx->packet_ctrl);
-		bus_dmamap_sync(sc->arge_cdata.arge_rx_tag, rxd->rx_dmamap,
-		    BUS_DMASYNC_POSTREAD);
-		m = rxd->rx_m;
-
-		/*
-		 * If the MAC requires 4 byte alignment then the RX setup
-		 * routine will have pre-offset things; so un-offset it here.
-		 */
-		if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE)
-			arge_fixup_rx(m);
-
-		m->m_pkthdr.rcvif = ifp;
-		/* Skip 4 bytes of CRC */
-		m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN;
-		if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-		rx_npkts++;
-
-		ARGE_UNLOCK(sc);
-		(*ifp->if_input)(ifp, m);
-		ARGE_LOCK(sc);
-		cur_rx->packet_addr = 0;
-	}
-
-	if (prog > 0) {
-		i = sc->arge_cdata.arge_rx_cons;
-		for (; prog > 0 ; prog--) {
-			if (arge_newbuf(sc, i) != 0) {
-				device_printf(sc->arge_dev,
-				    "Failed to allocate buffer\n");
-				break;
-			}
-			ARGE_INC(i, ARGE_RX_RING_COUNT);
-		}
-
-		bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag,
-		    sc->arge_cdata.arge_rx_ring_map,
-		    BUS_DMASYNC_PREWRITE);
-
-		sc->arge_cdata.arge_rx_cons = cons;
-	}
-
-	return (rx_npkts);
-}
-
-static int
-arge_intr_filter(void *arg)
-{
-	struct arge_softc	*sc = arg;
-	uint32_t		status, ints;
-
-	status = ARGE_READ(sc, AR71XX_DMA_INTR_STATUS);
-	ints = ARGE_READ(sc, AR71XX_DMA_INTR);
-
-	ARGEDEBUG(sc, ARGE_DBG_INTR, "int mask(filter) = %b\n", ints,
-	    "\20\10RX_BUS_ERROR\7RX_OVERFLOW\5RX_PKT_RCVD"
-	    "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT");
-	ARGEDEBUG(sc, ARGE_DBG_INTR, "status(filter) = %b\n", status,
-	    "\20\10RX_BUS_ERROR\7RX_OVERFLOW\5RX_PKT_RCVD"
-	    "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT");
-
-	if (status & DMA_INTR_ALL) {
-		sc->arge_intr_status |= status;
-		ARGE_WRITE(sc, AR71XX_DMA_INTR, 0);
-		sc->stats.intr_ok++;
-		return (FILTER_SCHEDULE_THREAD);
-	}
-
-	sc->arge_intr_status = 0;
-	sc->stats.intr_stray++;
-	return (FILTER_STRAY);
-}
-
-static void
-arge_intr(void *arg)
-{
-	struct arge_softc	*sc = arg;
-	uint32_t		status;
-	struct ifnet		*ifp = sc->arge_ifp;
-#ifdef	ARGE_DEBUG
-	int i;
-#endif
-
-	status = ARGE_READ(sc, AR71XX_DMA_INTR_STATUS);
-	status |= sc->arge_intr_status;
-
-	ARGEDEBUG(sc, ARGE_DBG_INTR, "int status(intr) = %b\n", status,
-	    "\20\10\7RX_OVERFLOW\5RX_PKT_RCVD"
-	    "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT");
-
-	/*
-	 * Is it our interrupt at all?
-	 */
-	if (status == 0) {
-		sc->stats.intr_stray2++;
-		return;
-	}
-
-#ifdef	ARGE_DEBUG
-	for (i = 0; i < 32; i++) {
-		if (status & (1U << i)) {
-			sc->intr_stats.count[i]++;
-		}
-	}
-#endif
-
-	if (status & DMA_INTR_RX_BUS_ERROR) {
-		ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_BUS_ERROR);
-		device_printf(sc->arge_dev, "RX bus error");
-		return;
-	}
-
-	if (status & DMA_INTR_TX_BUS_ERROR) {
-		ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_BUS_ERROR);
-		device_printf(sc->arge_dev, "TX bus error");
-		return;
-	}
-
-	ARGE_LOCK(sc);
-	arge_flush_ddr(sc);
-
-	if (status & DMA_INTR_RX_PKT_RCVD)
-		arge_rx_locked(sc);
-
-	/*
-	 * RX overrun disables the receiver.
-	 * Clear indication and re-enable rx.
-	 */
-	if ( status & DMA_INTR_RX_OVERFLOW) {
-		ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_OVERFLOW);
-		ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, DMA_RX_CONTROL_EN);
-		sc->stats.rx_overflow++;
-	}
-
-	if (status & DMA_INTR_TX_PKT_SENT)
-		arge_tx_locked(sc);
-	/*
-	 * Underrun turns off TX. Clear underrun indication.
-	 * If there's anything left in the ring, reactivate the tx.
-	 */
-	if (status & DMA_INTR_TX_UNDERRUN) {
-		ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_UNDERRUN);
-		sc->stats.tx_underflow++;
-		ARGEDEBUG(sc, ARGE_DBG_TX, "%s: TX underrun; tx_cnt=%d\n",
-		    __func__, sc->arge_cdata.arge_tx_cnt);
-		if (sc->arge_cdata.arge_tx_cnt > 0 ) {
-			ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL,
-			    DMA_TX_CONTROL_EN);
-		}
-	}
-
-	/*
-	 * If we've finished RX /or/ TX and there's space for more packets
-	 * to be queued for TX, do so. Otherwise we may end up in a
-	 * situation where the interface send queue was filled
-	 * whilst the hardware queue was full, then the hardware
-	 * queue was drained by the interface send queue wasn't,
-	 * and thus if_start() is never called to kick-start
-	 * the send process (and all subsequent packets are simply
-	 * discarded.
-	 *
-	 * XXX TODO: make sure that the hardware deals nicely
-	 * with the possibility of the queue being enabled above
-	 * after a TX underrun, then having the hardware queue added
-	 * to below.
-	 */
-	 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
-		if (!IFQ_IS_EMPTY(&ifp->if_snd))
-			arge_start_locked(ifp);
-	}
-
-	/*
-	 * We handled all bits, clear status
-	 */
-	sc->arge_intr_status = 0;
-	ARGE_UNLOCK(sc);
-	/*
-	 * re-enable all interrupts
-	 */
-	ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL);
-}
-
-static void
-arge_tick(void *xsc)
-{
-	struct arge_softc	*sc = xsc;
-	struct mii_data		*mii;
-
-	ARGE_LOCK_ASSERT(sc);
-
-	if (sc->arge_miibus) {
-		mii = device_get_softc(sc->arge_miibus);
-		mii_tick(mii);
-		callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
-	}
-}
-
-int
-arge_multiphy_mediachange(struct ifnet *ifp)
-{
-	struct arge_softc *sc = ifp->if_softc;
-	struct ifmedia *ifm = &sc->arge_ifmedia;
-	struct ifmedia_entry *ife = ifm->ifm_cur;
-
-	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
-		return (EINVAL);
-
-	if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
-		device_printf(sc->arge_dev,
-		    "AUTO is not supported for multiphy MAC");
-		return (EINVAL);
-	}
-
-	/*
-	 * Ignore everything
-	 */
-	return (0);
-}
-
-void
-arge_multiphy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct arge_softc *sc = ifp->if_softc;
-
-	ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
-	ifmr->ifm_active = IFM_ETHER | sc->arge_media_type |
-	    sc->arge_duplex_mode;
-}
-
-#if defined(ARGE_MDIO)
-static int
-argemdio_probe(device_t dev)
-{
-	device_set_desc(dev, "Atheros AR71xx built-in ethernet interface, MDIO controller");
-	return (0);
-}
-
-static int
-argemdio_attach(device_t dev)
-{
-	struct arge_softc	*sc;
-	int			error = 0;
-#ifdef	ARGE_DEBUG
-	struct sysctl_ctx_list *ctx;
-	struct sysctl_oid *tree;
-#endif
-	sc = device_get_softc(dev);
-	sc->arge_dev = dev;
-	sc->arge_mac_unit = device_get_unit(dev);
-	sc->arge_rid = 0;
-	sc->arge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 
-	    &sc->arge_rid, RF_ACTIVE | RF_SHAREABLE);
-	if (sc->arge_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-#ifdef	ARGE_DEBUG
-	ctx = device_get_sysctl_ctx(dev);
-	tree = device_get_sysctl_tree(dev);
-	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"debug", CTLFLAG_RW, &sc->arge_debug, 0,
-		"argemdio interface debugging flags");
-#endif
-
-	/* Reset MAC - required for AR71xx MDIO to successfully occur */
-	arge_reset_mac(sc);
-	/* Reset MII bus */
-	arge_reset_miibus(sc);
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	error = bus_generic_attach(dev);
-fail:
-	return (error);
-}
-
-static int
-argemdio_detach(device_t dev)
-{
-	return (0);
-}
-
-#endif
diff --git a/sys/mips/atheros/if_argevar.h b/sys/mips/atheros/if_argevar.h
deleted file mode 100644
index 498a7f1695d1..000000000000
--- a/sys/mips/atheros/if_argevar.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __IF_ARGEVAR_H__
-#define __IF_ARGEVAR_H__
-
-#define	ARGE_NPHY		32
-#define	ARGE_TX_RING_COUNT	128
-#define	ARGE_RX_RING_COUNT	128
-#define	ARGE_RX_DMA_SIZE	ARGE_RX_RING_COUNT * sizeof(struct arge_desc)
-#define	ARGE_TX_DMA_SIZE	ARGE_TX_RING_COUNT * sizeof(struct arge_desc)
-#define	ARGE_MAXFRAGS		8
-#define ARGE_RING_ALIGN		sizeof(struct arge_desc)
-#define ARGE_RX_ALIGN_4BYTE	sizeof(uint32_t)
-#define ARGE_RX_ALIGN_1BYTE	sizeof(char)
-#define ARGE_TX_ALIGN_4BYTE	sizeof(uint32_t)
-#define ARGE_TX_ALIGN_1BYTE	sizeof(char)
-#define ARGE_MAXFRAGS		8
-#define	ARGE_TX_RING_ADDR(sc, i)	\
-    ((sc)->arge_rdata.arge_tx_ring_paddr + sizeof(struct arge_desc) * (i))
-#define	ARGE_RX_RING_ADDR(sc, i)	\
-    ((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i))
-#define	ARGE_INC(x,y)		(x) = (((x) + 1) % y)
-
-#define	ARGE_MII_TIMEOUT	1000
-
-#define	ARGE_LOCK(_sc)		mtx_lock(&(_sc)->arge_mtx)
-#define	ARGE_UNLOCK(_sc)	mtx_unlock(&(_sc)->arge_mtx)
-#define	ARGE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->arge_mtx, MA_OWNED)
-
-/*
- * register space access macros
- */
-#define	ARGE_BARRIER_READ(sc)	bus_barrier(sc->arge_res, 0, 0, \
-				    BUS_SPACE_BARRIER_READ)
-#define	ARGE_BARRIER_WRITE(sc)	bus_barrier(sc->arge_res, 0, 0, \
-				    BUS_SPACE_BARRIER_WRITE)
-#define	ARGE_BARRIER_RW(sc)	bus_barrier(sc->arge_res, 0, 0, \
-				    BUS_SPACE_BARRIER_READ | \
-				    BUS_SPACE_BARRIER_WRITE)
-#define ARGE_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->arge_res, (reg), (val)); \
-		ARGE_BARRIER_WRITE((sc)); \
-		ARGE_READ((sc), (reg)); \
-	} while (0)
-#define ARGE_READ(sc, reg)	 bus_read_4(sc->arge_res, (reg))
-
-#define ARGE_SET_BITS(sc, reg, bits)	\
-	ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) | (bits))
-
-#define ARGE_CLEAR_BITS(sc, reg, bits)	\
-	ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) & ~(bits))
-
-/*
- * The linux driver code for the MDIO bus does a read-after-write
- * which seems to be required on MIPS74k platforms for correct
- * behaviour.
- *
- * So, ARGE_WRITE() does the write + barrier, and the following
- * ARGE_READ() seems to flush the thing all the way through the device
- * FIFO(s) before we continue issuing MDIO bus updates.
- */
-#define ARGE_MDIO_WRITE(_sc, _reg, _val) \
-	ARGE_WRITE((_sc), (_reg), (_val))
-#define ARGE_MDIO_READ(_sc, _reg)	\
-	ARGE_READ((_sc), (_reg))
-#define	ARGE_MDIO_BARRIER_READ(_sc)	ARGE_BARRIER_READ(_sc)
-#define	ARGE_MDIO_BARRIER_WRITE(_sc)	ARGE_BARRIER_WRITE(_sc)
-#define	ARGE_MDIO_BARRIER_RW(_sc)	ARGE_BARRIER_RW(_sc)
-
-#define ARGE_DESC_EMPTY		(1U << 31)
-#define ARGE_DESC_MORE		(1 << 24)
-#define ARGE_DESC_SIZE_MASK	((1 << 12) - 1)
-#define	ARGE_DMASIZE(len)	((len) & ARGE_DESC_SIZE_MASK)
-struct arge_desc {
-	uint32_t	packet_addr;
-	uint32_t	packet_ctrl;
-	uint32_t	next_desc;
-	uint32_t	padding;
-};
-
-struct arge_txdesc {
-	struct mbuf	*tx_m;
-	bus_dmamap_t	tx_dmamap;
-};
-
-struct arge_rxdesc {
-	struct mbuf		*rx_m;
-	bus_dmamap_t		rx_dmamap;
-	struct arge_desc	*desc;
-};
-
-struct arge_chain_data {
-	bus_dma_tag_t		arge_parent_tag;
-	bus_dma_tag_t		arge_tx_tag;
-	struct arge_txdesc	arge_txdesc[ARGE_TX_RING_COUNT];
-	bus_dma_tag_t		arge_rx_tag;
-	struct arge_rxdesc	arge_rxdesc[ARGE_RX_RING_COUNT];
-	bus_dma_tag_t		arge_tx_ring_tag;
-	bus_dma_tag_t		arge_rx_ring_tag;
-	bus_dmamap_t		arge_tx_ring_map;
-	bus_dmamap_t		arge_rx_ring_map;
-	bus_dmamap_t		arge_rx_sparemap;
-	int			arge_tx_prod;
-	int			arge_tx_cons;
-	int			arge_tx_cnt;
-	int			arge_rx_cons;
-};
-
-struct arge_ring_data {
-	struct arge_desc	*arge_rx_ring;
-	struct arge_desc	*arge_tx_ring;
-	bus_addr_t		arge_rx_ring_paddr;
-	bus_addr_t		arge_tx_ring_paddr;
-};
-
-/*
- * Allow PLL values to be overridden.
- */
-struct arge_pll_data {
-	uint32_t pll_10;
-	uint32_t pll_100;
-	uint32_t pll_1000;
-};
-
-/*
- * Hardware specific behaviours.
- */
-
-/*
- * Older chips support 4 byte only transmit and receive
- * addresses.
- *
- * Later chips support arbitrary TX and later later,
- * arbitrary RX addresses.
- */
-#define	ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE	0x00000001
-#define	ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE	0x00000002
-#define	ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE	0x00000004
-#define	ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE	0x00000008
-
-struct arge_softc {
-	struct ifnet		*arge_ifp;	/* interface info */
-	device_t		arge_dev;
-	struct ifmedia		arge_ifmedia;
-	/*
-	 * Media & duples settings for multiPHY MAC
-	 */
-	uint32_t		arge_media_type;
-	uint32_t		arge_duplex_mode;
-	uint32_t		arge_phymask;
-	uint8_t			arge_eaddr[ETHER_ADDR_LEN];
-	struct resource		*arge_res;
-	int			arge_rid;
-	struct resource		*arge_irq;
-	void			*arge_intrhand;
-	device_t		arge_miibus;
-	device_t		arge_miiproxy;
-	ar71xx_mii_mode		arge_miicfg;
-	struct arge_pll_data	arge_pllcfg;
-	bus_dma_tag_t		arge_parent_tag;
-	bus_dma_tag_t		arge_tag;
-	struct mtx		arge_mtx;
-	struct callout		arge_stat_callout;
-	struct task		arge_link_task;
-	struct arge_chain_data	arge_cdata;
-	struct arge_ring_data	arge_rdata;
-	int			arge_link_status;
-	int			arge_detach;
-	uint32_t		arge_intr_status;
-	int			arge_mac_unit;
-	int			arge_if_flags;
-	uint32_t		arge_hw_flags;
-	uint32_t		arge_debug;
-	uint32_t		arge_mdiofreq;
-	struct {
-		uint32_t	tx_pkts_unaligned;
-		uint32_t	tx_pkts_unaligned_start;
-		uint32_t	tx_pkts_unaligned_len;
-		uint32_t	tx_pkts_unaligned_tooshort;
-		uint32_t	tx_pkts_nosegs;
-		uint32_t	tx_pkts_aligned;
-		uint32_t	rx_overflow;
-		uint32_t	tx_underflow;
-		uint32_t	intr_stray;
-		uint32_t	intr_stray2;
-		uint32_t	intr_ok;
-	} stats;
-	struct {
-		uint32_t	count[32];
-	} intr_stats;
-};
-
-#endif /* __IF_ARGEVAR_H__ */
diff --git a/sys/mips/atheros/pcf2123_rtc.c b/sys/mips/atheros/pcf2123_rtc.c
deleted file mode 100644
index 0717e3597091..000000000000
--- a/sys/mips/atheros/pcf2123_rtc.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/time.h>
-#include <sys/clock.h>
-#include <sys/resource.h>
-#include <sys/systm.h>
-#include <sys/rman.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <mips/atheros/pcf2123reg.h>
-
-#include <dev/spibus/spi.h>
-#include "spibus_if.h"
-
-#include "clock_if.h"
-
-#define	YEAR_BASE	1970
-#define	PCF2123_DELAY	50
-
-struct pcf2123_rtc_softc {
-	device_t dev;
-};
-
-static int pcf2123_rtc_probe(device_t dev);
-static int pcf2123_rtc_attach(device_t dev);
-
-static int pcf2123_rtc_gettime(device_t dev, struct timespec *ts);
-static int pcf2123_rtc_settime(device_t dev, struct timespec *ts);
-
-static int
-pcf2123_rtc_probe(device_t dev)
-{
-
-	device_set_desc(dev, "PCF2123 SPI RTC");
-	return (0);
-}
-
-static int
-pcf2123_rtc_attach(device_t dev)
-{
-	struct pcf2123_rtc_softc *sc;
-	struct spi_command cmd;
-	unsigned char rxBuf[3];
-	unsigned char txBuf[3];
-	int err;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	clock_register(dev, 1000000);
-
-	memset(&cmd, 0, sizeof(cmd));
-	memset(rxBuf, 0, sizeof(rxBuf));
-	memset(txBuf, 0, sizeof(txBuf));
-
-	/* Make sure Ctrl1 and Ctrl2 are zeroes */
-	txBuf[0] = PCF2123_WRITE(PCF2123_REG_CTRL1);
-	cmd.rx_cmd = rxBuf;
-	cmd.tx_cmd = txBuf;
-	cmd.rx_cmd_sz = sizeof(rxBuf);
-	cmd.tx_cmd_sz = sizeof(txBuf);
-	err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
-	DELAY(PCF2123_DELAY);
-
-	return (0);
-}
-
-static int
-pcf2123_rtc_gettime(device_t dev, struct timespec *ts)
-{
-	struct clocktime ct;
-	struct spi_command cmd;
-	unsigned char rxTimedate[8];
-	unsigned char txTimedate[8];
-	int err;
-
-	memset(&cmd, 0, sizeof(cmd));
-	memset(rxTimedate, 0, sizeof(rxTimedate));
-	memset(txTimedate, 0, sizeof(txTimedate));
-
-	/*
-	 * Counter is stopped when access to time registers is in progress
-	 * So there is no need to stop/start counter
-	 */
-	/* Start reading from seconds */
-	txTimedate[0] = PCF2123_READ(PCF2123_REG_SECONDS);
-	cmd.rx_cmd = rxTimedate;
-	cmd.tx_cmd = txTimedate;
-	cmd.rx_cmd_sz = sizeof(rxTimedate);
-	cmd.tx_cmd_sz = sizeof(txTimedate);
-	err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
-	DELAY(PCF2123_DELAY);
-
-	ct.nsec = 0;
-	ct.sec = FROMBCD(rxTimedate[1] & 0x7f);
-	ct.min = FROMBCD(rxTimedate[2] & 0x7f);
-	ct.hour = FROMBCD(rxTimedate[3] & 0x3f);
-
-	ct.dow = FROMBCD(rxTimedate[5] & 0x3f);
-
-	ct.day = FROMBCD(rxTimedate[4] & 0x3f);
-	ct.mon = FROMBCD(rxTimedate[6] & 0x1f);
-	ct.year = YEAR_BASE + FROMBCD(rxTimedate[7]);
-
-	return (clock_ct_to_ts(&ct, ts));
-}
-
-static int
-pcf2123_rtc_settime(device_t dev, struct timespec *ts)
-{
-	struct clocktime ct;
-	struct pcf2123_rtc_softc *sc;
-	struct spi_command cmd;
-	unsigned char rxTimedate[8];
-	unsigned char txTimedate[8];
-	int err;
-
-	sc = device_get_softc(dev);
-
-	/* Resolution: 1 sec */
-	if (ts->tv_nsec >= 500000000)
-		ts->tv_sec++;
-	ts->tv_nsec = 0;
-	clock_ts_to_ct(ts, &ct);
-
-	memset(&cmd, 0, sizeof(cmd));
-	memset(rxTimedate, 0, sizeof(rxTimedate));
-	memset(txTimedate, 0, sizeof(txTimedate));
-
-	/* Start reading from seconds */
-	cmd.rx_cmd = rxTimedate;
-	cmd.tx_cmd = txTimedate;
-	cmd.rx_cmd_sz = sizeof(rxTimedate);
-	cmd.tx_cmd_sz = sizeof(txTimedate);
-
-	/*
-	 * Counter is stopped when access to time registers is in progress
-	 * So there is no need to stop/start counter
-	 */
-	txTimedate[0] = PCF2123_WRITE(PCF2123_REG_SECONDS);
-	txTimedate[1] = TOBCD(ct.sec);
-	txTimedate[2] = TOBCD(ct.min);
-	txTimedate[3] = TOBCD(ct.hour);
-	txTimedate[4] = TOBCD(ct.day);
-	txTimedate[5] = TOBCD(ct.dow);
-	txTimedate[6] = TOBCD(ct.mon);
-	txTimedate[7] = TOBCD(ct.year - YEAR_BASE);
-
-	err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
-	DELAY(PCF2123_DELAY);
-
-	return (err);
-}
-
-static device_method_t pcf2123_rtc_methods[] = {
-	DEVMETHOD(device_probe,		pcf2123_rtc_probe),
-	DEVMETHOD(device_attach,	pcf2123_rtc_attach),
-
-	DEVMETHOD(clock_gettime,	pcf2123_rtc_gettime),
-	DEVMETHOD(clock_settime,	pcf2123_rtc_settime),
-
-	{ 0, 0 },
-};
-
-static driver_t pcf2123_rtc_driver = {
-	"rtc",
-	pcf2123_rtc_methods,
-	sizeof(struct pcf2123_rtc_softc),
-};
-static devclass_t pcf2123_rtc_devclass;
-
-DRIVER_MODULE(pcf2123_rtc, spibus, pcf2123_rtc_driver, pcf2123_rtc_devclass, 0, 0);
diff --git a/sys/mips/atheros/pcf2123reg.h b/sys/mips/atheros/pcf2123reg.h
deleted file mode 100644
index e3f84d4d5b74..000000000000
--- a/sys/mips/atheros/pcf2123reg.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef __PCF2123REG_H__
-#define	__PCF2123REG_H__
-
-/* Control and status */
-#define	PCF2123_REG_CTRL1		0x0
-#define	PCF2123_REG_CTRL2		0x1
-
-/* Time and date */
-#define	PCF2123_REG_SECONDS		0x2
-#define	PCF2123_REG_MINUTES		0x3
-#define	PCF2123_REG_HOURS		0x4
-#define	PCF2123_REG_DAYS		0x5
-#define	PCF2123_REG_WEEKDAYS		0x6
-#define	PCF2123_REG_MONTHS		0x7
-#define	PCF2123_REG_YEARS		0x8
-
-/* Alarm registers */
-#define	PCF2123_REG_MINUTE_ALARM	0x9
-#define	PCF2123_REG_HOUR_ALARM		0xA
-#define	PCF2123_REG_DAY_ALARM		0xB
-#define	PCF2123_REG_WEEKDAY_ALARM	0xC
-
-/* Offset */
-#define	PCF2123_REG_OFFSET		0xD
-
-/* Timer */
-#define	PCF2123_REG_TIMER_CLKOUT	0xE
-#define	PCF2123_REG_COUNTDOWN_TIMER	0xF
-
-/* Commands */
-#define	PCF2123_CMD_READ	(1 << 7)
-#define	PCF2123_CMD_WRITE	(0 << 7)
-
-#define	PCF2123_READ(reg)	(PCF2123_CMD_READ | (1 << 4) | (reg))
-#define	PCF2123_WRITE(reg)	(PCF2123_CMD_WRITE | (1 << 4) | (reg))
-
-#endif /* __PCF2123REG_H__ */
diff --git a/sys/mips/atheros/qca953x_chip.c b/sys/mips/atheros/qca953x_chip.c
deleted file mode 100644
index 88127b4ac691..000000000000
--- a/sys/mips/atheros/qca953x_chip.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/*-
- * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/qca953xreg.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_setup.h>
-
-#include <mips/atheros/ar71xx_chip.h>
-
-#include <mips/atheros/qca953x_chip.h>
-
-static void
-qca953x_chip_detect_mem_size(void)
-{
-}
-
-static void
-qca953x_chip_detect_sys_frequency(void)
-{
-	unsigned long ref_rate;
-	unsigned long cpu_rate;
-	unsigned long ddr_rate;
-	unsigned long ahb_rate;
-	uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
-	uint32_t cpu_pll, ddr_pll;
-	uint32_t bootstrap;
-
-	bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP);
-	if (bootstrap &	QCA953X_BOOTSTRAP_REF_CLK_40)
-		ref_rate = 40 * 1000 * 1000;
-	else
-		ref_rate = 25 * 1000 * 1000;
-
-	pll = ATH_READ_REG(QCA953X_PLL_CPU_CONFIG_REG);
-	out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-		  QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-		  QCA953X_PLL_CPU_CONFIG_REFDIV_MASK;
-	nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) &
-	       QCA953X_PLL_CPU_CONFIG_NINT_MASK;
-	frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-	       QCA953X_PLL_CPU_CONFIG_NFRAC_MASK;
-
-	cpu_pll = nint * ref_rate / ref_div;
-	cpu_pll += frac * (ref_rate >> 6) / ref_div;
-	cpu_pll /= (1 << out_div);
-
-	pll = ATH_READ_REG(QCA953X_PLL_DDR_CONFIG_REG);
-	out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-		  QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-		  QCA953X_PLL_DDR_CONFIG_REFDIV_MASK;
-	nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) &
-	       QCA953X_PLL_DDR_CONFIG_NINT_MASK;
-	frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-	       QCA953X_PLL_DDR_CONFIG_NFRAC_MASK;
-
-	ddr_pll = nint * ref_rate / ref_div;
-	ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4);
-	ddr_pll /= (1 << out_div);
-
-	clk_ctrl = ATH_READ_REG(QCA953X_PLL_CLK_CTRL_REG);
-
-	postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
-		  QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
-		cpu_rate = ref_rate;
-	else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
-		cpu_rate = cpu_pll / (postdiv + 1);
-	else
-		cpu_rate = ddr_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
-		  QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
-		ddr_rate = ref_rate;
-	else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
-		ddr_rate = ddr_pll / (postdiv + 1);
-	else
-		ddr_rate = cpu_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
-		  QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS)
-		ahb_rate = ref_rate;
-	else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL)
-		ahb_rate = ddr_pll / (postdiv + 1);
-	else
-		ahb_rate = cpu_pll / (postdiv + 1);
-
-	u_ar71xx_ddr_freq = ddr_rate;
-	u_ar71xx_cpu_freq = cpu_rate;
-	u_ar71xx_ahb_freq = ahb_rate;
-
-	u_ar71xx_wdt_freq = ref_rate;
-	u_ar71xx_uart_freq = ref_rate;
-	u_ar71xx_mdio_freq = ref_rate;
-	u_ar71xx_refclk = ref_rate;
-}
-
-static void
-qca953x_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg | mask);
-}
-
-static void
-qca953x_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg & ~mask);
-}
-
-static int
-qca953x_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-qca953x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-
-	/* XXX TODO */
-	return;
-}
-
-static void
-qca953x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-	switch (unit) {
-	case 0:
-		ATH_WRITE_REG(QCA953X_PLL_ETH_XMII_CONTROL_REG, pll);
-		break;
-	case 1:
-		/* nothing */
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-qca953x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE:
-		ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_PCIE);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_WMAC:
-		ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_WMAC);
-		break;
-	default:
-		printf("%s: invalid flush (%d)\n", __func__, id);
-	}
-}
-
-static uint32_t
-qca953x_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch (speed) {
-	case 10:
-		pll = QCA953X_PLL_VAL_10;
-		break;
-	case 100:
-		pll = QCA953X_PLL_VAL_100;
-		break;
-	case 1000:
-		pll = QCA953X_PLL_VAL_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-	return (pll);
-}
-
-static void
-qca953x_chip_reset_ethernet_switch(void)
-{
-}
-
-static void
-qca953x_configure_gmac(uint32_t gmac_cfg)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA953X_GMAC_REG_ETH_CFG);
-	printf("%s: ETH_CFG=0x%08x\n", __func__, reg);
-	reg &= ~(QCA953X_ETH_CFG_SW_ONLY_MODE |
-	    QCA953X_ETH_CFG_SW_PHY_SWAP |
-	    QCA953X_ETH_CFG_SW_APB_ACCESS |
-	    QCA953X_ETH_CFG_SW_ACC_MSB_FIRST);
-
-	reg |= gmac_cfg;
-	ATH_WRITE_REG(QCA953X_GMAC_REG_ETH_CFG, reg);
-}
-
-static void
-qca953x_chip_init_usb_peripheral(void)
-{
-	uint32_t bootstrap;
-
-	bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP);
-
-	ar71xx_device_stop(QCA953X_RESET_USBSUS_OVERRIDE);
-	DELAY(1000);
-
-	ar71xx_device_start(QCA953X_RESET_USB_PHY);
-	DELAY(1000);
-
-	ar71xx_device_start(QCA953X_RESET_USB_PHY_ANALOG);
-	DELAY(1000);
-
-	ar71xx_device_start(QCA953X_RESET_USB_HOST);
-	DELAY(1000);
-}
-
-static void
-qca953x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode)
-{
-
-	/*
-	 * XXX !
-	 *
-	 * Nothing to see here; although gmac0 can have its
-	 * MII configuration changed, the register values
-	 * are slightly different.
-	 */
-}
-
-/*
- * XXX TODO: fetch default MII divider configuration
- */
-
-static void
-qca953x_chip_reset_wmac(void)
-{
-
-	/* XXX TODO */
-}
-
-static void
-qca953x_chip_init_gmac(void)
-{
-	long gmac_cfg;
-
-	if (resource_long_value("qca953x_gmac", 0, "gmac_cfg",
-	    &gmac_cfg) == 0) {
-		printf("%s: gmac_cfg=0x%08lx\n",
-		    __func__,
-		    (long) gmac_cfg);
-		qca953x_configure_gmac((uint32_t) gmac_cfg);
-	}
-}
-
-/*
- * Reset the NAND Flash Controller.
- *
- * + active=1 means "make it active".
- * + active=0 means "make it inactive".
- */
-static void
-qca953x_chip_reset_nfc(int active)
-{
-}
-
-/*
- * Configure the GPIO output mux setup.
- *
- * The QCA953x has an output mux which allowed
- * certain functions to be configured on any pin.
- * Specifically, the switch PHY link LEDs and
- * WMAC external RX LNA switches are not limited to
- * a specific GPIO pin.
- */
-static void
-qca953x_chip_gpio_output_configure(int gpio, uint8_t func)
-{
-	uint32_t reg, s;
-	uint32_t t;
-
-	if (gpio > QCA953X_GPIO_COUNT)
-		return;
-
-	reg = QCA953X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4);
-	s = 8 * (gpio % 4);
-
-	/* read-modify-write */
-	t = ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-	t &= ~(0xff << s);
-	t |= func << s;
-	ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t);
-
-	/* flush write */
-	ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-}
-
-struct ar71xx_cpu_def qca953x_chip_def = {
-	&qca953x_chip_detect_mem_size,
-	&qca953x_chip_detect_sys_frequency,
-	&qca953x_chip_device_stop,
-	&qca953x_chip_device_start,
-	&qca953x_chip_device_stopped,
-	&qca953x_chip_set_pll_ge,
-	&qca953x_chip_set_mii_speed,
-	&qca953x_chip_set_mii_if,
-	&qca953x_chip_get_eth_pll,
-	&qca953x_chip_ddr_flush,
-	&qca953x_chip_init_usb_peripheral,
-	&qca953x_chip_reset_ethernet_switch,
-	&qca953x_chip_reset_wmac,
-	&qca953x_chip_init_gmac,
-	&qca953x_chip_reset_nfc,
-	&qca953x_chip_gpio_output_configure,
-};
diff --git a/sys/mips/atheros/qca953x_chip.h b/sys/mips/atheros/qca953x_chip.h
deleted file mode 100644
index 6ad433f63d7b..000000000000
--- a/sys/mips/atheros/qca953x_chip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*-
- * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__QCA953X_CHIP_H__
-#define	__QCA953X_CHIP_H__
-
-extern struct ar71xx_cpu_def qca953x_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/qca953xreg.h b/sys/mips/atheros/qca953xreg.h
deleted file mode 100644
index 596b08816e85..000000000000
--- a/sys/mips/atheros/qca953xreg.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/*-
- * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	__QCA953XREG_H__
-#define	__QCA953XREG_H__
-
-#define	BIT(x)				(1 << (x))
-
-/* Revision ID information */
-#define	REV_ID_MAJOR_QCA9533		0x0140
-#define	REV_ID_MAJOR_QCA9533_V2		0x0160
-#define	QCA953X_REV_ID_REVISION_MASK	0xf
-
-/* Big enough to cover APB and SPI, and most peripherals */
-/*
- * it needs to cover SPI because right now the if_ath_ahb
- * code uses rman to map in the SPI address into memory
- * to read data instead of us squirreling it away at early
- * boot-time and using the firmware interface.
- *
- * if_ath_ahb.c should use the same firmware interface
- * that if_ath_pci.c uses.
- */
-#define	QCA953X_GMAC_BASE      (AR71XX_APB_BASE + 0x00070000)
-#define	QCA953X_GMAC_SIZE      0x14
-#define	QCA953X_WMAC_BASE      (AR71XX_APB_BASE + 0x00100000)
-#define	QCA953X_WMAC_SIZE      0x20000
-#define	QCA953X_EHCI_BASE      0x1b000000
-#define	QCA953X_EHCI_SIZE      0x200
-#define	QCA953X_SRIF_BASE      (AR71XX_APB_BASE + 0x00116000)
-#define	QCA953X_SRIF_SIZE      0x1000
-
-#define	QCA953X_PCI_CFG_BASE0  0x14000000
-#define	QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000)
-#define	QCA953X_PCI_CRP_BASE0  (AR71XX_APB_BASE + 0x000c0000)
-#define	QCA953X_PCI_MEM_BASE0  0x10000000
-#define	QCA953X_PCI_MEM_SIZE   0x02000000
-
-/* PLL Block */
-#define	QCA953X_PLL_CPU_CONFIG_REG		(AR71XX_PLL_CPU_BASE + 0x00)
-#define	QCA953X_PLL_DDR_CONFIG_REG		(AR71XX_PLL_CPU_BASE + 0x04)
-#define	QCA953X_PLL_CLK_CTRL_REG		(AR71XX_PLL_CPU_BASE + 0x08)
-
-#define	QCA953X_PLL_ETH_XMII_CONTROL_REG	(AR71XX_PLL_CPU_BASE + 0x2c)
-#define	QCA953X_PLL_ETH_SGMII_CONTROL_REG	(AR71XX_PLL_CPU_BASE + 0x48)
-
-#define	QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT	0
-#define	QCA953X_PLL_CPU_CONFIG_NFRAC_MASK	0x3f
-#define	QCA953X_PLL_CPU_CONFIG_NINT_SHIFT	6
-#define	QCA953X_PLL_CPU_CONFIG_NINT_MASK	0x3f
-#define	QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT	12
-#define	QCA953X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f
-#define	QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT	19
-#define	QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK	0x3
-
-#define	QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT	0
-#define	QCA953X_PLL_DDR_CONFIG_NFRAC_MASK	0x3ff
-#define	QCA953X_PLL_DDR_CONFIG_NINT_SHIFT	10
-#define	QCA953X_PLL_DDR_CONFIG_NINT_MASK	0x3f
-#define	QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT	16
-#define	QCA953X_PLL_DDR_CONFIG_REFDIV_MASK	0x1f
-#define	QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT	23
-#define	QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK	0x7
-
-#define	QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS	BIT(2)
-#define	QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS	BIT(3)
-#define	QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS	BIT(4)
-#define	QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT	5
-#define	QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK	0x1f
-#define	QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT	10
-#define	QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK	0x1f
-#define	QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT	15
-#define	QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK	0x1f
-#define	QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL	BIT(20)
-#define	QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL	BIT(21)
-#define	QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL	BIT(24)
-
-#define	QCA953X_PLL_VAL_1000			0x16000000
-#define	QCA953X_PLL_VAL_100			0x00000101
-#define	QCA953X_PLL_VAL_10			0x00001616
-
-/* Reset block */
-
-#define	QCA953X_RESET_REG_RESET_MODULE		(AR71XX_RST_BLOCK_BASE + 0x1c)
-#define	QCA953X_RESET_USB_EXT_PWR		BIT(29)
-#define	QCA953X_RESET_EXTERNAL			BIT(28)
-#define	QCA953X_RESET_RTC			BIT(27)
-#define	QCA953X_RESET_FULL_CHIP			BIT(24)
-#define	QCA953X_RESET_GE1_MDIO			BIT(23)
-#define	QCA953X_RESET_GE0_MDIO			BIT(22)
-#define	QCA953X_RESET_CPU_NMI			BIT(21)
-#define	QCA953X_RESET_CPU_COLD			BIT(20)
-#define	QCA953X_RESET_DDR			BIT(16)
-#define	QCA953X_RESET_USB_PHY_PLL_PWD_EXT	BIT(15)
-#define	QCA953X_RESET_GE1_MAC			BIT(13)
-#define	QCA953X_RESET_ETH_SWITCH_ANALOG		BIT(12)
-#define	QCA953X_RESET_USB_PHY_ANALOG		BIT(11)
-#define	QCA953X_RESET_GE0_MAC			BIT(9)
-#define	QCA953X_RESET_ETH_SWITCH		BIT(8)
-#define	QCA953X_RESET_PCIE_PHY			BIT(7)
-#define	QCA953X_RESET_PCIE			BIT(6)
-#define	QCA953X_RESET_USB_HOST			BIT(5)
-#define	QCA953X_RESET_USB_PHY			BIT(4)
-#define	QCA953X_RESET_USBSUS_OVERRIDE		BIT(3)
-
-#define	QCA953X_RESET_REG_BOOTSTRAP		(AR71XX_RST_BLOCK_BASE + 0xb0)
-#define	QCA953X_BOOTSTRAP_SW_OPTION2		BIT(12)
-#define	QCA953X_BOOTSTRAP_SW_OPTION1		BIT(11)
-#define	QCA953X_BOOTSTRAP_EJTAG_MODE		BIT(5)
-#define	QCA953X_BOOTSTRAP_REF_CLK_40		BIT(4)
-#define	QCA953X_BOOTSTRAP_SDRAM_DISABLED	BIT(1)
-#define	QCA953X_BOOTSTRAP_DDR1			BIT(0)
-
-#define	QCA953X_RESET_REG_EXT_INT_STATUS	(AR71XX_RST_BLOCK_BASE + 0xac)
-
-#define	QCA953X_DDR_REG_FLUSH_GE0		(AR71XX_APB_BASE + 0x9c)
-#define	QCA953X_DDR_REG_FLUSH_GE1		(AR71XX_APB_BASE + 0xa0)
-#define	QCA953X_DDR_REG_FLUSH_USB		(AR71XX_APB_BASE + 0xa4)
-#define	QCA953X_DDR_REG_FLUSH_PCIE		(AR71XX_APB_BASE + 0xa8)
-#define	QCA953X_DDR_REG_FLUSH_WMAC		(AR71XX_APB_BASE + 0xac)
-
-/* GPIO block */
-#define	QCA953X_GPIO_REG_OUT_FUNC0	0x2c
-#define	QCA953X_GPIO_REG_OUT_FUNC1	0x30
-#define	QCA953X_GPIO_REG_OUT_FUNC2	0x34
-#define	QCA953X_GPIO_REG_OUT_FUNC3	0x38
-#define	QCA953X_GPIO_REG_OUT_FUNC4	0x3c
-#define	QCA953X_GPIO_REG_IN_ENABLE0	0x44
-#define	QCA953X_GPIO_REG_FUNC		0x6c
-
-#define	QCA953X_GPIO_OUT_MUX_SPI_CS1	10
-#define	QCA953X_GPIO_OUT_MUX_SPI_CS2	11
-#define	QCA953X_GPIO_OUT_MUX_SPI_CS0	9
-#define	QCA953X_GPIO_OUT_MUX_SPI_CLK	8
-#define	QCA953X_GPIO_OUT_MUX_SPI_MOSI	12
-#define	QCA953X_GPIO_OUT_MUX_LED_LINK1	41
-#define	QCA953X_GPIO_OUT_MUX_LED_LINK2	42
-#define	QCA953X_GPIO_OUT_MUX_LED_LINK3	43
-#define	QCA953X_GPIO_OUT_MUX_LED_LINK4	44
-#define	QCA953X_GPIO_OUT_MUX_LED_LINK5	45
-
-#define	QCA953X_GPIO_COUNT		18
-
-/* GMAC block */
-#define	QCA953X_GMAC_REG_ETH_CFG	(QCA953X_GMAC_BASE + 0x00)
-
-#define	QCA953X_ETH_CFG_SW_ONLY_MODE		BIT(6)
-#define	QCA953X_ETH_CFG_SW_PHY_SWAP		BIT(7)
-#define	QCA953X_ETH_CFG_SW_APB_ACCESS		BIT(9)
-#define	QCA953X_ETH_CFG_SW_ACC_MSB_FIRST	BIT(13)
-
-/* SRIF block */
-#define	QCA953X_SRIF_CPU_DPLL1_REG		0x1c0
-#define	QCA953X_SRIF_CPU_DPLL2_REG		0x1c4
-#define	QCA953X_SRIF_CPU_DPLL3_REG		0x1c8
-
-#define	QCA953X_SRIF_DDR_DPLL1_REG		0x240
-#define	QCA953X_SRIF_DDR_DPLL2_REG		0x244
-#define	QCA953X_SRIF_DDR_DPLL3_REG		0x248
-
-#define	QCA953X_SRIF_DPLL1_REFDIV_SHIFT		27
-#define	QCA953X_SRIF_DPLL1_REFDIV_MASK		0x1f
-#define	QCA953X_SRIF_DPLL1_NINT_SHIFT		18
-#define	QCA953X_SRIF_DPLL1_NINT_MASK		0x1ff
-#define	QCA953X_SRIF_DPLL1_NFRAC_MASK		0x0003ffff
-
-#define	QCA953X_SRIF_DPLL2_LOCAL_PLL		BIT(30)
-#define	QCA953X_SRIF_DPLL2_OUTDIV_SHIFT		13
-#define	QCA953X_SRIF_DPLL2_OUTDIV_MASK		0x7
-
-#endif	/* __QCA953XREG_H__ */
diff --git a/sys/mips/atheros/qca955x_chip.c b/sys/mips/atheros/qca955x_chip.c
deleted file mode 100644
index d963cc6f2b68..000000000000
--- a/sys/mips/atheros/qca955x_chip.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/*-
- * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/vmparam.h>
-
-#include <mips/atheros/ar71xxreg.h>
-//#include <mips/atheros/ar934xreg.h>
-#include <mips/atheros/qca955xreg.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_setup.h>
-
-#include <mips/atheros/ar71xx_chip.h>
-
-#include <mips/atheros/qca955x_chip.h>
-
-static void
-qca955x_chip_detect_mem_size(void)
-{
-}
-
-static void
-qca955x_chip_detect_sys_frequency(void)
-{
-	unsigned long ref_rate;
-	unsigned long cpu_rate;
-	unsigned long ddr_rate;
-	unsigned long ahb_rate;
-	uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
-	uint32_t cpu_pll, ddr_pll;
-	uint32_t bootstrap;
-
-	bootstrap = ATH_READ_REG(QCA955X_RESET_REG_BOOTSTRAP);
-	if (bootstrap &	QCA955X_BOOTSTRAP_REF_CLK_40)
-		ref_rate = 40 * 1000 * 1000;
-	else
-		ref_rate = 25 * 1000 * 1000;
-
-	pll = ATH_READ_REG(QCA955X_PLL_CPU_CONFIG_REG);
-	out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-		  QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-		  QCA955X_PLL_CPU_CONFIG_REFDIV_MASK;
-	nint = (pll >> QCA955X_PLL_CPU_CONFIG_NINT_SHIFT) &
-	       QCA955X_PLL_CPU_CONFIG_NINT_MASK;
-	frac = (pll >> QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-	       QCA955X_PLL_CPU_CONFIG_NFRAC_MASK;
-
-	cpu_pll = nint * ref_rate / ref_div;
-	cpu_pll += frac * ref_rate / (ref_div * (1 << 6));
-	cpu_pll /= (1 << out_div);
-
-	pll = ATH_READ_REG(QCA955X_PLL_DDR_CONFIG_REG);
-	out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-		  QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-		  QCA955X_PLL_DDR_CONFIG_REFDIV_MASK;
-	nint = (pll >> QCA955X_PLL_DDR_CONFIG_NINT_SHIFT) &
-	       QCA955X_PLL_DDR_CONFIG_NINT_MASK;
-	frac = (pll >> QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-	       QCA955X_PLL_DDR_CONFIG_NFRAC_MASK;
-
-	ddr_pll = nint * ref_rate / ref_div;
-	ddr_pll += frac * ref_rate / (ref_div * (1 << 10));
-	ddr_pll /= (1 << out_div);
-
-	clk_ctrl = ATH_READ_REG(QCA955X_PLL_CLK_CTRL_REG);
-
-	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
-		  QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
-		cpu_rate = ref_rate;
-	else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
-		cpu_rate = ddr_pll / (postdiv + 1);
-	else
-		cpu_rate = cpu_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
-		  QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
-		ddr_rate = ref_rate;
-	else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
-		ddr_rate = cpu_pll / (postdiv + 1);
-	else
-		ddr_rate = ddr_pll / (postdiv + 1);
-
-	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
-		  QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK;
-
-	if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS)
-		ahb_rate = ref_rate;
-	else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL)
-		ahb_rate = ddr_pll / (postdiv + 1);
-	else
-		ahb_rate = cpu_pll / (postdiv + 1);
-
-	u_ar71xx_ddr_freq = ddr_rate;
-	u_ar71xx_cpu_freq = cpu_rate;
-	u_ar71xx_ahb_freq = ahb_rate;
-
-	u_ar71xx_wdt_freq = ref_rate;
-	u_ar71xx_uart_freq = ref_rate;
-	u_ar71xx_mdio_freq = ref_rate;
-	u_ar71xx_refclk = ref_rate;
-}
-
-static void
-qca955x_chip_device_stop(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(QCA955X_RESET_REG_RESET_MODULE, reg | mask);
-}
-
-static void
-qca955x_chip_device_start(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE);
-	ATH_WRITE_REG(QCA955X_RESET_REG_RESET_MODULE, reg & ~mask);
-}
-
-static int
-qca955x_chip_device_stopped(uint32_t mask)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE);
-	return ((reg & mask) == mask);
-}
-
-static void
-qca955x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-
-	/* XXX TODO */
-	return;
-}
-
-static void
-qca955x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
-{
-	switch (unit) {
-	case 0:
-		ATH_WRITE_REG(QCA955X_PLL_ETH_XMII_CONTROL_REG, pll);
-		break;
-	case 1:
-		ATH_WRITE_REG(QCA955X_PLL_ETH_SGMII_CONTROL_REG, pll);
-		break;
-	default:
-		printf("%s: invalid PLL set for arge unit: %d\n",
-		    __func__, unit);
-		return;
-	}
-}
-
-static void
-qca955x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
-{
-
-	switch (id) {
-	case AR71XX_CPU_DDR_FLUSH_GE0:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_GE0);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_GE1:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_GE1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_USB:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_USB);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_PCIE);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_WMAC:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_WMAC);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_PCIE_EP:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_SRC1);
-		break;
-	case AR71XX_CPU_DDR_FLUSH_CHECKSUM:
-		ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_SRC2);
-		break;
-	default:
-		printf("%s: invalid flush (%d)\n", __func__, id);
-	}
-}
-
-static uint32_t
-qca955x_chip_get_eth_pll(unsigned int mac, int speed)
-{
-	uint32_t pll;
-
-	switch (speed) {
-	case 10:
-		pll = QCA955X_PLL_VAL_10;
-		break;
-	case 100:
-		pll = QCA955X_PLL_VAL_100;
-		break;
-	case 1000:
-		pll = QCA955X_PLL_VAL_1000;
-		break;
-	default:
-		printf("%s%d: invalid speed %d\n", __func__, mac, speed);
-		pll = 0;
-	}
-	return (pll);
-}
-
-static void
-qca955x_chip_reset_ethernet_switch(void)
-{
-#if 0
-	ar71xx_device_stop(AR934X_RESET_ETH_SWITCH);
-	DELAY(100);
-	ar71xx_device_start(AR934X_RESET_ETH_SWITCH);
-	DELAY(100);
-#endif
-}
-
-static void
-qca955x_configure_gmac(uint32_t gmac_cfg)
-{
-	uint32_t reg;
-
-	reg = ATH_READ_REG(QCA955X_GMAC_REG_ETH_CFG);
-	printf("%s: ETH_CFG=0x%08x\n", __func__, reg);
-	reg &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
-	reg |= gmac_cfg;
-	ATH_WRITE_REG(QCA955X_GMAC_REG_ETH_CFG, reg);
-}
-
-static void
-qca955x_chip_init_usb_peripheral(void)
-{
-}
-
-static void
-qca955x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode)
-{
-
-	/*
-	 * XXX !
-	 *
-	 * Nothing to see here; although gmac0 can have its
-	 * MII configuration changed, the register values
-	 * are slightly different.
-	 */
-}
-
-/*
- * XXX TODO: fetch default MII divider configuration
- */
-
-static void
-qca955x_chip_reset_wmac(void)
-{
-
-	/* XXX TODO */
-}
-
-static void
-qca955x_chip_init_gmac(void)
-{
-	long gmac_cfg;
-
-	if (resource_long_value("qca955x_gmac", 0, "gmac_cfg",
-	    &gmac_cfg) == 0) {
-		printf("%s: gmac_cfg=0x%08lx\n",
-		    __func__,
-		    (long) gmac_cfg);
-		qca955x_configure_gmac((uint32_t) gmac_cfg);
-	}
-}
-
-/*
- * Reset the NAND Flash Controller.
- *
- * + active=1 means "make it active".
- * + active=0 means "make it inactive".
- */
-static void
-qca955x_chip_reset_nfc(int active)
-{
-#if 0
-	if (active) {
-		ar71xx_device_start(AR934X_RESET_NANDF);
-		DELAY(100);
-
-		ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG);
-		DELAY(250);
-	} else {
-		ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG);
-		DELAY(250);
-
-		ar71xx_device_stop(AR934X_RESET_NANDF);
-		DELAY(100);
-	}
-#endif
-}
-
-/*
- * Configure the GPIO output mux setup.
- *
- * The QCA955x has an output mux which allowed
- * certain functions to be configured on any pin.
- * Specifically, the switch PHY link LEDs and
- * WMAC external RX LNA switches are not limited to
- * a specific GPIO pin.
- */
-static void
-qca955x_chip_gpio_output_configure(int gpio, uint8_t func)
-{
-	uint32_t reg, s;
-	uint32_t t;
-
-	if (gpio > QCA955X_GPIO_COUNT)
-		return;
-
-	reg = QCA955X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4);
-	s = 8 * (gpio % 4);
-
-	/* read-modify-write */
-	t = ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-	t &= ~(0xff << s);
-	t |= func << s;
-	ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t);
-
-	/* flush write */
-	ATH_READ_REG(AR71XX_GPIO_BASE + reg);
-}
-
-struct ar71xx_cpu_def qca955x_chip_def = {
-	&qca955x_chip_detect_mem_size,
-	&qca955x_chip_detect_sys_frequency,
-	&qca955x_chip_device_stop,
-	&qca955x_chip_device_start,
-	&qca955x_chip_device_stopped,
-	&qca955x_chip_set_pll_ge,
-	&qca955x_chip_set_mii_speed,
-	&qca955x_chip_set_mii_if,
-	&qca955x_chip_get_eth_pll,
-	&qca955x_chip_ddr_flush,
-	&qca955x_chip_init_usb_peripheral,
-	&qca955x_chip_reset_ethernet_switch,
-	&qca955x_chip_reset_wmac,
-	&qca955x_chip_init_gmac,
-	&qca955x_chip_reset_nfc,
-	&qca955x_chip_gpio_output_configure,
-};
diff --git a/sys/mips/atheros/qca955x_chip.h b/sys/mips/atheros/qca955x_chip.h
deleted file mode 100644
index b36d73f895a1..000000000000
--- a/sys/mips/atheros/qca955x_chip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*-
- * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef	__QCA955X_CHIP_H__
-#define	__QCA955X_CHIP_H__
-
-extern struct ar71xx_cpu_def qca955x_chip_def;
-
-#endif
diff --git a/sys/mips/atheros/qca955x_pci.c b/sys/mips/atheros/qca955x_pci.c
deleted file mode 100644
index 48edec9cc5c2..000000000000
--- a/sys/mips/atheros/qca955x_pci.c
+++ /dev/null
@@ -1,606 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Luiz Otavio O Souza.
- * Copyright (c) 2015, Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ar71xx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr_machdep.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/atheros/ar71xxreg.h> /* XXX aim to eliminate this! */
-#include <mips/atheros/qca955xreg.h>
-#include <mips/atheros/ar71xx_setup.h>
-#include <mips/atheros/ar71xx_pci_bus_space.h>
-
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#undef	AR724X_PCI_DEBUG
-//#define AR724X_PCI_DEBUG
-#ifdef AR724X_PCI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * This is a PCI controller for the QCA955x and later SoCs.
- * It needs to be aware of >1 PCIe host endpoints.
- *
- * XXX TODO; it may be nice to merge this with ar724x_pci.c;
- * they're very similar.
- */
-struct ar71xx_pci_irq {
-	struct ar71xx_pci_softc *sc;
-	int irq;
-};
-
-struct ar71xx_pci_softc {
-	device_t		sc_dev;
-
-	int			sc_busno;
-	struct rman		sc_mem_rman;
-	struct rman		sc_irq_rman;
-
-	uint32_t		sc_pci_reg_base;	/* XXX until bus stuff is done */
-	uint32_t		sc_pci_crp_base;	/* XXX until bus stuff is done */
-	uint32_t		sc_pci_ctrl_base;	/* XXX until bus stuff is done */
-	uint32_t		sc_pci_mem_base;	/* XXX until bus stuff is done */
-	uint32_t		sc_pci_membase_limit;
-
-	struct intr_event	*sc_eventstab[AR71XX_PCI_NIRQS];
-	mips_intrcnt_t		sc_intr_counter[AR71XX_PCI_NIRQS];
-	struct ar71xx_pci_irq	sc_pci_irq[AR71XX_PCI_NIRQS];
-	struct resource		*sc_irq;
-	void			*sc_ih;
-};
-
-static int qca955x_pci_setup_intr(device_t, device_t, struct resource *, int, 
-		    driver_filter_t *, driver_intr_t *, void *, void **);
-static int qca955x_pci_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-static int qca955x_pci_intr(void *);
-
-static void
-qca955x_pci_write(uint32_t reg, uint32_t offset, uint32_t data, int bytes)
-{
-	uint32_t val, mask, shift;
-
-	/* Register access is 32-bit aligned */
-	shift = (offset & 3) * 8;
-	if (bytes % 4)
-		mask = (1 << (bytes * 8)) - 1;
-	else
-		mask = 0xffffffff;
-
-	val = ATH_READ_REG(reg + (offset & ~3));
-	val &= ~(mask << shift);
-	val |= ((data & mask) << shift);
-	ATH_WRITE_REG(reg + (offset & ~3), val);
-
-	dprintf("%s: %#x/%#x addr=%#x, data=%#x(%#x), bytes=%d\n", __func__, 
-	    reg, reg + (offset & ~3), offset, data, val, bytes);
-}
-
-static uint32_t
-qca955x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, 
-    u_int reg, int bytes)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	uint32_t data, shift, mask;
-
-	/* Register access is 32-bit aligned */
-	shift = (reg & 3) * 8;
-
-	/* Create a mask based on the width, post-shift */
-	if (bytes == 2)
-		mask = 0xffff;
-	else if (bytes == 1)
-		mask = 0xff;
-	else
-		mask = 0xffffffff;
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot,
-	    func, reg, bytes);
-
-	if ((bus == 0) && (slot == 0) && (func == 0))
-		data = ATH_READ_REG(sc->sc_pci_reg_base + (reg & ~3));
-	else
-		data = -1;
-
-	/* Get request bytes from 32-bit word */
-	data = (data >> shift) & mask;
-
-	dprintf("%s: read 0x%x\n", __func__, data);
-
-	return (data);
-}
-
-static void
-qca955x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
-    u_int reg, uint32_t data, int bytes)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-
-	dprintf("%s: tag (%x, %x, %x) reg %d(%d): %x\n", __func__, bus, slot, 
-	    func, reg, bytes, data);
-
-	if ((bus != 0) || (slot != 0) || (func != 0))
-		return;
-
-	qca955x_pci_write(sc->sc_pci_reg_base, reg, data, bytes);
-}
-
-static void
-qca955x_pci_mask_irq(void *source)
-{
-	uint32_t reg;
-	struct ar71xx_pci_irq *pirq = source;
-	struct ar71xx_pci_softc *sc = pirq->sc;
-
-	/* XXX - Only one interrupt ? Only one device ? */
-	if (pirq->irq != AR71XX_PCI_IRQ_START)
-		return;
-
-	/* Update the interrupt mask reg */
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK);
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK,
-	    reg & ~QCA955X_PCI_INTR_DEV0);
-
-	/* Clear any pending interrupt */
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS);
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS,
-	    reg | QCA955X_PCI_INTR_DEV0);
-}
-
-static void
-qca955x_pci_unmask_irq(void *source)
-{
-	uint32_t reg;
-	struct ar71xx_pci_irq *pirq = source;
-	struct ar71xx_pci_softc *sc = pirq->sc;
-
-	if (pirq->irq != AR71XX_PCI_IRQ_START)
-		return;
-
-	/* Update the interrupt mask reg */
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK);
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK,
-	    reg | QCA955X_PCI_INTR_DEV0);
-}
-
-static int
-qca955x_pci_setup(device_t dev)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	uint32_t reg;
-
-	/* setup COMMAND register */
-	reg = PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_SERRESPEN |
-	    PCIM_CMD_BACKTOBACK | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN;
-
-	qca955x_pci_write(sc->sc_pci_crp_base, PCIR_COMMAND, reg, 2);
-
-	/* These are the memory/prefetch base/limit parameters */
-	qca955x_pci_write(sc->sc_pci_crp_base, 0x20, sc->sc_pci_membase_limit, 4);
-	qca955x_pci_write(sc->sc_pci_crp_base, 0x24, sc->sc_pci_membase_limit, 4);
-
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET);
-	if (reg != 0x7) {
-		DELAY(100000);
-		ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 0);
-		ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET);
-		DELAY(100);
-		ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 4);
-		ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET);
-		DELAY(100000);
-	}
-
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP, 0x1ffc1);
-	/* Flush write */
-	(void) ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP);
-
-	DELAY(1000);
-
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET);
-	if ((reg & QCA955X_PCI_RESET_LINK_UP) == 0) {
-		device_printf(dev, "no PCIe controller found\n");
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-qca955x_pci_probe(device_t dev)
-{
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-qca955x_pci_attach(device_t dev)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	int unit = device_get_unit(dev);
-	int rid = 0;
-
-	/* Dirty; maybe these could all just be hints */
-	if (unit == 0) {
-		sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE0;
-		sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE0;
-		sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE0;
-		sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE0;
-		/* XXX verify */
-		sc->sc_pci_membase_limit = 0x11f01000;
-	} else if (unit == 1) {
-		sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE1;
-		sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE1;
-		sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE1;
-		sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE1;
-		/* XXX verify */
-		sc->sc_pci_membase_limit = 0x12f01200;
-	} else {
-		device_printf(dev, "%s: invalid unit (%d)\n", __func__, unit);
-		return (ENXIO);
-	}
-
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "qca955x PCI memory window";
-	if (rman_init(&sc->sc_mem_rman) != 0 || 
-	    rman_manage_region(&sc->sc_mem_rman,
-	    sc->sc_pci_mem_base,
-	    sc->sc_pci_mem_base + QCA955X_PCI_MEM_SIZE - 1) != 0) {
-		panic("qca955x_pci_attach: failed to set up I/O rman");
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "qca955x PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, 
-	        AR71XX_PCI_IRQ_END) != 0)
-		panic("qca955x_pci_attach: failed to set up IRQ rman");
-
-	/* Disable interrupts */
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS, 0);
-	ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, 0);
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return (ENXIO);
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC,
-			    qca955x_pci_intr, NULL, sc, &sc->sc_ih))) {
-		device_printf(dev, 
-		    "WARNING: unable to register interrupt handler\n");
-		return (ENXIO);
-	}
-
-	/* Reset PCIe core and PCIe PHY */
-	ar71xx_device_stop(QCA955X_RESET_PCIE);
-	ar71xx_device_stop(QCA955X_RESET_PCIE_PHY);
-	DELAY(100);
-	ar71xx_device_start(QCA955X_RESET_PCIE_PHY);
-	ar71xx_device_start(QCA955X_RESET_PCIE);
-
-	if (qca955x_pci_setup(dev))
-		return (ENXIO);
-
-	/*
-	 * Write initial base address.
-	 *
-	 * I'm not yet sure why this is required and/or why it isn't
-	 * initialised like this.  The AR71xx PCI code initialises
-	 * the PCI windows for each device, but neither it or the
-	 * 724x PCI bridge modules explicitly initialise the BAR.
-	 *
-	 * So before this gets committed, have a chat with jhb@ or
-	 * someone else who knows PCI well and figure out whether
-	 * the initial BAR is supposed to be determined by /other/
-	 * means.
-	 */
-	qca955x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0),
-	    sc->sc_pci_mem_base,
-	    4);
-
-	/* Fixup internal PCI bridge */
-	qca955x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND,
-            PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN
-	    | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK
-	    | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2);
-
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-qca955x_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-qca955x_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	struct ar71xx_pci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static struct resource *
-qca955x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);
-	struct resource *rv;
-	struct rman *rm;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if (flags & RF_ACTIVE) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	} 
-
-	return (rv);
-}
-
-static int
-qca955x_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
-	    child, type, rid, r));
-
-	if (!res) {
-		switch(type) {
-		case SYS_RES_MEMORY:
-		case SYS_RES_IOPORT:
-
-			rman_set_bustag(r, ar71xx_bus_space_pcimem);
-			break;
-		}
-	}
-
-	return (res);
-}
-
-static int
-qca955x_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
-		int flags, driver_filter_t *filt, driver_intr_t *handler,
-		void *arg, void **cookiep)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	event = sc->sc_eventstab[irq];
-	if (event == NULL) {
-		sc->sc_pci_irq[irq].sc = sc;
-		sc->sc_pci_irq[irq].irq = irq;
-		error = intr_event_create(&event, (void *)&sc->sc_pci_irq[irq],
-		    0, irq,
-		    qca955x_pci_mask_irq,
-		    qca955x_pci_unmask_irq,
-		    NULL, NULL,
-		    "pci intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irq] = event;
-			sc->sc_intr_counter[irq] =
-			    mips_intrcnt_create(event->ie_name);
-		}
-		else
-			return error;
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-	    handler, arg, intr_priority(flags), flags, cookiep);
-	mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
-
-	qca955x_pci_unmask_irq(&sc->sc_pci_irq[irq]);
-
-	return (0);
-}
-
-static int
-qca955x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires,
-    void *cookie)
-{
-	struct ar71xx_pci_softc *sc = device_get_softc(dev);
-	int irq, result;
-
-	irq = rman_get_start(ires);
-	if (irq > AR71XX_PCI_IRQ_END)
-		panic("%s: bad irq %d", __func__, irq);
-
-	if (sc->sc_eventstab[irq] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	qca955x_pci_mask_irq(&sc->sc_pci_irq[irq]);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irq] = NULL;
-
-	return (result);
-}
-
-static int
-qca955x_pci_intr(void *arg)
-{
-	struct ar71xx_pci_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq, mask;
-
-	/* There's only one PCIe DDR flush for both PCIe EPs */
-	ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE);
-
-	reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS);
-	mask = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK);
-
-	/*
-	 * Handle only unmasked interrupts
-	 */
-	reg &= mask;
-	/*
-	 * XXX TODO: handle >1 PCIe end point!
-	 */
-	if (reg & QCA955X_PCI_INTR_DEV0) {
-		irq = AR71XX_PCI_IRQ_START;
-		event = sc->sc_eventstab[irq];
-		if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-			printf("Stray IRQ %d\n", irq);
-			return (FILTER_STRAY);
-		}
-
-		/* TODO: frame instead of NULL? */
-		intr_event_handle(event, NULL);
-		mips_intrcnt_inc(sc->sc_intr_counter[irq]);
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static int
-qca955x_pci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static int
-qca955x_pci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-
-	return (pci_get_slot(device));
-}
-
-static device_method_t qca955x_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		qca955x_pci_probe),
-	DEVMETHOD(device_attach,	qca955x_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	qca955x_pci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	qca955x_pci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	qca955x_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, qca955x_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	qca955x_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	qca955x_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	qca955x_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	qca955x_pci_read_config),
-	DEVMETHOD(pcib_write_config,	qca955x_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	qca955x_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t qca955x_pci_driver = {
-	"pcib",
-	qca955x_pci_methods,
-	sizeof(struct ar71xx_pci_softc),
-};
-
-static devclass_t qca955x_pci_devclass;
-
-DRIVER_MODULE(qca955x_pci, nexus, qca955x_pci_driver, qca955x_pci_devclass, 0, 0);
-DRIVER_MODULE(qca955x_pci, apb, qca955x_pci_driver, qca955x_pci_devclass, 0, 0);
diff --git a/sys/mips/atheros/qca955xreg.h b/sys/mips/atheros/qca955xreg.h
deleted file mode 100644
index 51d2ccc575e5..000000000000
--- a/sys/mips/atheros/qca955xreg.h
+++ /dev/null
@@ -1,228 +0,0 @@
-/*-
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	__QCA955XREG_H__
-#define	__QCA955XREG_H__
-
-#define	BIT(x)          (1 << (x))
-
-/* Revision ID information */
-#define	REV_ID_MAJOR_QCA9556		0x0130
-#define	REV_ID_MAJOR_QCA9558		0x1130
-#define	QCA955X_REV_ID_REVISION_MASK	0xf
-
-/* Big enough to cover APB and SPI, and most peripherals */
-/*
- * it needs to cover SPI because right now the if_ath_ahb
- * code uses rman to map in the SPI address into memory
- * to read data instead of us squirreling it away at early
- * boot-time and using the firmware interface.
- *
- * if_ath_ahb.c should use the same firmware interface
- * that if_ath_pci.c uses.
- */
-#define QCA955X_APB_BASE        0x18000000
-#define QCA955X_APB_SIZE        0x08000000
-
-#define	QCA955X_PCI_MEM_BASE0		0x10000000
-#define	QCA955X_PCI_MEM_BASE1		0x12000000
-#define	QCA955X_PCI_MEM_SIZE		0x02000000
-#define	QCA955X_PCI_CFG_BASE0		0x14000000
-#define	QCA955X_PCI_CFG_BASE1		0x16000000
-#define	QCA955X_PCI_CFG_SIZE		0x1000
-#define	QCA955X_PCI_CRP_BASE0		(AR71XX_APB_BASE + 0x000c0000)
-#define	QCA955X_PCI_CRP_BASE1		(AR71XX_APB_BASE + 0x00250000)
-#define	QCA955X_PCI_CRP_SIZE		0x1000
-#define	QCA955X_PCI_CTRL_BASE0		(AR71XX_APB_BASE + 0x000f0000)
-#define	QCA955X_PCI_CTRL_BASE1		(AR71XX_APB_BASE + 0x00280000)
-#define	QCA955X_PCI_CTRL_SIZE		0x100
-
-#define	QCA955X_WMAC_BASE		(AR71XX_APB_BASE + 0x00100000)
-#define	QCA955X_WMAC_SIZE		0x20000
-#define	QCA955X_EHCI0_BASE		0x1b000000
-#define	QCA955X_EHCI1_BASE		0x1b400000
-#define	QCA955X_EHCI_SIZE		0x1000
-
-/* PLL block */
-
-#define	QCA955X_PLL_CPU_CONFIG_REG		(AR71XX_PLL_CPU_BASE + 0x00)
-#define	QCA955X_PLL_DDR_CONFIG_REG		(AR71XX_PLL_CPU_BASE + 0x04)
-#define	QCA955X_PLL_CLK_CTRL_REG		(AR71XX_PLL_CPU_BASE + 0x08)
-
-#define	QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT	0
-#define	QCA955X_PLL_CPU_CONFIG_NFRAC_MASK	0x3f
-#define	QCA955X_PLL_CPU_CONFIG_NINT_SHIFT	6
-#define	QCA955X_PLL_CPU_CONFIG_NINT_MASK	0x3f
-#define	QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT	12
-#define	QCA955X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f
-#define	QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT	19
-#define	QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK	0x3
-
-#define	QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT	0
-#define	QCA955X_PLL_DDR_CONFIG_NFRAC_MASK	0x3ff
-#define	QCA955X_PLL_DDR_CONFIG_NINT_SHIFT	10
-#define	QCA955X_PLL_DDR_CONFIG_NINT_MASK	0x3f
-#define	QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT	16
-#define	QCA955X_PLL_DDR_CONFIG_REFDIV_MASK	0x1f
-#define	QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT	23
-#define	QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK	0x7
-
-#define	QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS		BIT(2)
-#define	QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS		BIT(3)
-#define	QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS		BIT(4)
-#define	QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT		5
-#define	QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK		0x1f
-#define	QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT		10
-#define	QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK		0x1f
-#define	QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT		15
-#define	QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK		0x1f
-#define	QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL		BIT(20)
-#define	QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL		BIT(21)
-#define	QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL		BIT(24)
-
-#define	QCA955X_PLL_ETH_XMII_CONTROL_REG		(AR71XX_PLL_CPU_BASE + 0x28)
-#define	QCA955X_PLL_ETH_SGMII_CONTROL_REG		(AR71XX_PLL_CPU_BASE + 0x48)
-
-/* Reset block */
-#define	QCA955X_RESET_REG_RESET_MODULE		(AR71XX_RST_BLOCK_BASE + 0x1c)
-#define	QCA955X_RESET_REG_BOOTSTRAP		(AR71XX_RST_BLOCK_BASE + 0xb0)
-#define	QCA955X_RESET_REG_EXT_INT_STATUS	(AR71XX_RST_BLOCK_BASE + 0xac)
-
-#define	QCA955X_BOOTSTRAP_REF_CLK_40		BIT(4)
-
-#define	QCA955X_EXT_INT_WMAC_MISC		BIT(0)
-#define	QCA955X_EXT_INT_WMAC_TX			BIT(1)
-#define	QCA955X_EXT_INT_WMAC_RXLP		BIT(2)
-#define	QCA955X_EXT_INT_WMAC_RXHP		BIT(3)
-#define	QCA955X_EXT_INT_PCIE_RC1		BIT(4)
-#define	QCA955X_EXT_INT_PCIE_RC1_INT0		BIT(5)
-#define	QCA955X_EXT_INT_PCIE_RC1_INT1		BIT(6)
-#define	QCA955X_EXT_INT_PCIE_RC1_INT2		BIT(7)
-#define	QCA955X_EXT_INT_PCIE_RC1_INT3		BIT(8)
-#define	QCA955X_EXT_INT_PCIE_RC2		BIT(12)
-#define	QCA955X_EXT_INT_PCIE_RC2_INT0		BIT(13)
-#define	QCA955X_EXT_INT_PCIE_RC2_INT1		BIT(14)
-#define	QCA955X_EXT_INT_PCIE_RC2_INT2		BIT(15)
-#define	QCA955X_EXT_INT_PCIE_RC2_INT3		BIT(16)
-#define	QCA955X_EXT_INT_USB1			BIT(24)
-#define	QCA955X_EXT_INT_USB2			BIT(28)
-
-#define	QCA955X_EXT_INT_WMAC_ALL \
-        (QCA955X_EXT_INT_WMAC_MISC | QCA955X_EXT_INT_WMAC_TX | \
-         QCA955X_EXT_INT_WMAC_RXLP | QCA955X_EXT_INT_WMAC_RXHP)
-
-#define	QCA955X_EXT_INT_PCIE_RC1_ALL \
-        (QCA955X_EXT_INT_PCIE_RC1 | QCA955X_EXT_INT_PCIE_RC1_INT0 | \
-         QCA955X_EXT_INT_PCIE_RC1_INT1 | QCA955X_EXT_INT_PCIE_RC1_INT2 | \
-         QCA955X_EXT_INT_PCIE_RC1_INT3)
-
-#define	QCA955X_EXT_INT_PCIE_RC2_ALL \
-        (QCA955X_EXT_INT_PCIE_RC2 | QCA955X_EXT_INT_PCIE_RC2_INT0 | \
-         QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \
-         QCA955X_EXT_INT_PCIE_RC2_INT3)
-
-#define	QCA955X_RESET_HOST		BIT(31)
-#define	QCA955X_RESET_SLIC		BIT(30)
-#define	QCA955X_RESET_HDMA		BIT(29)
-#define	QCA955X_RESET_EXTERNAL		BIT(28)
-#define	QCA955X_RESET_RTC		BIT(27)
-#define	QCA955X_RESET_PCIE_EP_INT	BIT(26)
-#define	QCA955X_RESET_CHKSUM_ACC	BIT(25)
-#define	QCA955X_RESET_FULL_CHIP		BIT(24)
-#define	QCA955X_RESET_GE1_MDIO		BIT(23)
-#define	QCA955X_RESET_GE0_MDIO		BIT(22)
-#define	QCA955X_RESET_CPU_NMI		BIT(21)
-#define	QCA955X_RESET_CPU_COLD		BIT(20)
-#define	QCA955X_RESET_HOST_RESET_INT	BIT(19)
-#define	QCA955X_RESET_PCIE_EP		BIT(18)
-#define	QCA955X_RESET_UART1		BIT(17)
-#define	QCA955X_RESET_DDR		BIT(16)
-#define	QCA955X_RESET_USB_PHY_PLL_PWD_EXT	BIT(15)
-#define	QCA955X_RESET_NANDF		BIT(14)
-#define	QCA955X_RESET_GE1_MAC		BIT(13)
-#define	QCA955X_RESET_SGMII_ANALOG	BIT(12)
-#define	QCA955X_RESET_USB_PHY_ANALOG	BIT(11)
-#define	QCA955X_RESET_HOST_DMA_INT	BIT(10)
-#define	QCA955X_RESET_GE0_MAC		BIT(9)
-#define	QCA955X_RESET_SGMII		BIT(8)
-#define	QCA955X_RESET_PCIE_PHY		BIT(7)
-#define	QCA955X_RESET_PCIE		BIT(6)
-#define	QCA955X_RESET_USB_HOST		BIT(5)
-#define	QCA955X_RESET_USB_PHY		BIT(4)
-#define	QCA955X_RESET_USBSUS_OVERRIDE	BIT(3)
-#define	QCA955X_RESET_LUT		BIT(2)
-#define	QCA955X_RESET_MBOX		BIT(1)
-#define	QCA955X_RESET_I2S		BIT(0)
-
-/* GPIO block */
-#define	QCA955X_GPIO_REG_OUT_FUNC0	0x2c
-#define	QCA955X_GPIO_REG_OUT_FUNC1	0x30
-#define	QCA955X_GPIO_REG_OUT_FUNC2	0x34
-#define	QCA955X_GPIO_REG_OUT_FUNC3	0x38
-#define	QCA955X_GPIO_REG_OUT_FUNC4	0x3c
-#define	QCA955X_GPIO_REG_OUT_FUNC5	0x40
-#define	QCA955X_GPIO_REG_FUNC		0x6c
-#define	QCA955X_GPIO_COUNT		24
-
-#define	QCA955X_GMAC_BASE	(AR71XX_APB_BASE + 0x00070000)
-#define	QCA955X_GMAC_SIZE	0x40
-#define	QCA955X_NFC_BASE	0x1b800200
-#define	QCA955X_NFC_SIZE	0xb8
-
-/* GMAC Interface */
-#define	QCA955X_GMAC_REG_ETH_CFG	(QCA955X_GMAC_BASE + 0x00)
-
-#define	QCA955X_ETH_CFG_RGMII_EN	BIT(0)
-#define	QCA955X_ETH_CFG_GE0_SGMII	BIT(6)
-
-/* XXX Same as AR934x values */
-#define	QCA955X_PLL_VAL_1000	0x16000000
-#define	QCA955X_PLL_VAL_100	0x00000101
-#define	QCA955X_PLL_VAL_10	0x00001616
-
-/* DDR block */
-#define	QCA955X_DDR_REG_FLUSH_GE0	(AR71XX_APB_BASE + 0x9c)
-#define	QCA955X_DDR_REG_FLUSH_GE1	(AR71XX_APB_BASE + 0xa0)
-#define	QCA955X_DDR_REG_FLUSH_USB	(AR71XX_APB_BASE + 0xa4)
-#define	QCA955X_DDR_REG_FLUSH_PCIE	(AR71XX_APB_BASE + 0xa8)
-#define	QCA955X_DDR_REG_FLUSH_WMAC	(AR71XX_APB_BASE + 0xac)
-/* PCIe EP */
-#define	QCA955X_DDR_REG_FLUSH_SRC1	(AR71XX_APB_BASE + 0xb0)
-/* checksum engine */
-#define	QCA955X_DDR_REG_FLUSH_SRC2	(AR71XX_APB_BASE + 0xb2)
-
-/* PCIe control block - relative to PCI_CTRL_BASE0/PCI_CTRL_BASE1 */
-
-#define	QCA955X_PCI_APP                  0x0
-#define	QCA955X_PCI_APP_LTSSM_ENABLE     (1 << 0)
-#define	QCA955X_PCI_RESET                0x18
-#define	QCA955X_PCI_RESET_LINK_UP        (1 << 0)
-#define	QCA955X_PCI_INTR_STATUS          0x4c
-#define	QCA955X_PCI_INTR_MASK            0x50
-#define	QCA955X_PCI_INTR_DEV0            (1 << 14)
-
-#endif	/* __QCA955XREG_H__ */
diff --git a/sys/mips/atheros/std.ar71xx b/sys/mips/atheros/std.ar71xx
deleted file mode 100644
index 2ba920cfc86c..000000000000
--- a/sys/mips/atheros/std.ar71xx
+++ /dev/null
@@ -1,8 +0,0 @@
-# $FreeBSD$
-#
-# standard config for all ar71xx based kernels.
-
-files		"../atheros/files.ar71xx"
-
-machine		mips mips
-cpu		CPU_MIPS4KC
diff --git a/sys/mips/atheros/uart_bus_ar71xx.c b/sys/mips/atheros/uart_bus_ar71xx.c
deleted file mode 100644
index 2c38a4dedbe1..000000000000
--- a/sys/mips/atheros/uart_bus_ar71xx.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#include "uart_if.h"
-
-static int uart_ar71xx_probe(device_t dev);
-extern struct uart_class uart_ar71xx_uart_class;
-
-static device_method_t uart_ar71xx_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_ar71xx_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_ar71xx_driver = {
-	uart_driver_name,
-	uart_ar71xx_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_ar71xx_probe(device_t dev)
-{
-	struct uart_softc *sc;
-	uint64_t freq;
-
-	freq = ar71xx_uart_freq();
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.regshft = 2;
-	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
-	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3;
-	sc->sc_bas.regshft = 2;
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3;
-
-	return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0));
-}
-
-#ifdef	EARLY_PRINTF
-static void
-ar71xx_early_putc(int c)
-{
-	int i;
-
-	for (i = 0; i < 1000; i++) {
-		if (ATH_READ_REG(AR71XX_UART_ADDR + AR71XX_UART_LSR)
-		    & AR71XX_UART_LSR_THRE)
-			break;
-	}
-
-	ATH_WRITE_REG(AR71XX_UART_ADDR + AR71XX_UART_THR, (c & 0xff));
-}
-early_putc_t *early_putc = ar71xx_early_putc;
-#endif
-
-DRIVER_MODULE(uart, apb, uart_ar71xx_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/atheros/uart_bus_ar933x.c b/sys/mips/atheros/uart_bus_ar933x.c
deleted file mode 100644
index 3f0314302600..000000000000
--- a/sys/mips/atheros/uart_bus_ar933x.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012, Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-
-#include <mips/atheros/uart_dev_ar933x.h>
-#ifdef	EARLY_PRINTF
-#include <mips/atheros/ar933x_uart.h>
-#endif
-
-#include "uart_if.h"
-
-static int uart_ar933x_probe(device_t dev);
-extern struct uart_class uart_ar933x_uart_class;
-
-static device_method_t uart_ar933x_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_ar933x_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_ar933x_driver = {
-	uart_driver_name,
-	uart_ar933x_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_ar933x_probe(device_t dev)
-{
-	struct uart_softc *sc;
-	uint64_t freq;
-
-	freq = ar71xx_uart_freq();
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ar933x_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.regshft = 0;
-	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
-	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR);
-	sc->sc_bas.regshft = 0;
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR);
-
-	return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0));
-}
-
-/*
- * Assume the UART is setup by the bootloader and just echo that.
- */
-#if	defined(EARLY_PRINTF)
-static void
-ar933x_early_putc(int c)
-{
-	int i = 1000;
-
-	/* Wait until FIFO is clear */
-	while ((i > 0) && (ATH_READ_REG(AR71XX_UART_ADDR + AR933X_UART_CS_REG) &
-	     AR933X_UART_CS_TX_BUSY))
-		i--;
-
-	/* Write it out */
-	ATH_WRITE_REG(AR71XX_UART_ADDR + AR933X_UART_DATA_REG,
-	    (c  & 0xff)| AR933X_UART_DATA_TX_CSR);
-}
-early_putc_t *early_putc = ar933x_early_putc;
-#endif	/* EARLY_PRINTF */
-
-DRIVER_MODULE(uart, apb, uart_ar933x_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/atheros/uart_cpu_ar71xx.c b/sys/mips/atheros/uart_cpu_ar71xx.c
deleted file mode 100644
index 62d7dd69e80a..000000000000
--- a/sys/mips/atheros/uart_cpu_ar71xx.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_bus_space_reversed.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	uint64_t freq;
-
-	freq = ar71xx_uart_freq();
-
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = ar71xx_bus_space_reversed;
-	di->bas.regshft = 2;
-	di->bas.rclk = freq;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = ar71xx_bus_space_reversed;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR);
-	return (0);
-}
diff --git a/sys/mips/atheros/uart_cpu_ar933x.c b/sys/mips/atheros/uart_cpu_ar933x.c
deleted file mode 100644
index 53879b5a5dca..000000000000
--- a/sys/mips/atheros/uart_cpu_ar933x.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/atheros/ar71xxreg.h>
-#include <mips/atheros/ar71xx_cpudef.h>
-#include <mips/atheros/ar71xx_bus_space_reversed.h>
-
-#include <mips/atheros/uart_dev_ar933x.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	uint64_t freq;
-
-	freq = ar71xx_uart_freq();
-
-	di->ops = uart_getops(&uart_ar933x_class);
-	di->bas.chan = 0;
-	di->bas.bst = ar71xx_bus_space_reversed;
-	di->bas.regshft = 0;	/* We'll do "correct" dword addressing here */
-	di->bas.rclk = freq;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = ar71xx_bus_space_reversed;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR);
-	return (0);
-}
diff --git a/sys/mips/atheros/uart_dev_ar933x.c b/sys/mips/atheros/uart_dev_ar933x.c
deleted file mode 100644
index e7e4626b9b98..000000000000
--- a/sys/mips/atheros/uart_dev_ar933x.c
+++ /dev/null
@@ -1,736 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/atheros/ar933x_uart.h>
-
-#include "uart_if.h"
-
-/*
- * Default system clock is 25MHz; see ar933x_chip.c for how
- * the startup process determines whether it's 25MHz or 40MHz.
- */
-#define	DEFAULT_RCLK	(25 * 1000 * 1000)
-
-#define	ar933x_getreg(bas, reg)           \
-	bus_space_read_4((bas)->bst, (bas)->bsh, reg)
-#define	ar933x_setreg(bas, reg, value)    \
-	bus_space_write_4((bas)->bst, (bas)->bsh, reg, value)
-
-static int
-ar933x_drain(struct uart_bas *bas, int what)
-{
-	int limit;
-
-	if (what & UART_DRAIN_TRANSMITTER) {
-		limit = 10*1024;
-
-		/* Loop over until the TX FIFO shows entirely clear */
-		while (--limit) {
-			if ((ar933x_getreg(bas, AR933X_UART_CS_REG)
-			    & AR933X_UART_CS_TX_BUSY) == 0)
-				break;
-		}
-		if (limit == 0) {
-			return (EIO);
-		}
-	}
-
-	if (what & UART_DRAIN_RECEIVER) {
-		limit=10*4096;
-		while (--limit) {
-			/* XXX duplicated from ar933x_getc() */
-			/* XXX TODO: refactor! */
-
-			/* If there's nothing to read, stop! */
-			if ((ar933x_getreg(bas, AR933X_UART_DATA_REG) &
-			    AR933X_UART_DATA_RX_CSR) == 0) {
-				break;
-			}
-
-			/* Read the top of the RX FIFO */
-			(void) ar933x_getreg(bas, AR933X_UART_DATA_REG);
-
-			/* Remove that entry from said RX FIFO */
-			ar933x_setreg(bas, AR933X_UART_DATA_REG,
-			    AR933X_UART_DATA_RX_CSR);
-
-			uart_barrier(bas);
-			DELAY(2);
-		}
-		if (limit == 0) {
-			return (EIO);
-		}
-	}
-	return (0);
-}
-
-/*
- * Calculate the baud from the given chip configuration parameters.
- */
-static unsigned long
-ar933x_uart_get_baud(unsigned int clk, unsigned int scale,
-    unsigned int step)
-{
-	uint64_t t;
-	uint32_t div;
-
-	div = (2 << 16) * (scale + 1);
-	t = clk;
-	t *= step;
-	t += (div / 2);
-	t = t / div;
-
-	return (t);
-}
-
-/*
- * Calculate the scale/step with the lowest possible deviation from
- * the target baudrate.
- */
-static void
-ar933x_uart_get_scale_step(struct uart_bas *bas, unsigned int baud,
-    unsigned int *scale, unsigned int *step)
-{
-	unsigned int tscale;
-	uint32_t clk;
-	long min_diff;
-
-	clk = bas->rclk;
-	*scale = 0;
-	*step = 0;
-
-	min_diff = baud;
-	for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
-		uint64_t tstep;
-		int diff;
-
-		tstep = baud * (tscale + 1);
-		tstep *= (2 << 16);
-		tstep = tstep / clk;
-
-		if (tstep > AR933X_UART_MAX_STEP)
-			break;
-
-		diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
-		if (diff < min_diff) {
-			min_diff = diff;
-			*scale = tscale;
-			*step = tstep;
-		}
-	}
-}
-
-static int
-ar933x_param(struct uart_bas *bas, int baudrate, int databits, int stopbits,
-    int parity)
-{
-	/* UART always 8 bits */
-
-	/* UART always 1 stop bit */
-
-	/* UART parity is controllable by bits 0:1, ignore for now */
-
-	/* Set baudrate if required. */
-	if (baudrate > 0) {
-		uint32_t clock_scale, clock_step;
-
-		/* Find the best fit for the given baud rate */
-		ar933x_uart_get_scale_step(bas, baudrate, &clock_scale,
-		    &clock_step);
-
-		/*
-		 * Program the clock register in its entirety - no need
-		 * for Read-Modify-Write.
-		 */
-		ar933x_setreg(bas, AR933X_UART_CLOCK_REG,
-		    ((clock_scale & AR933X_UART_CLOCK_SCALE_M)
-		      << AR933X_UART_CLOCK_SCALE_S) |
-		    (clock_step & AR933X_UART_CLOCK_STEP_M));
-	}
-
-	uart_barrier(bas);
-	return (0);
-}
-
-/*
- * Low-level UART interface.
- */
-static int ar933x_probe(struct uart_bas *bas);
-static void ar933x_init(struct uart_bas *bas, int, int, int, int);
-static void ar933x_term(struct uart_bas *bas);
-static void ar933x_putc(struct uart_bas *bas, int);
-static int ar933x_rxready(struct uart_bas *bas);
-static int ar933x_getc(struct uart_bas *bas, struct mtx *);
-
-static struct uart_ops uart_ar933x_ops = {
-	.probe = ar933x_probe,
-	.init = ar933x_init,
-	.term = ar933x_term,
-	.putc = ar933x_putc,
-	.rxready = ar933x_rxready,
-	.getc = ar933x_getc,
-};
-
-static int
-ar933x_probe(struct uart_bas *bas)
-{
-
-	/* We always know this will be here */
-	return (0);
-}
-
-static void
-ar933x_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
-    int parity)
-{
-	uint32_t reg;
-
-	/* Setup default parameters */
-	ar933x_param(bas, baudrate, databits, stopbits, parity);
-
-	/* XXX Force enable UART in case it was disabled */
-
-	/* Disable all interrupts */
-	ar933x_setreg(bas, AR933X_UART_INT_EN_REG, 0x00000000);
-
-	/* Disable the host interrupt */
-	reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
-	reg &= ~AR933X_UART_CS_HOST_INT_EN;
-	ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
-
-	uart_barrier(bas);
-
-	/* XXX Set RTS/DTR? */
-}
-
-/*
- * Detach from console.
- */
-static void
-ar933x_term(struct uart_bas *bas)
-{
-
-	/* XXX TODO */
-}
-
-static void
-ar933x_putc(struct uart_bas *bas, int c)
-{
-	int limit;
-
-	limit = 250000;
-
-	/* Wait for space in the TX FIFO */
-	while ( ((ar933x_getreg(bas, AR933X_UART_DATA_REG) &
-	    AR933X_UART_DATA_TX_CSR) == 0) && --limit)
-		DELAY(4);
-
-	/* Write the actual byte */
-	ar933x_setreg(bas, AR933X_UART_DATA_REG,
-	    (c & 0xff) | AR933X_UART_DATA_TX_CSR);
-}
-
-static int
-ar933x_rxready(struct uart_bas *bas)
-{
-
-	/* Wait for a character to come ready */
-	return (!!(ar933x_getreg(bas, AR933X_UART_DATA_REG)
-	    & AR933X_UART_DATA_RX_CSR));
-}
-
-static int
-ar933x_getc(struct uart_bas *bas, struct mtx *hwmtx)
-{
-	int c;
-
-	uart_lock(hwmtx);
-
-	/* Wait for a character to come ready */
-	while ((ar933x_getreg(bas, AR933X_UART_DATA_REG) &
-	    AR933X_UART_DATA_RX_CSR) == 0) {
-		uart_unlock(hwmtx);
-		DELAY(4);
-		uart_lock(hwmtx);
-	}
-
-	/* Read the top of the RX FIFO */
-	c = ar933x_getreg(bas, AR933X_UART_DATA_REG) & 0xff;
-
-	/* Remove that entry from said RX FIFO */
-	ar933x_setreg(bas, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
-
-	uart_unlock(hwmtx);
-
-	return (c);
-}
-
-/*
- * High-level UART interface.
- */
-struct ar933x_softc {
-	struct uart_softc base;
-
-	uint32_t	u_ier;
-};
-
-static int ar933x_bus_attach(struct uart_softc *);
-static int ar933x_bus_detach(struct uart_softc *);
-static int ar933x_bus_flush(struct uart_softc *, int);
-static int ar933x_bus_getsig(struct uart_softc *);
-static int ar933x_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int ar933x_bus_ipend(struct uart_softc *);
-static int ar933x_bus_param(struct uart_softc *, int, int, int, int);
-static int ar933x_bus_probe(struct uart_softc *);
-static int ar933x_bus_receive(struct uart_softc *);
-static int ar933x_bus_setsig(struct uart_softc *, int);
-static int ar933x_bus_transmit(struct uart_softc *);
-static void ar933x_bus_grab(struct uart_softc *);
-static void ar933x_bus_ungrab(struct uart_softc *);
-
-static kobj_method_t ar933x_methods[] = {
-	KOBJMETHOD(uart_attach,		ar933x_bus_attach),
-	KOBJMETHOD(uart_detach,		ar933x_bus_detach),
-	KOBJMETHOD(uart_flush,		ar933x_bus_flush),
-	KOBJMETHOD(uart_getsig,		ar933x_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		ar933x_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		ar933x_bus_ipend),
-	KOBJMETHOD(uart_param,		ar933x_bus_param),
-	KOBJMETHOD(uart_probe,		ar933x_bus_probe),
-	KOBJMETHOD(uart_receive,	ar933x_bus_receive),
-	KOBJMETHOD(uart_setsig,		ar933x_bus_setsig),
-	KOBJMETHOD(uart_transmit,	ar933x_bus_transmit),
-	KOBJMETHOD(uart_grab,		ar933x_bus_grab),
-	KOBJMETHOD(uart_ungrab,		ar933x_bus_ungrab),
-	{ 0, 0 }
-};
-
-struct uart_class uart_ar933x_class = {
-	"ar933x",
-	ar933x_methods,
-	sizeof(struct ar933x_softc),
-	.uc_ops = &uart_ar933x_ops,
-	.uc_range = 8,
-	.uc_rclk = DEFAULT_RCLK,
-	.uc_rshift = 0
-};
-
-#define	SIGCHG(c, i, s, d)				\
-	if (c) {					\
-		i |= (i & s) ? s : s | d;		\
-	} else {					\
-		i = (i & s) ? (i & ~s) | d : i;		\
-	}
-
-static int
-ar933x_bus_attach(struct uart_softc *sc)
-{
-	struct ar933x_softc *u = (struct ar933x_softc *)sc;
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t reg;
-
-	/* XXX TODO: flush transmitter */
-
-	/*
-	 * Setup initial interrupt notifications.
-	 *
-	 * XXX for now, just RX FIFO valid.
-	 * Later on (when they're handled), also handle
-	 * RX errors/overflow.
-	 */
-	u->u_ier = AR933X_UART_INT_RX_VALID;
-
-	/* Enable RX interrupts to kick-start things */
-	ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier);
-
-	/* Enable the host interrupt now */
-	reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
-	reg |= AR933X_UART_CS_HOST_INT_EN;
-	ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
-
-	return (0);
-}
-
-static int
-ar933x_bus_detach(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t reg;
-
-	/* Disable all interrupts */
-	ar933x_setreg(bas, AR933X_UART_INT_EN_REG, 0x00000000);
-
-	/* Disable the host interrupt */
-	reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
-	reg &= ~AR933X_UART_CS_HOST_INT_EN;
-	ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
-	uart_barrier(bas);
-
-	return (0);
-}
-
-static int
-ar933x_bus_flush(struct uart_softc *sc, int what)
-{
-	struct uart_bas *bas;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	ar933x_drain(bas, what);
-	uart_unlock(sc->sc_hwmtx);
-
-	return (0);
-}
-
-static int
-ar933x_bus_getsig(struct uart_softc *sc)
-{
-	uint32_t sig = sc->sc_hwsig;
-
-	/*
-	 * For now, let's just return that DSR/DCD/CTS is asserted.
-	 */
-	SIGCHG(1, sig, SER_DSR, SER_DDSR);
-	SIGCHG(1, sig, SER_CTS, SER_DCTS);
-	SIGCHG(1, sig, SER_DCD, SER_DDCD);
-	SIGCHG(1, sig,  SER_RI,  SER_DRI);
-
-	sc->sc_hwsig = sig & ~SER_MASK_DELTA;
-
-	return (sig);
-}
-
-/*
- * XXX TODO: actually implement the rest of this!
- */
-static int
-ar933x_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
-{
-	int error = 0;
-
-	/* XXX lock */
-	switch (request) {
-	case UART_IOCTL_BREAK:
-	case UART_IOCTL_IFLOW:
-	case UART_IOCTL_OFLOW:
-		break;
-	case UART_IOCTL_BAUD:
-		*(int*)data = 115200;
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-
-	/* XXX unlock */
-
-	return (error);
-}
-
-/*
- * Bus interrupt handler.
- *
- * For now, system interrupts are disabled.
- * So this is just called from a callout in uart_core.c
- * to poll various state.
- */
-static int
-ar933x_bus_ipend(struct uart_softc *sc)
-{
-	struct ar933x_softc *u = (struct ar933x_softc *)sc;
-	struct uart_bas *bas = &sc->sc_bas;
-	int ipend = 0;
-	uint32_t isr;
-
-	uart_lock(sc->sc_hwmtx);
-
-	/*
-	 * Fetch/ACK the ISR status.
-	 */
-	isr = ar933x_getreg(bas, AR933X_UART_INT_REG);
-	ar933x_setreg(bas, AR933X_UART_INT_REG, isr);
-	uart_barrier(bas);
-
-	/*
-	 * RX ready - notify upper layer.
-	 */
-	if (isr & AR933X_UART_INT_RX_VALID) {
-		ipend |= SER_INT_RXREADY;
-	}
-
-	/*
-	 * If we get this interrupt, we should disable
-	 * it from the interrupt mask and inform the uart
-	 * driver appropriately.
-	 *
-	 * We can't keep setting SER_INT_TXIDLE or SER_INT_SIGCHG
-	 * all the time or IO stops working.  So we will always
-	 * clear this interrupt if we get it, then we only signal
-	 * the upper layer if we were doing active TX in the
-	 * first place.
-	 *
-	 * Also, the name is misleading.  This actually means
-	 * "the FIFO is almost empty."  So if we just write some
-	 * more data to the FIFO without checking whether it can
-	 * take said data, we'll overflow the thing.
-	 *
-	 * Unfortunately the FreeBSD uart device has no concept of
-	 * partial UART writes - it expects that the whole buffer
-	 * is written to the hardware.  Thus for now, ar933x_bus_transmit()
-	 * will wait for the FIFO to finish draining before it pushes
-	 * more frames into it.
-	 */
-	if (isr & AR933X_UART_INT_TX_EMPTY) {
-		/*
-		 * Update u_ier to disable TX notifications; update hardware
-		 */
-		u->u_ier &= ~AR933X_UART_INT_TX_EMPTY;
-		ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier);
-		uart_barrier(bas);
-	}
-
-	/*
-	 * Only signal TX idle if we're not busy transmitting.
-	 *
-	 * XXX I never get _out_ of txbusy? Debug that!
-	 */
-	if (sc->sc_txbusy) {
-		if (isr & AR933X_UART_INT_TX_EMPTY) {
-			ipend |= SER_INT_TXIDLE;
-		} else {
-			ipend |= SER_INT_SIGCHG;
-		}
-	}
-
-	uart_unlock(sc->sc_hwmtx);
-	return (ipend);
-}
-
-static int
-ar933x_bus_param(struct uart_softc *sc, int baudrate, int databits,
-    int stopbits, int parity)
-{
-	struct uart_bas *bas;
-	int error;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	error = ar933x_param(bas, baudrate, databits, stopbits, parity);
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-ar933x_bus_probe(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int error;
-
-	bas = &sc->sc_bas;
-
-	error = ar933x_probe(bas);
-	if (error)
-		return (error);
-
-	/* Reset FIFOs. */
-	ar933x_drain(bas, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER);
-
-	/* XXX TODO: actually find out what the FIFO depth is! */
-	sc->sc_rxfifosz = 16;
-	sc->sc_txfifosz = 16;
-
-	return (0);
-}
-
-static int
-ar933x_bus_receive(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	int xc;
-
-	uart_lock(sc->sc_hwmtx);
-
-	/* Loop over until we are full, or no data is available */
-	while (ar933x_rxready(bas)) {
-		if (uart_rx_full(sc)) {
-			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
-			break;
-		}
-
-		/* Read the top of the RX FIFO */
-		xc = ar933x_getreg(bas, AR933X_UART_DATA_REG) & 0xff;
-
-		/* Remove that entry from said RX FIFO */
-		ar933x_setreg(bas, AR933X_UART_DATA_REG,
-		    AR933X_UART_DATA_RX_CSR);
-		uart_barrier(bas);
-
-		/* XXX frame, parity error */
-		uart_rx_put(sc, xc);
-	}
-
-	/*
-	 * XXX TODO: Discard everything left in the Rx FIFO?
-	 * XXX only if we've hit an overrun condition?
-	 */
-
-	uart_unlock(sc->sc_hwmtx);
-
-	return (0);
-}
-
-static int
-ar933x_bus_setsig(struct uart_softc *sc, int sig)
-{
-#if 0
-	struct ar933x_softc *ns8250 = (struct ar933x_softc*)sc;
-	struct uart_bas *bas;
-	uint32_t new, old;
-
-	bas = &sc->sc_bas;
-	do {
-		old = sc->sc_hwsig;
-		new = old;
-		if (sig & SER_DDTR) {
-			SIGCHG(sig & SER_DTR, new, SER_DTR,
-			    SER_DDTR);
-		}
-		if (sig & SER_DRTS) {
-			SIGCHG(sig & SER_RTS, new, SER_RTS,
-			    SER_DRTS);
-		}
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-	uart_lock(sc->sc_hwmtx);
-	ns8250->mcr &= ~(MCR_DTR|MCR_RTS);
-	if (new & SER_DTR)
-		ns8250->mcr |= MCR_DTR;
-	if (new & SER_RTS)
-		ns8250->mcr |= MCR_RTS;
-	uart_setreg(bas, REG_MCR, ns8250->mcr);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-#endif
-	return (0);
-}
-
-/*
- * Write the current transmit buffer to the TX FIFO.
- *
- * Unfortunately the FreeBSD uart device has no concept of
- * partial UART writes - it expects that the whole buffer
- * is written to the hardware.  Thus for now, this will wait for
- * the FIFO to finish draining before it pushes more frames into it.
- *
- * If non-blocking operation is truely needed here, either
- * the FreeBSD uart device will need to handle partial writes
- * in xxx_bus_transmit(), or we'll need to do TX FIFO buffering
- * of our own here.
- */
-static int
-ar933x_bus_transmit(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	struct ar933x_softc *u = (struct ar933x_softc *)sc;
-	int i;
-
-	uart_lock(sc->sc_hwmtx);
-
-	/* Wait for the FIFO to be clear - see above */
-	while (ar933x_getreg(bas, AR933X_UART_CS_REG) &
-	    AR933X_UART_CS_TX_BUSY)
-		;
-
-	/*
-	 * Write some data!
-	 */
-	for (i = 0; i < sc->sc_txdatasz; i++) {
-		/* Write the TX data */
-		ar933x_setreg(bas, AR933X_UART_DATA_REG,
-		    (sc->sc_txbuf[i] & 0xff) | AR933X_UART_DATA_TX_CSR);
-		uart_barrier(bas);
-	}
-
-	/*
-	 * Now that we're transmitting, get interrupt notification
-	 * when the FIFO is (almost) empty - see above.
-	 */
-	u->u_ier |= AR933X_UART_INT_TX_EMPTY;
-	ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier);
-	uart_barrier(bas);
-
-	/*
-	 * Inform the upper layer that we are presently transmitting
-	 * data to the hardware; this will be cleared when the
-	 * TXIDLE interrupt occurs.
-	 */
-	sc->sc_txbusy = 1;
-	uart_unlock(sc->sc_hwmtx);
-
-	return (0);
-}
-
-static void
-ar933x_bus_grab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t reg;
-
-	/* Disable the host interrupt now */
-	uart_lock(sc->sc_hwmtx);
-	reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
-	reg &= ~AR933X_UART_CS_HOST_INT_EN;
-	ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
-	uart_unlock(sc->sc_hwmtx);
-}
-
-static void
-ar933x_bus_ungrab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t reg;
-
-	/* Enable the host interrupt now */
-	uart_lock(sc->sc_hwmtx);
-	reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
-	reg |= AR933X_UART_CS_HOST_INT_EN;
-	ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
-	uart_unlock(sc->sc_hwmtx);
-}
diff --git a/sys/mips/atheros/uart_dev_ar933x.h b/sys/mips/atheros/uart_dev_ar933x.h
deleted file mode 100644
index f6f8a4bdb61e..000000000000
--- a/sys/mips/atheros/uart_dev_ar933x.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	__UART_DEV_AR933X__
-#define	__UART_DEV_AR933X__
-
-extern struct uart_class uart_ar933x_class;
-
-#endif
diff --git a/sys/mips/beri/beri_iommu.c b/sys/mips/beri/beri_iommu.c
deleted file mode 100644
index 14903dec77e5..000000000000
--- a/sys/mips/beri/beri_iommu.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory (Department of Computer Science and
- * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
- * DARPA SSITH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/timeet.h>
-#include <sys/timetc.h>
-#include <sys/conf.h>
-#include <sys/uio.h>
-#include <sys/endian.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <machine/cache.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr.h>
-
-#include <dev/xdma/xdma.h>
-
-#include "xdma_if.h"
-
-#define	IOMMU_INVALIDATE	0x00
-#define	IOMMU_SET_BASE		0x08
-
-struct beri_iommu_softc {
-	struct resource		*res[1];
-	device_t		dev;
-	bus_space_tag_t		bst_data;
-	bus_space_handle_t	bsh_data;
-	uint32_t		offs;
-};
-
-static struct resource_spec beri_iommu_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static void
-beri_iommu_invalidate(struct beri_iommu_softc *sc, vm_offset_t addr)
-{
-
-	bus_write_8(sc->res[0], IOMMU_INVALIDATE, htole64(addr));
-}
-
-static void
-beri_iommu_set_base(struct beri_iommu_softc *sc, vm_offset_t addr)
-{
-
-	bus_write_8(sc->res[0], IOMMU_SET_BASE, htole64(addr));
-}
-
-static int
-beri_iommu_release(device_t dev, struct xdma_iommu *xio)
-{
-	struct beri_iommu_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	beri_iommu_set_base(sc, 0);
-
-	return (0);
-}
-
-static int
-beri_iommu_init(device_t dev, struct xdma_iommu *xio)
-{
-	struct beri_iommu_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	beri_iommu_set_base(sc, (uintptr_t)xio->p.pm_segtab);
-
-	return (0);
-}
-
-static int
-beri_iommu_remove(device_t dev, struct xdma_iommu *xio, vm_offset_t va)
-{
-	struct beri_iommu_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	beri_iommu_invalidate(sc, va);
-
-	return (0);
-}
-
-static int
-beri_iommu_enter(device_t dev, struct xdma_iommu *xio, vm_offset_t va,
-    vm_paddr_t pa)
-{
-	struct beri_iommu_softc *sc;
-	pt_entry_t opte, npte;
-	pt_entry_t *pte;
-	pmap_t p;
-
-	sc = device_get_softc(dev);
-	p = &xio->p;
-
-	pte = pmap_pte(p, va);
-	if (pte == NULL)
-		panic("pte is NULL\n");
-
-	/* Make pte uncacheable. */
-	opte = *pte;
-	npte = opte & ~PTE_C_MASK;
-	npte |= PTE_C(VM_MEMATTR_UNCACHEABLE);
-	*pte = npte;
-
-	/* Write back, invalidate pte. */
-	mips_dcache_wbinv_range((vm_offset_t)pte, sizeof(vm_offset_t));
-
-	/* Invalidate the entry. */
-	if (pte_test(&opte, PTE_V) && opte != npte)
-		beri_iommu_invalidate(sc, va);
-
-	return (0);
-}
-
-static int
-beri_iommu_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "beri,iommu"))
-		return (ENXIO);
-
-	device_set_desc(dev, "BERI IOMMU");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-beri_iommu_attach(device_t dev)
-{
-	struct beri_iommu_softc *sc;
-	phandle_t xref, node;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, beri_iommu_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	/* Memory interface */
-	sc->bst_data = rman_get_bustag(sc->res[0]);
-	sc->bsh_data = rman_get_bushandle(sc->res[0]);
-
-	node = ofw_bus_get_node(dev);
-	xref = OF_xref_from_node(node);
-	OF_device_register_xref(xref, dev);
-
-	return (0);
-}
-
-static int
-beri_iommu_detach(device_t dev)
-{
-	struct beri_iommu_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	bus_release_resources(dev, beri_iommu_spec, sc->res);
-
-	return (0);
-}
-
-static device_method_t beri_iommu_methods[] = {
-	/* xDMA IOMMU interface */
-	DEVMETHOD(xdma_iommu_init,	beri_iommu_init),
-	DEVMETHOD(xdma_iommu_release,	beri_iommu_release),
-	DEVMETHOD(xdma_iommu_enter,	beri_iommu_enter),
-	DEVMETHOD(xdma_iommu_remove,	beri_iommu_remove),
-
-	/* Device interface */
-	DEVMETHOD(device_probe,		beri_iommu_probe),
-	DEVMETHOD(device_attach,	beri_iommu_attach),
-	DEVMETHOD(device_detach,	beri_iommu_detach),
-	{ 0, 0 }
-};
-
-static driver_t beri_iommu_driver = {
-	"beri_iommu",
-	beri_iommu_methods,
-	sizeof(struct beri_iommu_softc),
-};
-
-static devclass_t beri_iommu_devclass;
-
-DRIVER_MODULE(beri_iommu, simplebus, beri_iommu_driver,
-    beri_iommu_devclass, 0, 0);
diff --git a/sys/mips/beri/beri_machdep.c b/sys/mips/beri/beri_machdep.c
deleted file mode 100644
index 754898f9a175..000000000000
--- a/sys/mips/beri/beri_machdep.c
+++ /dev/null
@@ -1,279 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * Copyright (c) 2012-2014 Robert N. M. Watson
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/linker.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#ifdef FDT
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_subr.h>
-#endif
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/bootinfo.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/metadata.h>
-#include <machine/pmap.h>
-#include <machine/trap.h>
-
-extern int	*edata;
-extern int	*end;
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	int i;
-#ifdef FDT
-	struct mem_region mr[FDT_MEM_REGIONS];
-	uint64_t val;
-	int mr_cnt;
-	int j;
-#endif
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = ctob(realmem);
-
-	dump_avail[0] = phys_avail[0];
-	dump_avail[1] = phys_avail[1];
-
-	physmem = realmem;
-
-#ifdef FDT
-	if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
-		physmem = btoc(val);
-
-		KASSERT((phys_avail[0] >= mr[0].mr_start) && \
-			(phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)),
-			("First region is not within FDT memory range"));
-
-		/* Limit size of the first region */
-		phys_avail[1] = (mr[0].mr_start + MIN(mr[0].mr_size, ctob(realmem)));
-		dump_avail[1] = phys_avail[1];
-
-		/* Add the rest of regions */
-		for (i = 1, j = 2; i < mr_cnt; i++, j+=2) {
-			phys_avail[j] = mr[i].mr_start;
-			phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size);
-			dump_avail[j] = phys_avail[j];
-			dump_avail[j+1] = phys_avail[j+1];
-		}
-	}
-#endif
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-/*
- * Perform a board-level soft-reset.
- */
-void
-platform_reset(void)
-{
-
-	/* XXX SMP will likely require us to do more. */
-	__asm__ __volatile__(
-		"mfc0 $k0, $12\n\t"
-		"li $k1, 0x00100000\n\t"
-		"or $k0, $k0, $k1\n\t"
-		"mtc0 $k0, $12\n");
-	for( ; ; )
-		__asm__ __volatile("wait");
-}
-
-void
-platform_start(__register_t a0, __register_t a1,  __register_t a2, 
-    __register_t a3)
-{
-	struct bootinfo *bootinfop;
-	vm_offset_t kernend;
-	uint64_t platform_counter_freq;
-	int argc = a0;
-	char **argv = (char **)a1;
-	char **envp = (char **)a2;
-	long memsize;
-#ifdef FDT
-	vm_offset_t dtbp;
-	void *kmdp;
-#endif
-	int i;
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	mips_pcpu0_init();
-
-	/*
-	 * Over time, we've changed out boot-time binary interface for the
-	 * kernel.  Miniboot simply provides a 'memsize' in a3, whereas the
-	 * FreeBSD boot loader provides a 'bootinfo *' in a3.  While slightly
-	 * grody, we support both here by detecting 'pointer-like' values in
-	 * a3 and assuming physical memory can never be that back.
-	 *
-	 * XXXRW: Pull more values than memsize out of bootinfop -- e.g.,
-	 * module information.
-	 */
-	if (a3 >= 0x9800000000000000ULL) {
-		bootinfop = (void *)a3;
-		memsize = bootinfop->bi_memsize;
-		preload_metadata = (caddr_t)bootinfop->bi_modulep;
-	} else {
-		bootinfop = NULL;
-		memsize = a3;
-	}
-
-#ifdef FDT
-	/*
-	 * Find the dtb passed in by the boot loader (currently fictional).
-	 */
-	kmdp = preload_search_by_type("elf kernel");
-	dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
-
-#if defined(FDT_DTB_STATIC)
-	/*
-	 * In case the device tree blob was not retrieved (from metadata) try
-	 * to use the statically embedded one.
-	 */
-	if (dtbp == (vm_offset_t)NULL)
-		dtbp = (vm_offset_t)&fdt_static_dtb;
-#else
-#error	"Non-static FDT not yet supported on BERI"
-#endif
-
-	if (OF_install(OFW_FDT, 0) == FALSE)
-		while (1);
-	if (OF_init((void *)dtbp) != 0)
-		while (1);
-
-	/*
-	 * Configure more boot-time parameters passed in by loader.
-	 */
-	boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
-	init_static_kenv(MD_FETCH(kmdp, MODINFOMD_ENVP, char *), 0);
-
-	/*
-	 * Get bootargs from FDT if specified.
-	 */
-	ofw_parse_bootargs();
-#endif
-
-	/*
-	 * XXXRW: We have no way to compare wallclock time to cycle rate on
-	 * BERI, so for now assume we run at the MALTA default (100MHz).
-	 */
-	platform_counter_freq = MIPS_DEFAULT_HZ;
-	mips_timer_early_init(platform_counter_freq);
-
-	cninit();
-	printf("entry: platform_start()\n");
-
-	bootverbose = 1;
-	if (bootverbose) {
-		printf("cmd line: ");
-		for (i = 0; i < argc; i++)
-			printf("%s ", argv[i]);
-		printf("\n");
-
-		printf("envp:\n");
-		for (i = 0; envp[i]; i += 2)
-			printf("\t%s = %s\n", envp[i], envp[i+1]);
-
-		if (bootinfop != NULL)
-			printf("bootinfo found at %p\n", bootinfop);
-
-		printf("memsize = %p\n", (void *)memsize);
-	}
-
-	realmem = btoc(memsize);
-	mips_init();
-
-	mips_timer_init_params(platform_counter_freq, 0);
-}
diff --git a/sys/mips/beri/beri_mp.c b/sys/mips/beri/beri_mp.c
deleted file mode 100644
index 1089a12c59da..000000000000
--- a/sys/mips/beri/beri_mp.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/*-
- * Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
- * Copyright (c) 2012-2015 Robert N. M. Watson
- * Copyright (c) 2013 SRI International
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/smp.h>
-
-#include <machine/hwfunc.h>
-#include <machine/smp.h>
-
-#include <mips/beri/beri_mp.h>
-
-#include <dev/fdt/fdt_common.h>
-
-struct spin_entry {
-	uint64_t entry_addr;
-	uint64_t a0;
-	uint32_t rsvd1;
-	uint32_t pir;
-	uint64_t rsvd2;
-};
-
-static phandle_t cpu_of_nodes[MAXCPU];
-static device_t picmap[MAXCPU];
-
-int
-platform_processor_id(void)
-{
-	int cpu;
-
-	cpu = beri_get_cpu();
-
-	return (cpu);
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	int ncores, ncpus, nthreads;
-	phandle_t cpus, cpu;
-	pcell_t reg;
-	char prop[16];
-	struct spin_entry *se;
-
-	ncores = beri_get_ncores();
-	nthreads = beri_get_nthreads();
-	KASSERT(ncores <= 0x10000, ("%s: too many cores %d", __func__, ncores));
-	KASSERT(nthreads <= 0x10000, ("%s: too many threads %d", __func__,
-	    nthreads));
-	KASSERT(ncores < 0xffff || nthreads < 0xffff,
-	    ("%s: cores x thread (%d x %d) would overflow", __func__, ncores,
-	    nthreads));
-	ncpus = ncores * nthreads;
-	if (MAXCPU > 1 && ncpus > MAXCPU)
-		printf("%s: Hardware supports more CPUs (%d) than kernel (%d)\n",
-		    __func__, ncpus, MAXCPU);
-	printf("%s: hardware has %d cores with %d threads each\n", __func__,
-	    ncores, nthreads);
-
-	if ((cpus = OF_finddevice("/cpus")) <= 0) {
-		printf("%s: no \"/cpus\" device found in FDT\n", __func__);
-		goto error;
-	}
-	if ((cpu = OF_child(cpus)) <= 0) {
-		printf("%s: no children of \"/cpus\" found in FDT\n", __func__);
-		goto error;
-	}
-	CPU_ZERO(mask);
-	do {
-		if (OF_getprop(cpu, "reg", &reg, sizeof(reg)) <= 0) {
-			printf("%s: cpu device with no reg property\n",
-			    __func__);
-			goto error;
-		}
-		if (reg > MAXCPU) {
-			printf("%s: cpu ID too large (%d > %d)\n", __func__,
-			    reg, MAXCPU);
-			continue;
-		}
-		cpu_of_nodes[reg] = cpu;
-
-		if (reg != 0) {
-			if (OF_getprop(cpu, "enable-method", &prop,
-			    sizeof(prop)) <= 0 && OF_getprop(OF_parent(cpu),
-			    "enable-method", &prop, sizeof(prop)) <= 0) {
-				printf("%s: CPU %d has no enable-method "
-				    "property\n", __func__, reg);
-				continue;
-			}
-			if (strcmp("spin-table", prop) != 0) {
-				printf("%s: CPU %d enable-method is '%s' not "
-				    "'spin-table'\n", __func__, reg, prop);
-				continue;
-			}
-
-			if (OF_getprop(cpu, "cpu-release-addr", &se,
-			    sizeof(se)) <= 0) {
-				printf("%s: CPU %d has missing or invalid "
-				    "cpu-release-addr\n", __func__, reg);
-				continue;
-			}
-			if (se->entry_addr != 1) {
-				printf("%s: CPU %d has uninitialized spin "
-				    "entry\n", __func__, reg);
-				continue;
-			}
-		}
-
-		CPU_SET(reg, mask);
-	} while ((cpu = OF_peer(cpu)) > 0);
-	return;
-
-error:
-	/*
-	 * If we run into any problems determining the CPU layout,
-	 * fall back to UP.
-	 *
-	 * XXX: panic instead?
-	 */
-	CPU_ZERO(mask);
-	CPU_SET(0, mask);
-}
-
-void
-platform_init_secondary(int cpuid)
-{
-	device_t ic;
-	int ipi;
-
-	ipi = platform_ipi_hardintr_num();
-
-	ic = devclass_get_device(devclass_find("beripic"), cpuid);
-	picmap[cpuid] = ic;
-	beripic_setup_ipi(ic, cpuid, ipi);
-
-	/* Unmask the interrupt */
-	if (cpuid != 0) {
-		mips_wr_status(mips_rd_status() | (((1 << ipi) << 8) << 2));
-	}
-}
-
-void
-platform_ipi_send(int cpuid)
-{
-
-	mips_sync();	/* Ordering, liveness. */
-
-	beripic_send_ipi(picmap[cpuid], cpuid);
-}
-
-void
-platform_ipi_clear(void)
-{
-	int cpuid;
-
-	cpuid = platform_processor_id();
-
-	beripic_clear_ipi(picmap[cpuid], cpuid);
-}
-
-/*
- * XXXBED: Set via FDT?
- */
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (4);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (-1);
-}
-
-/*
- * XXXBED: Fine for MT, will need something better for multi-core.
- */
-struct cpu_group *
-platform_smp_topo(void)
-{
-
-	return (smp_topo_none());
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	uint32_t status;
-	u_int clock_int_mask;
-
-	KASSERT(cpuid < MAXCPU, ("%s: invalid CPU id %d", __func__, cpuid));
-
-	/* Make sure coprocessors are enabled. */
-	status = mips_rd_status();
-	status |= (MIPS_SR_COP_0_BIT | MIPS_SR_COP_1_BIT);
-#if defined(CPU_CHERI)
-	status |= MIPS_SR_COP_2_BIT;
-#endif
-	mips_wr_status(status);
-
-#if 0
-	register_t hwrena;
-	/* Enable HDWRD instruction in userspace. Also enables statcounters. */
-	hwrena = mips_rd_hwrena();
-	hwrena |= (MIPS_HWRENA_CC | MIPS_HWRENA_CCRES | MIPS_HWRENA_CPUNUM |
-	    MIPS_HWRENA_BERI_STATCOUNTERS_MASK);
-	mips_wr_hwrena(hwrena);
-#endif
-
-	/*
-	 * Enable per-thread timer.
-	 */
-	clock_int_mask = hard_int_mask(5);
-	set_intr_mask(clock_int_mask);
-}
-
-/*
- * BERI startup conforms to the spin-table start method defined in the
- * ePAPR 1.0 spec.  The initial spin waiting for an address is started
- * by the CPU firmware.
- */
-int
-platform_start_ap(int cpuid)
-{
-	phandle_t cpu;
-	char prop[16];
-	struct spin_entry *se;
-
-	KASSERT(cpuid != 0, ("%s: can't start CPU 0!\n", __func__));
-	KASSERT((cpuid > 0 && cpuid < MAXCPU),
-	    ("%s: invalid CPU id %d", __func__, cpuid));
-
-	cpu = cpu_of_nodes[cpuid];
-	if (OF_getprop(cpu, "status", &prop, sizeof(prop)) <= 0) {
-		if (bootverbose)
-			printf("%s: CPU %d has no status property, "
-			    "trying parent\n", __func__, cpuid);
-		if (OF_getprop(OF_parent(cpu), "status", &prop,
-		    sizeof(prop)) <= 0)
-			panic("%s: CPU %d has no status property", __func__,
-			    cpuid);
-	}
-	if (strcmp("disabled", prop) != 0)
-		panic("%s: CPU %d status is '%s' not 'disabled'",
-		    __func__, cpuid, prop);
-
-	if (OF_getprop(cpu, "enable-method", &prop, sizeof(prop)) <= 0) {
-		if (bootverbose)
-			printf("%s: CPU %d has no enable-method, "
-			    "trying parent\n", __func__, cpuid);
-		if (OF_getprop(OF_parent(cpu), "enable-method", &prop,
-		    sizeof(prop)) <= 0)
-			panic("%s: CPU %d has no enable-method property",
-			    __func__, cpuid);
-	}
-	if (strcmp("spin-table", prop) != 0)
-		panic("%s: CPU %d enable-method is '%s' not "
-		    "'spin-table'", __func__, cpuid, prop);
-
-	if (OF_getprop(cpu, "cpu-release-addr", &se, sizeof(se)) <= 0)
-		panic("%s: CPU %d has missing or invalid cpu-release-addr",
-		    __func__, cpuid);
-	se->pir = cpuid;
-	if (bootverbose)
-		printf("%s: writing %p to %p\n", __func__, mpentry,
-		    &se->entry_addr);
-
-	mips_sync();	/* Ordering. */
-	se->entry_addr = (intptr_t)mpentry;
-	mips_sync();	/* Liveness. */
-
-	return (0);
-}
diff --git a/sys/mips/beri/beri_mp.h b/sys/mips/beri/beri_mp.h
deleted file mode 100644
index c6f6fed49a14..000000000000
--- a/sys/mips/beri/beri_mp.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*-
- * Copyright (c) 2014 SRI International
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249)
- * ("MRC2"), as part of the DARPA MRC research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-static inline int
-beri_get_core(void)
-{
-	uint32_t cinfo;
-
-	cinfo = mips_rd_cinfo();
-	return (cinfo & 0xffff);
-}
-
-static inline int
-beri_get_ncores(void)
-{
-	uint32_t cinfo;
-
-	cinfo = mips_rd_cinfo();
-	return ((cinfo >> 16) + 1);
-}
-
-static inline int
-beri_get_thread(void)
-{
-	uint32_t tinfo;
-
-	tinfo = mips_rd_tinfo();
-	return (tinfo & 0xffff);
-}
-
-static inline int
-beri_get_nthreads(void)
-{
-	uint32_t tinfo;
-
-	tinfo = mips_rd_tinfo();
-	return ((tinfo >> 16) + 1);
-}
-
-static inline int
-beri_get_cpu(void)
-{
-
-	return ((beri_get_core() * beri_get_nthreads()) + beri_get_thread());
-}
-
-static inline int
-beri_get_ncpus(void)
-{
-
-	return(beri_get_ncores() * beri_get_nthreads());
-}
-
-void beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq);
-void beripic_send_ipi(device_t dev, u_int tid);
-void beripic_clear_ipi(device_t dev, u_int tid);
diff --git a/sys/mips/beri/beri_pic.c b/sys/mips/beri/beri_pic.c
deleted file mode 100644
index ac8e98fd254f..000000000000
--- a/sys/mips/beri/beri_pic.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
- * Copyright (c) 2013 SRI International
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#ifdef SMP
-#include <mips/beri/beri_mp.h>
-#endif
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "pic_if.h"
-
-#define	BP_NUM_HARD_IRQS	5
-#define	BP_NUM_IRQS		32
-/* We use hard irqs 15-31 as soft */
-#define	BP_FIRST_SOFT		16
-
-#define	BP_CFG_IRQ_S		0
-#define	BP_CFG_IRQ_M		(0xf << BP_CFG_IRQ_S)
-#define	BP_CFG_TID_S		8
-#define	BP_CFG_TID_M		(0x7FFFFF << BP_CFG_TID_S)
-#define	BP_CFG_ENABLE		(1 << 31)
-
-enum {
-	BP_CFG,
-	BP_IP_READ,
-	BP_IP_SET,
-	BP_IP_CLEAR
-};
-
-struct beripic_softc;
-
-struct beri_pic_isrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-	uint32_t		mips_hard_irq;
-};
-
-struct hirq {
-	uint32_t		irq;
-	struct beripic_softc	*sc;
-};
-
-struct beripic_softc {
-	device_t		dev;
-	uint32_t		nirqs;
-	struct beri_pic_isrc	irqs[BP_NUM_IRQS];
-	struct resource		*res[4 + BP_NUM_HARD_IRQS];
-	void			*ih[BP_NUM_HARD_IRQS];
-	struct hirq		hirq[BP_NUM_HARD_IRQS];
-	uint8_t			mips_hard_irq_idx;
-};
-
-static struct resource_spec beri_pic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ SYS_RES_MEMORY,	1,	RF_ACTIVE },
-	{ SYS_RES_MEMORY,	2,	RF_ACTIVE },
-	{ SYS_RES_MEMORY,	3,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		1,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		2,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		3,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		4,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int
-beri_pic_intr(void *arg)
-{
-	struct beripic_softc *sc;
-	struct intr_irqsrc *isrc;
-	struct hirq *h;
-	uint64_t intr;
-	uint64_t reg;
-	int i;
-
-	h = arg;
-	sc = h->sc;
-
-	intr = bus_read_8(sc->res[BP_IP_READ], 0);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		isrc = &sc->irqs[i].isrc;
-
-		reg = bus_read_8(sc->res[BP_CFG], i * 8);
-		if ((reg & BP_CFG_IRQ_M) != h->irq) {
-			continue;
-		}
-		if ((reg & (BP_CFG_ENABLE)) == 0) {
-			continue;
-		}
-
-		if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
-			device_printf(sc->dev, "Stray interrupt %u detected\n", i);
-		}
-
-		bus_write_8(sc->res[BP_IP_CLEAR], 0, (1 << i));
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static int
-beripic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "sri-cambridge,beri-pic"))
-		return (ENXIO);
-		
-	device_set_desc(dev, "BERI Programmable Interrupt Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-beripic_attach(device_t dev)
-{
-	struct beripic_softc *sc;
-	struct beri_pic_isrc *pic_isrc;
-	const char *name;
-	struct intr_irqsrc *isrc;
-	intptr_t xref;
-	uint32_t unit;
-	int err;
-	int i;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, beri_pic_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	xref = OF_xref_from_node(ofw_bus_get_node(dev));
-	name = device_get_nameunit(dev);
-	unit = device_get_unit(dev);
-	sc->nirqs = BP_NUM_IRQS;
-
-	for (i = 0; i < sc->nirqs; i++) {
-		sc->irqs[i].irq = i;
-		isrc = &sc->irqs[i].isrc;
-
-		/* Assign mips hard irq number. */
-		pic_isrc = (struct beri_pic_isrc *)isrc;
-		pic_isrc->mips_hard_irq = sc->mips_hard_irq_idx++;
-		/* Last IRQ is used for IPIs. */
-		if (sc->mips_hard_irq_idx >= (BP_NUM_HARD_IRQS - 1)) {
-			sc->mips_hard_irq_idx = 0;
-		}
-
-		err = intr_isrc_register(isrc, sc->dev,
-		    0, "pic%d,%d", unit, i);
-		bus_write_8(sc->res[BP_CFG], i * 8, 0);
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		return (ENXIO);
-	}
-
-	/* Last IRQ is used for IPIs. */
-	for (i = 0; i < (BP_NUM_HARD_IRQS - 1); i++) {
-		sc->hirq[i].sc = sc;
-		sc->hirq[i].irq = i;
-		if (bus_setup_intr(dev, sc->res[4+i], INTR_TYPE_CLK,
-		    beri_pic_intr, NULL, &sc->hirq[i], sc->ih[i])) {
-			device_printf(dev, "could not setup irq handler\n");
-			intr_pic_deregister(dev, xref);
-			return (ENXIO);
-		}
-	}
-
-	return (0);
-}
-
-static void
-beri_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct beri_pic_isrc *pic_isrc;
-	struct beripic_softc *sc;
-	uint64_t reg;
-
-	sc = device_get_softc(dev);
-	pic_isrc = (struct beri_pic_isrc *)isrc;
-
-	reg = BP_CFG_ENABLE;
-	reg |= (pic_isrc->mips_hard_irq << BP_CFG_IRQ_S);
-	bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
-}
-
-static void
-beri_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct beri_pic_isrc *pic_isrc;
-	struct beripic_softc *sc;
-	uint64_t reg;
-
-	sc = device_get_softc(dev);
-	pic_isrc = (struct beri_pic_isrc *)isrc;
-
-	reg = bus_read_8(sc->res[BP_CFG], pic_isrc->irq * 8);
-	reg &= ~BP_CFG_ENABLE;
-	bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
-}
-
-static int
-beri_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	struct beripic_softc *sc;
-	struct intr_map_data_fdt *daf;
-	uint32_t irq;
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
-	    daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
-		return (EINVAL);
-
-	irq = daf->cells[0];
-
-	*isrcp = &sc->irqs[irq].isrc;
-
-	return (0);
-}
-
-static void
-beri_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	beri_pic_enable_intr(dev, isrc);
-}
-
-static void
-beri_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	beri_pic_disable_intr(dev, isrc);
-}
-
-#ifdef SMP
-void
-beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq)
-{
-	struct beripic_softc *sc;
-	uint64_t reg;
-
-	sc = device_get_softc(dev);
-
-	reg = (BP_CFG_ENABLE);
-	reg |= (ipi_irq << BP_CFG_IRQ_S);
-	reg |= (tid << BP_CFG_TID_S);
-	bus_write_8(sc->res[BP_CFG], ((BP_FIRST_SOFT + tid) * 8), reg);
-}
-
-void
-beripic_send_ipi(device_t dev, u_int tid)
-{
-	struct beripic_softc *sc;
-	uint64_t bit;
-
-	sc = device_get_softc(dev);
-
-	bit = (BP_FIRST_SOFT + tid);
-	KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
-
-	bus_write_8(sc->res[BP_IP_SET], 0x0, (1 << bit));
-}
-
-void
-beripic_clear_ipi(device_t dev, u_int tid)
-{
-	struct beripic_softc *sc;
-	uint64_t bit;
-
-	sc = device_get_softc(dev);
-
-	bit = (BP_FIRST_SOFT + tid);
-	KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
-
-	bus_write_8(sc->res[BP_IP_CLEAR], 0x0, (1 << bit));
-}
-#endif
-
-static device_method_t beripic_fdt_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		beripic_probe),
-	DEVMETHOD(device_attach,	beripic_attach),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_enable_intr,	beri_pic_enable_intr),
-	DEVMETHOD(pic_disable_intr,	beri_pic_disable_intr),
-	DEVMETHOD(pic_map_intr,		beri_pic_map_intr),
-	DEVMETHOD(pic_post_ithread,	beri_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	beri_pic_pre_ithread),
-
-	DEVMETHOD_END
-};
-
-devclass_t beripic_devclass;
-
-static driver_t beripic_driver = {
-	"beripic",
-	beripic_fdt_methods,
-	sizeof(struct beripic_softc)
-};
-
-EARLY_DRIVER_MODULE(beripic, ofwbus, beripic_driver, beripic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/beri/files.beri b/sys/mips/beri/files.beri
deleted file mode 100644
index b159c13b51de..000000000000
--- a/sys/mips/beri/files.beri
+++ /dev/null
@@ -1,27 +0,0 @@
-# $FreeBSD$
-dev/altera/atse/if_atse.c		optional altera_atse
-dev/altera/atse/if_atse_fdt.c		optional altera_atse fdt
-dev/altera/atse/if_atse_nexus.c		optional altera_atse
-dev/altera/jtag_uart/altera_jtag_uart_cons.c	optional altera_jtag_uart
-dev/altera/jtag_uart/altera_jtag_uart_tty.c	optional altera_jtag_uart
-dev/altera/jtag_uart/altera_jtag_uart_fdt.c	optional altera_jtag_uart fdt
-dev/altera/jtag_uart/altera_jtag_uart_nexus.c	optional altera_jtag_uart
-dev/beri/virtio/virtio_mmio_platform.c	optional virtio_mmio
-dev/netfpga10g/nf10bmac/if_nf10bmac_fdt.c	optional netfpga10g_nf10bmac fdt
-dev/netfpga10g/nf10bmac/if_nf10bmac.c	optional netfpga10g_nf10bmac
-dev/terasic/de4led/terasic_de4led.c	optional terasic_de4led
-dev/terasic/de4led/terasic_de4led_fdt.c	optional terasic_de4led fdt
-dev/terasic/de4led/terasic_de4led_nexus.c	optional terasic_de4led
-dev/terasic/mtl/terasic_mtl.c		optional terasic_mtl
-dev/terasic/mtl/terasic_mtl_fdt.c	optional terasic_mtl fdt
-dev/terasic/mtl/terasic_mtl_nexus.c	optional terasic_mtl
-dev/terasic/mtl/terasic_mtl_pixel.c	optional terasic_mtl
-dev/terasic/mtl/terasic_mtl_reg.c	optional terasic_mtl
-dev/terasic/mtl/terasic_mtl_syscons.c	optional terasic_mtl sc
-dev/terasic/mtl/terasic_mtl_text.c	optional terasic_mtl
-dev/terasic/mtl/terasic_mtl_vt.c	optional terasic_mtl vt
-mips/beri/beri_iommu.c			optional xdma
-mips/beri/beri_machdep.c		standard
-mips/beri/beri_mp.c			optional smp
-mips/beri/beri_pic.c			optional fdt
-mips/mips/tick.c			standard
diff --git a/sys/mips/beri/std.beri b/sys/mips/beri/std.beri
deleted file mode 100644
index ba276338efd8..000000000000
--- a/sys/mips/beri/std.beri
+++ /dev/null
@@ -1,7 +0,0 @@
-# $FreeBSD$
-files	"../beri/files.beri"
-
-cpu		CPU_MIPS4KC
-
-options 	BERI_LARGE_TLB
-options 	PLATFORM_INIT_SECONDARY
diff --git a/sys/mips/broadcom/bcm_bmips.c b/sys/mips/broadcom/bcm_bmips.c
deleted file mode 100644
index 0efd4706941c..000000000000
--- a/sys/mips/broadcom/bcm_bmips.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/proc.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-#include <machine/intr.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/siba/sibareg.h>
-
-#include "pic_if.h"
-
-#include "bcm_mipsvar.h"
-#include "bcm_bmipsreg.h"
-
-/*
- * BMIPS32 and BMIPS3300 core driver.
- *
- * These cores are only found on siba(4) chipsets, allowing
- * us to assume the availability of siba interrupt registers.
- */
-
-struct bcm_bmips_softc;
-
-static int	bcm_bmips_pic_intr(void *arg);
-static void	bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq,
-		    u_int ivec);
-static void	bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq,
-		    u_int ivec);
-
-static const struct bhnd_device bcm_bmips_devs[] = {
-	BHND_DEVICE(BCM, MIPS33, NULL, NULL, BHND_DF_SOC),
-	BHND_DEVICE_END
-};
-
-struct bcm_bmips_softc {
-	struct bcm_mips_softc	 bcm_mips;	/**< parent softc */
-	device_t		 dev;
-	struct resource		*mem;		/**< cpu core registers */
-	int			 mem_rid;
-	struct resource		*cfg;		/**< cpu core's cfg0 register block */
-	int			 cfg_rid;
-};
-
-#define	BCM_BMIPS_NCPU_IRQS	5	/**< MIPS HW IRQs 0-4 are assignable */
-#define	BCM_BMIPS_TIMER_IRQ	5	/**< MIPS HW IRQ5 is always assigned to the timer */
-
-static int
-bcm_bmips_probe(device_t dev)
-{
-	const struct bhnd_device *id;
-
-	id = bhnd_device_lookup(dev, bcm_bmips_devs, sizeof(bcm_bmips_devs[0]));
-	if (id == NULL)
-		return (ENXIO);
-
-	/* Check the chip type; should only be found on siba(4) chipsets */
-	if (bhnd_get_chipid(dev)->chip_type != BHND_CHIPTYPE_SIBA)
-		return (ENXIO);
-
-	bhnd_set_default_core_desc(dev);
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-bcm_bmips_attach(device_t dev)
-{
-	struct bcm_bmips_softc	*sc;
-	int			 error;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	/* Allocate our core's register block */
-	sc->mem_rid = 0;
-	sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
-	    RF_ACTIVE);
-	if (sc->mem == NULL) {
-		device_printf(dev, "failed to allocate cpu register block\n");
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Determine the resource ID for our siba CFG0 registers */
-	sc->cfg_rid = bhnd_get_port_rid(dev, BHND_PORT_AGENT, 0, 0);
-	if (sc->cfg_rid == -1) {
-		device_printf(dev, "missing required cfg0 register block\n");
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Allocate our CFG0 register block */
-	sc->cfg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->cfg_rid,
-	    RF_ACTIVE|RF_SHAREABLE);
-	if (sc->cfg == NULL) {
-		device_printf(dev, "failed to allocate cfg0 register block\n");
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Clear interrupt map */
-	bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, 0x0);	/* MIPS IRQ0 */
-	bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, 0x0);	/* MIPS IRQ1-4 */
-
-	/* Initialize the generic BHND MIPS driver state */
-	error = bcm_mips_attach(dev, BCM_BMIPS_NCPU_IRQS, BCM_BMIPS_TIMER_IRQ,
-	    bcm_bmips_pic_intr);
-	if (error)
-		goto failed;
-
-	return (0);
-
-failed:
-	if (sc->mem != NULL)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-
-	if (sc->cfg != NULL)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg);
-
-	return (error);
-}
-
-static int
-bcm_bmips_detach(device_t dev)
-{
-	struct bcm_bmips_softc	*sc;
-	int			 error;
-
-	sc = device_get_softc(dev);
-
-	if ((error = bcm_mips_detach(dev)))
-		return (error);
-
-	bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-	bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg);
-
-	return (0);
-}
-
-/* PIC_DISABLE_INTR() */
-static void
-bcm_bmips_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
-	struct bcm_bmips_softc	*sc;
-	struct bcm_mips_irqsrc	*isrc;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
-	bcm_bmips_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_ENABLE_INTR() */
-static void
-bcm_bmips_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
-	struct bcm_bmips_softc	*sc;
-	struct bcm_mips_irqsrc	*isrc;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
-	bcm_bmips_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_PRE_ITHREAD() */
-static void
-bcm_bmips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	bcm_bmips_pic_disable_intr(dev, isrc);
-}
-
-/* PIC_POST_ITHREAD() */
-static void
-bcm_bmips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	bcm_bmips_pic_enable_intr(dev, isrc);
-}
-
-/* PIC_POST_FILTER() */
-static void
-bcm_bmips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-/**
- * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ
- * @p mips_irq.
- */
-static void
-bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec)
-{
-	KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec"));
-	KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
-	    mips_irq));
-
-	if (mips_irq == 0) {
-		uint32_t sbintvec;
-
-		sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
-		sbintvec &= ~(1 << ivec);
-		bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec);
-	} else {
-		uint32_t ipsflag;
-
-		/* Can we route this via ipsflag? */
-		KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0,
-		    ("cannot route high sbflag# ivec %u", ivec));
-
-		ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
-		ipsflag &= ~(
-		    ((1 << ivec) << SIBA_IPS_INT_SHIFT(mips_irq)) &
-		    SIBA_IPS_INT_MASK(mips_irq));
-		bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag);
-	}
-
-}
-
-/**
- * Enable routing of an interrupt.
- */
-static void
-bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec)
-{
-	KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec"));
-	KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
-	    mips_irq));
-
-	if (mips_irq == 0) {
-		uint32_t sbintvec;
-
-		sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
-		sbintvec |= (1 << ivec);
-		bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec);
-	} else {
-		uint32_t ipsflag;
-
-		/* Can we route this via ipsflag? */
-		KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0,
-		    ("cannot route high sbflag# ivec %u", ivec));
-
-		ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
-		ipsflag |= (ivec << SIBA_IPS_INT_SHIFT(mips_irq)) &
-		    SIBA_IPS_INT_MASK(mips_irq);
-		bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag);
-	}
-}
-
-/* our MIPS CPU interrupt filter */
-static int
-bcm_bmips_pic_intr(void *arg)
-{
-	struct bcm_bmips_softc	*sc;
-	struct bcm_mips_cpuirq	*cpuirq;
-	struct bcm_mips_irqsrc	*isrc_solo;
-	uint32_t		 sbintvec, sbstatus;
-	u_int			 mips_irq, i;
-	int			 error;
-
-	cpuirq = arg;
-	sc = (struct bcm_bmips_softc*)cpuirq->sc;
-
-	/* Fetch current interrupt state */
-	sbstatus = bus_read_4(sc->cfg, SIBA_CFG0_FLAGST);
-
-	/* Fetch mask of interrupt vectors routed to this MIPS IRQ */
-	mips_irq = cpuirq->mips_irq;
-	if (mips_irq == 0) {
-		sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
-	} else {
-		uint32_t ipsflag;
-
-		ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
-
-		/* Map to an intvec-compatible representation */
-		switch (mips_irq) {
-		case 1:
-			sbintvec = (ipsflag & SIBA_IPS_INT1_MASK) >>
-			    SIBA_IPS_INT1_SHIFT;
-			break;
-		case 2:
-			sbintvec = (ipsflag & SIBA_IPS_INT2_MASK) >>
-			    SIBA_IPS_INT2_SHIFT;
-			break;
-		case 3:
-			sbintvec = (ipsflag & SIBA_IPS_INT3_MASK) >>
-			    SIBA_IPS_INT3_SHIFT;
-			break;
-		case 4: 
-			sbintvec = (ipsflag & SIBA_IPS_INT4_MASK) >>
-			    SIBA_IPS_INT4_SHIFT;
-			break;
-		default:
-			panic("invalid irq %u", mips_irq);
-		}
-	}
-
-	/* Ignore interrupts not routed to this MIPS IRQ */
-	sbstatus &= sbintvec;
-
-	/* Handle isrc_solo direct dispatch path */
-	isrc_solo = cpuirq->isrc_solo;
-	if (isrc_solo != NULL) {
-		if (sbstatus & BCM_MIPS_IVEC_MASK(isrc_solo)) {
-			error = intr_isrc_dispatch(&isrc_solo->isrc,
-			    curthread->td_intr_frame);
-			if (error) {
-				device_printf(sc->dev, "Stray interrupt %u "
-				    "detected\n", isrc_solo->ivec);
-				bcm_bmips_pic_disable_intr(sc->dev,
-				    &isrc_solo->isrc);
-			}
-		}
-
-		sbstatus &= ~(BCM_MIPS_IVEC_MASK(isrc_solo));
-		if (sbstatus == 0)
-			return (FILTER_HANDLED);
-
-		/* Report and mask additional stray interrupts */
-		while ((i = fls(sbstatus)) != 0) {
-			i--; /* Get a 0-offset interrupt. */
-			sbstatus &= ~(1 << i);
-
-			device_printf(sc->dev, "Stray interrupt %u "
-				"detected\n", i);
-			bcm_bmips_mask_irq(sc, mips_irq, i);
-		}
-
-		return (FILTER_HANDLED);
-	}
-
-	/* Standard dispatch path  */
-	while ((i = fls(sbstatus)) != 0) {
-		i--; /* Get a 0-offset interrupt. */
-		sbstatus &= ~(1 << i);
-
-		KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i));
-
-		error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc,
-		    curthread->td_intr_frame);
-		if (error) {
-			device_printf(sc->dev, "Stray interrupt %u detected\n",
-			    i);
-			bcm_bmips_mask_irq(sc, mips_irq, i);
-			continue;
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static device_method_t bcm_bmips_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		bcm_bmips_probe),
-	DEVMETHOD(device_attach,	bcm_bmips_attach),
-	DEVMETHOD(device_detach,	bcm_bmips_detach),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	bcm_bmips_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	bcm_bmips_pic_enable_intr),
-	DEVMETHOD(pic_pre_ithread,	bcm_bmips_pic_pre_ithread),
-	DEVMETHOD(pic_post_ithread,	bcm_bmips_pic_post_ithread),
-	DEVMETHOD(pic_post_filter,	bcm_bmips_pic_post_filter),
-
-	DEVMETHOD_END
-};
-
-static devclass_t bcm_mips_devclass;
-
-DEFINE_CLASS_1(bcm_mips, bcm_bmips_driver, bcm_bmips_methods, sizeof(struct bcm_bmips_softc), bcm_mips_driver);
-EARLY_DRIVER_MODULE(bcm_bmips, bhnd, bcm_bmips_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
-
-MODULE_VERSION(bcm_bmips, 1);
-MODULE_DEPEND(bcm_bmips, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_bmips_exts.h b/sys/mips/broadcom/bcm_bmips_exts.h
deleted file mode 100644
index 7e28d7b9b5ed..000000000000
--- a/sys/mips/broadcom/bcm_bmips_exts.h
+++ /dev/null
@@ -1,189 +0,0 @@
-/*-
- * Copyright 2000,2001,2002,2003 Broadcom Corporation.
- * All rights reserved.
- *
- * This file is derived from the sbmips32.h header distributed
- * by Broadcom with the CFE 1.4.2 sources.
- *
- * This software is furnished under license and may be used and
- * copied only in accordance with the following terms and
- * conditions.  Subject to these conditions, you may download,
- * copy, install, use, modify and distribute modified or unmodified
- * copies of this software in source and/or binary form.  No title
- * or ownership is transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce
- *    and retain this copyright notice and list of conditions
- *    as they appear in the source file.
- *
- * 2) No right is granted to use any trade name, trademark, or
- *    logo of Broadcom Corporation.  The "Broadcom Corporation"
- *    name may not be used to endorse or promote products derived
- *    from this software without the prior written permission of
- *    Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
- *    IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
- *    WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
- *    PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
- *    SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
- *    PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
- *    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- *    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- *    GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- *    OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- *    TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
- *    THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*  *********************************************************************
-    *  Broadcom Common Firmware Environment (CFE)
-    *  
-    *  MIPS32 CPU definitions			File: sbmips32.h
-    * 
-    *  This module contains constants and macros specific to the
-    *  Broadcom MIPS32 core.  In addition to generic MIPS32, it
-    *  includes definitions for the MIP32-01 and MIPS3302 OCP cores
-    *  for the Silicon Backplane.
-    *
-    *********************************************************************/
-
-#ifndef _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_
-#define _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_
-
-#include <machine/cpufunc.h>
-
-/*
- * The following Broadcom Custom CP0 Registers appear in the Broadcom
- * BMIPS330x MIPS32 core.
- */
-
-#define	BMIPS_COP_0_BCMCFG	22
-
-/*
- * Custom CP0 Accessors
- */
-
-#define	BCM_BMIPS_RW32_COP0_SEL(n,r,s)				\
-static __inline uint32_t					\
-bcm_bmips_rd_ ## n(void)					\
-{								\
-	int v0;							\
-	__asm __volatile ("mfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			  : [v0] "=&r"(v0));			\
-	mips_barrier();						\
-	return (v0);						\
-}								\
-static __inline void						\
-bcm_bmips_wr_ ## n(uint32_t a0)					\
-{								\
-	__asm __volatile ("mtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			 __XSTRING(COP0_SYNC)";"		\
-			 "nop;"					\
-			 "nop;"					\
-			 :					\
-			 : [a0] "r"(a0));			\
-	mips_barrier();						\
-} struct __hack
-
-BCM_BMIPS_RW32_COP0_SEL(pllcfg1,	MIPS_COP_0_CONFIG,	1);
-BCM_BMIPS_RW32_COP0_SEL(pllcfg2,	MIPS_COP_0_CONFIG,	2);
-BCM_BMIPS_RW32_COP0_SEL(clksync,	MIPS_COP_0_CONFIG,	3);
-BCM_BMIPS_RW32_COP0_SEL(pllcfg3,	MIPS_COP_0_CONFIG,	4);
-BCM_BMIPS_RW32_COP0_SEL(rstcfg,		MIPS_COP_0_CONFIG,	5);
-
-/*
- * Broadcom PLLConfig1 Register (22, select 1)
- */
-
-/* SoftMIPSPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG1_MC_SHIFT	10
-#define	BMIPS_BCMCFG_PLLCFG1_MC_MASK	0xFFFFFC00
-
-/* SoftISBPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG1_BC_SHIFT	5
-#define	BMIPS_BCMCFG_PLLCFG1_BC_MASK	0x000003E0
-
-/* SoftRefPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG1_PC_SHIFT	0
-#define	BMIPS_BCMCFG_PLLCFG1_PC_MASK	0x0000001F
-
-/*
- * Broadcom PLLConfig2 Register (22, select 2)
- */
-
-/* Soft1to1ClkRatio */
-#define	BMIPS_BCMCFG_PLLCFG2_CR		(1<<23)
-
-/* SoftUSBxPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG2_UC_SHIFT	15
-#define	BMIPS_BCMCFG_PLLCFG2_UC_MASK	0x007F8000
-
-/* SoftIDExPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG2_IC_SHIFT	7
-#define	BMIPS_BCMCFG_PLLCFG2_IC_MASK	0x00007F80
-
-#define	BMIPS_BCMCFG_PLLCFG2_BE		(1<<6)	/* ISBxSoftCfgEnable */
-#define	BMIPS_BCMCFG_PLLCFG2_UE		(1<<5)	/* USBxSoftCfgEnable */
-#define	BMIPS_BCMCFG_PLLCFG2_IE		(1<<4)	/* IDExSoftCfgEnable */
-#define	BMIPS_BCMCFG_PLLCFG2_CA		(1<<3)	/* CfgActive */
-#define	BMIPS_BCMCFG_PLLCFG2_CF		(1<<2)	/* RefSoftCfgEnable */
-#define	BMIPS_BCMCFG_PLLCFG2_CI		(1<<1)	/* ISBSoftCfgEnable */
-#define	BMIPS_BCMCFG_PLLCFG2_CC		(1<<0)	/* MIPSSoftCfgEnable */
-
-/*
- * Broadcom ClkSync Register (22, select 3)
- */
-/* SoftClkCfgHigh */
-#define	BMIPS_BCMCFG_CLKSYNC_CH_SHIFT	16
-#define	BMIPS_BCMCFG_CLKSYNC_CH_MASK	0xFFFF0000
-
-/* SoftClkCfgLow */
-#define	BMIPS_BCMCFG_CLKSYNC_CL_SHIFT	0
-#define	BMIPS_BCMCFG_CLKSYNC_CL_MASK	0x0000FFFF
-
-/*
- * Broadcom ISBxPLLConfig3 Register (22, select 4)
- */
-
-/* AsyncClkRatio */
-#define	BMIPS_BCMCFG_PLLCFG3_AR_SHIFT	23
-#define	BMIPS_BCMCFG_PLLCFG3_AR_MASK	0x01800000
-
-#define	BMIPS_BCMCFG_PLLCFG3_SM		(1<<22)	/* SyncMode */
-
-/* SoftISBxPLLCfg */
-#define	BMIPS_BCMCFG_PLLCFG3_IC_SHIFT	0
-#define	BMIPS_BCMCFG_PLLCFG3_IC_MASK	0x003FFFFF
-
-/*
- * Broadcom BRCMRstConfig Register (22, select 5)
- */
-
-#define	BMIPS_BCMCFG_RSTCFG_SR		(1<<18)	/* SSMR */
-#define	BMIPS_BCMCFG_RSTCFG_DT		(1<<16)	/* BHTD */
-
-/* RStSt */
-#define	BMIPS_BCMCFG_RSTCFG_RS_SHIFT	8
-#define	BMIPS_BCMCFG_RSTCFG_RS_MASK	0x00001F00
-#define	  BMIPS_BCMCFG_RST_OTHER	0x00
-#define	  BMIPS_BCMCFG_RST_SH		0x01
-#define	  BMIPS_BCMCFG_RST_SS		0x02
-#define	  BMIPS_BCMCFG_RST_EJTAG	0x04
-#define	  BMIPS_BCMCFG_RST_WDOG		0x08
-#define	  BMIPS_BCMCFG_RST_CRC		0x10
-
-#define	BMIPS_BCMCFG_RSTCFG_CR		(1<<7)	/* RStCr */
-
-/* WBMD */
-#define	BMIPS_BCMCFG_RSTCFG_WD_SHIFT	3
-#define	BMIPS_BCMCFG_RSTCFG_WD_MASK	0x00000078
-
-#define	BMIPS_BCMCFG_RSTCFG_SS		(1<<2)	/* SSR */
-#define	BMIPS_BCMCFG_RSTCFG_SH		(1<<1)	/* SHR */
-#define	BMIPS_BCMCFG_RSTCFG_BR		(1<<0)	/* BdR */
-
-#endif /* _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_ */
diff --git a/sys/mips/broadcom/bcm_bmipsreg.h b/sys/mips/broadcom/bcm_bmipsreg.h
deleted file mode 100644
index ff77a20e667e..000000000000
--- a/sys/mips/broadcom/bcm_bmipsreg.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_BROADCOM_BMIPSREG_H_
-#define	_MIPS_BROADCOM_BMIPSREG_H_
-
-/*
- * Common BMIPS32/BMIPS3300 Registers
- */
-#define	BCM_BMIPS_CORECTL		0x00	/**< core control */
-#define	  BCM_BMIPS_CORECTL_FORCE_RST	0x01	/**< force reset */
-#define	  BCM_BMIPS_CORECTL_NO_FLSH_EXC	0x02	/**< flash exception disable */
-#define	BCM_BMIPS_INTR_STATUS		0x20	/**< interrupt status */
-#define	BCM_BMIPS_INTR_MASK		0x24	/**< interrupt mask */
-#define	  BCM_BMIPS_TIMER_INTMASK	0x01	/**< timer interrupt mask */
-#define	BCM_BMIPS_TIMER_CTRL		0x28	/**< timer interval (?) */
-
-/*
- * Broadcom BMIPS32 (BHND_COREID_MIPS)
- */
-
-#define	BCM_BMIPS32_CORECTL		BCM_BMIPS_CORECTL
-#define	BCM_BMIPS32_BIST_STATUS		0x04	/**< built-in self-test status */
-#define	BCM_BMIPS32_INTR_STATUS		BCM_BMIPS_INTR_STATUS
-#define	BCM_BMIPS32_INTR_MASK		BCM_BMIPS_INTR_MASK
-#define	BCM_BMIPS32_TIMER_CTRL		BCM_BMIPS_TIMER_CTRL
-
-/*
- * Broadcom BMIPS3300+ (BHND_COREID_MIPS33)
- */
-
-#define	BCM_BMIPS33_CORECTL		BCM_BMIPS_CORECTL
-#define	BCM_BMIPS33_BIST_CTRL		0x04	/**< build-in self-test control */
-#define	  BCM_BMIPS33_BIST_CTRL_DUMP	0x01	/**< BIST dump */
-#define	  BCM_BMIPS33_BIST_CTRL_DEBUG	0x02	/**< BIST debug */
-#define	  BCM_BMIPS33_BIST_CTRL_HOLD	0x04	/**< BIST hold */
-#define	BCM_BMIPS33_BIST_STATUS		0x08	/**< built-in self-test status */
-#define	BCM_BMIPS33_INTR_STATUS		BCM_BMIPS_INTR_STATUS
-#define	BCM_BMIPS33_INTR_MASK		BCM_BMIPS_INTR_MASK
-#define	BCM_BMIPS33_TIMER_CTRL		BCM_BMIPS_TIMER_CTRL
-#define	BCM_BMIPS33_TEST_MUX_SEL	0x30	/**< test multiplexer select (?) */
-#define	BCM_BMIPS33_TEST_MUX_EN		0x34	/**< test multiplexer enable (?) */
-#define	BCM_BMIPS33_EJTAG_GPIO_EN	0x2C	/**< ejtag gpio enable */
-
-#endif /* _MIPS_BROADCOM_BMIPSREG_H_ */
diff --git a/sys/mips/broadcom/bcm_machdep.c b/sys/mips/broadcom/bcm_machdep.c
deleted file mode 100644
index 581fffdd899d..000000000000
--- a/sys/mips/broadcom/bcm_machdep.c
+++ /dev/null
@@ -1,662 +0,0 @@
-/*-
- * Copyright (c) 2007 Bruce M. Simpson.
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhndreg.h>
-#include <dev/bhnd/bhnd_eromvar.h>
-
-#include <dev/bhnd/bcma/bcma_eromvar.h>
-
-#include <dev/bhnd/siba/sibareg.h>
-#include <dev/bhnd/siba/sibavar.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-#include <dev/bhnd/cores/pmu/bhnd_pmureg.h>
-
-#include "bcm_machdep.h"
-#include "bcm_bmips_exts.h"
-
-#ifdef CFE
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_error.h>
-#endif
-
-#if 0
-#define	BCM_TRACE(_fmt, ...)	printf(_fmt, ##__VA_ARGS__)
-#else
-#define	BCM_TRACE(_fmt, ...)
-#endif
-
-static int	bcm_init_platform_data(struct bcm_platform *bp);
-
-static int	bcm_find_core(struct bcm_platform *bp,
-		    const struct bhnd_core_match *descs, size_t num_descs,
-		    struct bhnd_core_info *info, uintptr_t *addr);
-
-static int	bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls,
-		    kobj_ops_t erom_ops, bhnd_erom_t *erom, size_t esize,
-		    struct bhnd_erom_io *eio, struct bhnd_chipid *cid);
-
-extern int	*edata;
-extern int	*end;
-
-/* from sys/mips/mips/machdep.c */
-extern char	cpu_model[];
-
-static struct bcm_platform	 bcm_platform_data;
-static bool			 bcm_platform_data_avail = false;
-
-#ifdef CFE
-static struct bcm_nvram_iocfe	 bcm_cfe_nvram;
-#endif
-
-static const struct bhnd_core_match bcm_chipc_cores[] = {
-	{ BHND_MATCH_CORE(BHND_MFGID_BCM,	BHND_COREID_CC)		},
-	{ BHND_MATCH_CORE(BHND_MFGID_BCM,	BHND_COREID_4706_CC)	},
-};
-
-static const struct bhnd_core_match bcm_cpu0_cores[] = {
-	{
-		BHND_MATCH_CORE_CLASS(BHND_DEVCLASS_CPU),
-		BHND_MATCH_CORE_UNIT(0)
-	}
-};
-
-static const struct bhnd_core_match bcm_pmu_cores[] = {
-	{ BHND_MATCH_CORE(BHND_MFGID_BCM,	BHND_COREID_PMU)	},
-};
-
-struct bcm_platform *
-bcm_get_platform(void)
-{
-	if (!bcm_platform_data_avail)
-		panic("platform data not available");
-
-	return (&bcm_platform_data);
-}
-
-static bus_addr_t
-bcm_get_bus_addr(void)
-{
-	long maddr;
-
-	if (resource_long_value("bhnd", 0, "maddr", &maddr) == 0)
-		return ((u_long)maddr);
-
-	return (BHND_DEFAULT_CHIPC_ADDR);
-}
-
-static bus_size_t
-bcm_get_bus_size(void)
-{
-	long msize;
-
-	if (resource_long_value("bhnd", 0, "msize", &msize) == 0)
-		return ((u_long)msize);
-
-	return (BHND_DEFAULT_ENUM_SIZE);
-}
-
-/**
- * Search the device enumeration table for a core matching @p descs,
- * 
- * @param	bp		Platform state containing a valid EROM parser.
- * @param	descs		The core match descriptor table.
- * @param	num_descs	The number of match descriptors in @p descs.
- * @param[out]	info		If non-NULL, will be populated with the core
- *				info.
- * @param[out]	addr		If non-NULL, will be populated with the core's
- *				physical register address.
- */
-static int
-bcm_find_core(struct bcm_platform *bp, const struct bhnd_core_match *descs,
-    size_t num_descs, struct bhnd_core_info *info, uintptr_t *addr)
-{
-	bhnd_addr_t		b_addr;
-	bhnd_size_t		b_size;
-	int			error;
-
-	/* Fetch core info */
-	for (size_t i = 0; i < num_descs; i++) {
-		error = bhnd_erom_lookup_core_addr(&bp->erom.obj, &descs[i],
-		    BHND_PORT_DEVICE, 0, 0, info, &b_addr, &b_size);
-
-		/* Terminate search on first match */
-		if (error == 0)
-			break;
-
-		/* Terminate on first error (other than core not found) */
-		if (error != ENOENT)
-			return (error);
-
-		/* Continue search ... */
-	}
-
-	/* Provide the core's base address */
-	if (addr != NULL && b_addr > UINTPTR_MAX) {
-		BCM_ERR("core address %#jx overflows native address width\n",
-		    (uintmax_t)b_addr);
-		return (ERANGE);
-	}
-
-	if (addr != NULL)
-		*addr = b_addr;
-
-	return (0);
-}
-
-/**
- * Read a variable directly from NVRAM, decoding as @p type.
- *
- * @param		bp	Platform state.
- * @param		name	The raw name of the variable to be fetched,
- *				including any device path (/pci/1/1/varname) or
- *				alias prefix (0:varname).
- * @param[out]		buf	On success, the requested value will be written
- *				to this buffer. This argment may be NULL if
- *				the value is not desired.
- * @param[in,out]	len	The capacity of @p buf. On success, will be set
- *				to the actual size of the requested value.
- * @param		type	The data type to be written to @p buf.
- *
- * @retval 0		success
- * @retval ENOMEM	If @p buf is non-NULL and a buffer of @p len is too
- *			small to hold the requested value.
- * @retval ENOENT	If @p name is not found.
- * @retval EFTYPE	If the variable data cannot be coerced to @p type.
- * @retval ERANGE	If value coercion would overflow @p type.
- * @retval non-zero	If parsing NVRAM otherwise fails, a regular unix error
- *			code will be returned.
- */
-int
-bcm_get_nvram(struct bcm_platform *bp, const char *name, void *buf, size_t *len,
-    bhnd_nvram_type type)
-{
-	if (bp->nvram_io == NULL || bp->nvram_cls == NULL)
-		return (ENOENT);
-
-	return (bhnd_nvram_data_getvar_direct(bp->nvram_cls, bp->nvram_io, name,
-	    buf, len, type));
-}
-
-/**
- * Probe and attach a bhnd_erom parser instance for the bhnd bus.
- * 
- * @param[out]	erom_cls	The probed EROM class.
- * @param[out]	erom_ops	The storage to be used when compiling
- *				@p erom_cls.
- * @param[out]	erom		The storage to be used when initializing the
- *				static instance of @p erom_cls.
- * @param	esize		The total available number of bytes allocated
- *				for @p erom. If this is less than is required
- *				by @p erom_cls ENOMEM will be returned.
- * @param	eio		EROM I/O callbacks to be used.
- * @param[out]	cid		On success, the probed chip identification.
- */
-static int
-bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls, kobj_ops_t erom_ops,
-    bhnd_erom_t *erom, size_t esize, struct bhnd_erom_io *eio,
-    struct bhnd_chipid *cid)
-{
-	bhnd_erom_class_t	**clsp;
-	bus_addr_t		  bus_addr;
-	int			  error, prio, result;
-
-	*erom_cls = NULL;
-	prio = 0;
-
-	/* Map our first bus core for the erom probe */
-	bus_addr = bcm_get_bus_addr();
-	if ((error = bhnd_erom_io_map(eio, bus_addr, BHND_DEFAULT_CORE_SIZE))) {
-		BCM_ERR("failed to map first core at %#jx+%#jx: %d\n",
-		    (uintmax_t)bus_addr, (uintmax_t)BHND_DEFAULT_CORE_SIZE,
-		    error);
-
-		return (error);
-	}
-
-	SET_FOREACH(clsp, bhnd_erom_class_set) {
-		struct bhnd_chipid	 pcid;
-		bhnd_erom_class_t	*cls;
-		struct kobj_ops		 kops;
-
-		cls = *clsp;
-
-		/* Compile the class' ops table */
-		kobj_class_compile_static(cls, &kops);
-
-		/* Probe the bus address */
-		result = bhnd_erom_probe(cls, eio, NULL, &pcid);
-
-		/* Drop pointer to stack allocated ops table */
-		cls->ops = NULL;
-
-		/* The parser did not match if an error was returned */
-		if (result > 0)
-			continue;
-
-		/* Check for a new highest priority match */
-		if (*erom_cls == NULL || result > prio) {
-			prio = result;
-
-			*cid = pcid;
-			*erom_cls = cls;
-		}
-
-		/* Terminate immediately on BUS_PROBE_SPECIFIC */
-		if (result == BUS_PROBE_SPECIFIC)
-			break;
-	}
-
-	/* Valid EROM class probed? */
-	if (*erom_cls == NULL) {
-		BCM_ERR("no erom parser found for root bus at %#jx\n", 
-		    (uintmax_t)bus_addr);
-
-		return (ENOENT);
-	}
-
-	/* Using the provided storage, recompile the erom class ... */
-	kobj_class_compile_static(*erom_cls, erom_ops);
-
-	/* ... and initialize the erom parser instance */
-	error = bhnd_erom_init_static(*erom_cls, erom, esize, cid, eio);
-
-	return (error);
-}
-
-/**
- * Populate platform configuration data.
- */
-static int
-bcm_init_platform_data(struct bcm_platform *bp)
-{
-	bus_addr_t		bus_addr, bus_size;
-	bus_space_tag_t		erom_bst;
-	bus_space_handle_t	erom_bsh;
-	bool			aob, pmu;
-	int			error;
-
-	bus_addr = bcm_get_bus_addr();
-	bus_size = bcm_get_bus_size();
-
-#ifdef CFE
-	/* Fetch CFE console handle (if any). Must be initialized before
-	 * any calls to printf/early_putc. */
-	if ((bp->cfe_console = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE)) < 0)
-		bp->cfe_console = -1;
-
-	/* Probe CFE NVRAM sources */
-	bp->nvram_io = &bcm_cfe_nvram.io;
-	error = bcm_nvram_find_cfedev(&bcm_cfe_nvram, &bp->nvram_cls);
-	if (error) {
-		bp->nvram_io = NULL;
-		bp->nvram_cls = NULL;
-	}
-#endif /* CFE */
-
-	/* Probe and attach device table provider, populating our
-	 * chip identification */
-	erom_bst = mips_bus_space_generic;
-	erom_bsh = BCM_SOC_BSH(bus_addr, 0);
-
-	error = bhnd_erom_iobus_init(&bp->erom_io, bus_addr, bus_size, erom_bst,
-	    erom_bsh);
-	if (error) {
-		BCM_ERR("failed to initialize erom I/O callbacks: %d\n", error);
-		return (error);
-	}
-
-	error = bcm_erom_probe_and_attach(&bp->erom_impl, &bp->erom_ops,
-	    &bp->erom.obj, sizeof(bp->erom), &bp->erom_io.eio, &bp->cid);
-	if (error) {
-		BCM_ERR("error attaching erom parser: %d\n", error);
-		bhnd_erom_io_fini(&bp->erom_io.eio);
-		return (error);
-	}
-
-	if (bootverbose)
-		bhnd_erom_dump(&bp->erom.obj);
-
-	/* Fetch chipcommon core info */
-	error = bcm_find_core(bp, bcm_chipc_cores, nitems(bcm_chipc_cores),
-	    &bp->cc_id, &bp->cc_addr);
-	if (error) {
-		BCM_ERR("error locating chipc core: %d\n", error);
-		return (error);
-	}
-
-	/* All hex formatted IDs are within the range of 0x4000-0x9C3F (40000-1) */
-	if (bp->cid.chip_id >= 0x4000 && bp->cid.chip_id <= 0x9C3F)
-		snprintf(cpu_model, 10, "BCM%hX", bp->cid.chip_id);
-	else
-		snprintf(cpu_model, 10, "BCM%hu", bp->cid.chip_id);
-
-	/* Fetch chipc capability flags */
-	bp->cc_caps = BCM_SOC_READ_4(bp->cc_addr, CHIPC_CAPABILITIES);
-	bp->cc_caps_ext = 0x0;	
-
-	if (CHIPC_HWREV_HAS_CAP_EXT(bp->cc_id.hwrev))
-		bp->cc_caps_ext = BCM_CHIPC_READ_4(bp, CHIPC_CAPABILITIES_EXT);
-
-	/* Fetch PMU info */
-	pmu = CHIPC_GET_FLAG(bp->cc_caps, CHIPC_CAP_PMU);
-	aob = CHIPC_GET_FLAG(bp->cc_caps_ext, CHIPC_CAP2_AOB);
-
-	if (pmu && aob) {
-		/* PMU block mapped to a PMU core on the Always-on-Bus (aob) */
-		error = bcm_find_core(bp, bcm_pmu_cores, nitems(bcm_pmu_cores),
-		    &bp->pmu_id,  &bp->pmu_addr);
-		if (error) {
-			BCM_ERR("error locating pmu core: %d\n", error);
-			return (error);
-		}
-	} else if (pmu) {
-		/* PMU block mapped to chipc */
-		bp->pmu_addr = bp->cc_addr;
-		bp->pmu_id = bp->cc_id;
-	} else {
-		/* No PMU */
-		bp->pmu_addr = 0x0;
-		memset(&bp->pmu_id, 0, sizeof(bp->pmu_id));
-	}
-
-	/* Initialize PMU query state */
-	if (pmu) {
-		error = bhnd_pmu_query_init(&bp->pmu, NULL, bp->cid,
-		    &bcm_pmu_soc_io, bp);
-		if (error) {
-			BCM_ERR("bhnd_pmu_query_init() failed: %d\n", error);
-			return (error);
-		}
-	}
-
-	/* Find CPU core info */
-	error = bcm_find_core(bp, bcm_cpu0_cores, nitems(bcm_cpu0_cores),
-	    &bp->cpu_id,  &bp->cpu_addr);
-	if (error) {
-		BCM_ERR("error locating CPU core: %d\n", error);
-		return (error);
-	}
-
-	/* Initialize our platform service registry */
-	if ((error = bhnd_service_registry_init(&bp->services))) {
-		BCM_ERR("error initializing service registry: %d\n", error);
-		return (error);
-	}
-
-	bcm_platform_data_avail = true;
-	return (0);
-}
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	int i, j;
-
-	printf("entry: mips_init()\n");
-
-#ifdef CFE
-	/*
-	 * Query DRAM memory map from CFE.
-	 */
-	physmem = 0;
-	for (i = 0; i < 10; i += 2) {
-		int result;
-		uint64_t addr, len, type;
-
-		result = cfe_enummem(i / 2, 0, &addr, &len, &type);
-		if (result < 0) {
-			BCM_TRACE("There is no phys memory for: %d\n", i);
-			phys_avail[i] = phys_avail[i + 1] = 0;
-			break;
-		}
-		if (type != CFE_MI_AVAILABLE) {
-			BCM_TRACE("phys memory is not available: %d\n", i);
-			continue;
-		}
-
-		phys_avail[i] = addr;
-		if (i == 0 && addr == 0) {
-			/*
-			 * If this is the first physical memory segment probed
-			 * from CFE, omit the region at the start of physical
-			 * memory where the kernel has been loaded.
-			 */
-			phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-		}
-		
-		BCM_TRACE("phys memory is available for: %d\n", i);
-		BCM_TRACE(" => addr =  %jx\n", addr);
-		BCM_TRACE(" => len =  %jd\n", len);
-
-		phys_avail[i + 1] = addr + len;
-		physmem += len;
-	}
-
-	BCM_TRACE("Total phys memory is : %ld\n", physmem);
-	realmem = btoc(physmem);
-#endif
-
-	for (j = 0; j < i; j++)
-		dump_avail[j] = phys_avail[j];
-
-	physmem = realmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
-	struct bcm_platform	*bp;
-	bool			 bcm4785war;
-
-	printf("bcm::platform_reset()\n");
-	intr_disable();
-
-#ifdef CFE
-	/* Fall back on CFE if reset requested during platform
-	 * data initialization */
-	if (!bcm_platform_data_avail) {
-		cfe_exit(0, 0);
-		while (1);
-	}
-#endif
-
-	bp = bcm_get_platform();
-	bcm4785war = false;
-
-	/* Handle BCM4785-specific behavior */
-	if (bp->cid.chip_id == BHND_CHIPID_BCM4785) {
-		bcm4785war = true;
-
-		/* Switch to async mode */
-		bcm_bmips_wr_pllcfg3(BMIPS_BCMCFG_PLLCFG3_SM);
-	}
-
-	/* Set watchdog (PMU or ChipCommon) */
-	if (bp->pmu_addr != 0x0) {
-		BCM_PMU_WRITE_4(bp, BHND_PMU_WATCHDOG, 1);
-	} else
-		BCM_CHIPC_WRITE_4(bp, CHIPC_WATCHDOG, 1);
-
-	/* BCM4785 */
-	if (bcm4785war) {
-		mips_sync();
-		__asm __volatile("wait");
-	}
-
-	while (1);
-}
-
-void
-platform_start(__register_t a0, __register_t a1, __register_t a2,
-	       __register_t a3)
-{
-	vm_offset_t 		 kernend;
-	uint64_t		 platform_counter_freq;
-	int			 error;
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-#ifdef CFE
-	/*
-	 * Initialize CFE firmware trampolines. This must be done
-	 * before any CFE APIs are called, including writing
-	 * to the CFE console.
-	 *
-	 * CFE passes the following values in registers:
-	 * a0: firmware handle
-	 * a2: firmware entry point
-	 * a3: entry point seal
-	 */
-	if (a3 == CFE_EPTSEAL)
-		cfe_init(a0, a2);
-#endif
-
-	/* Init BCM platform data */
-	if ((error = bcm_init_platform_data(&bcm_platform_data)))
-		panic("bcm_init_platform_data() failed: %d", error);
-
-	platform_counter_freq = bcm_get_cpufreq(bcm_get_platform());
-
-	/* CP0 ticks every two cycles */
-	mips_timer_early_init(platform_counter_freq / 2);
-
-	cninit();
-
-	mips_init();
-
-	mips_timer_init_params(platform_counter_freq, 1);
-}
-
-/*
- * CFE-based EARLY_PRINTF support. To use, add the following to the kernel
- * config:
- *	option EARLY_PRINTF
- *	option CFE
- *	device cfe
- */
-#if defined(EARLY_PRINTF) && defined(CFE)
-static void
-bcm_cfe_eputc(int c)
-{
-	unsigned char	ch;
-	int		handle;
-
-	ch = (unsigned char) c;
-
-	/* bcm_get_platform() cannot be used here, as we may be called
-	 * from bcm_init_platform_data(). */
-	if ((handle = bcm_platform_data.cfe_console) < 0)
-		return;
-
-	if (ch == '\n')
-		early_putc('\r');
-
-	while ((cfe_write(handle, &ch, 1)) == 0)
-		continue;
-}
-
-early_putc_t *early_putc = bcm_cfe_eputc;
-#endif /* EARLY_PRINTF */
diff --git a/sys/mips/broadcom/bcm_machdep.h b/sys/mips/broadcom/bcm_machdep.h
deleted file mode 100644
index 7a8b155961b9..000000000000
--- a/sys/mips/broadcom/bcm_machdep.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_BROADCOM_BCM_MACHDEP_H_
-#define	_MIPS_BROADCOM_BCM_MACHDEP_H_
-
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhnd_eromvar.h>
-
-#include <dev/bhnd/cores/pmu/bhnd_pmuvar.h>
-
-#include "bcm_nvram_cfevar.h"
-
-extern const struct bhnd_pmu_io	bcm_pmu_soc_io;
-
-struct bcm_platform {
-	struct bhnd_chipid		 cid;		/**< chip id */
-	struct bhnd_core_info		 cc_id;		/**< chipc core info */
-	uintptr_t			 cc_addr;	/**< chipc core phys address */
-	uint32_t			 cc_caps;	/**< chipc capabilities */
-	uint32_t			 cc_caps_ext;	/**< chipc extended capabilies */
-
-	struct bhnd_core_info		 cpu_id;	/**< cpu core info */
-	uintptr_t			 cpu_addr;	/**< cpu core phys address */
-
-	/* On non-AOB devices, the PMU register block is mapped to chipc;
-	 * the pmu_id and pmu_addr values will be copied from cc_id
-	 * and cc_addr. */
-	struct bhnd_core_info		 pmu_id;	/**< PMU core info */
-	uintptr_t			 pmu_addr;	/**< PMU core phys address, or
-							     0x0 if no PMU */
-
-	struct bhnd_pmu_query		 pmu;		/**< PMU query instance */
-
-	bhnd_erom_class_t		*erom_impl;	/**< erom parser class */
-	struct kobj_ops			 erom_ops;	/**< compiled kobj opcache */
-	struct bhnd_erom_iobus		 erom_io;	/**< erom I/O callbacks */
-	union {
-		bhnd_erom_static_t	 data;
-		bhnd_erom_t		 obj;
-	} erom;
-
-	struct bhnd_nvram_io		*nvram_io;	/**< NVRAM I/O context, or NULL if unavailable */
-	bhnd_nvram_data_class		*nvram_cls;	/**< NVRAM data class, or NULL if unavailable */
-
-	struct bhnd_service_registry	 services;	/**< platform service providers */
-
-#ifdef CFE
-	int				 cfe_console;	/**< Console handle, or -1 */
-#endif
-};
-
-struct bcm_platform	*bcm_get_platform(void);
-
-uint64_t		 bcm_get_cpufreq(struct bcm_platform *bp);
-uint64_t		 bcm_get_sifreq(struct bcm_platform *bp);
-uint64_t		 bcm_get_alpfreq(struct bcm_platform *bp);
-uint64_t		 bcm_get_ilpfreq(struct bcm_platform *bp);
-
-u_int			 bcm_get_uart_rclk(struct bcm_platform *bp);
-
-int			 bcm_get_nvram(struct bcm_platform *bp,
-			     const char *name, void *outp, size_t *olen,
-			     bhnd_nvram_type type);
-
-#define	BCM_ERR(fmt, ...)	\
-	printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__)
-
-#define	BCM_SOC_BSH(_addr, _offset)			\
-	((bus_space_handle_t)BCM_SOC_ADDR((_addr), (_offset)))
-
-#define	BCM_SOC_ADDR(_addr, _offset)			\
-	MIPS_PHYS_TO_KSEG1((_addr) + (_offset))
-
-#define	BCM_SOC_READ_4(_addr, _offset)			\
-	readl(BCM_SOC_ADDR((_addr), (_offset)))
-#define	BCM_SOC_WRITE_4(_addr, _reg, _val)		\
-	writel(BCM_SOC_ADDR((_addr), (_offset)), (_val))
-
-#define	BCM_CORE_ADDR(_bp, _name, _reg)			\
-	BCM_SOC_ADDR(_bp->_name, (_reg))
-
-#define	BCM_CORE_READ_4(_bp, _name, _reg)		\
-	readl(BCM_CORE_ADDR(_bp, _name, (_reg)))
-#define	BCM_CORE_WRITE_4(_bp, _name, _reg, _val)	\
-	writel(BCM_CORE_ADDR(_bp, _name, (_reg)), (_val))
-
-#define	BCM_CHIPC_READ_4(_bp, _reg)			\
-	BCM_CORE_READ_4(_bp, cc_addr, (_reg))
-#define	BCM_CHIPC_WRITE_4(_bp, _reg, _val)		\
-	BCM_CORE_WRITE_4(_bp, cc_addr, (_reg), (_val))
-
-#define	BCM_CPU_READ_4(_bp, _reg)			\
-	BCM_CORE_READ_4(_bp, cpu_addr, (_reg))
-#define	BCM_CPU_WRITE_4(_bp, _reg, _val)		\
-	BCM_CORE_WRITE_4(_bp, cpu_addr, (_reg), (_val))
-
-#define	BCM_PMU_READ_4(_bp, _reg)			\
-	BCM_CORE_READ_4(_bp, pmu_addr, (_reg))
-#define	BCM_PMU_WRITE_4(_bp, _reg, _val)		\
-	BCM_CORE_WRITE_4(_bp, pmu_addr, (_reg), (_val))
-
-#endif /* _MIPS_BROADCOM_BCM_MACHDEP_H_ */
diff --git a/sys/mips/broadcom/bcm_mips.c b/sys/mips/broadcom/bcm_mips.c
deleted file mode 100644
index 2c4e8e696a8b..000000000000
--- a/sys/mips/broadcom/bcm_mips.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/*-
- * Copyright (c) 2017 The FreeBSD Foundation
- *
- * This software was developed by Landon Fuller under sponsorship from
- * the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/limits.h>
-#include <sys/systm.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/resource.h>
-#include <sys/rman.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/siba/sibareg.h>
-
-#include "pic_if.h"
-
-#include "bcm_mipsvar.h"
-
-/*
- * Broadcom MIPS core driver.
- *
- * Abstract driver for Broadcom MIPS CPU/PIC cores.
- */
-
-static uintptr_t	bcm_mips_pic_xref(struct bcm_mips_softc *sc);
-static device_t		bcm_mips_find_bhnd_parent(device_t dev);
-static int		bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc,
-			    struct bcm_mips_irqsrc *isrc, struct resource *res);
-static int		bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc,
-			    struct bcm_mips_irqsrc *isrc, struct resource *res);
-
-static const int bcm_mips_debug = 0;
-
-#define	DPRINTF(fmt, ...) do {						\
-	if (bcm_mips_debug)						\
-		printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__);	\
-} while (0)
-
-#define	DENTRY(dev, fmt, ...) do {					\
-	if (bcm_mips_debug)						\
-		printf("%s(%s, " fmt ")\n", __FUNCTION__,		\
-		    device_get_nameunit(dev), ##__VA_ARGS__);		\
-} while (0)
-
-/**
- * Register all interrupt source definitions.
- */
-static int
-bcm_mips_register_isrcs(struct bcm_mips_softc *sc)
-{
-	const char	*name;
-	uintptr_t	 xref;
-	int		 error;
-
-	xref = bcm_mips_pic_xref(sc);
-
-	name = device_get_nameunit(sc->dev);
-	for (size_t ivec = 0; ivec < nitems(sc->isrcs); ivec++) {
-		sc->isrcs[ivec].ivec = ivec;
-		sc->isrcs[ivec].cpuirq = NULL;
-		sc->isrcs[ivec].refs = 0;
-
-		error = intr_isrc_register(&sc->isrcs[ivec].isrc, sc->dev,
-		    xref, "%s,%u", name, ivec);
-		if (error) {
-			for (size_t i = 0; i < ivec; i++)
-				intr_isrc_deregister(&sc->isrcs[i].isrc);
-
-			device_printf(sc->dev, "error registering IRQ %zu: "
-			    "%d\n", ivec, error);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-/**
- * Initialize the given @p cpuirq state as unavailable.
- * 
- * @param sc		BHND MIPS driver instance state.
- * @param cpuirq	The CPU IRQ state to be initialized.
- *
- * @retval 0		success
- * @retval non-zero	if initializing @p cpuirq otherwise fails, a regular
- *			unix error code will be returned.
- */
-static int
-bcm_mips_init_cpuirq_unavail(struct bcm_mips_softc *sc,
-    struct bcm_mips_cpuirq *cpuirq)
-{
-	BCM_MIPS_LOCK(sc);
-
-	KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized"));
-	cpuirq->sc = sc;
-	cpuirq->mips_irq = 0;
-	cpuirq->irq_rid = -1;
-	cpuirq->irq_res = NULL;
-	cpuirq->irq_cookie = NULL;
-	cpuirq->isrc_solo = NULL;
-	cpuirq->refs = 0;
-
-	BCM_MIPS_UNLOCK(sc);
-
-	return (0);
-}
-
-/**
- * Allocate required resources and initialize the given @p cpuirq state.
- * 
- * @param sc		BHND MIPS driver instance state.
- * @param cpuirq	The CPU IRQ state to be initialized.
- * @param rid		The resource ID to be assigned for the CPU IRQ resource,
- *			or -1 if no resource should be assigned.
- * @param irq		The MIPS HW IRQ# to be allocated.
- * @param filter	The interrupt filter to be setup.
- *
- * @retval 0		success
- * @retval non-zero	if initializing @p cpuirq otherwise fails, a regular
- *			unix error code will be returned.
- */
-static int
-bcm_mips_init_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq,
-    int rid, u_int irq, driver_filter_t filter)
-{
-	struct resource	*res;
-	void		*cookie;
-	u_int		 irq_real;
-	int		 error;
-
-	/* Must fall within MIPS HW IRQ range */
-	if (irq >= NHARD_IRQS)
-		return (EINVAL);
-
-	/* HW IRQs are numbered relative to SW IRQs */
-	irq_real = irq + NSOFT_IRQS;
-
-	/* Try to assign and allocate the resource */
-	BCM_MIPS_LOCK(sc);
-
-	KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized"));
-
-	error = bus_set_resource(sc->dev, SYS_RES_IRQ, rid, irq_real, 1);
-	if (error) {
-		BCM_MIPS_UNLOCK(sc);
-		device_printf(sc->dev, "failed to assign interrupt %u: "
-		    "%d\n", irq, error);
-		return (error);
-	}
-
-	res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
-	if (res == NULL) {
-		BCM_MIPS_UNLOCK(sc);
-		device_printf(sc->dev, "failed to allocate interrupt "
-			"%u resource\n", irq);
-		bus_delete_resource(sc->dev, SYS_RES_IRQ, rid);
-		return (ENXIO);
-	}
-
-	error = bus_setup_intr(sc->dev, res,
-	    INTR_TYPE_MISC | INTR_MPSAFE | INTR_EXCL, filter, NULL, cpuirq,
-	    &cookie);
-	if (error) {
-		BCM_MIPS_UNLOCK(sc);
-
-		printf("failed to setup internal interrupt handler: %d\n",
-		    error);
-
-		bus_release_resource(sc->dev, SYS_RES_IRQ, rid, res);
-		bus_delete_resource(sc->dev, SYS_RES_IRQ, rid);
-
-		return (error);
-	}
-
-	/* Initialize CPU IRQ state */
-	cpuirq->sc = sc;
-	cpuirq->mips_irq = irq;
-	cpuirq->irq_rid = rid;
-	cpuirq->irq_res = res;
-	cpuirq->irq_cookie = cookie;
-	cpuirq->isrc_solo = NULL;
-	cpuirq->refs = 0;
-
-	BCM_MIPS_UNLOCK(sc);
-	return (0);
-}
-
-/**
- * Free any resources associated with the given @p cpuirq state.
- * 
- * @param sc		BHND MIPS driver instance state.
- * @param cpuirq	A CPU IRQ instance previously successfully initialized
- *			via bcm_mips_init_cpuirq().
- *
- * @retval 0		success
- * @retval non-zero	if finalizing @p cpuirq otherwise fails, a regular
- *			unix error code will be returned.
- */
-static int
-bcm_mips_fini_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq)
-{
-	int error;
-
-	BCM_MIPS_LOCK(sc);
-
-	if (cpuirq->sc == NULL) {
-		KASSERT(cpuirq->irq_res == NULL, ("leaking cpuirq resource"));
-
-		BCM_MIPS_UNLOCK(sc);
-		return (0);	/* not initialized */
-	}
-
-	if (cpuirq->refs != 0) {
-		BCM_MIPS_UNLOCK(sc);
-		return (EBUSY);
-	}
-
-	if (cpuirq->irq_cookie != NULL) {
-		KASSERT(cpuirq->irq_res != NULL, ("resource missing"));
-
-		error = bus_teardown_intr(sc->dev, cpuirq->irq_res,
-			cpuirq->irq_cookie);
-		if (error) {
-			BCM_MIPS_UNLOCK(sc);
-			return (error);
-		}
-
-		cpuirq->irq_cookie = NULL;
-	}
-
-	if (cpuirq->irq_res != NULL) {
-		bus_release_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid,
-		    cpuirq->irq_res);
-		cpuirq->irq_res = NULL;
-	}
-
-	if (cpuirq->irq_rid != -1) {
-		bus_delete_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid);
-		cpuirq->irq_rid = -1;
-	}
-
-	BCM_MIPS_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-bcm_mips_attach_default(device_t dev)
-{
-	/* subclassing drivers must provide an implementation of
-	 * DEVICE_ATTACH() */
-	panic("device_attach() unimplemented");
-}
-
-/**
- * BHND MIPS device attach.
- * 
- * This must be called from subclass drivers' DEVICE_ATTACH().
- * 
- * @param dev BHND MIPS device.
- * @param num_cpuirqs The number of usable MIPS HW IRQs.
- * @param timer_irq The MIPS HW IRQ assigned to the MIPS CPU timer.
- * @param filter The subclass's core-specific IRQ dispatch filter. Will be
- * passed the associated bcm_mips_cpuirq instance as its argument.
- */
-int
-bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq,
-    driver_filter_t filter)
-{
-	struct bcm_mips_softc	*sc;
-	struct intr_pic		*pic;
-	uintptr_t		 xref;
-	u_int			 irq_rid;
-	rman_res_t		 irq;
-	int			 error;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-	sc->num_cpuirqs = num_cpuirqs;
-	sc->timer_irq = timer_irq;
-
-	/* Must not exceed the actual size of our fixed IRQ array */
-	if (sc->num_cpuirqs > nitems(sc->cpuirqs)) {
-		device_printf(dev, "%u nirqs exceeds maximum supported %zu",
-		    sc->num_cpuirqs, nitems(sc->cpuirqs));
-		return (ENXIO);
-	}
-
-	pic = NULL;
-	xref = bcm_mips_pic_xref(sc);
-
-	BCM_MIPS_LOCK_INIT(sc);
-
-	/* Register our interrupt sources */
-	if ((error = bcm_mips_register_isrcs(sc))) {
-		BCM_MIPS_LOCK_DESTROY(sc);
-		return (error);
-	}
-
-	/* Initialize our CPU interrupt state */
-	irq_rid = bhnd_get_intr_count(dev); /* last bhnd-assigned RID + 1 */
-	irq = 0;
-	for (u_int i = 0; i < sc->num_cpuirqs; i++) {
-		/* Must not overflow signed resource ID representation */
-		if (irq_rid >= INT_MAX) {
-			device_printf(dev, "exhausted IRQ resource IDs\n");
-			error = ENOMEM;
-			goto failed;
-		}
-
-		if (irq == sc->timer_irq) {
-			/* Mark the CPU timer's IRQ as unavailable */
-			error = bcm_mips_init_cpuirq_unavail(sc,
-			    &sc->cpuirqs[i]);
-		} else {
-			/* Initialize state */
-			error = bcm_mips_init_cpuirq(sc, &sc->cpuirqs[i],
-			    irq_rid, irq, filter);
-		}
-
-		if (error)
-			goto failed;
-
-		/* Increment IRQ and resource ID for next allocation */
-		irq_rid++;
-		irq++;
-	}
-
-	/* Sanity check; our shared IRQ must be available */
-	if (sc->num_cpuirqs <= BCM_MIPS_IRQ_SHARED)
-		panic("missing shared interrupt %d\n", BCM_MIPS_IRQ_SHARED);
-
-	if (sc->cpuirqs[BCM_MIPS_IRQ_SHARED].irq_rid == -1)
-		panic("shared interrupt %d unavailable", BCM_MIPS_IRQ_SHARED);
-
-	/* Register PIC */
-	if ((pic = intr_pic_register(dev, xref)) == NULL) {
-		device_printf(dev, "error registering PIC\n");
-		error = ENXIO;
-		goto failed;
-	}
-
-	return (0);
-
-failed:
-	/* Deregister PIC before performing any other cleanup */
-	if (pic != NULL)
-		intr_pic_deregister(dev, 0);
-
-	/* Deregister all interrupt sources */
-	for (size_t i = 0; i < nitems(sc->isrcs); i++)
-		intr_isrc_deregister(&sc->isrcs[i].isrc);
-
-	/* Free our MIPS CPU interrupt handler state */
-	for (u_int i = 0; i < sc->num_cpuirqs; i++)
-		bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]);
-
-	BCM_MIPS_LOCK_DESTROY(sc);
-	return (error);
-}
-
-int
-bcm_mips_detach(device_t dev)
-{
-	struct bcm_mips_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	/* Deregister PIC before performing any other cleanup */
-	intr_pic_deregister(dev, 0);
-
-	/* Deregister all interrupt sources */
-	for (size_t i = 0; i < nitems(sc->isrcs); i++)
-		intr_isrc_deregister(&sc->isrcs[i].isrc);
-
-	/* Free our MIPS CPU interrupt handler state */
-	for (u_int i = 0; i < sc->num_cpuirqs; i++)
-		bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]);
-
-	return (0);
-}
-
-/* PIC_MAP_INTR() */
-static int
-bcm_mips_pic_map_intr(device_t dev, struct intr_map_data *d,
-    struct intr_irqsrc **isrcp)
-{
-	struct bcm_mips_softc		*sc;
-	struct bcm_mips_intr_map_data	*data;
-
-	sc = device_get_softc(dev);
-
-	if (d->type != INTR_MAP_DATA_BCM_MIPS) {
-		DENTRY(dev, "type=%d", d->type);
-		return (ENOTSUP);
-	}
-
-	data = (struct bcm_mips_intr_map_data *)d;
-	DENTRY(dev, "type=%d, ivec=%u", d->type, data->ivec);
-	if (data->ivec < 0 || data->ivec >= nitems(sc->isrcs))
-		return (EINVAL);
-
-	*isrcp = &sc->isrcs[data->ivec].isrc;
-	return (0);
-}
-
-/* PIC_SETUP_INTR() */
-static int
-bcm_mips_pic_setup_intr(device_t dev, struct intr_irqsrc *irqsrc,
-    struct resource *res, struct intr_map_data *data)
-{
-	struct bcm_mips_softc	*sc;
-	struct bcm_mips_irqsrc	*isrc;
-	int			 error;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	/* Assign a CPU interrupt */
-	BCM_MIPS_LOCK(sc);
-	error = bcm_mips_retain_cpu_intr(sc, isrc, res);
-	BCM_MIPS_UNLOCK(sc);
-
-	return (error);
-}
-
-/* PIC_TEARDOWN_INTR() */
-static int
-bcm_mips_pic_teardown_intr(device_t dev, struct intr_irqsrc *irqsrc,
-    struct resource *res, struct intr_map_data *data)
-{
-	struct bcm_mips_softc	*sc;
-	struct bcm_mips_irqsrc	*isrc;
-	int			 error;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	/* Release the CPU interrupt */
-	BCM_MIPS_LOCK(sc);
-	error = bcm_mips_release_cpu_intr(sc, isrc, res);
-	BCM_MIPS_UNLOCK(sc);
-
-	return (error);
-}
-
-/** return our PIC's xref */
-static uintptr_t
-bcm_mips_pic_xref(struct bcm_mips_softc *sc)
-{
-	uintptr_t xref;
-
-	/* Determine our interrupt domain */
-	xref = BHND_BUS_GET_INTR_DOMAIN(device_get_parent(sc->dev), sc->dev,
-	    true);
-	KASSERT(xref != 0, ("missing interrupt domain"));
-
-	return (xref);
-}
-
-/**
- * Walk up the device tree from @p dev until we find a bhnd-attached core,
- * returning either the core, or NULL if @p dev is not attached under a bhnd
- * bus.
- */    
-static device_t
-bcm_mips_find_bhnd_parent(device_t dev)
-{
-	device_t	core, bus;
-	devclass_t	bhnd_class;
-
-	bhnd_class = devclass_find("bhnd");
-	core = dev;
-	while ((bus = device_get_parent(core)) != NULL) {
-		if (device_get_devclass(bus) == bhnd_class)
-			return (core);
-
-		core = bus;
-	}
-
-	/* Not found */
-	return (NULL);
-}
-
-/**
- * Retain @p isrc and assign a MIPS CPU interrupt on behalf of @p res; if
- * the @p isrc already has a MIPS CPU interrupt assigned, the existing
- * reference will be left unmodified.
- * 
- * @param sc		BHND MIPS driver state.
- * @param isrc		The interrupt source corresponding to @p res.
- * @param res		The interrupt resource for which a MIPS CPU IRQ will be
- *			assigned.
- */
-static int
-bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc,
-    struct bcm_mips_irqsrc *isrc, struct resource *res)
-{
-	struct bcm_mips_cpuirq	*cpuirq;
-	bhnd_devclass_t		 devclass;
-	device_t		 core;
-
-	BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED);
-
-	/* Prefer existing assignment */
-	if (isrc->cpuirq != NULL) {
-		KASSERT(isrc->cpuirq->refs > 0, ("assigned IRQ has no "
-		    "references"));
-
-		/* Increment our reference count */
-		if (isrc->refs == UINT_MAX)
-			return (ENOMEM);	/* would overflow */
-
-		isrc->refs++;
-		return (0);
-	}
-
-	/* Use the device class of the bhnd core to which the interrupt
-	 * vector is routed to determine whether a shared interrupt should
-	 * be preferred. */
-	devclass = BHND_DEVCLASS_OTHER;
-	core = bcm_mips_find_bhnd_parent(rman_get_device(res));
-	if (core != NULL)
-		devclass = bhnd_get_class(core);
-
-	switch (devclass) {
-	case BHND_DEVCLASS_CC:
-	case BHND_DEVCLASS_CC_B:
-	case BHND_DEVCLASS_PMU:
-	case BHND_DEVCLASS_RAM:
-	case BHND_DEVCLASS_MEMC:
-	case BHND_DEVCLASS_CPU:
-	case BHND_DEVCLASS_SOC_ROUTER:
-	case BHND_DEVCLASS_SOC_BRIDGE:
-	case BHND_DEVCLASS_EROM:
-	case BHND_DEVCLASS_NVRAM:
-		/* Always use a shared interrupt for these devices */
-		cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED];
-		break;
-
-	case BHND_DEVCLASS_PCI:
-	case BHND_DEVCLASS_PCIE:
-	case BHND_DEVCLASS_PCCARD:	
-	case BHND_DEVCLASS_ENET:
-	case BHND_DEVCLASS_ENET_MAC:
-	case BHND_DEVCLASS_ENET_PHY:
-	case BHND_DEVCLASS_WLAN:
-	case BHND_DEVCLASS_WLAN_MAC:
-	case BHND_DEVCLASS_WLAN_PHY:
-	case BHND_DEVCLASS_USB_HOST:
-	case BHND_DEVCLASS_USB_DEV:
-	case BHND_DEVCLASS_USB_DUAL:
-	case BHND_DEVCLASS_OTHER:
-	case BHND_DEVCLASS_INVALID:
-	default:
-		/* Fall back on a shared interrupt */
-		cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED];
-
-		/* Try to assign a dedicated MIPS HW interrupt */
-		for (u_int i = 0; i < sc->num_cpuirqs; i++) {
-			if (i == BCM_MIPS_IRQ_SHARED)
-				continue;
-
-			if (sc->cpuirqs[i].irq_rid == -1)
-				continue; /* unavailable */
-
-			if (sc->cpuirqs[i].refs != 0)
-				continue; /* already assigned */
-
-			/* Found an unused CPU IRQ */
-			cpuirq = &sc->cpuirqs[i];
-			break;
-		}
-
-		break;
-	}
-
-	DPRINTF("routing backplane interrupt vector %u to MIPS IRQ %u\n",
-	    isrc->ivec, cpuirq->mips_irq);
-
-	KASSERT(isrc->cpuirq == NULL, ("CPU IRQ already assigned"));
-	KASSERT(isrc->refs == 0, ("isrc has active references with no "
-	    "assigned CPU IRQ"));
-	KASSERT(cpuirq->refs == 1 || cpuirq->isrc_solo == NULL,
-	    ("single isrc dispatch enabled on cpuirq with multiple refs"));
-
-	/* Verify that bumping the cpuirq refcount below will not overflow */
-	if (cpuirq->refs == UINT_MAX)
-		return (ENOMEM);
-
-	/* Increment cpuirq refcount on behalf of the isrc */
-	cpuirq->refs++;
-
-	/* Increment isrc refcount on behalf of the caller */
-	isrc->refs++;
-
-	/* Assign the IRQ to the isrc */
-	isrc->cpuirq = cpuirq;
-
-	/* Can we enable the single isrc dispatch path? */
-	if (cpuirq->refs == 1 && cpuirq->mips_irq != BCM_MIPS_IRQ_SHARED)
-		cpuirq->isrc_solo = isrc;
-
-	return (0);
-}
-
-/**
- * Release the MIPS CPU interrupt assigned to @p isrc on behalf of @p res.
- *
- * @param sc	BHND MIPS driver state.
- * @param isrc	The interrupt source corresponding to @p res.
- * @param res	The interrupt resource being activated.
- */
-static int
-bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc,
-    struct bcm_mips_irqsrc *isrc, struct resource *res)
-{
-	struct bcm_mips_cpuirq *cpuirq;
-
-	BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED);
-
-	/* Decrement the refcount */
-	KASSERT(isrc->refs > 0, ("isrc over-release"));
-	isrc->refs--;
-
-	/* Nothing else to do if the isrc is still actively referenced */
-	if (isrc->refs > 0)
-		return (0);
-
-	/* Otherwise, we need to release our CPU IRQ reference */
-	cpuirq = isrc->cpuirq;
-	isrc->cpuirq = NULL;
-
-	KASSERT(cpuirq != NULL, ("no assigned IRQ"));
-	KASSERT(cpuirq->refs > 0, ("cpuirq over-release"));
-
-	/* Disable single isrc dispatch path */
-	if (cpuirq->refs == 1 && cpuirq->isrc_solo != NULL) {
-		KASSERT(cpuirq->isrc_solo == isrc, ("invalid solo isrc"));
-		cpuirq->isrc_solo = NULL;
-	}
-
-	cpuirq->refs--;
-
-	return (0);
-}
-
-static device_method_t bcm_mips_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_attach,	bcm_mips_attach_default),
-	DEVMETHOD(device_detach,	bcm_mips_detach),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_map_intr,		bcm_mips_pic_map_intr),
-	DEVMETHOD(pic_setup_intr,	bcm_mips_pic_setup_intr),
-	DEVMETHOD(pic_teardown_intr,	bcm_mips_pic_teardown_intr),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bcm_mips, bcm_mips_driver, bcm_mips_methods, sizeof(struct bcm_mips_softc));
-
-MODULE_VERSION(bcm_mips, 1);
-MODULE_DEPEND(bcm_mips, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_mips74k.c b/sys/mips/broadcom/bcm_mips74k.c
deleted file mode 100644
index dc86d4736b88..000000000000
--- a/sys/mips/broadcom/bcm_mips74k.c
+++ /dev/null
@@ -1,391 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/proc.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-#include <machine/cpufunc.h>
-#include <machine/intr.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bcma/bcma_dmp.h>
-
-#include "pic_if.h"
-
-#include "bcm_machdep.h"
-
-#include "bcm_mipsvar.h"
-#include "bcm_mips74kreg.h"
-
-/*
- * Broadcom MIPS74K Core
- *
- * These cores are only found on bcma(4) chipsets.
- */
-
-struct bcm_mips74k_softc;
-
-static int	bcm_mips74k_pic_intr(void *arg);
-static void	bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc,
-		    u_int mips_irq, u_int ivec);
-static void	bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc,
-		    u_int mips_irq, u_int ivec);
-
-static const struct bhnd_device bcm_mips74k_devs[] = {
-	BHND_DEVICE(MIPS, MIPS74K, NULL, NULL, BHND_DF_SOC),
-	BHND_DEVICE_END
-};
-
-struct bcm_mips74k_softc {
-	struct bcm_mips_softc	 bcm_mips;	/**< parent softc */
-	device_t		 dev;
-	struct resource		*mem;		/**< cpu core registers */
-	int			 mem_rid;
-};
-
-/* Early routing of the CPU timer interrupt is required */
-static void
-bcm_mips74k_timer_init(void *unused)
-{
-	struct bcm_platform	*bp;
-	u_int			 irq;
-	uint32_t		 mask;
-
-	bp = bcm_get_platform();
-
-	/* Must be a MIPS74K core attached to a BCMA interconnect */
-	if (!bhnd_core_matches(&bp->cpu_id, &(struct bhnd_core_match) {
-		BHND_MATCH_CORE(BHND_MFGID_MIPS, BHND_COREID_MIPS74K)
-	})) {
-		if (bootverbose) {
-			BCM_ERR("not a MIPS74K core: %s %s\n",
-			    bhnd_vendor_name(bp->cpu_id.vendor),
-			    bhnd_core_name(&bp->cpu_id));
-		}
-
-		return;
-	}
-
-	if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(bp->cid.chip_type)) {
-		if (bootverbose)
-			BCM_ERR("not a BCMA device\n");
-		return;
-	}
-
-	/* Route the timer bus ivec to the CPU's timer IRQ, and disable any
-	 * other vectors assigned to the IRQ. */
-	irq = BCM_MIPS74K_GET_TIMER_IRQ();
-	mask = BCM_MIPS74K_INTR_SEL_FLAG(BCM_MIPS74K_TIMER_IVEC);
-
-	BCM_CPU_WRITE_4(bp, BCM_MIPS74K_INTR_SEL(irq), mask);
-}
-
-static int
-bcm_mips74k_probe(device_t dev)
-{
-	const struct bhnd_device	*id;
-	const struct bhnd_chipid	*cid;
-
-	id = bhnd_device_lookup(dev, bcm_mips74k_devs,
-	    sizeof(bcm_mips74k_devs[0]));
-	if (id == NULL)
-		return (ENXIO);
-
-	/* Check the chip type; the MIPS74K core should only be found
-	 * on bcma(4) chipsets (and we rely on bcma OOB interrupt
-	 * routing). */
-	cid = bhnd_get_chipid(dev);
-	if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(cid->chip_type))
-		return (ENXIO);
-
-	bhnd_set_default_core_desc(dev);
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-bcm_mips74k_attach(device_t dev)
-{
-	struct bcm_mips74k_softc	*sc;
-	u_int				 timer_irq;
-	int				 error;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	/* Allocate our core's register block */
-	sc->mem_rid = 0;
-	sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
-	    RF_ACTIVE);
-	if (sc->mem == NULL) {
-		device_printf(dev, "failed to allocate cpu register block\n");
-		return (ENXIO);
-	}
-
-	/* Clear interrupt map */
-	timer_irq = BCM_MIPS74K_GET_TIMER_IRQ();
-	for (size_t i = 0; i < BCM_MIPS74K_NUM_INTR; i++) {
-		/* We don't use the timer IRQ; leave it routed to the
-		 * MIPS CPU */
-		if (i == timer_irq)
-			continue;
-
-		bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(i), 0);
-	}
-
-	/* Initialize the generic BHND MIPS driver state */
-	error = bcm_mips_attach(dev, BCM_MIPS74K_NUM_INTR, timer_irq,
-	    bcm_mips74k_pic_intr);
-	if (error) {
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-		return (error);
-	}
-
-	return (0);
-}
-
-static int
-bcm_mips74k_detach(device_t dev)
-{
-	struct bcm_mips74k_softc	*sc;
-	int				 error;
-
-	sc = device_get_softc(dev);
-
-	if ((error = bcm_mips_detach(dev)))
-		return (error);
-
-	bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-
-	return (0);
-}
-
-/* PIC_DISABLE_INTR() */
-static void
-bcm_mips74k_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
-	struct bcm_mips74k_softc	*sc;
-	struct bcm_mips_irqsrc		*isrc;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
-	bcm_mips74k_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_ENABLE_INTR() */
-static void
-bcm_mips74k_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
-	struct bcm_mips74k_softc	*sc;
-	struct bcm_mips_irqsrc		*isrc;
-
-	sc = device_get_softc(dev);
-	isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
-	KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
-	bcm_mips74k_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_PRE_ITHREAD() */
-static void
-bcm_mips74k_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	bcm_mips74k_pic_disable_intr(dev, isrc);
-}
-
-/* PIC_POST_ITHREAD() */
-static void
-bcm_mips74k_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-	bcm_mips74k_pic_enable_intr(dev, isrc);
-}
-
-/* PIC_POST_FILTER() */
-static void
-bcm_mips74k_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-/**
- * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ
- * @p mips_irq.
- */
-static void
-bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec)
-{
-	uint32_t oobsel;
-
-	KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
-	    mips_irq));
-	KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u",
-	    mips_irq));
-	KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec"));
-
-	oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq));
-	oobsel &= ~(BCM_MIPS74K_INTR_SEL_FLAG(ivec));
-	bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel);
-}
-
-/**
- * Enable routing of an interrupt.
- */
-static void
-bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec)
-{
-	uint32_t oobsel;
-
-	KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
-	    mips_irq));
-	KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u",
-	    mips_irq));
-	KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec"));
-
-	oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq));
-	oobsel |= BCM_MIPS74K_INTR_SEL_FLAG(ivec);
-	bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel);
-}
-
-/* our MIPS CPU interrupt filter */
-static int
-bcm_mips74k_pic_intr(void *arg)
-{
-	struct bcm_mips74k_softc	*sc;
-	struct bcm_mips_cpuirq		*cpuirq;
-	struct bcm_mips_irqsrc		*isrc_solo;
-	uint32_t			 oobsel, intr;
-	u_int				 i;
-	int				 error;
-
-	cpuirq = arg;
-	sc = (struct bcm_mips74k_softc*)cpuirq->sc;
-
-	/* Fetch current interrupt state */
-	intr = bus_read_4(sc->mem, BCM_MIPS74K_INTR_STATUS);
-
-	/* Fetch mask of interrupt vectors routed to this MIPS IRQ */
-	KASSERT(cpuirq->mips_irq < BCM_MIPS74K_NUM_INTR,
-	    ("invalid irq %u", cpuirq->mips_irq));
-
-	oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(cpuirq->mips_irq));
-
-	/* Ignore interrupts not routed to this MIPS IRQ */
-	intr &= oobsel;
-
-	/* Handle isrc_solo direct dispatch path */
-	isrc_solo = cpuirq->isrc_solo;
-	if (isrc_solo != NULL) {
-		if (intr & BCM_MIPS_IVEC_MASK(isrc_solo)) {
-			error = intr_isrc_dispatch(&isrc_solo->isrc,
-			    curthread->td_intr_frame);
-			if (error) {
-				device_printf(sc->dev, "Stray interrupt %u "
-				    "detected\n", isrc_solo->ivec);
-				bcm_mips74k_pic_disable_intr(sc->dev,
-				    &isrc_solo->isrc);
-			}
-		}
-
-		intr &= ~(BCM_MIPS_IVEC_MASK(isrc_solo));
-		if (intr == 0)
-			return (FILTER_HANDLED);
-
-		/* Report and mask additional stray interrupts */
-		while ((i = fls(intr)) != 0) {
-			i--; /* Get a 0-offset interrupt. */
-			intr &= ~(1 << i);
-
-			device_printf(sc->dev, "Stray interrupt %u "
-				"detected\n", i);
-			bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i);
-		}
-
-		return (FILTER_HANDLED);
-	}
-
-	/* Standard dispatch path  */
-	while ((i = fls(intr)) != 0) {
-		i--; /* Get a 0-offset interrupt. */
-		intr &= ~(1 << i);
-
-		KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i));
-
-		error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc,
-		    curthread->td_intr_frame);
-		if (error) {
-			device_printf(sc->dev, "Stray interrupt %u detected\n",
-			    i);
-			bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i);
-			continue;
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static device_method_t bcm_mips74k_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		bcm_mips74k_probe),
-	DEVMETHOD(device_attach,	bcm_mips74k_attach),
-	DEVMETHOD(device_detach,	bcm_mips74k_detach),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	bcm_mips74k_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	bcm_mips74k_pic_enable_intr),
-	DEVMETHOD(pic_pre_ithread,	bcm_mips74k_pic_pre_ithread),
-	DEVMETHOD(pic_post_ithread,	bcm_mips74k_pic_post_ithread),
-	DEVMETHOD(pic_post_filter,	bcm_mips74k_pic_post_filter),
-
-	DEVMETHOD_END
-};
-
-static devclass_t bcm_mips_devclass;
-
-DEFINE_CLASS_1(bcm_mips, bcm_mips74k_driver, bcm_mips74k_methods, sizeof(struct bcm_mips_softc), bcm_mips_driver);
-EARLY_DRIVER_MODULE(bcm_mips74k, bhnd, bcm_mips74k_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
-SYSINIT(cpu_init, SI_SUB_CPU, SI_ORDER_FIRST, bcm_mips74k_timer_init, NULL);
-MODULE_VERSION(bcm_mips74k, 1);
-MODULE_DEPEND(bcm_mips74k, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_mips74kreg.h b/sys/mips/broadcom/bcm_mips74kreg.h
deleted file mode 100644
index 92e8a8e53ef0..000000000000
--- a/sys/mips/broadcom/bcm_mips74kreg.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_BROADCOM_MIPS74KREG_H_
-#define	_MIPS_BROADCOM_MIPS74KREG_H_
-
-#define	BCM_MIPS74K_CORECTL		0x00	/**< core control */
-#define	BCM_MIPS74K_EXCBASE		0x04	/**< exception base */
-
-#define	BCM_MIPS74K_BIST_STATUS		0x0C	/**< built-in self-test status */
-#define	BCM_MIPS74K_INTR_STATUS		0x10	/**< interrupt status */
-
-/* INTR(0-5)_MASK map bcma(4) OOB interrupt bus lines to MIPS hardware
- * interrupts. */
-#define	BCM_MIPS74K_INTR0_SEL		0x14	/**< IRQ0 OOBSEL mask */
-#define	BCM_MIPS74K_INTR1_SEL		0x18	/**< IRQ1 OOBSEL mask */
-#define	BCM_MIPS74K_INTR2_SEL		0x1C	/**< IRQ2 OOBSEL mask */
-#define	BCM_MIPS74K_INTR3_SEL		0x20	/**< IRQ3 OOBSEL mask */
-#define	BCM_MIPS74K_INTR4_SEL		0x24	/**< IRQ4 OOBSEL mask */
-#define	BCM_MIPS74K_INTR5_SEL		0x28	/**< IRQ5 OOBSEL mask */
-#define	BCM_MIPS74K_NUM_INTR		6	/**< routable CPU interrupt count */
-
-#define	BCM_MIPS74K_INTR_SEL(_intr)	\
-	(BCM_MIPS74K_INTR0_SEL + ((_intr) * 4))
-#define	BCM_MIPS74K_INTR_SEL_FLAG(_i)	(1<<_i)
-
-#define	BCM_MIPS74K_TIMER_IVEC		31	/**< MIPS timer's bus interrupt vector */
-
-#define	BCM_MIPS74K_NMI_MASK		0x2C	/**< nmi mask */
-
-#define	BCM_MIPS74K_GPIO_SEL		0x40	/**< gpio select */
-#define	BCM_MIPS74K_GPIO_OUT		0x44	/**< gpio output enable */
-#define	BCM_MIPS74K_GPIO_EN		0x48	/**< gpio enable */
-
-/** The MIPS timer interrupt IRQ assignment */
-#define	BCM_MIPS74K_GET_TIMER_IRQ()	\
-	 ((mips_rd_intctl() & MIPS_INTCTL_IPTI_MASK) >> MIPS_INTCTL_IPTI_SHIFT)
-
-#endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */
diff --git a/sys/mips/broadcom/bcm_mipsvar.h b/sys/mips/broadcom/bcm_mipsvar.h
deleted file mode 100644
index bb530ae6c3ee..000000000000
--- a/sys/mips/broadcom/bcm_mipsvar.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-
- * Copyright (c) 2017 The FreeBSD Foundation
- *
- * This software was developed by Landon Fuller under sponsorship from
- * the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BCM_MIPSVAR_H_
-#define _MIPS_BROADCOM_BCM_MIPSVAR_H_
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/intr.h>
-#include <sys/lock.h>
-
-#include <machine/intr.h>
-
-DECLARE_CLASS(bcm_mips_driver);
-
-struct bcm_mips_irqsrc;
-struct bcm_mips_softc;
-
-#define	BCM_MIPS_NINTR		32			/**< maximum number of addressable backplane interrupt vectors */
-#define	BCM_MIPS_IRQ_SHARED	0			/**< MIPS CPU IRQ reserved for shared interrupt handling */
-#define	INTR_MAP_DATA_BCM_MIPS	INTR_MAP_DATA_PLAT_2	/**< Broadcom MIPS PIC interrupt map data type */
-
-int	bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq,
-	    driver_filter_t filter);
-int	bcm_mips_detach(device_t dev);
-
-/**
- * Broadcom MIPS PIC interrupt map data.
- */
-struct bcm_mips_intr_map_data {
-	struct intr_map_data	mdata;
-	u_int			ivec;	/**< bus interrupt vector */
-};
-
-/**
- * Nested MIPS CPU interrupt handler state.
- */
-struct bcm_mips_cpuirq {
-	struct bcm_mips_softc	*sc;		/**< driver instance state, or NULL if uninitialized. */
-	u_int			 mips_irq;	/**< mips hardware interrupt number (relative to NSOFT_IRQ) */
-	int			 irq_rid;	/**< mips IRQ resource id, or -1 if this entry is unavailable */
-	struct resource		*irq_res;	/**< mips interrupt resource */
-	void			*irq_cookie;	/**< mips interrupt handler cookie, or NULL */
-	struct bcm_mips_irqsrc	*isrc_solo;	/**< solo isrc assigned to this interrupt, or NULL */
-	u_int			 refs;		/**< isrc consumer refcount */
-};
-
-/**
- * Broadcom MIPS PIC interrupt source definition.
- */
-struct bcm_mips_irqsrc {
-	struct intr_irqsrc	 isrc;
-	u_int			 ivec;		/**< bus interrupt vector */
-	u_int			 refs;		/**< active reference count */
-	struct bcm_mips_cpuirq	*cpuirq;	/**< assigned MIPS HW IRQ, or NULL if no assignment */
-};
-
-/**
- * bcm_mips driver instance state. Must be first member of all subclass
- * softc structures.
- */
-struct bcm_mips_softc {
-	device_t		 dev;
-	struct bcm_mips_cpuirq	 cpuirqs[NREAL_IRQS];	/**< nested CPU IRQ handlers */
-	u_int			 num_cpuirqs;		/**< number of nested CPU IRQ handlers */
-	u_int			 timer_irq;		/**< CPU timer IRQ */
-	struct bcm_mips_irqsrc	 isrcs[BCM_MIPS_NINTR];
-	struct mtx		 mtx;
-};
-
-#define	BCM_MIPS_IVEC_MASK(_isrc)	(1 << ((_isrc)->ivec))
-
-#define	BCM_MIPS_LOCK_INIT(sc) \
-	mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
-	    "bhnd mips driver lock", MTX_DEF)
-#define	BCM_MIPS_LOCK(sc)		mtx_lock(&(sc)->mtx)
-#define	BCM_MIPS_UNLOCK(sc)		mtx_unlock(&(sc)->mtx)
-#define	BCM_MIPS_LOCK_ASSERT(sc, what)	mtx_assert(&(sc)->mtx, what)
-#define	BCM_MIPS_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx)
-
-#endif /* _MIPS_BROADCOM_BCM_MIPSVAR_H_ */
diff --git a/sys/mips/broadcom/bcm_nvram_cfe.c b/sys/mips/broadcom/bcm_nvram_cfe.c
deleted file mode 100644
index 380a27318622..000000000000
--- a/sys/mips/broadcom/bcm_nvram_cfe.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * BHND CFE NVRAM driver.
- * 
- * Provides access to device NVRAM via CFE.
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/limits.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/systm.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_error.h>
-#include <dev/cfe/cfe_ioctl.h>
-
-#include "bhnd_nvram_if.h"
-
-#include "bcm_machdep.h"
-#include "bcm_nvram_cfevar.h"
-
-BHND_NVRAM_IOPS_DEFN(iocfe)
-
-#define IOCFE_LOG(_io, _fmt, ...)	\
-	printf("%s/%s: " _fmt, __FUNCTION__, (_io)->dname, ##__VA_ARGS__)
-
-static int	bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe,
-		    char *dname);
-
-/** Known CFE NVRAM device names, in probe order. */
-static char *nvram_cfe_devs[] = {
-	"nflash0.nvram",	/* NAND */
-	"nflash1.nvram",
-	"flash0.nvram",
-	"flash1.nvram",
-};
-
-/** Supported CFE NVRAM formats, in probe order. */
-static bhnd_nvram_data_class * const nvram_cfe_fmts[] = {
-	&bhnd_nvram_bcm_class,
-	&bhnd_nvram_tlv_class
-};
-
-static int
-bhnd_nvram_cfe_probe(device_t dev)
-{
-	struct bcm_platform *bp;
-
-	/* Fetch platform NVRAM I/O context */
-	bp = bcm_get_platform();
-	if (bp->nvram_io == NULL)
-		return (ENXIO);
-
-	KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class"));
-
-	/* Set the device description */
-	device_set_desc(dev, bhnd_nvram_data_class_desc(bp->nvram_cls));
-
-	/* Refuse wildcard attachments */
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-bhnd_nvram_cfe_attach(device_t dev)
-{
-	struct bcm_platform		*bp;
-	struct bhnd_nvram_cfe_softc	*sc;
-	int				 error;
-
-	bp = bcm_get_platform();
-	KASSERT(bp->nvram_io != NULL, ("missing NVRAM I/O context"));
-	KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class"));
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	error = bhnd_nvram_store_parse_new(&sc->store, bp->nvram_io,
-	    bp->nvram_cls);
-	if (error)
-		return (error);
-
-	error = bhnd_service_registry_add(&bp->services, dev,
-	    BHND_SERVICE_NVRAM, 0);
-	if (error) {
-		bhnd_nvram_store_free(sc->store);
-		return (error);
-	}
-
-	return (error);
-}
-
-static int
-bhnd_nvram_cfe_resume(device_t dev)
-{
-	return (0);
-}
-
-static int
-bhnd_nvram_cfe_suspend(device_t dev)
-{
-	return (0);
-}
-
-static int
-bhnd_nvram_cfe_detach(device_t dev)
-{
-	struct bcm_platform		*bp;
-	struct bhnd_nvram_cfe_softc	*sc;
-	int				 error;
-
-	bp = bcm_get_platform();
-	sc = device_get_softc(dev);
-
-	error = bhnd_service_registry_remove(&bp->services, dev,
-	    BHND_SERVICE_ANY);
-	if (error)
-		return (error);
-
-	bhnd_nvram_store_free(sc->store);
-
-	return (0);
-}
-
-static int
-bhnd_nvram_cfe_getvar(device_t dev, const char *name, void *buf, size_t *len,
-    bhnd_nvram_type type)
-{
-	struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev);
-
-	return (bhnd_nvram_store_getvar(sc->store, name, buf, len, type));
-}
-
-static int
-bhnd_nvram_cfe_setvar(device_t dev, const char *name, const void *buf,
-    size_t len, bhnd_nvram_type type)
-{
-	struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev);
-
-	return (bhnd_nvram_store_setvar(sc->store, name, buf, len, type));
-}
-
-/**
- * Find, open, identify, and initialize an I/O context mapping the CFE NVRAM
- * device.
- * 
- * @param[out]	iocfe		On success, an I/O context mapping the CFE NVRAM
- *				device.
- * @param[out]	cls		On success, the identified NVRAM data format
- *				class.
- *
- * @retval 0		success. the caller inherits ownership of @p iocfe.
- * @retval non-zero	if no usable CFE NVRAM device can be found, a standard
- *			unix error will be returned.
- */
-int
-bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe,
-    bhnd_nvram_data_class **cls)
-{
-	char	*dname;
-	int	 devinfo;
-	int	 error, result;
-
-	for (u_int i = 0; i < nitems(nvram_cfe_fmts); i++) {
-		*cls = nvram_cfe_fmts[i];
-
-		for (u_int j = 0; j < nitems(nvram_cfe_devs); j++) {
-			dname = nvram_cfe_devs[j];
-
-			/* Does the device exist? */
-			if ((devinfo = cfe_getdevinfo(dname)) < 0) {
-				if (devinfo != CFE_ERR_DEVNOTFOUND) {
-					BCM_ERR("cfe_getdevinfo(%s) failed: "
-					    "%d\n", dname, devinfo);
-				}
-
-				continue;
-			}
-
-			/* Open for reading */
-			if ((error = bcm_nvram_iocfe_init(iocfe, dname)))
-				continue;
-
-			/* Probe */
-			result = bhnd_nvram_data_probe(*cls, &iocfe->io);
-			if (result <= 0) {
-				/* Found a supporting NVRAM data class */
-				return (0);
-			}
-
-			/* Keep searching */
-			bhnd_nvram_io_free(&iocfe->io);
-		}
-	}
-
-	return (ENODEV);
-}
-
-/**
- * Initialize a new CFE device-backed I/O context.
- *
- * The caller is responsible for releasing all resources held by the returned
- * I/O context via bhnd_nvram_io_free().
- * 
- * @param[out]	io	On success, will be initialized as an I/O context for
- *			CFE device @p dname.
- * @param	dname	The name of the CFE device to be opened for reading.
- *
- * @retval 0		success.
- * @retval non-zero	if opening @p dname otherwise fails, a standard unix
- *			error will be returned.
- */
-static int
-bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe, char *dname)
-{
-	nvram_info_t		 nvram_info;
-	int			 cerr, devinfo, dtype, rlen;
-	int64_t			 nv_offset;
-	u_int			 nv_size;
-	bool			 req_blk_erase;
-	int			 error;
-
-	iocfe->io.iops = &bhnd_nvram_iocfe_ops;
-	iocfe->dname = dname;
-
-	/* Try to open the device */
-	iocfe->fd = cfe_open(dname);
-	if (iocfe->fd <= 0) {
-		IOCFE_LOG(iocfe, "cfe_open() failed: %d\n", iocfe->fd);
-
-		return (ENXIO);
-	}
-
-	/* Try to fetch device info */
-	if ((devinfo = cfe_getdevinfo(iocfe->dname)) < 0) {
-		IOCFE_LOG(iocfe, "cfe_getdevinfo() failed: %d\n", devinfo);
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Verify device type */
-	dtype = devinfo & CFE_DEV_MASK;
-	switch (dtype) {
-	case CFE_DEV_FLASH:
-	case CFE_DEV_NVRAM:
-		/* Valid device type */
-		break;
-	default:
-		IOCFE_LOG(iocfe, "unknown device type: %d\n", dtype);
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Try to fetch nvram info from CFE */
-	cerr = cfe_ioctl(iocfe->fd, IOCTL_NVRAM_GETINFO,
-	    (unsigned char *)&nvram_info, sizeof(nvram_info), &rlen, 0);
-	if (cerr == CFE_OK) {
-		/* Sanity check the result; must not be a negative integer */
-		if (nvram_info.nvram_size < 0 ||
-		    nvram_info.nvram_offset < 0)
-		{
-			IOCFE_LOG(iocfe, "invalid NVRAM layout (%d/%d)\n",
-			    nvram_info.nvram_size, nvram_info.nvram_offset);
-			error = ENXIO;
-			goto failed;
-		}
-
-		nv_offset	= nvram_info.nvram_offset;
-		nv_size		= nvram_info.nvram_size;
-		req_blk_erase	= (nvram_info.nvram_eraseflg != 0);
-	} else if (cerr != CFE_OK && cerr != CFE_ERR_INV_COMMAND) {
-		IOCFE_LOG(iocfe, "IOCTL_NVRAM_GETINFO failed: %d\n", cerr);
-		error = ENXIO;
-		goto failed;
-	}
-
-	/* Fall back on flash info.
-	 * 
-	 * This is known to be required on the Asus RT-N53 (CFE 5.70.55.33, 
-	 * BBP 1.0.37, BCM5358UB0), where IOCTL_NVRAM_GETINFO returns
-	 * CFE_ERR_INV_COMMAND.
-	 */
-	if (cerr == CFE_ERR_INV_COMMAND) {
-		flash_info_t fi;
-
-		cerr = cfe_ioctl(iocfe->fd, IOCTL_FLASH_GETINFO,
-		    (unsigned char *)&fi, sizeof(fi), &rlen, 0);
-
-		if (cerr != CFE_OK) {
-			IOCFE_LOG(iocfe, "IOCTL_FLASH_GETINFO failed %d\n",
-			    cerr);
-			error = ENXIO;
-			goto failed;
-		}
-
-		nv_offset	= 0x0;
-		nv_size		= fi.flash_size;
-		req_blk_erase	= !(fi.flash_flags & FLASH_FLAG_NOERASE);
-	}
-
-	/* Verify that the full NVRAM layout can be represented via size_t */
-	if (nv_size > SIZE_MAX || SIZE_MAX - nv_size < nv_offset) {
-		IOCFE_LOG(iocfe, "invalid NVRAM layout (%#x/%#jx)\n",
-		    nv_size, (intmax_t)nv_offset);
-		error = ENXIO;
-		goto failed;
-	}
-
-	iocfe->offset = nv_offset;
-	iocfe->size = nv_size;
-	iocfe->req_blk_erase = req_blk_erase;
-
-	return (CFE_OK);
-
-failed:
-	if (iocfe->fd >= 0)
-		cfe_close(iocfe->fd);
-
-	return (error);
-}
-
-static void
-bhnd_nvram_iocfe_free(struct bhnd_nvram_io *io)
-{
-	struct bcm_nvram_iocfe	*iocfe = (struct bcm_nvram_iocfe *)io;
-
-	/* CFE I/O instances are statically allocated; we do not need to free
-	 * the instance itself */
-	cfe_close(iocfe->fd);
-}
-
-static size_t
-bhnd_nvram_iocfe_getsize(struct bhnd_nvram_io *io)
-{
-	struct bcm_nvram_iocfe	*iocfe = (struct bcm_nvram_iocfe *)io;
-	return (iocfe->size);
-}
-
-static int
-bhnd_nvram_iocfe_setsize(struct bhnd_nvram_io *io, size_t size)
-{
-	/* unsupported */
-	return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_read_ptr(struct bhnd_nvram_io *io, size_t offset,
-    const void **ptr, size_t nbytes, size_t *navail)
-{
-	/* unsupported */
-	return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_write_ptr(struct bhnd_nvram_io *io, size_t offset,
-    void **ptr, size_t nbytes, size_t *navail)
-{
-	/* unsupported */
-	return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_write(struct bhnd_nvram_io *io, size_t offset, void *buffer,
-    size_t nbytes)
-{
-	/* unsupported */
-	return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_read(struct bhnd_nvram_io *io, size_t offset, void *buffer,
-    size_t nbytes)
-{
-	struct bcm_nvram_iocfe	*iocfe;
-	size_t			 remain;
-	int64_t			 cfe_offset;
-	int			 nr, nreq;
-
-	iocfe = (struct bcm_nvram_iocfe *)io;
-
-	/* Determine (and validate) the base CFE offset */
-#if (SIZE_MAX > INT64_MAX)
-	if (iocfe->offset > INT64_MAX || offset > INT64_MAX)
-		return (ENXIO);
-#endif
-
-	if (INT64_MAX - offset < iocfe->offset)
-		return (ENXIO);
-
-	cfe_offset = iocfe->offset + offset;
-
-	/* Verify that cfe_offset + nbytes is representable */
-	if (INT64_MAX - cfe_offset < nbytes)
-		return (ENXIO);
-
-	/* Perform the read */
-	for (remain = nbytes; remain > 0;) {
-		void	*p;
-		size_t	 nread;
-		int64_t	 cfe_noff;
-
-		nread = (nbytes - remain);
-		cfe_noff = cfe_offset + nread;
-		p = ((uint8_t *)buffer + nread);
-		nreq = ummin(INT_MAX, remain);
-
-		nr = cfe_readblk(iocfe->fd, cfe_noff, p, nreq);
-		if (nr < 0) {
-			IOCFE_LOG(iocfe, "cfe_readblk() failed: %d\n", nr);
-			return (ENXIO);
-		}
-
-		/* Check for unexpected short read */
-		if (nr == 0 && remain > 0) {
-			/* If the request fits entirely within the CFE
-			 * device range, we shouldn't hit EOF */
-			if (remain < iocfe->size &&
-			    iocfe->size - remain > offset)
-			{
-				IOCFE_LOG(iocfe, "cfe_readblk() returned "
-				    "unexpected short read (%d/%d)\n", nr,
-				    nreq);
-				return (ENXIO);
-			}
-		}
-
-		if (nr == 0)
-			break;
-
-		remain -= nr;
-	}
-
-	/* Check for short read */
-	if (remain > 0)
-		return (ENXIO);
-
-	return (0);
-}
-
-static device_method_t bhnd_nvram_cfe_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		bhnd_nvram_cfe_probe),
-	DEVMETHOD(device_attach,	bhnd_nvram_cfe_attach),
-	DEVMETHOD(device_resume,	bhnd_nvram_cfe_resume),
-	DEVMETHOD(device_suspend,	bhnd_nvram_cfe_suspend),
-	DEVMETHOD(device_detach,	bhnd_nvram_cfe_detach),
-
-	/* NVRAM interface */
-	DEVMETHOD(bhnd_nvram_getvar,	bhnd_nvram_cfe_getvar),
-	DEVMETHOD(bhnd_nvram_setvar,	bhnd_nvram_cfe_setvar),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bhnd_nvram, bhnd_nvram_cfe, bhnd_nvram_cfe_methods,
-    sizeof(struct bhnd_nvram_cfe_softc));
-EARLY_DRIVER_MODULE(bhnd_nvram_cfe, nexus, bhnd_nvram_cfe,
-    bhnd_nvram_devclass, NULL, NULL, BUS_PASS_BUS + BUS_PASS_ORDER_EARLY);
diff --git a/sys/mips/broadcom/bcm_nvram_cfevar.h b/sys/mips/broadcom/bcm_nvram_cfevar.h
deleted file mode 100644
index dc082d586cec..000000000000
--- a/sys/mips/broadcom/bcm_nvram_cfevar.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_BROADCOM_BCM_NVRAM_CFE_H_
-#define	_MIPS_BROADCOM_BCM_NVRAM_CFE_H_
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <dev/bhnd/nvram/bhnd_nvram.h>
-#include <dev/bhnd/nvram/bhnd_nvram_iovar.h>
-#include <dev/bhnd/nvram/bhnd_nvram_store.h>
-
-struct bcm_nvram_iocfe;
-
-int		bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe,
-		    bhnd_nvram_data_class **cls);
-
-/**
- * CFE-backed bhnd_nvram_io implementation.
- */
-struct bcm_nvram_iocfe {
-	struct bhnd_nvram_io	 io;		/**< common I/O instance state */
-
-	char			*dname;		/**< CFE device name (borrowed) */
-	int			 fd;		/**< CFE file descriptor */
-	size_t			 offset;	/**< base offset */
-	size_t			 size;		/**< device size */
-	bool			 req_blk_erase;	/**< flash blocks must be erased
-						     before writing */
-};
-
-/** bhnd_nvram_cfe driver instance state. */
-struct bhnd_nvram_cfe_softc {
-	device_t		 	 dev;
-	struct bhnd_nvram_store		*store;	/**< nvram store */
-};
-
-#endif /* _MIPS_BROADCOM_BCM_NVRAM_CFE_H_ */
diff --git a/sys/mips/broadcom/bcm_pmu.c b/sys/mips/broadcom/bcm_pmu.c
deleted file mode 100644
index 8b9399d47a10..000000000000
--- a/sys/mips/broadcom/bcm_pmu.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <dev/bhnd/bhnd.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include <dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctlvar.h>
-
-#include <dev/bhnd/cores/pmu/bhnd_pmureg.h>
-#include <dev/bhnd/cores/pmu/bhnd_pmuvar.h>
-
-#include "bcm_machdep.h"
-
-static struct bhnd_pmu_query	*bcm_get_pmu(struct bcm_platform *bp);
-static bool			 bcm_has_pmu(struct bcm_platform *bp);
-
-static uint32_t			 bcm_pmu_read4(bus_size_t reg, void *ctx);
-static void			 bcm_pmu_write4(bus_size_t reg, uint32_t val,
-				     void *ctx);
-static uint32_t			 bcm_pmu_read_chipst(void *ctx);
-
-const struct bhnd_pmu_io bcm_pmu_soc_io = {
-	.rd4		= bcm_pmu_read4,
-	.wr4		= bcm_pmu_write4,
-	.rd_chipst	= bcm_pmu_read_chipst
-};
-
-/**
- * Supported UART clock sources.
- */
-typedef enum {
-	BCM_UART_RCLK_PLL_T1	= 0,	/**< UART uses PLL m2 (mii/uart/mipsref) with no divisor */
-	BCM_UART_RCLK_ALP	= 1,	/**< UART uses ALP rclk with no divisor */
-	BCM_UART_RCLK_EXT	= 2,	/**< UART uses 1.8423 MHz external clock */
-	BCM_UART_RCLK_SI	= 3,	/**< UART uses backplane clock with divisor of two */
-	BCM_UART_RCLK_FIXED	= 4,	/**< UART uses fixed 88Mhz backplane clock with a divisor of 48 */
-} bcm_uart_clksrc;
-
-/**
- * UART clock configuration.
- */
-struct bcm_uart_clkcfg {
-	bcm_uart_clksrc		src;	/**< clock source */
-	uint32_t		div;	/**< clock divisor */
-	uint32_t		freq;	/**< clock frequency (Hz) */
-};
-
-#define	BCM_UART_RCLK_PLL_T1_DIV	1
-#define	BCM_UART_RCLK_ALP_DIV		1
-#define	BCM_UART_RCLK_EXT_HZ		1842300		/* 1.8423MHz */
-#define	BCM_UART_RCLK_EXT_DIV		1
-#define	BCM_UART_RCLK_FIXED_HZ		88000000	/* 88MHz */
-#define	BCM_UART_RCLK_FIXED_DIV		48
-
-/* Fetch PLL type from ChipCommon capability flags */
-#define	BCM_PMU_PLL_TYPE(_bp)	\
-	CHIPC_GET_BITS(_bp->cc_caps, CHIPC_CAP_PLL)
-
-/**
- * Return the PMU instance, or NULL if no PMU.
- */
-static struct bhnd_pmu_query *
-bcm_get_pmu(struct bcm_platform	*bp)
-{
-	if (!bcm_has_pmu(bp))
-		return (NULL);
-	return (&bp->pmu);
-}
-
-/**
- * Return true if a PMU is available, false otherwise.
- */
-static bool
-bcm_has_pmu(struct bcm_platform *bp)
-{
-	return (bp->pmu_addr != 0);
-}
-
-/**
- * Determine the UART clock source for @p bp and return the
- * corresponding clock configuration, if any.
- */
-static struct bcm_uart_clkcfg
-bcm_get_uart_clkcfg(struct bcm_platform *bp)
-{
-	struct bcm_uart_clkcfg	 cfg;
-	struct bhnd_core_info	*cc_id;
-
-	cc_id = &bp->cc_id;
-
-	/* These tests are ordered by precedence. */
-
-	/* PLL M2 clock source? */
-	if (!bcm_has_pmu(bp) && BCM_PMU_PLL_TYPE(bp) == CHIPC_PLL_TYPE1) {
-		uint32_t n, m;
-
-		n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
-		m = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_M2);
-
-		cfg = (struct bcm_uart_clkcfg) {
-			BCM_UART_RCLK_PLL_T1,
-			BCM_UART_RCLK_PLL_T1_DIV,
-			bhnd_pwrctl_clock_rate(BCM_PMU_PLL_TYPE(bp), n, m)
-		};
-
-		return (cfg);
-	}
-
-	/* ALP clock source? */
-	if (cc_id->hwrev != 15 && cc_id->hwrev >= 11) {
-		cfg = (struct bcm_uart_clkcfg) {
-			BCM_UART_RCLK_ALP,
-			BCM_UART_RCLK_ALP_DIV,
-			bcm_get_alpfreq(bp)
-		};
-		return (cfg);
-	}
-
-	/* External clock? */
-	if (CHIPC_HWREV_HAS_CORECTRL(cc_id->hwrev)) {
-		uint32_t	corectrl, uclksel;
-		bool		uintclk0;
-
-		/* Fetch UART clock support flag */ 
-		uclksel = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_UCLKSEL);
-
-		/* Is UART using internal clock? */
-		corectrl = BCM_CHIPC_READ_4(bp, CHIPC_CORECTRL);
-		uintclk0 = CHIPC_GET_FLAG(corectrl, CHIPC_UARTCLKO);
-
-		if (uintclk0 && uclksel == CHIPC_CAP_UCLKSEL_UINTCLK) {
-			cfg = (struct bcm_uart_clkcfg) {
-				BCM_UART_RCLK_EXT,
-				BCM_UART_RCLK_EXT_DIV,
-				BCM_UART_RCLK_EXT_HZ
-			};
-			return (cfg);
-		}
-	}
-
-	/* UART uses backplane clock? */
-	if (cc_id->hwrev == 15 || (cc_id->hwrev >= 3 && cc_id->hwrev <= 10)) {
-		cfg = (struct bcm_uart_clkcfg) {
-			BCM_UART_RCLK_SI,
-			BCM_CHIPC_READ_4(bp, CHIPC_CLKDIV) & CHIPC_CLKD_UART,
-			bcm_get_sifreq(bp)
-		};
-
-		return (cfg);
-	}
-
-	/* UART uses fixed clock? */
-	if (cc_id->hwrev <= 2) {
-		cfg = (struct bcm_uart_clkcfg) {
-			BCM_UART_RCLK_FIXED,
-			BCM_UART_RCLK_FIXED_DIV,
-			BCM_UART_RCLK_FIXED_HZ
-		};
-
-		return (cfg);
-	}
-
-	/* All cases must be accounted for above */
-	panic("unreachable - no clock config");
-}
-
-/**
- * Return the UART reference clock frequency (in Hz).
- */
-u_int
-bcm_get_uart_rclk(struct bcm_platform *bp)
-{
-	struct bcm_uart_clkcfg cfg;
-
-	cfg = bcm_get_uart_clkcfg(bp);
-	return (cfg.freq / cfg.div);
-}
-
-/** ALP clock frequency (in Hz) */
-uint64_t
-bcm_get_alpfreq(struct bcm_platform *bp) {
-	if (!bcm_has_pmu(bp))
-		return (BHND_PMU_ALP_CLOCK);
-
-	return (bhnd_pmu_alp_clock(bcm_get_pmu(bp)));
-}
-
-/** ILP clock frequency (in Hz) */
-uint64_t
-bcm_get_ilpfreq(struct bcm_platform *bp) {
-	if (!bcm_has_pmu(bp))
-		return (BHND_PMU_ILP_CLOCK);
-
-	return (bhnd_pmu_ilp_clock(bcm_get_pmu(bp)));
-}
-
-/** CPU clock frequency (in Hz) */
-uint64_t
-bcm_get_cpufreq(struct bcm_platform *bp)
-{
-	uint32_t		 fixed_hz;
-	uint32_t		 n, m;
-	bus_size_t		 mreg;
-	uint8_t			 pll_type;
-
-	/* PMU support */
-	if (bcm_has_pmu(bp))
-		return (bhnd_pmu_cpu_clock(bcm_get_pmu(bp)));
-
-	/*
-	 * PWRCTL support
-	 */
-	pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL);
-	mreg = bhnd_pwrctl_cpu_clkreg_m(&bp->cid, pll_type, &fixed_hz);
-	if (mreg == 0)
-		return (fixed_hz);
-
-	n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
-	m = BCM_CHIPC_READ_4(bp, mreg);
-
-	return (bhnd_pwrctl_cpu_clock_rate(&bp->cid, pll_type, n, m));
-
-}
-
-/** Backplane clock frequency (in Hz) */
-uint64_t
-bcm_get_sifreq(struct bcm_platform *bp)
-{
-	uint32_t		 fixed_hz;
-	uint32_t		 n, m;
-	bus_size_t		 mreg;
-	uint8_t			 pll_type;
-
-	/* PMU support */
-	if (bcm_has_pmu(bp))
-		return (bhnd_pmu_si_clock(bcm_get_pmu(bp)));
-
-	/*
-	 * PWRCTL support
-	 */
-	pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL);
-	mreg = bhnd_pwrctl_si_clkreg_m(&bp->cid, pll_type, &fixed_hz);
-	if (mreg == 0)
-		return (fixed_hz);
-
-	n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
-	m = BCM_CHIPC_READ_4(bp, mreg);
-
-	return (bhnd_pwrctl_si_clock_rate(&bp->cid, pll_type, n, m));
-}
-
-static uint32_t
-bcm_pmu_read4(bus_size_t reg, void *ctx) {
-	struct bcm_platform *bp = ctx;
-	return (readl(BCM_SOC_ADDR(bp->pmu_addr, reg)));
-}
-
-static void
-bcm_pmu_write4(bus_size_t reg, uint32_t val, void *ctx) {
-	struct bcm_platform *bp = ctx;
-	writel(BCM_SOC_ADDR(bp->pmu_addr, reg), val);
-}
-
-static uint32_t
-bcm_pmu_read_chipst(void *ctx)
-{
-	struct bcm_platform *bp = ctx;
-	return (readl(BCM_SOC_ADDR(bp->cc_addr, CHIPC_CHIPST)));
-}
diff --git a/sys/mips/broadcom/bcma_nexus.c b/sys/mips/broadcom/bcma_nexus.c
deleted file mode 100644
index 4e3eaa7a7c1d..000000000000
--- a/sys/mips/broadcom/bcma_nexus.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/bcma/bcmavar.h>
-#include <dev/bhnd/bcma/bcma_dmp.h>
-
-#include "bcm_mipsvar.h"
-#include "bcm_machdep.h"
-
-#include "bhnd_nexusvar.h"
-
-/*
- * Supports bcma(4) attachment to a MIPS nexus bus.
- */
-
-static int	bcma_nexus_attach(device_t);
-static int	bcma_nexus_probe(device_t);
-
-_Static_assert(BCMA_OOB_NUM_BUSLINES == BCM_MIPS_NINTR, "BCMA incompatible "
-    "with generic NINTR");
-
-static int
-bcma_nexus_probe(device_t dev)
-{
-	int error;
-
-	switch (bcm_get_platform()->cid.chip_type) {
-	case BHND_CHIPTYPE_BCMA:
-	case BHND_CHIPTYPE_BCMA_ALT:
-	case BHND_CHIPTYPE_UBUS:
-		break;
-	default:
-		return (ENXIO);
-	}
-
-	if ((error = bcma_probe(dev)) > 0)
-		return (error);
-
-	/* Set device description */
-	bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid);
-
-	return (BUS_PROBE_SPECIFIC);
-}
-
-static int
-bcma_nexus_attach(device_t dev)
-{
-	int error;
-
-	/* Perform initial attach and enumerate our children. */
-	if ((error = bcma_attach(dev)))
-		goto failed;
-
-	/* Delegate remainder to standard bhnd method implementation */
-	if ((error = bhnd_generic_attach(dev)))
-		goto failed;
-
-	return (0);
-
-failed:
-	device_delete_children(dev);
-	return (error);
-}
-
-static device_method_t bcma_nexus_methods[] = {
-	DEVMETHOD(device_probe,			bcma_nexus_probe),
-	DEVMETHOD(device_attach,		bcma_nexus_attach),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_2(bhnd, bcma_nexus_driver, bcma_nexus_methods,
-    sizeof(struct bcma_softc), bhnd_nexus_driver, bcma_driver);
-
-EARLY_DRIVER_MODULE(bcma_nexus, nexus, bcma_nexus_driver, bhnd_devclass, 0, 0,
-    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/broadcom/bhnd_nexus.c b/sys/mips/broadcom/bhnd_nexus.c
deleted file mode 100644
index 6d3e735a2970..000000000000
--- a/sys/mips/broadcom/bhnd_nexus.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * bhnd(4) driver mix-in providing shared common methods for
- * bhnd bus devices attached via a MIPS root nexus.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/intr.h>
-#include <sys/limits.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <dev/bhnd/bhndvar.h>
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include "bcm_machdep.h"
-#include "bcm_mipsvar.h"
-
-#include "bhnd_nexusvar.h"
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_SERVICE_REGISTRY().
- */
-static struct bhnd_service_registry *
-bhnd_nexus_get_service_registry(device_t dev, device_t child)
-{
-	struct bcm_platform *bp = bcm_get_platform();
-	return (&bp->services);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_ACTIVATE_RESOURCE().
- */
-static int
-bhnd_nexus_activate_resource(device_t dev, device_t child, int type, int rid,
-    struct bhnd_resource *r)
-{
-	int error;
-
-	/* Always direct */
-	if ((error = bus_activate_resource(child, type, rid, r->res)))
-		return (error);
-
-	r->direct = true;
-	return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_DEACTIVATE_RESOURCE().
- */
-static int
-bhnd_nexus_deactivate_resource(device_t dev, device_t child,
-    int type, int rid, struct bhnd_resource *r)
-{
-	int error;
-
-	/* Always direct */
-	KASSERT(r->direct, ("indirect resource delegated to bhnd_nexus\n"));
-
-	if ((error = bus_deactivate_resource(child, type, rid, r->res)))
-		return (error);
-
-	r->direct = false;
-	return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_IS_HW_DISABLED().
- */
-static bool
-bhnd_nexus_is_hw_disabled(device_t dev, device_t child)
-{
-	struct bcm_platform	*bp;
-	struct bhnd_chipid	*cid;
-
-	bp = bcm_get_platform();
-	cid = &bp->cid;
-
-	/* The BCM4706 low-cost package leaves secondary GMAC cores
-	 * floating */
-	if (cid->chip_id == BHND_CHIPID_BCM4706 &&
-	    cid->chip_pkg == BHND_PKGID_BCM4706L &&
-	    bhnd_get_device(child) == BHND_COREID_4706_GMAC &&
-	    bhnd_get_core_unit(child) != 0)
-	{
-		return (true);
-	}
-
-	return (false);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_AGET_ATTACH_TYPE().
- */
-static bhnd_attach_type
-bhnd_nexus_get_attach_type(device_t dev, device_t child)
-{
-	return (BHND_ATTACH_NATIVE);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_CHIPID().
- */
-static const struct bhnd_chipid *
-bhnd_nexus_get_chipid(device_t dev, device_t child)
-{
-	return (&bcm_get_platform()->cid);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_READ_BOARD_INFO().
- */
-static int
-bhnd_nexus_read_board_info(device_t dev, device_t child,
-    struct bhnd_board_info *info)
-{
-	int error;
-
-	/* Initialize with NVRAM-derived values */
-	if ((error = bhnd_bus_generic_read_board_info(dev, child, info)))
-		return (error);
-
-	/* The board vendor should default to PCI_VENDOR_BROADCOM if not
-	 * otherwise specified */
-	if (info->board_vendor == 0)
-		info->board_vendor = PCI_VENDOR_BROADCOM;
-
-	return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_MAP_INTR().
- */
-static int
-bhnd_nexus_map_intr(device_t dev, device_t child, u_int intr, rman_res_t *irq)
-{
-	struct bcm_mips_intr_map_data	*imd;
-	u_int				 ivec;
-	uintptr_t			 xref;
-	int				 error;
-
-	/* Fetch the backplane interrupt vector */
-	if ((error = bhnd_get_intr_ivec(child, intr, &ivec))) {
-		device_printf(dev, "error fetching ivec for intr %u: %d\n",
-		    intr, error);
-		return (error);
-	}
-
-	/* Determine our interrupt domain */
-	xref = BHND_BUS_GET_INTR_DOMAIN(dev, child, false);
-	KASSERT(xref != 0, ("missing interrupt domain"));
-
-	/* Allocate our map data */
-	imd = (struct bcm_mips_intr_map_data *)intr_alloc_map_data(
-	    INTR_MAP_DATA_BCM_MIPS, sizeof(*imd), M_WAITOK | M_ZERO);
-	imd->ivec = ivec;
-
-	/* Map the IRQ */
-	*irq = intr_map_irq(NULL, xref, &imd->mdata);
-	return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_UNMAP_INTR().
- */
-static void
-bhnd_nexus_unmap_intr(device_t dev, device_t child, rman_res_t irq)
-{
-	if (irq > UINT_MAX)
-		panic("invalid irq: %ju", (uintmax_t)irq);
-
-	intr_unmap_irq(irq);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_DMA_TRANSLATION().
- */
-static int
-bhnd_nexus_get_dma_translation(device_t dev, device_t child,
-    u_int width, uint32_t flags, bus_dma_tag_t *dmat,
-    struct bhnd_dma_translation *translation)
-{
-	struct bcm_platform *bp = bcm_get_platform();
-
-	/* We don't (currently) support any flags */
-	if (flags != 0x0)
-		return (ENOENT);
-
-	KASSERT(width > 0 && width <= BHND_DMA_ADDR_64BIT,
-	    ("invalid width %u", width));
-
-	/* Is the requested width supported? */
-	if (width > BHND_DMA_ADDR_32BIT) {
-		/* Backplane must support 64-bit addressing */
-		if (!(bp->cid.chip_caps & BHND_CAP_BP64))
-			width = BHND_DMA_ADDR_32BIT;
-	}
-
-	/* No DMA address translation required */
-	if (dmat != NULL)
-		*dmat = bus_get_dma_tag(dev);
-
-	if (translation != NULL) {
-		*translation = (struct bhnd_dma_translation) {
-			.base_addr	= 0x0,
-			.addr_mask	= BHND_DMA_ADDR_BITMASK(width),
-			.addrext_mask	= 0
-		};
-	}
-
-	return (0);
-}
-
-static device_method_t bhnd_nexus_methods[] = {
-	/* bhnd interface */
-	DEVMETHOD(bhnd_bus_get_service_registry,bhnd_nexus_get_service_registry),
-	DEVMETHOD(bhnd_bus_register_provider,	bhnd_bus_generic_sr_register_provider),
-	DEVMETHOD(bhnd_bus_deregister_provider,	bhnd_bus_generic_sr_deregister_provider),
-	DEVMETHOD(bhnd_bus_retain_provider,	bhnd_bus_generic_sr_retain_provider),
-	DEVMETHOD(bhnd_bus_release_provider,	bhnd_bus_generic_sr_release_provider),
-	DEVMETHOD(bhnd_bus_activate_resource,	bhnd_nexus_activate_resource),
-	DEVMETHOD(bhnd_bus_deactivate_resource, bhnd_nexus_deactivate_resource),
-	DEVMETHOD(bhnd_bus_is_hw_disabled,	bhnd_nexus_is_hw_disabled),
-	DEVMETHOD(bhnd_bus_get_attach_type,	bhnd_nexus_get_attach_type),
-	DEVMETHOD(bhnd_bus_get_chipid,		bhnd_nexus_get_chipid),
-	DEVMETHOD(bhnd_bus_get_dma_translation,	bhnd_nexus_get_dma_translation),
-	DEVMETHOD(bhnd_bus_get_intr_domain,	bhnd_bus_generic_get_intr_domain),
-	DEVMETHOD(bhnd_bus_map_intr,		bhnd_nexus_map_intr),
-	DEVMETHOD(bhnd_bus_read_board_info,	bhnd_nexus_read_board_info),
-	DEVMETHOD(bhnd_bus_unmap_intr,		bhnd_nexus_unmap_intr),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bhnd, bhnd_nexus_driver, bhnd_nexus_methods,
-    sizeof(struct bhnd_softc));
diff --git a/sys/mips/broadcom/bhnd_nexusvar.h b/sys/mips/broadcom/bhnd_nexusvar.h
deleted file mode 100644
index 410070f7cf34..000000000000
--- a/sys/mips/broadcom/bhnd_nexusvar.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landon@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer,
- *    without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- *    redistribution must be conditioned upon including a substantially
- *    similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- * 
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BHND_NEXUSVAR_H_
-#define _MIPS_BROADCOM_BHND_NEXUSVAR_H_
-
-#include <sys/param.h>
-#include <sys/kobj.h>
-
-DECLARE_CLASS(bhnd_nexus_driver);
-
-#endif /* _MIPS_BROADCOM_BHND_NEXUSVAR_H_ */
diff --git a/sys/mips/broadcom/files.broadcom b/sys/mips/broadcom/files.broadcom
deleted file mode 100644
index 244124a13f67..000000000000
--- a/sys/mips/broadcom/files.broadcom
+++ /dev/null
@@ -1,32 +0,0 @@
-# $FreeBSD$
-
-# TODO: Add attachment elsewhere in the tree
-# for USB 1.1 OHCI, Ethernet and IPSEC cores
-# which are believed to be devices we have drivers for
-# which just need to be tweaked for attachment to an BHND system bus.
-mips/broadcom/bcm_machdep.c		standard
-mips/broadcom/bcm_bmips.c		optional siba_nexus siba
-mips/broadcom/bcm_mips74k.c		optional bcma_nexus bcma
-mips/broadcom/bcm_mips.c		optional siba_nexus siba | \
-						 bcma_nexus bcma
-mips/broadcom/bcm_nvram_cfe.c		optional bhnd siba_nexus cfe | \
-						 bhnd bcma_nexus cfe
-mips/broadcom/bcm_pmu.c			standard
-
-mips/broadcom/bhnd_nexus.c		optional bhnd siba_nexus | \
-						 bhnd bcma_nexus
-mips/broadcom/bcma_nexus.c		optional bcma_nexus bcma bhnd
-mips/broadcom/siba_nexus.c		optional siba_nexus siba bhnd
-
-mips/mips/tick.c			standard
-
-mips/broadcom/uart_cpu_chipc.c		optional uart
-mips/broadcom/uart_bus_chipc.c		optional uart
-
-# TODO: Replace with BCM47xx/57xx/etc-aware geom_map
-geom/geom_flashmap.c			standard
-
-# USB bits
-dev/bhnd/cores/usb/bhnd_usb.c		optional usb
-dev/bhnd/cores/usb/bhnd_ehci.c		optional ehci
-dev/bhnd/cores/usb/bhnd_ohci.c		optional ohci
diff --git a/sys/mips/broadcom/siba_nexus.c b/sys/mips/broadcom/siba_nexus.c
deleted file mode 100644
index 10b146563377..000000000000
--- a/sys/mips/broadcom/siba_nexus.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/siba/sibareg.h>
-#include <dev/bhnd/siba/sibavar.h>
-
-#include "bcm_machdep.h"
-#include "bcm_mipsvar.h"
-
-#include "bhnd_nexusvar.h"
-
-/*
- * Supports siba(4) attachment to a MIPS nexus bus.
- * 
- * Derived from Bruce M. Simpson' original siba(4) driver.
- */
-
-_Static_assert(SIBA_MAX_INTR == BCM_MIPS_NINTR, "SIBA incompatible with "
-    "generic NINTR");
-
-static int
-siba_nexus_probe(device_t dev)
-{
-	int error;
-
-	if (bcm_get_platform()->cid.chip_type != BHND_CHIPTYPE_SIBA)
-		return (ENXIO);
-
-	if ((error = siba_probe(dev)) > 0)
-		return (error);
-
-	/* Set device description */
-	bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid);
-
-	return (BUS_PROBE_SPECIFIC);
-}
-
-static int
-siba_nexus_attach(device_t dev)
-{
-	int error;
-
-	/* Perform initial attach and enumerate our children. */
-	if ((error = siba_attach(dev)))
-		return (error);
-
-	/* Delegate remainder to standard bhnd method implementation */
-	if ((error = bhnd_generic_attach(dev)))
-		goto failed;
-
-	return (0);
-
-failed:
-	siba_detach(dev);
-	return (error);
-}
-
-static device_method_t siba_nexus_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,			siba_nexus_probe),
-	DEVMETHOD(device_attach,		siba_nexus_attach),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_2(bhnd, siba_nexus_driver, siba_nexus_methods,
-    sizeof(struct siba_softc), bhnd_nexus_driver, siba_driver);
-
-EARLY_DRIVER_MODULE(siba_nexus, nexus, siba_nexus_driver, bhnd_devclass, 0, 0,
-    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/broadcom/std.broadcom b/sys/mips/broadcom/std.broadcom
deleted file mode 100644
index 68aa974ae612..000000000000
--- a/sys/mips/broadcom/std.broadcom
+++ /dev/null
@@ -1,9 +0,0 @@
-# $FreeBSD$
-#
-
-machine		mips mipsel
-
-makeoptions	INTRNG
-options		INTRNG
-
-files		"../broadcom/files.broadcom"
diff --git a/sys/mips/broadcom/uart_bus_chipc.c b/sys/mips/broadcom/uart_bus_chipc.c
deleted file mode 100644
index d93f8a21a4f0..000000000000
--- a/sys/mips/broadcom/uart_bus_chipc.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_uart.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include "uart_if.h"
-#include "bhnd_chipc_if.h"
-
-#include "bcm_machdep.h"
-
-static int
-uart_chipc_probe(device_t dev)
-{
-	struct uart_softc 	*sc;
-	u_int			 rclk;
-
-	sc = device_get_softc(dev);
-	sc->sc_class = &uart_ns8250_class;
-
-	rclk = bcm_get_uart_rclk(bcm_get_platform());
-	return (uart_bus_probe(dev, 0, 0, rclk, 0, 0, 0));
-}
-
-static device_method_t uart_chipc_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_chipc_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_chipc_driver = {
-	uart_driver_name,
-	uart_chipc_methods,
-	sizeof(struct uart_softc),
-};
-
-DRIVER_MODULE(uart, bhnd_chipc, uart_chipc_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/broadcom/uart_cpu_chipc.c b/sys/mips/broadcom/uart_cpu_chipc.c
deleted file mode 100644
index 2120cf0ba4f5..000000000000
--- a/sys/mips/broadcom/uart_cpu_chipc.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_uart.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#ifdef CFE
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_ioctl.h>
-#include <dev/cfe/cfe_error.h>
-#endif
-
-#include "bcm_machdep.h"
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-static struct uart_class *chipc_uart_class = &uart_ns8250_class;
-
-#define	CHIPC_UART_BAUDRATE	115200
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-static int
-uart_cpu_init(struct uart_devinfo *di, u_int uart, int baudrate)
-{
-	if (uart >= CHIPC_UART_MAX)
-		return (EINVAL);
-
-	di->ops = uart_getops(chipc_uart_class);
-	di->bas.chan = 0;
-	di->bas.bst = uart_bus_space_mem;
-	di->bas.bsh = (bus_space_handle_t) BCM_CORE_ADDR(bcm_get_platform(),
-	    cc_addr, CHIPC_UART(uart));
-	di->bas.regshft = 0;
-	di->bas.rclk = bcm_get_uart_rclk(bcm_get_platform());
-	di->baudrate = baudrate;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	return (0);
-}
-
-#ifdef CFE
-static int
-uart_getenv_cfe(int devtype, struct uart_devinfo *di)
-{
-	char	device[sizeof("uartXX")];
-	int	baud, fd, len;
-	int	ret;
-	u_int	uart;
-
-	/* CFE only vends console configuration */
-	if (devtype != UART_DEV_CONSOLE)
-		return (ENODEV);
-
-	/* Fetch console device */
-	ret = cfe_getenv("BOOT_CONSOLE", device, sizeof(device));
-	if (ret != CFE_OK)
-		return (ENXIO);
-
-	/* Parse serial console unit. Fails on non-uart devices.  */
-	if (sscanf(device, "uart%u", &uart) != 1)
-		return (ENXIO);
-
-	/* Fetch device handle */
-	fd = bcm_get_platform()->cfe_console;
-	if (fd < 0)
-		return (ENXIO);
-
-	/* Fetch serial configuration */
-	ret = cfe_ioctl(fd, IOCTL_SERIAL_GETSPEED, (unsigned char *)&baud,
-	    sizeof(baud), &len, 0);	
-	if (ret != CFE_OK)
-		baud = CHIPC_UART_BAUDRATE;
-
-	/* Initialize device info */
-	return (uart_cpu_init(di, uart, baud));
-}
-#endif /* CFE */
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	int			 ivar;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = mips_bus_space_generic;
-
-#ifdef CFE
-	/* Check the CFE environment */
-	if (uart_getenv_cfe(devtype, di) == 0)
-		return (0);
-#endif /* CFE */
-
-	/* Check the kernel environment. */
-	if (uart_getenv(devtype, di, chipc_uart_class) == 0)
-		return (0);
-
-	/* Scan the device hints for the first matching device */
-	for (u_int i = 0; i < CHIPC_UART_MAX; i++) {
-		if (resource_int_value("uart", i, "flags", &ivar))
-			continue;
-
-		/* Check usability */
-		if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(ivar))
-			continue;
-
-		if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(ivar))
-			continue;
-
-		if (resource_int_value("uart", i, "disabled", &ivar) == 0 &&
-		    ivar == 0)
-			continue;
-
-		/* Found */
-		if (resource_int_value("uart", i, "baud", &ivar) != 0)
-			ivar = CHIPC_UART_BAUDRATE;
-		
-		return (uart_cpu_init(di, i, ivar));
-	}
-
-	/* Default to uart0/115200 */
-	return (uart_cpu_init(di, 0, CHIPC_UART_BAUDRATE));
-}
diff --git a/sys/mips/cavium/asm_octeon.S b/sys/mips/cavium/asm_octeon.S
deleted file mode 100644
index 94ac875a1996..000000000000
--- a/sys/mips/cavium/asm_octeon.S
+++ /dev/null
@@ -1,66 +0,0 @@
-/*-
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-
-	.set noreorder
-
-#ifdef SMP
-/*
- * This function must be implemented in assembly because it is called early
- * in AP boot without a valid stack.
- */
-LEAF(platform_processor_id)
-	.set push
-	.set mips32r2
-	jr	ra
-	rdhwr	v0, $0
-	.set pop
-END(platform_processor_id)
-
-/*
- * Called on APs to wait until they are told to launch.
- */
-LEAF(octeon_ap_wait)
-	jal	platform_processor_id
-	nop
-
-1:	ll	t0, octeon_ap_boot
-	bne	v0, t0, 1b
-	nop
-
-	move	t0, zero
-	sc	t0, octeon_ap_boot
-
-	beqz	t0, 1b
-	nop
-
-	j	mpentry
-	nop
-END(octeon_ap_wait)
-#endif
diff --git a/sys/mips/cavium/ciu.c b/sys/mips/cavium/ciu.c
deleted file mode 100644
index 74dc7904dd50..000000000000
--- a/sys/mips/cavium/ciu.c
+++ /dev/null
@@ -1,488 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-#include <sys/smp.h>
-
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-
-/*
- * This bus sits between devices/buses and nexus and handles CIU interrupts
- * and passes everything else through.  It should really be a nexus subclass
- * or something, but for now this will be sufficient.
- */
-
-#define	CIU_IRQ_HARD		(0)
-
-#define	CIU_IRQ_EN0_BEGIN	OCTEON_IRQ_WORKQ0
-#define	CIU_IRQ_EN0_END		OCTEON_IRQ_BOOTDMA
-#define	CIU_IRQ_EN0_COUNT	((CIU_IRQ_EN0_END - CIU_IRQ_EN0_BEGIN) + 1)
-
-#define	CIU_IRQ_EN1_BEGIN	OCTEON_IRQ_WDOG0
-#define	CIU_IRQ_EN1_END		OCTEON_IRQ_DFM
-#define	CIU_IRQ_EN1_COUNT	((CIU_IRQ_EN1_END - CIU_IRQ_EN1_BEGIN) + 1)
-
-struct ciu_softc {
-	struct rman irq_rman;
-	struct resource *ciu_irq;
-};
-
-static mips_intrcnt_t ciu_en0_intrcnt[CIU_IRQ_EN0_COUNT];
-static mips_intrcnt_t ciu_en1_intrcnt[CIU_IRQ_EN1_COUNT];
-
-static struct intr_event *ciu_en0_intr_events[CIU_IRQ_EN0_COUNT];
-static struct intr_event *ciu_en1_intr_events[CIU_IRQ_EN1_COUNT];
-
-static int		ciu_probe(device_t);
-static int		ciu_attach(device_t);
-static struct resource	*ciu_alloc_resource(device_t, device_t, int, int *,
-					    rman_res_t, rman_res_t, rman_res_t,
-					    u_int);
-static int		ciu_setup_intr(device_t, device_t, struct resource *,
-				       int, driver_filter_t *, driver_intr_t *,
-				       void *, void **);
-static int		ciu_teardown_intr(device_t, device_t,
-					  struct resource *, void *);
-static int		ciu_bind_intr(device_t, device_t, struct resource *,
-				      int);
-static int		ciu_describe_intr(device_t, device_t,
-					  struct resource *, void *,
-					  const char *);
-static void		ciu_hinted_child(device_t, const char *, int);
-
-static void		ciu_en0_intr_mask(void *);
-static void		ciu_en0_intr_unmask(void *);
-#ifdef SMP
-static int		ciu_en0_intr_bind(void *, int);
-#endif
-
-static void		ciu_en1_intr_mask(void *);
-static void		ciu_en1_intr_unmask(void *);
-#ifdef SMP
-static int		ciu_en1_intr_bind(void *, int);
-#endif
-
-static int		ciu_intr(void *);
-
-static int
-ciu_probe(device_t dev)
-{
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Cavium Octeon Central Interrupt Unit");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-ciu_attach(device_t dev)
-{
-	char name[MAXCOMLEN + 1];
-	struct ciu_softc *sc;
-	unsigned i;
-	int error;
-	int rid;
-
-	sc = device_get_softc(dev);
-
-	rid = 0;
-	sc->ciu_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, CIU_IRQ_HARD,
-					 CIU_IRQ_HARD, 1, RF_ACTIVE);
-	if (sc->ciu_irq == NULL) {
-		device_printf(dev, "could not allocate irq%d\n", CIU_IRQ_HARD);
-		return (ENXIO);
-	}
-
-	error = bus_setup_intr(dev, sc->ciu_irq, INTR_TYPE_MISC, ciu_intr,
-			       NULL, sc, NULL);
-	if (error != 0) {
-		device_printf(dev, "bus_setup_intr failed: %d\n", error);
-		return (error);
-	}
-
-	sc->irq_rman.rm_type = RMAN_ARRAY;
-	sc->irq_rman.rm_descr = "CIU IRQ";
-
-	error = rman_init(&sc->irq_rman);
-	if (error != 0)
-		return (error);
-
-	/*
-	 * We have two contiguous IRQ regions, use a single rman.
-	 */
-	error = rman_manage_region(&sc->irq_rman, CIU_IRQ_EN0_BEGIN,
-				   CIU_IRQ_EN1_END);
-	if (error != 0)
-		return (error);
-
-	for (i = 0; i < CIU_IRQ_EN0_COUNT; i++) {
-		snprintf(name, sizeof name, "int%d:", i + CIU_IRQ_EN0_BEGIN);
-		ciu_en0_intrcnt[i] = mips_intrcnt_create(name);
-	}
-
-	for (i = 0; i < CIU_IRQ_EN1_COUNT; i++) {
-		snprintf(name, sizeof name, "int%d:", i + CIU_IRQ_EN1_BEGIN);
-		ciu_en1_intrcnt[i] = mips_intrcnt_create(name);
-	}
-
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-ciu_alloc_resource(device_t bus, device_t child, int type, int *rid,
-		   rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct resource *res;
-	struct ciu_softc *sc;
-
-	sc = device_get_softc(bus);
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		break;
-	default:
-		return (bus_alloc_resource(device_get_parent(bus), type, rid,
-					   start, end, count, flags));
-	}
-
-	/*
-	 * One interrupt at a time for now.
-	 */
-	if (start != end)
-		return (NULL);
-
-	res = rman_reserve_resource(&sc->irq_rman, start, end, count, flags,
-				    child);
-	if (res != NULL)
-		return (res);
-
-	return (NULL);
-}
-
-static int
-ciu_setup_intr(device_t bus, device_t child, struct resource *res, int flags,
-	       driver_filter_t *filter, driver_intr_t *intr, void *arg,
-	       void **cookiep)
-{
-	struct intr_event *event, **eventp;
-	void (*mask_func)(void *);
-	void (*unmask_func)(void *);
-	int (*bind_func)(void *, int);
-	mips_intrcnt_t intrcnt;
-	int error;
-	int irq;
-
-	irq = rman_get_start(res);
-	if (irq <= CIU_IRQ_EN0_END) {
-		eventp = &ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN];
-		intrcnt = ciu_en0_intrcnt[irq - CIU_IRQ_EN0_BEGIN];
-		mask_func = ciu_en0_intr_mask;
-		unmask_func = ciu_en0_intr_unmask;
-#ifdef SMP
-		bind_func = ciu_en0_intr_bind;
-#endif
-	} else {
-		eventp = &ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN];
-		intrcnt = ciu_en1_intrcnt[irq - CIU_IRQ_EN1_BEGIN];
-		mask_func = ciu_en1_intr_mask;
-		unmask_func = ciu_en1_intr_unmask;
-#ifdef SMP
-		bind_func = ciu_en1_intr_bind;
-#endif
-	}
-#if !defined(SMP)
-	bind_func = NULL;
-#endif
-
-	if ((event = *eventp) == NULL) {
-		error = intr_event_create(eventp, (void *)(uintptr_t)irq, 0,
-		    irq, mask_func, unmask_func, NULL, bind_func, "int%d", irq);
-		if (error != 0)
-			return (error);
-
-		event = *eventp;
-
-		unmask_func((void *)(uintptr_t)irq);
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child),
-	    filter, intr, arg, intr_priority(flags), flags, cookiep);
-
-	mips_intrcnt_setname(intrcnt, event->ie_fullname);
-
-	return (0);
-}
-
-static int
-ciu_teardown_intr(device_t bus, device_t child, struct resource *res,
-		  void *cookie)
-{
-	int error;
-
-	error = intr_event_remove_handler(cookie);
-	if (error != 0)
-		return (error);
-
-	return (0);
-}
-
-#ifdef SMP
-static int
-ciu_bind_intr(device_t bus, device_t child, struct resource *res, int cpu)
-{
-	struct intr_event *event;
-	int irq;
-
-	irq = rman_get_start(res);
-	if (irq <= CIU_IRQ_EN0_END)
-		event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN];
-	else
-		event = ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN];
-
-	return (intr_event_bind(event, cpu));
-}
-#endif
-
-static int
-ciu_describe_intr(device_t bus, device_t child, struct resource *res,
-		  void *cookie, const char *descr)
-{
-	struct intr_event *event;
-	mips_intrcnt_t intrcnt;
-	int error;
-	int irq;
-
-	irq = rman_get_start(res);
-	if (irq <= CIU_IRQ_EN0_END) {
-		event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN];
-		intrcnt = ciu_en0_intrcnt[irq - CIU_IRQ_EN0_BEGIN];
-	} else {
-		event = ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN];
-		intrcnt = ciu_en1_intrcnt[irq - CIU_IRQ_EN1_BEGIN];
-	}
-
-	error = intr_event_describe_handler(event, cookie, descr);
-	if (error != 0)
-		return (error);
-
-	mips_intrcnt_setname(intrcnt, event->ie_fullname);
-
-	return (0);
-}
-
-static void
-ciu_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	BUS_ADD_CHILD(bus, 0, dname, dunit);
-}
-
-static void
-ciu_en0_intr_mask(void *arg)
-{
-	uint64_t mask;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2));
-	mask &= ~(1ull << (irq - CIU_IRQ_EN0_BEGIN));
-	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask);
-}
-
-static void
-ciu_en0_intr_unmask(void *arg)
-{
-	uint64_t mask;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2));
-	mask |= 1ull << (irq - CIU_IRQ_EN0_BEGIN);
-	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask);
-}
-
-#ifdef SMP
-static int
-ciu_en0_intr_bind(void *arg, int target)
-{
-	uint64_t mask;
-	int core;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	CPU_FOREACH(core) {
-		mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2));
-		if (core == target)
-			mask |= 1ull << (irq - CIU_IRQ_EN0_BEGIN);
-		else
-			mask &= ~(1ull << (irq - CIU_IRQ_EN0_BEGIN));
-		cvmx_write_csr(CVMX_CIU_INTX_EN0(core*2), mask);
-	}
-
-	return (0);
-}
-#endif
-
-static void
-ciu_en1_intr_mask(void *arg)
-{
-	uint64_t mask;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2));
-	mask &= ~(1ull << (irq - CIU_IRQ_EN1_BEGIN));
-	cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask);
-}
-
-static void
-ciu_en1_intr_unmask(void *arg)
-{
-	uint64_t mask;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2));
-	mask |= 1ull << (irq - CIU_IRQ_EN1_BEGIN);
-	cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask);
-}
-
-#ifdef SMP
-static int
-ciu_en1_intr_bind(void *arg, int target)
-{
-	uint64_t mask;
-	int core;
-	int irq;
-
-	irq = (uintptr_t)arg;
-	CPU_FOREACH(core) {
-		mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(core*2));
-		if (core == target)
-			mask |= 1ull << (irq - CIU_IRQ_EN1_BEGIN);
-		else
-			mask &= ~(1ull << (irq - CIU_IRQ_EN1_BEGIN));
-		cvmx_write_csr(CVMX_CIU_INTX_EN1(core*2), mask);
-	}
-
-	return (0);
-}
-#endif
-
-static int
-ciu_intr(void *arg)
-{
-	struct ciu_softc *sc;
-	uint64_t en0_sum, en1_sum;
-	uint64_t en0_mask, en1_mask;
-	int irq_index;
-	int error;
-
-	sc = arg;
-	(void)sc;
-
-	en0_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(cvmx_get_core_num()*2));
-	en1_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1);
-
-	en0_mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2));
-	en1_mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2));
-
-	en0_sum &= en0_mask;
-	en1_sum &= en1_mask;
-
-	if (en0_sum == 0 && en1_sum == 0)
-		return (FILTER_STRAY);
-
-	for (irq_index = 0; en0_sum != 0; irq_index++, en0_sum >>= 1) {
-		if ((en0_sum & 1) == 0)
-			continue;
-
-		mips_intrcnt_inc(ciu_en0_intrcnt[irq_index]);
-
-		error = intr_event_handle(ciu_en0_intr_events[irq_index], NULL);
-		if (error != 0)
-			printf("%s: stray en0 irq%d\n", __func__, irq_index);
-	}
-
-	for (irq_index = 0; en1_sum != 0; irq_index++, en1_sum >>= 1) {
-		if ((en1_sum & 1) == 0)
-			continue;
-
-		mips_intrcnt_inc(ciu_en1_intrcnt[irq_index]);
-
-		error = intr_event_handle(ciu_en1_intr_events[irq_index], NULL);
-		if (error != 0)
-			printf("%s: stray en1 irq%d\n", __func__, irq_index);
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static device_method_t ciu_methods[] = {
-	DEVMETHOD(device_probe,		ciu_probe),
-	DEVMETHOD(device_attach,	ciu_attach),
-
-	DEVMETHOD(bus_alloc_resource,	ciu_alloc_resource),
-	DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
-	DEVMETHOD(bus_setup_intr,	ciu_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	ciu_teardown_intr),
-#ifdef SMP
-	DEVMETHOD(bus_bind_intr,	ciu_bind_intr),
-#endif
-	DEVMETHOD(bus_describe_intr,	ciu_describe_intr),
-
-	DEVMETHOD(bus_add_child,	bus_generic_add_child),
-	DEVMETHOD(bus_hinted_child,	ciu_hinted_child),
-	{ 0, 0 }
-};
-
-static driver_t ciu_driver = {
-	"ciu",
-	ciu_methods,
-	sizeof(struct ciu_softc),
-};
-static devclass_t ciu_devclass;
-DRIVER_MODULE(ciu, nexus, ciu_driver, ciu_devclass, 0, 0);
diff --git a/sys/mips/cavium/cryptocteon/cavium_crypto.c b/sys/mips/cavium/cryptocteon/cavium_crypto.c
deleted file mode 100644
index fcb1fcfc3792..000000000000
--- a/sys/mips/cavium/cryptocteon/cavium_crypto.c
+++ /dev/null
@@ -1,945 +0,0 @@
-/*
- * vim:sw=4 ts=8
- */
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2009 David McCullough <david.mccullough@securecomputing.com>
- *
- * Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights
- * reserved.
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Cavium Networks
- * 4. Cavium Networks' name may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- * 
- * This Software, including technical data, may be subject to U.S. export
- * control laws, including the U.S. Export Administration Act and its
- * associated regulations, and may be subject to export or import regulations
- * in other countries. You warrant that You will comply strictly in all
- * respects with all such regulations and acknowledge that you have the
- * responsibility to obtain licenses to export, re-export or import the
- * Software.
- * 
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" AND
- * WITH ALL FAULTS AND CAVIUM MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES,
- * EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE
- * SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
- * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
- * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
- * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
- * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
- * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
- * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-*/
-/****************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/uio.h>
-
-#include <opencrypto/cryptodev.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-#include <mips/cavium/cryptocteon/cryptocteonvar.h>
-
-/****************************************************************************/
-
-#define	IOV_INIT(iov, ptr, idx, len)					\
-	do {								\
-	    (idx) = 0;							\
-	    (ptr) = (iov)[(idx)].iov_base;				\
-	    (len) = (iov)[(idx)].iov_len;				\
-	} while (0)
-
-/*
- * XXX
- * It would be better if this were an IOV_READ/IOV_WRITE macro instead so
- * that we could detect overflow before it happens rather than right after,
- * which is especially bad since there is usually no IOV_CONSUME after the
- * final read or write.
- */
-#define	IOV_CONSUME(iov, ptr, idx, len)					\
-	do {								\
-	    if ((len) > sizeof *(ptr)) {				\
-		(len) -= sizeof *(ptr);					\
-		(ptr)++;						\
-	    } else {							\
-		if ((len) != sizeof *(ptr))				\
-			panic("%s: went past end of iovec.", __func__);	\
-		(idx)++;						\
-		(ptr) = (iov)[(idx)].iov_base;				\
-		(len) = (iov)[(idx)].iov_len;				\
-	    }								\
-	} while (0)
-
-#define ESP_HEADER_LENGTH     8
-#define AES_CBC_IV_LENGTH     16
-#define ESP_HMAC_LEN          12
-
-#define ESP_HEADER_LENGTH 8
-
-/****************************************************************************/
-
-#define CVM_LOAD_SHA_UNIT(dat, next)  { \
-   if (next == 0) {                     \
-      next = 1;                         \
-      CVMX_MT_HSH_DAT (dat, 0);         \
-   } else if (next == 1) {              \
-      next = 2;                         \
-      CVMX_MT_HSH_DAT (dat, 1);         \
-   } else if (next == 2) {              \
-      next = 3;                    \
-      CVMX_MT_HSH_DAT (dat, 2);         \
-   } else if (next == 3) {              \
-      next = 4;                         \
-      CVMX_MT_HSH_DAT (dat, 3);         \
-   } else if (next == 4) {              \
-      next = 5;                           \
-      CVMX_MT_HSH_DAT (dat, 4);         \
-   } else if (next == 5) {              \
-      next = 6;                         \
-      CVMX_MT_HSH_DAT (dat, 5);         \
-   } else if (next == 6) {              \
-      next = 7;                         \
-      CVMX_MT_HSH_DAT (dat, 6);         \
-   } else {                             \
-     CVMX_MT_HSH_STARTSHA (dat);        \
-     next = 0;                          \
-   }                                    \
-}
-
-#define CVM_LOAD2_SHA_UNIT(dat1, dat2, next)  { \
-   if (next == 0) {                      \
-      CVMX_MT_HSH_DAT (dat1, 0);         \
-      CVMX_MT_HSH_DAT (dat2, 1);         \
-      next = 2;                          \
-   } else if (next == 1) {               \
-      CVMX_MT_HSH_DAT (dat1, 1);         \
-      CVMX_MT_HSH_DAT (dat2, 2);         \
-      next = 3;                          \
-   } else if (next == 2) {               \
-      CVMX_MT_HSH_DAT (dat1, 2);         \
-      CVMX_MT_HSH_DAT (dat2, 3);         \
-      next = 4;                          \
-   } else if (next == 3) {               \
-      CVMX_MT_HSH_DAT (dat1, 3);         \
-      CVMX_MT_HSH_DAT (dat2, 4);         \
-      next = 5;                          \
-   } else if (next == 4) {               \
-      CVMX_MT_HSH_DAT (dat1, 4);         \
-      CVMX_MT_HSH_DAT (dat2, 5);         \
-      next = 6;                          \
-   } else if (next == 5) {               \
-      CVMX_MT_HSH_DAT (dat1, 5);         \
-      CVMX_MT_HSH_DAT (dat2, 6);         \
-      next = 7;                          \
-   } else if (next == 6) {               \
-      CVMX_MT_HSH_DAT (dat1, 6);         \
-      CVMX_MT_HSH_STARTSHA (dat2);       \
-      next = 0;                          \
-   } else {                              \
-     CVMX_MT_HSH_STARTSHA (dat1);        \
-     CVMX_MT_HSH_DAT (dat2, 0);          \
-     next = 1;                           \
-   }                                     \
-}
-
-/****************************************************************************/
-
-#define CVM_LOAD_MD5_UNIT(dat, next)  { \
-   if (next == 0) {                     \
-      next = 1;                         \
-      CVMX_MT_HSH_DAT (dat, 0);         \
-   } else if (next == 1) {              \
-      next = 2;                         \
-      CVMX_MT_HSH_DAT (dat, 1);         \
-   } else if (next == 2) {              \
-      next = 3;                    \
-      CVMX_MT_HSH_DAT (dat, 2);         \
-   } else if (next == 3) {              \
-      next = 4;                         \
-      CVMX_MT_HSH_DAT (dat, 3);         \
-   } else if (next == 4) {              \
-      next = 5;                           \
-      CVMX_MT_HSH_DAT (dat, 4);         \
-   } else if (next == 5) {              \
-      next = 6;                         \
-      CVMX_MT_HSH_DAT (dat, 5);         \
-   } else if (next == 6) {              \
-      next = 7;                         \
-      CVMX_MT_HSH_DAT (dat, 6);         \
-   } else {                             \
-     CVMX_MT_HSH_STARTMD5 (dat);        \
-     next = 0;                          \
-   }                                    \
-}
-
-#define CVM_LOAD2_MD5_UNIT(dat1, dat2, next)  { \
-   if (next == 0) {                      \
-      CVMX_MT_HSH_DAT (dat1, 0);         \
-      CVMX_MT_HSH_DAT (dat2, 1);         \
-      next = 2;                          \
-   } else if (next == 1) {               \
-      CVMX_MT_HSH_DAT (dat1, 1);         \
-      CVMX_MT_HSH_DAT (dat2, 2);         \
-      next = 3;                          \
-   } else if (next == 2) {               \
-      CVMX_MT_HSH_DAT (dat1, 2);         \
-      CVMX_MT_HSH_DAT (dat2, 3);         \
-      next = 4;                          \
-   } else if (next == 3) {               \
-      CVMX_MT_HSH_DAT (dat1, 3);         \
-      CVMX_MT_HSH_DAT (dat2, 4);         \
-      next = 5;                          \
-   } else if (next == 4) {               \
-      CVMX_MT_HSH_DAT (dat1, 4);         \
-      CVMX_MT_HSH_DAT (dat2, 5);         \
-      next = 6;                          \
-   } else if (next == 5) {               \
-      CVMX_MT_HSH_DAT (dat1, 5);         \
-      CVMX_MT_HSH_DAT (dat2, 6);         \
-      next = 7;                          \
-   } else if (next == 6) {               \
-      CVMX_MT_HSH_DAT (dat1, 6);         \
-      CVMX_MT_HSH_STARTMD5 (dat2);       \
-      next = 0;                          \
-   } else {                              \
-     CVMX_MT_HSH_STARTMD5 (dat1);        \
-     CVMX_MT_HSH_DAT (dat2, 0);          \
-     next = 1;                           \
-   }                                     \
-}
-
-/****************************************************************************/
-
-void
-octo_calc_hash(uint8_t auth, unsigned char *key, uint64_t *inner, uint64_t *outer)
-{
-    uint8_t hash_key[64];
-    uint64_t *key1;
-    register uint64_t xor1 = 0x3636363636363636ULL;
-    register uint64_t xor2 = 0x5c5c5c5c5c5c5c5cULL;
-
-    dprintf("%s()\n", __func__);
-
-    memset(hash_key, 0, sizeof(hash_key));
-    memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16));
-    key1 = (uint64_t *) hash_key;
-    if (auth) {
-       CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0);
-       CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1);
-       CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2);
-    } else {
-       CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0);
-       CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1);
-    }
-
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 0);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 1);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 2);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 3);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 4);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 5);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor1), 6);
-    key1++;
-    if (auth)
-		CVMX_MT_HSH_STARTSHA((*key1 ^ xor1));
-    else
-		CVMX_MT_HSH_STARTMD5((*key1 ^ xor1));
-
-    CVMX_MF_HSH_IV(inner[0], 0);
-    CVMX_MF_HSH_IV(inner[1], 1);
-    if (auth) {
-		inner[2] = 0;
-		CVMX_MF_HSH_IV(((uint64_t *) inner)[2], 2);
-    }
-
-    memset(hash_key, 0, sizeof(hash_key));
-    memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16));
-    key1 = (uint64_t *) hash_key;
-    if (auth) {
-      CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0);
-      CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1);
-      CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2);
-    } else {
-      CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0);
-      CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1);
-    }
-
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 0);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 1);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 2);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 3);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 4);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 5);
-    key1++;
-    CVMX_MT_HSH_DAT((*key1 ^ xor2), 6);
-    key1++;
-    if (auth)
-       CVMX_MT_HSH_STARTSHA((*key1 ^ xor2));
-    else 
-       CVMX_MT_HSH_STARTMD5((*key1 ^ xor2));
-
-    CVMX_MF_HSH_IV(outer[0], 0);
-    CVMX_MF_HSH_IV(outer[1], 1);
-    if (auth) {
-      outer[2] = 0;
-      CVMX_MF_HSH_IV(outer[2], 2);
-    }
-    return;
-}
-
-/****************************************************************************/
-/* AES functions */
-
-int
-octo_aes_cbc_encrypt(
-    struct octo_sess *od,
-    struct iovec *iov, size_t iovcnt, size_t iovlen,
-    int auth_off, int auth_len,
-    int crypt_off, int crypt_len,
-    uint8_t *icv, uint8_t *ivp)
-{
-    uint64_t *data, *pdata;
-    int data_i, data_l;
-
-    dprintf("%s()\n", __func__);
-
-    if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL ||
-	    (crypt_off & 0x7) || (crypt_off + crypt_len > iovlen))) {
-	dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd "
-		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
-		"icv=%p ivp=%p\n", __func__, od, iov, iovlen,
-		auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	return -EINVAL;
-    }
-
-    IOV_INIT(iov, data, data_i, data_l);
-
-    CVMX_PREFETCH0(ivp);
-    CVMX_PREFETCH0(od->octo_enckey);
-
-    /* load AES Key */
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
-
-    if (od->octo_encklen == 16) {
-	CVMX_MT_AES_KEY(0x0, 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 24) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 32) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
-    } else {
-	dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen);
-	return -EINVAL;
-    }
-    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
-
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
-
-    while (crypt_off > 0) {
-	IOV_CONSUME(iov, data, data_i, data_l);
-	crypt_off -= 8;
-    }
-
-    while (crypt_len > 0) {
-	pdata = data;
-	CVMX_MT_AES_ENC_CBC0(*data);
-	IOV_CONSUME(iov, data, data_i, data_l);
-	CVMX_MT_AES_ENC_CBC1(*data);
-	CVMX_MF_AES_RESULT(*pdata, 0);
-	CVMX_MF_AES_RESULT(*data, 1);
-	IOV_CONSUME(iov, data, data_i, data_l);
-	crypt_len -= 16;
-    }
-
-    return 0;
-}
-
-int
-octo_aes_cbc_decrypt(
-    struct octo_sess *od,
-    struct iovec *iov, size_t iovcnt, size_t iovlen,
-    int auth_off, int auth_len,
-    int crypt_off, int crypt_len,
-    uint8_t *icv, uint8_t *ivp)
-{
-    uint64_t *data, *pdata;
-    int data_i, data_l;
-
-    dprintf("%s()\n", __func__);
-
-    if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL ||
-	    (crypt_off & 0x7) || (crypt_off + crypt_len > iovlen))) {
-	dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd "
-		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
-		"icv=%p ivp=%p\n", __func__, od, iov, iovlen,
-		auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	return -EINVAL;
-    }
-
-    IOV_INIT(iov, data, data_i, data_l);
-
-    CVMX_PREFETCH0(ivp);
-    CVMX_PREFETCH0(od->octo_enckey);
-
-    /* load AES Key */
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
-
-    if (od->octo_encklen == 16) {
-	CVMX_MT_AES_KEY(0x0, 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 24) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 32) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
-    } else {
-	dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen);
-	return -EINVAL;
-    }
-    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
-
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
-
-    while (crypt_off > 0) {
-	IOV_CONSUME(iov, data, data_i, data_l);
-	crypt_off -= 8;
-    }
-
-    while (crypt_len > 0) {
-	pdata = data;
-	CVMX_MT_AES_DEC_CBC0(*data);
-	IOV_CONSUME(iov, data, data_i, data_l);
-	CVMX_MT_AES_DEC_CBC1(*data);
-	CVMX_MF_AES_RESULT(*pdata, 0);
-	CVMX_MF_AES_RESULT(*data, 1);
-	IOV_CONSUME(iov, data, data_i, data_l);
-	crypt_len -= 16;
-    }
-
-    return 0;
-}
-
-/****************************************************************************/
-/* SHA1 */
-
-int
-octo_null_sha1_encrypt(
-    struct octo_sess *od,
-    struct iovec *iov, size_t iovcnt, size_t iovlen,
-    int auth_off, int auth_len,
-    int crypt_off, int crypt_len,
-    uint8_t *icv, uint8_t *ivp)
-{
-    int next = 0;
-    uint64_t *data;
-    uint64_t tmp1, tmp2, tmp3;
-    int data_i, data_l, alen = auth_len;
-
-    dprintf("%s()\n", __func__);
-
-    if (__predict_false(od == NULL || iov==NULL || iovlen==0 ||
-	    (auth_off & 0x7) || (auth_off + auth_len > iovlen))) {
-	dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd "
-		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
-		"icv=%p ivp=%p\n", __func__, od, iov, iovlen,
-		auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	return -EINVAL;
-    }
-
-    IOV_INIT(iov, data, data_i, data_l);
-
-    /* Load SHA1 IV */
-    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
-
-    while (auth_off > 0) {
-	IOV_CONSUME(iov, data, data_i, data_l);
-	auth_off -= 8;
-    }
-
-    while (auth_len > 0) {
-	CVM_LOAD_SHA_UNIT(*data, next);
-	auth_len -= 8;
-	IOV_CONSUME(iov, data, data_i, data_l);
-    }
-
-    /* finish the hash */
-    CVMX_PREFETCH0(od->octo_hmouter);
-#if 0
-    if (__predict_false(inplen)) {
-	uint64_t tmp = 0;
-	uint8_t *p = (uint8_t *) & tmp;
-	p[inplen] = 0x80;
-	do {
-	    inplen--;
-	    p[inplen] = ((uint8_t *) data)[inplen];
-	} while (inplen);
-	CVM_LOAD_MD5_UNIT(tmp, next);
-    } else {
-	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
-    }
-#else
-    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
-#endif
-
-    /* Finish Inner hash */
-    while (next != 7) {
-	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
-    }
-	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
-
-    /* Get the inner hash of HMAC */
-    CVMX_MF_HSH_IV(tmp1, 0);
-    CVMX_MF_HSH_IV(tmp2, 1);
-    tmp3 = 0;
-    CVMX_MF_HSH_IV(tmp3, 2);
-
-    /* Initialize hash unit */
-    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
-
-    CVMX_MT_HSH_DAT(tmp1, 0);
-    CVMX_MT_HSH_DAT(tmp2, 1);
-    tmp3 |= 0x0000000080000000;
-    CVMX_MT_HSH_DAT(tmp3, 2);
-    CVMX_MT_HSH_DATZ(3);
-    CVMX_MT_HSH_DATZ(4);
-    CVMX_MT_HSH_DATZ(5);
-    CVMX_MT_HSH_DATZ(6);
-    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
-
-    /* save the HMAC */
-    data = (uint64_t *)icv;
-    CVMX_MF_HSH_IV(*data, 0);
-    data++;
-    CVMX_MF_HSH_IV(tmp1, 1);
-    *(uint32_t *)data = (uint32_t) (tmp1 >> 32);
-
-    return 0;
-}
-
-/****************************************************************************/
-/* AES SHA1 */
-
-int
-octo_aes_cbc_sha1_encrypt(
-    struct octo_sess *od,
-    struct iovec *iov, size_t iovcnt, size_t iovlen,
-    int auth_off, int auth_len,
-    int crypt_off, int crypt_len,
-    uint8_t *icv, uint8_t *ivp)
-{
-    int next = 0;
-    union {
-	uint32_t data32[2];
-	uint64_t data64[1];
-    } mydata[2];
-    uint64_t *pdata = &mydata[0].data64[0];
-    uint64_t *data =  &mydata[1].data64[0];
-    uint32_t *data32;
-    uint64_t tmp1, tmp2, tmp3;
-    int data_i, data_l, alen = auth_len;
-
-    dprintf("%s()\n", __func__);
-
-    if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL ||
-	    (crypt_off & 0x3) || (crypt_off + crypt_len > iovlen) ||
-	    (crypt_len  & 0x7) ||
-	    (auth_len  & 0x7) ||
-	    (auth_off & 0x3) || (auth_off + auth_len > iovlen))) {
-	dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd "
-		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
-		"icv=%p ivp=%p\n", __func__, od, iov, iovlen,
-		auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	return -EINVAL;
-    }
-
-    IOV_INIT(iov, data32, data_i, data_l);
-
-    CVMX_PREFETCH0(ivp);
-    CVMX_PREFETCH0(od->octo_enckey);
-
-    /* load AES Key */
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
-
-    if (od->octo_encklen == 16) {
-	CVMX_MT_AES_KEY(0x0, 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 24) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 32) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
-    } else {
-	dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen);
-	return -EINVAL;
-    }
-    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
-
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
-
-    /* Load SHA IV */
-    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
-
-    while (crypt_off > 0 && auth_off > 0) {
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	crypt_off -= 4;
-	auth_off -= 4;
-    }
-
-    while (crypt_len > 0 || auth_len > 0) {
-    	uint32_t *pdata32[3];
-
-	pdata32[0] = data32;
-	mydata[0].data32[0] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	pdata32[1] = data32;
-	mydata[0].data32[1] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	pdata32[2] = data32;
-	mydata[1].data32[0] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	mydata[1].data32[1] = *data32;
-
-    	if (crypt_off <= 0) {
-	    if (crypt_len > 0) {
-		CVMX_MT_AES_ENC_CBC0(*pdata);
-		CVMX_MT_AES_ENC_CBC1(*data);
-		CVMX_MF_AES_RESULT(*pdata, 0);
-		CVMX_MF_AES_RESULT(*data, 1);
-		crypt_len -= 16;
-	    }
-	} else
-	    crypt_off -= 16;
-
-    	if (auth_off <= 0) {
-	    if (auth_len > 0) {
-		CVM_LOAD_SHA_UNIT(*pdata, next);
-		CVM_LOAD_SHA_UNIT(*data, next);
-		auth_len -= 16;
-	    }
-	} else
-	    auth_off -= 16;
-
-	*pdata32[0] = mydata[0].data32[0];
-	*pdata32[1] = mydata[0].data32[1];
-	*pdata32[2] = mydata[1].data32[0];
-	*data32     = mydata[1].data32[1];
-
-	IOV_CONSUME(iov, data32, data_i, data_l);
-    }
-
-    /* finish the hash */
-    CVMX_PREFETCH0(od->octo_hmouter);
-#if 0
-    if (__predict_false(inplen)) {
-	uint64_t tmp = 0;
-	uint8_t *p = (uint8_t *) & tmp;
-	p[inplen] = 0x80;
-	do {
-	    inplen--;
-	    p[inplen] = ((uint8_t *) data)[inplen];
-	} while (inplen);
-	CVM_LOAD_SHA_UNIT(tmp, next);
-    } else {
-	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
-    }
-#else
-    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
-#endif
-
-    /* Finish Inner hash */
-    while (next != 7) {
-	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
-    }
-	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
-
-    /* Get the inner hash of HMAC */
-    CVMX_MF_HSH_IV(tmp1, 0);
-    CVMX_MF_HSH_IV(tmp2, 1);
-    tmp3 = 0;
-    CVMX_MF_HSH_IV(tmp3, 2);
-
-    /* Initialize hash unit */
-    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
-
-    CVMX_MT_HSH_DAT(tmp1, 0);
-    CVMX_MT_HSH_DAT(tmp2, 1);
-    tmp3 |= 0x0000000080000000;
-    CVMX_MT_HSH_DAT(tmp3, 2);
-    CVMX_MT_HSH_DATZ(3);
-    CVMX_MT_HSH_DATZ(4);
-    CVMX_MT_HSH_DATZ(5);
-    CVMX_MT_HSH_DATZ(6);
-    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
-
-    /* finish the hash */
-    CVMX_PREFETCH0(od->octo_hmouter);
-#if 0
-    if (__predict_false(inplen)) {
-	uint64_t tmp = 0;
-	uint8_t *p = (uint8_t *) & tmp;
-	p[inplen] = 0x80;
-	do {
-	    inplen--;
-	    p[inplen] = ((uint8_t *) data)[inplen];
-	} while (inplen);
-	CVM_LOAD_MD5_UNIT(tmp, next);
-    } else {
-	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
-    }
-#else
-    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
-#endif
-
-    /* save the HMAC */
-    data32 = (uint32_t *)icv;
-    CVMX_MF_HSH_IV(tmp1, 0);
-    *data32 = (uint32_t) (tmp1 >> 32);
-    data32++;
-    *data32 = (uint32_t) tmp1;
-    data32++;
-    CVMX_MF_HSH_IV(tmp1, 1);
-    *data32 = (uint32_t) (tmp1 >> 32);
-
-    return 0;
-}
-
-int
-octo_aes_cbc_sha1_decrypt(
-    struct octo_sess *od,
-    struct iovec *iov, size_t iovcnt, size_t iovlen,
-    int auth_off, int auth_len,
-    int crypt_off, int crypt_len,
-    uint8_t *icv, uint8_t *ivp)
-{
-    int next = 0;
-    union {
-	uint32_t data32[2];
-	uint64_t data64[1];
-    } mydata[2];
-    uint64_t *pdata = &mydata[0].data64[0];
-    uint64_t *data =  &mydata[1].data64[0];
-    uint32_t *data32;
-    uint64_t tmp1, tmp2, tmp3;
-    int data_i, data_l, alen = auth_len;
-
-    dprintf("%s()\n", __func__);
-
-    if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL ||
-	    (crypt_off & 0x3) || (crypt_off + crypt_len > iovlen) ||
-	    (crypt_len  & 0x7) ||
-	    (auth_len  & 0x7) ||
-	    (auth_off & 0x3) || (auth_off + auth_len > iovlen))) {
-	dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd "
-		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
-		"icv=%p ivp=%p\n", __func__, od, iov, iovlen,
-		auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	return -EINVAL;
-    }
-
-    IOV_INIT(iov, data32, data_i, data_l);
-
-    CVMX_PREFETCH0(ivp);
-    CVMX_PREFETCH0(od->octo_enckey);
-
-    /* load AES Key */
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
-    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
-
-    if (od->octo_encklen == 16) {
-	CVMX_MT_AES_KEY(0x0, 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 24) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(0x0, 3);
-    } else if (od->octo_encklen == 32) {
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
-	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
-    } else {
-	dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen);
-	return -EINVAL;
-    }
-    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
-
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
-    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
-
-    /* Load MD5 IV */
-    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
-
-    while (crypt_off > 0 && auth_off > 0) {
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	crypt_off -= 4;
-	auth_off -= 4;
-    }
-
-    while (crypt_len > 0 || auth_len > 0) {
-    	uint32_t *pdata32[3];
-
-	pdata32[0] = data32;
-	mydata[0].data32[0] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	pdata32[1] = data32;
-	mydata[0].data32[1] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	pdata32[2] = data32;
-	mydata[1].data32[0] = *data32;
-	IOV_CONSUME(iov, data32, data_i, data_l);
-	mydata[1].data32[1] = *data32;
-
-    	if (auth_off <= 0) {
-	    if (auth_len > 0) {
-		CVM_LOAD_SHA_UNIT(*pdata, next);
-		CVM_LOAD_SHA_UNIT(*data, next);
-		auth_len -= 16;
-	    }
-	} else
-	    auth_off -= 16;
-
-    	if (crypt_off <= 0) {
-	    if (crypt_len > 0) {
-		CVMX_MT_AES_DEC_CBC0(*pdata);
-		CVMX_MT_AES_DEC_CBC1(*data);
-		CVMX_MF_AES_RESULT(*pdata, 0);
-		CVMX_MF_AES_RESULT(*data, 1);
-		crypt_len -= 16;
-	    }
-	} else
-	    crypt_off -= 16;
-
-	*pdata32[0] = mydata[0].data32[0];
-	*pdata32[1] = mydata[0].data32[1];
-	*pdata32[2] = mydata[1].data32[0];
-	*data32     = mydata[1].data32[1];
-
-	IOV_CONSUME(iov, data32, data_i, data_l);
-    }
-
-    /* finish the hash */
-    CVMX_PREFETCH0(od->octo_hmouter);
-#if 0
-    if (__predict_false(inplen)) {
-	uint64_t tmp = 0;
-	uint8_t *p = (uint8_t *) & tmp;
-	p[inplen] = 0x80;
-	do {
-	    inplen--;
-	    p[inplen] = ((uint8_t *) data)[inplen];
-	} while (inplen);
-	CVM_LOAD_SHA_UNIT(tmp, next);
-    } else {
-	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
-    }
-#else
-    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
-#endif
-
-    /* Finish Inner hash */
-    while (next != 7) {
-	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
-    }
-	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
-
-    /* Get the inner hash of HMAC */
-    CVMX_MF_HSH_IV(tmp1, 0);
-    CVMX_MF_HSH_IV(tmp2, 1);
-    tmp3 = 0;
-    CVMX_MF_HSH_IV(tmp3, 2);
-
-    /* Initialize hash unit */
-    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
-    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
-    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
-
-    CVMX_MT_HSH_DAT(tmp1, 0);
-    CVMX_MT_HSH_DAT(tmp2, 1);
-    tmp3 |= 0x0000000080000000;
-    CVMX_MT_HSH_DAT(tmp3, 2);
-    CVMX_MT_HSH_DATZ(3);
-    CVMX_MT_HSH_DATZ(4);
-    CVMX_MT_HSH_DATZ(5);
-    CVMX_MT_HSH_DATZ(6);
-    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
-
-    /* finish the hash */
-    CVMX_PREFETCH0(od->octo_hmouter);
-#if 0
-    if (__predict_false(inplen)) {
-	uint64_t tmp = 0;
-	uint8_t *p = (uint8_t *) & tmp;
-	p[inplen] = 0x80;
-	do {
-	    inplen--;
-	    p[inplen] = ((uint8_t *) data)[inplen];
-	} while (inplen);
-	CVM_LOAD_MD5_UNIT(tmp, next);
-    } else {
-	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
-    }
-#else
-    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
-#endif
-
-    /* save the HMAC */
-    data32 = (uint32_t *)icv;
-    CVMX_MF_HSH_IV(tmp1, 0);
-    *data32 = (uint32_t) (tmp1 >> 32);
-    data32++;
-    *data32 = (uint32_t) tmp1;
-    data32++;
-    CVMX_MF_HSH_IV(tmp1, 1);
-    *data32 = (uint32_t) (tmp1 >> 32);
-
-    return 0;
-}
-
-/****************************************************************************/
diff --git a/sys/mips/cavium/cryptocteon/cryptocteon.c b/sys/mips/cavium/cryptocteon/cryptocteon.c
deleted file mode 100644
index 446736eb3420..000000000000
--- a/sys/mips/cavium/cryptocteon/cryptocteon.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/*
- * Octeon Crypto for OCF
- *
- * Written by David McCullough <david_mccullough@securecomputing.com>
- * Copyright (C) 2009 David McCullough
- *
- * LICENSE TERMS
- *
- * The free distribution and use of this software in both source and binary
- * form is allowed (with or without changes) provided that:
- *
- *   1. distributions of this source code include the above copyright
- *      notice, this list of conditions and the following disclaimer;
- *
- *   2. distributions in binary form include the above copyright
- *      notice, this list of conditions and the following disclaimer
- *      in the documentation and/or other associated materials;
- *
- *   3. the copyright holder's name is not used to endorse products
- *      built using this software without specific written permission.
- *
- * DISCLAIMER
- *
- * This software is provided 'as is' with no explicit or implied warranties
- * in respect of its properties, including, but not limited to, correctness
- * and/or fitness for purpose.
- * ---------------------------------------------------------------------------
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/uio.h>
-
-#include <opencrypto/cryptodev.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-#include <mips/cavium/cryptocteon/cryptocteonvar.h>
-
-#include "cryptodev_if.h"
-
-struct cryptocteon_softc {
-	int32_t			sc_cid;		/* opencrypto id */
-};
-
-int cryptocteon_debug = 0;
-TUNABLE_INT("hw.cryptocteon.debug", &cryptocteon_debug);
-
-static void cryptocteon_identify(driver_t *, device_t);
-static int cryptocteon_probe(device_t);
-static int cryptocteon_attach(device_t);
-
-static int cryptocteon_process(device_t, struct cryptop *, int);
-static int cryptocteon_probesession(device_t,
-    const struct crypto_session_params *);
-static int cryptocteon_newsession(device_t, crypto_session_t,
-    const struct crypto_session_params *);
-
-static void
-cryptocteon_identify(driver_t *drv, device_t parent)
-{
-	if (octeon_has_feature(OCTEON_FEATURE_CRYPTO))
-		BUS_ADD_CHILD(parent, 0, "cryptocteon", 0);
-}
-
-static int
-cryptocteon_probe(device_t dev)
-{
-	device_set_desc(dev, "Octeon Secure Coprocessor");
-	return (0);
-}
-
-static int
-cryptocteon_attach(device_t dev)
-{
-	struct cryptocteon_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	sc->sc_cid = crypto_get_driverid(dev, sizeof(struct octo_sess),
-	    CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC |
-	    CRYPTOCAP_F_ACCEL_SOFTWARE);
-	if (sc->sc_cid < 0) {
-		device_printf(dev, "crypto_get_driverid ret %d\n", sc->sc_cid);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static bool
-cryptocteon_auth_supported(const struct crypto_session_params *csp)
-{
-	u_int hash_len;
-
-	switch (csp->csp_auth_alg) {
-	case CRYPTO_SHA1_HMAC:
-		hash_len = SHA1_HASH_LEN;
-		break;
-	default:
-		return (false);
-	}
-
-	if (csp->csp_auth_klen > hash_len)
-		return (false);
-	return (true);
-}
-
-static bool
-cryptocteon_cipher_supported(const struct crypto_session_params *csp)
-{
-
-	switch (csp->csp_cipher_alg) {
-	case CRYPTO_AES_CBC:
-		if (csp->csp_ivlen != 16)
-			return (false);
-		if (csp->csp_cipher_klen != 16 &&
-		    csp->csp_cipher_klen != 24 &&
-		    csp->csp_cipher_klen != 32)
-			return (false);
-		break;
-	default:
-		return (false);
-	}
-
-	return (true);
-}
-
-static int
-cryptocteon_probesession(device_t dev, const struct crypto_session_params *csp)
-{
-
-	if (csp->csp_flags != 0)
-		return (EINVAL);
-	switch (csp->csp_mode) {
-	case CSP_MODE_DIGEST:
-		if (!cryptocteon_auth_supported(csp))
-			return (EINVAL);
-		break;
-	case CSP_MODE_CIPHER:
-		if (!cryptocteon_cipher_supported(csp))
-			return (EINVAL);
-		break;
-	case CSP_MODE_ETA:
-		if (!cryptocteon_auth_supported(csp) ||
-		    !cryptocteon_cipher_supported(csp))
-			return (EINVAL);
-		break;
-	default:
-		return (EINVAL);
-	}
-	return (CRYPTODEV_PROBE_ACCEL_SOFTWARE);
-}
-
-static void
-cryptocteon_calc_hash(const struct crypto_session_params *csp, const char *key,
-    struct octo_sess *ocd)
-{
-	char hash_key[SHA1_HASH_LEN];
-
-	memset(hash_key, 0, sizeof(hash_key));
-	memcpy(hash_key, key, csp->csp_auth_klen);
-	octo_calc_hash(csp->csp_auth_alg == CRYPTO_SHA1_HMAC, hash_key,
-	    ocd->octo_hminner, ocd->octo_hmouter);
-}
-
-/* Generate a new octo session. */
-static int
-cryptocteon_newsession(device_t dev, crypto_session_t cses,
-    const struct crypto_session_params *csp)
-{
-	struct cryptocteon_softc *sc;
-	struct octo_sess *ocd;
-
-	sc = device_get_softc(dev);
-
-	ocd = crypto_get_driver_session(cses);
-
-	ocd->octo_encklen = csp->csp_cipher_klen;
-	if (csp->csp_cipher_key != NULL)
-		memcpy(ocd->octo_enckey, csp->csp_cipher_key,
-		    ocd->octo_encklen);
-
-	if (csp->csp_auth_key != NULL)
-		cryptocteon_calc_hash(csp, csp->csp_auth_key, ocd);
-
-	ocd->octo_mlen = csp->csp_auth_mlen;
-	if (csp->csp_auth_mlen == 0) {
-		switch (csp->csp_auth_alg) {
-		case CRYPTO_SHA1_HMAC:
-			ocd->octo_mlen = SHA1_HASH_LEN;
-			break;
-		}
-	}
-
-	switch (csp->csp_mode) {
-	case CSP_MODE_DIGEST:
-		switch (csp->csp_auth_alg) {
-		case CRYPTO_SHA1_HMAC:
-			ocd->octo_encrypt = octo_null_sha1_encrypt;
-			ocd->octo_decrypt = octo_null_sha1_encrypt;
-			break;
-		}
-		break;
-	case CSP_MODE_CIPHER:
-		switch (csp->csp_cipher_alg) {
-		case CRYPTO_AES_CBC:
-			ocd->octo_encrypt = octo_aes_cbc_encrypt;
-			ocd->octo_decrypt = octo_aes_cbc_decrypt;
-			break;
-		}
-		break;
-	case CSP_MODE_ETA:
-		switch (csp->csp_cipher_alg) {
-		case CRYPTO_AES_CBC:
-			switch (csp->csp_auth_alg) {
-			case CRYPTO_SHA1_HMAC:
-				ocd->octo_encrypt = octo_aes_cbc_sha1_encrypt;
-				ocd->octo_decrypt = octo_aes_cbc_sha1_decrypt;
-				break;
-			}
-			break;
-		}
-		break;
-	}
-
-	KASSERT(ocd->octo_encrypt != NULL && ocd->octo_decrypt != NULL,
-	    ("%s: missing function pointers", __func__));
-
-	return (0);
-}
-
-/*
- * Process a request.
- */
-static int
-cryptocteon_process(device_t dev, struct cryptop *crp, int hint)
-{
-	const struct crypto_session_params *csp;
-	struct octo_sess *od;
-	size_t iovcnt, iovlen;
-	struct mbuf *m = NULL;
-	struct uio *uiop = NULL;
-	unsigned char *ivp = NULL;
-	unsigned char iv_data[16];
-	unsigned char icv[SHA1_HASH_LEN], icv2[SHA1_HASH_LEN];
-	int auth_off, auth_len, crypt_off, crypt_len;
-	struct cryptocteon_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	crp->crp_etype = 0;
-
-	od = crypto_get_driver_session(crp->crp_session);
-	csp = crypto_get_params(crp->crp_session);
-
-	/*
-	 * The crypto routines assume that the regions to auth and
-	 * cipher are exactly 8 byte multiples and aligned on 8
-	 * byte logical boundaries within the iovecs.
-	 */
-	if (crp->crp_aad_length % 8 != 0 || crp->crp_payload_length % 8 != 0) {
-		crp->crp_etype = EFBIG;
-		goto done;
-	}
-
-	/*
-	 * As currently written, the crypto routines assume the AAD and
-	 * payload are adjacent.
-	 */
-	if (crp->crp_aad_length != 0 && crp->crp_payload_start !=
-	    crp->crp_aad_start + crp->crp_aad_length) {
-		crp->crp_etype = EFBIG;
-		goto done;
-	}
-
-	crypt_off = crp->crp_payload_start;
-	crypt_len = crp->crp_payload_length;
-	if (crp->crp_aad_length != 0) {
-		auth_off = crp->crp_aad_start;
-		auth_len = crp->crp_aad_length + crp->crp_payload_length;
-	} else {
-		auth_off = crypt_off;
-		auth_len = crypt_len;
-	}
-
-	/*
-	 * do some error checking outside of the loop for m and IOV processing
-	 * this leaves us with valid m or uiop pointers for later
-	 */
-	switch (crp->crp_buf.cb_type) {
-	case CRYPTO_BUF_MBUF:
-	{
-		unsigned frags;
-
-		m = crp->crp_buf.cb_mbuf;
-		for (frags = 0; m != NULL; frags++)
-			m = m->m_next;
-
-		if (frags >= UIO_MAXIOV) {
-			printf("%s,%d: %d frags > UIO_MAXIOV", __FILE__, __LINE__, frags);
-			crp->crp_etype = EFBIG;
-			goto done;
-		}
-
-		m = crp->crp_buf.cb_mbuf;
-		break;
-	}
-	case CRYPTO_BUF_UIO:
-		uiop = crp->crp_buf.cb_uio;
-		if (uiop->uio_iovcnt > UIO_MAXIOV) {
-			printf("%s,%d: %d uio_iovcnt > UIO_MAXIOV", __FILE__, __LINE__,
-			       uiop->uio_iovcnt);
-			crp->crp_etype = EFBIG;
-			goto done;
-		}
-		break;
-	default:
-		break;
-	}
-
-	if (csp->csp_cipher_alg != 0) {
-		if (crp->crp_flags & CRYPTO_F_IV_SEPARATE)
-			ivp = crp->crp_iv;
-		else {
-			crypto_copydata(crp, crp->crp_iv_start, csp->csp_ivlen,
-			    iv_data);
-			ivp = iv_data;
-		}
-	}
-
-	/*
-	 * setup the I/O vector to cover the buffer
-	 */
-	switch (crp->crp_buf.cb_type) {
-	case CRYPTO_BUF_MBUF:
-		iovcnt = 0;
-		iovlen = 0;
-
-		while (m != NULL) {
-			od->octo_iov[iovcnt].iov_base = mtod(m, void *);
-			od->octo_iov[iovcnt].iov_len = m->m_len;
-
-			m = m->m_next;
-			iovlen += od->octo_iov[iovcnt++].iov_len;
-		}
-		break;
-	case CRYPTO_BUF_UIO:
-		iovlen = 0;
-		for (iovcnt = 0; iovcnt < uiop->uio_iovcnt; iovcnt++) {
-			od->octo_iov[iovcnt].iov_base = uiop->uio_iov[iovcnt].iov_base;
-			od->octo_iov[iovcnt].iov_len = uiop->uio_iov[iovcnt].iov_len;
-
-			iovlen += od->octo_iov[iovcnt].iov_len;
-		}
-		break;
-	case CRYPTO_BUF_CONTIG:
-		iovlen = crp->crp_buf.cb_buf_len;
-		od->octo_iov[0].iov_base = crp->crp_buf.cb_buf;
-		od->octo_iov[0].iov_len = crp->crp_buf.cb_buf_len;
-		iovcnt = 1;
-		break;
-	default:
-		panic("can't happen");
-	}
-
-	/*
-	 * setup a new explicit key
-	 */
-	if (crp->crp_cipher_key != NULL)
-		memcpy(od->octo_enckey, crp->crp_cipher_key, od->octo_encklen);
-	if (crp->crp_auth_key != NULL)
-		cryptocteon_calc_hash(csp, crp->crp_auth_key, od);
-
-	if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op))
-		(*od->octo_encrypt)(od, od->octo_iov, iovcnt, iovlen,
-		    auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-	else
-		(*od->octo_decrypt)(od, od->octo_iov, iovcnt, iovlen,
-		    auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
-
-	if (csp->csp_auth_alg != 0) {
-		if (crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) {
-			crypto_copydata(crp, crp->crp_digest_start,
-			    od->octo_mlen, icv2);
-			if (timingsafe_bcmp(icv, icv2, od->octo_mlen) != 0)
-				crp->crp_etype = EBADMSG;
-		} else
-			crypto_copyback(crp, crp->crp_digest_start,
-			    od->octo_mlen, icv);
-	}
-done:
-	crypto_done(crp);
-	return (0);
-}
-
-static device_method_t cryptocteon_methods[] = {
-	/* device methods */
-	DEVMETHOD(device_identify,	cryptocteon_identify),
-	DEVMETHOD(device_probe,		cryptocteon_probe),
-	DEVMETHOD(device_attach,	cryptocteon_attach),
-
-	/* crypto device methods */
-	DEVMETHOD(cryptodev_probesession, cryptocteon_probesession),
-	DEVMETHOD(cryptodev_newsession,	cryptocteon_newsession),
-	DEVMETHOD(cryptodev_process,	cryptocteon_process),
-	{ 0, 0 }
-};
-
-static driver_t cryptocteon_driver = {
-	"cryptocteon",
-	cryptocteon_methods,
-	sizeof (struct cryptocteon_softc),
-};
-static devclass_t cryptocteon_devclass;
-DRIVER_MODULE(cryptocteon, nexus, cryptocteon_driver, cryptocteon_devclass, 0, 0);
diff --git a/sys/mips/cavium/cryptocteon/cryptocteonvar.h b/sys/mips/cavium/cryptocteon/cryptocteonvar.h
deleted file mode 100644
index 03a0c0141fc5..000000000000
--- a/sys/mips/cavium/cryptocteon/cryptocteonvar.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Octeon Crypto for OCF
- *
- * Written by David McCullough <david_mccullough@securecomputing.com>
- * Copyright (C) 2009 David McCullough
- *
- * LICENSE TERMS
- *
- * The free distribution and use of this software in both source and binary
- * form is allowed (with or without changes) provided that:
- *
- *   1. distributions of this source code include the above copyright
- *      notice, this list of conditions and the following disclaimer;
- *
- *   2. distributions in binary form include the above copyright
- *      notice, this list of conditions and the following disclaimer
- *      in the documentation and/or other associated materials;
- *
- *   3. the copyright holder's name is not used to endorse products
- *      built using this software without specific written permission.
- *
- * DISCLAIMER
- *
- * This software is provided 'as is' with no explicit or implied warranties
- * in respect of its properties, including, but not limited to, correctness
- * and/or fitness for purpose.
- * ---------------------------------------------------------------------------
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_
-#define	_MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_
-
-struct octo_sess;
-
-typedef	int octo_encrypt_t(struct octo_sess *od, struct iovec *iov, size_t iovcnt, size_t iovlen, int auth_off, int auth_len, int crypt_off, int crypt_len, uint8_t *icv, uint8_t *ivp);
-typedef	int octo_decrypt_t(struct octo_sess *od, struct iovec *iov, size_t iovcnt, size_t iovlen, int auth_off, int auth_len, int crypt_off, int crypt_len, uint8_t *icv, uint8_t *ivp);
-
-struct octo_sess {
-	#define MAX_CIPHER_KEYLEN	64
-	char				 octo_enckey[MAX_CIPHER_KEYLEN];
-	int					 octo_encklen;
-
-	int					 octo_mlen;
-
-	octo_encrypt_t				*octo_encrypt;
-	octo_decrypt_t				*octo_decrypt;
-
-	uint64_t			 octo_hminner[3];
-	uint64_t			 octo_hmouter[3];
-
-	struct iovec				octo_iov[UIO_MAXIOV];
-};
-
-#define	dprintf(fmt, ...)						\
-	do {								\
-		if (cryptocteon_debug)					\
-			printf("%s: " fmt, __func__, ## __VA_ARGS__);	\
-	} while (0)
-
-extern int cryptocteon_debug;
-
-void octo_calc_hash(uint8_t, unsigned char *, uint64_t *, uint64_t *);
-
-/* XXX Actually just hashing functions, not encryption.  */
-octo_encrypt_t octo_null_sha1_encrypt;
-
-octo_encrypt_t octo_aes_cbc_encrypt;
-octo_encrypt_t octo_aes_cbc_sha1_encrypt;
-
-octo_decrypt_t octo_aes_cbc_decrypt;
-octo_decrypt_t octo_aes_cbc_sha1_decrypt;
-
-#endif /* !_MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_ */
diff --git a/sys/mips/cavium/cvmx_config.h b/sys/mips/cavium/cvmx_config.h
deleted file mode 100644
index 33720c772baf..000000000000
--- a/sys/mips/cavium/cvmx_config.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/***********************license start***************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
- * reserved.
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *
- *     * Redistributions in binary form must reproduce the above
- *       copyright notice, this list of conditions and the following
- *       disclaimer in the documentation and/or other materials provided
- *       with the distribution.
- *
- *     * Neither the name of Cavium Networks nor the names of
- *       its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written
- *       permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION.  THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing@caviumnetworks.com
- *
- ***********************license end**************************************/
-/* $FreeBSD$ */
-
-#ifndef	_CVMX_CONFIG_H
-#define	_CVMX_CONFIG_H
-
-#include "opt_cvmx.h"
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/stdarg.h>
-
-#define	asm		__asm
-
-#define	CVMX_DONT_INCLUDE_CONFIG
-
-/* Define to enable the use of simple executive packet output functions.
-** For packet I/O setup enable the helper functions below. 
-*/ 
-#define CVMX_ENABLE_PKO_FUNCTIONS
-
-/* Define to enable the use of simple executive helper functions. These
-** include many hardware setup functions.  See cvmx-helper.[ch] for
-** details.
-*/
-#define CVMX_ENABLE_HELPER_FUNCTIONS
-
-/* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve before
-** the beginning of the packet. If necessary, override the default  
-** here.  See the IPD section of the hardware manual for MBUFF SKIP 
-** details.*/ 
-#define CVMX_HELPER_FIRST_MBUFF_SKIP 184
-
-/* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve in each
-** chained packet element. If necessary, override the default here */
-#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0
-
-/* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is enabled
-** for all input ports. This controls if IPD sends backpressure to all ports if
-** Octeon's FPA pools don't have enough packet or work queue entries. Even when
-** this is off, it is still possible to get backpressure from individual
-** hardware ports. When configuring backpressure, also check
-** CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override the default
-** here */
-#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1
-
-/* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper
-**  function. Once it is enabled the hardware starts accepting packets. You
-**  might want to skip the IPD enable if configuration changes are need
-**  from the default helper setup. If necessary, override the default here */
-#define CVMX_HELPER_ENABLE_IPD 1
-
-/* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns
-** to incoming packets. */
-#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED
-
-/* The following select which fields are used by the PIP to generate
-** the tag on INPUT
-** 0: don't include
-** 1: include */
-#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP	0
-#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP   	0
-#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 	0
-#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 	0
-#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 	0
-#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP	0
-#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP   	0
-#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 	0
-#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 	0
-#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL	0
-#define CVMX_HELPER_INPUT_TAG_INPUT_PORT	1
-
-/* Select skip mode for input ports */
-#define CVMX_HELPER_INPUT_PORT_SKIP_MODE	CVMX_PIP_PORT_CFG_MODE_SKIPL2
-
-/* Define the number of queues per output port */
-#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0	1
-#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1	1
-
-/* Configure PKO to use per-core queues (PKO lockless operation). 
-** Please see the related SDK documentation for PKO that illustrates 
-** how to enable and configure this option. */
-//#define CVMX_ENABLE_PKO_LOCKLESS_OPERATION 1
-//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 8
-//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 8
-
-/* Force backpressure to be disabled.  This overrides all other
-** backpressure configuration */
-#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 1
-
-/* Disable the SPI4000's processing of backpressure packets and backpressure
-** generation. When this is 1, the SPI4000 will not stop sending packets when
-** receiving backpressure. It will also not generate backpressure packets when
-** its internal FIFOs are full. */
-#define CVMX_HELPER_DISABLE_SPI4000_BACKPRESSURE 1
-
-/* CVMX_HELPER_SPI_TIMEOUT is used to determine how long the SPI initialization
-** routines wait for SPI training. You can override the value using
-** executive-config.h if necessary */
-#define CVMX_HELPER_SPI_TIMEOUT 10
-
-/* Select the number of low latency memory ports (interfaces) that
-** will be configured.  Valid values are 1 and 2.
-*/
-#define CVMX_LLM_CONFIG_NUM_PORTS 2
-
-/* Enable the fix for PKI-100 errata ("Size field is 8 too large in WQE and next
-** pointers"). If CVMX_ENABLE_LEN_M8_FIX is set to 0, the fix for this errata will 
-** not be enabled. 
-** 0: Fix is not enabled
-** 1: Fix is enabled, if supported by hardware
-*/
-#define CVMX_ENABLE_LEN_M8_FIX  1
-
-#if defined(CVMX_ENABLE_HELPER_FUNCTIONS) && !defined(CVMX_ENABLE_PKO_FUNCTIONS)
-#define CVMX_ENABLE_PKO_FUNCTIONS
-#endif
-
-/* Enable debug and informational printfs */
-#define CVMX_CONFIG_ENABLE_DEBUG_PRINTS 	1
-
-/************************* Config Specific Defines ************************/
-#define CVMX_LLM_NUM_PORTS 1
-#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1			/**< PKO queues per port for interface 0 (ports 0-15) */
-#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1			/**< PKO queues per port for interface 1 (ports 16-31) */
-#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 /**< Limit on the number of PKO ports enabled for interface 0 */
-#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 /**< Limit on the number of PKO ports enabled for interface 1 */
-#define CVMX_PKO_QUEUES_PER_PORT_PCI 1				/**< PKO queues per port for PCI (ports 32-35) */
-#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1				/**< PKO queues per port for Loop devices (ports 36-39) */
-
-/************************* FPA allocation *********************************/
-/* Pool sizes in bytes, must be multiple of a cache line */
-#define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
-#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)
-
-/* Pools in use */
-#define CVMX_FPA_PACKET_POOL                (0)             /**< Packet buffers */
-#define CVMX_FPA_PACKET_POOL_SIZE           CVMX_FPA_POOL_0_SIZE
-#define CVMX_FPA_WQE_POOL                   (1)             /**< Work queue entrys */
-#define CVMX_FPA_WQE_POOL_SIZE              CVMX_FPA_POOL_1_SIZE
-#define CVMX_FPA_OUTPUT_BUFFER_POOL         (2)             /**< PKO queue command buffers */
-#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE    CVMX_FPA_POOL_2_SIZE
-
-/*************************  FAU allocation ********************************/
-#define	CVMX_FAU_REG_END                    2048
-
-#define	CVMX_SCR_SCRATCH                    0
-
-#endif /* !_CVMX_CONFIG_H */
diff --git a/sys/mips/cavium/files.octeon1 b/sys/mips/cavium/files.octeon1
deleted file mode 100644
index adffb6a1481d..000000000000
--- a/sys/mips/cavium/files.octeon1
+++ /dev/null
@@ -1,99 +0,0 @@
-# $FreeBSD$
-# Octeon Support Files
-#
-mips/cavium/asm_octeon.S			optional smp
-mips/cavium/ciu.c				standard
-mips/cavium/obio.c				optional uart
-mips/cavium/octeon_ds1337.c			standard
-mips/cavium/octeon_ebt3000_cf.c			optional cf
-mips/cavium/octeon_machdep.c			standard
-mips/cavium/octeon_mp.c				optional smp
-mips/cavium/octeon_pmc.c			optional hwpmc
-mips/cavium/octeon_rtc.c			standard
-mips/cavium/uart_bus_octeonusart.c		optional uart
-mips/cavium/uart_cpu_octeonusart.c		optional uart
-mips/cavium/uart_dev_oct16550.c			optional uart
-mips/mips/intr_machdep.c			standard
-mips/mips/tick.c				standard
-
-mips/cavium/octeon_rnd.c			optional random
-mips/cavium/octeon_wdog.c			optional octeon_wdog
-mips/cavium/octeon_nmi.S			optional octeon_wdog
-
-mips/cavium/cryptocteon/cavium_crypto.c		optional cryptocteon
-mips/cavium/cryptocteon/cryptocteon.c		optional cryptocteon
-mips/mips/octeon_cop2_swtch.S			standard
-mips/mips/octeon_cop2.c				standard
-
-mips/cavium/if_octm.c				optional octm
-contrib/octeon-sdk/cvmx-mgmt-port.c		optional octm
-
-mips/cavium/octe/ethernet.c			optional octe
-mips/cavium/octe/ethernet-mv88e61xx.c		optional octe octeon_vendor_lanner
-mips/cavium/octe/ethernet-common.c		optional octe
-mips/cavium/octe/ethernet-mdio.c		optional octe
-mips/cavium/octe/ethernet-mem.c			optional octe
-mips/cavium/octe/ethernet-rgmii.c		optional octe
-mips/cavium/octe/ethernet-rx.c			optional octe
-mips/cavium/octe/ethernet-sgmii.c		optional octe
-mips/cavium/octe/ethernet-spi.c			optional octe
-mips/cavium/octe/ethernet-tx.c			optional octe
-mips/cavium/octe/ethernet-xaui.c		optional octe
-mips/cavium/octe/mv88e61xxphy.c			optional octe mv88e61xxphy
-mips/cavium/octe/octe.c				optional octe
-mips/cavium/octe/octebus.c			optional octe
-
-mips/cavium/octopci.c				optional pci
-mips/cavium/octopci_bus_space.c			optional pci
-mips/cavium/octeon_pci_console.c		optional pci
-contrib/octeon-sdk/octeon-pci-console.c		optional pci
-
-mips/cavium/usb/octusb.c			optional usb octusb
-mips/cavium/usb/octusb_octeon.c			optional usb octusb
-
-contrib/octeon-sdk/cvmx-usb.c			optional octusb
-
-mips/cavium/octeon_gpio.c			optional gpio
-
-# XXX Some files could be excluded in some configurations.  Making them
-#     optional but on in the default config would seem reasonable.
-contrib/octeon-sdk/cvmx-cmd-queue.c		standard
-contrib/octeon-sdk/cvmx-bootmem.c		standard
-contrib/octeon-sdk/cvmx-clock.c			standard
-contrib/octeon-sdk/cvmx-ebt3000.c		standard
-contrib/octeon-sdk/cvmx-fpa.c			standard
-contrib/octeon-sdk/cvmx-helper.c		standard
-contrib/octeon-sdk/cvmx-helper-cfg.c		standard
-contrib/octeon-sdk/cvmx-helper-board.c		standard
-contrib/octeon-sdk/cvmx-helper-cfg.c		standard
-contrib/octeon-sdk/cvmx-helper-errata.c		standard
-contrib/octeon-sdk/cvmx-helper-fpa.c		standard
-contrib/octeon-sdk/cvmx-helper-ilk.c		standard
-contrib/octeon-sdk/cvmx-helper-jtag.c		standard
-contrib/octeon-sdk/cvmx-helper-loop.c		standard
-contrib/octeon-sdk/cvmx-helper-npi.c		standard
-contrib/octeon-sdk/cvmx-helper-rgmii.c		standard
-contrib/octeon-sdk/cvmx-helper-sgmii.c		standard
-contrib/octeon-sdk/cvmx-helper-spi.c		standard
-contrib/octeon-sdk/cvmx-helper-srio.c		standard
-contrib/octeon-sdk/cvmx-helper-util.c		standard
-contrib/octeon-sdk/cvmx-helper-xaui.c		standard
-contrib/octeon-sdk/cvmx-ilk.c			standard
-contrib/octeon-sdk/cvmx-ipd.c			standard
-contrib/octeon-sdk/cvmx-l2c.c			standard
-contrib/octeon-sdk/cvmx-pcie.c			standard
-contrib/octeon-sdk/cvmx-pko.c			standard
-contrib/octeon-sdk/cvmx-qlm.c			standard
-contrib/octeon-sdk/cvmx-qlm-tables.c		standard
-contrib/octeon-sdk/cvmx-spi.c			standard
-contrib/octeon-sdk/cvmx-spi4000.c		standard
-contrib/octeon-sdk/cvmx-srio.c			standard
-contrib/octeon-sdk/cvmx-sysinfo.c		standard
-contrib/octeon-sdk/cvmx-thunder.c		standard
-contrib/octeon-sdk/cvmx-twsi.c			standard
-contrib/octeon-sdk/cvmx-warn.c			standard
-contrib/octeon-sdk/octeon-feature.c		standard
-contrib/octeon-sdk/octeon-model.c		standard
-
-# HWPMC 
-dev/hwpmc/hwpmc_octeon.c			optional hwpmc
diff --git a/sys/mips/cavium/if_octm.c b/sys/mips/cavium/if_octm.c
deleted file mode 100644
index f26596d83732..000000000000
--- a/sys/mips/cavium/if_octm.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010-2011 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Cavium Octeon management port Ethernet devices.
- */
-
-#include "opt_inet.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-
-#include <net/bpf.h>
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-#include <net/if_vlan_var.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-#endif
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-#include <contrib/octeon-sdk/cvmx-mgmt-port.h>
-
-struct octm_softc {
-	struct ifnet *sc_ifp;
-	device_t sc_dev;
-	unsigned sc_port;
-	int sc_flags;
-	struct ifmedia sc_ifmedia;
-	struct resource *sc_intr;
-	void *sc_intr_cookie;
-};
-
-static void	octm_identify(driver_t *, device_t);
-static int	octm_probe(device_t);
-static int	octm_attach(device_t);
-static int	octm_detach(device_t);
-static int	octm_shutdown(device_t);
-
-static void	octm_init(void *);
-static int	octm_transmit(struct ifnet *, struct mbuf *);
-
-static int	octm_medchange(struct ifnet *);
-static void	octm_medstat(struct ifnet *, struct ifmediareq *);
-
-static int	octm_ioctl(struct ifnet *, u_long, caddr_t);
-
-static void	octm_rx_intr(void *);
-
-static device_method_t octm_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify,	octm_identify),
-	DEVMETHOD(device_probe,		octm_probe),
-	DEVMETHOD(device_attach,	octm_attach),
-	DEVMETHOD(device_detach,	octm_detach),
-	DEVMETHOD(device_shutdown,	octm_shutdown),
-	{ 0, 0 }
-};
-
-static driver_t octm_driver = {
-	"octm",
-	octm_methods,
-	sizeof (struct octm_softc),
-};
-
-static devclass_t octm_devclass;
-
-DRIVER_MODULE(octm, ciu, octm_driver, octm_devclass, 0, 0);
-
-static void
-octm_identify(driver_t *drv, device_t parent)
-{
-	unsigned i;
-
-	if (!octeon_has_feature(OCTEON_FEATURE_MGMT_PORT))
-		return;
-
-	for (i = 0; i < CVMX_MGMT_PORT_NUM_PORTS; i++)
-		BUS_ADD_CHILD(parent, 0, "octm", i);
-}
-
-static int
-octm_probe(device_t dev)
-{
-	cvmx_mgmt_port_result_t result;
-
-	result = cvmx_mgmt_port_initialize(device_get_unit(dev));
-	switch (result) {
-	case CVMX_MGMT_PORT_SUCCESS:
-		break;
-	case CVMX_MGMT_PORT_NO_MEMORY:
-		return (ENOBUFS);
-	case CVMX_MGMT_PORT_INVALID_PARAM:
-		return (ENXIO);
-	case CVMX_MGMT_PORT_INIT_ERROR:
-		return (EIO);
-	}
-
-	device_set_desc(dev, "Cavium Octeon Management Ethernet");
-
-	return (0);
-}
-
-static int
-octm_attach(device_t dev)
-{
-	struct ifnet *ifp;
-	struct octm_softc *sc;
-	cvmx_mixx_irhwm_t mixx_irhwm;
-	cvmx_mixx_intena_t mixx_intena;
-	uint64_t mac;
-	int error;
-	int irq;
-	int rid;
-
-	sc = device_get_softc(dev);
-	sc->sc_dev = dev;
-	sc->sc_port = device_get_unit(dev);
-
-	switch (sc->sc_port) {
-	case 0:
-		irq = OCTEON_IRQ_MII;
-		break;
-	case 1:
-		irq = OCTEON_IRQ_MII1;
-		break;
-	default:
-		device_printf(dev, "unsupported management port %u.\n", sc->sc_port);
-		return (ENXIO);
-	}
-
-	/*
-	 * Set MAC address for this management port.
-	 */
-	mac = 0;
-	memcpy((u_int8_t *)&mac + 2, cvmx_sysinfo_get()->mac_addr_base, 6);
-	mac += sc->sc_port;
-
-	cvmx_mgmt_port_set_mac(sc->sc_port, mac);
-
-	/* No watermark for input ring.  */
-	mixx_irhwm.u64 = 0;
-	cvmx_write_csr(CVMX_MIXX_IRHWM(sc->sc_port), mixx_irhwm.u64);
-
-	/* Enable input ring interrupts.  */
-	mixx_intena.u64 = 0;
-	mixx_intena.s.ithena = 1;
-	cvmx_write_csr(CVMX_MIXX_INTENA(sc->sc_port), mixx_intena.u64);
-
-	/* Allocate and establish interrupt.  */
-	rid = 0;
-	sc->sc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid,
-	    irq, irq, 1, RF_ACTIVE);
-	if (sc->sc_intr == NULL) {
-		device_printf(dev, "unable to allocate IRQ.\n");
-		return (ENXIO);
-	}
-
-	error = bus_setup_intr(sc->sc_dev, sc->sc_intr, INTR_TYPE_NET, NULL,
-	    octm_rx_intr, sc, &sc->sc_intr_cookie);
-	if (error != 0) {
-		device_printf(dev, "unable to setup interrupt.\n");
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr);
-		return (ENXIO);
-	}
-
-	bus_describe_intr(sc->sc_dev, sc->sc_intr, sc->sc_intr_cookie, "rx");
-
-	/* XXX Possibly should enable TX interrupts.  */
-
-	ifp = if_alloc(IFT_ETHER);
-	if (ifp == NULL) {
-		device_printf(dev, "cannot allocate ifnet.\n");
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr);
-		return (ENOMEM);
-	}
-
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_mtu = ETHERMTU;
-	ifp->if_init = octm_init;
-	ifp->if_softc = sc;
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_ALLMULTI;
-	ifp->if_ioctl = octm_ioctl;
-
-	sc->sc_ifp = ifp;
-	sc->sc_flags = ifp->if_flags;
-
-	ifmedia_init(&sc->sc_ifmedia, 0, octm_medchange, octm_medstat);
-
-	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
-	ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO);
-
-	ether_ifattach(ifp, (const u_int8_t *)&mac + 2);
-
-	ifp->if_transmit = octm_transmit;
-
-	ifp->if_hdrlen = sizeof(struct ether_vlan_header);
-	ifp->if_capabilities = IFCAP_VLAN_MTU;
-	ifp->if_capenable = ifp->if_capabilities;
-
-	IFQ_SET_MAXLEN(&ifp->if_snd, CVMX_MGMT_PORT_NUM_TX_BUFFERS);
-	ifp->if_snd.ifq_drv_maxlen = CVMX_MGMT_PORT_NUM_TX_BUFFERS;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	return (bus_generic_attach(dev));
-}
-
-static int
-octm_detach(device_t dev)
-{
-	struct octm_softc *sc;
-	cvmx_mgmt_port_result_t result;
-
-	sc = device_get_softc(dev);
-
-	result = cvmx_mgmt_port_initialize(sc->sc_port);
-	switch (result) {
-	case CVMX_MGMT_PORT_SUCCESS:
-		break;
-	case CVMX_MGMT_PORT_NO_MEMORY:
-		return (ENOBUFS);
-	case CVMX_MGMT_PORT_INVALID_PARAM:
-		return (ENXIO);
-	case CVMX_MGMT_PORT_INIT_ERROR:
-		return (EIO);
-	}
-
-	bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr);
-	/* XXX Incomplete.  */
-
-	return (0);
-}
-
-static int
-octm_shutdown(device_t dev)
-{
-	return (octm_detach(dev));
-}
-
-static void
-octm_init(void *arg)
-{
-	struct ifnet *ifp;
-	struct octm_softc *sc;
-	cvmx_mgmt_port_netdevice_flags_t flags;
-	uint64_t mac;
-
-	sc = arg;
-	ifp = sc->sc_ifp;
-
-	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-		cvmx_mgmt_port_disable(sc->sc_port);
-
-		ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
-	}
-
-	/*
-	 * NB:
-	 * MAC must be set before allmulti and promisc below, as
-	 * cvmx_mgmt_port_set_mac will always enable the CAM, and turning on
-	 * promiscuous mode only works with the CAM disabled.
-	 */
-	mac = 0;
-	memcpy((u_int8_t *)&mac + 2, IF_LLADDR(ifp), 6);
-	cvmx_mgmt_port_set_mac(sc->sc_port, mac);
-
-	/*
-	 * This is done unconditionally, rather than only if sc_flags have
-	 * changed because of set_mac's effect on the CAM noted above.
-	 */
-	flags = 0;
-	if ((ifp->if_flags & IFF_ALLMULTI) != 0)
-		flags |= CVMX_IFF_ALLMULTI;
-	if ((ifp->if_flags & IFF_PROMISC) != 0)
-		flags |= CVMX_IFF_PROMISC;
-	cvmx_mgmt_port_set_multicast_list(sc->sc_port, flags);
-
-	/* XXX link state?  */
-
-	if ((ifp->if_flags & IFF_UP) != 0)
-		cvmx_mgmt_port_enable(sc->sc_port);
-
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-}
-
-static int
-octm_transmit(struct ifnet *ifp, struct mbuf *m)
-{
-	struct octm_softc *sc;
-	cvmx_mgmt_port_result_t result;
-
-	sc = ifp->if_softc;
-
-	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING) {
-		m_freem(m);
-		return (0);
-	}
-
-	result = cvmx_mgmt_port_sendm(sc->sc_port, m);
-
-	if (result == CVMX_MGMT_PORT_SUCCESS) {
-		ETHER_BPF_MTAP(ifp, m);
-
-		if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-		if_inc_counter(ifp, IFCOUNTER_OBYTES, m->m_pkthdr.len);
-	} else
-		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-
-	m_freem(m);
-
-	switch (result) {
-	case CVMX_MGMT_PORT_SUCCESS:
-		return (0);
-	case CVMX_MGMT_PORT_NO_MEMORY:
-		return (ENOBUFS);
-	case CVMX_MGMT_PORT_INVALID_PARAM:
-		return (ENXIO);
-	case CVMX_MGMT_PORT_INIT_ERROR:
-		return (EIO);
-	default:
-		return (EDOOFUS);
-	}
-}
-
-static int
-octm_medchange(struct ifnet *ifp)
-{
-	return (ENOTSUP);
-}
-
-static void
-octm_medstat(struct ifnet *ifp, struct ifmediareq *ifm)
-{
-	struct octm_softc *sc;
-	cvmx_helper_link_info_t link_info;
-
-	sc = ifp->if_softc;
-
-	ifm->ifm_status = IFM_AVALID;
-	ifm->ifm_active = IFT_ETHER;
-
-	link_info = cvmx_mgmt_port_link_get(sc->sc_port);
-	if (!link_info.s.link_up)
-		return;
-
-	ifm->ifm_status |= IFM_ACTIVE;
-
-	switch (link_info.s.speed) {
-	case 10:
-		ifm->ifm_active |= IFM_10_T;
-		break;
-	case 100:
-		ifm->ifm_active |= IFM_100_TX;
-		break;
-	case 1000:
-		ifm->ifm_active |= IFM_1000_T;
-		break;
-	case 10000:
-		ifm->ifm_active |= IFM_10G_T;
-		break;
-	}
-
-	if (link_info.s.full_duplex)
-		ifm->ifm_active |= IFM_FDX;
-	else
-		ifm->ifm_active |= IFM_HDX;
-}
-
-static int
-octm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
-	struct octm_softc *sc;
-	struct ifreq *ifr;
-#ifdef INET
-	struct ifaddr *ifa;
-#endif
-	int error;
-
-	sc = ifp->if_softc;
-	ifr = (struct ifreq *)data;
-#ifdef INET
-	ifa = (struct ifaddr *)data;
-#endif
-
-	switch (cmd) {
-	case SIOCSIFADDR:
-#ifdef INET
-		/*
-		 * Avoid reinitialization unless it's necessary.
-		 */
-		if (ifa->ifa_addr->sa_family == AF_INET) {
-			ifp->if_flags |= IFF_UP;
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
-				octm_init(sc);
-			arp_ifinit(ifp, ifa);
-
-			return (0);
-		}
-#endif
-		error = ether_ioctl(ifp, cmd, data);
-		if (error != 0)
-			return (error);
-		return (0);
-
-	case SIOCSIFFLAGS:
-		if (ifp->if_flags == sc->sc_flags)
-			return (0);
-		if ((ifp->if_flags & IFF_UP) != 0) {
-			octm_init(sc);
-		} else {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
-				cvmx_mgmt_port_disable(sc->sc_port);
-
-				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
-			}
-		}
-		sc->sc_flags = ifp->if_flags;
-		return (0);
-
-	case SIOCSIFCAP:
-		/*
-		 * Just change the capabilities in software, currently none
-		 * require reprogramming hardware, they just toggle whether we
-		 * make use of already-present facilities in software.
-		 */
-		ifp->if_capenable = ifr->ifr_reqcap;
-		return (0);
-
-	case SIOCSIFMTU:
-		cvmx_mgmt_port_set_max_packet_size(sc->sc_port, ifr->ifr_mtu + ifp->if_hdrlen);
-		return (0);
-
-	case SIOCSIFMEDIA:
-	case SIOCGIFMEDIA:
-		error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, cmd);
-		if (error != 0)
-			return (error);
-		return (0);
-
-	default:
-		error = ether_ioctl(ifp, cmd, data);
-		if (error != 0)
-			return (error);
-		return (0);
-	}
-}
-
-static void
-octm_rx_intr(void *arg)
-{
-	struct octm_softc *sc = arg;
-	cvmx_mixx_isr_t mixx_isr;
-	int len;
-
-	mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(sc->sc_port));
-	if (!mixx_isr.s.irthresh) {
-		device_printf(sc->sc_dev, "stray interrupt.\n");
-		return;
-	}
-
-	for (;;) {
-		struct mbuf *m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-		if (m == NULL) {
-			device_printf(sc->sc_dev, "no memory for receive mbuf.\n");
-			return;
-		}
-
-		len = cvmx_mgmt_port_receive(sc->sc_port, MCLBYTES, m->m_data);
-		if (len > 0) {
-			m->m_pkthdr.rcvif = sc->sc_ifp;
-			m->m_pkthdr.len = m->m_len = len;
-
-			if_inc_counter(sc->sc_ifp, IFCOUNTER_IPACKETS, 1);
-
-			(*sc->sc_ifp->if_input)(sc->sc_ifp, m);
-
-			continue;
-		}
-
-		m_freem(m);
-
-		if (len == 0)
-			break;
-
-		if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1);
-	}
-
-	/* Acknowledge interrupts.  */
-	cvmx_write_csr(CVMX_MIXX_ISR(sc->sc_port), mixx_isr.u64);
-	cvmx_read_csr(CVMX_MIXX_ISR(sc->sc_port));
-}
diff --git a/sys/mips/cavium/obio.c b/sys/mips/cavium/obio.c
deleted file mode 100644
index 7975d90cf6d3..000000000000
--- a/sys/mips/cavium/obio.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/*	$NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * On-board device autoconfiguration support for Cavium OCTEON 1 family of
- * SoC devices.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-#include <mips/cavium/obiovar.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-
-extern struct bus_space octeon_uart_tag;
-
-static void	obio_identify(driver_t *, device_t);
-static int	obio_probe(device_t);
-static int	obio_attach(device_t);
-
-static void
-obio_identify(driver_t *drv, device_t parent)
-{
-	BUS_ADD_CHILD(parent, 0, "obio", 0);
-}
-
-static int
-obio_probe(device_t dev)
-{
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-	return (0);
-}
-
-static int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-
-	sc->oba_st = mips_bus_space_generic;
-	/*
-	 * XXX
-	 * Here and elsewhere using RBR as a base address because it kind of
-	 * is, but that feels pretty sloppy.  Should consider adding a define
-	 * that's more semantic, at least.
-	 */
-	sc->oba_addr = CVMX_MIO_UARTX_RBR(0);
-	sc->oba_size = 0x10000;
-	sc->oba_rman.rm_type = RMAN_ARRAY;
-	sc->oba_rman.rm_descr = "OBIO I/O";
-	if (rman_init(&sc->oba_rman) != 0 ||
-	    rman_manage_region(&sc->oba_rman,
-	    sc->oba_addr, sc->oba_addr + sc->oba_size) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-
-	/* 
-	 * This module is intended for UART purposes only and
-	 * manages IRQs for UART0 and UART1.
-	 */
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, OCTEON_IRQ_UART0, OCTEON_IRQ_UART1) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	device_add_child(dev, "uart", 1);  /* Setup Uart-1 first. */
-	device_add_child(dev, "uart", 0);  /* Uart-0 next. So it is first in console list */
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct resource *rv;
-	struct rman *rm;
-	bus_space_tag_t bt = 0;
-	bus_space_handle_t bh = 0;
-	struct obio_softc *sc = device_get_softc(bus);
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		switch (device_get_unit(child)) {
-		case 0:
-			start = end = OCTEON_IRQ_UART0;
-			break;
-		case 1:
-			start = end = OCTEON_IRQ_UART1;
-			break;
-		default:
-			return (NULL);
-		}
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		return (NULL);
-	case SYS_RES_IOPORT:
-		rm = &sc->oba_rman;
-		bt = &octeon_uart_tag;
-		bh = CVMX_MIO_UARTX_RBR(device_get_unit(child));
-		start = bh;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL)  {
-		return (NULL);
-        }
-	if (type == SYS_RES_IRQ) {
-		return (rv);
-        }
-	rman_set_rid(rv, *rid);
-	rman_set_bustag(rv, bt);
-	rman_set_bushandle(rv, bh);
-
-	if (0) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-	return (rv);
-
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	return (0);
-}
-static device_method_t obio_methods[] = {
-	/* Device methods */
-	DEVMETHOD(device_identify,	obio_identify),
-	DEVMETHOD(device_probe,		obio_probe),
-	DEVMETHOD(device_attach,	obio_attach),
-
-	/* Bus methods */
-	DEVMETHOD(bus_alloc_resource,	obio_alloc_resource),
-	DEVMETHOD(bus_activate_resource,obio_activate_resource),
-	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
-
-	DEVMETHOD(bus_add_child,	bus_generic_add_child),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, ciu, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/cavium/obiovar.h b/sys/mips/cavium/obiovar.h
deleted file mode 100644
index 3cccf59d92eb..000000000000
--- a/sys/mips/cavium/obiovar.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _OCTEON_OBIOVAR_H_
-#define	_OCTEON_OBIOVAR_H_
-
-#include <sys/rman.h>
-
-struct obio_softc {
-	bus_space_tag_t oba_st;		/* bus space tag */
-	bus_addr_t oba_addr;		/* address of device */
-	bus_size_t oba_size;		/* size of device */
-	struct rman oba_rman;
-	struct rman oba_irq_rman;
-
-};
-
-#endif /* _OCTEON_OBIOVAR_H_ */
diff --git a/sys/mips/cavium/octe/cavium-ethernet.h b/sys/mips/cavium/octe/cavium-ethernet.h
deleted file mode 100644
index 7d9fe3f10849..000000000000
--- a/sys/mips/cavium/octe/cavium-ethernet.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-/**
- * @file
- * External interface for the Cavium Octeon ethernet driver.
- *
- * $Id: cavium-ethernet.h 41589 2009-03-19 19:58:58Z cchavva $
- *
- */
-#ifndef CAVIUM_ETHERNET_H
-#define CAVIUM_ETHERNET_H
-
-#include <sys/taskqueue.h>
-#include <net/if_media.h>
-#include <net/ifq.h>
-
-/**
- * This is the definition of the Ethernet driver's private
- * driver state stored in ifp->if_softc.
- */
-typedef struct {
-	/* XXX FreeBSD device softcs must start with an ifnet pointer.  */
-	struct ifnet *ifp;
-
-	int                     port;           /* PKO hardware output port */
-	int                     queue;          /* PKO hardware queue for the port */
-	int                     fau;            /* Hardware fetch and add to count outstanding tx buffers */
-	int                     imode;          /* Type of port. This is one of the enums in cvmx_helper_interface_mode_t */
-#if 0
-	struct ifnet_stats stats;          /* Device statistics */
-#endif
-	uint64_t                link_info;      /* Last negotiated link state */
-	void (*poll)(struct ifnet *ifp);   /* Called periodically to check link status */
-
-	/*
-	 * FreeBSD additions.
-	 */
-	device_t dev;
-	device_t miibus;
-
-	int (*open)(struct ifnet *ifp);
-	int (*stop)(struct ifnet *ifp);
-
-	int (*init)(struct ifnet *ifp);
-	void (*uninit)(struct ifnet *ifp);
-
-	uint8_t mac[6];
-	int phy_id;
-	const char *phy_device;
-	int (*mdio_read)(struct ifnet *, int, int);
-	void (*mdio_write)(struct ifnet *, int, int, int);
-
-	struct ifqueue tx_free_queue[16];
-
-	int need_link_update;
-	struct task link_task;
-	struct ifmedia media;
-	int if_flags;
-
-	struct mtx tx_mtx;
-} cvm_oct_private_t;
-
-/**
- * Free a work queue entry received in a intercept callback.
- *
- * @param work_queue_entry
- *               Work queue entry to free
- * @return Zero on success, Negative on failure.
- */
-int cvm_oct_free_work(void *work_queue_entry);
-
-#endif
diff --git a/sys/mips/cavium/octe/ethernet-common.c b/sys/mips/cavium/octe/ethernet-common.c
deleted file mode 100644
index 41e122a0f84e..000000000000
--- a/sys/mips/cavium/octe/ethernet-common.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-static uint64_t cvm_oct_mac_addr = 0;
-static uint32_t cvm_oct_mac_addr_offset = 0;
-
-/**
- * Set the multicast list. Currently unimplemented.
- *
- * @param dev    Device to work on
- */
-void cvm_oct_common_set_multicast_list(struct ifnet *ifp)
-{
-	cvmx_gmxx_prtx_cfg_t gmx_cfg;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int interface = INTERFACE(priv->port);
-	int index = INDEX(priv->port);
-
-	if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
-		cvmx_gmxx_rxx_adr_ctl_t control;
-		control.u64 = 0;
-		control.s.bcst = 1;     /* Allow broadcast MAC addresses */
-
-		if (/*ifp->mc_list || */(ifp->if_flags&IFF_ALLMULTI) ||
-		    (ifp->if_flags & IFF_PROMISC))
-			control.s.mcst = 2; /* Force accept multicast packets */
-		else
-			control.s.mcst = 1; /* Force reject multicat packets */
-
-		if (ifp->if_flags & IFF_PROMISC)
-			control.s.cam_mode = 0; /* Reject matches if promisc. Since CAM is shut off, should accept everything */
-		else
-			control.s.cam_mode = 1; /* Filter packets based on the CAM */
-
-		gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
-		cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
-
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), control.u64);
-		if (ifp->if_flags&IFF_PROMISC)
-			cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 0);
-		else
-			cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 1);
-
-		cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-	}
-}
-
-/**
- * Assign a MAC addres from the pool of available MAC addresses
- * Can return as either a 64-bit value and/or 6 octets.
- *
- * @param macp    Filled in with the assigned address if non-NULL
- * @param octets  Filled in with the assigned address if non-NULL
- * @return Zero on success
- */
-int cvm_assign_mac_address(uint64_t *macp, uint8_t *octets)
-{
-	/* Initialize from global MAC address base; fail if not set */
-	if (cvm_oct_mac_addr == 0) {
-		memcpy((uint8_t *)&cvm_oct_mac_addr + 2,
-		    cvmx_sysinfo_get()->mac_addr_base, 6);
-
-		if (cvm_oct_mac_addr == 0)
-			return ENXIO;
-
-		cvm_oct_mac_addr_offset = cvmx_mgmt_port_num_ports();
-		cvm_oct_mac_addr += cvm_oct_mac_addr_offset;
-	}
-
-	if (cvm_oct_mac_addr_offset >= cvmx_sysinfo_get()->mac_addr_count)
-		return ENXIO;	    /* Out of addresses to assign */
-
-	if (macp)
-		*macp = cvm_oct_mac_addr;
-	if (octets)
-		memcpy(octets, (u_int8_t *)&cvm_oct_mac_addr + 2, 6);
-
-	cvm_oct_mac_addr++;
-	cvm_oct_mac_addr_offset++;
-
-	return 0;
-}
-
-/**
- * Set the hardware MAC address for a device
- *
- * @param dev    Device to change the MAC address for
- * @param addr   Address structure to change it too.
- */
-void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *addr)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	cvmx_gmxx_prtx_cfg_t gmx_cfg;
-	int interface = INTERFACE(priv->port);
-	int index = INDEX(priv->port);
-
-	memcpy(priv->mac, addr, 6);
-
-	if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
-		int i;
-		const uint8_t *ptr = addr;
-		uint64_t mac = 0;
-		for (i = 0; i < 6; i++)
-			mac = (mac<<8) | (uint64_t)(ptr[i]);
-
-		gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
-		cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
-
-		cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), ptr[0]);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), ptr[1]);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), ptr[2]);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), ptr[3]);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), ptr[4]);
-		cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), ptr[5]);
-		cvm_oct_common_set_multicast_list(ifp);
-		cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-	}
-}
-
-/**
- * Change the link MTU. Unimplemented
- *
- * @param dev     Device to change
- * @param new_mtu The new MTU
- * @return Zero on success
- */
-int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int interface = INTERFACE(priv->port);
-	int index = INDEX(priv->port);
-	int vlan_bytes = 4;
-
-	/* Limit the MTU to make sure the ethernet packets are between 64 bytes
-	   and 65535 bytes */
-	if ((new_mtu + 14 + 4 + vlan_bytes < 64) || (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
-		printf("MTU must be between %d and %d.\n", 64-14-4-vlan_bytes, 65392-14-4-vlan_bytes);
-		return -EINVAL;
-	}
-	ifp->if_mtu = new_mtu;
-
-	if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
-		int max_packet = new_mtu + 14 + 4 + vlan_bytes; /* Add ethernet header and FCS, and VLAN if configured. */
-
-		if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) {
-			/* Signal errors on packets larger than the MTU */
-			cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), max_packet);
-		} else {
-			/* Set the hardware to truncate packets larger than the MTU and
-				smaller the 64 bytes */
-			cvmx_pip_frm_len_chkx_t frm_len_chk;
-			frm_len_chk.u64 = 0;
-			frm_len_chk.s.minlen = 64;
-			frm_len_chk.s.maxlen = max_packet;
-			cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), frm_len_chk.u64);
-		}
-		/* Set the hardware to truncate packets larger than the MTU. The
-		   jabber register must be set to a multiple of 8 bytes, so round up */
-		cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), (max_packet + 7) & ~7u);
-	}
-	return 0;
-}
-
-/**
- * Enable port.
- */
-int cvm_oct_common_open(struct ifnet *ifp)
-{
-	cvmx_gmxx_prtx_cfg_t gmx_cfg;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int interface = INTERFACE(priv->port);
-	int index = INDEX(priv->port);
-	cvmx_helper_link_info_t link_info;
-
-	gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
-	gmx_cfg.s.en = 1;
-	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-
-	/*
-	 * Set the link state unless we are using MII.
-	 */
-        if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM && priv->miibus == NULL) {
-             link_info = cvmx_helper_link_get(priv->port);
-             if (!link_info.s.link_up)  
-		if_link_state_change(ifp, LINK_STATE_DOWN);
-	     else
-		if_link_state_change(ifp, LINK_STATE_UP);
-        }
-
-	return 0;
-}
-
-/**
- * Disable port.
- */
-int cvm_oct_common_stop(struct ifnet *ifp)
-{
-	cvmx_gmxx_prtx_cfg_t gmx_cfg;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int interface = INTERFACE(priv->port);
-	int index = INDEX(priv->port);
-
-	gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
-	gmx_cfg.s.en = 0;
-	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-	return 0;
-}
-
-/**
- * Poll for link status change.
- */
-void cvm_oct_common_poll(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	cvmx_helper_link_info_t link_info;
-
-	/*
-	 * If this is a simulation, do nothing.
-	 */
-	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
-		return;
-
-	/*
-	 * If there is a device-specific poll method, use it.
-	 */
-	if (priv->poll != NULL) {
-		priv->poll(ifp);
-		return;
-	}
-
-	/*
-	 * If an MII bus is attached, don't use the Simple Executive's link
-	 * state routines.
-	 */
-	if (priv->miibus != NULL)
-		return;
-
-	/*
-	 * Use the Simple Executive's link state routines.
-	 */
-	link_info = cvmx_helper_link_get(priv->port);
-	if (link_info.u64 == priv->link_info)
-		return;
-
-	link_info = cvmx_helper_link_autoconf(priv->port);
-	priv->link_info = link_info.u64;
-	priv->need_link_update = 1;
-}
-
-/**
- * Per network device initialization
- *
- * @param dev    Device to initialize
- * @return Zero on success
- */
-int cvm_oct_common_init(struct ifnet *ifp)
-{
-	uint8_t mac[6];
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	if (cvm_assign_mac_address(NULL, mac) != 0)
-		return ENXIO;
-
-	ifp->if_mtu = ETHERMTU;
-
-	cvm_oct_mdio_setup_device(ifp);
-
-	cvm_oct_common_set_mac_address(ifp, mac);
-	cvm_oct_common_change_mtu(ifp, ifp->if_mtu);
-
-	/*
-	 * Do any last-minute board-specific initialization.
-	 */
-	switch (cvmx_sysinfo_get()->board_type) {
-#if defined(OCTEON_VENDOR_LANNER)
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR321X:
-		if (priv->phy_id == 16)
-			cvm_oct_mv88e61xx_setup_device(ifp);
-		break;
-#endif
-	default:
-		break;
-	}
-
-	device_attach(priv->dev);
-
-	return 0;
-}
-
-void cvm_oct_common_uninit(struct ifnet *ifp)
-{
-    /* Currently nothing to do */
-}
diff --git a/sys/mips/cavium/octe/ethernet-common.h b/sys/mips/cavium/octe/ethernet-common.h
deleted file mode 100644
index d7a8d298a6db..000000000000
--- a/sys/mips/cavium/octe/ethernet-common.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-int cvm_oct_common_open(struct ifnet *ifp);
-int cvm_oct_common_stop(struct ifnet *ifp);
-void cvm_oct_common_poll(struct ifnet *ifp);
-int cvm_oct_common_init(struct ifnet *ifp);
-void cvm_oct_common_uninit(struct ifnet *ifp);
-
-int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu);
-void cvm_oct_common_set_multicast_list(struct ifnet *ifp);
-void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *);
-int cvm_assign_mac_address(uint64_t *, uint8_t *);
-
-int cvm_oct_init_module(device_t);
-void cvm_oct_cleanup_module(device_t);
-
-/*
- * XXX/juli
- * These belong elsewhere but we can't stomach the nested extern.
- */
-int cvm_oct_rgmii_init(struct ifnet *ifp);
-void cvm_oct_rgmii_uninit(struct ifnet *ifp);
-int cvm_oct_sgmii_init(struct ifnet *ifp);
-int cvm_oct_spi_init(struct ifnet *ifp);
-void cvm_oct_spi_uninit(struct ifnet *ifp);
-int cvm_oct_xaui_init(struct ifnet *ifp);
diff --git a/sys/mips/cavium/octe/ethernet-defines.h b/sys/mips/cavium/octe/ethernet-defines.h
deleted file mode 100644
index ba3140661f3e..000000000000
--- a/sys/mips/cavium/octe/ethernet-defines.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-/*
- * A few defines are used to control the operation of this driver:
- *  CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
- *      This kernel config option allows the user to control the number of
- *      packet and work queue buffers allocated by the driver. If this is zero,
- *      the driver uses the default from below.
- */
-
-#define INTERRUPT_LIMIT             1000   /* Max interrupts per second per core */
-/*#define INTERRUPT_LIMIT             0     *//* Don't limit the number of interrupts */
-#define USE_RED                     1	/* Enable Random Early Dropping under load */
-#define USE_10MBPS_PREAMBLE_WORKAROUND 1    /* Allow SW based preamble removal at 10Mbps to workaround PHYs giving us bad preambles */
-#define DONT_WRITEBACK(x)           (x) /* Use this to have all FPA frees also tell the L2 not to write data to memory */
-/*#define DONT_WRITEBACK(x)         0   *//* Use this to not have FPA frees control L2 */
-
-#define MAX_RX_PACKETS 1024 /* Maximum number of packets to process per interrupt. */
-#define MAX_OUT_QUEUE_DEPTH 1000
-
-#define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - sizeof(uint32_t))
-#define TOTAL_NUMBER_OF_PORTS       (CVMX_PIP_NUM_INPUT_PORTS+1)
diff --git a/sys/mips/cavium/octe/ethernet-headers.h b/sys/mips/cavium/octe/ethernet-headers.h
deleted file mode 100644
index 51386209b5aa..000000000000
--- a/sys/mips/cavium/octe/ethernet-headers.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-#ifndef __ETHERNET_HEADERS_H__
-#define __ETHERNET_HEADERS_H__
-
-#include "cavium-ethernet.h"
-#include "ethernet-common.h"
-#include "ethernet-defines.h"
-#include "ethernet-mdio.h"
-#include "ethernet-mem.h"
-#include "ethernet-rx.h"
-#include "ethernet-tx.h"
-#include "ethernet-util.h"
-
-/*
- * Any board- or vendor-specific includes.
- */
-#ifdef OCTEON_VENDOR_LANNER
-#include "ethernet-mv88e61xx.h"
-#endif
-
-#endif
diff --git a/sys/mips/cavium/octe/ethernet-mdio.c b/sys/mips/cavium/octe/ethernet-mdio.c
deleted file mode 100644
index 68c72fe51ac5..000000000000
--- a/sys/mips/cavium/octe/ethernet-mdio.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-struct mtx cvm_oct_mdio_mtx;
-MTX_SYSINIT(cvm_oct_mdio, &cvm_oct_mdio_mtx, "MDIO", MTX_DEF);
-
-/**
- * Perform an MII read. Called by the generic MII routines
- *
- * @param dev      Device to perform read for
- * @param phy_id   The MII phy id
- * @param location Register location to read
- * @return Result from the read or zero on failure
- */
-int cvm_oct_mdio_read(struct ifnet *ifp, int phy_id, int location)
-{
-	cvmx_smi_cmd_t          smi_cmd;
-	cvmx_smi_rd_dat_t       smi_rd;
-
-	MDIO_LOCK();
-	smi_cmd.u64 = 0;
-	smi_cmd.s.phy_op = 1;
-	smi_cmd.s.phy_adr = phy_id;
-	smi_cmd.s.reg_adr = location;
-	cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
-
-	do {
-		cvmx_wait(1000);
-		smi_rd.u64 = cvmx_read_csr(CVMX_SMI_RD_DAT);
-	} while (smi_rd.s.pending);
-
-	MDIO_UNLOCK();
-
-	if (smi_rd.s.val)
-		return smi_rd.s.dat;
-	else
-		return 0;
-}
-
-/**
- * Perform an MII write. Called by the generic MII routines
- *
- * @param dev      Device to perform write for
- * @param phy_id   The MII phy id
- * @param location Register location to write
- * @param val      Value to write
- */
-void cvm_oct_mdio_write(struct ifnet *ifp, int phy_id, int location, int val)
-{
-	cvmx_smi_cmd_t          smi_cmd;
-	cvmx_smi_wr_dat_t       smi_wr;
-
-	MDIO_LOCK();
-	smi_wr.u64 = 0;
-	smi_wr.s.dat = val;
-	cvmx_write_csr(CVMX_SMI_WR_DAT, smi_wr.u64);
-
-	smi_cmd.u64 = 0;
-	smi_cmd.s.phy_op = 0;
-	smi_cmd.s.phy_adr = phy_id;
-	smi_cmd.s.reg_adr = location;
-	cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
-
-	do {
-		cvmx_wait(1000);
-		smi_wr.u64 = cvmx_read_csr(CVMX_SMI_WR_DAT);
-	} while (smi_wr.s.pending);
-	MDIO_UNLOCK();
-}
-
-/**
- * Setup the MDIO device structures
- *
- * @param dev    Device to setup
- *
- * @return Zero on success, negative on failure
- */
-int cvm_oct_mdio_setup_device(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	priv->phy_id = cvmx_helper_board_get_mii_address(priv->port);
-	priv->phy_device = NULL;
-	priv->mdio_read = NULL;
-	priv->mdio_write = NULL;
-
-	return 0;
-}
diff --git a/sys/mips/cavium/octe/ethernet-mdio.h b/sys/mips/cavium/octe/ethernet-mdio.h
deleted file mode 100644
index bd0e5c58eb34..000000000000
--- a/sys/mips/cavium/octe/ethernet-mdio.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-extern struct mtx cvm_oct_mdio_mtx;
-
-#define	MDIO_LOCK()	mtx_lock(&cvm_oct_mdio_mtx)
-#define	MDIO_UNLOCK()	mtx_unlock(&cvm_oct_mdio_mtx)
-#define	MDIO_TRYLOCK()	mtx_trylock(&cvm_oct_mdio_mtx)
-
-int cvm_oct_mdio_read(struct ifnet *ifp, int phy_id, int location);
-void cvm_oct_mdio_write(struct ifnet *ifp, int phy_id, int location, int val);
-int cvm_oct_mdio_setup_device(struct ifnet *ifp);
diff --git a/sys/mips/cavium/octe/ethernet-mem.c b/sys/mips/cavium/octe/ethernet-mem.c
deleted file mode 100644
index ea6297507242..000000000000
--- a/sys/mips/cavium/octe/ethernet-mem.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-/**
- * Fill the supplied hardware pool with mbufs
- *
- * @param pool     Pool to allocate an mbuf for
- * @param size     Size of the buffer needed for the pool
- * @param elements Number of buffers to allocate
- */
-int cvm_oct_mem_fill_fpa(int pool, int size, int elements)
-{
-	int freed = elements;
-	while (freed) {
-		KASSERT(size <= MCLBYTES - 128, ("mbuf clusters are too small"));
-
-		struct mbuf *m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
-		if (__predict_false(m == NULL)) {
-			printf("Failed to allocate mbuf for hardware pool %d\n", pool);
-			break;
-		}
-
-		m->m_data += 128 - (((uintptr_t)m->m_data) & 0x7f);
-		*(struct mbuf **)(m->m_data - sizeof(void *)) = m;
-		cvmx_fpa_free(m->m_data, pool, DONT_WRITEBACK(size/128));
-		freed--;
-	}
-	return (elements - freed);
-}
-
-/**
- * Free the supplied hardware pool of mbufs
- *
- * @param pool     Pool to allocate an mbuf for
- * @param size     Size of the buffer needed for the pool
- * @param elements Number of buffers to allocate
- */
-void cvm_oct_mem_empty_fpa(int pool, int size, int elements)
-{
-	char *memory;
-
-	do {
-		memory = cvmx_fpa_alloc(pool);
-		if (memory) {
-			struct mbuf *m = *(struct mbuf **)(memory - sizeof(void *));
-			elements--;
-			m_freem(m);
-		}
-	} while (memory);
-
-	if (elements < 0)
-		printf("Warning: Freeing of pool %u had too many mbufs (%d)\n", pool, elements);
-	else if (elements > 0)
-		printf("Warning: Freeing of pool %u is missing %d mbufs\n", pool, elements);
-}
diff --git a/sys/mips/cavium/octe/ethernet-mem.h b/sys/mips/cavium/octe/ethernet-mem.h
deleted file mode 100644
index f5fbbe22df93..000000000000
--- a/sys/mips/cavium/octe/ethernet-mem.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-int cvm_oct_mem_fill_fpa(int pool, int size, int elements);
-void cvm_oct_mem_empty_fpa(int pool, int size, int elements);
diff --git a/sys/mips/cavium/octe/ethernet-mv88e61xx.c b/sys/mips/cavium/octe/ethernet-mv88e61xx.c
deleted file mode 100644
index d06b4a4571f5..000000000000
--- a/sys/mips/cavium/octe/ethernet-mv88e61xx.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Interface to the Marvell 88E61XX SMI/MDIO.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <dev/mii/mii.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-#define	MV88E61XX_SMI_REG_CMD	0x00	/* Indirect command register.  */
-#define	 MV88E61XX_SMI_CMD_BUSY		0x8000	/* Busy bit.  */
-#define	 MV88E61XX_SMI_CMD_22		0x1000	/* Clause 22 (default 45.)  */
-#define	 MV88E61XX_SMI_CMD_READ		0x0800	/* Read command.  */
-#define	 MV88E61XX_SMI_CMD_WRITE	0x0400	/* Write command.  */
-#define	 MV88E61XX_SMI_CMD_PHY(phy)	(((phy) & 0x1f) << 5)
-#define	 MV88E61XX_SMI_CMD_REG(reg)	((reg) & 0x1f)
-
-#define	MV88E61XX_SMI_REG_DAT	0x01	/* Indirect data register.  */
-
-static int cvm_oct_mv88e61xx_smi_read(struct ifnet *, int, int);
-static void cvm_oct_mv88e61xx_smi_write(struct ifnet *, int, int, int);
-static int cvm_oct_mv88e61xx_smi_wait(struct ifnet *);
-
-int
-cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	priv->mdio_read = cvm_oct_mv88e61xx_smi_read;
-	priv->mdio_write = cvm_oct_mv88e61xx_smi_write;
-	priv->phy_device = "mv88e61xxphy";
-
-	return (0);
-}
-
-static int
-cvm_oct_mv88e61xx_smi_read(struct ifnet *ifp, int phy_id, int location)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int error;
-
-	error = cvm_oct_mv88e61xx_smi_wait(ifp);
-	if (error != 0)
-		return (0);
-
-	cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
-	    MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
-	    MV88E61XX_SMI_CMD_READ | MV88E61XX_SMI_CMD_PHY(phy_id) |
-	    MV88E61XX_SMI_CMD_REG(location));
-
-	error = cvm_oct_mv88e61xx_smi_wait(ifp);
-	if (error != 0)
-		return (0);
-
-	return (cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT));
-}
-
-static void
-cvm_oct_mv88e61xx_smi_write(struct ifnet *ifp, int phy_id, int location, int val)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	cvm_oct_mv88e61xx_smi_wait(ifp);
-	cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT, val);
-	cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
-	    MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
-	    MV88E61XX_SMI_CMD_WRITE | MV88E61XX_SMI_CMD_PHY(phy_id) |
-	    MV88E61XX_SMI_CMD_REG(location));
-	cvm_oct_mv88e61xx_smi_wait(ifp);
-}
-
-static int
-cvm_oct_mv88e61xx_smi_wait(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	uint16_t cmd;
-	unsigned i;
-
-	for (i = 0; i < 10000; i++) {
-		cmd = cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD);
-		if ((cmd & MV88E61XX_SMI_CMD_BUSY) == 0)
-			return (0);
-	}
-	return (ETIMEDOUT);
-}
diff --git a/sys/mips/cavium/octe/ethernet-mv88e61xx.h b/sys/mips/cavium/octe/ethernet-mv88e61xx.h
deleted file mode 100644
index 7ea2368de7f4..000000000000
--- a/sys/mips/cavium/octe/ethernet-mv88e61xx.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_CAVIUM_OCTE_ETHERNET_MV88E61XX_H_
-#define	_CAVIUM_OCTE_ETHERNET_MV88E61XX_H_
-
-int cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp);
-
-#endif /* !_CAVIUM_OCTE_ETHERNET_MV88E61XX_H_ */
diff --git a/sys/mips/cavium/octe/ethernet-rgmii.c b/sys/mips/cavium/octe/ethernet-rgmii.c
deleted file mode 100644
index b098a9c9c39c..000000000000
--- a/sys/mips/cavium/octe/ethernet-rgmii.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-#include "octebusvar.h"
-
-extern struct ifnet *cvm_oct_device[];
-
-static struct mtx global_register_lock;
-MTX_SYSINIT(global_register_lock, &global_register_lock,
-	    "RGMII Global", MTX_SPIN);
-
-static int number_rgmii_ports;
-
-static void cvm_oct_rgmii_poll(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	cvmx_helper_link_info_t link_info;
-
-	/* Take the global register lock since we are going to touch
-	   registers that affect more than one port */
-	mtx_lock_spin(&global_register_lock);
-
-	link_info = cvmx_helper_link_get(priv->port);
-	if (link_info.u64 == priv->link_info) {
-		/* If the 10Mbps preamble workaround is supported and we're
-		   at 10Mbps we may need to do some special checking */
-		if (USE_10MBPS_PREAMBLE_WORKAROUND && (link_info.s.speed == 10)) {
-			/* Read the GMXX_RXX_INT_REG[PCTERR] bit and
-			   see if we are getting preamble errors */
-			int interface = INTERFACE(priv->port);
-			int index = INDEX(priv->port);
-			cvmx_gmxx_rxx_int_reg_t gmxx_rxx_int_reg;
-			gmxx_rxx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface));
-			if (gmxx_rxx_int_reg.s.pcterr) {
-				/* We are getting preamble errors at 10Mbps.
-				   Most likely the PHY is giving us packets
-				   with mis aligned preambles. In order to get
-				   these packets we need to disable preamble
-				   checking and do it in software */
-				cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl;
-				cvmx_ipd_sub_port_fcs_t ipd_sub_port_fcs;
-
-				/* Disable preamble checking */
-				gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
-				gmxx_rxx_frm_ctl.s.pre_chk = 0;
-				cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface), gmxx_rxx_frm_ctl.u64);
-
-				/* Disable FCS stripping */
-				ipd_sub_port_fcs.u64 = cvmx_read_csr(CVMX_IPD_SUB_PORT_FCS);
-				ipd_sub_port_fcs.s.port_bit &= 0xffffffffull ^ (1ull<<priv->port);
-				cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64);
-
-				/* Clear any error bits */
-				cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmxx_rxx_int_reg.u64);
-				DEBUGPRINT("%s: Using 10Mbps with software preamble removal\n", if_name(ifp));
-			}
-		}
-		mtx_unlock_spin(&global_register_lock);
-		return;
-	}
-
-	/* If the 10Mbps preamble workaround is allowed we need to on
-	   preamble checking, FCS stripping, and clear error bits on
-	   every speed change. If errors occur during 10Mbps operation
-	   the above code will change this stuff */
-	if (USE_10MBPS_PREAMBLE_WORKAROUND) {
-		cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl;
-		cvmx_ipd_sub_port_fcs_t ipd_sub_port_fcs;
-		cvmx_gmxx_rxx_int_reg_t gmxx_rxx_int_reg;
-		int interface = INTERFACE(priv->port);
-		int index = INDEX(priv->port);
-
-		/* Enable preamble checking */
-		gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
-		gmxx_rxx_frm_ctl.s.pre_chk = 1;
-		cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface), gmxx_rxx_frm_ctl.u64);
-		/* Enable FCS stripping */
-		ipd_sub_port_fcs.u64 = cvmx_read_csr(CVMX_IPD_SUB_PORT_FCS);
-		ipd_sub_port_fcs.s.port_bit |= 1ull<<priv->port;
-		cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64);
-		/* Clear any error bits */
-		gmxx_rxx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface));
-		cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmxx_rxx_int_reg.u64);
-	}
-
-	if (priv->miibus == NULL) {
-		link_info = cvmx_helper_link_autoconf(priv->port);
-		priv->link_info = link_info.u64;
-		priv->need_link_update = 1;
-	}
-	mtx_unlock_spin(&global_register_lock);
-}
-
-static int cvm_oct_rgmii_rml_interrupt(void *dev_id)
-{
-	cvmx_npi_rsl_int_blocks_t rsl_int_blocks;
-	int index;
-	int return_status = FILTER_STRAY;
-
-	rsl_int_blocks.u64 = cvmx_read_csr(CVMX_NPI_RSL_INT_BLOCKS);
-
-	/* Check and see if this interrupt was caused by the GMX0 block */
-	if (rsl_int_blocks.s.gmx0) {
-		int interface = 0;
-		/* Loop through every port of this interface */
-		for (index = 0; index < cvmx_helper_ports_on_interface(interface); index++) {
-			/* Read the GMX interrupt status bits */
-			cvmx_gmxx_rxx_int_reg_t gmx_rx_int_reg;
-			gmx_rx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface));
-			gmx_rx_int_reg.u64 &= cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface));
-			/* Poll the port if inband status changed */
-			if (gmx_rx_int_reg.s.phy_dupx || gmx_rx_int_reg.s.phy_link || gmx_rx_int_reg.s.phy_spd) {
-				struct ifnet *ifp = cvm_oct_device[cvmx_helper_get_ipd_port(interface, index)];
-				if (ifp)
-					cvm_oct_rgmii_poll(ifp);
-				gmx_rx_int_reg.u64 = 0;
-				gmx_rx_int_reg.s.phy_dupx = 1;
-				gmx_rx_int_reg.s.phy_link = 1;
-				gmx_rx_int_reg.s.phy_spd = 1;
-				cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmx_rx_int_reg.u64);
-				return_status = FILTER_HANDLED;
-			}
-		}
-	}
-
-	/* Check and see if this interrupt was caused by the GMX1 block */
-	if (rsl_int_blocks.s.gmx1) {
-		int interface = 1;
-		/* Loop through every port of this interface */
-		for (index = 0; index < cvmx_helper_ports_on_interface(interface); index++) {
-			/* Read the GMX interrupt status bits */
-			cvmx_gmxx_rxx_int_reg_t gmx_rx_int_reg;
-			gmx_rx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface));
-			gmx_rx_int_reg.u64 &= cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface));
-			/* Poll the port if inband status changed */
-			if (gmx_rx_int_reg.s.phy_dupx || gmx_rx_int_reg.s.phy_link || gmx_rx_int_reg.s.phy_spd) {
-				struct ifnet *ifp = cvm_oct_device[cvmx_helper_get_ipd_port(interface, index)];
-				if (ifp)
-					cvm_oct_rgmii_poll(ifp);
-				gmx_rx_int_reg.u64 = 0;
-				gmx_rx_int_reg.s.phy_dupx = 1;
-				gmx_rx_int_reg.s.phy_link = 1;
-				gmx_rx_int_reg.s.phy_spd = 1;
-				cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmx_rx_int_reg.u64);
-				return_status = FILTER_HANDLED;
-			}
-		}
-	}
-	return return_status;
-}
-
-int cvm_oct_rgmii_init(struct ifnet *ifp)
-{
-	struct octebus_softc *sc;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int error;
-	int rid;
-
-	if (cvm_oct_common_init(ifp) != 0)
-	    return ENXIO;
-
-	priv->open = cvm_oct_common_open;
-	priv->stop = cvm_oct_common_stop;
-	priv->stop(ifp);
-
-	/* Due to GMX errata in CN3XXX series chips, it is necessary to take the
-	   link down immediately whne the PHY changes state. In order to do this
-	   we call the poll function every time the RGMII inband status changes.
-	   This may cause problems if the PHY doesn't implement inband status
-	   properly */
-	if (number_rgmii_ports == 0) {
-		sc = device_get_softc(device_get_parent(priv->dev));
-
-		rid = 0;
-		sc->sc_rgmii_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ,
-						      &rid, OCTEON_IRQ_RML,
-						      OCTEON_IRQ_RML, 1,
-						      RF_ACTIVE);
-		if (sc->sc_rgmii_irq == NULL) {
-			device_printf(sc->sc_dev, "could not allocate RGMII irq");
-			return ENXIO;
-		}
-
-		error = bus_setup_intr(sc->sc_dev, sc->sc_rgmii_irq,
-				       INTR_TYPE_NET | INTR_MPSAFE,
-				       cvm_oct_rgmii_rml_interrupt, NULL,
-				       &number_rgmii_ports, NULL);
-		if (error != 0) {
-			device_printf(sc->sc_dev, "could not setup RGMII irq");
-			return error;
-		}
-	}
-	number_rgmii_ports++;
-
-	/* Only true RGMII ports need to be polled. In GMII mode, port 0 is really
-	   a RGMII port */
-	if (((priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII) && (priv->port == 0)) ||
-	    (priv->imode == CVMX_HELPER_INTERFACE_MODE_RGMII)) {
-		if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
-			cvmx_gmxx_rxx_int_en_t gmx_rx_int_en;
-			int interface = INTERFACE(priv->port);
-			int index = INDEX(priv->port);
-
-			/* Enable interrupts on inband status changes for this port */
-			gmx_rx_int_en.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface));
-			gmx_rx_int_en.s.phy_dupx = 1;
-			gmx_rx_int_en.s.phy_link = 1;
-			gmx_rx_int_en.s.phy_spd = 1;
-			cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), gmx_rx_int_en.u64);
-			priv->poll = cvm_oct_rgmii_poll;
-		}
-	}
-
-	return 0;
-}
-
-void cvm_oct_rgmii_uninit(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	cvm_oct_common_uninit(ifp);
-
-	/* Only true RGMII ports need to be polled. In GMII mode, port 0 is really
-	   a RGMII port */
-	if (((priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII) && (priv->port == 0)) ||
-	    (priv->imode == CVMX_HELPER_INTERFACE_MODE_RGMII)) {
-		if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
-			cvmx_gmxx_rxx_int_en_t gmx_rx_int_en;
-			int interface = INTERFACE(priv->port);
-			int index = INDEX(priv->port);
-
-			/* Disable interrupts on inband status changes for this port */
-			gmx_rx_int_en.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface));
-			gmx_rx_int_en.s.phy_dupx = 0;
-			gmx_rx_int_en.s.phy_link = 0;
-			gmx_rx_int_en.s.phy_spd = 0;
-			cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), gmx_rx_int_en.u64);
-		}
-	}
-
-	/* Remove the interrupt handler when the last port is removed */
-	number_rgmii_ports--;
-	if (number_rgmii_ports == 0)
-		panic("%s: need to implement IRQ release.", __func__);
-}
diff --git a/sys/mips/cavium/octe/ethernet-rx.c b/sys/mips/cavium/octe/ethernet-rx.c
deleted file mode 100644
index 5f89c9648092..000000000000
--- a/sys/mips/cavium/octe/ethernet-rx.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/proc.h>
-#include <sys/sched.h>
-#include <sys/smp.h>
-#include <sys/taskqueue.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-extern int pow_receive_group;
-extern struct ifnet *cvm_oct_device[];
-
-static struct task cvm_oct_task;
-static struct taskqueue *cvm_oct_taskq;
-
-/**
- * Interrupt handler. The interrupt occurs whenever the POW
- * transitions from 0->1 packets in our group.
- *
- * @param cpl
- * @param dev_id
- * @param regs
- * @return
- */
-int cvm_oct_do_interrupt(void *dev_id)
-{
-	/* Acknowledge the interrupt */
-	if (INTERRUPT_LIMIT)
-		cvmx_write_csr(CVMX_POW_WQ_INT, 1<<pow_receive_group);
-	else
-		cvmx_write_csr(CVMX_POW_WQ_INT, 0x10001<<pow_receive_group);
-
-	/*
-	 * Schedule task.
-	 */
-	taskqueue_enqueue(cvm_oct_taskq, &cvm_oct_task);
-
-	return FILTER_HANDLED;
-}
-
-/**
- * This is called on receive errors, and determines if the packet
- * can be dropped early-on in cvm_oct_tasklet_rx().
- *
- * @param work Work queue entry pointing to the packet.
- * @return Non-zero if the packet can be dropped, zero otherwise.
- */
-static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
-{
-	if ((work->word2.snoip.err_code == 10) && (work->word1.s.len <= 64)) {
-		/* Ignore length errors on min size packets. Some equipment
-		   incorrectly pads packets to 64+4FCS instead of 60+4FCS.
-		   Note these packets still get counted as frame errors. */
-	} else
-	if (USE_10MBPS_PREAMBLE_WORKAROUND && ((work->word2.snoip.err_code == 5) || (work->word2.snoip.err_code == 7))) {
-		/* We received a packet with either an alignment error or a
-		   FCS error. This may be signalling that we are running
-		   10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK} off. If this is the
-		   case we need to parse the packet to determine if we can
-		   remove a non spec preamble and generate a correct packet */
-		int interface = cvmx_helper_get_interface_num(work->word1.cn38xx.ipprt);
-		int index = cvmx_helper_get_interface_index_num(work->word1.cn38xx.ipprt);
-		cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl;
-		gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
-		if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
-			uint8_t *ptr = cvmx_phys_to_ptr(work->packet_ptr.s.addr);
-			int i = 0;
-
-			while (i < work->word1.s.len-1) {
-				if (*ptr != 0x55)
-					break;
-				ptr++;
-				i++;
-			}
-
-			if (*ptr == 0xd5) {
-				/*
-				DEBUGPRINT("Port %d received 0xd5 preamble\n", work->word1.cn38xx.ipprt);
-				*/
-				work->packet_ptr.s.addr += i+1;
-				work->word1.s.len -= i+5;
-			} else
-			if ((*ptr & 0xf) == 0xd) {
-				/*
-				DEBUGPRINT("Port %d received 0x?d preamble\n", work->word1.cn38xx.ipprt);
-				*/
-				work->packet_ptr.s.addr += i;
-				work->word1.s.len -= i+4;
-				for (i = 0; i < work->word1.s.len; i++) {
-					*ptr = ((*ptr&0xf0)>>4) | ((*(ptr+1)&0xf)<<4);
-					ptr++;
-				}
-			} else {
-				DEBUGPRINT("Port %d unknown preamble, packet dropped\n", work->word1.cn38xx.ipprt);
-				/*
-				cvmx_helper_dump_packet(work);
-				*/
-				cvm_oct_free_work(work);
-				return 1;
-			}
-		}
-	} else {
-		DEBUGPRINT("Port %d receive error code %d, packet dropped\n", work->word1.cn38xx.ipprt, work->word2.snoip.err_code);
-		cvm_oct_free_work(work);
-		return 1;
-	}
-
-	return 0;
-}
-
-/**
- * Tasklet function that is scheduled on a core when an interrupt occurs.
- *
- * @param unused
- */
-void cvm_oct_tasklet_rx(void *context, int pending)
-{
-	int                 coreid;
-	uint64_t            old_group_mask;
-	int                 rx_count = 0;
-	int                 number_to_free;
-	int                 num_freed;
-	int                 packet_not_copied;
-
-	coreid = cvmx_get_core_num();
-
-	/* Prefetch cvm_oct_device since we know we need it soon */
-	CVMX_PREFETCH(cvm_oct_device, 0);
-
-	/* Only allow work for our group (and preserve priorities) */
-	old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
-	cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
-		       (old_group_mask & ~0xFFFFull) | 1<<pow_receive_group);
-
-	while (1) {
-		struct mbuf *m = NULL;
-		int mbuf_in_hw;
-		cvmx_wqe_t *work;
-
-		if ((INTERRUPT_LIMIT == 0) || (rx_count < MAX_RX_PACKETS))
-			work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
-		else
-			work = NULL;
-		CVMX_PREFETCH(work, 0);
-		if (work == NULL)
-			break;
-
-		mbuf_in_hw = work->word2.s.bufs == 1;
-		if ((mbuf_in_hw)) {
-			m = *(struct mbuf **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *));
-			CVMX_PREFETCH(m, offsetof(struct mbuf, m_data));
-			CVMX_PREFETCH(m, offsetof(struct mbuf, m_pkthdr));
-		}
-		CVMX_PREFETCH(cvm_oct_device[work->word1.cn38xx.ipprt], 0);
-		//CVMX_PREFETCH(m, 0);
-
-		rx_count++;
-		/* Immediately throw away all packets with receive errors */
-		if ((work->word2.snoip.rcv_error)) {
-			if (cvm_oct_check_rcv_error(work))
-				continue;
-		}
-
-		/* We can only use the zero copy path if mbufs are in the FPA pool
-		   and the packet fits in a single buffer */
-		if ((mbuf_in_hw)) {
-			CVMX_PREFETCH(m->m_data, 0);
-
-			m->m_pkthdr.len = m->m_len = work->word1.s.len;
-
-			packet_not_copied = 1;
-
-			/*
-			 * Adjust the data pointer based on the offset
-			 * of the packet within the buffer.
-			 */
-			m->m_data += (work->packet_ptr.s.back << 7) + (work->packet_ptr.s.addr & 0x7f);
-		} else {
-			/* We have to copy the packet. First allocate an
-			   mbuf for it */
-			MGETHDR(m, M_NOWAIT, MT_DATA);
-			if (m == NULL) {
-				DEBUGPRINT("Port %d failed to allocate mbuf, packet dropped\n", work->word1.cn38xx.ipprt);
-				cvm_oct_free_work(work);
-				continue;
-			}
-
-			/* Check if we've received a packet that was entirely
-			   stored in the work entry. This is untested */
-			if ((work->word2.s.bufs == 0)) {
-				uint8_t *ptr = work->packet_data;
-
-				if (cvmx_likely(!work->word2.s.not_IP)) {
-					/* The beginning of the packet moves
-					   for IP packets */
-					if (work->word2.s.is_v6)
-						ptr += 2;
-					else
-						ptr += 6;
-				}
-				panic("%s: not yet implemented; copy in small packet.", __func__);
-				/* No packet buffers to free */
-			} else {
-				int segments = work->word2.s.bufs;
-				cvmx_buf_ptr_t segment_ptr = work->packet_ptr;
-				int len = work->word1.s.len;
-
-				while (segments--) {
-					cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8);
-					/* Octeon Errata PKI-100: The segment
-					   size is wrong. Until it is fixed,
-					   calculate the segment size based on
-					   the packet pool buffer size. When
-					   it is fixed, the following line
-					   should be replaced with this one:
-					int segment_size = segment_ptr.s.size; */
-					int segment_size = CVMX_FPA_PACKET_POOL_SIZE - (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7));
-					/* Don't copy more than what is left
-					   in the packet */
-					if (segment_size > len)
-						segment_size = len;
-					/* Copy the data into the packet */
-					panic("%s: not yet implemented; copy in packet segments.", __func__);
-#if 0
-					memcpy(m_put(m, segment_size), cvmx_phys_to_ptr(segment_ptr.s.addr), segment_size);
-#endif
-					/* Reduce the amount of bytes left
-					   to copy */
-					len -= segment_size;
-					segment_ptr = next_ptr;
-				}
-			}
-			packet_not_copied = 0;
-		}
-
-		if (((work->word1.cn38xx.ipprt < TOTAL_NUMBER_OF_PORTS) &&
-		    cvm_oct_device[work->word1.cn38xx.ipprt])) {
-			struct ifnet *ifp = cvm_oct_device[work->word1.cn38xx.ipprt];
-
-			/* Only accept packets for devices
-			   that are currently up */
-			if ((ifp->if_flags & IFF_UP)) {
-				m->m_pkthdr.rcvif = ifp;
-
-				if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
-					if ((work->word2.s.not_IP || work->word2.s.IP_exc || work->word2.s.L4_error))
-						m->m_pkthdr.csum_flags = 0; /* XXX */
-					else {
-						m->m_pkthdr.csum_flags = CSUM_IP_CHECKED | CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
-						m->m_pkthdr.csum_data = 0xffff;
-					}
-				} else {
-					m->m_pkthdr.csum_flags = 0; /* XXX */
-				}
-
-				if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-
-				(*ifp->if_input)(ifp, m);
-			} else {
-				/* Drop any packet received for a device that isn't up */
-				/*
-				DEBUGPRINT("%s: Device not up, packet dropped\n",
-					   if_name(ifp));
-				*/
-				m_freem(m);
-			}
-		} else {
-			/* Drop any packet received for a device that
-			   doesn't exist */
-			DEBUGPRINT("Port %d not controlled by FreeBSD, packet dropped\n", work->word1.cn38xx.ipprt);
-			m_freem(m);
-		}
-
-		/* Check to see if the mbuf and work share
-		   the same packet buffer */
-		if ((packet_not_copied)) {
-			/* This buffer needs to be replaced, increment
-			the number of buffers we need to free by one */
-			cvmx_fau_atomic_add32(
-				FAU_NUM_PACKET_BUFFERS_TO_FREE, 1);
-
-			cvmx_fpa_free(work, CVMX_FPA_WQE_POOL,
-				      DONT_WRITEBACK(1));
-		} else
-			cvm_oct_free_work(work);
-	}
-
-	/*
-	 * If we hit our limit, schedule another task while we clean up.
-	 */
-	if (INTERRUPT_LIMIT != 0 && rx_count == MAX_RX_PACKETS) {
-		taskqueue_enqueue(cvm_oct_taskq, &cvm_oct_task);
-	}
-
-	/* Restore the original POW group mask */
-	cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
-
-	/* Refill the packet buffer pool */
-	number_to_free =
-	  cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
-
-	if (number_to_free > 0) {
-		cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
-				      -number_to_free);
-		num_freed =
-			cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL,
-					     CVMX_FPA_PACKET_POOL_SIZE,
-					     number_to_free);
-		if (num_freed != number_to_free) {
-			cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
-					      number_to_free - num_freed);
-		}
-	}
-}
-
-void cvm_oct_rx_initialize(void)
-{
-	int cpu;
-	TASK_INIT(&cvm_oct_task, 0, cvm_oct_tasklet_rx, NULL);
-
-	cvm_oct_taskq = taskqueue_create_fast("oct_rx", M_NOWAIT,
-					      taskqueue_thread_enqueue,
-					      &cvm_oct_taskq);
-
-	CPU_FOREACH(cpu) {
-		cpuset_t cpu_mask;
-		CPU_SETOF(cpu, &cpu_mask);
-		taskqueue_start_threads_cpuset(&cvm_oct_taskq, 1, PI_NET,
-		    &cpu_mask, "octe taskq");
-	}
-}
-
-void cvm_oct_rx_shutdown(void)
-{
-	panic("%s: not yet implemented.", __func__);
-}
diff --git a/sys/mips/cavium/octe/ethernet-rx.h b/sys/mips/cavium/octe/ethernet-rx.h
deleted file mode 100644
index 79d5c4a61fd6..000000000000
--- a/sys/mips/cavium/octe/ethernet-rx.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-int cvm_oct_do_interrupt(void *dev_id);
-void cvm_oct_poll_controller(struct ifnet *ifp);
-void cvm_oct_tasklet_rx(void *context, int pending);
-
-void cvm_oct_rx_initialize(void);
-void cvm_oct_rx_shutdown(void);
diff --git a/sys/mips/cavium/octe/ethernet-sgmii.c b/sys/mips/cavium/octe/ethernet-sgmii.c
deleted file mode 100644
index 6643c2127b5b..000000000000
--- a/sys/mips/cavium/octe/ethernet-sgmii.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-int cvm_oct_sgmii_init(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	if (cvm_oct_common_init(ifp) != 0)
-	    return ENXIO;
-
-	priv->open = cvm_oct_common_open;
-	priv->stop = cvm_oct_common_stop;
-	priv->stop(ifp);
-
-	/* FIXME: Need autoneg logic */
-	return 0;
-}
diff --git a/sys/mips/cavium/octe/ethernet-spi.c b/sys/mips/cavium/octe/ethernet-spi.c
deleted file mode 100644
index 56a6c83e8f85..000000000000
--- a/sys/mips/cavium/octe/ethernet-spi.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-#include "octebusvar.h"
-
-static int number_spi_ports;
-static int need_retrain[2] = {0, 0};
-
-static int cvm_oct_spi_rml_interrupt(void *dev_id)
-{
-	int return_status = FILTER_STRAY;
-	cvmx_npi_rsl_int_blocks_t rsl_int_blocks;
-
-	/* Check and see if this interrupt was caused by the GMX block */
-	rsl_int_blocks.u64 = cvmx_read_csr(CVMX_NPI_RSL_INT_BLOCKS);
-	if (rsl_int_blocks.s.spx1) { /* 19 - SPX1_INT_REG & STX1_INT_REG */
-
-		cvmx_spxx_int_reg_t spx_int_reg;
-		cvmx_stxx_int_reg_t stx_int_reg;
-
-		spx_int_reg.u64 = cvmx_read_csr(CVMX_SPXX_INT_REG(1));
-		cvmx_write_csr(CVMX_SPXX_INT_REG(1), spx_int_reg.u64);
-		if (!need_retrain[1]) {
-			spx_int_reg.u64 &= cvmx_read_csr(CVMX_SPXX_INT_MSK(1));
-			if (spx_int_reg.s.spf)
-				printf("SPI1: SRX Spi4 interface down\n");
-			if (spx_int_reg.s.calerr)
-				printf("SPI1: SRX Spi4 Calendar table parity error\n");
-			if (spx_int_reg.s.syncerr)
-				printf("SPI1: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n");
-			if (spx_int_reg.s.diperr)
-				printf("SPI1: SRX Spi4 DIP4 error\n");
-			if (spx_int_reg.s.tpaovr)
-				printf("SPI1: SRX Selected port has hit TPA overflow\n");
-			if (spx_int_reg.s.rsverr)
-				printf("SPI1: SRX Spi4 reserved control word detected\n");
-			if (spx_int_reg.s.drwnng)
-				printf("SPI1: SRX Spi4 receive FIFO drowning/overflow\n");
-			if (spx_int_reg.s.clserr)
-				printf("SPI1: SRX Spi4 packet closed on non-16B alignment without EOP\n");
-			if (spx_int_reg.s.spiovr)
-				printf("SPI1: SRX Spi4 async FIFO overflow\n");
-			if (spx_int_reg.s.abnorm)
-				printf("SPI1: SRX Abnormal packet termination (ERR bit)\n");
-			if (spx_int_reg.s.prtnxa)
-				printf("SPI1: SRX Port out of range\n");
-		}
-
-		stx_int_reg.u64 = cvmx_read_csr(CVMX_STXX_INT_REG(1));
-		cvmx_write_csr(CVMX_STXX_INT_REG(1), stx_int_reg.u64);
-		if (!need_retrain[1]) {
-			stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(1));
-			if (stx_int_reg.s.syncerr)
-				printf("SPI1: STX Interface encountered a fatal error\n");
-			if (stx_int_reg.s.frmerr)
-				printf("SPI1: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n");
-			if (stx_int_reg.s.unxfrm)
-				printf("SPI1: STX Unexpected framing sequence\n");
-			if (stx_int_reg.s.nosync)
-				printf("SPI1: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n");
-			if (stx_int_reg.s.diperr)
-				printf("SPI1: STX DIP2 error on the Spi4 Status channel\n");
-			if (stx_int_reg.s.datovr)
-				printf("SPI1: STX Spi4 FIFO overflow error\n");
-			if (stx_int_reg.s.ovrbst)
-				printf("SPI1: STX Transmit packet burst too big\n");
-			if (stx_int_reg.s.calpar1)
-				printf("SPI1: STX Calendar Table Parity Error Bank1\n");
-			if (stx_int_reg.s.calpar0)
-				printf("SPI1: STX Calendar Table Parity Error Bank0\n");
-		}
-
-		cvmx_write_csr(CVMX_SPXX_INT_MSK(1), 0);
-		cvmx_write_csr(CVMX_STXX_INT_MSK(1), 0);
-		need_retrain[1] = 1;
-		return_status = FILTER_HANDLED;
-	}
-
-	if (rsl_int_blocks.s.spx0) { /* 18 - SPX0_INT_REG & STX0_INT_REG */
-		cvmx_spxx_int_reg_t spx_int_reg;
-		cvmx_stxx_int_reg_t stx_int_reg;
-
-		spx_int_reg.u64 = cvmx_read_csr(CVMX_SPXX_INT_REG(0));
-		cvmx_write_csr(CVMX_SPXX_INT_REG(0), spx_int_reg.u64);
-		if (!need_retrain[0]) {
-			spx_int_reg.u64 &= cvmx_read_csr(CVMX_SPXX_INT_MSK(0));
-			if (spx_int_reg.s.spf)
-				printf("SPI0: SRX Spi4 interface down\n");
-			if (spx_int_reg.s.calerr)
-				printf("SPI0: SRX Spi4 Calendar table parity error\n");
-			if (spx_int_reg.s.syncerr)
-				printf("SPI0: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n");
-			if (spx_int_reg.s.diperr)
-				printf("SPI0: SRX Spi4 DIP4 error\n");
-			if (spx_int_reg.s.tpaovr)
-				printf("SPI0: SRX Selected port has hit TPA overflow\n");
-			if (spx_int_reg.s.rsverr)
-				printf("SPI0: SRX Spi4 reserved control word detected\n");
-			if (spx_int_reg.s.drwnng)
-				printf("SPI0: SRX Spi4 receive FIFO drowning/overflow\n");
-			if (spx_int_reg.s.clserr)
-				printf("SPI0: SRX Spi4 packet closed on non-16B alignment without EOP\n");
-			if (spx_int_reg.s.spiovr)
-				printf("SPI0: SRX Spi4 async FIFO overflow\n");
-			if (spx_int_reg.s.abnorm)
-				printf("SPI0: SRX Abnormal packet termination (ERR bit)\n");
-			if (spx_int_reg.s.prtnxa)
-				printf("SPI0: SRX Port out of range\n");
-		}
-
-		stx_int_reg.u64 = cvmx_read_csr(CVMX_STXX_INT_REG(0));
-		cvmx_write_csr(CVMX_STXX_INT_REG(0), stx_int_reg.u64);
-		if (!need_retrain[0]) {
-			stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(0));
-			if (stx_int_reg.s.syncerr)
-				printf("SPI0: STX Interface encountered a fatal error\n");
-			if (stx_int_reg.s.frmerr)
-				printf("SPI0: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n");
-			if (stx_int_reg.s.unxfrm)
-				printf("SPI0: STX Unexpected framing sequence\n");
-			if (stx_int_reg.s.nosync)
-				printf("SPI0: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n");
-			if (stx_int_reg.s.diperr)
-				printf("SPI0: STX DIP2 error on the Spi4 Status channel\n");
-			if (stx_int_reg.s.datovr)
-				printf("SPI0: STX Spi4 FIFO overflow error\n");
-			if (stx_int_reg.s.ovrbst)
-				printf("SPI0: STX Transmit packet burst too big\n");
-			if (stx_int_reg.s.calpar1)
-				printf("SPI0: STX Calendar Table Parity Error Bank1\n");
-			if (stx_int_reg.s.calpar0)
-				printf("SPI0: STX Calendar Table Parity Error Bank0\n");
-		}
-
-		cvmx_write_csr(CVMX_SPXX_INT_MSK(0), 0);
-		cvmx_write_csr(CVMX_STXX_INT_MSK(0), 0);
-		need_retrain[0] = 1;
-		return_status = FILTER_HANDLED;
-	}
-
-	return return_status;
-}
-
-static void cvm_oct_spi_enable_error_reporting(int interface)
-{
-	cvmx_spxx_int_msk_t spxx_int_msk;
-	cvmx_stxx_int_msk_t stxx_int_msk;
-
-	spxx_int_msk.u64 = cvmx_read_csr(CVMX_SPXX_INT_MSK(interface));
-	spxx_int_msk.s.calerr = 1;
-	spxx_int_msk.s.syncerr = 1;
-	spxx_int_msk.s.diperr = 1;
-	spxx_int_msk.s.tpaovr = 1;
-	spxx_int_msk.s.rsverr = 1;
-	spxx_int_msk.s.drwnng = 1;
-	spxx_int_msk.s.clserr = 1;
-	spxx_int_msk.s.spiovr = 1;
-	spxx_int_msk.s.abnorm = 1;
-	spxx_int_msk.s.prtnxa = 1;
-	cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64);
-
-	stxx_int_msk.u64 = cvmx_read_csr(CVMX_STXX_INT_MSK(interface));
-	stxx_int_msk.s.frmerr = 1;
-	stxx_int_msk.s.unxfrm = 1;
-	stxx_int_msk.s.nosync = 1;
-	stxx_int_msk.s.diperr = 1;
-	stxx_int_msk.s.datovr = 1;
-	stxx_int_msk.s.ovrbst = 1;
-	stxx_int_msk.s.calpar1 = 1;
-	stxx_int_msk.s.calpar0 = 1;
-	cvmx_write_csr(CVMX_STXX_INT_MSK(interface), stxx_int_msk.u64);
-}
-
-static void cvm_oct_spi_poll(struct ifnet *ifp)
-{
-	static int spi4000_port;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int interface;
-
-	for (interface = 0; interface < 2; interface++) {
-		if ((priv->port == interface*16) && need_retrain[interface]) {
-			if (cvmx_spi_restart_interface(interface, CVMX_SPI_MODE_DUPLEX, 10) == 0) {
-				need_retrain[interface] = 0;
-				cvm_oct_spi_enable_error_reporting(interface);
-			}
-		}
-
-		/* The SPI4000 TWSI interface is very slow. In order not to
-		   bring the system to a crawl, we only poll a single port
-		   every second. This means negotiation speed changes
-		   take up to 10 seconds, but at least we don't waste
-		   absurd amounts of time waiting for TWSI */
-		if (priv->port == spi4000_port) {
-			/* This function does nothing if it is called on an
-			   interface without a SPI4000 */
-			cvmx_spi4000_check_speed(interface, priv->port);
-			/* Normal ordering increments. By decrementing
-			   we only match once per iteration */
-			spi4000_port--;
-			if (spi4000_port < 0)
-				spi4000_port = 10;
-		}
-	}
-}
-
-int cvm_oct_spi_init(struct ifnet *ifp)
-{
-	struct octebus_softc *sc;
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int error;
-	int rid;
-
-	if (number_spi_ports == 0) {
-		sc = device_get_softc(device_get_parent(priv->dev));
-
-		rid = 0;
-		sc->sc_spi_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ,
-						    &rid, OCTEON_IRQ_RML,
-						    OCTEON_IRQ_RML, 1,
-						    RF_ACTIVE);
-		if (sc->sc_spi_irq == NULL) {
-			device_printf(sc->sc_dev, "could not allocate SPI irq");
-			return ENXIO;
-		}
-
-		error = bus_setup_intr(sc->sc_dev, sc->sc_spi_irq,
-				       INTR_TYPE_NET | INTR_MPSAFE,
-				       cvm_oct_spi_rml_interrupt, NULL,
-				       &number_spi_ports, NULL);
-		if (error != 0) {
-			device_printf(sc->sc_dev, "could not setup SPI irq");
-			return error;
-		}
-	}
-	number_spi_ports++;
-
-	if ((priv->port == 0) || (priv->port == 16)) {
-		cvm_oct_spi_enable_error_reporting(INTERFACE(priv->port));
-		priv->poll = cvm_oct_spi_poll;
-	}
-	if (cvm_oct_common_init(ifp) != 0)
-	    return ENXIO;
-	return 0;
-}
-
-void cvm_oct_spi_uninit(struct ifnet *ifp)
-{
-	int interface;
-
-	cvm_oct_common_uninit(ifp);
-	number_spi_ports--;
-	if (number_spi_ports == 0) {
-		for (interface = 0; interface < 2; interface++) {
-			cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), 0);
-			cvmx_write_csr(CVMX_STXX_INT_MSK(interface), 0);
-		}
-		panic("%s: IRQ release not yet implemented.", __func__);
-	}
-}
diff --git a/sys/mips/cavium/octe/ethernet-tx.c b/sys/mips/cavium/octe/ethernet-tx.c
deleted file mode 100644
index 0b05b4522e30..000000000000
--- a/sys/mips/cavium/octe/ethernet-tx.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <net/bpf.h>
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-/* You can define GET_MBUF_QOS() to override how the mbuf output function
-   determines which output queue is used. The default implementation
-   always uses the base queue for the port. If, for example, you wanted
-   to use the m->priority fieid, define GET_MBUF_QOS as:
-   #define GET_MBUF_QOS(m) ((m)->priority) */
-#ifndef GET_MBUF_QOS
-    #define GET_MBUF_QOS(m) 0
-#endif
-
-/**
- * Packet transmit
- *
- * @param m    Packet to send
- * @param dev    Device info structure
- * @return Always returns zero
- */
-int cvm_oct_xmit(struct mbuf *m, struct ifnet *ifp)
-{
-	cvmx_pko_command_word0_t    pko_command;
-	cvmx_buf_ptr_t              hw_buffer;
-	int                         dropped;
-	int                         qos;
-	cvm_oct_private_t          *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int32_t in_use;
-	int32_t buffers_to_free;
-	cvmx_wqe_t *work;
-
-	/* Prefetch the private data structure.
-	   It is larger that one cache line */
-	CVMX_PREFETCH(priv, 0);
-
-	/* Start off assuming no drop */
-	dropped = 0;
-
-	/* The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to completely
-	   remove "qos" in the event neither interface supports multiple queues
-	   per port */
-	if ((CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 > 1) ||
-	    (CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 > 1)) {
-		qos = GET_MBUF_QOS(m);
-		if (qos <= 0)
-			qos = 0;
-		else if (qos >= cvmx_pko_get_num_queues(priv->port))
-			qos = 0;
-	} else
-		qos = 0;
-
-	/* The CN3XXX series of parts has an errata (GMX-401) which causes the
-	   GMX block to hang if a collision occurs towards the end of a
-	   <68 byte packet. As a workaround for this, we pad packets to be
-	   68 bytes whenever we are in half duplex mode. We don't handle
-	   the case of having a small packet but no room to add the padding.
-	   The kernel should always give us at least a cache line */
-	if (__predict_false(m->m_pkthdr.len < 64) && OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
-		cvmx_gmxx_prtx_cfg_t gmx_prt_cfg;
-		int interface = INTERFACE(priv->port);
-		int index = INDEX(priv->port);
-
-		if (interface < 2) {
-			/* We only need to pad packet in half duplex mode */
-			gmx_prt_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
-			if (gmx_prt_cfg.s.duplex == 0) {
-				static uint8_t pad[64];
-
-				if (!m_append(m, sizeof pad - m->m_pkthdr.len, pad))
-					printf("%s: unable to padd small packet.", __func__);
-			}
-		}
-	}
-
-#ifdef OCTEON_VENDOR_RADISYS
-	/*
-	 * The RSYS4GBE will hang if asked to transmit a packet less than 60 bytes.
-	 */
-	if (__predict_false(m->m_pkthdr.len < 60) &&
-	    cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE) {
-		static uint8_t pad[60];
-
-		if (!m_append(m, sizeof pad - m->m_pkthdr.len, pad))
-			printf("%s: unable to pad small packet.", __func__);
-	}
-#endif
-
-	/*
-	 * If the packet is not fragmented.
-	 */
-	if (m->m_pkthdr.len == m->m_len) {
-		/* Build the PKO buffer pointer */
-		hw_buffer.u64 = 0;
-		hw_buffer.s.addr = cvmx_ptr_to_phys(m->m_data);
-		hw_buffer.s.pool = 0;
-		hw_buffer.s.size = m->m_len;
-
-		/* Build the PKO command */
-		pko_command.u64 = 0;
-		pko_command.s.segs = 1;
-		pko_command.s.dontfree = 1; /* Do not put this buffer into the FPA.  */
-
-		work = NULL;
-	} else {
-		struct mbuf *n;
-		unsigned segs;
-		uint64_t *gp;
-
-		/*
-		 * The packet is fragmented, we need to send a list of segments
-		 * in memory we borrow from the WQE pool.
-		 */
-		work = cvmx_fpa_alloc(CVMX_FPA_WQE_POOL);
-		if (work == NULL) {
-			m_freem(m);
-			if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-			return 1;
-		}
-
-		segs = 0;
-		gp = (uint64_t *)work;
-		for (n = m; n != NULL; n = n->m_next) {
-			if (segs == CVMX_FPA_WQE_POOL_SIZE / sizeof (uint64_t))
-				panic("%s: too many segments in packet; call m_collapse().", __func__);
-
-			/* Build the PKO buffer pointer */
-			hw_buffer.u64 = 0;
-			hw_buffer.s.i = 1; /* Do not put this buffer into the FPA.  */
-			hw_buffer.s.addr = cvmx_ptr_to_phys(n->m_data);
-			hw_buffer.s.pool = 0;
-			hw_buffer.s.size = n->m_len;
-
-			*gp++ = hw_buffer.u64;
-			segs++;
-		}
-
-		/* Build the PKO buffer gather list pointer */
-		hw_buffer.u64 = 0;
-		hw_buffer.s.addr = cvmx_ptr_to_phys(work);
-		hw_buffer.s.pool = CVMX_FPA_WQE_POOL;
-		hw_buffer.s.size = segs;
-
-		/* Build the PKO command */
-		pko_command.u64 = 0;
-		pko_command.s.segs = segs;
-		pko_command.s.gather = 1;
-		pko_command.s.dontfree = 0; /* Put the WQE above back into the FPA.  */
-	}
-
-	/* Finish building the PKO command */
-	pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */
-	pko_command.s.reg0 = priv->fau+qos*4;
-	pko_command.s.total_bytes = m->m_pkthdr.len;
-	pko_command.s.size0 = CVMX_FAU_OP_SIZE_32;
-	pko_command.s.subone0 = 1;
-
-	/* Check if we can use the hardware checksumming */
-	if ((m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) != 0) {
-		/* Use hardware checksum calc */
-		pko_command.s.ipoffp1 = ETHER_HDR_LEN + 1;
-	}
-
-	/*
-	 * XXX
-	 * Could use a different free queue (and different FAU address) per
-	 * core instead of per QoS, to reduce contention here.
-	 */
-	IF_LOCK(&priv->tx_free_queue[qos]);
-	/* Get the number of mbufs in use by the hardware */
-	in_use = cvmx_fau_fetch_and_add32(priv->fau+qos*4, 1);
-	buffers_to_free = cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
-
-	cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, CVMX_PKO_LOCK_CMD_QUEUE);
-
-	/* Drop this packet if we have too many already queued to the HW */
-	if (_IF_QFULL(&priv->tx_free_queue[qos])) {
-		dropped = 1;
-	}
-	/* Send the packet to the output queue */
-	else
-	if (__predict_false(cvmx_pko_send_packet_finish(priv->port, priv->queue + qos, pko_command, hw_buffer, CVMX_PKO_LOCK_CMD_QUEUE))) {
-		DEBUGPRINT("%s: Failed to send the packet\n", if_name(ifp));
-		dropped = 1;
-	}
-
-	if (__predict_false(dropped)) {
-		m_freem(m);
-		cvmx_fau_atomic_add32(priv->fau+qos*4, -1);
-		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
-	} else {
-		/* Put this packet on the queue to be freed later */
-		_IF_ENQUEUE(&priv->tx_free_queue[qos], m);
-
-		/* Pass it to any BPF listeners.  */
-		ETHER_BPF_MTAP(ifp, m);
-
-		if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-		if_inc_counter(ifp, IFCOUNTER_OBYTES, m->m_pkthdr.len);
-	}
-
-	/* Free mbufs not in use by the hardware */
-	if (_IF_QLEN(&priv->tx_free_queue[qos]) > in_use) {
-		while (_IF_QLEN(&priv->tx_free_queue[qos]) > in_use) {
-			_IF_DEQUEUE(&priv->tx_free_queue[qos], m);
-			m_freem(m);
-		}
-	}
-	IF_UNLOCK(&priv->tx_free_queue[qos]);
-
-	return dropped;
-}
-
-/**
- * This function frees all mbufs that are currenty queued for TX.
- *
- * @param dev    Device being shutdown
- */
-void cvm_oct_tx_shutdown(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-	int qos;
-
-	for (qos = 0; qos < 16; qos++) {
-		IF_DRAIN(&priv->tx_free_queue[qos]);
-	}
-}
diff --git a/sys/mips/cavium/octe/ethernet-tx.h b/sys/mips/cavium/octe/ethernet-tx.h
deleted file mode 100644
index 4a8ad9064b2c..000000000000
--- a/sys/mips/cavium/octe/ethernet-tx.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*************************************************************************
- SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-int cvm_oct_xmit(struct mbuf *m, struct ifnet *ifp);
-void cvm_oct_tx_shutdown(struct ifnet *ifp);
diff --git a/sys/mips/cavium/octe/ethernet-util.h b/sys/mips/cavium/octe/ethernet-util.h
deleted file mode 100644
index 1a4144233c75..000000000000
--- a/sys/mips/cavium/octe/ethernet-util.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-#define DEBUGPRINT(format, ...) printf(format, ##__VA_ARGS__)
-
-/**
- * Given a packet data address, return a pointer to the
- * beginning of the packet buffer.
- *
- * @param packet_ptr Packet data hardware address
- * @return Packet buffer pointer
- */
-static inline char *cvm_oct_get_buffer_ptr(cvmx_buf_ptr_t packet_ptr)
-{
-	return cvmx_phys_to_ptr(((packet_ptr.s.addr >> 7) - packet_ptr.s.back) << 7);
-}
-
-/**
- * Given an IPD/PKO port number, return the logical interface it is
- * on.
- *
- * @param ipd_port Port to check
- *
- * @return Logical interface
- */
-static inline int INTERFACE(int ipd_port)
-{
-	if (ipd_port < 32)    /* Interface 0 or 1 for RGMII,GMII,SPI, etc */
-		return ipd_port>>4;
-	else if (ipd_port < 36)   /* Interface 2 for NPI */
-		return 2;
-	else if (ipd_port < 40)   /* Interface 3 for loopback */
-		return 3;
-	else if (ipd_port == 40)  /* Non existent interface for POW0 */
-		return 4;
-	else
-		panic("Illegal ipd_port %d passed to INTERFACE\n", ipd_port);
-}
-
-/**
- * Given an IPD/PKO port number, return the port's index on a
- * logical interface.
- *
- * @param ipd_port Port to check
- *
- * @return Index into interface port list
- */
-static inline int INDEX(int ipd_port)
-{
-	if (ipd_port < 32)
-		return ipd_port & 15;
-	else
-		return ipd_port & 3;
-}
diff --git a/sys/mips/cavium/octe/ethernet-xaui.c b/sys/mips/cavium/octe/ethernet-xaui.c
deleted file mode 100644
index e4c086e6c29c..000000000000
--- a/sys/mips/cavium/octe/ethernet-xaui.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-int cvm_oct_xaui_init(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
-
-	if (cvm_oct_common_init(ifp) != 0)
-	    return ENXIO;
-
-	priv->open = cvm_oct_common_open;
-	priv->stop = cvm_oct_common_stop;
-	priv->stop(ifp);
-
-	return 0;
-}
diff --git a/sys/mips/cavium/octe/ethernet.c b/sys/mips/cavium/octe/ethernet.c
deleted file mode 100644
index 50b69a128d76..000000000000
--- a/sys/mips/cavium/octe/ethernet.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-*************************************************************************/
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/rman.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/module.h>
-#include <sys/smp.h>
-#include <sys/taskqueue.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_types.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "ethernet-headers.h"
-
-#include "octebusvar.h"
-
-/*
- * XXX/juli
- * Convert 0444 to tunables, 0644 to sysctls.
- */
-#if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
-int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS;
-#else
-int num_packet_buffers = 2048;
-#endif
-TUNABLE_INT("hw.octe.num_packet_buffers", &num_packet_buffers);
-/*
-		 "\t\tNumber of packet buffers to allocate and store in the\n"
-		 "\t\tFPA. By default, 1024 packet buffers are used unless\n"
-		 "\t\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined." */
-
-int pow_receive_group = 15;
-TUNABLE_INT("hw.octe.pow_receive_group", &pow_receive_group);
-/*
-		 "\t\tPOW group to receive packets from. All ethernet hardware\n"
-		 "\t\twill be configured to send incomming packets to this POW\n"
-		 "\t\tgroup. Also any other software can submit packets to this\n"
-		 "\t\tgroup for the kernel to process." */
-
-/**
- * Periodic timer to check auto negotiation
- */
-static struct callout cvm_oct_poll_timer;
-
-/**
- * Array of every ethernet device owned by this driver indexed by
- * the ipd input port number.
- */
-struct ifnet *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
-
-/**
- * Task to handle link status changes.
- */
-static struct taskqueue *cvm_oct_link_taskq;
-
-/*
- * Number of buffers in output buffer pool.
- */
-static int cvm_oct_num_output_buffers;
-
-/**
- * Function to update link status.
- */
-static void cvm_oct_update_link(void *context, int pending)
-{
-	cvm_oct_private_t *priv = (cvm_oct_private_t *)context;
-	struct ifnet *ifp = priv->ifp;
-	cvmx_helper_link_info_t link_info;
-
-	link_info.u64 = priv->link_info;
-
-	if (link_info.s.link_up) {
-		if_link_state_change(ifp, LINK_STATE_UP);
-		DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, queue %2d\n",
-			   if_name(ifp), link_info.s.speed,
-			   (link_info.s.full_duplex) ? "Full" : "Half",
-			   priv->port, priv->queue);
-	} else {
-		if_link_state_change(ifp, LINK_STATE_DOWN);
-		DEBUGPRINT("%s: Link down\n", if_name(ifp));
-	}
-	priv->need_link_update = 0;
-}
-
-/**
- * Periodic timer tick for slow management operations
- *
- * @param arg    Device to check
- */
-static void cvm_do_timer(void *arg)
-{
-	static int port;
-	static int updated;
-	if (port < CVMX_PIP_NUM_INPUT_PORTS) {
-		if (cvm_oct_device[port]) {
-			int queues_per_port;
-			int qos;
-			cvm_oct_private_t *priv = (cvm_oct_private_t *)cvm_oct_device[port]->if_softc;
-
-			cvm_oct_common_poll(priv->ifp);
-			if (priv->need_link_update) {
-				updated++;
-				taskqueue_enqueue(cvm_oct_link_taskq, &priv->link_task);
-			}
-
-			queues_per_port = cvmx_pko_get_num_queues(port);
-			/* Drain any pending packets in the free list */
-			for (qos = 0; qos < queues_per_port; qos++) {
-				if (_IF_QLEN(&priv->tx_free_queue[qos]) > 0) {
-					IF_LOCK(&priv->tx_free_queue[qos]);
-					while (_IF_QLEN(&priv->tx_free_queue[qos]) > cvmx_fau_fetch_and_add32(priv->fau+qos*4, 0)) {
-						struct mbuf *m;
-
-						_IF_DEQUEUE(&priv->tx_free_queue[qos], m);
-						m_freem(m);
-					}
-					IF_UNLOCK(&priv->tx_free_queue[qos]);
-
-					/*
-					 * XXX locking!
-					 */
-					priv->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-				}
-			}
-		}
-		port++;
-		/* Poll the next port in a 50th of a second.
-		   This spreads the polling of ports out a little bit */
-		callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL);
-	} else {
-		port = 0;
-		/* If any updates were made in this run, continue iterating at
-		 * 1/50th of a second, so that if a link has merely gone down
-		 * temporarily (e.g. because of interface reinitialization) it
-		 * will not be forced to stay down for an entire second.
-		 */
-		if (updated > 0) {
-			updated = 0;
-			callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL);
-		} else {
-			/* All ports have been polled. Start the next iteration through
-			   the ports in one second */
-			callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL);
-		}
-	}
-}
-
-/**
- * Configure common hardware for all interfaces
- */
-static void cvm_oct_configure_common_hw(device_t bus)
-{
-	struct octebus_softc *sc;
-	int pko_queues;
-	int error;
-	int rid;
-
-        sc = device_get_softc(bus);
-
-	/* Setup the FPA */
-	cvmx_fpa_enable();
-	cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
-			     num_packet_buffers);
-	cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
-			     num_packet_buffers);
-	if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) {
-		/*
-		 * If the FPA uses different pools for output buffers and
-		 * packets, size the output buffer pool based on the number
-		 * of PKO queues.
-		 */
-		if (OCTEON_IS_MODEL(OCTEON_CN38XX))
-			pko_queues = 128;
-		else if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
-			pko_queues = 32;
-		else if (OCTEON_IS_MODEL(OCTEON_CN50XX))
-			pko_queues = 32;
-		else
-			pko_queues = 256;
-
-		cvm_oct_num_output_buffers = 4 * pko_queues;
-		cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
-				     CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE,
-				     cvm_oct_num_output_buffers);
-	}
-
-	if (USE_RED)
-		cvmx_helper_setup_red(num_packet_buffers/4,
-				      num_packet_buffers/8);
-
-	/* Enable the MII interface */
-	if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM)
-		cvmx_write_csr(CVMX_SMI_EN, 1);
-
-	/* Register an IRQ hander for to receive POW interrupts */
-        rid = 0;
-        sc->sc_rx_irq = bus_alloc_resource(bus, SYS_RES_IRQ, &rid,
-					   OCTEON_IRQ_WORKQ0 + pow_receive_group,
-					   OCTEON_IRQ_WORKQ0 + pow_receive_group,
-					   1, RF_ACTIVE);
-        if (sc->sc_rx_irq == NULL) {
-                device_printf(bus, "could not allocate workq irq");
-		return;
-        }
-
-        error = bus_setup_intr(bus, sc->sc_rx_irq, INTR_TYPE_NET | INTR_MPSAFE,
-			       cvm_oct_do_interrupt, NULL, cvm_oct_device,
-			       &sc->sc_rx_intr_cookie);
-        if (error != 0) {
-                device_printf(bus, "could not setup workq irq");
-		return;
-        }
-
-#ifdef SMP
-	{
-		cvmx_ciu_intx0_t en;
-		int core;
-
-		CPU_FOREACH(core) {
-			if (core == PCPU_GET(cpuid))
-				continue;
-
-			en.u64 = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2));
-			en.s.workq |= (1<<pow_receive_group);
-			cvmx_write_csr(CVMX_CIU_INTX_EN0(core*2), en.u64);
-		}
-	}
-#endif
-}
-
-/**
- * Free a work queue entry received in a intercept callback.
- *
- * @param work_queue_entry
- *               Work queue entry to free
- * @return Zero on success, Negative on failure.
- */
-int cvm_oct_free_work(void *work_queue_entry)
-{
-	cvmx_wqe_t *work = work_queue_entry;
-
-	int segments = work->word2.s.bufs;
-	cvmx_buf_ptr_t segment_ptr = work->packet_ptr;
-
-	while (segments--) {
-		cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8);
-		if (__predict_false(!segment_ptr.s.i))
-			cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), segment_ptr.s.pool, DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE/128));
-		segment_ptr = next_ptr;
-	}
-	cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1));
-
-	return 0;
-}
-
-/**
- * Module/ driver initialization. Creates the linux network
- * devices.
- *
- * @return Zero on success
- */
-int cvm_oct_init_module(device_t bus)
-{
-	device_t dev;
-	int ifnum;
-	int num_interfaces;
-	int interface;
-	int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
-	int qos;
-
-	cvm_oct_rx_initialize();
-	cvm_oct_configure_common_hw(bus);
-
-	cvmx_helper_initialize_packet_io_global();
-
-	/* Change the input group for all ports before input is enabled */
-	num_interfaces = cvmx_helper_get_number_of_interfaces();
-	for (interface = 0; interface < num_interfaces; interface++) {
-		int num_ports = cvmx_helper_ports_on_interface(interface);
-		int port;
-
-		for (port = 0; port < num_ports; port++) {
-			cvmx_pip_prt_tagx_t pip_prt_tagx;
-			int pkind = cvmx_helper_get_ipd_port(interface, port);
-
-			pip_prt_tagx.u64 = cvmx_read_csr(CVMX_PIP_PRT_TAGX(pkind));
-			pip_prt_tagx.s.grp = pow_receive_group;
-			cvmx_write_csr(CVMX_PIP_PRT_TAGX(pkind), pip_prt_tagx.u64);
-		}
-	}
-
-	cvmx_helper_ipd_and_packet_input_enable();
-
-	memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
-
-	cvm_oct_link_taskq = taskqueue_create("octe link", M_NOWAIT,
-	    taskqueue_thread_enqueue, &cvm_oct_link_taskq);
-	taskqueue_start_threads(&cvm_oct_link_taskq, 1, PI_NET,
-	    "octe link taskq");
-
-	/* Initialize the FAU used for counting packet buffers that need to be freed */
-	cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
-
-	ifnum = 0;
-	num_interfaces = cvmx_helper_get_number_of_interfaces();
-	for (interface = 0; interface < num_interfaces; interface++) {
-		cvmx_helper_interface_mode_t imode = cvmx_helper_interface_get_mode(interface);
-		int num_ports = cvmx_helper_ports_on_interface(interface);
-		int port;
-
-		for (port = cvmx_helper_get_ipd_port(interface, 0);
-		     port < cvmx_helper_get_ipd_port(interface, num_ports);
-		     ifnum++, port++) {
-			cvm_oct_private_t *priv;
-			struct ifnet *ifp;
-			
-			dev = BUS_ADD_CHILD(bus, 0, "octe", ifnum);
-			if (dev != NULL)
-				ifp = if_alloc(IFT_ETHER);
-			if (dev == NULL || ifp == NULL) {
-				printf("Failed to allocate ethernet device for interface %d port %d\n", interface, port);
-				continue;
-			}
-
-			/* Initialize the device private structure. */
-			device_probe(dev);
-			priv = device_get_softc(dev);
-			priv->dev = dev;
-			priv->ifp = ifp;
-			priv->imode = imode;
-			priv->port = port;
-			priv->queue = cvmx_pko_get_base_queue(priv->port);
-			priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
-			for (qos = 0; qos < cvmx_pko_get_num_queues(port); qos++)
-				cvmx_fau_atomic_write32(priv->fau+qos*4, 0);
-			TASK_INIT(&priv->link_task, 0, cvm_oct_update_link, priv);
-
-			switch (priv->imode) {
-			/* These types don't support ports to IPD/PKO */
-			case CVMX_HELPER_INTERFACE_MODE_DISABLED:
-			case CVMX_HELPER_INTERFACE_MODE_PCIE:
-			case CVMX_HELPER_INTERFACE_MODE_PICMG:
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_NPI:
-				priv->init = cvm_oct_common_init;
-				priv->uninit = cvm_oct_common_uninit;
-				device_set_desc(dev, "Cavium Octeon NPI Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_XAUI:
-				priv->init = cvm_oct_xaui_init;
-				priv->uninit = cvm_oct_common_uninit;
-				device_set_desc(dev, "Cavium Octeon XAUI Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_LOOP:
-				priv->init = cvm_oct_common_init;
-				priv->uninit = cvm_oct_common_uninit;
-				device_set_desc(dev, "Cavium Octeon LOOP Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_SGMII:
-				priv->init = cvm_oct_sgmii_init;
-				priv->uninit = cvm_oct_common_uninit;
-				device_set_desc(dev, "Cavium Octeon SGMII Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_SPI:
-				priv->init = cvm_oct_spi_init;
-				priv->uninit = cvm_oct_spi_uninit;
-				device_set_desc(dev, "Cavium Octeon SPI Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_RGMII:
-				priv->init = cvm_oct_rgmii_init;
-				priv->uninit = cvm_oct_rgmii_uninit;
-				device_set_desc(dev, "Cavium Octeon RGMII Ethernet");
-				break;
-
-			case CVMX_HELPER_INTERFACE_MODE_GMII:
-				priv->init = cvm_oct_rgmii_init;
-				priv->uninit = cvm_oct_rgmii_uninit;
-				device_set_desc(dev, "Cavium Octeon GMII Ethernet");
-				break;
-			}
-
-			ifp->if_softc = priv;
-
-			if (!priv->init) {
-				printf("octe%d: unsupported device type interface %d, port %d\n",
-				       ifnum, interface, priv->port);
-				if_free(ifp);
-			} else if (priv->init(ifp) != 0) {
-				printf("octe%d: failed to register device for interface %d, port %d\n",
-				       ifnum, interface, priv->port);
-				if_free(ifp);
-			} else {
-				cvm_oct_device[priv->port] = ifp;
-				fau -= cvmx_pko_get_num_queues(priv->port) * sizeof(uint32_t);
-			}
-		}
-	}
-
-	if (INTERRUPT_LIMIT) {
-		/* Set the POW timer rate to give an interrupt at most INTERRUPT_LIMIT times per second */
-		cvmx_write_csr(CVMX_POW_WQ_INT_PC, cvmx_clock_get_rate(CVMX_CLOCK_CORE)/((INTERRUPT_LIMIT+1)*16*256)<<8);
-
-		/* Enable POW timer interrupt. It will count when there are packets available */
-		cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1ful<<24);
-	} else {
-		/* Enable POW interrupt when our port has at least one packet */
-		cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001);
-	}
-
-	callout_init(&cvm_oct_poll_timer, 1);
-	callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL);
-
-	return 0;
-}
-
-/**
- * Module / driver shutdown
- *
- * @return Zero on success
- */
-void cvm_oct_cleanup_module(device_t bus)
-{
-	int port;
-	struct octebus_softc *sc = device_get_softc(bus);
-
-	/* Disable POW interrupt */
-	cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0);
-
-	/* Free the interrupt handler */
-	bus_teardown_intr(bus, sc->sc_rx_irq, sc->sc_rx_intr_cookie);
-
-	callout_stop(&cvm_oct_poll_timer);
-	cvm_oct_rx_shutdown();
-
-	cvmx_helper_shutdown_packet_io_global();
-
-	/* Free the ethernet devices */
-	for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
-		if (cvm_oct_device[port]) {
-			cvm_oct_tx_shutdown(cvm_oct_device[port]);
-#if 0
-			unregister_netdev(cvm_oct_device[port]);
-			kfree(cvm_oct_device[port]);
-#else
-			panic("%s: need to detach and free interface.", __func__);
-#endif
-			cvm_oct_device[port] = NULL;
-		}
-	}
-	/* Free the HW pools */
-	cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, num_packet_buffers);
-	cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, num_packet_buffers);
-
-	if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
-		cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, cvm_oct_num_output_buffers);
-
-	/* Disable FPA, all buffers are free, not done by helper shutdown. */
-	cvmx_fpa_disable();
-}
diff --git a/sys/mips/cavium/octe/mv88e61xxphy.c b/sys/mips/cavium/octe/mv88e61xxphy.c
deleted file mode 100644
index ff03bb8f0e05..000000000000
--- a/sys/mips/cavium/octe/mv88e61xxphy.c
+++ /dev/null
@@ -1,631 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * Driver for the Marvell 88E61xx family of switch PHYs
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/errno.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/sysctl.h>
-
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_media.h>
-
-#include "miibus_if.h"
-
-#include "mv88e61xxphyreg.h"
-
-struct mv88e61xxphy_softc;
-
-struct mv88e61xxphy_port_softc {
-	struct mv88e61xxphy_softc *sc_switch;
-	unsigned sc_port;
-	unsigned sc_domain;
-	unsigned sc_vlan;
-	unsigned sc_priority;
-	unsigned sc_flags;
-};
-
-#define	MV88E61XXPHY_PORT_FLAG_VTU_UPDATE	(0x0001)
-
-struct mv88e61xxphy_softc {
-	device_t sc_dev;
-	struct mv88e61xxphy_port_softc sc_ports[MV88E61XX_PORTS];
-};
-
-enum mv88e61xxphy_vtu_membership_type {
-	MV88E61XXPHY_VTU_UNMODIFIED,
-	MV88E61XXPHY_VTU_UNTAGGED,
-	MV88E61XXPHY_VTU_TAGGED,
-	MV88E61XXPHY_VTU_DISCARDED,
-};
-
-enum mv88e61xxphy_sysctl_link_type {
-	MV88E61XXPHY_LINK_SYSCTL_DUPLEX,
-	MV88E61XXPHY_LINK_SYSCTL_LINK,
-	MV88E61XXPHY_LINK_SYSCTL_MEDIA,
-};
-
-enum mv88e61xxphy_sysctl_port_type {
-	MV88E61XXPHY_PORT_SYSCTL_DOMAIN,
-	MV88E61XXPHY_PORT_SYSCTL_VLAN,
-	MV88E61XXPHY_PORT_SYSCTL_PRIORITY,
-};
-
-/*
- * Register access macros.
- */
-#define	MV88E61XX_READ(sc, phy, reg)					\
-	MIIBUS_READREG(device_get_parent((sc)->sc_dev), (phy), (reg))
-
-#define	MV88E61XX_WRITE(sc, phy, reg, val)				\
-	MIIBUS_WRITEREG(device_get_parent((sc)->sc_dev), (phy), (reg), (val))
-
-#define	MV88E61XX_READ_PORT(psc, reg)					\
-	MV88E61XX_READ((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg))
-
-#define	MV88E61XX_WRITE_PORT(psc, reg, val)				\
-	MV88E61XX_WRITE((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg), (val))
-
-static int mv88e61xxphy_probe(device_t);
-static int mv88e61xxphy_attach(device_t);
-
-static void mv88e61xxphy_init(struct mv88e61xxphy_softc *);
-static void mv88e61xxphy_init_port(struct mv88e61xxphy_port_softc *);
-static void mv88e61xxphy_init_vtu(struct mv88e61xxphy_softc *);
-static int mv88e61xxphy_sysctl_link_proc(SYSCTL_HANDLER_ARGS);
-static int mv88e61xxphy_sysctl_port_proc(SYSCTL_HANDLER_ARGS);
-static void mv88e61xxphy_vtu_load(struct mv88e61xxphy_softc *, uint16_t);
-static void mv88e61xxphy_vtu_set_membership(struct mv88e61xxphy_softc *, unsigned, enum mv88e61xxphy_vtu_membership_type);
-static void mv88e61xxphy_vtu_wait(struct mv88e61xxphy_softc *);
-
-static int
-mv88e61xxphy_probe(device_t dev)
-{
-	uint16_t val;
-
-	val = MIIBUS_READREG(device_get_parent(dev), MV88E61XX_PORT(0),
-	    MV88E61XX_PORT_REVISION);
-	switch (val >> 4) {
-	case 0x121:
-		device_set_desc(dev, "Marvell Link Street 88E6123 3-Port Gigabit Switch");
-		return (0);
-	case 0x161:
-		device_set_desc(dev, "Marvell Link Street 88E6161 6-Port Gigabit Switch");
-		return (0);
-	case 0x165:
-		device_set_desc(dev, "Marvell Link Street 88E6161 6-Port Advanced Gigabit Switch");
-		return (0);
-	default:
-		return (ENXIO);
-	}
-}
-
-static int
-mv88e61xxphy_attach(device_t dev)
-{
-	char portbuf[] = "N";
-	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
-	struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
-	struct sysctl_oid *port_node, *portN_node;
-	struct sysctl_oid_list *port_tree, *portN_tree;
-	struct mv88e61xxphy_softc *sc;
-	unsigned port;
-
-	sc = device_get_softc(dev);
-	sc->sc_dev = dev;
-
-	/*
-	 * Initialize port softcs.
-	 */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-		psc->sc_switch = sc;
-		psc->sc_port = port;
-		psc->sc_domain = 0; /* One broadcast domain by default.  */
-		psc->sc_vlan = port + 1; /* Tag VLANs by default.  */
-		psc->sc_priority = 0; /* No default special priority.  */
-		psc->sc_flags = 0;
-	}
-
-	/*
-	 * Add per-port sysctl tree/handlers.
-	 */
-	port_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "port",
-	    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Switch Ports");
-	port_tree = SYSCTL_CHILDREN(port_node);
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-
-		portbuf[0] = '0' + port;
-		portN_node = SYSCTL_ADD_NODE(ctx, port_tree, OID_AUTO, portbuf,
-		    CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Switch Port");
-		portN_tree = SYSCTL_CHILDREN(portN_node);
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "duplex",
-		    CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_LINK_SYSCTL_DUPLEX,
-		    mv88e61xxphy_sysctl_link_proc, "IU",
-		    "Media duplex status (0 = half duplex; 1 = full duplex)");
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "link",
-		    CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_LINK_SYSCTL_LINK,
-		    mv88e61xxphy_sysctl_link_proc, "IU",
-		    "Link status (0 = down; 1 = up)");
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "media",
-		    CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_LINK_SYSCTL_MEDIA,
-		    mv88e61xxphy_sysctl_link_proc, "IU",
-		    "Media speed (0 = unknown; 10 = 10Mbps; 100 = 100Mbps; 1000 = 1Gbps)");
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "domain",
-		    CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_PORT_SYSCTL_DOMAIN,
-		    mv88e61xxphy_sysctl_port_proc, "IU",
-		    "Broadcast domain (ports can only talk to other ports in the same domain)");
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "vlan",
-		    CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_PORT_SYSCTL_VLAN,
-		    mv88e61xxphy_sysctl_port_proc, "IU",
-		    "Tag packets from/for this port with a given VLAN.");
-
-		SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "priority",
-		    CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc,
-		    MV88E61XXPHY_PORT_SYSCTL_PRIORITY,
-		    mv88e61xxphy_sysctl_port_proc, "IU",
-		    "Default packet priority for this port.");
-	}
-
-	mv88e61xxphy_init(sc);
-
-	return (0);
-}
-
-static void
-mv88e61xxphy_init(struct mv88e61xxphy_softc *sc)
-{
-	unsigned port;
-	uint16_t val;
-	unsigned i;
-
-	/* Disable all ports.  */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-
-		val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_CONTROL);
-		val &= ~0x3;
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val);
-	}
-
-	DELAY(2000);
-
-	/* Reset the switch.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_CONTROL, 0xc400);
-	for (i = 0; i < 100; i++) {
-		val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_STATUS);
-		if ((val & 0xc800) == 0xc800)
-			break;
-		DELAY(10);
-	}
-	if (i == 100) {
-		device_printf(sc->sc_dev, "%s: switch reset timed out.\n", __func__);
-		return;
-	}
-
-	/* Disable PPU.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_CONTROL, 0x0000);
-
-	/* Configure host port and send monitor frames to it.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_MONITOR,
-	    (MV88E61XX_HOST_PORT << 12) | (MV88E61XX_HOST_PORT << 8) |
-	    (MV88E61XX_HOST_PORT << 4));
-
-	/* Disable remote management.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_REMOTE_MGMT, 0x0000);
-
-	/* Send all specifically-addressed frames to the host port.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_MANAGE_2X, 0xffff);
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_MANAGE_0X, 0xffff);
-
-	/* Remove provider-supplied tag and use it for switching.  */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_CONTROL2,
-	    MV88E61XX_GLOBAL2_CONTROL2_REMOVE_PTAG);
-
-	/* Configure all ports.  */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-		mv88e61xxphy_init_port(psc);
-	}
-
-	/* Reprogram VLAN table (VTU.)  */
-	mv88e61xxphy_init_vtu(sc);
-
-	/* Enable all ports.  */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-
-		val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_CONTROL);
-		val |= 0x3;
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val);
-	}
-}
-
-static void
-mv88e61xxphy_init_port(struct mv88e61xxphy_port_softc *psc)
-{
-	struct mv88e61xxphy_softc *sc;
-	unsigned allow_mask;
-
-	sc = psc->sc_switch;
-
-	/* Set media type and flow control.  */
-	if (psc->sc_port != MV88E61XX_HOST_PORT) {
-		/* Don't force any media type or flow control.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x0003);
-	} else {
-		/* Make CPU port 1G FDX.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x003e);
-	}
-
-	/* Don't limit flow control pauses.  */
-	MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PAUSE_CONTROL, 0x0000);
-
-	/* Set various port functions per Linux.  */
-	if (psc->sc_port != MV88E61XX_HOST_PORT) {
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x04bc);
-	} else {
-		/*
-		 * Send frames for unknown unicast and multicast groups to
-		 * host, too.
-		 */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x063f);
-	}
-
-	if (psc->sc_port != MV88E61XX_HOST_PORT) {
-		/* Disable trunking.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x0000);
-	} else {
-		/* Disable trunking and send learn messages to host.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x8000);
-	}
-
-	/*
-	 * Port-based VLAN map; isolates MAC tables and forces ports to talk
-	 * only to the host.
-	 *
-	 * Always allow the host to send to all ports and allow all ports to
-	 * send to the host.
-	 */
-	if (psc->sc_port != MV88E61XX_HOST_PORT) {
-		allow_mask = 1 << MV88E61XX_HOST_PORT;
-	} else {
-		allow_mask = (1 << MV88E61XX_PORTS) - 1;
-		allow_mask &= ~(1 << MV88E61XX_HOST_PORT);
-	}
-	MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN_MAP,
-	    (psc->sc_domain << 12) | allow_mask);
-
-	/* VLAN tagging.  Set default priority and VLAN tag (or none.)  */
-	MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN,
-	    (psc->sc_priority << 14) | psc->sc_vlan);
-
-	if (psc->sc_port == MV88E61XX_HOST_PORT) {
-		/* Set provider ingress tag.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PROVIDER_PROTO,
-		    ETHERTYPE_VLAN);
-
-		/* Set provider egress tag.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_ETHER_PROTO,
-		    ETHERTYPE_VLAN);
-
-		/* Use secure 802.1q mode and accept only tagged frames.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER,
-		    MV88E61XX_PORT_FILTER_MAP_DEST |
-		    MV88E61XX_PORT_FILTER_8021Q_SECURE |
-		    MV88E61XX_PORT_FILTER_DISCARD_UNTAGGED);
-	} else {
-		/* Don't allow tagged frames.  */
-		MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER,
-		    MV88E61XX_PORT_FILTER_MAP_DEST |
-		    MV88E61XX_PORT_FILTER_DISCARD_TAGGED);
-	}
-}
-
-static void
-mv88e61xxphy_init_vtu(struct mv88e61xxphy_softc *sc)
-{
-	unsigned port;
-
-	/*
-	 * Start flush of the VTU.
-	 */
-	mv88e61xxphy_vtu_wait(sc);
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP,
-	    MV88E61XX_GLOBAL_VTU_OP_BUSY | MV88E61XX_GLOBAL_VTU_OP_OP_FLUSH);
-
-	/*
-	 * Queue each port's VLAN to be programmed.
-	 */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-		psc->sc_flags &= ~MV88E61XXPHY_PORT_FLAG_VTU_UPDATE;
-		if (psc->sc_vlan == 0)
-			continue;
-		psc->sc_flags |= MV88E61XXPHY_PORT_FLAG_VTU_UPDATE;
-	}
-
-	/*
-	 * Program each VLAN that is in use.
-	 */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-		if ((psc->sc_flags & MV88E61XXPHY_PORT_FLAG_VTU_UPDATE) == 0)
-			continue;
-		mv88e61xxphy_vtu_load(sc, psc->sc_vlan);
-	}
-
-	/*
-	 * Wait for last pending VTU operation to complete.
-	 */
-	mv88e61xxphy_vtu_wait(sc);
-}
-
-static int
-mv88e61xxphy_sysctl_link_proc(SYSCTL_HANDLER_ARGS)
-{
-	struct mv88e61xxphy_port_softc *psc = arg1;
-	enum mv88e61xxphy_sysctl_link_type type = arg2;
-	uint16_t val;
-	unsigned out;
-
-	val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_STATUS);
-	switch (type) {
-	case MV88E61XXPHY_LINK_SYSCTL_DUPLEX:
-		if ((val & MV88E61XX_PORT_STATUS_DUPLEX) != 0)
-			out = 1;
-		else
-			out = 0;
-		break;
-	case MV88E61XXPHY_LINK_SYSCTL_LINK:
-		if ((val & MV88E61XX_PORT_STATUS_LINK) != 0)
-			out = 1;
-		else
-			out = 0;
-		break;
-	case MV88E61XXPHY_LINK_SYSCTL_MEDIA:
-		switch (val & MV88E61XX_PORT_STATUS_MEDIA) {
-		case MV88E61XX_PORT_STATUS_MEDIA_10M:
-			out = 10;
-			break;
-		case MV88E61XX_PORT_STATUS_MEDIA_100M:
-			out = 100;
-			break;
-		case MV88E61XX_PORT_STATUS_MEDIA_1G:
-			out = 1000;
-			break;
-		default:
-			out = 0;
-			break;
-		}
-		break;
-	default:
-		return (EINVAL);
-	}
-	return (sysctl_handle_int(oidp, NULL, out, req));
-}
-
-static int
-mv88e61xxphy_sysctl_port_proc(SYSCTL_HANDLER_ARGS)
-{
-	struct mv88e61xxphy_port_softc *psc = arg1;
-	enum mv88e61xxphy_sysctl_port_type type = arg2;
-	struct mv88e61xxphy_softc *sc = psc->sc_switch;
-	unsigned max, val, *valp;
-	int error;
-
-	switch (type) {
-	case MV88E61XXPHY_PORT_SYSCTL_DOMAIN:
-		valp = &psc->sc_domain;
-		max = 0xf;
-		break;
-	case MV88E61XXPHY_PORT_SYSCTL_VLAN:
-		valp = &psc->sc_vlan;
-		max = 0x1000;
-		break;
-	case MV88E61XXPHY_PORT_SYSCTL_PRIORITY:
-		valp = &psc->sc_priority;
-		max = 3;
-		break;
-	default:
-		return (EINVAL);
-	}
-
-	val = *valp;
-	error = sysctl_handle_int(oidp, &val, 0, req);
-	if (error != 0 || req->newptr == NULL)
-		return (error);
-
-	/* Bounds check value.  */
-	if (val >= max)
-		return (EINVAL);
-
-	/* Reinitialize switch with new value.  */
-	*valp = val;
-	mv88e61xxphy_init(sc);
-
-	return (0);
-}
-
-static void
-mv88e61xxphy_vtu_load(struct mv88e61xxphy_softc *sc, uint16_t vid)
-{
-	unsigned port;
-
-	/*
-	 * Wait for previous operation to complete.
-	 */
-	mv88e61xxphy_vtu_wait(sc);
-
-	/*
-	 * Set VID.
-	 */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_VID,
-	    MV88E61XX_GLOBAL_VTU_VID_VALID | vid);
-
-	/*
-	 * Add ports to this VTU.
-	 */
-	for (port = 0; port < MV88E61XX_PORTS; port++) {
-		struct mv88e61xxphy_port_softc *psc;
-
-		psc = &sc->sc_ports[port];
-		if (psc->sc_vlan == vid) {
-			/*
-			 * Send this port its VLAN traffic untagged.
-			 */
-			psc->sc_flags &= ~MV88E61XXPHY_PORT_FLAG_VTU_UPDATE;
-			mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_UNTAGGED);
-		} else if (psc->sc_port == MV88E61XX_HOST_PORT) {
-			/*
-			 * The host sees all VLANs tagged.
-			 */
-			mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_TAGGED);
-		} else {
-			/*
-			 * This port isn't on this VLAN.
-			 */
-			mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_DISCARDED);
-		}
-	}
-
-	/*
-	 * Start adding this entry.
-	 */
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP,
-	    MV88E61XX_GLOBAL_VTU_OP_BUSY |
-	    MV88E61XX_GLOBAL_VTU_OP_OP_VTU_LOAD);
-}
-
-static void
-mv88e61xxphy_vtu_set_membership(struct mv88e61xxphy_softc *sc, unsigned port,
-    enum mv88e61xxphy_vtu_membership_type type)
-{
-	unsigned shift, reg;
-	uint16_t bits;
-	uint16_t val;
-
-	switch (type) {
-	case MV88E61XXPHY_VTU_UNMODIFIED:
-		bits = 0;
-		break;
-	case MV88E61XXPHY_VTU_UNTAGGED:
-		bits = 1;
-		break;
-	case MV88E61XXPHY_VTU_TAGGED:
-		bits = 2;
-		break;
-	case MV88E61XXPHY_VTU_DISCARDED:
-		bits = 3;
-		break;
-	default:
-		return;
-	}
-
-	if (port < 4) {
-		reg = MV88E61XX_GLOBAL_VTU_DATA_P0P3;
-		shift = port * 4;
-	} else {
-		reg = MV88E61XX_GLOBAL_VTU_DATA_P4P5;
-		shift = (port - 4) * 4;
-	}
-
-	val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, reg);
-	val |= bits << shift;
-	MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, reg, val);
-}
-
-static void
-mv88e61xxphy_vtu_wait(struct mv88e61xxphy_softc *sc)
-{
-	uint16_t val;
-
-	for (;;) {
-		val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP);
-		if ((val & MV88E61XX_GLOBAL_VTU_OP_BUSY) == 0)
-			return;
-	}
-}
-
-static device_method_t mv88e61xxphy_methods[] = {
-	/* device interface */
-	DEVMETHOD(device_probe,		mv88e61xxphy_probe),
-	DEVMETHOD(device_attach,	mv88e61xxphy_attach),
-	DEVMETHOD(device_detach,	bus_generic_detach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	{ 0, 0 }
-};
-
-static devclass_t mv88e61xxphy_devclass;
-
-static driver_t mv88e61xxphy_driver = {
-	"mv88e61xxphy",
-	mv88e61xxphy_methods,
-	sizeof(struct mv88e61xxphy_softc)
-};
-
-DRIVER_MODULE(mv88e61xxphy, octe, mv88e61xxphy_driver, mv88e61xxphy_devclass, 0, 0);
diff --git a/sys/mips/cavium/octe/mv88e61xxphyreg.h b/sys/mips/cavium/octe/mv88e61xxphyreg.h
deleted file mode 100644
index 022e66242998..000000000000
--- a/sys/mips/cavium/octe/mv88e61xxphyreg.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Register definitions for Marvell MV88E61XX
- *
- * Note that names and definitions were gleaned from Linux and U-Boot patches
- * released by Marvell, often by looking at contextual use of the registers
- * involved, and may not be representative of the full functionality of those
- * registers and are certainly not an exhaustive enumeration of registers.
- *
- * For an exhaustive enumeration of registers, check out the QD-DSDT package
- * included in the Marvell ARM Feroceon Board Support Package for Linux.
- */
-
-#ifndef	_MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_
-#define	_MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_
-
-/*
- * Port addresses & per-port registers.
- */
-#define	MV88E61XX_PORT(x)	(0x10 + (x))
-#define	MV88E61XX_HOST_PORT	(5)
-#define	MV88E61XX_PORTS		(6)
-
-#define	MV88E61XX_PORT_STATUS		(0x00)
-#define	MV88E61XX_PORT_FORCE_MAC	(0x01)
-#define	MV88E61XX_PORT_PAUSE_CONTROL	(0x02)
-#define	MV88E61XX_PORT_REVISION		(0x03)
-#define	MV88E61XX_PORT_CONTROL		(0x04)
-#define	MV88E61XX_PORT_CONTROL2		(0x05)
-#define	MV88E61XX_PORT_VLAN_MAP		(0x06)
-#define	MV88E61XX_PORT_VLAN		(0x07)
-#define	MV88E61XX_PORT_FILTER		(0x08)
-#define	MV88E61XX_PORT_EGRESS_CONTROL	(0x09)
-#define	MV88E61XX_PORT_EGRESS_CONTROL2	(0x0a)
-#define	MV88E61XX_PORT_PORT_LEARN	(0x0b)
-#define	MV88E61XX_PORT_ATU_CONTROL	(0x0c)
-#define	MV88E61XX_PORT_PRIORITY_CONTROL	(0x0d)
-#define	MV88E61XX_PORT_ETHER_PROTO	(0x0f)
-#define	MV88E61XX_PORT_PROVIDER_PROTO	(0x1a)
-#define	MV88E61XX_PORT_PRIORITY_MAP	(0x18)
-#define	MV88E61XX_PORT_PRIORITY_MAP2	(0x19)
-
-/*
- * Fields and values in each register.
- */
-#define	MV88E61XX_PORT_STATUS_MEDIA		(0x0300)
-#define	MV88E61XX_PORT_STATUS_MEDIA_10M		(0x0000)
-#define	MV88E61XX_PORT_STATUS_MEDIA_100M	(0x0100)
-#define	MV88E61XX_PORT_STATUS_MEDIA_1G		(0x0200)
-#define	MV88E61XX_PORT_STATUS_DUPLEX		(0x0400)
-#define	MV88E61XX_PORT_STATUS_LINK		(0x0800)
-#define	MV88E61XX_PORT_STATUS_FC		(0x8000)
-
-#define	MV88E61XX_PORT_CONTROL_DOUBLE_TAG	(0x0200)
-
-#define	MV88E61XX_PORT_FILTER_MAP_DEST		(0x0080)
-#define	MV88E61XX_PORT_FILTER_DISCARD_UNTAGGED	(0x0100)
-#define	MV88E61XX_PORT_FILTER_DISCARD_TAGGED	(0x0200)
-#define	MV88E61XX_PORT_FILTER_8021Q_MODE	(0x0c00)
-#define	MV88E61XX_PORT_FILTER_8021Q_DISABLED	(0x0000)
-#define	MV88E61XX_PORT_FILTER_8021Q_FALLBACK	(0x0400)
-#define	MV88E61XX_PORT_FILTER_8021Q_CHECK	(0x0800)
-#define	MV88E61XX_PORT_FILTER_8021Q_SECURE	(0x0c00)
-
-/*
- * Global address & global registers.
- */
-#define	MV88E61XX_GLOBAL	(0x1b)
-
-#define	MV88E61XX_GLOBAL_STATUS		(0x00)
-#define	MV88E61XX_GLOBAL_CONTROL	(0x04)
-#define	MV88E61XX_GLOBAL_VTU_OP		(0x05)
-#define	MV88E61XX_GLOBAL_VTU_VID	(0x06)
-#define	MV88E61XX_GLOBAL_VTU_DATA_P0P3	(0x07)
-#define	MV88E61XX_GLOBAL_VTU_DATA_P4P5	(0x08)
-#define	MV88E61XX_GLOBAL_ATU_CONTROL	(0x0a)
-#define	MV88E61XX_GLOBAL_PRIORITY_MAP	(0x18)
-#define	MV88E61XX_GLOBAL_MONITOR	(0x1a)
-#define	MV88E61XX_GLOBAL_REMOTE_MGMT	(0x1c)
-#define	MV88E61XX_GLOBAL_STATS		(0x1d)
-
-/*
- * Fields and values in each register.
- */
-#define	MV88E61XX_GLOBAL_VTU_OP_BUSY		(0x8000)
-#define	MV88E61XX_GLOBAL_VTU_OP_OP		(0x7000)
-#define	MV88E61XX_GLOBAL_VTU_OP_OP_FLUSH	(0x1000)
-#define	MV88E61XX_GLOBAL_VTU_OP_OP_VTU_LOAD	(0x3000)
-
-#define	MV88E61XX_GLOBAL_VTU_VID_VALID		(0x1000)
-
-/*
- * Second global address & second global registers.
- */
-#define	MV88E61XX_GLOBAL2	(0x1c)
-
-#define	MV88E61XX_GLOBAL2_MANAGE_2X	(0x02)
-#define	MV88E61XX_GLOBAL2_MANAGE_0X	(0x03)
-#define	MV88E61XX_GLOBAL2_CONTROL2	(0x05)
-#define	MV88E61XX_GLOBAL2_TRUNK_MASK	(0x07)
-#define	MV88E61XX_GLOBAL2_TRUNK_MAP	(0x08)
-#define	MV88E61XX_GLOBAL2_RATELIMIT	(0x09)
-#define	MV88E61XX_GLOBAL2_VLAN_CONTROL	(0x0b)
-#define	MV88E61XX_GLOBAL2_MAC_ADDRESS	(0x0d)
-
-/*
- * Fields and values in each register.
- */
-#define	MV88E61XX_GLOBAL2_CONTROL2_DOUBLE_USE	(0x8000)
-#define	MV88E61XX_GLOBAL2_CONTROL2_LOOP_PREVENT	(0x4000)
-#define	MV88E61XX_GLOBAL2_CONTROL2_FLOW_MESSAGE	(0x2000)
-#define	MV88E61XX_GLOBAL2_CONTROL2_FLOOD_BC	(0x1000)
-#define	MV88E61XX_GLOBAL2_CONTROL2_REMOVE_PTAG	(0x0800)
-#define	MV88E61XX_GLOBAL2_CONTROL2_AGE_INT	(0x0400)
-#define	MV88E61XX_GLOBAL2_CONTROL2_FLOW_TAG	(0x0200)
-#define	MV88E61XX_GLOBAL2_CONTROL2_ALWAYS_VTU	(0x0100)
-#define	MV88E61XX_GLOBAL2_CONTROL2_FORCE_FC_PRI	(0x0080)
-#define	MV88E61XX_GLOBAL2_CONTROL2_FC_PRI	(0x0070)
-#define	MV88E61XX_GLOBAL2_CONTROL2_MGMT_TO_HOST	(0x0008)
-#define	MV88E61XX_GLOBAL2_CONTROL2_MGMT_PRI	(0x0007)
-
-#endif /* !_MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_ */
diff --git a/sys/mips/cavium/octe/octe.c b/sys/mips/cavium/octe/octe.c
deleted file mode 100644
index 229b096b8f35..000000000000
--- a/sys/mips/cavium/octe/octe.c
+++ /dev/null
@@ -1,492 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Cavium Octeon Ethernet devices.
- *
- * XXX This file should be moved to if_octe.c
- * XXX The driver may have sufficient locking but we need locking to protect
- *     the interfaces presented here, right?
- */
-
-#include "opt_inet.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-
-#include <net/bpf.h>
-#include <net/ethernet.h>
-#include <net/if.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-#include <net/if_vlan_var.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-#endif
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include "wrapper-cvmx-includes.h"
-#include "cavium-ethernet.h"
-
-#include "ethernet-common.h"
-#include "ethernet-defines.h"
-#include "ethernet-mdio.h"
-#include "ethernet-tx.h"
-
-#include "miibus_if.h"
-
-#define	OCTE_TX_LOCK(priv)	mtx_lock(&(priv)->tx_mtx)
-#define	OCTE_TX_UNLOCK(priv)	mtx_unlock(&(priv)->tx_mtx)
-
-static int		octe_probe(device_t);
-static int		octe_attach(device_t);
-static int		octe_detach(device_t);
-static int		octe_shutdown(device_t);
-
-static int		octe_miibus_readreg(device_t, int, int);
-static int		octe_miibus_writereg(device_t, int, int, int);
-
-static void		octe_init(void *);
-static void		octe_stop(void *);
-static int		octe_transmit(struct ifnet *, struct mbuf *);
-
-static int		octe_mii_medchange(struct ifnet *);
-static void		octe_mii_medstat(struct ifnet *, struct ifmediareq *);
-
-static int		octe_medchange(struct ifnet *);
-static void		octe_medstat(struct ifnet *, struct ifmediareq *);
-
-static int		octe_ioctl(struct ifnet *, u_long, caddr_t);
-
-static device_method_t octe_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		octe_probe),
-	DEVMETHOD(device_attach,	octe_attach),
-	DEVMETHOD(device_detach,	octe_detach),
-	DEVMETHOD(device_shutdown,	octe_shutdown),
-
-	/* MII interface */
-	DEVMETHOD(miibus_readreg,	octe_miibus_readreg),
-	DEVMETHOD(miibus_writereg,	octe_miibus_writereg),
-	{ 0, 0 }
-};
-
-static driver_t octe_driver = {
-	"octe",
-	octe_methods,
-	sizeof (cvm_oct_private_t),
-};
-
-static devclass_t octe_devclass;
-
-DRIVER_MODULE(octe, octebus, octe_driver, octe_devclass, 0, 0);
-DRIVER_MODULE(miibus, octe, miibus_driver, miibus_devclass, 0, 0);
-
-static int
-octe_probe(device_t dev)
-{
-	return (0);
-}
-
-static int
-octe_attach(device_t dev)
-{
-	struct ifnet *ifp;
-	cvm_oct_private_t *priv;
-	device_t child;
-	unsigned qos;
-	int error;
-
-	priv = device_get_softc(dev);
-	ifp = priv->ifp;
-
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-
-	if (priv->phy_id != -1) {
-		if (priv->phy_device == NULL) {
-			error = mii_attach(dev, &priv->miibus, ifp,
-			    octe_mii_medchange, octe_mii_medstat,
-			    BMSR_DEFCAPMASK, priv->phy_id, MII_OFFSET_ANY, 0);
-			if (error != 0)
-				device_printf(dev, "attaching PHYs failed\n");
-		} else {
-			child = device_add_child(dev, priv->phy_device, -1);
-			if (child == NULL)
-				device_printf(dev, "missing phy %u device %s\n", priv->phy_id, priv->phy_device);
-		}
-	}
-
-	if (priv->miibus == NULL) {
-		ifmedia_init(&priv->media, 0, octe_medchange, octe_medstat);
-
-		ifmedia_add(&priv->media, IFM_ETHER | IFM_AUTO, 0, NULL);
-		ifmedia_set(&priv->media, IFM_ETHER | IFM_AUTO);
-	}
-
-	/*
-	 * XXX
-	 * We don't support programming the multicast filter right now, although it
-	 * ought to be easy enough.  (Presumably it's just a matter of putting
-	 * multicast addresses in the CAM?)
-	 */
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_ALLMULTI;
-	ifp->if_init = octe_init;
-	ifp->if_ioctl = octe_ioctl;
-
-	priv->if_flags = ifp->if_flags;
-
-	mtx_init(&priv->tx_mtx, ifp->if_xname, "octe tx send queue", MTX_DEF);
-
-	for (qos = 0; qos < 16; qos++) {
-		mtx_init(&priv->tx_free_queue[qos].ifq_mtx, ifp->if_xname, "octe tx free queue", MTX_DEF);
-		IFQ_SET_MAXLEN(&priv->tx_free_queue[qos], MAX_OUT_QUEUE_DEPTH);
-	}
-
-	ether_ifattach(ifp, priv->mac);
-
-	ifp->if_transmit = octe_transmit;
-
-	ifp->if_hdrlen = sizeof(struct ether_vlan_header);
-	ifp->if_capabilities = IFCAP_VLAN_MTU | IFCAP_HWCSUM;
-	ifp->if_capenable = ifp->if_capabilities;
-	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
-
-	OCTE_TX_LOCK(priv);
-	IFQ_SET_MAXLEN(&ifp->if_snd, MAX_OUT_QUEUE_DEPTH);
-	ifp->if_snd.ifq_drv_maxlen = MAX_OUT_QUEUE_DEPTH;
-	IFQ_SET_READY(&ifp->if_snd);
-	OCTE_TX_UNLOCK(priv);
-
-	return (bus_generic_attach(dev));
-}
-
-static int
-octe_detach(device_t dev)
-{
-	return (0);
-}
-
-static int
-octe_shutdown(device_t dev)
-{
-	return (octe_detach(dev));
-}
-
-static int
-octe_miibus_readreg(device_t dev, int phy, int reg)
-{
-	cvm_oct_private_t *priv;
-
-	priv = device_get_softc(dev);
-
-	/*
-	 * Try interface-specific MII routine.
-	 */
-	if (priv->mdio_read != NULL)
-		return (priv->mdio_read(priv->ifp, phy, reg));
-
-	/*
-	 * Try generic MII routine.
-	 */
-	KASSERT(phy == priv->phy_id,
-	    ("read from phy %u but our phy is %u", phy, priv->phy_id));
-	return (cvm_oct_mdio_read(priv->ifp, phy, reg));
-}
-
-static int
-octe_miibus_writereg(device_t dev, int phy, int reg, int val)
-{
-	cvm_oct_private_t *priv;
-
-	priv = device_get_softc(dev);
-
-	/*
-	 * Try interface-specific MII routine.
-	 */
-	if (priv->mdio_write != NULL) {
-		priv->mdio_write(priv->ifp, phy, reg, val);
-		return (0);
-	}
-
-	/*
-	 * Try generic MII routine.
-	 */
-	KASSERT(phy == priv->phy_id,
-	    ("write to phy %u but our phy is %u", phy, priv->phy_id));
-	cvm_oct_mdio_write(priv->ifp, phy, reg, val);
-
-	return (0);
-}
-
-static void
-octe_init(void *arg)
-{
-	struct ifnet *ifp;
-	cvm_oct_private_t *priv;
-
-	priv = arg;
-	ifp = priv->ifp;
-
-	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
-		octe_stop(priv);
-
-	if (priv->open != NULL)
-		priv->open(ifp);
-
-	if (((ifp->if_flags ^ priv->if_flags) & (IFF_ALLMULTI | IFF_MULTICAST | IFF_PROMISC)) != 0)
-		cvm_oct_common_set_multicast_list(ifp);
-
-	cvm_oct_common_set_mac_address(ifp, IF_LLADDR(ifp));
-
-	cvm_oct_common_poll(ifp);
-
-	if (priv->miibus != NULL)
-		mii_mediachg(device_get_softc(priv->miibus));
-
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-}
-
-static void
-octe_stop(void *arg)
-{
-	struct ifnet *ifp;
-	cvm_oct_private_t *priv;
-
-	priv = arg;
-	ifp = priv->ifp;
-
-	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
-		return;
-
-	if (priv->stop != NULL)
-		priv->stop(ifp);
-
-	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
-}
-
-static int
-octe_transmit(struct ifnet *ifp, struct mbuf *m)
-{
-	cvm_oct_private_t *priv;
-
-	priv = ifp->if_softc;
-
-	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
-	    IFF_DRV_RUNNING) {
-		m_freem(m);
-		return (0);
-	}
-
-	return (cvm_oct_xmit(m, ifp));
-}
-
-static int
-octe_mii_medchange(struct ifnet *ifp)
-{
-	cvm_oct_private_t *priv;
-	struct mii_data *mii;
-	struct mii_softc *miisc;
-
-	priv = ifp->if_softc;
-	mii = device_get_softc(priv->miibus);
-	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
-		PHY_RESET(miisc);
-	mii_mediachg(mii);
-
-	return (0);
-}
-
-static void
-octe_mii_medstat(struct ifnet *ifp, struct ifmediareq *ifm)
-{
-	cvm_oct_private_t *priv;
-	struct mii_data *mii;
-
-	priv = ifp->if_softc;
-	mii = device_get_softc(priv->miibus);
-
-	mii_pollstat(mii);
-	ifm->ifm_active = mii->mii_media_active;
-	ifm->ifm_status = mii->mii_media_status;
-}
-
-static int
-octe_medchange(struct ifnet *ifp)
-{
-	return (ENOTSUP);
-}
-
-static void
-octe_medstat(struct ifnet *ifp, struct ifmediareq *ifm)
-{
-	cvm_oct_private_t *priv;
-	cvmx_helper_link_info_t link_info;
-
-	priv = ifp->if_softc;
-
-	ifm->ifm_status = IFM_AVALID;
-	ifm->ifm_active = IFT_ETHER;
-
-	if (priv->poll == NULL)
-		return;
-	priv->poll(ifp);
-
-	link_info.u64 = priv->link_info;
-
-	if (!link_info.s.link_up)
-		return;
-
-	ifm->ifm_status |= IFM_ACTIVE;
-
-	switch (link_info.s.speed) {
-	case 10:
-		ifm->ifm_active |= IFM_10_T;
-		break;
-	case 100:
-		ifm->ifm_active |= IFM_100_TX;
-		break;
-	case 1000:
-		ifm->ifm_active |= IFM_1000_T;
-		break;
-	case 10000:
-		ifm->ifm_active |= IFM_10G_T;
-		break;
-	}
-
-	if (link_info.s.full_duplex)
-		ifm->ifm_active |= IFM_FDX;
-	else
-		ifm->ifm_active |= IFM_HDX;
-}
-
-static int
-octe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
-	cvm_oct_private_t *priv;
-	struct mii_data *mii;
-	struct ifreq *ifr;
-#ifdef INET
-	struct ifaddr *ifa;
-#endif
-	int error;
-
-	priv = ifp->if_softc;
-	ifr = (struct ifreq *)data;
-#ifdef INET
-	ifa = (struct ifaddr *)data;
-#endif
-
-	switch (cmd) {
-	case SIOCSIFADDR:
-#ifdef INET
-		/*
-		 * Avoid reinitialization unless it's necessary.
-		 */
-		if (ifa->ifa_addr->sa_family == AF_INET) {
-			ifp->if_flags |= IFF_UP;
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
-				octe_init(priv);
-			arp_ifinit(ifp, ifa);
-
-			return (0);
-		}
-#endif
-		error = ether_ioctl(ifp, cmd, data);
-		if (error != 0)
-			return (error);
-		return (0);
-
-	case SIOCSIFFLAGS:
-		if (ifp->if_flags == priv->if_flags)
-			return (0);
-		if ((ifp->if_flags & IFF_UP) != 0) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
-				octe_init(priv);
-		} else {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
-				octe_stop(priv);
-		}
-		priv->if_flags = ifp->if_flags;
-		return (0);
-
-	case SIOCSIFCAP:
-		/*
-		 * Just change the capabilities in software, currently none
-		 * require reprogramming hardware, they just toggle whether we
-		 * make use of already-present facilities in software.
-		 */
-		ifp->if_capenable = ifr->ifr_reqcap;
-		return (0);
-
-	case SIOCSIFMTU:
-		error = cvm_oct_common_change_mtu(ifp, ifr->ifr_mtu);
-		if (error != 0)
-			return (EINVAL);
-		return (0);
-
-	case SIOCSIFMEDIA:
-	case SIOCGIFMEDIA:
-		if (priv->miibus != NULL) {
-			mii = device_get_softc(priv->miibus);
-			error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd);
-			if (error != 0)
-				return (error);
-			return (0);
-		}
-		error = ifmedia_ioctl(ifp, ifr, &priv->media, cmd);
-		if (error != 0)
-			return (error);
-		return (0);
-
-	default:
-		error = ether_ioctl(ifp, cmd, data);
-		if (error != 0)
-			return (error);
-		return (0);
-	}
-}
diff --git a/sys/mips/cavium/octe/octebus.c b/sys/mips/cavium/octe/octebus.c
deleted file mode 100644
index d344593ebeeb..000000000000
--- a/sys/mips/cavium/octe/octebus.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Cavium Octeon Ethernet pseudo-bus attachment.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <sys/sysctl.h>
-
-#include "ethernet-common.h"
-
-#include "octebusvar.h"
-
-static void		octebus_identify(driver_t *drv, device_t parent);
-static int		octebus_probe(device_t dev);
-static int		octebus_attach(device_t dev);
-static int		octebus_detach(device_t dev);
-static int		octebus_shutdown(device_t dev);
-
-static device_method_t octebus_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify,	octebus_identify),
-	DEVMETHOD(device_probe,		octebus_probe),
-	DEVMETHOD(device_attach,	octebus_attach),
-	DEVMETHOD(device_detach,	octebus_detach),
-	DEVMETHOD(device_shutdown,	octebus_shutdown),
-
-	/* Bus interface.  */
-	DEVMETHOD(bus_add_child,	bus_generic_add_child),
-	{ 0, 0 }
-};
-
-static driver_t octebus_driver = {
-	"octebus",
-	octebus_methods,
-	sizeof (struct octebus_softc),
-};
-
-static devclass_t octebus_devclass;
-
-DRIVER_MODULE(octebus, ciu, octebus_driver, octebus_devclass, 0, 0);
-
-static void
-octebus_identify(driver_t *drv, device_t parent)
-{
-	BUS_ADD_CHILD(parent, 0, "octebus", 0);
-}
-
-static int
-octebus_probe(device_t dev)
-{
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-	device_set_desc(dev, "Cavium Octeon Ethernet pseudo-bus");
-	return (0);
-}
-
-static int
-octebus_attach(device_t dev)
-{
-	struct octebus_softc *sc;
-	int rv;
-
-	sc = device_get_softc(dev);
-	sc->sc_dev = dev;
-
-	rv = cvm_oct_init_module(dev);
-	if (rv != 0)
-		return (ENXIO);
-
-	return (0);
-}
-
-static int
-octebus_detach(device_t dev)
-{
-	cvm_oct_cleanup_module(dev);
-	return (0);
-}
-
-static int
-octebus_shutdown(device_t dev)
-{
-	return (octebus_detach(dev));
-}
diff --git a/sys/mips/cavium/octe/octebusvar.h b/sys/mips/cavium/octe/octebusvar.h
deleted file mode 100644
index 53f03e3fb824..000000000000
--- a/sys/mips/cavium/octe/octebusvar.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_CAVIUM_OCTE_OCTEBUSVAR_H_
-#define	_CAVIUM_OCTE_OCTEBUSVAR_H_
-
-struct octebus_softc {
-	device_t sc_dev;
-
-	struct resource *sc_rx_irq;
-	void *sc_rx_intr_cookie;
-
-	struct resource *sc_rgmii_irq;
-	struct resource *sc_spi_irq;
-};
-
-#endif /* !_CAVIUM_OCTE_OCTEBUSVAR_H_ */
diff --git a/sys/mips/cavium/octe/wrapper-cvmx-includes.h b/sys/mips/cavium/octe/wrapper-cvmx-includes.h
deleted file mode 100644
index a103f8854468..000000000000
--- a/sys/mips/cavium/octe/wrapper-cvmx-includes.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*************************************************************************
-SPDX-License-Identifier: BSD-3-Clause
-
-Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
-reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-
-    * Redistributions in binary form must reproduce the above
-      copyright notice, this list of conditions and the following
-      disclaimer in the documentation and/or other materials provided
-      with the distribution.
-
-    * Neither the name of Cavium Networks nor the names of
-      its contributors may be used to endorse or promote products
-      derived from this software without specific prior written
-      permission.
-
-This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
-
-TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
-AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
-
-*************************************************************************/
-/* $FreeBSD$ */
-
-#ifndef __WRAPPER_CVMX_INCLUDES_H__
-#define __WRAPPER_CVMX_INCLUDES_H__
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-version.h>
-#include <contrib/octeon-sdk/cvmx-atomic.h>
-#include <contrib/octeon-sdk/cvmx-pip.h>
-#include <contrib/octeon-sdk/cvmx-ipd.h>
-#include <contrib/octeon-sdk/cvmx-pko.h>
-#include <contrib/octeon-sdk/cvmx-pow.h>
-#include <contrib/octeon-sdk/cvmx-gmx.h>
-#include <contrib/octeon-sdk/cvmx-spi.h>
-#include <contrib/octeon-sdk/cvmx-bootmem.h>
-#include <contrib/octeon-sdk/cvmx-app-init.h>
-#include <contrib/octeon-sdk/cvmx-helper.h>
-#include <contrib/octeon-sdk/cvmx-helper-board.h>
-#include <contrib/octeon-sdk/cvmx-mgmt-port.h>
-#include <mips/cavium/octeon_irq.h>
-#include <contrib/octeon-sdk/octeon-model.h>
-
-#endif
diff --git a/sys/mips/cavium/octeon_cop2.S b/sys/mips/cavium/octeon_cop2.S
deleted file mode 100644
index fd0f93900a3b..000000000000
--- a/sys/mips/cavium/octeon_cop2.S
+++ /dev/null
@@ -1,225 +0,0 @@
-/*-
- * Copyright (c) 2011 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include <mips/cavium/octeon_cop2.h>
-
-#include "assym.inc"
-
-.set noreorder
-
-#define SAVE_COP2_REGISTER(reg)				\
-	dmfc2	t1, reg; sd	t1, reg##_OFFSET(a0)
-
-
-#define RESTORE_COP2_REGISTER(reg)			\
-	ld	t1, reg##_OFFSET(a0); dmtc2	t1, reg##_SET
- 
-LEAF(octeon_cop2_save)
-	/* Get CvmCtl register */
-	dmfc0	t0, $9, 7
-
-	/* CRC state */
-	SAVE_COP2_REGISTER(COP2_CRC_IV)
-	SAVE_COP2_REGISTER(COP2_CRC_LENGTH)
-	SAVE_COP2_REGISTER(COP2_CRC_POLY)
-
-	/* if CvmCtl[NODFA_CP2] -> save_nodfa */
-	bbit1	t0, 28, save_nodfa
-	nop
-
-	/* LLM state */
-	SAVE_COP2_REGISTER(COP2_LLM_DAT0)
-	SAVE_COP2_REGISTER(COP2_LLM_DAT1)
-
-save_nodfa:
-	/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO]  */
-	bbit1	t0, 26, save_done
-	nop
-
-	SAVE_COP2_REGISTER(COP2_3DES_IV)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY0)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY1)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY2)
-	SAVE_COP2_REGISTER(COP2_3DES_RESULT)
-
-	SAVE_COP2_REGISTER(COP2_AES_INP0)
-	SAVE_COP2_REGISTER(COP2_AES_IV0)
-	SAVE_COP2_REGISTER(COP2_AES_IV1)
-	SAVE_COP2_REGISTER(COP2_AES_KEY0)
-	SAVE_COP2_REGISTER(COP2_AES_KEY1)
-	SAVE_COP2_REGISTER(COP2_AES_KEY2)
-	SAVE_COP2_REGISTER(COP2_AES_KEY3)
-	SAVE_COP2_REGISTER(COP2_AES_KEYLEN)
-	SAVE_COP2_REGISTER(COP2_AES_RESULT0)
-	SAVE_COP2_REGISTER(COP2_AES_RESULT1)
-
-	dmfc0	t0, $15
-	li	t1, 0x000d0000 /* Octeon Pass1 */
-	beq	t0, t1, save_pass1
-	nop
-
-	SAVE_COP2_REGISTER(COP2_HSH_DATW0)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW2)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW3)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW4)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW5)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW6)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW7)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW8)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW9)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW10)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW11)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW12)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW13)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW14)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW0)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW2)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW3)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW4)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW5)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW6)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW7)
-	SAVE_COP2_REGISTER(COP2_GFM_MULT0)
-	SAVE_COP2_REGISTER(COP2_GFM_MULT1)
-	SAVE_COP2_REGISTER(COP2_GFM_POLY)
-	SAVE_COP2_REGISTER(COP2_GFM_RESULT0)
-	SAVE_COP2_REGISTER(COP2_GFM_RESULT1)
-	jr ra
-	nop
-
-save_pass1:
-	SAVE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
-
-save_done:	
-	jr ra
-	nop
-END(octeon_cop2_save)
-
-LEAF(octeon_cop2_restore)
-	/* Get CvmCtl register */
-	dmfc0	t0, $9, 7
-
-	/* CRC state */
-	RESTORE_COP2_REGISTER(COP2_CRC_IV)
-	RESTORE_COP2_REGISTER(COP2_CRC_LENGTH)
-	RESTORE_COP2_REGISTER(COP2_CRC_POLY)
-
-	/* if CvmCtl[NODFA_CP2] -> save_nodfa */
-	bbit1	t0, 28, restore_nodfa
-	nop
-
-	/* LLM state */
-	RESTORE_COP2_REGISTER(COP2_LLM_DAT0)
-	RESTORE_COP2_REGISTER(COP2_LLM_DAT1)
-
-restore_nodfa:
-	/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO]  */
-	bbit1	t0, 26, restore_done
-	nop
-
-	RESTORE_COP2_REGISTER(COP2_3DES_IV)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY0)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY1)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY2)
-	RESTORE_COP2_REGISTER(COP2_3DES_RESULT)
-
-	RESTORE_COP2_REGISTER(COP2_AES_INP0)
-	RESTORE_COP2_REGISTER(COP2_AES_IV0)
-	RESTORE_COP2_REGISTER(COP2_AES_IV1)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY0)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY1)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY2)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY3)
-	RESTORE_COP2_REGISTER(COP2_AES_KEYLEN)
-	RESTORE_COP2_REGISTER(COP2_AES_RESULT0)
-	RESTORE_COP2_REGISTER(COP2_AES_RESULT1)
-
-	dmfc0	t0, $15
-	li	t1, 0x000d0000 /* Octeon Pass1 */
-	beq	t0, t1, restore_pass1
-	nop
-
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW0)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW2)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW3)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW4)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW5)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW6)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW7)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW8)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW9)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW10)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW11)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW12)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW13)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW14)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW0)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW2)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW3)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW4)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW5)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW6)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW7)
-	RESTORE_COP2_REGISTER(COP2_GFM_MULT0)
-	RESTORE_COP2_REGISTER(COP2_GFM_MULT1)
-	RESTORE_COP2_REGISTER(COP2_GFM_POLY)
-	RESTORE_COP2_REGISTER(COP2_GFM_RESULT0)
-	RESTORE_COP2_REGISTER(COP2_GFM_RESULT1)
-	jr ra
-	nop
-
-restore_pass1:
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
-
-restore_done:	
-	jr ra
-	nop
-END(octeon_cop2_restore)
diff --git a/sys/mips/cavium/octeon_cop2.h b/sys/mips/cavium/octeon_cop2.h
deleted file mode 100644
index d7f852a13b3d..000000000000
--- a/sys/mips/cavium/octeon_cop2.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __OCTEON_COP2_H__
-#define __OCTEON_COP2_H__
-
-/*
- * COP2 registers of interest
- */
-#define	COP2_CRC_IV		0x201
-#define	COP2_CRC_IV_SET		COP2_CRC_IV
-#define	COP2_CRC_LENGTH		0x202
-#define	COP2_CRC_LENGTH_SET	0x1202
-#define	COP2_CRC_POLY		0x200
-#define	COP2_CRC_POLY_SET	0x4200
-#define	COP2_LLM_DAT0		0x402
-#define	COP2_LLM_DAT0_SET	COP2_LLM_DAT0
-#define	COP2_LLM_DAT1		0x40A
-#define	COP2_LLM_DAT1_SET	COP2_LLM_DAT1
-#define	COP2_3DES_IV		0x084
-#define	COP2_3DES_IV_SET	COP2_3DES_IV
-#define	COP2_3DES_KEY0		0x080
-#define	COP2_3DES_KEY0_SET	COP2_3DES_KEY0
-#define	COP2_3DES_KEY1		0x081
-#define	COP2_3DES_KEY1_SET	COP2_3DES_KEY1
-#define	COP2_3DES_KEY2		0x082
-#define	COP2_3DES_KEY2_SET	COP2_3DES_KEY2
-#define	COP2_3DES_RESULT	0x088
-#define	COP2_3DES_RESULT_SET	0x098
-#define	COP2_AES_INP0		0x111
-#define	COP2_AES_INP0_SET	COP2_AES_INP0
-#define	COP2_AES_IV0		0x102
-#define	COP2_AES_IV0_SET	COP2_AES_IV0
-#define	COP2_AES_IV1		0x103
-#define	COP2_AES_IV1_SET	COP2_AES_IV1
-#define	COP2_AES_KEY0		0x104
-#define	COP2_AES_KEY0_SET	COP2_AES_KEY0
-#define	COP2_AES_KEY1		0x105
-#define	COP2_AES_KEY1_SET	COP2_AES_KEY1
-#define	COP2_AES_KEY2		0x106
-#define	COP2_AES_KEY2_SET	COP2_AES_KEY2
-#define	COP2_AES_KEY3		0x107
-#define	COP2_AES_KEY3_SET	COP2_AES_KEY3
-#define	COP2_AES_KEYLEN		0x110
-#define	COP2_AES_KEYLEN_SET	COP2_AES_KEYLEN
-#define	COP2_AES_RESULT0	0x100
-#define	COP2_AES_RESULT0_SET	COP2_AES_RESULT0
-#define	COP2_AES_RESULT1	0x101
-#define	COP2_AES_RESULT1_SET	COP2_AES_RESULT1
-#define	COP2_HSH_DATW0		0x240
-#define	COP2_HSH_DATW0_SET	COP2_HSH_DATW0
-#define	COP2_HSH_DATW1		0x241
-#define	COP2_HSH_DATW1_SET	COP2_HSH_DATW1
-#define	COP2_HSH_DATW2		0x242
-#define	COP2_HSH_DATW2_SET	COP2_HSH_DATW2
-#define	COP2_HSH_DATW3		0x243
-#define	COP2_HSH_DATW3_SET	COP2_HSH_DATW3
-#define	COP2_HSH_DATW4		0x244
-#define	COP2_HSH_DATW4_SET	COP2_HSH_DATW4
-#define	COP2_HSH_DATW5		0x245
-#define	COP2_HSH_DATW5_SET	COP2_HSH_DATW5
-#define	COP2_HSH_DATW6		0x246
-#define	COP2_HSH_DATW6_SET	COP2_HSH_DATW6
-#define	COP2_HSH_DATW7		0x247
-#define	COP2_HSH_DATW7_SET	COP2_HSH_DATW7
-#define	COP2_HSH_DATW8		0x248
-#define	COP2_HSH_DATW8_SET	COP2_HSH_DATW8
-#define	COP2_HSH_DATW9		0x249
-#define	COP2_HSH_DATW9_SET	COP2_HSH_DATW9
-#define	COP2_HSH_DATW10		0x24A
-#define	COP2_HSH_DATW10_SET	COP2_HSH_DATW10
-#define	COP2_HSH_DATW11		0x24B
-#define	COP2_HSH_DATW11_SET	COP2_HSH_DATW11
-#define	COP2_HSH_DATW12		0x24C
-#define	COP2_HSH_DATW12_SET	COP2_HSH_DATW12
-#define	COP2_HSH_DATW13		0x24D
-#define	COP2_HSH_DATW13_SET	COP2_HSH_DATW13
-#define	COP2_HSH_DATW14		0x24E
-#define	COP2_HSH_DATW14_SET	COP2_HSH_DATW14
-#define	COP2_HSH_IVW0		0x250
-#define	COP2_HSH_IVW0_SET	COP2_HSH_IVW0
-#define	COP2_HSH_IVW1		0x251
-#define	COP2_HSH_IVW1_SET	COP2_HSH_IVW1
-#define	COP2_HSH_IVW2		0x252
-#define	COP2_HSH_IVW2_SET	COP2_HSH_IVW2
-#define	COP2_HSH_IVW3		0x253
-#define	COP2_HSH_IVW3_SET	COP2_HSH_IVW3
-#define	COP2_HSH_IVW4		0x254
-#define	COP2_HSH_IVW4_SET	COP2_HSH_IVW4
-#define	COP2_HSH_IVW5		0x255
-#define	COP2_HSH_IVW5_SET	COP2_HSH_IVW5
-#define	COP2_HSH_IVW6		0x256
-#define	COP2_HSH_IVW6_SET	COP2_HSH_IVW6
-#define	COP2_HSH_IVW7		0x257
-#define	COP2_HSH_IVW7_SET	COP2_HSH_IVW7
-#define	COP2_GFM_MULT0		0x258
-#define	COP2_GFM_MULT0_SET	COP2_GFM_MULT0
-#define	COP2_GFM_MULT1		0x259
-#define	COP2_GFM_MULT1_SET	COP2_GFM_MULT1
-#define	COP2_GFM_POLY		0x25E
-#define	COP2_GFM_POLY_SET	COP2_GFM_POLY
-#define	COP2_GFM_RESULT0	0x25A
-#define	COP2_GFM_RESULT0_SET	COP2_GFM_RESULT0
-#define	COP2_GFM_RESULT1	0x25B
-#define	COP2_GFM_RESULT1_SET	COP2_GFM_RESULT1
-#define	COP2_HSH_DATW0_PASS1	0x040
-#define	COP2_HSH_DATW0_PASS1_SET	COP2_HSH_DATW0_PASS1
-#define	COP2_HSH_DATW1_PASS1	0x041
-#define	COP2_HSH_DATW1_PASS1_SET	COP2_HSH_DATW1_PASS1
-#define	COP2_HSH_DATW2_PASS1	0x042
-#define	COP2_HSH_DATW2_PASS1_SET	COP2_HSH_DATW2_PASS1
-#define	COP2_HSH_DATW3_PASS1	0x043
-#define	COP2_HSH_DATW3_PASS1_SET	COP2_HSH_DATW3_PASS1
-#define	COP2_HSH_DATW4_PASS1	0x044
-#define	COP2_HSH_DATW4_PASS1_SET	COP2_HSH_DATW4_PASS1
-#define	COP2_HSH_DATW5_PASS1	0x045
-#define	COP2_HSH_DATW5_PASS1_SET	COP2_HSH_DATW5_PASS1
-#define	COP2_HSH_DATW6_PASS1	0x046
-#define	COP2_HSH_DATW6_PASS1_SET	COP2_HSH_DATW6_PASS1
-#define	COP2_HSH_IVW0_PASS1	0x048
-#define	COP2_HSH_IVW0_PASS1_SET	COP2_HSH_IVW0_PASS1
-#define	COP2_HSH_IVW1_PASS1	0x049
-#define	COP2_HSH_IVW1_PASS1_SET	COP2_HSH_IVW1_PASS1
-#define	COP2_HSH_IVW2_PASS1	0x04A
-#define	COP2_HSH_IVW2_PASS1_SET	COP2_HSH_IVW2_PASS1
-
-#ifndef LOCORE
-
-struct octeon_cop2_state {
-	/* 3DES */
-        /* 0x0084 */
-        unsigned long   _3des_iv;
-        /* 0x0080..0x0082 */
-        unsigned long   _3des_key[3];
-        /* 0x0088, set: 0x0098 */
-        unsigned long   _3des_result;
-
-	/* AES */
-        /* 0x0111 */
-        unsigned long   aes_inp0;
-        /* 0x0102..0x0103 */
-        unsigned long   aes_iv[2];
-        /* 0x0104..0x0107 */
-        unsigned long   aes_key[4];
-        /* 0x0110 */
-        unsigned long   aes_keylen;
-        /* 0x0100..0x0101 */
-        unsigned long   aes_result[2];
-
-	/* CRC */
-        /*  0x0201 */
-        unsigned long   crc_iv;
-        /* 0x0202, set: 0x1202 */
-        unsigned long   crc_length;
-        /* 0x0200, set: 0x4200 */
-        unsigned long   crc_poly;
-
-	/* Low-latency memory stuff */
-        /* 0x0402, 0x040A */
-        unsigned long   llm_dat[2];
-
-	/* SHA & MD5 */
-        /* 0x0240..0x024E */
-        unsigned long   hsh_datw[15];
-        /* 0x0250..0x0257 */
-        unsigned long   hsh_ivw[8];
-
-	/* GFM */
-        /*  0x0258..0x0259 */
-        unsigned long   gfm_mult[2];
-        /* 0x025E */
-        unsigned long   gfm_poly;
-        /* 0x025A..0x025B */
-        unsigned long   gfm_result[2];
-};
-
-/* Prototypes */
-
-void octeon_cop2_save(struct octeon_cop2_state *);
-void octeon_cop2_restore(struct octeon_cop2_state *);
-
-#endif /* LOCORE */
-#endif /* __OCTEON_COP2_H__ */
diff --git a/sys/mips/cavium/octeon_ds1337.c b/sys/mips/cavium/octeon_ds1337.c
deleted file mode 100644
index 888730d18353..000000000000
--- a/sys/mips/cavium/octeon_ds1337.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/***********************license start***************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- *  Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
- *  reserved.
- *
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions are
- *  met:
- *
- *      * Redistributions of source code must retain the above copyright
- *        notice, this list of conditions and the following disclaimer.
- *
- *      * Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials provided
- *        with the distribution.
- *
- *      * Neither the name of Cavium Networks nor the names of
- *        its contributors may be used to endorse or promote products
- *        derived from this software without specific prior written
- *        permission.
- *
- *  TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- *  AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- *  OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- *  RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- *  REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- *  DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- *  OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- *  PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- *  POSSESSION OR CORRESPONDENCE TO DESCRIPTION.  THE ENTIRE RISK ARISING OUT
- *  OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- *  For any questions regarding licensing please contact marketing@caviumnetworks.com
- *
- ***********************license end**************************************/
-
-/**
- * @file
- *
- * Interface to the EBH-30xx specific devices
- *
- * <hr>$Revision: 41586 $<hr>
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/timespec.h>
-#include <sys/clock.h>
-#include <sys/libkern.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-cn3010-evb-hs5.h>
-#include <contrib/octeon-sdk/cvmx-twsi.h>
-
-#define CT_CHECK(_expr, _msg) \
-        do { \
-            if (_expr) { \
-                cvmx_dprintf("Warning: RTC has invalid %s field\n", (_msg)); \
-                rc = -1; \
-            } \
-        } while(0);
-
-static int validate_ct_struct(struct clocktime *ct)
-{
-    int rc = 0;
-
-    if (!ct)
-	return -1;
-
-    CT_CHECK(ct->sec < 0  || ct->sec > 60,  "second"); /* + Leap sec */
-    CT_CHECK(ct->min < 0  || ct->min > 59,  "minute");
-    CT_CHECK(ct->hour < 0 || ct->hour > 23, "hour");
-    CT_CHECK(ct->day < 1 || ct->day > 31, "day");
-    CT_CHECK(ct->dow < 0 || ct->dow > 6,  "day of week");
-    CT_CHECK(ct->mon < 1  || ct->mon > 12,  "month");
-    CT_CHECK(ct->year > 2037,"year");
-
-    return rc;
-}
-
-/*
- * Board-specifc RTC read
- * Time is expressed in seconds from epoch (Jan 1 1970 at 00:00:00 UTC)
- * and converted internally to calendar format.
- */
-uint32_t cvmx_rtc_ds1337_read(void)
-{
-    int       i, retry;
-    uint8_t   reg[8];
-    uint8_t   sec;
-    struct clocktime ct;
-    struct timespec ts;
-
-    memset(&reg, 0, sizeof(reg));
-    memset(&ct, 0, sizeof(ct));
-
-    for(retry=0; retry<2; retry++)
-    {
-	/* Lockless read: detects the infrequent roll-over and retries */
-	reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0);
-	for(i=1; i<7; i++)
-	    reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR);
-
-	sec = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0);
-	if ((sec & 0xf) == (reg[0] & 0xf))
-	    break; /* Time did not roll-over, value is correct */
-    }
-
-    ct.sec  = bcd2bin(reg[0] & 0x7f);
-    ct.min  = bcd2bin(reg[1] & 0x7f);
-    ct.hour = bcd2bin(reg[2] & 0x3f);
-    if ((reg[2] & 0x40) && (reg[2] & 0x20))   /* AM/PM format and is PM time */
-    {
-	ct.hour = (ct.hour + 12) % 24;
-    }
-    ct.dow = (reg[3] & 0x7) - 1; /* Day of week field is 0..6 */
-    ct.day = bcd2bin(reg[4] & 0x3f);
-    ct.mon  = bcd2bin(reg[5] & 0x1f); /* Month field is 1..12 */
-#if defined(OCTEON_BOARD_CAPK_0100ND)
-    /*
-     * CAPK-0100ND uses DS1307 that does not have century bit
-     */
-    ct.year = 2000 + bcd2bin(reg[6]);
-#else
-    ct.year = ((reg[5] & 0x80) ? 2000 : 1900) + bcd2bin(reg[6]);
-#endif
-
-    if (validate_ct_struct(&ct))
-	cvmx_dprintf("Warning: RTC calendar is not configured properly\n");
-
-    if (clock_ct_to_ts(&ct, &ts) != 0) {
-	cvmx_dprintf("Warning: RTC calendar is not configured properly\n");
-        return 0;
-    }
-
-    return ts.tv_sec;
-}
-
-/*
- * Board-specific RTC write
- * Time returned is in seconds from epoch (Jan 1 1970 at 00:00:00 UTC)
- */
-int cvmx_rtc_ds1337_write(uint32_t time)
-{
-    struct clocktime ct;
-    struct timespec ts;
-    int       i, rc, retry;
-    uint8_t   reg[8];
-    uint8_t   sec;
-
-    ts.tv_sec = time;
-    ts.tv_nsec = 0;
-
-    clock_ts_to_ct(&ts, &ct);
-
-    if (validate_ct_struct(&ct))
-    {
-	cvmx_dprintf("Error: RTC was passed wrong calendar values, write failed\n");
-	goto ct_invalid;
-    }
-
-    reg[0] = bin2bcd(ct.sec);
-    reg[1] = bin2bcd(ct.min);
-    reg[2] = bin2bcd(ct.hour);       /* Force 0..23 format even if using AM/PM */
-    reg[3] = bin2bcd(ct.dow + 1);
-    reg[4] = bin2bcd(ct.day);
-    reg[5] = bin2bcd(ct.mon);
-#if !defined(OCTEON_BOARD_CAPK_0100ND)
-    if (ct.year >= 2000)             /* Set century bit*/
-    {
-	reg[5] |= 0x80;
-    }
-#endif
-    reg[6] = bin2bcd(ct.year % 100);
-
-    /* Lockless write: detects the infrequent roll-over and retries */
-    for(retry=0; retry<2; retry++)
-    {
-	rc = 0;
-	for(i=0; i<7; i++)
-	{
-	    rc |= cvmx_twsi_write8(CVMX_RTC_DS1337_ADDR, i, reg[i]);
-	}
-
-	sec = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0);
-	if ((sec & 0xf) == (reg[0] & 0xf))
-	    break; /* Time did not roll-over, value is correct */
-    }
-
-    return (rc ? -1 : 0);
-
- ct_invalid:
-    return -1;
-}
-
-#ifdef CVMX_RTC_DEBUG
-
-void cvmx_rtc_ds1337_dump_state(void)
-{
-    int i = 0;
-
-    printf("RTC:\n");
-    printf("%d : %02X ", i, cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0));
-    for(i=1; i<16; i++) {
-	printf("%02X ", cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR));
-    }
-    printf("\n");
-}
-
-#endif /* CVMX_RTC_DEBUG */
diff --git a/sys/mips/cavium/octeon_ebt3000_cf.c b/sys/mips/cavium/octeon_ebt3000_cf.c
deleted file mode 100644
index 5f733e99861d..000000000000
--- a/sys/mips/cavium/octeon_ebt3000_cf.c
+++ /dev/null
@@ -1,730 +0,0 @@
-/***********************license start***************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- *  Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
- *  reserved.
- *
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions are
- *  met:
- *
- *      * Redistributions of source code must retain the above copyright
- *        notice, this list of conditions and the following disclaimer.
- *
- *      * Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials provided
- *        with the distribution.
- *
- *      * Neither the name of Cavium Networks nor the names of
- *        its contributors may be used to endorse or promote products
- *        derived from this software without specific prior written
- *        permission.
- *
- *  TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- *  AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- *  OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- *  RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- *  REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- *  DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- *  OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- *  PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- *  POSSESSION OR CORRESPONDENCE TO DESCRIPTION.  THE ENTIRE RISK ARISING OUT
- *  OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- *  For any questions regarding licensing please contact marketing@caviumnetworks.com
- *
- ***********************license end**************************************/
-
-/*
- *  octeon_ebt3000_cf.c
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/bio.h>
-#include <sys/systm.h>
-#include <sys/sysctl.h>
-#include <sys/ata.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/power.h>
-#include <sys/smp.h>
-#include <sys/time.h>
-#include <sys/timetc.h>
-#include <sys/malloc.h>
-
-#include <geom/geom.h>
-
-#include <machine/clock.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/cpuregs.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-/* ATA Commands */
-#define CMD_READ_SECTOR		0x20
-#define CMD_WRITE_SECTOR	0x30
-#define CMD_IDENTIFY		0xEC
-
-/* The ATA Task File */
-#define TF_DATA			0x00
-#define TF_ERROR		0x01
-#define TF_PRECOMP		0x01
-#define TF_SECTOR_COUNT		0x02
-#define TF_SECTOR_NUMBER	0x03
-#define TF_CYL_LSB		0x04
-#define TF_CYL_MSB		0x05
-#define TF_DRV_HEAD		0x06
-#define TF_STATUS		0x07
-#define TF_COMMAND		0x07
-
-/* Status Register */
-#define STATUS_BSY		0x80	/* Drive is busy */
-#define STATUS_RDY		0x40	/* Drive is ready */
-#define STATUS_DF		0x20	/* Device fault */
-#define STATUS_DRQ		0x08	/* Data can be transferred */
-
-/* Miscelaneous */
-#define SECTOR_SIZE		512
-#define WAIT_DELAY		1000
-#define NR_TRIES		1000
-#define SWAP_SHORT(x)		((x << 8) | (x >> 8))
-#define MODEL_STR_SIZE		40
-
-/* Globals */
-/*
- * There's three bus types supported by this driver.
- *
- * CF_8 -- Traditional PC Card IDE interface on an 8-bit wide bus.  We assume
- * the bool loader has configure attribute memory properly.  We then access
- * the device like old-school 8-bit IDE card (which is all a traditional PC Card
- * interface really is).
- * CF_16 -- Traditional PC Card IDE interface on a 16-bit wide bus.  Registers on
- * this bus are 16-bits wide too.  When accessing registers in the task file, you
- * have to do it in 16-bit chunks, and worry about masking out what you don't want
- * or ORing together the traditional 8-bit values.  We assume the bootloader does
- * the right attribute memory initialization dance.
- * CF_TRUE_IDE_8 - CF Card wired to True IDE mode.  There's no Attribute memory
- * space at all.  Instead all the traditional 8-bit registers are there, but
- * on a 16-bit bus where addr0 isn't wired.  This means we need to read/write them
- * 16-bit chunks, but only the lower 8 bits are valid.  We do not (and can not)
- * access this like CF_16 with the comingled registers.  Yet we can't access
- * this like CF_8 because of the register offset.  Except the TF_DATA register
- * appears to be full width?
- */
-void	*base_addr;
-int	bus_type;
-#define CF_8		1	/* 8-bit bus, no offsets - PC Card */
-#define CF_16		2	/* 16-bit bus, registers shared - PC Card */
-#define CF_TRUE_IDE_8	3	/* 16-bit bus, only lower 8-bits, TrueIDE */
-const char *const cf_type[] = {
-	"impossible type",
-	"CF 8-bit",
-	"CF 16-bit",
-	"True IDE"
-};
-
-/* Device parameters */
-struct drive_param{
-	union {
-		char buf[SECTOR_SIZE];
-		struct ata_params driveid;
-	} u;
-
-	char model[MODEL_STR_SIZE];
-	uint32_t nr_sectors;
-	uint16_t sector_size;
-	uint16_t heads;
-	uint16_t tracks;
-	uint16_t sec_track;
-};
-
-/* Device softc */
-struct cf_priv {
-	device_t dev;
-	struct drive_param drive_param;
-
-	struct bio_queue_head cf_bq;
-	struct g_geom *cf_geom;
-	struct g_provider *cf_provider;
-
-};
-
-/* GEOM class implementation */
-static g_access_t       cf_access;
-static g_start_t        cf_start;
-static g_ioctl_t        cf_ioctl;
-
-struct g_class g_cf_class = {
-        .name =         "CF",
-        .version =      G_VERSION,
-        .start =        cf_start,
-        .access =       cf_access,
-        .ioctl =        cf_ioctl,
-};
-
-DECLARE_GEOM_CLASS(g_cf_class, g_cf);
-
-/* Device methods */
-static int	cf_probe(device_t);
-static void	cf_identify(driver_t *, device_t);
-static int	cf_attach(device_t);
-static void	cf_attach_geom(void *, int);
-
-/* ATA methods */
-static int	cf_cmd_identify(struct cf_priv *);
-static int	cf_cmd_write(uint32_t, uint32_t, void *);
-static int	cf_cmd_read(uint32_t, uint32_t, void *);
-static int	cf_wait_busy(void);
-static int	cf_send_cmd(uint32_t, uint8_t);
-
-/* Miscelenous */
-static void	cf_swap_ascii(unsigned char[], char[]);
-
-/* ------------------------------------------------------------------- *
- *                      cf_access()                                    *
- * ------------------------------------------------------------------- */
-static int cf_access (struct g_provider *pp, int r, int w, int e)
-{
-	return (0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_start()                                     *
- * ------------------------------------------------------------------- */
-static void cf_start (struct bio *bp)
-{
-	struct cf_priv *cf_priv;
-	int error;
-
-	cf_priv = bp->bio_to->geom->softc;
-
-	/*
-	* Handle actual I/O requests. The request is passed down through
-	* the bio struct.
-	*/
-
-	switch (bp->bio_cmd) {
-	case BIO_GETATTR:
-		if (g_handleattr_int(bp, "GEOM::fwsectors", cf_priv->drive_param.sec_track))
-                        return;
-                if (g_handleattr_int(bp, "GEOM::fwheads", cf_priv->drive_param.heads))
-                        return;
-                g_io_deliver(bp, ENOIOCTL);
-                return;
-
-	case BIO_READ:
-		error = cf_cmd_read(bp->bio_length / cf_priv->drive_param.sector_size,
-		    bp->bio_offset / cf_priv->drive_param.sector_size, bp->bio_data);
-		break;
-	case BIO_WRITE:
-		error = cf_cmd_write(bp->bio_length / cf_priv->drive_param.sector_size,
-		    bp->bio_offset/cf_priv->drive_param.sector_size, bp->bio_data);
-		break;
-
-	default:
-		printf("%s: unrecognized bio_cmd %x.\n", __func__, bp->bio_cmd);
-		error = ENOTSUP;
-		break;
-	}
-
-	if (error != 0) {
-		g_io_deliver(bp, error);
-		return;
-	}
-
-	bp->bio_resid = 0;
-	bp->bio_completed = bp->bio_length;
-	g_io_deliver(bp, 0);
-}
-
-static int cf_ioctl (struct g_provider *pp, u_long cmd, void *data, int fflag, struct thread *td)
-{
-	return (0);
-}
-
-static uint8_t cf_inb_8(int port)
-{
-	/*
-	 * Traditional 8-bit PC Card/CF bus access.
-	 */
-	if (bus_type == CF_8) {
-		volatile uint8_t *task_file = (volatile uint8_t *)base_addr;
-		return task_file[port];
-	}
-
-	/*
-	 * True IDE access.  lower 8 bits on a 16-bit bus (see above).
-	 */
-	volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
-	return task_file[port] & 0xff;
-}
-
-static void cf_outb_8(int port, uint8_t val)
-{
-	/*
-	 * Traditional 8-bit PC Card/CF bus access.
-	 */
-	if (bus_type == CF_8) {
-		volatile uint8_t *task_file = (volatile uint8_t *)base_addr;
-		task_file[port] = val;
-		return;
-	}
-
-	/*
-	 * True IDE access.  lower 8 bits on a 16-bit bus (see above).
-	 */
-	volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
-	task_file[port] = val & 0xff;
-}
-
-static uint8_t cf_inb_16(int port)
-{
-	volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
-	uint16_t val = task_file[port / 2];
-	if (port & 1)
-		return (val >> 8) & 0xff;
-	return val & 0xff;
-}
-
-static uint16_t cf_inw_16(int port)
-{
-	volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
-	uint16_t val = task_file[port / 2];
-	return val;
-}
-
-static void cf_outw_16(int port, uint16_t val)
-{
-	volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
-	task_file[port / 2] = val;
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_cmd_read()                                  *
- * ------------------------------------------------------------------- *
- *
- *  Read nr_sectors from the device starting from start_sector.
- */
-static int cf_cmd_read (uint32_t nr_sectors, uint32_t start_sector, void *buf)
-{
-	unsigned long lba;
-	uint32_t count;
-	uint16_t *ptr_16;
-	uint8_t  *ptr_8;
-	int error;
-
-	ptr_8  = (uint8_t*)buf;
-	ptr_16 = (uint16_t*)buf;
-	lba = start_sector; 
-
-	while (nr_sectors--) {
-		error = cf_send_cmd(lba, CMD_READ_SECTOR);
-		if (error != 0) {
-			printf("%s: cf_send_cmd(CMD_READ_SECTOR) failed: %d\n", __func__, error);
-			return (error);
-		}
-
-		switch (bus_type)
-		{
-		case CF_8:
-			for (count = 0; count < SECTOR_SIZE; count++) {
-				*ptr_8++ = cf_inb_8(TF_DATA);
-				if ((count & 0xf) == 0)
-					(void)cf_inb_8(TF_STATUS);
-			}
-			break;
-		case CF_TRUE_IDE_8:
-		case CF_16:
-		default:
-			for (count = 0; count < SECTOR_SIZE; count+=2) {
-				uint16_t temp;
-				temp = cf_inw_16(TF_DATA);
-				*ptr_16++ = SWAP_SHORT(temp);
-				if ((count & 0xf) == 0)
-					(void)cf_inb_16(TF_STATUS);
-			}
-			break;
-		}  
-
-		lba++;
-	}
-	return (0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_cmd_write()                                 *
- * ------------------------------------------------------------------- *
- *
- * Write nr_sectors to the device starting from start_sector.
- */
-static int cf_cmd_write (uint32_t nr_sectors, uint32_t start_sector, void *buf)
-{
-	uint32_t lba;
-	uint32_t count;
-	uint16_t *ptr_16;
-	uint8_t  *ptr_8;
-	int error;
-
-	lba = start_sector;
-	ptr_8  = (uint8_t*)buf;
-	ptr_16 = (uint16_t*)buf;
-
-	while (nr_sectors--) {
-		error = cf_send_cmd(lba, CMD_WRITE_SECTOR);
-		if (error != 0) {
-			printf("%s: cf_send_cmd(CMD_WRITE_SECTOR) failed: %d\n", __func__, error);
-			return (error);
-		}
-
-		switch (bus_type)
-		{
-		case CF_8:
-			for (count = 0; count < SECTOR_SIZE; count++) {
-				cf_outb_8(TF_DATA, *ptr_8++);
-				if ((count & 0xf) == 0)
-					(void)cf_inb_8(TF_STATUS);
-			}
-			break;
-		case CF_TRUE_IDE_8:
-		case CF_16:
-		default:
-			for (count = 0; count < SECTOR_SIZE; count+=2) {
-				uint16_t temp = *ptr_16++;
-				cf_outw_16(TF_DATA, SWAP_SHORT(temp));
-				if ((count & 0xf) == 0)
-					(void)cf_inb_16(TF_STATUS);
-			}
-			break;
-		} 
-
-		lba++;
-	}
-	return (0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_cmd_identify()                              *
- * ------------------------------------------------------------------- *
- *
- * Read parameters and other information from the drive and store 
- * it in the drive_param structure
- *
- */
-static int cf_cmd_identify(struct cf_priv *cf_priv)
-{
-	int count;
-	int error;
-
-	error = cf_send_cmd(0, CMD_IDENTIFY);
-	if (error != 0) {
-		printf("%s: identify failed: %d\n", __func__, error);
-		return (error);
-	}
-	switch (bus_type)
-	{
-	case CF_8:
-		for (count = 0; count < SECTOR_SIZE; count++) 
-			cf_priv->drive_param.u.buf[count] = cf_inb_8(TF_DATA);
-		break;
-	case CF_TRUE_IDE_8:
-	case CF_16:
-	default:
-		for (count = 0; count < SECTOR_SIZE; count += 2) {
-			uint16_t temp;
-			temp = cf_inw_16(TF_DATA);
-				
-			/* endianess will be swapped below */
-			cf_priv->drive_param.u.buf[count]   = (temp & 0xff);
-			cf_priv->drive_param.u.buf[count + 1] = (temp & 0xff00) >> 8;
-		}
-		break;
-	}
-
-	cf_swap_ascii(cf_priv->drive_param.u.driveid.model, cf_priv->drive_param.model);
-
-	cf_priv->drive_param.sector_size =  512;   //=  SWAP_SHORT (cf_priv->drive_param.u.driveid.sector_bytes);
-	cf_priv->drive_param.heads 	=  SWAP_SHORT (cf_priv->drive_param.u.driveid.current_heads);
-	cf_priv->drive_param.tracks	=  SWAP_SHORT (cf_priv->drive_param.u.driveid.current_cylinders); 
-	cf_priv->drive_param.sec_track   =  SWAP_SHORT (cf_priv->drive_param.u.driveid.current_sectors);
-	cf_priv->drive_param.nr_sectors  = (uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_1) |
-	    ((uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_2));
-	if (bootverbose) {
-		printf("    model %s\n", cf_priv->drive_param.model);
-		printf("    heads %d tracks %d sec_tracks %d sectors %d\n",
-			cf_priv->drive_param.heads, cf_priv->drive_param.tracks,
-			cf_priv->drive_param.sec_track, cf_priv->drive_param.nr_sectors);
-	}
-
-	return (0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_send_cmd()                                  *
- * ------------------------------------------------------------------- *
- *
- * Send command to read/write one sector specified by lba.
- *
- */
-static int cf_send_cmd (uint32_t lba, uint8_t cmd)
-{
-	switch (bus_type)
-	{
-	case CF_8:
-	case CF_TRUE_IDE_8:
-		while (cf_inb_8(TF_STATUS) & STATUS_BSY)
-			DELAY(WAIT_DELAY);
-		cf_outb_8(TF_SECTOR_COUNT, 1);
-		cf_outb_8(TF_SECTOR_NUMBER, lba & 0xff);
-		cf_outb_8(TF_CYL_LSB, (lba >> 8) & 0xff);
-		cf_outb_8(TF_CYL_MSB, (lba >> 16) & 0xff);
-		cf_outb_8(TF_DRV_HEAD, ((lba >> 24) & 0xff) | 0xe0);
-		cf_outb_8(TF_COMMAND, cmd);
-		break;
-	case CF_16:
-	default:
-		while (cf_inb_16(TF_STATUS) & STATUS_BSY)
-			DELAY(WAIT_DELAY);
-		cf_outw_16(TF_SECTOR_COUNT, 1 | ((lba & 0xff) << 8));
-		cf_outw_16(TF_CYL_LSB, ((lba >> 8) & 0xff) | (((lba >> 16) & 0xff) << 8));
-		cf_outw_16(TF_DRV_HEAD, (((lba >> 24) & 0xff) | 0xe0) | (cmd << 8));
-		break;
-	}
-
-	return (cf_wait_busy());
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_wait_busy()                                 *
- * ------------------------------------------------------------------- *
- *
- * Wait until the drive finishes a given command and data is
- * ready to be transferred. This is done by repeatedly checking 
- * the BSY bit of the status register. When the controller is ready for
- * data transfer, it clears the BSY bit and sets the DRQ bit.
- *
- * If the DF bit is ever set, we return error.
- *
- * This code originally spun on DRQ.  If that behavior turns out to be
- * necessary, a flag can be added or this function can be called
- * repeatedly as long as it is returning ENXIO.
- */
-static int cf_wait_busy (void)
-{
-	uint8_t status;
-
-	switch (bus_type)
-	{
-	case CF_8:
-	case CF_TRUE_IDE_8:
-		status = cf_inb_8(TF_STATUS);
-		while ((status & STATUS_BSY) == STATUS_BSY) {
-			if ((status & STATUS_DF) != 0) {
-				printf("%s: device fault (status=%x)\n", __func__, status);
-				return (EIO);
-			}
-			DELAY(WAIT_DELAY);
-			status = cf_inb_8(TF_STATUS);
-		}
-		break;
-	case CF_16:
-	default:
-		status = cf_inb_16(TF_STATUS);
-		while ((status & STATUS_BSY) == STATUS_BSY) {
-			if ((status & STATUS_DF) != 0) {
-				printf("%s: device fault (status=%x)\n", __func__, status);
-				return (EIO);
-			}
-			DELAY(WAIT_DELAY);
-			status = cf_inb_16(TF_STATUS);
-		}
-		break;
-	}
-
-	/* DRQ is only for when read data is actually available; check BSY */
-	/* Some vendors do assert DRQ, but not all. Check BSY instead. */
-	if (status & STATUS_BSY) {
-		printf("%s: device not ready (status=%x)\n", __func__, status);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_swap_ascii()                                *
- * ------------------------------------------------------------------- *
- *
- * The ascii string returned by the controller specifying 
- * the model of the drive is byte-swaped. This routine 
- * corrects the byte ordering.
- *
- */
-static void cf_swap_ascii (unsigned char str1[], char str2[])
-{
-	int i;
-
-	for(i = 0; i < MODEL_STR_SIZE; i++)
-		str2[i] = str1[i ^ 1];
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_probe()                                     *
- * ------------------------------------------------------------------- */
-
-static int cf_probe (device_t dev)
-{
-    	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
-		return (ENXIO);
-
-	if (device_get_unit(dev) != 0) {
-                panic("can't attach more devices\n");
-        }
-
-        device_set_desc(dev, "Octeon Compact Flash Driver");
-
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_identify()                                  *
- * ------------------------------------------------------------------- *
- *
- * Find the bootbus region for the CF to determine 
- * 16 or 8 bit and check to see if device is 
- * inserted.
- *
- */
-static void cf_identify (driver_t *drv, device_t parent)
-{
-	int bus_region;
-	int count = 0;
-	cvmx_mio_boot_reg_cfgx_t cfg;
-	uint64_t phys_base;
-
-    	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
-		return;
-
-	phys_base = cvmx_sysinfo_get()->compact_flash_common_base_addr;
-	if (phys_base == 0)
-		return;
-	base_addr = cvmx_phys_to_ptr(phys_base);
-
-        for (bus_region = 0; bus_region < 8; bus_region++)
-        {
-                cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(bus_region));
-                if (cfg.s.base == phys_base >> 16)
-                {
-			if (cvmx_sysinfo_get()->compact_flash_attribute_base_addr == 0)
-				bus_type = CF_TRUE_IDE_8;
-			else
-				bus_type = (cfg.s.width) ? CF_16 : CF_8;
-                        printf("Compact flash found in bootbus region %d (%s).\n", bus_region, cf_type[bus_type]);
-                        break;
-                }
-        }
-
-	switch (bus_type)
-	{
-	case CF_8:
-	case CF_TRUE_IDE_8:
-		/* Check if CF is inserted */
-		while (cf_inb_8(TF_STATUS) & STATUS_BSY) {
-			if ((count++) == NR_TRIES ) {
-				printf("Compact Flash not present\n");
-				return;
-                	}
-			DELAY(WAIT_DELAY);
-        	}
-		break;
-	case CF_16:
-	default:
-		/* Check if CF is inserted */
-		while (cf_inb_16(TF_STATUS) & STATUS_BSY) {
-			if ((count++) == NR_TRIES ) {
-				printf("Compact Flash not present\n");
-				return;
-                	}
-			DELAY(WAIT_DELAY);
-        	}
-		break;
-	}
-
-	BUS_ADD_CHILD(parent, 0, "cf", 0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_attach_geom()                               *
- * ------------------------------------------------------------------- */
-
-static void cf_attach_geom (void *arg, int flag)
-{
-	struct cf_priv *cf_priv;
-
-	cf_priv = (struct cf_priv *) arg;
-	cf_priv->cf_geom = g_new_geomf(&g_cf_class, "cf%d", device_get_unit(cf_priv->dev));
-	cf_priv->cf_geom->softc = cf_priv;
-	cf_priv->cf_provider = g_new_providerf(cf_priv->cf_geom, "%s",
-	    cf_priv->cf_geom->name);
-	cf_priv->cf_provider->sectorsize = cf_priv->drive_param.sector_size;
-	cf_priv->cf_provider->mediasize = cf_priv->drive_param.nr_sectors * cf_priv->cf_provider->sectorsize;
-        g_error_provider(cf_priv->cf_provider, 0);
-}
-
-/* ------------------------------------------------------------------- *
- *                      cf_attach()                                    *
- * ------------------------------------------------------------------- */
-
-static int cf_attach (device_t dev)
-{
-	struct cf_priv *cf_priv;
-	int error;
-
-    	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
-		return (ENXIO);
-
-	cf_priv = device_get_softc(dev);
-	cf_priv->dev = dev;
-
-	error = cf_cmd_identify(cf_priv);
-	if (error != 0) {
-		device_printf(dev, "cf_cmd_identify failed: %d\n", error);
-		return (error);
-	}
-
-	g_post_event(cf_attach_geom, cf_priv, M_WAITOK, NULL);
-	bioq_init(&cf_priv->cf_bq);
-
-        return 0;
-}
-
-static device_method_t cf_methods[] = {
-        /* Device interface */
-        DEVMETHOD(device_probe,         cf_probe),
-        DEVMETHOD(device_identify,      cf_identify),
-        DEVMETHOD(device_attach,        cf_attach),
-        DEVMETHOD(device_detach,        bus_generic_detach),
-        DEVMETHOD(device_shutdown,      bus_generic_shutdown),
-        { 0, 0 }
-};
-
-static driver_t cf_driver = {
-        "cf", 
-	cf_methods, 
-	sizeof(struct cf_priv)
-};
-
-static devclass_t cf_devclass;
-
-DRIVER_MODULE(cf, nexus, cf_driver, cf_devclass, 0, 0);
diff --git a/sys/mips/cavium/octeon_gpio.c b/sys/mips/cavium/octeon_gpio.c
deleted file mode 100644
index 65ce92b99e43..000000000000
--- a/sys/mips/cavium/octeon_gpio.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * GPIO driver for Cavium Octeon 
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-gpio.h>
-#include <mips/cavium/octeon_irq.h>
-
-#include <mips/cavium/octeon_gpiovar.h>
-#include <dev/gpio/gpiobusvar.h>
-
-#include "gpio_if.h"
-
-#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
-
-struct octeon_gpio_pin {
-	const char *name;
-	int pin;
-	int flags;
-};
-
-/*
- * on CAP100 GPIO 7 is "Factory defaults" button
- *
- */
-static struct octeon_gpio_pin octeon_gpio_pins[] = {
-	{ "F/D", 7,  GPIO_PIN_INPUT},
-	{ NULL, 0, 0},
-};
-
-/*
- * Helpers
- */
-static void octeon_gpio_pin_configure(struct octeon_gpio_softc *sc, 
-    struct gpio_pin *pin, uint32_t flags);
-
-/*
- * Driver stuff
- */
-static void octeon_gpio_identify(driver_t *, device_t);
-static int octeon_gpio_probe(device_t dev);
-static int octeon_gpio_attach(device_t dev);
-static int octeon_gpio_detach(device_t dev);
-static int octeon_gpio_filter(void *arg);
-static void octeon_gpio_intr(void *arg);
-
-/*
- * GPIO interface
- */
-static device_t octeon_gpio_get_bus(device_t);
-static int octeon_gpio_pin_max(device_t dev, int *maxpin);
-static int octeon_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
-static int octeon_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
-    *flags);
-static int octeon_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
-static int octeon_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
-static int octeon_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
-static int octeon_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
-static int octeon_gpio_pin_toggle(device_t dev, uint32_t pin);
-
-static void
-octeon_gpio_pin_configure(struct octeon_gpio_softc *sc, struct gpio_pin *pin,
-    unsigned int flags)
-{
-	uint32_t mask;
-	cvmx_gpio_bit_cfgx_t gpio_cfgx;
-
-	mask = 1 << pin->gp_pin;
-	GPIO_LOCK(sc);
-
-	/*
-	 * Manage input/output
-	 */
-	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
-		gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(pin->gp_pin));
-		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
-		if (flags & GPIO_PIN_OUTPUT) {
-			pin->gp_flags |= GPIO_PIN_OUTPUT;
-			gpio_cfgx.s.tx_oe = 1;
-		}
-		else {
-			pin->gp_flags |= GPIO_PIN_INPUT;
-			gpio_cfgx.s.tx_oe = 0;
-		}
-		if (flags & GPIO_PIN_INVIN)
-			gpio_cfgx.s.rx_xor = 1;
-		else
-			gpio_cfgx.s.rx_xor = 0;
-		cvmx_write_csr(CVMX_GPIO_BIT_CFGX(pin->gp_pin), gpio_cfgx.u64);
-	}
-
-	GPIO_UNLOCK(sc);
-}
-
-static device_t
-octeon_gpio_get_bus(device_t dev)
-{
-	struct octeon_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-octeon_gpio_pin_max(device_t dev, int *maxpin)
-{
-
-	*maxpin = OCTEON_GPIO_PINS - 1;
-	return (0);
-}
-
-static int
-octeon_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*caps = sc->gpio_pins[i].gp_caps;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	*flags = sc->gpio_pins[i].gp_flags;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	int i;
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	octeon_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	if (value)
-		cvmx_gpio_set(1 << pin);
-	else
-		cvmx_gpio_clear(1 << pin);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-	uint64_t state;
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	state = cvmx_gpio_read();
-	*val = (state & (1 << pin)) ? 1 : 0;
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	int i;
-	uint64_t state;
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-
-	for (i = 0; i < sc->gpio_npins; i++) {
-		if (sc->gpio_pins[i].gp_pin == pin)
-			break;
-	}
-
-	if (i >= sc->gpio_npins)
-		return (EINVAL);
-
-	GPIO_LOCK(sc);
-	/*
-	 * XXX: Need to check if read returns actual state of output 
-	 * pins or we need to keep this information by ourself
-	 */
-	state = cvmx_gpio_read();
-	if (state & (1 << pin))
-		cvmx_gpio_clear(1 << pin);
-	else
-		cvmx_gpio_set(1 << pin);
-	GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-octeon_gpio_filter(void *arg)
-{
-	cvmx_gpio_bit_cfgx_t gpio_cfgx;
-	void **cookie = arg;
-	struct octeon_gpio_softc *sc = *cookie;
-	long int irq = (cookie - sc->gpio_intr_cookies);
-
-	if ((irq < 0) || (irq >= OCTEON_GPIO_IRQS))
-		return (FILTER_STRAY);
-
-	gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(irq));
-	/* Clear rising edge detector */
-	if (gpio_cfgx.s.int_type == OCTEON_GPIO_IRQ_EDGE)
-		cvmx_gpio_interrupt_clear(1 << irq);
-	/* disable interrupt  */
-	gpio_cfgx.s.int_en = 0;
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(irq), gpio_cfgx.u64);
-
-	return (FILTER_SCHEDULE_THREAD);
-}
-
-static void
-octeon_gpio_intr(void *arg)
-{
-	cvmx_gpio_bit_cfgx_t gpio_cfgx;
-	void **cookie = arg;
-	struct octeon_gpio_softc *sc = *cookie;
-	long int irq = (cookie - sc->gpio_intr_cookies);
-
-	if ((irq < 0) || (irq >= OCTEON_GPIO_IRQS)) {
-		printf("%s: invalid GPIO IRQ: %ld\n", 
-		    __func__, irq);
-		return;
-	}
-
-	GPIO_LOCK(sc);
-	gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(irq));
-	/* disable interrupt  */
-	gpio_cfgx.s.int_en = 1;
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(irq), gpio_cfgx.u64);
-
-	/* TODO: notify bus here or something */
-	printf("GPIO IRQ for pin %ld\n", irq);
-	GPIO_UNLOCK(sc);
-}
-
-static void
-octeon_gpio_identify(driver_t *drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "gpio", 0);
-}
-
-static int
-octeon_gpio_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Cavium Octeon GPIO driver");
-	return (0);
-}
-
-static int
-octeon_gpio_attach(device_t dev)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	struct octeon_gpio_pin *pinp;
-	cvmx_gpio_bit_cfgx_t gpio_cfgx;
-
-	int i;
-
-	KASSERT((device_get_unit(dev) == 0),
-	    ("octeon_gpio: Only one gpio module supported"));
-
-	mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
-
-	for ( i = 0; i < OCTEON_GPIO_IRQS; i++) {
-		if ((sc->gpio_irq_res[i] = bus_alloc_resource(dev, 
-		    SYS_RES_IRQ, &sc->gpio_irq_rid[i], 
-		    OCTEON_IRQ_GPIO0 + i, OCTEON_IRQ_GPIO0 + i, 1, 
-		    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-			device_printf(dev, "unable to allocate IRQ resource\n");
-			octeon_gpio_detach(dev);
-			return (ENXIO);
-		}
-
-		sc->gpio_intr_cookies[i] = sc;
-		if ((bus_setup_intr(dev, sc->gpio_irq_res[i], INTR_TYPE_MISC, 
-	    	    octeon_gpio_filter, octeon_gpio_intr, 
-		    &(sc->gpio_intr_cookies[i]), &sc->gpio_ih[i]))) {
-			device_printf(dev,
-		    	"WARNING: unable to register interrupt handler\n");
-			octeon_gpio_detach(dev);
-			return (ENXIO);
-		}
-	}
-
-	sc->dev = dev;
-	/* Configure all pins as input */
-	/* disable interrupts for all pins */
-	pinp = octeon_gpio_pins;
-	i = 0;
-	while (pinp->name) {
-		strncpy(sc->gpio_pins[i].gp_name, pinp->name, GPIOMAXNAME);
-		sc->gpio_pins[i].gp_pin = pinp->pin;
-		sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
-		sc->gpio_pins[i].gp_flags = 0;
-		octeon_gpio_pin_configure(sc, &sc->gpio_pins[i], pinp->flags);
-		pinp++;
-		i++;
-	}
-
-	sc->gpio_npins = i;
-
-#if 0
-	/*
-	 * Sample: how to enable edge-triggered interrupt
-	 * for GPIO pin
-	 */
-	gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(7));
-	gpio_cfgx.s.int_en = 1;
-	gpio_cfgx.s.int_type = OCTEON_GPIO_IRQ_EDGE;
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(7), gpio_cfgx.u64);
-#endif
-
-	if (bootverbose) {
-		for (i = 0; i < 16; i++) {
-			gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(i));
-			device_printf(dev, "[pin%d] output=%d, invinput=%d, intr=%d, intr_type=%s\n", 
-			    i, gpio_cfgx.s.tx_oe, gpio_cfgx.s.rx_xor, 
-			    gpio_cfgx.s.int_en, gpio_cfgx.s.int_type ? "rising edge" : "level");
-		}
-	}
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL) {
-		octeon_gpio_detach(dev);
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-octeon_gpio_detach(device_t dev)
-{
-	struct octeon_gpio_softc *sc = device_get_softc(dev);
-	int i;
-
-	KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
-
-	for ( i = 0; i < OCTEON_GPIO_IRQS; i++) {
-		if (sc->gpio_ih[i])
-			bus_teardown_intr(dev, sc->gpio_irq_res[i],
-			    sc->gpio_ih[i]);
-		if (sc->gpio_irq_res[i])
-			bus_release_resource(dev, SYS_RES_IRQ,
-			    sc->gpio_irq_rid[i], sc->gpio_irq_res[i]);
-	}
-	gpiobus_detach_bus(dev);
-	mtx_destroy(&sc->gpio_mtx);
-
-	return(0);
-}
-
-static device_method_t octeon_gpio_methods[] = {
-	DEVMETHOD(device_identify, octeon_gpio_identify),
-	DEVMETHOD(device_probe, octeon_gpio_probe),
-	DEVMETHOD(device_attach, octeon_gpio_attach),
-	DEVMETHOD(device_detach, octeon_gpio_detach),
-
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus, octeon_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max, octeon_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname, octeon_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags, octeon_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps, octeon_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags, octeon_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get, octeon_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set, octeon_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle, octeon_gpio_pin_toggle),
-	{0, 0},
-};
-
-static driver_t octeon_gpio_driver = {
-	"gpio",
-	octeon_gpio_methods,
-	sizeof(struct octeon_gpio_softc),
-};
-static devclass_t octeon_gpio_devclass;
-
-DRIVER_MODULE(octeon_gpio, ciu, octeon_gpio_driver, octeon_gpio_devclass, 0, 0);
diff --git a/sys/mips/cavium/octeon_gpiovar.h b/sys/mips/cavium/octeon_gpiovar.h
deleted file mode 100644
index 99a5c320b385..000000000000
--- a/sys/mips/cavium/octeon_gpiovar.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __OCTEON_GPIOVAR_H__
-#define __OCTEON_GPIOVAR_H__
-
-#define GPIO_LOCK(_sc)		mtx_lock(&(_sc)->gpio_mtx)
-#define GPIO_UNLOCK(_sc)	mtx_unlock(&(_sc)->gpio_mtx)
-#define GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
-
-#define	OCTEON_GPIO_IRQ_LEVEL		0
-#define	OCTEON_GPIO_IRQ_EDGE		1	
-
-#define	OCTEON_GPIO_PINS	24
-#define	OCTEON_GPIO_IRQS	16
-
-struct octeon_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct mtx		gpio_mtx;
-	struct resource		*gpio_irq_res[OCTEON_GPIO_IRQS];
-	int			gpio_irq_rid[OCTEON_GPIO_IRQS];
-	void			*gpio_ih[OCTEON_GPIO_IRQS];
-	void			*gpio_intr_cookies[OCTEON_GPIO_IRQS];
-	int			gpio_npins;
-	struct gpio_pin		gpio_pins[OCTEON_GPIO_PINS];
-};
-
-#endif	/* __OCTEON_GPIOVAR_H__ */
diff --git a/sys/mips/cavium/octeon_irq.h b/sys/mips/cavium/octeon_irq.h
deleted file mode 100644
index 7ffeb8239111..000000000000
--- a/sys/mips/cavium/octeon_irq.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/***********************license start***************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2010  Cavium Networks (support@cavium.com). All rights
- * reserved.
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- *   * Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *
- *   * Redistributions in binary form must reproduce the above
- *     copyright notice, this list of conditions and the following
- *     disclaimer in the documentation and/or other materials provided
- *     with the distribution.
-
- *   * Neither the name of Cavium Networks nor the names of
- *     its contributors may be used to endorse or promote products
- *     derived from this software without specific prior written
- *     permission.
-
- * This Software, including technical data, may be subject to U.S. export  control
- * laws, including the U.S. Export Administration Act and its  associated
- * regulations, and may be subject to export or import  regulations in other
- * countries.
-
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
- * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
- * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
- * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
- * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
- * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
- * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
- * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
- * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- ***********************license end**************************************/
-
-#ifndef __OCTEON_IRQ_H__
-#define __OCTEON_IRQ_H__
-
-/*
- * $FreeBSD$
- */
-
-/**
- * Enumeration of Interrupt numbers
- */
-typedef enum
-{
-    /* 0 - 7 represent the 8 MIPS standard interrupt sources */
-    OCTEON_IRQ_SW0        = 0,
-    OCTEON_IRQ_SW1        = 1,
-    OCTEON_IRQ_CIU0       = 2,
-    OCTEON_IRQ_CIU1       = 3,
-    OCTEON_IRQ_4          = 4,
-    OCTEON_IRQ_5          = 5,
-    OCTEON_IRQ_6          = 6,
-    OCTEON_IRQ_7          = 7,
-
-    /* 8 - 71 represent the sources in CIU_INTX_EN0 */
-    OCTEON_IRQ_WORKQ0     = 8,
-    OCTEON_IRQ_WORKQ1     = 9,
-    OCTEON_IRQ_WORKQ2     = 10,
-    OCTEON_IRQ_WORKQ3     = 11,
-    OCTEON_IRQ_WORKQ4     = 12,
-    OCTEON_IRQ_WORKQ5     = 13,
-    OCTEON_IRQ_WORKQ6     = 14,
-    OCTEON_IRQ_WORKQ7     = 15,
-    OCTEON_IRQ_WORKQ8     = 16,
-    OCTEON_IRQ_WORKQ9     = 17,
-    OCTEON_IRQ_WORKQ10    = 18,
-    OCTEON_IRQ_WORKQ11    = 19,
-    OCTEON_IRQ_WORKQ12    = 20,
-    OCTEON_IRQ_WORKQ13    = 21,
-    OCTEON_IRQ_WORKQ14    = 22,
-    OCTEON_IRQ_WORKQ15    = 23,
-    OCTEON_IRQ_GPIO0      = 24,
-    OCTEON_IRQ_GPIO1      = 25,
-    OCTEON_IRQ_GPIO2      = 26,
-    OCTEON_IRQ_GPIO3      = 27,
-    OCTEON_IRQ_GPIO4      = 28,
-    OCTEON_IRQ_GPIO5      = 29,
-    OCTEON_IRQ_GPIO6      = 30,
-    OCTEON_IRQ_GPIO7      = 31,
-    OCTEON_IRQ_GPIO8      = 32,
-    OCTEON_IRQ_GPIO9      = 33,
-    OCTEON_IRQ_GPIO10     = 34,
-    OCTEON_IRQ_GPIO11     = 35,
-    OCTEON_IRQ_GPIO12     = 36,
-    OCTEON_IRQ_GPIO13     = 37,
-    OCTEON_IRQ_GPIO14     = 38,
-    OCTEON_IRQ_GPIO15     = 39,
-    OCTEON_IRQ_MBOX0      = 40,
-    OCTEON_IRQ_MBOX1      = 41,
-    OCTEON_IRQ_UART0      = 42,
-    OCTEON_IRQ_UART1      = 43,
-    OCTEON_IRQ_PCI_INT0   = 44,
-    OCTEON_IRQ_PCI_INT1   = 45,
-    OCTEON_IRQ_PCI_INT2   = 46,
-    OCTEON_IRQ_PCI_INT3   = 47,
-    OCTEON_IRQ_PCI_MSI0   = 48,
-    OCTEON_IRQ_PCI_MSI1   = 49,
-    OCTEON_IRQ_PCI_MSI2   = 50,
-    OCTEON_IRQ_PCI_MSI3   = 51,
-    OCTEON_IRQ_RESERVED44 = 52,
-    OCTEON_IRQ_TWSI       = 53,
-    OCTEON_IRQ_RML        = 54,
-    OCTEON_IRQ_TRACE      = 55,
-    OCTEON_IRQ_GMX_DRP0   = 56,
-    OCTEON_IRQ_GMX_DRP1   = 57,   /* Doesn't apply on CN52XX or CN63XX */
-    OCTEON_IRQ_IPD_DRP    = 58,
-    OCTEON_IRQ_KEY_ZERO   = 59,   /* Doesn't apply on CN52XX or CN63XX */
-    OCTEON_IRQ_TIMER0     = 60,
-    OCTEON_IRQ_TIMER1     = 61,
-    OCTEON_IRQ_TIMER2     = 62,
-    OCTEON_IRQ_TIMER3     = 63,
-    OCTEON_IRQ_USB0       = 64,   /* Doesn't apply on CN38XX or CN58XX */
-    OCTEON_IRQ_PCM        = 65,   /* Doesn't apply on CN52XX or CN63XX */
-    OCTEON_IRQ_MPI        = 66,   /* Doesn't apply on CN52XX or CN63XX */
-    OCTEON_IRQ_TWSI2      = 67,   /* Added in CN56XX */
-    OCTEON_IRQ_POWIQ      = 68,   /* Added in CN56XX */
-    OCTEON_IRQ_IPDPPTHR   = 69,   /* Added in CN56XX */
-    OCTEON_IRQ_MII        = 70,   /* Added in CN56XX */
-    OCTEON_IRQ_BOOTDMA    = 71,   /* Added in CN56XX */
-
-    /* 72 - 135 represent the sources in CIU_INTX_EN1 */
-    OCTEON_IRQ_WDOG0 = 72,
-    OCTEON_IRQ_WDOG1 = 73,
-    OCTEON_IRQ_WDOG2 = 74,
-    OCTEON_IRQ_WDOG3 = 75,
-    OCTEON_IRQ_WDOG4 = 76,
-    OCTEON_IRQ_WDOG5 = 77,
-    OCTEON_IRQ_WDOG6 = 78,
-    OCTEON_IRQ_WDOG7 = 79,
-    OCTEON_IRQ_WDOG8 = 80,
-    OCTEON_IRQ_WDOG9 = 81,
-    OCTEON_IRQ_WDOG10= 82,
-    OCTEON_IRQ_WDOG11= 83,
-    OCTEON_IRQ_WDOG12= 84,
-    OCTEON_IRQ_WDOG13= 85,
-    OCTEON_IRQ_WDOG14= 86,
-    OCTEON_IRQ_WDOG15= 87,
-    OCTEON_IRQ_UART2 = 88,           /* Added in CN52XX */
-    OCTEON_IRQ_USB1  = 89,           /* Added in CN52XX */
-    OCTEON_IRQ_MII1  = 90,           /* Added in CN52XX */
-    OCTEON_IRQ_NAND  = 91,           /* Added in CN52XX */
-    OCTEON_IRQ_MIO   = 92,           /* Added in CN63XX */
-    OCTEON_IRQ_IOB   = 93,           /* Added in CN63XX */
-    OCTEON_IRQ_FPA   = 94,           /* Added in CN63XX */
-    OCTEON_IRQ_POW   = 95,           /* Added in CN63XX */
-    OCTEON_IRQ_L2C   = 96,           /* Added in CN63XX */
-    OCTEON_IRQ_IPD   = 97,           /* Added in CN63XX */
-    OCTEON_IRQ_PIP   = 98,           /* Added in CN63XX */
-    OCTEON_IRQ_PKO   = 99,           /* Added in CN63XX */
-    OCTEON_IRQ_ZIP   = 100,          /* Added in CN63XX */
-    OCTEON_IRQ_TIM   = 101,          /* Added in CN63XX */
-    OCTEON_IRQ_RAD   = 102,          /* Added in CN63XX */
-    OCTEON_IRQ_KEY   = 103,          /* Added in CN63XX */
-    OCTEON_IRQ_DFA   = 104,          /* Added in CN63XX */
-    OCTEON_IRQ_USB   = 105,          /* Added in CN63XX */
-    OCTEON_IRQ_SLI   = 106,          /* Added in CN63XX */
-    OCTEON_IRQ_DPI   = 107,          /* Added in CN63XX */
-    OCTEON_IRQ_AGX0  = 108,          /* Added in CN63XX */
-    /* 109 - 117 are reserved */
-    OCTEON_IRQ_AGL   = 118,          /* Added in CN63XX */
-    OCTEON_IRQ_PTP   = 119,          /* Added in CN63XX */
-    OCTEON_IRQ_PEM0  = 120,          /* Added in CN63XX */
-    OCTEON_IRQ_PEM1  = 121,          /* Added in CN63XX */
-    OCTEON_IRQ_SRIO0 = 122,          /* Added in CN63XX */
-    OCTEON_IRQ_SRIO1 = 123,          /* Added in CN63XX */
-    OCTEON_IRQ_LMC0  = 124,          /* Added in CN63XX */
-    /* Interrupts 125 - 127 are reserved */
-    OCTEON_IRQ_DFM   = 128,          /* Added in CN63XX */
-    /* Interrupts 129 - 135 are reserved */
-} octeon_irq_t;
-
-#define	OCTEON_PMC_IRQ	OCTEON_IRQ_4
-
-#endif
diff --git a/sys/mips/cavium/octeon_machdep.c b/sys/mips/cavium/octeon_machdep.c
deleted file mode 100644
index 20817226cfd8..000000000000
--- a/sys/mips/cavium/octeon_machdep.c
+++ /dev/null
@@ -1,698 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/boot.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysctl.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/time.h>
-#include <sys/timetc.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/atomic.h>
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/cpufunc.h>
-#include <mips/cavium/octeon_pcmap_regs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pcpu.h>
-#include <machine/pte.h>
-#include <machine/trap.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-bootmem.h>
-#include <contrib/octeon-sdk/cvmx-ebt3000.h>
-#include <contrib/octeon-sdk/cvmx-helper-cfg.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
-#include <contrib/octeon-sdk/cvmx-version.h>
-
-#include <mips/cavium/octeon_irq.h>
-
-#if defined(__mips_n64) 
-#define MAX_APP_DESC_ADDR     0xffffffffafffffff
-#else
-#define MAX_APP_DESC_ADDR     0xafffffff
-#endif
-
-struct octeon_feature_description {
-	octeon_feature_t ofd_feature;
-	const char *ofd_string;
-};
-
-extern int	*end;
-static char octeon_kenv[0x2000];
-
-static const struct octeon_feature_description octeon_feature_descriptions[] = {
-	{ OCTEON_FEATURE_SAAD,			"SAAD" },
-	{ OCTEON_FEATURE_ZIP,			"ZIP" },
-	{ OCTEON_FEATURE_CRYPTO,		"CRYPTO" },
-	{ OCTEON_FEATURE_DORM_CRYPTO,		"DORM_CRYPTO" },
-	{ OCTEON_FEATURE_PCIE,			"PCIE" },
-	{ OCTEON_FEATURE_SRIO,			"SRIO" },
-	{ OCTEON_FEATURE_KEY_MEMORY,		"KEY_MEMORY" },
-	{ OCTEON_FEATURE_LED_CONTROLLER,	"LED_CONTROLLER" },
-	{ OCTEON_FEATURE_TRA,			"TRA" },
-	{ OCTEON_FEATURE_MGMT_PORT,		"MGMT_PORT" },
-	{ OCTEON_FEATURE_RAID,			"RAID" },
-	{ OCTEON_FEATURE_USB,			"USB" },
-	{ OCTEON_FEATURE_NO_WPTR,		"NO_WPTR" },
-	{ OCTEON_FEATURE_DFA,			"DFA" },
-	{ OCTEON_FEATURE_MDIO_CLAUSE_45,	"MDIO_CLAUSE_45" },
-	{ OCTEON_FEATURE_NPEI,			"NPEI" },
-	{ OCTEON_FEATURE_ILK,			"ILK" },
-	{ OCTEON_FEATURE_HFA,			"HFA" },
-	{ OCTEON_FEATURE_DFM,			"DFM" },
-	{ OCTEON_FEATURE_CIU2,			"CIU2" },
-	{ OCTEON_FEATURE_DICI_MODE,		"DICI_MODE" },
-	{ OCTEON_FEATURE_BIT_EXTRACTOR,		"BIT_EXTRACTOR" },
-	{ OCTEON_FEATURE_NAND,			"NAND" },
-	{ OCTEON_FEATURE_MMC,			"MMC" },
-	{ OCTEON_FEATURE_PKND,			"PKND" },
-	{ OCTEON_FEATURE_CN68XX_WQE,		"CN68XX_WQE" },
-	{ 0,					NULL }
-};
-
-static uint64_t octeon_get_ticks(void);
-static unsigned octeon_get_timecount(struct timecounter *tc);
-
-static void octeon_boot_params_init(register_t ptr);
-static void octeon_init_kenv(register_t ptr);
-
-static struct timecounter octeon_timecounter = {
-	octeon_get_timecount,	/* get_timecount */
-	0,			/* no poll_pps */
-	0xffffffffu,		/* octeon_mask */
-	0,			/* frequency */
-	"Octeon",		/* name */
-	900,			/* quality (adjusted in code) */
-};
-
-void
-platform_cpu_init()
-{
-	/* Nothing special yet */
-}
-
-/*
- * Perform a board-level soft-reset.
- */
-void
-platform_reset(void)
-{
-	cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
-}
-
-/*
- * octeon_debug_symbol
- *
- * Does nothing.
- * Used to mark the point for simulator to begin tracing
- */
-void
-octeon_debug_symbol(void)
-{
-}
-
-/*
- * octeon_ciu_reset
- *
- * Shutdown all CIU to IP2, IP3 mappings
- */
-void
-octeon_ciu_reset(void)
-{
-	uint64_t cvmctl;
-
-	/* Disable all CIU interrupts by default */
-	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0);
-	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0);
-	cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0);
-	cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0);
-
-#ifdef SMP
-	/* Enable the MBOX interrupts.  */
-	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
-		       (1ull << (OCTEON_IRQ_MBOX0 - 8)) |
-		       (1ull << (OCTEON_IRQ_MBOX1 - 8)));
-#endif
-
-	/* 
-	 * Move the Performance Counter interrupt to OCTEON_PMC_IRQ
-	 */
-	cvmctl = mips_rd_cvmctl();
-	cvmctl &= ~(7 << 7);
-	cvmctl |= (OCTEON_PMC_IRQ + 2) << 7;
-	mips_wr_cvmctl(cvmctl);
-}
-
-static void
-octeon_memory_init(void)
-{
-	vm_paddr_t phys_end;
-	int64_t addr;
-	unsigned i, j;
-
-	phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end));
-
-	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
-		/* Simulator we limit to 96 meg */
-		phys_avail[0] = phys_end;
-		phys_avail[1] = 96 << 20;
-
-		dump_avail[0] = phys_avail[0];
-		dump_avail[1] = phys_avail[1];
-
-		realmem = physmem = btoc(phys_avail[1] - phys_avail[0]);
-		return;
-	}
-
-	/*
-	 * Allocate memory from bootmem 1MB at a time and merge
-	 * adjacent entries.
-	 */
-	i = 0;
-	while (i < PHYS_AVAIL_ENTRIES) {
-		/*
-		 * If there is less than 2MB of memory available in 128-byte
-		 * blocks, do not steal any more memory.  We need to leave some
-		 * memory for the command queues to be allocated out of.
-		 */
-		if (cvmx_bootmem_available_mem(128) < 2 << 20)
-			break;
-
-		addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end,
-					      ~(vm_paddr_t)0, PAGE_SIZE, 0);
-		if (addr == -1)
-			break;
-
-		/*
-		 * The SDK needs to be able to easily map any memory that might
-		 * come to it e.g. in the form of an mbuf.  Because on !n64 we
-		 * can't direct-map some addresses and we don't want to manage
-		 * temporary mappings within the SDK, don't feed memory that
-		 * can't be direct-mapped to the kernel.
-		 */
-#if !defined(__mips_n64)
-		if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1))
-			continue;
-#endif
-
-		physmem += btoc(1 << 20);
-
-		if (i > 0 && phys_avail[i - 1] == addr) {
-			phys_avail[i - 1] += 1 << 20;
-			continue;
-		}
-
-		phys_avail[i + 0] = addr;
-		phys_avail[i + 1] = addr + (1 << 20);
-
-		i += 2;
-	}
-
-	for (j = 0; j < i; j++)
-		dump_avail[j] = phys_avail[j];
-
-	realmem = physmem;
-}
-
-void
-platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
-    __register_t a3)
-{
-	const struct octeon_feature_description *ofd;
-	uint64_t platform_counter_freq;
-	int rv;
-
-	mips_postboot_fixup();
-
-	/*
-	 * Initialize boot parameters so that we can determine things like
-	 * which console we shoud use, etc.
-	 */
-	octeon_boot_params_init(a3);
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-	mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz);
-
-	/* Initialize console.  */
-	cninit();
-
-	/*
-	 * Display information about the CPU.
-	 */
-#if !defined(OCTEON_MODEL)
-	printf("Using runtime CPU model checks.\n");
-#else
-	printf("Compiled for CPU model: " __XSTRING(OCTEON_MODEL) "\n");
-#endif
-	strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id()));
-	printf("CPU Model: %s\n", cpu_model);
-	printf("CPU clock: %uMHz  Core Mask: %#x\n",
-	       cvmx_sysinfo_get()->cpu_clock_hz / 1000000,
-	       cvmx_sysinfo_get()->core_mask);
-	rv = octeon_model_version_check(cvmx_get_proc_id());
-	if (rv == -1)
-		panic("%s: kernel not compatible with this processor.", __func__);
-
-	/*
-	 * Display information about the board.
-	 */
-#if defined(OCTEON_BOARD_CAPK_0100ND)
-	strcpy(cpu_board, "CAPK-0100ND");
-	if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) {
-		panic("Compiled for %s, but board type is %s.", cpu_board,
-		       cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
-	}
-#else
-	strcpy(cpu_board,
-	       cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
-#endif
-	printf("Board: %s\n", cpu_board);
-	printf("Board Type: %u  Revision: %u/%u\n",
-	       cvmx_sysinfo_get()->board_type,
-	       cvmx_sysinfo_get()->board_rev_major,
-	       cvmx_sysinfo_get()->board_rev_minor);
-	printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number);
-
-	/*
-	 * Additional on-chip hardware/settings.
-	 *
-	 * XXX Display PCI host/target?  What else?
-	 */
-	printf("MAC address base: %6D (%u configured)\n",
-	       cvmx_sysinfo_get()->mac_addr_base, ":",
-	       cvmx_sysinfo_get()->mac_addr_count);
-
-	octeon_ciu_reset();
-	/*
-	 * Convert U-Boot 'bootoctlinux' loader command line arguments into
-	 * boot flags and kernel environment variables.
-	 */
-	bootverbose = 1;
-	octeon_init_kenv(a3);
-
-	/*
-	 * For some reason on the cn38xx simulator ebase register is set to
-	 * 0x80001000 at bootup time.  Move it back to the default, but
-	 * when we move to having support for multiple executives, we need
-	 * to rethink this.
-	 */
-	mips_wr_ebase(0x80000000);
-
-	octeon_memory_init();
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-	cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz;
-	platform_counter_freq = cpu_clock;
-	octeon_timecounter.tc_frequency = cpu_clock;
-	platform_timecounter = &octeon_timecounter;
-	mips_timer_init_params(platform_counter_freq, 0);
-	set_cputicker(octeon_get_ticks, cpu_clock, 0);
-
-#ifdef SMP
-	/*
-	 * Clear any pending IPIs.
-	 */
-	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
-#endif
-
-	printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING);
-	printf("Available Octeon features:");
-	for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++)
-		if (octeon_has_feature(ofd->ofd_feature))
-			printf(" %s", ofd->ofd_string);
-	printf("\n");
-}
-
-static uint64_t
-octeon_get_ticks(void)
-{
-	uint64_t cvmcount;
-
-	CVMX_MF_CYCLE(cvmcount);
-	return (cvmcount);
-}
-
-static unsigned
-octeon_get_timecount(struct timecounter *tc)
-{
-	return ((unsigned)octeon_get_ticks());
-}
-
-static int
-sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS)
-{
-	size_t buflen;
-	char buf[9];
-	int error;
-
-	if (req->newptr == NULL)
-		return (EINVAL);
-
-	if (cvmx_sysinfo_get()->led_display_base_addr == 0)
-		return (ENODEV);
-
-	/*
-	 * Revision 1.x of the EBT3000 only supports 4 characters, but
-	 * other devices support 8.
-	 */
-	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
-	    cvmx_sysinfo_get()->board_rev_major == 1)
-		buflen = 4;
-	else
-		buflen = 8;
-
-	if (req->newlen > buflen)
-		return (E2BIG);
-
-	error = SYSCTL_IN(req, buf, req->newlen);
-	if (error != 0)
-		return (error);
-
-	buf[req->newlen] = '\0';
-	ebt3000_str_write(buf);
-
-	return (0);
-}
-
-SYSCTL_PROC(_machdep, OID_AUTO, led_display,
-    CTLTYPE_STRING | CTLFLAG_WR | CTLFLAG_NEEDGIANT, NULL, 0,
-    sysctl_machdep_led_display, "A",
-    "String to display on LED display");
-
-void
-cvmx_dvprintf(const char *fmt, va_list ap)
-{
-	if (!bootverbose)
-		return;
-	vprintf(fmt, ap);
-}
-
-void
-cvmx_dprintf(const char *fmt, ...)
-{
-	va_list ap;
-
-	va_start(ap, fmt);
-	cvmx_dvprintf(fmt, ap);
-	va_end(ap);
-}
-
-/**
- * version of printf that works better in exception context.
- *
- * @param format
- *
- * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
- */
-void cvmx_safe_printf(const char *format, ...)
-{
-    char buffer[256];
-    char *ptr = buffer;
-    int count;
-    va_list args;
-
-    va_start(args, format);
-#ifndef __U_BOOT__
-    count = vsnprintf(buffer, sizeof(buffer), format, args);
-#else
-    count = vsprintf(buffer, format, args);
-#endif
-    va_end(args);
-
-    while (count-- > 0)
-    {
-        cvmx_uart_lsr_t lsrval;
-
-        /* Spin until there is room */
-        do
-        {
-            lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
-#if !defined(CONFIG_OCTEON_SIM_SPEED)
-            if (lsrval.s.temt == 0)
-                cvmx_wait(10000);   /* Just to reduce the load on the system */
-#endif
-        }
-        while (lsrval.s.temt == 0);
-
-        if (*ptr == '\n')
-            cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
-        cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
-    }
-}
-
-/* impSTART: This stuff should move back into the Cavium SDK */
-/*
- ****************************************************************************************
- *
- * APP/BOOT  DESCRIPTOR  STUFF
- *
- ****************************************************************************************
- */
-
-/* Define the struct that is initialized by the bootloader used by the 
- * startup code.
- *
- * Copyright (c) 2004, 2005, 2006 Cavium Networks.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply.
- */
-
-#define OCTEON_CURRENT_DESC_VERSION     6
-#define OCTEON_ARGV_MAX_ARGS            (64)
-#define OCTOEN_SERIAL_LEN 20
-
-typedef struct {
-	/* Start of block referenced by assembly code - do not change! */
-	uint32_t desc_version;
-	uint32_t desc_size;
-
-	uint64_t stack_top;
-	uint64_t heap_base;
-	uint64_t heap_end;
-	uint64_t entry_point;   /* Only used by bootloader */
-	uint64_t desc_vaddr;
-	/* End of This block referenced by assembly code - do not change! */
-
-	uint32_t exception_base_addr;
-	uint32_t stack_size;
-	uint32_t heap_size;
-	uint32_t argc;  /* Argc count for application */
-	uint32_t argv[OCTEON_ARGV_MAX_ARGS];
-	uint32_t flags;
-	uint32_t core_mask;
-	uint32_t dram_size;  /**< DRAM size in megabyes */
-	uint32_t phy_mem_desc_addr;  /**< physical address of free memory descriptor block*/
-	uint32_t debugger_flags_base_addr;  /**< used to pass flags from app to debugger */
-	uint32_t eclock_hz;  /**< CPU clock speed, in hz */
-	uint32_t dclock_hz;  /**< DRAM clock speed, in hz */
-	uint32_t spi_clock_hz;  /**< SPI4 clock in hz */
-	uint16_t board_type;
-	uint8_t board_rev_major;
-	uint8_t board_rev_minor;
-	uint16_t chip_type;
-	uint8_t chip_rev_major;
-	uint8_t chip_rev_minor;
-	char board_serial_number[OCTOEN_SERIAL_LEN];
-	uint8_t mac_addr_base[6];
-	uint8_t mac_addr_count;
-	uint64_t cvmx_desc_vaddr;
-} octeon_boot_descriptor_t;
-
-static cvmx_bootinfo_t *
-octeon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr)
-{
-	cvmx_bootinfo_t *octeon_bootinfo;
-
-	/* XXX Why is 0x00000000ffffffffULL a bad value?  */
-	if (app_desc_ptr->cvmx_desc_vaddr == 0 ||
-	    app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) {
-            	cvmx_safe_printf("Bad octeon_bootinfo %#jx\n",
-		    (uintmax_t)app_desc_ptr->cvmx_desc_vaddr);
-		return (NULL);
-	}
-
-    	octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr);
-        if (octeon_bootinfo->major_version != 1) {
-            	cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n",
-		    (int) octeon_bootinfo->major_version,
-		    (int) octeon_bootinfo->minor_version, octeon_bootinfo);
-		return (NULL);
-	}
-
-	cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr,
-					octeon_bootinfo->board_type,
-					octeon_bootinfo->board_rev_major,
-					octeon_bootinfo->board_rev_minor,
-					octeon_bootinfo->eclock_hz);
-	memcpy(cvmx_sysinfo_get()->mac_addr_base,
-	       octeon_bootinfo->mac_addr_base, 6);
-	cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count;
-	cvmx_sysinfo_get()->compact_flash_common_base_addr = 
-		octeon_bootinfo->compact_flash_common_base_addr;
-	cvmx_sysinfo_get()->compact_flash_attribute_base_addr = 
-		octeon_bootinfo->compact_flash_attribute_base_addr;
-	cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
-	cvmx_sysinfo_get()->led_display_base_addr =
-		octeon_bootinfo->led_display_base_addr;
-	memcpy(cvmx_sysinfo_get()->board_serial_number,
-	       octeon_bootinfo->board_serial_number,
-	       sizeof cvmx_sysinfo_get()->board_serial_number);
-	return (octeon_bootinfo);
-}
-
-static void
-octeon_boot_params_init(register_t ptr)
-{
-	octeon_boot_descriptor_t *app_desc_ptr;
-	cvmx_bootinfo_t *octeon_bootinfo;
-
-	if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) {
-		cvmx_safe_printf("app descriptor passed at invalid address %#jx\n",
-		    (uintmax_t)ptr);
-		platform_reset();
-	}
-
-	app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
-	if (app_desc_ptr->desc_version < 6) {
-		cvmx_safe_printf("Your boot code is too old to be supported.\n");
-		platform_reset();
-	}
-	octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr);
-	if (octeon_bootinfo == NULL) {
-		cvmx_safe_printf("Could not parse boot descriptor.\n");
-		platform_reset();
-	}
-
-	if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
-		/*
-		 * Revision 1.x of the EBT3000 only supports 4 characters, but
-		 * other devices support 8.
-		 */
-		if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
-		    cvmx_sysinfo_get()->board_rev_major == 1)
-			ebt3000_str_write("FBSD");
-		else
-			ebt3000_str_write("FreeBSD!");
-	}
-
-	if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) {
-		cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n");
-		platform_reset();
-	}
-	cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
-
-	octeon_feature_init();
-
-	__cvmx_helper_cfg_init();
-}
-/* impEND: This stuff should move back into the Cavium SDK */
-
-/*
- * The boot loader command line may specify kernel environment variables or
- * applicable boot flags of boot(8).
- */
-static void
-octeon_init_kenv(register_t ptr)
-{
-	int i;
-	char *n;
-	char *v;
-	octeon_boot_descriptor_t *app_desc_ptr;
-
-	app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
-	memset(octeon_kenv, 0, sizeof(octeon_kenv));
-	init_static_kenv(octeon_kenv, sizeof(octeon_kenv));
-
-	for (i = 0; i < app_desc_ptr->argc; i++) {
-		v = cvmx_phys_to_ptr(app_desc_ptr->argv[i]);
-		if (v == NULL)
-			continue;
-		if (*v == '-') {
-			boothowto |= boot_parse_arg(v);
-			continue;
-		}
-		n = strsep(&v, "=");
-		if (v == NULL)
-			kern_setenv(n, "1");
-		else
-			kern_setenv(n, v);
-	}
-}
diff --git a/sys/mips/cavium/octeon_mp.c b/sys/mips/cavium/octeon_mp.c
deleted file mode 100644
index e18795ee9949..000000000000
--- a/sys/mips/cavium/octeon_mp.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/smp.h>
-#include <sys/systm.h>
-
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/smp.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-
-unsigned octeon_ap_boot = ~0;
-
-void
-platform_ipi_send(int cpuid)
-{
-	cvmx_write_csr(CVMX_CIU_MBOX_SETX(cpuid), 1);
-	mips_wbflush();
-}
-
-void
-platform_ipi_clear(void)
-{
-	uint64_t action;
-
-	action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)));
-	KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action));
-	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action);
-}
-
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (1);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (-1);
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	unsigned ciu_int_mask, clock_int_mask, ipi_int_mask;
-
-	/*
-	 * Set the exception base.
-	 */
-	mips_wr_ebase(0x80000000);
-
-	/*
-	 * Clear any pending IPIs.
-	 */
-	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff);
-
-	/*
-	 * Set up interrupts.
-	 */
-	octeon_ciu_reset();
-
-	/*
-	 * Unmask the clock, ipi and ciu interrupts.
-	 */
-	ciu_int_mask = hard_int_mask(0);
-	clock_int_mask = hard_int_mask(5);
-	ipi_int_mask = hard_int_mask(platform_ipi_hardintr_num());
-	set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask);
-
-	mips_wbflush();
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	uint64_t core_mask = cvmx_sysinfo_get()->core_mask;
-	uint64_t i, m;
-
-	CPU_ZERO(mask);
-	for (i = 0, m = 1 ; i < MAXCPU; i++, m <<= 1)
-		if (core_mask & m)
-			CPU_SET(i, mask);
-}
-
-struct cpu_group *
-platform_smp_topo(void)
-{
-	return (smp_topo_none());
-}
-
-int
-platform_start_ap(int cpuid)
-{
-	uint64_t cores_in_reset;
-
-	/* 
-	 * Release the core if it is in reset, and let it rev up a bit.
-	 * The real synchronization happens below via octeon_ap_boot.
-	 */
-	cores_in_reset = cvmx_read_csr(CVMX_CIU_PP_RST);
-	if (cores_in_reset & (1ULL << cpuid)) {
-	    if (bootverbose)
-		printf ("AP #%d still in reset\n", cpuid);
-	    cores_in_reset &= ~(1ULL << cpuid);
-	    cvmx_write_csr(CVMX_CIU_PP_RST, (uint64_t)(cores_in_reset));
-	    DELAY(2000);    /* Give it a moment to start */
-	}
-
-	if (atomic_cmpset_32(&octeon_ap_boot, ~0, cpuid) == 0)
-		return (-1);
-	for (;;) {
-		DELAY(1000);
-		if (atomic_cmpset_32(&octeon_ap_boot, 0, ~0) != 0)
-			return (0);
-		printf("Waiting for cpu%d to start\n", cpuid);
-	}
-}
diff --git a/sys/mips/cavium/octeon_nmi.S b/sys/mips/cavium/octeon_nmi.S
deleted file mode 100644
index 6e376238a596..000000000000
--- a/sys/mips/cavium/octeon_nmi.S
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * Copyright (c) 2010 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-
-.set noreorder
- 
-/*
- * Only first 128 bytes of handler is used
- */
-NESTED_NOPROFILE(octeon_wdog_nmi_handler, 32, ra)
-        .set    push
-        .set    noat
-        PTR_LA  k0, _C_LABEL(octeon_wdog_nmi)
-	jr	k0
-	nop
-1:
-	nop
-	j 1b
-	nop
-        .set    at
-END(octeon_wdog_nmi_handler)
diff --git a/sys/mips/cavium/octeon_pci_console.c b/sys/mips/cavium/octeon_pci_console.c
deleted file mode 100644
index bf7640e647df..000000000000
--- a/sys/mips/cavium/octeon_pci_console.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/kernel.h>
-#include <sys/reboot.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-bootmem.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
-#include <contrib/octeon-sdk/octeon-pci-console.h>
-
-#ifdef OCTEON_VENDOR_RADISYS
-#define	OPCIC_FLAG_RSYS		(0x00000001)
-
-#define	OPCIC_RSYS_FIFO_SIZE	(0x2000)
-#endif
-
-struct opcic_softc {
-	unsigned sc_flags;
-	uint64_t sc_base_addr;
-};
-
-static struct opcic_softc opcic_instance;
-
-static cn_probe_t opcic_cnprobe;
-static cn_init_t opcic_cninit;
-static cn_term_t opcic_cnterm;
-static cn_getc_t opcic_cngetc;
-static cn_putc_t opcic_cnputc;
-static cn_grab_t opcic_cngrab;
-static cn_ungrab_t opcic_cnungrab;
-
-#ifdef OCTEON_VENDOR_RADISYS
-static int opcic_rsys_cngetc(struct opcic_softc *);
-static void opcic_rsys_cnputc(struct opcic_softc *, int);
-#endif
-
-CONSOLE_DRIVER(opcic);
-
-static void
-opcic_cnprobe(struct consdev *cp)
-{
-	const struct cvmx_bootmem_named_block_desc *pci_console_block;
-	struct opcic_softc *sc;
-
-	sc = &opcic_instance;
-	sc->sc_flags = 0;
-	sc->sc_base_addr = 0;
-
-	cp->cn_pri = CN_DEAD;
-
-	switch (cvmx_sysinfo_get()->board_type) {
-#ifdef OCTEON_VENDOR_RADISYS
-	case CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE:
-		pci_console_block =
-		    cvmx_bootmem_find_named_block("rsys_gbl_memory");
-		if (pci_console_block != NULL) {
-			sc->sc_flags |= OPCIC_FLAG_RSYS;
-			sc->sc_base_addr = pci_console_block->base_addr;
-			break;
-		}
-#endif
-	default:
-		pci_console_block =
-		    cvmx_bootmem_find_named_block(OCTEON_PCI_CONSOLE_BLOCK_NAME);
-		if (pci_console_block == NULL)
-			return;
-		sc->sc_base_addr = pci_console_block->base_addr;
-		break;
-	}
-
-	cp->cn_arg = sc;
-	snprintf(cp->cn_name, sizeof cp->cn_name, "opcic@%p", cp->cn_arg);
-	cp->cn_pri = (boothowto & RB_SERIAL) ? CN_REMOTE : CN_NORMAL;
-}
-
-static void
-opcic_cninit(struct consdev *cp)
-{
-	(void)cp;
-}
-
-static void
-opcic_cnterm(struct consdev *cp)
-{
-	(void)cp;
-}
-
-static int
-opcic_cngetc(struct consdev *cp)
-{
-	struct opcic_softc *sc;
-	char ch;
-	int rv;
-
-	sc = cp->cn_arg;
-
-#ifdef OCTEON_VENDOR_RADISYS
-	if ((sc->sc_flags & OPCIC_FLAG_RSYS) != 0)
-		return (opcic_rsys_cngetc(sc));
-#endif
-
-	rv = octeon_pci_console_read(sc->sc_base_addr, 0, &ch, 1,
-	    OCT_PCI_CON_FLAG_NONBLOCK);
-	if (rv != 1)
-		return (-1);
-	return (ch);
-}
-
-static void
-opcic_cnputc(struct consdev *cp, int c)
-{
-	struct opcic_softc *sc;
-	char ch;
-	int rv;
-
-	sc = cp->cn_arg;
-	ch = c;
-
-#ifdef OCTEON_VENDOR_RADISYS
-	if ((sc->sc_flags & OPCIC_FLAG_RSYS) != 0) {
-		opcic_rsys_cnputc(sc, c);
-		return;
-	}
-#endif
-
-	rv = octeon_pci_console_write(sc->sc_base_addr, 0, &ch, 1, 0);
-	if (rv == -1)
-		panic("%s: octeon_pci_console_write failed.", __func__);
-}
-
-static void
-opcic_cngrab(struct consdev *cp)
-{
-	(void)cp;
-}
-
-static void
-opcic_cnungrab(struct consdev *cp)
-{
-	(void)cp;
-}
-
-#ifdef OCTEON_VENDOR_RADISYS
-static int
-opcic_rsys_cngetc(struct opcic_softc *sc)
-{
-	uint64_t gbl_base;
-	uint64_t console_base;
-	uint64_t console_rbuf;
-	uint64_t console_rcnt[2];
-	uint16_t rcnt[2];
-	uint16_t roff;
-	int c;
-
-	gbl_base = CVMX_ADD_IO_SEG(sc->sc_base_addr);
-	console_base = gbl_base + 0x10;
-
-	console_rbuf = console_base + 0x2018;
-	console_rcnt[0] = console_base + 0x08;
-	console_rcnt[1] = console_base + 0x0a;
-
-	/* Check if there is anything new in the FIFO.  */
-	rcnt[0] = cvmx_read64_uint16(console_rcnt[0]);
-	rcnt[1] = cvmx_read64_uint16(console_rcnt[1]);
-	if (rcnt[0] == rcnt[1])
-		return (-1);
-
-	/* Get first new character in the FIFO.  */
-	if (rcnt[0] != 0)
-		roff = rcnt[0] - 1;
-	else
-		roff = OPCIC_RSYS_FIFO_SIZE - 1;
-	c = cvmx_read64_uint8(console_rbuf + roff);
-
-	/* Advance FIFO.  */
-	rcnt[1] = (rcnt[1] + 1) % OPCIC_RSYS_FIFO_SIZE;
-	cvmx_write64_uint16(console_rcnt[1], rcnt[1]);
-
-	return (c);
-}
-
-static void
-opcic_rsys_cnputc(struct opcic_softc *sc, int c)
-{
-	uint64_t gbl_base;
-	uint64_t console_base;
-	uint64_t console_wbuf;
-	uint64_t console_wcnt;
-	uint16_t wcnt;
-
-	gbl_base = CVMX_ADD_IO_SEG(sc->sc_base_addr);
-	console_base = gbl_base + 0x10;
-
-	console_wbuf = console_base + 0x0018;
-	console_wcnt = console_base + 0x0c;
-
-	/* Append character to FIFO.  */
-	wcnt = cvmx_read64_uint16(console_wcnt) % OPCIC_RSYS_FIFO_SIZE;
-	cvmx_write64_uint8(console_wbuf + wcnt, (uint8_t)c);
-	cvmx_write64_uint16(console_wcnt, wcnt + 1);
-}
-#endif
diff --git a/sys/mips/cavium/octeon_pcmap_regs.h b/sys/mips/cavium/octeon_pcmap_regs.h
deleted file mode 100644
index 6aad91275515..000000000000
--- a/sys/mips/cavium/octeon_pcmap_regs.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/***********************license start***************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- *  Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
- *  reserved.
- *
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions are
- *  met:
- *
- *      * Redistributions of source code must retain the above copyright
- *        notice, this list of conditions and the following disclaimer.
- *
- *      * Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials provided
- *        with the distribution.
- *
- *      * Neither the name of Cavium Networks nor the names of
- *        its contributors may be used to endorse or promote products
- *        derived from this software without specific prior written
- *        permission.
- *
- *  TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- *  AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- *  OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- *  RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- *  REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- *  DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- *  OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- *  PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- *  POSSESSION OR CORRESPONDENCE TO DESCRIPTION.  THE ENTIRE RISK ARISING OUT
- *  OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- *  For any questions regarding licensing please contact marketing@caviumnetworks.com
- *
- ***********************license end**************************************/
-
-/*
- *    This product includes software developed by the University of
- *    California, Berkeley and its contributors."
- */
-
-/* $FreeBSD$ */
-
-#ifndef __OCTEON_PCMAP_REGS_H__
-#define __OCTEON_PCMAP_REGS_H__
-
-#ifndef LOCORE
-/*
- * octeon_machdep.c
- *
- * Direct to Board Support level.
- */
-void octeon_debug_symbol(void);
-void octeon_ciu_reset(void);
-#endif	/* LOCORE */
-
-#endif /* !OCTEON_PCMAP_REGS_H__ */
diff --git a/sys/mips/cavium/octeon_pmc.c b/sys/mips/cavium/octeon_pmc.c
deleted file mode 100644
index 23b5f0534f39..000000000000
--- a/sys/mips/cavium/octeon_pmc.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-#include <sys/smp.h>
-#include <sys/pmc.h>
-#include <sys/pmckern.h>
-
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-
-struct octeon_pmc_softc {
-	struct rman irq_rman;
-	struct resource *octeon_pmc_irq;
-};
-
-static void		octeon_pmc_identify(driver_t *, device_t);
-static int		octeon_pmc_probe(device_t);
-static int		octeon_pmc_attach(device_t);
-static int		octeon_pmc_intr(void *);
-
-static void
-octeon_pmc_identify(driver_t *drv, device_t parent)
-{
-	if (octeon_has_feature(OCTEON_FEATURE_USB))
-		BUS_ADD_CHILD(parent, 0, "pmc", 0);
-}
-
-static int
-octeon_pmc_probe(device_t dev)
-{
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Cavium Octeon Performance Counters");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-octeon_pmc_attach(device_t dev)
-{
-	struct octeon_pmc_softc *sc;
-	int error;
-	int rid;
-
-	sc = device_get_softc(dev);
-
-	rid = 0;
-	sc->octeon_pmc_irq = bus_alloc_resource(dev, 
-	    SYS_RES_IRQ, &rid, OCTEON_PMC_IRQ,
-	    OCTEON_PMC_IRQ, 1, RF_ACTIVE);
-
-	if (sc->octeon_pmc_irq == NULL) {
-		device_printf(dev, "could not allocate irq%d\n", OCTEON_PMC_IRQ);
-		return (ENXIO);
-	}
-
-	error = bus_setup_intr(dev, sc->octeon_pmc_irq, 
-	    INTR_TYPE_MISC, octeon_pmc_intr, NULL, sc, NULL);
-	if (error != 0) {
-		device_printf(dev, "bus_setup_intr failed: %d\n", error);
-		return (error);
-	}
-
-	return (0);
-}
-
-static int
-octeon_pmc_intr(void *arg)
-{
-	struct trapframe *tf = PCPU_GET(curthread)->td_intr_frame;
-
-	if (pmc_intr)
-		(*pmc_intr)(tf);
-
-	return (FILTER_HANDLED);
-}
-
-static device_method_t octeon_pmc_methods[] = {
-	DEVMETHOD(device_identify,	octeon_pmc_identify),
-	DEVMETHOD(device_probe,		octeon_pmc_probe),
-	DEVMETHOD(device_attach,	octeon_pmc_attach),
-	{ 0, 0 }
-};
-
-static driver_t octeon_pmc_driver = {
-	"pmc",
-	octeon_pmc_methods,
-	sizeof(struct octeon_pmc_softc),
-};
-static devclass_t octeon_pmc_devclass;
-DRIVER_MODULE(octeon_pmc, nexus, octeon_pmc_driver, octeon_pmc_devclass, 0, 0);
diff --git a/sys/mips/cavium/octeon_rnd.c b/sys/mips/cavium/octeon_rnd.c
deleted file mode 100644
index 95b8efa3f28e..000000000000
--- a/sys/mips/cavium/octeon_rnd.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/clock.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/random.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-rng.h>
-
-#define	OCTEON_RND_WORDS	2
-
-struct octeon_rnd_softc {
-	uint64_t sc_entropy[OCTEON_RND_WORDS];
-	struct callout sc_callout;
-};
-
-static void	octeon_rnd_identify(driver_t *drv, device_t parent);
-static int	octeon_rnd_attach(device_t dev);
-static int	octeon_rnd_probe(device_t dev);
-static int	octeon_rnd_detach(device_t dev);
-
-static void	octeon_rnd_harvest(void *);
-
-static device_method_t octeon_rnd_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify,	octeon_rnd_identify),
-	DEVMETHOD(device_probe,		octeon_rnd_probe),
-	DEVMETHOD(device_attach,	octeon_rnd_attach),
-	DEVMETHOD(device_detach,	octeon_rnd_detach),
-	{ 0, 0 }
-};
-
-static driver_t octeon_rnd_driver = {
-	"rnd",
-	octeon_rnd_methods,
-	sizeof (struct octeon_rnd_softc)
-};
-static devclass_t octeon_rnd_devclass;
-DRIVER_MODULE(rnd, nexus, octeon_rnd_driver, octeon_rnd_devclass, 0, 0);
-
-static void
-octeon_rnd_identify(driver_t *drv, device_t parent)
-{
-	BUS_ADD_CHILD(parent, 0, "rnd", 0);
-}
-
-static int
-octeon_rnd_probe(device_t dev)
-{
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Cavium Octeon Random Number Generator");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-octeon_rnd_attach(device_t dev)
-{
-	struct octeon_rnd_softc *sc;
-
-	sc = device_get_softc(dev);
-	callout_init(&sc->sc_callout, 1);
-	callout_reset(&sc->sc_callout, hz * 5, octeon_rnd_harvest, sc);
-
-	cvmx_rng_enable();
-
-	return (0);
-}
-
-static int
-octeon_rnd_detach(device_t dev)
-{
-	struct octeon_rnd_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	callout_stop(&sc->sc_callout);
-
-	return (0);
-}
-
-static void
-octeon_rnd_harvest(void *arg)
-{
-	struct octeon_rnd_softc *sc;
-	unsigned i;
-
-	sc = arg;
-
-	for (i = 0; i < OCTEON_RND_WORDS; i++)
-		sc->sc_entropy[i] = cvmx_rng_get_random64();
-	/* MarkM: FIX!! Check that this does not swamp the harvester! */
-	random_harvest_queue(sc->sc_entropy, sizeof sc->sc_entropy, RANDOM_PURE_OCTEON);
-
-	callout_reset(&sc->sc_callout, hz * 5, octeon_rnd_harvest, sc);
-}
diff --git a/sys/mips/cavium/octeon_rtc.c b/sys/mips/cavium/octeon_rtc.c
deleted file mode 100644
index 052694102f63..000000000000
--- a/sys/mips/cavium/octeon_rtc.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/clock.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-rtc.h>
-
-#include "clock_if.h"
-
-static int	octeon_rtc_attach(device_t dev);
-static int	octeon_rtc_probe(device_t dev);
-
-static int	octeon_rtc_settime(device_t dev, struct timespec *ts);
-static int	octeon_rtc_gettime(device_t dev, struct timespec *ts);
-
-static device_method_t octeon_rtc_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		octeon_rtc_probe),
-	DEVMETHOD(device_attach,	octeon_rtc_attach),
-
-	/* clock interface */
-	DEVMETHOD(clock_gettime,	octeon_rtc_gettime),
-	DEVMETHOD(clock_settime,	octeon_rtc_settime),
-	{ 0, 0 }
-};
-
-static driver_t octeon_rtc_driver = {
-	"rtc",
-	octeon_rtc_methods,
-	0
-};
-static devclass_t octeon_rtc_devclass;
-DRIVER_MODULE(rtc, nexus, octeon_rtc_driver, octeon_rtc_devclass, 0, 0);
-
-static int
-octeon_rtc_probe(device_t dev)
-{
-	cvmx_rtc_options_t supported;
-
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-
-	supported = cvmx_rtc_supported();
-	if (supported == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Cavium Octeon Realtime Clock");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-octeon_rtc_attach(device_t dev)
-{
-	cvmx_rtc_options_t supported;
-
-	supported = cvmx_rtc_supported();
-	if ((supported & CVMX_RTC_READ) == 0)
-		return (ENXIO);
-
-	clock_register(dev, 1000000);
-	return (0);
-}
-
-static int
-octeon_rtc_settime(device_t dev, struct timespec *ts)
-{
-	cvmx_rtc_options_t supported;
-	uint32_t status;
-
-	supported = cvmx_rtc_supported();
-	if ((supported & CVMX_RTC_WRITE) == 0)
-		return (ENOTSUP);
-
-	status = cvmx_rtc_write(ts->tv_sec);
-	if (status != 0)
-		return (EINVAL);
-
-	return (0);
-}
-
-static int
-octeon_rtc_gettime(device_t dev, struct timespec *ts)
-{
-	uint32_t secs;
-
-	secs = cvmx_rtc_read();
-	if (secs == 0)
-		return (ENOTSUP);
-
-	ts->tv_sec = secs;
-	ts->tv_nsec = 0;
-
-	return (0);
-}
diff --git a/sys/mips/cavium/octeon_wdog.c b/sys/mips/cavium/octeon_wdog.c
deleted file mode 100644
index 5ee390033796..000000000000
--- a/sys/mips/cavium/octeon_wdog.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2010-2011, Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Watchdog driver for Cavium Octeon
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/watchdog.h>
-#include <sys/bus.h>
-#include <sys/eventhandler.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/sysctl.h>
-#include <sys/rman.h>
-#include <sys/smp.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-
-#define	DEFAULT_TIMER_VAL	65535
-
-struct octeon_wdog_softc {
-	device_t sc_dev;
-	struct octeon_wdog_core_softc {
-		int csc_core;
-		struct resource *csc_intr;
-		void *csc_intr_cookie;
-	} sc_cores[MAXCPU];
-	int sc_armed;
-	int sc_debug;
-};
-
-extern void octeon_wdog_nmi_handler(void);
-void octeon_wdog_nmi(void);
-
-static void octeon_watchdog_arm_core(int);
-static void octeon_watchdog_disarm_core(int);
-static int octeon_wdog_attach(device_t);
-static void octeon_wdog_identify(driver_t *, device_t);
-static int octeon_wdog_intr(void *);
-static int octeon_wdog_probe(device_t);
-static void octeon_wdog_setup(struct octeon_wdog_softc *, int);
-static void octeon_wdog_sysctl(device_t);
-static void octeon_wdog_watchdog_fn(void *, u_int, int *);
-
-void
-octeon_wdog_nmi(void)
-{
-	int core;
-
-	core = cvmx_get_core_num();
-
-	printf("cpu%u: NMI detected\n", core);
-	printf("cpu%u: Exception PC: %p\n", core, (void *)mips_rd_excpc());
-	printf("cpu%u: status %#x cause %#x\n", core, mips_rd_status(), mips_rd_cause());
-
-	/*
-	 * This is the end
-	 * Beautiful friend
-	 *
-	 * Just wait for Soft Reset to come and take us
-	 */
-	for (;;)
-		continue;
-}
-
-static void
-octeon_watchdog_arm_core(int core)
-{
-	cvmx_ciu_wdogx_t ciu_wdog;
-
-	/* Poke it! */
-	cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1);
-
-	/*
-	 * XXX
-	 * Perhaps if KDB is enabled, we should use mode=2 and drop into the
-	 * debugger on NMI?
-	 *
-	 * XXX
-	 * Timer should be calculated based on CPU frquency
-	 */
-	ciu_wdog.u64 = 0;
-	ciu_wdog.s.len = DEFAULT_TIMER_VAL;
-	ciu_wdog.s.mode = 3;
-	cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64);
-}
-
-static void
-octeon_watchdog_disarm_core(int core)
-{
-
-	cvmx_write_csr(CVMX_CIU_WDOGX(core), 0);
-}
-
-static void
-octeon_wdog_watchdog_fn(void *private, u_int cmd, int *error)
-{
-	struct octeon_wdog_softc *sc = private;
-	int core;
-
-	cmd &= WD_INTERVAL;
-	if (sc->sc_debug)
-		device_printf(sc->sc_dev, "%s: cmd: %x\n", __func__, cmd);
-	if (cmd > 0) {
-		CPU_FOREACH(core)
-			octeon_watchdog_arm_core(core);
-		sc->sc_armed = 1;
-		*error = 0;
-	} else {
-		if (sc->sc_armed) {
-			CPU_FOREACH(core)
-				octeon_watchdog_disarm_core(core);
-			sc->sc_armed = 0;
-		}
-	}
-}
-
-static void
-octeon_wdog_sysctl(device_t dev)
-{
-	struct octeon_wdog_softc *sc = device_get_softc(dev);
-
-        struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
-        struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
-
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "debug", CTLFLAG_RW, &sc->sc_debug, 0,
-                "enable watchdog debugging");
-        SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-                "armed", CTLFLAG_RD, &sc->sc_armed, 0,
-                "whether the watchdog is armed");
-}
-
-static void
-octeon_wdog_setup(struct octeon_wdog_softc *sc, int core)
-{
-	struct octeon_wdog_core_softc *csc;
-	int rid, error;
-
-	csc = &sc->sc_cores[core];
-
-	csc->csc_core = core;
-
-	/* Interrupt part */
-	rid = 0;
-	csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid,
-	    OCTEON_IRQ_WDOG0 + core, OCTEON_IRQ_WDOG0 + core, 1, RF_ACTIVE);
-	if (csc->csc_intr == NULL)
-		panic("%s: bus_alloc_resource for core %u failed",
-		    __func__, core);
-
-	error = bus_setup_intr(sc->sc_dev, csc->csc_intr, INTR_TYPE_MISC,
-	    octeon_wdog_intr, NULL, csc, &csc->csc_intr_cookie);
-	if (error != 0)
-		panic("%s: bus_setup_intr for core %u: %d", __func__, core,
-		    error);
-
-	bus_bind_intr(sc->sc_dev, csc->csc_intr, core);
-	bus_describe_intr(sc->sc_dev, csc->csc_intr, csc->csc_intr_cookie,
-	    "cpu%u", core);
-
-	if (sc->sc_armed) {
-		/* Armed by default.  */
-		octeon_watchdog_arm_core(core);
-	} else {
-		/* Disarmed by default.  */
-		octeon_watchdog_disarm_core(core);
-	}
-}
-
-static int
-octeon_wdog_intr(void *arg)
-{
-	struct octeon_wdog_core_softc *csc = arg;
-
-	KASSERT(csc->csc_core == cvmx_get_core_num(),
-	    ("got watchdog interrupt for core %u on core %u.",
-	     csc->csc_core, cvmx_get_core_num()));
-
-	(void)csc;
-
-	/* Poke it! */
-	cvmx_write_csr(CVMX_CIU_PP_POKEX(cvmx_get_core_num()), 1);
-
-	return (FILTER_HANDLED);
-}
-
-static int
-octeon_wdog_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Cavium Octeon watchdog timer");
-	return (0);
-}
-
-static int
-octeon_wdog_attach(device_t dev)
-{
-	struct octeon_wdog_softc *sc = device_get_softc(dev);
-	uint64_t *nmi_handler = (uint64_t*)octeon_wdog_nmi_handler;
-	int core, i;
-
-	/* Initialise */
-	sc->sc_armed = 0; /* XXX Ought to be a tunable / config option.  */
-	sc->sc_debug = 0;
-
-	sc->sc_dev = dev;
-	EVENTHANDLER_REGISTER(watchdog_list, octeon_wdog_watchdog_fn, sc, 0);
-	octeon_wdog_sysctl(dev);
-
-	for (i = 0; i < 16; i++) {
-		cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8);
-		cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, nmi_handler[i]);
-        }
-
-	cvmx_write_csr(CVMX_MIO_BOOT_LOC_CFGX(0), 0x81fc0000);
-
-	CPU_FOREACH(core)
-		octeon_wdog_setup(sc, core);
-	return (0);
-}
-
-static void
-octeon_wdog_identify(driver_t *drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "owdog", 0);
-}
-
-static device_method_t octeon_wdog_methods[] = {
-	DEVMETHOD(device_identify, octeon_wdog_identify),
-
-	DEVMETHOD(device_probe, octeon_wdog_probe),
-	DEVMETHOD(device_attach, octeon_wdog_attach),
-	{0, 0},
-};
-
-static driver_t octeon_wdog_driver = {
-	"owdog",
-	octeon_wdog_methods,
-	sizeof(struct octeon_wdog_softc),
-};
-static devclass_t octeon_wdog_devclass;
-
-DRIVER_MODULE(owdog, ciu, octeon_wdog_driver, octeon_wdog_devclass, 0, 0);
diff --git a/sys/mips/cavium/octopci.c b/sys/mips/cavium/octopci.c
deleted file mode 100644
index 570f1682cca4..000000000000
--- a/sys/mips/cavium/octopci.c
+++ /dev/null
@@ -1,994 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010-2011 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-#include <contrib/octeon-sdk/cvmx-pcie.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-
-#include <dev/pci/pcib_private.h>
-
-#include <mips/cavium/octopcireg.h>
-#include <mips/cavium/octopcivar.h>
-
-#include "pcib_if.h"
-
-#define	NPI_WRITE(addr, value)	cvmx_write64_uint32((addr) ^ 4, (value))
-#define	NPI_READ(addr)		cvmx_read64_uint32((addr) ^ 4)
-
-struct octopci_softc {
-	device_t sc_dev;
-
-	unsigned sc_domain;
-	unsigned sc_bus;
-
-	bus_addr_t sc_io_base;
-	unsigned sc_io_next;
-	struct rman sc_io;
-
-	bus_addr_t sc_mem1_base;
-	unsigned sc_mem1_next;
-	struct rman sc_mem1;
-};
-
-static void		octopci_identify(driver_t *, device_t);
-static int		octopci_probe(device_t);
-static int		octopci_attach(device_t);
-static int		octopci_read_ivar(device_t, device_t, int,
-					  uintptr_t *);
-static struct resource	*octopci_alloc_resource(device_t, device_t, int, int *,
-						rman_res_t, rman_res_t,
-						rman_res_t, u_int);
-static int		octopci_activate_resource(device_t, device_t, int, int,
-						  struct resource *);
-static int	octopci_maxslots(device_t);
-static uint32_t	octopci_read_config(device_t, u_int, u_int, u_int, u_int, int);
-static void	octopci_write_config(device_t, u_int, u_int, u_int, u_int,
-				     uint32_t, int);
-static int	octopci_route_interrupt(device_t, device_t, int);
-
-static unsigned	octopci_init_bar(device_t, unsigned, unsigned, unsigned, unsigned, uint8_t *);
-static unsigned	octopci_init_device(device_t, unsigned, unsigned, unsigned, unsigned);
-static unsigned	octopci_init_bus(device_t, unsigned);
-static void	octopci_init_pci(device_t);
-static uint64_t	octopci_cs_addr(unsigned, unsigned, unsigned, unsigned);
-
-static void
-octopci_identify(driver_t *drv, device_t parent)
-{
-	BUS_ADD_CHILD(parent, 0, "pcib", 0);
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE))
-		BUS_ADD_CHILD(parent, 0, "pcib", 1);
-}
-
-static int
-octopci_probe(device_t dev)
-{
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
-		device_set_desc(dev, "Cavium Octeon PCIe bridge");
-		return (0);
-	}
-
-	/* Check whether we are a PCI host.  */
-	if ((cvmx_sysinfo_get()->bootloader_config_flags & CVMX_BOOTINFO_CFG_FLAG_PCI_HOST) == 0)
-		return (ENXIO);
-
-	if (device_get_unit(dev) != 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Cavium Octeon PCI bridge");
-	return (0);
-}
-
-static int
-octopci_attach(device_t dev)
-{
-	struct octopci_softc *sc;
-	unsigned subbus;
-	int error;
-
-	sc = device_get_softc(dev);
-	sc->sc_dev = dev;
-
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
-		sc->sc_domain = device_get_unit(dev);
-
-		error = cvmx_pcie_rc_initialize(sc->sc_domain);
-		if (error != 0) {
-			device_printf(dev, "Failed to put PCIe bus in host mode.\n");
-			return (ENXIO);
-		}
-
-		/*
-		 * In RC mode, the Simple Executive programs the first bus to
-		 * be numbered as bus 1, because some IDT bridges used in
-		 * Octeon systems object to being attached to bus 0.
-		 */
-		sc->sc_bus = 1;
-
-		sc->sc_io_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_io_base_address(sc->sc_domain));
-		sc->sc_io.rm_descr = "Cavium Octeon PCIe I/O Ports";
-
-		sc->sc_mem1_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_mem_base_address(sc->sc_domain));
-		sc->sc_mem1.rm_descr = "Cavium Octeon PCIe Memory";
-	} else {
-		octopci_init_pci(dev);
-
-		sc->sc_domain = 0;
-		sc->sc_bus = 0;
-
-		sc->sc_io_base = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI, CVMX_OCT_SUBDID_PCI_IO));
-		sc->sc_io.rm_descr = "Cavium Octeon PCI I/O Ports";
-
-		sc->sc_mem1_base = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI, CVMX_OCT_SUBDID_PCI_MEM1));
-		sc->sc_mem1.rm_descr = "Cavium Octeon PCI Memory";
-	}
-
-	sc->sc_io.rm_type = RMAN_ARRAY;
-	error = rman_init(&sc->sc_io);
-	if (error != 0)
-		return (error);
-
-	error = rman_manage_region(&sc->sc_io, CVMX_OCT_PCI_IO_BASE,
-	    CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE);
-	if (error != 0)
-		return (error);
-
-	sc->sc_mem1.rm_type = RMAN_ARRAY;
-	error = rman_init(&sc->sc_mem1);
-	if (error != 0)
-		return (error);
-
-	error = rman_manage_region(&sc->sc_mem1, CVMX_OCT_PCI_MEM1_BASE,
-	    CVMX_OCT_PCI_MEM1_BASE + CVMX_OCT_PCI_MEM1_SIZE);
-	if (error != 0)
-		return (error);
-
-	/*
-	 * Next offsets for resource allocation in octopci_init_bar.
-	 */
-	sc->sc_io_next = 0;
-	sc->sc_mem1_next = 0;
-
-	/*
-	 * Configure devices.
-	 */
-	octopci_write_config(dev, sc->sc_bus, 0, 0, PCIR_SUBBUS_1, 0xff, 1);
-	subbus = octopci_init_bus(dev, sc->sc_bus);
-	octopci_write_config(dev, sc->sc_bus, 0, 0, PCIR_SUBBUS_1, subbus, 1);
-
-	device_add_child(dev, "pci", -1);
-
-	return (bus_generic_attach(dev));
-}
-
-static int
-octopci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct octopci_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = sc->sc_domain;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_bus;
-		return (0);
-		
-	}
-	return (ENOENT);
-}
-
-static struct resource *
-octopci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct octopci_softc *sc;
-	struct resource *res;
-	struct rman *rm;
-	int error;
-
-	sc = device_get_softc(bus);
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		res = bus_generic_alloc_resource(bus, child, type, rid, start,
-		    end, count, flags);
-		if (res != NULL)
-			return (res);
-		return (NULL);
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem1;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io;
-		break;
-	default:
-		return (NULL);
-	}
-
-	res = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (res == NULL)
-		return (NULL);
-
-	rman_set_rid(res, *rid);
-	rman_set_bustag(res, octopci_bus_space);
-
-	switch (type) {
-	case SYS_RES_MEMORY:
-		rman_set_bushandle(res, sc->sc_mem1_base + rman_get_start(res));
-		break;
-	case SYS_RES_IOPORT:
-		rman_set_bushandle(res, sc->sc_io_base + rman_get_start(res));
-#if __mips_n64
-		rman_set_virtual(res, (void *)rman_get_bushandle(res));
-#else
-		/*
-		 * XXX
-		 * We can't access ports via a 32-bit pointer.
-		 */
-		rman_set_virtual(res, NULL);
-#endif
-		break;
-	}
-
-	if ((flags & RF_ACTIVE) != 0) {
-		error = bus_activate_resource(child, type, *rid, res);
-		if (error != 0) {
-			rman_release_resource(res);
-			return (NULL);
-		}
-	}
-
-	return (res);
-}
-
-static int
-octopci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *res)
-{
-	bus_space_handle_t bh;
-	int error;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		error = bus_generic_activate_resource(bus, child, type, rid,
-						      res);
-		if (error != 0)
-			return (error);
-		return (0);
-	case SYS_RES_MEMORY:
-	case SYS_RES_IOPORT:
-		error = bus_space_map(rman_get_bustag(res),
-		    rman_get_bushandle(res), rman_get_size(res), 0, &bh);
-		if (error != 0)
-			return (error);
-		rman_set_bushandle(res, bh);
-		break;
-	default:
-		return (ENXIO);
-	}
-
-	error = rman_activate_resource(res);
-	if (error != 0)
-		return (error);
-	return (0);
-}
-
-static int
-octopci_maxslots(device_t dev)
-{
-	return (PCI_SLOTMAX);
-}
-
-static uint32_t
-octopci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
-    int bytes)
-{
-	struct octopci_softc *sc;
-	uint64_t addr;
-	uint32_t data;
-
-	sc = device_get_softc(dev);
-
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
-		if (bus == 0 && slot == 0 && func == 0)
-			return ((uint32_t)-1);
-
-		switch (bytes) {
-		case 4:
-			return (cvmx_pcie_config_read32(sc->sc_domain, bus, slot, func, reg));
-		case 2:
-			return (cvmx_pcie_config_read16(sc->sc_domain, bus, slot, func, reg));
-		case 1:
-			return (cvmx_pcie_config_read8(sc->sc_domain, bus, slot, func, reg));
-		default:
-			return ((uint32_t)-1);
-		}
-	}
-
-	addr = octopci_cs_addr(bus, slot, func, reg);
-
-	switch (bytes) {
-	case 4:
-		data = le32toh(cvmx_read64_uint32(addr));
-		return (data);
-	case 2:
-		data = le16toh(cvmx_read64_uint16(addr));
-		return (data);
-	case 1:
-		data = cvmx_read64_uint8(addr);
-		return (data);
-	default:
-		return ((uint32_t)-1);
-	}
-}
-
-static void
-octopci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
-    u_int reg, uint32_t data, int bytes)
-{
-	struct octopci_softc *sc;
-	uint64_t addr;
-
-	sc = device_get_softc(dev);
-
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
-		switch (bytes) {
-		case 4:
-			cvmx_pcie_config_write32(sc->sc_domain, bus, slot, func, reg, data);
-			return;
-		case 2:
-			cvmx_pcie_config_write16(sc->sc_domain, bus, slot, func, reg, data);
-			return;
-		case 1:
-			cvmx_pcie_config_write8(sc->sc_domain, bus, slot, func, reg, data);
-			return;
-		default:
-			return;
-		}
-	}
-
-	addr = octopci_cs_addr(bus, slot, func, reg);
-
-	switch (bytes) {
-	case 4:
-		cvmx_write64_uint32(addr, htole32(data));
-		return;
-	case 2:
-		cvmx_write64_uint16(addr, htole16(data));
-		return;
-	case 1:
-		cvmx_write64_uint8(addr, data);
-		return;
-	default:
-		return;
-	}
-}
-
-static int
-octopci_route_interrupt(device_t dev, device_t child, int pin)
-{
-	struct octopci_softc *sc;
-	unsigned bus, slot, func;
-	unsigned irq;
-
-	sc = device_get_softc(dev);
-
-	if (octeon_has_feature(OCTEON_FEATURE_PCIE))
-		return (OCTEON_IRQ_PCI_INT0 + pin - 1);
-
-        bus = pci_get_bus(child);
-        slot = pci_get_slot(child);
-        func = pci_get_function(child);
-
-	/*
-	 * Board types we have to know at compile-time.
-	 */
-#if defined(OCTEON_BOARD_CAPK_0100ND)
-	if (bus == 0 && slot == 12 && func == 0)
-		return (OCTEON_IRQ_PCI_INT2);
-#endif
-
-	/*
-	 * For board types we can determine at runtime.
-	 */
-	switch (cvmx_sysinfo_get()->board_type) {
-#if defined(OCTEON_VENDOR_LANNER)
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
-		return (OCTEON_IRQ_PCI_INT0 + pin - 1);
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
-		if (slot < 32) {
-			if (slot == 3 || slot == 9)
-				irq = pin;
-			else
-				irq = pin - 1;
-			return (OCTEON_IRQ_PCI_INT0 + (irq & 3));
-		}
-		break;
-#endif
-	default:
-		break;
-	}
-
-	irq = slot + pin - 3;
-
-	return (OCTEON_IRQ_PCI_INT0 + (irq & 3));
-}
-
-static unsigned
-octopci_init_bar(device_t dev, unsigned b, unsigned s, unsigned f, unsigned barnum, uint8_t *commandp)
-{
-	struct octopci_softc *sc;
-	uint64_t bar;
-	unsigned size;
-	int barsize;
-
-	sc = device_get_softc(dev);
-
-	octopci_write_config(dev, b, s, f, PCIR_BAR(barnum), 0xffffffff, 4);
-	bar = octopci_read_config(dev, b, s, f, PCIR_BAR(barnum), 4);
-
-	if (bar == 0) {
-		/* Bar not implemented; got to next bar.  */
-		return (barnum + 1);
-	}
-
-	if (PCI_BAR_IO(bar)) {
-		size = ~(bar & PCIM_BAR_IO_BASE) + 1;
-
-		sc->sc_io_next = roundup2(sc->sc_io_next, size);
-		if (sc->sc_io_next + size > CVMX_OCT_PCI_IO_SIZE) {
-			device_printf(dev, "%02x.%02x:%02x: no ports for BAR%u.\n",
-			    b, s, f, barnum);
-			return (barnum + 1);
-		}
-		octopci_write_config(dev, b, s, f, PCIR_BAR(barnum),
-		    CVMX_OCT_PCI_IO_BASE + sc->sc_io_next, 4);
-		sc->sc_io_next += size;
-
-		/*
-		 * Enable I/O ports.
-		 */
-		*commandp |= PCIM_CMD_PORTEN;
-
-		return (barnum + 1);
-	} else {
-		if (PCIR_BAR(barnum) == PCIR_BIOS) {
-			/*
-			 * ROM BAR is always 32-bit.
-			 */
-			barsize = 1;
-		} else {
-			switch (bar & PCIM_BAR_MEM_TYPE) {
-			case PCIM_BAR_MEM_64:
-				/*
-				 * XXX
-				 * High 32 bits are all zeroes for now.
-				 */
-				octopci_write_config(dev, b, s, f, PCIR_BAR(barnum + 1), 0, 4);
-				barsize = 2;
-				break;
-			default:
-				barsize = 1;
-				break;
-			}
-		}
-
-		size = ~(bar & (uint32_t)PCIM_BAR_MEM_BASE) + 1;
-
-		sc->sc_mem1_next = roundup2(sc->sc_mem1_next, size);
-		if (sc->sc_mem1_next + size > CVMX_OCT_PCI_MEM1_SIZE) {
-			device_printf(dev, "%02x.%02x:%02x: no memory for BAR%u.\n",
-			    b, s, f, barnum);
-			return (barnum + barsize);
-		}
-		octopci_write_config(dev, b, s, f, PCIR_BAR(barnum),
-		    CVMX_OCT_PCI_MEM1_BASE + sc->sc_mem1_next, 4);
-		sc->sc_mem1_next += size;
-
-		/*
-		 * Enable memory access.
-		 */
-		*commandp |= PCIM_CMD_MEMEN;
-
-		return (barnum + barsize);
-	}
-}
-
-static unsigned
-octopci_init_device(device_t dev, unsigned b, unsigned s, unsigned f, unsigned secbus)
-{
-	unsigned barnum, bars;
-	uint8_t brctl;
-	uint8_t class, subclass;
-	uint8_t command;
-	uint8_t hdrtype;
-
-	/* Read header type (again.)  */
-	hdrtype = octopci_read_config(dev, b, s, f, PCIR_HDRTYPE, 1);
-
-	/*
-	 * Disable memory and I/O while programming BARs.
-	 */
-	command = octopci_read_config(dev, b, s, f, PCIR_COMMAND, 1);
-	command &= ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN);
-	octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1);
-
-	DELAY(10000);
-
-	/* Program BARs.  */
-	switch (hdrtype & PCIM_HDRTYPE) {
-	case PCIM_HDRTYPE_NORMAL:
-		bars = 6;
-		break;
-	case PCIM_HDRTYPE_BRIDGE:
-		bars = 2;
-		break;
-	case PCIM_HDRTYPE_CARDBUS:
-		bars = 0;
-		break;
-	default:
-		device_printf(dev, "%02x.%02x:%02x: invalid header type %#x\n",
-		    b, s, f, hdrtype);
-		return (secbus);
-	}
-
-	barnum = 0;
-	while (barnum < bars)
-		barnum = octopci_init_bar(dev, b, s, f, barnum, &command);
-
-	/* Enable bus mastering.  */
-	command |= PCIM_CMD_BUSMASTEREN;
-
-	/* Enable whatever facilities the BARs require.  */
-	octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1);
-
-	DELAY(10000);
-
-	/* 
-	 * Set cache line size.  On Octeon it should be 128 bytes,
-	 * but according to Linux some Intel bridges have trouble
-	 * with values over 64 bytes, so use 64 bytes.
-	 */
-	octopci_write_config(dev, b, s, f, PCIR_CACHELNSZ, 16, 1);
-
-	/* Set latency timer.  */
-	octopci_write_config(dev, b, s, f, PCIR_LATTIMER, 48, 1);
-
-	/* Board-specific or device-specific fixups and workarounds.  */
-	switch (cvmx_sysinfo_get()->board_type) {
-#if defined(OCTEON_VENDOR_LANNER)
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
-		if (b == 1 && s == 7 && f == 0) {
-			bus_addr_t busaddr, unitbusaddr;
-			uint32_t bar;
-			uint32_t tmp;
-			unsigned unit;
-
-			/*
-			 * Set Tx DMA power.
-			 */
-			bar = octopci_read_config(dev, b, s, f,
-			    PCIR_BAR(3), 4);
-			busaddr = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI,
-			    CVMX_OCT_SUBDID_PCI_MEM1));
-			busaddr += (bar & (uint32_t)PCIM_BAR_MEM_BASE);
-			for (unit = 0; unit < 4; unit++) {
-				unitbusaddr = busaddr + 0x430 + (unit << 8);
-				tmp = le32toh(cvmx_read64_uint32(unitbusaddr));
-				tmp &= ~0x700;
-				tmp |= 0x300;
-				cvmx_write64_uint32(unitbusaddr, htole32(tmp));
-			}
-		}
-		break;
-#endif
-	default:
-		break;
-	}
-
-	/* Configure PCI-PCI bridges.  */
-	class = octopci_read_config(dev, b, s, f, PCIR_CLASS, 1);
-	if (class != PCIC_BRIDGE)
-		return (secbus);
-
-	subclass = octopci_read_config(dev, b, s, f, PCIR_SUBCLASS, 1);
-	if (subclass != PCIS_BRIDGE_PCI)
-		return (secbus);
-
-	/* Enable memory and I/O access.  */
-	command |= PCIM_CMD_MEMEN | PCIM_CMD_PORTEN;
-	octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1);
-
-	/* Enable errors and parity checking.  Do a bus reset.  */
-	brctl = octopci_read_config(dev, b, s, f, PCIR_BRIDGECTL_1, 1);
-	brctl |= PCIB_BCR_PERR_ENABLE | PCIB_BCR_SERR_ENABLE;
-
-	/* Perform a secondary bus reset.  */
-	brctl |= PCIB_BCR_SECBUS_RESET;
-	octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1);
-	DELAY(100000);
-	brctl &= ~PCIB_BCR_SECBUS_RESET;
-	octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1);
-
-	secbus++;
-
-	/* Program memory and I/O ranges.  */
-	octopci_write_config(dev, b, s, f, PCIR_MEMBASE_1,
-	    CVMX_OCT_PCI_MEM1_BASE >> 16, 2);
-	octopci_write_config(dev, b, s, f, PCIR_MEMLIMIT_1,
-	    (CVMX_OCT_PCI_MEM1_BASE + CVMX_OCT_PCI_MEM1_SIZE - 1) >> 16, 2);
-
-	octopci_write_config(dev, b, s, f, PCIR_IOBASEL_1,
-	    CVMX_OCT_PCI_IO_BASE >> 8, 1);
-	octopci_write_config(dev, b, s, f, PCIR_IOBASEH_1,
-	    CVMX_OCT_PCI_IO_BASE >> 16, 2);
-
-	octopci_write_config(dev, b, s, f, PCIR_IOLIMITL_1,
-	    (CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE - 1) >> 8, 1);
-	octopci_write_config(dev, b, s, f, PCIR_IOLIMITH_1,
-	    (CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE - 1) >> 16, 2);
-
-	/* Program prefetchable memory decoder.  */
-	/* XXX */
-
-	/* Probe secondary/subordinate buses.  */
-	octopci_write_config(dev, b, s, f, PCIR_PRIBUS_1, b, 1);
-	octopci_write_config(dev, b, s, f, PCIR_SECBUS_1, secbus, 1);
-	octopci_write_config(dev, b, s, f, PCIR_SUBBUS_1, 0xff, 1);
-
-	/* Perform a secondary bus reset.  */
-	brctl |= PCIB_BCR_SECBUS_RESET;
-	octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1);
-	DELAY(100000);
-	brctl &= ~PCIB_BCR_SECBUS_RESET;
-	octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1);
-
-	/* Give the bus time to settle now before reading configspace.  */
-	DELAY(100000);
-
-	secbus = octopci_init_bus(dev, secbus);
-
-	octopci_write_config(dev, b, s, f, PCIR_SUBBUS_1, secbus, 1);
-
-	return (secbus);
-}
-
-static unsigned
-octopci_init_bus(device_t dev, unsigned b)
-{
-	unsigned s, f;
-	uint8_t hdrtype;
-	unsigned secbus;
-
-	secbus = b;
-
-	for (s = 0; s <= PCI_SLOTMAX; s++) {
-		for (f = 0; f <= PCI_FUNCMAX; f++) {
-			hdrtype = octopci_read_config(dev, b, s, f, PCIR_HDRTYPE, 1);
-
-			if (hdrtype == 0xff) {
-				if (f == 0)
-					break; /* Next slot.  */
-				continue; /* Next function.  */
-			}
-
-			secbus = octopci_init_device(dev, b, s, f, secbus);
-
-			if (f == 0 && (hdrtype & PCIM_MFDEV) == 0)
-				break; /* Next slot.  */
-		}
-	}
-
-	return (secbus);
-}
-
-static uint64_t
-octopci_cs_addr(unsigned bus, unsigned slot, unsigned func, unsigned reg)
-{
-	octeon_pci_config_space_address_t pci_addr;
-
-	pci_addr.u64 = 0;
-	pci_addr.s.upper = 2;
-	pci_addr.s.io = 1;
-	pci_addr.s.did = 3;
-	pci_addr.s.subdid = CVMX_OCT_SUBDID_PCI_CFG;
-	pci_addr.s.endian_swap = 1;
-	pci_addr.s.bus = bus;
-	pci_addr.s.dev = slot;
-	pci_addr.s.func = func;
-	pci_addr.s.reg = reg;
-
-	return (pci_addr.u64);
-}
-
-static void
-octopci_init_pci(device_t dev)
-{
-	cvmx_npi_mem_access_subid_t npi_mem_access_subid;
-	cvmx_npi_pci_int_arb_cfg_t npi_pci_int_arb_cfg;
-	cvmx_npi_ctl_status_t npi_ctl_status;
-	cvmx_pci_ctl_status_2_t pci_ctl_status_2;
-	cvmx_pci_cfg56_t pci_cfg56;
-	cvmx_pci_cfg22_t pci_cfg22;
-	cvmx_pci_cfg16_t pci_cfg16;
-	cvmx_pci_cfg19_t pci_cfg19;
-	cvmx_pci_cfg01_t pci_cfg01;
-	unsigned i;
-
-	/*
-	 * Reset the PCI bus.
-	 */
-	cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x1);
-	cvmx_read_csr(CVMX_CIU_SOFT_PRST);
-
-	DELAY(2000);
-
-	npi_ctl_status.u64 = 0;
-	npi_ctl_status.s.max_word = 1;
-	npi_ctl_status.s.timer = 1;
-	cvmx_write_csr(CVMX_NPI_CTL_STATUS, npi_ctl_status.u64);
-
-	/*
-	 * Set host mode.
-	 */
-	switch (cvmx_sysinfo_get()->board_type) {
-#if defined(OCTEON_VENDOR_LANNER)
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
-		/* 32-bit PCI-X */
-		cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x0);
-		break;
-#endif
-	default:
-		/* 64-bit PCI-X */
-		cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x4);
-		break;
-	}
-	cvmx_read_csr(CVMX_CIU_SOFT_PRST);
-
-	DELAY(2000);
-
-	/*
-	 * Enable BARs and configure big BAR mode.
-	 */
-	pci_ctl_status_2.u32 = 0;
-	pci_ctl_status_2.s.bb1_hole = 5; /* 256MB hole in BAR1 */
-	pci_ctl_status_2.s.bb1_siz = 1; /* BAR1 is 2GB */
-	pci_ctl_status_2.s.bb_ca = 1; /* Bypass cache for big BAR */
-	pci_ctl_status_2.s.bb_es = 1; /* Do big BAR byte-swapping */
-	pci_ctl_status_2.s.bb1 = 1; /* BAR1 is big */
-	pci_ctl_status_2.s.bb0 = 1; /* BAR0 is big */
-	pci_ctl_status_2.s.bar2pres = 1; /* BAR2 present */
-	pci_ctl_status_2.s.pmo_amod = 1; /* Round-robin priority */
-	pci_ctl_status_2.s.tsr_hwm = 1;
-	pci_ctl_status_2.s.bar2_enb = 1; /* Enable BAR2 */
-	pci_ctl_status_2.s.bar2_esx = 1; /* Do BAR2 byte-swapping */
-	pci_ctl_status_2.s.bar2_cax = 1; /* Bypass cache for BAR2 */
-
-	NPI_WRITE(CVMX_NPI_PCI_CTL_STATUS_2, pci_ctl_status_2.u32);
-
-	DELAY(2000);
-
-	pci_ctl_status_2.u32 = NPI_READ(CVMX_NPI_PCI_CTL_STATUS_2);
-
-	device_printf(dev, "%u-bit PCI%s bus.\n",
-	    pci_ctl_status_2.s.ap_64ad ? 64 : 32,
-	    pci_ctl_status_2.s.ap_pcix ? "-X" : "");
-
-	/*
-	 * Set up transaction splitting, etc., parameters.
-	 */
-	pci_cfg19.u32 = 0;
-	pci_cfg19.s.mrbcm = 1;
-	if (pci_ctl_status_2.s.ap_pcix) {
-		pci_cfg19.s.mdrrmc = 0;
-		pci_cfg19.s.tdomc = 4;
-	} else {
-		pci_cfg19.s.mdrrmc = 2;
-		pci_cfg19.s.tdomc = 1;
-	}
-	NPI_WRITE(CVMX_NPI_PCI_CFG19, pci_cfg19.u32);
-	NPI_READ(CVMX_NPI_PCI_CFG19);
-
-	/*
-	 * Set up PCI error handling and memory access.
-	 */
-	pci_cfg01.u32 = 0;
-	pci_cfg01.s.fbbe = 1;
-	pci_cfg01.s.see = 1;
-	pci_cfg01.s.pee = 1;
-	pci_cfg01.s.me = 1;
-	pci_cfg01.s.msae = 1;
-	if (pci_ctl_status_2.s.ap_pcix) {
-		pci_cfg01.s.fbb = 0;
-	} else {
-		pci_cfg01.s.fbb = 1;
-	}
-	NPI_WRITE(CVMX_NPI_PCI_CFG01, pci_cfg01.u32);
-	NPI_READ(CVMX_NPI_PCI_CFG01);
-
-	/*
-	 * Enable the Octeon bus arbiter.
-	 */
-	npi_pci_int_arb_cfg.u64 = 0;
-	npi_pci_int_arb_cfg.s.en = 1;
-	cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, npi_pci_int_arb_cfg.u64);
-
-	/*
-	 * Disable master latency timer.
-	 */
-	pci_cfg16.u32 = 0;
-	pci_cfg16.s.mltd = 1;
-	NPI_WRITE(CVMX_NPI_PCI_CFG16, pci_cfg16.u32);
-	NPI_READ(CVMX_NPI_PCI_CFG16);
-
-	/*
-	 * Configure master arbiter.
-	 */
-	pci_cfg22.u32 = 0;
-	pci_cfg22.s.flush = 1;
-	pci_cfg22.s.mrv = 255;
-	NPI_WRITE(CVMX_NPI_PCI_CFG22, pci_cfg22.u32);
-	NPI_READ(CVMX_NPI_PCI_CFG22);
-
-	/*
-	 * Set up PCI-X capabilities.
-	 */
-	if (pci_ctl_status_2.s.ap_pcix) {
-		pci_cfg56.u32 = 0;
-		pci_cfg56.s.most = 3;
-		pci_cfg56.s.roe = 1; /* Enable relaxed ordering */
-		pci_cfg56.s.dpere = 1;
-		pci_cfg56.s.ncp = 0xe8;
-		pci_cfg56.s.pxcid = 7;
-		NPI_WRITE(CVMX_NPI_PCI_CFG56, pci_cfg56.u32);
-		NPI_READ(CVMX_NPI_PCI_CFG56);
-	}
-
-	NPI_WRITE(CVMX_NPI_PCI_READ_CMD_6, 0x22);
-	NPI_READ(CVMX_NPI_PCI_READ_CMD_6);
-	NPI_WRITE(CVMX_NPI_PCI_READ_CMD_C, 0x33);
-	NPI_READ(CVMX_NPI_PCI_READ_CMD_C);
-	NPI_WRITE(CVMX_NPI_PCI_READ_CMD_E, 0x33);
-	NPI_READ(CVMX_NPI_PCI_READ_CMD_E);
-
-	/*
-	 * Configure MEM1 sub-DID access.
-	 */
-	npi_mem_access_subid.u64 = 0;
-	npi_mem_access_subid.s.esr = 1; /* Byte-swap on read */
-	npi_mem_access_subid.s.esw = 1; /* Byte-swap on write */
-	switch (cvmx_sysinfo_get()->board_type) {
-#if defined(OCTEON_VENDOR_LANNER)
-	case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
-		npi_mem_access_subid.s.shortl = 1;
-		break;
-#endif
-	default:
-		break;
-	}
-	cvmx_write_csr(CVMX_NPI_MEM_ACCESS_SUBID3, npi_mem_access_subid.u64);
-
-	/*
-	 * Configure BAR2.  Linux says this has to come first.
-	 */
-	NPI_WRITE(CVMX_NPI_PCI_CFG08, 0x00000000);
-	NPI_READ(CVMX_NPI_PCI_CFG08);
-	NPI_WRITE(CVMX_NPI_PCI_CFG09, 0x00000080);
-	NPI_READ(CVMX_NPI_PCI_CFG09);
-
-	/*
-	 * Disable BAR1 IndexX.
-	 */
-	for (i = 0; i < 32; i++) {
-		NPI_WRITE(CVMX_NPI_PCI_BAR1_INDEXX(i), 0);
-		NPI_READ(CVMX_NPI_PCI_BAR1_INDEXX(i));
-	}
-
-	/*
-	 * Configure BAR0 and BAR1.
-	 */
-	NPI_WRITE(CVMX_NPI_PCI_CFG04, 0x00000000);
-	NPI_READ(CVMX_NPI_PCI_CFG04);
-	NPI_WRITE(CVMX_NPI_PCI_CFG05, 0x00000000);
-	NPI_READ(CVMX_NPI_PCI_CFG05);
-
-	NPI_WRITE(CVMX_NPI_PCI_CFG06, 0x80000000);
-	NPI_READ(CVMX_NPI_PCI_CFG06);
-	NPI_WRITE(CVMX_NPI_PCI_CFG07, 0x00000000);
-	NPI_READ(CVMX_NPI_PCI_CFG07);
-
-	/*
-	 * Clear PCI interrupts.
-	 */
-	cvmx_write_csr(CVMX_NPI_PCI_INT_SUM2, 0xffffffffffffffffull);
-}
-
-static device_method_t octopci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify,	octopci_identify),
-	DEVMETHOD(device_probe,		octopci_probe),
-	DEVMETHOD(device_attach,	octopci_attach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	octopci_read_ivar),
-	DEVMETHOD(bus_alloc_resource,	octopci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource,octopci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource,bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
-
-	DEVMETHOD(bus_add_child,	bus_generic_add_child),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	octopci_maxslots),
-	DEVMETHOD(pcib_read_config,	octopci_read_config),
-	DEVMETHOD(pcib_write_config,	octopci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	octopci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t octopci_driver = {
-	"pcib",
-	octopci_methods,
-	sizeof(struct octopci_softc),
-};
-static devclass_t octopci_devclass;
-DRIVER_MODULE(octopci, ciu, octopci_driver, octopci_devclass, 0, 0);
diff --git a/sys/mips/cavium/octopci_bus_space.c b/sys/mips/cavium/octopci_bus_space.c
deleted file mode 100644
index c6bdc384cfbc..000000000000
--- a/sys/mips/cavium/octopci_bus_space.c
+++ /dev/null
@@ -1,575 +0,0 @@
-/*      $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $    */
-/*-
- * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
- *
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-4-Clause
- *
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Christopher G. Demetriou
- *	for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-#include <sys/endian.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-#include <mips/cavium/octopcivar.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-static struct bus_space octopci_space = {
-	/* cookie */
-	(void *) 0,
-
-	/* mapping/unmapping */
-	octopci_bs_map,
-	octopci_bs_unmap,
-	octopci_bs_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	octopci_bs_barrier,
-
-	/* read (single) */
-	octopci_bs_r_1,
-	octopci_bs_r_2,
-	octopci_bs_r_4,
-	NULL,
-
-	/* read multiple */
-	octopci_bs_rm_1,
-	octopci_bs_rm_2,
-	octopci_bs_rm_4,
-	NULL,
-
-	/* read region */
-	octopci_bs_rr_1,
-	octopci_bs_rr_2,
-	octopci_bs_rr_4,
-	NULL,
-
-	/* write (single) */
-	octopci_bs_w_1,
-	octopci_bs_w_2,
-	octopci_bs_w_4,
-	NULL,
-
-	/* write multiple */
-	octopci_bs_wm_1,
-	octopci_bs_wm_2,
-	octopci_bs_wm_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	octopci_bs_wr_2,
-	octopci_bs_wr_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	octopci_bs_sr_2,
-	octopci_bs_sr_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	octopci_bs_c_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	octopci_bs_r_1,
-	octopci_bs_r_2,
-	octopci_bs_r_4,
-	NULL,
-
-	/* read multiple stream */
-	octopci_bs_rm_1,
-	octopci_bs_rm_2,
-	octopci_bs_rm_4,
-	NULL,
-
-	/* read region stream */
-	octopci_bs_rr_1,
-	octopci_bs_rr_2,
-	octopci_bs_rr_4,
-	NULL,
-
-	/* write (single) stream */
-	octopci_bs_w_1,
-	octopci_bs_w_2,
-	octopci_bs_w_4,
-	NULL,
-
-	/* write multiple stream */
-	octopci_bs_wm_1,
-	octopci_bs_wm_2,
-	octopci_bs_wm_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	octopci_bs_wr_2,
-	octopci_bs_wr_4,
-	NULL,
-};
-
-#define rd8(a)		cvmx_read64_uint8(a)
-#define rd16(a)		le16toh(cvmx_read64_uint16(a))
-#define rd32(a)		le32toh(cvmx_read64_uint32(a))
-#define wr8(a, v)	cvmx_write64_uint8(a, v)
-#define wr16(a, v)	cvmx_write64_uint16(a, htole16(v))
-#define wr32(a, v)	cvmx_write64_uint32(a, htole32(v))
-
-/* octopci bus_space tag */
-bus_space_tag_t octopci_bus_space = &octopci_space;
-
-int
-octopci_bs_map(void *t __unused, bus_addr_t addr,
-	      bus_size_t size __unused, int flags __unused,
-	      bus_space_handle_t *bshp)
-{
-
-	*bshp = addr;
-	return (0);
-}
-
-void
-octopci_bs_unmap(void *t __unused, bus_space_handle_t bh __unused,
-	      bus_size_t size __unused)
-{
-
-	/* Do nothing */
-}
-
-int
-octopci_bs_subregion(void *t __unused, bus_space_handle_t handle,
-	      bus_size_t offset, bus_size_t size __unused,
-	      bus_space_handle_t *bshp)
-{
-
-	*bshp = handle + offset;
-	return (0);
-}
-
-uint8_t
-octopci_bs_r_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd8(handle + offset));
-}
-
-uint16_t
-octopci_bs_r_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd16(handle + offset));
-}
-
-uint32_t
-octopci_bs_r_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd32(handle + offset));
-}
-
-void
-octopci_bs_rm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t *addr, size_t count)
-{
-
-	while (count--)
-		*addr++ = rd8(bsh + offset);
-}
-
-void
-octopci_bs_rm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd16(baddr);
-}
-
-void
-octopci_bs_rm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd32(baddr);
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-octopci_bs_rr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd8(baddr);
-		baddr += 1;
-	}
-}
-
-void
-octopci_bs_rr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd16(baddr);
-		baddr += 2;
-	}
-}
-
-void
-octopci_bs_rr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd32(baddr);
-		baddr += 4;
-	}
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-void
-octopci_bs_w_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value)
-{
-
-	wr8(bsh + offset, value);
-}
-
-void
-octopci_bs_w_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value)
-{
-
-	wr16(bsh + offset, value);
-}
-
-void
-octopci_bs_w_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value)
-{
-
-	wr32(bsh + offset, value);
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-void
-octopci_bs_wm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr8(baddr, *addr++);
-}
-
-void
-octopci_bs_wm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr16(baddr, *addr++);
-}
-
-void
-octopci_bs_wm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr32(baddr, *addr++);
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
- * to bus space described by tag/handle starting at `offset'.
- */
-void
-octopci_bs_wr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr8(baddr, *addr++);
-		baddr += 1;
-	}
-}
-
-void
-octopci_bs_wr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr16(baddr, *addr++);
-		baddr += 2;
-	}
-}
-
-void
-octopci_bs_wr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr32(baddr, *addr++);
-		baddr += 4;
-	}
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle/offset `count' times.
- */
-void
-octopci_bs_sm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr8(addr, value);
-}
-
-void
-octopci_bs_sm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr16(addr, value);
-}
-
-void
-octopci_bs_sm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr32(addr, value);
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-void
-octopci_bs_sr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr++)
-		wr8(addr, value);
-}
-
-void
-octopci_bs_sr_2(void *t, bus_space_handle_t bsh,
-		       bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		wr16(addr, value);
-}
-
-void
-octopci_bs_sr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		wr32(addr, value);
-}
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-void
-octopci_bs_c_1(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1++, addr2++)
-			wr8(addr2, rd8(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += (count - 1), addr2 += (count - 1);
-		    count != 0; count--, addr1--, addr2--)
-			wr8(addr2, rd8(addr1));
-	}
-}
-
-void
-octopci_bs_c_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1 += 2, addr2 += 2)
-			wr16(addr2, rd16(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
-		    count != 0; count--, addr1 -= 2, addr2 -= 2)
-			wr16(addr2, rd16(addr1));
-	}
-}
-
-void
-octopci_bs_c_4(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1 += 4, addr2 += 4)
-			wr32(addr2, rd32(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
-		    count != 0; count--, addr1 -= 4, addr2 -= 4)
-			wr32(addr2, rd32(addr1));
-	}
-}
-
-void
-octopci_bs_barrier(void *t __unused, 
-		bus_space_handle_t bsh __unused,
-		bus_size_t offset __unused, bus_size_t len __unused, 
-		int flags)
-{
-#if 0
-	if (flags & BUS_SPACE_BARRIER_WRITE)
-		mips_dcache_wbinv_all();
-#endif
-}
diff --git a/sys/mips/cavium/octopcireg.h b/sys/mips/cavium/octopcireg.h
deleted file mode 100644
index 5cfe2e4a27fd..000000000000
--- a/sys/mips/cavium/octopcireg.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/***********************license start************************************
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2005-2007 Cavium Networks (support@cavium.com). All rights
- * reserved.
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *
- *     * Redistributions in binary form must reproduce the above
- *       copyright notice, this list of conditions and the following
- *       disclaimer in the documentation and/or other materials provided
- *       with the distribution.
- *
- *     * Neither the name of Cavium Networks nor the names of
- *       its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written
- *       permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION.  THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing@caviumnetworks.com
- *
- ***********************license end**************************************/
-/* $FreeBSD$ */
-
-#ifndef	_CAVIUM_OCTOPCIREG_H_
-#define	_CAVIUM_OCTOPCIREG_H_
-
-/**
- * This is the bit decoding used for the Octeon PCI controller addresses for config space
- */
-typedef union
-{
-    uint64_t    u64;
-    uint64_t *  u64_ptr;
-    uint32_t *  u32_ptr;
-    uint16_t *  u16_ptr;
-    uint8_t *   u8_ptr;
-    struct
-    {
-        uint64_t    upper       : 2;
-        uint64_t    reserved    : 13;
-        uint64_t    io          : 1;
-        uint64_t    did         : 5;
-        uint64_t    subdid      : 3;
-        uint64_t    reserved2   : 4;
-        uint64_t    endian_swap : 2;
-        uint64_t    reserved3   : 10;
-        uint64_t    bus         : 8;
-        uint64_t    dev         : 5;
-        uint64_t    func        : 3;
-        uint64_t    reg         : 8;
-    } s;
-} octeon_pci_config_space_address_t;
-
-typedef union
-{
-    uint64_t    u64;
-    uint32_t *  u32_ptr;
-    uint16_t *  u16_ptr;
-    uint8_t *   u8_ptr;
-    struct
-    {
-        uint64_t    upper       : 2;
-        uint64_t    reserved    : 13;
-        uint64_t    io          : 1;
-        uint64_t    did         : 5;
-        uint64_t    subdid      : 3;
-        uint64_t    reserved2   : 4;
-        uint64_t    endian_swap : 2;
-        uint64_t    res1        : 1;
-        uint64_t    port        : 1;
-        uint64_t    addr        : 32;
-    } s;
-} octeon_pci_io_space_address_t;
-
-#define CVMX_OCT_SUBDID_PCI_CFG     1
-#define CVMX_OCT_SUBDID_PCI_IO      2
-#define CVMX_OCT_SUBDID_PCI_MEM1    3
-#define CVMX_OCT_SUBDID_PCI_MEM2    4
-#define CVMX_OCT_SUBDID_PCI_MEM3    5
-#define CVMX_OCT_SUBDID_PCI_MEM4    6
-
-#define	CVMX_OCT_PCI_IO_BASE	0x00004000
-#define	CVMX_OCT_PCI_IO_SIZE	0x08000000
-
-#define	CVMX_OCT_PCI_MEM1_BASE	0xf0000000
-#define	CVMX_OCT_PCI_MEM1_SIZE	0x0f000000
-
-#endif /* !_CAVIUM_OCTOPCIREG_H_ */
diff --git a/sys/mips/cavium/octopcivar.h b/sys/mips/cavium/octopcivar.h
deleted file mode 100644
index 35e3b13e5a62..000000000000
--- a/sys/mips/cavium/octopcivar.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_MIPS_CAVIUM_OCTOPCIVAR_H
-#define	_MIPS_CAVIUM_OCTOPCIVAR_H
-
-DECLARE_BUS_SPACE_PROTOTYPES(octopci);
-
-extern bus_space_tag_t octopci_bus_space;
-
-#endif /* !_MIPS_CAVIUM_OCTOPCIVAR_H */
diff --git a/sys/mips/cavium/std.octeon1 b/sys/mips/cavium/std.octeon1
deleted file mode 100644
index d5ff64bf7044..000000000000
--- a/sys/mips/cavium/std.octeon1
+++ /dev/null
@@ -1,10 +0,0 @@
-# $FreeBSD$
-# 
-files	"../cavium/files.octeon1"
-machine	mips mips64
-cpu		CPU_CNMIPS
-
-makeoptions CFLAGS_PARAM_INLINE_UNIT_GROWTH=10000
-makeoptions CFLAGS_PARAM_LARGE_FUNCTION_GROWTH=100000
-makeoptions CFLAGS_ARCH_PARAMS="--param max-inline-insns-single=10000"
-makeoptions "CWARNFLAGS.clang"+="-Wno-parentheses-equality -Wno-pointer-sign"
diff --git a/sys/mips/cavium/uart_bus_octeonusart.c b/sys/mips/cavium/uart_bus_octeonusart.c
deleted file mode 100644
index 8569f4fdc03d..000000000000
--- a/sys/mips/cavium/uart_bus_octeonusart.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-/*
- * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
- * experimental and was written for MIPS32 port.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-#include "uart_if.h"
-
-extern struct uart_class uart_oct16550_class;
-
-static int uart_octeon_probe(device_t dev);
-
-static device_method_t uart_octeon_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, uart_octeon_probe),
-	DEVMETHOD(device_attach, uart_bus_attach),
-	DEVMETHOD(device_detach, uart_bus_detach),
-	{0, 0}
-};
-
-static driver_t uart_octeon_driver = {
-	uart_driver_name,
-	uart_octeon_methods,
-	sizeof(struct uart_softc),
-};
-
-extern 
-SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-static int
-uart_octeon_probe(device_t dev)
-{
-	struct uart_softc *sc;
-	int unit;
-
-	unit = device_get_unit(dev);
-	sc = device_get_softc(dev);
-	sc->sc_class = &uart_oct16550_class;
-
-	/*
-	 * We inherit the settings from the systme console.  Note, the bst
-	 * bad bus_space_map are bogus here, but obio doesn't yet support
-	 * them, it seems.
-	 */
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_bas.bst = uart_bus_space_mem;
-	/*
-	 * XXX
-	 * RBR isn't really a great base address.
-	 */
-	if (bus_space_map(sc->sc_bas.bst, CVMX_MIO_UARTX_RBR(0),
-	    uart_getrange(sc->sc_class), 0, &sc->sc_bas.bsh) != 0)
-		return (ENXIO);
-	return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, 0, unit, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_octeon_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/cavium/uart_cpu_octeonusart.c b/sys/mips/cavium/uart_cpu_octeonusart.c
deleted file mode 100644
index 5aca02becee0..000000000000
--- a/sys/mips/cavium/uart_cpu_octeonusart.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> All rights reserved.
- * Copyright (c) 2009 M. Warner Losh <imp@FreeBSD.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-/*
- * Specailized uart bus space.  We present a 1 apart byte oriented
- * bus to the outside world, but internally translate to/from the 8-apart
- * 64-bit word bus that's on the octeon.  We only support simple read/write
- * in this space.  Everything else is undefined.
- */
-static uint8_t
-ou_bs_r_1(void *t, bus_space_handle_t handle, bus_size_t offset)
-{
-
-	return (cvmx_read64_uint64(handle + offset));
-}
-
-static uint16_t
-ou_bs_r_2(void *t, bus_space_handle_t handle, bus_size_t offset)
-{
-
-	return (cvmx_read64_uint64(handle + offset));
-}
-
-static uint32_t
-ou_bs_r_4(void *t, bus_space_handle_t handle, bus_size_t offset)
-{
-
-	return (cvmx_read64_uint64(handle + offset));
-}
-
-static uint64_t
-ou_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset)
-{
-
-	return (cvmx_read64_uint64(handle + offset));
-}
-
-static void
-ou_bs_w_1(void *t, bus_space_handle_t bsh, bus_size_t offset, uint8_t value)
-{
-
-	cvmx_write64_uint64(bsh + offset, value);
-}
-
-static void
-ou_bs_w_2(void *t, bus_space_handle_t bsh, bus_size_t offset, uint16_t value)
-{
-
-	cvmx_write64_uint64(bsh + offset, value);
-}
-
-static void
-ou_bs_w_4(void *t, bus_space_handle_t bsh, bus_size_t offset, uint32_t value)
-{
-
-	cvmx_write64_uint64(bsh + offset, value);
-}
-
-static void
-ou_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, uint64_t value)
-{
-
-	cvmx_write64_uint64(bsh + offset, value);
-}
-
-struct bus_space octeon_uart_tag = {
-	.bs_map = generic_bs_map,
-	.bs_unmap = generic_bs_unmap,
-	.bs_subregion = generic_bs_subregion,
-	.bs_barrier = generic_bs_barrier,
-	.bs_r_1 = ou_bs_r_1,
-	.bs_r_2 = ou_bs_r_2,
-	.bs_r_4 = ou_bs_r_4,
-	.bs_r_8 = ou_bs_r_8,
-	.bs_w_1 = ou_bs_w_1,
-	.bs_w_2 = ou_bs_w_2,
-	.bs_w_4 = ou_bs_w_4,
-	.bs_w_8 = ou_bs_w_8,
-};
-
-extern struct uart_class uart_oct16550_class;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	struct uart_class *class = &uart_oct16550_class;
-
-	/*
-	 * These fields need to be setup corretly for uart_getenv to
-	 * work in all cases.
-	 */
-	uart_bus_space_io = NULL;		/* No io map for this device */
-	uart_bus_space_mem = &octeon_uart_tag;
-	di->bas.bst = uart_bus_space_mem;
-
-	/*
-	 * If env specification for UART exists it takes precedence:
-	 * hw.uart.console="mm:0xf1012000" or similar
-	 */
-	if (uart_getenv(devtype, di, class) == 0)
-		return (0);
-
-	/*
-	 * Fallback to UART0 for console.
-	 */
-	di->ops = uart_getops(class);
-	di->bas.chan = 0;
-	/* XXX */
-	if (bus_space_map(di->bas.bst, CVMX_MIO_UARTX_RBR(0),
-	    uart_getrange(class), 0, &di->bas.bsh) != 0)
-		return (ENXIO);
-	di->bas.regshft = 3;
-	di->bas.rclk = 0;
-	di->baudrate = 115200;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	return (0);
-}
diff --git a/sys/mips/cavium/uart_dev_oct16550.c b/sys/mips/cavium/uart_dev_oct16550.c
deleted file mode 100644
index c95706a907fc..000000000000
--- a/sys/mips/cavium/uart_dev_oct16550.c
+++ /dev/null
@@ -1,846 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause
- *
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * uart_dev_oct16550.c
- *
- * Derived from uart_dev_ns8250.c
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <machine/bus.h>
-#include <machine/pcpu.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-
-#include <dev/ic/ns16550.h>
-
-#include <mips/cavium/octeon_pcmap_regs.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-
-#include "uart_if.h"
-
-/*
- * Clear pending interrupts. THRE is cleared by reading IIR. Data
- * that may have been received gets lost here.
- */
-static void
-oct16550_clrint (struct uart_bas *bas)
-{
-	uint8_t iir;
-
-	iir = uart_getreg(bas, REG_IIR);
-	while ((iir & IIR_NOPEND) == 0) {
-		iir &= IIR_IMASK;
-		if (iir == IIR_RLS)
-			(void)uart_getreg(bas, REG_LSR);
-		else if (iir == IIR_RXRDY || iir == IIR_RXTOUT)
-			(void)uart_getreg(bas, REG_DATA);
-		else if (iir == IIR_MLSC)
-			(void)uart_getreg(bas, REG_MSR);
-                else if (iir == IIR_BUSY)
-                    	(void) uart_getreg(bas, REG_USR);
-		uart_barrier(bas);
-		iir = uart_getreg(bas, REG_IIR);
-	}
-}
-
-static int delay_changed = 1;
-
-static int
-oct16550_delay (struct uart_bas *bas)
-{
-	int divisor;
-	u_char lcr;
-        static int delay = 0;
-
-        if (!delay_changed) return delay;
-        delay_changed = 0;
-	lcr = uart_getreg(bas, REG_LCR);
-	uart_setreg(bas, REG_LCR, lcr | LCR_DLAB);
-	uart_barrier(bas);
-	divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8);
-	uart_barrier(bas);
-	uart_setreg(bas, REG_LCR, lcr);
-	uart_barrier(bas);
-
-	if(!bas->rclk)
-		return 10; /* return an approx delay value */
-
-	/* 1/10th the time to transmit 1 character (estimate). */
-	if (divisor <= 134)
-		return (16000000 * divisor / bas->rclk);
-	return (16000 * divisor / (bas->rclk / 1000));
-
-}
-
-static int
-oct16550_divisor (int rclk, int baudrate)
-{
-	int actual_baud, divisor;
-	int error;
-
-	if (baudrate == 0)
-		return (0);
-
-	divisor = (rclk / (baudrate << 3) + 1) >> 1;
-	if (divisor == 0 || divisor >= 65536)
-		return (0);
-	actual_baud = rclk / (divisor << 4);
-
-	/* 10 times error in percent: */
-	error = ((actual_baud - baudrate) * 2000 / baudrate + 1) >> 1;
-
-	/* 3.0% maximum error tolerance: */
-	if (error < -30 || error > 30)
-		return (0);
-
-	return (divisor);
-}
-
-static int
-oct16550_drain (struct uart_bas *bas, int what)
-{
-	int delay, limit;
-
-	delay = oct16550_delay(bas);
-
-	if (what & UART_DRAIN_TRANSMITTER) {
-		/*
-		 * Pick an arbitrary high limit to avoid getting stuck in
-		 * an infinite loop when the hardware is broken. Make the
-		 * limit high enough to handle large FIFOs.
-		 */
-		limit = 10*10*10*1024;
-		while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit)
-			DELAY(delay);
-		if (limit == 0) {
-			/* printf("oct16550: transmitter appears stuck... "); */
-			return (0);
-		}
-	}
-
-	if (what & UART_DRAIN_RECEIVER) {
-		/*
-		 * Pick an arbitrary high limit to avoid getting stuck in
-		 * an infinite loop when the hardware is broken. Make the
-		 * limit high enough to handle large FIFOs and integrated
-		 * UARTs. The HP rx2600 for example has 3 UARTs on the
-		 * management board that tend to get a lot of data send
-		 * to it when the UART is first activated.
-		 */
-		limit=10*4096;
-		while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) {
-			(void)uart_getreg(bas, REG_DATA);
-			uart_barrier(bas);
-			DELAY(delay << 2);
-		}
-		if (limit == 0) {
-			/* printf("oct16550: receiver appears broken... "); */
-			return (EIO);
-		}
-	}
-
-	return (0);
-}
-
-/*
- * We can only flush UARTs with FIFOs. UARTs without FIFOs should be
- * drained. WARNING: this function clobbers the FIFO setting!
- */
-static void
-oct16550_flush (struct uart_bas *bas, int what)
-{
-	uint8_t fcr;
-
-	fcr = FCR_ENABLE;
-	if (what & UART_FLUSH_TRANSMITTER)
-		fcr |= FCR_XMT_RST;
-	if (what & UART_FLUSH_RECEIVER)
-		fcr |= FCR_RCV_RST;
-	uart_setreg(bas, REG_FCR, fcr);
-	uart_barrier(bas);
-}
-
-static int
-oct16550_param (struct uart_bas *bas, int baudrate, int databits, int stopbits,
-    int parity)
-{
-	int divisor;
-	uint8_t lcr;
-
-	lcr = 0;
-	if (databits >= 8)
-		lcr |= LCR_8BITS;
-	else if (databits == 7)
-		lcr |= LCR_7BITS;
-	else if (databits == 6)
-		lcr |= LCR_6BITS;
-	else
-		lcr |= LCR_5BITS;
-	if (stopbits > 1)
-		lcr |= LCR_STOPB;
-	lcr |= parity << 3;
-
-	/* Set baudrate. */
-	if (baudrate > 0) {
-		divisor = oct16550_divisor(bas->rclk, baudrate);
-		if (divisor == 0)
-			return (EINVAL);
-		uart_setreg(bas, REG_LCR, lcr | LCR_DLAB);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_DLL, divisor & 0xff);
-		uart_setreg(bas, REG_DLH, (divisor >> 8) & 0xff);
-		uart_barrier(bas);
-                delay_changed = 1;
-	}
-
-	/* Set LCR and clear DLAB. */
-	uart_setreg(bas, REG_LCR, lcr);
-	uart_barrier(bas);
-	return (0);
-}
-
-/*
- * Low-level UART interface.
- */
-static int oct16550_probe(struct uart_bas *bas);
-static void oct16550_init(struct uart_bas *bas, int, int, int, int);
-static void oct16550_term(struct uart_bas *bas);
-static void oct16550_putc(struct uart_bas *bas, int);
-static int oct16550_rxready(struct uart_bas *bas);
-static int oct16550_getc(struct uart_bas *bas, struct mtx *);
-
-struct uart_ops uart_oct16550_ops = {
-	.probe = oct16550_probe,
-	.init = oct16550_init,
-	.term = oct16550_term,
-	.putc = oct16550_putc,
-	.rxready = oct16550_rxready,
-	.getc = oct16550_getc,
-};
-
-static int
-oct16550_probe (struct uart_bas *bas)
-{
-	u_char val;
-
-	/* Check known 0 bits that don't depend on DLAB. */
-	val = uart_getreg(bas, REG_IIR);
-	if (val & 0x30)
-		return (ENXIO);
-	val = uart_getreg(bas, REG_MCR);
-	if (val & 0xc0)
-		return (ENXIO);
-	val = uart_getreg(bas, REG_USR);
-        if (val & 0xe0)
-            	return (ENXIO);
-	return (0);
-}
-
-static void
-oct16550_init (struct uart_bas *bas, int baudrate, int databits, int stopbits,
-    int parity)
-{
-	u_char	ier;
-
-	oct16550_param(bas, baudrate, databits, stopbits, parity);
-
-	/* Disable all interrupt sources. */
-	ier = uart_getreg(bas, REG_IER) & 0x0;
-	uart_setreg(bas, REG_IER, ier);
-	uart_barrier(bas);
-
-	/* Disable the FIFO (if present). */
-//	uart_setreg(bas, REG_FCR, 0);
-	uart_barrier(bas);
-
-	/* Set RTS & DTR. */
-	uart_setreg(bas, REG_MCR, MCR_RTS | MCR_DTR);
-	uart_barrier(bas);
-
-	oct16550_clrint(bas);
-}
-
-static void
-oct16550_term (struct uart_bas *bas)
-{
-
-	/* Clear RTS & DTR. */
-	uart_setreg(bas, REG_MCR, 0);
-	uart_barrier(bas);
-}
-
-static inline void oct16550_wait_txhr_empty (struct uart_bas *bas, int limit, int delay)
-{
-    while (((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) &&
-           ((uart_getreg(bas, REG_USR) & USR_TXFIFO_NOTFULL) == 0))
-        DELAY(delay);
-}
-
-static void
-oct16550_putc (struct uart_bas *bas, int c)
-{
-	int delay;
-
-	/* 1/10th the time to transmit 1 character (estimate). */
-	delay = oct16550_delay(bas);
-        oct16550_wait_txhr_empty(bas, 100, delay);
-	uart_setreg(bas, REG_DATA, c);
-	uart_barrier(bas);
-        oct16550_wait_txhr_empty(bas, 100, delay);
-}
-
-static int
-oct16550_rxready (struct uart_bas *bas)
-{
-
-	return ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) != 0 ? 1 : 0);
-}
-
-static int
-oct16550_getc (struct uart_bas *bas, struct mtx *hwmtx)
-{
-	int c, delay;
-
-	uart_lock(hwmtx);
-
-	/* 1/10th the time to transmit 1 character (estimate). */
-	delay = oct16550_delay(bas);
-
-	while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) == 0) {
-		uart_unlock(hwmtx);
-		DELAY(delay);
-		uart_lock(hwmtx);
-	}
-
-	c = uart_getreg(bas, REG_DATA);
-
-	uart_unlock(hwmtx);
-
-	return (c);
-}
-
-/*
- * High-level UART interface.
- */
-struct oct16550_softc {
-	struct uart_softc base;
-	uint8_t		fcr;
-	uint8_t		ier;
-	uint8_t		mcr;
-};
-
-static int oct16550_bus_attach(struct uart_softc *);
-static int oct16550_bus_detach(struct uart_softc *);
-static int oct16550_bus_flush(struct uart_softc *, int);
-static int oct16550_bus_getsig(struct uart_softc *);
-static int oct16550_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int oct16550_bus_ipend(struct uart_softc *);
-static int oct16550_bus_param(struct uart_softc *, int, int, int, int);
-static int oct16550_bus_probe(struct uart_softc *);
-static int oct16550_bus_receive(struct uart_softc *);
-static int oct16550_bus_setsig(struct uart_softc *, int);
-static int oct16550_bus_transmit(struct uart_softc *);
-static void oct16550_bus_grab(struct uart_softc *);
-static void oct16550_bus_ungrab(struct uart_softc *);
-
-static kobj_method_t oct16550_methods[] = {
-	KOBJMETHOD(uart_attach,		oct16550_bus_attach),
-	KOBJMETHOD(uart_detach,		oct16550_bus_detach),
-	KOBJMETHOD(uart_flush,		oct16550_bus_flush),
-	KOBJMETHOD(uart_getsig,		oct16550_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		oct16550_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		oct16550_bus_ipend),
-	KOBJMETHOD(uart_param,		oct16550_bus_param),
-	KOBJMETHOD(uart_probe,		oct16550_bus_probe),
-	KOBJMETHOD(uart_receive,	oct16550_bus_receive),
-	KOBJMETHOD(uart_setsig,		oct16550_bus_setsig),
-	KOBJMETHOD(uart_transmit,	oct16550_bus_transmit),
-	KOBJMETHOD(uart_grab,		oct16550_bus_grab),
-	KOBJMETHOD(uart_ungrab,		oct16550_bus_ungrab),
-	{ 0, 0 }
-};
-
-struct uart_class uart_oct16550_class = {
-	"oct16550 class",
-	oct16550_methods,
-	sizeof(struct oct16550_softc),
-	.uc_ops = &uart_oct16550_ops,
-	.uc_range = 8 << 3,
-	.uc_rclk = 0,
-	.uc_rshift = 0
-};
-
-#define	SIGCHG(c, i, s, d)				\
-	if (c) {					\
-		i |= (i & s) ? s : s | d;		\
-	} else {					\
-		i = (i & s) ? (i & ~s) | d : i;		\
-	}
-
-static int
-oct16550_bus_attach (struct uart_softc *sc)
-{
-	struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc;
-	struct uart_bas *bas;
-        int unit;
-
-        unit = device_get_unit(sc->sc_dev);
-	bas = &sc->sc_bas;
-
-        oct16550_drain(bas, UART_DRAIN_TRANSMITTER);
-	oct16550->mcr = uart_getreg(bas, REG_MCR);
-	oct16550->fcr = FCR_ENABLE | FCR_RX_HIGH;
-	uart_setreg(bas, REG_FCR, oct16550->fcr);
-	uart_barrier(bas);
-	oct16550_bus_flush(sc, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER);
-
-	if (oct16550->mcr & MCR_DTR)
-		sc->sc_hwsig |= SER_DTR;
-	if (oct16550->mcr & MCR_RTS)
-		sc->sc_hwsig |= SER_RTS;
-	oct16550_bus_getsig(sc);
-
-	oct16550_clrint(bas);
-	oct16550->ier = uart_getreg(bas, REG_IER) & 0xf0;
-	oct16550->ier |= IER_EMSC | IER_ERLS | IER_ERXRDY;
-	uart_setreg(bas, REG_IER, oct16550->ier);
-	uart_barrier(bas);
-
-	return (0);
-}
-
-static int
-oct16550_bus_detach (struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	u_char ier;
-
-	bas = &sc->sc_bas;
-	ier = uart_getreg(bas, REG_IER) & 0xf0;
-	uart_setreg(bas, REG_IER, ier);
-	uart_barrier(bas);
-	oct16550_clrint(bas);
-	return (0);
-}
-
-static int
-oct16550_bus_flush (struct uart_softc *sc, int what)
-{
-	struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc;
-	struct uart_bas *bas;
-	int error;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	if (sc->sc_rxfifosz > 1) {
-		oct16550_flush(bas, what);
-		uart_setreg(bas, REG_FCR, oct16550->fcr);
-		uart_barrier(bas);
-		error = 0;
-	} else
-		error = oct16550_drain(bas, what);
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-oct16550_bus_getsig (struct uart_softc *sc)
-{
-	uint32_t new, old, sig;
-	uint8_t msr;
-
-	do {
-		old = sc->sc_hwsig;
-		sig = old;
-		uart_lock(sc->sc_hwmtx);
-		msr = uart_getreg(&sc->sc_bas, REG_MSR);
-		uart_unlock(sc->sc_hwmtx);
-		SIGCHG(msr & MSR_DSR, sig, SER_DSR, SER_DDSR);
-		SIGCHG(msr & MSR_CTS, sig, SER_CTS, SER_DCTS);
-		SIGCHG(msr & MSR_DCD, sig, SER_DCD, SER_DDCD);
-		SIGCHG(msr & MSR_RI,  sig, SER_RI,  SER_DRI);
-		new = sig & ~SER_MASK_DELTA;
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-	return (sig);
-}
-
-static int
-oct16550_bus_ioctl (struct uart_softc *sc, int request, intptr_t data)
-{
-	struct uart_bas *bas;
-	int baudrate, divisor, error;
-	uint8_t efr, lcr;
-
-	bas = &sc->sc_bas;
-	error = 0;
-	uart_lock(sc->sc_hwmtx);
-	switch (request) {
-	case UART_IOCTL_BREAK:
-		lcr = uart_getreg(bas, REG_LCR);
-		if (data)
-			lcr |= LCR_SBREAK;
-		else
-			lcr &= ~LCR_SBREAK;
-		uart_setreg(bas, REG_LCR, lcr);
-		uart_barrier(bas);
-		break;
-	case UART_IOCTL_IFLOW:
-		lcr = uart_getreg(bas, REG_LCR);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_LCR, 0xbf);
-		uart_barrier(bas);
-		efr = uart_getreg(bas, REG_EFR);
-		if (data)
-			efr |= EFR_RTS;
-		else
-			efr &= ~EFR_RTS;
-		uart_setreg(bas, REG_EFR, efr);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_LCR, lcr);
-		uart_barrier(bas);
-		break;
-	case UART_IOCTL_OFLOW:
-		lcr = uart_getreg(bas, REG_LCR);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_LCR, 0xbf);
-		uart_barrier(bas);
-		efr = uart_getreg(bas, REG_EFR);
-		if (data)
-			efr |= EFR_CTS;
-		else
-			efr &= ~EFR_CTS;
-		uart_setreg(bas, REG_EFR, efr);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_LCR, lcr);
-		uart_barrier(bas);
-		break;
-	case UART_IOCTL_BAUD:
-		lcr = uart_getreg(bas, REG_LCR);
-		uart_setreg(bas, REG_LCR, lcr | LCR_DLAB);
-		uart_barrier(bas);
-		divisor = uart_getreg(bas, REG_DLL) |
-		    (uart_getreg(bas, REG_DLH) << 8);
-		uart_barrier(bas);
-		uart_setreg(bas, REG_LCR, lcr);
-		uart_barrier(bas);
-		baudrate = (divisor > 0) ? bas->rclk / divisor / 16 : 0;
-                delay_changed = 1;
-		if (baudrate > 0)
-			*(int*)data = baudrate;
-		else
-			error = ENXIO;
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-oct16550_bus_ipend(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int ipend = 0;
-	uint8_t iir, lsr;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-
-	iir = uart_getreg(bas, REG_IIR) & IIR_IMASK;
-	if (iir != IIR_NOPEND) {
-            	if (iir == IIR_RLS) {
-                    	lsr = uart_getreg(bas, REG_LSR);
-                        if (lsr & LSR_OE)
-                            	ipend |= SER_INT_OVERRUN;
-                        if (lsr & LSR_BI)
-                            	ipend |= SER_INT_BREAK;
-                        if (lsr & LSR_RXRDY)
-                    		ipend |= SER_INT_RXREADY;
-
-                } else if (iir == IIR_RXRDY) {
-                    	ipend |= SER_INT_RXREADY;
-
-                } else if (iir == IIR_RXTOUT) {
-                    	ipend |= SER_INT_RXREADY;
-
-                } else if (iir == IIR_TXRDY) {
-                    	ipend |= SER_INT_TXIDLE;
-
-                } else if (iir == IIR_MLSC) {
-                    	ipend |= SER_INT_SIGCHG;
-
-                } else if (iir == IIR_BUSY) {
-                    	(void) uart_getreg(bas, REG_USR);
-                }
-	}
-	uart_unlock(sc->sc_hwmtx);
-
-	return (ipend);
-}
-
-static int
-oct16550_bus_param (struct uart_softc *sc, int baudrate, int databits,
-    int stopbits, int parity)
-{
-	struct uart_bas *bas;
-	int error;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	error = oct16550_param(bas, baudrate, databits, stopbits, parity);
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-oct16550_bus_probe (struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int error;
-
-	bas = &sc->sc_bas;
-	bas->rclk = uart_oct16550_class.uc_rclk = cvmx_clock_get_rate(CVMX_CLOCK_SCLK);
-
-	error = oct16550_probe(bas);
-	if (error) {
-		return (error);
-        }
-
-	uart_setreg(bas, REG_MCR, (MCR_DTR | MCR_RTS));
-
-	/*
-	 * Enable FIFOs. And check that the UART has them. If not, we're
-	 * done. Since this is the first time we enable the FIFOs, we reset
-	 * them.
-	 */
-        oct16550_drain(bas, UART_DRAIN_TRANSMITTER);
-#define ENABLE_OCTEON_FIFO 1
-#ifdef ENABLE_OCTEON_FIFO
-	uart_setreg(bas, REG_FCR, FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST);
-#endif
-	uart_barrier(bas);
-
-	oct16550_flush(bas, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER);
-
-        if (device_get_unit(sc->sc_dev)) {
-            	device_set_desc(sc->sc_dev, "Octeon-16550 channel 1");
-        } else {
-            	device_set_desc(sc->sc_dev, "Octeon-16550 channel 0");
-        }
-#ifdef ENABLE_OCTEON_FIFO
-	sc->sc_rxfifosz = 64;
-	sc->sc_txfifosz = 64;
-#else
-	sc->sc_rxfifosz = 1;
-	sc->sc_txfifosz = 1;
-#endif
-
-#if 0
-	/*
-	 * XXX there are some issues related to hardware flow control and
-	 * it's likely that uart(4) is the cause. This basicly needs more
-	 * investigation, but we avoid using for hardware flow control
-	 * until then.
-	 */
-	/* 16650s or higher have automatic flow control. */
-	if (sc->sc_rxfifosz > 16) {
-		sc->sc_hwiflow = 1;
-		sc->sc_hwoflow = 1;
-	}
-#endif
-
-	return (0);
-}
-
-static int
-oct16550_bus_receive (struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int xc;
-	uint8_t lsr;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	lsr = uart_getreg(bas, REG_LSR);
-
-	while (lsr & LSR_RXRDY) {
-		if (uart_rx_full(sc)) {
-			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
-			break;
-		}
-		xc = uart_getreg(bas, REG_DATA);
-		if (lsr & LSR_FE)
-			xc |= UART_STAT_FRAMERR;
-		if (lsr & LSR_PE)
-			xc |= UART_STAT_PARERR;
-		uart_rx_put(sc, xc);
-		lsr = uart_getreg(bas, REG_LSR);
-	}
-	/* Discard everything left in the Rx FIFO. */
-        /*
-         * First do a dummy read/discard anyway, in case the UART was lying to us.
-         * This problem was seen on board, when IIR said RBR, but LSR said no RXRDY
-         * Results in a stuck ipend loop.
-         */
-        (void)uart_getreg(bas, REG_DATA);
-	while (lsr & LSR_RXRDY) {
-		(void)uart_getreg(bas, REG_DATA);
-		uart_barrier(bas);
-		lsr = uart_getreg(bas, REG_LSR);
-	}
-	uart_unlock(sc->sc_hwmtx);
- 	return (0);
-}
-
-static int
-oct16550_bus_setsig (struct uart_softc *sc, int sig)
-{
-	struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc;
-	struct uart_bas *bas;
-	uint32_t new, old;
-
-	bas = &sc->sc_bas;
-	do {
-		old = sc->sc_hwsig;
-		new = old;
-		if (sig & SER_DDTR) {
-			SIGCHG(sig & SER_DTR, new, SER_DTR,
-			    SER_DDTR);
-		}
-		if (sig & SER_DRTS) {
-			SIGCHG(sig & SER_RTS, new, SER_RTS,
-			    SER_DRTS);
-		}
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-	uart_lock(sc->sc_hwmtx);
-	oct16550->mcr &= ~(MCR_DTR|MCR_RTS);
-	if (new & SER_DTR)
-		oct16550->mcr |= MCR_DTR;
-	if (new & SER_RTS)
-		oct16550->mcr |= MCR_RTS;
-	uart_setreg(bas, REG_MCR, oct16550->mcr);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-oct16550_bus_transmit (struct uart_softc *sc)
-{
-	struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc;
-	struct uart_bas *bas;
-	int i;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-#ifdef NO_UART_INTERRUPTS
-        for (i = 0; i < sc->sc_txdatasz; i++) {
-            oct16550_putc(bas, sc->sc_txbuf[i]);
-        }
-#else
-
-        oct16550_wait_txhr_empty(bas, 100, oct16550_delay(bas));
-	uart_setreg(bas, REG_IER, oct16550->ier | IER_ETXRDY);
-	uart_barrier(bas);
-
-	for (i = 0; i < sc->sc_txdatasz; i++) {
-		uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
-		uart_barrier(bas);
-	}
-	sc->sc_txbusy = 1;
-#endif
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static void
-oct16550_bus_grab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-
-	/*
-	 * turn off all interrupts to enter polling mode. Leave the
-	 * saved mask alone. We'll restore whatever it was in ungrab.
-	 * All pending interupt signals are reset when IER is set to 0.
-	 */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(bas, REG_IER, 0);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
-
-static void
-oct16550_bus_ungrab(struct uart_softc *sc)
-{
-	struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc;
-	struct uart_bas *bas = &sc->sc_bas;
-
-	/*
-	 * Restore previous interrupt mask
-	 */
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(bas, REG_IER, oct16550->ier);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
diff --git a/sys/mips/cavium/usb/octusb.c b/sys/mips/cavium/usb/octusb.c
deleted file mode 100644
index 5c9d123facc5..000000000000
--- a/sys/mips/cavium/usb/octusb.c
+++ /dev/null
@@ -1,1935 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * This file contains the driver for Octeon Executive Library USB
- * Controller driver API.
- */
-
-/* TODO: The root HUB port callback is not yet implemented. */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#define	USB_DEBUG_VAR octusbdebug
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_debug.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_transfer.h>
-#include <dev/usb/usb_device.h>
-#include <dev/usb/usb_hub.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-usb.h>
-
-#include <mips/cavium/usb/octusb.h>
-
-#define	OCTUSB_BUS2SC(bus) \
-   ((struct octusb_softc *)(((uint8_t *)(bus)) - \
-    ((uint8_t *)&(((struct octusb_softc *)0)->sc_bus))))
-
-#ifdef USB_DEBUG
-static int octusbdebug = 0;
-
-static SYSCTL_NODE(_hw_usb, OID_AUTO, octusb, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
-    "OCTUSB");
-SYSCTL_INT(_hw_usb_octusb, OID_AUTO, debug, CTLFLAG_RWTUN,
-    &octusbdebug, 0, "OCTUSB debug level");
-#endif
-
-struct octusb_std_temp {
-	octusb_cmd_t *func;
-	struct octusb_td *td;
-	struct octusb_td *td_next;
-	struct usb_page_cache *pc;
-	uint32_t offset;
-	uint32_t len;
-	uint8_t	short_pkt;
-	uint8_t	setup_alt_next;
-};
-
-extern struct usb_bus_methods octusb_bus_methods;
-extern struct usb_pipe_methods octusb_device_bulk_methods;
-extern struct usb_pipe_methods octusb_device_ctrl_methods;
-extern struct usb_pipe_methods octusb_device_intr_methods;
-extern struct usb_pipe_methods octusb_device_isoc_methods;
-
-static void octusb_standard_done(struct usb_xfer *);
-static void octusb_device_done(struct usb_xfer *, usb_error_t);
-static void octusb_timeout(void *);
-static void octusb_do_poll(struct usb_bus *);
-
-static cvmx_usb_speed_t
-octusb_convert_speed(enum usb_dev_speed speed)
-{
-	;				/* indent fix */
-	switch (speed) {
-	case USB_SPEED_HIGH:
-		return (CVMX_USB_SPEED_HIGH);
-	case USB_SPEED_FULL:
-		return (CVMX_USB_SPEED_FULL);
-	default:
-		return (CVMX_USB_SPEED_LOW);
-	}
-}
-
-static cvmx_usb_transfer_t
-octusb_convert_ep_type(uint8_t ep_type)
-{
-	;				/* indent fix */
-	switch (ep_type & UE_XFERTYPE) {
-	case UE_CONTROL:
-		return (CVMX_USB_TRANSFER_CONTROL);
-	case UE_INTERRUPT:
-		return (CVMX_USB_TRANSFER_INTERRUPT);
-	case UE_ISOCHRONOUS:
-		return (CVMX_USB_TRANSFER_ISOCHRONOUS);
-	case UE_BULK:
-		return (CVMX_USB_TRANSFER_BULK);
-	default:
-		return (0);		/* should not happen */
-	}
-}
-
-static uint8_t
-octusb_host_alloc_endpoint(struct octusb_td *td)
-{
-	struct octusb_softc *sc;
-	int ep_handle;
-
-	if (td->qh->fixup_pending)
-		return (1);		/* busy */
-
-	if (td->qh->ep_allocated)
-		return (0);		/* success */
-
-	/* get softc */
-	sc = td->qh->sc;
-
-	ep_handle = cvmx_usb_open_pipe(
-	    &sc->sc_port[td->qh->root_port_index].state,
-	    0,
-	    td->qh->dev_addr,
-	    td->qh->ep_num & UE_ADDR,
-	    octusb_convert_speed(td->qh->dev_speed),
-	    td->qh->max_packet_size,
-	    octusb_convert_ep_type(td->qh->ep_type),
-	    (td->qh->ep_num & UE_DIR_IN) ? CVMX_USB_DIRECTION_IN :
-	    CVMX_USB_DIRECTION_OUT,
-	    td->qh->ep_interval,
-	    (td->qh->dev_speed == USB_SPEED_HIGH) ? td->qh->ep_mult : 0,
-	    td->qh->hs_hub_addr,
-	    td->qh->hs_hub_port);
-
-	if (ep_handle < 0) {
-		DPRINTFN(1, "cvmx_usb_open_pipe failed: %d\n", ep_handle);
-		return (1);		/* busy */
-	}
-
-	cvmx_usb_set_toggle(
-	    &sc->sc_port[td->qh->root_port_index].state,
-	    ep_handle, td->qh->ep_toggle_next);
-
-	td->qh->fixup_handle = -1;
-	td->qh->fixup_complete = 0;
-	td->qh->fixup_len = 0;
-	td->qh->fixup_off = 0;
-	td->qh->fixup_pending = 0;
-	td->qh->fixup_actlen = 0;
-
-	td->qh->ep_handle = ep_handle;
-	td->qh->ep_allocated = 1;
-
-	return (0);			/* success */
-}
-
-static void
-octusb_host_free_endpoint(struct octusb_td *td)
-{
-	struct octusb_softc *sc;
-
-	if (td->qh->ep_allocated == 0)
-		return;
-
-	/* get softc */
-	sc = td->qh->sc;
-
-	if (td->qh->fixup_handle >= 0) {
-		/* cancel, if any */
-		cvmx_usb_cancel(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_handle);
-	}
-	cvmx_usb_close_pipe(&sc->sc_port[td->qh->root_port_index].state, td->qh->ep_handle);
-
-	td->qh->ep_allocated = 0;
-}
-
-static void
-octusb_complete_cb(cvmx_usb_state_t *state,
-    cvmx_usb_callback_t reason,
-    cvmx_usb_complete_t status,
-    int pipe_handle, int submit_handle,
-    int bytes_transferred, void *user_data)
-{
-	struct octusb_td *td;
-
-	if (reason != CVMX_USB_CALLBACK_TRANSFER_COMPLETE)
-		return;
-
-	td = user_data;
-
-	td->qh->fixup_complete = 1;
-	td->qh->fixup_pending = 0;
-	td->qh->fixup_actlen = bytes_transferred;
-	td->qh->fixup_handle = -1;
-
-	switch (status) {
-	case CVMX_USB_COMPLETE_SUCCESS:
-	case CVMX_USB_COMPLETE_SHORT:
-		td->error_any = 0;
-		td->error_stall = 0;
-		break;
-	case CVMX_USB_COMPLETE_STALL:
-		td->error_stall = 1;
-		td->error_any = 1;
-		break;
-	default:
-		td->error_any = 1;
-		break;
-	}
-}
-
-static uint8_t
-octusb_host_control_header_tx(struct octusb_td *td)
-{
-	int status;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	if (td->qh->fixup_complete != 0) {
-		/* clear complete flag */
-		td->qh->fixup_complete = 0;
-
-		/* flush data */
-		usb_pc_cpu_invalidate(td->qh->fixup_pc);
-		return (0);		/* done */
-	}
-	/* verify length */
-	if (td->remainder != 8) {
-		td->error_any = 1;
-		return (0);		/* done */
-	}
-	usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf, 8);
-
-	/* update offset and remainder */
-	td->offset += 8;
-	td->remainder -= 8;
-
-	/* setup data length and offset */
-	td->qh->fixup_len = UGETW(td->qh->fixup_buf + 6);
-	td->qh->fixup_off = 0;
-
-	if (td->qh->fixup_len > (OCTUSB_MAX_FIXUP - 8)) {
-		td->error_any = 1;
-		return (0);		/* done */
-	}
-	/* do control IN request */
-	if (td->qh->fixup_buf[0] & UE_DIR_IN) {
-		struct octusb_softc *sc;
-
-		/* get softc */
-		sc = td->qh->sc;
-
-		/* flush data */
-		usb_pc_cpu_flush(td->qh->fixup_pc);
-
-		status = cvmx_usb_submit_control(
-		    &sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys,
-		    td->qh->fixup_phys + 8, td->qh->fixup_len,
-		    &octusb_complete_cb, td);
-		/* check status */
-		if (status < 0) {
-			td->error_any = 1;
-			return (0);	/* done */
-		}
-		td->qh->fixup_handle = status;
-		td->qh->fixup_pending = 1;
-		td->qh->fixup_complete = 0;
-
-		return (1);		/* busy */
-	}
-	return (0);			/* done */
-}
-
-static uint8_t
-octusb_host_control_data_tx(struct octusb_td *td)
-{
-	uint32_t rem;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	rem = td->qh->fixup_len - td->qh->fixup_off;
-
-	if (td->remainder > rem) {
-		td->error_any = 1;
-		DPRINTFN(1, "Excess setup transmit data\n");
-		return (0);		/* done */
-	}
-	usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf +
-	    td->qh->fixup_off + 8, td->remainder);
-
-	td->offset += td->remainder;
-	td->qh->fixup_off += td->remainder;
-	td->remainder = 0;
-
-	return (0);			/* done */
-}
-
-static uint8_t
-octusb_host_control_data_rx(struct octusb_td *td)
-{
-	uint32_t rem;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	/* copy data from buffer */
-	rem = td->qh->fixup_actlen - td->qh->fixup_off;
-
-	if (rem > td->remainder)
-		rem = td->remainder;
-
-	usbd_copy_in(td->pc, td->offset, td->qh->fixup_buf +
-	    td->qh->fixup_off + 8, rem);
-
-	td->offset += rem;
-	td->remainder -= rem;
-	td->qh->fixup_off += rem;
-
-	return (0);			/* done */
-}
-
-static uint8_t
-octusb_host_control_status_tx(struct octusb_td *td)
-{
-	int status;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	if (td->qh->fixup_complete != 0) {
-		/* clear complete flag */
-		td->qh->fixup_complete = 0;
-		/* done */
-		return (0);
-	}
-	/* do control IN request */
-	if (!(td->qh->fixup_buf[0] & UE_DIR_IN)) {
-		struct octusb_softc *sc;
-
-		/* get softc */
-		sc = td->qh->sc;
-
-		/* flush data */
-		usb_pc_cpu_flush(td->qh->fixup_pc);
-
-		/* start USB transfer */
-		status = cvmx_usb_submit_control(
-		    &sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys,
-		    td->qh->fixup_phys + 8, td->qh->fixup_len,
-		    &octusb_complete_cb, td);
-
-		/* check status */
-		if (status < 0) {
-			td->error_any = 1;
-			return (0);	/* done */
-		}
-		td->qh->fixup_handle = status;
-		td->qh->fixup_pending = 1;
-		td->qh->fixup_complete = 0;
-
-		return (1);		/* busy */
-	}
-	return (0);			/* done */
-}
-
-static uint8_t
-octusb_non_control_data_tx(struct octusb_td *td)
-{
-	struct octusb_softc *sc;
-	uint32_t rem;
-	int status;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	if ((td->qh->fixup_complete != 0) &&
-	    ((td->qh->ep_type & UE_XFERTYPE) == UE_ISOCHRONOUS)) {
-		td->qh->fixup_complete = 0;
-		return (0);		/* done */
-	}
-	/* check complete */
-	if (td->remainder == 0) {
-		if (td->short_pkt)
-			return (0);	/* complete */
-		/* else need to send a zero length packet */
-		rem = 0;
-		td->short_pkt = 1;
-	} else {
-		/* get maximum length */
-		rem = OCTUSB_MAX_FIXUP % td->qh->max_frame_size;
-		rem = OCTUSB_MAX_FIXUP - rem;
-
-		if (rem == 0) {
-			/* should not happen */
-			DPRINTFN(1, "Fixup buffer is too small\n");
-			td->error_any = 1;
-			return (0);	/* done */
-		}
-		/* get minimum length */
-		if (rem > td->remainder) {
-			rem = td->remainder;
-			if ((rem == 0) || (rem % td->qh->max_frame_size))
-				td->short_pkt = 1;
-		}
-		/* copy data into fixup buffer */
-		usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf, rem);
-
-		/* flush data */
-		usb_pc_cpu_flush(td->qh->fixup_pc);
-
-		/* pre-increment TX buffer offset */
-		td->offset += rem;
-		td->remainder -= rem;
-	}
-
-	/* get softc */
-	sc = td->qh->sc;
-
-	switch (td->qh->ep_type & UE_XFERTYPE) {
-	case UE_ISOCHRONOUS:
-		td->qh->iso_pkt.offset = 0;
-		td->qh->iso_pkt.length = rem;
-		td->qh->iso_pkt.status = 0;
-		/* start USB transfer */
-		status = cvmx_usb_submit_isochronous(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, 1, CVMX_USB_ISOCHRONOUS_FLAGS_ALLOW_SHORT |
-		    CVMX_USB_ISOCHRONOUS_FLAGS_ASAP, 1, &td->qh->iso_pkt,
-		    td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	case UE_BULK:
-		/* start USB transfer */
-		status = cvmx_usb_submit_bulk(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	case UE_INTERRUPT:
-		/* start USB transfer (interrupt or interrupt) */
-		status = cvmx_usb_submit_interrupt(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	default:
-		status = -1;
-		break;
-	}
-
-	/* check status */
-	if (status < 0) {
-		td->error_any = 1;
-		return (0);		/* done */
-	}
-	td->qh->fixup_handle = status;
-	td->qh->fixup_len = rem;
-	td->qh->fixup_pending = 1;
-	td->qh->fixup_complete = 0;
-
-	return (1);			/* busy */
-}
-
-static uint8_t
-octusb_non_control_data_rx(struct octusb_td *td)
-{
-	struct octusb_softc *sc;
-	uint32_t rem;
-	int status;
-	uint8_t got_short;
-
-	/* allocate endpoint and check pending */
-	if (octusb_host_alloc_endpoint(td))
-		return (1);		/* busy */
-
-	/* check error */
-	if (td->error_any)
-		return (0);		/* done */
-
-	got_short = 0;
-
-	if (td->qh->fixup_complete != 0) {
-		/* invalidate data */
-		usb_pc_cpu_invalidate(td->qh->fixup_pc);
-
-		rem = td->qh->fixup_actlen;
-
-		/* verify transfer length */
-		if (rem != td->qh->fixup_len) {
-			if (rem < td->qh->fixup_len) {
-				/* we have a short packet */
-				td->short_pkt = 1;
-				got_short = 1;
-			} else {
-				/* invalid USB packet */
-				td->error_any = 1;
-				return (0);	/* we are complete */
-			}
-		}
-		/* copy data into fixup buffer */
-		usbd_copy_in(td->pc, td->offset, td->qh->fixup_buf, rem);
-
-		/* post-increment RX buffer offset */
-		td->offset += rem;
-		td->remainder -= rem;
-
-		td->qh->fixup_complete = 0;
-
-		if ((td->qh->ep_type & UE_XFERTYPE) == UE_ISOCHRONOUS)
-			return (0);	/* done */
-	}
-	/* check if we are complete */
-	if ((td->remainder == 0) || got_short) {
-		if (td->short_pkt) {
-			/* we are complete */
-			return (0);
-		}
-		/* else need to receive a zero length packet */
-		rem = 0;
-		td->short_pkt = 1;
-	} else {
-		/* get maximum length */
-		rem = OCTUSB_MAX_FIXUP % td->qh->max_frame_size;
-		rem = OCTUSB_MAX_FIXUP - rem;
-
-		if (rem == 0) {
-			/* should not happen */
-			DPRINTFN(1, "Fixup buffer is too small\n");
-			td->error_any = 1;
-			return (0);	/* done */
-		}
-		/* get minimum length */
-		if (rem > td->remainder)
-			rem = td->remainder;
-	}
-
-	/* invalidate data */
-	usb_pc_cpu_invalidate(td->qh->fixup_pc);
-
-	/* get softc */
-	sc = td->qh->sc;
-
-	switch (td->qh->ep_type & UE_XFERTYPE) {
-	case UE_ISOCHRONOUS:
-		td->qh->iso_pkt.offset = 0;
-		td->qh->iso_pkt.length = rem;
-		td->qh->iso_pkt.status = 0;
-		/* start USB transfer */
-		status = cvmx_usb_submit_isochronous(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, 1, CVMX_USB_ISOCHRONOUS_FLAGS_ALLOW_SHORT |
-		    CVMX_USB_ISOCHRONOUS_FLAGS_ASAP, 1, &td->qh->iso_pkt,
-		    td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	case UE_BULK:
-		/* start USB transfer */
-		status = cvmx_usb_submit_bulk(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	case UE_INTERRUPT:
-		/* start USB transfer */
-		status = cvmx_usb_submit_interrupt(&sc->sc_port[td->qh->root_port_index].state,
-		    td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td);
-		break;
-	default:
-		status = -1;
-		break;
-	}
-
-	/* check status */
-	if (status < 0) {
-		td->error_any = 1;
-		return (0);		/* done */
-	}
-	td->qh->fixup_handle = status;
-	td->qh->fixup_len = rem;
-	td->qh->fixup_pending = 1;
-	td->qh->fixup_complete = 0;
-
-	return (1);			/* busy */
-}
-
-static uint8_t
-octusb_xfer_do_fifo(struct usb_xfer *xfer)
-{
-	struct octusb_td *td;
-
-	DPRINTFN(8, "\n");
-
-	td = xfer->td_transfer_cache;
-
-	while (1) {
-		if ((td->func) (td)) {
-			/* operation in progress */
-			break;
-		}
-		if (((void *)td) == xfer->td_transfer_last) {
-			goto done;
-		}
-		if (td->error_any) {
-			goto done;
-		} else if (td->remainder > 0) {
-			/*
-			 * We had a short transfer. If there is no
-			 * alternate next, stop processing !
-			 */
-			if (td->alt_next == 0)
-				goto done;
-		}
-		/*
-		 * Fetch the next transfer descriptor and transfer
-		 * some flags to the next transfer descriptor
-		 */
-		td = td->obj_next;
-		xfer->td_transfer_cache = td;
-	}
-	return (1);			/* not complete */
-
-done:
-	/* compute all actual lengths */
-
-	octusb_standard_done(xfer);
-
-	return (0);			/* complete */
-}
-
-static usb_error_t
-octusb_standard_done_sub(struct usb_xfer *xfer)
-{
-	struct octusb_td *td;
-	uint32_t len;
-	usb_error_t error;
-
-	DPRINTFN(8, "\n");
-
-	td = xfer->td_transfer_cache;
-
-	do {
-		len = td->remainder;
-
-		if (xfer->aframes != xfer->nframes) {
-			/*
-		         * Verify the length and subtract
-		         * the remainder from "frlengths[]":
-		         */
-			if (len > xfer->frlengths[xfer->aframes]) {
-				td->error_any = 1;
-			} else {
-				xfer->frlengths[xfer->aframes] -= len;
-			}
-		}
-		/* Check for transfer error */
-		if (td->error_any) {
-			/* the transfer is finished */
-			error = td->error_stall ? USB_ERR_STALLED : USB_ERR_IOERROR;
-			td = NULL;
-			break;
-		}
-		/* Check for short transfer */
-		if (len > 0) {
-			if (xfer->flags_int.short_frames_ok) {
-				/* follow alt next */
-				if (td->alt_next) {
-					td = td->obj_next;
-				} else {
-					td = NULL;
-				}
-			} else {
-				/* the transfer is finished */
-				td = NULL;
-			}
-			error = 0;
-			break;
-		}
-		td = td->obj_next;
-
-		/* this USB frame is complete */
-		error = 0;
-		break;
-
-	} while (0);
-
-	/* update transfer cache */
-
-	xfer->td_transfer_cache = td;
-
-	return (error);
-}
-
-static void
-octusb_standard_done(struct usb_xfer *xfer)
-{
-	struct octusb_softc *sc;
-	struct octusb_qh *qh;
-	usb_error_t error = 0;
-
-	DPRINTFN(12, "xfer=%p endpoint=%p transfer done\n",
-	    xfer, xfer->endpoint);
-
-	/* reset scanner */
-
-	xfer->td_transfer_cache = xfer->td_transfer_first;
-
-	if (xfer->flags_int.control_xfr) {
-		if (xfer->flags_int.control_hdr)
-			error = octusb_standard_done_sub(xfer);
-
-		xfer->aframes = 1;
-
-		if (xfer->td_transfer_cache == NULL)
-			goto done;
-	}
-	while (xfer->aframes != xfer->nframes) {
-		error = octusb_standard_done_sub(xfer);
-
-		xfer->aframes++;
-
-		if (xfer->td_transfer_cache == NULL)
-			goto done;
-	}
-
-	if (xfer->flags_int.control_xfr &&
-	    !xfer->flags_int.control_act)
-		error = octusb_standard_done_sub(xfer);
-
-done:
-	/* update data toggle */
-
-	qh = xfer->qh_start[0];
-	sc = qh->sc;
-
-	xfer->endpoint->toggle_next =
-	    cvmx_usb_get_toggle(
-	    &sc->sc_port[qh->root_port_index].state,
-	    qh->ep_handle) ? 1 : 0;
-
-	octusb_device_done(xfer, error);
-}
-
-static void
-octusb_interrupt_poll(struct octusb_softc *sc)
-{
-	struct usb_xfer *xfer;
-	uint8_t x;
-
-	/* poll all ports */
-	for (x = 0; x != sc->sc_noport; x++)
-		cvmx_usb_poll(&sc->sc_port[x].state);
-
-repeat:
-	TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
-		if (!octusb_xfer_do_fifo(xfer)) {
-			/* queue has been modified */
-			goto repeat;
-		}
-	}
-}
-
-static void
-octusb_start_standard_chain(struct usb_xfer *xfer)
-{
-	DPRINTFN(8, "\n");
-
-	/* poll one time */
-	if (octusb_xfer_do_fifo(xfer)) {
-		/* put transfer on interrupt queue */
-		usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
-
-		/* start timeout, if any */
-		if (xfer->timeout != 0) {
-			usbd_transfer_timeout_ms(xfer,
-			    &octusb_timeout, xfer->timeout);
-		}
-	}
-}
-
-void
-octusb_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
-{
-
-}
-
-usb_error_t
-octusb_init(struct octusb_softc *sc)
-{
-	cvmx_usb_initialize_flags_t flags;
-	int status;
-	uint8_t x;
-
-	/* flush all cache into memory */
-
-	usb_bus_mem_flush_all(&sc->sc_bus, &octusb_iterate_hw_softc);
-
-	/* set up the bus struct */
-	sc->sc_bus.methods = &octusb_bus_methods;
-
-	/* get number of ports */
-	sc->sc_noport = cvmx_usb_get_num_ports();
-
-	/* check number of ports */
-	if (sc->sc_noport > OCTUSB_MAX_PORTS)
-		sc->sc_noport = OCTUSB_MAX_PORTS;
-
-	/* set USB revision */
-	sc->sc_bus.usbrev = USB_REV_2_0;
-
-	/* flags for port initialization */
-	flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_AUTO;
-#ifdef USB_DEBUG
-	if (octusbdebug > 100)
-		flags |= CVMX_USB_INITIALIZE_FLAGS_DEBUG_ALL;
-#endif
-
-	USB_BUS_LOCK(&sc->sc_bus);
-
-	/* setup all ports */
-	for (x = 0; x != sc->sc_noport; x++) {
-		status = cvmx_usb_initialize(&sc->sc_port[x].state, x, flags);
-		if (status < 0)
-			sc->sc_port[x].disabled = 1;
-	}
-
-	USB_BUS_UNLOCK(&sc->sc_bus);
-
-	/* catch lost interrupts */
-	octusb_do_poll(&sc->sc_bus);
-
-	return (0);
-}
-
-usb_error_t
-octusb_uninit(struct octusb_softc *sc)
-{
-	uint8_t x;
-
-	USB_BUS_LOCK(&sc->sc_bus);
-
-	for (x = 0; x != sc->sc_noport; x++) {
-		if (sc->sc_port[x].disabled == 0)
-			cvmx_usb_shutdown(&sc->sc_port[x].state);
-	}
-	USB_BUS_UNLOCK(&sc->sc_bus);
-
-	return (0);
-
-}
-
-static void
-octusb_suspend(struct octusb_softc *sc)
-{
-	/* TODO */
-}
-
-static void
-octusb_resume(struct octusb_softc *sc)
-{
-	/* TODO */
-}
-
-/*------------------------------------------------------------------------*
- *	octusb_interrupt - OCTUSB interrupt handler
- *------------------------------------------------------------------------*/
-void
-octusb_interrupt(struct octusb_softc *sc)
-{
-	USB_BUS_LOCK(&sc->sc_bus);
-
-	DPRINTFN(16, "real interrupt\n");
-
-	/* poll all the USB transfers */
-	octusb_interrupt_poll(sc);
-
-	USB_BUS_UNLOCK(&sc->sc_bus);
-}
-
-/*------------------------------------------------------------------------*
- *	octusb_timeout - OCTUSB transfer timeout handler
- *------------------------------------------------------------------------*/
-static void
-octusb_timeout(void *arg)
-{
-	struct usb_xfer *xfer = arg;
-
-	DPRINTF("xfer=%p\n", xfer);
-
-	USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
-
-	/* transfer is transferred */
-	octusb_device_done(xfer, USB_ERR_TIMEOUT);
-}
-
-/*------------------------------------------------------------------------*
- *	octusb_do_poll - OCTUSB poll transfers
- *------------------------------------------------------------------------*/
-static void
-octusb_do_poll(struct usb_bus *bus)
-{
-	struct octusb_softc *sc = OCTUSB_BUS2SC(bus);
-
-	USB_BUS_LOCK(&sc->sc_bus);
-	octusb_interrupt_poll(sc);
-	USB_BUS_UNLOCK(&sc->sc_bus);
-}
-
-static void
-octusb_setup_standard_chain_sub(struct octusb_std_temp *temp)
-{
-	struct octusb_td *td;
-
-	/* get current Transfer Descriptor */
-	td = temp->td_next;
-	temp->td = td;
-
-	/* prepare for next TD */
-	temp->td_next = td->obj_next;
-
-	/* fill out the Transfer Descriptor */
-	td->func = temp->func;
-	td->pc = temp->pc;
-	td->offset = temp->offset;
-	td->remainder = temp->len;
-	td->error_any = 0;
-	td->error_stall = 0;
-	td->short_pkt = temp->short_pkt;
-	td->alt_next = temp->setup_alt_next;
-}
-
-static void
-octusb_setup_standard_chain(struct usb_xfer *xfer)
-{
-	struct octusb_std_temp temp;
-	struct octusb_td *td;
-	uint32_t x;
-
-	DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
-	    xfer->address, UE_GET_ADDR(xfer->endpointno),
-	    xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
-
-	/* setup starting point */
-	td = xfer->td_start[0];
-	xfer->td_transfer_first = td;
-	xfer->td_transfer_cache = td;
-
-	temp.td = NULL;
-	temp.td_next = td;
-	temp.setup_alt_next = xfer->flags_int.short_frames_ok;
-	temp.offset = 0;
-
-	/* check if we should prepend a setup message */
-
-	if (xfer->flags_int.control_xfr) {
-		if (xfer->flags_int.control_hdr) {
-			temp.func = &octusb_host_control_header_tx;
-			temp.len = xfer->frlengths[0];
-			temp.pc = xfer->frbuffers + 0;
-			temp.short_pkt = temp.len ? 1 : 0;
-
-			/* check for last frame */
-			if (xfer->nframes == 1) {
-				/*
-				 * no STATUS stage yet, SETUP is
-				 * last
-				 */
-				if (xfer->flags_int.control_act)
-					temp.setup_alt_next = 0;
-			}
-			octusb_setup_standard_chain_sub(&temp);
-		}
-		x = 1;
-	} else {
-		x = 0;
-	}
-
-	if (x != xfer->nframes) {
-		if (xfer->endpointno & UE_DIR_IN) {
-			if (xfer->flags_int.control_xfr)
-				temp.func = &octusb_host_control_data_rx;
-			else
-				temp.func = &octusb_non_control_data_rx;
-		} else {
-			if (xfer->flags_int.control_xfr)
-				temp.func = &octusb_host_control_data_tx;
-			else
-				temp.func = &octusb_non_control_data_tx;
-		}
-
-		/* setup "pc" pointer */
-		temp.pc = xfer->frbuffers + x;
-	}
-	while (x != xfer->nframes) {
-		/* DATA0 or DATA1 message */
-
-		temp.len = xfer->frlengths[x];
-
-		x++;
-
-		if (x == xfer->nframes) {
-			if (xfer->flags_int.control_xfr) {
-				/* no STATUS stage yet, DATA is last */
-				if (xfer->flags_int.control_act)
-					temp.setup_alt_next = 0;
-			} else {
-				temp.setup_alt_next = 0;
-			}
-		}
-		if (temp.len == 0) {
-			/* make sure that we send an USB packet */
-
-			temp.short_pkt = 0;
-
-		} else {
-			/* regular data transfer */
-
-			temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
-		}
-
-		octusb_setup_standard_chain_sub(&temp);
-
-		if (xfer->flags_int.isochronous_xfr) {
-			/* get next data offset */
-			temp.offset += temp.len;
-		} else {
-			/* get next Page Cache pointer */
-			temp.pc = xfer->frbuffers + x;
-		}
-	}
-
-	/* check if we should append a status stage */
-
-	if (xfer->flags_int.control_xfr &&
-	    !xfer->flags_int.control_act) {
-		temp.func = &octusb_host_control_status_tx;
-		temp.len = 0;
-		temp.pc = NULL;
-		temp.short_pkt = 0;
-		temp.setup_alt_next = 0;
-
-		octusb_setup_standard_chain_sub(&temp);
-	}
-	/* must have at least one frame! */
-	td = temp.td;
-	xfer->td_transfer_last = td;
-
-	/* properly setup QH */
-
-	td->qh->ep_allocated = 0;
-	td->qh->ep_toggle_next = xfer->endpoint->toggle_next ? 1 : 0;
-}
-
-/*------------------------------------------------------------------------*
- *	octusb_device_done - OCTUSB transfers done code
- *
- * NOTE: This function can be called more than one time in a row.
- *------------------------------------------------------------------------*/
-static void
-octusb_device_done(struct usb_xfer *xfer, usb_error_t error)
-{
-	USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
-
-	DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
-	    xfer, xfer->endpoint, error);
-
-	/*
-	 * 1) Free any endpoints.
-	 * 2) Control transfers can be split and we should not re-open
-	 *    the data pipe between transactions unless there is an error.
-	 */
-	if ((xfer->flags_int.control_act == 0) || (error != 0)) {
-		struct octusb_td *td;
-
-		td = xfer->td_start[0];
-
-		octusb_host_free_endpoint(td);
-	}
-	/* dequeue transfer and start next transfer */
-	usbd_transfer_done(xfer, error);
-}
-
-/*------------------------------------------------------------------------*
- * octusb bulk support
- *------------------------------------------------------------------------*/
-static void
-octusb_device_bulk_open(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_bulk_close(struct usb_xfer *xfer)
-{
-	octusb_device_done(xfer, USB_ERR_CANCELLED);
-}
-
-static void
-octusb_device_bulk_enter(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_bulk_start(struct usb_xfer *xfer)
-{
-	/* setup TDs */
-	octusb_setup_standard_chain(xfer);
-	octusb_start_standard_chain(xfer);
-}
-
-struct usb_pipe_methods octusb_device_bulk_methods =
-{
-	.open = octusb_device_bulk_open,
-	.close = octusb_device_bulk_close,
-	.enter = octusb_device_bulk_enter,
-	.start = octusb_device_bulk_start,
-};
-
-/*------------------------------------------------------------------------*
- * octusb control support
- *------------------------------------------------------------------------*/
-static void
-octusb_device_ctrl_open(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_ctrl_close(struct usb_xfer *xfer)
-{
-	octusb_device_done(xfer, USB_ERR_CANCELLED);
-}
-
-static void
-octusb_device_ctrl_enter(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_ctrl_start(struct usb_xfer *xfer)
-{
-	/* setup TDs */
-	octusb_setup_standard_chain(xfer);
-	octusb_start_standard_chain(xfer);
-}
-
-struct usb_pipe_methods octusb_device_ctrl_methods =
-{
-	.open = octusb_device_ctrl_open,
-	.close = octusb_device_ctrl_close,
-	.enter = octusb_device_ctrl_enter,
-	.start = octusb_device_ctrl_start,
-};
-
-/*------------------------------------------------------------------------*
- * octusb interrupt support
- *------------------------------------------------------------------------*/
-static void
-octusb_device_intr_open(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_intr_close(struct usb_xfer *xfer)
-{
-	octusb_device_done(xfer, USB_ERR_CANCELLED);
-}
-
-static void
-octusb_device_intr_enter(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_intr_start(struct usb_xfer *xfer)
-{
-	/* setup TDs */
-	octusb_setup_standard_chain(xfer);
-	octusb_start_standard_chain(xfer);
-}
-
-struct usb_pipe_methods octusb_device_intr_methods =
-{
-	.open = octusb_device_intr_open,
-	.close = octusb_device_intr_close,
-	.enter = octusb_device_intr_enter,
-	.start = octusb_device_intr_start,
-};
-
-/*------------------------------------------------------------------------*
- * octusb isochronous support
- *------------------------------------------------------------------------*/
-static void
-octusb_device_isoc_open(struct usb_xfer *xfer)
-{
-	return;
-}
-
-static void
-octusb_device_isoc_close(struct usb_xfer *xfer)
-{
-	octusb_device_done(xfer, USB_ERR_CANCELLED);
-}
-
-static void
-octusb_device_isoc_enter(struct usb_xfer *xfer)
-{
-	struct octusb_softc *sc = OCTUSB_BUS2SC(xfer->xroot->bus);
-	uint32_t temp;
-	uint32_t frame_count;
-	uint32_t fs_frames;
-
-	DPRINTFN(5, "xfer=%p next=%d nframes=%d\n",
-	    xfer, xfer->endpoint->isoc_next, xfer->nframes);
-
-	/* get the current frame index */
-
-	frame_count = cvmx_usb_get_frame_number(
-	    &sc->sc_port[xfer->xroot->udev->port_index].state);
-
-	/*
-	 * check if the frame index is within the window where the frames
-	 * will be inserted
-	 */
-	temp = (frame_count - xfer->endpoint->isoc_next) & 0x7FF;
-
-	if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
-		fs_frames = (xfer->nframes + 7) / 8;
-	} else {
-		fs_frames = xfer->nframes;
-	}
-
-	if ((xfer->endpoint->is_synced == 0) || (temp < fs_frames)) {
-		/*
-		 * If there is data underflow or the pipe queue is
-		 * empty we schedule the transfer a few frames ahead
-		 * of the current frame position. Else two isochronous
-		 * transfers might overlap.
-		 */
-		xfer->endpoint->isoc_next = (frame_count + 3) & 0x7FF;
-		xfer->endpoint->is_synced = 1;
-		DPRINTFN(2, "start next=%d\n", xfer->endpoint->isoc_next);
-	}
-	/*
-	 * compute how many milliseconds the insertion is ahead of the
-	 * current frame position:
-	 */
-	temp = (xfer->endpoint->isoc_next - frame_count) & 0x7FF;
-
-	/*
-	 * pre-compute when the isochronous transfer will be finished:
-	 */
-	xfer->isoc_time_complete =
-	    usb_isoc_time_expand(&sc->sc_bus, frame_count) + temp +
-	    fs_frames;
-
-	/* compute frame number for next insertion */
-	xfer->endpoint->isoc_next += fs_frames;
-}
-
-static void
-octusb_device_isoc_start(struct usb_xfer *xfer)
-{
-	/* setup TDs */
-	octusb_setup_standard_chain(xfer);
-	octusb_start_standard_chain(xfer);
-}
-
-struct usb_pipe_methods octusb_device_isoc_methods =
-{
-	.open = octusb_device_isoc_open,
-	.close = octusb_device_isoc_close,
-	.enter = octusb_device_isoc_enter,
-	.start = octusb_device_isoc_start,
-};
-
-/*------------------------------------------------------------------------*
- * OCTUSB root HUB support
- *------------------------------------------------------------------------*
- * Simulate a hardware HUB by handling all the necessary requests.
- *------------------------------------------------------------------------*/
-static const
-struct usb_device_descriptor octusb_devd = {
-	.bLength = sizeof(octusb_devd),
-	.bDescriptorType = UDESC_DEVICE,
-	.bcdUSB = {0x00, 0x02},
-	.bDeviceClass = UDCLASS_HUB,
-	.bDeviceSubClass = UDSUBCLASS_HUB,
-	.bDeviceProtocol = UDPROTO_FSHUB,
-	.bMaxPacketSize = 64,
-	.idVendor = {0},
-	.idProduct = {0},
-	.bcdDevice = {0x00, 0x01},
-	.iManufacturer = 1,
-	.iProduct = 2,
-	.iSerialNumber = 0,
-	.bNumConfigurations = 1,
-};
-
-static const
-struct usb_device_qualifier octusb_odevd = {
-	.bLength = sizeof(octusb_odevd),
-	.bDescriptorType = UDESC_DEVICE_QUALIFIER,
-	.bcdUSB = {0x00, 0x02},
-	.bDeviceClass = UDCLASS_HUB,
-	.bDeviceSubClass = UDSUBCLASS_HUB,
-	.bDeviceProtocol = UDPROTO_FSHUB,
-	.bMaxPacketSize0 = 0,
-	.bNumConfigurations = 0,
-	.bReserved = 0,
-};
-
-static const
-struct octusb_config_desc octusb_confd = {
-	.confd = {
-		.bLength = sizeof(struct usb_config_descriptor),
-		.bDescriptorType = UDESC_CONFIG,
-		.wTotalLength[0] = sizeof(octusb_confd),
-		.bNumInterface = 1,
-		.bConfigurationValue = 1,
-		.iConfiguration = 0,
-		.bmAttributes = UC_SELF_POWERED,
-		.bMaxPower = 0		/* max power */
-	},
-	.ifcd = {
-		.bLength = sizeof(struct usb_interface_descriptor),
-		.bDescriptorType = UDESC_INTERFACE,
-		.bNumEndpoints = 1,
-		.bInterfaceClass = UICLASS_HUB,
-		.bInterfaceSubClass = UISUBCLASS_HUB,
-		.bInterfaceProtocol = UIPROTO_FSHUB,
-	},
-	.endpd = {
-		.bLength = sizeof(struct usb_endpoint_descriptor),
-		.bDescriptorType = UDESC_ENDPOINT,
-		.bEndpointAddress = UE_DIR_IN | OCTUSB_INTR_ENDPT,
-		.bmAttributes = UE_INTERRUPT,
-		.wMaxPacketSize[0] = 8,	/* max packet (63 ports) */
-		.bInterval = 255,
-	},
-};
-
-static const
-struct usb_hub_descriptor_min octusb_hubd =
-{
-	.bDescLength = sizeof(octusb_hubd),
-	.bDescriptorType = UDESC_HUB,
-	.bNbrPorts = 2,
-	.wHubCharacteristics = {UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0},
-	.bPwrOn2PwrGood = 50,
-	.bHubContrCurrent = 0,
-	.DeviceRemovable = {0x00},	/* all ports are removable */
-};
-
-static usb_error_t
-octusb_roothub_exec(struct usb_device *udev,
-    struct usb_device_request *req, const void **pptr, uint16_t *plength)
-{
-	struct octusb_softc *sc = OCTUSB_BUS2SC(udev->bus);
-	const void *ptr;
-	const char *str_ptr;
-	uint16_t value;
-	uint16_t index;
-	uint16_t status;
-	uint16_t change;
-	uint16_t len;
-	usb_error_t err;
-	cvmx_usb_port_status_t usb_port_status;
-
-	USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
-
-	/* XXX disable power save mode, hence it is not supported */
-	udev->power_mode = USB_POWER_MODE_ON;
-
-	/* buffer reset */
-	ptr = (const void *)&sc->sc_hub_desc.temp;
-	len = 0;
-	err = 0;
-
-	value = UGETW(req->wValue);
-	index = UGETW(req->wIndex);
-
-	DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
-	    "wValue=0x%04x wIndex=0x%04x\n",
-	    req->bmRequestType, req->bRequest,
-	    UGETW(req->wLength), value, index);
-
-#define	C(x,y) ((x) | ((y) << 8))
-	switch (C(req->bRequest, req->bmRequestType)) {
-	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
-	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
-	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
-		break;
-	case C(UR_GET_CONFIG, UT_READ_DEVICE):
-		len = 1;
-		sc->sc_hub_desc.temp[0] = sc->sc_conf;
-		break;
-	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
-		switch (value >> 8) {
-		case UDESC_DEVICE:
-			if ((value & 0xff) != 0) {
-				err = USB_ERR_IOERROR;
-				goto done;
-			}
-			len = sizeof(octusb_devd);
-
-			ptr = (const void *)&octusb_devd;
-			break;
-
-		case UDESC_DEVICE_QUALIFIER:
-			if ((value & 0xff) != 0) {
-				err = USB_ERR_IOERROR;
-				goto done;
-			}
-			len = sizeof(octusb_odevd);
-			ptr = (const void *)&octusb_odevd;
-			break;
-
-		case UDESC_CONFIG:
-			if ((value & 0xff) != 0) {
-				err = USB_ERR_IOERROR;
-				goto done;
-			}
-			len = sizeof(octusb_confd);
-			ptr = (const void *)&octusb_confd;
-			break;
-
-		case UDESC_STRING:
-			switch (value & 0xff) {
-			case 0:	/* Language table */
-				str_ptr = "\001";
-				break;
-
-			case 1:	/* Vendor */
-				str_ptr = "Cavium Networks";
-				break;
-
-			case 2:	/* Product */
-				str_ptr = "OCTUSB Root HUB";
-				break;
-
-			default:
-				str_ptr = "";
-				break;
-			}
-
-			len = usb_make_str_desc(sc->sc_hub_desc.temp,
-			    sizeof(sc->sc_hub_desc.temp), str_ptr);
-			break;
-
-		default:
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		break;
-	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
-		len = 1;
-		sc->sc_hub_desc.temp[0] = 0;
-		break;
-	case C(UR_GET_STATUS, UT_READ_DEVICE):
-		len = 2;
-		USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
-		break;
-	case C(UR_GET_STATUS, UT_READ_INTERFACE):
-	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
-		len = 2;
-		USETW(sc->sc_hub_desc.stat.wStatus, 0);
-		break;
-	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
-		if (value >= OCTUSB_MAX_DEVICES) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		sc->sc_addr = value;
-		break;
-	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
-		if ((value != 0) && (value != 1)) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		sc->sc_conf = value;
-		break;
-	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
-		break;
-	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
-	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
-	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
-		err = USB_ERR_IOERROR;
-		goto done;
-	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
-		break;
-	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
-		break;
-		/* Hub requests */
-	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
-		break;
-	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
-		DPRINTFN(4, "UR_CLEAR_PORT_FEATURE "
-		    "port=%d feature=%d\n",
-		    index, value);
-		if ((index < 1) ||
-		    (index > sc->sc_noport) ||
-		    sc->sc_port[index - 1].disabled) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		index--;
-
-		switch (value) {
-		case UHF_PORT_ENABLE:
-			cvmx_usb_disable(&sc->sc_port[index].state);
-			break;
-		case UHF_PORT_SUSPEND:
-		case UHF_PORT_RESET:
-			break;
-		case UHF_C_PORT_CONNECTION:
-			cvmx_usb_set_status(&sc->sc_port[index].state,
-			    cvmx_usb_get_status(&sc->sc_port[index].state));
-			break;
-		case UHF_C_PORT_ENABLE:
-			cvmx_usb_set_status(&sc->sc_port[index].state,
-			    cvmx_usb_get_status(&sc->sc_port[index].state));
-			break;
-		case UHF_C_PORT_OVER_CURRENT:
-			cvmx_usb_set_status(&sc->sc_port[index].state,
-			    cvmx_usb_get_status(&sc->sc_port[index].state));
-			break;
-		case UHF_C_PORT_RESET:
-			sc->sc_isreset = 0;
-			goto done;
-		case UHF_C_PORT_SUSPEND:
-			break;
-		case UHF_PORT_CONNECTION:
-		case UHF_PORT_OVER_CURRENT:
-		case UHF_PORT_POWER:
-		case UHF_PORT_LOW_SPEED:
-		default:
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		break;
-	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
-		if ((value & 0xff) != 0) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		sc->sc_hubd = octusb_hubd;
-		sc->sc_hubd.bNbrPorts = sc->sc_noport;
-		len = sizeof(sc->sc_hubd);
-		ptr = (const void *)&sc->sc_hubd;
-		break;
-	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
-		len = 16;
-		memset(sc->sc_hub_desc.temp, 0, 16);
-		break;
-	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
-		if ((index < 1) ||
-		    (index > sc->sc_noport) ||
-		    sc->sc_port[index - 1].disabled) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		index--;
-
-		usb_port_status = cvmx_usb_get_status(&sc->sc_port[index].state);
-
-		status = change = 0;
-		if (usb_port_status.connected)
-			status |= UPS_CURRENT_CONNECT_STATUS;
-		if (usb_port_status.port_enabled)
-			status |= UPS_PORT_ENABLED;
-		if (usb_port_status.port_over_current)
-			status |= UPS_OVERCURRENT_INDICATOR;
-		if (usb_port_status.port_powered)
-			status |= UPS_PORT_POWER;
-
-		switch (usb_port_status.port_speed) {
-		case CVMX_USB_SPEED_HIGH:
-			status |= UPS_HIGH_SPEED;
-			break;
-		case CVMX_USB_SPEED_FULL:
-			break;
-		default:
-			status |= UPS_LOW_SPEED;
-			break;
-		}
-
-		if (usb_port_status.connect_change)
-			change |= UPS_C_CONNECT_STATUS;
-		if (sc->sc_isreset)
-			change |= UPS_C_PORT_RESET;
-
-		USETW(sc->sc_hub_desc.ps.wPortStatus, status);
-		USETW(sc->sc_hub_desc.ps.wPortChange, change);
-
-		len = sizeof(sc->sc_hub_desc.ps);
-		break;
-	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
-		err = USB_ERR_IOERROR;
-		goto done;
-	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
-		break;
-	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
-		if ((index < 1) ||
-		    (index > sc->sc_noport) ||
-		    sc->sc_port[index - 1].disabled) {
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		index--;
-
-		switch (value) {
-		case UHF_PORT_ENABLE:
-			break;
-		case UHF_PORT_RESET:
-			cvmx_usb_disable(&sc->sc_port[index].state);
-			if (cvmx_usb_enable(&sc->sc_port[index].state)) {
-				err = USB_ERR_IOERROR;
-				goto done;
-			}
-			sc->sc_isreset = 1;
-			goto done;
-		case UHF_PORT_POWER:
-			/* pretend we turned on power */
-			goto done;
-		case UHF_PORT_SUSPEND:
-		case UHF_C_PORT_CONNECTION:
-		case UHF_C_PORT_ENABLE:
-		case UHF_C_PORT_OVER_CURRENT:
-		case UHF_PORT_CONNECTION:
-		case UHF_PORT_OVER_CURRENT:
-		case UHF_PORT_LOW_SPEED:
-		case UHF_C_PORT_SUSPEND:
-		case UHF_C_PORT_RESET:
-		default:
-			err = USB_ERR_IOERROR;
-			goto done;
-		}
-		break;
-	default:
-		err = USB_ERR_IOERROR;
-		goto done;
-	}
-done:
-	*plength = len;
-	*pptr = ptr;
-	return (err);
-}
-
-static void
-octusb_xfer_setup(struct usb_setup_params *parm)
-{
-	struct usb_page_search page_info;
-	struct usb_page_cache *pc;
-	struct octusb_softc *sc;
-	struct octusb_qh *qh;
-	struct usb_xfer *xfer;
-	struct usb_device *hub;
-	void *last_obj;
-	uint32_t n;
-	uint32_t ntd;
-
-	sc = OCTUSB_BUS2SC(parm->udev->bus);
-	xfer = parm->curr_xfer;
-	qh = NULL;
-
-	/*
-	 * NOTE: This driver does not use any of the parameters that
-	 * are computed from the following values. Just set some
-	 * reasonable dummies:
-	 */
-
-	parm->hc_max_packet_size = 0x400;
-	parm->hc_max_packet_count = 3;
-	parm->hc_max_frame_size = 0xC00;
-
-	usbd_transfer_setup_sub(parm);
-
-	if (parm->err)
-		return;
-
-	/* Allocate a queue head */
-
-	if (usbd_transfer_setup_sub_malloc(
-	    parm, &pc, sizeof(struct octusb_qh),
-	    USB_HOST_ALIGN, 1)) {
-		parm->err = USB_ERR_NOMEM;
-		return;
-	}
-	if (parm->buf) {
-		usbd_get_page(pc, 0, &page_info);
-
-		qh = page_info.buffer;
-
-		/* fill out QH */
-
-		qh->sc = OCTUSB_BUS2SC(xfer->xroot->bus);
-		qh->max_frame_size = xfer->max_frame_size;
-		qh->max_packet_size = xfer->max_packet_size;
-		qh->ep_num = xfer->endpointno;
-		qh->ep_type = xfer->endpoint->edesc->bmAttributes;
-		qh->dev_addr = xfer->address;
-		qh->dev_speed = usbd_get_speed(xfer->xroot->udev);
-		qh->root_port_index = xfer->xroot->udev->port_index;
-		/* We need Octeon USB HUB's port index, not the local port */
-		hub = xfer->xroot->udev->parent_hub;
-		while(hub && hub->parent_hub) {
-			qh->root_port_index = hub->port_index;
-			hub = hub->parent_hub;
-		}
-
-		switch (xfer->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
-		case UE_INTERRUPT:
-			if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH)
-				qh->ep_interval = xfer->interval * 8;
-			else
-				qh->ep_interval = xfer->interval * 1;
-			break;
-		case UE_ISOCHRONOUS:
-			qh->ep_interval = 1 << xfer->fps_shift;
-			break;
-		default:
-			qh->ep_interval = 0;
-			break;
-		}
-
-		qh->ep_mult = xfer->max_packet_count & 3;
-		qh->hs_hub_addr = xfer->xroot->udev->hs_hub_addr;
-		qh->hs_hub_port = xfer->xroot->udev->hs_port_no;
-	}
-	xfer->qh_start[0] = qh;
-
-	/* Allocate a fixup buffer */
-
-	if (usbd_transfer_setup_sub_malloc(
-	    parm, &pc, OCTUSB_MAX_FIXUP,
-	    OCTUSB_MAX_FIXUP, 1)) {
-		parm->err = USB_ERR_NOMEM;
-		return;
-	}
-	if (parm->buf) {
-		usbd_get_page(pc, 0, &page_info);
-
-		qh->fixup_phys = page_info.physaddr;
-		qh->fixup_pc = pc;
-		qh->fixup_buf = page_info.buffer;
-	}
-	/* Allocate transfer descriptors */
-
-	last_obj = NULL;
-
-	ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ;
-
-	if (usbd_transfer_setup_sub_malloc(
-	    parm, &pc, sizeof(struct octusb_td),
-	    USB_HOST_ALIGN, ntd)) {
-		parm->err = USB_ERR_NOMEM;
-		return;
-	}
-	if (parm->buf) {
-		for (n = 0; n != ntd; n++) {
-			struct octusb_td *td;
-
-			usbd_get_page(pc + n, 0, &page_info);
-
-			td = page_info.buffer;
-
-			td->qh = qh;
-			td->obj_next = last_obj;
-
-			last_obj = td;
-		}
-	}
-	xfer->td_start[0] = last_obj;
-}
-
-static void
-octusb_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
-    struct usb_endpoint *ep)
-{
-	struct octusb_softc *sc = OCTUSB_BUS2SC(udev->bus);
-
-	DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
-	    ep, udev->address, edesc->bEndpointAddress,
-	    udev->flags.usb_mode, sc->sc_addr);
-
-	if (udev->device_index != sc->sc_addr) {
-		switch (edesc->bmAttributes & UE_XFERTYPE) {
-		case UE_CONTROL:
-			ep->methods = &octusb_device_ctrl_methods;
-			break;
-		case UE_INTERRUPT:
-			ep->methods = &octusb_device_intr_methods;
-			break;
-		case UE_ISOCHRONOUS:
-			if (udev->speed != USB_SPEED_LOW)
-				ep->methods = &octusb_device_isoc_methods;
-			break;
-		case UE_BULK:
-			ep->methods = &octusb_device_bulk_methods;
-			break;
-		default:
-			/* do nothing */
-			break;
-		}
-	}
-}
-
-static void
-octusb_xfer_unsetup(struct usb_xfer *xfer)
-{
-	DPRINTF("Nothing to do.\n");
-}
-
-static void
-octusb_get_dma_delay(struct usb_device *udev, uint32_t *pus)
-{
-	/* DMA delay - wait until any use of memory is finished */
-	*pus = (2125);			/* microseconds */
-}
-
-static void
-octusb_device_resume(struct usb_device *udev)
-{
-	DPRINTF("Nothing to do.\n");
-}
-
-static void
-octusb_device_suspend(struct usb_device *udev)
-{
-	DPRINTF("Nothing to do.\n");
-}
-
-static void
-octusb_set_hw_power(struct usb_bus *bus)
-{
-	DPRINTF("Nothing to do.\n");
-}
-
-static void
-octusb_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
-{
-	struct octusb_softc *sc = OCTUSB_BUS2SC(bus);
-
-	switch (state) {
-	case USB_HW_POWER_SUSPEND:
-		octusb_suspend(sc);
-		break;
-	case USB_HW_POWER_SHUTDOWN:
-		octusb_uninit(sc);
-		break;
-	case USB_HW_POWER_RESUME:
-		octusb_resume(sc);
-		break;
-	default:
-		break;
-	}
-}
-
-struct usb_bus_methods octusb_bus_methods = {
-	.endpoint_init = octusb_ep_init,
-	.xfer_setup = octusb_xfer_setup,
-	.xfer_unsetup = octusb_xfer_unsetup,
-	.get_dma_delay = octusb_get_dma_delay,
-	.device_resume = octusb_device_resume,
-	.device_suspend = octusb_device_suspend,
-	.set_hw_power = octusb_set_hw_power,
-	.set_hw_power_sleep = octusb_set_hw_power_sleep,
-	.roothub_exec = octusb_roothub_exec,
-	.xfer_poll = octusb_do_poll,
-};
diff --git a/sys/mips/cavium/usb/octusb.h b/sys/mips/cavium/usb/octusb.h
deleted file mode 100644
index 4844d03fdc1d..000000000000
--- a/sys/mips/cavium/usb/octusb.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/* $FreeBSD$ */
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _OCTUSB_H_
-#define	_OCTUSB_H_
-
-#define	OCTUSB_MAX_DEVICES MIN(USB_MAX_DEVICES, 64)
-#define	OCTUSB_MAX_PORTS	2	/* hardcoded */
-#define	OCTUSB_MAX_FIXUP	4096	/* bytes */
-#define	OCTUSB_INTR_ENDPT	0x01
-
-struct octusb_qh;
-struct octusb_td;
-struct octusb_softc;
-
-typedef uint8_t (octusb_cmd_t)(struct octusb_td *td);
-
-struct octusb_td {
-	struct octusb_qh *qh;
-	struct octusb_td *obj_next;
-	struct usb_page_cache *pc;
-	octusb_cmd_t *func;
-
-	uint32_t remainder;
-	uint32_t offset;
-
-	uint8_t	error_any:1;
-	uint8_t	error_stall:1;
-	uint8_t	short_pkt:1;
-	uint8_t	alt_next:1;
-	uint8_t	reserved:4;
-};
-
-struct octusb_qh {
-	uint64_t fixup_phys;
-
-	struct octusb_softc *sc;
-	struct usb_page_cache *fixup_pc;
-	uint8_t *fixup_buf;
-
-	cvmx_usb_iso_packet_t iso_pkt;
-
-	uint32_t fixup_off;
-
-	uint16_t max_frame_size;
-	uint16_t max_packet_size;
-	uint16_t fixup_actlen;
-	uint16_t fixup_len;
-	uint16_t ep_interval;
-
-	uint8_t	dev_addr;
-	uint8_t	dev_speed;
-	uint8_t	ep_allocated;
-	uint8_t	ep_mult;
-	uint8_t	ep_num;
-	uint8_t	ep_type;
-	uint8_t	ep_toggle_next;
-	uint8_t	root_port_index;
-	uint8_t	fixup_complete;
-	uint8_t	fixup_pending;
-	uint8_t	hs_hub_addr;
-	uint8_t	hs_hub_port;
-
-	int	fixup_handle;
-	int	ep_handle;
-};
-
-struct octusb_config_desc {
-	struct usb_config_descriptor confd;
-	struct usb_interface_descriptor ifcd;
-	struct usb_endpoint_descriptor endpd;
-} __packed;
-
-union octusb_hub_desc {
-	struct usb_status stat;
-	struct usb_port_status ps;
-	uint8_t	temp[128];
-};
-
-struct octusb_port {
-	cvmx_usb_state_t state;
-	uint8_t	disabled;
-};
-
-struct octusb_softc {
-	struct usb_bus sc_bus;		/* base device */
-	union octusb_hub_desc sc_hub_desc;
-
-	struct usb_device *sc_devices[OCTUSB_MAX_DEVICES];
-
-	struct resource *sc_irq_res[OCTUSB_MAX_PORTS];
-	void   *sc_intr_hdl[OCTUSB_MAX_PORTS];
-
-	struct octusb_port sc_port[OCTUSB_MAX_PORTS];
-	device_t sc_dev;
-
-	struct usb_hub_descriptor_min sc_hubd;
-
-	uint8_t	sc_noport;		/* number of ports */
-	uint8_t	sc_addr;		/* device address */
-	uint8_t	sc_conf;		/* device configuration */
-	uint8_t	sc_isreset;		/* set if current port is reset */
-
-	uint8_t	sc_hub_idata[1];
-};
-
-usb_bus_mem_cb_t octusb_iterate_hw_softc;
-usb_error_t octusb_init(struct octusb_softc *);
-usb_error_t octusb_uninit(struct octusb_softc *);
-void	octusb_interrupt(struct octusb_softc *);
-
-#endif					/* _OCTUSB_H_ */
diff --git a/sys/mips/cavium/usb/octusb_octeon.c b/sys/mips/cavium/usb/octusb_octeon.c
deleted file mode 100644
index 41d02e6dcadf..000000000000
--- a/sys/mips/cavium/usb/octusb_octeon.c
+++ /dev/null
@@ -1,218 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <contrib/octeon-sdk/cvmx.h>
-#include <mips/cavium/octeon_irq.h>
-#include <contrib/octeon-sdk/cvmx-usb.h>
-
-#include <mips/cavium/usb/octusb.h>
-
-#define	MEM_RID	0
-
-static device_identify_t octusb_octeon_identify;
-static device_probe_t octusb_octeon_probe;
-static device_attach_t octusb_octeon_attach;
-static device_detach_t octusb_octeon_detach;
-
-struct octusb_octeon_softc {
-	struct octusb_softc sc_dci;	/* must be first */
-};
-
-static void
-octusb_octeon_identify(driver_t *drv, device_t parent)
-{
-	if (octeon_has_feature(OCTEON_FEATURE_USB))
-		BUS_ADD_CHILD(parent, 0, "octusb", 0);
-}
-
-static int
-octusb_octeon_probe(device_t dev)
-{
-	device_set_desc(dev, "Cavium Octeon USB controller");
-	return (0);
-}
-
-static int
-octusb_octeon_attach(device_t dev)
-{
-	struct octusb_octeon_softc *sc = device_get_softc(dev);
-	int err;
-	int rid;
-	int nports;
-	int i;
-
-	/* setup controller interface softc */
-
-	/* initialise some bus fields */
-	sc->sc_dci.sc_bus.parent = dev;
-	sc->sc_dci.sc_bus.devices = sc->sc_dci.sc_devices;
-	sc->sc_dci.sc_bus.devices_max = OCTUSB_MAX_DEVICES;
-	sc->sc_dci.sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_dci.sc_bus,
-	    USB_GET_DMA_TAG(dev), NULL)) {
-		return (ENOMEM);
-	}
-	nports = cvmx_usb_get_num_ports();
-	if (nports > OCTUSB_MAX_PORTS)
-		panic("octusb: too many USB ports %d", nports);
-	for (i = 0; i < nports; i++) {
-		rid = 0;
-		sc->sc_dci.sc_irq_res[i] =
-		    bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-			       OCTEON_IRQ_USB0 + i, OCTEON_IRQ_USB0 + i, 1, RF_ACTIVE);
-		if (!(sc->sc_dci.sc_irq_res[i])) {
-			goto error;
-		}
-
-#if (__FreeBSD_version >= 700031)
-		err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res[i], INTR_TYPE_BIO | INTR_MPSAFE,
-		    NULL, (driver_intr_t *)octusb_interrupt, sc, &sc->sc_dci.sc_intr_hdl[i]);
-#else
-		err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res[i], INTR_TYPE_BIO | INTR_MPSAFE,
-		    (driver_intr_t *)octusb_interrupt, sc, &sc->sc_dci.sc_intr_hdl[i]);
-#endif
-		if (err) {
-			sc->sc_dci.sc_intr_hdl[i] = NULL;
-			goto error;
-		}
-	}
-
-	sc->sc_dci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (!(sc->sc_dci.sc_bus.bdev)) {
-		goto error;
-	}
-	device_set_ivars(sc->sc_dci.sc_bus.bdev, &sc->sc_dci.sc_bus);
-
-	err = octusb_init(&sc->sc_dci);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_dci.sc_bus.bdev);
-	}
-	if (err) {
-		goto error;
-	}
-	return (0);
-
-error:
-	octusb_octeon_detach(dev);
-	return (ENXIO);
-}
-
-static int
-octusb_octeon_detach(device_t dev)
-{
-	struct octusb_octeon_softc *sc = device_get_softc(dev);
-	int err;
-	int nports;
-	int i;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	if (sc->sc_dci.sc_irq_res[0] && sc->sc_dci.sc_intr_hdl[0])
-		/*
-	 	 * only call octusb_octeon_uninit() after octusb_octeon_init()
-	 	 */
-		octusb_uninit(&sc->sc_dci);
-
-	nports = cvmx_usb_get_num_ports();
-	if (nports > OCTUSB_MAX_PORTS)
-		panic("octusb: too many USB ports %d", nports);
-	for (i = 0; i < nports; i++) {
-		if (sc->sc_dci.sc_irq_res[i] && sc->sc_dci.sc_intr_hdl[i]) {
-			err = bus_teardown_intr(dev, sc->sc_dci.sc_irq_res[i],
-			    sc->sc_dci.sc_intr_hdl[i]);
-			sc->sc_dci.sc_intr_hdl[i] = NULL;
-		}
-		if (sc->sc_dci.sc_irq_res[i]) {
-			bus_release_resource(dev, SYS_RES_IRQ, 0,
-			    sc->sc_dci.sc_irq_res[i]);
-			sc->sc_dci.sc_irq_res[i] = NULL;
-		}
-	}
-	usb_bus_mem_free_all(&sc->sc_dci.sc_bus, NULL);
-
-	return (0);
-}
-
-static device_method_t octusb_octeon_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_identify, octusb_octeon_identify),
-	DEVMETHOD(device_probe, octusb_octeon_probe),
-	DEVMETHOD(device_attach, octusb_octeon_attach),
-	DEVMETHOD(device_detach, octusb_octeon_detach),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t octusb_octeon_driver = {
-	.name = "octusb",
-	.methods = octusb_octeon_methods,
-	.size = sizeof(struct octusb_octeon_softc),
-};
-
-static devclass_t octusb_octeon_devclass;
-
-DRIVER_MODULE(octusb, ciu, octusb_octeon_driver, octusb_octeon_devclass, 0, 0);
diff --git a/sys/mips/conf/ALFA_HORNET_UB b/sys/mips/conf/ALFA_HORNET_UB
deleted file mode 100644
index 3c8c491b8e6d..000000000000
--- a/sys/mips/conf/ALFA_HORNET_UB
+++ /dev/null
@@ -1,59 +0,0 @@
-#
-# Alfa Networks Hornet UB - an AR933x based SoC wifi device.
-#
-# http://www.alfa.com.tw/products_show.php?pc=99&ps=50
-#
-# This is for the 64MB RAM/16MB flash part.  They also
-# do various other versions; they have different RAM/flash
-# configurations.
-#
-# * AR9330 SoC
-# * 64MB RAM
-# * 16MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include         "std.AR933X"
-
-ident           ALFA_HORNET_UB
-
-# Override hints with board values
-hints           "ALFA_HORNET_UB.hints"
-
-# Board memory - 64MB
-options         AR71XX_REALMEM=(64*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/ALFA_HORNET_UB.hints b/sys/mips/conf/ALFA_HORNET_UB.hints
deleted file mode 100644
index 55661e8640da..000000000000
--- a/sys/mips/conf/ALFA_HORNET_UB.hints
+++ /dev/null
@@ -1,105 +0,0 @@
-#
-# This file adds to the values in AR933X_BASE.hints
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# There's no need to set the ar933x GMAC configuration bits.
-# This just creates a switch instance and correctly uses it.
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-
-# Where the ART is - last 64k in the flash
-# 0x9fff1000 ?
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# The board 16MiB flash layout in uboot env:
-#
-# 256k (uboot), 64k (uboot-env), 14336k (rootfs), 1600k (kernel), 64k (NVRAM), 64k (ART)
-
-# However, it boots from 0x9f050000, which is the front of the flsah!
-# Thus the kernel/rootfs are switched around.
-
-# 256KB
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-# 64KB
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=0
-
-# 1600KB
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x001e0000
-hint.map.2.name="kernel"
-hint.map.2.readonly=0
-
-# 14336KB
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x001e0000
-hint.map.3.end=0x00fe0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-# NVRAM
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00fe0000
-hint.map.4.end=0x00ff0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00ff0000
-hint.map.5.end=0x01000000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-#hint.gpio.0.pinmask=0x001c02ae
-#hint.gpio.0.pinmask=0x00001803
-
-# XXX TODO: the button and LEDs!
-
diff --git a/sys/mips/conf/AP121 b/sys/mips/conf/AP121
deleted file mode 100644
index 2d31d7151941..000000000000
--- a/sys/mips/conf/AP121
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# AP121 - the AP121 reference board from Qualcomm Atheros includes:
-#
-# * AR9330 SoC
-# * 16MB RAM
-# * 4MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include         "std.AR933X"
-
-ident           AP121
-
-# Override hints with board values
-hints           "AP121.hints"
-
-# Force the board memory - the base AP121 only has 16MB RAM
-options         AR71XX_REALMEM=(16*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/AP121.hints b/sys/mips/conf/AP121.hints
deleted file mode 100644
index e7287f1396ac..000000000000
--- a/sys/mips/conf/AP121.hints
+++ /dev/null
@@ -1,107 +0,0 @@
-#
-# This file adds to the values in AR91XX_BASE.hints.
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-
-# The AP121 4MB flash layout:
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
-#    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
-#    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
-#
-# So:
-# 256k: uboot
-# 64: uboot-env
-# 2752k: rootfs
-# 896k: kernel
-# 64k: config
-# 64k: ART
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00300000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=0
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00300000
-hint.map.3.end=0x003e0000
-hint.map.3.name="kernel"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003e0000
-hint.map.4.end=0x003f0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x003f0000
-hint.map.5.end=0x00400000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-#hint.gpio.0.pinmask=0x001c02ae
-hint.gpio.0.pinmask=0x00001803
-
-# gpio0 - WLAN LED
-# gpio1 - USB LED
-# gpio11 - Jumpstart button
-# gpio12 - Reset button
-
-# LEDs are configured separately and driven by the LED device
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="wlan"
-hint.gpioled.0.pins=0x0001
-
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="usb"
-hint.gpioled.1.pins=0x0002
diff --git a/sys/mips/conf/AP135 b/sys/mips/conf/AP135
deleted file mode 100644
index 7ffeb9d3fe48..000000000000
--- a/sys/mips/conf/AP135
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# AP135 - the QCA955x SoC reference design
-#
-# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi,
-# 128MiB RAM, an AR8327 5-port gigabit ethernet switch and
-# a QCA 11ac 5GHz AP NIC.
-#
-# The to things not currently support are the QCA 11ac NIC and
-# PCIe host controllers - there's two of them, and the existing
-# PCIe code here doesn't support that just yet.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default QCA955x parameters
-include         "std.QCA955X"
-
-ident           AP135
-
-# Override hints with board values
-hints           "AP135.hints"
-
-# Force the board memory - the base AP135 has 128MB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# yes, this board has a PCIe connected atheros device
-# add ath_pci so it can at least attach things when there's a
-# ath(4) in there, rather than the 11ac chip we don't support.
-device		pci
-device		qca955x_pci
-
-device		firmware		# Used by the above
-options 	AR71XX_ATH_EEPROM
-options 	ATH_EEPROM_FIRMWARE
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/AP135.hints b/sys/mips/conf/AP135.hints
deleted file mode 100644
index 40bfdc0e8d34..000000000000
--- a/sys/mips/conf/AP135.hints
+++ /dev/null
@@ -1,179 +0,0 @@
-# This is a placeholder until the hardware support is complete.
-
-# I'm assuming this is an AP135-020. The AP136-010 in openwrt has
-# the ethernet ports wired up to the switch in the reverse way.
-
-# $FreeBSD$
-
-# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
-hint.qca955x_gmac.0.gmac_cfg=0x1
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# mdiobus1 on arge1 - required to bring up arge1?
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# AR8327 - connected via mdiobus0 on arge0
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0	# definitely not the internal switch!
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5	# all ports are PHYs
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=0	# not needed
-hint.arswitch.0.is_gmii=0	# not needed
-
-# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
-# The current code only supports one CPU port.  So hm, what should
-# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?
-
-# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
-# That's currently supposed to be hooked up to CPU port 0.
-
-# Other AR8327 configuration parameters
-
-# AP136-020 parameters
-
-# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII
-
-# AR8327_PAD_MAC_SGMII
-hint.arswitch.0.pad.0.mode=3
-#hint.arswitch.0.pad.0.rxclk_delay_sel=0
-hint.arswitch.0.pad.0.sgmii_delay_en=1
-
-# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII
-
-# AR8327_PAD_MAC_RGMII
-# XXX I think this hooks it up to the internal MAC6
-hint.arswitch.0.pad.6.mode=6
-hint.arswitch.0.pad.6.txclk_delay_en=1
-hint.arswitch.0.pad.6.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.6.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.6.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0x00000000
-hint.arswitch.0.led.ctrl1=0xc737c737
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x00c30c00
-hint.arswitch.0.led.open_drain=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.6.force_link=1
-hint.arswitch.0.port.6.speed=1000
-hint.arswitch.0.port.6.duplex=1
-hint.arswitch.0.port.6.txpause=1
-hint.arswitch.0.port.6.rxpause=1
-
-# arge0 - hooked up to AR8327 GMAC6, RGMII
-# set at 1000/full to the switch.
-# so, lock both sides of this connect up to 1000/full;
-# if_arge thus wont change the PLL configuration
-# upon a link status change.
-hint.arge.0.phymask=0x0
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.pll_1000=0x56000000
-
-# MAC for arge0 is the first 6 bytes of the ART
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=5		# SGMII
-hint.arge.1.pll_1000=0x03000101
-
-# MAC for arge1 is the second 6 bytes of the ART
-hint.arge.1.eeprommac=0x1fff0006
-
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# flash layout:
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),8256k(mib0),64k(ART)
-
-# The default flash layout isn't enough to fit a freebsd kernel
-# now, so the layout has been shuffled around.
-#
-# By default it's set to:
-# 256KB uboot, 64KB uboot-env, 6336KB rootfs, 1344KB kernel, 64KB cfg, 8256MB mib0, 64KB ART
-# With 'bootcmd=bootm 0x9f680000' in the environment.
-#
-# Instead, now let's make it:
-# 256KB uboot, 64KB uboot-env, 2048MB kernel, 6144MB rootfs, 7644KB mib0, 64KB cfg, 64KB ART
-# .. and then you change the boot env to be:
-# 'bootcmd=bootm 0x9f050000'
-
-# 256KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000	# 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# 64KiB u-boot-env
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000	# 64k u-boot-env
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-# 2048KiB kernel
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00250000	# 2048k rootfs
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-# 6144KiB rootfs
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00250000
-hint.map.3.end=0x00850000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=1
-
-# 7644KiB mib0
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00850000
-hint.map.4.end=0x00fe0000
-hint.map.4.name="mib0"
-hint.map.4.readonly=0
-
-# 64KiB cfg
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00fe0000
-hint.map.5.end=0x00ff0000
-hint.map.5.name="cfg"
-hint.map.5.readonly=0
-
-# 64KiB ART
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x00ff0000
-hint.map.6.end=0x01000000	# 64k ART
-hint.map.6.name="ART"
-hint.map.6.readonly=1
diff --git a/sys/mips/conf/AP143 b/sys/mips/conf/AP143
deleted file mode 100644
index 8476299aafca..000000000000
--- a/sys/mips/conf/AP143
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# AP143 - the AP143 reference board from Qualcomm Atheros includes:
-#
-# * AR9330 SoC
-# * 32MB RAM
-# * 4MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default QCA953x parameters
-include         "QCA953X_BASE"
-
-ident           AP143
-
-# Override hints with board values
-hints           "AP143.hints"
-
-# Force the board memory - the base AP121 only has 16MB RAM
-options         AR71XX_REALMEM=(32*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/AP143.hints b/sys/mips/conf/AP143.hints
deleted file mode 100644
index ef988faf566d..000000000000
--- a/sys/mips/conf/AP143.hints
+++ /dev/null
@@ -1,112 +0,0 @@
-#
-# This file adds to the values in QCA953X_BASE.hints.
-#
-# $FreeBSD$
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio1"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.is_9340=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-# MAC for arge0 is the first 6 bytes of the ART
-hint.arge.0.eeprommac=0x1fff0000
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy2	# .. off of the switch mdiobus
-
-# arge1 - GMII, 1000/full
-hint.arge.1.eeprommac=0x1fff0006
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# The AP121 4MB flash layout:
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
-#    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
-#    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
-#
-# So:
-# 256k: uboot
-# 64: uboot-env
-# 2752k: rootfs
-# 896k: kernel
-# 64k: config
-# 64k: ART
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00300000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=0
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00300000
-hint.map.3.end=0x003e0000
-hint.map.3.name="kernel"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003e0000
-hint.map.4.end=0x003f0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x003f0000
-hint.map.5.end=0x00400000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-#hint.gpio.0.pinmask=0x001c02ae
-# hint.gpio.0.pinmask=0x00001803
-
-# gpio0 - WLAN LED
-# gpio1 - USB LED
-# gpio11 - Jumpstart button
-# gpio12 - Reset button
-
-# LEDs are configured separately and driven by the LED device
-#hint.gpioled.0.at="gpiobus0"
-#hint.gpioled.0.name="wlan"
-#hint.gpioled.0.pins=0x0001
-
-#hint.gpioled.1.at="gpiobus0"
-#hint.gpioled.1.name="usb"
-#hint.gpioled.1.pins=0x0002
diff --git a/sys/mips/conf/AP91 b/sys/mips/conf/AP91
deleted file mode 100644
index 8a897c455b93..000000000000
--- a/sys/mips/conf/AP91
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# Specific board setup for the Atheros AP91 reference board.
-#
-# The AP91 has the following hardware:
-#
-# + AR7241 CPU SoC
-# + AR9287 Wifi
-# + Integrated switch (XXX speed?)
-# + 4MB flash
-# + 16MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"AP91"
-hints		"AP91.hints"
-
-options 	AR71XX_REALMEM=16*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# Limit inlines
-makeoptions	INLINE_LIMIT=768
-
-# We bite the performance overhead for now; the kernel won't
-# fit if the mutexes are inlined.
-options 	MUTEX_NOINLINE
-options 	RWLOCK_NOINLINE
-options 	SX_NOINLINE
-
-# There's no need to enable swapping on this platform.
-options 	NO_SWAPPING
-
-# For DOS - enable if required
-# options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Not enough space for these..
-nooptions 	INVARIANTS
-nooptions 	INVARIANT_SUPPORT
-nooptions 	WITNESS
-nooptions 	WITNESS_SKIPSPIN
-nooptions 	DEBUG_REDZONE
-nooptions 	DEBUG_MEMGUARD
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
diff --git a/sys/mips/conf/AP91.hints b/sys/mips/conf/AP91.hints
deleted file mode 100644
index 6c0cc433a6f7..000000000000
--- a/sys/mips/conf/AP91.hints
+++ /dev/null
@@ -1,104 +0,0 @@
-# $FreeBSD$
-
-# arge0 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# arge1 MDIO bus doesn't exist on the AR7240
-
-# arge0: MII; dedicated PHY 4 on switch, connected via internal switch
-# MDIO bus.
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-# hint.arge.0.eeprommac=0x83fe9ff0
-hint.arge.0.phymask=0x10	# PHY 4
-# hint.arge.0.miimode=2		# MII
-hint.arge.0.mdio=mdioproxy1	# Hanging off the arswitch MDIO bus
-
-# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII.
-
-hint.arge.1.phymask=0x0
-# hint.arge.1.miimode=1		# GMII
-hint.arge.1.media=1000		# Force to 1000BaseTX/full
-hint.arge.1.fduplex=1
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1	# We need to be explicitly told this
-hint.arswitch.0.numphys=4	# 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1	# Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=0	# No, not RGMII
-hint.arswitch.0.is_gmii=0	# No, not GMII
-
-# ath0 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# ath
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001	# pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002	# pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800	# pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080	# pin 7
-
-# nvram mapping - XXX ?
-hint.nvram.0.base=0x1f030000
-hint.nvram.0.maxsize=0x2000
-hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-hint.nvram.1.base=0x1f032000
-hint.nvram.1.maxsize=0x4000
-hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# GEOM_MAP
-#
-# From my AP91 environment:
-#
-# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs),
-#    960k(uImage),64k(ART)
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000	# 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000	# 64k u-boot-env
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00300000	# 2752k rootfs
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00300000
-hint.map.3.end=0x003f0000	# 896k uImage
-hint.map.3.name="uImage"
-hint.map.3.readonly=1
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003f0000
-hint.map.4.end=0x00400000	# 64k ART
-hint.map.4.name="ART"
-hint.map.4.readonly=1
diff --git a/sys/mips/conf/AP93 b/sys/mips/conf/AP93
deleted file mode 100644
index 0f7af123c5d9..000000000000
--- a/sys/mips/conf/AP93
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# Specific board setup for the Atheros AP91 reference board.
-#
-# The AP93 has the following hardware:
-#
-# + AR7240 CPU SoC
-# + AR9280 Wifi
-# + Integrated switch (XXX speed?)
-# + 16MB flash
-# + 64MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"AP93"
-hints		"AP93.hints"
-
-options 	AR71XX_REALMEM=64*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# For DOS - enable if required
-options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
diff --git a/sys/mips/conf/AP93.hints b/sys/mips/conf/AP93.hints
deleted file mode 100644
index 2fbbe2904153..000000000000
--- a/sys/mips/conf/AP93.hints
+++ /dev/null
@@ -1,139 +0,0 @@
-# $FreeBSD$
-
-# arge0 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# arge1 MDIO bus doesn't exist on the AR7240
-
-# arge0: MII; dedicated PHY 4 on switch, connected via internal switch
-# MDIO bus.
-
-# hint.arge.0.eeprommac=0x83fe9ff0
-hint.arge.0.phymask=0x10	# PHY 4
-# hint.arge.0.miimode=2		# MII
-hint.arge.0.mdio=mdioproxy1	# Hanging off the arswitch MDIO bus
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII.
-hint.arge.1.phymask=0x0
-# hint.arge.1.miimode=1		# GMII
-hint.arge.1.media=1000		# Force to 1000BaseTX/full
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1fff0006
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1	# We need to be explicitly told this
-hint.arswitch.0.numphys=4	# 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1	# Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=0	# No, not RGMII
-hint.arswitch.0.is_gmii=0	# No, not GMII
-
-# ath0 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# ath0 - eeprom comes from here
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001	# pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002	# pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800	# pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080	# pin 7
-
-# nvram mapping - XXX ?
-hint.nvram.0.base=0x1f030000
-hint.nvram.0.maxsize=0x2000
-hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-hint.nvram.1.base=0x1f032000
-hint.nvram.1.maxsize=0x4000
-hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# GEOM_MAP
-#
-# From my AP93 environment:
-#
-# 256k - uboot
-# 256k - uboot-env
-# 3072k - spare-rootfs
-# 1024k - spare-uImage
-# 3072k - rootfs
-# 1024k - uImage
-# 64k - mib0
-# 64k - mib1
-# 4096k - ct
-# 3392k - var
-# 64k - ART
-
-# To make it useful for FreeBSD for now, treat spare rootfs, spare
-# uimage and rootfs as 'rootfs'.
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00080000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00080000
-hint.map.2.end="search:0x00080000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=0
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00080000:0x10000:.!/bin/sh"
-hint.map.3.end=0x00880000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00880000
-hint.map.4.end=0x00890000
-# hint.map.4.name="mib0"
-hint.map.4.name="cfg"
-# hint.map.4.readonly=1
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00890000
-hint.map.5.end=0x008a0000
-hint.map.5.name="mib1"
-hint.map.5.readonly=1
-
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x008a0000
-hint.map.6.end=0x00ca0000
-hint.map.6.name="ct"
-hint.map.6.readonly=1
-
-hint.map.7.at="flash/spi0"
-hint.map.7.start=0x00ca0000
-hint.map.7.end=0x00ff0000
-hint.map.7.name="var"
-hint.map.7.readonly=1
-
-hint.map.8.at="flash/spi0"
-hint.map.8.start=0x00ff0000
-hint.map.8.end=0x01000000	# 64k ART
-hint.map.8.name="ART"
-hint.map.8.readonly=1
-
diff --git a/sys/mips/conf/AP94 b/sys/mips/conf/AP94
deleted file mode 100644
index 0d91ed46427d..000000000000
--- a/sys/mips/conf/AP94
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Specific board setup for the Atheros AP94 reference board.
-#
-# The AP94 has the following hardware:
-#
-# + AR7161 CPU SoC
-# + AR9223 2.4GHz 11n
-# + AR9220 5GHz 11n
-# + AR8216 10/100 switch
-# + m25p64 based 8MB flash
-# + 32mb RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"AP94"
-hints		"AP94.hints"
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-options 	AR71XX_REALMEM=32*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# options 	MD_ROOT
-# options 	MD_ROOT_SIZE="6144"
-
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
diff --git a/sys/mips/conf/AP94.hints b/sys/mips/conf/AP94.hints
deleted file mode 100644
index 1abc8e726790..000000000000
--- a/sys/mips/conf/AP94.hints
+++ /dev/null
@@ -1,28 +0,0 @@
-# $FreeBSD$
-
-hint.arge.0.phymask=0x000c
-hint.arge.0.media=100
-hint.arge.0.fduplex=1
-
-# XXX grab these from uboot?
-# hint.arge.0.eeprommac=0x1f01fc00
-
-# The ath NICs have calibration data in flash.
-# PCI slot 17
-# hint.ath.0.eepromaddr=0x1fff1000
-# PCI slot 18
-# hint.ath.1.eepromaddr=0x1fff5000
-
-# ath0 - slot 17
-hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.17.0.ath_fixup_size=4096
-
-# ath1 - slot 18
-hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000
-hint.pcib.0.bus.0.18.0.ath_fixup_size=4096
-
-# .. and now, telling each ath(4) NIC where to find the firmware
-# image.
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware"
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware"
-
diff --git a/sys/mips/conf/AP96 b/sys/mips/conf/AP96
deleted file mode 100644
index 1f3b8d136f0d..000000000000
--- a/sys/mips/conf/AP96
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# Specific board setup for the Atheros AP96 reference board.
-#
-# The AP96 has the following hardware:
-#
-# + AR7161 CPU SoC
-# + AR9223 2.4GHz 11n
-# + AR9220 5GHz 11n
-# + AR8316 10/100/1000 switch
-# + m25p64 based 8MB flash
-# + 64mb RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"AP96"
-hints		"AP96.hints"
-
-options 	AR71XX_REALMEM=64*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# For DOS - enable if required
-options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
diff --git a/sys/mips/conf/AP96.hints b/sys/mips/conf/AP96.hints
deleted file mode 100644
index 6067a4bcd77c..000000000000
--- a/sys/mips/conf/AP96.hints
+++ /dev/null
@@ -1,97 +0,0 @@
-# $FreeBSD$
-
-# arge0 MDIO bus - there's no arge1 MDIO bus for AR71xx
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-# This creates an automatic mdioproxy0!
-
-
-# The switch automatically probes off of mdio0, and will
-# create an mdioproxy1.
-
-# TODO: RGMII
-hint.arge.0.phymask=0x0		# Nothing attached here (XXX?)
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.miimode=3		# RGMII
-
-# TODO: RGMII
-hint.arge.1.phymask=0x10
-# hint.arge.1.pll_1000 = 0x1f000000
-# For now, rendezouvs this on the arge0 mdiobus.
-# Later, this will rendezvous via the AR8316 switch.
-hint.arge.1.miimode=3		# RGMII
-hint.arge.1.mdio=mdioproxy1	# off the switch mdiobus
-
-# AR8316 switch on MDIO0
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1
-hint.arswitch.0.is_rgmii=1
-hint.arswitch.0.is_gmii=0
-
-# ath0 - slot 17
-hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.17.0.ath_fixup_size=4096
-
-# ath1 - slot 18
-hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000
-hint.pcib.0.bus.0.18.0.ath_fixup_size=4096
-
-# .. and now, telling each ath(4) NIC where to find the firmware
-# image.
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware"
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware"
-
-# The default flash layout:
-# uboot: 192k
-# env: 64k
-# rootfs: 6144k
-# uimage (kernel): 1728k
-# caldata: 64k
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init
-#    mtdparts=ar7100-nor0:192k(uboot),64k(env),6144k(rootfs),1728k(uImage),64k(caldata) mem=64M
-
-#
-# We steal 64k from the end of rootfs to store the local config.
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000030000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00030000
-hint.map.1.end=0x00040000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00040000
-hint.map.2.end=0x00630000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00630000
-hint.map.3.end=0x00640000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00640000
-hint.map.4.end=0x007f0000
-hint.map.4.name="kernel"
-hint.map.4.readonly=1
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
diff --git a/sys/mips/conf/AR5312_BASE.hints b/sys/mips/conf/AR5312_BASE.hints
deleted file mode 100644
index e7b1224f5757..000000000000
--- a/sys/mips/conf/AR5312_BASE.hints
+++ /dev/null
@@ -1,29 +0,0 @@
-# $FreeBSD$
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x1C000003
-hint.uart.0.msize=0x20
-#hint.uart.0.irq=4
-#hint.uart.0.flags="0x30"
-
-# Watchdog
-hint.ar5315_wdog.0.at="apb0"
-hint.ar5315_wdog.0.irq=6
-
-# Ethernet
-hint.are.0.at="nexus0" 
-hint.are.0.maddr=0x18100000
-hint.are.0.msize=0x00100000  
-hint.are.0.irq=1
-
-hint.are.1.at="nexus0"     
-hint.are.1.maddr=0x18200000
-hint.are.1.msize=0x00100000
-hint.are.1.irq=2
-
-# GEOM redboot FIS directory offset
-#hint.redboot.0.fisoffset="0x007e0000"
diff --git a/sys/mips/conf/AR5315_BASE.hints b/sys/mips/conf/AR5315_BASE.hints
deleted file mode 100644
index 25040f3c4748..000000000000
--- a/sys/mips/conf/AR5315_BASE.hints
+++ /dev/null
@@ -1,34 +0,0 @@
-# $FreeBSD$
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=0
-
-# uart0
-hint.uart.0.at="apb0"
-hint.uart.0.maddr=0x11100003
-hint.uart.0.msize=0x20
-#hint.uart.0.irq=0
-#hint.uart.0.flags="0x30"
-
-# Watchdog
-hint.ar5315_wdog.0.at="apb0"
-hint.ar5315_wdog.0.irq=7
-
-# SPI
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x11300000
-hint.spi.0.msize=0x0000000c
-#hint.spi.0.irq=2
-
-# Ethernet
-hint.are.0.at="nexus0"
-hint.are.0.maddr=0x10500000
-hint.are.0.msize=0x500000
-hint.are.0.irq=2
-
-# Flash
-hint.mx25l.0.at="spibus0"       
-hint.mx25l.0.cs=0
-
-# GEOM redboot FIS directory offset
-#hint.redboot.0.fisoffset="0x007e0000"
-
diff --git a/sys/mips/conf/AR71XX_BASE b/sys/mips/conf/AR71XX_BASE
deleted file mode 100644
index 2d6e834c8ef9..000000000000
--- a/sys/mips/conf/AR71XX_BASE
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# AR71XX -- Kernel configuration file for FreeBSD/MIPS for Atheros 71xx systems
-#
-# This includes all the common drivers for the AR71XX boards along with
-# the usb, net80211 and atheros driver code.
-#
-# $FreeBSD$
-#
-
-machine		mips mips
-ident		AR71XX_BASE
-cpu		CPU_MIPS24K
-makeoptions	KERNLOADADDR=0x80050000
-options 	HWPMC_HOOKS
-
-files		"../atheros/files.ar71xx"
-
-# For now, hints are per-board.
-
-hints		"AR71XX_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	INET6			# IPv6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-
-# options 	NFSCL		#Network Filesystem Client
-
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-options         FFS                     #Berkeley Fast Filesystem
-# options         SOFTUPDATES             #Enable FFS soft updates support
-# options         UFS_ACL                 #Support for access control lists
-# options         UFS_DIRHASH             #Improve performance on big directories
-# options 	MSDOSFS			# Read MSDOS filesystems; useful for USB/CF
-
-include 	"std.AR_MIPS_BASE"
-makeoptions 	MODULES_OVERRIDE+="hwpmc_mips24k"
-
-device		pci
-device		ar71xx_pci
-
-device		usb
-device		ehci
-
-device		scbus
-device		umass
-device		da
-
-device		uart_ar71xx
-device		ar71xx_apb
diff --git a/sys/mips/conf/AR71XX_BASE.hints b/sys/mips/conf/AR71XX_BASE.hints
deleted file mode 100644
index 43f0aea76dbf..000000000000
--- a/sys/mips/conf/AR71XX_BASE.hints
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# $FreeBSD$
-#
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ohci
-hint.ohci.0.at="apb0"
-hint.ohci.0.maddr=0x1c000000
-hint.ohci.0.msize=0x01000000
-hint.ohci.0.irq=6
-
-#ehci
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000000
-hint.ehci.0.msize=0x01000000
-hint.ehci.0.irq=1
-
-# pci
-hint.pcib.0.at="nexus0"
-hint.pcib.0.irq=0
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-# phymask, media and fduplex depend upon the specific
-# board.
-# So each board will override the settings as needed.
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# GPIO
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
-
-# Each board should override the GPIO bus pins with the configuration
-# relevant to it. Thus no pins are defined here.
-
-# hwpmc device
-hint.ar71xx_pmc.0.at="apb0"
-hint.ar71xx_pmc.0.irq=5
diff --git a/sys/mips/conf/AR724X_BASE.hints b/sys/mips/conf/AR724X_BASE.hints
deleted file mode 100644
index 38635288200f..000000000000
--- a/sys/mips/conf/AR724X_BASE.hints
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# $FreeBSD$
-#
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ohci
-hint.ohci.0.at="apb0"
-hint.ohci.0.maddr=0x1c000000
-hint.ohci.0.msize=0x01000000
-hint.ohci.0.irq=6
-
-#ehci
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x01000000
-hint.ehci.0.irq=1
-
-# pci
-hint.pcib.0.at="nexus0"
-hint.pcib.0.irq=0
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-# phymask, media and fduplex depend upon the specific
-# board.
-# So each board will override the settings as needed.
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# GPIO
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
-
-# Each board should override the GPIO bus pins with the configuration
-# relevant to it. Thus no pins are defined here.
-
-# hwpmc device
-hint.ar71xx_pmc.0.at="apb0"
-hint.ar71xx_pmc.0.irq=5
diff --git a/sys/mips/conf/AR91XX_BASE.hints b/sys/mips/conf/AR91XX_BASE.hints
deleted file mode 100644
index 81442f3cedc7..000000000000
--- a/sys/mips/conf/AR91XX_BASE.hints
+++ /dev/null
@@ -1,59 +0,0 @@
-# This file (and the kernel config file accompanying it) are not designed 
-# to be used by themselves. Instead, users of this file should create a
-# kernel # config file which includes this file (which gets the basic hints),
-# then override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-
-# $FreeBSD$
-
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ehci - note the 0x100 offset for the AR913x/AR724x
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00ffff00
-hint.ehci.0.irq=1
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# XXX The ath device hangs off of the AHB, rather than the Nexus.
-hint.ath.0.at="nexus0"
-hint.ath.0.maddr=0x180c0000
-hint.ath.0.msize=0x30000
-hint.ath.0.irq=0
-# Set this to define where the ath calibration data
-# should be fetched from in physical memory.
-# hint.ath.0.eepromaddr=0x1fff1000
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# The GPIO function and pin mask is configured per-board
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
diff --git a/sys/mips/conf/AR933X_BASE.hints b/sys/mips/conf/AR933X_BASE.hints
deleted file mode 100644
index e208c6a3fef9..000000000000
--- a/sys/mips/conf/AR933X_BASE.hints
+++ /dev/null
@@ -1,69 +0,0 @@
-# This file (and the kernel config file accompanying it) are not designed 
-# to be used by themselves. Instead, users of this file should create a
-# kernel # config file which includes this file (which gets the basic hints),
-# then override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-
-# $FreeBSD$
-
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# ART calibration data mapping device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-
-# uart0
-hint.uart.0.at="apb0"
-# NB: This isn't an ns8250 UART
-hint.uart.0.maddr=0x18020000
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ehci - note the 0x100 offset for the AR913x/AR724x
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00ffff00
-hint.ehci.0.irq=1
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# XXX The ath device hangs off of the AHB, rather than the Nexus.
-hint.ath.0.at="nexus0"
-hint.ath.0.maddr=0x18100000
-hint.ath.0.msize=0x20000
-hint.ath.0.irq=0
-hint.ath.0.vendor_id=0x168c
-hint.ath.0.device_id=0x0035
-
-# Where the ART is - last 64k in the first 8MB of flash
-#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# The GPIO function and pin mask is configured per-board
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
diff --git a/sys/mips/conf/AR934X_BASE.hints b/sys/mips/conf/AR934X_BASE.hints
deleted file mode 100644
index aa45331695b3..000000000000
--- a/sys/mips/conf/AR934X_BASE.hints
+++ /dev/null
@@ -1,76 +0,0 @@
-# This file (and the kernel config file accompanying it) are not designed 
-# to be used by themselves. Instead, users of this file should create a
-# kernel # config file which includes this file (which gets the basic hints),
-# then override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-
-# $FreeBSD$
-
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# ART calibration data mapping device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-
-# uart0
-hint.uart.0.at="apb0"
-# NB: This isn't an ns8250 UART
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ehci - note the 0x100 offset for the AR913x/AR724x
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00001000
-hint.ehci.0.irq=1
-
-# pci
-hint.pcib.0.at="nexus0"
-hint.pcib.0.irq=0
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# XXX The ath device hangs off of the AHB, rather than the Nexus.
-hint.ath.0.at="nexus0"
-hint.ath.0.maddr=0x18100000
-hint.ath.0.msize=0x20000
-hint.ath.0.irq=0
-hint.ath.0.vendor_id=0x168c
-hint.ath.0.device_id=0x0031
-# Set this to define where the ath calibration data
-# should be fetched from in physical memory.
-# hint.ath.0.eepromaddr=0x1fff1000
-
-# Where the ART is - last 64k in the first 8MB of flash
-#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# The GPIO function and pin mask is configured per-board
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
diff --git a/sys/mips/conf/BCM b/sys/mips/conf/BCM
deleted file mode 100644
index 27d93766c354..000000000000
--- a/sys/mips/conf/BCM
+++ /dev/null
@@ -1,110 +0,0 @@
-#
-# $FreeBSD$
-#
-# The Broadcom 470x/471x/535x series of processors and boards is very commonly
-# used in COTS hardware including the ASUS RT-N12, RT-N16, RT-N53.
-#
-
-ident		BCM
-cpu		CPU_MIPS74K
-
-hints		"BCM.hints"
-include		"../broadcom/std.broadcom"
-
-# ships with cfe firmware
-options 	CFE
-device		cfe
-
-options 	ALT_BREAK_TO_DEBUGGER
-options 	BREAK_TO_DEBUGGER
-options		BOOTVERBOSE=0
-
-makeoptions	TRAMPLOADADDR=0x80800000
-makeoptions	DEBUG="-g3"		#Build kernel with gdb(1) debug symbols
-makeoptions	MODULES_OVERRIDE=""
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-#options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options         FFS                     #Berkeley Fast Filesystem
-options         SOFTUPDATES             #Enable FFS soft updates support
-options         UFS_ACL                 #Support for access control lists
-options         UFS_DIRHASH             #Improve performance on big directories
-
-device		xz
-options		GEOM_UZIP
-options		GEOM_LABEL		# Providers labelization.
-options		ROOTDEVNAME=\"ufs:ufs/FBSD\"	# assumes FW built by 
-					# freebsd-build-wifi
-
-# Debugging for use in -current
-#options 	DEADLKRES
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-
-#options	BHND_LOGLEVEL=BHND_DEBUG_LEVEL
-#options 	BUS_DEBUG
-#makeoptions	BUS_DEBUG
-options 	EARLY_PRINTF
-#options	VERBOSE_SYSINIT
-#makeoptions	VERBOSE_SYSINIT
-
-# bhnd(4)
-device		bhnd
-device		bcma			# bcma backplane
-device		bcma_nexus
-
-device		pci
-device		bhnd_pcib		# PCIe-G1 core
-
-#device		bgmac			# Broadcom GMAC - not yet
-
-device		gpio
-device		mdio
-
-#Flash
-device		spibus
-device		mx25l			# Serial Flash
-device		cfi			# Parallel Flash
-device		cfid
-
-#UART
-device		uart
-
-#Base
-device		loop
-device		ether
-device		md
-
-#Performance
-#options 	HWPMC_HOOKS
-#device		hwpmc
-#device	 	hwpmc_mips74k
-
-#Ethernet
-# device 	bfe			# XXX will build both pci and siba
-device 		miibus			# attachments
-
-# pci devices
-
-# USB
-options 	USB_DEBUG		# enable debug msgs
-# taken from atheros
-options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-options 	USB_HOST_ALIGN=32		# AR71XX (MIPS in general?) requires this
-
-device		usb			# USB Bus (required)
-device		ohci			# OHCI interface
-device		ehci			# EHCI interface (USB 2.0)
-
-device		scbus
-device		umass
-device		da
diff --git a/sys/mips/conf/BCM.hints b/sys/mips/conf/BCM.hints
deleted file mode 100644
index d25a64e7d634..000000000000
--- a/sys/mips/conf/BCM.hints
+++ /dev/null
@@ -1,7 +0,0 @@
-# $FreeBSD$
-hint.bhnd.0.at="nexus0"
-hint.bhnd.0.maddr="0x18000000" 
-hint.bhnd.0.msize="0x00100000"
-
-# NVRAM via CFE
-hint.bhnd_nvram.0.at="nexus0"
diff --git a/sys/mips/conf/BERI_DE4.hints b/sys/mips/conf/BERI_DE4.hints
deleted file mode 100644
index 66dad52f3aed..000000000000
--- a/sys/mips/conf/BERI_DE4.hints
+++ /dev/null
@@ -1,26 +0,0 @@
-# $FreeBSD$
-
-# Hardwired location of bitfile
-hint.map.0.at="cfid0s.fpga0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00c00000
-hint.map.0.name="fpga"
-
-# Kernel on the second chip
-hint.map.1.at="cfid0s.os"
-hint.map.1.start=0x007e0000
-hint.map.1.end=0x01fe0000
-hint.map.1.name="kernel"
-
-# Altera Triple-Speed Ethernet Mac, present in tPad and DE-4 configurations
-# configured from fdt(4) but PHYs are still described in here.
-# Currently configured for individual tse_mac cores.
-hint.e1000phy.0.at="miibus0"
-hint.e1000phy.0.phyno=0
-hint.e1000phy.1.at="miibus0"
-hint.e1000phy.1.phyno=0
-hint.e1000phy.2.at="miibus0"
-hint.e1000phy.2.phyno=0
-hint.e1000phy.3.at="miibus0"
-hint.e1000phy.3.phyno=0
-
diff --git a/sys/mips/conf/BERI_DE4_BASE b/sys/mips/conf/BERI_DE4_BASE
deleted file mode 100644
index 7719009ccf5a..000000000000
--- a/sys/mips/conf/BERI_DE4_BASE
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# BERI_DE4_BASE -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC
-# Implementation) FPGA soft core, as configured in its Terasic DE-4 reference
-# configuration.  This kernel configration must be further specialized to
-# to include a root filesystem specification.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "std.BERI"
-
-options 	NFSCL			# Network Filesystem Client
-options 	NFSLOCKD		# Network Lock Manager
-options 	NFS_ROOT		# NFS usable as /, requires NFSCL
-
-options         FDT
-options         FDT_DTB_STATIC
-makeoptions     FDT_DTS_FILE=beripad-de4.dts
-
-hints		"BERI_DE4.hints"	# Flash partitions still use hints.
-
-device		altera_atse
-device		altera_avgen
-device		altera_jtag_uart
-device		altera_sdcard
-device		terasic_de4led
-device		terasic_mtl
-
-device		bpf
-device		cfi
-device		cfid
-options 	CFI_SUPPORT_STRATAFLASH
-options 	ATSE_CFI_HACK
-device		vt
-device		kbdmux
-
-device		uart
-
-device		miibus
-options 	DEVICE_POLLING
-
-#
-# DMA support
-#
-options		ALTERA_MSGDMA_DESC_PF_STD
-device		xdma
-device		altera_softdma
-device		altera_msgdma
-
-#
-# USB support
-#
-#options	USB_DEBUG
-#options	USB_REQ_DEBUG
-#options	USB_VERBOSE
-device		usb
-device		saf1761otg
-
diff --git a/sys/mips/conf/BERI_DE4_MDROOT b/sys/mips/conf/BERI_DE4_MDROOT
deleted file mode 100644
index e088719038c4..000000000000
--- a/sys/mips/conf/BERI_DE4_MDROOT
+++ /dev/null
@@ -1,21 +0,0 @@
-#
-# BERI_DE4_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC # Implementation) FPGA soft core, as configured in its Terasic DE-4
-# reference configuration.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "BERI_DE4_BASE"
-
-ident		BERI_DE4_MDROOT
-
-#
-# This kernel configuration uses an embedded 8MB memory root file system.
-# Adjust the following path based on local requirements.
-#
-options 	MD_ROOT			# MD is a potential root device
-options 	MD_ROOT_SIZE=26112	# 25.5MB
-options 	ROOTDEVNAME=\"ufs:md0\"
diff --git a/sys/mips/conf/BERI_DE4_SDROOT b/sys/mips/conf/BERI_DE4_SDROOT
deleted file mode 100644
index 72386f136243..000000000000
--- a/sys/mips/conf/BERI_DE4_SDROOT
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# BERI_DE4_SDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured in its Terasic DE-4
-# reference configuration.
-#
-# $FreeBSD$
-#
-
-include "BERI_DE4_BASE"
-
-ident		BERI_DE4_SDROOT
-
-#
-# This kernel expects to find its root filesystem on the SD Card.
-#
-options 	ROOTDEVNAME=\"ufs:/dev/altera_sdcard0\"
diff --git a/sys/mips/conf/BERI_NETFPGA_MDROOT b/sys/mips/conf/BERI_NETFPGA_MDROOT
deleted file mode 100644
index 5014c28dca2e..000000000000
--- a/sys/mips/conf/BERI_NETFPGA_MDROOT
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# BERI_NETFPGA_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured in its NetFPGA reference
-# configuration.
-#
-# $FreeBSD$
-#
-
-include "std.BERI"
-
-ident		BERI_NETFPGA_MDROOT
-
-options 	HZ=100
-
-options 	FDT
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=beri-netfpga.dts
-
-#device		uart
-device		altera_jtag_uart
-
-device		bpf
-
-options 	DEVICE_POLLING
-device		netfpga10g_nf10bmac
-options 	NF10BMAC_64BIT
-
-#
-# This kernel configuration uses an embedded memory root file system.
-# Adjust the following path and size based on local requirements.
-#
-options 	MD_ROOT			# MD is a potential root device
-options 	MD_ROOT_SIZE=26112	# 25.5MB
-options 	ROOTDEVNAME=\"ufs:md0\"
-#makeoptions	MFS_IMAGE=/foo/baz/baz/mdroot.img
-
-# end
diff --git a/sys/mips/conf/BERI_SIM_BASE b/sys/mips/conf/BERI_SIM_BASE
deleted file mode 100644
index f80118dcab48..000000000000
--- a/sys/mips/conf/BERI_SIM_BASE
+++ /dev/null
@@ -1,21 +0,0 @@
-#
-# BERI_SIM_BASE -- Base kernel for the SRI/Cambridge "BERI" (Bluespec
-# Extensible RISC Implementation) FPGA soft core, as configured for
-# simulation.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "std.BERI"
-
-options 	FDT
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=beri-sim.dts
-
-options 	ALTERA_SDCARD_FAST_SIM
-
-device		altera_avgen
-device		altera_jtag_uart
-device		altera_sdcard
diff --git a/sys/mips/conf/BERI_SIM_MDROOT b/sys/mips/conf/BERI_SIM_MDROOT
deleted file mode 100644
index 032d6605634e..000000000000
--- a/sys/mips/conf/BERI_SIM_MDROOT
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# BERI_SIM_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured for simulation.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "BERI_SIM_BASE"
-
-ident		BERI_SIM_MDROOT
-
-#
-# This kernel configuration uses an embedded memory root file system.
-# Adjust the following path based on local requirements.
-#
-options 	MD_ROOT			# MD is a potential root device
-options 	MD_ROOT_SIZE=26112	# 25.5MB
-options 	ROOTDEVNAME=\"ufs:md0\"
diff --git a/sys/mips/conf/BERI_SIM_SDROOT b/sys/mips/conf/BERI_SIM_SDROOT
deleted file mode 100644
index b3f1689671ee..000000000000
--- a/sys/mips/conf/BERI_SIM_SDROOT
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# BERI_SIM_SDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured for simulation.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "BERI_SIM_BASE"
-
-ident		BERI_SIM_SDROOT
-
-#
-# This kernel expects to find its root filesystem on the SD Card.
-#
-options 	ROOTDEVNAME=\"ufs:/dev/altera_sdcard0\"
diff --git a/sys/mips/conf/BERI_SIM_VIRTIO b/sys/mips/conf/BERI_SIM_VIRTIO
deleted file mode 100644
index 34eaae2b03f5..000000000000
--- a/sys/mips/conf/BERI_SIM_VIRTIO
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# BERI_SIM_VIRTIO -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured for simulation.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include "BERI_SIM_BASE"
-
-ident		BERI_SIM_VIRTIO
-
-device		virtio
-device		virtio_blk
-device		virtio_mmio
-device		altera_pio
-
-#
-# This kernel expects to find its root filesystem on the SD Card.
-#
-options 	ROOTDEVNAME=\"ufs:/dev/vtbd0\"
diff --git a/sys/mips/conf/BERI_SOCKIT b/sys/mips/conf/BERI_SOCKIT
deleted file mode 100644
index c21d0dc7ac87..000000000000
--- a/sys/mips/conf/BERI_SOCKIT
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# BERI_SOCKIT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
-# RISC Implementation) FPGA soft core, as configured in its Terasic SoCKit
-# reference configuration.  This kernel configration must be further
-# specialized to include a root filesystem specification.
-#
-# $FreeBSD$
-#
-
-include "std.BERI"
-
-ident		BERI_SOCKIT
-
-options 	ROOTDEVNAME=\"ufs:vtbd0\"
-
-device		altera_pio
-device		altera_jtag_uart
-
-device		virtio
-device		virtio_blk
-device		vtnet
-device		virtio_mmio
-
-options 	FDT
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=beripad-sockit.dts
diff --git a/sys/mips/conf/BERI_TPAD.hints b/sys/mips/conf/BERI_TPAD.hints
deleted file mode 100644
index a890c8414931..000000000000
--- a/sys/mips/conf/BERI_TPAD.hints
+++ /dev/null
@@ -1,51 +0,0 @@
-# $FreeBSD$
-
-#
-# Altera JTAG UARTs configured for console, debugging, and data putput on the
-# Terasic tPad.
-#
-hint.altera_jtag_uart.0.at="nexus0"
-hint.altera_jtag_uart.0.maddr=0x7f000000
-hint.altera_jtag_uart.0.msize=0x40
-hint.altera_jtag_uart.0.irq=0
-
-hint.altera_jtag_uart.1.at="nexus0"
-hint.altera_jtag_uart.1.maddr=0x7f001000
-hint.altera_jtag_uart.1.msize=0x40
-
-hint.altera_jtag_uart.2.at="nexus0"
-hint.altera_jtag_uart.2.maddr=0x7f002000
-hint.altera_jtag_uart.2.msize=0x40
-
-#
-# Expose the tPad touchscreen device via an Avalon "generic" device.  Observe
-# that this is a portion of DRAM, so some care may be required in how memory
-# is exposed to FreeBSD to avoid use of that DRAM for both the touch screen
-# and FreeBSD use.
-#
-# Two separate devices are used here because alignment/width requirements for
-# I/O differ: the frame buffer accepts 16-bit I/O, and the touch input device
-# requires 32-bit I/O.
-#
-hint.altera_avgen.0.at="nexus0"
-hint.altera_avgen.0.maddr=0x04000000
-hint.altera_avgen.0.msize=0x01000000
-hint.altera_avgen.0.width=2
-hint.altera_avgen.0.fileio="rw"
-hint.altera_avgen.0.mmapio="rw"
-hint.altera_avgen.0.devname="display"
-
-hint.altera_avgen.1.at="nexus0"
-hint.altera_avgen.1.maddr=0x05000000
-hint.altera_avgen.1.msize=0x00000020
-hint.altera_avgen.1.width=4
-hint.altera_avgen.1.fileio="rw"
-hint.altera_avgen.1.mmapio="rw"
-hint.altera_avgen.1.devname="touch"
-
-#
-# On-board DE4 and tPad SD Card IP core
-#
-hint.altera_sdcardc.0.at="nexus0"
-hint.altera_sdcardc.0.maddr=0x7f008000
-hint.altera_sdcardc.0.msize=0x400
diff --git a/sys/mips/conf/CANNA b/sys/mips/conf/CANNA
deleted file mode 100644
index 524fd8ec5878..000000000000
--- a/sys/mips/conf/CANNA
+++ /dev/null
@@ -1,33 +0,0 @@
-# CANNA -- Kernel config for Ingenic CANNA board
-#
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"X1000"
-ident		CANNA
-
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=ingenic/canna.dts
-
-#options 	KTR
-#options 	KTR_CPUMASK=0x3
-#options 	KTR_MASK=(KTR_GEN)
-#options 	KTR_COMPILE=(KTR_GEN)
-#options 	KTR_VERBOSE
-
-# Uncomment for NFS root
-#options 	BOOTP
-#options 	BOOTP_NFSROOT
-#options 	BOOTP_NFSV3
-#options 	BOOTP_WIRED_TO=dme0
-#options 	BOOTP_COMPAT
-options 	ROOTDEVNAME=\"ufs:mmcsd0s3\"
-
-makeoptions	TRAMPLOADADDR=0x88000000
-
-device		sound
-device		xdma
-
-#options 	VERBOSE_SYSINIT
-options 	PRINTF_BUFR_SIZE=256
diff --git a/sys/mips/conf/CARAMBOLA2 b/sys/mips/conf/CARAMBOLA2
deleted file mode 100644
index 76916f19d67c..000000000000
--- a/sys/mips/conf/CARAMBOLA2
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# Carambola 2 - an AR933x based SoC wifi device.
-#
-# http://shop.8devices.com/wifi4things/carambola2
-#
-# * AR9330 SoC
-# * 64MB RAM
-# * 16MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include         "std.AR933X"
-
-ident           CARAMBOLA2
-
-# Override hints with board values
-hints           "CARAMBOLA2.hints"
-
-# Board memory - 64MB
-options         AR71XX_REALMEM=(64*1024*1024)
-
-options	EARLY_PRINTF
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options		ARGE_DEBUG
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/CARAMBOLA2.hints b/sys/mips/conf/CARAMBOLA2.hints
deleted file mode 100644
index f1bb912c7816..000000000000
--- a/sys/mips/conf/CARAMBOLA2.hints
+++ /dev/null
@@ -1,107 +0,0 @@
-#
-# This file adds to the values in AR91XX_BASE.hints.
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1fff0006
-
-
-# ART calibration data mapping
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# The AP121 16MB flash layout:
-#
-# [    0.700000] 0x000000000000-0x000000040000 : "u-boot"
-# [    0.710000] 0x000000040000-0x000000050000 : "u-boot-env"
-# [    0.710000] 0x000000050000-0x000000250000 : "kernel"
-# [    0.720000] 0x000000250000-0x000000fe0000 : "rootfs"
-# [    0.720000] mtd: partition "rootfs" set to be root filesystem
-# [    0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000 
-# [    0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data"
-# [    0.740000] 0x000000fe0000-0x000000ff0000 : "nvram"
-# [    0.750000] 0x000000ff0000-0x000001000000 : "art"
-# [    0.750000] 0x000000050000-0x000000fe0000 : "firmware"
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=0
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.3.end=0x00fe0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00fe0000
-hint.map.4.end=0x00ff0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00ff0000
-hint.map.5.end=0x01000000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x00fc1803
diff --git a/sys/mips/conf/CI20 b/sys/mips/conf/CI20
deleted file mode 100644
index f99daf57cacf..000000000000
--- a/sys/mips/conf/CI20
+++ /dev/null
@@ -1,36 +0,0 @@
-# CI20 -- Kernel config for Creator CI20 board
-#
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-# Note: SMP on 32-bit mips is no longer supported, which affects this config file.
-
-include		"JZ4780"
-ident		CI20
-
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=ingenic/ci20.dts
-
-#options 	KTR
-#options 	KTR_CPUMASK=0x3
-#options 	KTR_MASK=(KTR_GEN)
-#options 	KTR_COMPILE=(KTR_GEN)
-#options 	KTR_VERBOSE
-
-# Uncomment for NFS root
-#options 	BOOTP
-#options 	BOOTP_NFSROOT
-#options 	BOOTP_NFSV3
-#options 	BOOTP_WIRED_TO=dme0
-#options 	BOOTP_COMPAT
-
-options 	ROOTDEVNAME=\"ufs:mmcsd0\"
-
-device		sound
-device		xdma
-
-makeoptions	TRAMPLOADADDR=0x88000000
-
-#options 	VERBOSE_SYSINIT
-options 	PRINTF_BUFR_SIZE=256
diff --git a/sys/mips/conf/DB120 b/sys/mips/conf/DB120
deleted file mode 100644
index 487bf396ede5..000000000000
--- a/sys/mips/conf/DB120
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# DB120 - the AR9344 SoC reference design
-#
-# $FreeBSD$
-#
-
-# Include the default AR934x parameters
-include         "std.AR934X"
-
-#NO_UNIVERSE
-
-ident           DB120
-
-# Override hints with board values
-hints           "DB120.hints"
-
-# Force the board memory - the base DB120 has 128MB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# yes, this board has a PCI connected atheros device
-options 	AR71XX_ATH_EEPROM
-device		firmware		# Used by the above
-options 	ATH_EEPROM_FIRMWARE
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/DB120.hints b/sys/mips/conf/DB120.hints
deleted file mode 100644
index 228a8ed85abd..000000000000
--- a/sys/mips/conf/DB120.hints
+++ /dev/null
@@ -1,162 +0,0 @@
-# $FreeBSD$
-
-# This is a placeholder until the hardware support is complete.
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# DB120 GMAC configuration
-# + AR934X_ETH_CFG_RGMII_GMAC0              (1 << 0)
-# + AR934X_ETH_CFG_SW_ONLY_MODE             (1 << 6)
-hint.ar934x_gmac.0.gmac_cfg=0x41
-
-# GMAC0 here - connected to an AR8327
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=1
-hint.arswitch.0.is_gmii=0
-
-# Other AR8327 configuration parameters
-
-# AR8327_PAD_MAC_RGMII
-hint.arswitch.0.pad.0.mode=6
-hint.arswitch.0.pad.0.txclk_delay_en=1
-hint.arswitch.0.pad.0.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.0.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.0.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0x00000000
-hint.arswitch.0.led.ctrl1=0xc737c737
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x00c30c00
-hint.arswitch.0.led.open_drain=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# XXX OpenWRT DB120 BSP doesn't have media/duplex set?
-hint.arge.0.phymask=0x0
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.pll_1000=0x06000000
-
-# MAC for arge0 is the first 6 bytes of the ART
-hint.arge.0.eeprommac=0x1f7f0000
-
-# mdiobus1 on arge1
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# Embedded switch on the AR9344
-# mdio1 is actually created as the AR8327 internal bus; so
-# this pops up as mdio2.
-hint.arswitch.1.at="mdio2"
-hint.arswitch.1.is_7240=0
-hint.arswitch.1.is_9340=1
-hint.arswitch.1.numphys=5
-hint.arswitch.1.phy4cpu=0       # phy 4 is not a "CPU port" PHY here
-hint.arswitch.1.is_rgmii=0
-hint.arswitch.1.is_gmii=1       # arge1 <-> switch PHY is GMII
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0		# Nothing attached here (XXX?)
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=1		# GMII
-
-# MAC for arge1 is the second 6 bytes of the ART
-hint.arge.1.eeprommac=0x1f7f0006
-
-# ART calibration data mapping - for the AR934x AHB device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# ath1: it's different; it's a PCIe attached device, so
-# we instead need to teach the PCIe bridge code about it
-# (ie, the 'early pci fixup' stuff that programs the PCIe
-# host registers on the NIC) and then we teach ath where
-# to find it.
-
-# ath1 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
-
-# ath0 - eeprom comes from here
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# flash layout:
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)
-
-# 256KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000	# 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# 64KiB u-boot-env
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000	# 64k u-boot-env
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-# 6336KiB rootfs + 1344KiB uImage; turn into a single long
-# combo image for FreeBSD.
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=0
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.3.end=0x007d0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-# 64KiB cfg
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007d0000
-hint.map.4.end=0x007e0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# 64KiB mib0
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007e0000
-hint.map.5.end=0x007f0000	# 64k mib0
-hint.map.5.name="mib0"
-hint.map.5.readonly=1
-
-# 64KiB ART
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x007f0000
-hint.map.6.end=0x00800000	# 64k ART
-hint.map.6.name="ART"
-hint.map.6.readonly=1
diff --git a/sys/mips/conf/DEFAULTS b/sys/mips/conf/DEFAULTS
deleted file mode 100644
index a64b332ffa43..000000000000
--- a/sys/mips/conf/DEFAULTS
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# DEFAULTS -- Default kernel configuration file for FreeBSD/mips
-#
-# $FreeBSD$
-
-device		mem
-
-device		uart_ns8250
-
-options 	GEOM_PART_BSD
-options 	GEOM_PART_MBR
-
-# Default congestion control algorithm
-options 	CC_NEWRENO		# include newreno congestion control
diff --git a/sys/mips/conf/DIR-655A1 b/sys/mips/conf/DIR-655A1
deleted file mode 100644
index bae498828a4d..000000000000
--- a/sys/mips/conf/DIR-655A1
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# DIR-655A1 - 3x3 2GHz D-Link AP
-#
-# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi,
-# 128MiB RAM, an AR8327 5-port gigabit ethernet switch.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default QCA955x parameters
-include         "std.QCA955X"
-
-ident           DIR-655A1
-
-# Override hints with board values
-hints           "DIR-655A1.hints"
-
-# Force the board memory - the base AP135 has 128MB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-options 	AR71XX_ATH_EEPROM
-device		firmware		# Used by the above
-options 	ATH_EEPROM_FIRMWARE
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# Default to accept
-options		IPFIREWALL_DEFAULT_TO_ACCEPT
diff --git a/sys/mips/conf/DIR-655A1.hints b/sys/mips/conf/DIR-655A1.hints
deleted file mode 100644
index 3946fd184445..000000000000
--- a/sys/mips/conf/DIR-655A1.hints
+++ /dev/null
@@ -1,179 +0,0 @@
-
-# I'm assuming this is an AP135-020. The AP136-010 in openwrt has
-# the ethernet ports wired up to the switch in the reverse way.
-
-# $FreeBSD$
-
-# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
-hint.qca955x_gmac.0.gmac_cfg=0x1
-
-# Use this to derive ath0 from arge0 MAC address.
-# 0x1ffe0004 is the arge0 MAC; but it's also the "unit MAC".
-# So make that the ath0 MAC, and make arge0 -1 from that.
-# ath0: offset 0
-# arge0: offset -1
-# arge1: use +1 from the arge0 MAC, even though
-# there's a secondary MAC address configured in EEPROM
-# at 0x1ffe0018.
-hint.ar71xx.0.eeprom_mac_addr=0x1ffe0004
-hint.ar71xx.0.eeprom_mac_isascii=1
-
-hint.ar71xx_mac_map.0.devid=ath
-hint.ar71xx_mac_map.0.unitid=0
-hint.ar71xx_mac_map.0.offset=0
-hint.ar71xx_mac_map.0.is_local=0
-
-hint.ar71xx_mac_map.1.devid=arge
-hint.ar71xx_mac_map.1.unitid=0
-hint.ar71xx_mac_map.1.offset=-1
-hint.ar71xx_mac_map.1.is_local=0
-
-hint.ar71xx_mac_map.2.devid=arge
-hint.ar71xx_mac_map.2.unitid=1
-hint.ar71xx_mac_map.2.offset=1
-hint.ar71xx_mac_map.2.is_local=0
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# mdiobus1 on arge1 - required to bring up arge1?
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# AR8327 - connected via mdiobus0 on arge0
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0	# definitely not the internal switch!
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5	# all ports are PHYs
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=0	# not needed
-hint.arswitch.0.is_gmii=0	# not needed
-
-# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
-# The current code only supports one CPU port.  So hm, what should
-# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?
-
-# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
-# That's currently supposed to be hooked up to CPU port 0.
-
-# Other AR8327 configuration parameters
-
-# AP136-020 parameters
-
-# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII
-
-# AR8327_PAD_MAC_SGMII
-hint.arswitch.0.pad.0.mode=3
-#hint.arswitch.0.pad.0.rxclk_delay_sel=0
-hint.arswitch.0.pad.0.sgmii_delay_en=1
-
-# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII
-
-# AR8327_PAD_MAC_RGMII
-# XXX I think this hooks it up to the internal MAC6
-hint.arswitch.0.pad.6.mode=6
-hint.arswitch.0.pad.6.txclk_delay_en=1
-hint.arswitch.0.pad.6.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.6.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.6.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0x00000000
-hint.arswitch.0.led.ctrl1=0xc737c737
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x00c30c00
-hint.arswitch.0.led.open_drain=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.6.force_link=1
-hint.arswitch.0.port.6.speed=1000
-hint.arswitch.0.port.6.duplex=1
-hint.arswitch.0.port.6.txpause=1
-hint.arswitch.0.port.6.rxpause=1
-
-# arge0 - hooked up to AR8327 GMAC6, RGMII
-# set at 1000/full to the switch.
-# so, lock both sides of this connect up to 1000/full;
-# if_arge thus wont change the PLL configuration
-# upon a link status change.
-hint.arge.0.phymask=0x0
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.pll_1000=0x56000000
-# hint.arge.0.eeprommac=0x1ffe0004
-# hint.arge.0.readascii=1
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=5		# SGMII
-hint.arge.1.pll_1000=0x03000101
-#hint.arge.1.eeprommac=0x1ffe0018
-#hint.arge.1.readascii=1
-
-# ath0: Where the ART is - last 64k in the flash
-# Note: ath0 MAC is default (00:11:22:33:44:55) and thus
-# requires replacing via the board MAC address map.
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# 256KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000	# 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# kernel
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end="search:0x00040000:0x10000:.!/bin/sh"
-hint.map.1.name="kernel"
-hint.map.1.readonly=1
-
-# rootfs
-hint.map.2.at="flash/spi0"
-hint.map.2.start="search:0x00040000:0x10000:.!/bin/sh"
-hint.map.2.end=0x007d0000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-# 64KiB cfg
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x007d0000
-hint.map.3.end=0x007e0000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-# 8256 KiB mib0
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007e0000
-hint.map.4.end=0x00ff0000	# 64k mib0
-hint.map.4.name="mib0"
-hint.map.4.readonly=1
-
-# 64KiB ART
-# XXX TODO: is this really here?
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00ff0000
-hint.map.5.end=0x01000000	# 64k ART
-hint.map.5.name="ART"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/DIR-825B1 b/sys/mips/conf/DIR-825B1
deleted file mode 100644
index 8b43cf1b22ca..000000000000
--- a/sys/mips/conf/DIR-825B1
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# Specific board setup for the D-Link DIR-825B1 router.
-#
-# The DIR-825B1 has the following hardware:
-#
-# + AR7161 CPU SoC
-# + AR9223 2.4GHz 11n
-# + AR9220 5GHz 11n
-# + RealTek RTL8366S Gigabit switch
-# + m25p64 based 8MB flash
-# + 64MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"DIR-825B1"
-hints		"DIR-825B1.hints"
-
-# Since the kernel image must fit inside 1024KiB, we have to build almost
-# everything as modules.
-nodevice gpio
-nodevice gpioled
-nodevice gif
-nodevice gre
-nodevice if_bridge
-nodevice usb
-nodevice ehci
-nodevice wlan
-nodevice wlan_xauth
-nodevice wlan_acl
-nodevice wlan_wep
-nodevice wlan_tkip
-nodevice wlan_ccmp
-nodevice wlan_rssadapt
-nodevice wlan_amrr
-nodevice ath
-nodevice ath_pci
-nodevice ath_hal
-nodevice umass
-nodevice ath_rate_sample
-
-nooptions	INET6
-
-# GEOM modules
-device		geom_map	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-options 	GEOM_PART_GPT
-
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-options 	AR71XX_REALMEM=64*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# options 	MSDOSFS			# Read MSDOS filesystems; useful for USB/CF
-
-# options 	MD_ROOT
-# options 	MD_ROOT_SIZE="6144"
-
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
diff --git a/sys/mips/conf/DIR-825B1.hints b/sys/mips/conf/DIR-825B1.hints
deleted file mode 100644
index c380f49dba3b..000000000000
--- a/sys/mips/conf/DIR-825B1.hints
+++ /dev/null
@@ -1,140 +0,0 @@
-# $FreeBSD$
-
-# arge0 is connected to the LAN side of the switch PHY.
-# arge1 is connected to the single port WAN side of the switch PHY.
-
-hint.arge.0.phymask=0x0
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.eeprommac=0x1f66ffa0
-hint.arge.0.readascii=1
-
-hint.arge.1.phymask=0x0
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1f66ffb4
-hint.arge.1.readascii=1
-
-# ath0 - slot 17
-hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f661000
-hint.pcib.0.bus.0.17.0.ath_fixup_size=4096
-
-# ath1 - slot 18
-hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f665000
-hint.pcib.0.bus.0.18.0.ath_fixup_size=4096
-
-# .. and now, telling each ath(4) NIC where to find the firmware
-# image.
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware"
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware"
-
-# Geom MAP
-
-# The DIR-825B1 has an 8MB flash part - HOWEVER, the 64k caldata isn't
-# at the end of the flash. It's ~ 6MB into the flash image.
-
-# mtdparts=ar7100-nor0:256k(uboot),64k(Config),1024k(vmlinux),5184k(rootfs),
-#          64k(caldata)
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-# This config partition is the D-Link specific configuration area.
-# I'm re-purposing it for FreeBSD.
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="cfg"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x0050000
-hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh"
-hint.map.3.end=0x00660000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00660000
-hint.map.4.end=0x00670000
-hint.map.4.name="art"
-hint.map.4.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x000009ff
-
-# Pin 1  - USB (LED blue)     --> works
-# Pin 2  - Power (LED orange) --> works
-# Pin 3  - Power (LED blue)   --> works
-# Pin 4  - Button (RESET)     --> works
-# Pin 5  - WPS (LED blue)     --> works
-# Pin 6  - RTL8366RB switch data line
-# Pin 7  - Planet (LED orange)--> works
-# Pin 8  - RTL8366RB switch clock line
-# Pin 9  - Button (WPS)       --> works after set to high
-# Pin 10 - N/C
-# Pin 11 - N/C
-# Pin 12 - Planet (LED blue)  --> works
-
-# LEDs are configured separately and driven by the LED device
-# usb tested good
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="usb-blue"
-hint.gpioled.0.pins=0x0001
-
-# no orange power led?
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="power-orange"
-hint.gpioled.1.pins=0x0002
-
-# blue power tested good
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="power-blue"
-hint.gpioled.2.pins=0x0004
-
-# wps tested good
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="wps-blue"
-hint.gpioled.3.pins=0x0010
-
-# orage globe tested good
-hint.gpioled.4.at="gpiobus0"
-hint.gpioled.4.name="planet-orange"
-hint.gpioled.4.pins=0x0040
-
-# no blue planet LED on this unit
-hint.gpioled.5.at="gpiobus0"
-hint.gpioled.5.name="planet-blue"
-hint.gpioled.5.pins=0x0800
-
-# GPIO I2C bus
-hint.gpioiic.0.at="gpiobus0"
-hint.gpioiic.0.pins=0x00a0
-hint.gpioiic.0.sda=0
-hint.gpioiic.0.scl=1
-
-# I2C bus
-# Don't be strict about I2C protocol - the relaxed semantics are required
-# by the realtek switch PHY.
-hint.iicbus.0.strict=0
-
-# Bit bang bus - override default delay
-#hint.iicbb.0.udelay=3
-
diff --git a/sys/mips/conf/DIR-825C1 b/sys/mips/conf/DIR-825C1
deleted file mode 100644
index d06cf4f44ad2..000000000000
--- a/sys/mips/conf/DIR-825C1
+++ /dev/null
@@ -1,57 +0,0 @@
-# $FreeBSD$
-#
-# Specific board setup for the D-Link DIR-825C1 router.
-#
-# The DIR-825C1 has the following hardware:
-#
-# + AR9344 CPU SoC 74k MIPS
-# + ARxxx 2.4GHz 11n
-# + ARXXX 5GHz 11n
-# + AR8327 Gigabit switch
-# + m25p80 based 16MB flash
-# + 128MB RAM
-# + uboot environment
-
-#NO_UNIVERSE
-
-# Include the default AR934x parameters
-include         "std.AR934X"
-ident           DIR825C1
-
-# Override hints with board values
-hints           "DIR-825C1.hints"
-
-# Force the board memory - the base DB120 has 128MB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-options		MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options		AR71XX_ENV_UBOOT
-
-# Used for the static uboot partition map
-device          geom_map
-
-# uzip - to boot natively from flash
-options 	GEOM_UZIP
-options         GEOM_PART_GPT
-device		xz
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options         ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# In order to netboot, you have to build the mfsroot into the kernel
-# 19443712 or 19M is the biggest rootfs via netboot this thing supports
-#options         MD_ROOT         # md device usable as a potential root device
-#options         MD_ROOT_SIZE=19444
-#makeoptions     MFS_IMAGE=/tftpboot/mfsroot-dir825c1.img.ulzma
-#options         ROOTDEVNAME=\"ufs:md0.uzip\"
diff --git a/sys/mips/conf/DIR-825C1.hints b/sys/mips/conf/DIR-825C1.hints
deleted file mode 100644
index ee8df41eec4b..000000000000
--- a/sys/mips/conf/DIR-825C1.hints
+++ /dev/null
@@ -1,157 +0,0 @@
-# $FreeBSD$
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# 0x1ffe0004 is the "unit MAC".
-# 0x1ffe0018 is the second "MAC".
-# Right now this doesn't have any option for more than one
-# "unit MACs", so:
-# ath0: unit MAC
-# ath1: unit MAC + 1
-# arge0: unit MAC + 2
-# arge1: leave as default; not used.
-hint.ar71xx.0.eeprom_mac_addr=0x1ffe0004
-hint.ar71xx.0.eeprom_mac_isascii=1
-
-hint.ar71xx_mac_map.0.devid=ath
-hint.ar71xx_mac_map.0.unitid=0
-hint.ar71xx_mac_map.0.offset=0
-hint.ar71xx_mac_map.0.is_local=0
-
-hint.ar71xx_mac_map.1.devid=ath
-hint.ar71xx_mac_map.1.unitid=1
-hint.ar71xx_mac_map.1.offset=1
-hint.ar71xx_mac_map.1.is_local=0
-
-hint.ar71xx_mac_map.2.devid=arge
-hint.ar71xx_mac_map.2.unitid=0
-hint.ar71xx_mac_map.2.offset=2
-hint.ar71xx_mac_map.2.is_local=0
-
-# DIR-825C1 GMAC configuration
-# + AR934X_ETH_CFG_RGMII_GMAC0              (1 << 0)
-# Onboard AR9344 10/100 switch is not wired up
-hint.ar934x_gmac.0.gmac_cfg=0x1
-
-# GMAC0 here - connected to an AR8327
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=1
-hint.arswitch.0.is_gmii=0
-
-# Other AR8327 configuration parameters
-
-# AR8327_PAD_MAC_RGMII
-hint.arswitch.0.pad.0.mode=6
-hint.arswitch.0.pad.0.txclk_delay_en=1
-hint.arswitch.0.pad.0.rxclk_delay_en=1
-
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.0.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.0.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0x00000000
-hint.arswitch.0.led.ctrl1=0xc737c737
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x00c30c00
-hint.arswitch.0.led.open_drain=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# XXX OpenWRT DB120 BSP doesn't have media/duplex set?
-hint.arge.0.phymask=0x0
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.pll_1000=0x06000000
-
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# ath1: it's different; it's a PCIe attached device, so
-# we instead need to teach the PCIe bridge code about it
-# (ie, the 'early pci fixup' stuff that programs the PCIe
-# host registers on the NIC) and then we teach ath where
-# to find it.
-
-# ath1 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
-
-# ath0 - eeprom comes from here
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# flash layout:
-# m25p80 spi0.0: mx25l12805d (16384 Kbytes)
-# 
-# uBoot firmware variables:
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init
-# mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)
-
-# 64KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00010000
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# 64KiB u-boot-env
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00010000
-hint.map.1.end=0x00020000
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-# 1344KiB kernel 
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00020000
-hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-# 14592KiB rootfs
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.3.end=0x00fb0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=1
-
-# 192KiB lang -- remapped to cfg
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00fb0000
-hint.map.4.end=0x00fe0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# 64KiB mac
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00fe0000
-hint.map.5.end=0x00ff0000
-hint.map.5.name="mac"
-hint.map.5.readonly=1
-
-# 64KiB art
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x00ff0000
-hint.map.6.end=0x01000000
-hint.map.6.name="art"
-hint.map.6.readonly=1
diff --git a/sys/mips/conf/ENH200 b/sys/mips/conf/ENH200
deleted file mode 100644
index 3e5dabd1e316..000000000000
--- a/sys/mips/conf/ENH200
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# Specific board setup for the Engenius ENH-200 802.11bgn mesh node.
-#
-# The Engenius ENH-200 has the following hardware:
-#
-# + AR7240 CPU SoC
-# + AR9285 Wifi
-# + Integrated switch
-# + 8MB flash
-# + 32MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"ENH200"
-hints		"ENH200.hints"
-
-options 	AR71XX_REALMEM=32*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# For DOS - enable if required
-options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
diff --git a/sys/mips/conf/ENH200.hints b/sys/mips/conf/ENH200.hints
deleted file mode 100644
index 347c04edb4eb..000000000000
--- a/sys/mips/conf/ENH200.hints
+++ /dev/null
@@ -1,124 +0,0 @@
-# $FreeBSD$
-
-# arge0 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# arge1 MDIO bus doesn't exist on the AR7240
-
-# arge0: MII; dedicated PHY 4 on switch, connected via internal switch
-# MDIO bus.
-
-# hint.arge.0.eeprommac=0x83fe9ff0
-hint.arge.0.phymask=0x10	# PHY 4
-# hint.arge.0.miimode=2		# MII
-hint.arge.0.mdio=mdioproxy1	# Hanging off the arswitch MDIO bus
-
-# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII.
-hint.arge.1.phymask=0x0
-# hint.arge.1.miimode=1		# GMII
-hint.arge.1.media=1000		# Force to 1000BaseTX/full
-hint.arge.1.fduplex=1
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1	# We need to be explicitly told this
-hint.arswitch.0.numphys=4	# 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1	# Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=0	# No, not RGMII
-hint.arswitch.0.is_gmii=0	# No, not GMII
-
-# ath0 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# ath0 - eeprom comes from here
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001	# pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002	# pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800	# pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080	# pin 7
-
-# nvram mapping - XXX ?
-#hint.nvram.0.base=0x1f030000
-#hint.nvram.0.maxsize=0x2000
-#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-#hint.nvram.1.base=0x1f032000
-#hint.nvram.1.maxsize=0x4000
-#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# GEOM_MAP
-#
-# The default bootargs:
-#
-# bootargs=console=ttyS0,115200 root=31:04 rootfstype=squashfs init=/etc/preinit mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),320k(custom),1024k(kernel),4928k(rootfs),1536k(failsafe),64k(ART) board=ENH200
-#
-# However there's not a lot of space in this image layout.
-#
-# Thus, an alternate layout will be used, complete with reconfiguring
-# uboot to use the new base address.
-#
-# 256k - uboot (0x000000 -> 0x040000)
-# 64k - uboot-env (0x040000 -> 0x050000)
-# 1728k - kernel (0x050000 -> 0x200000)
-# 6016k - rootfs (0x200000 -> 0x7e0000)
-# 64k - config (0x7e0000 -> 0x7f0000)
-# 64k - ART (0x7f0000 -> 0x800000)
-#
-# For this, the 'bootcmd' environment variable needs to be
-# changed to point to the new location:
-#
-# ar7240> setenv bootcmd 'bootm 0x9f050000'
-
-# uboot (256k)
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-# uboot-env (64k)
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-# kernel (1728k)
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00200000
-hint.map.2.name="kernel"
-
-# rootfs (6016k)
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00200000
-hint.map.3.end=0x007e0000
-hint.map.3.name="rootfs"
-
-# config (64k)
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007e0000
-hint.map.4.end=0x007f0000
-hint.map.4.name="cfg"
-
-# ART (64k)
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000
-hint.map.5.name="ART"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/ERL b/sys/mips/conf/ERL
deleted file mode 100644
index ae18cddd84ba..000000000000
--- a/sys/mips/conf/ERL
+++ /dev/null
@@ -1,218 +0,0 @@
-#
-# ERL - EdgeRouter Lite kernel config
-# Based on configuration from http://rtfm.net/FreeBSD/ERL
-#
-# For more information on this file, please read the config(5) manual page,
-# and/or the handbook section on Kernel Configuration Files:
-#
-#    https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files.
-# If you are in doubt as to the purpose or necessity of a line, check first
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		ERL
-
-makeoptions	ARCH_FLAGS="-march=octeon+"
-makeoptions	LDSCRIPT_NAME=ldscript.mips.octeon1
-
-makeoptions	KERNLOADADDR=0xffffffff80100000
-
-# We don't need to build a trampolined version of the kernel.
-makeoptions	WITHOUT_KERNEL_TRAMPOLINE=1
-
-include		"../cavium/std.octeon1"
-
-hints		"OCTEON1.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-# Board-specific support that cannot be auto-detected at runtime.
-#options 	OCTEON_VENDOR_LANNER		# Support for Lanner boards.
-#options 	OCTEON_VENDOR_RADISYS		# Support for Radisys boards.
-options 	OCTEON_VENDOR_UBIQUITI		# Support for Ubiquiti boards.
-#options 	OCTEON_VENDOR_GEFES		# Support for GE LANIC boards
-#options 	OCTEON_BOARD_CAPK_0100ND	# Support for CAPK-0100nd.
-
-# Compile for a specified Octeon model.  If not specified, support for
-# detection at runtime will be used instead, which may give inferior
-# performance.
-#
-# See sys/contrib/octeon-sdk/octeon-model.h for possible values.
-options 	OCTEON_MODEL=OCTEON_CN50XX_PASS1
-
-options 	SCHED_ULE		# ULE scheduler
-options 	PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	IPSEC			# IP (v4/v6) security
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	SCTP_SUPPORT		# Allow kldload of SCTP
-options 	FFS			# Berkeley Fast Filesystem
-options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	UFS_GJOURNAL		# Enable gjournal-based UFS journaling
-options 	MD_ROOT			# MD is a potential root device
-options 	NFSCL			# Network Filesystem Client
-options 	NFSD			# Network Filesystem Server
-options 	NFSLOCKD		# Network Lock Manager
-options 	NFS_ROOT		# NFS usable as /, requires NFSCL
-options 	MSDOSFS			# MSDOS Filesystem
-options 	CD9660			# ISO 9660 Filesystem
-options 	PROCFS			# Process filesystem (requires PSEUDOFS)
-options 	PSEUDOFS		# Pseudo-filesystem framework
-options 	GEOM_PART_GPT		# GUID Partition Tables.
-options 	GEOM_LABEL		# Provides labelization
-options 	COMPAT_FREEBSD32	# Compatible with o32 binaries
-options 	COMPAT_FREEBSD10	# Compatible with FreeBSD10
-options 	COMPAT_FREEBSD11	# Compatible with FreeBSD11
-options 	COMPAT_FREEBSD12	# Compatible with FreeBSD12
-options 	SCSI_DELAY=5000		# Delay (in ms) before probing SCSI
-options 	KTRACE			# ktrace(1) support
-options 	STACK			# stack(9) support
-options 	SYSVSHM			# SYSV-style shared memory
-options 	SYSVMSG			# SYSV-style message queues
-options 	SYSVSEM			# SYSV-style semaphores
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	PRINTF_BUFR_SIZE=128	# Prevent printf output being interspersed.
-options 	HWPMC_HOOKS		# Necessary kernel hooks for hwpmc(4)
-options 	AUDIT			# Security event auditing
-options 	MAC			# TrustedBSD MAC Framework
-options 	KDTRACE_FRAME		# Ensure frames are compiled in
-options 	KDTRACE_HOOKS		# Kernel DTrace hooks
-options 	DDB_CTF			# Kernel ELF linker loads CTF data
-options 	INCLUDE_CONFIG_FILE	# Include this file in kernel
-options 	TMPFS			# Temporary file system
-options 	CAPABILITY_MODE		# Capsicum capability mode
-options 	CAPABILITIES		# Capsicum capabilities
-
-# Debugging for use in -current
-#options 	KDB			# Enable kernel debugger support.
-options 	DDB			# Support DDB.
-#options 	GDB			# Support remote GDB.
-#options 	DEADLKRES		# Enable the deadlock resolver
-#options 	INVARIANTS		# Enable calls of extra sanity checking
-#options 	INVARIANT_SUPPORT	# Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			# Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	# Don't run witness on spinlocks for speed
-#options 	MALLOC_DEBUG_MAXZONES=8	# Separate malloc(9) zones
-
-# Make an SMP-capable kernel by default
-options 	SMP			# Symmetric MultiProcessor Kernel
-
-options 	ROOTDEVNAME=\"ufs:da0s2a\"	# Default root filesystem.
-
-# ATA/SCSI peripherals
-device		scbus		# SCSI bus (required for ATA/SCSI)
-device		ch		# SCSI media changers
-device		da		# Direct Access (disks)
-device		sa		# Sequential Access (tape etc)
-device		cd		# CD
-device		pass		# Passthrough device (direct ATA/SCSI access)
-device		ses		# Enclosure Services (SES and SAF-TE)
-
-# Serial (COM) ports
-device		uart		# Generic UART driver
-
-# On-board Cavium Octeon Ethernet.
-# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
-device		octe
-
-# Cavium Octeon management Ethernet.
-device		octm
-
-# Switch PHY support for the octe driver.  These currently present a VLAN per
-# physical port, but may eventually provide support for DSA or similar instead.
-#device		mv88e61xxphy	# Marvell 88E61XX
-
-# Wireless NIC cards
-device		wlan		# 802.11 support
-options 	IEEE80211_DEBUG	# enable debug msgs
-options 	IEEE80211_SUPPORT_MESH	# enable 802.11s draft support
-device		wlan_wep	# 802.11 WEP support
-device		wlan_ccmp	# 802.11 CCMP support
-device		wlan_tkip	# 802.11 TKIP support
-device		wlan_amrr	# AMRR transmit rate control algorithm
-#device		ath		# Atheros NIC's
-#device		ath_pci		# Atheros pci/cardbus glue
-#device		ath_hal		# pci/cardbus chip support
-#device		ath_rate_sample	# SampleRate tx rate control for ath
-
-# Pseudo devices.
-device		loop		# Network loopback
-device		ether		# Ethernet support
-device		vlan		# 802.1Q VLAN support
-device		tuntap		# Packet tunnel.
-device		md		# Memory "disks"
-device		gif		# IPv6 and IPv4 tunneling
-device		firmware	# firmware assist module
-
-# The `bpf' device enables the Berkeley Packet Filter.
-# Be aware of the administrative consequences of enabling this!
-# Note that 'bpf' is required for DHCP.
-device		bpf		# Berkeley packet filter
-
-# Hardware watchdog support.
-#device		octeon_wdog	# Octeon hardware watchdog
-
-# USB support
-options 	USB_DEBUG	# enable debug msgs
-device		octusb		# Cavium Octeon on-board USB interface (USB 2.0)
-device		uhci		# UHCI PCI->USB interface
-device		ohci		# OHCI PCI->USB interface
-device		ehci		# EHCI PCI->USB interface (USB 2.0)
-device		usb		# USB Bus (required)
-#device		udbp		# USB Double Bulk Pipe devices
-device		uhid		# "Human Interface Devices"
-device		ulpt		# Printer
-device		umass		# Disks/Mass storage - Requires scbus and da
-device		ums		# Mouse
-device		urio		# Diamond Rio 500 MP3 player
-# USB Serial devices
-device		u3g		# USB-based 3G modems (Option, Huawei, Sierra)
-device		uark		# Technologies ARK3116 based serial adapters
-device		ubsa		# Belkin F5U103 and compatible serial adapters
-device		uftdi		# For FTDI usb serial adapters
-device		uipaq		# Some WinCE based devices
-device		uplcom		# Prolific PL-2303 serial adapters
-device		uslcom		# SI Labs CP2101/CP2102 serial adapters
-device		uvisor		# Visor and Palm devices
-device		uvscom		# USB serial support for DDI pocket's PHS
-# USB Ethernet, requires miibus
-device		miibus		# MII bus support
-device		aue		# ADMtek USB Ethernet
-device		axe		# ASIX Electronics USB Ethernet
-device		cdce		# Generic USB over Ethernet
-device		cue		# CATC USB Ethernet
-device		kue		# Kawasaki LSI USB Ethernet
-device		rue		# RealTek RTL8150 USB Ethernet
-device		udav		# Davicom DM9601E USB
-# USB Wireless
-device		rum		# Ralink Technology RT2501USB wireless NICs
-device		uath		# Atheros AR5523 wireless NICs
-device		ural		# Ralink Technology RT2500USB wireless NICs
-device		zyd		# ZyDAS zd1211/zd1211b wireless NICs
-
-# crypto subsystem
-device		crypto		# core crypto support (required for IPSEC)
-device		cryptodev	# /dev/crypto for access to h/w
-device		cryptocteon	# Octeon coprocessor 2 crypto offload
-
-# GPIO support
-#device		gpio
-
-# PMC support
-#device		hwpmc
-
-# HID support
-options 	HID_DEBUG	# enable debug msgs
-device		hid		# Generic HID support
diff --git a/sys/mips/conf/JZ4780 b/sys/mips/conf/JZ4780
deleted file mode 100644
index df15d55b1d82..000000000000
--- a/sys/mips/conf/JZ4780
+++ /dev/null
@@ -1,118 +0,0 @@
-# JZ4780 -- Kernel config for Ingenic JZ47XX boards
-#
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-# Note: SMP on 32-bit mips is no longer supported, which affects this config file.
-
-ident		JZ4780
-machine		mips mipselhf
-cpu		CPU_XBURST
-cpu		CPU_MIPS4KC
-
-makeoptions	KERNLOADADDR=0x80020000
-makeoptions	ARCH_FLAGS="-march=mips32r2"
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-files		"../ingenic/files.jz4780"
-hints		"JZ4780.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	INTRNG			# Borrow interrupt code from ARM
-options 	MIPS_NIRQ=264		# 8 cpuintc + 64 intc + 6 * 23 gpio
-
-options 	DDB
-options 	KDB
-options 	BREAK_TO_DEBUGGER
-
-options 	COMPAT_FREEBSD10
-options 	COMPAT_FREEBSD11
-options 	COMPAT_FREEBSD12
-options 	COMPAT_FREEBSD13
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	NFSLOCKD		#Network Lock Manager
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options 	FFS			#Berkeley Fast Filesystem
-options 	SOFTUPDATES		#Enable FFS soft updates support
-options 	UFS_ACL			#Support for access control lists
-options 	UFS_DIRHASH		#Improve performance on big directories
-#options 	ROOTDEVNAME=\"ufs:ada0\"
-
-options 	GEOM_LABEL		# Provides labelization
-options 	GEOM_PART_GPT		# GUID Partition Tables.
-#options 	GEOM_RAID		# Soft RAID functionality.
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-# Make an SMP-capable kernel by default
-options 	SMP			# Symmetric MultiProcessor Kernel
-
-device		loop
-device		ether
-#device		le
-device		miibus
-device		bpf
-device		md
-device		uart
-
-device		fdt_pinctrl
-
-device		clk
-device		regulator
-options		EXT_RESOURCES
-
-device		gpio
-
-device 		scbus
-device 		da
-
-device		mmc
-device		mmcsd
-
-device		dme
-
-device		iic
-device		iicbus
-
-# Framebuffer console support
-device		vt
-device		kbdmux
-device		hdmi
-device		videomode
-device		pty
-
-# USB support
-options 	USB_DEBUG	# enable debug msgs
-options 	USB_HOST_ALIGN=128 # L2 cache line size
-device		ohci		# OHCI PCI->USB interface
-device		ehci		# EHCI PCI->USB interface (USB 2.0)
-device		dwcotg		# DesignWare HS OTG controller
-device		usb		# USB Bus (required)
-#device		udbp		# USB Double Bulk Pipe devices
-device		uhid		# "Human Interface Devices"
-device		ukbd		# Allow keyboard like HIDs to control console
-#device		ulpt		# Printer
-device		umass		# Disks/Mass storage - Requires scbus and da
-device		ums		# Mouse
-
-# HID support
-options 	HID_DEBUG	# enable debug msgs
-device		hid		# Generic HID support
-
-# FDT support
-options 	FDT
diff --git a/sys/mips/conf/JZ4780.hints b/sys/mips/conf/JZ4780.hints
deleted file mode 100644
index 6986b85032de..000000000000
--- a/sys/mips/conf/JZ4780.hints
+++ /dev/null
@@ -1,2 +0,0 @@
-# $FreeBSD$
-# device.hints
diff --git a/sys/mips/conf/MALTA b/sys/mips/conf/MALTA
deleted file mode 100644
index 2c96f5024e14..000000000000
--- a/sys/mips/conf/MALTA
+++ /dev/null
@@ -1,11 +0,0 @@
-# MALTA -- Kernel config for MALTA endian-big boards
-#
-# $FreeBSD$
- 
-ident		MALTA
-
-include		"std.MALTA"
- 
-machine		mips mips
- 
-makeoptions	KERNLOADADDR=0x80100000
diff --git a/sys/mips/conf/MALTA.hints b/sys/mips/conf/MALTA.hints
deleted file mode 100644
index 72dd10723529..000000000000
--- a/sys/mips/conf/MALTA.hints
+++ /dev/null
@@ -1,5 +0,0 @@
-# $FreeBSD$
-# device.hints
-# hint.uart.0.at="nexus"
-# hint.uart.0.maddr="0x180003f8"
-# hint.uart.0.flags="0x90"
diff --git a/sys/mips/conf/MALTA64 b/sys/mips/conf/MALTA64
deleted file mode 100644
index 7014a4d83534..000000000000
--- a/sys/mips/conf/MALTA64
+++ /dev/null
@@ -1,13 +0,0 @@
-# MALTA64 -- 64-bit kernel config for MALTA endian-big boards
-#
-# $FreeBSD$
- 
-ident		MALTA64
-
-include		"std.MALTA"
- 
-machine		mips mips64
- 
-makeoptions 	KERNLOADADDR=0xffffffff80100000
-
-options 	COMPAT_FREEBSD32	# Compatible with o32 binaries
diff --git a/sys/mips/conf/MALTA64EL b/sys/mips/conf/MALTA64EL
deleted file mode 100644
index f4911924288d..000000000000
--- a/sys/mips/conf/MALTA64EL
+++ /dev/null
@@ -1,11 +0,0 @@
-# MALTA64 -- 64-bit kernel config for MALTA endian-little boards
-#
-# $FreeBSD$
- 
-ident		MALTA64
-
-include		"std.MALTA"
- 
-machine		mips mips64el
- 
-makeoptions 	KERNLOADADDR=0xffffffff80100000
diff --git a/sys/mips/conf/MALTAEL b/sys/mips/conf/MALTAEL
deleted file mode 100644
index a4d752cf0858..000000000000
--- a/sys/mips/conf/MALTAEL
+++ /dev/null
@@ -1,11 +0,0 @@
-# MALTA -- Kernel config for MALTA endian-little boards
-#
-# $FreeBSD$
- 
-ident		MALTA
-
-include		"std.MALTA"
- 
-machine		mips mipsel
- 
-makeoptions	KERNLOADADDR=0x80100000
diff --git a/sys/mips/conf/MT7620.hints b/sys/mips/conf/MT7620.hints
deleted file mode 100644
index dd35bbd306d8..000000000000
--- a/sys/mips/conf/MT7620.hints
+++ /dev/null
@@ -1,143 +0,0 @@
-# $FreeBSD$
-# device.hints
-hint.obio.0.at="nexus0"
-hint.obio.0.maddr=0x10000000
-hint.obio.0.msize=0x10000000
-
-hint.pcib.0.at="nexus0"
-hint.pcib.0.maddr=0x10140000
-hint.pcib.0.msize=0x30000
-
-hint.mx25l.0.at="spibus0"
-
-#hint.nvram.0.sig=0xe5e60a74
-#hint.nvram.0.base=0x1f030000
-#hint.nvram.0.maxsize=0x2000
-#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-#hint.nvram.1.sig=0x5a045e94
-#hint.nvram.1.base=0x1f032000
-#hint.nvram.1.maxsize=0x4000
-#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# on-board Ralink Frame Engine
-hint.rt.0.at="nexus0"
-hint.rt.0.maddr=0x10100000
-hint.rt.0.msize=0x10000
-hint.rt.0.irq=3
-# macaddr can be statically set
-#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx"
-
-# on-board Ralink 2872 802.11n core
-hint.rt2860.0.at="nexus0"
-hint.rt2860.0.maddr=0x10180000
-hint.rt2860.0.msize=0x40000
-hint.rt2860.0.irq=4
-
-# uart0
-#hint.uart.0.at="obio0"
-#hint.uart.0.maddr=0x10000C00
-#hint.uart.0.msize=0x100
-#hint.uart.0.irq=12
-#hint.uart.0.flags="0x30"
-
-# uart1
-#hint.uart.1.at="obio0"
-#hint.uart.1.maddr=0x10000500
-#hint.uart.1.msize=0x100
-#hint.uart.1.irq=5
-#hint.uart.1.flags="0x30"
-
-
-# gpio
-# GPIO0  - WPS BTN	IN II IO
-#hint.gpiobutton.0.at="gpiobus0"
-#hint.gpiobutton.0.pins="0x01"
-#hint.gpiobutton.0.name="wps"
-#hint.gpiobutton.0.flags="0x0581"
-
-# GPIO7  - MODE SW AP	IN II IO
-#hint.gpiobutton.1.at="gpiobus0"
-#hint.gpiobutton.1.pins="0x80"
-#hint.gpiobutton.1.name="mode_ap"
-#hint.gpiobutton.1.flags="0x0581"
-
-# GPIO8  - ST LEDRED	OUT	/* 2pin BiDir RED/BLUE LED */
-# GPIO9  - ST LEDBLUE	OUT
-#hint.gpioled.0.at="gpiobus0"
-#hint.gpioled.0.pins="0x100"
-#hint.gpioled.0.name="status_red"
-#hint.gpioled.0.flags="0x0002"
-#hint.gpioled.1.at="gpiobus0"
-#hint.gpioled.1.pins="0x200"
-#hint.gpioled.1.name="status_blue"
-#hint.gpioled.1.name="status"
-#hint.gpioled.1.flags="0x0002"
-
-# GPIO10 - RST BTN	IN II IO
-#hint.gpiobutton.2.at="gpiobus0"
-#hint.gpiobutton.2.pins="0x400"
-##hint.gpiobutton.2.name="reset"
-#hint.gpiobutton.2.flags="0x0581"
-
-# GPIO11 - MODE SW CL	IN II IO
-#hint.gpiobutton.3.at="gpiobus0"
-#hint.gpiobutton.3.pins="0x800"
-#hint.gpiobutton.3.name="mode_wlan_client"
-#hint.gpiobutton.3.flags="0x0581"
-
-# GPIO14 - WPS LED	OUT II IO
-#hint.gpioled.2.at="gpiobus0"
-#hint.gpioled.2.pins="0x4000"
-#hint.gpioled.2.name="wps"
-#hint.gpioled.2.flags="0x0182"
-
-
-
-#0x00000000-0x00030000 : "Bootloader"
-#0x00030000-0x00040000 : "Factory"
-#0x00040000-0x00070000 : "Config"
-#0x00070000-0x000b0000 : "Language"
-#0x000b0000-0x001a0000 : "Kernel"
-#0x001a0000-0x01000000 : "RootFS"
-
-#hint.map.0.at="cfid0"
-#hint.map.0.start=0x00000000
-#hint.map.0.end=0x00030000
-#hint.map.0.name="bootloader"
-#hint.map.0.readonly=1
-
-#hint.map.1.at="cfid0"
-#hint.map.1.start=0x00030000
-#hint.map.1.end=0x00040000
-#hint.map.1.name="factory"
-
-#hint.map.2.at="cfid0"
-#hint.map.2.start=0x00040000
-#hint.map.2.end=0x00800000
-#hint.map.2.name="upgrade"
-
-#hint.map.3.at="cfid0"
-#hint.map.3.start=0x00040000
-#hint.map.3.end=0x00050000
-#hint.map.3.name="config"
-
-#hint.map.4.at="cfid0"
-#hint.map.4.start=0x00000000
-#hint.map.4.end=0x00000000
-#hint.map.4.name="language"
-
-#hint.map.5.at="cfid0"
-#hint.map.5.start=0x00050000
-#hint.map.5.end=0x00150000
-#hint.map.5.name="kernel"
-
-#hint.map.6.at="cfid0"
-#hint.map.6.start=0x00150000
-#hint.map.6.end=0x00800000
-#hint.map.6.name="rootfs"
-
-
-#hint.rt.0.phymask=0x1f
-#hint.rt.0.media=100
-#hint.rt.0.fduplex=1
-
diff --git a/sys/mips/conf/MT7620A_FDT b/sys/mips/conf/MT7620A_FDT
deleted file mode 100644
index ffd4fa7d6296..000000000000
--- a/sys/mips/conf/MT7620A_FDT
+++ /dev/null
@@ -1,77 +0,0 @@
-#
-# MT7620A_FDT -- Kernel configuration file for FreeBSD/MIPS MT7620A SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=MT7620a.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		MT7620A
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# PCI support
-device 		pci
-
-# USB (ehci, ohci) support
-device 		usb
-device 		mtk_usb_phy
-device 		ehci
-device 		ohci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/MT7620N_FDT b/sys/mips/conf/MT7620N_FDT
deleted file mode 100644
index d273acbbc8ea..000000000000
--- a/sys/mips/conf/MT7620N_FDT
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-# MT7620N_FDT -- Kernel configuration file for FreeBSD/MIPS MT7620N SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=WRTNODE.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		MT7620N
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (ehci, ohci) support
-device 		usb
-device 		mtk_usb_phy
-device 		ehci
-device 		ohci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/MT7621_FDT b/sys/mips/conf/MT7621_FDT
deleted file mode 100644
index dcb6144c2cc6..000000000000
--- a/sys/mips/conf/MT7621_FDT
+++ /dev/null
@@ -1,73 +0,0 @@
-#
-# MT7621_FDT -- Kernel configuration file for FreeBSD/MIPS MT7621 SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=WITI.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		MT7621
-cpu 		CPU_MIPS1004K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_gic
-
-# UART device support is compiled in when uart_ns8250 is selected (default)
-
-# SPI and SPI flash support
-device 		mtk_spi_v2
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v2
-device 		gpio
-device 		gpioled
-
-# PCI support
-device 		pci
-
-# USB (ehci, ohci) support
-device 		usb
-device 		xhci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/MT7628_FDT b/sys/mips/conf/MT7628_FDT
deleted file mode 100644
index f52167f51a6c..000000000000
--- a/sys/mips/conf/MT7628_FDT
+++ /dev/null
@@ -1,76 +0,0 @@
-#
-# MT7628_FDT -- Kernel configuration file for FreeBSD/MIPS MT7628 and MT7688
-# SoCs
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=LINKIT7688.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		MT7628
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v2
-
-# UART device support is compiled in when uart_ns8250 is selected (default)
-
-# SPI and SPI flash support
-device 		mtk_spi_v2
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v2
-device 		gpio
-device 		gpioled
-
-# PCI support
-device 		pci
-
-# USB (ehci, ohci) support
-device 		usb
-device 		mtk_usb_phy
-device 		ehci
-device 		ohci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/OCTEON1 b/sys/mips/conf/OCTEON1
deleted file mode 100644
index 2ad031583d7e..000000000000
--- a/sys/mips/conf/OCTEON1
+++ /dev/null
@@ -1,242 +0,0 @@
-#
-# OCTEON1 -- Generic kernel configuration file for FreeBSD/MIPS on Cavium Octeon
-#
-# For more information on this file, please read the config(5) manual page,
-# and/or the handbook section on Kernel Configuration Files:
-#
-#    https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files.
-# If you are in doubt as to the purpose or necessity of a line, check first
-# in NOTES.
-#
-# $FreeBSD$
-
-ident		OCTEON1
-
-makeoptions	ARCH_FLAGS="-march=octeon+"
-makeoptions	LDSCRIPT_NAME=ldscript.mips.octeon1
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	KERNLOADADDR=0xffffffff80100000
-
-# We don't need to build a trampolined version of the kernel.
-makeoptions	WITHOUT_KERNEL_TRAMPOLINE=1
-
-include		"../cavium/std.octeon1"
-
-hints		"OCTEON1.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-# Board-specific support that cannot be auto-detected at runtime.
-#options 	OCTEON_VENDOR_LANNER		# Support for Lanner boards.
-#options 	OCTEON_VENDOR_RADISYS		# Support for Radisys boards.
-#options 	OCTEON_VENDOR_UBIQUITI		# Support for Ubiquiti boards.
-#options	OCTEON_VENDOR_GEFES		# Support for GE LANIC boards
-#options 	OCTEON_BOARD_CAPK_0100ND	# Support for CAPK-0100nd.
-
-# Compile for a specified Octeon model.  If not specified, support for
-# detection at runtime will be used instead, which may give inferior
-# performance.
-#
-# See sys/contrib/octeon-sdk/octeon-model.h for possible values.
-#options 	OCTEON_MODEL=OCTEON_CN58XX_PASS1_1
-
-options 	SCHED_ULE		# ULE scheduler
-options 	PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	SCTP_SUPPORT		# Allow kldload of SCTP
-options 	FFS			# Berkeley Fast Filesystem
-options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	UFS_GJOURNAL		# Enable gjournal-based UFS journaling
-options 	MD_ROOT			# MD is a potential root device
-options 	NFSCL			# Network Filesystem Client
-options 	NFSD			# Network Filesystem Server
-options 	NFSLOCKD		# Network Lock Manager
-options 	NFS_ROOT		# NFS usable as /, requires NFSCL
-options 	MSDOSFS			# MSDOS Filesystem
-options 	CD9660			# ISO 9660 Filesystem
-options 	PROCFS			# Process filesystem (requires PSEUDOFS)
-options 	PSEUDOFS		# Pseudo-filesystem framework
-options 	GEOM_PART_GPT		# GUID Partition Tables.
-options 	GEOM_LABEL		# Provides labelization
-options 	COMPAT_FREEBSD32	# Compatible with o32 binaries
-options 	SCSI_DELAY=5000		# Delay (in ms) before probing SCSI
-options 	KTRACE			# ktrace(1) support
-options 	STACK			# stack(9) support
-options 	SYSVSHM			# SYSV-style shared memory
-options 	SYSVMSG			# SYSV-style message queues
-options 	SYSVSEM			# SYSV-style semaphores
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	PRINTF_BUFR_SIZE=128	# Prevent printf output being interspersed.
-options 	HWPMC_HOOKS		# Necessary kernel hooks for hwpmc(4)
-options 	AUDIT			# Security event auditing
-options 	MAC			# TrustedBSD MAC Framework
-#options 	KDTRACE_FRAME		# Ensure frames are compiled in
-#options 	KDTRACE_HOOKS		# Kernel DTrace hooks
-options 	INCLUDE_CONFIG_FILE     # Include this file in kernel
-options 	NO_SWAPPING		# Disable support for paging
-
-# Debugging for use in -current
-options 	KDB			# Enable kernel debugger support.
-options 	DDB			# Support DDB.
-options 	GDB			# Support remote GDB.
-options 	DEADLKRES		# Enable the deadlock resolver
-options 	INVARIANTS		# Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	# Extra sanity checks of internal structures, required by INVARIANTS
-options 	WITNESS			# Enable checks to detect deadlocks and cycles
-options 	WITNESS_SKIPSPIN	# Don't run witness on spinlocks for speed
-options 	MALLOC_DEBUG_MAXZONES=8	# Separate malloc(9) zones
-
-# Make an SMP-capable kernel by default
-options 	SMP			# Symmetric MultiProcessor Kernel
-
-# Bus support.
-device		pci
-
-# ATA controllers
-device		ahci		# AHCI-compatible SATA controllers
-device		ata		# Legacy ATA/SATA controllers
-
-# On-board Compact Flash driver.
-device		cf
-options 	ROOTDEVNAME=\"ufs:cf0s2a\"	# Default root filesystem.
-
-# SCSI Controllers
-device		ahc		# AHA2940 and onboard AIC7xxx devices
-device		mpt		# LSI-Logic MPT-Fusion
-
-# ATA/SCSI peripherals
-device		scbus		# SCSI bus (required for ATA/SCSI)
-device		ch		# SCSI media changers
-device		da		# Direct Access (disks)
-device		sa		# Sequential Access (tape etc)
-device		cd		# CD
-device		pass		# Passthrough device (direct ATA/SCSI access)
-device		ses		# Enclosure Services (SES and SAF-TE)
-
-# RAID controllers interfaced to the SCSI subsystem
-device		ciss		# Compaq Smart RAID 5*
-
-# PCCARD (PCMCIA) support
-# PCMCIA and cardbus bridge support
-device		cbb		# cardbus (yenta) bridge
-device		cardbus		# CardBus (32-bit) bus
-
-# Serial (COM) ports
-device		uart		# Generic UART driver
-
-# If you've got a "dumb" serial or parallel PCI card that is
-# supported by the puc(4) glue driver, uncomment the following
-# line to enable it (connects to sio, uart and/or ppc drivers):
-#device		puc
-
-# On-board Cavium Octeon Ethernet.
-# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
-device		octe
-
-# Cavium Octeon management Ethernet.
-device		octm
-
-# Switch PHY support for the octe driver.  These currently present a VLAN per
-# physical port, but may eventually provide support for DSA or similar instead.
-#device		mv88e61xxphy	# Marvell 88E61XX
-
-device		iflib
-
-# PCI Ethernet NICs.
-device		em		# Intel PRO/1000 Gigabit Ethernet Family
-device		ix		# Intel PRO/10GbE PF PCIE Ethernet Family
-device		ixv		# Intel PRO/10GbE VF PCIE Ethernet Family
-
-# PCI Ethernet NICs that use the common MII bus controller code.
-# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
-device		miibus		# MII bus support
-device		bce		# Broadcom BCM5706/BCM5708 Gigabit Ethernet
-device		bfe		# Broadcom BCM440x 10/100 Ethernet
-device		bge		# Broadcom BCM570xx Gigabit Ethernet
-
-device		wlan		# 802.11 support
-options 	IEEE80211_DEBUG	# enable debug msgs
-options 	IEEE80211_SUPPORT_MESH	# enable 802.11s draft support
-device		wlan_wep	# 802.11 WEP support
-device		wlan_ccmp	# 802.11 CCMP support
-device		wlan_tkip	# 802.11 TKIP support
-device		wlan_amrr	# AMRR transmit rate control algorithm
-device		ath		# Atheros NIC's
-device		ath_pci		# Atheros pci/cardbus glue
-device		ath_hal		# pci/cardbus chip support
-device		ath_rate_sample	# SampleRate tx rate control for ath
-device		ral		# Ralink Technology RT2500 wireless NICs.
-
-# Pseudo devices.
-device		loop		# Network loopback
-device		ether		# Ethernet support
-device		vlan		# 802.1Q VLAN support
-device		tuntap		# Packet tunnel.
-device		md		# Memory "disks"
-device		gif		# IPv6 and IPv4 tunneling
-device		firmware	# firmware assist module
-
-# The `bpf' device enables the Berkeley Packet Filter.
-# Be aware of the administrative consequences of enabling this!
-# Note that 'bpf' is required for DHCP.
-device		bpf		# Berkeley packet filter
-
-# Hardware watchdog support.
-#device		octeon_wdog	# Octeon hardware watchdog
-
-# USB support
-options 	USB_DEBUG	# enable debug msgs
-device		octusb		# Cavium Octeon on-board USB interface (USB 2.0)
-device		uhci		# UHCI PCI->USB interface
-device		ohci		# OHCI PCI->USB interface
-device		ehci		# EHCI PCI->USB interface (USB 2.0)
-device		usb		# USB Bus (required)
-#device		udbp		# USB Double Bulk Pipe devices
-device		uhid		# "Human Interface Devices"
-device		ulpt		# Printer
-device		umass		# Disks/Mass storage - Requires scbus and da
-device		ums		# Mouse
-# USB Serial devices
-device		u3g		# USB-based 3G modems (Option, Huawei, Sierra)
-device		uark		# Technologies ARK3116 based serial adapters
-device		ubsa		# Belkin F5U103 and compatible serial adapters
-device		uftdi		# For FTDI usb serial adapters
-device		uipaq		# Some WinCE based devices
-device		uplcom		# Prolific PL-2303 serial adapters
-device		uslcom		# SI Labs CP2101/CP2102 serial adapters
-device		uvisor		# Visor and Palm devices
-device		uvscom		# USB serial support for DDI pocket's PHS
-# USB Wireless
-device		rum		# Ralink Technology RT2501USB wireless NICs
-device		uath		# Atheros AR5523 wireless NICs
-device		ural		# Ralink Technology RT2500USB wireless NICs
-device		zyd		# ZyDAS zd1211/zd1211b wireless NICs
-
-# crypto subsystem
-device		crypto		# core crypto support
-device		cryptodev	# /dev/crypto for access to h/w
-device		cryptocteon	# Octeon coprocessor 2 crypto offload
-
-# GPIO support
-#device		gpio
-
-# PMC support
-#device		hwpmc
-
-# HID support
-options 	HID_DEBUG	# enable debug msgs
-device		hid		# Generic HID support
diff --git a/sys/mips/conf/OCTEON1.hints b/sys/mips/conf/OCTEON1.hints
deleted file mode 100644
index 24be40b60bb9..000000000000
--- a/sys/mips/conf/OCTEON1.hints
+++ /dev/null
@@ -1,13 +0,0 @@
-# $FreeBSD$
-# device.hints
-# All these values are complete nonsense...
-hw.uart.console="io:0x1"
-hint.ciu.0.at="nexus"
-hint.rtc.0.at="nexus"
-hint.obio.0.at="ciu"
-hint.obio.0.maddr="0x1"
-hint.obio.0.msize="0x1"
-hint.obio.0.flags="0x1"
-hint.uart.0.at="obio"
-hint.uart.0.maddr="0x1"
-hint.uart.0.flags="0x1"
diff --git a/sys/mips/conf/ONIONOMEGA b/sys/mips/conf/ONIONOMEGA
deleted file mode 100644
index a25cd1c481c7..000000000000
--- a/sys/mips/conf/ONIONOMEGA
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# Onion Omega - an AR9330 based SoC
-#
-# https://onion.io/omega/
-#
-# * AR9330 SoC
-# * 64MB RAM
-# * 16MB flash
-# * Integrated 1x1 2GHz wifi and optional 10/100 ethernet
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include         "std.AR933X"
-
-ident           ONIONOMEGA
-
-# Override hints with board values
-hints           "ONIONOMEGA.hints"
-
-# Board memory - 64MB
-options         AR71XX_REALMEM=(64*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/ONIONOMEGA.hints b/sys/mips/conf/ONIONOMEGA.hints
deleted file mode 100644
index 0c325febb114..000000000000
--- a/sys/mips/conf/ONIONOMEGA.hints
+++ /dev/null
@@ -1,132 +0,0 @@
-#
-# This file adds to the values in AR933X_BASE.hints.
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1fff0006
-
-# ath0
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# 16MB flash layout:
-# [    0.510000] 5 tp-link partitions found on MTD device spi0.0
-# [    0.510000] Creating 5 MTD partitions on "spi0.0":
-# [    0.520000] 0x000000000000-0x000000020000 : "u-boot"
-# [    0.520000] 0x000000020000-0x000000136468 : "kernel"
-# [    0.530000] 0x000000136468-0x000000ff0000 : "rootfs"
-# [    0.530000] mtd: device 2 (rootfs) set to be root filesystem
-# [    0.540000] 1 squashfs-split partitions found on MTD device rootfs
-# [    0.540000] 0x000000730000-0x000000fe0000 : "rootfs_data"
-# [    0.540000] 0x000000fe0000-0x000000ff0000 : "nvram"
-# [    0.550000] 0x000000ff0000-0x000001000000 : "art"
-# [    0.560000] 0x000000020000-0x000000fe0000 : "firmware"
-
-# 64KiB uboot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00010000
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# 64KiB uboot
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00010000
-hint.map.1.end=0x00020000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-# kernel
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00020000
-hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-# rootfs ulzma
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.3.end=0x00fe0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=1
-
-# 64KiB cfg
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00fe0000
-hint.map.4.end=0x00ff0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# all firmware 16000KiB
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x00020000
-hint.map.5.end=0x00ff0000
-hint.map.5.name="firmware"
-hint.map.5.readonly=0
-
-# 64KiB ART
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x00ff0000
-hint.map.6.end=0x01000000
-hint.map.6.name="ART"
-hint.map.6.readonly=1
-
-# GPIO
-hint.gpio.0.pinmask=0x0c8ff1c3
-
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.pins=0x08000000
-hint.gpioled.0.name="board"
-hint.gpioled.0.invert=0
-
-#Red
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.pins=0x00020000
-hint.gpioled.1.name="red"
-hint.gpioled.1.invert=0
-
-#Green
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.pins=0x00010000
-hint.gpioled.2.name="green"
-hint.gpioled.2.invert=0
-
-#Blue
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.pins=0x00008000
-hint.gpioled.3.name="blue"
-hint.gpioled.3.invert=0
-
-# I2C
-# 0x20 - 0x27 = Relay Controllers (0x27 is default)
-# 0x5a = PWM/Servo Controller
-hint.gpioiic.0.at="gpiobus0"
-hint.gpioiic.0.pins=0x300000 # pins 20 and 21
-hint.gpioiic.0.scl=0 # pin 20
-hint.gpioiic.0.sda=1 # pin 21
diff --git a/sys/mips/conf/PB47 b/sys/mips/conf/PB47
deleted file mode 100644
index 1d0829ca3dfc..000000000000
--- a/sys/mips/conf/PB47
+++ /dev/null
@@ -1,42 +0,0 @@
-#
-# Atheros PB47 reference board.
-#
-# * one MiniPCI+ slot (modified to allow two idsel lines
-#   on the one slot, for a specific kind of internal-only
-#   NIC;
-# * one XMII slot
-# * One ethernet PHY
-# * Akros Silicon AS1834
-# * 8MB NOR SPI flash
-# * 64MB RAM
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"PB47"
-hints		"PB47.hints"
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# XXX TODO: add uboot boot parameter parsing to extract MAC, RAM.
-# Right now it will just detect 32mb out of 64mb, as well as
-# return a garbage MAC address.
-options 	AR71XX_REALMEM=64*1024*1024
-
-# For DOS - enable if required
-options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device		geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/PB47.hints b/sys/mips/conf/PB47.hints
deleted file mode 100644
index 2bcdc77727b7..000000000000
--- a/sys/mips/conf/PB47.hints
+++ /dev/null
@@ -1,79 +0,0 @@
-
-# $FreeBSD$
-
-# There's two interfaces, but only one socket is populated.
-#
-# There's an AR8021 PHY attached to arge1.
-#
-# XXX TODO: figure out where to extract the MAC from.
-hint.arge.1.phymask=0x01
-
-# XXX TODO: pass in hints for the GPIO -> LED mapping for the
-# minipci slot.  The specific customer reference design NIC
-# wires GPIO5 from each AR9220 to one of two GPIO pins on the
-# MiniPCI bus.  However, this may be very specific to the NIC
-# being used.
-
-# The default flash layout:
-# uboot: 192k
-# env: 64k
-# rootfs: 6144k
-# uimage (kernel): 1728k
-# caldata: 64k
-#
-# We steal 64k from the end of rootfs to store the local config.
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000030000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00030000
-hint.map.1.end=0x00040000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00040000
-hint.map.2.end=0x00630000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00630000
-hint.map.3.end=0x00640000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00640000
-hint.map.4.end=0x007f0000
-hint.map.4.name="kernel"
-hint.map.4.readonly=1
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# Don't flip on anything that isn't already enabled by the
-# bootloader.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# Which GPIO lines to enable - just GPIO2/3 for the LEDs.
-hint.gpio.0.pinmask=0x0000000c
-
-# GPIO2 and GPIO3 are LEDs, where 0=on and 1=off.
-# XXX TODO: teach gpioled about polarity?
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.pins="0x0004"
-hint.gpioled.0.name="led1"
-
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.pins="0x0008"
-hint.gpioled.1.name="led2"
-
diff --git a/sys/mips/conf/PB92 b/sys/mips/conf/PB92
deleted file mode 100644
index 30c134ef1e74..000000000000
--- a/sys/mips/conf/PB92
+++ /dev/null
@@ -1,135 +0,0 @@
-#
-# PB92 -- Kernel configuration file for FreeBSD/mips for Atheros PB92 reference
-#         board (AR7242)
-#
-# $FreeBSD$
-#
-
-ident		PB92
-# XXX The default load address in the Uboot environment is 0x80010000
-makeoptions	KERNLOADADDR=0x80050000
-
-# The PB92 has 32mb of RAM; hard-code that
-options 	AR71XX_REALMEM=32*1024*1024
-
-# It's UBOOT, not Redboot - without this, things will hang at startup
-options 	AR71XX_ENV_UBOOT
-
-# We have to build most things as modules rather than in the kernel.
-# The PB92 has 4MB of SPI flash and the default kernel "partition"
-# is only 892KiB.  In order to try and squeeze into that (so people
-# who already are using it without modifying the default flash layout)
-# we need to cut down on a lot of things.
-
-makeoptions	MODULES_OVERRIDE="ath ath_pci ath_ahb bridgestp if_bridge if_gif if_gre wlan wlan_acl wlan_amrr wlan_ccmp wlan_rssadapt wlan_tkip wlan_wep wlan_xauth usb ar71xx"
-
-hints		"PB92.hints"
-include		"../atheros/std.ar71xx"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-makeoptions	MODULES_OVERRIDE=""
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-# Can't do IPv6 - it just doesn't fit.
-# options 	INET6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-# options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-options 	ALQ
-
-# Debugging for use in -current
-options 	DEADLKRES
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options         FFS                     #Berkeley Fast Filesystem
-#options         SOFTUPDATES             #Enable FFS soft updates support
-#options         UFS_ACL                 #Support for access control lists
-#options         UFS_DIRHASH             #Improve performance on big directories
-
-# Support uncompress lzma rootfs
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# PCI bus
-device		pci
-device		ar724x_pci
-
-# NVRAM U-Boot Environment -> Kernel environment
-device		nvram2env
-
-# Wireless NIC cards
-options 	IEEE80211_DEBUG
-options 	IEEE80211_SUPPORT_MESH
-options 	IEEE80211_SUPPORT_TDMA
-options 	IEEE80211_ALQ
-#device		wlan            # 802.11 support
-#device		wlan_wep        # 802.11 WEP support
-#device		wlan_ccmp       # 802.11 CCMP support
-#device		wlan_tkip       # 802.11 TKIP support
-#device		wlan_xauth	# 802.11 hostap support
-
-#device		ath		# Atheros pci/cardbus NIC's
-#device		ath_pci		# PCI/PCIe bus glue
-options 	ATH_DEBUG
-options 	ATH_ENABLE_11N
-options 	ATH_DIAGAPI
-
-# device		ath_hal
-options 	AH_DEBUG
-options 	AH_DEBUG_ALQ
-
-# device		ath_rate_sample
-
-device		mii
-device		arge
-
-# USB devices - PB92 has EHCI only
-
-#device		usb
-options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-options 	USB_DEBUG
-options 	USB_HOST_ALIGN=32
-#device		ehci
-
-# Mass storage
-#device		scbus
-#device		umass
-#device		da
-
-# Read MSDOS formatted disks
-# options 	MSDOSFS
-
-# GPIO Bus
-#device		gpio
-#device		gpioled
-
-# SPI and flash
-device		spibus
-device		ar71xx_spi
-device		mx25l
-
-# The flash is statically partitioned; add in that
-device		geom_map
-
-device		ar71xx_wdog
-
-# Serial
-device		uart
-device		uart_ar71xx
-
-device		ar71xx_apb
-
-# Network twiddling
-device		loop
-device		ether
-#device		md
-#device		bpf
-#device		if_bridge
diff --git a/sys/mips/conf/PB92.hints b/sys/mips/conf/PB92.hints
deleted file mode 100644
index 846d57d5ad13..000000000000
--- a/sys/mips/conf/PB92.hints
+++ /dev/null
@@ -1,113 +0,0 @@
-# $FreeBSD$
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-#ehci - note the 0x100 offset for the AR913x/AR724x
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00ffff00
-hint.ehci.0.irq=1
-
-# pci
-hint.pcib.0.at="nexus0"
-hint.pcib.0.irq=0
-
-# arge0
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-# AR8316 workaround for now
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.phymask=0x3
-
-# GPIO
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001	# pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002	# pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800	# pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080	# pin 7
-
-# SPI controller/bus
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-# SPI flash
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# nvram mapping - XXX ?
-hint.nvram.0.base=0x1f030000
-hint.nvram.0.maxsize=0x2000
-hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-hint.nvram.1.base=0x1f032000
-hint.nvram.1.maxsize=0x4000
-hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# GEOM_MAP
-#
-# From my PB92 environment:
-#
-# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000	# 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000	# 64k u-boot-env
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00300000	# 2752k rootfs
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00300000
-hint.map.3.end=0x003e0000	# 896k uImage
-hint.map.3.name="uImage"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003e0000
-hint.map.4.end=0x003f0000	# 64k NVRAM
-hint.map.4.name="NVRAM"
-hint.map.4.readonly=0
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x003f0000
-hint.map.5.end=0x00400000	# 64k ART
-hint.map.5.name="ART"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/PICOSTATION_M2HP b/sys/mips/conf/PICOSTATION_M2HP
deleted file mode 100644
index 38e3d69c0509..000000000000
--- a/sys/mips/conf/PICOSTATION_M2HP
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# Specific board setup for the Picostation M2 HP board.
-#
-# This board has the following hardware:
-#
-# + AR7241 CPU SoC
-# + AR9287 Wifi
-# + Integrated switch (XXX speed?)
-# + 8MB flash
-# + 32MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"PICOSTATION_M2HP"
-hints		"PICOSTATION_M2HP.hints"
-
-options 	AR71XX_REALMEM=32*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# Limit inlines
-makeoptions	INLINE_LIMIT=768
-
-# We bite the performance overhead for now; the kernel won't
-# fit if the mutexes are inlined.
-options 	MUTEX_NOINLINE
-options 	RWLOCK_NOINLINE
-options 	SX_NOINLINE
-
-# There's no need to enable swapping on this platform.
-options 	NO_SWAPPING
-
-# For DOS - enable if required
-# options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Not enough space for these..
-nooptions 	INVARIANTS
-nooptions 	INVARIANT_SUPPORT
-nooptions 	WITNESS
-nooptions 	WITNESS_SKIPSPIN
-nooptions 	DEBUG_REDZONE
-nooptions 	DEBUG_MEMGUARD
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# Enable GPIO
-device         gpio
-device         gpioled
diff --git a/sys/mips/conf/PICOSTATION_M2HP.hints b/sys/mips/conf/PICOSTATION_M2HP.hints
deleted file mode 100644
index dd8e238e87a7..000000000000
--- a/sys/mips/conf/PICOSTATION_M2HP.hints
+++ /dev/null
@@ -1,103 +0,0 @@
-# $FreeBSD$
-
-# arge0 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Override MAC Address with the one on EEPROM
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge0: dedicated switch port; RMII; dedicated PHY 4 on switch, connected
-# via internal switch MDIO bus.
-hint.arge.0.media=100           # Map to 100/full
-hint.arge.0.fduplex=1           #
-hint.arge.0.phymask=0x10        # PHY4
-hint.arge.0.mdio=mdioproxy1     # .. off of the switch mdiobus
-
-# arge1: nail to 1000/full, RMII - connected to the switch
-hint.arge.1.media=1000          # Map to 1000/full
-hint.arge.1.fduplex=1           #
-hint.arge.1.phymask=0x0         # no directly mapped PHYs
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1       # We need to be explicitly told this
-hint.arswitch.0.numphys=4       # 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1       # Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=0      # No, not RGMII
-hint.arswitch.0.is_gmii=0       # No, not GMII
-
-# ath0 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# ath
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# GPIO pins
-# Pin 0: red led (sig1)
-# Pin 1: yellow led (sig2)
-# Pin 11: green len (sig3)
-# Pin 7: green len (sig4)
-# Pin 12: Reset switch
-hint.gpio.0.pinmask=0x1883
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001     # pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002     # pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800     # pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080     # pin 7
-
-# GEOM_MAP
-#
-# Picostation M2 HP
-#
-# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1024k(kernel),6528k(rootfs),256k(cfg),64k(EEPROM)
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000       # 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000       # 64k u-boot-env 
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.3.end=0x007b0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007b0000
-hint.map.4.end=0x007f0000       # 256k cfg
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000       # 64k EEPROM
-hint.map.5.name="eeprom"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/QCA953X_BASE b/sys/mips/conf/QCA953X_BASE
deleted file mode 100644
index b8dac404f30e..000000000000
--- a/sys/mips/conf/QCA953X_BASE
+++ /dev/null
@@ -1,78 +0,0 @@
-#
-# QCA953x -- Kernel configuration base file for the Qualcomm Atheros QCA953x SoC.
-#
-# This file (and the hints file accompanying it) are not designed to be
-# used by themselves. Instead, users of this file should create a kernel
-# config file which includes this file (which gets the basic hints), then
-# override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-#
-# $FreeBSD$
-#
-
-machine 	mips mips
-ident		QCA953X_BASE
-cpu		CPU_MIPS24K
-makeoptions	KERNLOADADDR=0x80050000
-
-files		"../atheros/files.ar71xx"
-hints		"QCA953X_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-makeoptions	MODULES_OVERRIDE="gpio ar71xx if_gif if_vlan if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr hwpmc ipfw"
-
-options 	DDB
-options 	KDB
-options 	ALQ
-options 	BREAK_TO_DEBUGGER
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-#options 	INET6			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# PMC
-options 	HWPMC_HOOKS
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	FFS                     #Berkeley Fast Filesystem
-#options 	SOFTUPDATES             #Enable FFS soft updates support
-#options 	UFS_ACL                 #Support for access control lists
-#options 	UFS_DIRHASH             #Improve performance on big directories
-options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
-
-include		"std.AR_MIPS_BASE"
-makeoptions 	MODULES_OVERRIDE+="hwpmc_mips24k"
-
-# EEPROM caldata for AHB connected device
-options 	AR71XX_ATH_EEPROM
-device 		ar71xx_caldata
-device 		firmware
-
-# Support QCA9530 in the HAL
-options 	AH_SUPPORT_QCA9530	# Chipset support
-
-# Support EEPROM caldata in AHB devices
-options 	ATH_EEPROM_FIRMWARE
-
-device		usb
-device		ehci
-
-device		scbus
-device		umass
-device		da
-
-# Handle 25MHz refclock by allowing a higher baudrate error tolerance.
-device		uart_ar71xx
-options		UART_DEV_TOLERANCE_PCT=50
-
-device		ar71xx_apb
-
diff --git a/sys/mips/conf/QCA953X_BASE.hints b/sys/mips/conf/QCA953X_BASE.hints
deleted file mode 100644
index 192b45310532..000000000000
--- a/sys/mips/conf/QCA953X_BASE.hints
+++ /dev/null
@@ -1,80 +0,0 @@
-# This file (and the kernel config file accompanying it) are not designed 
-# to be used by themselves. Instead, users of this file should create a
-# kernel # config file which includes this file (which gets the basic hints),
-# then override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-
-# $FreeBSD$
-
-hint.apb.0.at="nexus0"
-hint.apb.0.irq=4
-
-# ART calibration data mapping device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-
-# mdiobus on arge0 - required to bring up arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# mdiobus on arge1 - this is what the internal switch is hooked into.
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# uart0
-hint.uart.0.at="apb0"
-# see atheros/uart_cpu_ar71xx.c why +3
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-# ehci - on IP3
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00ffff00
-hint.ehci.0.irq=1
-
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# XXX The ath device hangs off of the AHB, rather than the Nexus.
-hint.ath.0.at="nexus0"
-hint.ath.0.maddr=0x18100000
-hint.ath.0.msize=0x20000
-hint.ath.0.irq=0
-hint.ath.0.vendor_id=0x168c
-hint.ath.0.device_id=0x003d
-# Where the ART is - last 64k in the first 8MB of flash
-#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# The GPIO function and pin mask is configured per-board
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
diff --git a/sys/mips/conf/QCA955X_BASE.hints b/sys/mips/conf/QCA955X_BASE.hints
deleted file mode 100644
index 2b0fcdeeb873..000000000000
--- a/sys/mips/conf/QCA955X_BASE.hints
+++ /dev/null
@@ -1,89 +0,0 @@
-# This file (and the kernel config file accompanying it) are not designed
-# to be used by themselves. Instead, users of this file should create a
-# kernel config file which includes this file (which gets the basic hints),
-# then override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-
-# $FreeBSD$
-
-hint.apb.0.at="nexus0"
-# The default APB is on IP6 (irq4); we need to add
-# the two new ones (IP2, IP3) to this and extend
-# the irq ranges appropriately.
-hint.apb.0.irq=4
-
-# ART calibration data mapping device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-
-# uart0
-hint.uart.0.at="apb0"
-# NB: This isn't an ns8250 UART
-hint.uart.0.maddr=0x18020003
-hint.uart.0.msize=0x18
-hint.uart.0.irq=3
-
-# ehci - on IP3
-hint.ehci.0.at="nexus0"
-hint.ehci.0.maddr=0x1b000100
-hint.ehci.0.msize=0x00001000
-hint.ehci.0.irq=1
-
-hint.ehci.1.at="nexus0"
-hint.ehci.1.maddr=0x1b400100
-hint.ehci.1.msize=0x00001000
-hint.ehci.1.irq=1
-
-# PCIe 1: qca955x_int0 (IP2)
-
-# pci - XXX no maddr/msize, grr!
-hint.pcib.0.at="nexus0"
-hint.pcib.0.irq=0
-
-# PCIe 1: qca955x_int1 (IP3)
-hint.pcib.1.at="nexus0"
-hint.pcib.1.irq=1
-
-# IP4
-hint.arge.0.at="nexus0"
-hint.arge.0.maddr=0x19000000
-hint.arge.0.msize=0x1000
-hint.arge.0.irq=2
-
-# IP5
-hint.arge.1.at="nexus0"
-hint.arge.1.maddr=0x1a000000
-hint.arge.1.msize=0x1000
-hint.arge.1.irq=3
-
-# ath0 - connected via IP2 mux
-hint.ath.0.at="nexus0"
-hint.ath.0.maddr=0x18100000
-hint.ath.0.msize=0x20000
-hint.ath.0.irq=0
-hint.ath.0.vendor_id=0x168c
-hint.ath.0.device_id=0x0039
-
-# Where the ART is - last 64k in the first 8MB of flash
-#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# SPI flash
-hint.spi.0.at="nexus0"
-hint.spi.0.maddr=0x1f000000
-hint.spi.0.msize=0x10
-
-hint.mx25l.0.at="spibus0"
-hint.mx25l.0.cs=0
-
-# Watchdog
-hint.ar71xx_wdog.0.at="nexus0"
-
-# The GPIO function and pin mask is configured per-board
-hint.gpio.0.at="apb0"
-hint.gpio.0.maddr=0x18040000
-hint.gpio.0.msize=0x1000
-hint.gpio.0.irq=2
diff --git a/sys/mips/conf/ROCKET_M2HP b/sys/mips/conf/ROCKET_M2HP
deleted file mode 100644
index 381ae486921f..000000000000
--- a/sys/mips/conf/ROCKET_M2HP
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# Specific board setup for the Rocket M2 HP board.
-#
-# This board has the following hardware:
-#
-# + AR7241 CPU SoC
-# + AR9287 Wifi
-# + Integrated switch (XXX speed?)
-# + 8MB flash
-# + 32MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"ROCKET_M2HP"
-hints		"ROCKET_M2HP.hints"
-
-options 	AR71XX_REALMEM=32*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-# Limit inlines
-makeoptions	INLINE_LIMIT=768
-
-# We bite the performance overhead for now; the kernel won't
-# fit if the mutexes are inlined.
-options 	MUTEX_NOINLINE
-options 	RWLOCK_NOINLINE
-options 	SX_NOINLINE
-
-# There's no need to enable swapping on this platform.
-options 	NO_SWAPPING
-
-# For DOS - enable if required
-# options 	MSDOSFS
-
-# uncompress - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Not enough space for these..
-nooptions 	INVARIANTS
-nooptions 	INVARIANT_SUPPORT
-nooptions 	WITNESS
-nooptions 	WITNESS_SKIPSPIN
-nooptions 	DEBUG_REDZONE
-nooptions 	DEBUG_MEMGUARD
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Options needed for the EEPROM based calibration/PCI configuration data.
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO		# Export an MDIO bus separate from arge
-device		miiproxy		# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# Enable GPIO
-device         gpio
-device         gpioled
diff --git a/sys/mips/conf/ROCKET_M2HP.hints b/sys/mips/conf/ROCKET_M2HP.hints
deleted file mode 100644
index a2125bfb7ee5..000000000000
--- a/sys/mips/conf/ROCKET_M2HP.hints
+++ /dev/null
@@ -1,103 +0,0 @@
-# $FreeBSD$
-
-# arge1 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Override MAC Address with the one on EEPROM
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge0: dedicated switch port; RMII; dedicated PHY 4 on switch, connected
-# via internal switch MDIO bus.
-hint.arge.0.media=100           # Map to 100/full
-hint.arge.0.fduplex=1           #
-hint.arge.0.phymask=0x10        # PHY4
-hint.arge.0.mdio=mdioproxy1     # .. off of the switch mdiobus
-
-# arge1: nail to 1000/full, RMII - connected to the switch
-hint.arge.1.media=1000          # Map to 1000/full
-hint.arge.1.fduplex=1           #
-hint.arge.1.phymask=0x0         # no directly mapped PHYs
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1       # We need to be explicitly told this
-hint.arswitch.0.numphys=4       # 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1       # Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=0      # No, not RGMII
-hint.arswitch.0.is_gmii=0       # No, not GMII
-
-# ath0 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# ath
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# GPIO pins
-# Pin 0: red led (sig1)
-# Pin 1: yellow led (sig2)
-# Pin 11: green len (sig3)
-# Pin 7: green len (sig4)
-# Pin 12: Reset switch
-hint.gpio.0.pinmask=0x1883
-
-# Signal leds
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="sig1"
-hint.gpioled.0.pins=0x0001     # pin 0
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="sig2"
-hint.gpioled.1.pins=0x0002     # pin 1
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="sig3"
-hint.gpioled.2.pins=0x0800     # pin 11
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="sig4"
-hint.gpioled.3.pins=0x0080     # pin 7
-
-# GEOM_MAP
-#
-# Rocket M2 HP
-#
-# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1024k(kernel),6528k(rootfs),256k(cfg),64k(EEPROM)
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000       # 256k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000       # 64k u-boot-env 
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.3.end=0x007b0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007b0000
-hint.map.4.end=0x007f0000       # 256k cfg
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000       # 64k EEPROM
-hint.map.5.name="eeprom"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/ROUTERSTATION b/sys/mips/conf/ROUTERSTATION
deleted file mode 100644
index 903a3523529e..000000000000
--- a/sys/mips/conf/ROUTERSTATION
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Ubiquiti Routerstation: Boot from onboard flash
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"ROUTERSTATION"
-hints		"ROUTERSTATION.hints"
-
-# XXX Is there an RTC on the RS?
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-# For DOS
-options 	MSDOSFS
-
-# Etherswitch support
-options 	ARGE_MDIO
-device		miiproxy
-device		etherswitch
-device		ukswitch
-
-# Boot path - redboot MFS
-options 	ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\"
diff --git a/sys/mips/conf/ROUTERSTATION.hints b/sys/mips/conf/ROUTERSTATION.hints
deleted file mode 100644
index c5740c035d8f..000000000000
--- a/sys/mips/conf/ROUTERSTATION.hints
+++ /dev/null
@@ -1,52 +0,0 @@
-#
-# $FreeBSD$
-#
-
-# arge0 mdio bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Uncomment this hint for RS (not PRO)
-# PHY20 = 1 << 20
-hint.arge.0.phymask=0x100000
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# should be 100 for RS 
-hint.arge.1.media=100
-hint.arge.1.fduplex=1
-hint.arge.1.phymask=0x0
-hint.arge.1.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# ukswitch
-hint.ukswitch.0.at="mdio0"
-hint.ukswitch.0.phymask=0x30000
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x000000ff
-
-# GPIO 0: Pin 1
-# GPIO 1: Pin 2
-# GPIO 2: RF LED
-# GPIO 3: Pin 3
-# GPIO 4: Pin 4
-# GPIO 5: Pin 5
-# GPIO 6: Pin 6
-# GPIO 7: Pin 7
-
-# RF led
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="rf"
-# pin 2
-hint.gpioled.0.pins=0x0004
-
-# Override this to ensure we definitely point to the last 64K of the
-# 16MiB flash chip in case underlying block size of the flash driver changes.
-hint.redboot.0.fisoffset="0xff0000"
diff --git a/sys/mips/conf/ROUTERSTATION_MFS b/sys/mips/conf/ROUTERSTATION_MFS
deleted file mode 100644
index bce300366bbd..000000000000
--- a/sys/mips/conf/ROUTERSTATION_MFS
+++ /dev/null
@@ -1,21 +0,0 @@
-#
-# Ubiquiti Routerstation: boot from MFS
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"ROUTERSTATION_MFS"
-hints		"ROUTERSTATION.hints"
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-options 	MD_ROOT
-options 	MD_ROOT_SIZE="6144"
diff --git a/sys/mips/conf/RSPRO b/sys/mips/conf/RSPRO
deleted file mode 100644
index 6ae1c8f07e30..000000000000
--- a/sys/mips/conf/RSPRO
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# Routerstation Pro: boot from on-board flash
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"RSPRO"
-hints		"RSPRO.hints"
-
-# RTC - requires hackery in the spibus code to work
-device		pcf2123_rtc
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-# For DOS
-options 	MSDOSFS
-
-# For etherswitch support
-options 	ARGE_MDIO
-device		miiproxy
-device		etherswitch
-device		arswitch
-
-# Boot off of flash
-options 	ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\"
-
diff --git a/sys/mips/conf/RSPRO.hints b/sys/mips/conf/RSPRO.hints
deleted file mode 100644
index 6ed26ec0b9e6..000000000000
--- a/sys/mips/conf/RSPRO.hints
+++ /dev/null
@@ -1,53 +0,0 @@
-# $FreeBSD$
-
-# arge0 mdio bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# arge0: dedicated switch port
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.miimode=3		# RGMII
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# arge1: nail to 1000/full, RGMII - connected to the switch
-hint.arge.1.media=1000		# Map to 1000/full
-hint.arge.1.fduplex=1		#
-hint.arge.1.phymask=0x0		# no directly mapped PHYs
-hint.arge.1.miimode=3		# RGMII
-
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1
-hint.arswitch.0.is_rgmii=1
-hint.arswitch.0.is_gmii=0
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x000000ff
-
-# GPIO 0: Pin 1
-# GPIO 1: Pin 2
-# GPIO 2: RF LED
-# GPIO 3: Pin 3
-# GPIO 4: Pin 4
-# GPIO 5: Pin 5
-# GPIO 6: Pin 6
-# GPIO 7: Pin 7
-
-# RF led
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="rf"
-# pin 2
-hint.gpioled.0.pins=0x0004
-
-# Override this to ensure we definitely point to the last 64K of the
-# 16MiB flash chip in case underlying block size of the flash driver changes.
-hint.redboot.0.fisoffset="0xff0000"
diff --git a/sys/mips/conf/RSPRO_MFS b/sys/mips/conf/RSPRO_MFS
deleted file mode 100644
index 029b4e68bbe9..000000000000
--- a/sys/mips/conf/RSPRO_MFS
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# Ubiquiti Routerstation Pro: boot from MFS
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"RSPRO_MFS"
-hints		"RSPRO.hints"
-
-# RTC - requires hackery in the spibus code to work
-device		pcf2123_rtc
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-# Boot from the first MFS uzip
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-options 	MD_ROOT
-options 	MD_ROOT_SIZE="6144"
diff --git a/sys/mips/conf/RSPRO_STANDALONE b/sys/mips/conf/RSPRO_STANDALONE
deleted file mode 100644
index b0216808a33c..000000000000
--- a/sys/mips/conf/RSPRO_STANDALONE
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# Ubiquiti Routerstation Pro: boot from first DOS-partitioned, BSD
-# sliced flash disk.
-#
-# $FreeBSD$
-#
-
-include		"AR71XX_BASE"
-ident		"RSPRO_STANDALONE"
-hints		"RSPRO.hints"
-
-# RTC - requires hackery in the spibus code to work
-device		pcf2123_rtc
-
-# GEOM modules
-device		geom_redboot	# to get access to the SPI flash partitions
-device		xz
-options 	GEOM_UZIP
-
-# For DOS
-options 	MSDOSFS
-
-# .. first DOS-partitioned, BSD sliced flash disk
-options 	ROOTDEVNAME=\"ufs:da0s1a\"
diff --git a/sys/mips/conf/RT2880_FDT b/sys/mips/conf/RT2880_FDT
deleted file mode 100644
index 6165063d7a1d..000000000000
--- a/sys/mips/conf/RT2880_FDT
+++ /dev/null
@@ -1,77 +0,0 @@
-#
-# RT2880_FDT -- Kernel configuration file for FreeBSD/MIPS RT2880 SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=MZK-W04N-XX.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.rt2880"
-
-ident 		RT2880
-cpu 		CPU_MIPS4KC
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\""ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device 		geom_map
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# CFI support
-device 		cfi
-device 		cfid
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (dwcotg) support
-device 		usb
-device 		mtk_usb_phy
-device 		dwcotg
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/RT3050_FDT b/sys/mips/conf/RT3050_FDT
deleted file mode 100644
index ee1ea1159fd6..000000000000
--- a/sys/mips/conf/RT3050_FDT
+++ /dev/null
@@ -1,78 +0,0 @@
-#
-# RT3050_FDT -- Kernel configuration file for FreeBSD/MIPS RT3050, RT3052 and
-# RT3350 SoCs
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=DIR-600-B1.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		RT3050
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# CFI support
-device 		cfi
-device 		cfid
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (dwcotg) support
-device 		usb
-device 		mtk_usb_phy
-device 		dwcotg
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/RT305X.hints b/sys/mips/conf/RT305X.hints
deleted file mode 100644
index b405202be138..000000000000
--- a/sys/mips/conf/RT305X.hints
+++ /dev/null
@@ -1,137 +0,0 @@
-# $FreeBSD$
-# device.hints
-hint.obio.0.at="nexus0"
-hint.obio.0.maddr=0x10000000
-hint.obio.0.msize=0x10000000
-
-hint.nvram.0.sig=0xe5e60a74
-hint.nvram.0.base=0x1f030000
-hint.nvram.0.maxsize=0x2000
-hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-hint.nvram.1.sig=0x5a045e94
-hint.nvram.1.base=0x1f032000
-hint.nvram.1.maxsize=0x4000
-hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# on-board Ralink Frame Engine
-hint.rt.0.at="nexus0"
-hint.rt.0.maddr=0x10100000
-hint.rt.0.msize=0x10000
-hint.rt.0.irq=3
-# macaddr can be statically set
-#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx"
-
-# on-board Ralink 2872 802.11n core
-hint.rt2860.0.at="nexus0"
-hint.rt2860.0.maddr=0x10180000
-hint.rt2860.0.msize=0x40000
-hint.rt2860.0.irq=4
-
-# uart0
-#hint.uart.0.at="obio0"
-#hint.uart.0.maddr=0x10000C00
-#hint.uart.0.msize=0x100
-#hint.uart.0.irq=12
-#hint.uart.0.flags="0x30"
-
-# uart1
-#hint.uart.1.at="obio0"
-#hint.uart.1.maddr=0x10000500
-#hint.uart.1.msize=0x100
-#hint.uart.1.irq=5
-#hint.uart.1.flags="0x30"
-
-
-# gpio
-# GPIO0  - WPS BTN	IN II IO
-hint.gpiobutton.0.at="gpiobus0"
-hint.gpiobutton.0.pins="0x01"
-hint.gpiobutton.0.name="wps"
-hint.gpiobutton.0.flags="0x0581"
-
-# GPIO7  - MODE SW AP	IN II IO
-hint.gpiobutton.1.at="gpiobus0"
-hint.gpiobutton.1.pins="0x80"
-hint.gpiobutton.1.name="mode_ap"
-hint.gpiobutton.1.flags="0x0581"
-
-# GPIO8  - ST LEDRED	OUT	/* 2pin BiDir RED/BLUE LED */
-# GPIO9  - ST LEDBLUE	OUT
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.pins="0x100"
-hint.gpioled.0.name="status_red"
-hint.gpioled.0.flags="0x0002"
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.pins="0x200"
-#hint.gpioled.1.name="status_blue"
-hint.gpioled.1.name="status"
-hint.gpioled.1.flags="0x0002"
-
-# GPIO10 - RST BTN	IN II IO
-hint.gpiobutton.2.at="gpiobus0"
-hint.gpiobutton.2.pins="0x400"
-hint.gpiobutton.2.name="reset"
-hint.gpiobutton.2.flags="0x0581"
-
-# GPIO11 - MODE SW CL	IN II IO
-hint.gpiobutton.3.at="gpiobus0"
-hint.gpiobutton.3.pins="0x800"
-hint.gpiobutton.3.name="mode_wlan_client"
-hint.gpiobutton.3.flags="0x0581"
-
-# GPIO14 - WPS LED	OUT II IO
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.pins="0x4000"
-hint.gpioled.2.name="wps"
-hint.gpioled.2.flags="0x0182"
-
-
-
-#0x00000000-0x00030000 : "Bootloader"
-#0x00030000-0x00040000 : "Factory"
-#0x00040000-0x00070000 : "Config"
-#0x00070000-0x000b0000 : "Language"
-#0x000b0000-0x001a0000 : "Kernel"
-#0x001a0000-0x01000000 : "RootFS"
-
-hint.map.0.at="cfid0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00030000
-hint.map.0.name="bootloader"
-hint.map.0.readonly=1
-
-hint.map.1.at="cfid0"
-hint.map.1.start=0x00030000
-hint.map.1.end=0x00040000
-hint.map.1.name="factory"
-
-hint.map.2.at="cfid0"
-hint.map.2.start=0x00040000
-hint.map.2.end=0x00800000
-hint.map.2.name="upgrade"
-
-hint.map.3.at="cfid0"
-hint.map.3.start=0x00040000
-hint.map.3.end=0x00050000
-hint.map.3.name="config"
-
-hint.map.4.at="cfid0"
-hint.map.4.start=0x00000000
-hint.map.4.end=0x00000000
-hint.map.4.name="language"
-
-hint.map.5.at="cfid0"
-hint.map.5.start=0x00050000
-hint.map.5.end=0x00150000
-hint.map.5.name="kernel"
-
-hint.map.6.at="cfid0"
-hint.map.6.start=0x00150000
-hint.map.6.end=0x00800000
-hint.map.6.name="rootfs"
-
-
-hint.rt.0.phymask=0x1f
-hint.rt.0.media=100
-hint.rt.0.fduplex=1
-
diff --git a/sys/mips/conf/RT3352_FDT b/sys/mips/conf/RT3352_FDT
deleted file mode 100644
index 18550979e23b..000000000000
--- a/sys/mips/conf/RT3352_FDT
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-# RT3352_FDT -- Kernel configuration file for FreeBSD/MIPS RT3352 SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=DIR-615-H1.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		RT3352
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (ehci, ohci) support
-device 		usb
-device 		mtk_usb_phy
-device 		ehci
-device 		ohci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/RT3883_FDT b/sys/mips/conf/RT3883_FDT
deleted file mode 100644
index 68af94118f07..000000000000
--- a/sys/mips/conf/RT3883_FDT
+++ /dev/null
@@ -1,82 +0,0 @@
-#
-# RT3883_FDT -- Kernel configuration file for FreeBSD/MIPS RT3662 and RT3883
-# SoCs
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=DIR-645.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		RT3883
-cpu 		CPU_MIPS74K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# CFI support
-#device 		cfi
-#device 		cfid
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (dwcotg) support
-device 		usb
-device 		mtk_usb_phy
-device 		dwcotg
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
-
-# For now there's no etherswitch support for RT3662/RT3883
-nodevice 	etherswitch
-nodevice 	mtkswitch
diff --git a/sys/mips/conf/RT5350.hints b/sys/mips/conf/RT5350.hints
deleted file mode 100644
index 61220fe55a9d..000000000000
--- a/sys/mips/conf/RT5350.hints
+++ /dev/null
@@ -1,35 +0,0 @@
-# $FreeBSD$
-# device.hints
-hint.obio.0.at="nexus0"
-hint.obio.0.maddr=0x10000000
-hint.obio.0.msize=0x10000000
-
-hint.mx25l.0.at="spibus0"
-
-#hint.nvram.0.sig=0xe5e60a74
-#hint.nvram.0.base=0x1f030000
-#hint.nvram.0.maxsize=0x2000
-#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic
-#hint.nvram.1.sig=0x5a045e94
-#hint.nvram.1.base=0x1f032000
-#hint.nvram.1.maxsize=0x4000
-#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic
-
-# on-board Ralink Frame Engine
-hint.rt.0.at="nexus0"
-hint.rt.0.maddr=0x10100000
-hint.rt.0.msize=0x10000
-hint.rt.0.irq=3
-# macaddr can be statically set
-#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx"
-
-# on-board Ralink 2872 802.11n core
-hint.rt2860.0.at="nexus0"
-hint.rt2860.0.maddr=0x10180000
-hint.rt2860.0.msize=0x40000
-hint.rt2860.0.irq=4
-
-hint.rt.0.phymask=0x1f
-hint.rt.0.media=100
-hint.rt.0.fduplex=1
-
diff --git a/sys/mips/conf/RT5350_FDT b/sys/mips/conf/RT5350_FDT
deleted file mode 100644
index e8c29ff55d6b..000000000000
--- a/sys/mips/conf/RT5350_FDT
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-# RT5350_FDT -- Kernel configuration file for FreeBSD/MIPS RT5350 SoC
-#
-# This includes all the configurable parts of the kernel.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-#
-# FDT_DTS_FILE should be modified to suit the target board type.
-#
-#makeoptions 	FDT_DTS_FILE=DIR-610-A1.dts
-
-# Start with a base configuration
-include 	"../mediatek/std.mediatek"
-
-ident 		RT5350
-cpu 		CPU_MIPS24K
-
-# Don't build any modules by default
-makeoptions 	MODULES_OVERRIDE=""
-
-# Default rootfs device configuration, should be changed to suit target board
-options 	ROOTDEVNAME=\"ufs:md0.uzip\"
-
-# Support geom_uzip(4) compressed disk images
-device		xz
-options 	GEOM_UZIP
-
-# Support md(4) and md-based rootfs
-device 		md
-options 	MD_ROOT
-
-# Interrupt controller support
-device 		mtk_intr_v1
-
-# UART device support
-nodevice 	uart_ns8250
-device 		uart_dev_mtk
-
-# SPI and SPI flash support
-device 		mtk_spi_v1
-device 		spibus
-device 		mx25l
-
-# GPIO and gpioled support
-device 		mtk_gpio_v1
-device 		gpio
-device 		gpioled
-
-# USB (ehci, ohci) support
-device 		usb
-device 		mtk_usb_phy
-device 		ehci
-device 		ohci
-
-# USB umass(4) storage and da(4) support
-device 		umass
-device 		da
-
-# CAM support, required if umass(4) is enabled above
-device 		pass
-device 		scbus
-
-# Ethernet, BPF and bridge support
-device 		rt
-device 		bpf
-device 		if_bridge
-
-# Extres
-options		EXT_RESOURCES
-device 		clk
diff --git a/sys/mips/conf/TL-ARCHERC7V2 b/sys/mips/conf/TL-ARCHERC7V2
deleted file mode 100644
index 053271fa133c..000000000000
--- a/sys/mips/conf/TL-ARCHERC7V2
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# TP-Link Archer C7 - based on the AP135 reference design.
-#
-# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi,
-# 128MiB RAM, an AR8327 5-port gigabit ethernet switch and
-# a QCA 11ac 5GHz AP NIC.
-#
-# The to things not currently support are the QCA 11ac NIC and
-# PCIe host controllers - there's two of them, and the existing
-# PCIe code here doesn't support that just yet.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default QCA955x parameters
-include         "std.QCA955X"
-
-ident           TL-ARCHERC7V2
-
-# Override hints with board values
-hints           "TL-ARCHERC7V2.hints"
-
-# Force the board memory - this has 128MiB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# yes, this board has a PCIe connected atheros device
-# add ath_pci so it can at least attach things when there's a
-# ath(4) in there, rather than the 11ac chip we don't support.
-device		pci
-device		qca955x_pci
-
-device		ath_pci
-options 	AR71XX_ATH_EEPROM
-device		firmware		# Used by the above
-options 	ATH_EEPROM_FIRMWARE
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# Default to accept
-options		IPFIREWALL_DEFAULT_TO_ACCEPT
diff --git a/sys/mips/conf/TL-ARCHERC7V2.hints b/sys/mips/conf/TL-ARCHERC7V2.hints
deleted file mode 100644
index c8af87cb8f79..000000000000
--- a/sys/mips/conf/TL-ARCHERC7V2.hints
+++ /dev/null
@@ -1,201 +0,0 @@
-# The Archer C7 v2 is based on the AP135-020 board, with
-# TP-Link specific bits (eg flash layout, MAC address, etc.)
-
-# $FreeBSD$
-
-# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
-hint.qca955x_gmac.0.gmac_cfg=0x1
-
-# Use base mac address for wifi; +1 and +2 for arge0/arge1.
-hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00
-hint.ar71xx.0.eeprom_mac_isascii=0
-
-hint.ar71xx_mac_map.0.devid=ath
-hint.ar71xx_mac_map.0.unitid=0
-hint.ar71xx_mac_map.0.offset=0
-hint.ar71xx_mac_map.0.is_local=0
-
-hint.ar71xx_mac_map.1.devid=arge
-hint.ar71xx_mac_map.1.unitid=0
-hint.ar71xx_mac_map.1.offset=1
-hint.ar71xx_mac_map.1.is_local=0
-
-hint.ar71xx_mac_map.2.devid=arge
-hint.ar71xx_mac_map.2.unitid=1
-hint.ar71xx_mac_map.2.offset=2
-hint.ar71xx_mac_map.2.is_local=0
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# mdiobus1 on arge1 - required to bring up arge1?
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# AR8327 - connected via mdiobus0 on arge0
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0	# definitely not the internal switch!
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5	# all ports are PHYs
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=0	# not needed
-hint.arswitch.0.is_gmii=0	# not needed
-
-# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
-# The current code only supports one CPU port.  So hm, what should
-# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?
-
-# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
-# That's currently supposed to be hooked up to CPU port 0.
-
-# Other AR8327 configuration parameters
-
-# AP136-020 parameters
-
-# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII
-
-# AR8327_PAD_MAC_SGMII
-hint.arswitch.0.pad.0.mode=3
-#hint.arswitch.0.pad.0.rxclk_delay_sel=0
-hint.arswitch.0.pad.0.sgmii_delay_en=1
-
-# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII
-
-# AR8327_PAD_MAC_RGMII
-# XXX I think this hooks it up to the internal MAC6
-hint.arswitch.0.pad.6.mode=6
-hint.arswitch.0.pad.6.txclk_delay_en=1
-hint.arswitch.0.pad.6.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.6.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.6.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0xc737c737
-hint.arswitch.0.led.ctrl1=0x00000000
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x00c30c00
-hint.arswitch.0.led.open_drain=0
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.6.force_link=1
-hint.arswitch.0.port.6.speed=1000
-hint.arswitch.0.port.6.duplex=1
-hint.arswitch.0.port.6.txpause=1
-hint.arswitch.0.port.6.rxpause=1
-
-# arge0 - hooked up to AR8327 GMAC6, RGMII
-# set at 1000/full to the switch.
-# so, lock both sides of this connect up to 1000/full;
-# if_arge thus wont change the PLL configuration
-# upon a link status change.
-hint.arge.0.phymask=0x0
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.pll_1000=0x56000000
-
-# MAC for arge0 is the first 6 bytes of the ART
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=5		# SGMII
-hint.arge.1.pll_1000=0x03000101
-
-# MAC for arge1 is the second 6 bytes of the ART
-hint.arge.1.eeprommac=0x1fff0006
-
-# ath0: Where the ART is - last 64k in the flash
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# ath1: it's different; it's a PCIe attached device, so
-# we instead need to teach the PCIe bridge code about it
-# (ie, the 'early pci fixup' stuff that programs the PCIe
-# host registers on the NIC) and then we teach ath where
-# to find it.
-
-# ath1 hint - pcie slot 0
-# hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
-# hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
-
-# ath0 - eeprom comes from here
-# hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# Flash layout - the tplink layout differs to what's passed
-# in via the kernel environment.  What's passed in is based on
-# the AP135, but.. well, TP-Link.
-
-# 128 KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00020000	# 128k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# Kernel
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00020000
-hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.1.name="kernel"
-hint.map.1.readonly=1
-
-# Root
-hint.map.2.at="flash/spi0"
-hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.2.end=0x007d0000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-# 64KiB cfg
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x00fe0000
-hint.map.4.end=0x00ff0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# 64KiB ART
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x00ff0000
-hint.map.6.end=0x01000000	# 64k ART
-hint.map.6.name="ART"
-hint.map.6.readonly=1
-
-# TODO: GPIO config
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x00600000
-
-# Enable GPIO21, GPIO22 output and high - for USB power
-hint.gpio.0.pinon=0x00600000
-
-# TODO: GPIO pin config:
-# LED_WLAN2G       12
-# BTN_RFKILL       13
-# LED_SYSTEM       14
-# LED_QSS          15
-# BTN_RESET        16
-# LED_WLAN5G       17
-# LED_USB1         18
-# LED_USB2         19
-# USB2_POWER       21
-# USB1_POWER       22
-
-# TODO: PCIe isn't showing link; maybe uboot isn't initialising
diff --git a/sys/mips/conf/TL-WDR4300 b/sys/mips/conf/TL-WDR4300
deleted file mode 100644
index 5146658952f7..000000000000
--- a/sys/mips/conf/TL-WDR4300
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# TPLink TL-WDR4300 - AR9344 based dual-band 2x2 wifi
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR934x parameters
-include         "std.AR934X"
-
-ident           TL-WDR4300
-
-# Override hints with board values
-hints           "TL-WDR4300.hints"
-
-# Force the board memory - the base DB120 has 128MB RAM
-options         AR71XX_REALMEM=(128*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_DEBUG
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Yes, this board has a PCI connected atheros device
-options 	AR71XX_ATH_EEPROM
-device		firmware		# Used by the above
-options 	ATH_EEPROM_FIRMWARE
-
-options 	ATH_DEBUG_ALQ
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# This is required for the 2GHz LNAs on the AR9340 SoC.
-# Without this the 2GHz radio is Quite Deaf.
-device		gpio
-device		gpioled
diff --git a/sys/mips/conf/TL-WDR4300.hints b/sys/mips/conf/TL-WDR4300.hints
deleted file mode 100644
index ecf88dc3cfeb..000000000000
--- a/sys/mips/conf/TL-WDR4300.hints
+++ /dev/null
@@ -1,237 +0,0 @@
-# $FreeBSD$
-
-# MAC/ART ? - they're 00:02:03:04:05:06 :(
-
-# ath0 chain0 EXTERNAL_LNA0: 18
-# ath0 chain1 EXTERNAL_LNA1: 19
-# These are configured as GPIO output, init low, then
-# set the GPIO 'type' AR934X_GPIO_OUT_EXT_LNA0/AR934X_GPIO_OUT_EXT_LNA1.
-
-# XXX There's no arge1 on this!
-
-# XXX RFKILL?
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# DB120 GMAC configuration
-# + AR934X_ETH_CFG_RGMII_GMAC0              (1 << 0)
-hint.ar934x_gmac.0.gmac_cfg=0x1
-
-# Board mac address is at 0x1f01fc00.
-# ath0: offset 0
-# ath1: offset -1
-# arge0: offset -2
-# arge1: not hooked up; doesn't matter
-hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00
-hint.ar71xx.0.eeprom_mac_isascii=0
-
-hint.ar71xx_mac_map.0.devid=ath
-hint.ar71xx_mac_map.0.unitid=0
-hint.ar71xx_mac_map.0.offset=0
-hint.ar71xx_mac_map.0.is_local=0
-
-hint.ar71xx_mac_map.1.devid=ath
-hint.ar71xx_mac_map.1.unitid=1
-hint.ar71xx_mac_map.1.offset=-1
-hint.ar71xx_mac_map.1.is_local=0
-
-hint.ar71xx_mac_map.2.devid=arge
-hint.ar71xx_mac_map.2.unitid=0
-hint.ar71xx_mac_map.2.offset=-2
-hint.ar71xx_mac_map.2.is_local=0
-
-# GMAC0 here - connected to an AR8327
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=0
-
-# Other AR8327 configuration parameters
-
-# AR8327_PAD_MAC_RGMII
-hint.arswitch.0.pad.0.mode=6
-hint.arswitch.0.pad.0.txclk_delay_en=1
-hint.arswitch.0.pad.0.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.0.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.0.rxclk_delay_sel=2
-
-# XXX there's no LED management just yet!
-hint.arswitch.0.led.ctrl0=0xc737c737
-hint.arswitch.0.led.ctrl1=0x00000000
-hint.arswitch.0.led.ctrl2=0x00000000
-hint.arswitch.0.led.ctrl3=0x0030c300
-hint.arswitch.0.led.open_drain=0
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# XXX OpenWRT DB120 BSP doesn't have media/duplex set?
-hint.arge.0.phymask=0x0
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.pll_1000=0x06000000
-
-# mdiobus1 on arge1
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# Embedded switch on the AR9344
-# mdio1 is actually created as the AR8327 internal bus; so
-# this pops up as mdio2.
-#
-# XXX TODO: there's no need for AR9344 internal switch; it isn't exposed
-hint.arswitch.1.at="mdio2"
-hint.arswitch.1.is_7240=0
-hint.arswitch.1.is_9340=1
-hint.arswitch.1.numphys=5
-hint.arswitch.1.phy4cpu=0       # phy 4 is not a "CPU port" PHY here
-hint.arswitch.1.is_rgmii=0
-hint.arswitch.1.is_gmii=1       # arge1 <-> switch PHY is GMII
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0		# Nothing attached here (XXX?)
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=1		# GMII
-
-# MAC for arge1 is the second 6 bytes of the ART
-# hint.arge.1.eeprommac=0x1f7f0006
-
-# ART calibration data mapping - for the AR934x AHB device
-hint.ar71xx_caldata.0.at="nexus0"
-hint.ar71xx_caldata.0.order=0
-# Where the ART is - last 64k in the first 8MB of flash
-hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
-hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
-
-# And now tell the ath(4) driver where to look!
-hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
-
-# ath1: it's different; it's a PCIe attached device, so
-# we instead need to teach the PCIe bridge code about it
-# (ie, the 'early pci fixup' stuff that programs the PCIe
-# host registers on the NIC) and then we teach ath where
-# to find it.
-
-# ath1 hint - pcie slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
-
-# ath0 - eeprom comes from here
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# flash layout:
-#
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)
-
-# 128KiB uboot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00020000	# 128k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# kernel
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00020000
-hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-# 1344KiB uImage
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.3.end=0x007d0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=1
-
-# 64KiB cfg
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007d0000
-hint.map.4.end=0x007e0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# 64KiB mib0
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007e0000
-hint.map.5.end=0x007f0000	# 64k mib0
-hint.map.5.name="mib0"
-hint.map.5.readonly=1
-
-# 64KiB ART
-hint.map.6.at="flash/spi0"
-hint.map.6.start=0x007f0000
-hint.map.6.end=0x00800000	# 64k ART
-hint.map.6.name="ART"
-hint.map.6.readonly=1
-
-# GPIO configuration
-# GPIO21 and GPIO22 - USB1 and USB2 power
-# ath0 chain0 EXTERNAL_LNA0: 18, output
-# ath0 chain1 EXTERNAL_LNA1: 19, output
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x0063f800
-
-# Enable GPIO21, GPIO22 output and high - for USB power
-hint.gpio.0.pinon=0x00600000
-
-hint.gpio.0.func.18.gpiofunc=46
-hint.gpio.0.func.18.gpiomode=1	# output, default low
-
-hint.gpio.0.func.19.gpiofunc=47
-hint.gpio.0.func.19.gpiomode=1	# output, default low
-
-# LED QSS - 15
-# LED SYSTEM - 14
-# LED USB1 - 11
-# LED USB2 - 12
-# LED WLAN2G - 13
-
-# SWITCH WPS - 16
-# SWITCH RFKILL - 17
-
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="USB1"
-hint.gpioled.0.pins=0x0800
-hint.gpioled.0.invert=1
-
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="USB2"
-hint.gpioled.1.pins=0x1000
-hint.gpioled.1.invert=1
-
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="WLAN2G"
-hint.gpioled.2.pins=0x2000
-hint.gpioled.2.invert=1
-
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="SYSTEM"
-hint.gpioled.3.pins=0x4000
-hint.gpioled.3.invert=1
-
-hint.gpioled.4.at="gpiobus0"
-hint.gpioled.4.name="QSS"
-hint.gpioled.4.pins=0x8000
-hint.gpioled.4.invert=1
-
-# XXX TODO: WPS/RFKILL switch
diff --git a/sys/mips/conf/TL-WR1043NDv2 b/sys/mips/conf/TL-WR1043NDv2
deleted file mode 100644
index e6b1fd622837..000000000000
--- a/sys/mips/conf/TL-WR1043NDv2
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# TP-Link TL-WR1043nd v2 - based on the AP135 reference design.
-#
-# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi,
-# 64MiB RAM and an AR8327 5-port gigabit ethernet switch.
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default QCA955x parameters
-include         "std.QCA955X"
-
-ident           TL-WR1043NDv2
-
-# Override hints with board values
-hints           "TL-WR1043NDv2.hints"
-
-options         AR71XX_REALMEM=(64*1024*1024)
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# yes, this board has a PCI connected atheros device
-#device		ath_pci
-#options 	AR71XX_ATH_EEPROM
-#device		firmware		# Used by the above
-#options 	ATH_EEPROM_FIRMWARE
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# Default to accept
-options		IPFIREWALL_DEFAULT_TO_ACCEPT
diff --git a/sys/mips/conf/TL-WR1043NDv2.hints b/sys/mips/conf/TL-WR1043NDv2.hints
deleted file mode 100644
index a5b158a129d7..000000000000
--- a/sys/mips/conf/TL-WR1043NDv2.hints
+++ /dev/null
@@ -1,166 +0,0 @@
-# The TP-Link 1043NDv2 is based on the AP135 with a couple of minor
-# differences - well, besides having no 11ac.
-
-# $FreeBSD$
-
-# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
-hint.qca955x_gmac.0.gmac_cfg=0x1
-
-# Use base mac address for wifi; +1 and +2 for arge0/arge1.
-hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00
-hint.ar71xx.0.eeprom_mac_isascii=0
-
-hint.ar71xx_mac_map.0.devid=ath
-hint.ar71xx_mac_map.0.unitid=0
-hint.ar71xx_mac_map.0.offset=0
-hint.ar71xx_mac_map.0.is_local=0
-
-hint.ar71xx_mac_map.1.devid=arge
-hint.ar71xx_mac_map.1.unitid=0
-hint.ar71xx_mac_map.1.offset=1
-hint.ar71xx_mac_map.1.is_local=0
-
-hint.ar71xx_mac_map.2.devid=arge
-hint.ar71xx_mac_map.2.unitid=1
-hint.ar71xx_mac_map.2.offset=2
-hint.ar71xx_mac_map.2.is_local=0
-
-# mdiobus0 on arge0
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# mdiobus1 on arge1 - required to bring up arge1?
-hint.argemdio.1.at="nexus0"
-hint.argemdio.1.maddr=0x1a000000
-hint.argemdio.1.msize=0x1000
-hint.argemdio.1.order=0
-
-# AR8327 - connected via mdiobus0 on arge0
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0	# definitely not the internal switch!
-hint.arswitch.0.is_9340=0	# not the internal switch!
-hint.arswitch.0.numphys=5	# all ports are PHYs
-hint.arswitch.0.phy4cpu=0
-hint.arswitch.0.is_rgmii=0	# not needed
-hint.arswitch.0.is_gmii=0	# not needed
-
-# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
-# The current code only supports one CPU port.  So hm, what should
-# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?
-
-# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
-# That's currently supposed to be hooked up to CPU port 0.
-
-# Other AR8327 configuration parameters
-
-# AP136-020 parameters
-
-# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII
-
-# AR8327_PAD_MAC_SGMII
-hint.arswitch.0.pad.0.mode=3
-#hint.arswitch.0.pad.0.rxclk_delay_sel=0
-hint.arswitch.0.pad.0.sgmii_delay_en=1
-
-# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII
-
-# AR8327_PAD_MAC_RGMII
-hint.arswitch.0.pad.6.mode=6
-hint.arswitch.0.pad.6.txclk_delay_en=1
-hint.arswitch.0.pad.6.rxclk_delay_en=1
-# AR8327_CLK_DELAY_SEL1
-hint.arswitch.0.pad.6.txclk_delay_sel=1
-# AR8327_CLK_DELAY_SEL2
-hint.arswitch.0.pad.6.rxclk_delay_sel=2
-
-hint.arswitch.0.led.ctrl0=0xcc35cc35
-hint.arswitch.0.led.ctrl1=0xca35ca35
-hint.arswitch.0.led.ctrl2=0xc935c935
-hint.arswitch.0.led.ctrl3=0x03ffff00
-int.arswitch.0.led.open_drain=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.0.force_link=1
-hint.arswitch.0.port.0.speed=1000
-hint.arswitch.0.port.0.duplex=1
-hint.arswitch.0.port.0.txpause=1
-hint.arswitch.0.port.0.rxpause=1
-
-# force_link=1 is required for the rest of the parameters
-# to be configured.
-hint.arswitch.0.port.6.force_link=1
-hint.arswitch.0.port.6.speed=1000
-hint.arswitch.0.port.6.duplex=1
-hint.arswitch.0.port.6.txpause=1
-hint.arswitch.0.port.6.rxpause=1
-
-# arge0 - hooked up to AR8327 GMAC6, RGMII
-# set at 1000/full to the switch.
-# so, lock both sides of this connect up to 1000/full;
-# if_arge thus wont change the PLL configuration
-# upon a link status change.
-hint.arge.0.phymask=0x0
-hint.arge.0.miimode=3           # RGMII
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.pll_1000=0x56000000
-
-# arge1 - lock up to 1000/full
-hint.arge.1.phymask=0x0
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.miimode=5		# SGMII
-hint.arge.1.pll_1000=0x03000101
-
-# hint.arge.1.eeprommac=0x1f01fc06
-
-# ath0: Where the ART is - last 64k in the flash
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# 128 KiB u-boot
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00020000	# 128k u-boot
-hint.map.0.name="u-boot"
-hint.map.0.readonly=1
-
-# The TP-Link firmware will put the kernel first (variable size);
-# then the rootfs will be placed hopefully at a 64KiB alignment
-# by whatever calls mktplinkfw.
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00020000
-hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.1.name="kernel"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh"
-hint.map.2.end=0x007d0000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-# 64KiB cfg
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x007d0000
-hint.map.3.end=0x007e0000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-# 64KiB mib0
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007e0000
-hint.map.4.end=0x007f0000
-hint.map.4.name="mib0"
-hint.map.4.readonly=1
-
-# 64KiB ART
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x007f0000
-hint.map.5.end=0x00800000	# 64k ART
-hint.map.5.name="ART"
-hint.map.5.readonly=1
diff --git a/sys/mips/conf/TL-WR740Nv4 b/sys/mips/conf/TL-WR740Nv4
deleted file mode 100644
index 0d5156ffa871..000000000000
--- a/sys/mips/conf/TL-WR740Nv4
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# TP-Link WR740N v4
-#
-# * AR9330 SoC
-# * 32MB RAM
-# * 4MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include         "std.AR933X"
-
-ident           TL-WR740Nv4
-
-# Override hints with board values
-hints           "TL-WR740Nv4.hints"
-
-# Board memory - 32MB
-options         AR71XX_REALMEM=(32*1024*1024)
-
-# i2c GPIO bus
-#device		gpioiic
-#device		iicbb
-#device		iicbus
-#device		iic
-
-# Options required for miiproxy and mdiobus
-options 	ARGE_MDIO	# Export an MDIO bus separate from arge
-device		miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device		etherswitch
-device		arswitch
-
-# read MSDOS formatted disks - USB
-#options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uzip - to boot natively from flash
-device		xz
-options 	GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-# options 	ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-# Note: we don't fit in 4MB flash, so the rootfs must be on USB for now
-options		ROOTDEVNAME=\"ufs:da0\"
diff --git a/sys/mips/conf/TL-WR740Nv4.hints b/sys/mips/conf/TL-WR740Nv4.hints
deleted file mode 100644
index b284a3eb5dbd..000000000000
--- a/sys/mips/conf/TL-WR740Nv4.hints
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# This file adds to the values in AR933X_BASE.hints
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1fff0006
-
-# Where the ART is - last 64k in the flash
-# 0x9fff1000 ?
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# The TL-WR740N v4 is a default AP121 - it comes with 4MB flash.
-#
-# The boot parameters:
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init
-#    mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs),
-#    896k(uImage),64k(NVRAM),64k(ART)
-# bootcmd=bootm 0x9f020000
-#
-# .. so uboot is 128K, there's no ubootenv, and the runtime image starts
-# at 0x9f020000.
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x000020000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00020000
-hint.map.1.end=0x003e0000
-hint.map.1.name="kernel"
-hint.map.1.readonly=0
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x003e0000
-hint.map.2.end=0x003f0000
-hint.map.2.name="cfg"
-hint.map.2.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x003f0000
-hint.map.3.end=0x0x400000
-hint.map.3.name="art"
-hint.map.3.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-# hint.gpio.0.pinmask=0x00fc1803
diff --git a/sys/mips/conf/TP-MR3020 b/sys/mips/conf/TP-MR3020
deleted file mode 100644
index 85c121dee412..000000000000
--- a/sys/mips/conf/TP-MR3020
+++ /dev/null
@@ -1,57 +0,0 @@
-#
-# TP Link MR3020 - an AR9331 based SoC wifi device.
-#
-# This is for the 32 RAM/4 flash part. There is little to no
-# chance that this will ever boot FreeBSD directly from the 3.5MB
-# of flash.  The kernel can fit into the space, but userland is just
-# too big even when stripped down to its limits.
-#
-# * AR9331 SoC
-# * 32MB RAM
-# * 4MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-# * USB powered
-# * USB storage
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include	"std.AR933X"
-
-ident	TP-MR3020
-
-# Override hints with board values
-hints	"TP-MR3020.hints"
-
-# Board memory - 32MB
-options	AR71XX_REALMEM=(32*1024*1024)
-
-# Disable support for paging
-options		NO_SWAPPING
-
-# i2c GPIO bus
-device	gpioiic
-device	iicbb
-device	iicbus
-device	iic
-
-# Options required for miiproxy and mdiobus
-options	ARGE_MDIO	# Export an MDIO bus separate from arge
-device	miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device	etherswitch
-device	arswitch
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options	AR71XX_ENV_UBOOT
-
-# Used for the static uboot partition map
-device	geom_map
-
-# With only 4MB of flash, we are stuck using USB
-# for the rootfs.
-options		ROOTDEVNAME=\"ufs:da0\"
diff --git a/sys/mips/conf/TP-MR3020.hints b/sys/mips/conf/TP-MR3020.hints
deleted file mode 100644
index 1ec954746195..000000000000
--- a/sys/mips/conf/TP-MR3020.hints
+++ /dev/null
@@ -1,96 +0,0 @@
-#
-# This file adds to the values in AR933X_BASE.hints
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
- 
-# There's no need to set the ar933x GMAC configuration bits.
-# This just creates a switch instance and correctly uses it.
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-hint.arge.0.eeprommac=0x1fff0000
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1fff0006
-
-# Where the ART is - last 64k in the flash
-# 0x9fff1000 ?
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# The board 4MiB flash layout in uboot env:
-#
-# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
-
-# However, it boots from 0x9f050000, which is the front of the flsah!
-# Thus the kernel/rootfs are switched around.
-
-# 256KB
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-# 64KB
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=1
-
-# 3648KB
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x003e0000
-hint.map.2.name="kernel"
-hint.map.2.readonly=1
-
-# 64K NVRAM
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x003e0000
-hint.map.3.end=0x003f0000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-# 64K ART
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003f0000
-hint.map.4.end=0x00400000
-hint.map.4.name="art"
-hint.map.4.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-#hint.gpio.0.pinmask=0x001c02ae
-#hint.gpio.0.pinmask=0x00001803
-
-# XXX TODO: the button and LEDs!
diff --git a/sys/mips/conf/TP-MR3040 b/sys/mips/conf/TP-MR3040
deleted file mode 100644
index 6a9c96b09052..000000000000
--- a/sys/mips/conf/TP-MR3040
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# TP Link MR3040 - an AR9331 based SoC wifi device.
-#
-# This is for the 32 RAM/4 flash part. There is little to no
-# chance that this will ever boot FreeBSD directly from the 3.5MB
-# of flash.  The kernel can fit into the space, but userland is just
-# too big even when stripped down to its limits.
-#
-# * AR9331 SoC
-# * 32MB RAM
-# * 4MB flash
-# * Integrated 1x1 2GHz wifi and 10/100 bridge
-# * USB powered
-# * USB storage
-#
-
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR933x parameters
-include	"std.AR933X"
-
-ident	TP-MR3040
-
-# Override hints with board values
-hints	"TP-MR3040.hints"
-
-# Board memory - 32MB
-options	AR71XX_REALMEM=(32*1024*1024)
-
-# i2c GPIO bus
-device	gpioiic
-device	iicbb
-device	iicbus
-device	iic
-
-# Options required for miiproxy and mdiobus
-options	ARGE_MDIO	# Export an MDIO bus separate from arge
-device	miiproxy	# MDIO bus <-> MII PHY rendezvous
-
-device	etherswitch
-device	arswitch
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options	AR71XX_ENV_UBOOT
-
-# uzip - to boot read-only lzma natively from flash
-device		xz
-options 	GEOM_UZIP
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-# Used for the static uboot partition map
-device	geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-# Probably, this should be a USB device as the memory available
-# compressed rootfs is simply too small for FreeBSD
-#options	ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"
-
-# Boot off of a uboot tftp ramdisk kernel image.  Because the flash
-# on this unit is so small, this is the only way to do dev work.
-# For full deployment, you will *have* to use a usb storage device
-# as a rootfs and use the flash to hold the kernel only.
-#options		MD_ROOT         # md device usable as a potential root device
-#options		MD_ROOT_SIZE=10240
-#makeoptions	MFS_IMAGE=/tftpboot/mfsroot-tl-mr3040.img.ulzma
-options		ROOTDEVNAME=\"ufs:da0\"
diff --git a/sys/mips/conf/TP-MR3040.hints b/sys/mips/conf/TP-MR3040.hints
deleted file mode 100644
index dfabb42c14d3..000000000000
--- a/sys/mips/conf/TP-MR3040.hints
+++ /dev/null
@@ -1,101 +0,0 @@
-#
-# This file adds to the values in AR933X_BASE.hints
-#
-# $FreeBSD$
-
-# mdiobus on arge1
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x1a000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-# There's no need to set the ar933x GMAC configuration bits.
-# This just creates a switch instance and correctly uses it.
-
-# Embedded Atheros Switch
-hint.arswitch.0.at="mdio0"
-
-# XXX this should really say it's an AR933x switch, as there
-# are some vlan specific differences here!
-hint.arswitch.0.is_7240=1
-hint.arswitch.0.numphys=4
-hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
-hint.arswitch.0.is_rgmii=0
-hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
-
-# arge0 - MII, autoneg, phy(4)
-hint.arge.0.phymask=0x10	# PHY4
-hint.arge.0.mdio=mdioproxy1	# .. off of the switch mdiobus
-
-# arge1 - GMII, 1000/full
-hint.arge.1.phymask=0x0		# No directly mapped PHYs
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-
-# Where the ART is - last 64k in the flash
-# 0x9fff1000 ?
-hint.ath.0.eepromaddr=0x1fff0000
-hint.ath.0.eepromsize=16384
-
-# The board 16MiB flash layout in uboot env:
-#
-# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
-
-# However, it boots from 0x9f050000, which is the front of the flsah!
-# Thus the kernel/rootfs are switched around.
-
-# 256KB
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-# 64KB
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="uboot-env"
-hint.map.1.readonly=0
-
-# 2752KB
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.2.name="kernel"
-hint.map.2.readonly=0
-
-# 896KB
-hint.map.3.at="flash/spi0"
-hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.3.end=0x003e0000
-hint.map.3.name="rootfs"
-hint.map.3.readonly=0
-
-# 64K NVRAM
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x003e0000
-hint.map.4.end=0x003f0000
-hint.map.4.name="cfg"
-hint.map.4.readonly=0
-
-# 64K ART
-hint.map.5.at="flash/spi0"
-hint.map.5.start=0x003f0000
-hint.map.5.end=0x00400000
-hint.map.5.name="art"
-hint.map.5.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00000000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-#hint.gpio.0.pinmask=0x001c02ae
-#hint.gpio.0.pinmask=0x00001803
-
-# XXX TODO: the button and LEDs!
diff --git a/sys/mips/conf/TP-WN1043ND b/sys/mips/conf/TP-WN1043ND
deleted file mode 100644
index 9a526a791a87..000000000000
--- a/sys/mips/conf/TP-WN1043ND
+++ /dev/null
@@ -1,63 +0,0 @@
-#
-# TP-1043ND -- Kernel configuration file for the TP-Link WR-1043ND
-#
-# $FreeBSD$
-#
-
-#NO_UNIVERSE
-
-# Include the default AR913x parameters common to all AR913x SoC users.
-include         "std.AR91XX"
-
-ident           TP-WN1043ND
-
-# Override hints with board values
-hints           "TP-WN1043ND.hints"
-
-# Force the board memory - 32mb
-options         AR71XX_REALMEM=32*1024*1024
-
-# i2c GPIO bus
-device		gpio
-device		gpioiic
-device		iicbb
-device		iicbus
-device		iic
-
-# ethernet switch device
-device		etherswitch
-
-# RTL8366RB support
-device		mdio
-device		rtl8366rb
-
-# read MSDOS formatted disks - USB
-options 	MSDOSFS
-
-# Enable the uboot environment stuff rather then the
-# redboot stuff.
-options 	AR71XX_ENV_UBOOT
-
-# uncompress - to boot natively from flash
-device		xz
-options        GEOM_UZIP
-
-# Used for the static uboot partition map
-device          geom_map
-
-# Boot off of the rootfs, as defined in the geom_map setup.
-options                ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
-
-# We bite the performance overhead for now; the kernel won't
-# fit if the mutexes are inlined.
-options        MUTEX_NOINLINE
-options        RWLOCK_NOINLINE
-options        SX_NOINLINE
-
-# Remove everything we don't need.  We need a _really_ small kernel!
-nooptions      INVARIANTS
-nooptions      INVARIANT_SUPPORT
-nooptions      WITNESS
-nooptions      WITNESS_SKIPSPIN
-nooptions      DEBUG_REDZONE
-nooptions      DEBUG_MEMGUARD
diff --git a/sys/mips/conf/TP-WN1043ND.hints b/sys/mips/conf/TP-WN1043ND.hints
deleted file mode 100644
index c8dc12b411e4..000000000000
--- a/sys/mips/conf/TP-WN1043ND.hints
+++ /dev/null
@@ -1,133 +0,0 @@
-#
-# This file adds to the values in AR91XX_BASE.hints.
-#
-# $FreeBSD$
-
-# Hard-code the PHY for now, until there's switch phy support.
-# hint.arge.0.phymask=0x000c
-hint.arge.0.phymask=0x0000
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-# Where is the MAC address stored in flash for this particular unit.
-hint.arge.0.eeprommac=0x1f01fc00
-
-# This isn't used, but configure it anyway.
-# This should eventually just not be configured, but the if then
-# needs to be properly disabled or spurious interrupts occur.
-hint.arge.1.phymask=0x0
-
-# Where the ART is
-hint.ath.0.eepromaddr=0x1fff1000
-
-#
-# Define a slightly custom flash layout.
-
-# The default flash layout:
-#
-# 128k: uboot
-# 1024k: kernel
-# 4096k: rootfs
-# 2816: unknown
-# 64k: board config?
-# 64k: ART
-#
-# from printenv:
-# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init
-#    mtdparts=ar9100-nor0:128k(u-boot),1024k(kernel),4096k(rootfs),64k(art)
-
-# This isn't a lot of space!
-# So:
-# 128k: uboot
-# 2048k: kernel
-# 5888k: rootfs
-# 64k: config
-# 64k: ART
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00020000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00020000
-hint.map.1.end="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.1.name="kernel"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.2.end=0x007e0000
-hint.map.2.name="rootfs"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x007e0000
-hint.map.3.end=0x007f0000
-hint.map.3.name="cfg"
-hint.map.3.readonly=0
-
-# This is radio calibration section.  It is (or should be!) unique
-# for each board, to take into account thermal and electrical differences
-# as well as the regulatory compliance data.
-#
-hint.map.4.at="flash/spi0"
-hint.map.4.start=0x007f0000
-hint.map.4.end=0x00800000
-hint.map.4.name="art"
-hint.map.4.readonly=1
-
-# GPIO specific configuration block
-
-# Don't flip on anything that isn't already enabled.
-# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
-# not used here.
-hint.gpio.0.function_set=0x00002000
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x001c02ae
-
-# pin 1 - USB (LED)
-# pin 2 - System (LED)
-# Pin 3 - Reset (input)
-# Pin 5 - QSS (LED)
-# Pin 7 - QSS Button (input)
-# Pin 8 - wired into the chip reset line
-# Pin 9 - WLAN
-# Pin 10 - UART TX (not GPIO)
-# Pin 13 - UART RX (not GPIO)
-# Pin 18 - RTL8366RB switch data line
-# Pin 19 - RTL8366RB switch clock line
-# Pin 20 - "GPIO20"
-
-# LEDs are configured separately and driven by the LED device
-#hint.gpioled.0.at="gpiobus0"
-#hint.gpioled.0.name="usb"
-#hint.gpioled.0.pins=0x0002
-
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="system"
-hint.gpioled.1.pins=0x0004
-
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="qss"
-hint.gpioled.2.pins=0x0020
-
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="wlan"
-hint.gpioled.3.pins=0x0200
-
-# GPIO I2C bus
-hint.gpioiic.0.at="gpiobus0"
-hint.gpioiic.0.pins=0xc0000
-hint.gpioiic.0.scl=1
-hint.gpioiic.0.sda=0
-
-# I2C bus
-# Don't be strict about I2C protocol - the relaxed semantics are required
-# by the realtek switch PHY.
-hint.iicbus.0.strict=0
-
-# Bit bang bus - override default delay
-#hint.iicbb.0.udelay=3
diff --git a/sys/mips/conf/WZR-300HP b/sys/mips/conf/WZR-300HP
deleted file mode 100644
index dd767888a1e9..000000000000
--- a/sys/mips/conf/WZR-300HP
+++ /dev/null
@@ -1,52 +0,0 @@
-#
-# Specific board setup for the Buffalo Airstation WZR-300HP
-#
-# The WZR-300HP has the following hardware:
-#
-# + AR7242 CPU SoC
-# + AR9280 5GHz 11n
-# + AR8136 Gigabit switch
-# + 2 m25ll128 based 16MB flash
-# + 64MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"std.AR724X"
-ident		"WZR-300HP"
-hints		"WZR-300HP.hints"
-
-options 	AR71XX_REALMEM=64*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-options 	BOOTVERBOSE
-
-# GEOM modules
-device		geom_map	# to get access to the SPI flash partitions
-device		xz
-options		GEOM_UZIP
-
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options         ARGE_MDIO               # Export an MDIO bus separate from arge
-device          miiproxy                # MDIO bus <-> MII PHY rendezvous
-
-device          etherswitch
-device          arswitch
-
-# hwpmc
-device		hwpmc_mips24k
-device		hwpmc
-
-# load these via modules, shrink kernel
-nodevice	if_bridge
-nodevice	bridgestp
-options		RANDOM_LOADABLE
diff --git a/sys/mips/conf/WZR-300HP.hints b/sys/mips/conf/WZR-300HP.hints
deleted file mode 100644
index 2f22198879da..000000000000
--- a/sys/mips/conf/WZR-300HP.hints
+++ /dev/null
@@ -1,187 +0,0 @@
-# $FreeBSD$
-
-# arge0 is connected to the LAN side of the switch PHY.
-# arge1 is connected to the single port WAN side of the switch PHY.
-
-# arge1 MDIO bus
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-hint.arge.0.phymask=0x1
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.eeprommac=0x1f05120c
-hint.arge.0.mdio=mdioproxy1     # .. off of the switch mdiobus
-
-
-# arge1: nail to 1000/full, RMII - connected to the switch
-#hint.arge.1.media=1000          # Map to 1000/full
-#hint.arge.1.fduplex=1           #
-#hint.arge.1.phymask=0x0         # no directly mapped PHYs
-
-#
-# AR7240 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=1       # We need to be explicitly told this
-hint.arswitch.0.numphys=4       # 4 active switch PHYs (PHY 0 -> 3)
-hint.arswitch.0.phy4cpu=1       # Yes, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=1      # No, not RGMII
-hint.arswitch.0.is_gmii=0       # No, not GMII
-
-# ath0 - slot 0
-hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1f051000
-hint.pcib.0.bus.0.0.0.ath_fixup_size=4096
-
-# .. and now, telling each ath(4) NIC where to find the firmware
-# image.
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
-
-# Inherited from AR724X_BASE.hints
-#hint.mx25l.0.at="spibus0"
-#hint.mx25l.0.cs=0
-# This board has two 16 MB flash devices on difference Chip Select pins
-hint.mx25l.1.at="spibus0"
-hint.mx25l.1.cs=1
-
-
-# Geom MAP
-
-# The WRZ-300HP has 2 16MB flash part - HOWEVER, the 64k caldata isn't
-# at the end of the flash. It's ~ 328KB into the flash image.
-
-# mtdparts=ar7240-nor0:
-#  256k(u-boot)
-#   64k(u-boot-env)
-#   64k@320k(ART)
-# 1152k@384k(uImage)
-# 6592k@1536k(rootfs)
-#   64k@8128k(properties)
-
-# Uboot lies like a lying liar.  OpenWRT does this:
-# [    0.570000] Concatenating MTD devices:
-# [    0.570000] (0): "spi0.0"
-# [    0.570000] (1): "spi0.1"
-# [    0.580000] into device "flash"
-# [    0.580000] Creating 7 MTD partitions on "flash":
-# [    0.590000] 0x000000000000-0x000000040000 : "u-boot"
-# [    0.600000] 0x000000040000-0x000000050000 : "u-boot-env"
-# [    0.600000] 0x000000050000-0x000000060000 : "art"
-# [    0.610000] 0x000000060000-0x000000160000 : "kernel"
-# [    0.620000] 0x000000160000-0x000001ff0000 : "rootfs"
-# [    0.620000] mtd: partition "rootfs" set to be root filesystem
-# [    0.630000] mtd: partition "rootfs_data" created automatically, ofs=330000, len=1CC0000 
-# [    0.640000] 0x000000330000-0x000001ff0000 : "rootfs_data"
-# [    0.650000] 0x000001ff0000-0x000002000000 : "user_property"
-# [    0.650000] 0x000000060000-0x000001ff0000 : "firmware"
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=  0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=  0x00050000       # 64k u-boot-env
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=  0x00060000       # 64k ART
-hint.map.2.name="ART"
-hint.map.2.readonly=1
-
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00060000
-hint.map.3.end=  "search:0x00100000:0x10000:.!/bin/sh"
-hint.map.3.name="kernel"
-hint.map.3.readonly=1
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start="search:0x00100000:0x10000:.!/bin/sh"
-hint.map.4.end=  0x00FF0000
-hint.map.4.name="rootfs"
-hint.map.4.readonly=1
-
-#hint.map.5.at="flash/spi1"
-hint.map.5.at="flash/spi1"
-hint.map.5.start=0x00FF0000
-hint.map.5.end=  0x01000000
-hint.map.5.name="cfg"
-hint.map.5.readonly=0
-
-# GPIO specific configuration block
-
-#define GPIO_PIN_INPUT          0x0001  /* input direction */
-#define GPIO_PIN_OUTPUT         0x0002  /* output direction */
-#define GPIO_PIN_OPENDRAIN      0x0004  /* open-drain output */
-#define GPIO_PIN_PUSHPULL       0x0008  /* push-pull output */
-#define GPIO_PIN_TRISTATE       0x0010  /* output disabled */
-#define GPIO_PIN_PULLUP         0x0020  /* internal pull-up enabled */
-#define GPIO_PIN_PULLDOWN       0x0040  /* internal pull-down enabled */
-#define GPIO_PIN_INVIN          0x0080  /* invert input */
-#define GPIO_PIN_INVOUT         0x0100  /* invert output */
-#define GPIO_PIN_PULSATE        0x0200  /* pulsate in hardware */
-  
-# Pin 1  - SCK
-# Pin 2  - SDA
-# Pin 3  - test 2
-# Pin 4  - test 3
-# Pin 5  - USB (LED Blue)
-# Pin 6  - test a
-# Pin 7  - Security (LED Orange)
-# Pin 8  - Router (LED Green)
-# Pin 9  - Movie Engine On (LED Blue)
-# Pin 10 - Movie Engine Off (LED Blue)
-# Pin 11 - test a
-# Pin 12 - test a
-# Pin 13 - test a
-# Pin 14 - USB Power (turn on by default)
-# Pin 15 - test a
-# Pin 16 - test a
-# Pin 17 - diag (LED red)
-
-# Don't flip on anything that isn't already enabled.
-# Force on USB power pin 14
-#hint.gpio.0.function_set=0x00000000
-#hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x000103D0
-
-hint.gpio.0.pinon=0x00000000
-
-hint.gpioiic.0.at="gpiobus0"
-hint.gpioiic.0.pins=0x0003
-hint.gpioiic.0.sda=0
-hint.gpioiic.0.scl=1
-
-# LEDs are configured separately and driven by the LED device
-# usb tested good
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="blue-usb"
-hint.gpioled.0.pins=0x00000010
-
-hint.gpioled.1.at="gpiobus0"
-hint.gpioled.1.name="orange-security"
-hint.gpioled.1.pins=0x00000040
-
-hint.gpioled.2.at="gpiobus0"
-hint.gpioled.2.name="green-router"
-hint.gpioled.2.pins=0x00000080
-
-hint.gpioled.3.at="gpiobus0"
-hint.gpioled.3.name="blue-movie-engine-on"
-hint.gpioled.3.pins=0x00000100
-
-hint.gpioled.4.at="gpiobus0"
-hint.gpioled.4.name="blue-movie-engine-off"
-hint.gpioled.4.pins=0x00000200
-
-hint.gpioled.5.at="gpiobus0"
-hint.gpioled.5.name="red-diag"
-hint.gpioled.5.pins=0x00010000
diff --git a/sys/mips/conf/WZR-HPAG300H b/sys/mips/conf/WZR-HPAG300H
deleted file mode 100644
index 3337af682f2c..000000000000
--- a/sys/mips/conf/WZR-HPAG300H
+++ /dev/null
@@ -1,52 +0,0 @@
-#
-# Specific board setup for the Buffalo Airstation WZR-HPAG300H
-#
-# The WZR-HPAG300H has the following hardware:
-#
-# + AR7161 CPU SoC
-# + 2x AR9280 5GHz 11n
-# + AR8136 Gigabit switch
-# + 2 m25ll128(really w25q128)  based 16MB flash
-# + 128MB RAM
-# + uboot environment
-
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-include		"AR71XX_BASE"
-ident		"WZR-HPAG300H"
-hints		"WZR-HPAG300H.hints"
-
-options 	AR71XX_REALMEM=128*1024*1024
-
-options 	AR71XX_ENV_UBOOT
-
-options 	BOOTVERBOSE
-
-# GEOM modules
-device		xz
-options		GEOM_UZIP
-device		geom_map	# to get access to the SPI flash partitions
-
-options 	ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\"
-
-options 	AR71XX_ATH_EEPROM	# Fetch EEPROM/PCI config from flash
-options 	ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-device		firmware		# Used by the above
-
-# Options required for miiproxy and mdiobus
-options         ARGE_MDIO               # Export an MDIO bus separate from arge
-device          miiproxy                # MDIO bus <-> MII PHY rendezvous
-
-device          etherswitch
-device          arswitch
-
-# hwpmc
-device		hwpmc_mips24k
-device		hwpmc
-
-# load these via modules, shrink kernel
-nodevice	if_bridge
-nodevice	bridgestp
-options		RANDOM_LOADABLE
diff --git a/sys/mips/conf/WZR-HPAG300H.hints b/sys/mips/conf/WZR-HPAG300H.hints
deleted file mode 100644
index eb662f442451..000000000000
--- a/sys/mips/conf/WZR-HPAG300H.hints
+++ /dev/null
@@ -1,132 +0,0 @@
-# $FreeBSD$
-
-# arge0 is connected to the LAN side of the switch PHY.
-# arge1 is connected to the single port WAN side of the switch PHY.
-
-hint.argemdio.0.at="nexus0"
-hint.argemdio.0.maddr=0x19000000
-hint.argemdio.0.msize=0x1000
-hint.argemdio.0.order=0
-
-hint.arge.0.phymask=0x0
-hint.arge.0.media=1000
-hint.arge.0.fduplex=1
-hint.arge.0.eeprommac=0x1f05120c
-hint.arge.0.mdio=mdioproxy0     # .. off of the switch mdiobus
-hint.arge.0.miimode=3 
-
-hint.arge.1.phymask=0x10
-hint.arge.1.media=1000
-hint.arge.1.fduplex=1
-hint.arge.1.eeprommac=0x1f05520c
-hint.arge.1.mdio=mdioproxy1     # .. off of the switch mdiobus
-hint.arge.1.miimode=3 
-
-#
-# AR8316 switch config
-#
-hint.arswitch.0.at="mdio0"
-hint.arswitch.0.is_7240=0       # We need to be explicitly told this
-hint.arswitch.0.numphys=4       # 5 active switch PHYs (PHY 0 -> 4)
-hint.arswitch.0.phy4cpu=1       # No, PHY 4 == dedicated PHY
-hint.arswitch.0.is_rgmii=1      # Yes, is RGMII
-hint.arswitch.0.is_gmii=0       # No, not GMII
-
-# ath0 - slot 17
-hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f051000
-hint.pcib.0.bus.0.17.0.ath_fixup_size=4096
-
-# ath1 - slot 18
-hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f055000
-hint.pcib.0.bus.0.18.0.ath_fixup_size=4096
-# .. and now, telling each ath(4) NIC where to find the firmware
-# image.
-hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware"
-hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware"
-
-# Inherited from AR71XX_BASE.hints
-#hint.mx25l.0.at="spibus0"
-#hint.mx25l.0.cs=0
-# This board has two 16 MB flash devices on difference Chip Select pins
-hint.mx25l.1.at="spibus0"
-hint.mx25l.1.cs=1
-
-
-# Geom MAP
-
-hint.map.0.at="flash/spi0"
-hint.map.0.start=0x00000000
-hint.map.0.end=0x00040000
-hint.map.0.name="uboot"
-hint.map.0.readonly=1
-
-hint.map.1.at="flash/spi0"
-hint.map.1.start=0x00040000
-hint.map.1.end=0x00050000
-hint.map.1.name="u-boot-env"
-hint.map.1.readonly=1
-
-hint.map.2.at="flash/spi0"
-hint.map.2.start=0x00050000
-hint.map.2.end=0x00060000
-hint.map.2.name="ART"
-hint.map.2.readonly=1
-
-# requires a 1M alignment and padding in the image.
-# make sure you are using conv=sync and bs=1M in your dd
-hint.map.3.at="flash/spi0"
-hint.map.3.start=0x00060000
-hint.map.3.end="search:0x00160000:0x100000:.!/bin/sh"
-hint.map.3.name="kernel"
-hint.map.3.readonly=1
-
-hint.map.4.at="flash/spi0"
-hint.map.4.start="search:0x00160000:0x100000:.!/bin/sh"
-hint.map.4.end=0x01000000
-hint.map.4.name="rootfs"
-hint.map.4.readonly=1
-
-hint.map.5.at="flash/spi1"
-hint.map.5.start=0x00FF0000
-hint.map.5.end=0x01000000
-hint.map.5.name="cfg"
-hint.map.5.readonly=0
-
-# Pin 1  - SCK
-# Pin 2  - SDA
-# Pin 3  - usb 
-# Pin 4  - 
-# Pin 5  - aoss
-# Pin 6  - router auto
-# Pin 7  - router off
-# Pin 8  - movie engine
-# Pin 9  - 
-# Pin 10 - 
-# Pin 11 - reset button
-# Pin 12 - CS0
-# Pin 13 - CS1
-# Pin 14 - 
-# Pin 15 - 
-# Pin 16 - 
-# Pin 17 - 
-
-# Don't flip on anything that isn't already enabled.
-# Force on CS lines for flash devices, apparently this isn't done
-# by uboot in normal booting.  No idea why. 
-hint.gpio.0.function_set=0x00003004
-hint.gpio.0.function_clear=0x00000000
-
-# These are the GPIO LEDs and buttons which can be software controlled.
-hint.gpio.0.pinmask=0x0001
-
-hint.gpio.0.pinon=0x00000004
-
-hint.gpioiic.0.at="gpiobus0"
-#hint.gpioiic.0.pins=0x0003
-hint.gpioiic.0.sda=0
-hint.gpioiic.0.scl=1
-
-# LEDs are configured separately and driven by the LED device
-hint.gpioled.0.at="gpiobus0"
-hint.gpioled.0.name="red-diag"
-hint.gpioled.0.pins=0x0001
diff --git a/sys/mips/conf/X1000 b/sys/mips/conf/X1000
deleted file mode 100644
index 83bafd71ca4c..000000000000
--- a/sys/mips/conf/X1000
+++ /dev/null
@@ -1,96 +0,0 @@
-# X1000 -- Kernel config for Ingenic X1000 boards
-#
-# $FreeBSD$
-
-#NO_UNIVERSE
-
-ident		X1000
-machine		mips mipsel
-cpu		CPU_XBURST
-cpu		CPU_MIPS4KC
-
-makeoptions	KERNLOADADDR=0x80020000
-makeoptions	ARCH_FLAGS="-march=mips32r2"
-
-# Don't build any modules yet.
-makeoptions	MODULES_OVERRIDE=""
-
-files		"../ingenic/files.x1000"
-hints		"X1000.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	INTRNG			# Borrow interrupt code from ARM
-options 	MIPS_NIRQ=264		# 8 cpuintc + 64 intc + 6 * 23 gpio
-
-options 	DDB
-options 	KDB
-options 	BREAK_TO_DEBUGGER
-
-options 	COMPAT_FREEBSD10
-options 	COMPAT_FREEBSD11
-options 	COMPAT_FREEBSD12
-options 	COMPAT_FREEBSD13
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	NFSLOCKD		#Network Lock Manager
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-options 	FFS			#Berkeley Fast Filesystem
-options 	SOFTUPDATES		#Enable FFS soft updates support
-options 	UFS_ACL			#Support for access control lists
-options 	UFS_DIRHASH		#Improve performance on big directories
-#options 	ROOTDEVNAME=\"ufs:ada0\"
-
-options 	GEOM_LABEL		# Provides labelization
-options 	GEOM_PART_GPT		# GUID Partition Tables.
-#options 	GEOM_RAID		# Soft RAID functionality.
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-device		loop
-device		ether
-#device		le
-device		miibus
-device		bpf
-device		md
-device		uart
-
-device		fdt_pinctrl
-
-device		clk
-device		regulator
-options		EXT_RESOURCES
-
-device		gpio
-
-device 		scbus
-device 		da
-
-device		mmc
-device		mmcsd
-
-# USB support
-#options 	USB_DEBUG	# enable debug msgs
-#options 	USB_HOST_ALIGN=128 # L2 cache line size
-#device		ohci		# OHCI PCI->USB interface
-#device		ehci		# EHCI PCI->USB interface (USB 2.0)
-#device		dwcotg		# DesignWare HS OTG controller
-#device		usb		# USB Bus (required)
-#device		udbp		# USB Double Bulk Pipe devices
-#device		uhid		# "Human Interface Devices"
-#device		ulpt		# Printer
-#device		umass		# Disks/Mass storage - Requires scbus and da
-#device		ums		# Mouse
-
-# FDT support
-options 	FDT
diff --git a/sys/mips/conf/X1000.hints b/sys/mips/conf/X1000.hints
deleted file mode 100644
index 6986b85032de..000000000000
--- a/sys/mips/conf/X1000.hints
+++ /dev/null
@@ -1,2 +0,0 @@
-# $FreeBSD$
-# device.hints
diff --git a/sys/mips/conf/XLP.hints b/sys/mips/conf/XLP.hints
deleted file mode 100644
index 8597c928063c..000000000000
--- a/sys/mips/conf/XLP.hints
+++ /dev/null
@@ -1,6 +0,0 @@
-# $FreeBSD$
-
-# RTC
-hint.ds13rtc.0.at="iicbus1"
-hint.ds13rtc.0.addr=0xd0
-hint.ds13rtc.0.compatible="dallas,ds1374"
diff --git a/sys/mips/conf/XLP64 b/sys/mips/conf/XLP64
deleted file mode 100644
index 537091458e00..000000000000
--- a/sys/mips/conf/XLP64
+++ /dev/null
@@ -1,29 +0,0 @@
-# XLP64 -- Generic kernel configuration file for FreeBSD/mips
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-machine 	mips mips64
-ident           XLP64
-
-makeoptions	ARCH_FLAGS="-march=mips64r2"
-makeoptions	KERNLOADADDR=0xffffffff80100000
-
-include		"std.XLP"
-
-makeoptions	TRAMPLOADADDR=0xffffffff85000000
-makeoptions	TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64"
diff --git a/sys/mips/conf/XLPN32 b/sys/mips/conf/XLPN32
deleted file mode 100644
index cf8dbcffb020..000000000000
--- a/sys/mips/conf/XLPN32
+++ /dev/null
@@ -1,34 +0,0 @@
-# XLPN32 -- Generic kernel configuration file for FreeBSD/mips
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-#    https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files. 
-# If you are in doubt as to the purpose or necessity of a line, check first 
-# in NOTES.
-#
-# $FreeBSD$
-
-machine 	mips mipsn32
-ident           XLPN32
-
-makeoptions	KERNLOADADDR=0x80100000
-
-include		"std.XLP"
-
-nooption 	DDB
-nooption 	KDB
-nooption 	GDB
-nooption 	BREAK_TO_DEBUGGER
-nooption 	ALT_BREAK_TO_DEBUGGER
-
-makeoptions	TRAMPLOADADDR=0xffffffff85000000
-makeoptions	TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64"
diff --git a/sys/mips/conf/std.AR5312 b/sys/mips/conf/std.AR5312
deleted file mode 100644
index d57eea069e3f..000000000000
--- a/sys/mips/conf/std.AR5312
+++ /dev/null
@@ -1,79 +0,0 @@
-#
-# AR5312 -- Kernel configuration file for FreeBSD/MIPS for Atheros 5312 systems
-#
-# This includes all the common drivers for the AR5312 boards
-#
-# $FreeBSD$
-#
-
-machine		mips mips
-#ident		AR5312_BASE
-cpu		CPU_MIPS4KC
-makeoptions	KERNLOADADDR=0x80050000
-
-makeoptions	MODULES_OVERRIDE=""
-
-files		"../atheros/ar531x/files.ar5315"
-
-options 	INTRNG
-options 	AR531X_1ST_GENERATION
-
-# For now, hints are per-board.
-
-hints		"AR5312_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-# For small memory footprints
-options VM_KMEM_SIZE_SCALE=1
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	INET6			# IPv6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-
-# options 	NFSCL		#Network Filesystem Client
-
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-options         FFS                     #Berkeley Fast Filesystem
-# options         SOFTUPDATES             #Enable FFS soft updates support
-# options         UFS_ACL                 #Support for access control lists
-# options         UFS_DIRHASH             #Improve performance on big directories
-# options 	MSDOSFS			# Read MSDOS filesystems; useful for USB/CF
-
-device		mii
-device		are
-
-device		cfi
-options		CFI_HARDWAREBYTESWAP
-device		geom_redboot
-
-device		ar5315_wdog
-
-device		uart
-device		uart_ar5315
-
-device		loop
-device		ether
-device		md
-device		bpf
-
-options 	ARGE_DEBUG	# Enable if_arge debugging for now
-
-# Enable GPIO
-device		gpio
-device		gpioled
diff --git a/sys/mips/conf/std.AR5315 b/sys/mips/conf/std.AR5315
deleted file mode 100644
index 77b81bffb1fb..000000000000
--- a/sys/mips/conf/std.AR5315
+++ /dev/null
@@ -1,79 +0,0 @@
-#
-# AR5315 -- Kernel configuration file for FreeBSD/MIPS for Atheros 5315 systems
-#
-# This includes all the common drivers for the AR5315 boards
-#
-# $FreeBSD$
-#
-
-machine		mips mips
-#ident		AR5315_BASE
-cpu		CPU_MIPS4KC
-makeoptions	KERNLOADADDR=0x80050000
-
-makeoptions	MODULES_OVERRIDE=""
-
-files		"../atheros/ar531x/files.ar5315"
-
-options 	INTRNG
-
-# For now, hints are per-board.
-
-hints		"AR5315_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-# For small memory footprints
-options VM_KMEM_SIZE_SCALE=1
-
-options 	DDB
-options 	KDB
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	INET6			# IPv6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-
-# options 	NFSCL		#Network Filesystem Client
-
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-options         FFS                     #Berkeley Fast Filesystem
-# options         SOFTUPDATES             #Enable FFS soft updates support
-# options         UFS_ACL                 #Support for access control lists
-# options         UFS_DIRHASH             #Improve performance on big directories
-# options 	MSDOSFS			# Read MSDOS filesystems; useful for USB/CF
-
-device		mii
-device		are
-
-device		ar5315_spi
-device		spibus
-device		mx25l
-device		geom_redboot
-
-device		ar5315_wdog
-
-device		uart
-device		uart_ar5315
-
-device		loop
-device		ether
-device		md
-device		bpf
-
-options 	ARGE_DEBUG	# Enable if_arge debugging for now
-
-# Enable GPIO
-device		gpio
-device		gpioled
diff --git a/sys/mips/conf/std.AR724X b/sys/mips/conf/std.AR724X
deleted file mode 100644
index a03070899855..000000000000
--- a/sys/mips/conf/std.AR724X
+++ /dev/null
@@ -1,73 +0,0 @@
-#
-# AR724X -- Kernel configuration file for FreeBSD/MIPS for Atheros 724x systems
-#
-# This includes all the common drivers for the AR724x boards.
-# Since the AR724x boards tend to have minimal flash (sometimes 4MB!),
-# the majority of the kernel framework will be built as modules.
-#
-# $FreeBSD$
-#
-
-machine		mips mips
-#ident		AR724X_BASE
-cpu		CPU_MIPS24K
-makeoptions	KERNLOADADDR=0x80050000
-options 	HWPMC_HOOKS
-
-files		"../atheros/files.ar71xx"
-
-# For now, hints are per-board.
-
-hints		"AR724X_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-options 	EARLY_PRINTF
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-#options 	INET6			# IPv6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# PMC
-options 	HWPMC_HOOKS
-
-
-#options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-options         FFS                     #Berkeley Fast Filesystem
-options 	NO_FFS_SNAPSHOT
-
-# options         SOFTUPDATES             #Enable FFS soft updates support
-# options         UFS_ACL                 #Support for access control lists
-# options         UFS_DIRHASH             #Improve performance on big directories
-# options 	MSDOSFS			# Read MSDOS filesystems; useful for USB/CF
-
-include 	"std.AR_MIPS_BASE"
-
-makeoptions 	MODULES_OVERRIDE+="hwpmc_mips24k"
-
-device		pci
-device		ar724x_pci
-
-device		usb
-device		ehci
-
-device		umass
-device		scbus
-device		da
-
-device		uart_ar71xx
-device		ar71xx_apb
diff --git a/sys/mips/conf/std.AR91XX b/sys/mips/conf/std.AR91XX
deleted file mode 100644
index 88f05ca3b860..000000000000
--- a/sys/mips/conf/std.AR91XX
+++ /dev/null
@@ -1,64 +0,0 @@
-#
-# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC.
-#
-# This file (and the hints file accompanying it) are not designed to be
-# used by themselves. Instead, users of this file should create a kernel
-# config file which includes this file (which gets the basic hints), then
-# override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-#
-# $FreeBSD$
-#
-
-machine         mips mips
-#ident		std.AR91XX
-cpu		CPU_MIPS24K
-makeoptions	KERNLOADADDR=0x80050000
-
-files		"../atheros/files.ar71xx"
-hints		"AR91XX_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-options 	ALQ
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	INET6			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# PMC
-options 	HWPMC_HOOKS
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	FFS                     #Berkeley Fast Filesystem
-#options 	SOFTUPDATES             #Enable FFS soft updates support
-#options 	UFS_ACL                 #Support for access control lists
-#options 	UFS_DIRHASH             #Improve performance on big directories
-options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
-
-include 	"std.AR_MIPS_BASE"
-
-option		AH_SUPPORT_AR9130	# Makes other chipsets not function!
-# interrupt mitigation not possible on AR9130
-nooption 	AH_AR5416_INTERRUPT_MITIGATION
-
-device		usb
-device		ehci
-
-device		scbus
-device		umass
-device		da
-
-device		uart_ar71xx
-device		ar71xx_apb
diff --git a/sys/mips/conf/std.AR933X b/sys/mips/conf/std.AR933X
deleted file mode 100644
index ddcd4a1824dd..000000000000
--- a/sys/mips/conf/std.AR933X
+++ /dev/null
@@ -1,76 +0,0 @@
-#
-# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC.
-#
-# This file (and the hints file accompanying it) are not designed to be
-# used by themselves. Instead, users of this file should create a kernel
-# config file which includes this file (which gets the basic hints), then
-# override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-#
-# $FreeBSD$
-#
-
-machine         mips mips
-#ident		std.AR933X
-cpu		CPU_MIPS24K
-makeoptions	KERNLOADADDR=0x80050000
-
-files		"../atheros/files.ar71xx"
-hints		"AR933X_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-options 	ALQ
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-#options 	INET6			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# Enable boot time calibration hints
-options		AR71XX_ATH_EEPROM
-device		ar71xx_caldata
-device		firmware
-
-# PMC
-options 	HWPMC_HOOKS
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-#options 	INVARIANTS
-#options 	INVARIANT_SUPPORT
-#options 	WITNESS
-#options 	WITNESS_SKIPSPIN
-options 	FFS                     #Berkeley Fast Filesystem
-#options 	SOFTUPDATES             #Enable FFS soft updates support
-#options 	UFS_ACL                 #Support for access control lists
-#options 	UFS_DIRHASH             #Improve performance on big directories
-options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
-
-include		"std.AR_MIPS_BASE"
-
-makeoptions	MODULES_OVERRIDE+="hwpmc_mips24k"
-
-# AR9330 support - everything shipping uses EEPROM for calibration data,
-# so always include this.
-option		AH_SUPPORT_AR9330	# Chipset support
-option 		ATH_EEPROM_FIRMWARE	# Use EEPROM from flash
-
-# Support EEPROM caldata in AHB devices
-options         ATH_EEPROM_FIRMWARE
-
-device		usb
-device		ehci
-
-device		scbus
-device		umass
-device		da
-
-device		ar71xx_apb
-
-device 		uart_ar933x
diff --git a/sys/mips/conf/std.AR934X b/sys/mips/conf/std.AR934X
deleted file mode 100644
index 72b0ca137c98..000000000000
--- a/sys/mips/conf/std.AR934X
+++ /dev/null
@@ -1,77 +0,0 @@
-#
-# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC.
-#
-# This file (and the hints file accompanying it) are not designed to be
-# used by themselves. Instead, users of this file should create a kernel
-# config file which includes this file (which gets the basic hints), then
-# override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-#
-# $FreeBSD$
-#
-
-machine         mips mips
-#ident		std.AR934X
-cpu		CPU_MIPS74K
-makeoptions	KERNLOADADDR=0x80050000
-
-files		"../atheros/files.ar71xx"
-hints		"AR934X_BASE.hints"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-options 	ALQ
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-#options 	INET6			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# PMC
-options 	HWPMC_HOOKS
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-#options 	INVARIANTS
-#options 	INVARIANT_SUPPORT
-#options 	WITNESS
-#options 	WITNESS_SKIPSPIN
-options 	FFS                     #Berkeley Fast Filesystem
-#options 	SOFTUPDATES             #Enable FFS soft updates support
-#options 	UFS_ACL                 #Support for access control lists
-#options 	UFS_DIRHASH             #Improve performance on big directories
-options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
-
-include 	"std.AR_MIPS_BASE"
-makeoptions 	MODULES_OVERRIDE+="hwpmc_mips74k"
-
-# EEPROM caldata for AHB connected device
-options 	AR71XX_ATH_EEPROM
-device 		ar71xx_caldata
-device 		firmware
-
-# Support AR9340 support in AR9300 HAL
-options 	AH_SUPPORT_AR9340
-
-# Support EEPROM caldata in AHB devices
-options 	ATH_EEPROM_FIRMWARE
-
-device		pci
-device		ar724x_pci
-device		uart_ar71xx
-
-# XXX for now; later a separate APB mux is needed to demux PCI/WLAN interrupts.
-device		ar71xx_apb
-
-device 		usb
-device 		ehci
-
-device  	scbus
-device  	umass
-device  	da
-
diff --git a/sys/mips/conf/std.AR_MIPS_BASE b/sys/mips/conf/std.AR_MIPS_BASE
deleted file mode 100644
index ab0947a391ea..000000000000
--- a/sys/mips/conf/std.AR_MIPS_BASE
+++ /dev/null
@@ -1,92 +0,0 @@
-# These are the base base bits shared between all of the various Atheros
-# MIPS bases.
-#
-# This allows a shared set of configuration and drivers to be built for
-# all of the Atheros MIPS platforms without a lot of configuration file
-# duplication.
-#
-# $FreeBSD$
-
-# debugging
-options 	EARLY_PRINTF
-options 	ALT_BREAK_TO_DEBUGGER
-
-# For small memory footprints
-options 	VM_KMEM_SIZE_SCALE=1
-options 	UMTX_CHAINS=16
-options 	NBUF=128
-# Don't include the SCSI/CAM strings in the default build
-options 	SCSI_NO_SENSE_STRINGS
-options 	SCSI_NO_OP_STRINGS
-# .. And no sysctl strings
-options 	NO_SYSCTL_DESCR
-
-makeoptions 	MODULES_OVERRIDE+="gpio ar71xx if_gif if_vlan if_gre if_tuntap"
-makeoptions 	MODULES_OVERRIDE+="if_bridge bridgestp usb"
-makeoptions 	MODULES_OVERRIDE+="alq"
-
-# net80211
-options 	IEEE80211_DEBUG
-options 	IEEE80211_SUPPORT_MESH
-options 	IEEE80211_SUPPORT_TDMA
-options 	IEEE80211_SUPPORT_SUPERG
-options 	IEEE80211_ALQ   # 802.11 ALQ logging support
-
-makeoptions 	MODULES_OVERRIDE+="wlan wlan_xauth wlan_acl wlan_wep"
-makeoptions 	MODULES_OVERRIDE+="wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr"
-
-# firewalling
-options 	IPFIREWALL_DEFAULT_TO_ACCEPT
-
-makeoptions 	MODULES_OVERRIDE+="ipfw ipfw_nat libalias ipfw_nptv6"
-
-# USB wifi device drivers
-makeoptions 	MODULES_OVERRIDE+="rtwn rtwn_usb rtwnfw"
-makeoptions	MODULES_OVERRIDE+="otus otusfw"
-
-# Atheros wifi device drivers
-options 	ATH_DEBUG
-options 	ATH_DIAGAPI
-options 	ATH_ENABLE_11N
-options 	ATH_ENABLE_DFS
-
-options 	AH_DEBUG_ALQ
-options 	AH_DEBUG
-options 	AH_AR5416_INTERRUPT_MITIGATION
-options 	AH_RXCFG_SDMAMW_4BYTES
-
-makeoptions 	MODULES_OVERRIDE+="ath_main ath_pci ath_ahb ath_rate ath_dfs"
-makeoptions 	MODULES_OVERRIDE+="ath_hal_ar5210 ath_hal_ar5211"
-makeoptions 	MODULES_OVERRIDE+="ath_hal_ar5212 ath_hal_ar5416"
-makeoptions 	MODULES_OVERRIDE+="ath_hal_ar9300 ath_hal"
-
-# USB configuration
-options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
-options 	USB_DEBUG
-options 	USB_HOST_ALIGN=32               # AR71XX (MIPS in general?) requires this
-
-# Ethernet configuration
-device 		mii
-device 		arge
-options 	ARGE_DEBUG
-
-# SPI, flash
-device 		spibus
-device 		ar71xx_spi
-device 		mx25l
-device 		ar71xx_wdog
-
-# Serial driver
-device 		uart
-
-# Networking
-device 		loop
-device 		ether
-device 		md
-device 		bpf
-#device 		if_bridge
-
-# GPIO - normally it's okay as a module
-#device 		gpio
-#device 		gpioled
-
diff --git a/sys/mips/conf/std.BERI b/sys/mips/conf/std.BERI
deleted file mode 100644
index 4497d19eb391..000000000000
--- a/sys/mips/conf/std.BERI
+++ /dev/null
@@ -1,63 +0,0 @@
-#
-# BERI_TEMPLATE -- a template kernel configuration for the SRI/Cambridge
-# "BERI" (Bluespec Extensible RISC Implementation) FPGA soft core CPU.  This
-# kernel configuration file will be included by other board-specific files,
-# and so contains only BERI features common across all board targets.
-#
-# $FreeBSD$
-#
-
-machine		mips mips64
-
-cpu		CPU_BERI
-
-options 	HZ=200
-
-makeoptions 	KERNLOADADDR=0xffffffff80100000
-
-include		"../beri/std.beri"
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-makeoptions	MODULES_OVERRIDE=""
-
-options 	DDB
-options 	KDB
-options 	ALT_BREAK_TO_DEBUGGER
-options 	KTRACE
-
-options 	CAPABILITY_MODE
-options 	CAPABILITIES
-
-options 	COMPAT_FREEBSD10
-options 	COMPAT_FREEBSD11
-options 	COMPAT_FREEBSD12
-options 	COMPAT_FREEBSD13
-
-options 	INTRNG
-options 	SCHED_ULE
-
-options 	FFS			#Berkeley Fast Filesystem
-
-options 	INET
-options 	INET6
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	KGSSAPI
-options 	NFSCL
-options 	NFSLOCKD
-options 	NFS_ROOT
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-device		crypto
-device		cryptodev
-device		ether
-device		geom_map
-device		loop
-device		md
-device		snp
diff --git a/sys/mips/conf/std.MALTA b/sys/mips/conf/std.MALTA
deleted file mode 100644
index 4f7812fa7c72..000000000000
--- a/sys/mips/conf/std.MALTA
+++ /dev/null
@@ -1,65 +0,0 @@
-# MALTA_COMMON -- Common kernel config options for MALTA boards
-#
-# $FreeBSD$
-
-options 	YAMON
-
-options 	TICK_USE_YAMON_FREQ=defined
-#options 	TICK_USE_MALTA_RTC=defined
-
-include		"../malta/std.malta"
-
-hints		"MALTA.hints"		#Default places to look for devices.
-
-makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
-
-options 	DDB
-options 	KDB
-options 	HZ=100
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	NFSCL			#Network Filesystem Client
-options 	NFS_ROOT		#NFS usable as /, requires NFSCL
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-options 	CAPABILITY_MODE		# Capsicum capability mode
-options 	CAPABILITIES		# Capsicum capabilities
-
-options 	TMPFS			#Efficient memory filesystem
-
-options 	FFS			#Berkeley Fast Filesystem
-options 	SOFTUPDATES		#Enable FFS soft updates support
-options 	UFS_ACL			#Support for access control lists
-options 	UFS_DIRHASH		#Improve performance on big directories
-options 	ROOTDEVNAME=\"ufs:ada0\"
-
-options 	GEOM_LABEL		# Provides labelization
-options 	GEOM_PART_GPT		# GUID Partition Tables.
-options 	GEOM_RAID		# Soft RAID functionality.
-
-# Debugging for use in -current
-#options 	DEADLKRES		#Enable the deadlock resolver
-options 	INVARIANTS		#Enable calls of extra sanity checking
-options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
-#options 	WITNESS			#Enable checks to detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
-
-# Kernel dump features.
-options		ZSTDIO			# zstd-compressed kernel and user dumps
-
-device		loop
-device		ether
-device		le
-device		miibus
-device		bpf
-device		md
-device		uart
-
-# VirtIO support
-device		virtio		# Generic VirtIO bus (required)
-device		virtio_pci	# VirtIO PCI Interface
-device		vtnet		# VirtIO Ethernet device
-device		virtio_blk	# VirtIO Block device
-device		virtio_random	# VirtIO Entropy device
diff --git a/sys/mips/conf/std.QCA955X b/sys/mips/conf/std.QCA955X
deleted file mode 100644
index 843da55a31f2..000000000000
--- a/sys/mips/conf/std.QCA955X
+++ /dev/null
@@ -1,76 +0,0 @@
-#
-# QCA955X_BASE -- Kernel configuration base file for the Qualcomm Atheros
-# QCA955x SoC.
-#
-# This file (and the hints file accompanying it) are not designed to be
-# used by themselves. Instead, users of this file should create a kernel
-# config file which includes this file (which gets the basic hints), then
-# override the default options (adding devices as needed) and adding
-# hints as needed (for example, the GPIO and LAN PHY.)
-#
-# $FreeBSD$
-#
-
-machine         mips mips
-#ident		std.QCA955X
-cpu		CPU_MIPS74K
-makeoptions	KERNLOADADDR=0x80050000
-
-files		"../atheros/files.ar71xx"
-hints		"QCA955X_BASE.hints"
-
-options 	DDB
-options 	KDB
-options 	ALQ
-
-options 	SCHED_4BSD		#4BSD scheduler
-options 	INET			#InterNETworking
-#options 	INET6			#InterNETworking
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-#options 	NFSCL			#Network Filesystem Client
-options 	PSEUDOFS		#Pseudo-filesystem framework
-options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
-
-# PMC - fow now there's no hwpmc module for mips74k
-options 	HWPMC_HOOKS
-
-# options 	NFS_LEGACYRPC
-# Debugging for use in -current
-#options 	INVARIANTS
-#options 	INVARIANT_SUPPORT
-#options 	WITNESS
-#options 	WITNESS_SKIPSPIN
-options 	FFS                     #Berkeley Fast Filesystem
-#options 	SOFTUPDATES             #Enable FFS soft updates support
-#options 	UFS_ACL                 #Support for access control lists
-#options 	UFS_DIRHASH             #Improve performance on big directories
-options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
-
-include 	"std.AR_MIPS_BASE"
-makeoptions 	MODULES_OVERRIDE+="hwpmc_mips74k"
-
-# EEPROM caldata for AHB connected device
-options 	AR71XX_ATH_EEPROM
-device 		ar71xx_caldata
-device 		firmware
-
-# Support QCA955x in the HAL
-option		AH_SUPPORT_QCA9550	# Chipset support
-
-# Support EEPROM caldata in AHB devices
-options 	ATH_EEPROM_FIRMWARE
-
-device		uart_ar71xx
-
-device		ar71xx_apb
-# Until some better interrupt handling is shoehorned into qca955x_apb,
-# we'll have to stick to shared interrupts for IP2/IP3 demux.
-# device		qca955x_apb
-
-device 		usb
-device 		ehci
-
-device  	scbus
-device  	umass
-device  	da
-
diff --git a/sys/mips/conf/std.XLP b/sys/mips/conf/std.XLP
deleted file mode 100644
index 979791c74a58..000000000000
--- a/sys/mips/conf/std.XLP
+++ /dev/null
@@ -1,117 +0,0 @@
-# $FreeBSD$
-
-include		"../nlm/std.xlp"
-makeoptions	MODULES_OVERRIDE=""
-makeoptions	DEBUG=-g		# Build kernel with gdb(1) debug symbols
-#profile 	2
-
-hints		"XLP.hints"
-
-options 	SCHED_ULE		# ULE scheduler
-#options 	VERBOSE_SYSINIT
-#options 	SCHED_4BSD		# 4BSD scheduler
-options         SMP
-options 	PREEMPTION		# Enable kernel thread preemption
-#options 	FULL_PREEMPTION		# Enable kernel thread preemption
-options 	INET			# InterNETworking
-options 	INET6			# IPv6 communications protocols
-options 	TCP_HHOOK		# hhook(9) framework for TCP
-options 	FFS			# Berkeley Fast Filesystem
-#options 	SOFTUPDATES		# Enable FFS soft updates support
-options 	UFS_ACL			# Support for access control lists
-options 	UFS_DIRHASH		# Improve performance on big directories
-options 	NFSCL
-options 	NFS_ROOT
-options 	MSDOSFS			#MSDOS Filesystem
-#
-#options 	BOOTP
-#options 	BOOTP_NFSROOT
-#options 	BOOTP_NFSV3
-#options 	BOOTP_WIRED_TO=nlge0
-#options 	BOOTP_COMPAT
-#options 	ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\"
-
-options 	MD_ROOT			# MD is a potential root device
-options 	MD_ROOT_SIZE=132000
-options 	ROOTDEVNAME=\"ufs:md0\"
-options 	_KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
-options 	NO_SWAPPING
-
-# Debugging options
-options 	KTRACE			# ktrace(1) support
-options 	DDB
-options 	KDB
-options 	GDB
-options 	BREAK_TO_DEBUGGER
-options 	ALT_BREAK_TO_DEBUGGER
-#options 	DEADLKRES		# Enable the deadlock resolver
-#options 	INVARIANTS
-#options 	INVARIANT_SUPPORT
-#options 	WITNESS			# Detect deadlocks and cycles
-#options 	WITNESS_SKIPSPIN	# Don't run witness on spinlocks for speed
-#options 	KTR			# ktr(4) and ktrdump(8) support
-#options 	KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC)
-#options 	KTR_ENTRIES=131072
-#options 	LOCK_DEBUG
-#options 	LOCK_PROFILING
-
-device		xz
-options 	GEOM_UZIP
-
-# Device tree
-options 	FDT
-options 	FDT_DTB_STATIC
-makeoptions	FDT_DTS_FILE=xlp-basic.dts
-
-# Pseudo
-device		loop
-device		md
-device		bpf
-
-# Network
-device		miibus
-device		ether
-device		xlpge
-#device		re
-device		msk
-device		iflib
-device		em
-
-# Disks
-device		siis
-device		da
-device		scbus
-#device		ata
-
-# USB
-device		usb			# USB Bus (required)
-device		ehci			# EHCI PCI->USB interface (USB 2.0)
-#options 	USB_DEBUG		# enable debug msgs
-#device		ugen			# Generic
-#device		uhid			# "Human Interface Devices"
-device		umass			# Requires scbus and da
-
-# i2c driver and devices
-device		iic
-device		iicbus
-device		iicoc
-device		ds13rtc			# RTC on XLP boards
-
-# Crypto
-device		crypto
-device		cryptodev
-device		nlmsec
-
-# Options that use crypto
-options 	IPSEC
-options 	GEOM_ELI
-
-# NOR
-device		cfi
-device		cfid
-
-# MMC/SD
-device		gpio
-device		mmc			# MMC/SD bus
-device		mmcsd			# MMC/SD memory card
-device		sdhci			# Generic PCI SD Host Controller
diff --git a/sys/mips/include/_align.h b/sys/mips/include/_align.h
deleted file mode 100644
index b263766b4ced..000000000000
--- a/sys/mips/include/_align.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*	$OpenBSD: param.h,v 1.11 1998/08/30 22:05:35 millert Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: machparam.h 1.11 89/08/14
- *	from: @(#)param.h	8.1 (Berkeley) 6/10/93
- *	JNPR: param.h,v 1.6.2.1 2007/09/10 07:49:36 girish
- * $FreeBSD$
- */
-
-#ifndef _MIPS_INCLUDE__ALIGN_H_
-#define	_MIPS_INCLUDE__ALIGN_H_
-
-/*
- * Round p (pointer or byte index) up to a correctly-aligned value for all
- * data types (int, long, ...).	  The result is u_long and must be cast to
- * any desired pointer type.
- */
-#define	_ALIGNBYTES	7
-#define	_ALIGN(p)	(((u_long)(p) + _ALIGNBYTES) &~ _ALIGNBYTES)
-
-#endif /* !_MIPS_INCLUDE__ALIGN_H_ */
diff --git a/sys/mips/include/_bus.h b/sys/mips/include/_bus.h
deleted file mode 100644
index 9edb1f183efc..000000000000
--- a/sys/mips/include/_bus.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 M. Warner Losh <imp@FreeBSD.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: src/sys/i386/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp
- * $FreeBSD$
- */
-
-#ifndef MIPS_INCLUDE__BUS_H
-#define	MIPS_INCLUDE__BUS_H
-
-/*
- * Bus address and size types
- */
-#if defined(CPU_CNMIPS) && !defined(__mips_n64)
-typedef uint64_t bus_addr_t;
-#else
-typedef uintptr_t bus_addr_t;
-#endif
-typedef uintptr_t bus_size_t;
-
-/*
- * Access methods for bus resources and address space.
- */
-typedef struct bus_space *bus_space_tag_t;
-typedef bus_addr_t bus_space_handle_t;
-#endif /* MIPS_INCLUDE__BUS_H */
diff --git a/sys/mips/include/_inttypes.h b/sys/mips/include/_inttypes.h
deleted file mode 100644
index 2f95e3b626b6..000000000000
--- a/sys/mips/include/_inttypes.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- *	From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $
- *	from: src/sys/i386/include/_inttypes.h,v 1.2 2002/06/30 05:48:02 mike
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_INTTYPES_H_
-#define	_MACHINE_INTTYPES_H_
-
-/*
- * Macros for format specifiers.
- */
-
-#ifdef __mips_n64
-#define	__PRI64		"l"
-#define	__PRIptr	"l"
-#else
-#define	__PRI64		"ll"
-#define	__PRIptr
-#endif
-
-/* fprintf(3) macros for signed integers. */
-
-#define	PRId8		"d"		/* int8_t */
-#define	PRId16		"d"		/* int16_t */
-#define	PRId32		"d"		/* int32_t */
-#define	PRId64		__PRI64"d"	/* int64_t */
-#define	PRIdLEAST8	"d"		/* int_least8_t */
-#define	PRIdLEAST16	"d"		/* int_least16_t */
-#define	PRIdLEAST32	"d"		/* int_least32_t */
-#define	PRIdLEAST64	__PRI64"d"	/* int_least64_t */
-#define	PRIdFAST8	"d"		/* int_fast8_t */
-#define	PRIdFAST16	"d"		/* int_fast16_t */
-#define	PRIdFAST32	"d"		/* int_fast32_t */
-#define	PRIdFAST64	__PRI64"d"	/* int_fast64_t */
-#define	PRIdMAX		"jd"		/* intmax_t */
-#define	PRIdPTR		__PRIptr"d"	/* intptr_t */
-
-#define	PRIi8		"i"		/* int8_t */
-#define	PRIi16		"i"		/* int16_t */
-#define	PRIi32		"i"		/* int32_t */
-#define	PRIi64		__PRI64"i"	/* int64_t */
-#define	PRIiLEAST8	"i"		/* int_least8_t  */
-#define	PRIiLEAST16	"i"		/* int_least16_t */
-#define	PRIiLEAST32	"i"		/* int_least32_t */
-#define	PRIiLEAST64	__PRI64"i"	/* int_least64_t */
-#define	PRIiFAST8	"i"		/* int_fast8_t */
-#define	PRIiFAST16	"i"		/* int_fast16_t */
-#define	PRIiFAST32	"i"		/* int_fast32_t */
-#define	PRIiFAST64	__PRI64"i"	/* int_fast64_t */
-#define	PRIiMAX		"ji"		/* intmax_t */
-#define	PRIiPTR		__PRIptr"i"	/* intptr_t */
-
-/* fprintf(3) macros for unsigned integers. */
-
-#define	PRIo8		"o"		/* uint8_t */
-#define	PRIo16		"o"		/* uint16_t */
-#define	PRIo32		"o"		/* uint32_t */
-#define	PRIo64		__PRI64"o"	/* uint64_t */
-#define	PRIoLEAST8	"o"		/* uint_least8_t */
-#define	PRIoLEAST16	"o"		/* uint_least16_t */
-#define	PRIoLEAST32	"o"		/* uint_least32_t */
-#define	PRIoLEAST64	__PRI64"o"	/* uint_least64_t */
-#define	PRIoFAST8	"o"		/* uint_fast8_t */
-#define	PRIoFAST16	"o"		/* uint_fast16_t */
-#define	PRIoFAST32	"o"		/* uint_fast32_t */
-#define	PRIoFAST64	__PRI64"o"	/* uint_fast64_t */
-#define	PRIoMAX		"jo"		/* uintmax_t */
-#define	PRIoPTR		__PRIptr"o"	/* uintptr_t */
-
-#define	PRIu8		"u"		/* uint8_t */
-#define	PRIu16		"u"		/* uint16_t */
-#define	PRIu32		"u"		/* uint32_t */
-#define	PRIu64		__PRI64"u"	/* uint64_t */
-#define	PRIuLEAST8	"u"		/* uint_least8_t */
-#define	PRIuLEAST16	"u"		/* uint_least16_t */
-#define	PRIuLEAST32	"u"		/* uint_least32_t */
-#define	PRIuLEAST64	__PRI64"u"	/* uint_least64_t */
-#define	PRIuFAST8	"u"		/* uint_fast8_t */
-#define	PRIuFAST16	"u"		/* uint_fast16_t */
-#define	PRIuFAST32	"u"		/* uint_fast32_t */
-#define	PRIuFAST64	__PRI64"u"	/* uint_fast64_t */
-#define	PRIuMAX		"ju"		/* uintmax_t */
-#define	PRIuPTR		__PRIptr"u"	/* uintptr_t */
-
-#define	PRIx8		"x"		/* uint8_t */
-#define	PRIx16		"x"		/* uint16_t */
-#define	PRIx32		"x"		/* uint32_t */
-#define	PRIx64		__PRI64"x"	/* uint64_t */
-#define	PRIxLEAST8	"x"		/* uint_least8_t */
-#define	PRIxLEAST16	"x"		/* uint_least16_t */
-#define	PRIxLEAST32	"x"		/* uint_least32_t */
-#define	PRIxLEAST64	__PRI64"x"	/* uint_least64_t */
-#define	PRIxFAST8	"x"		/* uint_fast8_t */
-#define	PRIxFAST16	"x"		/* uint_fast16_t */
-#define	PRIxFAST32	"x"		/* uint_fast32_t */
-#define	PRIxFAST64	__PRI64"x"	/* uint_fast64_t */
-#define	PRIxMAX		"jx"		/* uintmax_t */
-#define	PRIxPTR		__PRIptr"x"	/* uintptr_t */
-
-#define	PRIX8		"X"		/* uint8_t */
-#define	PRIX16		"X"		/* uint16_t */
-#define	PRIX32		"X"		/* uint32_t */
-#define	PRIX64		__PRI64"X"	/* uint64_t */
-#define	PRIXLEAST8	"X"		/* uint_least8_t */
-#define	PRIXLEAST16	"X"		/* uint_least16_t */
-#define	PRIXLEAST32	"X"		/* uint_least32_t */
-#define	PRIXLEAST64	__PRI64"X"	/* uint_least64_t */
-#define	PRIXFAST8	"X"		/* uint_fast8_t */
-#define	PRIXFAST16	"X"		/* uint_fast16_t */
-#define	PRIXFAST32	"X"		/* uint_fast32_t */
-#define	PRIXFAST64	__PRI64"X"	/* uint_fast64_t */
-#define	PRIXMAX		"jX"		/* uintmax_t */
-#define	PRIXPTR		__PRIptr"X"	/* uintptr_t */
-
-/* fscanf(3) macros for signed integers. */
-
-#define	SCNd8		"hhd"		/* int8_t */
-#define	SCNd16		"hd"		/* int16_t */
-#define	SCNd32		"d"		/* int32_t */
-#define	SCNd64		__PRI64"d"	/* int64_t */
-#define	SCNdLEAST8	"hhd"		/* int_least8_t */
-#define	SCNdLEAST16	"hd"		/* int_least16_t */
-#define	SCNdLEAST32	"d"		/* int_least32_t */
-#define	SCNdLEAST64	__PRI64"d"	/* int_least64_t */
-#define	SCNdFAST8	"d"		/* int_fast8_t */
-#define	SCNdFAST16	"d"		/* int_fast16_t */
-#define	SCNdFAST32	"d"		/* int_fast32_t */
-#define	SCNdFAST64	__PRI64"d"	/* int_fast64_t */
-#define	SCNdMAX		"jd"		/* intmax_t */
-#define	SCNdPTR		__PRIptr"d"	/* intptr_t */
-
-#define	SCNi8		"hhi"		/* int8_t */
-#define	SCNi16		"hi"		/* int16_t */
-#define	SCNi32		"i"		/* int32_t */
-#define	SCNi64		__PRI64"i"	/* int64_t */
-#define	SCNiLEAST8	"hhi"		/* int_least8_t */
-#define	SCNiLEAST16	"hi"		/* int_least16_t */
-#define	SCNiLEAST32	"i"		/* int_least32_t */
-#define	SCNiLEAST64	__PRI64"i"	/* int_least64_t */
-#define	SCNiFAST8	"i"		/* int_fast8_t */
-#define	SCNiFAST16	"i"		/* int_fast16_t */
-#define	SCNiFAST32	"i"		/* int_fast32_t */
-#define	SCNiFAST64	__PRI64"i"	/* int_fast64_t */
-#define	SCNiMAX		"ji"		/* intmax_t */
-#define	SCNiPTR		__PRIptr"i"	/* intptr_t */
-
-/* fscanf(3) macros for unsigned integers. */
-
-#define	SCNo8		"hho"		/* uint8_t */
-#define	SCNo16		"ho"		/* uint16_t */
-#define	SCNo32		"o"		/* uint32_t */
-#define	SCNo64		__PRI64"o"	/* uint64_t */
-#define	SCNoLEAST8	"hho"		/* uint_least8_t */
-#define	SCNoLEAST16	"ho"		/* uint_least16_t */
-#define	SCNoLEAST32	"o"		/* uint_least32_t */
-#define	SCNoLEAST64	__PRI64"o"	/* uint_least64_t */
-#define	SCNoFAST8	"o"		/* uint_fast8_t */
-#define	SCNoFAST16	"o"		/* uint_fast16_t */
-#define	SCNoFAST32	"o"		/* uint_fast32_t */
-#define	SCNoFAST64	__PRI64"o"	/* uint_fast64_t */
-#define	SCNoMAX		"jo"		/* uintmax_t */
-#define	SCNoPTR		__PRIptr"o"	/* uintptr_t */
-
-#define	SCNu8		"hhu"		/* uint8_t */
-#define	SCNu16		"hu"		/* uint16_t */
-#define	SCNu32		"u"		/* uint32_t */
-#define	SCNu64		__PRI64"u"	/* uint64_t */
-#define	SCNuLEAST8	"hhu"		/* uint_least8_t */
-#define	SCNuLEAST16	"hu"		/* uint_least16_t */
-#define	SCNuLEAST32	"u"		/* uint_least32_t */
-#define	SCNuLEAST64	__PRI64"u"	/* uint_least64_t */
-#define	SCNuFAST8	"u"		/* uint_fast8_t */
-#define	SCNuFAST16	"u"		/* uint_fast16_t */
-#define	SCNuFAST32	"u"		/* uint_fast32_t */
-#define	SCNuFAST64	__PRI64"u"	/* uint_fast64_t */
-#define	SCNuMAX		"ju"		/* uintmax_t */
-#define	SCNuPTR		__PRIptr"u"	/* uintptr_t */
-
-#define	SCNx8		"hhx"		/* uint8_t */
-#define	SCNx16		"hx"		/* uint16_t */
-#define	SCNx32		"x"		/* uint32_t */
-#define	SCNx64		__PRI64"x"	/* uint64_t */
-#define	SCNxLEAST8	"hhx"		/* uint_least8_t */
-#define	SCNxLEAST16	"hx"		/* uint_least16_t */
-#define	SCNxLEAST32	"x"		/* uint_least32_t */
-#define	SCNxLEAST64	__PRI64"x"	/* uint_least64_t */
-#define	SCNxFAST8	"x"		/* uint_fast8_t */
-#define	SCNxFAST16	"x"		/* uint_fast16_t */
-#define	SCNxFAST32	"x"		/* uint_fast32_t */
-#define	SCNxFAST64	__PRI64"x"	/* uint_fast64_t */
-#define	SCNxMAX		"jx"		/* uintmax_t */
-#define	SCNxPTR		__PRIptr"x"	/* uintptr_t */
-
-#endif /* !_MACHINE_INTTYPES_H_ */
diff --git a/sys/mips/include/_limits.h b/sys/mips/include/_limits.h
deleted file mode 100644
index 5f5244878ce5..000000000000
--- a/sys/mips/include/_limits.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)limits.h	8.3 (Berkeley) 1/4/94
- *	from: src/sys/i386/include/_limits.h,v 1.27 2005/01/06 22:18:15 imp
- * $FreeBSD$
- */
-
-#ifndef _MACHINE__LIMITS_H_
-#define	_MACHINE__LIMITS_H_
-
-/*
- * According to ANSI (section 2.2.4.2), the values below must be usable by
- * #if preprocessing directives.  Additionally, the expression must have the
- * same type as would an expression that is an object of the corresponding
- * type converted according to the integral promotions.  The subtraction for
- * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an
- * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2).
- */
-
-#define	__CHAR_BIT	8		/* number of bits in a char */
-
-#define	__SCHAR_MAX	0x7f		/* max value for a signed char */
-#define	__SCHAR_MIN	(-0x7f - 1)	/* min value for a signed char */
-
-#define	__UCHAR_MAX	0xff		/* max value for an unsigned char */
-
-#define	__USHRT_MAX	0xffff		/* max value for an unsigned short */
-#define	__SHRT_MAX	0x7fff		/* max value for a short */
-#define	__SHRT_MIN	(-0x7fff - 1)	/* min value for a short */
-
-#define	__UINT_MAX	0xffffffff	/* max value for an unsigned int */
-#define	__INT_MAX	0x7fffffff	/* max value for an int */
-#define	__INT_MIN	(-0x7fffffff - 1)	/* min value for an int */
-
-#ifdef __mips_n64
-#define	__ULONG_MAX	0xffffffffffffffff
-#define	__LONG_MAX	0x7fffffffffffffff
-#define	__LONG_MIN	(-0x7fffffffffffffff - 1)
-#define	__LONG_BIT	64
-#else
-#define	__ULONG_MAX	0xffffffffUL	/* max value for an unsigned long */
-#define	__LONG_MAX	0x7fffffffL	/* max value for a long */
-#define	__LONG_MIN	(-0x7fffffffL - 1)	/* min value for a long */
-#define	__LONG_BIT	32
-#endif
-
-			/* max value for an unsigned long long */
-#define	__ULLONG_MAX	0xffffffffffffffffULL
-#define	__LLONG_MAX	0x7fffffffffffffffLL	/* max value for a long long */
-#define	__LLONG_MIN	(-0x7fffffffffffffffLL - 1)  /* min for a long long */
-
-#ifdef __mips_n64
-#define	__SSIZE_MAX	__LONG_MAX	/* max value for a ssize_t */
-#define	__SIZE_T_MAX	__ULONG_MAX	/* max value for a size_t */
-#define	__OFF_MAX	__LONG_MAX	/* max value for an off_t */
-#define	__OFF_MIN	__LONG_MIN	/* min value for an off_t */
-#define	__UQUAD_MAX	__ULONG_MAX	/* max value for a uquad_t */
-#define	__QUAD_MAX	__LONG_MAX	/* max value for a quad_t */
-#define	__QUAD_MIN	__LONG_MIN	/* min value for a quad_t */
-#else
-#define	__SSIZE_MAX	__INT_MAX
-#define	__SIZE_T_MAX	__UINT_MAX
-#define	__OFF_MAX	__LLONG_MAX
-#define	__OFF_MIN	__LLONG_MIN
-#define	__UQUAD_MAX	__ULLONG_MAX
-#define	__QUAD_MAX	__LLONG_MAX
-#define	__QUAD_MIN	__LLONG_MIN
-#endif
-
-#define	__WORD_BIT	32
-
-#define __MINSIGSTKSZ     (512 * 4)
-
-#endif /* !_MACHINE__LIMITS_H_ */
diff --git a/sys/mips/include/_stdint.h b/sys/mips/include/_stdint.h
deleted file mode 100644
index 83455b7780d1..000000000000
--- a/sys/mips/include/_stdint.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002 Mike Barcroft <mike@FreeBSD.org>
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/i386/include/_stdint.h,v 1.2 2004/05/18 16:04:57 stefanf
- * $FreeBSD$
- */
-
-#ifndef _MACHINE__STDINT_H_
-#define	_MACHINE__STDINT_H_
-
-#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
-
-#define	INT8_C(c)		(c)
-#define	INT16_C(c)		(c)
-#define	INT32_C(c)		(c)
-
-#define	UINT8_C(c)		(c)
-#define	UINT16_C(c)		(c)
-#define	UINT32_C(c)		(c ## U)
-
-#ifdef __mips_n64
-#define	INT64_C(c)		(c ## L)
-#define	UINT64_C(c)		(c ## UL)
-#else
-#define	INT64_C(c)		(c ## LL)
-#define	UINT64_C(c)		(c ## ULL)
-#endif
-
-#define	INTMAX_C(c)		INT64_C(c)
-#define	UINTMAX_C(c)		UINT64_C(c)
-
-#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */
-
-#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
-
-#ifndef __INT64_C
-#ifdef __mips_n64
-#define __INT64_C(c)              (c ## L)
-#define __UINT64_C(c)             (c ## UL)
-#else
-#define __INT64_C(c)              (c ## LL)
-#define __UINT64_C(c)             (c ## ULL)
-#endif
-#endif
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.1 Limits of exact-width integer types
- */
-/* Minimum values of exact-width signed integer types. */
-#define	INT8_MIN	(-0x7f-1)
-#define	INT16_MIN	(-0x7fff-1)
-#define	INT32_MIN	(-0x7fffffff-1)
-#define	INT64_MIN	(-__INT64_C(0x7fffffffffffffff)-1)
-
-/* Maximum values of exact-width signed integer types. */
-#define	INT8_MAX	0x7f
-#define	INT16_MAX	0x7fff
-#define	INT32_MAX	0x7fffffff
-#define	INT64_MAX	__INT64_C(0x7fffffffffffffff)
-
-/* Maximum values of exact-width unsigned integer types. */
-#define	UINT8_MAX	0xff
-#define	UINT16_MAX	0xffff
-#define	UINT32_MAX	0xffffffff
-#define	UINT64_MAX	__UINT64_C(0xffffffffffffffff)
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.2  Limits of minimum-width integer types
- */
-/* Minimum values of minimum-width signed integer types. */
-#define	INT_LEAST8_MIN	INT8_MIN
-#define	INT_LEAST16_MIN	INT16_MIN
-#define	INT_LEAST32_MIN	INT32_MIN
-#define	INT_LEAST64_MIN	INT64_MIN
-
-/* Maximum values of minimum-width signed integer types. */
-#define	INT_LEAST8_MAX	INT8_MAX
-#define	INT_LEAST16_MAX	INT16_MAX
-#define	INT_LEAST32_MAX	INT32_MAX
-#define	INT_LEAST64_MAX	INT64_MAX
-
-/* Maximum values of minimum-width unsigned integer types. */
-#define	UINT_LEAST8_MAX	 UINT8_MAX
-#define	UINT_LEAST16_MAX UINT16_MAX
-#define	UINT_LEAST32_MAX UINT32_MAX
-#define	UINT_LEAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.3  Limits of fastest minimum-width integer types
- */
-/* Minimum values of fastest minimum-width signed integer types. */
-#define	INT_FAST8_MIN	INT32_MIN
-#define	INT_FAST16_MIN	INT32_MIN
-#define	INT_FAST32_MIN	INT32_MIN
-#define	INT_FAST64_MIN	INT64_MIN
-
-/* Maximum values of fastest minimum-width signed integer types. */
-#define	INT_FAST8_MAX	INT32_MAX
-#define	INT_FAST16_MAX	INT32_MAX
-#define	INT_FAST32_MAX	INT32_MAX
-#define	INT_FAST64_MAX	INT64_MAX
-
-/* Maximum values of fastest minimum-width unsigned integer types. */
-#define	UINT_FAST8_MAX	UINT32_MAX
-#define	UINT_FAST16_MAX	UINT32_MAX
-#define	UINT_FAST32_MAX	UINT32_MAX
-#define	UINT_FAST64_MAX	UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.4  Limits of integer types capable of holding object pointers
- */
-#ifdef __mips_n64
-#define	INTPTR_MIN	INT64_MIN
-#define	INTPTR_MAX	INT64_MAX
-#define	UINTPTR_MAX	UINT64_MAX
-#else
-#define	INTPTR_MIN	INT32_MIN
-#define	INTPTR_MAX	INT32_MAX
-#define	UINTPTR_MAX	UINT32_MAX
-#endif
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.5  Limits of greatest-width integer types
- */
-#define	INTMAX_MIN	INT64_MIN
-#define	INTMAX_MAX	INT64_MAX
-#define	UINTMAX_MAX	UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.3  Limits of other integer types
- */
-#ifdef __mips_n64
-/* Limits of ptrdiff_t. */
-#define	PTRDIFF_MIN	INT64_MIN
-#define	PTRDIFF_MAX	INT64_MAX
-
-/* Limit of size_t. */
-#define	SIZE_MAX	UINT64_MAX
-#else
-/* Limits of ptrdiff_t. */
-#define	PTRDIFF_MIN	INT32_MIN
-#define	PTRDIFF_MAX	INT32_MAX
-
-/* Limit of size_t. */
-#define	SIZE_MAX	UINT32_MAX
-#endif
-
-/* Limits of sig_atomic_t. */
-#define	SIG_ATOMIC_MIN	INT32_MIN
-#define	SIG_ATOMIC_MAX	INT32_MAX
-
-/* Limits of wint_t. */
-#define	WINT_MIN	INT32_MIN
-#define	WINT_MAX	INT32_MAX
-
-#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */
-
-#endif /* !_MACHINE__STDINT_H_ */
diff --git a/sys/mips/include/_types.h b/sys/mips/include/_types.h
deleted file mode 100644
index dd433eaec316..000000000000
--- a/sys/mips/include/_types.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2002 Mike Barcroft <mike@FreeBSD.org>
- * Copyright (c) 1990, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	From: @(#)ansi.h	8.2 (Berkeley) 1/4/94
- *	From: @(#)types.h	8.3 (Berkeley) 1/5/94
- *	from: src/sys/i386/include/_types.h,v 1.12 2005/07/02 23:13:31 thompsa
- * $FreeBSD$
- */
-
-#ifndef _MACHINE__TYPES_H_
-#define	_MACHINE__TYPES_H_
-
-#ifndef _SYS__TYPES_H_
-#error do not include this header, use sys/_types.h
-#endif
-
-/*
- * Standard type definitions.
- */
-typedef	__int32_t	__clock_t;		/* clock()... */
-#ifndef _STANDALONE
-typedef	double		__double_t;
-typedef	float		__float_t;
-#endif
-#ifdef __mips_n64
-typedef	__int64_t	__critical_t;
-#else
-typedef	__int32_t	__critical_t;
-#endif
-typedef	__int32_t	__int_fast8_t;
-typedef	__int32_t	__int_fast16_t;
-typedef	__int32_t	__int_fast32_t;
-typedef	__int64_t	__int_fast64_t;
-#if defined(__mips_n64) || defined(__mips_n32)
-typedef	__int64_t	__register_t;
-typedef	__int64_t	f_register_t;
-#else
-typedef	__int32_t	__register_t;
-typedef	__int32_t	f_register_t;
-#endif
-#ifdef __mips_n64
-typedef	__int64_t	__segsz_t;
-#else
-typedef	__int32_t	__segsz_t;		/* segment size (in pages) */
-#endif
-typedef	__int64_t	__time_t;		/* time()... */
-typedef	__uint32_t	__uint_fast8_t;
-typedef	__uint32_t	__uint_fast16_t;
-typedef	__uint32_t	__uint_fast32_t;
-typedef	__uint64_t	__uint_fast64_t;
-#if defined(__mips_n64) || defined(__mips_n32)
-typedef	__uint64_t	__u_register_t;
-#else
-typedef	__uint32_t	__u_register_t;
-#endif
-#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */
-typedef	__uint64_t	__vm_paddr_t;
-#else
-typedef	__uint32_t	__vm_paddr_t;
-#endif
-
-typedef	int		___wchar_t;
-
-#define	__WCHAR_MIN	__INT_MIN	/* min value for a wchar_t */
-#define	__WCHAR_MAX	__INT_MAX	/* max value for a wchar_t */
-
-#endif /* !_MACHINE__TYPES_H_ */
diff --git a/sys/mips/include/abi.h b/sys/mips/include/abi.h
deleted file mode 100644
index 762347e3115a..000000000000
--- a/sys/mips/include/abi.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*	$NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)machAsmDefs.h	8.1 (Berkeley) 6/10/93
- *	JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
- * $FreeBSD$
- */
-
-/*
- * machAsmDefs.h --
- *
- *	Macros used when writing assembler programs.
- *
- *	Copyright (C) 1989 Digital Equipment Corporation.
- *	Permission to use, copy, modify, and distribute this software and
- *	its documentation for any purpose and without fee is hereby granted,
- *	provided that the above copyright notice appears in all copies.
- *	Digital Equipment Corporation makes no representations about the
- *	suitability of this software for any purpose.  It is provided "as is"
- *	without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
- *	v 1.2 89/08/15 18:28:24 rab Exp  SPRITE (DECWRL)
- */
-
-#ifndef _MACHINE_ABI_H_
-#define	_MACHINE_ABI_H_
-
-#if defined(__mips_o32)
-#define	SZREG	4
-#else
-#define	SZREG	8
-#endif
-
-#if defined(__mips_o32) || defined(__mips_o64)
-#define	STACK_ALIGN	8
-#else
-#define	STACK_ALIGN	16
-#endif
-
-/*
- *  standard callframe {
- *	register_t cf_pad[N];		o32/64 (N=0), n32 (N=1) n64 (N=1)
- *  	register_t cf_args[4];		arg0 - arg3 (only on o32 and o64)
- *  	register_t cf_gp;		global pointer (only on n32 and n64)
- *  	register_t cf_sp;		frame pointer
- *  	register_t cf_ra;		return address
- *  };
- */
-#if defined(__mips_o32) || defined(__mips_o64)
-#define	CALLFRAME_SIZ	(SZREG * (4 + 2))
-#define	CALLFRAME_S0	0
-#elif defined(__mips_n32) || defined(__mips_n64)
-#define	CALLFRAME_SIZ	(SZREG * 4)
-#define	CALLFRAME_S0	(CALLFRAME_SIZ - 4 * SZREG)
-#endif
-#ifndef _KERNEL
-#define	CALLFRAME_GP	(CALLFRAME_SIZ - 3 * SZREG)
-#endif
-#define	CALLFRAME_SP	(CALLFRAME_SIZ - 2 * SZREG)
-#define	CALLFRAME_RA	(CALLFRAME_SIZ - 1 * SZREG)
-
-#endif /* !_MACHINE_ABI_H_ */
diff --git a/sys/mips/include/asm.h b/sys/mips/include/asm.h
deleted file mode 100644
index 78d2c029cf08..000000000000
--- a/sys/mips/include/asm.h
+++ /dev/null
@@ -1,686 +0,0 @@
-/*	$NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)machAsmDefs.h	8.1 (Berkeley) 6/10/93
- *	JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
- * $FreeBSD$
- */
-
-/*
- * machAsmDefs.h --
- *
- *	Macros used when writing assembler programs.
- *
- *	Copyright (C) 1989 Digital Equipment Corporation.
- *	Permission to use, copy, modify, and distribute this software and
- *	its documentation for any purpose and without fee is hereby granted,
- *	provided that the above copyright notice appears in all copies.
- *	Digital Equipment Corporation makes no representations about the
- *	suitability of this software for any purpose.  It is provided "as is"
- *	without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
- *	v 1.2 89/08/15 18:28:24 rab Exp  SPRITE (DECWRL)
- */
-
-#ifndef _MACHINE_ASM_H_
-#define	_MACHINE_ASM_H_
-
-#include <machine/abi.h>
-#include <machine/regdef.h>
-#include <machine/endian.h>
-#include <machine/cdefs.h>
-
-#undef __FBSDID
-#if !defined(lint) && !defined(STRIP_FBSDID)
-#define	__FBSDID(s)	.ident s
-#else
-#define	__FBSDID(s)	/* nothing */
-#endif
-
-/*
- * Define -pg profile entry code.
- * Must always be noreorder, must never use a macro instruction
- * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
- */
-#define	_KERN_MCOUNT			\
-	.set	push;			\
-	.set	noreorder;		\
-	.set	noat;			\
-	subu	sp,sp,16;		\
-	sw	t9,12(sp);		\
-	move	AT,ra;			\
-	lui	t9,%hi(_mcount);	\
-	addiu	t9,t9,%lo(_mcount);	\
-	jalr	t9;			\
-	nop;				\
-	lw	t9,4(sp);		\
-	addiu	sp,sp,8;		\
-	addiu	t9,t9,40;		\
-	.set	pop;
-
-#ifdef GPROF
-#define	MCOUNT _KERN_MCOUNT
-#else
-#define	MCOUNT
-#endif
-
-#define	_C_LABEL(x)	x
-
-#ifdef USE_AENT
-#define	AENT(x)		\
-	.aent	x, 0
-#else
-#define	AENT(x)
-#endif
-
-/*
- * WARN_REFERENCES: create a warning if the specified symbol is referenced
- */
-#define	WARN_REFERENCES(_sym,_msg)				\
-	.section .gnu.warning. ## _sym ; .ascii _msg ; .text
-
-#ifdef __ELF__
-# define _C_LABEL(x)    x
-#else
-#  define _C_LABEL(x)   _ ## x
-#endif
-
-/*
- * WEAK_ALIAS: create a weak alias.
- */
-#define	WEAK_ALIAS(alias,sym)						\
-	.weak alias;							\
-	alias = sym
-
-/*
- * STRONG_ALIAS: create a strong alias.
- */
-#define STRONG_ALIAS(alias,sym)						\
-	.globl alias;							\
-	alias = sym
-
-#define	GLOBAL(sym)						\
-	.globl sym; sym:
-
-#define	ENTRY(sym)						\
-	.text; .globl sym; .ent sym; sym:
-
-#define	ASM_ENTRY(sym)						\
-	.text; .globl sym; .type sym,@function; sym:
-
-/*
- * LEAF
- *	A leaf routine does
- *	- call no other function,
- *	- never use any register that callee-saved (S0-S8), and
- *	- not use any local stack storage.
- */
-#define	LEAF(x)			\
-	.globl	_C_LABEL(x);	\
-	.ent	_C_LABEL(x), 0;	\
-_C_LABEL(x): ;			\
-	.frame sp, 0, ra;	\
-	MCOUNT
-
-/*
- * LEAF_NOPROFILE
- *	No profilable leaf routine.
- */
-#define	LEAF_NOPROFILE(x)	\
-	.globl	_C_LABEL(x);	\
-	.ent	_C_LABEL(x), 0;	\
-_C_LABEL(x): ;			\
-	.frame	sp, 0, ra
-
-/*
- * XLEAF
- *	declare alternate entry to leaf routine
- */
-#define	XLEAF(x)		\
-	.globl	_C_LABEL(x);	\
-	AENT (_C_LABEL(x));	\
-_C_LABEL(x):
-
-/*
- * NESTED
- *	A function calls other functions and needs
- *	therefore stack space to save/restore registers.
- */
-#define	NESTED(x, fsize, retpc)		\
-	.globl	_C_LABEL(x);		\
-	.ent	_C_LABEL(x), 0;		\
-_C_LABEL(x): ;				\
-	.frame	sp, fsize, retpc;	\
-	MCOUNT
-
-/*
- * NESTED_NOPROFILE(x)
- *	No profilable nested routine.
- */
-#define	NESTED_NOPROFILE(x, fsize, retpc)	\
-	.globl	_C_LABEL(x);			\
-	.ent	_C_LABEL(x), 0;			\
-_C_LABEL(x): ;					\
-	.frame	sp, fsize, retpc
-
-/*
- * XNESTED
- *	declare alternate entry point to nested routine.
- */
-#define	XNESTED(x)		\
-	.globl	_C_LABEL(x);	\
-	AENT (_C_LABEL(x));	\
-_C_LABEL(x):
-
-/*
- * END
- *	Mark end of a procedure.
- */
-#define	END(x)			\
-	.end _C_LABEL(x)
-
-/*
- * IMPORT -- import external symbol
- */
-#define	IMPORT(sym, size)	\
-	.extern _C_LABEL(sym),size
-
-/*
- * EXPORT -- export definition of symbol
- */
-#define	EXPORT(x)		\
-	.globl	_C_LABEL(x);	\
-_C_LABEL(x):
-
-/*
- * VECTOR
- *	exception vector entrypoint
- *	XXX: regmask should be used to generate .mask
- */
-#define	VECTOR(x, regmask)	\
-	.ent	_C_LABEL(x),0;	\
-	EXPORT(x);		\
-
-#define	VECTOR_END(x)		\
-	EXPORT(x ## End);	\
-	END(x)
-
-/*
- * Macros to panic and printf from assembly language.
- */
-#define	PANIC(msg)			\
-	PTR_LA	a0, 9f;			\
-	jal	_C_LABEL(panic);	\
-	nop;				\
-	MSG(msg)
-
-#define	PANIC_KSEG0(msg, reg)	PANIC(msg)
-
-#define	PRINTF(msg)			\
-	PTR_LA	a0, 9f;			\
-	jal	_C_LABEL(printf);	\
-	nop;				\
-	MSG(msg)
-
-#define	MSG(msg)			\
-	.rdata;				\
-9:	.asciiz	msg;			\
-	.text
-
-#define	ASMSTR(str)			\
-	.asciiz str;			\
-	.align	3
-
-#if defined(__mips_o32) || defined(__mips_o64)
-#define	ALSK	7		/* stack alignment */
-#define	ALMASK	-7		/* stack alignment */
-#define	SZFPREG	4
-#define	FP_L	lwc1
-#define	FP_S	swc1
-#else
-#define	ALSK	15		/* stack alignment */
-#define	ALMASK	-15		/* stack alignment */
-#define	SZFPREG	8
-#define	FP_L	ldc1
-#define	FP_S	sdc1
-#endif
-
-/*
- *   Endian-independent assembly-code aliases for unaligned memory accesses.
- */
-#if _BYTE_ORDER == _LITTLE_ENDIAN
-# define LWHI lwr
-# define LWLO lwl
-# define SWHI swr
-# define SWLO swl
-# if SZREG == 4
-#  define REG_LHI   lwr
-#  define REG_LLO   lwl
-#  define REG_SHI   swr
-#  define REG_SLO   swl
-# else
-#  define REG_LHI   ldr
-#  define REG_LLO   ldl
-#  define REG_SHI   sdr
-#  define REG_SLO   sdl
-# endif
-#endif
-
-#if _BYTE_ORDER == _BIG_ENDIAN
-# define LWHI lwl
-# define LWLO lwr
-# define SWHI swl
-# define SWLO swr
-# if SZREG == 4
-#  define REG_LHI   lwl
-#  define REG_LLO   lwr
-#  define REG_SHI   swl
-#  define REG_SLO   swr
-# else
-#  define REG_LHI   ldl
-#  define REG_LLO   ldr
-#  define REG_SHI   sdl
-#  define REG_SLO   sdr
-# endif
-#endif
-
-/*
- * While it would be nice to be compatible with the SGI
- * REG_L and REG_S macros, because they do not take parameters, it
- * is impossible to use them with the _MIPS_SIM_ABIX32 model.
- *
- * These macros hide the use of mips3 instructions from the
- * assembler to prevent the assembler from generating 64-bit style
- * ABI calls.
- */
-#if _MIPS_SZPTR == 32
-#define	PTR_ADD		add
-#define	PTR_ADDI	addi
-#define	PTR_ADDU	addu
-#define	PTR_ADDIU	addiu
-#define	PTR_SUB		add
-#define	PTR_SUBI	subi
-#define	PTR_SUBU	subu
-#define	PTR_SUBIU	subu
-#define	PTR_L		lw
-#define	PTR_LA		la
-#define	PTR_LI		li
-#define	PTR_S		sw
-#define	PTR_SLL		sll
-#define	PTR_SLLV	sllv
-#define	PTR_SRL		srl
-#define	PTR_SRLV	srlv
-#define	PTR_SRA		sra
-#define	PTR_SRAV	srav
-#define	PTR_LL		ll
-#define	PTR_SC		sc
-#define	PTR_WORD	.word
-#define	PTR_SCALESHIFT	2
-#else /* _MIPS_SZPTR == 64 */
-#define	PTR_ADD		dadd
-#define	PTR_ADDI	daddi
-#define	PTR_ADDU	daddu
-#define	PTR_ADDIU	daddiu
-#define	PTR_SUB		dadd
-#define	PTR_SUBI	dsubi
-#define	PTR_SUBU	dsubu
-#define	PTR_SUBIU	dsubu
-#define	PTR_L		ld
-#define	PTR_LA		dla
-#define	PTR_LI		dli
-#define	PTR_S		sd
-#define	PTR_SLL		dsll
-#define	PTR_SLLV	dsllv
-#define	PTR_SRL		dsrl
-#define	PTR_SRLV	dsrlv
-#define	PTR_SRA		dsra
-#define	PTR_SRAV	dsrav
-#define	PTR_LL		lld
-#define	PTR_SC		scd
-#define	PTR_WORD	.dword
-#define	PTR_SCALESHIFT	3
-#endif /* _MIPS_SZPTR == 64 */
-
-#if _MIPS_SZINT == 32
-#define	INT_ADD		add
-#define	INT_ADDI	addi
-#define	INT_ADDU	addu
-#define	INT_ADDIU	addiu
-#define	INT_SUB		add
-#define	INT_SUBI	subi
-#define	INT_SUBU	subu
-#define	INT_SUBIU	subu
-#define	INT_L		lw
-#define	INT_LA		la
-#define	INT_S		sw
-#define	INT_SLL		sll
-#define	INT_SLLV	sllv
-#define	INT_SRL		srl
-#define	INT_SRLV	srlv
-#define	INT_SRA		sra
-#define	INT_SRAV	srav
-#define	INT_LL		ll
-#define	INT_SC		sc
-#define	INT_WORD	.word
-#define	INT_SCALESHIFT	2
-#else
-#define	INT_ADD		dadd
-#define	INT_ADDI	daddi
-#define	INT_ADDU	daddu
-#define	INT_ADDIU	daddiu
-#define	INT_SUB		dadd
-#define	INT_SUBI	dsubi
-#define	INT_SUBU	dsubu
-#define	INT_SUBIU	dsubu
-#define	INT_L		ld
-#define	INT_LA		dla
-#define	INT_S		sd
-#define	INT_SLL		dsll
-#define	INT_SLLV	dsllv
-#define	INT_SRL		dsrl
-#define	INT_SRLV	dsrlv
-#define	INT_SRA		dsra
-#define	INT_SRAV	dsrav
-#define	INT_LL		lld
-#define	INT_SC		scd
-#define	INT_WORD	.dword
-#define	INT_SCALESHIFT	3
-#endif
-
-#if _MIPS_SZLONG == 32
-#define	LONG_ADD	add
-#define	LONG_ADDI	addi
-#define	LONG_ADDU	addu
-#define	LONG_ADDIU	addiu
-#define	LONG_SUB	add
-#define	LONG_SUBI	subi
-#define	LONG_SUBU	subu
-#define	LONG_SUBIU	subu
-#define	LONG_L		lw
-#define	LONG_LA		la
-#define	LONG_S		sw
-#define	LONG_SLL	sll
-#define	LONG_SLLV	sllv
-#define	LONG_SRL	srl
-#define	LONG_SRLV	srlv
-#define	LONG_SRA	sra
-#define	LONG_SRAV	srav
-#define	LONG_LL		ll
-#define	LONG_SC		sc
-#define	LONG_WORD	.word
-#define	LONG_SCALESHIFT	2
-#else
-#define	LONG_ADD	dadd
-#define	LONG_ADDI	daddi
-#define	LONG_ADDU	daddu
-#define	LONG_ADDIU	daddiu
-#define	LONG_SUB	dadd
-#define	LONG_SUBI	dsubi
-#define	LONG_SUBU	dsubu
-#define	LONG_SUBIU	dsubu
-#define	LONG_L		ld
-#define	LONG_LA		dla
-#define	LONG_S		sd
-#define	LONG_SLL	dsll
-#define	LONG_SLLV	dsllv
-#define	LONG_SRL	dsrl
-#define	LONG_SRLV	dsrlv
-#define	LONG_SRA	dsra
-#define	LONG_SRAV	dsrav
-#define	LONG_LL		lld
-#define	LONG_SC		scd
-#define	LONG_WORD	.dword
-#define	LONG_SCALESHIFT	3
-#endif
-
-#if SZREG == 4
-#define	REG_L		lw
-#define	REG_S		sw
-#define	REG_LI		li
-#define	REG_ADDU	addu
-#define	REG_SLL		sll
-#define	REG_SLLV	sllv
-#define	REG_SRL		srl
-#define	REG_SRLV	srlv
-#define	REG_SRA		sra
-#define	REG_SRAV	srav
-#define	REG_LL		ll
-#define	REG_SC		sc
-#define	REG_SCALESHIFT	2
-#else
-#define	REG_L		ld
-#define	REG_S		sd
-#define	REG_LI		dli
-#define	REG_ADDU	daddu
-#define	REG_SLL		dsll
-#define	REG_SLLV	dsllv
-#define	REG_SRL		dsrl
-#define	REG_SRLV	dsrlv
-#define	REG_SRA		dsra
-#define	REG_SRAV	dsrav
-#define	REG_LL		lld
-#define	REG_SC		scd
-#define	REG_SCALESHIFT	3
-#endif
-
-#if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \
-    _MIPS_ISA == _MIPS_ISA_MIPS32
-#define	MFC0		mfc0
-#define	MTC0		mtc0
-#endif
-#if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \
-    _MIPS_ISA == _MIPS_ISA_MIPS64
-#define	MFC0		dmfc0
-#define	MTC0		dmtc0
-#endif
-
-#if defined(__mips_o32) || defined(__mips_o64)
-
-#ifdef __ABICALLS__
-#define	CPRESTORE(r)	.cprestore r
-#define	CPLOAD(r)	.cpload r
-#else
-#define	CPRESTORE(r)	/* not needed */
-#define	CPLOAD(r)	/* not needed */
-#endif
-
-#define	SETUP_GP	\
-			.set push;				\
-			.set noreorder;				\
-			.cpload	t9;				\
-			.set pop
-#define	SETUP_GPX(r)	\
-			.set push;				\
-			.set noreorder;				\
-			move	r,ra;	/* save old ra */	\
-			bal	7f;				\
-			nop;					\
-		7:	.cpload	ra;				\
-			move	ra,r;				\
-			.set pop
-#define	SETUP_GPX_L(r,lbl)	\
-			.set push;				\
-			.set noreorder;				\
-			move	r,ra;	/* save old ra */	\
-			bal	lbl;				\
-			nop;					\
-		lbl:	.cpload	ra;				\
-			move	ra,r;				\
-			.set pop
-#define	SAVE_GP(x)	.cprestore x
-
-#define	SETUP_GP64(a,b)		/* n32/n64 specific */
-#define	SETUP_GP64_R(a,b)	/* n32/n64 specific */
-#define	SETUP_GPX64(a,b)	/* n32/n64 specific */
-#define	SETUP_GPX64_L(a,b,c)	/* n32/n64 specific */
-#define	RESTORE_GP64		/* n32/n64 specific */
-#define	USE_ALT_CP(a)		/* n32/n64 specific */
-#endif /* __mips_o32 || __mips_o64 */
-
-#if defined(__mips_o32) || defined(__mips_o64)
-#define	REG_PROLOGUE	.set push
-#define	REG_EPILOGUE	.set pop
-#endif
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	REG_PROLOGUE	.set push ; .set mips3
-#define	REG_EPILOGUE	.set pop
-#endif
-
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	SETUP_GP		/* o32 specific */
-#define	SETUP_GPX(r)		/* o32 specific */
-#define	SETUP_GPX_L(r,lbl)	/* o32 specific */
-#define	SAVE_GP(x)		/* o32 specific */
-#define	SETUP_GP64(a,b)		.cpsetup $25, a, b
-#define	SETUP_GPX64(a,b)	\
-				.set push;			\
-				move	b,ra;			\
-				.set noreorder;			\
-				bal	7f;			\
-				nop;				\
-			7:	.set pop;			\
-				.cpsetup ra, a, 7b;		\
-				move	ra,b
-#define	SETUP_GPX64_L(a,b,c)	\
-				.set push;			\
-				move	b,ra;			\
-				.set noreorder;			\
-				bal	c;			\
-				nop;				\
-			c:	.set pop;			\
-				.cpsetup ra, a, c;		\
-				move	ra,b
-#define	RESTORE_GP64		.cpreturn
-#define	USE_ALT_CP(a)		.cplocal a
-#endif	/* __mips_n32 || __mips_n64 */
-
-#define	GET_CPU_PCPU(reg)		\
-	PTR_L	reg, _C_LABEL(pcpup);
-
-/*
- * Description of the setjmp buffer
- *
- * word  0	magic number	(dependant on creator)
- *       1	RA
- *       2	S0
- *       3	S1
- *       4	S2
- *       5	S3
- *       6	S4
- *       7	S5
- *       8	S6
- *       9	S7
- *       10	SP
- *       11	S8
- *       12	GP		(dependent on ABI)
- *       13	signal mask	(dependant on magic)
- *       14	(con't)
- *       15	(con't)
- *       16	(con't)
- *
- * The magic number number identifies the jmp_buf and
- * how the buffer was created as well as providing
- * a sanity check
- *
- */
-
-#define _JB_MAGIC__SETJMP	0xBADFACED
-#define _JB_MAGIC_SETJMP	0xFACEDBAD
-
-/* Valid for all jmp_buf's */
-
-#define _JB_MAGIC		0
-#define _JB_REG_RA		1
-#define _JB_REG_S0		2
-#define _JB_REG_S1		3
-#define _JB_REG_S2		4
-#define _JB_REG_S3		5
-#define _JB_REG_S4		6
-#define _JB_REG_S5		7
-#define _JB_REG_S6		8
-#define _JB_REG_S7		9
-#define _JB_REG_SP		10
-#define _JB_REG_S8		11
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	_JB_REG_GP		12
-#endif
-
-/* Only valid with the _JB_MAGIC_SETJMP magic */
-
-#define _JB_SIGMASK		13
-#define	__JB_SIGMASK_REMAINDER	14	/* sigmask_t is 128-bits */
-
-#define _JB_FPREG_F20		15
-#define _JB_FPREG_F21		16
-#define _JB_FPREG_F22		17
-#define _JB_FPREG_F23		18
-#define _JB_FPREG_F24		19
-#define _JB_FPREG_F25		20
-#define _JB_FPREG_F26		21
-#define _JB_FPREG_F27		22
-#define _JB_FPREG_F28		23
-#define _JB_FPREG_F29		24
-#define _JB_FPREG_F30		25
-#define _JB_FPREG_F31		26
-#define _JB_FPREG_FCSR		27
-
-/*
- * Various macros for dealing with TLB hazards
- * (a) why so many?
- * (b) when to use?
- * (c) why not used everywhere?
- */
-/*
- * Assume that w alaways need nops to escape CP0 hazard
- * TODO: Make hazard delays configurable. Stuck with 5 cycles on the moment
- * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture 
- *    For Programmers Volume III: The MIPS32 Privileged Resource Architecture"
- */
-#if defined(CPU_NLM)
-#define	HAZARD_DELAY	sll $0,3
-#define	ITLBNOPFIX	sll $0,3
-#elif defined(CPU_RMI)
-#define	HAZARD_DELAY
-#define	ITLBNOPFIX
-#elif defined(CPU_MIPS74K)
-#define	HAZARD_DELAY	sll $0,$0,3
-#define	ITLBNOPFIX	sll $0,$0,3
-#else
-#define	ITLBNOPFIX	nop;nop;nop;nop;nop;nop;nop;nop;nop;sll $0,$0,3;
-#define	HAZARD_DELAY	nop;nop;nop;nop;sll $0,$0,3;
-#endif
-
-#endif /* !_MACHINE_ASM_H_ */
diff --git a/sys/mips/include/atomic.h b/sys/mips/include/atomic.h
deleted file mode 100644
index ad8abf3498f1..000000000000
--- a/sys/mips/include/atomic.h
+++ /dev/null
@@ -1,851 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/atomic.h,v 1.21.2.3 2005/10/06 18:12:05 jhb
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_ATOMIC_H_
-#define	_MACHINE_ATOMIC_H_
-
-#ifndef _SYS_CDEFS_H_
-#error this file needs sys/cdefs.h as a prerequisite
-#endif
-
-#include <sys/atomic_common.h>
-
-#if !defined(__mips_n64) && !defined(__mips_n32)
-#include <sys/_atomic64e.h>
-#endif
-
-/*
- * Note: All the 64-bit atomic operations are only atomic when running
- * in 64-bit mode.  It is assumed that code compiled for n32 and n64
- * fits into this definition and no further safeties are needed.
- *
- * It is also assumed that the add, subtract and other arithmetic is
- * done on numbers not pointers.  The special rules for n32 pointers
- * do not have atomic operations defined for them, but generally shouldn't
- * need atomic operations.
- */
-#ifndef __MIPS_PLATFORM_SYNC_NOPS
-#define __MIPS_PLATFORM_SYNC_NOPS ""
-#endif
-
-static __inline  void
-mips_sync(void)
-{
-	__asm __volatile (".set noreorder\n"
-			"\tsync\n"
-			__MIPS_PLATFORM_SYNC_NOPS
-			".set reorder\n"
-			: : : "memory");
-}
-
-#define mb()	mips_sync()
-#define wmb()	mips_sync()
-#define rmb()	mips_sync()
-
-/*
- * Various simple arithmetic on memory which is atomic in the presence
- * of interrupts and SMP safe.
- */
-
-void atomic_set_8(__volatile uint8_t *, uint8_t);
-void atomic_clear_8(__volatile uint8_t *, uint8_t);
-void atomic_add_8(__volatile uint8_t *, uint8_t);
-void atomic_subtract_8(__volatile uint8_t *, uint8_t);
-
-void atomic_set_16(__volatile uint16_t *, uint16_t);
-void atomic_clear_16(__volatile uint16_t *, uint16_t);
-void atomic_add_16(__volatile uint16_t *, uint16_t);
-void atomic_subtract_16(__volatile uint16_t *, uint16_t);
-
-static __inline int atomic_cmpset_8(__volatile uint8_t *, uint8_t, uint8_t);
-static __inline int atomic_fcmpset_8(__volatile uint8_t *, uint8_t *, uint8_t);
-static __inline int atomic_cmpset_16(__volatile uint16_t *, uint16_t, uint16_t);
-static __inline int atomic_fcmpset_16(__volatile uint16_t *, uint16_t *, uint16_t);
-
-static __inline void
-atomic_set_32(__volatile uint32_t *p, uint32_t v)
-{
-	uint32_t temp;
-
-	__asm __volatile (
-		"1:\tll	%0, %3\n\t"		/* load old value */
-		"or	%0, %2, %0\n\t"		/* calculate new value */
-		"sc	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-
-}
-
-static __inline void
-atomic_clear_32(__volatile uint32_t *p, uint32_t v)
-{
-	uint32_t temp;
-	v = ~v;
-
-	__asm __volatile (
-		"1:\tll	%0, %3\n\t"		/* load old value */
-		"and	%0, %2, %0\n\t"		/* calculate new value */
-		"sc	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline void
-atomic_add_32(__volatile uint32_t *p, uint32_t v)
-{
-	uint32_t temp;
-
-	__asm __volatile (
-		"1:\tll	%0, %3\n\t"		/* load old value */
-		"addu	%0, %2, %0\n\t"		/* calculate new value */
-		"sc	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline void
-atomic_subtract_32(__volatile uint32_t *p, uint32_t v)
-{
-	uint32_t temp;
-
-	__asm __volatile (
-		"1:\tll	%0, %3\n\t"		/* load old value */
-		"subu	%0, %2\n\t"		/* calculate new value */
-		"sc	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline uint32_t
-atomic_readandclear_32(__volatile uint32_t *addr)
-{
-	uint32_t result,temp;
-
-	__asm __volatile (
-		"1:\tll	 %0,%3\n\t"	/* load current value, asserting lock */
-		"li	 %1,0\n\t"		/* value to store */
-		"sc	 %1,%2\n\t"	/* attempt to store */
-		"beqz	 %1, 1b\n\t"		/* if the store failed, spin */
-		: "=&r"(result), "=&r"(temp), "=m" (*addr)
-		: "m" (*addr)
-		: "memory");
-
-	return result;
-}
-
-static __inline uint32_t
-atomic_readandset_32(__volatile uint32_t *addr, uint32_t value)
-{
-	uint32_t result,temp;
-
-	__asm __volatile (
-		"1:\tll	 %0,%3\n\t"	/* load current value, asserting lock */
-		"or      %1,$0,%4\n\t"
-		"sc	 %1,%2\n\t"	/* attempt to store */
-		"beqz	 %1, 1b\n\t"		/* if the store failed, spin */
-		: "=&r"(result), "=&r"(temp), "=m" (*addr)
-		: "m" (*addr), "r" (value)
-		: "memory");
-
-	return result;
-}
-
-#if defined(__mips_n64) || defined(__mips_n32)
-static __inline void
-atomic_set_64(__volatile uint64_t *p, uint64_t v)
-{
-	uint64_t temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %3\n\t"		/* load old value */
-		"or	%0, %2, %0\n\t"		/* calculate new value */
-		"scd	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-
-}
-
-static __inline void
-atomic_clear_64(__volatile uint64_t *p, uint64_t v)
-{
-	uint64_t temp;
-	v = ~v;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %3\n\t"		/* load old value */
-		"and	%0, %2, %0\n\t"		/* calculate new value */
-		"scd	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline void
-atomic_add_64(__volatile uint64_t *p, uint64_t v)
-{
-	uint64_t temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %3\n\t"		/* load old value */
-		"daddu	%0, %2, %0\n\t"		/* calculate new value */
-		"scd	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline void
-atomic_subtract_64(__volatile uint64_t *p, uint64_t v)
-{
-	uint64_t temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %3\n\t"		/* load old value */
-		"dsubu	%0, %2\n\t"		/* calculate new value */
-		"scd	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* spin if failed */
-		: "=&r" (temp), "=m" (*p)
-		: "r" (v), "m" (*p)
-		: "memory");
-}
-
-static __inline uint64_t
-atomic_readandclear_64(__volatile uint64_t *addr)
-{
-	uint64_t result,temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	 %0, %3\n\t"		/* load old value */
-		"li	 %1, 0\n\t"		/* value to store */
-		"scd	 %1, %2\n\t"		/* attempt to store */
-		"beqz	 %1, 1b\n\t"		/* if the store failed, spin */
-		: "=&r"(result), "=&r"(temp), "=m" (*addr)
-		: "m" (*addr)
-		: "memory");
-
-	return result;
-}
-
-static __inline uint64_t
-atomic_readandset_64(__volatile uint64_t *addr, uint64_t value)
-{
-	uint64_t result,temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	 %0,%3\n\t"		/* Load old value*/
-		"or      %1,$0,%4\n\t"
-		"scd	 %1,%2\n\t"		/* attempt to store */
-		"beqz	 %1, 1b\n\t"		/* if the store failed, spin */
-		: "=&r"(result), "=&r"(temp), "=m" (*addr)
-		: "m" (*addr), "r" (value)
-		: "memory");
-
-	return result;
-}
-#endif
-
-#define	ATOMIC_ACQ_REL(NAME, WIDTH)					\
-static __inline  void							\
-atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
-{									\
-	atomic_##NAME##_##WIDTH(p, v);					\
-	mips_sync(); 							\
-}									\
-									\
-static __inline  void							\
-atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
-{									\
-	mips_sync();							\
-	atomic_##NAME##_##WIDTH(p, v);					\
-}
-
-/* Variants of simple arithmetic with memory barriers. */
-ATOMIC_ACQ_REL(set, 8)
-ATOMIC_ACQ_REL(clear, 8)
-ATOMIC_ACQ_REL(add, 8)
-ATOMIC_ACQ_REL(subtract, 8)
-ATOMIC_ACQ_REL(set, 16)
-ATOMIC_ACQ_REL(clear, 16)
-ATOMIC_ACQ_REL(add, 16)
-ATOMIC_ACQ_REL(subtract, 16)
-ATOMIC_ACQ_REL(set, 32)
-ATOMIC_ACQ_REL(clear, 32)
-ATOMIC_ACQ_REL(add, 32)
-ATOMIC_ACQ_REL(subtract, 32)
-#if defined(__mips_n64) || defined(__mips_n32)
-ATOMIC_ACQ_REL(set, 64)
-ATOMIC_ACQ_REL(clear, 64)
-ATOMIC_ACQ_REL(add, 64)
-ATOMIC_ACQ_REL(subtract, 64)
-#endif
-
-#undef ATOMIC_ACQ_REL
-
-/*
- * We assume that a = b will do atomic loads and stores.
- */
-#define	ATOMIC_STORE_LOAD(WIDTH)			\
-static __inline  uint##WIDTH##_t			\
-atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p)	\
-{							\
-	uint##WIDTH##_t v;				\
-							\
-	v = *p;						\
-	mips_sync();					\
-	return (v);					\
-}							\
-							\
-static __inline  void					\
-atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
-{							\
-	mips_sync();					\
-	*p = v;						\
-}
-
-ATOMIC_STORE_LOAD(32)
-#if defined(__mips_n64) || defined(__mips_n32)
-ATOMIC_STORE_LOAD(64)
-#endif
-#undef ATOMIC_STORE_LOAD
-
-/*
- * MIPS n32 is not a LP64 API, so atomic_load_64 isn't defined there. Define it
- * here since n32 is an oddball !LP64 but that can do 64-bit atomics.
- */
-#if defined(__mips_n32)
-#define	atomic_load_64	atomic_load_acq_64
-#endif
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-static __inline int
-atomic_cmpset_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
-{
-	int ret;
-
-	__asm __volatile (
-		"1:\tll	%0, %4\n\t"		/* load old value */
-		"bne %0, %2, 2f\n\t"		/* compare */
-		"move %0, %3\n\t"		/* value to store */
-		"sc %0, %1\n\t"			/* attempt to store */
-		"beqz %0, 1b\n\t"		/* if it failed, spin */
-		"j 3f\n\t"
-		"2:\n\t"
-		"li	%0, 0\n\t"
-		"3:\n"
-		: "=&r" (ret), "=m" (*p)
-		: "r" (cmpval), "r" (newval), "m" (*p)
-		: "memory");
-
-	return ret;
-}
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-static __inline int
-atomic_fcmpset_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
-{
-	int ret;
-
-	/*
-	 * The following sequence (similar to that in atomic_fcmpset_64) will
-	 * attempt to update the value of *p with newval if the comparison
-	 * succeeds.  Note that they'll exit regardless of whether the store
-	 * actually succeeded, leaving *cmpval untouched.  This is in line with
-	 * the documentation of atomic_fcmpset_<type>() in atomic(9) for ll/sc
-	 * architectures.
-	 */
-	__asm __volatile (
-		"ll	%0, %1\n\t"		/* load old value */
-		"bne	%0, %4, 1f\n\t"		/* compare */
-		"move	%0, %3\n\t"		/* value to store */
-		"sc	%0, %1\n\t"		/* attempt to store */
-		"j	2f\n\t"			/* exit regardless of success */
-		"nop\n\t"			/* avoid delay slot accident */
-		"1:\n\t"
-		"sw	%0, %2\n\t"		/* save old value */
-		"li	%0, 0\n\t"
-		"2:\n"
-		: "=&r" (ret), "+m" (*p), "=m" (*cmpval)
-		: "r" (newval), "r" (*cmpval)
-		: "memory");
-	return ret;
-}
-
-#define	ATOMIC_CMPSET_ACQ_REL(WIDTH)					\
-static __inline  int							\
-atomic_cmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p,		\
-    uint##WIDTH##_t cmpval, uint##WIDTH##_t newval)			\
-{									\
-	int retval;							\
-									\
-	retval = atomic_cmpset_##WIDTH(p, cmpval, newval);		\
-	mips_sync();							\
-	return (retval);						\
-}									\
-									\
-static __inline  int							\
-atomic_cmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p,		\
-    uint##WIDTH##_t cmpval, uint##WIDTH##_t newval)			\
-{									\
-	mips_sync();							\
-	return (atomic_cmpset_##WIDTH(p, cmpval, newval));		\
-}
-
-#define	ATOMIC_FCMPSET_ACQ_REL(WIDTH)					\
-static __inline  int							\
-atomic_fcmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p,		\
-    uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval)			\
-{									\
-	int retval;							\
-									\
-	retval = atomic_fcmpset_##WIDTH(p, cmpval, newval);		\
-	mips_sync();							\
-	return (retval);						\
-}									\
-									\
-static __inline  int							\
-atomic_fcmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p,		\
-    uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval)			\
-{									\
-	mips_sync();							\
-	return (atomic_fcmpset_##WIDTH(p, cmpval, newval));		\
-}
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-ATOMIC_CMPSET_ACQ_REL(8);
-ATOMIC_CMPSET_ACQ_REL(16);
-ATOMIC_CMPSET_ACQ_REL(32);
-ATOMIC_FCMPSET_ACQ_REL(8);
-ATOMIC_FCMPSET_ACQ_REL(16);
-ATOMIC_FCMPSET_ACQ_REL(32);
-
-/*
- * Atomically add the value of v to the integer pointed to by p and return
- * the previous value of *p.
- */
-static __inline uint32_t
-atomic_fetchadd_32(__volatile uint32_t *p, uint32_t v)
-{
-	uint32_t value, temp;
-
-	__asm __volatile (
-		"1:\tll %0, %1\n\t"		/* load old value */
-		"addu %2, %3, %0\n\t"		/* calculate new value */
-		"sc %2, %1\n\t"			/* attempt to store */
-		"beqz %2, 1b\n\t"		/* spin if failed */
-		: "=&r" (value), "=m" (*p), "=&r" (temp)
-		: "r" (v), "m" (*p));
-	return (value);
-}
-
-#if defined(__mips_n64) || defined(__mips_n32)
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-static __inline int
-atomic_cmpset_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
-{
-	int ret;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %4\n\t"		/* load old value */
-		"bne	%0, %2, 2f\n\t"		/* compare */
-		"move	%0, %3\n\t"		/* value to store */
-		"scd	%0, %1\n\t"		/* attempt to store */
-		"beqz	%0, 1b\n\t"		/* if it failed, spin */
-		"j	3f\n\t"
-		"2:\n\t"
-		"li	%0, 0\n\t"
-		"3:\n"
-		: "=&r" (ret), "=m" (*p)
-		: "r" (cmpval), "r" (newval), "m" (*p)
-		: "memory");
-
-	return ret;
-}
-
-static __inline int
-atomic_fcmpset_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
-{
-        int ret;
-
-        __asm __volatile (
-		"lld	%0, %1\n\t"		/* load old value */
-                "bne	%0, %4, 1f\n\t"		/* compare */
-                "move	%0, %3\n\t"		/* value to store */
-                "scd	%0, %1\n\t"		/* attempt to store */
-		"j	2f\n\t"			/* exit regardless of success */
-		"nop\n\t"			/* avoid delay slot accident */
-                "1:\n\t"
-                "sd	%0, %2\n\t"		/* save old value */
-                "li	%0, 0\n\t"
-                "2:\n"
-                : "=&r" (ret), "+m" (*p), "=m" (*cmpval)
-                : "r" (newval), "r" (*cmpval)
-                : "memory");
-
-	return ret;
-}
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-ATOMIC_CMPSET_ACQ_REL(64);
-ATOMIC_FCMPSET_ACQ_REL(64);
-
-/*
- * Atomically add the value of v to the integer pointed to by p and return
- * the previous value of *p.
- */
-static __inline uint64_t
-atomic_fetchadd_64(__volatile uint64_t *p, uint64_t v)
-{
-	uint64_t value, temp;
-
-	__asm __volatile (
-		"1:\n\t"
-		"lld	%0, %1\n\t"		/* load old value */
-		"daddu	%2, %3, %0\n\t"		/* calculate new value */
-		"scd	%2, %1\n\t"		/* attempt to store */
-		"beqz	%2, 1b\n\t"		/* spin if failed */
-		: "=&r" (value), "=m" (*p), "=&r" (temp)
-		: "r" (v), "m" (*p));
-	return (value);
-}
-#endif
-
-static __inline void
-atomic_thread_fence_acq(void)
-{
-
-	mips_sync();
-}
-
-static __inline void
-atomic_thread_fence_rel(void)
-{
-
-	mips_sync();
-}
-
-static __inline void
-atomic_thread_fence_acq_rel(void)
-{
-
-	mips_sync();
-}
-
-static __inline void
-atomic_thread_fence_seq_cst(void)
-{
-
-	mips_sync();
-}
-
-/* Operations on chars. */
-#define	atomic_set_char		atomic_set_8
-#define	atomic_set_acq_char	atomic_set_acq_8
-#define	atomic_set_rel_char	atomic_set_rel_8
-#define	atomic_clear_char	atomic_clear_8
-#define	atomic_clear_acq_char	atomic_clear_acq_8
-#define	atomic_clear_rel_char	atomic_clear_rel_8
-#define	atomic_add_char		atomic_add_8
-#define	atomic_add_acq_char	atomic_add_acq_8
-#define	atomic_add_rel_char	atomic_add_rel_8
-#define	atomic_subtract_char	atomic_subtract_8
-#define	atomic_subtract_acq_char	atomic_subtract_acq_8
-#define	atomic_subtract_rel_char	atomic_subtract_rel_8
-#define	atomic_cmpset_char	atomic_cmpset_8
-#define	atomic_cmpset_acq_char	atomic_cmpset_acq_8
-#define	atomic_cmpset_rel_char	atomic_cmpset_rel_8
-#define	atomic_fcmpset_char	atomic_fcmpset_8
-#define	atomic_fcmpset_acq_char	atomic_fcmpset_acq_8
-#define	atomic_fcmpset_rel_char	atomic_fcmpset_rel_8
-
-/* Operations on shorts. */
-#define	atomic_set_short	atomic_set_16
-#define	atomic_set_acq_short	atomic_set_acq_16
-#define	atomic_set_rel_short	atomic_set_rel_16
-#define	atomic_clear_short	atomic_clear_16
-#define	atomic_clear_acq_short	atomic_clear_acq_16
-#define	atomic_clear_rel_short	atomic_clear_rel_16
-#define	atomic_add_short	atomic_add_16
-#define	atomic_add_acq_short	atomic_add_acq_16
-#define	atomic_add_rel_short	atomic_add_rel_16
-#define	atomic_subtract_short	atomic_subtract_16
-#define	atomic_subtract_acq_short	atomic_subtract_acq_16
-#define	atomic_subtract_rel_short	atomic_subtract_rel_16
-#define	atomic_cmpset_short	atomic_cmpset_16
-#define	atomic_cmpset_acq_short	atomic_cmpset_acq_16
-#define	atomic_cmpset_rel_short	atomic_cmpset_rel_16
-#define	atomic_fcmpset_short	atomic_fcmpset_16
-#define	atomic_fcmpset_acq_short	atomic_fcmpset_acq_16
-#define	atomic_fcmpset_rel_short	atomic_fcmpset_rel_16
-
-/* Operations on ints. */
-#define	atomic_set_int		atomic_set_32
-#define	atomic_set_acq_int	atomic_set_acq_32
-#define	atomic_set_rel_int	atomic_set_rel_32
-#define	atomic_clear_int	atomic_clear_32
-#define	atomic_clear_acq_int	atomic_clear_acq_32
-#define	atomic_clear_rel_int	atomic_clear_rel_32
-#define	atomic_add_int		atomic_add_32
-#define	atomic_add_acq_int	atomic_add_acq_32
-#define	atomic_add_rel_int	atomic_add_rel_32
-#define	atomic_subtract_int	atomic_subtract_32
-#define	atomic_subtract_acq_int	atomic_subtract_acq_32
-#define	atomic_subtract_rel_int	atomic_subtract_rel_32
-#define	atomic_cmpset_int	atomic_cmpset_32
-#define	atomic_cmpset_acq_int	atomic_cmpset_acq_32
-#define	atomic_cmpset_rel_int	atomic_cmpset_rel_32
-#define	atomic_fcmpset_int	atomic_fcmpset_32
-#define	atomic_fcmpset_acq_int	atomic_fcmpset_acq_32
-#define	atomic_fcmpset_rel_int	atomic_fcmpset_rel_32
-#define	atomic_load_acq_int	atomic_load_acq_32
-#define	atomic_store_rel_int	atomic_store_rel_32
-#define	atomic_readandclear_int	atomic_readandclear_32
-#define	atomic_readandset_int	atomic_readandset_32
-#define	atomic_fetchadd_int	atomic_fetchadd_32
-
-/*
- * I think the following is right, even for n32.  For n32 the pointers
- * are still 32-bits, so we need to operate on them as 32-bit quantities,
- * even though they are sign extended in operation.  For longs, there's
- * no question because they are always 32-bits.
- */
-#ifdef __mips_n64
-/* Operations on longs. */
-#define	atomic_set_long		atomic_set_64
-#define	atomic_set_acq_long	atomic_set_acq_64
-#define	atomic_set_rel_long	atomic_set_rel_64
-#define	atomic_clear_long	atomic_clear_64
-#define	atomic_clear_acq_long	atomic_clear_acq_64
-#define	atomic_clear_rel_long	atomic_clear_rel_64
-#define	atomic_add_long		atomic_add_64
-#define	atomic_add_acq_long	atomic_add_acq_64
-#define	atomic_add_rel_long	atomic_add_rel_64
-#define	atomic_subtract_long	atomic_subtract_64
-#define	atomic_subtract_acq_long	atomic_subtract_acq_64
-#define	atomic_subtract_rel_long	atomic_subtract_rel_64
-#define	atomic_cmpset_long	atomic_cmpset_64
-#define	atomic_cmpset_acq_long	atomic_cmpset_acq_64
-#define	atomic_cmpset_rel_long	atomic_cmpset_rel_64
-#define	atomic_fcmpset_long	atomic_fcmpset_64
-#define	atomic_fcmpset_acq_long	atomic_fcmpset_acq_64
-#define	atomic_fcmpset_rel_long	atomic_fcmpset_rel_64
-#define	atomic_load_acq_long	atomic_load_acq_64
-#define	atomic_store_rel_long	atomic_store_rel_64
-#define	atomic_fetchadd_long	atomic_fetchadd_64
-#define	atomic_readandclear_long	atomic_readandclear_64
-
-#else /* !__mips_n64 */
-
-/* Operations on longs. */
-#define	atomic_set_long(p, v)						\
-	atomic_set_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_set_acq_long(p, v)					\
-	atomic_set_acq_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_set_rel_long(p, v)					\
-	atomic_set_rel_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_clear_long(p, v)						\
-	atomic_clear_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_clear_acq_long(p, v)					\
-	atomic_clear_acq_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_clear_rel_long(p, v)					\
-	atomic_clear_rel_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_add_long(p, v)						\
-	atomic_add_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_add_acq_long(p, v)					\
-	atomic_add_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_add_rel_long(p, v)					\
-	atomic_add_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_subtract_long(p, v)					\
-	atomic_subtract_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_subtract_acq_long(p, v)					\
-	atomic_subtract_acq_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_subtract_rel_long(p, v)					\
-	atomic_subtract_rel_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_cmpset_long(p, cmpval, newval)				\
-	atomic_cmpset_32((volatile u_int *)(p), (u_int)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_cmpset_acq_long(p, cmpval, newval)			\
-	atomic_cmpset_acq_32((volatile u_int *)(p), (u_int)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_cmpset_rel_long(p, cmpval, newval)			\
-	atomic_cmpset_rel_32((volatile u_int *)(p), (u_int)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_fcmpset_long(p, cmpval, newval)				\
-	atomic_fcmpset_32((volatile u_int *)(p), (u_int *)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_fcmpset_acq_long(p, cmpval, newval)			\
-	atomic_fcmpset_acq_32((volatile u_int *)(p), (u_int *)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_fcmpset_rel_long(p, cmpval, newval)			\
-	atomic_fcmpset_rel_32((volatile u_int *)(p), (u_int *)(cmpval),	\
-	    (u_int)(newval))
-#define	atomic_load_acq_long(p)						\
-	(u_long)atomic_load_acq_32((volatile u_int *)(p))
-#define	atomic_store_rel_long(p, v)					\
-	atomic_store_rel_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_fetchadd_long(p, v)					\
-	atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v))
-#define	atomic_readandclear_long(p)					\
-	atomic_readandclear_32((volatile u_int *)(p))
-
-#endif /* __mips_n64 */
-
-/* Operations on pointers. */
-#define	atomic_set_ptr		atomic_set_long
-#define	atomic_set_acq_ptr	atomic_set_acq_long
-#define	atomic_set_rel_ptr	atomic_set_rel_long
-#define	atomic_clear_ptr	atomic_clear_long
-#define	atomic_clear_acq_ptr	atomic_clear_acq_long
-#define	atomic_clear_rel_ptr	atomic_clear_rel_long
-#define	atomic_add_ptr		atomic_add_long
-#define	atomic_add_acq_ptr	atomic_add_acq_long
-#define	atomic_add_rel_ptr	atomic_add_rel_long
-#define	atomic_subtract_ptr	atomic_subtract_long
-#define	atomic_subtract_acq_ptr	atomic_subtract_acq_long
-#define	atomic_subtract_rel_ptr	atomic_subtract_rel_long
-#define	atomic_cmpset_ptr	atomic_cmpset_long
-#define	atomic_cmpset_acq_ptr	atomic_cmpset_acq_long
-#define	atomic_cmpset_rel_ptr	atomic_cmpset_rel_long
-#define	atomic_fcmpset_ptr	atomic_fcmpset_long
-#define	atomic_fcmpset_acq_ptr	atomic_fcmpset_acq_long
-#define	atomic_fcmpset_rel_ptr	atomic_fcmpset_rel_long
-#define	atomic_load_acq_ptr	atomic_load_acq_long
-#define	atomic_store_rel_ptr	atomic_store_rel_long
-#define	atomic_readandclear_ptr	atomic_readandclear_long
-
-static __inline unsigned int
-atomic_swap_int(volatile unsigned int *ptr, const unsigned int value)
-{
-	unsigned int retval;
-
-	retval = *ptr;
-
-	while (!atomic_fcmpset_int(ptr, &retval, value))
-		;
-	return (retval);
-}
-
-static __inline uint32_t
-atomic_swap_32(volatile uint32_t *ptr, const uint32_t value)
-{
-	uint32_t retval;
-
-	retval = *ptr;
-
-	while (!atomic_fcmpset_32(ptr, &retval, value))
-		;
-	return (retval);
-}
-
-#if defined(__mips_n64) || defined(__mips_n32)
-static __inline uint64_t
-atomic_swap_64(volatile uint64_t *ptr, const uint64_t value)
-{
-	uint64_t retval;
-
-	retval = *ptr;
-
-	while (!atomic_fcmpset_64(ptr, &retval, value))
-		;
-	return (retval);
-}
-#endif
-
-#ifdef __mips_n64
-static __inline unsigned long
-atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
-{
-	unsigned long retval;
-
-	retval = *ptr;
-
-	while (!atomic_fcmpset_64((volatile uint64_t *)ptr,
-	    (uint64_t *)&retval, value))
-		;
-	return (retval);
-}
-#else
-static __inline unsigned long
-atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
-{
-	unsigned long retval;
-
-	retval = *ptr;
-
-	while (!atomic_fcmpset_32((volatile uint32_t *)ptr,
-	    (uint32_t *)&retval, value))
-		;
-	return (retval);
-}
-#endif
-#define	atomic_swap_ptr(ptr, value) atomic_swap_long((unsigned long *)(ptr), value)
-
-#include <sys/_atomic_subword.h>
-
-#endif /* ! _MACHINE_ATOMIC_H_ */
diff --git a/sys/mips/include/bootinfo.h b/sys/mips/include/bootinfo.h
deleted file mode 100644
index 05d17879dbd0..000000000000
--- a/sys/mips/include/bootinfo.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2013 Robert N. M. Watson
- * Copyright (C) 1994 by Rodney W. Grimes, Milwaukie, Oregon  97222
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer as
- *    the first lines of this file unmodified.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Rodney W. Grimes.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_BOOTINFO_H_
-#define	_MACHINE_BOOTINFO_H_
-
-/* Only change the version number if you break compatibility. */
-#define	BOOTINFO_VERSION	2
-
-#define	MIPS_BOOTINFO_MAGIC	0xCDEACDEA
-
-#if defined(__mips_n32) || defined(__mips_n64)
-typedef	uint64_t	bi_ptr_t;
-#else
-typedef	uint32_t	bi_ptr_t;
-#endif
-
-/*
- * A zero bootinfo field often means that there is no info available.
- * Flags are used to indicate the validity of fields where zero is a
- * normal value.
- */
-struct bootinfo {
-	/* bootinfo meta-data. */
-	uint32_t	bi_version;
-	uint32_t	bi_size;
-
-	/* bootinfo contents. */
-	uint64_t	bi_boot2opts;	/* boot2 flags to loader. */
-	bi_ptr_t	bi_kernelname;	/* Pointer to name. */
-	bi_ptr_t	bi_nfs_diskless;/* Pointer to NFS data. */
-	bi_ptr_t	bi_dtb;		/* Pointer to dtb. */
-	bi_ptr_t	bi_memsize;	/* Physical memory size in bytes. */
-	bi_ptr_t	bi_modulep;	/* Preloaded modules. */
-	bi_ptr_t	bi_boot_dev_type;	/* Boot-device type. */
-	bi_ptr_t	bi_boot_dev_unitptr;	/* Boot-device unit/pointer. */
-};
-
-/*
- * Possible boot-device types passed from boot2 to loader, loader to kernel.
- * In most cases, the object pointed to will hold a filesystem; one exception
- * is BOOTINFO_DEV_TYPE_DRAM, which points to a pre-loaded object (e.g.,
- * loader, kernel).
- */
-#define	BOOTINFO_DEV_TYPE_DRAM		0	/* DRAM loader/kernel (ptr). */
-#define	BOOTINFO_DEV_TYPE_CFI		1	/* CFI flash (unit). */
-#define	BOOTINFO_DEV_TYPE_SDCARD	2	/* SD card (unit). */
-
-#ifdef _KERNEL
-extern struct bootinfo	bootinfo;
-#endif
-
-#endif	/* !_MACHINE_BOOTINFO_H_ */
diff --git a/sys/mips/include/bus.h b/sys/mips/include/bus.h
deleted file mode 100644
index 738f86a8cb95..000000000000
--- a/sys/mips/include/bus.h
+++ /dev/null
@@ -1,753 +0,0 @@
-/*	$NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-4-Clause
- *
- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Christopher G. Demetriou
- *	for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_BUS_H_
-#define _MACHINE_BUS_H_
-
-#include <machine/_bus.h>
-
-struct bus_space {
-	/* cookie */
-	void		*bs_cookie;
-
-	/* mapping/unmapping */
-	int		(*bs_map) (void *, bus_addr_t, bus_size_t,
-			    int, bus_space_handle_t *);
-	void		(*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
-	int		(*bs_subregion) (void *, bus_space_handle_t,
-			    bus_size_t, bus_size_t, bus_space_handle_t *);
-
-	/* allocation/deallocation */
-	int		(*bs_alloc) (void *, bus_addr_t, bus_addr_t,
-			    bus_size_t, bus_size_t, bus_size_t, int,
-			    bus_addr_t *, bus_space_handle_t *);
-	void		(*bs_free) (void *, bus_space_handle_t,
-			    bus_size_t);
-
-	/* get kernel virtual address */
-	/* barrier */
-	void		(*bs_barrier) (void *, bus_space_handle_t,
-			    bus_size_t, bus_size_t, int);
-
-	/* read (single) */
-	u_int8_t	(*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
-	u_int16_t	(*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
-	u_int32_t	(*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
-	u_int64_t	(*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
-
-	/* read multiple */
-	void		(*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
-	    u_int8_t *, bus_size_t);
-	void		(*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
-	    u_int16_t *, bus_size_t);
-	void		(*bs_rm_4) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t *, bus_size_t);
-	void		(*bs_rm_8) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t *, bus_size_t);
-					
-	/* read region */
-	void		(*bs_rr_1) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t *, bus_size_t);
-	void		(*bs_rr_2) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t *, bus_size_t);
-	void		(*bs_rr_4) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t *, bus_size_t);
-	void		(*bs_rr_8) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t *, bus_size_t);
-					
-	/* write (single) */
-	void		(*bs_w_1) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t);
-	void		(*bs_w_2) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t);
-	void		(*bs_w_4) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t);
-	void		(*bs_w_8) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t);
-
-	/* write multiple */
-	void		(*bs_wm_1) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int8_t *, bus_size_t);
-	void		(*bs_wm_2) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int16_t *, bus_size_t);
-	void		(*bs_wm_4) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int32_t *, bus_size_t);
-	void		(*bs_wm_8) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int64_t *, bus_size_t);
-					
-	/* write region */
-	void		(*bs_wr_1) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int8_t *, bus_size_t);
-	void		(*bs_wr_2) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int16_t *, bus_size_t);
-	void		(*bs_wr_4) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int32_t *, bus_size_t);
-	void		(*bs_wr_8) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int64_t *, bus_size_t);
-
-	/* set multiple */
-	void		(*bs_sm_1) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t, bus_size_t);
-	void		(*bs_sm_2) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t, bus_size_t);
-	void		(*bs_sm_4) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t, bus_size_t);
-	void		(*bs_sm_8) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t, bus_size_t);
-
-	/* set region */
-	void		(*bs_sr_1) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t, bus_size_t);
-	void		(*bs_sr_2) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t, bus_size_t);
-	void		(*bs_sr_4) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t, bus_size_t);
-	void		(*bs_sr_8) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t, bus_size_t);
-
-	/* copy */
-	void		(*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
-			    bus_space_handle_t, bus_size_t, bus_size_t);
-	void		(*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
-			    bus_space_handle_t, bus_size_t, bus_size_t);
-	void		(*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
-			    bus_space_handle_t, bus_size_t, bus_size_t);
-	void		(*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
-			    bus_space_handle_t, bus_size_t, bus_size_t);
-
-	/* read stream (single) */
-	u_int8_t	(*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
-	u_int16_t	(*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
-	u_int32_t	(*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
-	u_int64_t	(*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
-
-	/* read multiple stream */
-	void		(*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
-	    u_int8_t *, bus_size_t);
-	void		(*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
-	    u_int16_t *, bus_size_t);
-	void		(*bs_rm_4_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t *, bus_size_t);
-	void		(*bs_rm_8_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t *, bus_size_t);
-					
-	/* read region stream */
-	void		(*bs_rr_1_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t *, bus_size_t);
-	void		(*bs_rr_2_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t *, bus_size_t);
-	void		(*bs_rr_4_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t *, bus_size_t);
-	void		(*bs_rr_8_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t *, bus_size_t);
-					
-	/* write stream (single) */
-	void		(*bs_w_1_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int8_t);
-	void		(*bs_w_2_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int16_t);
-	void		(*bs_w_4_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int32_t);
-	void		(*bs_w_8_s) (void *, bus_space_handle_t,
-			    bus_size_t, u_int64_t);
-
-	/* write multiple stream */
-	void		(*bs_wm_1_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int8_t *, bus_size_t);
-	void		(*bs_wm_2_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int16_t *, bus_size_t);
-	void		(*bs_wm_4_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int32_t *, bus_size_t);
-	void		(*bs_wm_8_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int64_t *, bus_size_t);
-					
-	/* write region stream */
-	void		(*bs_wr_1_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int8_t *, bus_size_t);
-	void		(*bs_wr_2_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int16_t *, bus_size_t);
-	void		(*bs_wr_4_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int32_t *, bus_size_t);
-	void		(*bs_wr_8_s) (void *, bus_space_handle_t,
-			    bus_size_t, const u_int64_t *, bus_size_t);
-};
-
-/*
- * Utility macros; INTERNAL USE ONLY.
- */
-#define	__bs_c(a,b)		__CONCAT(a,b)
-#define	__bs_opname(op,size)	__bs_c(__bs_c(__bs_c(bs_,op),_),size)
-
-#define	__bs_rs(sz, t, h, o)						\
-	(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
-#define	__bs_ws(sz, t, h, o, v)						\
-	(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
-#define	__bs_nonsingle(type, sz, t, h, o, a, c)				\
-	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
-#define	__bs_set(type, sz, t, h, o, v, c)				\
-	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
-#define	__bs_copy(sz, t, h1, o1, h2, o2, cnt)				\
-	(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
-
-#define	__bs_opname_s(op,size)	__bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
-#define	__bs_rs_s(sz, t, h, o)						\
-	(*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
-#define	__bs_ws_s(sz, t, h, o, v)					\
-	(*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
-#define	__bs_nonsingle_s(type, sz, t, h, o, a, c)			\
-	(*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
-
-/*
- * Mapping and unmapping operations.
- */
-#define	bus_space_map(t, a, s, c, hp)					\
-	(*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
-#define	bus_space_unmap(t, h, s)					\
-	(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
-#define	bus_space_subregion(t, h, o, s, hp)				\
-	(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
-
-/*
- * Allocation and deallocation operations.
- */
-#define	bus_space_alloc(t, rs, re, s, a, b, c, ap, hp)			\
-	(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b),	\
-	    (c), (ap), (hp))
-#define	bus_space_free(t, h, s)						\
-	(*(t)->bs_free)((t)->bs_cookie, (h), (s))
-
-/*
- * Bus barrier operations.
- */
-#define	bus_space_barrier(t, h, o, l, f)				\
-	(*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
-
-#define	BUS_SPACE_BARRIER_READ	0x01
-#define	BUS_SPACE_BARRIER_WRITE	0x02
-
-/*
- * Bus read (single) operations.
- */
-#define	bus_space_read_1(t, h, o)	__bs_rs(1,(t),(h),(o))
-#define	bus_space_read_2(t, h, o)	__bs_rs(2,(t),(h),(o))
-#define	bus_space_read_4(t, h, o)	__bs_rs(4,(t),(h),(o))
-#define	bus_space_read_8(t, h, o)	__bs_rs(8,(t),(h),(o))
-
-#define bus_space_read_stream_1(t, h, o)        __bs_rs_s(1,(t), (h), (o))
-#define bus_space_read_stream_2(t, h, o)        __bs_rs_s(2,(t), (h), (o))
-#define bus_space_read_stream_4(t, h, o)        __bs_rs_s(4,(t), (h), (o))
-#define	bus_space_read_stream_8(t, h, o)	__bs_rs_s(8,8,(t),(h),(o))
-
-/*
- * Bus read multiple operations.
- */
-#define	bus_space_read_multi_1(t, h, o, a, c)				\
-	__bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_2(t, h, o, a, c)				\
-	__bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_4(t, h, o, a, c)				\
-	__bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_8(t, h, o, a, c)				\
-	__bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
-
-#define	bus_space_read_multi_stream_1(t, h, o, a, c)			\
-	__bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_stream_2(t, h, o, a, c)			\
-	__bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_stream_4(t, h, o, a, c)			\
-	__bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
-#define	bus_space_read_multi_stream_8(t, h, o, a, c)			\
-	__bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
-
-/*
- * Bus read region operations.
- */
-#define	bus_space_read_region_1(t, h, o, a, c)				\
-	__bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_2(t, h, o, a, c)				\
-	__bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_4(t, h, o, a, c)				\
-	__bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_8(t, h, o, a, c)				\
-	__bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
-
-#define	bus_space_read_region_stream_1(t, h, o, a, c)			\
-	__bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_stream_2(t, h, o, a, c)			\
-	__bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_stream_4(t, h, o, a, c)			\
-	__bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
-#define	bus_space_read_region_stream_8(t, h, o, a, c)			\
-	__bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
-
-/*
- * Bus write (single) operations.
- */
-#define	bus_space_write_1(t, h, o, v)	__bs_ws(1,(t),(h),(o),(v))
-#define	bus_space_write_2(t, h, o, v)	__bs_ws(2,(t),(h),(o),(v))
-#define	bus_space_write_4(t, h, o, v)	__bs_ws(4,(t),(h),(o),(v))
-#define	bus_space_write_8(t, h, o, v)	__bs_ws(8,(t),(h),(o),(v))
-
-#define	bus_space_write_stream_1(t, h, o, v)	__bs_ws_s(1,(t),(h),(o),(v))
-#define	bus_space_write_stream_2(t, h, o, v)	__bs_ws_s(2,(t),(h),(o),(v))
-#define	bus_space_write_stream_4(t, h, o, v)	__bs_ws_s(4,(t),(h),(o),(v))
-#define	bus_space_write_stream_8(t, h, o, v)	__bs_ws_s(8,(t),(h),(o),(v))
-
-/*
- * Bus write multiple operations.
- */
-#define	bus_space_write_multi_1(t, h, o, a, c)				\
-	__bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_2(t, h, o, a, c)				\
-	__bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_4(t, h, o, a, c)				\
-	__bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_8(t, h, o, a, c)				\
-	__bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
-
-#define	bus_space_write_multi_stream_1(t, h, o, a, c)			\
-	__bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_stream_2(t, h, o, a, c)			\
-	__bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_stream_4(t, h, o, a, c)			\
-	__bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
-#define	bus_space_write_multi_stream_8(t, h, o, a, c)			\
-	__bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
-
-/*
- * Bus write region operations.
- */
-#define	bus_space_write_region_1(t, h, o, a, c)				\
-	__bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_2(t, h, o, a, c)				\
-	__bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_4(t, h, o, a, c)				\
-	__bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_8(t, h, o, a, c)				\
-	__bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
-
-#define	bus_space_write_region_stream_1(t, h, o, a, c)			\
-	__bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_stream_2(t, h, o, a, c)			\
-	__bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_stream_4(t, h, o, a, c)			\
-	__bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
-#define	bus_space_write_region_stream_8(t, h, o, a, c)			\
-	__bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
-
-/*
- * Set multiple operations.
- */
-#define	bus_space_set_multi_1(t, h, o, v, c)				\
-	__bs_set(sm,1,(t),(h),(o),(v),(c))
-#define	bus_space_set_multi_2(t, h, o, v, c)				\
-	__bs_set(sm,2,(t),(h),(o),(v),(c))
-#define	bus_space_set_multi_4(t, h, o, v, c)				\
-	__bs_set(sm,4,(t),(h),(o),(v),(c))
-#define	bus_space_set_multi_8(t, h, o, v, c)				\
-	__bs_set(sm,8,(t),(h),(o),(v),(c))
-
-/*
- * Set region operations.
- */
-#define	bus_space_set_region_1(t, h, o, v, c)				\
-	__bs_set(sr,1,(t),(h),(o),(v),(c))
-#define	bus_space_set_region_2(t, h, o, v, c)				\
-	__bs_set(sr,2,(t),(h),(o),(v),(c))
-#define	bus_space_set_region_4(t, h, o, v, c)				\
-	__bs_set(sr,4,(t),(h),(o),(v),(c))
-#define	bus_space_set_region_8(t, h, o, v, c)				\
-	__bs_set(sr,8,(t),(h),(o),(v),(c))
-
-/*
- * Copy operations.
- */
-#define	bus_space_copy_region_1(t, h1, o1, h2, o2, c)				\
-	__bs_copy(1, t, h1, o1, h2, o2, c)
-#define	bus_space_copy_region_2(t, h1, o1, h2, o2, c)				\
-	__bs_copy(2, t, h1, o1, h2, o2, c)
-#define	bus_space_copy_region_4(t, h1, o1, h2, o2, c)				\
-	__bs_copy(4, t, h1, o1, h2, o2, c)
-#define	bus_space_copy_region_8(t, h1, o1, h2, o2, c)				\
-	__bs_copy(8, t, h1, o1, h2, o2, c)
-
-/*
- * Macros to provide prototypes for all the functions used in the
- * bus_space structure
- */
-
-#define bs_map_proto(f)							\
-int	__bs_c(f,_bs_map) (void *t, bus_addr_t addr,		\
-	    bus_size_t size, int cacheable, bus_space_handle_t *bshp);
-
-#define bs_unmap_proto(f)						\
-void	__bs_c(f,_bs_unmap) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t size);
-
-#define bs_subregion_proto(f)						\
-int	__bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, bus_size_t size, 			\
-	    bus_space_handle_t *nbshp);
-
-#define bs_alloc_proto(f)						\
-int	__bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart,		\
-	    bus_addr_t rend, bus_size_t size, bus_size_t align,		\
-	    bus_size_t boundary, int cacheable, bus_addr_t *addrp,	\
-	    bus_space_handle_t *bshp);
-
-#define bs_free_proto(f)						\
-void	__bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t size);
-
-#define bs_barrier_proto(f)						\
-void	__bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, bus_size_t len, int flags);
-
-#define	bs_r_1_proto(f)							\
-u_int8_t	__bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_2_proto(f)							\
-u_int16_t	__bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_4_proto(f)							\
-u_int32_t	__bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_8_proto(f)							\
-u_int64_t	__bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_1_s_proto(f)						\
-u_int8_t	__bs_c(f,_bs_r_1_s) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_2_s_proto(f)						\
-u_int16_t	__bs_c(f,_bs_r_2_s) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_r_4_s_proto(f)						\
-u_int32_t	__bs_c(f,_bs_r_4_s) (void *t, bus_space_handle_t bsh,	\
-		    bus_size_t offset);
-
-#define	bs_w_1_proto(f)							\
-void	__bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int8_t value);
-
-#define	bs_w_2_proto(f)							\
-void	__bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int16_t value);
-
-#define	bs_w_4_proto(f)							\
-void	__bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int32_t value);
-
-#define	bs_w_8_proto(f)							\
-void	__bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int64_t value);
-
-#define	bs_w_1_s_proto(f)						\
-void	__bs_c(f,_bs_w_1_s) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int8_t value);
-
-#define	bs_w_2_s_proto(f)						\
-void	__bs_c(f,_bs_w_2_s) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int16_t value);
-
-#define	bs_w_4_s_proto(f)						\
-void	__bs_c(f,_bs_w_4_s) (void *t, bus_space_handle_t bsh,		\
-	    bus_size_t offset, u_int32_t value);
-
-#define	bs_rm_1_proto(f)						\
-void	__bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int8_t *addr, bus_size_t count);
-
-#define	bs_rm_2_proto(f)						\
-void	__bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int16_t *addr, bus_size_t count);
-
-#define	bs_rm_4_proto(f)						\
-void	__bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int32_t *addr, bus_size_t count);		
-
-#define	bs_rm_8_proto(f)						\
-void	__bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int64_t *addr, bus_size_t count);
-
-#define	bs_wm_1_proto(f)						\
-void	__bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int8_t *addr, bus_size_t count);
-
-#define	bs_wm_2_proto(f)						\
-void	__bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int16_t *addr, bus_size_t count);
-
-#define	bs_wm_4_proto(f)						\
-void	__bs_c(f,_bs_wm_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int32_t *addr, bus_size_t count);
-
-#define	bs_wm_8_proto(f)						\
-void	__bs_c(f,_bs_wm_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int64_t *addr, bus_size_t count);
-
-#define	bs_rr_1_proto(f)						\
-void	__bs_c(f, _bs_rr_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int8_t *addr, bus_size_t count);
-
-#define	bs_rr_2_proto(f)						\
-void	__bs_c(f, _bs_rr_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int16_t *addr, bus_size_t count);
-
-#define	bs_rr_4_proto(f)						\
-void	__bs_c(f, _bs_rr_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int32_t *addr, bus_size_t count);
-
-#define	bs_rr_8_proto(f)						\
-void	__bs_c(f, _bs_rr_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int64_t *addr, bus_size_t count);
-
-#define	bs_wr_1_proto(f)						\
-void	__bs_c(f, _bs_wr_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int8_t *addr, bus_size_t count);
-
-#define	bs_wr_2_proto(f)						\
-void	__bs_c(f, _bs_wr_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int16_t *addr, bus_size_t count);
-
-#define	bs_wr_4_proto(f)						\
-void	__bs_c(f, _bs_wr_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int32_t *addr, bus_size_t count);
-
-#define	bs_wr_8_proto(f)						\
-void	__bs_c(f, _bs_wr_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, const u_int64_t *addr, bus_size_t count);
-
-#define	bs_sm_1_proto(f)						\
-void	__bs_c(f,_bs_sm_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int8_t value, bus_size_t count);
-
-#define	bs_sm_2_proto(f)						\
-void	__bs_c(f,_bs_sm_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int16_t value, bus_size_t count);
-
-#define	bs_sm_4_proto(f)						\
-void	__bs_c(f,_bs_sm_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int32_t value, bus_size_t count);
-
-#define	bs_sm_8_proto(f)						\
-void	__bs_c(f,_bs_sm_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int64_t value, bus_size_t count);
-
-#define	bs_sr_1_proto(f)						\
-void	__bs_c(f,_bs_sr_1) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int8_t value, bus_size_t count);
-
-#define	bs_sr_2_proto(f)						\
-void	__bs_c(f,_bs_sr_2) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int16_t value, bus_size_t count);
-
-#define	bs_sr_4_proto(f)						\
-void	__bs_c(f,_bs_sr_4) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int32_t value, bus_size_t count);
-
-#define	bs_sr_8_proto(f)						\
-void	__bs_c(f,_bs_sr_8) (void *t, bus_space_handle_t bsh,	\
-	    bus_size_t offset, u_int64_t value, bus_size_t count);
-
-#define	bs_c_1_proto(f)							\
-void	__bs_c(f,_bs_c_1) (void *t, bus_space_handle_t bsh1,	\
-	    bus_size_t offset1, bus_space_handle_t bsh2,		\
-	    bus_size_t offset2, bus_size_t count);
-
-#define	bs_c_2_proto(f)							\
-void	__bs_c(f,_bs_c_2) (void *t, bus_space_handle_t bsh1,	\
-	    bus_size_t offset1, bus_space_handle_t bsh2,		\
-	    bus_size_t offset2, bus_size_t count);
-
-#define	bs_c_4_proto(f)							\
-void	__bs_c(f,_bs_c_4) (void *t, bus_space_handle_t bsh1,	\
-	    bus_size_t offset1, bus_space_handle_t bsh2,		\
-	    bus_size_t offset2, bus_size_t count);
-
-#define	bs_c_8_proto(f)							\
-void	__bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1,	\
-	    bus_size_t offset1, bus_space_handle_t bsh2,		\
-	    bus_size_t offset2, bus_size_t count);
-
-#define DECLARE_BUS_SPACE_PROTOTYPES(f)		\
-	bs_map_proto(f);			\
-	bs_unmap_proto(f);			\
-	bs_subregion_proto(f);			\
-	bs_alloc_proto(f);			\
-	bs_free_proto(f);			\
-	bs_barrier_proto(f);			\
-	bs_r_1_proto(f);			\
-	bs_r_2_proto(f);			\
-	bs_r_4_proto(f);			\
-	bs_r_8_proto(f);			\
-	bs_r_1_s_proto(f);			\
-	bs_r_2_s_proto(f);			\
-	bs_r_4_s_proto(f);			\
-	bs_w_1_proto(f);			\
-	bs_w_2_proto(f);			\
-	bs_w_4_proto(f);			\
-	bs_w_8_proto(f);			\
-	bs_w_1_s_proto(f);			\
-	bs_w_2_s_proto(f);			\
-	bs_w_4_s_proto(f);			\
-	bs_rm_1_proto(f);			\
-	bs_rm_2_proto(f);			\
-	bs_rm_4_proto(f);			\
-	bs_rm_8_proto(f);			\
-	bs_wm_1_proto(f);			\
-	bs_wm_2_proto(f);			\
-	bs_wm_4_proto(f);			\
-	bs_wm_8_proto(f);			\
-	bs_rr_1_proto(f);			\
-	bs_rr_2_proto(f);			\
-	bs_rr_4_proto(f);			\
-	bs_rr_8_proto(f);			\
-	bs_wr_1_proto(f);			\
-	bs_wr_2_proto(f);			\
-	bs_wr_4_proto(f);			\
-	bs_wr_8_proto(f);			\
-	bs_sm_1_proto(f);			\
-	bs_sm_2_proto(f);			\
-	bs_sm_4_proto(f);			\
-	bs_sm_8_proto(f);			\
-	bs_sr_1_proto(f);			\
-	bs_sr_2_proto(f);			\
-	bs_sr_4_proto(f);			\
-	bs_sr_8_proto(f);			\
-	bs_c_1_proto(f);			\
-	bs_c_2_proto(f);			\
-	bs_c_4_proto(f);			\
-	bs_c_8_proto(f);
-
-#define BUS_PEEK_FUNC(width, type)					\
-	static inline int						\
-	bus_space_peek_##width(bus_space_tag_t tag,			\
-	    bus_space_handle_t hnd, bus_size_t offset, type *value)	\
-	{								\
-		type tmp;						\
-		tmp = bus_space_read_##width(tag, hnd, offset);		\
-		*value = (type)tmp;					\
-		return (0);						\
-	}
-BUS_PEEK_FUNC(1, uint8_t)
-BUS_PEEK_FUNC(2, uint16_t)
-BUS_PEEK_FUNC(4, uint32_t)
-BUS_PEEK_FUNC(8, uint64_t)
-
-#define BUS_POKE_FUNC(width, type)					\
-	static inline int						\
-	bus_space_poke_##width(bus_space_tag_t tag,			\
-	    bus_space_handle_t hnd, bus_size_t offset, type value)	\
-	{								\
-		bus_space_write_##width(tag, hnd, offset, value);	\
-		return (0); 						\
-	}
-BUS_POKE_FUNC(1, uint8_t)
-BUS_POKE_FUNC(2, uint16_t)
-BUS_POKE_FUNC(4, uint32_t)
-BUS_POKE_FUNC(8, uint64_t)
-
-#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
-
-#define BUS_SPACE_MAXADDR_24BIT	0xFFFFFF
-#define BUS_SPACE_MAXSIZE_24BIT	0xFFFFFF
-
-#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXSIZE_32BIT	0xFFFFFFFF
-
-#if defined(__mips_n64)
-#define BUS_SPACE_MAXADDR 	0xFFFFFFFFFFFFFFFFUL
-#define BUS_SPACE_MAXSIZE 	0xFFFFFFFFFFFFFFFFUL
-#else
-#define BUS_SPACE_MAXADDR 	0xFFFFFFFFUL
-#define BUS_SPACE_MAXSIZE 	0xFFFFFFFFUL
-#endif
-
-#define BUS_SPACE_UNRESTRICTED	(~0)
-
-/* 
- * declare generic bus space, it suits all needs in 
- */
-DECLARE_BUS_SPACE_PROTOTYPES(generic);
-extern bus_space_tag_t mips_bus_space_generic;
-
-/* Special bus space for RMI processors */
-#if defined(CPU_RMI) || defined (CPU_NLM)
-extern bus_space_tag_t rmi_bus_space;
-extern bus_space_tag_t rmi_pci_bus_space;
-extern bus_space_tag_t rmi_uart_bus_space;
-#endif
-
-#include <machine/bus_dma.h>
-
-#endif /* _MACHINE_BUS_H_ */
diff --git a/sys/mips/include/bus_dma.h b/sys/mips/include/bus_dma.h
deleted file mode 100644
index 7cc948549099..000000000000
--- a/sys/mips/include/bus_dma.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 Scott Long
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BUS_DMA_H_
-#define _MIPS_BUS_DMA_H_
-
-#include <sys/bus_dma.h>
-#include <sys/bus_dma_internal.h>
-
-#endif /* _MIPS_BUS_DMA_H_ */
diff --git a/sys/mips/include/cache.h b/sys/mips/include/cache.h
deleted file mode 100644
index 32864742d66d..000000000000
--- a/sys/mips/include/cache.h
+++ /dev/null
@@ -1,226 +0,0 @@
-/*	$NetBSD: cache.h,v 1.6 2003/02/17 11:35:01 simonb Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_CACHE_H_
-#define	_MACHINE_CACHE_H_
-
-/*
- * Cache operations.
- *
- * We define the following primitives:
- *
- * --- Instruction cache synchronization (mandatory):
- *
- *	icache_sync_all		Synchronize I-cache
- *
- *	icache_sync_range	Synchronize I-cache range
- *
- *	icache_sync_range_index	(index ops)
- *
- * --- Primary data cache (mandatory):
- *
- *	pdcache_wbinv_all	Write-back Invalidate primary D-cache
- *
- *	pdcache_wbinv_range	Write-back Invalidate primary D-cache range
- *
- *	pdcache_wbinv_range_index (index ops)
- *
- *	pdcache_inv_range	Invalidate primary D-cache range
- *
- *	pdcache_wb_range	Write-back primary D-cache range
- *
- * --- Secondary data cache (optional):
- *
- *	sdcache_wbinv_all	Write-back Invalidate secondary D-cache
- *
- *	sdcache_wbinv_range	Write-back Invalidate secondary D-cache range
- *
- *	sdcache_wbinv_range_index (index ops)
- *
- *	sdcache_inv_range	Invalidate secondary D-cache range
- *
- *	sdcache_wb_range	Write-back secondary D-cache range
- *
- * There are some rules that must be followed:
- *
- *	I-cache Synch (all or range):
- *		The goal is to synchronize the instruction stream,
- *		so you may need to write-back dirty data cache
- *		blocks first.  If a range is requested, and you
- *		can't synchronize just a range, you have to hit
- *		the whole thing.
- *
- *	D-cache Write-back Invalidate range:
- *		If you can't WB-Inv a range, you must WB-Inv the
- *		entire D-cache.
- *
- *	D-cache Invalidate:
- *		If you can't Inv the D-cache without doing a
- *		Write-back, YOU MUST PANIC.  This is to catch
- *		errors in calling code.  Callers must be aware
- *		of this scenario, and must handle it appropriately
- *		(consider the bus_dma(9) operations).
- *
- *	D-cache Write-back:
- *		If you can't Write-back without doing an invalidate,
- *		that's fine.  Then treat this as a WB-Inv.  Skipping
- *		the invalidate is merely an optimization.
- *
- *	All operations:
- *		Valid virtual addresses must be passed to the
- *		cache operation.
- *
- * Finally, these primitives are grouped together in reasonable
- * ways.  For all operations described here, first the primary
- * cache is frobbed, then the secondary cache frobbed, if the
- * operation for the secondary cache exists.
- *
- *	mips_icache_sync_all	Synchronize I-cache
- *
- *	mips_icache_sync_range	Synchronize I-cache range
- *
- *	mips_icache_sync_range_index (index ops)
- *
- *	mips_dcache_wbinv_all	Write-back Invalidate D-cache
- *
- *	mips_dcache_wbinv_range	Write-back Invalidate D-cache range
- *
- *	mips_dcache_wbinv_range_index (index ops)
- *
- *	mips_dcache_inv_range	Invalidate D-cache range
- *
- *	mips_dcache_wb_range	Write-back D-cache range
- */
-
-struct mips_cache_ops {
-	void	(*mco_icache_sync_all)(void);
-	void	(*mco_icache_sync_range)(vm_offset_t, vm_size_t);
-	void	(*mco_icache_sync_range_index)(vm_offset_t, vm_size_t);
-
-	void	(*mco_pdcache_wbinv_all)(void);
-	void	(*mco_pdcache_wbinv_range)(vm_offset_t, vm_size_t);
-	void	(*mco_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t);
-	void	(*mco_pdcache_inv_range)(vm_offset_t, vm_size_t);
-	void	(*mco_pdcache_wb_range)(vm_offset_t, vm_size_t);
-
-	/* These are called only by the (mipsNN) icache functions. */
-	void    (*mco_intern_pdcache_wbinv_all)(void);
-	void    (*mco_intern_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t);
-	void    (*mco_intern_pdcache_wb_range)(vm_offset_t, vm_size_t);
-
-	void	(*mco_sdcache_wbinv_all)(void);
-	void	(*mco_sdcache_wbinv_range)(vm_offset_t, vm_size_t);
-	void	(*mco_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t);
-	void	(*mco_sdcache_inv_range)(vm_offset_t, vm_size_t);
-	void	(*mco_sdcache_wb_range)(vm_offset_t, vm_size_t);
-
-	/* These are called only by the (mipsNN) icache functions. */
-	void    (*mco_intern_sdcache_wbinv_all)(void);
-	void    (*mco_intern_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t);
-	void    (*mco_intern_sdcache_wb_range)(vm_offset_t, vm_size_t);
-};
-
-extern struct mips_cache_ops mips_cache_ops;
-
-/* PRIMARY CACHE VARIABLES */
-extern int mips_picache_linesize;
-extern int mips_pdcache_linesize;
-extern int mips_sdcache_linesize;
-extern int mips_dcache_max_linesize;
-
-#define	__mco_noargs(prefix, x)						\
-do {									\
-	(*mips_cache_ops.mco_ ## prefix ## p ## x )();			\
-	if (*mips_cache_ops.mco_ ## prefix ## s ## x )			\
-		(*mips_cache_ops.mco_ ## prefix ## s ## x )();		\
-} while (/*CONSTCOND*/0)
-
-#define	__mco_2args(prefix, x, a, b)					\
-do {									\
-	(*mips_cache_ops.mco_ ## prefix ## p ## x )((a), (b));		\
-	if (*mips_cache_ops.mco_ ## prefix ## s ## x )			\
-		(*mips_cache_ops.mco_ ## prefix ## s ## x )((a), (b));	\
-} while (/*CONSTCOND*/0)
-
-#define	mips_icache_sync_all()						\
-	(*mips_cache_ops.mco_icache_sync_all)()
-
-#define	mips_icache_sync_range(v, s)					\
-	(*mips_cache_ops.mco_icache_sync_range)((v), (s))
-
-#define	mips_icache_sync_range_index(v, s)				\
-	(*mips_cache_ops.mco_icache_sync_range_index)((v), (s))
-
-#define	mips_dcache_wbinv_all()						\
-	__mco_noargs(, dcache_wbinv_all)
-
-#define	mips_dcache_wbinv_range(v, s)					\
-	__mco_2args(, dcache_wbinv_range, (v), (s))
-
-#define	mips_dcache_wbinv_range_index(v, s)				\
-	__mco_2args(, dcache_wbinv_range_index, (v), (s))
-
-#define	mips_dcache_inv_range(v, s)					\
-	__mco_2args(, dcache_inv_range, (v), (s))
-
-#define	mips_dcache_wb_range(v, s)					\
-	__mco_2args(, dcache_wb_range, (v), (s))
-
-/*
- * Private D-cache functions only called from (currently only the
- * mipsNN) I-cache functions.
- */
-#define mips_intern_dcache_wbinv_all()					\
-	__mco_noargs(intern_, dcache_wbinv_all)
-
-#define mips_intern_dcache_wbinv_range_index(v, s)			\
-	__mco_2args(intern_, dcache_wbinv_range_index, (v), (s))
-
-#define mips_intern_dcache_wb_range(v, s)				\
-	__mco_2args(intern_, dcache_wb_range, (v), (s))
-
-/* forward declaration */
-struct mips_cpuinfo;
-
-void    mips_config_cache(struct mips_cpuinfo *);
-
-#include <machine/cache_mipsNN.h>
-#endif	/* _MACHINE_CACHE_H_ */
diff --git a/sys/mips/include/cache_mipsNN.h b/sys/mips/include/cache_mipsNN.h
deleted file mode 100644
index 80af7b075eb7..000000000000
--- a/sys/mips/include/cache_mipsNN.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*	$NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_MACHINE_CACHE_MIPSNN_H_
-#define	_MACHINE_CACHE_MIPSNN_H_
-
-void	mipsNN_cache_init(struct mips_cpuinfo *);
-
-void	mipsNN_icache_sync_all_16(void);
-void	mipsNN_icache_sync_all_32(void);
-void	mipsNN_icache_sync_all_64(void);
-void	mipsNN_icache_sync_all_128(void);
-void	mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_index_64(vm_offset_t, vm_size_t);
-void	mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_all_16(void);
-void	mipsNN_pdcache_wbinv_all_32(void);
-void	mipsNN_pdcache_wbinv_all_64(void);
-void	mipsNN_pdcache_wbinv_all_128(void);
-void	mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_inv_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wb_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_all_32(void);
-void	mipsNN_sdcache_wbinv_all_64(void);
-void	mipsNN_sdcache_wbinv_all_128(void);
-void	mipsNN_sdcache_wbinv_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_inv_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_inv_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_inv_range_128(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wb_range_32(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wb_range_64(vm_offset_t, vm_size_t);
-void	mipsNN_sdcache_wb_range_128(vm_offset_t, vm_size_t);
-
-#endif	/* _MACHINE_CACHE_MIPSNN_H_ */
diff --git a/sys/mips/include/cache_r4k.h b/sys/mips/include/cache_r4k.h
deleted file mode 100644
index e01be2495c69..000000000000
--- a/sys/mips/include/cache_r4k.h
+++ /dev/null
@@ -1,436 +0,0 @@
-/*	$NetBSD: cache_r4k.h,v 1.10 2003/03/08 04:43:26 rafal Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Cache definitions/operations for R4000-style caches.
- */
-
-#define	CACHE_R4K_I			0
-#define	CACHE_R4K_D			1
-#define	CACHE_R4K_SI			2
-#define	CACHE_R4K_SD			3
-
-#define	CACHEOP_R4K_INDEX_INV		(0 << 2)	/* I, SI */
-#define	CACHEOP_R4K_INDEX_WB_INV	(0 << 2)	/* D, SD */
-#define	CACHEOP_R4K_INDEX_LOAD_TAG	(1 << 2)	/* all */
-#define	CACHEOP_R4K_INDEX_STORE_TAG	(2 << 2)	/* all */
-#define	CACHEOP_R4K_CREATE_DIRTY_EXCL	(3 << 2)	/* D, SD */
-#define	CACHEOP_R4K_HIT_INV		(4 << 2)	/* all */
-#define	CACHEOP_R4K_HIT_WB_INV		(5 << 2)	/* D, SD */
-#define	CACHEOP_R4K_FILL		(5 << 2)	/* I */
-#define	CACHEOP_R4K_HIT_WB		(6 << 2)	/* I, D, SD */
-#define	CACHEOP_R4K_HIT_SET_VIRTUAL	(7 << 2)	/* SI, SD */
-
-#if !defined(LOCORE)
-
-/*
- * cache_r4k_op_line:
- *
- *	Perform the specified cache operation on a single line.
- */
-#define	cache_op_r4k_line(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0(%0)				\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_8lines_16:
- *
- *	Perform the specified cache operation on 8 16-byte cache lines.
- */
-#define	cache_r4k_op_8lines_16(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x00(%0); cache %1, 0x10(%0)		\n\t"	\
-		"cache %1, 0x20(%0); cache %1, 0x30(%0)		\n\t"	\
-		"cache %1, 0x40(%0); cache %1, 0x50(%0)		\n\t"	\
-		"cache %1, 0x60(%0); cache %1, 0x70(%0)		\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_8lines_32:
- *
- *	Perform the specified cache operation on 8 32-byte cache lines.
- */
-#define	cache_r4k_op_8lines_32(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x00(%0); cache %1, 0x20(%0)		\n\t"	\
-		"cache %1, 0x40(%0); cache %1, 0x60(%0)		\n\t"	\
-		"cache %1, 0x80(%0); cache %1, 0xa0(%0)		\n\t"	\
-		"cache %1, 0xc0(%0); cache %1, 0xe0(%0)		\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_8lines_64:
- *
- *	Perform the specified cache operation on 8 64-byte cache lines.
- */
-#define	cache_r4k_op_8lines_64(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x000(%0); cache %1, 0x040(%0)	\n\t"	\
-		"cache %1, 0x080(%0); cache %1, 0x0c0(%0)	\n\t"	\
-		"cache %1, 0x100(%0); cache %1, 0x140(%0)	\n\t"	\
-		"cache %1, 0x180(%0); cache %1, 0x1c0(%0)	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_32lines_16:
- *
- *	Perform the specified cache operation on 32 16-byte
- *	cache lines.
- */
-#define	cache_r4k_op_32lines_16(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x000(%0); cache %1, 0x010(%0);	\n\t"	\
-		"cache %1, 0x020(%0); cache %1, 0x030(%0);	\n\t"	\
-		"cache %1, 0x040(%0); cache %1, 0x050(%0);	\n\t"	\
-		"cache %1, 0x060(%0); cache %1, 0x070(%0);	\n\t"	\
-		"cache %1, 0x080(%0); cache %1, 0x090(%0);	\n\t"	\
-		"cache %1, 0x0a0(%0); cache %1, 0x0b0(%0);	\n\t"	\
-		"cache %1, 0x0c0(%0); cache %1, 0x0d0(%0);	\n\t"	\
-		"cache %1, 0x0e0(%0); cache %1, 0x0f0(%0);	\n\t"	\
-		"cache %1, 0x100(%0); cache %1, 0x110(%0);	\n\t"	\
-		"cache %1, 0x120(%0); cache %1, 0x130(%0);	\n\t"	\
-		"cache %1, 0x140(%0); cache %1, 0x150(%0);	\n\t"	\
-		"cache %1, 0x160(%0); cache %1, 0x170(%0);	\n\t"	\
-		"cache %1, 0x180(%0); cache %1, 0x190(%0);	\n\t"	\
-		"cache %1, 0x1a0(%0); cache %1, 0x1b0(%0);	\n\t"	\
-		"cache %1, 0x1c0(%0); cache %1, 0x1d0(%0);	\n\t"	\
-		"cache %1, 0x1e0(%0); cache %1, 0x1f0(%0);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_32lines_32:
- *
- *	Perform the specified cache operation on 32 32-byte
- *	cache lines.
- */
-#define	cache_r4k_op_32lines_32(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x000(%0); cache %1, 0x020(%0);	\n\t"	\
-		"cache %1, 0x040(%0); cache %1, 0x060(%0);	\n\t"	\
-		"cache %1, 0x080(%0); cache %1, 0x0a0(%0);	\n\t"	\
-		"cache %1, 0x0c0(%0); cache %1, 0x0e0(%0);	\n\t"	\
-		"cache %1, 0x100(%0); cache %1, 0x120(%0);	\n\t"	\
-		"cache %1, 0x140(%0); cache %1, 0x160(%0);	\n\t"	\
-		"cache %1, 0x180(%0); cache %1, 0x1a0(%0);	\n\t"	\
-		"cache %1, 0x1c0(%0); cache %1, 0x1e0(%0);	\n\t"	\
-		"cache %1, 0x200(%0); cache %1, 0x220(%0);	\n\t"	\
-		"cache %1, 0x240(%0); cache %1, 0x260(%0);	\n\t"	\
-		"cache %1, 0x280(%0); cache %1, 0x2a0(%0);	\n\t"	\
-		"cache %1, 0x2c0(%0); cache %1, 0x2e0(%0);	\n\t"	\
-		"cache %1, 0x300(%0); cache %1, 0x320(%0);	\n\t"	\
-		"cache %1, 0x340(%0); cache %1, 0x360(%0);	\n\t"	\
-		"cache %1, 0x380(%0); cache %1, 0x3a0(%0);	\n\t"	\
-		"cache %1, 0x3c0(%0); cache %1, 0x3e0(%0);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_32lines_64:
- *
- *	Perform the specified cache operation on 32 64-byte
- *	cache lines.
- */
-#define	cache_r4k_op_32lines_64(va, op)					\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x000(%0); cache %1, 0x040(%0);	\n\t"	\
-		"cache %1, 0x080(%0); cache %1, 0x0c0(%0);	\n\t"	\
-		"cache %1, 0x100(%0); cache %1, 0x140(%0);	\n\t"	\
-		"cache %1, 0x180(%0); cache %1, 0x1c0(%0);	\n\t"	\
-		"cache %1, 0x200(%0); cache %1, 0x240(%0);	\n\t"	\
-		"cache %1, 0x280(%0); cache %1, 0x2c0(%0);	\n\t"	\
-		"cache %1, 0x300(%0); cache %1, 0x340(%0);	\n\t"	\
-		"cache %1, 0x380(%0); cache %1, 0x3c0(%0);	\n\t"	\
-		"cache %1, 0x400(%0); cache %1, 0x440(%0);	\n\t"	\
-		"cache %1, 0x480(%0); cache %1, 0x4c0(%0);	\n\t"	\
-		"cache %1, 0x500(%0); cache %1, 0x540(%0);	\n\t"	\
-		"cache %1, 0x580(%0); cache %1, 0x5c0(%0);	\n\t"	\
-		"cache %1, 0x600(%0); cache %1, 0x640(%0);	\n\t"	\
-		"cache %1, 0x680(%0); cache %1, 0x6c0(%0);	\n\t"	\
-		"cache %1, 0x700(%0); cache %1, 0x740(%0);	\n\t"	\
-		"cache %1, 0x780(%0); cache %1, 0x7c0(%0);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_32lines_128:
- *
- *	Perform the specified cache operation on 32 128-byte
- *	cache lines.
- */
-#define	cache_r4k_op_32lines_128(va, op)				\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %1, 0x0000(%0); cache %1, 0x0080(%0);	\n\t"	\
-		"cache %1, 0x0100(%0); cache %1, 0x0180(%0);	\n\t"	\
-		"cache %1, 0x0200(%0); cache %1, 0x0280(%0);	\n\t"	\
-		"cache %1, 0x0300(%0); cache %1, 0x0380(%0);	\n\t"	\
-		"cache %1, 0x0400(%0); cache %1, 0x0480(%0);	\n\t"	\
-		"cache %1, 0x0500(%0); cache %1, 0x0580(%0);	\n\t"	\
-		"cache %1, 0x0600(%0); cache %1, 0x0680(%0);	\n\t"	\
-		"cache %1, 0x0700(%0); cache %1, 0x0780(%0);	\n\t"	\
-		"cache %1, 0x0800(%0); cache %1, 0x0880(%0);	\n\t"	\
-		"cache %1, 0x0900(%0); cache %1, 0x0980(%0);	\n\t"	\
-		"cache %1, 0x0a00(%0); cache %1, 0x0a80(%0);	\n\t"	\
-		"cache %1, 0x0b00(%0); cache %1, 0x0b80(%0);	\n\t"	\
-		"cache %1, 0x0c00(%0); cache %1, 0x0c80(%0);	\n\t"	\
-		"cache %1, 0x0d00(%0); cache %1, 0x0d80(%0);	\n\t"	\
-		"cache %1, 0x0e00(%0); cache %1, 0x0e80(%0);	\n\t"	\
-		"cache %1, 0x0f00(%0); cache %1, 0x0f80(%0);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va), "i" (op)					\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_16lines_16_2way:
- *
- *	Perform the specified cache operation on 16 16-byte
- * 	cache lines, 2-ways.
- */
-#define	cache_r4k_op_16lines_16_2way(va1, va2, op)			\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %2, 0x000(%0); cache %2, 0x000(%1);	\n\t"	\
-		"cache %2, 0x010(%0); cache %2, 0x010(%1);	\n\t"	\
-		"cache %2, 0x020(%0); cache %2, 0x020(%1);	\n\t"	\
-		"cache %2, 0x030(%0); cache %2, 0x030(%1);	\n\t"	\
-		"cache %2, 0x040(%0); cache %2, 0x040(%1);	\n\t"	\
-		"cache %2, 0x050(%0); cache %2, 0x050(%1);	\n\t"	\
-		"cache %2, 0x060(%0); cache %2, 0x060(%1);	\n\t"	\
-		"cache %2, 0x070(%0); cache %2, 0x070(%1);	\n\t"	\
-		"cache %2, 0x080(%0); cache %2, 0x080(%1);	\n\t"	\
-		"cache %2, 0x090(%0); cache %2, 0x090(%1);	\n\t"	\
-		"cache %2, 0x0a0(%0); cache %2, 0x0a0(%1);	\n\t"	\
-		"cache %2, 0x0b0(%0); cache %2, 0x0b0(%1);	\n\t"	\
-		"cache %2, 0x0c0(%0); cache %2, 0x0c0(%1);	\n\t"	\
-		"cache %2, 0x0d0(%0); cache %2, 0x0d0(%1);	\n\t"	\
-		"cache %2, 0x0e0(%0); cache %2, 0x0e0(%1);	\n\t"	\
-		"cache %2, 0x0f0(%0); cache %2, 0x0f0(%1);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va1), "r" (va2), "i" (op)				\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_16lines_32_2way:
- *
- *	Perform the specified cache operation on 16 32-byte
- * 	cache lines, 2-ways.
- */
-#define	cache_r4k_op_16lines_32_2way(va1, va2, op)			\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %2, 0x000(%0); cache %2, 0x000(%1);	\n\t"	\
-		"cache %2, 0x020(%0); cache %2, 0x020(%1);	\n\t"	\
-		"cache %2, 0x040(%0); cache %2, 0x040(%1);	\n\t"	\
-		"cache %2, 0x060(%0); cache %2, 0x060(%1);	\n\t"	\
-		"cache %2, 0x080(%0); cache %2, 0x080(%1);	\n\t"	\
-		"cache %2, 0x0a0(%0); cache %2, 0x0a0(%1);	\n\t"	\
-		"cache %2, 0x0c0(%0); cache %2, 0x0c0(%1);	\n\t"	\
-		"cache %2, 0x0e0(%0); cache %2, 0x0e0(%1);	\n\t"	\
-		"cache %2, 0x100(%0); cache %2, 0x100(%1);	\n\t"	\
-		"cache %2, 0x120(%0); cache %2, 0x120(%1);	\n\t"	\
-		"cache %2, 0x140(%0); cache %2, 0x140(%1);	\n\t"	\
-		"cache %2, 0x160(%0); cache %2, 0x160(%1);	\n\t"	\
-		"cache %2, 0x180(%0); cache %2, 0x180(%1);	\n\t"	\
-		"cache %2, 0x1a0(%0); cache %2, 0x1a0(%1);	\n\t"	\
-		"cache %2, 0x1c0(%0); cache %2, 0x1c0(%1);	\n\t"	\
-		"cache %2, 0x1e0(%0); cache %2, 0x1e0(%1);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va1), "r" (va2), "i" (op)				\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_8lines_16_4way:
- *
- *	Perform the specified cache operation on 8 16-byte
- * 	cache lines, 4-ways.
- */
-#define	cache_r4k_op_8lines_16_4way(va1, va2, va3, va4, op)		\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %4, 0x000(%0); cache %4, 0x000(%1);	\n\t"	\
-		"cache %4, 0x000(%2); cache %4, 0x000(%3);	\n\t"	\
-		"cache %4, 0x010(%0); cache %4, 0x010(%1);	\n\t"	\
-		"cache %4, 0x010(%2); cache %4, 0x010(%3);	\n\t"	\
-		"cache %4, 0x020(%0); cache %4, 0x020(%1);	\n\t"	\
-		"cache %4, 0x020(%2); cache %4, 0x020(%3);	\n\t"	\
-		"cache %4, 0x030(%0); cache %4, 0x030(%1);	\n\t"	\
-		"cache %4, 0x030(%2); cache %4, 0x030(%3);	\n\t"	\
-		"cache %4, 0x040(%0); cache %4, 0x040(%1);	\n\t"	\
-		"cache %4, 0x040(%2); cache %4, 0x040(%3);	\n\t"	\
-		"cache %4, 0x050(%0); cache %4, 0x050(%1);	\n\t"	\
-		"cache %4, 0x050(%2); cache %4, 0x050(%3);	\n\t"	\
-		"cache %4, 0x060(%0); cache %4, 0x060(%1);	\n\t"	\
-		"cache %4, 0x060(%2); cache %4, 0x060(%3);	\n\t"	\
-		"cache %4, 0x070(%0); cache %4, 0x070(%1);	\n\t"	\
-		"cache %4, 0x070(%2); cache %4, 0x070(%3);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va1), "r" (va2), "r" (va3), "r" (va4), "i" (op)	\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-/*
- * cache_r4k_op_8lines_32_4way:
- *
- *	Perform the specified cache operation on 8 32-byte
- * 	cache lines, 4-ways.
- */
-#define	cache_r4k_op_8lines_32_4way(va1, va2, va3, va4, op)		\
-do {									\
-	__asm __volatile(						\
-		".set noreorder					\n\t"	\
-		"cache %4, 0x000(%0); cache %4, 0x000(%1);	\n\t"	\
-		"cache %4, 0x000(%2); cache %4, 0x000(%3);	\n\t"	\
-		"cache %4, 0x020(%0); cache %4, 0x020(%1);	\n\t"	\
-		"cache %4, 0x020(%2); cache %4, 0x020(%3);	\n\t"	\
-		"cache %4, 0x040(%0); cache %4, 0x040(%1);	\n\t"	\
-		"cache %4, 0x040(%2); cache %4, 0x040(%3);	\n\t"	\
-		"cache %4, 0x060(%0); cache %4, 0x060(%1);	\n\t"	\
-		"cache %4, 0x060(%2); cache %4, 0x060(%3);	\n\t"	\
-		"cache %4, 0x080(%0); cache %4, 0x080(%1);	\n\t"	\
-		"cache %4, 0x080(%2); cache %4, 0x080(%3);	\n\t"	\
-		"cache %4, 0x0a0(%0); cache %4, 0x0a0(%1);	\n\t"	\
-		"cache %4, 0x0a0(%2); cache %4, 0x0a0(%3);	\n\t"	\
-		"cache %4, 0x0c0(%0); cache %4, 0x0c0(%1);	\n\t"	\
-		"cache %4, 0x0c0(%2); cache %4, 0x0c0(%3);	\n\t"	\
-		"cache %4, 0x0e0(%0); cache %4, 0x0e0(%1);	\n\t"	\
-		"cache %4, 0x0e0(%2); cache %4, 0x0e0(%3);	\n\t"	\
-		".set reorder"						\
-	    :								\
-	    : "r" (va1), "r" (va2), "r" (va3), "r" (va4), "i" (op)	\
-	    : "memory");						\
-} while (/*CONSTCOND*/0)
-
-void	r4k_icache_sync_all_16(void);
-void	r4k_icache_sync_range_16(vm_paddr_t, vm_size_t);
-void	r4k_icache_sync_range_index_16(vm_paddr_t, vm_size_t);
-
-void	r4k_icache_sync_all_32(void);
-void	r4k_icache_sync_range_32(vm_paddr_t, vm_size_t);
-void	r4k_icache_sync_range_index_32(vm_paddr_t, vm_size_t);
-
-void	r4k_pdcache_wbinv_all_16(void);
-void	r4k_pdcache_wbinv_range_16(vm_paddr_t, vm_size_t);
-void	r4k_pdcache_wbinv_range_index_16(vm_paddr_t, vm_size_t);
-
-void	r4k_pdcache_inv_range_16(vm_paddr_t, vm_size_t);
-void	r4k_pdcache_wb_range_16(vm_paddr_t, vm_size_t);
-
-void	r4k_pdcache_wbinv_all_32(void);
-void	r4k_pdcache_wbinv_range_32(vm_paddr_t, vm_size_t);
-void	r4k_pdcache_wbinv_range_index_32(vm_paddr_t, vm_size_t);
-
-void	r4k_pdcache_inv_range_32(vm_paddr_t, vm_size_t);
-void	r4k_pdcache_wb_range_32(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_wbinv_all_32(void);
-void	r4k_sdcache_wbinv_range_32(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wbinv_range_index_32(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_inv_range_32(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wb_range_32(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_wbinv_all_128(void);
-void	r4k_sdcache_wbinv_range_128(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wbinv_range_index_128(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_inv_range_128(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wb_range_128(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_wbinv_all_generic(void);
-void	r4k_sdcache_wbinv_range_generic(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wbinv_range_index_generic(vm_paddr_t, vm_size_t);
-
-void	r4k_sdcache_inv_range_generic(vm_paddr_t, vm_size_t);
-void	r4k_sdcache_wb_range_generic(vm_paddr_t, vm_size_t);
-
-#endif /* !LOCORE */
diff --git a/sys/mips/include/cca.h b/sys/mips/include/cca.h
deleted file mode 100644
index 1e974f6606f1..000000000000
--- a/sys/mips/include/cca.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*	$NetBSD: cpuregs.h,v 1.70 2006/05/15 02:26:54 simonb Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell and Rick Macklem.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)machConst.h 8.1 (Berkeley) 6/10/93
- *
- * machConst.h --
- *
- *	Machine dependent constants.
- *
- *	Copyright (C) 1989 Digital Equipment Corporation.
- *	Permission to use, copy, modify, and distribute this software and
- *	its documentation for any purpose and without fee is hereby granted,
- *	provided that the above copyright notice appears in all copies.
- *	Digital Equipment Corporation makes no representations about the
- *	suitability of this software for any purpose.  It is provided "as is"
- *	without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h,
- *	v 9.2 89/10/21 15:55:22 jhh Exp	 SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h,
- *	v 1.2 89/08/15 18:28:21 rab Exp	 SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h,
- *	v 9.1 89/09/18 17:33:00 shirriff Exp  SPRITE (DECWRL)
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_CCA_H_
-#define	_MIPS_CCA_H_
-
-/*
- * Cache Coherency Attributes:
- *	UC:	Uncached.
- *	UA:	Uncached accelerated.
- *	C:	Cacheable, coherency unspecified.
- *	CNC:	Cacheable non-coherent.
- *	CC:	Cacheable coherent.
- *	CCS:	Cacheable coherent, shared read.
- *	CCE:	Cacheable coherent, exclusive read.
- *	CCEW:	Cacheable coherent, exclusive write.
- *	CCUOW:	Cacheable coherent, update on write.
- *
- * Note that some bits vary in meaning across implementations (and that the
- * listing here is no doubt incomplete) and that the optimal cached mode varies
- * between implementations.  0x02 is required to be UC and 0x03 is required to
- * be a least C.
- *
- * We define the following logical bits:
- * 	UNCACHED:
- * 		The optimal uncached mode for the target CPU type.  This must
- * 		be suitable for use in accessing memory-mapped devices.
- * 	CACHED:	The optional cached mode for the target CPU type.
- */
-
-#define	MIPS_CCA_UC		0x02	/* Uncached. */
-#define	MIPS_CCA_C		0x03	/* Cacheable, coherency unspecified. */
-
-#if defined(CPU_R4000) || defined(CPU_R10000)
-#define	MIPS_CCA_CNC	0x03
-#define	MIPS_CCA_CCE	0x04
-#define	MIPS_CCA_CCEW	0x05
-
-#ifdef CPU_R4000
-#define	MIPS_CCA_CCUOW	0x06
-#endif
-
-#ifdef CPU_R10000
-#define	MIPS_CCA_UA	0x07
-#endif
-
-#define	MIPS_CCA_CACHED	MIPS_CCA_CCEW
-#endif /* defined(CPU_R4000) || defined(CPU_R10000) */
-
-#if defined(CPU_SB1)
-#define	MIPS_CCA_CC	0x05	/* Cacheable Coherent. */
-#endif
-
-#if defined(CPU_MIPS74K)
-#define	MIPS_CCA_UNCACHED	0x02
-#define	MIPS_CCA_CACHED		0x03
-#endif
-
-/*
- * 1004K and 1074K cores, as well as interAptiv and proAptiv cores, support
- * Cacheable Coherent CCAs 0x04 and 0x05, as well as Cacheable non-Coherent
- * CCA 0x03 and Uncached Accelerated CCA 0x07
- */
-#if defined(CPU_MIPS1004K) || defined(CPU_MIPS1074K) ||	\
-    defined(CPU_INTERAPTIV) || defined(CPU_PROAPTIV)
-#define	MIPS_CCA_CNC		0x03
-#define	MIPS_CCA_CCE		0x04
-#define	MIPS_CCA_CCS		0x05
-#define	MIPS_CCA_UA		0x07
-
-/* We use shared read CCA for CACHED CCA */
-#define	MIPS_CCA_CACHED		MIPS_CCA_CCS
-#endif
-
-#if defined(CPU_XBURST)
-#define	MIPS_CCA_UA		0x01
-#define	MIPS_CCA_WC		MIPS_CCA_UA
-#endif
-
-#ifndef	MIPS_CCA_UNCACHED
-#define	MIPS_CCA_UNCACHED	MIPS_CCA_UC
-#endif
-
-/*
- * If we don't know which cached mode to use and there is a cache coherent
- * mode, use it.  If there is not a cache coherent mode, use the required
- * cacheable mode.
- */
-#ifndef MIPS_CCA_CACHED
-#ifdef MIPS_CCA_CC
-#define	MIPS_CCA_CACHED	MIPS_CCA_CC
-#else
-#define	MIPS_CCA_CACHED	MIPS_CCA_C
-#endif
-#endif
-
-#endif
diff --git a/sys/mips/include/cdefs.h b/sys/mips/include/cdefs.h
deleted file mode 100644
index a7f118ea6a8a..000000000000
--- a/sys/mips/include/cdefs.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*	$NetBSD: cdefs.h,v 1.12 2006/08/27 19:04:30 matt Exp $	*/
-
-/*-
- * SPDX-License-Identifier: MIT-CMU
- *
- * Copyright (c) 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_CDEFS_H_
-#define	_MIPS_CDEFS_H_
-
-/*
- * These are depreciated.  Use __mips_{o32,o64,n32,n64} instead.
- */
-/*      MIPS Subprogram Interface Model */
-#define _MIPS_SIM_ABIX32	4	/* 64 bit safe, ILP32 o32 model */
-#define _MIPS_SIM_ABI64		3
-#define _MIPS_SIM_NABI32	2	/* 64bit safe, ILP32 n32 model */
-#define _MIPS_SIM_ABI32		1
-
-#define _MIPS_BSD_API_LP32	_MIPS_SIM_ABI32
-#define	_MIPS_BSD_API_LP32_64CLEAN	_MIPS_SIM_ABIX32
-#define	_MIPS_BSD_API_LP64	_MIPS_SIM_ABI64
-
-#define _MIPS_BSD_API_O32	_MIPS_SIM_ABI32
-#define	_MIPS_BSD_API_O64	_MIPS_SIM_ABIX32
-#define	_MIPS_BSD_API_N32	_MIPS_SIM_NABI32
-#define	_MIPS_BSD_API_N64	_MIPS_SIM_ABI64
-
-#define	_MIPS_SIM_NEWABI_P(abi)	((abi) == _MIPS_SIM_NABI32 || \
-				 (abi) == _MIPS_SIM_ABI64)
-
-#define	_MIPS_SIM_LP64_P(abi)	((abi) == _MIPS_SIM_ABIX32 || \
-				 (abi) == _MIPS_SIM_ABI64)
-
-#if defined(__mips_n64)
-#define	_MIPS_BSD_API		_MIPS_BSD_API_N64
-#elif defined(__mips_n32)
-#define	_MIPS_BSD_API		_MIPS_BSD_API_N32
-#elif defined(__mips_o64)
-#define	_MIPS_BSD_API		_MIPS_BSD_API_O64
-#else
-#define	_MIPS_BSD_API		_MIPS_BSD_API_O32
-#endif
-
-#define	_MIPS_ISA_MIPS1		1
-#define	_MIPS_ISA_MIPS2		2
-#define	_MIPS_ISA_MIPS3		3
-#define	_MIPS_ISA_MIPS4		4
-#define	_MIPS_ISA_MIPS32	5
-#define	_MIPS_ISA_MIPS64	6
-
-#endif /* !_MIPS_CDEFS_H_ */
diff --git a/sys/mips/include/clock.h b/sys/mips/include/clock.h
deleted file mode 100644
index 0622efb22690..000000000000
--- a/sys/mips/include/clock.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Garrett Wollman, September 1994.
- * This file is in the public domain.
- * Kernel interface to machine-dependent clock driver.
- *
- *	JNPR: clock.h,v 1.6.2.1 2007/08/29 09:36:05 girish
- *	from: src/sys/alpha/include/clock.h,v 1.5 1999/12/29 04:27:55 peter
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_CLOCK_H_
-#define	_MACHINE_CLOCK_H_
-
-#include <sys/bus.h>
-
-#ifdef _KERNEL
-
-extern int cpu_clock;
-
-#define wall_cmos_clock 0
-#define adjkerntz 0
-
-/*
- * Default is to assume a CPU pipeline clock of 100Mhz, and
- * that CP0_COUNT increments every 2 cycles.
- */
-#define MIPS_DEFAULT_HZ		(100 * 1000 * 1000)
-
-void	mips_timer_early_init(uint64_t clock_hz);
-void	mips_timer_init_params(uint64_t, int);
-
-extern uint64_t	counter_freq;
-extern int	clocks_running;
-
-/*
- * The 'platform_timecounter' pointer may be used to register a
- * platform-specific timecounter.
- *
- * A default timecounter based on the CP0 COUNT register is always registered.
- */
-extern struct timecounter *platform_timecounter;
-
-#endif
-
-#endif /* !_MACHINE_CLOCK_H_ */
diff --git a/sys/mips/include/counter.h b/sys/mips/include/counter.h
deleted file mode 100644
index 0694a9c28cdb..000000000000
--- a/sys/mips/include/counter.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Konstantin Belousov <kib@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __MACHINE_COUNTER_H__
-#define __MACHINE_COUNTER_H__
-
-#include <sys/pcpu.h>
-#ifdef INVARIANTS
-#include <sys/proc.h>
-#endif
-
-#define	EARLY_COUNTER	&((struct pcpu *)pcpu_space)->pc_early_dummy_counter
-
-#define	counter_enter()	critical_enter()
-#define	counter_exit()	critical_exit()
-
-#ifdef IN_SUBR_COUNTER_C
-/* XXXKIB non-atomic 64bit read on 32bit */
-static inline uint64_t
-counter_u64_read_one(uint64_t *p, int cpu)
-{
-
-	return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu));
-}
-
-static inline uint64_t
-counter_u64_fetch_inline(uint64_t *p)
-{
-	uint64_t r;
-	int i;
-
-	r = 0;
-	for (i = 0; i < mp_ncpus; i++)
-		r += counter_u64_read_one((uint64_t *)p, i);
-
-	return (r);
-}
-
-/* XXXKIB non-atomic 64bit store on 32bit, might interrupt increment */
-static void
-counter_u64_zero_one_cpu(void *arg)
-{
-
-	*((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE *
-	    PCPU_GET(cpuid))) = 0;
-}
-
-static inline void
-counter_u64_zero_inline(counter_u64_t c)
-{
-
-	smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu,
-	    smp_no_rendezvous_barrier, c);
-}
-#endif
-
-#define	counter_u64_add_protected(c, inc)	do {	\
-	CRITICAL_ASSERT(curthread);			\
-	*(uint64_t *)zpcpu_get(c) += (inc);		\
-} while (0)
-
-static inline void
-counter_u64_add(counter_u64_t c, int64_t inc)
-{
-
-	counter_enter();
-	counter_u64_add_protected(c, inc);
-	counter_exit();
-}
-
-#endif	/* ! __MACHINE_COUNTER_H__ */
diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h
deleted file mode 100644
index aaec97aa25f1..000000000000
--- a/sys/mips/include/cpu.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*	$OpenBSD: cpu.h,v 1.4 1998/09/15 10:50:12 pefo Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell and Rick Macklem.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	Copyright (C) 1989 Digital Equipment Corporation.
- *	Permission to use, copy, modify, and distribute this software and
- *	its documentation for any purpose and without fee is hereby granted,
- *	provided that the above copyright notice appears in all copies.
- *	Digital Equipment Corporation makes no representations about the
- *	suitability of this software for any purpose.  It is provided "as is"
- *	without express or implied warranty.
- *
- *	from: @(#)cpu.h	8.4 (Berkeley) 1/4/94
- *	JNPR: cpu.h,v 1.9.2.2 2007/09/10 08:23:46 girish
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_CPU_H_
-#define	_MACHINE_CPU_H_
-
-#include <machine/endian.h>
-
-/* BEGIN: these are going away */
-
-#define	soft_int_mask(softintr)	(1 << ((softintr) + 8))
-#define	hard_int_mask(hardintr)	(1 << ((hardintr) + 10))
-
-/* END: These are going away */
-
-/*
- * Exported definitions unique to mips cpu support.
- */
-
-#ifndef _LOCORE
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-
-#define	TRAPF_USERMODE(framep)  (((framep)->sr & MIPS_SR_KSU_USER) != 0)
-#define	TRAPF_PC(framep)	((framep)->pc)
-#define	cpu_getstack(td)	((td)->td_frame->sp)
-#define	cpu_setstack(td, nsp)	((td)->td_frame->sp = (nsp))
-#define	cpu_spinwait()		/* nothing */
-#define	cpu_lock_delay()	DELAY(1)
-
-/*
- * A machine-independent interface to the CPU's counter.
- */
-#define get_cyclecount()	mips_rd_count()
-#endif				/* !_LOCORE */
-
-#if defined(_KERNEL) && !defined(_LOCORE)
-
-extern char btext[];
-extern char etext[];
-
-void cpu_halt(void);
-void cpu_reset(void);
-
-#endif				/* _KERNEL */
-#endif				/* !_MACHINE_CPU_H_ */
diff --git a/sys/mips/include/cpufunc.h b/sys/mips/include/cpufunc.h
deleted file mode 100644
index a254fda2bb53..000000000000
--- a/sys/mips/include/cpufunc.h
+++ /dev/null
@@ -1,390 +0,0 @@
-/*	$OpenBSD: pio.h,v 1.2 1998/09/15 10:50:12 pefo Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-4-Clause
- *
- * Copyright (c) 2002-2004 Juli Mallett.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*
- * Copyright (c) 1995-1999 Per Fogelstrom.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Per Fogelstrom.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	JNPR: cpufunc.h,v 1.5 2007/08/09 11:23:32 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_CPUFUNC_H_
-#define	_MACHINE_CPUFUNC_H_
-
-#include <sys/types.h>
-#include <machine/cpuregs.h>
-
-/* 
- * These functions are required by user-land atomi ops
- */ 
-
-static __inline void
-mips_barrier(void)
-{
-#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM)
-	__compiler_membar();
-#else
-	__asm __volatile (".set noreorder\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  "nop\n\t"
-			  ".set reorder\n\t"
-			  : : : "memory");
-#endif
-}
-
-static __inline void
-mips_cp0_sync(void)
-{
-	__asm __volatile (__XSTRING(COP0_SYNC));
-}
-
-static __inline void
-mips_wbflush(void)
-{
-#if defined(CPU_CNMIPS)
-	__asm __volatile (".set noreorder\n\t"
-			"syncw\n\t"
-			".set reorder\n"
-			: : : "memory");
-#else	
-	__asm __volatile ("sync" : : : "memory");
-	mips_barrier();
-#endif
-}
-
-static __inline void
-breakpoint(void)
-{
-	__asm __volatile ("break");
-}
-
-#ifdef _KERNEL
-/*
- * XXX
- * It would be nice to add variants that read/write register_t, to avoid some
- * ABI checks.
- */
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	MIPS_RW64_COP0(n,r)					\
-static __inline uint64_t					\
-mips_rd_ ## n (void)						\
-{								\
-	uint64_t v0;						\
-	__asm __volatile ("dmfc0 %[v0], $"__XSTRING(r)";"	\
-			  : [v0] "=&r"(v0));			\
-	mips_barrier();						\
-	return (v0);						\
-}								\
-static __inline void						\
-mips_wr_ ## n (uint64_t a0)					\
-{								\
-	__asm __volatile ("dmtc0 %[a0], $"__XSTRING(r)";"	\
-			 __XSTRING(COP0_SYNC)";"		\
-			 "nop;"					\
-			 "nop;"					\
-			 :					\
-			 : [a0] "r"(a0));			\
-	mips_barrier();						\
-} struct __hack
-
-#define	MIPS_RW64_COP0_SEL(n,r,s)				\
-static __inline uint64_t					\
-mips_rd_ ## n(void)						\
-{								\
-	uint64_t v0;						\
-	__asm __volatile ("dmfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			  : [v0] "=&r"(v0));			\
-	mips_barrier();						\
-	return (v0);						\
-}								\
-static __inline void						\
-mips_wr_ ## n(uint64_t a0)					\
-{								\
-	__asm __volatile ("dmtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			 __XSTRING(COP0_SYNC)";"		\
-			 :					\
-			 : [a0] "r"(a0));			\
-	mips_barrier();						\
-} struct __hack
-
-#if defined(__mips_n64)
-MIPS_RW64_COP0(excpc, MIPS_COP_0_EXC_PC);
-MIPS_RW64_COP0(entryhi, MIPS_COP_0_TLB_HI);
-MIPS_RW64_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK);
-MIPS_RW64_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2);
-#ifdef CPU_CNMIPS
-MIPS_RW64_COP0_SEL(cvmcount, MIPS_COP_0_COUNT, 6);
-MIPS_RW64_COP0_SEL(cvmctl, MIPS_COP_0_COUNT, 7);
-MIPS_RW64_COP0_SEL(cvmmemctl, MIPS_COP_0_COMPARE, 7);
-MIPS_RW64_COP0_SEL(icache_err, MIPS_COP_0_CACHE_ERR, 0);
-MIPS_RW64_COP0_SEL(dcache_err, MIPS_COP_0_CACHE_ERR, 1);
-#endif
-#endif
-#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */
-MIPS_RW64_COP0(entrylo0, MIPS_COP_0_TLB_LO0);
-MIPS_RW64_COP0(entrylo1, MIPS_COP_0_TLB_LO1);
-#endif
-MIPS_RW64_COP0(xcontext, MIPS_COP_0_TLB_XCONTEXT);
-
-#undef	MIPS_RW64_COP0
-#undef	MIPS_RW64_COP0_SEL
-#endif
-
-#define	MIPS_RW32_COP0(n,r)					\
-static __inline uint32_t					\
-mips_rd_ ## n (void)						\
-{								\
-	uint32_t v0;						\
-	__asm __volatile ("mfc0 %[v0], $"__XSTRING(r)";"	\
-			  : [v0] "=&r"(v0));			\
-	mips_barrier();						\
-	return (v0);						\
-}								\
-static __inline void						\
-mips_wr_ ## n (uint32_t a0)					\
-{								\
-	__asm __volatile ("mtc0 %[a0], $"__XSTRING(r)";"	\
-			 __XSTRING(COP0_SYNC)";"		\
-			 "nop;"					\
-			 "nop;"					\
-			 :					\
-			 : [a0] "r"(a0));			\
-	mips_barrier();						\
-} struct __hack
-
-#define	MIPS_RW32_COP0_SEL(n,r,s)				\
-static __inline uint32_t					\
-mips_rd_ ## n(void)						\
-{								\
-	uint32_t v0;						\
-	__asm __volatile ("mfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			  : [v0] "=&r"(v0));			\
-	mips_barrier();						\
-	return (v0);						\
-}								\
-static __inline void						\
-mips_wr_ ## n(uint32_t a0)					\
-{								\
-	__asm __volatile ("mtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";"	\
-			 __XSTRING(COP0_SYNC)";"		\
-			 "nop;"					\
-			 "nop;"					\
-			 :					\
-			 : [a0] "r"(a0));			\
-	mips_barrier();						\
-} struct __hack
-
-#ifdef CPU_CNMIPS
-static __inline void mips_sync_icache (void)
-{
-	__asm __volatile (
-		".set push\n"
-		".set mips64\n"
-		".word 0x041f0000\n"		/* xxx ICACHE */
-		"nop\n"
-		".set pop\n"
-		: : );
-}
-#endif
-
-MIPS_RW32_COP0(compare, MIPS_COP_0_COMPARE);
-MIPS_RW32_COP0(config, MIPS_COP_0_CONFIG);
-MIPS_RW32_COP0_SEL(config1, MIPS_COP_0_CONFIG, 1);
-MIPS_RW32_COP0_SEL(config2, MIPS_COP_0_CONFIG, 2);
-MIPS_RW32_COP0_SEL(config3, MIPS_COP_0_CONFIG, 3);
-#ifdef CPU_CNMIPS
-MIPS_RW32_COP0_SEL(config4, MIPS_COP_0_CONFIG, 4);
-#endif
-#ifdef BERI_LARGE_TLB
-MIPS_RW32_COP0_SEL(config5, MIPS_COP_0_CONFIG, 5);
-#endif
-#if defined(CPU_NLM) || defined(BERI_LARGE_TLB)
-MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6);
-#endif
-#if defined(CPU_NLM) || defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || \
-    defined(CPU_MIPS24K)
-MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7);
-#endif
-MIPS_RW32_COP0(count, MIPS_COP_0_COUNT);
-MIPS_RW32_COP0(index, MIPS_COP_0_TLB_INDEX);
-MIPS_RW32_COP0(wired, MIPS_COP_0_TLB_WIRED);
-MIPS_RW32_COP0(cause, MIPS_COP_0_CAUSE);
-#if !defined(__mips_n64)
-MIPS_RW32_COP0(excpc, MIPS_COP_0_EXC_PC);
-#endif
-MIPS_RW32_COP0(status, MIPS_COP_0_STATUS);
-MIPS_RW32_COP0_SEL(cmgcrbase, 15, 3);
-
-/* XXX: Some of these registers are specific to MIPS32. */
-#if !defined(__mips_n64)
-MIPS_RW32_COP0(entryhi, MIPS_COP_0_TLB_HI);
-MIPS_RW32_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK);
-MIPS_RW32_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2);
-#endif
-#ifdef CPU_NLM
-MIPS_RW32_COP0_SEL(pagegrain, MIPS_COP_0_TLB_PG_MASK, 1);
-#endif
-#if !defined(__mips_n64) && !defined(__mips_n32) /* !PHYSADDR_64_BIT */
-MIPS_RW32_COP0(entrylo0, MIPS_COP_0_TLB_LO0);
-MIPS_RW32_COP0(entrylo1, MIPS_COP_0_TLB_LO1);
-#endif
-MIPS_RW32_COP0(prid, MIPS_COP_0_PRID);
-MIPS_RW32_COP0_SEL(cinfo, MIPS_COP_0_PRID, 6);
-MIPS_RW32_COP0_SEL(tinfo, MIPS_COP_0_PRID, 7);
-/* XXX 64-bit?  */
-MIPS_RW32_COP0_SEL(ebase, MIPS_COP_0_PRID, 1);
-
-#if defined(CPU_MIPS24K) || defined(CPU_MIPS34K) ||		\
-    defined(CPU_MIPS74K) || defined(CPU_MIPS1004K)  ||	\
-    defined(CPU_MIPS1074K) || defined(CPU_INTERAPTIV) ||	\
-    defined(CPU_PROAPTIV)
-/* MIPS32/64 r2 intctl */
-MIPS_RW32_COP0_SEL(intctl, MIPS_COP_0_INTCTL, 1);
-#endif
-
-#ifdef CPU_XBURST
-MIPS_RW32_COP0_SEL(xburst_mbox0, MIPS_COP_0_XBURST_MBOX, 0);
-MIPS_RW32_COP0_SEL(xburst_mbox1, MIPS_COP_0_XBURST_MBOX, 1);
-MIPS_RW32_COP0_SEL(xburst_core_ctl, MIPS_COP_0_XBURST_C12, 2);
-MIPS_RW32_COP0_SEL(xburst_core_sts, MIPS_COP_0_XBURST_C12, 3);
-MIPS_RW32_COP0_SEL(xburst_reim, MIPS_COP_0_XBURST_C12, 4);
-#endif
-MIPS_RW32_COP0(watchlo, MIPS_COP_0_WATCH_LO);
-MIPS_RW32_COP0_SEL(watchlo1, MIPS_COP_0_WATCH_LO, 1);
-MIPS_RW32_COP0_SEL(watchlo2, MIPS_COP_0_WATCH_LO, 2);
-MIPS_RW32_COP0_SEL(watchlo3, MIPS_COP_0_WATCH_LO, 3);
-MIPS_RW32_COP0(watchhi, MIPS_COP_0_WATCH_HI);
-MIPS_RW32_COP0_SEL(watchhi1, MIPS_COP_0_WATCH_HI, 1);
-MIPS_RW32_COP0_SEL(watchhi2, MIPS_COP_0_WATCH_HI, 2);
-MIPS_RW32_COP0_SEL(watchhi3, MIPS_COP_0_WATCH_HI, 3);
-
-MIPS_RW32_COP0_SEL(perfcnt0, MIPS_COP_0_PERFCNT, 0);
-MIPS_RW32_COP0_SEL(perfcnt1, MIPS_COP_0_PERFCNT, 1);
-MIPS_RW32_COP0_SEL(perfcnt2, MIPS_COP_0_PERFCNT, 2);
-MIPS_RW32_COP0_SEL(perfcnt3, MIPS_COP_0_PERFCNT, 3);
-MIPS_RW32_COP0(hwrena, MIPS_COP_0_HWRENA);
-
-#undef	MIPS_RW32_COP0
-#undef	MIPS_RW32_COP0_SEL
-
-static __inline register_t
-intr_disable(void)
-{
-	register_t s;
-
-	s = mips_rd_status();
-	mips_wr_status(s & ~MIPS_SR_INT_IE);
-
-	return (s & MIPS_SR_INT_IE);
-}
-
-static __inline register_t
-intr_enable(void)
-{
-	register_t s;
-
-	s = mips_rd_status();
-	mips_wr_status(s | MIPS_SR_INT_IE);
-
-	return (s);
-}
-
-static __inline void
-intr_restore(register_t ie)
-{
-	if (ie == MIPS_SR_INT_IE) {
-		intr_enable();
-	}
-}
-
-static __inline uint32_t
-set_intr_mask(uint32_t mask)
-{
-	uint32_t ostatus;
-
-	ostatus = mips_rd_status();
-	mask = (ostatus & ~MIPS_SR_INT_MASK) | (mask & MIPS_SR_INT_MASK);
-	mips_wr_status(mask);
-	return (ostatus);
-}
-
-static __inline uint32_t
-get_intr_mask(void)
-{
-
-	return (mips_rd_status() & MIPS_SR_INT_MASK);
-}
-
-#endif /* _KERNEL */
-
-#define	readb(va)	(*(volatile uint8_t *) (va))
-#define	readw(va)	(*(volatile uint16_t *) (va))
-#define	readl(va)	(*(volatile uint32_t *) (va))
-#if !defined(__mips_o32)
-#define	readq(a)	(*(volatile uint64_t *)(a))
-#endif
-
-#define	writeb(va, d)	(*(volatile uint8_t *) (va) = (d))
-#define	writew(va, d)	(*(volatile uint16_t *) (va) = (d))
-#define	writel(va, d)	(*(volatile uint32_t *) (va) = (d))
-#if !defined(__mips_o32)
-#define	writeq(va, d)	(*(volatile uint64_t *) (va) = (d))
-#endif
-
-#endif /* !_MACHINE_CPUFUNC_H_ */
diff --git a/sys/mips/include/cpuinfo.h b/sys/mips/include/cpuinfo.h
deleted file mode 100644
index cdc98ef8e098..000000000000
--- a/sys/mips/include/cpuinfo.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*	$NetBSD: cpu.h,v 1.70 2003/01/17 23:36:08 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell and Rick Macklem.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *	@(#)cpu.h	8.4 (Berkeley) 1/4/94
- */
-
-#ifndef _CPUINFO_H_
-#define _CPUINFO_H_
-
-/*
- * Exported definitions unique to NetBSD/mips cpu support.
- */
-
-#ifdef _KERNEL
-#ifndef LOCORE
-
-struct mips_cpuinfo {
-	u_int8_t	cpu_vendor;
-	u_int8_t	cpu_rev;
-	u_int8_t	cpu_impl;
-	u_int8_t	tlb_type;
-	u_int32_t	tlb_pgmask;
-	u_int16_t	tlb_nentries;
-	u_int8_t	icache_virtual;
-	boolean_t	cache_coherent_dma;
-	boolean_t	userlocal_reg;
-	struct {
-		u_int32_t	ic_size;
-		u_int8_t	ic_linesize;
-		u_int8_t	ic_nways;
-		u_int16_t	ic_nsets;
-		u_int32_t	dc_size;
-		u_int8_t	dc_linesize;
-		u_int8_t	dc_nways;
-		u_int16_t	dc_nsets;
-	} l1;
-	struct {
-		u_int32_t	dc_size;
-		u_int8_t	dc_linesize;
-		u_int8_t	dc_nways;
-		u_int16_t	dc_nsets;
-	} l2;
-	u_int32_t	fpu_id;
-};
-
-extern struct mips_cpuinfo cpuinfo;
-
-#endif /* !LOCORE */
-#endif /* _KERNEL */
-#endif /* _CPUINFO_H_ */
diff --git a/sys/mips/include/cpuregs.h b/sys/mips/include/cpuregs.h
deleted file mode 100644
index 2b5a0ce554dc..000000000000
--- a/sys/mips/include/cpuregs.h
+++ /dev/null
@@ -1,643 +0,0 @@
-/*	$NetBSD: cpuregs.h,v 1.70 2006/05/15 02:26:54 simonb Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell and Rick Macklem.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)machConst.h 8.1 (Berkeley) 6/10/93
- *
- * machConst.h --
- *
- *	Machine dependent constants.
- *
- *	Copyright (C) 1989 Digital Equipment Corporation.
- *	Permission to use, copy, modify, and distribute this software and
- *	its documentation for any purpose and without fee is hereby granted,
- *	provided that the above copyright notice appears in all copies.
- *	Digital Equipment Corporation makes no representations about the
- *	suitability of this software for any purpose.  It is provided "as is"
- *	without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h,
- *	v 9.2 89/10/21 15:55:22 jhh Exp	 SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h,
- *	v 1.2 89/08/15 18:28:21 rab Exp	 SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h,
- *	v 9.1 89/09/18 17:33:00 shirriff Exp  SPRITE (DECWRL)
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_CPUREGS_H_
-#define	_MIPS_CPUREGS_H_
-
-#ifndef _KVM_MINIDUMP
-#include <machine/cca.h>
-#endif
-
-/*
- * Address space.
- * 32-bit mips CPUS partition their 32-bit address space into four segments:
- *
- * kuseg   0x00000000 - 0x7fffffff  User virtual mem,  mapped
- * kseg0   0x80000000 - 0x9fffffff  Physical memory, cached, unmapped
- * kseg1   0xa0000000 - 0xbfffffff  Physical memory, uncached, unmapped
- * kseg2   0xc0000000 - 0xffffffff  kernel-virtual,  mapped
- *
- * Caching of mapped addresses is controlled by bits in the TLB entry.
- */
-
-#define	MIPS_KSEG0_LARGEST_PHYS		(0x20000000)
-#define	MIPS_KSEG0_PHYS_MASK		(0x1fffffff)
-#define	MIPS_XKPHYS_LARGEST_PHYS	(0x10000000000)  /* 40 bit PA */
-#define	MIPS_XKPHYS_PHYS_MASK		(0x0ffffffffff)
-
-#ifndef LOCORE
-#define	MIPS_KUSEG_START		0x00000000
-#define	MIPS_KSEG0_START		((intptr_t)(int32_t)0x80000000)
-#define	MIPS_KSEG0_END			((intptr_t)(int32_t)0x9fffffff)
-#define	MIPS_KSEG1_START		((intptr_t)(int32_t)0xa0000000)
-#define	MIPS_KSEG1_END			((intptr_t)(int32_t)0xbfffffff)
-#define	MIPS_KSSEG_START		((intptr_t)(int32_t)0xc0000000)
-#define	MIPS_KSSEG_END			((intptr_t)(int32_t)0xdfffffff)
-#define	MIPS_KSEG3_START		((intptr_t)(int32_t)0xe0000000)
-#define	MIPS_KSEG3_END			((intptr_t)(int32_t)0xffffffff)
-#define MIPS_KSEG2_START		MIPS_KSSEG_START
-#define MIPS_KSEG2_END			MIPS_KSSEG_END
-#endif
-
-#define	MIPS_PHYS_TO_KSEG0(x)		((uintptr_t)(x) | MIPS_KSEG0_START)
-#define	MIPS_PHYS_TO_KSEG1(x)		((uintptr_t)(x) | MIPS_KSEG1_START)
-#define	MIPS_KSEG0_TO_PHYS(x)		((uintptr_t)(x) & MIPS_KSEG0_PHYS_MASK)
-#define	MIPS_KSEG1_TO_PHYS(x)		((uintptr_t)(x) & MIPS_KSEG0_PHYS_MASK)
-
-#define	MIPS_IS_KSEG0_ADDR(x)					\
-	(((vm_offset_t)(x) >= MIPS_KSEG0_START) &&		\
-	    ((vm_offset_t)(x) <= MIPS_KSEG0_END))
-#define	MIPS_IS_KSEG1_ADDR(x)					\
-	(((vm_offset_t)(x) >= MIPS_KSEG1_START) &&		\
-	    ((vm_offset_t)(x) <= MIPS_KSEG1_END))
-#define	MIPS_IS_VALID_PTR(x)		(MIPS_IS_KSEG0_ADDR(x) || \
-					    MIPS_IS_KSEG1_ADDR(x))
-
-#define	MIPS_PHYS_TO_XKPHYS(cca,x) \
-	((0x2ULL << 62) | ((unsigned long long)(cca) << 59) | (x))
-#define	MIPS_PHYS_TO_XKPHYS_CACHED(x) \
-	((0x2ULL << 62) | ((unsigned long long)(MIPS_CCA_CACHED) << 59) | (x))
-#define	MIPS_PHYS_TO_XKPHYS_UNCACHED(x) \
-	((0x2ULL << 62) | ((unsigned long long)(MIPS_CCA_UNCACHED) << 59) | (x))
-
-#define	MIPS_XKPHYS_TO_PHYS(x)		((uintptr_t)(x) & MIPS_XKPHYS_PHYS_MASK)
-
-#define	MIPS_XKPHYS_START		0x8000000000000000
-#define	MIPS_XKPHYS_END			0xbfffffffffffffff
-#define	MIPS_XUSEG_START		0x0000000000000000
-#define	MIPS_XUSEG_END			0x0000010000000000
-#define	MIPS_XKSEG_START		0xc000000000000000
-#define	MIPS_XKSEG_END			0xc00000ff80000000
-#define	MIPS_XKSEG_COMPAT32_START	0xffffffff80000000
-#define	MIPS_XKSEG_COMPAT32_END		0xffffffffffffffff
-#define	MIPS_XKSEG_TO_COMPAT32(va)	((va) & 0xffffffff)
-
-#ifdef __mips_n64
-#define	MIPS_DIRECT_MAPPABLE(pa)	1
-#define	MIPS_PHYS_TO_DIRECT(pa)		MIPS_PHYS_TO_XKPHYS_CACHED(pa)
-#define	MIPS_PHYS_TO_DIRECT_UNCACHED(pa)	MIPS_PHYS_TO_XKPHYS_UNCACHED(pa)
-#define	MIPS_DIRECT_TO_PHYS(va)		MIPS_XKPHYS_TO_PHYS(va)
-#else
-#define	MIPS_DIRECT_MAPPABLE(pa)	((pa) < MIPS_KSEG0_LARGEST_PHYS)
-#define	MIPS_PHYS_TO_DIRECT(pa)		MIPS_PHYS_TO_KSEG0(pa)
-#define	MIPS_PHYS_TO_DIRECT_UNCACHED(pa)	MIPS_PHYS_TO_KSEG1(pa)
-#define	MIPS_DIRECT_TO_PHYS(va)		MIPS_KSEG0_TO_PHYS(va)
-#endif
-
-/* CPU dependent mtc0 hazard hook */
-#if defined(CPU_CNMIPS) || defined(CPU_RMI)
-#define	COP0_SYNC
-#elif defined(CPU_NLM)
-#define	COP0_SYNC	.word 0xc0	/* ehb */
-#elif defined(CPU_SB1)
-#define COP0_SYNC  ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop
-#elif defined(CPU_MIPS24K) || defined(CPU_MIPS34K) ||		\
-      defined(CPU_MIPS74K) || defined(CPU_MIPS1004K)  ||	\
-      defined(CPU_MIPS1074K) || defined(CPU_INTERAPTIV) ||	\
-      defined(CPU_PROAPTIV)
-/*
- * According to MIPS32tm Architecture for Programmers, Vol.II, rev. 2.00:
- * "As EHB becomes standard in MIPS implementations, the previous SSNOPs can be
- *  removed, leaving only the EHB".
- * Also, all MIPS32 Release 2 implementations have the EHB instruction, which
- * resolves all execution hazards. The same goes for MIPS32 Release 3.
- */
-#define	COP0_SYNC	.word 0xc0	/* ehb */
-#else
-/*
- * Pick a reasonable default based on the "typical" spacing described in the
- * "CP0 Hazards" chapter of MIPS Architecture Book Vol III.
- */
-#define	COP0_SYNC  ssnop; ssnop; ssnop; ssnop; .word 0xc0;
-#endif
-#define	COP0_HAZARD_FPUENABLE	nop; nop; nop; nop;
-
-/*
- * The bits in the cause register.
- *
- * Bits common to r3000 and r4000:
- *
- *	MIPS_CR_BR_DELAY	Exception happened in branch delay slot.
- *	MIPS_CR_COP_ERR		Coprocessor error.
- *	MIPS_CR_IP		Interrupt pending bits defined below.
- *				(same meaning as in CAUSE register).
- *	MIPS_CR_EXC_CODE	The exception type (see exception codes below).
- *
- * Differences:
- *  r3k has 4 bits of execption type, r4k has 5 bits.
- */
-#define	MIPS_CR_BR_DELAY	0x80000000
-#define	MIPS_CR_COP_ERR		0x30000000
-#define	MIPS_CR_EXC_CODE	0x0000007C	/* five bits */
-#define	MIPS_CR_IP		0x0000FF00
-#define	MIPS_CR_EXC_CODE_SHIFT	2
-#define	MIPS_CR_COP_ERR_SHIFT	28
-
-/*
- * The bits in the status register.  All bits are active when set to 1.
- *
- *	R3000 status register fields:
- *	MIPS_SR_COP_USABILITY	Control the usability of the four coprocessors.
- *	MIPS_SR_TS		TLB shutdown.
- *
- *	MIPS_SR_INT_IE		Master (current) interrupt enable bit.
- *
- * Differences:
- *	r3k has cache control is via frobbing SR register bits, whereas the
- *	r4k cache control is via explicit instructions.
- *	r3k has a 3-entry stack of kernel/user bits, whereas the
- *	r4k has kernel/supervisor/user.
- */
-#define	MIPS_SR_COP_USABILITY	0xf0000000
-#define	MIPS_SR_COP_0_BIT	0x10000000
-#define	MIPS_SR_COP_1_BIT	0x20000000
-#define MIPS_SR_COP_2_BIT       0x40000000
-
-	/* r4k and r3k differences, see below */
-
-#define	MIPS_SR_MX		0x01000000	/* MIPS64 */
-#define	MIPS_SR_PX		0x00800000	/* MIPS64 */
-#define	MIPS_SR_BEV		0x00400000	/* Use boot exception vector */
-#define	MIPS_SR_TS		0x00200000
-#define MIPS_SR_DE		0x00010000
-
-#define	MIPS_SR_INT_IE		0x00000001
-/*#define MIPS_SR_MBZ		0x0f8000c0*/	/* Never used, true for r3k */
-#define MIPS_SR_INT_MASK	0x0000ff00
-
-/*
- * R4000 status register bit definitions,
- * where different from r2000/r3000.
- */
-#define	MIPS_SR_XX		0x80000000
-#define	MIPS_SR_RP		0x08000000
-#define	MIPS_SR_FR		0x04000000
-#define	MIPS_SR_RE		0x02000000
-
-#define	MIPS_SR_DIAG_DL	0x01000000		/* QED 52xx */
-#define	MIPS_SR_DIAG_IL	0x00800000		/* QED 52xx */
-#define	MIPS_SR_SR		0x00100000
-#define	MIPS_SR_NMI		0x00080000		/* MIPS32/64 */
-#define	MIPS_SR_DIAG_CH	0x00040000
-#define	MIPS_SR_DIAG_CE	0x00020000
-#define	MIPS_SR_DIAG_PE	0x00010000
-#define	MIPS_SR_EIE		0x00010000		/* TX79/R5900 */
-#define	MIPS_SR_KX		0x00000080
-#define	MIPS_SR_SX		0x00000040
-#define	MIPS_SR_UX		0x00000020
-#define	MIPS_SR_KSU_MASK	0x00000018
-#define	MIPS_SR_KSU_USER	0x00000010
-#define	MIPS_SR_KSU_SUPER	0x00000008
-#define	MIPS_SR_KSU_KERNEL	0x00000000
-#define	MIPS_SR_ERL		0x00000004
-#define	MIPS_SR_EXL		0x00000002
-
-/*
- * The interrupt masks.
- * If a bit in the mask is 1 then the interrupt is enabled (or pending).
- */
-#define	MIPS_INT_MASK		0xff00
-#define	MIPS_INT_MASK_5		0x8000
-#define	MIPS_INT_MASK_4		0x4000
-#define	MIPS_INT_MASK_3		0x2000
-#define	MIPS_INT_MASK_2		0x1000
-#define	MIPS_INT_MASK_1		0x0800
-#define	MIPS_INT_MASK_0		0x0400
-#define	MIPS_HARD_INT_MASK	0xfc00
-#define	MIPS_SOFT_INT_MASK_1	0x0200
-#define	MIPS_SOFT_INT_MASK_0	0x0100
-
-/*
- * The bits in the MIPS3 config register.
- *
- *	bit 0..5: R/W, Bit 6..31: R/O
- */
-
-/* kseg0 coherency algorithm - see MIPS3_TLB_ATTR values */
-#define	MIPS_CONFIG_K0_MASK	0x00000007
-
-/*
- * R/W Update on Store Conditional
- *	0: Store Conditional uses coherency algorithm specified by TLB
- *	1: Store Conditional uses cacheable coherent update on write
- */
-#define	MIPS_CONFIG_CU		0x00000008
-
-#define	MIPS_CONFIG_DB		0x00000010	/* Primary D-cache line size */
-#define	MIPS_CONFIG_IB		0x00000020	/* Primary I-cache line size */
-#define	MIPS_CONFIG_CACHE_L1_LSIZE(config, bit) \
-	(((config) & (bit)) ? 32 : 16)
-
-#define	MIPS_CONFIG_DC_MASK	0x000001c0	/* Primary D-cache size */
-#define	MIPS_CONFIG_DC_SHIFT	6
-#define	MIPS_CONFIG_IC_MASK	0x00000e00	/* Primary I-cache size */
-#define	MIPS_CONFIG_IC_SHIFT	9
-#define	MIPS_CONFIG_C_DEFBASE	0x1000		/* default base 2^12 */
-
-/* Cache size mode indication: available only on Vr41xx CPUs */
-#define	MIPS_CONFIG_CS		0x00001000
-#define	MIPS_CONFIG_C_4100BASE	0x0400		/* base is 2^10 if CS=1 */
-#define	MIPS_CONFIG_CACHE_SIZE(config, mask, base, shift) \
-	((base) << (((config) & (mask)) >> (shift)))
-
-/* External cache enable: Controls L2 for R5000/Rm527x and L3 for Rm7000 */
-#define	MIPS_CONFIG_SE		0x00001000
-
-/* Block ordering: 0: sequential, 1: sub-block */
-#define	MIPS_CONFIG_EB		0x00002000
-
-/* ECC mode - 0: ECC mode, 1: parity mode */
-#define	MIPS_CONFIG_EM		0x00004000
-
-/* BigEndianMem - 0: kernel and memory are little endian, 1: big endian */
-#define	MIPS_CONFIG_BE		0x00008000
-
-/* Dirty Shared coherency state - 0: enabled, 1: disabled */
-#define	MIPS_CONFIG_SM		0x00010000
-
-/* Secondary Cache - 0: present, 1: not present */
-#define	MIPS_CONFIG_SC		0x00020000
-
-/* System Port width - 0: 64-bit, 1: 32-bit (QED RM523x), 2,3: reserved */
-#define	MIPS_CONFIG_EW_MASK	0x000c0000
-#define	MIPS_CONFIG_EW_SHIFT	18
-
-/* Secondary Cache port width - 0: 128-bit data path to S-cache, 1: reserved */
-#define	MIPS_CONFIG_SW		0x00100000
-
-/* Split Secondary Cache Mode - 0: I/D mixed, 1: I/D separated by SCAddr(17) */
-#define	MIPS_CONFIG_SS		0x00200000
-
-/* Secondary Cache line size */
-#define	MIPS_CONFIG_SB_MASK	0x00c00000
-#define	MIPS_CONFIG_SB_SHIFT	22
-#define	MIPS_CONFIG_CACHE_L2_LSIZE(config) \
-	(0x10 << (((config) & MIPS_CONFIG_SB_MASK) >> MIPS_CONFIG_SB_SHIFT))
-
-/* Write back data rate */
-#define	MIPS_CONFIG_EP_MASK	0x0f000000
-#define	MIPS_CONFIG_EP_SHIFT	24
-
-/* System clock ratio - this value is CPU dependent */
-#define	MIPS_CONFIG_EC_MASK	0x70000000
-#define	MIPS_CONFIG_EC_SHIFT	28
-
-/* Master-Checker Mode - 1: enabled */
-#define	MIPS_CONFIG_CM		0x80000000
-
-/*
- * The bits in the MIPS4 config register.
- */
-
-/*
- * Location of exception vectors.
- *
- * Common vectors:  reset and UTLB miss.
- */
-#define	MIPS_RESET_EXC_VEC	((intptr_t)(int32_t)0xBFC00000)
-#define	MIPS_UTLB_MISS_EXC_VEC	((intptr_t)(int32_t)0x80000000)
-
-/*
- * MIPS-III exception vectors
- */
-#define	MIPS_XTLB_MISS_EXC_VEC ((intptr_t)(int32_t)0x80000080)
-#define	MIPS_CACHE_ERR_EXC_VEC ((intptr_t)(int32_t)0x80000100)
-#define	MIPS_GEN_EXC_VEC	((intptr_t)(int32_t)0x80000180)
-
-/*
- * MIPS32/MIPS64 (and some MIPS3) dedicated interrupt vector.
- */
-#define	MIPS_INTR_EXC_VEC	0x80000200
-
-/*
- * Coprocessor 0 registers:
- *
- *				v--- width for mips I,III,32,64
- *				     (3=32bit, 6=64bit, i=impl dep)
- *  0	MIPS_COP_0_TLB_INDEX	3333 TLB Index.
- *  1	MIPS_COP_0_TLB_RANDOM	3333 TLB Random.
- *  2	MIPS_COP_0_TLB_LO0	.636 r4k TLB entry low.
- *  3	MIPS_COP_0_TLB_LO1	.636 r4k TLB entry low, extended.
- *  4	MIPS_COP_0_TLB_CONTEXT	3636 TLB Context.
- *  4/2	MIPS_COP_0_USERLOCAL	..36 UserLocal.
- *  5	MIPS_COP_0_TLB_PG_MASK	.333 TLB Page Mask register.
- *  6	MIPS_COP_0_TLB_WIRED	.333 Wired TLB number.
- *  7	MIPS_COP_0_HWRENA	..33 rdHWR Enable.
- *  8	MIPS_COP_0_BAD_VADDR	3636 Bad virtual address.
- *  9	MIPS_COP_0_COUNT	.333 Count register.
- * 10	MIPS_COP_0_TLB_HI	3636 TLB entry high.
- * 11	MIPS_COP_0_COMPARE	.333 Compare (against Count).
- * 12	MIPS_COP_0_STATUS	3333 Status register.
- * 12/1	MIPS_COP_0_INTCTL	..33 Interrupt setup (MIPS32/64 r2).
- * 13	MIPS_COP_0_CAUSE	3333 Exception cause register.
- * 14	MIPS_COP_0_EXC_PC	3636 Exception PC.
- * 15	MIPS_COP_0_PRID		3333 Processor revision identifier.
- * 16	MIPS_COP_0_CONFIG	3333 Configuration register.
- * 16/1	MIPS_COP_0_CONFIG1	..33 Configuration register 1.
- * 16/2	MIPS_COP_0_CONFIG2	..33 Configuration register 2.
- * 16/3	MIPS_COP_0_CONFIG3	..33 Configuration register 3.
- * 16/4 MIPS_COP_0_CONFIG4	..33 Configuration register 4.
- * 17	MIPS_COP_0_LLADDR	.336 Load Linked Address.
- * 18	MIPS_COP_0_WATCH_LO	.336 WatchLo register.
- * 19	MIPS_COP_0_WATCH_HI	.333 WatchHi register.
- * 20	MIPS_COP_0_TLB_XCONTEXT .6.6 TLB XContext register.
- * 23	MIPS_COP_0_DEBUG	.... Debug JTAG register.
- * 24	MIPS_COP_0_DEPC		.... DEPC JTAG register.
- * 25	MIPS_COP_0_PERFCNT	..36 Performance Counter register.
- * 26	MIPS_COP_0_ECC		.3ii ECC / Error Control register.
- * 27	MIPS_COP_0_CACHE_ERR	.3ii Cache Error register.
- * 28/0	MIPS_COP_0_TAG_LO	.3ii Cache TagLo register (instr).
- * 28/1	MIPS_COP_0_DATA_LO	..ii Cache DataLo register (instr).
- * 28/2	MIPS_COP_0_TAG_LO	..ii Cache TagLo register (data).
- * 28/3	MIPS_COP_0_DATA_LO	..ii Cache DataLo register (data).
- * 29/0	MIPS_COP_0_TAG_HI	.3ii Cache TagHi register (instr).
- * 29/1	MIPS_COP_0_DATA_HI	..ii Cache DataHi register (instr).
- * 29/2	MIPS_COP_0_TAG_HI	..ii Cache TagHi register (data).
- * 29/3	MIPS_COP_0_DATA_HI	..ii Cache DataHi register (data).
- * 30	MIPS_COP_0_ERROR_PC	.636 Error EPC register.
- * 31	MIPS_COP_0_DESAVE	.... DESAVE JTAG register.
- */
-
-/* Deal with inclusion from an assembly file. */
-#if defined(_LOCORE) || defined(LOCORE)
-#define	_(n)	$n
-#else
-#define	_(n)	n
-#endif
-
-#define	MIPS_COP_0_TLB_INDEX	_(0)
-#define	MIPS_COP_0_TLB_RANDOM	_(1)
-	/* Name and meaning of	TLB bits for $2 differ on r3k and r4k. */
-
-#define	MIPS_COP_0_TLB_CONTEXT	_(4)
-					/* $5 and $6 new with MIPS-III */
-#define	MIPS_COP_0_BAD_VADDR	_(8)
-#define	MIPS_COP_0_TLB_HI	_(10)
-#define	MIPS_COP_0_STATUS	_(12)
-#define	MIPS_COP_0_CAUSE	_(13)
-#define	MIPS_COP_0_EXC_PC	_(14)
-#define	MIPS_COP_0_PRID		_(15)
-
-/* MIPS-III */
-#define	MIPS_COP_0_TLB_LO0	_(2)
-#define	MIPS_COP_0_TLB_LO1	_(3)
-
-#define	MIPS_COP_0_TLB_PG_MASK	_(5)
-#define	MIPS_COP_0_TLB_WIRED	_(6)
-
-#define	MIPS_COP_0_COUNT	_(9)
-#define	MIPS_COP_0_COMPARE	_(11)
-#ifdef CPU_XBURST
-#define	MIPS_COP_0_XBURST_C12	_(12)
-#endif
-#define	MIPS_COP_0_CONFIG	_(16)
-#define	MIPS_COP_0_LLADDR	_(17)
-#define	MIPS_COP_0_WATCH_LO	_(18)
-#define	MIPS_COP_0_WATCH_HI	_(19)
-#define	MIPS_COP_0_TLB_XCONTEXT _(20)
-#ifdef CPU_XBURST
-#define	MIPS_COP_0_XBURST_MBOX	_(20)
-#endif
-
-#define	MIPS_COP_0_ECC		_(26)
-#define	MIPS_COP_0_CACHE_ERR	_(27)
-#define	MIPS_COP_0_TAG_LO	_(28)
-#define	MIPS_COP_0_TAG_HI	_(29)
-#define	MIPS_COP_0_ERROR_PC	_(30)
-
-/* MIPS32/64 */
-#define	MIPS_COP_0_USERLOCAL	_(4)	/* sel 2 is userlevel register */
-#define	MIPS_COP_0_HWRENA	_(7)
-#define	MIPS_COP_0_INTCTL	_(12)
-#define	MIPS_COP_0_DEBUG	_(23)
-#define	MIPS_COP_0_DEPC		_(24)
-#define	MIPS_COP_0_PERFCNT	_(25)
-#define	MIPS_COP_0_DATA_LO	_(28)
-#define	MIPS_COP_0_DATA_HI	_(29)
-#define	MIPS_COP_0_DESAVE	_(31)
-
-/* MIPS32 Config register definitions */
-#define MIPS_MMU_NONE			0x00		/* No MMU present */
-#define MIPS_MMU_TLB			0x01		/* Standard TLB */
-#define MIPS_MMU_BAT			0x02		/* Standard BAT */
-#define MIPS_MMU_FIXED			0x03		/* Standard fixed mapping */
-
-/*
- * IntCtl Register Fields
- */
-#define	MIPS_INTCTL_IPTI_MASK	0xE0000000	/* bits 31..29 timer intr # */
-#define	MIPS_INTCTL_IPTI_SHIFT	29
-#define	MIPS_INTCTL_IPPCI_MASK	0x1C000000	/* bits 26..29 perf counter intr # */
-#define	MIPS_INTCTL_IPPCI_SHIFT	26
-#define	MIPS_INTCTL_VS_MASK	0x000001F0	/* bits 5..9 vector spacing */
-#define	MIPS_INTCTL_VS_SHIFT	4
-
-/*
- * Config Register Fields
- * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.39)
- */
-#define	MIPS_CONFIG0_M		0x80000000 	/* Flag: Config1 is present. */
-#define	MIPS_CONFIG0_MT_MASK	0x00000380	/* bits 9..7 MMU Type */
-#define	MIPS_CONFIG0_MT_SHIFT	7
-#define	MIPS_CONFIG0_BE		0x00008000	/* data is big-endian */
-#define	MIPS_CONFIG0_VI		0x00000008	/* inst cache is virtual */
-
-/*
- * Config1 Register Fields
- * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9-1)
- */
-#define	MIPS_CONFIG1_M		0x80000000	/* Flag: Config2 is present. */
-#define MIPS_CONFIG1_TLBSZ_MASK		0x7E000000	/* bits 30..25 # tlb entries minus one */
-#define MIPS_CONFIG1_TLBSZ_SHIFT	25
-
-#define MIPS_CONFIG1_IS_MASK		0x01C00000	/* bits 24..22 icache sets per way */
-#define MIPS_CONFIG1_IS_SHIFT		22
-#define MIPS_CONFIG1_IL_MASK		0x00380000	/* bits 21..19 icache line size */
-#define MIPS_CONFIG1_IL_SHIFT		19
-#define MIPS_CONFIG1_IA_MASK		0x00070000	/* bits 18..16 icache associativity */
-#define MIPS_CONFIG1_IA_SHIFT		16
-#define MIPS_CONFIG1_DS_MASK		0x0000E000	/* bits 15..13 dcache sets per way */
-#define MIPS_CONFIG1_DS_SHIFT		13
-#define MIPS_CONFIG1_DL_MASK		0x00001C00	/* bits 12..10 dcache line size */
-#define MIPS_CONFIG1_DL_SHIFT		10
-#define MIPS_CONFIG1_DA_MASK		0x00000380	/* bits  9.. 7 dcache associativity */
-#define MIPS_CONFIG1_DA_SHIFT		7
-#define MIPS_CONFIG1_LOWBITS		0x0000007F
-#define MIPS_CONFIG1_C2			0x00000040	/* Coprocessor 2 implemented */
-#define MIPS_CONFIG1_MD			0x00000020	/* MDMX ASE implemented (MIPS64) */
-#define MIPS_CONFIG1_PC			0x00000010	/* Performance counters implemented */
-#define MIPS_CONFIG1_WR			0x00000008	/* Watch registers implemented */
-#define MIPS_CONFIG1_CA			0x00000004	/* MIPS16e ISA implemented */
-#define MIPS_CONFIG1_EP			0x00000002	/* EJTAG implemented */
-#define MIPS_CONFIG1_FP			0x00000001	/* FPU implemented */
-
-#define MIPS_CONFIG2_SA_SHIFT		0		/* Secondary cache associativity */
-#define MIPS_CONFIG2_SA_MASK		0xf
-#define MIPS_CONFIG2_SL_SHIFT		4		/* Secondary cache line size */
-#define MIPS_CONFIG2_SL_MASK		0xf
-#define MIPS_CONFIG2_SS_SHIFT		8		/* Secondary cache sets per way */
-#define MIPS_CONFIG2_SS_MASK		0xf
-
-#define MIPS_CONFIG3_CMGCR_MASK		(1 << 29)	/* Coherence manager present */
-
-/*
- * Config2 Register Fields
- * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.40)
- */
-#define	MIPS_CONFIG2_M		0x80000000	/* Flag: Config3 is present. */
-
-/*
- * Config3 Register Fields
- * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.41)
- */
-#define	MIPS_CONFIG3_M		0x80000000	/* Flag: Config4 is present */
-#define	MIPS_CONFIG3_ULR	0x00002000	/* UserLocal reg implemented */
-
-#define MIPS_CONFIG4_MMUSIZEEXT		0x000000FF	/* bits 7.. 0 MMU Size Extension */
-#define MIPS_CONFIG4_MMUEXTDEF		0x0000C000	/* bits 15.14 MMU Extension Definition */
-#define MIPS_CONFIG4_MMUEXTDEF_MMUSIZEEXT	0x00004000 /* This values denotes CONFIG4 bits  */
-
-/*
- * Values for the code field in a break instruction.
- */
-#define	MIPS_BREAK_INSTR	0x0000000d
-#define	MIPS_BREAK_VAL_MASK	0x03ff0000
-#define	MIPS_BREAK_VAL_SHIFT	16
-#define	MIPS_BREAK_KDB_VAL	512
-#define	MIPS_BREAK_SSTEP_VAL	513
-#define	MIPS_BREAK_BRKPT_VAL	514
-#define	MIPS_BREAK_SOVER_VAL	515
-#define	MIPS_BREAK_DDB_VAL	516
-#define	MIPS_BREAK_KDB		(MIPS_BREAK_INSTR | \
-				(MIPS_BREAK_KDB_VAL << MIPS_BREAK_VAL_SHIFT))
-#define	MIPS_BREAK_SSTEP	(MIPS_BREAK_INSTR | \
-				(MIPS_BREAK_SSTEP_VAL << MIPS_BREAK_VAL_SHIFT))
-#define	MIPS_BREAK_BRKPT	(MIPS_BREAK_INSTR | \
-				(MIPS_BREAK_BRKPT_VAL << MIPS_BREAK_VAL_SHIFT))
-#define	MIPS_BREAK_SOVER	(MIPS_BREAK_INSTR | \
-				(MIPS_BREAK_SOVER_VAL << MIPS_BREAK_VAL_SHIFT))
-#define	MIPS_BREAK_DDB		(MIPS_BREAK_INSTR | \
-				(MIPS_BREAK_DDB_VAL << MIPS_BREAK_VAL_SHIFT))
-
-/*
- * Mininum and maximum cache sizes.
- */
-#define	MIPS_MIN_CACHE_SIZE	(16 * 1024)
-#define	MIPS_MAX_CACHE_SIZE	(256 * 1024)
-#define	MIPS_MAX_PCACHE_SIZE	(32 * 1024)	/* max. primary cache size */
-
-/*
- * The floating point version and status registers.
- */
-#define	MIPS_FPU_ID	$0
-#define	MIPS_FPU_CSR	$31
-
-/*
- * The floating point coprocessor status register bits.
- */
-#define	MIPS_FPU_ROUNDING_BITS		0x00000003
-#define	MIPS_FPU_ROUND_RN		0x00000000
-#define	MIPS_FPU_ROUND_RZ		0x00000001
-#define	MIPS_FPU_ROUND_RP		0x00000002
-#define	MIPS_FPU_ROUND_RM		0x00000003
-#define	MIPS_FPU_STICKY_BITS		0x0000007c
-#define	MIPS_FPU_STICKY_INEXACT		0x00000004
-#define	MIPS_FPU_STICKY_UNDERFLOW	0x00000008
-#define	MIPS_FPU_STICKY_OVERFLOW	0x00000010
-#define	MIPS_FPU_STICKY_DIV0		0x00000020
-#define	MIPS_FPU_STICKY_INVALID		0x00000040
-#define	MIPS_FPU_ENABLE_BITS		0x00000f80
-#define	MIPS_FPU_ENABLE_INEXACT		0x00000080
-#define	MIPS_FPU_ENABLE_UNDERFLOW	0x00000100
-#define	MIPS_FPU_ENABLE_OVERFLOW	0x00000200
-#define	MIPS_FPU_ENABLE_DIV0		0x00000400
-#define	MIPS_FPU_ENABLE_INVALID		0x00000800
-#define	MIPS_FPU_EXCEPTION_BITS		0x0003f000
-#define	MIPS_FPU_EXCEPTION_INEXACT	0x00001000
-#define	MIPS_FPU_EXCEPTION_UNDERFLOW	0x00002000
-#define	MIPS_FPU_EXCEPTION_OVERFLOW	0x00004000
-#define	MIPS_FPU_EXCEPTION_DIV0		0x00008000
-#define	MIPS_FPU_EXCEPTION_INVALID	0x00010000
-#define	MIPS_FPU_EXCEPTION_UNIMPL	0x00020000
-#define	MIPS_FPU_COND_BIT		0x00800000
-#define	MIPS_FPU_FLUSH_BIT		0x01000000	/* r4k,	 MBZ on r3k */
-#define	MIPS_FPC_MBZ_BITS		0xfe7c0000
-
-/*
- * Constants to determine if have a floating point instruction.
- */
-#define	MIPS_OPCODE_SHIFT	26
-#define	MIPS_OPCODE_C1		0x11
-
-/* Coherence manager constants */
-#define	MIPS_CMGCRB_BASE	11
-#define	MIPS_CMGCRF_BASE	(~((1 << MIPS_CMGCRB_BASE) - 1))
-
-/*
- * Bits defined for for the HWREna (CP0 register 7, select 0).
- */
-#define	MIPS_HWRENA_CPUNUM	(1<<0)	/* CPU number program is running on */
-#define	MIPS_HWRENA_SYNCI_STEP 	(1<<1)	/* Address step sized used with SYNCI */
-#define	MIPS_HWRENA_CC		(1<<2)	/* Hi Res cycle counter */
-#define	MIPS_HWRENA_CCRES	(1<<3)	/* Cycle counter resolution */
-#define	MIPS_HWRENA_UL		(1<<29)	/* UserLocal Register */
-#define	MIPS_HWRENA_IMPL30	(1<<30)	/* Implementation-dependent 30 */
-#define	MIPS_HWRENA_IMPL31	(1<<31)	/* Implementation-dependent 31 */
-
-#endif /* _MIPS_CPUREGS_H_ */
diff --git a/sys/mips/include/db_machdep.h b/sys/mips/include/db_machdep.h
deleted file mode 100644
index 26e34c5ad12f..000000000000
--- a/sys/mips/include/db_machdep.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*	$OpenBSD: db_machdep.h,v 1.2 1998/09/15 10:50:12 pefo Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1998 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed under OpenBSD by
- *	Per Fogelstrom, Opsycon AB, Sweden.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: db_machdep.h,v 1.7 2006/10/16 12:30:34 katta
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_DB_MACHDEP_H_
-#define	_MIPS_DB_MACHDEP_H_
-
-#include <machine/frame.h>
-#include <machine/trap.h>
-
-typedef struct trapframe db_regs_t;
-extern db_regs_t	ddb_regs;	/* register state */
-
-typedef	vm_offset_t	db_addr_t;	/* address - unsigned */
-typedef	register_t	db_expr_t;	/* expression - signed */
-
-#define	SOFTWARE_SSTEP		/* Need software single step */
-#define	SOFTWARE_SSTEP_EMUL	/* next_instr_address() emulates 100% */
-db_addr_t	next_instr_address(db_addr_t, boolean_t);
-#define	BKPT_SIZE			(4)
-#define	BKPT_SET(ins)			(MIPS_BREAK_DDB)
-#define	DB_VALID_BREAKPOINT(addr)	(((addr) & 3) == 0)
-
-#define	IS_BREAKPOINT_TRAP(type, code)	((type) == T_BREAK)
-#define	IS_WATCHPOINT_TRAP(type, code)	(0)	/* XXX mips3 watchpoint */
-
-#define	PC_REGS()	((db_addr_t)kdb_thrctx->pcb_regs.pc)
-#define	BKPT_SKIP					\
-	do {							\
-		if((db_get_value(kdb_frame->pc, sizeof(int), FALSE) &	\
-		    ~MIPS_BREAK_VAL_MASK) == MIPS_BREAK_INSTR) {	\
-			kdb_frame->pc += BKPT_SIZE;			\
-			kdb_thrctx->pcb_regs.pc +=  BKPT_SIZE;		\
-		}							\
-	} while (0);
-
-/*
- *  Test of instructions to see class.
- */
-#define	IT_CALL		0x01
-#define	IT_BRANCH	0x02
-#define	IT_LOAD		0x03
-#define	IT_STORE	0x04
-
-#define	inst_branch(i)		(db_inst_type(i) == IT_BRANCH)
-#define	inst_trap_return(i)	((i) & 0)
-#define	inst_call(i)		(db_inst_type(i) == IT_CALL)
-#define	inst_return(i)		((i) == 0x03e00008)
-#define	inst_load(i)		(db_inst_type(i) == IT_LOAD)
-#define	inst_store(i)		(db_inst_type(i) == IT_STORE)
-
-int db_inst_type(int);
-db_addr_t branch_taken(int inst, db_addr_t pc);
-int32_t kdbpeek(int *);
-int64_t kdbpeekd(int *);
-
-#endif	/* !_MIPS_DB_MACHDEP_H_ */
diff --git a/sys/mips/include/dump.h b/sys/mips/include/dump.h
deleted file mode 100644
index 4e434861dfcc..000000000000
--- a/sys/mips/include/dump.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*-
- * Copyright (c) 2014 EMC Corp.
- * Author: Conrad Meyer <conrad.meyer@isilon.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_DUMP_H_
-#define	_MACHINE_DUMP_H_
-
-#define	KERNELDUMP_ARCH_VERSION	KERNELDUMP_MIPS_VERSION
-#define	EM_VALUE		EM_MIPS
-/* XXX: I suppose 20 should be enough. */
-#define	DUMPSYS_MD_PA_NPAIRS	20
-#define	DUMPSYS_NUM_AUX_HDRS	0
-
-/* How often to check the dump progress bar? */
-#define	DUMPSYS_PB_CHECK_BITS	22	/* Every 4MB */
-
-void dumpsys_wbinv_all(void);
-
-static inline void
-dumpsys_pa_init(void)
-{
-
-	dumpsys_gen_pa_init();
-}
-
-static inline struct dump_pa *
-dumpsys_pa_next(struct dump_pa *p)
-{
-
-	return (dumpsys_gen_pa_next(p));
-}
-
-static inline void
-dumpsys_unmap_chunk(vm_paddr_t pa, size_t s, void *va)
-{
-
-	dumpsys_gen_unmap_chunk(pa, s, va);
-}
-
-static inline int
-dumpsys_write_aux_headers(struct dumperinfo *di)
-{
-
-	return (dumpsys_gen_write_aux_headers(di));
-}
-
-static inline int
-dumpsys(struct dumperinfo *di)
-{
-
-	return (dumpsys_generic(di));
-}
-
-#endif  /* !_MACHINE_DUMP_H_ */
diff --git a/sys/mips/include/efi.h b/sys/mips/include/efi.h
deleted file mode 100644
index 8c52da2a6e6c..000000000000
--- a/sys/mips/include/efi.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*-
- * This file is in the public domain since it's just boilerplate.
- *
- * $FreeBSD$
- */
-
-#ifndef __MIPS_INCLUDE_EFI_H_
-#define __MIPS_INCLUDE_EFI_H_
-
-#define	EFIABI_ATTR
-
-/* Note: we don't actually support this on mips */
-
-#endif /* __MIPS_INCLUDE_EFI_H_ */
diff --git a/sys/mips/include/elf.h b/sys/mips/include/elf.h
deleted file mode 100644
index 976dedb29c96..000000000000
--- a/sys/mips/include/elf.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2013 M. Warner Losh <imp@FreeBSD.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*-
- * Copyright (c) 2013 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * See below starting with the line with $NetBSD...$ for code this applies to.
- */
-
-#ifndef	__MIPS_ELF_H
-#define	__MIPS_ELF_H
-
-/* FreeBSD specific bits - derived from FreeBSD specific files and changes to old elf.h */
-
-/*
- * Define __ELF_WORD_SIZE based on the ABI, if not defined yet. This sets
- * the proper defaults when we're not trying to do 32-bit on 64-bit systems.
- * We include both 32 and 64 bit versions so we can support multiple ABIs.
- */
-#ifndef __ELF_WORD_SIZE
-#if defined(__mips_n64)
-#define __ELF_WORD_SIZE 64
-#else
-#define __ELF_WORD_SIZE 32
-#endif
-#endif
-#include <sys/elf32.h>
-#include <sys/elf64.h>
-#include <sys/elf_generic.h>
-
-#define ELF_ARCH	EM_MIPS
-#define ELF_ARCH32	EM_MIPS
-
-#define	ELF_MACHINE_OK(x)	((x) == ELF_ARCH)
-
-/* Define "machine" characteristics */
-#if __ELF_WORD_SIZE == 32
-#define	ELF_TARG_CLASS	ELFCLASS32
-#else
-#define	ELF_TARG_CLASS	ELFCLASS64
-#endif
-#ifdef __MIPSEB__
-#define	ELF_TARG_DATA	ELFDATA2MSB
-#else
-#define ELF_TARG_DATA	ELFDATA2LSB
-#endif
-#define	ELF_TARG_MACH	EM_MIPS
-#define	ELF_TARG_VER	1
-
-/*
- * Auxiliary vector entries for passing information to the interpreter.
- *
- * The i386 supplement to the SVR4 ABI specification names this "auxv_t",
- * but POSIX lays claim to all symbols ending with "_t".
- */
-typedef struct {	/* Auxiliary vector entry on initial stack */
-	int	a_type;			/* Entry type. */
-	union {
-		int	a_val;		/* Integer value. */
-#if defined(__mips_o32) || defined(__mips_n32)
-		void	*a_ptr;		/* Address. */
-		void	(*a_fcn)(void); /* Function pointer (not used). */
-#endif
-	} a_un;
-} Elf32_Auxinfo;
-
-typedef struct {	/* Auxiliary vector entry on initial stack */
-	long	a_type;			/* Entry type. */
-	union {
-		long	a_val;		/* Integer value. */
-		void	*a_ptr;		/* Address. */
-		void	(*a_fcn)(void); /* Function pointer (not used). */
-	} a_un;
-} Elf64_Auxinfo;
-
-__ElfType(Auxinfo);
-
-#define	ET_DYN_LOAD_ADDR 0x0120000
-
-/*
- * Constant to mark start of symtab/strtab saved by trampoline
- */
-#define	SYMTAB_MAGIC	0x64656267
-
-/* from NetBSD's sys/mips/include/elf_machdep.h $NetBSD: elf_machdep.h,v 1.18 2013/05/23 21:39:49 christos Exp $ */
-
-/* mips relocs. */
-
-#define	R_MIPS_NONE		0
-#define	R_MIPS_16		1
-#define	R_MIPS_32		2
-#define	R_MIPS_REL32		3
-#define	R_MIPS_REL		R_MIPS_REL32
-#define	R_MIPS_26		4
-#define	R_MIPS_HI16		5	/* high 16 bits of symbol value */
-#define	R_MIPS_LO16		6	/* low 16 bits of symbol value */
-#define	R_MIPS_GPREL16		7	/* GP-relative reference  */
-#define	R_MIPS_LITERAL		8	/* Reference to literal section  */
-#define	R_MIPS_GOT16		9	/* Reference to global offset table */
-#define	R_MIPS_GOT		R_MIPS_GOT16
-#define	R_MIPS_PC16		10	/* 16 bit PC relative reference */
-#define	R_MIPS_CALL16 		11	/* 16 bit call thru glbl offset tbl */
-#define	R_MIPS_CALL		R_MIPS_CALL16
-#define	R_MIPS_GPREL32		12
-
-/* 13, 14, 15 are not defined at this point. */
-#define	R_MIPS_UNUSED1		13
-#define	R_MIPS_UNUSED2		14
-#define	R_MIPS_UNUSED3		15
-
-/*
- * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
- */
-#define	R_MIPS_SHIFT5		16
-#define	R_MIPS_SHIFT6		17
-
-#define	R_MIPS_64		18
-#define	R_MIPS_GOT_DISP		19
-#define	R_MIPS_GOT_PAGE		20
-#define	R_MIPS_GOT_OFST		21
-#define	R_MIPS_GOT_HI16		22
-#define	R_MIPS_GOT_LO16		23
-#define	R_MIPS_SUB		24
-#define	R_MIPS_INSERT_A		25
-#define	R_MIPS_INSERT_B		26
-#define	R_MIPS_DELETE		27
-#define	R_MIPS_HIGHER		28
-#define	R_MIPS_HIGHEST		29
-#define	R_MIPS_CALL_HI16	30
-#define	R_MIPS_CALL_LO16	31
-#define	R_MIPS_SCN_DISP		32
-#define	R_MIPS_REL16		33
-#define	R_MIPS_ADD_IMMEDIATE	34
-#define	R_MIPS_PJUMP		35
-#define	R_MIPS_RELGOT		36
-#define	R_MIPS_JALR		37
-/* TLS relocations */
-
-#define	R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
-#define	R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
-#define	R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
-#define	R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
-#define	R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
-#define	R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
-#define	R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
-#define	R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
-#define	R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
-#define	R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
-#define	R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
-#define	R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
-#define	R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
-
-#define	R_MIPS_max		51
-
-#define	R_TYPE(name)		__CONCAT(R_MIPS_,name)
-
-#define	R_MIPS16_min		100
-#define	R_MIPS16_26		100
-#define	R_MIPS16_GPREL		101
-#define	R_MIPS16_GOT16		102
-#define	R_MIPS16_CALL16		103
-#define	R_MIPS16_HI16		104
-#define	R_MIPS16_LO16		105
-#define	R_MIPS16_max		106
-
-#define	R_MIPS_COPY		126
-#define	R_MIPS_JUMP_SLOT	127
-
-#endif /* __MIPS_ELF_H */
diff --git a/sys/mips/include/endian.h b/sys/mips/include/endian.h
deleted file mode 100644
index 57f76445a9cd..000000000000
--- a/sys/mips/include/endian.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1987, 1991 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)endian.h	7.8 (Berkeley) 4/3/91
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define	_MACHINE_ENDIAN_H_
-
-#include <sys/cdefs.h>
-#ifndef	__ASSEMBLER__
-#include <sys/_types.h>
-#endif
-#include <sys/_endian.h>
-
-#endif /* !_MACHINE_ENDIAN_H_ */
diff --git a/sys/mips/include/exec.h b/sys/mips/include/exec.h
deleted file mode 100644
index b225c6b867d5..000000000000
--- a/sys/mips/include/exec.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)exec.h	8.1 (Berkeley) 6/11/93
- *	from: src/sys/i386/include/exec.h,v 1.8 1999/08/28 00:44:11 peter
- *	JNPR: exec.h,v 1.3 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_EXEC_H_
-#define	_MACHINE_EXEC_H_
-
-#define	__LDPGSZ	4096
-
-#endif /* !_MACHINE_EXEC_H_ */
diff --git a/sys/mips/include/fdt.h b/sys/mips/include/fdt.h
deleted file mode 100644
index 8da2a0c392f3..000000000000
--- a/sys/mips/include/fdt.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 The FreeBSD Foundation
- *
- * This software was developed by Semihalf under sponsorship from
- * the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_FDT_H_
-#define _MACHINE_FDT_H_
-
-#include <machine/bus.h>
-
-/*
- * Bus space tag. XXX endianess info needs to be derived from the blob.
- */
-#if defined(CPU_RMI) || defined(CPU_NLM)
-#define fdtbus_bs_tag	rmi_uart_bus_space
-#else
-#define fdtbus_bs_tag	mips_bus_space_generic
-#endif
-
-#endif /* _MACHINE_FDT_H_ */
diff --git a/sys/mips/include/float.h b/sys/mips/include/float.h
deleted file mode 100644
index b2974196cce4..000000000000
--- a/sys/mips/include/float.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1989 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)float.h	7.1 (Berkeley) 5/8/90
- *	from: src/sys/i386/include/float.h,v 1.8 1999/08/28 00:44:11 peter
- *	JNPR: float.h,v 1.4 2006/12/02 09:53:41 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_FLOAT_H_
-#define	_MACHINE_FLOAT_H_ 1
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-extern int __flt_rounds(void);
-__END_DECLS
-
-#define	FLT_RADIX	2		/* b */
-#define	FLT_ROUNDS	__flt_rounds() /* FP addition rounds to nearest */
-
-#if __ISO_C_VISIBLE >= 1999
-#define	FLT_EVAL_METHOD	0
-#define	DECIMAL_DIG	17
-#endif
-
-#define	FLT_MANT_DIG	24		/* p */
-#define	FLT_EPSILON	1.19209290E-07F /* b**(1-p) */
-#define	FLT_DIG		6		/* floor((p-1)*log10(b))+(b == 10) */
-#define	FLT_MIN_EXP	(-125)		/* emin */
-#define	FLT_MIN		1.17549435E-38F /* b**(emin-1) */
-#define	FLT_MIN_10_EXP	(-37)		/* ceil(log10(b**(emin-1))) */
-#define	FLT_MAX_EXP	128		/* emax */
-#define	FLT_MAX		3.40282347E+38F /* (1-b**(-p))*b**emax */
-#define	FLT_MAX_10_EXP	38		/* floor(log10((1-b**(-p))*b**emax)) */
-#if __ISO_C_VISIBLE >= 2011
-#define	FLT_TRUE_MIN	1.40129846E-45F	/* b**(emin-p) */
-#define	FLT_DECIMAL_DIG	9		/* ceil(1+p*log10(b)) */
-#define	FLT_HAS_SUBNORM	1
-#endif /* __ISO_C_VISIBLE >= 2011 */
-
-#define	DBL_MANT_DIG	53
-#define	DBL_EPSILON	2.2204460492503131E-16
-#define	DBL_DIG		15
-#define	DBL_MIN_EXP	(-1021)
-#define	DBL_MIN		2.2250738585072014E-308
-#define	DBL_MIN_10_EXP	(-307)
-#define	DBL_MAX_EXP	1024
-#define	DBL_MAX		1.7976931348623157E+308
-#define	DBL_MAX_10_EXP	308
-#if __ISO_C_VISIBLE >= 2011
-#define	DBL_TRUE_MIN	4.9406564584124654E-324
-#define	DBL_DECIMAL_DIG	17
-#define	DBL_HAS_SUBNORM	1
-#endif /* __ISO_C_VISIBLE >= 2011 */
-
-#define	LDBL_MANT_DIG	DBL_MANT_DIG
-#define	LDBL_EPSILON	((long double)DBL_EPSILON)
-#define	LDBL_DIG	DBL_DIG
-#define	LDBL_MIN_EXP	DBL_MIN_EXP
-#define	LDBL_MIN	((long double)DBL_MIN)
-#define	LDBL_MIN_10_EXP DBL_MIN_10_EXP
-#define	LDBL_MAX_EXP	DBL_MAX_EXP
-#define	LDBL_MAX	((long double)DBL_MAX)
-#define	LDBL_MAX_10_EXP DBL_MAX_10_EXP
-#if __ISO_C_VISIBLE >= 2011
-#define	LDBL_TRUE_MIN	((long double)DBL_TRUE_MIN)
-#define	LDBL_DECIMAL_DIG DBL_DECIMAL_DIG
-#define	LDBL_HAS_SUBNORM DBL_HAS_SUBNORM
-#endif /* __ISO_C_VISIBLE >= 2011 */
-
-#endif /* _MACHINE_FLOAT_H_ */
diff --git a/sys/mips/include/floatingpoint.h b/sys/mips/include/floatingpoint.h
deleted file mode 100644
index b7c154743d0c..000000000000
--- a/sys/mips/include/floatingpoint.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1993 Andrew Moore, Talke Studio
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#) floatingpoint.h	1.0 (Berkeley) 9/23/93
- * $FreeBSD$
- */
-
-#ifndef _FLOATINGPOINT_H_
-#define _FLOATINGPOINT_H_
-
-#include <sys/cdefs.h>
-#include <machine/ieeefp.h>
-
-#endif /* !_FLOATINGPOINT_H_ */
diff --git a/sys/mips/include/fls64.h b/sys/mips/include/fls64.h
deleted file mode 100644
index 3a2fa63edc72..000000000000
--- a/sys/mips/include/fls64.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * RMI_BSD */
-#ifndef _MIPS_FLS64_H_
-#define _MIPS_FLS64_H_
-
-/*
- * Find Last Set bit (64 bit)
- */
-static inline int
-fls64(__uint64_t mask)
-{
-	int bit;
-
-	if (mask == 0)
-		return (0);
-	for (bit = 1; ((mask & 0x1ULL) == 0); bit++)
-		mask = mask >> 1;
-	return (bit);
-}
-#endif
diff --git a/sys/mips/include/fpu.h b/sys/mips/include/fpu.h
deleted file mode 100644
index 4bd1924aa518..000000000000
--- a/sys/mips/include/fpu.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*-
- * This file is in the public domain.
- *
- * $FreeBSD$
- */
-#ifndef _MACHINE_FPU_H_
-#define	_MACHINE_FPU_H_
-
-#endif /* !_MACHINE_FPU_H_ */
diff --git a/sys/mips/include/frame.h b/sys/mips/include/frame.h
deleted file mode 100644
index 72cbb8914eaa..000000000000
--- a/sys/mips/include/frame.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*	$OpenBSD: frame.h,v 1.3 1998/09/15 10:50:12 pefo Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1998 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed under OpenBSD by
- *	Per Fogelstrom, Opsycon AB, Sweden.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: frame.h,v 1.6.2.1 2007/09/10 08:14:57 girish
- * $FreeBSD$
- *
- */
-#ifndef _MACHINE_FRAME_H_
-#define	_MACHINE_FRAME_H_
-
-/* Note: This must also match regnum.h and regdef.h */
-
-struct trapframe {
-	register_t	zero;
-	register_t	ast;
-	register_t	v0;
-	register_t	v1;
-	register_t	a0;
-	register_t	a1;
-	register_t	a2;
-	register_t	a3;
-#if defined(__mips_n32) || defined(__mips_n64)
-	register_t	a4;
-	register_t	a5;
-	register_t	a6;
-	register_t	a7;
-	register_t	t0;
-	register_t	t1;
-	register_t	t2;
-	register_t	t3;
-#else
-	register_t	t0;
-	register_t	t1;
-	register_t	t2;
-	register_t	t3;
-	register_t	t4;
-	register_t	t5;
-	register_t	t6;
-	register_t	t7;
-#endif
-	register_t	s0;
-	register_t	s1;
-	register_t	s2;
-	register_t	s3;
-	register_t	s4;
-	register_t	s5;
-	register_t	s6;
-	register_t	s7;
-	register_t	t8;
-	register_t	t9;
-	register_t	k0;
-	register_t	k1;
-	register_t	gp;
-	register_t	sp;
-	register_t	s8;
-	register_t	ra;
-	register_t	sr;
-	register_t	mullo;
-	register_t	mulhi;
-	register_t	badvaddr;
-	register_t	cause;
-	register_t	pc;
-	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Include any other registers which are CPU-Specific and
-	 * need to be part of the frame here.
-	 * 
-	 * Also, be sure this matches what is defined in regnum.h
-	 */
-	register_t	ic;	/* RM7k and RM9k specific */
-	register_t	dummy;	/* Alignment for 32-bit case */
-
-/* From here and on, only saved user processes. */
-
-	f_register_t	f0;
-	f_register_t	f1;
-	f_register_t	f2;
-	f_register_t	f3;
-	f_register_t	f4;
-	f_register_t	f5;
-	f_register_t	f6;
-	f_register_t	f7;
-	f_register_t	f8;
-	f_register_t	f9;
-	f_register_t	f10;
-	f_register_t	f11;
-	f_register_t	f12;
-	f_register_t	f13;
-	f_register_t	f14;
-	f_register_t	f15;
-	f_register_t	f16;
-	f_register_t	f17;
-	f_register_t	f18;
-	f_register_t	f19;
-	f_register_t	f20;
-	f_register_t	f21;
-	f_register_t	f22;
-	f_register_t	f23;
-	f_register_t	f24;
-	f_register_t	f25;
-	f_register_t	f26;
-	f_register_t	f27;
-	f_register_t	f28;
-	f_register_t	f29;
-	f_register_t	f30;
-	f_register_t	f31;
-	register_t	fsr;
-        register_t	fir;
-};
-
-#endif	/* !_MACHINE_FRAME_H_ */
diff --git a/sys/mips/include/gdb_machdep.h b/sys/mips/include/gdb_machdep.h
deleted file mode 100644
index e8ff620edc88..000000000000
--- a/sys/mips/include/gdb_machdep.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/gdb_machdep.h,v 1.3 2005/01/05 20:05:50 imp
- *	JNPR: gdb_machdep.h,v 1.1 2007/08/09 12:25:25 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_GDB_MACHDEP_H_
-#define	_MACHINE_GDB_MACHDEP_H_
-
-#define	GDB_BUFSZ	600
-#define	GDB_NREGS	90
-#define	GDB_REG_PC	37
-
-static __inline size_t
-gdb_cpu_regsz(int regnum)
-{
-
-	return (sizeof(long));
-}
-
-static __inline int
-gdb_cpu_query(void)
-{
-
-	return (0);
-}
-
-static __inline void *
-gdb_begin_write(void)
-{
-
-	return (NULL);
-}
-
-static __inline void
-gdb_end_write(void *arg __unused)
-{
-
-}
-
-static __inline void
-gdb_cpu_stop_reason(int type __unused, int code __unused)
-{
-
-}
-
-void *gdb_cpu_getreg(int, size_t *);
-void gdb_cpu_setreg(int, void *);
-int gdb_cpu_signal(int, int);
-
-#endif /* !_MACHINE_GDB_MACHDEP_H_ */
diff --git a/sys/mips/include/hwfunc.h b/sys/mips/include/hwfunc.h
deleted file mode 100644
index 6d2112362fde..000000000000
--- a/sys/mips/include/hwfunc.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2004 Juli Mallett.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_HWFUNC_H_
-#define	_MACHINE_HWFUNC_H_
-
-#include <sys/_cpuset.h>
-
-struct timecounter;
-
-/*
- * Hooks downward into platform functionality.
- */
-void platform_reset(void);
-void platform_start(__register_t, __register_t,  __register_t, __register_t);
-
-/* For clocks and ticks and such */
-void platform_initclocks(void);
-uint64_t platform_get_frequency(void);
-unsigned platform_get_timecount(struct timecounter *);
-
-/* For hardware specific CPU initialization */
-void platform_cpu_init(void);
-
-#ifdef SMP
-
-/*
- * Spin up the AP so that it starts executing MP bootstrap entry point: mpentry
- *
- * Returns 0 on sucess and non-zero on failure.
- */
-int platform_start_ap(int processor_id);
-
-/*
- * Platform-specific initialization that needs to be done when an AP starts
- * running. This function is called from the MP bootstrap code in mpboot.S
- */
-void platform_init_ap(int processor_id);
-
-/*
- * Return a plaform-specific interrrupt number that is used to deliver IPIs.
- *
- * This hardware interrupt is used to deliver IPIs exclusively and must
- * not be used for any other interrupt source.
- */
-int platform_ipi_hardintr_num(void);
-int platform_ipi_softintr_num(void);
-
-#ifdef PLATFORM_INIT_SECONDARY
-/*
- * Set up IPIs for this CPU.
- */
-void platform_init_secondary(int cpuid);
-#endif
-
-/*
- * Trigger a IPI interrupt on 'cpuid'.
- */
-void platform_ipi_send(int cpuid);
-
-/*
- * Quiesce the IPI interrupt source on the current cpu.
- */
-void platform_ipi_clear(void);
-
-/*
- * Return the processor id.
- *
- * Note that this function is called in early boot when stack is not available.
- */
-extern int platform_processor_id(void);
-
-/*
- * Return the cpumask of available processors.
- */
-extern void platform_cpu_mask(cpuset_t *mask);
-
-/*
- * Return the topology of processors on this platform
- */
-struct cpu_group *platform_smp_topo(void);
-
-#endif	/* SMP */
-
-#endif /* !_MACHINE_HWFUNC_H_ */
diff --git a/sys/mips/include/ieee.h b/sys/mips/include/ieee.h
deleted file mode 100644
index 02c5aafd7ec1..000000000000
--- a/sys/mips/include/ieee.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*	$NetBSD: ieee754.h,v 1.4 2003/10/27 02:30:26 simonb Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
- *
- * $FreeBSD$
- *
- */
-
-/*
- * NOTICE: This is not a standalone file.  To use it, #include it in
- * your port's ieee.h header.
- */
-
-#include <machine/endian.h>
-
-/*
- * <sys/ieee754.h> defines the layout of IEEE 754 floating point types.
- * Only single-precision and double-precision types are defined here;
- * extended types, if available, are defined in the machine-dependent
- * header.
- */
-
-/*
- * Define the number of bits in each fraction and exponent.
- *
- *		     k	         k+1
- * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
- *
- *					  (-exp_bias+1)
- * as fractions that look like 0.fffff x 2             .  This means that
- *
- *			 -126
- * the number 0.10000 x 2    , for instance, is the same as the normalized
- *
- *		-127			   -128
- * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
- *
- *				  -129
- * in the fraction; to represent 2    , we need two, and so on.  This
- *
- *						     (-exp_bias-fracbits+1)
- * implies that the smallest denormalized number is 2
- *
- * for whichever format we are talking about: for single precision, for
- *
- *						-126		-149
- * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
- *
- * -149 == -127 - 23 + 1.
- */
-#define	SNG_EXPBITS	8
-#define	SNG_FRACBITS	23
-
-#define	DBL_EXPBITS	11
-#define	DBL_FRACBITS	52
-
-struct ieee_single {
-#if _BYTE_ORDER == _BIG_ENDIAN
-	u_int	sng_sign:1;
-	u_int	sng_exp:8;
-	u_int	sng_frac:23;
-#else
-	u_int	sng_frac:23;
-	u_int	sng_exp:8;
-	u_int	sng_sign:1;
-#endif
-};
-
-struct ieee_double {
-#if _BYTE_ORDER == _BIG_ENDIAN
-	u_int	dbl_sign:1;
-	u_int	dbl_exp:11;
-	u_int	dbl_frach:20;
-	u_int	dbl_fracl;
-#else
-	u_int	dbl_fracl;
-	u_int	dbl_frach:20;
-	u_int	dbl_exp:11;
-	u_int	dbl_sign:1;
-#endif
-};
-
-/*
- * Floats whose exponent is in [1..INFNAN) (of whatever type) are
- * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
- * Floats whose exponent is zero are either zero (iff all fraction
- * bits are zero) or subnormal values.
- *
- * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
- * high fraction; if the bit is set, it is a `quiet NaN'.
- */
-#define	SNG_EXP_INFNAN	255
-#define	DBL_EXP_INFNAN	2047
-
-#if 0
-#define	SNG_QUIETNAN	(1 << 22)
-#define	DBL_QUIETNAN	(1 << 19)
-#endif
-
-/*
- * Exponent biases.
- */
-#define	SNG_EXP_BIAS	127
-#define	DBL_EXP_BIAS	1023
-
-/*
- * Convenience data structures.
- */
-union ieee_single_u {
-	float			sngu_f;
-	struct ieee_single	sngu_sng;
-};
-
-union ieee_double_u {
-	double			dblu_d;
-	struct ieee_double	dblu_dbl;
-};
diff --git a/sys/mips/include/ieeefp.h b/sys/mips/include/ieeefp.h
deleted file mode 100644
index fb6c21a47c43..000000000000
--- a/sys/mips/include/ieeefp.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*	$OpenBSD: ieeefp.h,v 1.2 1999/01/27 04:46:05 imp Exp $	*/
-
-/*-
- * Written by J.T. Conklin, Apr 11, 1995
- * Public domain.
- *
- *	JNPR: ieeefp.h,v 1.1 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_IEEEFP_H_
-#define	_MACHINE_IEEEFP_H_
-
-/* Deprecated historical FPU control interface */
-
-typedef int fp_except;
-typedef int fp_except_t;
-
-#define	FP_X_IMP	0x01	/* imprecise (loss of precision) */
-#define	FP_X_UFL	0x02	/* underflow exception */
-#define	FP_X_OFL	0x04	/* overflow exception */
-#define	FP_X_DZ		0x08	/* divide-by-zero exception */
-#define	FP_X_INV	0x10	/* invalid operation exception */
-
-typedef enum {
-	FP_RN=0,		/* round to nearest representable number */
-	FP_RZ=1,		/* round to zero (truncate) */
-	FP_RP=2,		/* round toward positive infinity */
-	FP_RM=3			/* round toward negative infinity */
-} fp_rnd;
-
-typedef fp_rnd fp_rnd_t;
-
-#endif /* !_MACHINE_IEEEFP_H_ */
diff --git a/sys/mips/include/in_cksum.h b/sys/mips/include/in_cksum.h
deleted file mode 100644
index 580fb9c024f8..000000000000
--- a/sys/mips/include/in_cksum.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from tahoe:	in_cksum.c	1.2	86/01/05
- *	from:		@(#)in_cksum.c	1.3 (Berkeley) 1/19/91
- *	from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
- *	from: src/sys/alpha/include/in_cksum.h,v 1.7 2005/03/02 21:33:20 joerg
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_IN_CKSUM_H_
-#define	_MACHINE_IN_CKSUM_H_	1
-
-#include <sys/cdefs.h>
-
-#define	in_cksum(m, len)	in_cksum_skip(m, len, 0)
-
-#ifdef _KERNEL
-#if defined(IPVERSION) && (IPVERSION == 4)
-u_int in_cksum_hdr(const struct ip *ip);
-#endif
-u_short in_addword(u_short sum, u_short b);
-u_short in_pseudo(u_int sum, u_int b, u_int c);
-u_short in_cksum_skip(struct mbuf *m, int len, int skip);
-#endif
-
-#endif /* _MACHINE_IN_CKSUM_H_ */
diff --git a/sys/mips/include/intr.h b/sys/mips/include/intr.h
deleted file mode 100644
index 52126d14c8d1..000000000000
--- a/sys/mips/include/intr.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/* 	$NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $	*/
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Mark Brinicombe
- *	for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- *    endorse or promote products derived from this software without specific
- *    prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _MACHINE_INTR_H_
-#define _MACHINE_INTR_H_
-
-#ifdef INTRNG
-
-#ifdef FDT
-#include <dev/ofw/openfirm.h>
-#endif
-
-#include <sys/intr.h>
-
-#ifndef	MIPS_NIRQ
-#define	MIPS_NIRQ		128
-#endif
-
-#ifndef	NIRQ
-#define	NIRQ			MIPS_NIRQ
-#endif
-
-#ifndef FDT
-#define	MIPS_PIC_XREF		1	/**< unique xref */
-#endif
-
-#define NHARD_IRQS		6
-#define NSOFT_IRQS		2
-#define NREAL_IRQS		(NHARD_IRQS + NSOFT_IRQS)
-
-#define INTR_IRQ_NSPC_SWI	4
-
-/* MIPS32 PIC APIs */
-int mips_pic_map_fixed_intrs(void);
-int mips_pic_activate_intr(device_t child, struct resource *r);
-int mips_pic_deactivate_intr(device_t child, struct resource *r);
-
-/* MIPS compatibility for legacy mips code */
-void cpu_init_interrupts(void);
-void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *,
-    void *, int, int, void **);
-void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*),
-    void *, int, int, void **);
-/* MIPS interrupt C entry point */
-void cpu_intr(struct trapframe *);
-
-#endif /* INTRNG */
-
-#endif	/* _MACHINE_INTR_H */
diff --git a/sys/mips/include/intr_machdep.h b/sys/mips/include/intr_machdep.h
deleted file mode 100644
index 4dcc8818cd12..000000000000
--- a/sys/mips/include/intr_machdep.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_INTR_MACHDEP_H_
-#define	_MACHINE_INTR_MACHDEP_H_
-
-#include <sys/vmmeter.h>
-#include <machine/atomic.h>
-
-#if defined(CPU_RMI) || defined(CPU_NLM)
-#define XLR_MAX_INTR 64
-#else
-#define NHARD_IRQS	6
-#define NSOFT_IRQS	2
-#endif
-
-struct trapframe;
-
-void cpu_init_interrupts(void);
-void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *,
-    void *, int, int, void **);
-void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*),
-    void *, int, int, void **);
-void cpu_intr(struct trapframe *);
-
-/*
- * Allow a platform to override the default hard interrupt mask and unmask
- * functions. The 'arg' can be cast safely to an 'int' and holds the mips
- * hard interrupt number to mask or unmask.
- */
-typedef void (*cpu_intr_mask_t)(void *arg);
-typedef void (*cpu_intr_unmask_t)(void *arg);
-void cpu_set_hardintr_mask_func(cpu_intr_mask_t func);
-void cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func);
-
-/*
- * Opaque datatype that represents intr counter
- */
-typedef unsigned long* mips_intrcnt_t;
-
-mips_intrcnt_t mips_intrcnt_create(const char *);
-void mips_intrcnt_setname(mips_intrcnt_t, const char *);
-
-static __inline void
-mips_intrcnt_inc(mips_intrcnt_t counter)
-{
-	if (counter)
-		atomic_add_long(counter, 1);
-	VM_CNT_INC(v_intr);
-}
-#endif /* !_MACHINE_INTR_MACHDEP_H_ */
diff --git a/sys/mips/include/kdb.h b/sys/mips/include/kdb.h
deleted file mode 100644
index 64e39e154f21..000000000000
--- a/sys/mips/include/kdb.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/kdb.h,v 1.2 2005/01/05 20:05:50 imp
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_KDB_H_
-#define	_MACHINE_KDB_H_
-
-#include <machine/frame.h>
-
-#define	KDB_STOPPEDPCB(pc)	&stoppcbs[pc->pc_cpuid]
-
-static __inline void
-kdb_cpu_clear_singlestep(void)
-{
-}
-
-static __inline void
-kdb_cpu_set_singlestep(void)
-{
-}
-
-static __inline void
-kdb_cpu_trap(int vector, int _)
-{
-}
-
-static __inline void
-kdb_cpu_sync_icache(unsigned char *addr, size_t size)
-{
-}
-
-static __inline int
-kdb_cpu_set_watchpoint(vm_offset_t addr, vm_size_t size, int access)
-{
-
-	return (ENXIO);
-}
-
-static __inline int
-kdb_cpu_clr_watchpoint(vm_offset_t addr, vm_size_t size)
-{
-
-	return (0);
-}
-
-#endif /* _MACHINE_KDB_H_ */
diff --git a/sys/mips/include/limits.h b/sys/mips/include/limits.h
deleted file mode 100644
index 277d107e174d..000000000000
--- a/sys/mips/include/limits.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)limits.h	8.3 (Berkeley) 1/4/94
- *	from: src/sys/i386/include/limits.h,v 1.27 2005/03/02 21:33:26 joerg
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_LIMITS_H_
-#define	_MACHINE_LIMITS_H_
-
-#include <sys/cdefs.h>
-
-#ifdef __CC_SUPPORTS_WARNING
-#warning "machine/limits.h is deprecated.  Include sys/limits.h instead."
-#endif
-
-#include <sys/limits.h>
-
-#endif /* !_MACHINE_LIMITS_H_ */
diff --git a/sys/mips/include/locore.h b/sys/mips/include/locore.h
deleted file mode 100644
index 1f101a5175fc..000000000000
--- a/sys/mips/include/locore.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */
-
-/*
- * Copyright 1996 The Board of Trustees of The Leland Stanford
- * Junior University. All Rights Reserved.
- *
- * Permission to use, copy, modify, and distribute this
- * software and its documentation for any purpose and without
- * fee is hereby granted, provided that the above copyright
- * notice appear in all copies.  Stanford University
- * makes no representations about the suitability of this
- * software for any purpose.  It is provided "as is" without
- * express or implied warranty.
- *
- * $FreeBSD$
- */
-
-/*
- * Jump table for MIPS cpu locore functions that are implemented
- * differently on different generations, or instruction-level
- * archtecture (ISA) level, the Mips family.
- *
- * We currently provide support for MIPS I and MIPS III.
- */
-
-#ifndef _MIPS_LOCORE_H
-#define	_MIPS_LOCORE_H
-
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-
-/*
- * CPU identification, from PRID register.
- */
-
-#define MIPS_PRID_REV(x)	(((x) >>  0) & 0x00ff)
-#define MIPS_PRID_IMPL(x)	(((x) >>  8) & 0x00ff)
-
-/* pre-MIPS32/64 */
-#define MIPS_PRID_RSVD(x)	(((x) >> 16) & 0xffff)
-#define MIPS_PRID_REV_MIN(x)	((MIPS_PRID_REV(x) >> 0) & 0x0f)
-#define MIPS_PRID_REV_MAJ(x)	((MIPS_PRID_REV(x) >> 4) & 0x0f)
-
-/* MIPS32/64 */
-#define	MIPS_PRID_CID(x)	(((x) >> 16) & 0x00ff)	/* Company ID */
-#define	MIPS_PRID_CID_PREHISTORIC	0x00	/* Not MIPS32/64 */
-#define	MIPS_PRID_CID_MTI		0x01	/* MIPS Technologies, Inc. */
-#define	MIPS_PRID_CID_BROADCOM		0x02	/* Broadcom */
-#define	MIPS_PRID_CID_ALCHEMY		0x03	/* Alchemy Semiconductor */
-#define	MIPS_PRID_CID_SIBYTE		0x04	/* SiByte */
-#define	MIPS_PRID_CID_SANDCRAFT		0x05	/* SandCraft */
-#define	MIPS_PRID_CID_PHILIPS		0x06	/* Philips */
-#define	MIPS_PRID_CID_TOSHIBA		0x07	/* Toshiba */
-#define	MIPS_PRID_CID_LSI		0x08	/* LSI */
-				/*	0x09	unannounced */
-				/*	0x0a	unannounced */
-#define	MIPS_PRID_CID_LEXRA		0x0b	/* Lexra */
-#define	MIPS_PRID_CID_RMI		0x0c	/* RMI */
-#define	MIPS_PRID_CID_CAVIUM		0x0d	/* Cavium */
-#define	MIPS_PRID_CID_INGENIC		0xe1	/* Ingenic */
-#define	MIPS_PRID_CID_INGENIC2		0xd1	/* Ingenic */
-
-#define	MIPS_PRID_COPTS(x)	(((x) >> 24) & 0x00ff)	/* Company Options */
-
-#endif	/* _MIPS_LOCORE_H */
diff --git a/sys/mips/include/md_var.h b/sys/mips/include/md_var.h
deleted file mode 100644
index 138047a13b47..000000000000
--- a/sys/mips/include/md_var.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1995 Bruce D. Evans.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: src/sys/i386/include/md_var.h,v 1.35 2000/02/20 20:51:23 bsd
- *	JNPR: md_var.h,v 1.4 2006/10/16 12:30:34 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_MD_VAR_H_
-#define	_MACHINE_MD_VAR_H_
-
-#include <machine/regnum.h>
-
-/*
- * Miscellaneous machine-dependent declarations.
- */
-extern	long	Maxmem;
-extern	char	cpu_board[];
-extern	char	cpu_model[];
-extern	char	sigcode[];
-extern	int	szsigcode;
-#if defined(__mips_n32) || defined(__mips_n64)
-extern	char	sigcode32[];
-extern	int	szsigcode32;
-#endif
-
-extern vm_offset_t kstack0;
-extern vm_offset_t kernel_kseg0_end;
-
-uint32_t MipsFPID(void);
-void	MipsSaveCurFPState(struct thread *);
-void	fork_trampoline(void);
-uintptr_t MipsEmulateBranch(struct trapframe *, uintptr_t, int, uintptr_t);
-void MipsSwitchFPState(struct thread *, struct trapframe *);
-int	is_cacheable_mem(vm_paddr_t addr);
-void	mips_wait(void);
-
-#define	MIPS_DEBUG   0
-
-#if MIPS_DEBUG
-#define	MIPS_DEBUG_PRINT(fmt, args...)	printf("%s: " fmt "\n" , __FUNCTION__ , ## args)
-#else
-#define	MIPS_DEBUG_PRINT(fmt, args...)
-#endif
-
-void	mips_vector_init(void);
-void	mips_cpu_init(void);
-void	mips_pcpu0_init(void);
-void	mips_proc0_init(void);
-void	mips_postboot_fixup(void);
-void	cpu_identify(void);
-void	cpu_switch_set_userlocal(void) __asm(__STRING(cpu_switch_set_userlocal));
-
-struct	dumperinfo;
-struct	minidumpstate;
-int	cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *);
-
-#endif /* !_MACHINE_MD_VAR_H_ */
diff --git a/sys/mips/include/memdev.h b/sys/mips/include/memdev.h
deleted file mode 100644
index 82e98150c11a..000000000000
--- a/sys/mips/include/memdev.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004 Mark R V Murray
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer
- *    in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/memdev.h,v 1.2 2004/08/01 18:51:44 markm
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_MEMDEV_H_
-#define	_MACHINE_MEMDEV_H_
-
-#define	CDEV_MINOR_MEM	0
-#define	CDEV_MINOR_KMEM	1
-
-d_open_t	memopen;
-d_read_t	memrw;
-d_ioctl_t	memioctl_md;
-d_mmap_t	memmmap;
-
-#endif /* _MACHINE_MEMDEV_H_ */
diff --git a/sys/mips/include/metadata.h b/sys/mips/include/metadata.h
deleted file mode 100644
index 620017260ae9..000000000000
--- a/sys/mips/include/metadata.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003 Peter Wemm <peter@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_METADATA_H_
-#define	_MACHINE_METADATA_H_
-
-#define	MODINFOMD_SMAP		0x1001
-#define	MODINFOMD_DTBP	0x1002
-
-#endif /* !_MACHINE_METADATA_H_ */
diff --git a/sys/mips/include/minidump.h b/sys/mips/include/minidump.h
deleted file mode 100644
index f9e7432b54d8..000000000000
--- a/sys/mips/include/minidump.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Peter Wemm
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_MINIDUMP_H_
-#define	_MACHINE_MINIDUMP_H_ 1
-
-#define	MINIDUMP_MAGIC		"minidump FreeBSD/mips"
-#define	MINIDUMP_VERSION	2
-
-struct minidumphdr {
-	char magic[24];
-	uint32_t version;
-	uint32_t msgbufsize;
-	uint32_t bitmapsize;
-	uint32_t ptesize;
-	uint64_t kernbase;
-	uint64_t dmapbase;
-	uint64_t dmapend;
-	uint32_t dumpavailsize;
-};
-
-#endif /* _MACHINE_MINIDUMP_H_ */
diff --git a/sys/mips/include/mips_opcode.h b/sys/mips/include/mips_opcode.h
deleted file mode 100644
index 0a1bc7268475..000000000000
--- a/sys/mips/include/mips_opcode.h
+++ /dev/null
@@ -1,424 +0,0 @@
-/*	$OpenBSD: mips_opcode.h,v 1.2 1999/01/27 04:46:05 imp Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93
- *	JNPR: mips_opcode.h,v 1.1 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_MIPS_OPCODE_H_
-#define	_MACHINE_MIPS_OPCODE_H_
-
-/*
- * Define the instruction formats and opcode values for the
- * MIPS instruction set.
- */
-#include <machine/endian.h>
-
-/*
- * Define the instruction formats.
- */
-typedef union {
-	unsigned word;
-
-#if BYTE_ORDER == BIG_ENDIAN
-	struct {
-		unsigned op: 6;
-		unsigned rs: 5;
-		unsigned rt: 5;
-		unsigned imm: 16;
-	} IType;
-
-	struct {
-		unsigned op: 6;
-		unsigned target: 26;
-	} JType;
-
-	struct {
-		unsigned op: 6;
-		unsigned rs: 5;
-		unsigned rt: 5;
-		unsigned rd: 5;
-		unsigned shamt: 5;
-		unsigned func: 6;
-	} RType;
-
-	struct {
-		unsigned op: 6;		/* always '0x11' */
-		unsigned : 1;		/* always '1' */
-		unsigned fmt: 4;
-		unsigned ft: 5;
-		unsigned fs: 5;
-		unsigned fd: 5;
-		unsigned func: 6;
-	} FRType;
-#endif
-#if BYTE_ORDER == LITTLE_ENDIAN
-	struct {
-		unsigned imm: 16;
-		unsigned rt: 5;
-		unsigned rs: 5;
-		unsigned op: 6;
-	} IType;
-
-	struct {
-		unsigned target: 26;
-		unsigned op: 6;
-	} JType;
-
-	struct {
-		unsigned func: 6;
-		unsigned shamt: 5;
-		unsigned rd: 5;
-		unsigned rt: 5;
-		unsigned rs: 5;
-		unsigned op: 6;
-	} RType;
-
-	struct {
-		unsigned func: 6;
-		unsigned fd: 5;
-		unsigned fs: 5;
-		unsigned ft: 5;
-		unsigned fmt: 4;
-		unsigned : 1;		/* always '1' */
-		unsigned op: 6;		/* always '0x11' */
-	} FRType;
-#endif
-} InstFmt;
-
-/* instruction field decoding macros */
-#define	MIPS_INST_OPCODE(val)	(val >> 26)
-#define	MIPS_INST_RS(val)	((val & 0x03e00000) >> 21)
-#define	MIPS_INST_RT(val)	((val & 0x001f0000) >> 16)
-#define	MIPS_INST_IMM(val)	((val & 0x0000ffff))
-
-#define	MIPS_INST_RD(val)	((val & 0x0000f800) >> 11)
-#define	MIPS_INST_SA(val)	((val & 0x000007c0) >> 6)
-#define	MIPS_INST_FUNC(val)	(val & 0x0000003f)
-
-#define	MIPS_INST_INDEX(val)	(val & 0x03ffffff)
-
-/*
- * the mips opcode and function table use a 3bit row and 3bit col
- * number we define the following macro for easy transcribing
- */
-
-#define	MIPS_OPCODE(r, c)	(((r & 0x07) << 3) | (c & 0x07))
-
-/*
- * Values for the 'op' field.
- */
-#define	OP_SPECIAL	000
-#define	OP_BCOND	001
-#define	OP_J		002
-#define	OP_JAL		003
-#define	OP_BEQ		004
-#define	OP_BNE		005
-#define	OP_BLEZ		006
-#define	OP_BGTZ		007
-
-#define	OP_REGIMM	OP_BCOND
-
-#define	OP_ADDI		010
-#define	OP_ADDIU	011
-#define	OP_SLTI		012
-#define	OP_SLTIU	013
-#define	OP_ANDI		014
-#define	OP_ORI		015
-#define	OP_XORI		016
-#define	OP_LUI		017
-
-#define	OP_COP0		020
-#define	OP_COP1		021
-#define	OP_COP2		022
-#define	OP_COP3		023
-#define	OP_BEQL		024
-#define	OP_BNEL		025
-#define	OP_BLEZL	026
-#define	OP_BGTZL	027
-
-#define	OP_COP1X	OP_COP3
-
-#define	OP_DADDI	030
-#define	OP_DADDIU	031
-#define	OP_LDL		032
-#define	OP_LDR		033
-
-#define OP_SPECIAL2	034
-#define OP_JALX		035
-
-#define OP_SPECIAL3	037
-
-#define	OP_LB		040
-#define	OP_LH		041
-#define	OP_LWL		042
-#define	OP_LW		043
-#define	OP_LBU		044
-#define	OP_LHU		045
-#define	OP_LWR		046
-#define	OP_LWU		047
-
-#define	OP_SB		050
-#define	OP_SH		051
-#define	OP_SWL		052
-#define	OP_SW		053
-#define	OP_SDL		054
-#define	OP_SDR		055
-#define	OP_SWR		056
-#define	OP_CACHE	057
-
-#define	OP_LL		060
-#define	OP_LWC1		061
-#define	OP_LWC2		062
-#define	OP_LWC3		063
-#define	OP_LLD		064
-#define	OP_LDC1		065
-#define	OP_LDC2		066
-#define	OP_LD		067
-
-#define	OP_PREF		OP_LWC3
-
-#define	OP_SC		070
-#define	OP_SWC1		071
-#define	OP_SWC2		072
-#define	OP_SWC3		073
-#define	OP_SCD		074
-#define	OP_SDC1		075
-#define	OP_SDC2		076
-#define	OP_SD		077
-
-/*
- * Values for the 'func' field when 'op' == OP_SPECIAL.
- */
-#define	OP_SLL		000
-#define	OP_MOVCI	001
-#define	OP_SRL		002
-#define	OP_SRA		003
-#define	OP_SLLV		004
-#define	OP_SRLV		006
-#define	OP_SRAV		007
-
-#define	OP_F_SLL	OP_SLL
-#define	OP_F_MOVCI	OP_MOVCI
-#define	OP_F_SRL	OP_SRL
-#define	OP_F_SRA	OP_SRA
-#define	OP_F_SLLV	OP_SLLV
-#define	OP_F_SRLV	OP_SRLV
-#define	OP_F_SRAV	OP_SRAV
-
-#define	OP_JR		010
-#define	OP_JALR		011
-#define	OP_MOVZ		012
-#define	OP_MOVN		013
-#define	OP_SYSCALL	014
-#define	OP_BREAK	015
-#define	OP_SYNC		017
-
-#define	OP_F_JR		OP_JR
-#define	OP_F_JALR	OP_JALR
-#define	OP_F_MOVZ	OP_MOVZ
-#define	OP_F_MOVN	OP_MOVN
-#define	OP_F_SYSCALL	OP_SYSCALL
-#define	OP_F_BREAK	OP_BREAK
-#define	OP_F_SYNC	OP_SYNC
-
-#define	OP_MFHI		020
-#define	OP_MTHI		021
-#define	OP_MFLO		022
-#define	OP_MTLO		023
-#define	OP_DSLLV	024
-#define	OP_DSRLV	026
-#define	OP_DSRAV	027
-
-#define	OP_F_MFHI	OP_MFHI
-#define	OP_F_MTHI	OP_MTHI
-#define	OP_F_MFLO	OP_MFLO
-#define	OP_F_MTLO	OP_MTLO
-#define	OP_F_DSLLV	OP_DSLLV
-#define	OP_F_DSRLV	OP_DSRLV
-#define	OP_F_DSRAV	OP_DSRAV
-
-#define	OP_MULT		030
-#define	OP_MULTU	031
-#define	OP_DIV		032
-#define	OP_DIVU		033
-#define	OP_DMULT	034
-#define	OP_DMULTU	035
-#define	OP_DDIV		036
-#define	OP_DDIVU	037
-
-#define	OP_F_MULT	OP_MULT
-#define	OP_F_MULTU	OP_MULTU
-#define	OP_F_DIV	OP_DIV
-#define	OP_F_DIVU	OP_DIVU
-#define	OP_F_DMULT	OP_DMULT
-#define	OP_F_DMULTU	OP_DMULTU
-#define	OP_F_DDIV	OP_DDIV
-#define	OP_F_DDIVU	OP_DDIVU
-
-#define	OP_ADD		040
-#define	OP_ADDU		041
-#define	OP_SUB		042
-#define	OP_SUBU		043
-#define	OP_AND		044
-#define	OP_OR		045
-#define	OP_XOR		046
-#define	OP_NOR		047
-
-#define	OP_F_ADD	OP_ADD
-#define	OP_F_ADDU	OP_ADDU
-#define	OP_F_SUB	OP_SUB
-#define	OP_F_SUBU	OP_SUBU
-#define	OP_F_AND	OP_AND
-#define	OP_F_OR		OP_OR
-#define	OP_F_XOR	OP_XOR
-#define	OP_F_NOR	OP_NOR
-
-#define	OP_SLT		052
-#define	OP_SLTU		053
-#define	OP_DADD		054
-#define	OP_DADDU	055
-#define	OP_DSUB		056
-#define	OP_DSUBU	057
-
-#define	OP_F_SLT	OP_SLT
-#define	OP_F_SLTU	OP_SLTU
-#define	OP_F_DADD	OP_DADD
-#define	OP_F_DADDU	OP_DADDU
-#define	OP_F_DSUB	OP_DSUB
-#define	OP_F_DSUBU	OP_DSUBU
-
-#define	OP_TGE		060
-#define	OP_TGEU		061
-#define	OP_TLT		062
-#define	OP_TLTU		063
-#define	OP_TEQ		064
-#define	OP_TNE		066
-
-#define	OP_F_TGE	OP_TGE
-#define	OP_F_TGEU	OP_TGEU
-#define	OP_F_TLT	OP_TLT
-#define	OP_F_TLTU	OP_TLTU
-#define	OP_F_TEQ	OP_TEQ
-#define	OP_F_TNE	OP_TNE
-
-#define	OP_DSLL		070
-#define	OP_DSRL		072
-#define	OP_DSRA		073
-#define	OP_DSLL32	074
-#define	OP_DSRL32	076
-#define	OP_DSRA32	077
-
-#define	OP_F_DSLL	OP_DSLL
-#define	OP_F_DSRL	OP_DSRL
-#define	OP_F_DSRA	OP_DSRA
-#define	OP_F_DSLL32	OP_DSLL32
-#define	OP_F_DSRL32	OP_DSRL32
-#define	OP_F_DSRA32	OP_DSRA32
-
-/*
- * The REGIMM - register immediate instructions are further
- * decoded using this table that has 2bit row numbers, hence
- * a need for a new helper macro.
- */
-
-#define	MIPS_ROP(r, c)	((r & 0x03) << 3) | (c & 0x07)
-
-/*
- * Values for the 'func' field when 'op' == OP_BCOND.
- */
-#define	OP_BLTZ		000
-#define	OP_BGEZ		001
-#define	OP_BLTZL	002
-#define	OP_BGEZL	003
-
-#define	OP_R_BLTZ	OP_BLTZ
-#define	OP_R_BGEZ	OP_BGEZ
-#define	OP_R_BLTZL	OP_BLTZL
-#define	OP_R_BGEZL	OP_BGEZL
-
-#define	OP_TGEI		010
-#define	OP_TGEIU	011
-#define	OP_TLTI		012
-#define	OP_TLTIU	013
-#define	OP_TEQI		014
-#define	OP_TNEI		016
-
-#define	OP_R_TGEI	OP_TGEI
-#define	OP_R_TGEIU	OP_TGEIU
-#define	OP_R_TLTI	OP_TLTI
-#define	OP_R_TLTIU	OP_TLTIU
-#define	OP_R_TEQI	OP_TEQI
-#define	OP_R_TNEI	OP_TNEI
-
-#define	OP_BLTZAL	020
-#define	OP_BGEZAL	021
-#define	OP_BLTZALL	022
-#define	OP_BGEZALL	023
-
-#define	OP_R_BLTZAL	OP_BLTZAL
-#define	OP_R_BGEZAL	OP_BGEZAL
-#define	OP_R_BLTZALL	OP_BLTZALL
-#define	OP_R_BGEZALL	OP_BGEZALL
-
-/*
- * Values for the 'func' field when 'op' == OP_SPECIAL3.
- */
-#define	OP_RDHWR	073
-
-/*
- * Values for the 'rs' field when 'op' == OP_COPz.
- */
-#define	OP_MF		000
-#define	OP_DMF		001
-#define	OP_MT		004
-#define	OP_DMT		005
-#define	OP_BCx		010
-#define	OP_BCy		014
-#define	OP_CF		002
-#define	OP_CT		006
-
-/*
- * Values for the 'rt' field when 'op' == OP_COPz.
- */
-#define	COPz_BC_TF_MASK		0x01
-#define	COPz_BC_TRUE		0x01
-#define	COPz_BC_FALSE		0x00
-#define	COPz_BCL_TF_MASK	0x02
-#define	COPz_BCL_TRUE		0x02
-#define	COPz_BCL_FALSE		0x00
-
-#endif /* !_MACHINE_MIPS_OPCODE_H_ */
diff --git a/sys/mips/include/octeon_cop2.h b/sys/mips/include/octeon_cop2.h
deleted file mode 100644
index 9bba74d591a3..000000000000
--- a/sys/mips/include/octeon_cop2.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __OCTEON_COP2_H__
-#define __OCTEON_COP2_H__
-
-/*
- * COP2 registers of interest
- */
-#define	COP2_CRC_IV		0x201
-#define	COP2_CRC_IV_SET		COP2_CRC_IV
-#define	COP2_CRC_LENGTH		0x202
-#define	COP2_CRC_LENGTH_SET	0x1202
-#define	COP2_CRC_POLY		0x200
-#define	COP2_CRC_POLY_SET	0x4200
-#define	COP2_LLM_DAT0		0x402
-#define	COP2_LLM_DAT0_SET	COP2_LLM_DAT0
-#define	COP2_LLM_DAT1		0x40A
-#define	COP2_LLM_DAT1_SET	COP2_LLM_DAT1
-#define	COP2_3DES_IV		0x084
-#define	COP2_3DES_IV_SET	COP2_3DES_IV
-#define	COP2_3DES_KEY0		0x080
-#define	COP2_3DES_KEY0_SET	COP2_3DES_KEY0
-#define	COP2_3DES_KEY1		0x081
-#define	COP2_3DES_KEY1_SET	COP2_3DES_KEY1
-#define	COP2_3DES_KEY2		0x082
-#define	COP2_3DES_KEY2_SET	COP2_3DES_KEY2
-#define	COP2_3DES_RESULT	0x088
-#define	COP2_3DES_RESULT_SET	0x098
-#define	COP2_AES_INP0		0x111
-#define	COP2_AES_INP0_SET	COP2_AES_INP0
-#define	COP2_AES_IV0		0x102
-#define	COP2_AES_IV0_SET	COP2_AES_IV0
-#define	COP2_AES_IV1		0x103
-#define	COP2_AES_IV1_SET	COP2_AES_IV1
-#define	COP2_AES_KEY0		0x104
-#define	COP2_AES_KEY0_SET	COP2_AES_KEY0
-#define	COP2_AES_KEY1		0x105
-#define	COP2_AES_KEY1_SET	COP2_AES_KEY1
-#define	COP2_AES_KEY2		0x106
-#define	COP2_AES_KEY2_SET	COP2_AES_KEY2
-#define	COP2_AES_KEY3		0x107
-#define	COP2_AES_KEY3_SET	COP2_AES_KEY3
-#define	COP2_AES_KEYLEN		0x110
-#define	COP2_AES_KEYLEN_SET	COP2_AES_KEYLEN
-#define	COP2_AES_RESULT0	0x100
-#define	COP2_AES_RESULT0_SET	COP2_AES_RESULT0
-#define	COP2_AES_RESULT1	0x101
-#define	COP2_AES_RESULT1_SET	COP2_AES_RESULT1
-#define	COP2_HSH_DATW0		0x240
-#define	COP2_HSH_DATW0_SET	COP2_HSH_DATW0
-#define	COP2_HSH_DATW1		0x241
-#define	COP2_HSH_DATW1_SET	COP2_HSH_DATW1
-#define	COP2_HSH_DATW2		0x242
-#define	COP2_HSH_DATW2_SET	COP2_HSH_DATW2
-#define	COP2_HSH_DATW3		0x243
-#define	COP2_HSH_DATW3_SET	COP2_HSH_DATW3
-#define	COP2_HSH_DATW4		0x244
-#define	COP2_HSH_DATW4_SET	COP2_HSH_DATW4
-#define	COP2_HSH_DATW5		0x245
-#define	COP2_HSH_DATW5_SET	COP2_HSH_DATW5
-#define	COP2_HSH_DATW6		0x246
-#define	COP2_HSH_DATW6_SET	COP2_HSH_DATW6
-#define	COP2_HSH_DATW7		0x247
-#define	COP2_HSH_DATW7_SET	COP2_HSH_DATW7
-#define	COP2_HSH_DATW8		0x248
-#define	COP2_HSH_DATW8_SET	COP2_HSH_DATW8
-#define	COP2_HSH_DATW9		0x249
-#define	COP2_HSH_DATW9_SET	COP2_HSH_DATW9
-#define	COP2_HSH_DATW10		0x24A
-#define	COP2_HSH_DATW10_SET	COP2_HSH_DATW10
-#define	COP2_HSH_DATW11		0x24B
-#define	COP2_HSH_DATW11_SET	COP2_HSH_DATW11
-#define	COP2_HSH_DATW12		0x24C
-#define	COP2_HSH_DATW12_SET	COP2_HSH_DATW12
-#define	COP2_HSH_DATW13		0x24D
-#define	COP2_HSH_DATW13_SET	COP2_HSH_DATW13
-#define	COP2_HSH_DATW14		0x24E
-#define	COP2_HSH_DATW14_SET	COP2_HSH_DATW14
-#define	COP2_HSH_IVW0		0x250
-#define	COP2_HSH_IVW0_SET	COP2_HSH_IVW0
-#define	COP2_HSH_IVW1		0x251
-#define	COP2_HSH_IVW1_SET	COP2_HSH_IVW1
-#define	COP2_HSH_IVW2		0x252
-#define	COP2_HSH_IVW2_SET	COP2_HSH_IVW2
-#define	COP2_HSH_IVW3		0x253
-#define	COP2_HSH_IVW3_SET	COP2_HSH_IVW3
-#define	COP2_HSH_IVW4		0x254
-#define	COP2_HSH_IVW4_SET	COP2_HSH_IVW4
-#define	COP2_HSH_IVW5		0x255
-#define	COP2_HSH_IVW5_SET	COP2_HSH_IVW5
-#define	COP2_HSH_IVW6		0x256
-#define	COP2_HSH_IVW6_SET	COP2_HSH_IVW6
-#define	COP2_HSH_IVW7		0x257
-#define	COP2_HSH_IVW7_SET	COP2_HSH_IVW7
-#define	COP2_GFM_MULT0		0x258
-#define	COP2_GFM_MULT0_SET	COP2_GFM_MULT0
-#define	COP2_GFM_MULT1		0x259
-#define	COP2_GFM_MULT1_SET	COP2_GFM_MULT1
-#define	COP2_GFM_POLY		0x25E
-#define	COP2_GFM_POLY_SET	COP2_GFM_POLY
-#define	COP2_GFM_RESULT0	0x25A
-#define	COP2_GFM_RESULT0_SET	COP2_GFM_RESULT0
-#define	COP2_GFM_RESULT1	0x25B
-#define	COP2_GFM_RESULT1_SET	COP2_GFM_RESULT1
-#define	COP2_HSH_DATW0_PASS1	0x040
-#define	COP2_HSH_DATW0_PASS1_SET	COP2_HSH_DATW0_PASS1
-#define	COP2_HSH_DATW1_PASS1	0x041
-#define	COP2_HSH_DATW1_PASS1_SET	COP2_HSH_DATW1_PASS1
-#define	COP2_HSH_DATW2_PASS1	0x042
-#define	COP2_HSH_DATW2_PASS1_SET	COP2_HSH_DATW2_PASS1
-#define	COP2_HSH_DATW3_PASS1	0x043
-#define	COP2_HSH_DATW3_PASS1_SET	COP2_HSH_DATW3_PASS1
-#define	COP2_HSH_DATW4_PASS1	0x044
-#define	COP2_HSH_DATW4_PASS1_SET	COP2_HSH_DATW4_PASS1
-#define	COP2_HSH_DATW5_PASS1	0x045
-#define	COP2_HSH_DATW5_PASS1_SET	COP2_HSH_DATW5_PASS1
-#define	COP2_HSH_DATW6_PASS1	0x046
-#define	COP2_HSH_DATW6_PASS1_SET	COP2_HSH_DATW6_PASS1
-#define	COP2_HSH_IVW0_PASS1	0x048
-#define	COP2_HSH_IVW0_PASS1_SET	COP2_HSH_IVW0_PASS1
-#define	COP2_HSH_IVW1_PASS1	0x049
-#define	COP2_HSH_IVW1_PASS1_SET	COP2_HSH_IVW1_PASS1
-#define	COP2_HSH_IVW2_PASS1	0x04A
-#define	COP2_HSH_IVW2_PASS1_SET	COP2_HSH_IVW2_PASS1
-
-#ifndef LOCORE
-
-struct octeon_cop2_state {
-	/* 3DES */
-	/* 0x0084 */
-	unsigned long   _3des_iv;
-	/* 0x0080..0x0082 */
-	unsigned long   _3des_key[3];
-	/* 0x0088, set: 0x0098 */
-	unsigned long   _3des_result;
-
-	/* AES */
-	/* 0x0111 */
-	unsigned long   aes_inp0;
-	/* 0x0102..0x0103 */
-	unsigned long   aes_iv[2];
-	/* 0x0104..0x0107 */
-	unsigned long   aes_key[4];
-	/* 0x0110 */
-	unsigned long   aes_keylen;
-	/* 0x0100..0x0101 */
-	unsigned long   aes_result[2];
-
-	/* CRC */
-	/*  0x0201 */
-	unsigned long   crc_iv;
-	/* 0x0202, set: 0x1202 */
-	unsigned long   crc_length;
-	/* 0x0200, set: 0x4200 */
-	unsigned long   crc_poly;
-
-	/* Low-latency memory stuff */
-	/* 0x0402, 0x040A */
-	unsigned long   llm_dat[2];
-
-	/* SHA & MD5 */
-	/* 0x0240..0x024E */
-	unsigned long   hsh_datw[15];
-	/* 0x0250..0x0257 */
-	unsigned long   hsh_ivw[8];
-
-	/* GFM */
-	/*  0x0258..0x0259 */
-	unsigned long   gfm_mult[2];
-	/* 0x025E */
-	unsigned long   gfm_poly;
-	/* 0x025A..0x025B */
-	unsigned long   gfm_result[2];
-};
-
-/* Prototypes */
-
-struct octeon_cop2_state* octeon_cop2_alloc_ctx(void);
-void octeon_cop2_free_ctx(struct octeon_cop2_state *);
-/*
- * Save/restore part
- */
-void octeon_cop2_save(struct octeon_cop2_state *);
-void octeon_cop2_restore(struct octeon_cop2_state *);
-
-#endif /* LOCORE */
-#endif /* __OCTEON_COP2_H__ */
diff --git a/sys/mips/include/ofw_machdep.h b/sys/mips/include/ofw_machdep.h
deleted file mode 100644
index 1f73f67f8c1c..000000000000
--- a/sys/mips/include/ofw_machdep.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2001 by Thomas Moestl <tmm@FreeBSD.org>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_OFW_MACHDEP_H_
-#define _MACHINE_OFW_MACHDEP_H_
-
-#include <sys/cdefs.h>
-#include <sys/types.h>
-#include <sys/rman.h>
-#include <sys/bus.h>
-
-typedef	uint32_t	cell_t;
-struct mem_region {
-	vm_offset_t	mr_start;
-	vm_size_t	mr_size;
-};
-
-void OF_getetheraddr(device_t dev, u_char *addr);
-void OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *));
-
-#endif /* _MACHINE_OFW_MACHDEP_H_ */
diff --git a/sys/mips/include/param.h b/sys/mips/include/param.h
deleted file mode 100644
index 69b670274697..000000000000
--- a/sys/mips/include/param.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/*	$OpenBSD: param.h,v 1.11 1998/08/30 22:05:35 millert Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: machparam.h 1.11 89/08/14
- *	from: @(#)param.h	8.1 (Berkeley) 6/10/93
- *	JNPR: param.h,v 1.6.2.1 2007/09/10 07:49:36 girish
- * $FreeBSD$
- */
-
-#ifndef _MIPS_INCLUDE_PARAM_H_
-#define	_MIPS_INCLUDE_PARAM_H_
-
-#include <machine/_align.h>
-
-#include <sys/cdefs.h>
-#ifdef _KERNEL
-#ifndef _LOCORE
-#include <machine/cpu.h>
-#endif
-#endif
-
-#define __PCI_REROUTE_INTERRUPT
-
-#if _BYTE_ORDER == _BIG_ENDIAN
-# define _EL_SUFFIX ""
-#else
-# define _EL_SUFFIX "el"
-#endif
-
-#ifdef __mips_n64
-# define _N64_SUFFIX "64"
-#elif defined(__mips_n32)
-# define _N64_SUFFIX "n32"
-#else
-# define _N64_SUFFIX ""
-#endif
-
-#ifdef __mips_hard_float
-# define _HF_SUFFIX "hf"
-#else
-# define _HF_SUFFIX ""
-#endif
-
-#ifndef MACHINE
-# define MACHINE	"mips"
-#endif
-#ifndef MACHINE_ARCH
-# define MACHINE_ARCH 	"mips" _N64_SUFFIX _EL_SUFFIX _HF_SUFFIX
-#endif
-#ifdef __mips_n64
-# ifndef MACHINE_ARCH32
-#  define MACHINE_ARCH32 "mips" _EL_SUFFIX _HF_SUFFIX
-# endif
-#endif
-
-/*
- * OBJFORMAT_NAMES is a comma-separated list of the object formats
- * that are supported on the architecture.
- */
-#define	OBJFORMAT_NAMES		"elf"
-#define	OBJFORMAT_DEFAULT	"elf"
-
-#define	MID_MACHINE	0	/* None but has to be defined */
-
-#ifdef SMP
-#define	MAXSMPCPU	32
-#ifndef MAXCPU
-#define	MAXCPU		MAXSMPCPU
-#endif
-#else
-#define	MAXSMPCPU	1
-#define	MAXCPU		1
-#endif
-
-#ifndef MAXMEMDOM
-#define	MAXMEMDOM	1
-#endif
-
-/*
- * Round p (pointer or byte index) up to a correctly-aligned value for all
- * data types (int, long, ...).	  The result is u_int and must be cast to
- * any desired pointer type.
- */
-
-#define	ALIGNBYTES	_ALIGNBYTES
-#define	ALIGN(p)	_ALIGN(p)
-/*
- * ALIGNED_POINTER is a boolean macro that checks whether an address
- * is valid to fetch data elements of type t from on this architecture.
- * This does not reflect the optimal alignment, just the possibility
- * (within reasonable limits). 
- */
-#define	ALIGNED_POINTER(p, t)	((((unsigned long)(p)) & (sizeof (t) - 1)) == 0)
-
-/*
- * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
- * architecture.  It should be used with appropriate caution.
- */
-#define	CACHE_LINE_SHIFT	6
-#define	CACHE_LINE_SIZE		(1 << CACHE_LINE_SHIFT)
-
-#define	PAGE_SHIFT		12		/* LOG2(PAGE_SIZE) */
-#define	PAGE_SIZE		(1<<PAGE_SHIFT) /* bytes/page */
-#define	PAGE_MASK		(PAGE_SIZE-1)
-
-#define	NPTEPG			(PAGE_SIZE/(sizeof (pt_entry_t)))
-#define	NPDEPG			(PAGE_SIZE/(sizeof (pd_entry_t)))
-
-#if defined(__mips_n32) || defined(__mips_n64) /*  PHYSADDR_64_BIT */
-#define	NPTEPGSHIFT		9               /* LOG2(NPTEPG) */
-#else
-#define	NPTEPGSHIFT		10               /* LOG2(NPTEPG) */
-#endif
-
-#ifdef __mips_n64
-#define	NPDEPGSHIFT		9               /* LOG2(NPTEPG) */
-#define	SEGSHIFT		(PAGE_SHIFT + NPTEPGSHIFT + NPDEPGSHIFT)
-#define	NBSEG			(1ul << SEGSHIFT)
-#define	PDRSHIFT		(PAGE_SHIFT + NPTEPGSHIFT)
-#define	PDRSIZE			(1ul << PDRSHIFT)
-#define	PDRMASK			((1 << PDRSHIFT) - 1)
-#else
-#define	NPDEPGSHIFT		10               /* LOG2(NPTEPG) */
-#define	SEGSHIFT		(PAGE_SHIFT + NPTEPGSHIFT)
-#define	NBSEG			(1 << SEGSHIFT)	/* bytes/segment */
-#define	PDRSHIFT		SEGSHIFT	/* alias for SEG in 32 bit */
-#define	PDRSIZE			(1ul << PDRSHIFT)
-#define	PDRMASK			((1 << PDRSHIFT) - 1)
-#endif
-#define	NBPDR			(1 << PDRSHIFT)	/* bytes/pagedir */
-#define	SEGMASK			(NBSEG - 1)	/* byte offset into segment */
-
-#define	MAXPAGESIZES		1		/* max supported pagesizes */
-
-#define	MAXDUMPPGS		1		/* xxx: why is this only one? */
-
-/*
- * The kernel stack needs to be aligned on a (PAGE_SIZE * 2) boundary.
- */
-#define	KSTACK_PAGES		2	/* kernel stack */
-#define	KSTACK_GUARD_PAGES	2	/* pages of kstack guard; 0 disables */
-
-/*
- * Mach derived conversion macros
- */
-#define	round_page(x)		(((x) + PAGE_MASK) & ~PAGE_MASK)
-#define	trunc_page(x)		((x) & ~PAGE_MASK)
-
-#define	atop(x)			((x) >> PAGE_SHIFT)
-#define	ptoa(x)			((x) << PAGE_SHIFT)
-
-#define	pgtok(x)		((x) * (PAGE_SIZE / 1024))
-
-#endif /* !_MIPS_INCLUDE_PARAM_H_ */
diff --git a/sys/mips/include/pcb.h b/sys/mips/include/pcb.h
deleted file mode 100644
index 6ae5206e2495..000000000000
--- a/sys/mips/include/pcb.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*	$OpenBSD: pcb.h,v 1.3 1998/09/15 10:50:12 pefo Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: pcb.h 1.13 89/04/23
- *	from: @(#)pcb.h 8.1 (Berkeley) 6/10/93
- *	JNPR: pcb.h,v 1.2 2006/08/07 11:51:17 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PCB_H_
-#define	_MACHINE_PCB_H_
-
-/*
- * used by switch.S
- */
-#define	PCB_REG_S0	0
-#define	PCB_REG_S1	1
-#define	PCB_REG_S2	2
-#define	PCB_REG_S3	3
-#define	PCB_REG_S4	4
-#define	PCB_REG_S5	5
-#define	PCB_REG_S6	6
-#define	PCB_REG_S7	7
-#define	PCB_REG_SP	8
-#define	PCB_REG_S8	9
-#define	PCB_REG_RA	10
-#define	PCB_REG_SR	11
-#define	PCB_REG_GP	12
-#define	PCB_REG_PC	13
-
-/*
- * Call ast if required
- *
- * XXX Do we really need to disable interrupts?
- */
-#define DO_AST				             \
-44:				                     \
-	mfc0	t0, MIPS_COP_0_STATUS               ;\
-	and	a0, t0, MIPS_SR_INT_IE              ;\
-	xor	t0, a0, t0                          ;\
-	mtc0	t0, MIPS_COP_0_STATUS               ;\
-	COP0_SYNC                                   ;\
-	GET_CPU_PCPU(s1)                            ;\
-	PTR_L	s3, PC_CURPCB(s1)                   ;\
-	PTR_L	s1, PC_CURTHREAD(s1)                ;\
-	lw	s2, TD_FLAGS(s1)                    ;\
-	li	s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
-	and	s2, s0                              ;\
-	mfc0	t0, MIPS_COP_0_STATUS               ;\
-	or	t0, a0, t0                          ;\
-	mtc0	t0, MIPS_COP_0_STATUS               ;\
-	COP0_SYNC                                   ;\
-	beq	s2, zero, 4f                        ;\
-	nop                                         ;\
-	PTR_LA	s0, _C_LABEL(ast)                   ;\
-	jalr	s0                                  ;\
-	PTR_ADDU a0, s3, U_PCB_REGS                 ;\
-	j	44b		                    ;\
-        nop                                         ;\
-4:
-
-#define	SAVE_U_PCB_REG(reg, offs, base) \
-	REG_S	reg, U_PCB_REGS + (SZREG * offs) (base)
-
-#define	RESTORE_U_PCB_REG(reg, offs, base) \
-	REG_L	reg, U_PCB_REGS + (SZREG * offs) (base)
-
-#define	SAVE_U_PCB_FPREG(reg, offs, base) \
-	FP_S	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
-
-#define	RESTORE_U_PCB_FPREG(reg, offs, base) \
-	FP_L	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
-
-#define	SAVE_U_PCB_FPSR(reg, offs, base) \
-	REG_S	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
-
-#define	RESTORE_U_PCB_FPSR(reg, offs, base) \
-	REG_L	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
-
-#define	SAVE_U_PCB_CONTEXT(reg, offs, base) \
-	REG_S	reg, U_PCB_CONTEXT + (SZREG * offs) (base)
-
-#define	RESTORE_U_PCB_CONTEXT(reg, offs, base) \
-	REG_L	reg, U_PCB_CONTEXT + (SZREG * offs) (base)
-
-#ifndef LOCORE
-#include <machine/frame.h>
-
-/*
- * MIPS process control block
- */
-struct pcb
-{
-	struct trapframe pcb_regs;	/* saved CPU and registers */
-	__register_t pcb_context[14];	/* kernel context for resume */
-	void *pcb_onfault;		/* for copyin/copyout faults */
-	register_t pcb_tpc;
-};
-
-#ifdef _KERNEL
-extern struct pcb *curpcb;		/* the current running pcb */
-
-void makectx(struct trapframe *, struct pcb *);
-int savectx(struct pcb *) __returns_twice;
-
-#endif
-#endif
-
-#endif	/* !_MACHINE_PCB_H_ */
diff --git a/sys/mips/include/pcpu.h b/sys/mips/include/pcpu.h
deleted file mode 100644
index 879f2d8afb90..000000000000
--- a/sys/mips/include/pcpu.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
- * Copyright (c) Peter Wemm <peter@netplex.com.au>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/pcpu.h,v 1.15 2004/11/05 19:16:44 jhb
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PCPU_H_
-#define	_MACHINE_PCPU_H_
-
-#include <machine/cpufunc.h>
-#include <machine/pte.h>
-
-#define	PCPU_MD_COMMON_FIELDS						\
-	pd_entry_t	*pc_segbase;		/* curthread segbase */	\
-	struct	pmap	*pc_curpmap;		/* pmap of curthread */	\
-	u_int32_t	pc_next_asid;		/* next ASID to alloc */ \
-	u_int32_t	pc_asid_generation;	/* current ASID generation */ \
-	u_int		pc_pending_ipis;	/* IPIs pending to this CPU */ \
-	struct	pcpu	*pc_self;		/* globally-uniqe self pointer */
-
-#ifdef	__mips_n64
-#define	PCPU_MD_MIPS64_FIELDS						\
-	PCPU_MD_COMMON_FIELDS						\
-	char		__pad[245]
-#else
-#define	PCPU_MD_MIPS32_FIELDS						\
-	PCPU_MD_COMMON_FIELDS						\
-	pt_entry_t	*pc_cmap1_ptep;		/* PTE for copy window 1 KVA */ \
-	pt_entry_t	*pc_cmap2_ptep;		/* PTE for copy window 2 KVA */ \
-	vm_offset_t	pc_cmap1_addr;		/* KVA page for copy window 1 */ \
-	vm_offset_t	pc_cmap2_addr;		/* KVA page for copy window 2 */ \
-	vm_offset_t	pc_qmap_addr;		/* KVA page for temporary mappings */ \
-	pt_entry_t	*pc_qmap_ptep;		/* PTE for temporary mapping KVA */ \
-	char		__pad[97]
-#endif
-
-#ifdef	__mips_n64
-#define	PCPU_MD_FIELDS	PCPU_MD_MIPS64_FIELDS
-#else
-#define	PCPU_MD_FIELDS	PCPU_MD_MIPS32_FIELDS
-#endif
-
-#ifdef _KERNEL
-
-extern char pcpu_space[MAXCPU][PAGE_SIZE * 2];
-#define	PCPU_ADDR(cpu)		(struct pcpu *)(pcpu_space[(cpu)])
-
-extern struct pcpu *pcpup;
-#define	PCPUP	pcpup
-
-/*
- * Since we use a wired TLB entry to map the same VA to a different
- * physical page for each CPU, get_pcpu() must use the pc_self
- * field to obtain a globally-unique pointer.
- */
-#define	get_pcpu()		(PCPUP->pc_self)
-
-#define	PCPU_ADD(member, value)	(PCPUP->pc_ ## member += (value))
-#define	PCPU_GET(member)	(PCPUP->pc_ ## member)
-#define	PCPU_PTR(member)	(&PCPUP->pc_ ## member)
-#define	PCPU_SET(member,value)	(PCPUP->pc_ ## member = (value))
-#define PCPU_LAZY_INC(member)   (++PCPUP->pc_ ## member)
-
-#ifdef SMP
-/*
- * Instantiate the wired TLB entry at PCPU_TLB_ENTRY to map 'pcpu' at 'pcpup'.
- */
-void	mips_pcpu_tlb_init(struct pcpu *pcpu);
-#endif
-
-#endif	/* _KERNEL */
-
-#endif	/* !_MACHINE_PCPU_H_ */
diff --git a/sys/mips/include/pcpu_aux.h b/sys/mips/include/pcpu_aux.h
deleted file mode 100644
index 3d4c70c491d6..000000000000
--- a/sys/mips/include/pcpu_aux.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2019 The FreeBSD Foundation
- *
- * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PCPU_AUX_H_
-#define	_MACHINE_PCPU_AUX_H_
-
-#ifndef _KERNEL
-#error "Not for userspace"
-#endif
-
-#ifndef _SYS_PCPU_H_
-#error "Do not include machine/pcpu_aux.h directly"
-#endif
-
-/*
- * To minimize memory waste in per-cpu UMA zones, the page size should
- * be a multiple of the size of struct pcpu.
- */
-_Static_assert(PAGE_SIZE % sizeof(struct pcpu) == 0, "fix pcpu size");
-
-extern struct pcpu __pcpu[];
-
-#endif	/* _MACHINE_PCPU_AUX_H_ */
diff --git a/sys/mips/include/pmap.h b/sys/mips/include/pmap.h
deleted file mode 100644
index fb186011bd85..000000000000
--- a/sys/mips/include/pmap.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and William Jolitz of UUNET Technologies Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Derived from hp300 version by Mike Hibler, this version by William
- * Jolitz uses a recursive map [a pde points to the page directory] to
- * map the page tables using the pagetables themselves. This is done to
- * reduce the impact on kernel virtual memory for lots of sparse address
- * space, and to reduce the cost of memory to each process.
- *
- *	from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
- *	from: @(#)pmap.h	7.4 (Berkeley) 5/12/91
- *	from: src/sys/i386/include/pmap.h,v 1.65.2.2 2000/11/30 01:54:42 peter
- *	JNPR: pmap.h,v 1.7.2.1 2007/09/10 07:44:12 girish
- *      $FreeBSD$
- */
-
-#ifndef _MACHINE_PMAP_H_
-#define	_MACHINE_PMAP_H_
-
-#include <vm/vm_param.h>
-#include <machine/pte.h>
-
-#if defined(__mips_n32) || defined(__mips_n64) /* PHYSADDR_64BIT */
-#define	NKPT		256	/* mem > 4G, vm_page_startup needs more KPTs */
-#else
-#define	NKPT		120	/* actual number of kernel page tables */
-#endif
-
-#ifndef LOCORE
-
-#include <sys/queue.h>
-#include <sys/_cpuset.h>
-#include <sys/_lock.h>
-#include <sys/_mutex.h>
-
-/*
- * Pmap stuff
- */
-struct pv_entry;
-struct pv_chunk;
-
-struct md_page {
-	int pv_flags;
-	TAILQ_HEAD(, pv_entry) pv_list;
-};
-
-#define	PV_TABLE_REF		0x02	/* referenced */
-#define	PV_MEMATTR_MASK		0xf0	/* store vm_memattr_t here */
-#define	PV_MEMATTR_SHIFT	0x04
-
-#define	ASID_BITS		8
-#define	ASIDGEN_BITS		(32 - ASID_BITS)
-#define	ASIDGEN_MASK		((1 << ASIDGEN_BITS) - 1)
-
-struct pmap {
-	pd_entry_t *pm_segtab;	/* KVA of segment table */
-	TAILQ_HEAD(, pv_chunk)	pm_pvchunk;	/* list of mappings in pmap */
-	cpuset_t	pm_active;		/* active on cpus */
-	struct {
-		u_int32_t asid:ASID_BITS;	/* TLB address space tag */
-		u_int32_t gen:ASIDGEN_BITS;	/* its generation number */
-	}      pm_asid[MAXSMPCPU];
-	struct pmap_statistics pm_stats;	/* pmap statistics */
-	struct mtx pm_mtx;
-};
-
-typedef struct pmap *pmap_t;
-
-#ifdef	_KERNEL
-
-pt_entry_t *pmap_pte(pmap_t, vm_offset_t);
-vm_paddr_t pmap_kextract(vm_offset_t va);
-
-#define	vtophys(va)	pmap_kextract(((vm_offset_t) (va)))
-#define	pmap_asid(pmap)	(pmap)->pm_asid[PCPU_GET(cpuid)].asid
-
-extern struct pmap	kernel_pmap_store;
-#define kernel_pmap	(&kernel_pmap_store)
-
-#define	PMAP_LOCK(pmap)		mtx_lock(&(pmap)->pm_mtx)
-#define	PMAP_LOCK_ASSERT(pmap, type)	mtx_assert(&(pmap)->pm_mtx, (type))
-#define	PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
-#define	PMAP_LOCK_INIT(pmap)	mtx_init(&(pmap)->pm_mtx, "pmap", \
-				    NULL, MTX_DEF)
-#define	PMAP_LOCKED(pmap)	mtx_owned(&(pmap)->pm_mtx)
-#define	PMAP_MTX(pmap)		(&(pmap)->pm_mtx)
-#define	PMAP_TRYLOCK(pmap)	mtx_trylock(&(pmap)->pm_mtx)
-#define	PMAP_UNLOCK(pmap)	mtx_unlock(&(pmap)->pm_mtx)
-
-/*
- * For each vm_page_t, there is a list of all currently valid virtual
- * mappings of that page.  An entry is a pv_entry_t, the list is pv_table.
- */
-typedef struct pv_entry {
-	vm_offset_t pv_va;	/* virtual address for mapping */
-	TAILQ_ENTRY(pv_entry) pv_list;
-}       *pv_entry_t;
-
-/*
- * pv_entries are allocated in chunks per-process.  This avoids the
- * need to track per-pmap assignments.
- */
-#ifdef __mips_n64
-#define	_NPCM	3
-#define	_NPCPV	168
-#else
-#define	_NPCM	11
-#define	_NPCPV	336
-#endif
-struct pv_chunk {
-	pmap_t			pc_pmap;
-	TAILQ_ENTRY(pv_chunk)	pc_list;
-	u_long			pc_map[_NPCM];	/* bitmap; 1 = free */
-	TAILQ_ENTRY(pv_chunk)	pc_lru;
-	struct pv_entry		pc_pventry[_NPCPV];
-};
-
-/*
- * physmem_desc[] is a superset of phys_avail[] and describes all the
- * memory present in the system.
- *
- * phys_avail[] is similar but does not include the memory stolen by
- * pmap_steal_memory().
- *
- * Each memory region is described by a pair of elements in the array
- * so we can describe up to (PHYS_AVAIL_ENTRIES / 2) distinct memory
- * regions.
- */
-extern vm_paddr_t physmem_desc[PHYS_AVAIL_COUNT];
-
-extern vm_offset_t virtual_avail;
-extern vm_offset_t virtual_end;
-
-#define	pmap_page_get_memattr(m) (((m)->md.pv_flags & PV_MEMATTR_MASK) >> PV_MEMATTR_SHIFT)
-#define	pmap_page_is_mapped(m)	(!TAILQ_EMPTY(&(m)->md.pv_list))
-#define	pmap_page_is_write_mapped(m)	(((m)->a.flags & PGA_WRITEABLE) != 0)
-
-#define	pmap_vm_page_alloc_check(m)
-
-void pmap_bootstrap(void);
-void *pmap_mapdev(vm_paddr_t, vm_size_t);
-void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t);
-void pmap_unmapdev(vm_offset_t, vm_size_t);
-vm_offset_t pmap_steal_memory(vm_size_t size);
-void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
-void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t attr);
-void pmap_kenter_device(vm_offset_t, vm_size_t, vm_paddr_t);
-void pmap_kremove(vm_offset_t va);
-void pmap_kremove_device(vm_offset_t, vm_size_t);
-void *pmap_kenter_temporary(vm_paddr_t pa, int i);
-void pmap_kenter_temporary_free(vm_paddr_t pa);
-void pmap_flush_pvcache(vm_page_t m);
-int pmap_emulate_modified(pmap_t pmap, vm_offset_t va);
-void pmap_page_set_memattr(vm_page_t, vm_memattr_t);
-int pmap_change_attr(vm_offset_t, vm_size_t, vm_memattr_t);
-
-static inline int
-pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused)
-{
-
-	return (0);
-}
-
-static inline bool
-pmap_ps_enabled(pmap_t pmap __unused)
-{
-	return (false);
-}
-
-#endif				/* _KERNEL */
-
-#endif				/* !LOCORE */
-
-#endif				/* !_MACHINE_PMAP_H_ */
diff --git a/sys/mips/include/pmc_mdep.h b/sys/mips/include/pmc_mdep.h
deleted file mode 100644
index 1386866b30e8..000000000000
--- a/sys/mips/include/pmc_mdep.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * This file is in the public domain.
- *
- *	from: src/sys/alpha/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:06 jkoshy
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PMC_MDEP_H_
-#define	_MACHINE_PMC_MDEP_H_
-
-#define	PMC_MDEP_CLASS_INDEX_MIPS	1
-
-union pmc_md_op_pmcallocate {
-	uint64_t	__pad[4];
-};
-
-/* Logging */
-#if defined(__mips_n64)
-#define	PMCLOG_READADDR		PMCLOG_READ64
-#define	PMCLOG_EMITADDR		PMCLOG_EMIT64
-#else
-#define	PMCLOG_READADDR		PMCLOG_READ32
-#define	PMCLOG_EMITADDR		PMCLOG_EMIT32
-#endif
-
-#if	_KERNEL
-
-/*
- * MIPS event codes are encoded with a select bit.  The
- * select bit is used when writing to CP0 so that we 
- * can select either counter 0/2 or 1/3.  The cycle
- * and instruction counters are special in that they
- * can be counted on either 0/2 or 1/3.
- */
-
-#define MIPS_CTR_ALL	255 /* Count events in any counter. */
-#define MIPS_CTR_0	0 /* Counter 0 Event */
-#define MIPS_CTR_1	1 /* Counter 1 Event */
-
-struct mips_event_code_map {
-	uint32_t	pe_ev;       /* enum value */
-	uint8_t         pe_counter;  /* Which counter this can be counted in. */
-	uint8_t		pe_code;     /* numeric code */
-};
-
-struct mips_pmc_spec {
-	uint32_t	ps_cpuclass;
-	uint32_t	ps_cputype;
-	uint32_t	ps_capabilities;
-	int		ps_counter_width;
-};
-
-union pmc_md_pmc {
-	uint32_t	pm_mips_evsel;
-};
-
-#define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->pc)
-
-extern const struct mips_event_code_map mips_event_codes[];
-extern const int mips_event_codes_size;
-extern int mips_npmcs;
-extern struct mips_pmc_spec mips_pmc_spec;
-
-/*
- * Prototypes
- */
-struct pmc_mdep *pmc_mips_initialize(void);
-void		pmc_mips_finalize(struct pmc_mdep *_md);
-
-/*
- * CPU-specific functions
- */
-
-uint32_t	mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps);
-uint64_t	mips_pmcn_read(unsigned int pmc);
-uint64_t	mips_pmcn_write(unsigned int pmc, uint64_t v);
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PMC_MDEP_H_ */
diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h
deleted file mode 100644
index e4df9e81b7bc..000000000000
--- a/sys/mips/include/proc.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*	$OpenBSD: proc.h,v 1.2 1998/09/15 10:50:12 pefo Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)proc.h	8.1 (Berkeley) 6/10/93
- *	JNPR: proc.h,v 1.7.2.1 2007/09/10 06:25:24 girish
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PROC_H_
-#define	_MACHINE_PROC_H_
-
-#ifdef	CPU_CNMIPS
-#include <machine/octeon_cop2.h>
-#endif
-
-/*
- * Machine-dependent part of the proc structure.
- */
-struct mdthread {
-	int		md_flags;	/* machine-dependent flags */
-#if defined(__mips_n64) || defined(__mips_n32) /*  PHYSADDR_64_BIT */
-	uint64_t	md_upte[KSTACK_PAGES];	/* ptes for mapping u pcb */
-#else
-	int		md_upte[KSTACK_PAGES];
-#endif
-	uintptr_t	md_ss_addr;	/* single step address for ptrace */
-	int		md_ss_instr;	/* single step instruction for ptrace */
-	register_t	md_saved_intr;
-	u_int		md_spinlock_count;
-/* The following is CPU dependent, but kept in for compatibility */
-	int		md_pc_ctrl;	/* performance counter control */
-	int		md_pc_count;	/* performance counter */
-	int		md_pc_spill;	/* performance counter spill */
-	void		*md_tls;
-#ifdef	CPU_CNMIPS
-	struct octeon_cop2_state	*md_cop2; /* kernel context */
-	struct octeon_cop2_state	*md_ucop2; /* userland context */
-#define	COP2_OWNER_USERLAND	0x0000		/* Userland owns COP2 */
-#define	COP2_OWNER_KERNEL	0x0001		/* Kernel owns COP2 */
-	int		md_cop2owner;
-#endif
-};
-
-/* md_flags */
-#define	MDTD_FPUSED	0x0001		/* Process used the FPU */
-#define	MDTD_COP2USED	0x0002		/* Process used the COP2 */
-
-struct mdproc {
-	size_t		md_tls_tcb_offset;	/* TCB offset */
-};
-
-#ifdef __mips_n64
-#define	KINFO_PROC_SIZE 1088
-#define	KINFO_PROC32_SIZE 816
-#else
-#define	KINFO_PROC_SIZE 816
-#endif
-
-#ifdef _KERNEL
-#include <machine/pcb.h>
-
-/* Get the current kernel thread stack usage. */
-#define	GET_STACK_USAGE(total, used) do {				\
-	struct thread *td = curthread;					\
-	(total) = td->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb);	\
-	(used) = td->td_kstack + (total) - (vm_offset_t)&td;		\
-} while (0)
-
-#endif  /* _KERNEL */
-#endif	/* !_MACHINE_PROC_H_ */
diff --git a/sys/mips/include/procctl.h b/sys/mips/include/procctl.h
deleted file mode 100644
index 5221cfcd7be1..000000000000
--- a/sys/mips/include/procctl.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*-
- * This file is in the public domain.
- */
-/* $FreeBSD$ */
diff --git a/sys/mips/include/profile.h b/sys/mips/include/profile.h
deleted file mode 100644
index 5968deb60b43..000000000000
--- a/sys/mips/include/profile.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*	$OpenBSD: profile.h,v 1.2 1999/01/27 04:46:05 imp Exp $ */
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)profile.h	8.1 (Berkeley) 6/10/93
- *	JNPR: profile.h,v 1.4 2006/12/02 09:53:41 katta
- * $FreeBSD$
- */
-#ifndef _MACHINE_PROFILE_H_
-#define	_MACHINE_PROFILE_H_
-
-#define	_MCOUNT_DECL void ___mcount
-
-/*XXX The cprestore instruction is a "dummy" to shut up as(1). */
-
-/*XXX This is not MIPS64 safe. */
-
-#define	MCOUNT \
-	__asm(".text;"			\
-	".globl _mcount;"		\
-	".type _mcount,@function;"	\
-	"_mcount:;"			\
-	".set noreorder;"		\
-	".set noat;"			\
-	".cpload $25;"			\
-	".cprestore 4;"			\
-	"sw $4,8($29);"			\
-	"sw $5,12($29);"		\
-	"sw $6,16($29);"		\
-	"sw $7,20($29);"		\
-	"sw $1,0($29);"			\
-	"sw $31,4($29);"		\
-	"move $5,$31;"			\
-	"jal ___mcount;"		\
-	"move $4,$1;"			\
-	"lw $4,8($29);"			\
-	"lw $5,12($29);"		\
-	"lw $6,16($29);"		\
-	"lw $7,20($29);"		\
-	"lw $31,4($29);"		\
-	"lw $1,0($29);"			\
-	"addu $29,$29,8;"		\
-	"j $31;"			\
-	"move $31,$1;"			\
-	".set reorder;"			\
-	".set at");
-
-#ifdef _KERNEL
-#define	MCOUNT_DECL(s)	u_long s;
-#ifdef SMP
-extern int	mcount_lock;
-#define	MCOUNT_ENTER(s)	{					\
-	s = intr_disable();					\
-	while (!atomic_cmpset_acq_int(&mcount_lock, 0, 1))	\
-		/* nothing */ ;					\
-}
-#define	MCOUNT_EXIT(s)	{					\
-	atomic_store_rel_int(&mcount_lock, 0);			\
-	intr_restore(s);						\
-}
-#else
-#define	MCOUNT_ENTER(s)	{ s = intr_disable(); }
-#define	MCOUNT_EXIT(s)	(intr_restore(s))
-#endif
-
-/* REVISIT for mips */
-/*
- * Config generates something to tell the compiler to align functions on 16
- * byte boundaries.  A strict alignment is good for keeping the tables small.
- */
-#define	FUNCTION_ALIGNMENT	16
-
-#ifdef GUPROF
-struct gmonparam;
-void	stopguprof __P((struct gmonparam *p));
-#else
-#define	stopguprof(p)
-#endif /* GUPROF */
-
-#else	/* !_KERNEL */
-
-#define	FUNCTION_ALIGNMENT	4
-
-#ifdef __mips_n64
-typedef u_long	uintfptr_t;
-#else
-typedef u_int	uintfptr_t;
-#endif
-
-#endif /* _KERNEL */
-
-/*
- * An unsigned integral type that can hold non-negative difference between
- * function pointers.
- */
-#ifdef __mips_n64
-typedef u_long	fptrdiff_t;
-#else
-typedef u_int	fptrdiff_t;
-#endif
-
-#ifdef _KERNEL
-
-void	mcount(uintfptr_t frompc, uintfptr_t selfpc);
-
-#ifdef GUPROF
-struct gmonparam;
-
-void	nullfunc_loop_profiled(void);
-void	nullfunc_profiled(void);
-void	startguprof(struct gmonparam *p);
-void	stopguprof(struct gmonparam *p);
-#else
-#define	startguprof(p)
-#define	stopguprof(p)
-#endif /* GUPROF */
-
-#else /* !_KERNEL */
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-#ifdef __GNUC__
-#ifdef __ELF__
-void	mcount(void) __asm(".mcount");
-#else
-void	mcount(void) __asm("mcount");
-#endif
-#endif
-void	_mcount(uintfptr_t frompc, uintfptr_t selfpc);
-__END_DECLS
-
-#endif /* _KERNEL */
-
-#ifdef GUPROF
-/* XXX doesn't quite work outside kernel yet. */
-extern int	cputime_bias;
-
-__BEGIN_DECLS
-int	cputime(void);
-void	empty_loop(void);
-void	mexitcount(uintfptr_t selfpc);
-void	nullfunc(void);
-void	nullfunc_loop(void);
-__END_DECLS
-#endif
-
-#endif /* !_MACHINE_PROFILE_H_ */
diff --git a/sys/mips/include/pte.h b/sys/mips/include/pte.h
deleted file mode 100644
index 19d4ad341952..000000000000
--- a/sys/mips/include/pte.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_PTE_H_
-#define	_MACHINE_PTE_H_
-
-#ifndef _LOCORE
-#if defined(__mips_n64) || defined(__mips_n32) /*  PHYSADDR_64_BIT */
-typedef	uint64_t pt_entry_t;
-#else
-typedef	uint32_t pt_entry_t;
-#endif
-typedef	pt_entry_t *pd_entry_t;
-#endif
-
-/*
- * TLB and PTE management.  Most things operate within the context of
- * EntryLo0,1, and begin with TLBLO_.  Things which work with EntryHi
- * start with TLBHI_.  PTE bits begin with PTE_.
- *
- * Note that we use the same size VM and TLB pages.
- */
-#define	TLB_PAGE_SHIFT	(PAGE_SHIFT)
-#define	TLB_PAGE_SIZE	(1 << TLB_PAGE_SHIFT)
-#define	TLB_PAGE_MASK	(TLB_PAGE_SIZE - 1)
-
-/*
- * TLB PageMask register.  Has mask bits set above the default, 4K, page mask.
- */
-#define	TLBMASK_SHIFT	(13)
-#define	TLBMASK_MASK	((PAGE_MASK >> TLBMASK_SHIFT) << TLBMASK_SHIFT)
-
-/*
- * FreeBSD/mips page-table entries take a near-identical format to MIPS TLB
- * entries, each consisting of two 32-bit or 64-bit values ("EntryHi" and
- * "EntryLo").  MIPS4k and MIPS64 both define certain bits in TLB entries as
- * reserved, and these must be zero-filled by software.  We overload these
- * bits in PTE entries to hold  PTE_ flags such as RO, W, and MANAGED.
- * However, we must mask these out when writing to TLB entries to ensure that
- * they do not become visible to hardware -- especially on MIPS64r2 which has
- * an extended physical memory space.
- *
- * When using n64 and n32, shift software-defined bits into the MIPS64r2
- * reserved range, which runs from bit 55 ... 63.  In other configurations
- * (32-bit MIPS4k and compatible), shift them out to bits 29 ... 31.
- *
- * NOTE: This means that for 32-bit use of CP0, we aren't able to set the top
- * bit of PFN to a non-zero value, as software is using it!  This physical
- * memory size limit may not be sufficiently enforced elsewhere.
- */
-#if defined(__mips_n64) || defined(__mips_n32) /*  PHYSADDR_64_BIT */
-#define	TLBLO_SWBITS_SHIFT	(55)
-#define	TLBLO_SWBITS_CLEAR_SHIFT	(9)
-#define	TLBLO_PFN_MASK		0x3FFFFFFC0ULL
-#else
-#define	TLBLO_SWBITS_SHIFT	(29)
-#define	TLBLO_SWBITS_CLEAR_SHIFT	(3)
-#define	TLBLO_PFN_MASK		(0x1FFFFFC0)
-#endif
-#define	TLBLO_PFN_SHIFT		(6)
-#define	TLBLO_SWBITS_MASK	((pt_entry_t)0x7 << TLBLO_SWBITS_SHIFT)
-#define	TLBLO_PA_TO_PFN(pa)	((((pa) >> TLB_PAGE_SHIFT) << TLBLO_PFN_SHIFT) & TLBLO_PFN_MASK)
-#define	TLBLO_PFN_TO_PA(pfn)	((vm_paddr_t)((pfn) >> TLBLO_PFN_SHIFT) << TLB_PAGE_SHIFT)
-#define	TLBLO_PTE_TO_PFN(pte)	((pte) & TLBLO_PFN_MASK)
-#define	TLBLO_PTE_TO_PA(pte)	(TLBLO_PFN_TO_PA(TLBLO_PTE_TO_PFN((pte))))
-
-/*
- * XXX This comment is not correct for anything more modern than R4K.
- *
- * VPN for EntryHi register.  Upper two bits select user, supervisor,
- * or kernel.  Bits 61 to 40 copy bit 63.  VPN2 is bits 39 and down to
- * as low as 13, down to PAGE_SHIFT, to index 2 TLB pages*.  From bit 12
- * to bit 8 there is a 5-bit 0 field.  Low byte is ASID.
- *
- * XXX This comment is not correct for FreeBSD.
- * Note that in FreeBSD, we map 2 TLB pages is equal to 1 VM page.
- */
-#define	TLBHI_ASID_MASK		(0xff)
-#if defined(__mips_n64)
-#define	TLBHI_R_SHIFT		62
-#define	TLBHI_R_USER		(0x00UL << TLBHI_R_SHIFT)
-#define	TLBHI_R_SUPERVISOR	(0x01UL << TLBHI_R_SHIFT)
-#define	TLBHI_R_KERNEL		(0x03UL << TLBHI_R_SHIFT)
-#define	TLBHI_R_MASK		(0x03UL << TLBHI_R_SHIFT)
-#define	TLBHI_VA_R(va)		((va) & TLBHI_R_MASK)
-#define	TLBHI_FILL_SHIFT	40
-#define	TLBHI_VPN2_SHIFT	(TLB_PAGE_SHIFT + 1)
-#define	TLBHI_VPN2_MASK		(((~((1UL << TLBHI_VPN2_SHIFT) - 1)) << (63 - TLBHI_FILL_SHIFT)) >> (63 - TLBHI_FILL_SHIFT))
-#define	TLBHI_VA_TO_VPN2(va)	((va) & TLBHI_VPN2_MASK)
-#define	TLBHI_ENTRY(va, asid)	((TLBHI_VA_R((va))) /* Region. */ | \
-				 (TLBHI_VA_TO_VPN2((va))) /* VPN2. */ | \
-				 ((asid) & TLBHI_ASID_MASK))
-#else /* !defined(__mips_n64) */
-#define	TLBHI_PAGE_MASK		(2 * PAGE_SIZE - 1)
-#define	TLBHI_ENTRY(va, asid)	(((va) & ~TLBHI_PAGE_MASK) | ((asid) & TLBHI_ASID_MASK))
-#endif /* defined(__mips_n64) */
-
-/*
- * TLB flags managed in hardware:
- * 	C:	Cache attribute.
- * 	D:	Dirty bit.  This means a page is writable.  It is not
- * 		set at first, and a write is trapped, and the dirty
- * 		bit is set.  See also PTE_RO.
- * 	V:	Valid bit.  Obvious, isn't it?
- * 	G:	Global bit.  This means that this mapping is present
- * 		in EVERY address space, and to ignore the ASID when
- * 		it is matched.
- */
-#define	PTE_C(attr)		((attr & 0x07) << 3)
-#define	PTE_C_MASK		(PTE_C(0x07))
-#define	PTE_C_UNCACHED		(PTE_C(MIPS_CCA_UNCACHED))
-#define	PTE_C_CACHE		(PTE_C(MIPS_CCA_CACHED))
-#define	PTE_C_WC		(PTE_C(MIPS_CCA_WC))
-#define	PTE_D			0x04
-#define	PTE_V			0x02
-#define	PTE_G			0x01
-
-/*
- * VM flags managed in software:
- * 	RO:	Read only.  Never set PTE_D on this page, and don't
- * 		listen to requests to write to it.
- * 	W:	Wired.  ???
- *	MANAGED:Managed.  This PTE maps a managed page.
- *
- * These bits should not be written into the TLB, so must first be masked out
- * explicitly in C, or using CLEAR_PTE_SWBITS() in assembly.
- */
-#define	PTE_RO			((pt_entry_t)0x01 << TLBLO_SWBITS_SHIFT)
-#define	PTE_W			((pt_entry_t)0x02 << TLBLO_SWBITS_SHIFT)
-#define	PTE_MANAGED		((pt_entry_t)0x04 << TLBLO_SWBITS_SHIFT)
-
-/*
- * PTE management functions for bits defined above.
- */
-#define	pte_clear(pte, bit)	(*(pte) &= ~(bit))
-#define	pte_set(pte, bit)	(*(pte) |= (bit))
-#define	pte_test(pte, bit)	((*(pte) & (bit)) == (bit))
-#define	pte_cache_bits(pte)	((*(pte) >> 3) & 0x07)
-
-/* Assembly support for PTE access*/
-#ifdef LOCORE
-#if defined(__mips_n64) || defined(__mips_n32) /*  PHYSADDR_64_BIT */
-#define	PTESHIFT		3
-#define	PTE2MASK		0xff0	/* for the 2-page lo0/lo1 */
-#define	PTEMASK			0xff8
-#define	PTESIZE			8
-#define	PTE_L			ld
-#define	PTE_MTC0		dmtc0
-#define	CLEAR_PTE_SWBITS(pr)
-#else
-#define	PTESHIFT		2
-#define	PTE2MASK		0xff8	/* for the 2-page lo0/lo1 */
-#define	PTEMASK			0xffc
-#define	PTESIZE			4
-#define	PTE_L			lw
-#define	PTE_MTC0		mtc0
-#define	CLEAR_PTE_SWBITS(r)	LONG_SLL r, TLBLO_SWBITS_CLEAR_SHIFT; LONG_SRL r, TLBLO_SWBITS_CLEAR_SHIFT /* remove swbits */
-#endif /* defined(__mips_n64) || defined(__mips_n32) */
-
-#if defined(__mips_n64)
-#define	PTRSHIFT		3
-#define	PDEPTRMASK		0xff8
-#else
-#define	PTRSHIFT		2
-#define	PDEPTRMASK		0xffc
-#endif
-
-#endif /* LOCORE */
-
-/* PageMask Register (CP0 Register 5, Select 0) Values */
-#define	MIPS3_PGMASK_MASKX	0x00001800
-#define	MIPS3_PGMASK_4K		0x00000000
-#define	MIPS3_PGMASK_16K	0x00006000
-#define	MIPS3_PGMASK_64K	0x0001e000
-#define	MIPS3_PGMASK_256K	0x0007e000
-#define	MIPS3_PGMASK_1M		0x001fe000
-#define	MIPS3_PGMASK_4M		0x007fe000
-#define	MIPS3_PGMASK_16M	0x01ffe000
-#define	MIPS3_PGMASK_64M	0x07ffe000
-#define	MIPS3_PGMASK_256M	0x1fffe000
-
-#endif /* !_MACHINE_PTE_H_ */
diff --git a/sys/mips/include/ptrace.h b/sys/mips/include/ptrace.h
deleted file mode 100644
index 401c171906fb..000000000000
--- a/sys/mips/include/ptrace.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)ptrace.h	8.1 (Berkeley) 6/11/93
- *	from: src/sys/i386/include/ptrace.h,v 1.14 2005/05/31 09:43:04 dfr
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_PTRACE_H_
-#define	_MACHINE_PTRACE_H_
-
-#endif
diff --git a/sys/mips/include/reg.h b/sys/mips/include/reg.h
deleted file mode 100644
index 440b791bffc7..000000000000
--- a/sys/mips/include/reg.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*	$OpenBSD: reg.h,v 1.1 1998/01/28 11:14:53 pefo Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: reg.h 1.1 90/07/09
- *	@(#)reg.h	8.2 (Berkeley) 1/11/94
- *	JNPR: reg.h,v 1.6 2006/09/15 12:52:34 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_REG_H_
-#define	_MACHINE_REG_H_
-
-/*
- * Location of the users' stored registers relative to ZERO.
- * must be visible to assembly code.
- */
-#include <machine/regnum.h>
-
-/*
- * Register set accessible via /proc/$pid/reg
- */
-struct reg {
-	register_t r_regs[NUMSAVEREGS];	/* numbered as above */
-};
-
-struct fpreg {
-	f_register_t r_regs[NUMFPREGS];
-};
-
-/*
- * Placeholder.
- */
-struct dbreg {
-	unsigned long junk;
-};
-
-#ifdef __LP64__
-/* Must match struct trapframe */
-struct reg32 {
-	uint32_t r_regs[NUMSAVEREGS];
-};
-
-struct fpreg32 {
-	int32_t r_regs[NUMFPREGS];
-};
-
-struct dbreg32 {
-	uint32_t junk;
-};
-
-#define __HAVE_REG32
-#endif
-
-#ifdef COMPAT_FREEBSD32
-#define	fill_dbregs32(td, reg)	0
-#define	set_dbregs32(td, reg)	0
-#endif
-
-#endif /* !_MACHINE_REG_H_ */
diff --git a/sys/mips/include/regdef.h b/sys/mips/include/regdef.h
deleted file mode 100644
index 5a6b57f30672..000000000000
--- a/sys/mips/include/regdef.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*	$NetBSD: regdef.h,v 1.12 2005/12/11 12:18:09 christos Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell. This file is derived from the MIPS RISC
- * Architecture book by Gerry Kane.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)regdef.h	8.1 (Berkeley) 6/10/93
- * $FreeBSD$
- */
-
-#ifndef _MIPS_REGDEF_H
-#define _MIPS_REGDEF_H
-
-#include <machine/cdefs.h>	/* for API selection */
-
-#define zero	$0	/* always zero */
-#define AT	$at	/* assembler temporary */
-#define v0	$2	/* return value */
-#define v1	$3
-#define a0	$4	/* argument registers */
-#define a1	$5
-#define a2	$6
-#define a3	$7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	a4	$8
-#define	a5	$9
-#define	a6	$10
-#define	a7	$11
-#define	t0	$12	/* temp registers (not saved across subroutine calls) */
-#define	t1	$13
-#define	t2	$14
-#define	t3	$15
-#else
-#define t0	$8	/* temp registers (not saved across subroutine calls) */
-#define t1	$9
-#define t2	$10
-#define t3	$11
-#define t4	$12
-#define t5	$13
-#define t6	$14
-#define t7	$15
-#endif /* __mips_n32 || __mips_n64 */
-#define s0	$16	/* saved across subroutine calls (callee saved) */
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* two more temporary registers */
-#define t9	$25
-#define k0	$26	/* kernel temporary */
-#define k1	$27
-#define gp	$28	/* global pointer */
-#define sp	$29	/* stack pointer */
-#define s8	$30	/* one more callee saved */
-#define ra	$31	/* return address */
-
-/*
- * These are temp registers whose names can be used in either the old
- * or new ABI, although they map to different physical registers.  In
- * the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7.
- *
- * Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3
- * should be used only when we need more than t0-t3.
- */
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	ta0	$8
-#define	ta1	$9
-#define	ta2	$10
-#define	ta3	$11
-#else
-#define	ta0	$12
-#define	ta1	$13
-#define	ta2	$14
-#define	ta3	$15
-#endif /* __mips_n32 || __mips_n64 */
-
-#endif /* _MIPS_REGDEF_H */
diff --git a/sys/mips/include/regnum.h b/sys/mips/include/regnum.h
deleted file mode 100644
index e88fe2d061e7..000000000000
--- a/sys/mips/include/regnum.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/*	$OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: reg.h 1.1 90/07/09
- *	@(#)reg.h	8.2 (Berkeley) 1/11/94
- *	JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_REGNUM_H_
-#define	_MACHINE_REGNUM_H_
-
-#define	NUMSAVEREGS	40
-#define	NUMFPREGS	34
-
-/*
- * Location of the saved registers relative to ZERO.
- * This must match struct trapframe defined in frame.h exactly.
- * This must also match regdef.h.
- */
-#if defined(_KERNEL) || defined(_WANT_MIPS_REGNUM)
-#define	ZERO	0
-#define	AST	1
-#define	V0	2
-#define	V1	3
-#define	A0	4
-#define	A1	5
-#define	A2	6
-#define	A3	7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	A4	8
-#define	A5	9
-#define	A6	10
-#define	A7	11
-#define	T0	12
-#define	T1	13
-#define	T2	14
-#define	T3	15
-#else
-#define	T0	8
-#define	T1	9
-#define	T2	10
-#define	T3	11
-#define	T4	12
-#define	T5	13
-#define	T6	14
-#define	T7	15
-#endif
-#define	S0	16
-#define	S1	17
-#define	S2	18
-#define	S3	19
-#define	S4	20
-#define	S5	21
-#define	S6	22
-#define	S7	23
-#define	T8	24
-#define	T9	25
-#define	K0	26
-#define	K1	27
-#define	GP	28
-#define	SP	29
-#define	S8	30
-#define	RA	31
-#define	SR	32
-#define	PS	SR	/* alias for SR */
-#define	MULLO	33
-#define	MULHI	34
-#define	BADVADDR 35
-#define	CAUSE	36
-#define	PC	37
-/*
- * IC is valid only on RM7K and RM9K processors. Access to this is
- * controlled by IC_INT_REG which defined in kernel config
- */
-#define	IC	38
-#define	DUMMY	39	/* for 8 byte alignment */
-
-/*
- * Pseudo registers so we save a complete set of registers regardless of
- * the ABI. See regdef.h for a more complete explanation.
- */
-#if defined(__mips_n32) || defined(__mips_n64)
-#define	TA0	8
-#define	TA1	9
-#define	TA2	10
-#define	TA3	11
-#else
-#define	TA0	12
-#define	TA1	13
-#define	TA2	14
-#define	TA3	15
-#endif
-
-/*
- * Index of FP registers in 'struct frame', counting from the beginning
- * of the frame (i.e., including the general registers).
- */
-#define	FPBASE	NUMSAVEREGS
-#define	F0	(FPBASE+0)
-#define	F1	(FPBASE+1)
-#define	F2	(FPBASE+2)
-#define	F3	(FPBASE+3)
-#define	F4	(FPBASE+4)
-#define	F5	(FPBASE+5)
-#define	F6	(FPBASE+6)
-#define	F7	(FPBASE+7)
-#define	F8	(FPBASE+8)
-#define	F9	(FPBASE+9)
-#define	F10	(FPBASE+10)
-#define	F11	(FPBASE+11)
-#define	F12	(FPBASE+12)
-#define	F13	(FPBASE+13)
-#define	F14	(FPBASE+14)
-#define	F15	(FPBASE+15)
-#define	F16	(FPBASE+16)
-#define	F17	(FPBASE+17)
-#define	F18	(FPBASE+18)
-#define	F19	(FPBASE+19)
-#define	F20	(FPBASE+20)
-#define	F21	(FPBASE+21)
-#define	F22	(FPBASE+22)
-#define	F23	(FPBASE+23)
-#define	F24	(FPBASE+24)
-#define	F25	(FPBASE+25)
-#define	F26	(FPBASE+26)
-#define	F27	(FPBASE+27)
-#define	F28	(FPBASE+28)
-#define	F29	(FPBASE+29)
-#define	F30	(FPBASE+30)
-#define	F31	(FPBASE+31)
-#define	FSR	(FPBASE+32)
-#define FIR	(FPBASE+33)
-
-/*
- * Index of FP registers in 'struct frame', relative to the base
- * of the FP registers in frame (i.e., *not* including the general
- * registers).
- */
-#define	F0_NUM	(0)
-#define	F1_NUM	(1)
-#define	F2_NUM	(2)
-#define	F3_NUM	(3)
-#define	F4_NUM	(4)
-#define	F5_NUM	(5)
-#define	F6_NUM	(6)
-#define	F7_NUM	(7)
-#define	F8_NUM	(8)
-#define	F9_NUM	(9)
-#define	F10_NUM	(10)
-#define	F11_NUM	(11)
-#define	F12_NUM	(12)
-#define	F13_NUM	(13)
-#define	F14_NUM	(14)
-#define	F15_NUM	(15)
-#define	F16_NUM	(16)
-#define	F17_NUM	(17)
-#define	F18_NUM	(18)
-#define	F19_NUM	(19)
-#define	F20_NUM	(20)
-#define	F21_NUM	(21)
-#define	F22_NUM	(22)
-#define	F23_NUM	(23)
-#define	F24_NUM	(24)
-#define	F25_NUM	(25)
-#define	F26_NUM	(26)
-#define	F27_NUM	(27)
-#define	F28_NUM	(28)
-#define	F29_NUM	(29)
-#define	F30_NUM	(30)
-#define	F31_NUM	(31)
-#define	FSR_NUM	(32)
-#define	FIR_NUM	(33)
-
-#endif	/* _KERNEL || _WANT_MIPS_REGNUM */
-
-#endif /* !_MACHINE_REGNUM_H_ */
diff --git a/sys/mips/include/reloc.h b/sys/mips/include/reloc.h
deleted file mode 100644
index 7b5610bda2af..000000000000
--- a/sys/mips/include/reloc.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1998 John Birrell <jb@cimlogic.com.au>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by John Birrell.
- * 4. Neither the name of the author nor the names of any co-contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/reloc.h,v 1.1.1.1.6.1 2000/08/03 00:48:04 peter
- *	JNPR: reloc.h,v 1.3 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
diff --git a/sys/mips/include/resource.h b/sys/mips/include/resource.h
deleted file mode 100644
index ec279cd1c513..000000000000
--- a/sys/mips/include/resource.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission.	 M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose.  It is provided "as is" without express or implied
- * warranty.
- * 
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''.  M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *	from: src/sys/i386/include/resource.h,v 1.3 1999/10/14 21:38:30 dfr
- *	JNPR: resource.h,v 1.3 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_RESOURCE_H_
-#define	_MACHINE_RESOURCE_H_	1
-
-/*
- * Definitions of resource types for Intel Architecture machines
- * with support for legacy ISA devices and drivers.
- */
-
-#define	SYS_RES_IRQ	1	/* interrupt lines */
-#define	SYS_RES_DRQ	2	/* isa dma lines */
-#define	SYS_RES_MEMORY	3	/* i/o memory */
-#define	SYS_RES_IOPORT	4	/* i/o ports */
-#ifdef NEW_PCIB
-#define	PCI_RES_BUS	5
-#endif
-
-#endif /* !_MACHINE_RESOURCE_H_ */
diff --git a/sys/mips/include/runq.h b/sys/mips/include/runq.h
deleted file mode 100644
index d3207b3fa0f5..000000000000
--- a/sys/mips/include/runq.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2001 Jake Burkholder <jake@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: src/sys/i386/include/runq.h,v 1.3 2005/01/06 22:18:15 imp
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_RUNQ_H_
-#define	_MACHINE_RUNQ_H_
-
-#ifdef __mips_n64
-#define	RQB_LEN		(1)		/* Number of priority status words. */
-#define	RQB_L2BPW	(6)		/* Log2(sizeof(rqb_word_t) * NBBY)). */
-#else
-#define	RQB_LEN		(2)		/* Number of priority status words. */
-#define	RQB_L2BPW	(5)		/* Log2(sizeof(rqb_word_t) * NBBY)). */
-#endif
-#define	RQB_BPW		(1<<RQB_L2BPW)	/* Bits in an rqb_word_t. */
-
-#define	RQB_BIT(pri)	(1ul << ((pri) & (RQB_BPW - 1)))
-#define	RQB_WORD(pri)	((pri) >> RQB_L2BPW)
-
-#ifdef __mips_n64
-#define	RQB_FFS(word)	(ffsl(word) - 1)
-#else
-#define	RQB_FFS(word)	(ffs(word) - 1)
-#endif
-
-/*
- * Type of run queue status word.
- */
-#ifdef __mips_n64
-typedef	u_int64_t	rqb_word_t;
-#else
-typedef	u_int32_t	rqb_word_t;
-#endif
-
-#endif
diff --git a/sys/mips/include/sc_machdep.h b/sys/mips/include/sc_machdep.h
deleted file mode 100644
index 61a2a86f702d..000000000000
--- a/sys/mips/include/sc_machdep.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003 Jake Burkholder.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_SC_MACHDEP_H_
-#define	_MACHINE_SC_MACHDEP_H_
-
-/* Color attributes for foreground text */
-
-#define	FG_BLACK		0x0
-#define	FG_BLUE			0x1
-#define	FG_GREEN		0x2
-#define	FG_CYAN			0x3
-#define	FG_RED			0x4
-#define	FG_MAGENTA		0x5
-#define	FG_BROWN		0x6
-#define	FG_LIGHTGREY		0x7	/* aka white */
-#define	FG_DARKGREY		0x8
-#define	FG_LIGHTBLUE		0x9
-#define	FG_LIGHTGREEN		0xa
-#define	FG_LIGHTCYAN		0xb
-#define	FG_LIGHTRED		0xc
-#define	FG_LIGHTMAGENTA		0xd
-#define	FG_YELLOW		0xe
-#define	FG_WHITE		0xf	/* aka bright white */
-#define	FG_BLINK		0x80
-
-/* Color attributes for text background */
-
-#define	BG_BLACK		0x00
-#define	BG_BLUE			0x10
-#define	BG_GREEN		0x20
-#define	BG_CYAN			0x30
-#define	BG_RED			0x40
-#define	BG_MAGENTA		0x50
-#define	BG_BROWN		0x60
-#define	BG_LIGHTGREY		0x70
-#define	BG_DARKGREY		0x80
-#define	BG_LIGHTBLUE		0x90
-#define	BG_LIGHTGREEN		0xa0
-#define	BG_LIGHTCYAN		0xb0
-#define	BG_LIGHTRED		0xc0
-#define	BG_LIGHTMAGENTA		0xd0
-#define	BG_YELLOW		0xe0
-#define	BG_WHITE		0xf0
-
-#endif /* !_MACHINE_SC_MACHDEP_H_ */
diff --git a/sys/mips/include/setjmp.h b/sys/mips/include/setjmp.h
deleted file mode 100644
index 8b6ca0478fda..000000000000
--- a/sys/mips/include/setjmp.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* From: NetBSD: setjmp.h,v 1.2 1997/04/06 08:47:41 cgd Exp */
-
-/*-
- * SPDX-License-Identifier: MIT-CMU
- *
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- *
- *	JNPR: setjmp.h,v 1.2 2006/12/02 09:53:41 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_SETJMP_H_
-#define	_MACHINE_SETJMP_H_
-
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- */
-
-#include <sys/cdefs.h>
-
-#define	_JBLEN	95		/* size, in longs (or long longs), of a jmp_buf */
-
-/*
- * jmp_buf and sigjmp_buf are encapsulated in different structs to force
- * compile-time diagnostics for mismatches.  The structs are the same
- * internally to avoid some run-time errors for mismatches.
- */
-#ifndef _LOCORE
-#ifndef __ASSEMBLER__
-#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE
-#ifdef __mips_n32
-typedef struct _sigjmp_buf { long long _sjb[_JBLEN + 1]; } sigjmp_buf[1];
-#else
-typedef struct _sigjmp_buf { long _sjb[_JBLEN + 1]; } sigjmp_buf[1];
-#endif
-#endif
-
-#ifdef __mips_n32
-typedef struct _jmp_buf { long long _jb[_JBLEN + 1]; } jmp_buf[1];
-#else
-typedef struct _jmp_buf { long _jb[_JBLEN + 1]; } jmp_buf[1];
-#endif
-#endif /* __ASSEMBLER__ */
-#endif /* _LOCORE */
-
-#endif /* _MACHINE_SETJMP_H_ */
diff --git a/sys/mips/include/sf_buf.h b/sys/mips/include/sf_buf.h
deleted file mode 100644
index 27051674d1d2..000000000000
--- a/sys/mips/include/sf_buf.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003 Alan L. Cox <alc@cs.rice.edu>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_SF_BUF_H_
-#define _MACHINE_SF_BUF_H_
-
-#ifdef __mips_n64	/* In 64 bit the whole memory is directly mapped */
-
-static inline vm_offset_t
-sf_buf_kva(struct sf_buf *sf)
-{
-	vm_page_t	m;
-
-	m = (vm_page_t)sf;
-	return (MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m)));
-}
-
-static inline struct vm_page *
-sf_buf_page(struct sf_buf *sf)
-{
-
-	return ((vm_page_t)sf);
-}
-
-#else	/* !__mips_n64 */
-
-static inline void
-sf_buf_map(struct sf_buf *sf, int flags)
-{
-
-	pmap_qenter(sf->kva, &sf->m, 1);
-}
-
-static inline int
-sf_buf_unmap(struct sf_buf *sf)
-{
-
-	pmap_qremove(sf->kva, 1);
-	return (1);
-}
-
-#endif	/* __mips_n64 */
-
-#endif /* !_MACHINE_SF_BUF_H_ */
diff --git a/sys/mips/include/sigframe.h b/sys/mips/include/sigframe.h
deleted file mode 100644
index 3b9314d8b6e2..000000000000
--- a/sys/mips/include/sigframe.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1999 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer 
- *    in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/sigframe.h,v 1.1 1999/09/29 15:06:26 marcel
- *	from: sigframe.h,v 1.1 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-#ifndef _MACHINE_SIGFRAME_H_
-#define	_MACHINE_SIGFRAME_H_
-
-/*
- * WARNING: code in locore.s assumes the layout shown for sf_signum
- * thru sf_addr so... don't alter them!
- */
-struct sigframe {
-	register_t	sf_signum;
-	register_t	sf_siginfo;	/* code or pointer to sf_si */
-	register_t	sf_ucontext;	/* points to sf_uc */
-	register_t	sf_addr;	/* undocumented 4th arg */
-	ucontext_t	sf_uc;		/* = *sf_ucontext */
-	siginfo_t	sf_si;		/* = *sf_siginfo (SA_SIGINFO case) */
-	unsigned long	__spare__[2];
-};
-
-#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
-#include <compat/freebsd32/freebsd32_signal.h>
-
-struct sigframe32 {
-	int32_t		sf_signum;
-	int32_t		sf_siginfo;	/* code or pointer to sf_si */
-	int32_t		sf_ucontext;	/* points to sf_uc */
-	int32_t		sf_addr;	/* undocumented 4th arg */
-	ucontext32_t	sf_uc;		/* = *sf_ucontext */
-	struct siginfo32	sf_si;	/* = *sf_siginfo (SA_SIGINFO case) */
-	uint32_t	__spare__[2];
-};
-#endif
-
-#endif /* !_MACHINE_SIGFRAME_H_ */
diff --git a/sys/mips/include/signal.h b/sys/mips/include/signal.h
deleted file mode 100644
index e2cbee77e48c..000000000000
--- a/sys/mips/include/signal.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*	$OpenBSD: signal.h,v 1.2 1999/01/27 04:10:03 imp Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)signal.h	8.1 (Berkeley) 6/10/93
- *	JNPR: signal.h,v 1.4 2007/01/08 04:58:37 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_SIGNAL_H_
-#define	_MACHINE_SIGNAL_H_
-
-#include <sys/cdefs.h>
-#include <sys/_sigset.h>
-
-/*
- * Machine-dependent signal definitions
- */
-
-typedef int sig_atomic_t;
-
-#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE)
-/*
- * Information pushed on stack when a signal is delivered.
- * This is used by the kernel to restore state following
- * execution of the signal handler.  It is also made available
- * to the handler to allow it to restore state properly if
- * a non-standard exit is performed.
- */
-
-struct	sigcontext {
-	/*
-	 * The fields following 'sc_mask' must match the definition
-	 * of struct __mcontext. That way we can support
-	 * struct sigcontext and ucontext_t at the same
-	 * time.
-	 */
-	__sigset_t	sc_mask;	/* signal mask to restore */
-	int		sc_onstack;	/* sigstack state to restore */
-	__register_t	sc_pc;		/* pc at time of signal */
-	__register_t	sc_regs[32];	/* processor regs 0 to 31 */
-	__register_t	sr;		/* status register */
-	__register_t	mullo, mulhi;	/* mullo and mulhi registers... */
-	int		sc_fpused;	/* fp has been used */
-	f_register_t	sc_fpregs[33];	/* fp regs 0 to 31 and csr */
-	__register_t	sc_fpc_eir;	/* fp exception instruction reg */
-	void		*sc_tls;	/* pointer to TLS area */
-	int		__spare__[8];	/* XXX reserved */ 
-};
-
-#endif /* !_ANSI_SOURCE && !_POSIX_SOURCE */
-
-#endif	/* !_MACHINE_SIGNAL_H_ */
diff --git a/sys/mips/include/smp.h b/sys/mips/include/smp.h
deleted file mode 100644
index d7a33de1e935..000000000000
--- a/sys/mips/include/smp.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*-
- * ----------------------------------------------------------------------------
- * "THE BEER-WARE LICENSE" (Revision 42):
- * <phk@FreeBSD.org> wrote this file.  As long as you retain this notice you
- * can do whatever you want with this stuff. If we meet some day, and you think
- * this stuff is worth it, you can buy me a beer in return.   Poul-Henning Kamp
- * ----------------------------------------------------------------------------
- *
- *	from: src/sys/alpha/include/smp.h,v 1.8 2005/01/05 20:05:50 imp
- *	JNPR: smp.h,v 1.3 2006/12/02 09:53:41 katta
- * $FreeBSD$
- *
- */
-
-#ifndef _MACHINE_SMP_H_
-#define	_MACHINE_SMP_H_
-
-#ifdef _KERNEL
-
-#include <sys/_cpuset.h>
-
-#include <machine/pcb.h>
-
-#ifdef INTRNG
-# define MIPS_IPI_COUNT 	1
-# define INTR_IPI_COUNT 	MIPS_IPI_COUNT
-#endif
-
-/*
- * Interprocessor interrupts for SMP.
- */
-#define	IPI_RENDEZVOUS		0x0002
-#define	IPI_AST			0x0004
-#define	IPI_STOP		0x0008
-#define	IPI_STOP_HARD		0x0008
-#define	IPI_PREEMPT		0x0010
-#define	IPI_HARDCLOCK		0x0020
-
-#ifndef LOCORE
-
-void	ipi_all_but_self(int ipi);
-void	ipi_cpu(int cpu, u_int ipi);
-void	ipi_selected(cpuset_t cpus, int ipi);
-void	smp_init_secondary(u_int32_t cpuid);
-void	mpentry(void);
-
-extern struct pcb stoppcbs[];
-
-#endif /* !LOCORE */
-#endif /* _KERNEL */
-
-#endif /* _MACHINE_SMP_H_ */
diff --git a/sys/mips/include/stdarg.h b/sys/mips/include/stdarg.h
deleted file mode 100644
index acb526429ac2..000000000000
--- a/sys/mips/include/stdarg.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2017 Poul-Henning Kamp.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_STDARG_H_
-#define	_MACHINE_STDARG_H_
-
-#include <sys/_stdarg.h>
-
-#ifndef va_start
-  #error this file needs to be ported to your compiler
-#endif
-
-#endif /* !_MACHINE_STDARG_H_ */
diff --git a/sys/mips/include/sysarch.h b/sys/mips/include/sysarch.h
deleted file mode 100644
index cf58b4b7961c..000000000000
--- a/sys/mips/include/sysarch.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1993 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Architecture specific syscalls (MIPS)
- */
-#ifndef _MACHINE_SYSARCH_H_
-#define _MACHINE_SYSARCH_H_
-
-#define	MIPS_SET_TLS	1
-#define	MIPS_GET_TLS	2
-
-#ifndef _KERNEL
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-int sysarch(int, void *);
-__END_DECLS
-#endif
-
-#endif /* !_MACHINE_SYSARCH_H_ */
diff --git a/sys/mips/include/tlb.h b/sys/mips/include/tlb.h
deleted file mode 100644
index 24a18136175f..000000000000
--- a/sys/mips/include/tlb.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MACHINE_TLB_H_
-#define	_MACHINE_TLB_H_
-
-/*
- * The first TLB entry that write random hits.
- * TLB entry 0 maps the kernel stack of the currently running thread
- * TLB entry 1 maps the pcpu area of processor (only for SMP builds)
- */
-#define	KSTACK_TLB_ENTRY	0
-#ifdef SMP
-#define	PCPU_TLB_ENTRY		1
-#define	VMWIRED_ENTRIES		2
-#else
-#define	VMWIRED_ENTRIES		1
-#endif	/* SMP */
-
-/*
- * The number of process id entries.
- */
-#define	VMNUM_PIDS		256
-
-extern int num_tlbentries;
-
-void tlb_insert_wired(unsigned, vm_offset_t, pt_entry_t, pt_entry_t);
-void tlb_invalidate_address(struct pmap *, vm_offset_t);
-void tlb_invalidate_all(void);
-void tlb_invalidate_all_user(struct pmap *);
-void tlb_invalidate_range(struct pmap *, vm_offset_t, vm_offset_t);
-void tlb_save(void);
-void tlb_update(struct pmap *, vm_offset_t, pt_entry_t);
-
-#endif /* !_MACHINE_TLB_H_ */
diff --git a/sys/mips/include/tls.h b/sys/mips/include/tls.h
deleted file mode 100644
index c209983027b1..000000000000
--- a/sys/mips/include/tls.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- * 
- */
-
-#ifndef	__MIPS_TLS_H__
-#define	__MIPS_TLS_H__
-
-#include <sys/_tls_variant_i.h>
-#include <machine/sysarch.h>
-
-/*
- * TLS parameters
- */
-
-#define	TLS_DTV_OFFSET	0x8000
-#define	TLS_TCB_ALIGN	8
-#define	TLS_TP_OFFSET	0x7000
-
-#ifdef COMPAT_FREEBSD32
-#define	TLS_TCB_SIZE32	8
-#endif
-
-#ifndef _KERNEL
-
-static __inline void
-_tcb_set(struct tcb *tcb)
-{
-	sysarch(MIPS_SET_TLS, tcb);
-}
-
-static __inline struct tcb *
-_tcb_get(void)
-{
-	struct tcb *tcb;
-
-#ifdef TLS_USE_SYSARCH
-	sysarch(MIPS_GET_TLS, &tcb);
-#else
-	__asm__ __volatile__ (
-	    ".set\tpush\n\t"
-#ifdef __mips_n64
-	    ".set\tmips64r2\n\t"
-#else
-	    ".set\tmips32r2\n\t"
-#endif
-	    "rdhwr\t%0, $29\n\t"
-	    ".set\tpop"
-	    : "=r" (tcb));
-	tcb = (struct tcb *)((uintptr_t)tcb - TLS_TP_OFFSET - TLS_TCB_SIZE);
-#endif
-	return (tcb);
-}
-
-#endif
-
-#endif	/* __MIPS_TLS_H__ */
diff --git a/sys/mips/include/trap.h b/sys/mips/include/trap.h
deleted file mode 100644
index a88784f869c5..000000000000
--- a/sys/mips/include/trap.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*	$OpenBSD: trap.h,v 1.3 1999/01/27 04:46:06 imp Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: trap.h 1.1 90/07/09
- *	from: @(#)trap.h	8.1 (Berkeley) 6/10/93
- *	JNPR: trap.h,v 1.3 2006/12/02 09:53:41 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_TRAP_H_
-#define	_MACHINE_TRAP_H_
-
-/*
- * Trap codes also known in trap.c for name strings.
- * Used for indexing so modify with care.
- */
-
-#define	T_INT			0	/* Interrupt pending */
-#define	T_TLB_MOD		1	/* TLB modified fault */
-#define	T_TLB_LD_MISS		2	/* TLB miss on load or ifetch */
-#define	T_TLB_ST_MISS		3	/* TLB miss on a store */
-#define	T_ADDR_ERR_LD		4	/* Address error on a load or ifetch */
-#define	T_ADDR_ERR_ST		5	/* Address error on a store */
-#define	T_BUS_ERR_IFETCH	6	/* Bus error on an ifetch */
-#define	T_BUS_ERR_LD_ST		7	/* Bus error on a load or store */
-#define	T_SYSCALL		8	/* System call */
-#define	T_BREAK			9	/* Breakpoint */
-#define	T_RES_INST		10	/* Reserved instruction exception */
-#define	T_COP_UNUSABLE		11	/* Coprocessor unusable */
-#define	T_OVFLOW		12	/* Arithmetic overflow */
-#define	T_TRAP			13	/* Trap instruction */
-#define	T_VCEI			14	/* Virtual coherency instruction */
-#define	T_FPE			15	/* Floating point exception */
-#define	T_IWATCH		16	/* Inst. Watch address reference */
-#define T_C2E                   18      /* Exception from coprocessor 2 */
-#define	T_DWATCH		23	/* Data Watch address reference */
-#define T_MCHECK                24      /* Received an MCHECK */
-#define	T_VCED			31	/* Virtual coherency data */
-
-#define	T_USER			0x20	/* user-mode flag or'ed with type */
-
-#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
-
-struct trapdebug {		/* trap history buffer for debugging */
-	register_t	status;
-	register_t	cause;
-	register_t	vadr;
-	register_t	pc;
-	register_t	ra;
-	register_t	sp;
-	register_t	code;
-};
-
-#define	trapdebug_enter(x, cd) {	\
-	register_t s = intr_disable();	\
-	trp->status = x->sr;		\
-	trp->cause = x->cause;		\
-	trp->vadr = x->badvaddr;	\
-	trp->pc = x->pc;		\
-	trp->sp = x->sp;		\
-	trp->ra = x->ra;		\
-	trp->code = cd;			\
-	if (++trp == &trapdebug[TRAPSIZE])	\
-		trp = trapdebug;	\
-	intr_restore(s);		\
-}
-
-#define	TRAPSIZE 10		/* Trap log buffer length */
-extern struct trapdebug trapdebug[TRAPSIZE], *trp; 
-
-void trapDump(char *msg);
-
-#else
-
-#define	trapdebug_enter(x, cd)
-
-#endif
-
-void MipsFPTrap(u_int, u_int, u_int);
-void MipsKernGenException(void);
-void MipsKernIntr(void);
-void MipsKStackOverflow(void);
-void MipsTLBInvalidException(void);
-void MipsTLBMissException(void);
-void MipsUserGenException(void);
-void MipsUserIntr(void);
-
-register_t trap(struct trapframe *);
-
-#endif /* !_MACHINE_TRAP_H_ */
diff --git a/sys/mips/include/ucontext.h b/sys/mips/include/ucontext.h
deleted file mode 100644
index 06d8d0ed9623..000000000000
--- a/sys/mips/include/ucontext.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)ucontext.h	8.1 (Berkeley) 6/10/93
- *	JNPR: ucontext.h,v 1.2 2007/08/09 11:23:32 katta
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_UCONTEXT_H_
-#define	_MACHINE_UCONTEXT_H_
-
-#ifndef _LOCORE
-
-typedef struct	__mcontext {
-	/*
-	 * These fields must match the corresponding fields in struct 
-	 * sigcontext which follow 'sc_mask'. That way we can support
-	 * struct sigcontext and ucontext_t at the same time.
-	 */
-	int		mc_onstack;	/* sigstack state to restore */
-	__register_t	mc_pc;		/* pc at time of signal */
-	__register_t	mc_regs[32];	/* processor regs 0 to 31 */
-	__register_t	sr;		/* status register */
-	__register_t	mullo, mulhi;	/* mullo and mulhi registers... */
-	int		mc_fpused;	/* fp has been used */
-	f_register_t	mc_fpregs[33];	/* fp regs 0 to 31 and csr */
-	__register_t	mc_fpc_eir;	/* fp exception instruction reg */
-	void		*mc_tls;	/* pointer to TLS area */
-	int		__spare__[8];	/* XXX reserved */ 
-} mcontext_t;
-
-#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
-#include <compat/freebsd32/freebsd32_signal.h>
-
-typedef struct __mcontext32 {
-	int		mc_onstack;
-	int32_t		mc_pc;
-	int32_t		mc_regs[32];
-	int32_t		sr;
-	int32_t		mullo, mulhi;
-	int		mc_fpused;
-	int32_t		mc_fpregs[33];
-	int32_t		mc_fpc_eir;
-	int32_t		mc_tls;
-	int		__spare__[8];
-} mcontext32_t;
-
-typedef struct __ucontext32 {
-	sigset_t		uc_sigmask;
-	mcontext32_t		uc_mcontext;
-	uint32_t		uc_link;
-	struct sigaltstack32    uc_stack;
-	uint32_t		uc_flags;
-	uint32_t		__spare__[4];
-} ucontext32_t;
-#endif
-#endif
-
-#ifndef SZREG
-#if defined(__mips_o32)
-#define	SZREG	4
-#else
-#define	SZREG	8
-#endif
-#endif
-
-/* offsets into mcontext_t */
-#define	UCTX_REG(x)	(4 + SZREG + (x)*SZREG)
-
-#define	UCR_ZERO	UCTX_REG(0)
-#define	UCR_AT		UCTX_REG(1)
-#define	UCR_V0		UCTX_REG(2)
-#define	UCR_V1		UCTX_REG(3)
-#define	UCR_A0		UCTX_REG(4)
-#define	UCR_A1		UCTX_REG(5)
-#define	UCR_A2		UCTX_REG(6)
-#define	UCR_A3		UCTX_REG(7)
-#define	UCR_T0		UCTX_REG(8)
-#define	UCR_T1		UCTX_REG(9)
-#define	UCR_T2		UCTX_REG(10)
-#define	UCR_T3		UCTX_REG(11)
-#define	UCR_T4		UCTX_REG(12)
-#define	UCR_T5		UCTX_REG(13)
-#define	UCR_T6		UCTX_REG(14)
-#define	UCR_T7		UCTX_REG(15)
-#define	UCR_S0		UCTX_REG(16)
-#define	UCR_S1		UCTX_REG(17)
-#define	UCR_S2		UCTX_REG(18)
-#define	UCR_S3		UCTX_REG(19)
-#define	UCR_S4		UCTX_REG(20)
-#define	UCR_S5		UCTX_REG(21)
-#define	UCR_S6		UCTX_REG(22)
-#define	UCR_S7		UCTX_REG(23)
-#define	UCR_T8		UCTX_REG(24)
-#define	UCR_T9		UCTX_REG(25)
-#define	UCR_K0		UCTX_REG(26)
-#define	UCR_K1		UCTX_REG(27)
-#define	UCR_GP		UCTX_REG(28)
-#define	UCR_SP		UCTX_REG(29)
-#define	UCR_S8		UCTX_REG(30)
-#define	UCR_RA		UCTX_REG(31)
-#define	UCR_SR		UCTX_REG(32)
-#define	UCR_MDLO	UCTX_REG(33)
-#define	UCR_MDHI	UCTX_REG(34)
-
-#endif	/* !_MACHINE_UCONTEXT_H_ */
diff --git a/sys/mips/include/vdso.h b/sys/mips/include/vdso.h
deleted file mode 100644
index b4771e68edff..000000000000
--- a/sys/mips/include/vdso.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2012 Konstantin Belousov <kib@FreeBSD.ORG>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_VDSO_H
-#define	_MIPS_VDSO_H
-
-#define	VDSO_TIMEHANDS_MD			\
-	uint32_t	th_res[8];
-
-#ifdef _KERNEL
-#ifdef COMPAT_FREEBSD32
-
-#define	VDSO_TIMEHANDS_MD32	VDSO_TIMEHANDS_MD
-
-#endif
-#endif
-#endif
diff --git a/sys/mips/include/vm.h b/sys/mips/include/vm.h
deleted file mode 100644
index c759d8cfa61e..000000000000
--- a/sys/mips/include/vm.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 Alan L. Cox <alc@cs.rice.edu>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_VM_H_
-#define	_MACHINE_VM_H_
-
-#include <machine/pte.h>
-#include <machine/cca.h>
-
-/* Memory attributes. */
-#define	VM_MEMATTR_UNCACHEABLE		((vm_memattr_t)MIPS_CCA_UNCACHED)
-#define	VM_MEMATTR_WRITE_BACK		((vm_memattr_t)MIPS_CCA_CACHED)
-#define	VM_MEMATTR_DEFAULT		VM_MEMATTR_WRITE_BACK
-#define	VM_MEMATTR_DEVICE		VM_MEMATTR_UNCACHEABLE
-#ifdef MIPS_CCA_WC
-#define	VM_MEMATTR_WRITE_COMBINING	((vm_memattr_t)MIPS_CCA_WC)
-#endif
-
-#endif /* !_MACHINE_VM_H_ */
diff --git a/sys/mips/include/vmparam.h b/sys/mips/include/vmparam.h
deleted file mode 100644
index d6f9e31deaad..000000000000
--- a/sys/mips/include/vmparam.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/*	$OpenBSD: vmparam.h,v 1.2 1998/09/15 10:50:12 pefo Exp $	*/
-/*	$NetBSD: vmparam.h,v 1.5 1994/10/26 21:10:10 cgd Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah Hdr: vmparam.h 1.16 91/01/18
- *	@(#)vmparam.h	8.2 (Berkeley) 4/22/94
- *	JNPR: vmparam.h,v 1.3.2.1 2007/09/10 06:01:28 girish
- * $FreeBSD$
- */
-
-#ifndef _MACHINE_VMPARAM_H_
-#define	_MACHINE_VMPARAM_H_
-
-/*
- * Machine dependent constants mips processors.
- */
-
-/*
- * Virtual memory related constants, all in bytes
- */
-#ifndef MAXTSIZ
-#define	MAXTSIZ		(128UL*1024*1024)	/* max text size */
-#endif
-#ifndef DFLDSIZ
-#define	DFLDSIZ		(128UL*1024*1024)	/* initial data size limit */
-#endif
-#ifndef MAXDSIZ
-#define	MAXDSIZ		(1*1024UL*1024*1024)	/* max data size */
-#endif
-#ifndef DFLSSIZ
-#define	DFLSSIZ		(8UL*1024*1024)		/* initial stack size limit */
-#endif
-#ifndef MAXSSIZ
-#define	MAXSSIZ		(64UL*1024*1024)	/* max stack size */
-#endif
-#ifndef SGROWSIZ
-#define	SGROWSIZ	(128UL*1024)		/* amount to grow stack */
-#endif
-
-/*
- * Mach derived constants
- */
-
-/* user/kernel map constants */
-#define	VM_MIN_ADDRESS		((vm_offset_t)0x00000000)
-#define	VM_MAX_ADDRESS		((vm_offset_t)(intptr_t)(int32_t)0xffffffff)
-
-#define	VM_MINUSER_ADDRESS	((vm_offset_t)0x00000000)
-
-#ifdef __mips_n64
-#define	VM_MAXUSER_ADDRESS	(VM_MINUSER_ADDRESS + (NPDEPG * NBSEG))
-#define	VM_MIN_KERNEL_ADDRESS	((vm_offset_t)0xc000000000000000)
-#define	VM_MAX_KERNEL_ADDRESS	(VM_MIN_KERNEL_ADDRESS + (NPDEPG * NBSEG))
-#else
-#define	VM_MAXUSER_ADDRESS	((vm_offset_t)0x80000000)
-#define	VM_MIN_KERNEL_ADDRESS	((vm_offset_t)0xC0000000)
-#define	VM_MAX_KERNEL_ADDRESS	((vm_offset_t)0xFFFFC000)
-#endif
-
-#define	KERNBASE		((vm_offset_t)(intptr_t)(int32_t)0x80000000)
-/*
- * USRSTACK needs to start a little below 0x8000000 because the R8000
- * and some QED CPUs perform some virtual address checks before the
- * offset is calculated.
- */
-#define	USRSTACK		(VM_MAXUSER_ADDRESS - PAGE_SIZE)
-#ifdef __mips_n64
-#define	FREEBSD32_USRSTACK	(((vm_offset_t)0x80000000) - PAGE_SIZE)
-#endif
-
-/*
- * Disable superpage reservations. (not sure if this is right
- * I copied it from ARM)
- */
-#ifndef	VM_NRESERVLEVEL
-#define	VM_NRESERVLEVEL		0
-#endif
-
-/*
- * How many physical pages per kmem arena virtual page.
- */
-#ifndef VM_KMEM_SIZE_SCALE
-#define	VM_KMEM_SIZE_SCALE	(3)
-#endif
-
-/*
- * Optional floor (in bytes) on the size of the kmem arena.
- */
-#ifndef VM_KMEM_SIZE_MIN
-#define	VM_KMEM_SIZE_MIN	(12 * 1024 * 1024)
-#endif
-
-/*
- * Optional ceiling (in bytes) on the size of the kmem arena: 40% of the
- * kernel map.
- */
-#ifndef VM_KMEM_SIZE_MAX
-#define	VM_KMEM_SIZE_MAX	((VM_MAX_KERNEL_ADDRESS - \
-    VM_MIN_KERNEL_ADDRESS + 1) * 2 / 5)
-#endif
-
-/* initial pagein size of beginning of executable file */
-#ifndef VM_INITIAL_PAGEIN
-#define	VM_INITIAL_PAGEIN	16
-#endif
-
-#define	UMA_MD_SMALL_ALLOC
-
-/*
- * max number of non-contig chunks of physical RAM you can have
- */
-#define	VM_PHYSSEG_MAX		32
-
-/*
- * The physical address space is sparsely populated.
- */
-#define	VM_PHYSSEG_SPARSE
-
-/*
- * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
- * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
- * the pool from which physical pages for small UMA objects are
- * allocated.
- */
-#define	VM_NFREEPOOL		2
-#define	VM_FREEPOOL_DEFAULT	0
-#define	VM_FREEPOOL_DIRECT	1
-
-/*
- * Create up to two free lists on !__mips_n64: VM_FREELIST_DEFAULT is for
- * physical pages that are above the largest physical address that is
- * accessible through the direct map (KSEG0) and VM_FREELIST_LOWMEM is for
- * physical pages that are below that address.  VM_LOWMEM_BOUNDARY is the
- * physical address for the end of the direct map (KSEG0).
- */
-#ifdef __mips_n64
-#define	VM_NFREELIST		1
-#define	VM_FREELIST_DEFAULT	0
-#define	VM_FREELIST_DIRECT	VM_FREELIST_DEFAULT
-#else
-#define	VM_NFREELIST		2
-#define	VM_FREELIST_DEFAULT	0
-#define	VM_FREELIST_LOWMEM	1
-#define	VM_FREELIST_DIRECT	VM_FREELIST_LOWMEM
-#define	VM_LOWMEM_BOUNDARY	((vm_paddr_t)0x20000000)
-#endif
-
-/*
- * The largest allocation size is 1MB.
- */
-#define	VM_NFREEORDER		9
-
-#define	ZERO_REGION_SIZE	(64 * 1024)	/* 64KB */
-
-#ifndef __mips_n64
-#define	SFBUF
-#define	SFBUF_MAP
-#define	PMAP_HAS_DMAP	0
-#else
-#define	PMAP_HAS_DMAP	1
-#endif
-
-#define	PHYS_TO_DMAP(x)	MIPS_PHYS_TO_DIRECT(x)
-#define	DMAP_TO_PHYS(x)	MIPS_DIRECT_TO_PHYS(x)
-
-/*
- * No non-transparent large page support in the pmap.
- */
-#define	PMAP_HAS_LARGEPAGES	0
-
-/*
- * Need a page dump array for minidump.
- */
-#define MINIDUMP_PAGE_TRACKING	1
-
-#endif /* !_MACHINE_VMPARAM_H_ */
diff --git a/sys/mips/ingenic/files.jz4780 b/sys/mips/ingenic/files.jz4780
deleted file mode 100644
index 5bc01872ff6d..000000000000
--- a/sys/mips/ingenic/files.jz4780
+++ /dev/null
@@ -1,40 +0,0 @@
-# $FreeBSD$
-
-mips/ingenic/jz4780_dwc_fdt.c	optional dwcotg
-mips/ingenic/jz4780_ehci.c	optional ehci
-mips/ingenic/jz4780_mmc.c	optional mmc
-mips/ingenic/jz4780_ohci.c	optional ohci
-mips/ingenic/jz4780_smb.c	optional iicbus
-mips/ingenic/jz4780_uart.c	optional uart
-mips/ingenic/jz4780_lcd.c	optional vt
-dev/hdmi/dwc_hdmi.c		optional hdmi iicbus
-dev/hdmi/dwc_hdmi_fdt.c		optional hdmi iicbus
-
-mips/ingenic/jz4780_clock.c	standard
-mips/ingenic/jz4780_clk_gen.c	standard
-mips/ingenic/jz4780_clk_otg.c	standard
-mips/ingenic/jz4780_clk_pll.c	standard
-mips/ingenic/jz4780_efuse.c	standard
-mips/ingenic/jz4780_intr.c	standard
-mips/ingenic/jz4780_gpio.c	standard
-mips/ingenic/jz4780_machdep.c	standard
-mips/ingenic/jz4780_nemc.c	standard
-mips/ingenic/jz4780_pdma.c	standard
-mips/ingenic/jz4780_pinctrl.c	standard
-mips/ingenic/jz4780_rtc.c	standard
-mips/ingenic/jz4780_timer.c	standard
-
-# Sound
-mips/ingenic/jz4780_aic.c	optional sound xdma
-mips/ingenic/jz4780_codec.c	optional sound
-
-# SMP
-mips/ingenic/jz4780_mp.c	optional smp \
-	warning "* * * * * 32-bit mips SMP unsupported * * * * *"
-mips/ingenic/jz4780_mpboot.S	optional smp
-
-# Custom interface between pinctrl and gpio
-mips/ingenic/jz4780_gpio_if.m	standard
-
-# HDMI interface
-dev/hdmi/hdmi_if.m		standard
diff --git a/sys/mips/ingenic/files.x1000 b/sys/mips/ingenic/files.x1000
deleted file mode 100644
index f3bdb76ed4c3..000000000000
--- a/sys/mips/ingenic/files.x1000
+++ /dev/null
@@ -1,22 +0,0 @@
-# $FreeBSD$
-
-mips/ingenic/jz4780_mmc.c	optional mmc
-mips/ingenic/jz4780_uart.c	optional uart
-
-mips/ingenic/jz4780_clock.c	standard
-mips/ingenic/jz4780_clk_gen.c	standard
-mips/ingenic/jz4780_clk_otg.c	standard
-mips/ingenic/jz4780_clk_pll.c	standard
-mips/ingenic/jz4780_intr.c	standard
-mips/ingenic/jz4780_gpio.c	standard
-mips/ingenic/jz4780_machdep.c	standard
-mips/ingenic/jz4780_pdma.c	standard
-mips/ingenic/jz4780_pinctrl.c	standard
-mips/ingenic/jz4780_timer.c	standard
-
-# Sound
-mips/ingenic/jz4780_aic.c	optional sound xdma
-mips/ingenic/jz4780_codec.c	optional sound
-
-# Custom interface between pinctrl and gpio
-mips/ingenic/jz4780_gpio_if.m	standard
diff --git a/sys/mips/ingenic/jz4780_aic.c b/sys/mips/ingenic/jz4780_aic.c
deleted file mode 100644
index 716feda272b8..000000000000
--- a/sys/mips/ingenic/jz4780_aic.c
+++ /dev/null
@@ -1,810 +0,0 @@
-/*-
- * Copyright (c) 2016-2018 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* Ingenic JZ4780 Audio Interface Controller (AIC). */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/sound/pcm/sound.h>
-#include <dev/sound/chip.h>
-#include <mixer_if.h>
-
-#include <dev/extres/clk/clk.h>
-#include <dev/xdma/xdma.h>
-
-#include <mips/ingenic/jz4780_common.h>
-#include <mips/ingenic/jz4780_aic.h>
-
-#define	AIC_NCHANNELS		1
-
-struct aic_softc {
-	device_t		dev;
-	struct resource		*res[1];
-	bus_space_tag_t		bst;
-	bus_space_handle_t	bsh;
-	struct mtx		*lock;
-	int			pos;
-	bus_dma_tag_t		dma_tag;
-	bus_dmamap_t		dma_map;
-	bus_addr_t		buf_base_phys;
-	uint32_t		*buf_base;
-	uintptr_t		aic_fifo_paddr;
-	int			dma_size;
-	clk_t			clk_aic;
-	clk_t			clk_i2s;
-	struct aic_rate		*sr;
-	void			*ih;
-	int			internal_codec;
-
-	/* xDMA */
-	struct xdma_channel	*xchan;
-	xdma_controller_t	*xdma_tx;
-	struct xdma_request	req;
-};
-
-/* Channel registers */
-struct sc_chinfo {
-	struct snd_dbuf		*buffer;
-	struct pcm_channel	*channel;
-	struct sc_pcminfo	*parent;
-
-	/* Channel information */
-	uint32_t	dir;
-	uint32_t	format;
-
-	/* Flags */
-	uint32_t	run;
-};
-
-/* PCM device private data */
-struct sc_pcminfo {
-	device_t		dev;
-	uint32_t		chnum;
-	struct sc_chinfo	chan[AIC_NCHANNELS];
-	struct aic_softc	*sc;
-};
-
-static struct resource_spec aic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int aic_probe(device_t dev);
-static int aic_attach(device_t dev);
-static int aic_detach(device_t dev);
-static int setup_xdma(struct sc_pcminfo *scp);
-
-struct aic_rate {
-        uint32_t speed;
-};
-
-static struct aic_rate rate_map[] = {
-	{ 48000 },
-	/* TODO: add more frequences */
-	{ 0 },
-};
-
-/*
- * Mixer interface.
- */
-static int
-aicmixer_init(struct snd_mixer *m)
-{
-	struct sc_pcminfo *scp;
-	struct aic_softc *sc;
-	int mask;
-
-	scp = mix_getdevinfo(m);
-	sc = scp->sc;
-
-	if (sc == NULL)
-		return -1;
-
-	mask = SOUND_MASK_PCM;
-
-	snd_mtxlock(sc->lock);
-	pcm_setflags(scp->dev, pcm_getflags(scp->dev) | SD_F_SOFTPCMVOL);
-	mix_setdevs(m, mask);
-	snd_mtxunlock(sc->lock);
-
-	return (0);
-}
-
-static int
-aicmixer_set(struct snd_mixer *m, unsigned dev,
-    unsigned left, unsigned right)
-{
-	struct sc_pcminfo *scp;
-
-	scp = mix_getdevinfo(m);
-
-	/* Here we can configure hardware volume on our DAC */
-
-	return (0);
-}
-
-static kobj_method_t aicmixer_methods[] = {
-	KOBJMETHOD(mixer_init,      aicmixer_init),
-	KOBJMETHOD(mixer_set,       aicmixer_set),
-	KOBJMETHOD_END
-};
-MIXER_DECLARE(aicmixer);
-
-/*
- * Channel interface.
- */
-static void *
-aicchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
-    struct pcm_channel *c, int dir)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-
-	scp = (struct sc_pcminfo *)devinfo;
-	sc = scp->sc;
-
-	snd_mtxlock(sc->lock);
-	ch = &scp->chan[0];
-	ch->dir = dir;
-	ch->run = 0;
-	ch->buffer = b;
-	ch->channel = c;
-	ch->parent = scp;
-	snd_mtxunlock(sc->lock);
-
-	if (sndbuf_setup(ch->buffer, sc->buf_base, sc->dma_size) != 0) {
-		device_printf(scp->dev, "Can't setup sndbuf.\n");
-		return NULL;
-	}
-
-	return (ch);
-}
-
-static int
-aicchan_free(kobj_t obj, void *data)
-{
-	struct sc_chinfo *ch = data;
-	struct sc_pcminfo *scp = ch->parent;
-	struct aic_softc *sc = scp->sc;
-
-	snd_mtxlock(sc->lock);
-	/* TODO: free channel buffer */
-	snd_mtxunlock(sc->lock);
-
-	return (0);
-}
-
-static int
-aicchan_setformat(kobj_t obj, void *data, uint32_t format)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-
-	ch = data;
-	scp = ch->parent;
-
-	ch->format = format;
-
-	return (0);
-}
-
-static uint32_t
-aicchan_setspeed(kobj_t obj, void *data, uint32_t speed)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_rate *sr;
-	struct aic_softc *sc;
-	int threshold;
-	int i;
-
-	ch = data;
-	scp = ch->parent;
-	sc = scp->sc;
-
-	sr = NULL;
-
-	/* First look for equal frequency. */
-	for (i = 0; rate_map[i].speed != 0; i++) {
-		if (rate_map[i].speed == speed)
-			sr = &rate_map[i];
-	}
-
-	/* If no match, just find nearest. */
-	if (sr == NULL) {
-		for (i = 0; rate_map[i].speed != 0; i++) {
-			sr = &rate_map[i];
-			threshold = sr->speed + ((rate_map[i + 1].speed != 0) ?
-			    ((rate_map[i + 1].speed - sr->speed) >> 1) : 0);
-			if (speed < threshold)
-				break;
-		}
-	}
-
-	sc->sr = sr;
-
-	/* Clocks can be reconfigured here. */
-
-	return (sr->speed);
-}
-
-static uint32_t
-aicchan_setblocksize(kobj_t obj, void *data, uint32_t blocksize)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-
-	ch = data;
-	scp = ch->parent;
-	sc = scp->sc;
-
-	sndbuf_resize(ch->buffer, sc->dma_size / blocksize, blocksize);
-
-	return (sndbuf_getblksz(ch->buffer));
-}
-
-static int
-aic_intr(void *arg, xdma_transfer_status_t *status)
-{
-	struct sc_pcminfo *scp;
-	struct xdma_request *req;
-	xdma_channel_t *xchan;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-	int bufsize;
-
-	scp = arg;
-	sc = scp->sc;
-	ch = &scp->chan[0];
-	req = &sc->req;
-
-	xchan = sc->xchan;
-
-	bufsize = sndbuf_getsize(ch->buffer);
-
-	sc->pos += req->block_len;
-	if (sc->pos >= bufsize)
-		sc->pos -= bufsize;
-
-	if (ch->run)
-		chn_intr(ch->channel);
-
-	return (0);
-}
-
-static int
-setup_xdma(struct sc_pcminfo *scp)
-{
-	struct aic_softc *sc;
-	struct sc_chinfo *ch;
-	int fmt;
-	int err;
-
-	ch = &scp->chan[0];
-	sc = scp->sc;
-
-	fmt = sndbuf_getfmt(ch->buffer);
-
-	KASSERT(fmt & AFMT_16BIT, ("16-bit audio supported only."));
-
-	sc->req.operation = XDMA_CYCLIC;
-	sc->req.req_type = XR_TYPE_PHYS;
-	sc->req.direction = XDMA_MEM_TO_DEV;
-	sc->req.src_addr = sc->buf_base_phys;
-	sc->req.dst_addr = sc->aic_fifo_paddr;
-	sc->req.src_width = 2;
-	sc->req.dst_width = 2;
-	sc->req.block_len = sndbuf_getblksz(ch->buffer);
-	sc->req.block_num = sndbuf_getblkcnt(ch->buffer);
-
-	err = xdma_request(sc->xchan, &sc->req);
-	if (err != 0) {
-		device_printf(sc->dev, "Can't configure virtual channel\n");
-		return (-1);
-	}
-
-	xdma_control(sc->xchan, XDMA_CMD_BEGIN);
-
-	return (0);
-}
-
-static int
-aic_start(struct sc_pcminfo *scp)
-{
-	struct aic_softc *sc;
-	int reg;
-
-	sc = scp->sc;
-
-	/* Ensure clock enabled. */
-	reg = READ4(sc, I2SCR);
-	reg |= (I2SCR_ESCLK);
-	WRITE4(sc, I2SCR, reg);
-
-	setup_xdma(scp);
-
-	reg = (AICCR_OSS_16 | AICCR_ISS_16);
-	reg |= (AICCR_CHANNEL_2);
-	reg |= (AICCR_TDMS);
-	reg |= (AICCR_ERPL);
-	WRITE4(sc, AICCR, reg);
-
-	return (0);
-}
-
-static int
-aic_stop(struct sc_pcminfo *scp)
-{
-	struct aic_softc *sc;
-	int reg;
-
-	sc = scp->sc;
-
-	reg = READ4(sc, AICCR);
-	reg &= ~(AICCR_TDMS | AICCR_ERPL);
-	WRITE4(sc, AICCR, reg);
-
-	xdma_control(sc->xchan, XDMA_CMD_TERMINATE);
-
-	return (0);
-}
-
-static int
-aicchan_trigger(kobj_t obj, void *data, int go)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-
-	ch = data;
-	scp = ch->parent;
-	sc = scp->sc;
-
-	snd_mtxlock(sc->lock);
-
-	switch (go) {
-	case PCMTRIG_START:
-		ch->run = 1;
-
-		sc->pos = 0;
-
-		aic_start(scp);
-
-		break;
-
-	case PCMTRIG_STOP:
-	case PCMTRIG_ABORT:
-		ch->run = 0;
-
-		aic_stop(scp);
-
-		sc->pos = 0;
-
-		bzero(sc->buf_base, sc->dma_size);
-
-		break;
-	}
-
-	snd_mtxunlock(sc->lock);
-
-	return (0);
-}
-
-static uint32_t
-aicchan_getptr(kobj_t obj, void *data)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-
-	ch = data;
-	scp = ch->parent;
-	sc = scp->sc;
-
-	return (sc->pos);
-}
-
-static uint32_t aic_pfmt[] = {
-	SND_FORMAT(AFMT_S16_LE, 2, 0),
-	0
-};
-
-static struct pcmchan_caps aic_pcaps = {48000, 48000, aic_pfmt, 0};
-
-static struct pcmchan_caps *
-aicchan_getcaps(kobj_t obj, void *data)
-{
-
-	return (&aic_pcaps);
-}
-
-static kobj_method_t aicchan_methods[] = {
-	KOBJMETHOD(channel_init,         aicchan_init),
-	KOBJMETHOD(channel_free,         aicchan_free),
-	KOBJMETHOD(channel_setformat,    aicchan_setformat),
-	KOBJMETHOD(channel_setspeed,     aicchan_setspeed),
-	KOBJMETHOD(channel_setblocksize, aicchan_setblocksize),
-	KOBJMETHOD(channel_trigger,      aicchan_trigger),
-	KOBJMETHOD(channel_getptr,       aicchan_getptr),
-	KOBJMETHOD(channel_getcaps,      aicchan_getcaps),
-	KOBJMETHOD_END
-};
-CHANNEL_DECLARE(aicchan);
-
-static void
-aic_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
-{
-	bus_addr_t *addr;
-
-	if (err)
-		return;
-
-	addr = (bus_addr_t*)arg;
-	*addr = segs[0].ds_addr;
-}
-
-static int
-aic_dma_setup(struct aic_softc *sc)
-{
-	device_t dev;
-	int err;
-
-	dev = sc->dev;
-
-	/* DMA buffer size. */
-	sc->dma_size = 131072;
-
-	/*
-	 * Must use dma_size boundary as modulo feature required.
-	 * Modulo feature allows setup circular buffer.
-	 */
-	err = bus_dma_tag_create(
-	    bus_get_dma_tag(sc->dev),
-	    4, sc->dma_size,		/* alignment, boundary */
-	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    sc->dma_size, 1,		/* maxsize, nsegments */
-	    sc->dma_size, 0,		/* maxsegsize, flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &sc->dma_tag);
-	if (err) {
-		device_printf(dev, "cannot create bus dma tag\n");
-		return (-1);
-	}
-
-	err = bus_dmamem_alloc(sc->dma_tag, (void **)&sc->buf_base,
-	    BUS_DMA_WAITOK | BUS_DMA_COHERENT, &sc->dma_map);
-	if (err) {
-		device_printf(dev, "cannot allocate memory\n");
-		return (-1);
-	}
-
-	err = bus_dmamap_load(sc->dma_tag, sc->dma_map, sc->buf_base,
-	    sc->dma_size, aic_dmamap_cb, &sc->buf_base_phys, BUS_DMA_WAITOK);
-	if (err) {
-		device_printf(dev, "cannot load DMA map\n");
-		return (-1);
-	}
-
-	bzero(sc->buf_base, sc->dma_size);
-
-	return (0);
-}
-
-static int
-aic_configure_clocks(struct aic_softc *sc)
-{
-	uint64_t aic_freq;
-	uint64_t i2s_freq;
-	device_t dev;
-	int err;
-
-	dev = sc->dev;
-
-	err = clk_get_by_ofw_name(sc->dev, 0, "aic", &sc->clk_aic);
-	if (err != 0) {
-		device_printf(dev, "Can't find aic clock.\n");
-		return (-1);
-	}
-
-	err = clk_enable(sc->clk_aic);
-	if (err != 0) {
-		device_printf(dev, "Can't enable aic clock.\n");
-		return (-1);
-	}
-
-	err = clk_get_by_ofw_name(sc->dev, 0, "i2s", &sc->clk_i2s);
-	if (err != 0) {
-		device_printf(dev, "Can't find i2s clock.\n");
-		return (-1);
-	}
-
-	err = clk_enable(sc->clk_i2s);
-	if (err != 0) {
-		device_printf(dev, "Can't enable i2s clock.\n");
-		return (-1);
-	}
-
-	err = clk_set_freq(sc->clk_i2s, 12000000, 0);
-	if (err != 0) {
-		device_printf(dev, "Can't set i2s frequency.\n");
-		return (-1);
-	}
-
-	clk_get_freq(sc->clk_aic, &aic_freq);
-	clk_get_freq(sc->clk_i2s, &i2s_freq);
-
-	device_printf(dev, "Frequency aic %d i2s %d\n",
-	    (uint32_t)aic_freq, (uint32_t)i2s_freq);
-
-	return (0);
-}
-
-static int
-aic_configure(struct aic_softc *sc)
-{
-	int reg;
-
-	WRITE4(sc, AICFR, AICFR_RST);
-
-	/* Configure AIC */
-	reg = 0;
-	if (sc->internal_codec) {
-		reg |= (AICFR_ICDC);
-	} else {
-		reg |= (AICFR_SYNCD | AICFR_BCKD);
-	}
-	reg |= (AICFR_AUSEL);	/* I2S/MSB-justified format. */
-	reg |= (AICFR_TFTH(8));	/* Transmit FIFO threshold */
-	reg |= (AICFR_RFTH(7));	/* Receive FIFO threshold */
-	WRITE4(sc, AICFR, reg);
-
-	reg = READ4(sc, AICFR);
-	reg |= (AICFR_ENB);	/* Enable the controller. */
-	WRITE4(sc, AICFR, reg);
-
-	return (0);
-}
-
-static int
-sysctl_hw_pcm_internal_codec(SYSCTL_HANDLER_ARGS)
-{
-	struct sc_pcminfo *scp;
-	struct sc_chinfo *ch;
-	struct aic_softc *sc;
-	int error, val;
-
-	if (arg1 == NULL)
-		return (EINVAL);
-
-	scp = arg1;
-	sc = scp->sc;
-	ch = &scp->chan[0];
-
-	snd_mtxlock(sc->lock);
-
-	val = sc->internal_codec;
-	error = sysctl_handle_int(oidp, &val, 0, req);
-	if (error || req->newptr == NULL) {
-		snd_mtxunlock(sc->lock);
-		return (error);
-	}
-	if (val < 0 || val > 1) {
-		snd_mtxunlock(sc->lock);
-		return (EINVAL);
-	}
-
-	if (sc->internal_codec != val) {
-		sc->internal_codec = val;
-		if (ch->run)
-			aic_stop(scp);
-		aic_configure(sc);
-		if (ch->run)
-			aic_start(scp);
-	}
-
-	snd_mtxunlock(sc->lock);
-
-	return (0);
-}
-
-static int
-aic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-i2s"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Audio Interface Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-aic_attach(device_t dev)
-{
-	char status[SND_STATUSLEN];
-	struct sc_pcminfo *scp;
-	struct aic_softc *sc;
-	int err;
-
-	sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
-	sc->dev = dev;
-	sc->pos = 0;
-	sc->internal_codec = 1;
-
-	/* Get xDMA controller */
-	sc->xdma_tx = xdma_ofw_get(sc->dev, "tx");
-	if (sc->xdma_tx == NULL) {
-		device_printf(dev, "Can't find DMA controller.\n");
-		return (ENXIO);
-	}
-
-	/* Alloc xDMA virtual channel. */
-	sc->xchan = xdma_channel_alloc(sc->xdma_tx, 0);
-	if (sc->xchan == NULL) {
-		device_printf(dev, "Can't alloc virtual DMA channel.\n");
-		return (ENXIO);
-	}
-
-	/* Setup sound subsystem */
-	sc->lock = snd_mtxcreate(device_get_nameunit(dev), "aic softc");
-	if (sc->lock == NULL) {
-		device_printf(dev, "Can't create mtx.\n");
-		return (ENXIO);
-	}
-
-	if (bus_alloc_resources(dev, aic_spec, sc->res)) {
-		device_printf(dev,
-		    "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	/* Memory interface */
-	sc->bst = rman_get_bustag(sc->res[0]);
-	sc->bsh = rman_get_bushandle(sc->res[0]);
-	sc->aic_fifo_paddr = rman_get_start(sc->res[0]) + AICDR;
-
-	/* Setup PCM. */
-	scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_WAITOK | M_ZERO);
-	scp->sc = sc;
-	scp->dev = dev;
-
-	/* Setup audio buffer. */
-	err = aic_dma_setup(sc);
-	if (err != 0) {
-		device_printf(dev, "Can't setup sound buffer.\n");
-		return (ENXIO);
-	}
-
-	/* Setup clocks. */
-	err = aic_configure_clocks(sc);
-	if (err != 0) {
-		device_printf(dev, "Can't configure clocks.\n");
-		return (ENXIO);
-	}
-
-	err = aic_configure(sc);
-	if (err != 0) {
-		device_printf(dev, "Can't configure AIC.\n");
-		return (ENXIO);
-	}
-
-	pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
-
-	/* Setup interrupt handler. */
-	err = xdma_setup_intr(sc->xchan, 0, aic_intr, scp, &sc->ih);
-	if (err) {
-		device_printf(sc->dev,
-		    "Can't setup xDMA interrupt handler.\n");
-		return (ENXIO);
-	}
-
-	err = pcm_register(dev, scp, 1, 0);
-	if (err) {
-		device_printf(dev, "Can't register pcm.\n");
-		return (ENXIO);
-	}
-
-	scp->chnum = 0;
-	pcm_addchan(dev, PCMDIR_PLAY, &aicchan_class, scp);
-	scp->chnum++;
-
-	snprintf(status, SND_STATUSLEN, "at %s", ofw_bus_get_name(dev));
-	pcm_setstatus(dev, status);
-
-	mixer_init(dev, &aicmixer_class, scp);
-
-	/* Create device sysctl node. */
-	SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
-	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
-	    OID_AUTO, "internal_codec",
-	    CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
-	    scp, 0, sysctl_hw_pcm_internal_codec, "I",
-	    "use internal audio codec");
-
-	return (0);
-}
-
-static int
-aic_detach(device_t dev)
-{
-	struct aic_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	xdma_channel_free(sc->xchan);
-
-	bus_release_resources(dev, aic_spec, sc->res);
-
-	return (0);
-}
-
-static device_method_t aic_pcm_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		aic_probe),
-	DEVMETHOD(device_attach,	aic_attach),
-	DEVMETHOD(device_detach,	aic_detach),
-	DEVMETHOD_END
-};
-
-static driver_t aic_pcm_driver = {
-	"pcm",
-	aic_pcm_methods,
-	PCM_SOFTC_SIZE,
-};
-
-DRIVER_MODULE(aic, simplebus, aic_pcm_driver, pcm_devclass, 0, 0);
-MODULE_DEPEND(aic, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
-MODULE_VERSION(aic, 1);
diff --git a/sys/mips/ingenic/jz4780_aic.h b/sys/mips/ingenic/jz4780_aic.h
deleted file mode 100644
index 534aaa646903..000000000000
--- a/sys/mips/ingenic/jz4780_aic.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define	AICFR		0x00	/* AIC Configuration Register */
-#define	 AICFR_TFTH_S	16	/* Transmit FIFO threshold for interrupt or DMA request. */
-#define	 AICFR_TFTH_M	(0x1f << AICFR_TFTH_S)
-#define	 AICFR_TFTH(x)	((x) << AICFR_TFTH_S)
-#define	 AICFR_RFTH_S	24	/* Receive FIFO threshold for interrupt or DMA request. */
-#define	 AICFR_RFTH_M	(0x0f << AICFR_RFTH_S)
-#define	 AICFR_RFTH(x)	((x) << AICFR_RFTH_S)
-#define	 AICFR_ICDC	(1 << 5) /* Internal CODEC used. */
-#define	 AICFR_AUSEL	(1 << 4) /* Audio Unit Select */
-#define	 AICFR_RST	(1 << 3) /* Reset AIC. */
-#define	 AICFR_BCKD	(1 << 2) /* BIT_CLK Direction. */
-#define	 AICFR_SYNCD	(1 << 1) /* SYNC is generated internally and driven out to the CODEC. */
-#define	 AICFR_ENB	(1 << 0) /* Enable AIC Controller. */
-#define	AICCR		0x04	/* AIC Common Control Register */
-#define	 AICCR_TFLUSH		(1 << 8) /* Transmit FIFO Flush. */
-#define	 AICCR_RFLUSH		(1 << 7) /* Receive FIFO Flush. */
-#define	 AICCR_CHANNEL_S	24
-#define	 AICCR_CHANNEL_M	(0x7 << AICCR_CHANNEL_S)
-#define	 AICCR_CHANNEL_2	(0x1 << AICCR_CHANNEL_S) /* 2 channels, stereo */
-#define	 AICCR_ISS_S		16	/* Input Sample Size. */
-#define	 AICCR_ISS_M		(0x7 << AICCR_ISS_S)
-#define	 AICCR_ISS_16		(0x1 << AICCR_ISS_S)
-#define	 AICCR_OSS_S		19	/* Output Sample Size. */
-#define	 AICCR_OSS_M		(0x7 << AICCR_OSS_S)
-#define	 AICCR_OSS_16		(0x1 << AICCR_OSS_S)
-#define	 AICCR_RDMS		(1 << 15) /* Receive DMA enable. */
-#define	 AICCR_TDMS		(1 << 14) /* Transmit DMA enable. */
-#define	 AICCR_ENLBF		(1 << 2) /* Enable AIC Loop Back Function. */
-#define	 AICCR_ERPL		(1 << 1) /* Enable Playing Back function. */
-#define	I2SCR		0x10	/* AIC I2S/MSB-justified Control */
-#define	 I2SCR_ESCLK	(1 << 4) /* Enable SYSCLK output. */
-#define	 I2SCR_AMSL	(1 << 0) /* Select MSB-Justified Operation Mode. */
-#define	AICSR		0x14	/* AIC FIFO Status Register Register */
-#define	I2SSR		0x1C	/* AIC I2S/MSB-justified Status Register */
-#define	I2SDIV		0x30	/* AIC I2S/MSB-justified Clock Divider Register */
-#define	AICDR		0x34	/* AIC FIFO Data Port Register */
-#define	SPENA		0x80	/* SPDIF Enable Register */
-#define	SPCTRL		0x84	/* SPDIF Control Register */
-#define	SPSTATE		0x88	/* SPDIF Status Register */
-#define	SPCFG1		0x8C	/* SPDIF Configure 1 Register */
-#define	SPCFG2		0x90	/* SPDIF Configure 2 Register */
-#define	SPFIFO		0x94	/* SPDIF FIFO Register */
diff --git a/sys/mips/ingenic/jz4780_clk.h b/sys/mips/ingenic/jz4780_clk.h
deleted file mode 100644
index 43ade45dd699..000000000000
--- a/sys/mips/ingenic/jz4780_clk.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_INGENIC_JZ4780_CLK_H
-#define	_MIPS_INGENIC_JZ4780_CLK_H
-
-#include <dev/extres/clk/clk.h>
-#include <dev/extres/clk/clk_gate.h>
-
-/* Convenience bitfiled manipulation macros */
-#define REG_MSK(field)			(((1u << field ## _WIDTH) - 1) << field ##_SHIFT)
-#define REG_VAL(field, val)		((val) << field ##_SHIFT)
-#define REG_CLR(reg, field)		((reg) & ~REG_MSK(field))
-#define REG_GET(reg, field)		(((reg) & REG_MSK(field)) >> field ##_SHIFT)
-#define REG_SET(reg, field, val)	(REG_CLR(reg, field) | REG_VAL(field, val))
-
-/* Common clock macros */
-#define	CLK_LOCK(_sc)	mtx_lock((_sc)->clk_mtx)
-#define	CLK_UNLOCK(_sc)	mtx_unlock((_sc)->clk_mtx)
-
-#define CLK_WR_4(_sc, off, val)	bus_write_4((_sc)->clk_res, (off), (val))
-#define CLK_RD_4(_sc, off)	bus_read_4((_sc)->clk_res, (off))
-
-struct jz4780_clk_mux_descr {
-	uint16_t mux_reg;
-	uint16_t mux_shift: 5;
-	uint16_t mux_bits:  5;
-	uint16_t mux_map:   4; /* Map into mux space */
-};
-
-struct jz4780_clk_div_descr {
-	uint16_t div_reg;
-	uint16_t div_shift:	5;
-	uint16_t div_bits:	5;
-	uint16_t div_lg:	5;
-	int      div_ce_bit:	6; /* -1, if CE bit is not present */
-	int      div_st_bit:	6; /* Can be negative */
-	int      div_busy_bit:	6; /* Can be negative */
-};
-
-struct jz4780_clk_descr {
-	uint16_t clk_id:   6;
-	uint16_t clk_type: 3;
-	int clk_gate_bit:  7;      /* Can be negative */
-	struct jz4780_clk_mux_descr  clk_mux;
-	struct jz4780_clk_div_descr  clk_div;
-	const char  *clk_name;
-	const char  *clk_pnames[4];
-};
-
-/* clk_type bits */
-#define CLK_MASK_GATE	0x01
-#define CLK_MASK_DIV	0x02
-#define CLK_MASK_MUX	0x04
-
-extern int jz4780_clk_gen_register(struct clkdom *clkdom,
-    const struct jz4780_clk_descr *descr, struct mtx *dev_mtx,
-    struct resource *mem_res);
-
-extern int jz4780_clk_pll_register(struct clkdom *clkdom,
-    struct clknode_init_def *clkdef, struct mtx *dev_mtx,
-    struct resource *mem_res, uint32_t mem_reg);
-
-extern int jz4780_clk_otg_register(struct clkdom *clkdom,
-    struct clknode_init_def *clkdef, struct mtx *dev_mtx,
-    struct resource *mem_res);
-
-#endif /* _MIPS_INGENIC_JZ4780_CLK_PLL_H */
diff --git a/sys/mips/ingenic/jz4780_clk_gen.c b/sys/mips/ingenic/jz4780_clk_gen.c
deleted file mode 100644
index 1cab3b2c5393..000000000000
--- a/sys/mips/ingenic/jz4780_clk_gen.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 generic CGU clock driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-
-#include <machine/bus.h>
-
-#include <mips/ingenic/jz4780_clk.h>
-#include <mips/ingenic/jz4780_regs.h>
-
-/* JZ4780 generic mux and div clocks implementation */
-static int jz4780_clk_gen_init(struct clknode *clk, device_t dev);
-static int jz4780_clk_gen_recalc_freq(struct clknode *clk, uint64_t *freq);
-static int jz4780_clk_gen_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop);
-static int jz4780_clk_gen_set_gate(struct clknode *clk, bool enable);
-static int jz4780_clk_gen_set_mux(struct clknode *clk, int src);
-
-struct jz4780_clk_gen_sc {
-	struct mtx	*clk_mtx;
-	struct resource *clk_res;
-	int clk_reg;
-	const struct jz4780_clk_descr *clk_descr;
-};
-
-/*
- * JZ4780 clock PLL clock methods
- */
-static clknode_method_t jz4780_clk_gen_methods[] = {
-	CLKNODEMETHOD(clknode_init,		jz4780_clk_gen_init),
-	CLKNODEMETHOD(clknode_set_gate,		jz4780_clk_gen_set_gate),
-	CLKNODEMETHOD(clknode_recalc_freq,	jz4780_clk_gen_recalc_freq),
-	CLKNODEMETHOD(clknode_set_freq,		jz4780_clk_gen_set_freq),
-	CLKNODEMETHOD(clknode_set_mux,		jz4780_clk_gen_set_mux),
-
-	CLKNODEMETHOD_END
-};
-DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_gen_class, jz4780_clk_gen_methods,
-       sizeof(struct jz4780_clk_gen_sc), clknode_class);
-
-static inline unsigned
-mux_to_reg(unsigned src, unsigned map)
-{
-	unsigned ret, bit;
-
-	bit = (1u << 3);
-	for (ret = 0; bit; ret++, bit >>= 1) {
-		if (map & bit) {
-			if (src-- == 0)
-				return (ret);
-		}
-	}
-	panic("mux_to_reg");
-}
-
-static inline unsigned
-reg_to_mux(unsigned reg, unsigned map)
-{
-	unsigned ret, bit;
-
-	bit = (1u << 3);
-	for (ret = 0; reg; reg--, bit >>= 1)
-		if (map & bit)
-			ret++;
-	return (ret);
-}
-
-static int
-jz4780_clk_gen_init(struct clknode *clk, device_t dev)
-{
-	struct jz4780_clk_gen_sc *sc;
-	uint32_t reg, msk, parent_idx;
-
-	sc = clknode_get_softc(clk);
-	CLK_LOCK(sc);
-	/* Figure our parent out */
-	if (sc->clk_descr->clk_type & CLK_MASK_MUX) {
-		msk = (1u << sc->clk_descr->clk_mux.mux_bits) - 1;
-		reg = CLK_RD_4(sc, sc->clk_descr->clk_mux.mux_reg);
-		reg = (reg >> sc->clk_descr->clk_mux.mux_shift) & msk;
-		parent_idx = reg_to_mux(reg, sc->clk_descr->clk_mux.mux_map);
-	} else
-		parent_idx = 0;
-	CLK_UNLOCK(sc);
-
-	clknode_init_parent_idx(clk, parent_idx);
-	return (0);
-}
-
-static int
-jz4780_clk_gen_recalc_freq(struct clknode *clk, uint64_t *freq)
-{
-	struct jz4780_clk_gen_sc *sc;
-	uint32_t reg;
-
-	sc = clknode_get_softc(clk);
-
-	/* Calculate divisor frequency */
-	if (sc->clk_descr->clk_type & CLK_MASK_DIV) {
-		uint32_t msk;
-
-		msk = (1u << sc->clk_descr->clk_div.div_bits) - 1;
-		reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg);
-		reg = (reg >> sc->clk_descr->clk_div.div_shift) & msk;
-		reg = (reg + 1) << sc->clk_descr->clk_div.div_lg;
-		*freq /= reg;
-	}
-	return (0);
-}
-
-#define DIV_TIMEOUT	100
-
-static int
-jz4780_clk_gen_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop)
-{
-	struct jz4780_clk_gen_sc *sc;
-	uint64_t _fout;
-	uint32_t divider, div_reg, div_msk, reg, div_l, div_h;
-	int rv;
-
-	sc = clknode_get_softc(clk);
-
-	/* Find closest divider */
-	div_l = howmany(fin, *fout);
-	div_h = fin / *fout;
-	divider = abs((int64_t)*fout - (fin / div_l)) <
-	    abs((int64_t)*fout - (fin / div_h)) ? div_l : div_h;
-
-	/* Adjust for divider multiplier */
-	div_reg = divider >> sc->clk_descr->clk_div.div_lg;
-	divider = div_reg << sc->clk_descr->clk_div.div_lg;
-	if (divider == 0)
-		divider = 1;
-
-	_fout = fin / divider;
-
-	/* Rounding */
-	if ((flags & CLK_SET_ROUND_UP) && (*fout > _fout))
-		div_reg--;
-	else if ((flags & CLK_SET_ROUND_DOWN) && (*fout < _fout))
-		div_reg++;
-	if (div_reg == 0)
-		div_reg = 1;
-
-	div_msk = (1u << sc->clk_descr->clk_div.div_bits) - 1;
-
-	*stop = 1;
-	if (div_reg > div_msk + 1) {
-		*stop = 0;
-		div_reg = div_msk;
-	}
-
-	divider = (div_reg << sc->clk_descr->clk_div.div_lg);
-	div_reg--;
-
-	if ((flags & CLK_SET_DRYRUN) != 0) {
-		if (*stop != 0 && *fout != fin / divider &&
-		    (flags & (CLK_SET_ROUND_UP | CLK_SET_ROUND_DOWN)) == 0)
-			return (ERANGE);
-		*fout = fin / divider;
-		return (0);
-	}
-
-	CLK_LOCK(sc);
-	/* Apply the new divider value */
-	reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg);
-	reg &= ~(div_msk << sc->clk_descr->clk_div.div_shift);
-	reg |= (div_reg << sc->clk_descr->clk_div.div_shift);
-	/* Set the change enable bit, it present */
-	if (sc->clk_descr->clk_div.div_ce_bit >= 0)
-		reg |= (1u << sc->clk_descr->clk_div.div_ce_bit);
-	/* Clear stop bit, it present */
-	if (sc->clk_descr->clk_div.div_st_bit >= 0)
-		reg &= ~(1u << sc->clk_descr->clk_div.div_st_bit);
-	/* Initiate the change */
-	CLK_WR_4(sc, sc->clk_descr->clk_div.div_reg, reg);
-
-	/* Wait for busy bit to clear indicating the change is complete */
-	rv = 0;
-	if (sc->clk_descr->clk_div.div_busy_bit >= 0) {
-		int i;
-
-		for (i = 0;  i < DIV_TIMEOUT; i++) {
-			reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg);
-			if (!(reg & (1u << sc->clk_descr->clk_div.div_busy_bit)))
-				break;
-			DELAY(1000);
-		}
-		if (i == DIV_TIMEOUT)
-			rv = ETIMEDOUT;
-	}
-	CLK_UNLOCK(sc);
-
-	*fout = fin / divider;
-	return (rv);
-}
-
-static int
-jz4780_clk_gen_set_mux(struct clknode *clk, int src)
-{
-	struct jz4780_clk_gen_sc *sc;
-	uint32_t reg, msk;
-
-	sc = clknode_get_softc(clk);
-
-	/* Only mux nodes are capable of being reparented */
-	if (!(sc->clk_descr->clk_type & CLK_MASK_MUX))
-		return (src ? EINVAL : 0);
-
-	msk = (1u << sc->clk_descr->clk_mux.mux_bits) - 1;
-	src = mux_to_reg(src & msk, sc->clk_descr->clk_mux.mux_map);
-
-	CLK_LOCK(sc);
-	reg = CLK_RD_4(sc, sc->clk_descr->clk_mux.mux_reg);
-	reg &= ~(msk << sc->clk_descr->clk_mux.mux_shift);
-	reg |=  (src << sc->clk_descr->clk_mux.mux_shift);
-	CLK_WR_4(sc, sc->clk_descr->clk_mux.mux_reg, reg);
-	CLK_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-jz4780_clk_gen_set_gate(struct clknode *clk, bool enable)
-{
-	struct jz4780_clk_gen_sc *sc;
-	uint32_t off, reg, bit;
-
-	sc = clknode_get_softc(clk);
-
-	/* Check is clock can be gated */
-	if (sc->clk_descr->clk_gate_bit < 0)
-		return 0;
-
-	bit = sc->clk_descr->clk_gate_bit;
-	if (bit < 32) {
-		off = JZ_CLKGR0;
-	} else {
-		off = JZ_CLKGR1;
-		bit -= 32;
-	}
-
-	CLK_LOCK(sc);
-	reg = CLK_RD_4(sc, off);
-	if (enable)
-		reg &= ~(1u << bit);
-	else
-		reg |= (1u << bit);
-	CLK_WR_4(sc, off, reg);
-	CLK_UNLOCK(sc);
-
-	return (0);
-}
-
-int jz4780_clk_gen_register(struct clkdom *clkdom,
-    const struct jz4780_clk_descr *descr, struct mtx *dev_mtx,
-    struct resource *mem_res)
-{
-	struct clknode_init_def clkdef;
-	struct clknode *clk;
-	struct jz4780_clk_gen_sc *sc;
-
-	clkdef.id = descr->clk_id;
-	clkdef.name = __DECONST(char *, descr->clk_name);
-	/* Silly const games to work around API deficiency */
-	clkdef.parent_names = (const char **)(uintptr_t)&descr->clk_pnames[0];
-	clkdef.flags = CLK_NODE_STATIC_STRINGS;
-	if (descr->clk_type & CLK_MASK_MUX)
-		clkdef.parent_cnt = __bitcount16(descr->clk_mux.mux_map);
-	else
-		clkdef.parent_cnt = 1;
-
-	clk = clknode_create(clkdom, &jz4780_clk_gen_class, &clkdef);
-	if (clk == NULL)
-		return (1);
-
-	sc = clknode_get_softc(clk);
-	sc->clk_mtx = dev_mtx;
-	sc->clk_res = mem_res;
-	sc->clk_descr = descr;
-	clknode_register(clkdom, clk);
-
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_clk_otg.c b/sys/mips/ingenic/jz4780_clk_otg.c
deleted file mode 100644
index 26f2753a1a5f..000000000000
--- a/sys/mips/ingenic/jz4780_clk_otg.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 OTG PHY clock driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-
-#include <machine/bus.h>
-
-#include <mips/ingenic/jz4780_clk.h>
-#include <mips/ingenic/jz4780_regs.h>
-
-/* JZ4780 OTG PHY clock */
-static int jz4780_clk_otg_init(struct clknode *clk, device_t dev);
-static int jz4780_clk_otg_recalc_freq(struct clknode *clk, uint64_t *freq);
-static int jz4780_clk_otg_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop);
-
-struct jz4780_clk_otg_sc {
-	struct mtx	*clk_mtx;
-	struct resource *clk_res;
-};
-
-/*
- * JZ4780 OTG PHY clock methods
- */
-static clknode_method_t jz4780_clk_otg_methods[] = {
-	CLKNODEMETHOD(clknode_init,		jz4780_clk_otg_init),
-	CLKNODEMETHOD(clknode_recalc_freq,	jz4780_clk_otg_recalc_freq),
-	CLKNODEMETHOD(clknode_set_freq,		jz4780_clk_otg_set_freq),
-
-	CLKNODEMETHOD_END
-};
-DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_otg_class, jz4780_clk_otg_methods,
-       sizeof(struct jz4780_clk_otg_sc), clknode_class);
-
-static int
-jz4780_clk_otg_init(struct clknode *clk, device_t dev)
-{
-	struct jz4780_clk_otg_sc *sc;
-	uint32_t reg;
-
-	sc = clknode_get_softc(clk);
-	CLK_LOCK(sc);
-	/* Force the use fo the core clock */
-	reg = CLK_RD_4(sc, JZ_USBPCR1);
-	reg &= ~PCR_REFCLK_M;
-	reg |= PCR_REFCLK_CORE;
-	CLK_WR_4(sc, JZ_USBPCR1, reg);
-	CLK_UNLOCK(sc);
-
-	clknode_init_parent_idx(clk, 0);
-	return (0);
-}
-
-static const struct {
-	uint32_t div_val;
-	uint32_t freq;
-} otg_div_table[] = {
-    { PCR_CLK_12,	12000000 },
-    { PCR_CLK_192,	19200000 },
-    { PCR_CLK_24,	24000000 },
-    { PCR_CLK_48,	48000000 }
-};
-
-static int
-jz4780_clk_otg_recalc_freq(struct clknode *clk, uint64_t *freq)
-{
-	struct jz4780_clk_otg_sc *sc;
-	uint32_t reg;
-	int i;
-
-	sc = clknode_get_softc(clk);
-	reg = CLK_RD_4(sc, JZ_USBPCR1);
-	reg &= PCR_CLK_M;
-
-	for (i = 0; i < nitems(otg_div_table); i++)
-		if (otg_div_table[i].div_val == reg)
-			*freq = otg_div_table[i].freq;
-	return (0);
-}
-
-static int
-jz4780_clk_otg_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop)
-{
-	struct jz4780_clk_otg_sc *sc;
-	uint32_t reg;
-	int i;
-
-	sc = clknode_get_softc(clk);
-
-	for (i = 0; i < nitems(otg_div_table) - 1; i++) {
-		if (*fout < (otg_div_table[i].freq + otg_div_table[i + 1].freq) / 2)
-			break;
-	}
-
-	*fout = otg_div_table[i].freq;
-
-	*stop = 1;
-	if (flags & CLK_SET_DRYRUN)
-		return (0);
-
-	CLK_LOCK(sc);
-	reg = CLK_RD_4(sc, JZ_USBPCR1);
-	/* Set the calculated values */
-	reg &= ~PCR_CLK_M;
-	reg |= otg_div_table[i].div_val;
-	/* Initiate the change */
-	CLK_WR_4(sc, JZ_USBPCR1, reg);
-	CLK_UNLOCK(sc);
-
-	return (0);
-}
-
-int jz4780_clk_otg_register(struct clkdom *clkdom,
-    struct clknode_init_def *clkdef, struct mtx *dev_mtx,
-    struct resource *mem_res)
-{
-	struct clknode *clk;
-	struct jz4780_clk_otg_sc *sc;
-
-	clk = clknode_create(clkdom, &jz4780_clk_otg_class, clkdef);
-	if (clk == NULL)
-		return (1);
-
-	sc = clknode_get_softc(clk);
-	sc->clk_mtx = dev_mtx;
-	sc->clk_res = mem_res;
-	clknode_register(clkdom, clk);
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_clk_pll.c b/sys/mips/ingenic/jz4780_clk_pll.c
deleted file mode 100644
index 23710e54ac7f..000000000000
--- a/sys/mips/ingenic/jz4780_clk_pll.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 CGU driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-
-#include <machine/bus.h>
-
-#include <mips/ingenic/jz4780_clk.h>
-
-/**********************************************************************
- *  JZ4780 PLL control register bit fields
- **********************************************************************/
-#define CGU_PLL_M_SHIFT		19
-#define CGU_PLL_M_WIDTH		13
-
-#define CGU_PLL_N_SHIFT		13
-#define CGU_PLL_N_WIDTH		6
-
-#define CGU_PLL_OD_SHIFT	9
-#define CGU_PLL_OD_WIDTH	4
-
-#define CGU_PLL_LOCK_SHIFT	6
-#define CGU_PLL_LOCK_WIDTH	1
-
-#define CGU_PLL_ON_SHIFT	4
-#define CGU_PLL_ON_WIDTH	1
-
-#define CGU_PLL_MODE_SHIFT	3
-#define CGU_PLL_MODE_WIDTH	1
-
-#define CGU_PLL_BP_SHIFT	1
-#define CGU_PLL_BP_WIDTH	1
-
-#define CGU_PLL_EN_SHIFT	0
-#define CGU_PLL_EN_WIDTH	1
-
-/* JZ4780 PLL clock */
-static int jz4780_clk_pll_init(struct clknode *clk, device_t dev);
-static int jz4780_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq);
-static int jz4780_clk_pll_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop);
-
-struct jz4780_clk_pll_sc {
-	struct mtx	*clk_mtx;
-	struct resource *clk_res;
-	uint32_t	 clk_reg;
-};
-
-/*
- * JZ4780 PLL clock methods
- */
-static clknode_method_t jz4780_clk_pll_methods[] = {
-	CLKNODEMETHOD(clknode_init,		jz4780_clk_pll_init),
-	CLKNODEMETHOD(clknode_recalc_freq,	jz4780_clk_pll_recalc_freq),
-	CLKNODEMETHOD(clknode_set_freq,		jz4780_clk_pll_set_freq),
-
-	CLKNODEMETHOD_END
-};
-DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_pll_class, jz4780_clk_pll_methods,
-       sizeof(struct jz4780_clk_pll_sc), clknode_class);
-
-static int
-jz4780_clk_pll_init(struct clknode *clk, device_t dev)
-{
-	struct jz4780_clk_pll_sc *sc;
-	uint32_t reg;
-
-	sc = clknode_get_softc(clk);
-	CLK_LOCK(sc);
-	reg = CLK_RD_4(sc, sc->clk_reg);
-	CLK_WR_4(sc, sc->clk_reg, reg);
-	CLK_UNLOCK(sc);
-
-	clknode_init_parent_idx(clk, 0);
-	return (0);
-}
-
-static int
-jz4780_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq)
-{
-	struct jz4780_clk_pll_sc *sc;
-	uint32_t reg, m, n, od;
-
-	sc = clknode_get_softc(clk);
-	reg = CLK_RD_4(sc, sc->clk_reg);
-
-	/* Check for PLL enabled status */
-	if (REG_GET(reg, CGU_PLL_EN) == 0) {
-		*freq = 0;
-		return 0;
-	}
-
-	/* Return parent frequency if PPL is being bypassed */
-	if (REG_GET(reg, CGU_PLL_BP) != 0)
-		return 0;
-
-	m = REG_GET(reg, CGU_PLL_M) + 1;
-	n = REG_GET(reg, CGU_PLL_N) + 1;
-	od = REG_GET(reg, CGU_PLL_OD) + 1;
-
-	/* Sanity check values */
-	if (m == 0 || n == 0 || od == 0) {
-		*freq = 0;
-		return (EINVAL);
-	}
-
-	*freq = ((*freq / n) * m) / od;
-	return (0);
-}
-
-#define MHZ		(1000 * 1000)
-#define PLL_TIMEOUT	100
-
-static int
-jz4780_clk_pll_wait_lock(struct jz4780_clk_pll_sc *sc)
-{
-	int i;
-
-	for (i = 0;  i < PLL_TIMEOUT; i++) {
-		if (CLK_RD_4(sc, sc->clk_reg) & REG_VAL(CGU_PLL_LOCK, 1))
-			return (0);
-		DELAY(1000);
-	}
-	return (ETIMEDOUT);
-}
-
-static int
-jz4780_clk_pll_set_freq(struct clknode *clk, uint64_t fin,
-    uint64_t *fout, int flags, int *stop)
-{
-	struct jz4780_clk_pll_sc *sc;
-	uint32_t reg, m, n, od;
-	int rv;
-
-	sc = clknode_get_softc(clk);
-
-	/* Should be able to figure all clocks with m & n only */
-	od = 1;
-
-	m = MIN((uint32_t)(*fout / MHZ), (1u << CGU_PLL_M_WIDTH));
-	m = MIN(m, 1);
-
-	n = MIN((uint32_t)(fin / MHZ), (1u << CGU_PLL_N_WIDTH));
-	n = MIN(n, 1);
-
-	if (flags & CLK_SET_DRYRUN) {
-		if (((flags & (CLK_SET_ROUND_UP | CLK_SET_ROUND_DOWN)) == 0) &&
-		    (*fout != (((fin / n) * m) / od)))
-		return (ERANGE);
-
-		*fout = ((fin / n) * m) / od;
-		return (0);
-	}
-
-	CLK_LOCK(sc);
-	reg = CLK_RD_4(sc, sc->clk_reg);
-
-	/* Set the calculated values */
-	reg = REG_SET(reg, CGU_PLL_M, m - 1);
-	reg = REG_SET(reg, CGU_PLL_N, n - 1);
-	reg = REG_SET(reg, CGU_PLL_OD, od - 1);
-
-	/* Enable the PLL */
-	reg = REG_SET(reg, CGU_PLL_EN, 1);
-	reg = REG_SET(reg, CGU_PLL_BP, 0);
-
-	/* Initiate the change */
-	CLK_WR_4(sc, sc->clk_reg, reg);
-
-	/* Wait for PLL to lock */
-	rv = jz4780_clk_pll_wait_lock(sc);
-	CLK_UNLOCK(sc);
-	if (rv != 0)
-		return (rv);
-
-	*fout = ((fin / n) * m) / od;
-	return (0);
-}
-
-int jz4780_clk_pll_register(struct clkdom *clkdom,
-    struct clknode_init_def *clkdef, struct mtx *dev_mtx,
-    struct resource *mem_res, uint32_t mem_reg)
-{
-	struct clknode *clk;
-	struct jz4780_clk_pll_sc *sc;
-
-	clk = clknode_create(clkdom, &jz4780_clk_pll_class, clkdef);
-	if (clk == NULL)
-		return (1);
-
-	sc = clknode_get_softc(clk);
-	sc->clk_mtx = dev_mtx;
-	sc->clk_res = mem_res;
-	sc->clk_reg = mem_reg;
-	clknode_register(clkdom, clk);
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_clock.c b/sys/mips/ingenic/jz4780_clock.c
deleted file mode 100644
index f743e193c7a9..000000000000
--- a/sys/mips/ingenic/jz4780_clock.c
+++ /dev/null
@@ -1,830 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 CGU driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_clk.h>
-#include <mips/ingenic/jz4780_regs.h>
-#include <mips/ingenic/jz4780_clock.h>
-
-#include "clkdev_if.h"
-
-#include <dt-bindings/clock/jz4780-cgu.h>
-
-/**********************************************************************
- *  JZ4780 CGU clock domain
- **********************************************************************/
-struct jz4780_clock_softc {
-	device_t	dev;
-	struct resource	*res[1];
-	struct mtx	mtx;
-	struct clkdom	*clkdom;
-};
-
-static struct resource_spec jz4780_clock_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-struct jz4780_clk_pll_def {
-	uint16_t   clk_id;
-	uint16_t   clk_reg;
-	const char *clk_name;
-	const char *clk_pname[1];
-};
-
-#define PLL(_id, cname, pname, reg) {		\
-	.clk_id		= _id,			\
-	.clk_reg	= reg,			\
-	.clk_name	= cname,		\
-	.clk_pname[0]	= pname,		\
-}
-
-struct jz4780_clk_gate_def {
-	uint16_t   clk_id;
-	uint16_t   clk_bit;
-	const char *clk_name;
-	const char *clk_pname[1];
-};
-
-#define GATE(_id, cname, pname, bit) {		\
-	.clk_id		= _id,			\
-	.clk_bit	= bit,			\
-	.clk_name	= cname,		\
-	.clk_pname[0]	= pname,		\
-}
-
-#define MUX(reg, shift, bits, map)			\
-    .clk_mux.mux_reg = (reg),				\
-    .clk_mux.mux_shift = (shift),			\
-    .clk_mux.mux_bits = (bits),				\
-    .clk_mux.mux_map = (map),
-#define NO_MUX
-
-#define DIV(reg, shift, lg, bits, ce, st, bb)		\
-    .clk_div.div_reg = (reg),				\
-    .clk_div.div_shift = (shift),			\
-    .clk_div.div_bits = (bits),				\
-    .clk_div.div_lg = (lg),				\
-    .clk_div.div_ce_bit = (ce),				\
-    .clk_div.div_st_bit = (st),				\
-    .clk_div.div_busy_bit = (bb),
-#define NO_DIV						\
-
-#define GATEBIT(bit)					\
-    .clk_gate_bit = (bit),
-#define NO_GATE						\
-    .clk_gate_bit = (-1),
-
-#define PLIST(pnames...)				\
-    .clk_pnames = { pnames },
-
-#define GENCLK(id, name, type, parents, mux, div, gt) {	\
-	.clk_id		= id,				\
-	.clk_type       = type,				\
-	.clk_name	= name,				\
-	parents						\
-	mux						\
-	div						\
-	gt						\
-}
-
-/* PLL definitions */
-static struct jz4780_clk_pll_def pll_clks[] = {
-	PLL(JZ4780_CLK_APLL, "apll", "ext", JZ_CPAPCR),
-	PLL(JZ4780_CLK_MPLL, "mpll", "ext", JZ_CPMPCR),
-	PLL(JZ4780_CLK_EPLL, "epll", "ext", JZ_CPEPCR),
-	PLL(JZ4780_CLK_VPLL, "vpll", "ext", JZ_CPVPCR),
-};
-
-/* OTG PHY clock (reuse gate def structure */
-static struct jz4780_clk_gate_def otg_clks[] = {
-	GATE(JZ4780_CLK_OTGPHY,	"otg_phy",	"ext", 0),
-};
-
-static const struct jz4780_clk_descr gen_clks[] = {
-	GENCLK(JZ4780_CLK_SCLKA, "sclk_a", CLK_MASK_MUX,
-	    PLIST("apll", "ext", "rtc"),
-	    MUX(JZ_CPCCR, 30, 2, 0x7),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_CPUMUX, "cpumux", CLK_MASK_MUX,
-	    PLIST("sclk_a", "mpll", "epll"),
-	    MUX(JZ_CPCCR, 28, 2, 0x7),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_CPU, "cpu", CLK_MASK_DIV,
-	    PLIST("cpumux"),
-	    NO_MUX,
-	    DIV(JZ_CPCCR, 0, 0, 4, 22, -1, -1),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_L2CACHE, "l2cache", CLK_MASK_DIV,
-	    PLIST("cpumux"),
-	    NO_MUX,
-	    DIV(JZ_CPCCR, 4, 0, 4, -1, -1, -1),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_AHB0, "ahb0", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll", "epll"),
-	    MUX(JZ_CPCCR, 26, 2, 0x7),
-	    DIV(JZ_CPCCR, 8, 0, 4, 21, -1, -1),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_AHB2PMUX, "ahb2_apb_mux", CLK_MASK_MUX,
-	    PLIST("sclk_a", "mpll", "rtc"),
-	    MUX(JZ_CPCCR, 24, 2, 0x7),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_AHB2, "ahb2", CLK_MASK_DIV,
-	    PLIST("ahb2_apb_mux"),
-	    NO_MUX,
-	    DIV(JZ_CPCCR, 12, 0, 4, 20, -1, -1),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_PCLK, "pclk", CLK_MASK_DIV,
-	    PLIST("ahb2_apb_mux"),
-	    NO_MUX,
-	    DIV(JZ_CPCCR, 16, 0, 4, 20, -1, -1),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_DDR, "ddr", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll"),
-	    MUX(JZ_DDCDR, 30, 2, 0x6),
-	    DIV(JZ_DDCDR, 0, 0, 4, 29, 28, 27),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_VPU, "vpu", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("sclk_a", "mpll", "epll"),
-	    MUX(JZ_VPUCDR, 30, 2, 0xe),
-	    DIV(JZ_VPUCDR, 0, 0, 4, 29, 28, 27),
-	    GATEBIT(32 + 2)
-	),
-
-	GENCLK(JZ4780_CLK_I2SPLL, "i2s_pll", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "epll"),
-	    MUX(JZ_I2SCDR, 30, 1, 0xc),
-	    DIV(JZ_I2SCDR, 0, 0, 8, 29, 28, 27),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_I2S, "i2s", CLK_MASK_MUX,
-	    PLIST("ext", "i2s_pll"),
-	    MUX(JZ_I2SCDR, 31, 1, 0xc),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_LCD0PIXCLK, "lcd0pixclk", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll", "vpll"),
-	    MUX(JZ_LP0CDR, 30, 2, 0xe),
-	    DIV(JZ_LP0CDR, 0, 0, 8, 28, 27, 26),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_LCD1PIXCLK, "lcd1pixclk", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll", "vpll"),
-	    MUX(JZ_LP1CDR, 30, 2, 0xe),
-	    DIV(JZ_LP1CDR, 0, 0, 8, 28, 27, 26),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_MSCMUX, "msc_mux", CLK_MASK_MUX,
-	    PLIST("sclk_a", "mpll"),
-	    MUX(JZ_MSC0CDR, 30, 2, 0x6),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_MSC0, "msc0", CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("msc_mux"),
-	    NO_MUX,
-	    DIV(JZ_MSC0CDR, 0, 1, 8, 29, 28, 27),
-	    GATEBIT(3)
-	),
-
-	GENCLK(JZ4780_CLK_MSC1, "msc1", CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("msc_mux"),
-	    NO_MUX,
-	    DIV(JZ_MSC1CDR, 0, 1, 8, 29, 28, 27),
-	    GATEBIT(11)
-	),
-
-	GENCLK(JZ4780_CLK_MSC2, "msc2", CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("msc_mux"),
-	    NO_MUX,
-	    DIV(JZ_MSC2CDR, 0, 1, 8, 29, 28, 27),
-	    GATEBIT(12)
-	),
-
-	GENCLK(JZ4780_CLK_UHC, "uhc", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("sclk_a", "mpll", "epll", "otg_phy"),
-	    MUX(JZ_UHCCDR, 30, 2, 0xf),
-	    DIV(JZ_UHCCDR, 0, 0, 8, 29, 28, 27),
-	    GATEBIT(24)
-	),
-
-	GENCLK(JZ4780_CLK_SSIPLL, "ssi_pll", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll"),
-	    MUX(JZ_SSICDR, 30, 1, 0xc),
-	    DIV(JZ_SSICDR, 0, 0, 8, 29, 28, 27),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_SSI, "ssi", CLK_MASK_MUX,
-	    PLIST("ext", "ssi_pll"),
-	    MUX(JZ_SSICDR, 31, 1, 0xc),
-	    NO_DIV,
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_CIMMCLK, "cim_mclk", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll"),
-	    MUX(JZ_CIMCDR, 31, 1, 0xc),
-	    DIV(JZ_CIMCDR, 0, 0, 8, 30, 29, 28),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_PCMPLL, "pcm_pll", CLK_MASK_MUX | CLK_MASK_DIV,
-	    PLIST("sclk_a", "mpll", "epll", "vpll"),
-	    MUX(JZ_PCMCDR, 29, 2, 0xf),
-	    DIV(JZ_PCMCDR, 0, 0, 8, 28, 27, 26),
-	    NO_GATE
-	),
-
-	GENCLK(JZ4780_CLK_PCM, "pcm", CLK_MASK_MUX | CLK_MASK_GATE,
-	    PLIST("ext", "pcm_pll"),
-	    MUX(JZ_PCMCDR, 31, 1, 0xc),
-	    NO_DIV,
-	    GATEBIT(32 + 3)
-	),
-
-	GENCLK(JZ4780_CLK_GPU, "gpu", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("sclk_a", "mpll", "epll"),
-	    MUX(JZ_GPUCDR, 30, 2, 0x7),
-	    DIV(JZ_GPUCDR, 0, 0, 4, 29, 28, 27),
-	    GATEBIT(32 + 4)
-	),
-
-	GENCLK(JZ4780_CLK_HDMI, "hdmi", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("sclk_a", "mpll", "vpll"),
-	    MUX(JZ_HDMICDR, 30, 2, 0xe),
-	    DIV(JZ_HDMICDR, 0, 0, 8, 29, 28, 26),
-	    GATEBIT(32 + 9)
-	),
-
-	GENCLK(JZ4780_CLK_BCH, "bch", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
-	    PLIST("sclk_a", "mpll", "epll"),
-	    MUX(JZ_BCHCDR, 30, 2, 0x7),
-	    DIV(JZ_BCHCDR, 0, 0, 4, 29, 28, 27),
-	    GATEBIT(1)
-	),
-};
-
-static struct jz4780_clk_gate_def gate_clks[] = {
-	GATE(JZ4780_CLK_NEMC,	"nemc",		"ahb2", 0),
-	GATE(JZ4780_CLK_OTG0,	"otg0",		"ext",	2),
-	GATE(JZ4780_CLK_SSI0,	"ssi0",		"ssi",	4),
-	GATE(JZ4780_CLK_SMB0,	"smb0",		"pclk", 5),
-	GATE(JZ4780_CLK_SMB1,	"smb1",		"pclk", 6),
-	GATE(JZ4780_CLK_SCC,	"scc",		"ext",	7),
-	GATE(JZ4780_CLK_AIC,	"aic",		"ext",	8),
-	GATE(JZ4780_CLK_TSSI0,	"tssi0",	"ext",	9),
-	GATE(JZ4780_CLK_OWI,	"owi",		"ext",	10),
-	GATE(JZ4780_CLK_KBC,	"kbc",		"ext",	13),
-	GATE(JZ4780_CLK_SADC,	"sadc",		"ext",	14),
-	GATE(JZ4780_CLK_UART0,	"uart0",	"ext",	15),
-	GATE(JZ4780_CLK_UART1,	"uart1",	"ext",	16),
-	GATE(JZ4780_CLK_UART2,	"uart2",	"ext",	17),
-	GATE(JZ4780_CLK_UART3,	"uart3",	"ext",	18),
-	GATE(JZ4780_CLK_SSI1,	"ssi1",		"ssi",	19),
-	GATE(JZ4780_CLK_SSI2,	"ssi2",		"ssi",	20),
-	GATE(JZ4780_CLK_PDMA,	"pdma",		"ext",	21),
-	GATE(JZ4780_CLK_GPS,	"gps",		"ext",	22),
-	GATE(JZ4780_CLK_MAC,	"mac",		"ext",	23),
-	GATE(JZ4780_CLK_SMB2,	"smb2",		"pclk",	25),
-	GATE(JZ4780_CLK_CIM,	"cim",		"ext",	26),
-	GATE(JZ4780_CLK_LCD,	"lcd",		"ext",	28),
-	GATE(JZ4780_CLK_TVE,	"tve",		"lcd",	27),
-	GATE(JZ4780_CLK_IPU,	"ipu",		"ext",	29),
-	GATE(JZ4780_CLK_DDR0,	"ddr0",		"ddr",	30),
-	GATE(JZ4780_CLK_DDR1,	"ddr1",		"ddr",	31),
-	GATE(JZ4780_CLK_SMB3,	"smb3",		"pclk",	32 + 0),
-	GATE(JZ4780_CLK_TSSI1,	"tssi1",	"ext",	32 + 1),
-	GATE(JZ4780_CLK_COMPRESS, "compress",	"ext",	32 + 5),
-	GATE(JZ4780_CLK_AIC1,	"aic1",		"ext",	32 + 6),
-	GATE(JZ4780_CLK_GPVLC,	"gpvlc",	"ext",	32 + 7),
-	GATE(JZ4780_CLK_OTG1,	"otg1",		"ext",	32 + 8),
-	GATE(JZ4780_CLK_UART4,	"uart4",	"ext",	32 + 10),
-	GATE(JZ4780_CLK_AHBMON,	"ahb_mon",	"ext",	32 + 11),
-	GATE(JZ4780_CLK_SMB4,	"smb4",		"pclk", 32 + 12),
-	GATE(JZ4780_CLK_DES,	"des",		"ext",	32 + 13),
-	GATE(JZ4780_CLK_X2D,	"x2d",		"ext",	32 + 14),
-	GATE(JZ4780_CLK_CORE1,	"core1",	"cpu",	32 + 15),
-};
-
-static int
-jz4780_clock_register(struct jz4780_clock_softc *sc)
-{
-	int i, ret;
-
-	/* Register PLLs */
-	for (i = 0; i < nitems(pll_clks); i++) {
-		struct clknode_init_def clkdef;
-
-		clkdef.id = pll_clks[i].clk_id;
-		clkdef.name = __DECONST(char *, pll_clks[i].clk_name);
-		clkdef.parent_names = pll_clks[i].clk_pname;
-		clkdef.parent_cnt = 1;
-		clkdef.flags = CLK_NODE_STATIC_STRINGS;
-
-		ret = jz4780_clk_pll_register(sc->clkdom, &clkdef, &sc->mtx,
-		    sc->res[0], pll_clks[i].clk_reg);
-		if (ret != 0)
-			return (ret);
-	}
-
-	/* Register OTG clock */
-	for (i = 0; i < nitems(otg_clks); i++) {
-		struct clknode_init_def clkdef;
-
-		clkdef.id = otg_clks[i].clk_id;
-		clkdef.name = __DECONST(char *, otg_clks[i].clk_name);
-		clkdef.parent_names = otg_clks[i].clk_pname;
-		clkdef.parent_cnt = 1;
-		clkdef.flags = CLK_NODE_STATIC_STRINGS;
-
-		ret = jz4780_clk_otg_register(sc->clkdom, &clkdef, &sc->mtx,
-		    sc->res[0]);
-		if (ret != 0)
-			return (ret);
-	}
-
-	/* Register muxes and divisors */
-	for (i = 0; i < nitems(gen_clks); i++) {
-		ret = jz4780_clk_gen_register(sc->clkdom, &gen_clks[i],
-		    &sc->mtx, sc->res[0]);
-		if (ret != 0)
-			return (ret);
-	}
-
-	/* Register simple gates */
-	for (i = 0; i < nitems(gate_clks); i++) {
-		struct clk_gate_def gatedef;
-
-		gatedef.clkdef.id = gate_clks[i].clk_id;
-		gatedef.clkdef.name = __DECONST(char *, gate_clks[i].clk_name);
-		gatedef.clkdef.parent_names = gate_clks[i].clk_pname;
-		gatedef.clkdef.parent_cnt = 1;
-		gatedef.clkdef.flags = CLK_NODE_STATIC_STRINGS;
-
-		if (gate_clks[i].clk_bit < 32) {
-			gatedef.offset = JZ_CLKGR0;
-			gatedef.shift = gate_clks[i].clk_bit;
-		} else {
-			gatedef.offset = JZ_CLKGR1;
-			gatedef.shift = gate_clks[i].clk_bit - 32;
-		}
-		gatedef.mask = 1;
-		gatedef.on_value = 0;
-		gatedef.off_value = 1;
-		gatedef.gate_flags = 0;
-
-		ret = clknode_gate_register(sc->clkdom, &gatedef);
-		if (ret != 0)
-			return (ret);
-	}
-
-	return (0);
-}
-
-static int
-jz4780_clock_fixup(struct jz4780_clock_softc *sc)
-{
-	struct clknode *clk_uhc;
-	int ret;
-
-	/*
-	 * Make UHC mux use MPLL as the source. It defaults to OTG_PHY
-	 * and that somehow just does not work.
-	 */
-	clkdom_xlock(sc->clkdom);
-
-	/* Assume the worst */
-	ret = ENXIO;
-
-	clk_uhc = clknode_find_by_id(sc->clkdom, JZ4780_CLK_UHC);
-	if (clk_uhc != NULL) {
-		ret = clknode_set_parent_by_name(clk_uhc, "mpll");
-		if (ret != 0)
-			device_printf(sc->dev,
-			    "unable to reparent uhc clock\n");
-		else
-			ret = clknode_set_freq(clk_uhc, 48000000, 0, 0);
-		if (ret != 0)
-			device_printf(sc->dev, "unable to init uhc clock\n");
-	} else
-		device_printf(sc->dev, "unable to lookup uhc clock\n");
-
-	clkdom_unlock(sc->clkdom);
-	return (ret);
-}
-
-#define	CGU_LOCK(sc)		mtx_lock(&(sc)->mtx)
-#define	CGU_UNLOCK(sc)		mtx_unlock(&(sc)->mtx)
-#define	CGU_LOCK_INIT(sc)	\
-    mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),	\
-    "jz4780-cgu", MTX_DEF)
-#define	CGU_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx);
-
-#define CSR_WRITE_4(sc, reg, val)	bus_write_4((sc)->res[0], (reg), (val))
-#define CSR_READ_4(sc, reg)		bus_read_4((sc)->res[0], (reg))
-
-static int
-jz4780_clock_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-cgu"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic jz4780 CGU");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_clock_attach(device_t dev)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	if (bus_alloc_resources(dev, jz4780_clock_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	sc->dev = dev;
-	CGU_LOCK_INIT(sc);
-
-	sc->clkdom = clkdom_create(dev);
-	if (sc->clkdom == NULL)
-		goto fail;
-	if (jz4780_clock_register(sc) != 0)
-		goto fail;
-	if (clkdom_finit(sc->clkdom) != 0)
-		goto fail;
-	if (jz4780_clock_fixup(sc) != 0)
-		goto fail;
-	if (bootverbose)
-		clkdom_dump(sc->clkdom);
-
-	return (0);
-fail:
-	bus_release_resources(dev, jz4780_clock_spec, sc->res);
-	CGU_LOCK_DESTROY(sc);
-
-	return (ENXIO);
-}
-
-static int
-jz4780_clock_detach(device_t dev)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	bus_release_resources(dev, jz4780_clock_spec, sc->res);
-	CGU_LOCK_DESTROY(sc);
-
-	return (0);
-}
-
-static int
-jz4780_clock_write_4(device_t dev, bus_addr_t addr, uint32_t val)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	CSR_WRITE_4(sc, addr, val);
-	return (0);
-}
-
-static int
-jz4780_clock_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	*val = CSR_READ_4(sc, addr);
-	return (0);
-}
-
-static int
-jz4780_clock_modify_4(device_t dev, bus_addr_t addr, uint32_t clear_mask,
-    uint32_t set_mask)
-{
-	struct jz4780_clock_softc *sc;
-	uint32_t val;
-
-	sc = device_get_softc(dev);
-	val = CSR_READ_4(sc, addr);
-	val &= ~clear_mask;
-	val |= set_mask;
-	CSR_WRITE_4(sc, addr, val);
-	return (0);
-}
-
-static void
-jz4780_clock_device_lock(device_t dev)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	CGU_LOCK(sc);
-}
-
-static void
-jz4780_clock_device_unlock(device_t dev)
-{
-	struct jz4780_clock_softc *sc;
-
-	sc = device_get_softc(dev);
-	CGU_UNLOCK(sc);
-}
-
-static device_method_t jz4780_clock_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_clock_probe),
-	DEVMETHOD(device_attach,	jz4780_clock_attach),
-	DEVMETHOD(device_detach,	jz4780_clock_detach),
-
-	/* Clock device interface */
-	DEVMETHOD(clkdev_write_4,	jz4780_clock_write_4),
-	DEVMETHOD(clkdev_read_4,	jz4780_clock_read_4),
-	DEVMETHOD(clkdev_modify_4,	jz4780_clock_modify_4),
-	DEVMETHOD(clkdev_device_lock,	jz4780_clock_device_lock),
-	DEVMETHOD(clkdev_device_unlock,	jz4780_clock_device_unlock),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_clock_driver = {
-	"cgu",
-	jz4780_clock_methods,
-	sizeof(struct jz4780_clock_softc),
-};
-
-static devclass_t jz4780_clock_devclass;
-
-EARLY_DRIVER_MODULE(jz4780_clock, simplebus, jz4780_clock_driver,
-    jz4780_clock_devclass, 0, 0,  BUS_PASS_CPU + BUS_PASS_ORDER_LATE);
-
-static int
-jz4780_ehci_clk_config(struct jz4780_clock_softc *sc)
-{
-	clk_t phy_clk, ext_clk;
-	uint64_t phy_freq;
-	int err;
-
-	phy_clk = NULL;
-	ext_clk = NULL;
-	err = -1;
-
-	/* Set phy timing by copying it from ext */
-	if (clk_get_by_id(sc->dev, sc->clkdom, JZ4780_CLK_OTGPHY,
-	    &phy_clk) != 0)
-		goto done;
-	if (clk_get_parent(phy_clk, &ext_clk) != 0)
-		goto done;
-	if (clk_get_freq(ext_clk, &phy_freq) != 0)
-		goto done;
-	if (clk_set_freq(phy_clk, phy_freq, 0) != 0)
-		goto done;
-	err = 0;
-done:
-	clk_release(ext_clk);
-	clk_release(phy_clk);
-
-	return (err);
-}
-
-int
-jz4780_ohci_enable(void)
-{
-	device_t dev;
-	struct jz4780_clock_softc *sc;
-	uint32_t reg;
-
-	dev = devclass_get_device(jz4780_clock_devclass, 0);
-	if (dev == NULL)
-		return (-1);
-
-	sc = device_get_softc(dev);
-	CGU_LOCK(sc);
-
-	/* Do not force port1 to suspend mode */
-	reg = CSR_READ_4(sc, JZ_OPCR);
-	reg |= OPCR_SPENDN1;
-	CSR_WRITE_4(sc, JZ_OPCR, reg);
-
-	CGU_UNLOCK(sc);
-	return (0);
-}
-
-int
-jz4780_ehci_enable(void)
-{
-	device_t dev;
-	struct jz4780_clock_softc *sc;
-	uint32_t reg;
-
-	dev = devclass_get_device(jz4780_clock_devclass, 0);
-	if (dev == NULL)
-		return (-1);
-
-	sc = device_get_softc(dev);
-
-	/*
-	 * EHCI should use MPPL as a parent, but Linux configures OTG
-	 * clock anyway. Follow their lead blindly.
-	 */
-	if (jz4780_ehci_clk_config(sc) != 0)
-		return (-1);
-
-	CGU_LOCK(sc);
-
-	/* Enable OTG, should not be necessary since we use PLL clock */
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg &= ~(PCR_OTG_DISABLE);
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-
-	/* Do not force port1 to suspend mode */
-	reg = CSR_READ_4(sc, JZ_OPCR);
-	reg |= OPCR_SPENDN1;
-	CSR_WRITE_4(sc, JZ_OPCR, reg);
-
-	/* D- pulldown */
-	reg = CSR_READ_4(sc, JZ_USBPCR1);
-	reg |= PCR_DMPD1;
-	CSR_WRITE_4(sc, JZ_USBPCR1, reg);
-
-	/* D+ pulldown */
-	reg = CSR_READ_4(sc, JZ_USBPCR1);
-	reg |= PCR_DPPD1;
-	CSR_WRITE_4(sc, JZ_USBPCR1, reg);
-
-	/* 16 bit bus witdth for port 1*/
-	reg = CSR_READ_4(sc, JZ_USBPCR1);
-	reg |= PCR_WORD_I_F1 | PCR_WORD_I_F0;
-	CSR_WRITE_4(sc, JZ_USBPCR1, reg);
-
-	/* Reset USB */
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg |= PCR_POR;
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-	DELAY(1);
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg &= ~(PCR_POR);
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-
-	/* Soft-reset USB */
-	reg = CSR_READ_4(sc, JZ_SRBC);
-	reg |= SRBC_UHC_SR;
-	CSR_WRITE_4(sc, JZ_SRBC, reg);
-	/* 300ms */
-	DELAY(300*hz/1000);
-
-	reg = CSR_READ_4(sc, JZ_SRBC);
-	reg &= ~(SRBC_UHC_SR);
-	CSR_WRITE_4(sc, JZ_SRBC, reg);
-
-	/* 300ms */
-	DELAY(300*hz/1000);
-
-	CGU_UNLOCK(sc);
-	return (0);
-}
-
-#define	USBRESET_DETECT_TIME	0x96
-
-int
-jz4780_otg_enable(void)
-{
-	device_t dev;
-	struct jz4780_clock_softc *sc;
-	uint32_t reg;
-
-	dev = devclass_get_device(jz4780_clock_devclass, 0);
-	if (dev == NULL)
-		return (-1);
-
-	sc = device_get_softc(dev);
-
-	CGU_LOCK(sc);
-
-	/* Select Synopsys OTG mode */
-	reg = CSR_READ_4(sc, JZ_USBPCR1);
-	reg |= PCR_SYNOPSYS;
-
-	/* Set UTMI bus width to 16 bit */
-	reg |= PCR_WORD_I_F0 | PCR_WORD_I_F1;
-	CSR_WRITE_4(sc, JZ_USBPCR1, reg);
-
-	/* Blah */
-	reg = CSR_READ_4(sc, JZ_USBVBFIL);
-	reg = REG_SET(reg, USBVBFIL_IDDIGFIL, 0);
-	reg = REG_SET(reg, USBVBFIL_USBVBFIL, 0);
-	CSR_WRITE_4(sc, JZ_USBVBFIL, reg);
-
-	/* Setup reset detect time */
-	reg = CSR_READ_4(sc, JZ_USBRDT);
-	reg = REG_SET(reg, USBRDT_USBRDT, USBRESET_DETECT_TIME);
-	reg |= USBRDT_VBFIL_LD_EN;
-	CSR_WRITE_4(sc, JZ_USBRDT, reg);
-
-	/* Setup USBPCR bits */
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg |= PCR_USB_MODE;
-	reg |= PCR_COMMONONN;
-	reg |= PCR_VBUSVLDEXT;
-	reg |= PCR_VBUSVLDEXTSEL;
-	reg &= ~(PCR_OTG_DISABLE);
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-
-	/* Reset USB */
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg |= PCR_POR;
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-	DELAY(1000);
-	reg = CSR_READ_4(sc, JZ_USBPCR);
-	reg &= ~(PCR_POR);
-	CSR_WRITE_4(sc, JZ_USBPCR, reg);
-
-	/* Unsuspend OTG port */
-	reg = CSR_READ_4(sc, JZ_OPCR);
-	reg |= OPCR_SPENDN0;
-	CSR_WRITE_4(sc, JZ_OPCR, reg);
-
-	CGU_UNLOCK(sc);
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_clock.h b/sys/mips/ingenic/jz4780_clock.h
deleted file mode 100644
index 226e81bc67ad..000000000000
--- a/sys/mips/ingenic/jz4780_clock.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef JZ4780_CLOCK_H
-#define JZ4780_CLOCK_H
-
-extern int jz4780_ehci_enable(void);
-extern int jz4780_ohci_enable(void);
-extern int jz4780_otg_enable(void);
-
-#endif
diff --git a/sys/mips/ingenic/jz4780_codec.c b/sys/mips/ingenic/jz4780_codec.c
deleted file mode 100644
index ccd56807020a..000000000000
--- a/sys/mips/ingenic/jz4780_codec.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* Ingenic JZ4780 CODEC. */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/gpio/gpiobusvar.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <mips/ingenic/jz4780_common.h>
-#include <mips/ingenic/jz4780_codec.h>
-
-#define	CI20_HP_PIN	13
-#define	CI20_HP_PORT	3
-
-struct codec_softc {
-	device_t		dev;
-	struct resource		*res[1];
-	bus_space_tag_t		bst;
-	bus_space_handle_t	bsh;
-	clk_t			clk;
-};
-
-static struct resource_spec codec_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int codec_probe(device_t dev);
-static int codec_attach(device_t dev);
-static int codec_detach(device_t dev);
-void codec_print_registers(struct codec_softc *sc);
-
-static int
-codec_write(struct codec_softc *sc, uint32_t reg, uint32_t val)
-{
-	uint32_t tmp;
-
-	clk_enable(sc->clk);
-
-	tmp = (reg << RGADW_RGADDR_S);
-	tmp |= (val << RGADW_RGDIN_S);
-	tmp |= RGADW_RGWR;
-
-	WRITE4(sc, CODEC_RGADW, tmp);
-
-	while(READ4(sc, CODEC_RGADW) & RGADW_RGWR)
-		;
-
-	clk_disable(sc->clk);
-
-	return (0);
-}
-
-static int
-codec_read(struct codec_softc *sc, uint32_t reg)
-{
-	uint32_t tmp;
-
-	clk_enable(sc->clk);
-
-	tmp = (reg << RGADW_RGADDR_S);
-	WRITE4(sc, CODEC_RGADW, tmp);
-
-	tmp = READ4(sc, CODEC_RGDATA);
-
-	clk_disable(sc->clk);
-
-	return (tmp);
-}
-
-void
-codec_print_registers(struct codec_softc *sc)
-{
-
-	printf("codec SR %x\n", codec_read(sc, SR));
-	printf("codec SR2 %x\n", codec_read(sc, SR2));
-	printf("codec MR %x\n", codec_read(sc, MR));
-	printf("codec AICR_DAC %x\n", codec_read(sc, AICR_DAC));
-	printf("codec AICR_ADC %x\n", codec_read(sc, AICR_ADC));
-	printf("codec CR_LO %x\n", codec_read(sc, CR_LO));
-	printf("codec CR_HP %x\n", codec_read(sc, CR_HP));
-	printf("codec CR_DMIC %x\n", codec_read(sc, CR_DMIC));
-	printf("codec CR_MIC1 %x\n", codec_read(sc, CR_MIC1));
-	printf("codec CR_MIC2 %x\n", codec_read(sc, CR_MIC2));
-	printf("codec CR_LI1 %x\n", codec_read(sc, CR_LI1));
-	printf("codec CR_LI2 %x\n", codec_read(sc, CR_LI2));
-	printf("codec CR_DAC %x\n", codec_read(sc, CR_DAC));
-	printf("codec CR_ADC %x\n", codec_read(sc, CR_ADC));
-	printf("codec CR_MIX %x\n", codec_read(sc, CR_MIX));
-	printf("codec DR_MIX %x\n", codec_read(sc, DR_MIX));
-	printf("codec CR_VIC %x\n", codec_read(sc, CR_VIC));
-	printf("codec CR_CK %x\n", codec_read(sc, CR_CK));
-	printf("codec FCR_DAC %x\n", codec_read(sc, FCR_DAC));
-	printf("codec FCR_ADC %x\n", codec_read(sc, FCR_ADC));
-	printf("codec CR_TIMER_MSB %x\n", codec_read(sc, CR_TIMER_MSB));
-	printf("codec CR_TIMER_LSB %x\n", codec_read(sc, CR_TIMER_LSB));
-	printf("codec ICR %x\n", codec_read(sc, ICR));
-	printf("codec IMR %x\n", codec_read(sc, IMR));
-	printf("codec IFR %x\n", codec_read(sc, IFR));
-	printf("codec IMR2 %x\n", codec_read(sc, IMR2));
-	printf("codec IFR2 %x\n", codec_read(sc, IFR2));
-	printf("codec GCR_HPL %x\n", codec_read(sc, GCR_HPL));
-	printf("codec GCR_HPR %x\n", codec_read(sc, GCR_HPR));
-	printf("codec GCR_LIBYL %x\n", codec_read(sc, GCR_LIBYL));
-	printf("codec GCR_LIBYR %x\n", codec_read(sc, GCR_LIBYR));
-	printf("codec GCR_DACL %x\n", codec_read(sc, GCR_DACL));
-	printf("codec GCR_DACR %x\n", codec_read(sc, GCR_DACR));
-	printf("codec GCR_MIC1 %x\n", codec_read(sc, GCR_MIC1));
-	printf("codec GCR_MIC2 %x\n", codec_read(sc, GCR_MIC2));
-	printf("codec GCR_ADCL %x\n", codec_read(sc, GCR_ADCL));
-	printf("codec GCR_ADCR %x\n", codec_read(sc, GCR_ADCR));
-	printf("codec GCR_MIXDACL %x\n", codec_read(sc, GCR_MIXDACL));
-	printf("codec GCR_MIXDACR %x\n", codec_read(sc, GCR_MIXDACR));
-	printf("codec GCR_MIXADCL %x\n", codec_read(sc, GCR_MIXADCL));
-	printf("codec GCR_MIXADCR %x\n", codec_read(sc, GCR_MIXADCR));
-	printf("codec CR_ADC_AGC %x\n", codec_read(sc, CR_ADC_AGC));
-	printf("codec DR_ADC_AGC %x\n", codec_read(sc, DR_ADC_AGC));
-}
-
-/*
- * CI20 board-specific
- */
-static int
-ci20_hp_unmute(struct codec_softc *sc)
-{
-	device_t dev;
-	int port;
-	int err;
-	int pin;
-
-	pin = CI20_HP_PIN;
-	port = CI20_HP_PORT;
-
-	dev = devclass_get_device(devclass_find("gpio"), port);
-	if (dev == NULL)
-		return (0);
-
-	err = GPIO_PIN_SETFLAGS(dev, pin, GPIO_PIN_OUTPUT);
-	if (err != 0) {
-		device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-		    pin, device_get_nameunit(dev));
-		return (err);
-	}
-
-	err = GPIO_PIN_SET(dev, pin, 0);
-	if (err != 0) {
-		device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-		    pin, device_get_nameunit(dev));
-		return (err);
-	}
-
-	return (0);
-}
-
-static int
-codec_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-codec"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 CODEC");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-codec_attach(device_t dev)
-{
-	struct codec_softc *sc;
-	uint8_t reg;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, codec_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	/* Memory interface */
-	sc->bst = rman_get_bustag(sc->res[0]);
-	sc->bsh = rman_get_bushandle(sc->res[0]);
-
-	if (clk_get_by_ofw_name(dev, 0, "i2s", &sc->clk) != 0) {
-		device_printf(dev, "could not get i2s clock\n");
-		bus_release_resources(dev, codec_spec, sc->res);
-		return (ENXIO);
-	}
-
-	/* Initialize codec. */
-	reg = codec_read(sc, CR_VIC);
-	reg &= ~(VIC_SB_SLEEP | VIC_SB);
-	codec_write(sc, CR_VIC, reg);
-
-	DELAY(20000);
-
-	reg = codec_read(sc, CR_DAC);
-	reg &= ~(DAC_SB | DAC_MUTE);
-	codec_write(sc, CR_DAC, reg);
-
-	DELAY(10000);
-
-	/* I2S, 16-bit, 48 kHz. */
-	reg = codec_read(sc, AICR_DAC);
-	reg &= ~(AICR_DAC_SB | DAC_ADWL_M);
-	reg |= DAC_ADWL_16;
-	reg &= ~(AUDIOIF_M);
-	reg |= AUDIOIF_I2S;
-	codec_write(sc, AICR_DAC, reg);
-
-	DELAY(10000);
-
-	reg = FCR_DAC_48;
-	codec_write(sc, FCR_DAC, reg);
-
-	DELAY(10000);
-
-	/* Unmute headphones. */
-	reg = codec_read(sc, CR_HP);
-	reg &= ~(HP_SB | HP_MUTE);
-	codec_write(sc, CR_HP, reg);
-
-	ci20_hp_unmute(sc);
-
-	return (0);
-}
-
-static int
-codec_detach(device_t dev)
-{
-	struct codec_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	bus_release_resources(dev, codec_spec, sc->res);
-
-	return (0);
-}
-
-static device_method_t codec_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,			codec_probe),
-	DEVMETHOD(device_attach,		codec_attach),
-	DEVMETHOD(device_detach,		codec_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t codec_driver = {
-	"codec",
-	codec_methods,
-	sizeof(struct codec_softc),
-};
-
-static devclass_t codec_devclass;
-
-DRIVER_MODULE(codec, simplebus, codec_driver, codec_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_codec.h b/sys/mips/ingenic/jz4780_codec.h
deleted file mode 100644
index 151a2f4c78ee..000000000000
--- a/sys/mips/ingenic/jz4780_codec.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define	CODEC_RGADW	0x00	/* Address, data in and write command */
-#define	 RGADW_ICRST	(1 << 31) /* Reset internal CODEC */
-#define	 RGADW_RGWR	(1 << 16) /* Issue a write command to CODEC */
-#define	 RGADW_RGADDR_S	8	/* CODEC register's address. */
-#define	 RGADW_RGADDR_M	(0x7f << RGADW_RGADDR_S)
-#define	 RGADW_RGDIN_S	0	/* CODEC register data to write */
-#define	 RGADW_RGDIN_M	(0xff << RGADW_RGDIN_S)
-#define	CODEC_RGDATA	0x04	/* The data read out */
-
-#define	SR		0x00	/* Status Register */
-#define	SR2		0x01	/* Status Register 2 */
-#define	MR		0x07	/* Mode status register */
-#define	AICR_DAC	0x08	/* DAC Audio Interface Control Register */
-#define	 DAC_ADWL_S	6	/* Audio Data Word Length for DAC path. */
-#define	 DAC_ADWL_M	(0x3 << DAC_ADWL_S)
-#define	 DAC_ADWL_16	(0 << DAC_ADWL_S)
-#define	 AICR_DAC_SB	(1 << 4)	/* DAC audio interface in power-down mode */
-#define	 AUDIOIF_S	0
-#define	 AUDIOIF_M	(0x3 << AUDIOIF_S)
-#define	 AUDIOIF_I2S	0x3	/* I2S interface */
-#define	 AUDIOIF_DSP	0x2	/* DSP interface */
-#define	 AUDIOIF_LJ	0x1	/* Left-justified interface */
-#define	 AUDIOIF_P	0x0	/* Parallel interface */
-#define	AICR_ADC	0x09	/* ADC Audio Interface Control Register */
-#define	CR_LO		0x0B	/* Differential line-out Control Register */
-#define	CR_HP		0x0D	/* HeadPhone Control Register */
-#define	 HP_MUTE	(1 << 7)	/* no signal on headphone outputs */
-#define	 HP_SB		(1 << 4)	/* power-down */
-#define	CR_DMIC		0x10	/* Digital Microphone register */
-#define	CR_MIC1		0x11	/* Microphone1 Control register */
-#define	CR_MIC2		0x12	/* Microphone2 Control register */
-#define	CR_LI1		0x13	/* Control Register for line1 inputs */
-#define	CR_LI2		0x14	/* Control Register for line2 inputs */
-#define	CR_DAC		0x17	/* DAC Control Register */
-#define	 DAC_MUTE	(1 << 7)	/* puts the DAC in soft mute mode */
-#define	 DAC_SB		(1 << 4)	/* power-down */
-#define	CR_ADC		0x18	/* ADC Control Register */
-#define	CR_MIX		0x19	/* Digital Mixer Control Register */
-#define	DR_MIX		0x1A	/* Digital Mixer Data Register */
-#define	CR_VIC		0x1B	/* Control Register for the ViC */
-#define	 VIC_SB_SLEEP	(1 << 1)	/* sleep mode */
-#define	 VIC_SB		(1 << 0)	/* complete power-down */
-#define	CR_CK		0x1C	/* Clock Control Register */
-#define	FCR_DAC		0x1D	/* DAC Frequency Control Register */
-#define	 FCR_DAC_48	8	/* 48 kHz. */
-#define	 FCR_DAC_96	10	/* 96 kHz. */
-#define	FCR_ADC		0x20	/* ADC Frequency Control Register */
-#define	CR_TIMER_MSB	0x21	/* MSB of programmable counter */
-#define	CR_TIMER_LSB	0x22	/* LSB of programmable counter */
-#define	ICR		0x23	/* Interrupt Control Register */
-#define	IMR		0x24	/* Interrupt Mask Register */
-#define	IFR		0x25	/* Interrupt Flag Register */
-#define	IMR2		0x26	/* Interrupt Mask Register 2 */
-#define	IFR2		0x27	/* Interrupt Flag Register 2 */
-#define	GCR_HPL		0x28	/* Left channel headphone Control Gain Register */
-#define	GCR_HPR		0x29	/* Right channel headphone Control Gain Register */
-#define	GCR_LIBYL	0x2A	/* Left channel bypass line Control Gain Register */
-#define	GCR_LIBYR	0x2B	/* Right channel bypass line Control Gain Register */
-#define	GCR_DACL	0x2C	/* Left channel DAC Gain Control Register */
-#define	GCR_DACR	0x2D	/* Right channel DAC Gain Control Register */
-#define	GCR_MIC1	0x2E	/* Microphone 1 Gain Control Register */
-#define	GCR_MIC2	0x2F	/* Microphone 2 Gain Control Register */
-#define	GCR_ADCL	0x30	/* Left ADC Gain Control Register */
-#define	GCR_ADCR	0x31	/* Right ADC Gain Control Register */
-#define	GCR_MIXDACL	0x34	/* DAC Digital Mixer Control Register */
-#define	GCR_MIXDACR	0x35	/* DAC Digital Mixer Control Register */
-#define	GCR_MIXADCL	0x36	/* ADC Digital Mixer Control Register */
-#define	GCR_MIXADCR	0x37	/* ADC Digital Mixer Control Register */
-#define	CR_ADC_AGC	0x3A	/* Automatic Gain Control Register */
-#define	DR_ADC_AGC	0x3B	/* Automatic Gain Control Data Register */
diff --git a/sys/mips/ingenic/jz4780_common.h b/sys/mips/ingenic/jz4780_common.h
deleted file mode 100644
index fee5faff8c00..000000000000
--- a/sys/mips/ingenic/jz4780_common.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define	READ4(_sc, _reg)	\
-	bus_space_read_4(_sc->bst, _sc->bsh, _reg)
-#define	WRITE4(_sc, _reg, _val)	\
-	bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
diff --git a/sys/mips/ingenic/jz4780_cpuregs.h b/sys/mips/ingenic/jz4780_cpuregs.h
deleted file mode 100644
index 355730738459..000000000000
--- a/sys/mips/ingenic/jz4780_cpuregs.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef JZ4780_CPUREGS_H
-#define JZ4780_CPUREGS_H
-
-/* Core control register */
-#define JZ_CORECTL_SLP1M_SHIFT	17
-#define JZ_CORECTL_SLP1M	(1u << JZ_CORECTL_SLP1M_SHIFT)
-#define JZ_CORECTL_SLP0M_SHIFT	16
-#define JZ_CORECTL_SLP0M	(1u << JZ_CORECTL_SLP0M_SHIFT)
-#define JZ_CORECTL_RPC1_SHIFT	9
-#define JZ_CORECTL_RPC1		(1u << JZ_CORECTL_RPC1_SHIFT)
-#define JZ_CORECTL_RPC0_SHIFT	8
-#define JZ_CORECTL_RPC0		(1u << JZ_CORECTL_RPC0_SHIFT)
-#define JZ_CORECTL_SWRST1_SHIFT	1
-#define JZ_CORECTL_SWRST1	(1u << JZ_CORECTL_SWRST1_SHIFT)
-#define JZ_CORECTL_SWRST0_SHIFT	0
-#define JZ_CORECTL_SWRST0	(1u << JZ_CORECTL_SWRST0_SHIFT)
-
-/* Core status register */
-#define JZ_CORESTS_SLP1_SHIFT	17
-#define JZ_CORESTS_SLP1		(1u << JZ_CORESTS_SLP1_SHIFT)
-#define JZ_CORESTS_SLP0_SHIFT	16
-#define JZ_CORESTS_SLP0		(1u << JZ_CORESTS_SLP0_SHIFT)
-#define JZ_CORESTS_IRQ1P_SHIFT	9
-#define JZ_CORESTS_IRQ1P	(1u << JZ_CORESTS_IRQ1P_SHIFT)
-#define JZ_CORESTS_IRQ0P_SHIFT	8
-#define JZ_CORESTS_IRQ0P	(1u << JZ_CORESTS_IRQ0P_SHIFT)
-#define JZ_CORESTS_MIRQ1P_SHIFT	1
-#define JZ_CORESTS_MIRQ1P	(1u << JZ_CORESTS_MIRQ1P_SHIFT)
-#define JZ_CORESTS_MIRQ0P_SHIFT	0
-#define JZ_CORESTS_MIRQ0P	(1u << JZ_CORESTS_MIRQ0P_SHIFT)
-
-/* Reset entry and IRQ mask */
-#define JZ_REIM_ENTRY_SHIFT	16
-#define JZ_REIM_ENTRY_WIDTH	16
-#define JZ_REIM_ENTRY_MASK	(0xFFFFu << JZ_REIM_ENTRY_SHIFT)
-#define JZ_REIM_IRQ1M_SHIFT	9
-#define JZ_REIM_IRQ1M		(1u << JZ_REIM_IRQ1M_SHIFT)
-#define JZ_REIM_IRQ0M_SHIFT	8
-#define JZ_REIM_IRQ0M		(1u << JZ_REIM_IRQ0M_SHIFT)
-#define JZ_REIM_MIRQ1M_SHIFT	1
-#define JZ_REIM_MIRQ1M		(1u << JZ_REIM_MIRQ1M_SHIFT)
-#define JZ_REIM_MIRQ0M_SHIFT	0
-#define JZ_REIM_MIRQ0M		(1u << JZ_REIM_MIRQ0M_SHIFT)
-
-#endif /* JZ4780_CPUREGS_H */
diff --git a/sys/mips/ingenic/jz4780_dme.c b/sys/mips/ingenic/jz4780_dme.c
deleted file mode 100644
index a612be6a799a..000000000000
--- a/sys/mips/ingenic/jz4780_dme.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-struct jz4780_dme_softc {
-	device_t		dev;
-	struct resource		*res[2];
-};
-
-static struct resource_spec jz4780_dme_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ SYS_RES_MEMORY, 1, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int jz4780_dme_probe(device_t dev);
-static int jz4780_dme_attach(device_t dev);
-static int jz4780_dme_detach(device_t dev);
-
-static int
-jz4780_dme_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "davicom,dm9000"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Davicom DM9000C 10/100BaseTX");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_dme_attach(device_t dev)
-{
-	struct jz4780_dme_softc *sc = device_get_softc(dev);
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_dme_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-jz4780_dme_detach(device_t dev)
-{
-	struct jz4780_dme_softc *sc = device_get_softc(dev);
-
-	bus_release_resources(dev, jz4780_dme_spec, sc->res);
-	return (0);
-}
-
-static device_method_t jz4780_dme_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_dme_probe),
-	DEVMETHOD(device_attach,	jz4780_dme_attach),
-	DEVMETHOD(device_detach,	jz4780_dme_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_dme_driver = {
-	"dme",
-	jz4780_dme_methods,
-	sizeof(struct jz4780_dme_softc),
-};
-
-static devclass_t jz4780_dme_devclass;
-
-DRIVER_MODULE(jz4780_dme, simplebus, jz4780_dme_driver,
-    jz4780_dme_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_dwc_fdt.c b/sys/mips/ingenic/jz4780_dwc_fdt.c
deleted file mode 100644
index c5af46b633eb..000000000000
--- a/sys/mips/ingenic/jz4780_dwc_fdt.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- *  1. Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *  2. Redistributions in binary form must reproduce the above copyright
- *     notice, this list of conditions and the following disclaimer in the
- *     documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/callout.h>
-#include <sys/condvar.h>
-#include <sys/module.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/dwc_otg.h>
-#include <dev/usb/controller/dwc_otg_fdt.h>
-
-#include <mips/ingenic/jz4780_clock.h>
-#include <mips/ingenic/jz4780_regs.h>
-
-static device_probe_t jz4780_dwc_otg_probe;
-static device_attach_t jz4780_dwc_otg_attach;
-static device_detach_t jz4780_dwc_otg_detach;
-
-struct jz4780_dwc_otg_softc {
-	struct dwc_otg_fdt_softc base;	/* storage for DWC OTG code */
-	clk_t			phy_clk;
-	clk_t			otg_clk;
-};
-
-static int
-jz4780_dwc_otg_clk_enable(device_t dev)
-{
-	struct jz4780_dwc_otg_softc *sc;
-	int err;
-
-	sc = device_get_softc(dev);
-
-	/* Configure and enable phy clock */
-	err = clk_get_by_ofw_name(dev, 0, "otg_phy", &sc->phy_clk);
-	if (err != 0) {
-		device_printf(dev, "unable to lookup %s clock\n", "otg_phy");
-		return (err);
-	}
-	err = clk_set_freq(sc->phy_clk, 48000000, 0);
-	if (err != 0) {
-		device_printf(dev, "unable to set %s clock to 48 kHZ\n",
-		    "otg_phy");
-		return (err);
-	}
-	err = clk_enable(sc->phy_clk);
-	if (err != 0) {
-		device_printf(dev, "unable to enable %s clock\n", "otg_phy");
-		return (err);
-	}
-
-	/* Configure and enable otg1 clock */
-	err = clk_get_by_ofw_name(dev, 0, "otg1", &sc->otg_clk);
-	if (err != 0) {
-		device_printf(dev, "unable to lookup %s clock\n", "otg1");
-		return (err);
-	}
-	err = clk_enable(sc->phy_clk);
-	if (err != 0) {
-		device_printf(dev, "unable to enable %s clock\n", "otg1");
-		return (err);
-	}
-
-	return (0);
-}
-
-static int
-jz4780_dwc_otg_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-otg"))
-		return (ENXIO);
-
-	device_set_desc(dev, "DWC OTG 2.0 integrated USB controller (jz4780)");
-
-	return (BUS_PROBE_VENDOR);
-}
-
-static int
-jz4780_dwc_otg_attach(device_t dev)
-{
-	struct jz4780_dwc_otg_softc *sc;
-	struct resource *res;
-	int err, rid;
-
-	sc = device_get_softc(dev);
-
-	err = jz4780_dwc_otg_clk_enable(dev);
-	if (err != 0)
-		goto fail;
-
-	err = jz4780_otg_enable();
-	if (err != 0) {
-		device_printf(dev, "CGU failed to enable OTG\n");
-		goto fail;
-	}
-
-	/* Voodoo: Switch off VBUS overcurrent detection in OTG PHY */
-	res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (res != NULL) {
-		uint32_t reg;
-
-		reg = bus_read_4(res, JZ_DWC2_GUSBCFG);
-		reg |= 0xc;
-		bus_write_4(res, JZ_DWC2_GUSBCFG, reg);
-		bus_release_resource(dev, SYS_RES_MEMORY, rid, res);
-	}
-
-	sc->base.sc_otg.sc_phy_type = DWC_OTG_PHY_UTMI;
-	sc->base.sc_otg.sc_phy_bits = 16;
-
-	err = dwc_otg_attach(dev);
-	if (err != 0)
-		goto fail;
-
-	return (0);
-fail:
-	if (sc->otg_clk)
-		clk_release(sc->otg_clk);
-	if (sc->phy_clk)
-		clk_release(sc->phy_clk);
-	return (err);
-}
-
-static int
-jz4780_dwc_otg_detach(device_t dev)
-{
-	struct jz4780_dwc_otg_softc *sc;
-	int err;
-
-	err = dwc_otg_detach(dev);
-	if (err != 0)
-		return (err);
-
-	sc = device_get_softc(dev);
-	if (sc->otg_clk)
-		clk_release(sc->otg_clk);
-	if (sc->phy_clk)
-		clk_release(sc->phy_clk);
-	return (0);
-}
-
-static device_method_t jz4780_dwc_otg_methods[] = {
-	/* bus interface */
-	DEVMETHOD(device_probe, jz4780_dwc_otg_probe),
-	DEVMETHOD(device_attach, jz4780_dwc_otg_attach),
-	DEVMETHOD(device_detach, jz4780_dwc_otg_detach),
-
-	DEVMETHOD_END
-};
-
-static devclass_t jz4780_dwc_otg_devclass;
-
-DEFINE_CLASS_1(jzotg, jz4780_dwc_otg_driver, jz4780_dwc_otg_methods,
-    sizeof(struct jz4780_dwc_otg_softc), dwc_otg_driver);
-DRIVER_MODULE(jzotg, simplebus, jz4780_dwc_otg_driver,
-    jz4780_dwc_otg_devclass, 0, 0);
-MODULE_DEPEND(jzotg, usb, 1, 1, 1);
diff --git a/sys/mips/ingenic/jz4780_efuse.c b/sys/mips/ingenic/jz4780_efuse.c
deleted file mode 100644
index 4c4ca7ce02f0..000000000000
--- a/sys/mips/ingenic/jz4780_efuse.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev <kan@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/clock.h>
-#include <sys/kernel.h>
-#include <sys/limits.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/module.h>
-#include <sys/resource.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-static struct ofw_compat_data compat_data[] = {
-	{"ingenic,jz4780-efuse",	1},
-	{NULL,				0}
-};
-
-struct jz4780_efuse_data {
-	uint32_t serial_num;
-	uint32_t date;
-	uint8_t  nanufacturer[2];
-	uint8_t	 macaddr[6];
-} __packed;
-
-static struct resource_spec jz4780_efuse_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-struct jz4780_efuse_softc {
-	device_t		dev;
-	struct resource		*res[1];
-	struct jz4780_efuse_data data;
-};
-
-#define CSR_WRITE_4(sc, reg, val) \
-    bus_write_4((sc)->res[0], (reg), (val))
-#define CSR_READ_4(sc, reg) \
-    bus_read_4((sc)->res[0], (reg))
-
-#define JZ_EFUSE_BANK_SIZE	(4096 / 8) /* Bank size is 4096 bits */
-
-static int
-jz4780_efuse_probe(device_t dev)
-{
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static void
-jz4780_efuse_read_chunk(struct jz4780_efuse_softc *sc, int addr, uint8_t *buf, int len)
-{
-	uint32_t abuf;
-	int i, count;
-
-	/* Setup to read proper bank */
-	CSR_WRITE_4(sc, JZ_EFUCTRL, JZ_EFUSE_READ |
-	    (addr < JZ_EFUSE_BANK_SIZE ? 0: JZ_EFUSE_BANK) |
-	    (addr << JZ_EFUSE_ADDR_SHIFT) |
-	    ((len - 1) << JZ_EFUSE_SIZE_SHIFT));
-	/* Wait for read to complete */
-	while ((CSR_READ_4(sc, JZ_EFUSTATE) & JZ_EFUSE_RD_DONE) == 0)
-		DELAY(1000);
-
-	/* Round to 4 bytes for the simple loop below */
-	count = len & ~3;
-
-	for (i = 0; i < count; i += 4) {
-		abuf = CSR_READ_4(sc, JZ_EFUDATA0 + i);
-		memcpy(buf, &abuf, 4);
-		buf += 4;
-	}
-
-	/* Read partial word and assign it byte-by-byte */
-	if (i < len) {
-		abuf = CSR_READ_4(sc, JZ_EFUDATA0 + i);
-		for (/* none */; i < len; i++) {
-			buf[i] = abuf & 0xff;
-			abuf >>= 8;
-		}
-	}
-}
-
-static void
-jz4780_efuse_read(struct jz4780_efuse_softc *sc, int addr, void *buf, int len)
-{
-	int chunk;
-
-	while (len > 0) {
-		chunk = (len > 32) ? 32 : len;
-		jz4780_efuse_read_chunk(sc, addr, buf, chunk);
-		len -= chunk;
-		buf = (void *)((uintptr_t)buf + chunk);
-		addr += chunk;
-	}
-}
-
-static void
-jz4780_efuse_update_kenv(struct jz4780_efuse_softc *sc)
-{
-	char macstr[sizeof("xx:xx:xx:xx:xx:xx")];
-
-	/*
-	 * Update hint in kernel env only if none is available yet.
-	 * It is quite possible one was set by command line already.
-	 */
-	if (kern_getenv("hint.dme.0.macaddr") == NULL) {
-		snprintf(macstr, sizeof(macstr), "%6D",
-		    sc->data.macaddr, ":");
-		kern_setenv("hint.dme.0.macaddr", macstr);
-	}
-}
-
-static int
-jz4780_efuse_attach(device_t dev)
-{
-	struct jz4780_efuse_softc *sc;
-
- 	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_efuse_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	/*
-	 * Default RD_STROBE to 4 h2clk cycles, should already be set to 4 by  reset
-	 * but configure it anyway.
-	 */
-	CSR_WRITE_4(sc, JZ_EFUCFG, 0x00040000);
-
-	/* Read user-id segment */
-	jz4780_efuse_read(sc, 0x18, &sc->data, sizeof(sc->data));
-
-	/*
-	 * Set resource hints for the dme device to discover its
-	 * MAC address, if not set already.
-	 */
-	jz4780_efuse_update_kenv(sc);
-
-	/* Resource conflicts with NEMC, release early */
-	bus_release_resources(dev, jz4780_efuse_spec, sc->res);
-	return (0);
-}
-
-static int
-jz4780_efuse_detach(device_t dev)
-{
-
-	return (0);
-}
-
-static device_method_t jz4780_efuse_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_efuse_probe),
-	DEVMETHOD(device_attach,	jz4780_efuse_attach),
-	DEVMETHOD(device_detach,	jz4780_efuse_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_efuse_driver = {
-	"efuse",
-	jz4780_efuse_methods,
-	sizeof(struct jz4780_efuse_softc),
-};
-
-static devclass_t jz4780_efuse_devclass;
-EARLY_DRIVER_MODULE(jz4780_efuse, simplebus, jz4780_efuse_driver,
-    jz4780_efuse_devclass, 0, 0, BUS_PASS_TIMER);
diff --git a/sys/mips/ingenic/jz4780_ehci.c b/sys/mips/ingenic/jz4780_ehci.c
deleted file mode 100644
index c6cd2dc9d7b6..000000000000
--- a/sys/mips/ingenic/jz4780_ehci.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/*-
- * Copyright (c) 2015 Oleksandr Tymoshenko <gonzo@freebsd.org>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * JZ4780 attachment driver for the USB Enhanced Host Controller.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_bus.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/condvar.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/gpio.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-#include <dev/usb/controller/ehci.h>
-#include <dev/usb/controller/ehcireg.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/gpio/gpiobusvar.h>
-
-#include <mips/ingenic/jz4780_clock.h>
-#include <mips/ingenic/jz4780_regs.h>
-
-#define EHCI_HC_DEVSTR		"Ingenic JZ4780 EHCI"
-
-struct jz4780_ehci_softc {
-	ehci_softc_t		base;	/* storage for EHCI code */
-	clk_t			clk;
-	struct gpiobus_pin *gpio_vbus;
-};
-
-static device_probe_t jz4780_ehci_probe;
-static device_attach_t jz4780_ehci_attach;
-static device_detach_t jz4780_ehci_detach;
-
-static int
-jz4780_ehci_vbus_gpio_enable(device_t dev)
-{
-	struct gpiobus_pin *gpio_vbus;
-	struct jz4780_ehci_softc *sc;
-	int err;
-
-	sc = device_get_softc(dev);
-
-	err = ofw_gpiobus_parse_gpios(dev, "ingenic,vbus-gpio", &gpio_vbus);
-	/*
-	 * The pin can ne already mapped by other device. Optimistically
-	 * surge ahead.
-	 */
-	if (err <= 0)
-		return (0);
-
-	sc->gpio_vbus = gpio_vbus;
-	if (err > 1) {
-		device_printf(dev, "too many vbus gpios\n");
-		return (ENXIO);
-	}
-
-	if (sc->gpio_vbus != NULL) {
-		err = GPIO_PIN_SETFLAGS(sc->gpio_vbus->dev, sc->gpio_vbus->pin,
-		    GPIO_PIN_OUTPUT);
-		if (err != 0) {
-			device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-			    sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev));
-			return (err);
-		}
-
-		err = GPIO_PIN_SET(sc->gpio_vbus->dev, sc->gpio_vbus->pin, 1);
-		if (err != 0) {
-			device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-			    sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev));
-			return (err);
-		}
-	}
-	return (0);
-}
-
-static int
-jz4780_ehci_clk_enable(device_t dev)
-{
-	struct jz4780_ehci_softc *sc;
-	int err;
-
-	sc = device_get_softc(dev);
-
-	err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
-	if (err != 0) {
-		device_printf(dev, "unable to lookup device clock\n");
-		return (err);
-	}
-	err = clk_enable(sc->clk);
-	if (err != 0) {
-		device_printf(dev, "unable to enable device clock\n");
-		return (err);
-	}
-	err = clk_set_freq(sc->clk, 48000000, 0);
-	if (err != 0) {
-		device_printf(dev, "unable to set device clock to 48 kHZ\n");
-		return (err);
-	}
-	return (0);
-}
-
-static void
-jz4780_ehci_intr(void *arg)
-{
-
-	ehci_interrupt(arg);
-}
-
-static int
-jz4780_ehci_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-ehci"))
-		return (ENXIO);
-
-	device_set_desc(dev, EHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_ehci_attach(device_t dev)
-{
-	struct jz4780_ehci_softc *isc;
-	ehci_softc_t *sc;
-	int err;
-	int rid;
-	uint32_t reg;
-
-	isc = device_get_softc(dev);
-	sc = &isc->base;
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = dev;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) {
-		return (ENOMEM);
-	}
-
-	sc->sc_bus.usbrev = USB_REV_2_0;
-
-	err = jz4780_ehci_vbus_gpio_enable(dev);
-	if (err)
-		goto error;
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(dev, "Could not map memory\n");
-		goto error;
-	}
-
-	/*
-	 * Craft special resource for bus space ops that handle
-	 * byte-alignment of non-word addresses.
-	 */
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	err = jz4780_ehci_clk_enable(dev);
-	if (err)
-		goto error;
-
-	if (jz4780_ehci_enable() != 0) {
-		device_printf(dev, "CGU failed to enable EHCI\n");
-		err = ENXIO;
-		goto error;
-	}
-
-	EWRITE4(sc, EHCI_USBINTR, 0);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_ACTIVE | RF_SHAREABLE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(dev, "Could not allocate irq\n");
-		goto error;
-	}
-	sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (!sc->sc_bus.bdev) {
-		device_printf(dev, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "Ingenic");
-
-	err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-	    NULL, jz4780_ehci_intr, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(dev, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ehci_init(sc);
-	if (!err) {
-		/* Voodoo: set utmi data bus width on controller to 16 bit */
-		reg = EREAD4(sc, JZ_EHCI_REG_UTMI_BUS);
-		reg |= UTMI_BUS_WIDTH;
-		EWRITE4(sc, JZ_EHCI_REG_UTMI_BUS, reg);
-
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(dev, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	jz4780_ehci_detach(dev);
-	return (ENXIO);
-}
-
-static int
-jz4780_ehci_detach(device_t dev)
-{
-	struct jz4780_ehci_softc *isc;
-	ehci_softc_t *sc;
-	device_t bdev;
-	int err;
-
-	isc = device_get_softc(dev);
-	sc = &isc->base;
-
-	if (sc->sc_bus.bdev) {
-		bdev = sc->sc_bus.bdev;
-		device_detach(bdev);
-		device_delete_child(dev, bdev);
-	}
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ehci_detach() after ehci_init()
-		 */
-		ehci_detach(sc);
-
-		err = bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl);
-
-		if (err)
-			/* XXX or should we panic? */
-			device_printf(dev, "Could not tear down irq, %d\n",
-			    err);
-		sc->sc_intr_hdl = NULL;
-	}
-
-	if (sc->sc_irq_res) {
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-
-	if (isc->clk)
-		clk_release(isc->clk);
-
-	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
-	free(isc->gpio_vbus, M_DEVBUF);
-	return (0);
-}
-
-static device_method_t ehci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, jz4780_ehci_probe),
-	DEVMETHOD(device_attach, jz4780_ehci_attach),
-	DEVMETHOD(device_detach, jz4780_ehci_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ehci_driver = {
-	.name = "ehci",
-	.methods = ehci_methods,
-	.size = sizeof(struct jz4780_ehci_softc),
-};
-
-static devclass_t ehci_devclass;
-
-DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
-MODULE_DEPEND(ehci, usb, 1, 1, 1);
-MODULE_DEPEND(ehci, gpio, 1, 1, 1);
diff --git a/sys/mips/ingenic/jz4780_gpio.c b/sys/mips/ingenic/jz4780_gpio.c
deleted file mode 100644
index 77d1f5baaa3a..000000000000
--- a/sys/mips/ingenic/jz4780_gpio.c
+++ /dev/null
@@ -1,840 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/resource.h>
-#include <sys/gpio.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <dev/gpio/gpiobusvar.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#include "jz4780_gpio_if.h"
-#include "gpio_if.h"
-#include "pic_if.h"
-
-#define JZ4780_GPIO_PINS 32
-
-enum pin_function {
-	JZ_FUNC_DEV_0,
-	JZ_FUNC_DEV_1,
-	JZ_FUNC_DEV_2,
-	JZ_FUNC_DEV_3,
-	JZ_FUNC_GPIO,
-	JZ_FUNC_INTR,
-};
-
-struct jz4780_gpio_pin {
-	struct intr_irqsrc pin_irqsrc;
-	enum intr_trigger intr_trigger;
-	enum intr_polarity intr_polarity;
-	enum pin_function pin_func;
-	uint32_t pin_caps;
-	uint32_t pin_flags;
-	uint32_t pin_num;
-	char pin_name[GPIOMAXNAME];
-};
-
-struct jz4780_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct resource		*res[2];
-	struct mtx		mtx;
-	struct jz4780_gpio_pin  pins[JZ4780_GPIO_PINS];
-	void			*intrhand;
-};
-
-static struct resource_spec jz4780_gpio_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ SYS_RES_IRQ,    0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int jz4780_gpio_probe(device_t dev);
-static int jz4780_gpio_attach(device_t dev);
-static int jz4780_gpio_detach(device_t dev);
-static int jz4780_gpio_intr(void *arg);
-
-#define	JZ4780_GPIO_LOCK(sc)		mtx_lock_spin(&(sc)->mtx)
-#define	JZ4780_GPIO_UNLOCK(sc)		mtx_unlock_spin(&(sc)->mtx)
-#define	JZ4780_GPIO_LOCK_INIT(sc)	\
-    mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),	\
-    "jz4780_gpio", MTX_SPIN)
-#define	JZ4780_GPIO_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx);
-
-#define CSR_WRITE_4(sc, reg, val)	bus_write_4((sc)->res[0], (reg), (val))
-#define CSR_READ_4(sc, reg)		bus_read_4((sc)->res[0], (reg))
-
-static int
-jz4780_gpio_probe(device_t dev)
-{
-	phandle_t node;
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	/* We only like particular parent */
-	if (!ofw_bus_is_compatible(device_get_parent(dev),
-	   "ingenic,jz4780-pinctrl"))
-		return (ENXIO);
-
-	/* ... and only specific children os that parent */
-	node = ofw_bus_get_node(dev);
-	if (!OF_hasprop(node, "gpio-controller"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 GPIO Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_gpio_pin_set_func(struct jz4780_gpio_softc *sc, uint32_t pin,
-    uint32_t func)
-{
-	uint32_t mask = (1u << pin);
-
-	if (func > (uint32_t)JZ_FUNC_DEV_3)
-		return (EINVAL);
-
-	CSR_WRITE_4(sc, JZ_GPIO_INTC, mask);
-	CSR_WRITE_4(sc, JZ_GPIO_MASKC, mask);
-	if (func & 2)
-		CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask);
-	else
-		CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask);
-	if (func & 1)
-		CSR_WRITE_4(sc, JZ_GPIO_PAT0S, mask);
-	else
-		CSR_WRITE_4(sc, JZ_GPIO_PAT0C, mask);
-
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
-	sc->pins[pin].pin_func = (enum pin_function)func;
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_set_direction(struct jz4780_gpio_softc *sc,
-    uint32_t pin, uint32_t dir)
-{
-	uint32_t mask = (1u << pin);
-
-	switch (dir) {
-	case GPIO_PIN_OUTPUT:
-		if (sc->pins[pin].pin_caps & dir)
-			CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask);
-		else
-			return (EINVAL);
-		break;
-	case GPIO_PIN_INPUT:
-		if (sc->pins[pin].pin_caps & dir)
-			CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask);
-		else
-			return (EINVAL);
-		break;
-	}
-
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
-	sc->pins[pin].pin_flags |= dir;
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_set_bias(struct jz4780_gpio_softc *sc,
-    uint32_t pin, uint32_t bias)
-{
-	uint32_t mask = (1u << pin);
-
-	switch (bias) {
-	case GPIO_PIN_PULLUP:
-	case GPIO_PIN_PULLDOWN:
-		if (sc->pins[pin].pin_caps & bias)
-			CSR_WRITE_4(sc, JZ_GPIO_DPULLC, mask);
-		else
-			return (EINVAL);
-		break;
-	case 0:
-		CSR_WRITE_4(sc, JZ_GPIO_DPULLS, mask);
-		break;
-	default:
-		return (ENOTSUP);
-	}
-
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
-	sc->pins[pin].pin_flags |= bias;
-	return (0);
-}
-
-/*
- * Decode pin configuration using this map
- */
-#if 0
-INT MASK PAT1 PAT0
-1   x    0    0 /* intr, level, low */
-1   x    0    1 /* intr, level, high */
-1   x    1    0 /* intr, edge, falling */
-1   x    1    1 /* intr, edge, rising */
-0   0    0    0 /* function, func 0 */
-0   0    0    1 /* function, func 1 */
-0   0    1    0 /* function, func 2 */
-0   0    1    0 /* function, func 3 */
-0   1    0    0 /* gpio, output 0 */
-0   1    0    1 /* gpio, output 1 */
-0   1    1    x /* gpio, input */
-#endif
-
-static void
-jz4780_gpio_pin_probe(struct jz4780_gpio_softc *sc, uint32_t pin)
-{
-	uint32_t mask = (1u << pin);
-	uint32_t val;
-
-	/* Clear cached gpio config */
-	sc->pins[pin].pin_flags = 0;
-
-	/* First check if pin is in interrupt mode */
-	val = CSR_READ_4(sc, JZ_GPIO_INT);
-	if (val & mask) {
-		/* Pin is in interrupt mode, decode interrupt triggering mode */
-		val = CSR_READ_4(sc, JZ_GPIO_PAT1);
-		if (val & mask)
-			sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
-		else
-			sc->pins[pin].intr_trigger = INTR_TRIGGER_LEVEL;
-		/* Decode interrupt polarity */
-		val = CSR_READ_4(sc, JZ_GPIO_PAT0);
-		if (val & mask)
-			sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
-		else
-			sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
-
-		sc->pins[pin].pin_func = JZ_FUNC_INTR;
-		sc->pins[pin].pin_flags = 0;
-		return;
-	}
-	/* Next check if pin is in gpio mode */
-	val = CSR_READ_4(sc, JZ_GPIO_MASK);
-	if (val & mask) {
-		/* Pin is in gpio mode, decode direction and bias */
-		val = CSR_READ_4(sc, JZ_GPIO_PAT1);
-		if (val & mask)
-			sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
-		else
-			sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
-		/* Check for bias */
-		val = CSR_READ_4(sc, JZ_GPIO_DPULL);
-		if ((val & mask) == 0)
-			sc->pins[pin].pin_flags |= sc->pins[pin].pin_caps &
-				(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
-		sc->pins[pin].pin_func = JZ_FUNC_GPIO;
-		return;
-	}
-	/* By exclusion, pin is in alternate function mode */
-	val = CSR_READ_4(sc, JZ_GPIO_DPULL);
-	if ((val & mask) == 0)
-		sc->pins[pin].pin_flags = sc->pins[pin].pin_caps &
-			(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
-	val = ((CSR_READ_4(sc, JZ_GPIO_PAT1) & mask) >> pin) << 1;
-	val = val | ((CSR_READ_4(sc, JZ_GPIO_PAT1) & mask) >> pin);
-	sc->pins[pin].pin_func = (enum pin_function)val;
-}
-
-static int
-jz4780_gpio_register_isrcs(struct jz4780_gpio_softc *sc)
-{
-	int error;
-	uint32_t irq, i;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->dev);
-	for (irq = 0; irq < JZ4780_GPIO_PINS; irq++) {
-		isrc = &sc->pins[irq].pin_irqsrc;
-		error = intr_isrc_register(isrc, sc->dev, 0, "%s,%d",
-		    name, irq);
-		if (error != 0) {
-			for (i = 0; i < irq; i++)
-				intr_isrc_deregister(&sc->pins[i].pin_irqsrc);
-			device_printf(sc->dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-jz4780_gpio_attach(device_t dev)
-{
-	struct jz4780_gpio_softc *sc = device_get_softc(dev);
-	phandle_t node;
-	uint32_t i, pd_pins, pu_pins;
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_gpio_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	JZ4780_GPIO_LOCK_INIT(sc);
-
-	node = ofw_bus_get_node(dev);
-	OF_getencprop(node, "ingenic,pull-ups", &pu_pins, sizeof(pu_pins));
-	OF_getencprop(node, "ingenic,pull-downs", &pd_pins, sizeof(pd_pins));
-
-	for (i = 0; i < JZ4780_GPIO_PINS; i++) {
-		sc->pins[i].pin_num = i;
-		sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
-		if (pu_pins & (1 << i))
-			sc->pins[i].pin_caps |= GPIO_PIN_PULLUP;
-		if (pd_pins & (1 << i))
-			sc->pins[i].pin_caps |= GPIO_PIN_PULLDOWN;
-		sc->pins[i].intr_polarity = INTR_POLARITY_CONFORM;
-		sc->pins[i].intr_trigger = INTR_TRIGGER_CONFORM;
-
-		snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
-		    device_get_unit(dev) + 'a', i);
-		sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
-
-		jz4780_gpio_pin_probe(sc, i);
-	}
-
-	if (jz4780_gpio_register_isrcs(sc) != 0)
-		goto fail;
-
-	if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto fail;
-	}
-
-	if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
-	    jz4780_gpio_intr, NULL, sc, &sc->intrhand) != 0)
-		goto fail_pic;
-
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL)
-		goto fail_pic;
-
-	return (0);
-fail_pic:
-	intr_pic_deregister(dev, OF_xref_from_node(node));
-fail:
-	if (sc->intrhand != NULL)
-		bus_teardown_intr(dev, sc->res[1], sc->intrhand);
-	bus_release_resources(dev, jz4780_gpio_spec, sc->res);
-	JZ4780_GPIO_LOCK_DESTROY(sc);
-	return (ENXIO);
-}
-
-static int
-jz4780_gpio_detach(device_t dev)
-{
-	struct jz4780_gpio_softc *sc = device_get_softc(dev);
-
-	bus_release_resources(dev, jz4780_gpio_spec, sc->res);
-	JZ4780_GPIO_LOCK_DESTROY(sc);
-	return (0);
-}
-
-static int
-jz4780_gpio_configure_pin(device_t dev, uint32_t pin, uint32_t func,
-    uint32_t flags)
-{
-	struct jz4780_gpio_softc *sc;
-	int retval;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	retval = jz4780_gpio_pin_set_func(sc, pin, func);
-	if (retval == 0)
-		retval = jz4780_gpio_pin_set_bias(sc, pin, flags);
-	JZ4780_GPIO_UNLOCK(sc);
-	return (retval);
-}
-
-static device_t
-jz4780_gpio_get_bus(device_t dev)
-{
-	struct jz4780_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-jz4780_gpio_pin_max(device_t dev, int *maxpin)
-{
-
-	*maxpin = JZ4780_GPIO_PINS - 1;
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct jz4780_gpio_softc *sc;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	*caps = sc->pins[pin].pin_caps;
-	JZ4780_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct jz4780_gpio_softc *sc;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	*flags = sc->pins[pin].pin_flags;
-	JZ4780_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct jz4780_gpio_softc *sc;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	sc = device_get_softc(dev);
-	strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
-	name[GPIOMAXNAME - 1] = '\0';
-
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	struct jz4780_gpio_softc *sc;
-	int retval;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	retval = jz4780_gpio_pin_set_direction(sc, pin,
-	    flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
-	if (retval == 0)
-		retval = jz4780_gpio_pin_set_bias(sc, pin,
-		    flags & (GPIO_PIN_PULLDOWN | GPIO_PIN_PULLUP));
-	JZ4780_GPIO_UNLOCK(sc);
-
-	return (retval);
-}
-
-static int
-jz4780_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct jz4780_gpio_softc *sc;
-	uint32_t mask;
-	int retval;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	retval = EINVAL;
-	mask = (1u << pin);
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	if (sc->pins[pin].pin_func == JZ_FUNC_GPIO) {
-		CSR_WRITE_4(sc, value ? JZ_GPIO_PAT0S : JZ_GPIO_PAT0C, mask);
-		retval = 0;
-	}
-	JZ4780_GPIO_UNLOCK(sc);
-
-	return (retval);
-}
-
-static int
-jz4780_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct jz4780_gpio_softc *sc;
-	uint32_t data, mask;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	mask = (1u << pin);
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	data = CSR_READ_4(sc, JZ_GPIO_PIN);
-	JZ4780_GPIO_UNLOCK(sc);
-	*val = (data & mask) ? 1 : 0;
-
-	return (0);
-}
-
-static int
-jz4780_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	struct jz4780_gpio_softc *sc;
-	uint32_t data, mask;
-	int retval;
-
-	if (pin >= JZ4780_GPIO_PINS)
-		return (EINVAL);
-
-	retval = EINVAL;
-	mask = (1u << pin);
-	sc = device_get_softc(dev);
-	JZ4780_GPIO_LOCK(sc);
-	if (sc->pins[pin].pin_func == JZ_FUNC_GPIO &&
-	    sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT) {
-		data = CSR_READ_4(sc, JZ_GPIO_PIN);
-		CSR_WRITE_4(sc, (data & mask) ? JZ_GPIO_PAT0C : JZ_GPIO_PAT0S,
-		    mask);
-		retval = 0;
-	}
-	JZ4780_GPIO_UNLOCK(sc);
-
-	return (retval);
-}
-
-#ifdef FDT
-static int
-jz_gpio_map_intr_fdt(device_t dev, struct intr_map_data *data, u_int *irqp,
-        enum intr_polarity *polp, enum intr_trigger *trigp)
-{
-	struct jz4780_gpio_softc *sc;
-	struct intr_map_data_fdt *daf;
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
-	    daf->ncells == 0 || daf->ncells > 2)
-		return (EINVAL);
-
-	*irqp = daf->cells[0];
-	if (daf->ncells == 1) {
-		*trigp = INTR_TRIGGER_CONFORM;
-		*polp = INTR_POLARITY_CONFORM;
-		return (0);
-	}
-
-	switch (daf->cells[1])
-	{
-	case IRQ_TYPE_EDGE_RISING:
-		*trigp = INTR_TRIGGER_EDGE;
-		*polp = INTR_POLARITY_HIGH;
-		break;
-	case IRQ_TYPE_EDGE_FALLING:
-		*trigp = INTR_TRIGGER_EDGE;
-		*polp = INTR_POLARITY_LOW;
-		break;
-	case IRQ_TYPE_LEVEL_HIGH:
-		*trigp = INTR_TRIGGER_LEVEL;
-		*polp = INTR_POLARITY_HIGH;
-		break;
-	case IRQ_TYPE_LEVEL_LOW:
-		*trigp = INTR_TRIGGER_LEVEL;
-		*polp = INTR_POLARITY_LOW;
-		break;
-	default:
-		device_printf(sc->dev, "unsupported trigger/polarity 0x%2x\n",
-		    daf->cells[1]);
-		return (ENOTSUP);
-	}
-
-	return (0);
-}
-#endif
-
-static int
-jz_gpio_map_intr(device_t dev, struct intr_map_data *data, u_int *irqp,
-        enum intr_polarity *polp, enum intr_trigger *trigp)
-{
-	struct jz4780_gpio_softc *sc;
-	enum intr_polarity pol;
-	enum intr_trigger trig;
-	u_int irq;
-
-	sc = device_get_softc(dev);
-	switch (data->type) {
-#ifdef FDT
-	case INTR_MAP_DATA_FDT:
-		if (jz_gpio_map_intr_fdt(dev, data, &irq, &pol, &trig) != 0)
-			return (EINVAL);
-		break;
-#endif
-	default:
-		return (EINVAL);
-	}
-
-	if (irq >= nitems(sc->pins))
-		return (EINVAL);
-
-	*irqp = irq;
-	if (polp != NULL)
-		*polp = pol;
-	if (trigp != NULL)
-		*trigp = trig;
-	return (0);
-}
-
-static int
-jz4780_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	struct jz4780_gpio_softc *sc;
-	int retval;
-	u_int irq;
-
-	retval = jz_gpio_map_intr(dev, data, &irq, NULL, NULL);
-	if (retval == 0) {
-		sc = device_get_softc(dev);
-		*isrcp = &sc->pins[irq].pin_irqsrc;
-	}
-	return (retval);
-}
-
-static int
-jz4780_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
-        struct resource *res, struct intr_map_data *data)
-{
-	struct jz4780_gpio_softc *sc;
-	struct jz4780_gpio_pin *pin;
-	enum intr_polarity pol;
-	enum intr_trigger trig;
-	uint32_t mask, irq;
-
-	if (data == NULL)
-		return (ENOTSUP);
-
-	/* Get config for resource. */
-	if (jz_gpio_map_intr(dev, data, &irq, &pol, &trig))
-		return (EINVAL);
-
-	pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc);
-	if (isrc != &pin->pin_irqsrc)
-		return (EINVAL);
-
-	/* Compare config if this is not first setup. */
-	if (isrc->isrc_handlers != 0) {
-		if ((pol != INTR_POLARITY_CONFORM && pol != pin->intr_polarity) ||
-		    (trig != INTR_TRIGGER_CONFORM && trig != pin->intr_trigger))
-			return (EINVAL);
-		else
-			return (0);
-	}
-
-	if (pol == INTR_POLARITY_CONFORM)
-		pol = INTR_POLARITY_LOW;	/* just pick some */
-	if (trig == INTR_TRIGGER_CONFORM)
-		trig = INTR_TRIGGER_EDGE;	/* just pick some */
-
-	sc = device_get_softc(dev);
-	mask = 1u << pin->pin_num;
-
-	JZ4780_GPIO_LOCK(sc);
-	CSR_WRITE_4(sc, JZ_GPIO_MASKS, mask);
-	CSR_WRITE_4(sc, JZ_GPIO_INTS, mask);
-
-	if (trig == INTR_TRIGGER_LEVEL)
-		CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask);
-	else
-		CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask);
-
-	if (pol == INTR_POLARITY_LOW)
-		CSR_WRITE_4(sc, JZ_GPIO_PAT0C, mask);
-	else
-		CSR_WRITE_4(sc, JZ_GPIO_PAT0S, mask);
-
-	pin->pin_func = JZ_FUNC_INTR;
-	pin->intr_trigger = trig;
-	pin->intr_polarity = pol;
-
-	CSR_WRITE_4(sc, JZ_GPIO_FLAGC, mask);
-	CSR_WRITE_4(sc, JZ_GPIO_MASKC, mask);
-	JZ4780_GPIO_UNLOCK(sc);
-	return (0);
-}
-
-static void
-jz4780_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct jz4780_gpio_softc *sc;
-	struct jz4780_gpio_pin *pin;
-
-	sc = device_get_softc(dev);
-	pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc);
-
-	CSR_WRITE_4(sc, JZ_GPIO_MASKC, 1u << pin->pin_num);
-}
-
-static void
-jz4780_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct jz4780_gpio_softc *sc;
-	struct jz4780_gpio_pin *pin;
-
-	sc = device_get_softc(dev);
-	pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc);
-
-	CSR_WRITE_4(sc, JZ_GPIO_MASKS, 1u << pin->pin_num);
-}
-
-static void
-jz4780_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	jz4780_gpio_pic_disable_intr(dev, isrc);
-}
-
-static void
-jz4780_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	jz4780_gpio_pic_enable_intr(dev, isrc);
-}
-
-static void
-jz4780_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct jz4780_gpio_softc *sc;
-	struct jz4780_gpio_pin *pin;
-
-	sc = device_get_softc(dev);
-	pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc);
-
-	CSR_WRITE_4(sc, JZ_GPIO_FLAGC, 1u << pin->pin_num);
-}
-
-static int
-jz4780_gpio_intr(void *arg)
-{
-	struct jz4780_gpio_softc *sc;
-	uint32_t i, interrupts;
-
-	sc = arg;
-	interrupts = CSR_READ_4(sc, JZ_GPIO_FLAG);
-
-	for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
-		if ((interrupts & 0x1) == 0)
-			continue;
-		if (intr_isrc_dispatch(&sc->pins[i].pin_irqsrc,
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->dev, "spurious interrupt %d\n", i);
-			PIC_DISABLE_INTR(sc->dev, &sc->pins[i].pin_irqsrc);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static phandle_t
-jz4780_gpio_bus_get_node(device_t bus, device_t dev)
-{
-
-	return (ofw_bus_get_node(bus));
-}
-
-static device_method_t jz4780_gpio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_gpio_probe),
-	DEVMETHOD(device_attach,	jz4780_gpio_attach),
-	DEVMETHOD(device_detach,	jz4780_gpio_detach),
-
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus,		jz4780_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max,		jz4780_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname,	jz4780_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags,	jz4780_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps,	jz4780_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags,	jz4780_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get,		jz4780_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set,		jz4780_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle,	jz4780_gpio_pin_toggle),
-
-	/* Custom interface to set pin function */
-	DEVMETHOD(jz4780_gpio_configure_pin, jz4780_gpio_configure_pin),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_setup_intr,	jz4780_gpio_pic_setup_intr),
-	DEVMETHOD(pic_enable_intr,	jz4780_gpio_pic_enable_intr),
-	DEVMETHOD(pic_disable_intr,	jz4780_gpio_pic_disable_intr),
-	DEVMETHOD(pic_map_intr,		jz4780_gpio_pic_map_intr),
-	DEVMETHOD(pic_post_filter,	jz4780_gpio_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,	jz4780_gpio_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	jz4780_gpio_pic_pre_ithread),
-
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	jz4780_gpio_bus_get_node),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_gpio_driver = {
-	"gpio",
-	jz4780_gpio_methods,
-	sizeof(struct jz4780_gpio_softc),
-};
-
-static devclass_t jz4780_gpio_devclass;
-
-EARLY_DRIVER_MODULE(jz4780_gpio, simplebus, jz4780_gpio_driver,
-    jz4780_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
diff --git a/sys/mips/ingenic/jz4780_gpio_if.m b/sys/mips/ingenic/jz4780_gpio_if.m
deleted file mode 100644
index 2bbe7ee04929..000000000000
--- a/sys/mips/ingenic/jz4780_gpio_if.m
+++ /dev/null
@@ -1,41 +0,0 @@
-#-
-# Copyright (c) 2015 Alexander Kabaev <kan@FreeBSD.org>
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#
-# $FreeBSD$
-#
-
-#include <sys/bus.h>
-
-INTERFACE jz4780_gpio;
-
-/**
- * Configures pin as specified by FDT pinctrl entry
- */
-METHOD int configure_pin {
-	device_t	dev;
-	uint32_t	gpio;
-	uint32_t	func;
-	uint32_t	flags;
-};
diff --git a/sys/mips/ingenic/jz4780_intr.c b/sys/mips/ingenic/jz4780_intr.c
deleted file mode 100644
index c28f5f90c163..000000000000
--- a/sys/mips/ingenic/jz4780_intr.c
+++ /dev/null
@@ -1,333 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/cpuset.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/smp.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-#include "pic_if.h"
-
-#define	JZ4780_NIRQS	64
-
-static int jz4780_pic_intr(void *);
-
-struct jz4780_pic_isrc {
-	struct intr_irqsrc isrc;
-	u_int  irq;
-};
-
-struct jz4780_pic_softc {
-	device_t		pic_dev;
-	void *                  pic_intrhand;
-	struct resource *       pic_res[2];
-	struct jz4780_pic_isrc  pic_irqs[JZ4780_NIRQS];
-	uint32_t		nirqs;
-};
-
-#define	PIC_INTR_ISRC(sc, irq)	(&(sc)->pic_irqs[(irq)].isrc)
-
-static struct resource_spec jz4780_pic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Registers */
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },	/* Parent interrupt */
-	{ -1, 0 }
-};
-
-static struct ofw_compat_data compat_data[] = {
-	{"ingenic,jz4780-intc",	true},
-	{NULL,			false}
-};
-
-#define	READ4(_sc, _reg)	bus_read_4((_sc)->pic_res[0], _reg)
-#define	WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val)
-
-static int
-jz4780_pic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
-		return (ENXIO);
-	device_set_desc(dev, "JZ4780 Interrupt Controller");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static inline void
-pic_irq_unmask(struct jz4780_pic_softc *sc, u_int irq)
-{
-	if (irq < 32)
-		WRITE4(sc, JZ_ICMCR0, (1u << irq));
-	else
-		WRITE4(sc, JZ_ICMCR1, (1u << (irq - 32)));
-}
-
-static inline void
-pic_irq_mask(struct jz4780_pic_softc *sc, u_int irq)
-{
-	if (irq < 32)
-		WRITE4(sc, JZ_ICMSR0, (1u << irq));
-	else
-		WRITE4(sc, JZ_ICMSR1, (1u << (irq - 32)));
-}
-
-static inline intptr_t
-pic_xref(device_t dev)
-{
-	return (OF_xref_from_node(ofw_bus_get_node(dev)));
-}
-
-static int
-jz4780_pic_register_isrcs(struct jz4780_pic_softc *sc)
-{
-	int error;
-	uint32_t irq, i;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->pic_dev);
-	for (irq = 0; irq < sc->nirqs; irq++) {
-		sc->pic_irqs[irq].irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s,%d",
-		    name, irq);
-		if (error != 0) {
-			for (i = 0; i < irq; i++)
-				intr_isrc_deregister(PIC_INTR_ISRC(sc, irq));
-			device_printf(sc->pic_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-jz4780_pic_attach(device_t dev)
-{
-	struct jz4780_pic_softc *sc;
-	intptr_t xref;
-
-	xref = pic_xref(dev);
-
-	sc = device_get_softc(dev);
-
-	if (bus_alloc_resources(dev, jz4780_pic_spec, sc->pic_res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	sc->pic_dev = dev;
-
-	/* Set the number of interrupts */
-	sc->nirqs = nitems(sc->pic_irqs);
-
-	/* Mask all interrupts */
-	WRITE4(sc, JZ_ICMR0, 0xFFFFFFFF);
-	WRITE4(sc, JZ_ICMR1, 0xFFFFFFFF);
-
-	/* Register the interrupts */
-	if (jz4780_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto cleanup;
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup;
-	}
-
-	if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK,
-	    jz4780_pic_intr, NULL, sc, &sc->pic_intrhand)) {
-		device_printf(dev, "could not setup irq handler\n");
-		intr_pic_deregister(dev, xref);
-		goto cleanup;
-	}
-
-	return (0);
-
-cleanup:
-	bus_release_resources(dev, jz4780_pic_spec, sc->pic_res);
-
-	return(ENXIO);
-}
-
-static int
-jz4780_pic_intr(void *arg)
-{
-	struct jz4780_pic_softc *sc = arg;
-	struct intr_irqsrc *isrc;
-	struct thread *td;
-	uint32_t i, intr;
-
-	td = curthread;
-	/* Workaround: do not inflate intr nesting level */
-	td->td_intr_nesting_level--;
-
-	intr = READ4(sc, JZ_ICPR0);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		isrc = PIC_INTR_ISRC(sc, i);
-		if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev, "Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	intr = READ4(sc, JZ_ICPR1);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-		i += 32;
-
-		isrc = PIC_INTR_ISRC(sc, i);
-		if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev, "Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-	td->td_intr_nesting_level++;
-
-	return (FILTER_HANDLED);
-}
-
-static int
-jz4780_pic_map_intr(device_t dev, struct intr_map_data *data,
-        struct intr_irqsrc **isrcp)
-{
-#ifdef FDT
-	struct jz4780_pic_softc *sc;
-	struct intr_map_data_fdt *daf;
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
-	    daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
-		return (EINVAL);
-
-	*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
-	return (0);
-#else
-	return (EINVAL);
-#endif
-}
-
-static void
-jz4780_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct jz4780_pic_isrc *pic_isrc;
-
-	pic_isrc = (struct jz4780_pic_isrc *)isrc;
-	pic_irq_unmask(device_get_softc(dev), pic_isrc->irq);
-}
-
-static void
-jz4780_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct jz4780_pic_isrc *pic_isrc;
-
-	pic_isrc = (struct jz4780_pic_isrc *)isrc;
-	pic_irq_mask(device_get_softc(dev), pic_isrc->irq);
-}
-
-static void
-jz4780_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	jz4780_pic_disable_intr(dev, isrc);
-}
-
-static void
-jz4780_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	jz4780_pic_enable_intr(dev, isrc);
-}
-
-static device_method_t jz4780_pic_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_pic_probe),
-	DEVMETHOD(device_attach,	jz4780_pic_attach),
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_enable_intr,	jz4780_pic_enable_intr),
-	DEVMETHOD(pic_disable_intr,	jz4780_pic_disable_intr),
-	DEVMETHOD(pic_map_intr,		jz4780_pic_map_intr),
-	DEVMETHOD(pic_post_ithread,	jz4780_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	jz4780_pic_pre_ithread),
-	{ 0, 0 }
-};
-
-static driver_t jz4780_pic_driver = {
-	"intc",
-	jz4780_pic_methods,
-	sizeof(struct jz4780_pic_softc),
-};
-
-static devclass_t jz4780_pic_devclass;
-
-EARLY_DRIVER_MODULE(intc, ofwbus, jz4780_pic_driver, jz4780_pic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/ingenic/jz4780_lcd.c b/sys/mips/ingenic/jz4780_lcd.c
deleted file mode 100644
index bfb52d672683..000000000000
--- a/sys/mips/ingenic/jz4780_lcd.c
+++ /dev/null
@@ -1,575 +0,0 @@
-/*-
- * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Ingenic JZ4780 LCD Controller
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/eventhandler.h>
-#include <sys/rman.h>
-#include <sys/condvar.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/fbio.h>
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-#include <vm/pmap.h>
-
-#include <machine/bus.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/videomode/videomode.h>
-#include <dev/videomode/edidvar.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <mips/ingenic/jz4780_lcd.h>
-
-#include "fb_if.h"
-#include "hdmi_if.h"
-
-#define	FB_DEFAULT_W	800
-#define	FB_DEFAULT_H	600
-#define	FB_DEFAULT_REF	60
-#define	FB_BPP		32
-#define	FB_ALIGN	(16 * 4)
-#define	FB_MAX_BW	(1920 * 1080 * 60)
-#define	FB_MAX_W	2048
-#define	FB_MAX_H	2048
-#define FB_DIVIDE(x, y)	(((x) + ((y) / 2)) / (y))
-
-#define	PCFG_MAGIC	0xc7ff2100
-
-#define	DOT_CLOCK_TO_HZ(c)	((c) * 1000)
-
-#ifndef VM_MEMATTR_WRITE_COMBINING
-#define	VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_UNCACHEABLE
-#endif
-
-struct jzlcd_softc {
-	device_t		dev;
-	device_t		fbdev;
-	struct resource		*res[1];
-
-	/* Clocks */
-	clk_t			clk;
-	clk_t			clk_pix;
-
-	/* Framebuffer */
-	struct fb_info		info;
-	size_t			fbsize;
-	bus_addr_t		paddr;
-	vm_offset_t		vaddr;
-
-	/* HDMI */
-	eventhandler_tag	hdmi_evh;
-
-	/* Frame descriptor DMA */
-	bus_dma_tag_t		fdesc_tag;
-	bus_dmamap_t		fdesc_map;
-	bus_addr_t		fdesc_paddr;
-	struct lcd_frame_descriptor	*fdesc;
-};
-
-static struct resource_spec jzlcd_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-#define	LCD_READ(sc, reg)		bus_read_4((sc)->res[0], (reg))
-#define	LCD_WRITE(sc, reg, val)		bus_write_4((sc)->res[0], (reg), (val))
-
-static int
-jzlcd_allocfb(struct jzlcd_softc *sc)
-{
-	sc->vaddr = kmem_alloc_contig(sc->fbsize, M_NOWAIT | M_ZERO, 0, ~0,
-	    FB_ALIGN, 0, VM_MEMATTR_WRITE_COMBINING);
-	if (sc->vaddr == 0) {
-		device_printf(sc->dev, "failed to allocate FB memory\n");
-		return (ENOMEM);
-	}
-	sc->paddr = pmap_kextract(sc->vaddr);
-
-	return (0);
-}
-
-static void
-jzlcd_freefb(struct jzlcd_softc *sc)
-{
-	kmem_free(sc->vaddr, sc->fbsize);
-}
-
-static void
-jzlcd_start(struct jzlcd_softc *sc)
-{
-	uint32_t ctrl;
-
-	/* Clear status registers */
-	LCD_WRITE(sc, LCDSTATE, 0);
-	LCD_WRITE(sc, LCDOSDS, 0);
-	/* Enable the controller */
-	ctrl = LCD_READ(sc, LCDCTRL);
-	ctrl |= LCDCTRL_ENA;
-	ctrl &= ~LCDCTRL_DIS;
-	LCD_WRITE(sc, LCDCTRL, ctrl);
-}
-
-static void
-jzlcd_stop(struct jzlcd_softc *sc)
-{
-	uint32_t ctrl;
-
-	ctrl = LCD_READ(sc, LCDCTRL);
-	if ((ctrl & LCDCTRL_ENA) != 0) {
-		/* Disable the controller and wait for it to stop */
-		ctrl |= LCDCTRL_DIS;
-		LCD_WRITE(sc, LCDCTRL, ctrl);
-		while ((LCD_READ(sc, LCDSTATE) & LCDSTATE_LDD) == 0)
-			DELAY(100);
-	}
-	/* Clear all status except for disable */
-	LCD_WRITE(sc, LCDSTATE, LCD_READ(sc, LCDSTATE) & ~LCDSTATE_LDD);
-}
-
-static void
-jzlcd_setup_descriptor(struct jzlcd_softc *sc, const struct videomode *mode,
-    u_int desno)
-{
-	struct lcd_frame_descriptor *fdesc;
-	int line_sz;
-
-	/* Frame size is specified in # words */
-	line_sz = (mode->hdisplay * FB_BPP) >> 3;
-	line_sz = ((line_sz + 3) & ~3) / 4;
-
-	fdesc = sc->fdesc + desno;
-
-	if (desno == 0)
-		fdesc->next = sc->fdesc_paddr +
-		    sizeof(struct lcd_frame_descriptor);
-	else
-		fdesc->next = sc->fdesc_paddr;
-	fdesc->physaddr = sc->paddr;
-	fdesc->id = desno;
-	fdesc->cmd = LCDCMD_FRM_EN | (line_sz * mode->vdisplay);
-	fdesc->offs = 0;
-	fdesc->pw = 0;
-	fdesc->cnum_pos = LCDPOS_BPP01_18_24 |
-	    LCDPOS_PREMULTI01 |
-	    (desno == 0 ? LCDPOS_COEF_BLE01_1 : LCDPOS_COEF_SLE01);
-	fdesc->dessize = LCDDESSIZE_ALPHA |
-	    ((mode->vdisplay - 1) << LCDDESSIZE_HEIGHT_SHIFT) |
-	    ((mode->hdisplay - 1) << LCDDESSIZE_WIDTH_SHIFT);
-}
-
-static int
-jzlcd_set_videomode(struct jzlcd_softc *sc, const struct videomode *mode)
-{
-	u_int hbp, hfp, hsw, vbp, vfp, vsw;
-	u_int hds, hde, ht, vds, vde, vt;
-	uint32_t ctrl;
-	int error;
-
-	hbp = mode->htotal - mode->hsync_end;
-	hfp = mode->hsync_start - mode->hdisplay;
-	hsw = mode->hsync_end - mode->hsync_start;
-	vbp = mode->vtotal - mode->vsync_end;
-	vfp = mode->vsync_start - mode->vdisplay;
-	vsw = mode->vsync_end - mode->vsync_start;
-
-	hds = hsw + hbp;
-	hde = hds + mode->hdisplay;
-	ht = hde + hfp;
-
-	vds = vsw + vbp;
-	vde = vds + mode->vdisplay;
-	vt = vde + vfp;
-
-	/* Setup timings */
-	LCD_WRITE(sc, LCDVAT,
-	    (ht << LCDVAT_HT_SHIFT) | (vt << LCDVAT_VT_SHIFT));
-	LCD_WRITE(sc, LCDDAH,
-	    (hds << LCDDAH_HDS_SHIFT) | (hde << LCDDAH_HDE_SHIFT));
-	LCD_WRITE(sc, LCDDAV,
-	    (vds << LCDDAV_VDS_SHIFT) | (vde << LCDDAV_VDE_SHIFT));
-	LCD_WRITE(sc, LCDHSYNC, hsw);
-	LCD_WRITE(sc, LCDVSYNC, vsw);
-
-	/* Set configuration */
-	LCD_WRITE(sc, LCDCFG, LCDCFG_NEWDES | LCDCFG_RECOVER | LCDCFG_24 |
-	    LCDCFG_PSM | LCDCFG_CLSM | LCDCFG_SPLM | LCDCFG_REVM | LCDCFG_PCP);
-	ctrl = LCD_READ(sc, LCDCTRL);
-	ctrl &= ~LCDCTRL_BST;
-	ctrl |= LCDCTRL_BST_64 | LCDCTRL_OFUM;
-	LCD_WRITE(sc, LCDCTRL, ctrl);
-	LCD_WRITE(sc, LCDPCFG, PCFG_MAGIC);
-	LCD_WRITE(sc, LCDRGBC, LCDRGBC_RGBFMT);
-
-	/* Update registers */
-	LCD_WRITE(sc, LCDSTATE, 0);
-
-	/* Setup frame descriptors */
-	jzlcd_setup_descriptor(sc, mode, 0);
-	jzlcd_setup_descriptor(sc, mode, 1);
-	bus_dmamap_sync(sc->fdesc_tag, sc->fdesc_map, BUS_DMASYNC_PREWRITE);
-
-	/* Setup DMA channels */
-	LCD_WRITE(sc, LCDDA0, sc->fdesc_paddr
-	    + sizeof(struct lcd_frame_descriptor));
-	LCD_WRITE(sc, LCDDA1, sc->fdesc_paddr);
-
-	/* Set display clock */
-	error = clk_set_freq(sc->clk_pix, DOT_CLOCK_TO_HZ(mode->dot_clock), 0);
-	if (error != 0) {
-		device_printf(sc->dev, "failed to set pixel clock to %u Hz\n",
-		    DOT_CLOCK_TO_HZ(mode->dot_clock));
-		return (error);
-	}
-
-	return (0);
-}
-
-static int
-jzlcd_configure(struct jzlcd_softc *sc, const struct videomode *mode)
-{
-	size_t fbsize;
-	int error;
-
-	fbsize = round_page(mode->hdisplay * mode->vdisplay * (FB_BPP / NBBY));
-
-	/* Detach the old FB device */
-	if (sc->fbdev != NULL) {
-		device_delete_child(sc->dev, sc->fbdev);
-		sc->fbdev = NULL;
-	}
-
-	/* If the FB size has changed, free the old FB memory */
-	if (sc->fbsize > 0 && sc->fbsize != fbsize) {
-		jzlcd_freefb(sc);
-		sc->vaddr = 0;
-	}
-
-	/* Allocate the FB if necessary */
-	sc->fbsize = fbsize;
-	if (sc->vaddr == 0) {
-		error = jzlcd_allocfb(sc);
-		if (error != 0) {
-			device_printf(sc->dev, "failed to allocate FB memory\n");
-			return (ENXIO);
-		}
-	}
-
-	/* Setup video mode */
-	error = jzlcd_set_videomode(sc, mode);
-	if (error != 0)
-		return (error);
-
-	/* Attach framebuffer device */
-	sc->info.fb_name = device_get_nameunit(sc->dev);
-	sc->info.fb_vbase = (intptr_t)sc->vaddr;
-	sc->info.fb_pbase = sc->paddr;
-	sc->info.fb_size = sc->fbsize;
-	sc->info.fb_bpp = sc->info.fb_depth = FB_BPP;
-	sc->info.fb_stride = mode->hdisplay * (FB_BPP / NBBY);
-	sc->info.fb_width = mode->hdisplay;
-	sc->info.fb_height = mode->vdisplay;
-#ifdef VM_MEMATTR_WRITE_COMBINING
-	sc->info.fb_flags = FB_FLAG_MEMATTR;
-	sc->info.fb_memattr = VM_MEMATTR_WRITE_COMBINING;
-#endif
-	sc->fbdev = device_add_child(sc->dev, "fbd", device_get_unit(sc->dev));
-	if (sc->fbdev == NULL) {
-		device_printf(sc->dev, "failed to add fbd child\n");
-		return (ENOENT);
-	}
-
-	error = device_probe_and_attach(sc->fbdev);
-	if (error != 0) {
-		device_printf(sc->dev, "failed to attach fbd device\n");
-		return (error);
-	}
-
-	return (0);
-}
-
-static int
-jzlcd_get_bandwidth(const struct videomode *mode)
-{
-	int refresh;
-
-	refresh = FB_DIVIDE(FB_DIVIDE(DOT_CLOCK_TO_HZ(mode->dot_clock),
-	    mode->htotal), mode->vtotal);
-
-	return mode->hdisplay * mode->vdisplay * refresh;
-}
-
-static int
-jzlcd_mode_supported(const struct videomode *mode)
-{
-	/* Width and height must be less than 2048 */
-	if (mode->hdisplay > FB_MAX_W || mode->vdisplay > FB_MAX_H)
-		return (0);
-
-	/* Bandwidth check */
-	if (jzlcd_get_bandwidth(mode) > FB_MAX_BW)
-		return (0);
-
-	/* Interlace modes not yet supported by the driver */
-	if ((mode->flags & VID_INTERLACE) != 0)
-		return (0);
-
-	return (1);
-}
-
-static const struct videomode *
-jzlcd_find_mode(struct edid_info *ei)
-{
-	const struct videomode *best;
-	int n, bw, best_bw;
-
-	/* If the preferred mode is OK, just use it */
-	if (jzlcd_mode_supported(ei->edid_preferred_mode) != 0)
-		return ei->edid_preferred_mode;
-
-	/* Pick the mode with the highest bandwidth requirements */
-	best = NULL;
-	best_bw = 0;
-	for (n = 0; n < ei->edid_nmodes; n++) {
-		if (jzlcd_mode_supported(&ei->edid_modes[n]) == 0)
-			continue;
-		bw = jzlcd_get_bandwidth(&ei->edid_modes[n]);
-		if (bw > FB_MAX_BW)
-			continue;
-		if (best == NULL || bw > best_bw) {
-			best = &ei->edid_modes[n];
-			best_bw = bw;
-		}
-	}
-
-	return best;
-}
-
-static void
-jzlcd_hdmi_event(void *arg, device_t hdmi_dev)
-{
-	const struct videomode *mode;
-	struct videomode hdmi_mode;
-	struct jzlcd_softc *sc;
-	struct edid_info ei;
-	uint8_t *edid;
-	uint32_t edid_len;
-	int error;
-
-	sc = arg;
-	edid = NULL;
-	edid_len = 0;
-	mode = NULL;
-
-	error = HDMI_GET_EDID(hdmi_dev, &edid, &edid_len);
-	if (error != 0) {
-		device_printf(sc->dev, "failed to get EDID: %d\n", error);
-	} else {
-		error = edid_parse(edid, &ei);
-		if (error != 0) {
-			device_printf(sc->dev, "failed to parse EDID: %d\n",
-			    error);
-		} else {
-			if (bootverbose)
-				edid_print(&ei);
-
-			mode = jzlcd_find_mode(&ei);
-		}
-	}
-
-	/* If a suitable mode could not be found, try the default */
-	if (mode == NULL)
-		mode = pick_mode_by_ref(FB_DEFAULT_W, FB_DEFAULT_H,
-		    FB_DEFAULT_REF);
-
-	if (mode == NULL) {
-		device_printf(sc->dev, "failed to find usable video mode\n");
-		return;
-	}
-
-	if (bootverbose)
-		device_printf(sc->dev, "using %dx%d\n",
-		    mode->hdisplay, mode->vdisplay);
-
-	/* Stop the controller */
-	jzlcd_stop(sc);
-
-	/* Configure LCD controller */
-	error = jzlcd_configure(sc, mode);
-	if (error != 0) {
-		device_printf(sc->dev, "failed to configure FB: %d\n", error);
-		return;
-	}
-
-	/* Enable HDMI TX */
-	hdmi_mode = *mode;
-	HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode);
-
-	/* Start the controller! */
-	jzlcd_start(sc);
-}
-
-static void
-jzlcd_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
-	if (error != 0)
-		return;
-	*(bus_addr_t *)arg = segs[0].ds_addr;
-}
-
-static int
-jzlcd_probe(device_t dev)
-{
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-lcd"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 LCD Controller");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jzlcd_attach(device_t dev)
-{
-	struct jzlcd_softc *sc;
-	int error;
-
-	sc = device_get_softc(dev);
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jzlcd_spec, sc->res)) {
-		device_printf(dev, "cannot allocate resources for device\n");
-		goto failed;
-	}
-
-	if (clk_get_by_ofw_name(dev, 0, "lcd_clk", &sc->clk) != 0 ||
-	    clk_get_by_ofw_name(dev, 0, "lcd_pixclk", &sc->clk_pix) != 0) {
-		device_printf(dev, "cannot get clocks\n");
-		goto failed;
-	}
-	if (clk_enable(sc->clk) != 0 || clk_enable(sc->clk_pix) != 0) {
-		device_printf(dev, "cannot enable clocks\n");
-		goto failed;
-	}
-
-	error = bus_dma_tag_create(
-	    bus_get_dma_tag(dev),
-	    sizeof(struct lcd_frame_descriptor), 0,
-	    BUS_SPACE_MAXADDR_32BIT,
-	    BUS_SPACE_MAXADDR,
-	    NULL, NULL,
-	    sizeof(struct lcd_frame_descriptor) * 2, 1,
-	    sizeof(struct lcd_frame_descriptor) * 2,
-	    0,
-	    NULL, NULL,
-	    &sc->fdesc_tag);
-	if (error != 0) {
-		device_printf(dev, "cannot create bus dma tag\n");
-		goto failed;
-	}
-
-	error = bus_dmamem_alloc(sc->fdesc_tag, (void **)&sc->fdesc,
-	    BUS_DMA_NOCACHE | BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->fdesc_map);
-	if (error != 0) {
-		device_printf(dev, "cannot allocate dma descriptor\n");
-		goto dmaalloc_failed;
-	}
-
-	error = bus_dmamap_load(sc->fdesc_tag, sc->fdesc_map, sc->fdesc,
-	    sizeof(struct lcd_frame_descriptor) * 2, jzlcd_dmamap_cb,
-	    &sc->fdesc_paddr, 0);
-	if (error != 0) {
-		device_printf(dev, "cannot load dma map\n");
-		goto dmaload_failed;
-	}
-
-	sc->hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event,
-	    jzlcd_hdmi_event, sc, 0);
-
-	return (0);
-
-dmaload_failed:
-	bus_dmamem_free(sc->fdesc_tag, sc->fdesc, sc->fdesc_map);
-dmaalloc_failed:
-	bus_dma_tag_destroy(sc->fdesc_tag);
-failed:
-	if (sc->clk_pix != NULL)
-		clk_release(sc->clk);
-	if (sc->clk != NULL)
-		clk_release(sc->clk);
-	if (sc->res != NULL)
-		bus_release_resources(dev, jzlcd_spec, sc->res);
-
-	return (ENXIO);
-}
-
-static struct fb_info *
-jzlcd_fb_getinfo(device_t dev)
-{
-	struct jzlcd_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	return (&sc->info);
-}
-
-static device_method_t jzlcd_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jzlcd_probe),
-	DEVMETHOD(device_attach,	jzlcd_attach),
-
-	/* FB interface */
-	DEVMETHOD(fb_getinfo,		jzlcd_fb_getinfo),
-
-	DEVMETHOD_END
-};
-
-static driver_t jzlcd_driver = {
-	"fb",
-	jzlcd_methods,
-	sizeof(struct jzlcd_softc),
-};
-
-static devclass_t jzlcd_devclass;
-
-DRIVER_MODULE(fb, simplebus, jzlcd_driver, jzlcd_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_lcd.h b/sys/mips/ingenic/jz4780_lcd.h
deleted file mode 100644
index bd6e585bb98c..000000000000
--- a/sys/mips/ingenic/jz4780_lcd.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/*-
- * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Ingenic JZ4780 LCD Controller
- */
-
-#ifndef __JZ4780_LCD_H__
-#define __JZ4780_LCD_H__
-
-#define	LCDCFG			0x0000
-#define	 LCDCFG_LCDPIN		(1 << 31)
-#define	 LCDCFG_TVEPEH		(1 << 30)
-#define	 LCDCFG_NEWDES		(1 << 28)
-#define	 LCDCFG_PALBP		(1 << 27)
-#define	 LCDCFG_TVEN		(1 << 26)
-#define	 LCDCFG_RECOVER		(1 << 25)
-#define	 LCDCFG_PSM		(1 << 23)
-#define	 LCDCFG_CLSM		(1 << 22)
-#define	 LCDCFG_SPLM		(1 << 21)
-#define	 LCDCFG_REVM		(1 << 20)
-#define	 LCDCFG_HSYNM		(1 << 19)
-#define	 LCDCFG_VSYNM		(1 << 18)
-#define	 LCDCFG_INVDAT		(1 << 17)
-#define	 LCDCFG_SYNDIR		(1 << 16)
-#define	 LCDCFG_PSP		(1 << 15)
-#define	 LCDCFG_CLSP		(1 << 14)
-#define	 LCDCFG_SPLP		(1 << 13)
-#define	 LCDCFG_REVP		(1 << 12)
-#define	 LCDCFG_HSP		(1 << 11)
-#define	 LCDCFG_PCP		(1 << 10)
-#define	 LCDCFG_DEP		(1 << 9)
-#define	 LCDCFG_VSP		(1 << 8)
-#define	 LCDCFG_18_16		(1 << 7)
-#define	 LCDCFG_24		(1 << 6)
-#define	 LCDCFG_MODE		(0xf << 0)
-#define	LCDCTRL			0x0030
-#define	 LCDCTRL_PINMD		(1 << 31)
-#define	 LCDCTRL_BST		(0x7 << 28)
-#define	  LCDCTRL_BST_4		(0 << 28)
-#define	  LCDCTRL_BST_8		(1 << 28)
-#define	  LCDCTRL_BST_16	(2 << 28)
-#define	  LCDCTRL_BST_32	(3 << 28)
-#define	  LCDCTRL_BST_64	(4 << 28)
-#define	 LCDCTRL_OUTRGB		(1 << 27)
-#define	 LCDCTRL_OFUP		(1 << 26)
-#define	 LCDCTRL_DACTE		(1 << 14)
-#define	 LCDCTRL_EOFM		(1 << 13)
-#define	 LCDCTRL_SOFM		(1 << 12)
-#define	 LCDCTRL_OFUM		(1 << 11)
-#define	 LCDCTRL_IFUM0		(1 << 10)
-#define	 LCDCTRL_IFUM1		(1 << 9)
-#define	 LCDCTRL_LDDM		(1 << 8)
-#define	 LCDCTRL_QDM		(1 << 7)
-#define	 LCDCTRL_BEDN		(1 << 6)
-#define	 LCDCTRL_PEDN		(1 << 5)
-#define	 LCDCTRL_DIS		(1 << 4)
-#define	 LCDCTRL_ENA		(1 << 3)
-#define	 LCDCTRL_BPP0		(0x7 << 0)
-#define	  LCDCTRL_BPP0_1	(0 << 0)
-#define	  LCDCTRL_BPP0_2	(1 << 0)
-#define	  LCDCTRL_BPP0_4	(2 << 0)
-#define	  LCDCTRL_BPP0_8	(3 << 0)
-#define	  LCDCTRL_BPP0_15_16	(4 << 0)
-#define	  LCDCTRL_BPP0_18_24	(5 << 0)
-#define	  LCDCTRL_BPP0_24_COMP	(6 << 0)
-#define	  LCDCTRL_BPP0_30	(7 << 0)
-#define	 LCDCTR
-#define	LCDSTATE		0x0034
-#define	 LCDSTATE_QD		(1 << 7)
-#define	 LCDSTATE_EOF		(1 << 5)
-#define	 LCDSTATE_SOF		(1 << 4)
-#define	 LCDSTATE_OUT		(1 << 3)
-#define	 LCDSTATE_IFU0		(1 << 2)
-#define	 LCDSTATE_IFU1		(1 << 1)
-#define	 LCDSTATE_LDD		(1 << 0)
-#define	LCDOSDC			0x0100
-#define	LCDOSDCTRL		0x0104
-#define	LCDOSDS			0x0108
-#define	LCDBGC0			0x010c
-#define	LCDBGC1			0x02c4
-#define	LCDKEY0			0x0110
-#define	LCDKEY1			0x0114
-#define	LCDALPHA		0x0118
-#define	LCDIPUR			0x011c
-#define	LCDRGBC			0x0090
-#define	 LCDRGBC_RGBDM		(1 << 15)
-#define	 LCDRGBC_DMM		(1 << 14)
-#define	 LCDRGBC_422		(1 << 8)
-#define	 LCDRGBC_RGBFMT		(1 << 7)
-#define	 LCDRGBC_ODDRGB		(0x7 << 4)
-#define	 LCDRGBC_EVENRGB	(0x7 << 0)
-#define	LCDVAT			0x000c
-#define	 LCDVAT_HT_SHIFT	16
-#define	 LCDVAT_VT_SHIFT	0
-#define	LCDDAH			0x0010
-#define	 LCDDAH_HDS_SHIFT	16
-#define	 LCDDAH_HDE_SHIFT	0
-#define	LCDDAV			0x0014
-#define	 LCDDAV_VDS_SHIFT	16
-#define	 LCDDAV_VDE_SHIFT	0
-#define	LCDXYP0			0x0120
-#define	LCDXYP1			0x0124
-#define	LCDSIZE0		0x0128
-#define	LCDSIZE1		0x012c
-#define	LCDVSYNC		0x0004
-#define	LCDHSYNC		0x0008
-#define	LCDPS			0x0018
-#define	LCDCLS			0x001c
-#define	LCDSPL			0x0020
-#define	LCDREV			0x0024
-#define	LCDIID			0x0038
-#define	LCDDA0			0x0040
-#define	LCDSA0			0x0044
-#define	LCDFID0			0x0048
-#define	LCDCMD0			0x004c
-#define	 LCDCMD_SOFINT		(1 << 31)
-#define	 LCDCMD_EOFINT		(1 << 30)
-#define	 LCDCMD_CMD		(1 << 29)
-#define	 LCDCMD_COMPE		(1 << 27)
-#define	 LCDCMD_FRM_EN		(1 << 26)
-#define	 LCDCMD_FIELD_SEL	(1 << 25)
-#define	 LCDCMD_16X16BLOCK	(1 << 24)
-#define	 LCDCMD_LEN		(0xffffff << 0)
-#define	LCDOFFS0		0x0060
-#define	LCDPW0			0x0064
-#define	LCDCNUM0		0x0068
-#define	LCDPOS0			LCDCNUM0
-#define	 LCDPOS_ALPHAMD1	(1 << 31)
-#define	 LCDPOS_RGB01		(1 << 30)
-#define	 LCDPOS_BPP01		(0x7 << 27)
-#define	  LCDPOS_BPP01_15_16	(4 << 27)
-#define	  LCDPOS_BPP01_18_24	(5 << 27)
-#define	  LCDPOS_BPP01_24_COMP	(6 << 27)
-#define	  LCDPOS_BPP01_30	(7 << 27)
-#define	  LCDPOS_PREMULTI01	(1 << 26)
-#define	  LCDPOS_COEF_SLE01	(0x3 << 24)
-#define	  LCDPOS_COEF_BLE01_1	(1 << 24)
-#define	  LCDPOS_YPOS01		(0xfff << 12)
-#define	  LCDPOS_XPOS01		(0xfff << 0)
-#define	LCDDESSIZE0		0x006c
-#define	 LCDDESSIZE_ALPHA	(0xff << 24)
-#define	 LCDDESSIZE_HEIGHT	(0xfff << 12)
-#define	 LCDDESSIZE_HEIGHT_SHIFT 12
-#define	 LCDDESSIZE_WIDTH	(0xfff << 0)
-#define	 LCDDESSIZE_WIDTH_SHIFT	0
-#define	LCDDA1			0x0050
-#define	LCDSA1			0x0054
-#define	LCDFID1			0x0058
-#define	LCDCMD1			0x005c
-#define	LCDOFFS1		0x0070
-#define	LCDPW1			0x0074
-#define	LCDCNUM1		0x0078
-#define	LCDPOS1			LCDCNUM1
-#define	LCDDESSIZE1		0x007c
-#define	LCDPCFG			0x02c0
-#define	LCDDUALCTRL		0x02c8
-#define	LCDENH_CFG		0x0400
-#define	LCDENH_CSCCFG		0x0404
-#define	LCDENH_LUMACFG		0x0408
-#define	LCDENH_CHROCFG0		0x040c
-#define	LCDENH_CHROCFG1		0x0410
-#define	LCDENH_DITHERCFG	0x0414
-#define	LCDENH_STATUS		0x0418
-#define	LCDENH_GAMMA		0x0800	/* base */
-#define	LCDENH_VEE		0x1000	/* base */
-
-struct lcd_frame_descriptor {
-	uint32_t	next;
-	uint32_t	physaddr;
-	uint32_t	id;
-	uint32_t	cmd;
-	uint32_t	offs;
-	uint32_t	pw;
-	uint32_t	cnum_pos;
-	uint32_t	dessize;
-} __packed;
-
-#endif /* !__JZ4780_LCD_H__ */
diff --git a/sys/mips/ingenic/jz4780_machdep.c b/sys/mips/ingenic/jz4780_machdep.c
deleted file mode 100644
index 8d59c6ff4de7..000000000000
--- a/sys/mips/ingenic/jz4780_machdep.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*-
- * Copyright (c) 2009 Oleksandr Tymoshenko
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/boot.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/mutex.h>
-#include <sys/reboot.h>
-
-#ifdef FDT
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#endif
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <net/ethernet.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-#include <mips/ingenic/jz4780_cpuregs.h>
-
-uint32_t * const led = (uint32_t *)0xb0010548;
-
-extern char edata[], end[];
-static char boot1_env[4096];
-
-void
-platform_cpu_init(void)
-{
-	uint32_t reg;
-
-	/*
-	 * Do not expect mbox interrups while writing
-	 * mbox
-	 */
-	reg = mips_rd_xburst_reim();
-	reg &= ~JZ_REIM_MIRQ0M;
-	mips_wr_xburst_reim(reg);
-
-	/* Clean mailboxes */
-	mips_wr_xburst_mbox0(0);
-	mips_wr_xburst_mbox1(0);
-	mips_wr_xburst_core_sts(~JZ_CORESTS_MIRQ0P);
-
-	/* Unmask mbox interrupts */
-	reg |= JZ_REIM_MIRQ0M;
-	mips_wr_xburst_reim(reg);
-}
-
-void
-platform_reset(void)
-{
-	/*
-	 * For now, provoke a watchdog reset in about a second, so UART buffers
-	 * have a fighting chance to flush before we pull the plug
-	 */
-	writereg(JZ_TCU_BASE + JZ_WDOG_TCER, 0);	/* disable watchdog */
-	writereg(JZ_TCU_BASE + JZ_WDOG_TCNT, 0);	/* reset counter */
-	writereg(JZ_TCU_BASE + JZ_WDOG_TDR, 128);	/* wait for ~1s */
-	writereg(JZ_TCU_BASE + JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
-	writereg(JZ_TCU_BASE + JZ_WDOG_TCER, TCER_ENABLE);	/* fire! */
-
-	/* Wait for reset */
-	while (1)
-		;
-}
-
-static void
-mips_init(void)
-{
-	int i;
-#ifdef FDT
-	struct mem_region mr[FDT_MEM_REGIONS];
-	uint64_t val;
-	int mr_cnt;
-	int j;
-#endif
-
-	for (i = 0; i < 10; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/* The minimal amount of memory Ingenic SoC can have. */
-	dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	physmem = realmem = btoc(32 * 1024 * 1024);
-
-	/*
-	 * X1000 mips cpu special.
-	 * TODO: do anyone know what is this ?
-	 */
-	__asm(
-		"li	$2, 0xa9000000	\n\t"
-		"mtc0	$2, $5, 4	\n\t"
-		"nop			\n\t"
-		::"r"(2));
-
-#ifdef FDT
-	if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
-		physmem = realmem = btoc(val);
-
-		KASSERT((phys_avail[0] >= mr[0].mr_start) && \
-			(phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)),
-			("First region is not within FDT memory range"));
-
-		/* Limit size of the first region */
-		phys_avail[1] = (mr[0].mr_start + MIN(mr[0].mr_size, ctob(realmem)));
-		dump_avail[1] = phys_avail[1];
-
-		/* Add the rest of regions */
-		for (i = 1, j = 2; i < mr_cnt; i++, j+=2) {
-			phys_avail[j] = mr[i].mr_start;
-			phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size);
-			dump_avail[j] = phys_avail[j];
-			dump_avail[j+1] = phys_avail[j+1];
-		}
-	}
-#endif
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-	led[0] = 0x8000;
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_start(__register_t a0,  __register_t a1,
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	char **argv;
-	int  argc;
-	vm_offset_t kernend;
-#ifdef FDT
-	vm_offset_t dtbp;
-	phandle_t chosen;
-	char buf[2048];		/* early stack supposedly big enough */
-#endif
-	/*
-	 * clear the BSS and SBSS segments, this should be first call in
-	 * the function
-	 */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/* Something to hold kernel env until kmem is available */
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-#ifdef FDT
-	/*
-	 * Find the dtb passed in by the boot loader (currently fictional).
-	 */
-	dtbp = (vm_offset_t)NULL;
-
-#if defined(FDT_DTB_STATIC)
-	/*
-	 * In case the device tree blob was not retrieved (from metadata) try
-	 * to use the statically embedded one.
-	 */
-	if (dtbp == (vm_offset_t)NULL)
-		dtbp = (vm_offset_t)&fdt_static_dtb;
-#else
-#error	"Non-static FDT not supported on JZ4780"
-#endif
-	if (OF_install(OFW_FDT, 0) == FALSE)
-		while (1);
-	if (OF_init((void *)dtbp) != 0)
-		while (1);
-#endif
-
-	cninit();
-#ifdef FDT
-	/*
-	 * Get bootargs from FDT if specified.
-	 */
-	chosen = OF_finddevice("/chosen");
-	if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
-		boothowto |= boot_parse_cmdline(buf);
-#endif
-	/* Parse cmdline from U-Boot */
-	argc = a0;
-	argv = (char **)a1;
-	boothowto |= boot_parse_args(argc, argv);
-
-	mips_init();
-}
diff --git a/sys/mips/ingenic/jz4780_mmc.c b/sys/mips/ingenic/jz4780_mmc.c
deleted file mode 100644
index f7622f4709a1..000000000000
--- a/sys/mips/ingenic/jz4780_mmc.c
+++ /dev/null
@@ -1,1004 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-
-#include <machine/bus.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/mmc/bridge.h>
-#include <dev/mmc/mmcreg.h>
-#include <dev/mmc/mmcbrvar.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-#undef JZ_MMC_DEBUG
-
-#define	JZ_MSC_MEMRES		0
-#define	JZ_MSC_IRQRES		1
-#define	JZ_MSC_RESSZ		2
-#define	JZ_MSC_DMA_SEGS		128
-#define	JZ_MSC_DMA_MAX_SIZE	maxphys
-
-#define JZ_MSC_INT_ERR_BITS	(JZ_INT_CRC_RES_ERR | JZ_INT_CRC_READ_ERR | \
-				JZ_INT_CRC_WRITE_ERR | JZ_INT_TIMEOUT_RES | \
-				JZ_INT_TIMEOUT_READ)
-static int jz4780_mmc_pio_mode = 0;
-
-TUNABLE_INT("hw.jz.mmc.pio_mode", &jz4780_mmc_pio_mode);
-
-struct jz4780_mmc_dma_desc {
-	uint32_t		dma_next;
-	uint32_t		dma_phys;
-	uint32_t		dma_len;
-	uint32_t		dma_cmd;
-};
-
-struct jz4780_mmc_softc {
-	bus_space_handle_t	sc_bsh;
-	bus_space_tag_t		sc_bst;
-	device_t		sc_dev;
-	clk_t			sc_clk;
-	int			sc_bus_busy;
-	int			sc_resid;
-	int			sc_timeout;
-	struct callout		sc_timeoutc;
-	struct mmc_host		sc_host;
-	struct mmc_request *	sc_req;
-	struct mtx		sc_mtx;
-	struct resource *	sc_res[JZ_MSC_RESSZ];
-	uint32_t		sc_intr_seen;
-	uint32_t		sc_intr_mask;
-	uint32_t		sc_intr_wait;
-	void *			sc_intrhand;
-	uint32_t		sc_cmdat;
-
-	/* Fields required for DMA access. */
-	bus_addr_t	  	sc_dma_desc_phys;
-	bus_dmamap_t		sc_dma_map;
-	bus_dma_tag_t 		sc_dma_tag;
-	void * 			sc_dma_desc;
-	bus_dmamap_t		sc_dma_buf_map;
-	bus_dma_tag_t		sc_dma_buf_tag;
-	int			sc_dma_inuse;
-	int			sc_dma_map_err;
-	uint32_t		sc_dma_ctl;
-};
-
-static struct resource_spec jz4780_mmc_res_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE | RF_SHAREABLE },
-	{ -1,			0,	0 }
-};
-
-static int jz4780_mmc_probe(device_t);
-static int jz4780_mmc_attach(device_t);
-static int jz4780_mmc_detach(device_t);
-static int jz4780_mmc_setup_dma(struct jz4780_mmc_softc *);
-static int jz4780_mmc_reset(struct jz4780_mmc_softc *);
-static void jz4780_mmc_intr(void *);
-static int jz4780_mmc_enable_clock(struct jz4780_mmc_softc *);
-static int jz4780_mmc_config_clock(struct jz4780_mmc_softc *, uint32_t);
-
-static int jz4780_mmc_update_ios(device_t, device_t);
-static int jz4780_mmc_request(device_t, device_t, struct mmc_request *);
-static int jz4780_mmc_get_ro(device_t, device_t);
-static int jz4780_mmc_acquire_host(device_t, device_t);
-static int jz4780_mmc_release_host(device_t, device_t);
-
-#define	JZ_MMC_LOCK(_sc)	mtx_lock(&(_sc)->sc_mtx)
-#define	JZ_MMC_UNLOCK(_sc)	mtx_unlock(&(_sc)->sc_mtx)
-#define	JZ_MMC_READ_2(_sc, _reg)					\
-	bus_space_read_2((_sc)->sc_bst, (_sc)->sc_bsh, _reg)
-#define	JZ_MMC_WRITE_2(_sc, _reg, _value)				\
-	bus_space_write_2((_sc)->sc_bst, (_sc)->sc_bsh, _reg, _value)
-#define	JZ_MMC_READ_4(_sc, _reg)					\
-	bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _reg)
-#define	JZ_MMC_WRITE_4(_sc, _reg, _value)				\
-	bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _reg, _value)
-
-static int
-jz4780_mmc_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-mmc"))
-		return (ENXIO);
-	if (device_get_unit(dev) > 0) /* XXXKAN */
-		return (ENXIO);
-	device_set_desc(dev, "Ingenic JZ4780 Integrated MMC/SD controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_mmc_attach(device_t dev)
-{
-	struct jz4780_mmc_softc *sc;
-	struct sysctl_ctx_list *ctx;
-	struct sysctl_oid_list *tree;
-	device_t child;
-	ssize_t len;
-	pcell_t prop;
-	phandle_t node;
-
-	sc = device_get_softc(dev);
-	sc->sc_dev = dev;
-	sc->sc_req = NULL;
-	if (bus_alloc_resources(dev, jz4780_mmc_res_spec, sc->sc_res) != 0) {
-		device_printf(dev, "cannot allocate device resources\n");
-		return (ENXIO);
-	}
-	sc->sc_bst = rman_get_bustag(sc->sc_res[JZ_MSC_MEMRES]);
-	sc->sc_bsh = rman_get_bushandle(sc->sc_res[JZ_MSC_MEMRES]);
-	if (bus_setup_intr(dev, sc->sc_res[JZ_MSC_IRQRES],
-	    INTR_TYPE_MISC | INTR_MPSAFE, NULL, jz4780_mmc_intr, sc,
-	    &sc->sc_intrhand)) {
-		bus_release_resources(dev, jz4780_mmc_res_spec, sc->sc_res);
-		device_printf(dev, "cannot setup interrupt handler\n");
-		return (ENXIO);
-	}
-	sc->sc_timeout = 10;
-	ctx = device_get_sysctl_ctx(dev);
-	tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
-	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "req_timeout", CTLFLAG_RW,
-	    &sc->sc_timeout, 0, "Request timeout in seconds");
-	mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), "jz4780_mmc",
-	    MTX_DEF);
-	callout_init_mtx(&sc->sc_timeoutc, &sc->sc_mtx, 0);
-
-	/* Reset controller. */
-	if (jz4780_mmc_reset(sc) != 0) {
-		device_printf(dev, "cannot reset the controller\n");
-		goto fail;
-	}
-	if (jz4780_mmc_pio_mode == 0 && jz4780_mmc_setup_dma(sc) != 0) {
-		device_printf(sc->sc_dev, "Couldn't setup DMA!\n");
-		jz4780_mmc_pio_mode = 1;
-	}
-	if (bootverbose)
-		device_printf(sc->sc_dev, "DMA status: %s\n",
-		    jz4780_mmc_pio_mode ? "disabled" : "enabled");
-
-	node = ofw_bus_get_node(dev);
-	/* Determine max operating frequency */
-	sc->sc_host.f_max = 24000000;
-	len = OF_getencprop(node, "max-frequency", &prop, sizeof(prop));
-	if (len / sizeof(prop) == 1)
-		sc->sc_host.f_max = prop;
-	sc->sc_host.f_min = sc->sc_host.f_max / 128;
-
-	sc->sc_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340;
-	sc->sc_host.caps = MMC_CAP_HSPEED;
-	sc->sc_host.mode = mode_sd;
-	/*
-	 * Check for bus-width property, default to both 4 and 8 bit
-	 * if no bus width is specified.
-	 */
-	len = OF_getencprop(node, "bus-width", &prop, sizeof(prop));
-	if (len / sizeof(prop) != 1)
-		sc->sc_host.caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
-	else if (prop == 8)
-		sc->sc_host.caps |= MMC_CAP_8_BIT_DATA;
-	else if (prop == 4)
-		sc->sc_host.caps |= MMC_CAP_4_BIT_DATA;
-	/* Activate the module clock. */
-	if (jz4780_mmc_enable_clock(sc) != 0) {
-		device_printf(dev, "cannot activate mmc clock\n");
-		goto fail;
-	}
-
-	child = device_add_child(dev, "mmc", -1);
-	if (child == NULL) {
-		device_printf(dev, "attaching MMC bus failed!\n");
-		goto fail;
-	}
-	if (device_probe_and_attach(child) != 0) {
-		device_printf(dev, "attaching MMC child failed!\n");
-		device_delete_child(dev, child);
-		goto fail;
-	}
-
-	return (0);
-
-fail:
-	callout_drain(&sc->sc_timeoutc);
-	mtx_destroy(&sc->sc_mtx);
-	bus_teardown_intr(dev, sc->sc_res[JZ_MSC_IRQRES], sc->sc_intrhand);
-	bus_release_resources(dev, jz4780_mmc_res_spec, sc->sc_res);
-	if (sc->sc_clk != NULL)
-		clk_release(sc->sc_clk);
-	return (ENXIO);
-}
-
-static int
-jz4780_mmc_detach(device_t dev)
-{
-
-	return (EBUSY);
-}
-
-static int
-jz4780_mmc_enable_clock(struct jz4780_mmc_softc *sc)
-{
-	int err;
-
-	err = clk_get_by_ofw_name(sc->sc_dev, 0, "mmc", &sc->sc_clk);
-	if (err == 0)
-		err = clk_enable(sc->sc_clk);
-	if (err == 0)
-		err = clk_set_freq(sc->sc_clk, sc->sc_host.f_max, 0);
-	if (err != 0)
-		clk_release(sc->sc_clk);
-	return (err);
-}
-
-static void
-jz4780_mmc_dma_desc_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
-{
-	struct jz4780_mmc_softc *sc;
-
-	sc = (struct jz4780_mmc_softc *)arg;
-	if (err) {
-		sc->sc_dma_map_err = err;
-		return;
-	}
-	sc->sc_dma_desc_phys = segs[0].ds_addr;
-}
-
-static int
-jz4780_mmc_setup_dma(struct jz4780_mmc_softc *sc)
-{
-	int dma_desc_size, error;
-
-	/* Allocate the DMA descriptor memory. */
-	dma_desc_size = sizeof(struct jz4780_mmc_dma_desc) * JZ_MSC_DMA_SEGS;
-	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
-	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
-	    dma_desc_size, 1, dma_desc_size, 0, NULL, NULL, &sc->sc_dma_tag);
-	if (error)
-		return (error);
-	error = bus_dmamem_alloc(sc->sc_dma_tag, &sc->sc_dma_desc,
-	    BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->sc_dma_map);
-	if (error)
-		return (error);
-
-	error = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map,
-	    sc->sc_dma_desc, dma_desc_size, jz4780_mmc_dma_desc_cb, sc, 0);
-	if (error)
-		return (error);
-	if (sc->sc_dma_map_err)
-		return (sc->sc_dma_map_err);
-
-	/* Create the DMA map for data transfers. */
-	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
-	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
-	    JZ_MSC_DMA_MAX_SIZE * JZ_MSC_DMA_SEGS, JZ_MSC_DMA_SEGS,
-	    JZ_MSC_DMA_MAX_SIZE, BUS_DMA_ALLOCNOW, NULL, NULL,
-	    &sc->sc_dma_buf_tag);
-	if (error)
-		return (error);
-	error = bus_dmamap_create(sc->sc_dma_buf_tag, 0,
-	    &sc->sc_dma_buf_map);
-	if (error)
-		return (error);
-
-	return (0);
-}
-
-static void
-jz4780_mmc_dma_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
-{
-	struct jz4780_mmc_dma_desc *dma_desc;
-	struct jz4780_mmc_softc *sc;
-	uint32_t dma_desc_phys;
-	int i;
-
-	sc = (struct jz4780_mmc_softc *)arg;
-	sc->sc_dma_map_err = err;
-	dma_desc = sc->sc_dma_desc;
-	dma_desc_phys = sc->sc_dma_desc_phys;
-
-	/* Note nsegs is guaranteed to be zero if err is non-zero. */
-	for (i = 0; i < nsegs; i++) {
-		dma_desc[i].dma_phys = segs[i].ds_addr;
-		dma_desc[i].dma_len  = segs[i].ds_len;
-		if (i < (nsegs - 1)) {
-			dma_desc_phys += sizeof(struct jz4780_mmc_dma_desc);
-			dma_desc[i].dma_next = dma_desc_phys;
-			dma_desc[i].dma_cmd = (i << 16) | JZ_DMA_LINK;
-		} else {
-			dma_desc[i].dma_next = 0;
-			dma_desc[i].dma_cmd = (i << 16) | JZ_DMA_ENDI;
-		}
-#ifdef JZ_MMC_DEBUG
-		device_printf(sc->sc_dev, "%d: desc %#x phys %#x len %d next %#x cmd %#x\n",
-		    i, dma_desc_phys - sizeof(struct jz4780_mmc_dma_desc),
-		    dma_desc[i].dma_phys, dma_desc[i].dma_len,
-		    dma_desc[i].dma_next, dma_desc[i].dma_cmd);
-#endif
- 	}
-}
-
-static int
-jz4780_mmc_prepare_dma(struct jz4780_mmc_softc *sc)
-{
-	bus_dmasync_op_t sync_op;
-	int error;
-	struct mmc_command *cmd;
-	uint32_t off;
-
-	cmd = sc->sc_req->cmd;
-	if (cmd->data->len > JZ_MSC_DMA_MAX_SIZE * JZ_MSC_DMA_SEGS)
-		return (EFBIG);
-	error = bus_dmamap_load(sc->sc_dma_buf_tag, sc->sc_dma_buf_map,
-	    cmd->data->data, cmd->data->len, jz4780_mmc_dma_cb, sc,
-	    BUS_DMA_NOWAIT);
-	if (error)
-		return (error);
-	if (sc->sc_dma_map_err)
-		return (sc->sc_dma_map_err);
-
-	sc->sc_dma_inuse = 1;
-	if (cmd->data->flags & MMC_DATA_WRITE)
-		sync_op = BUS_DMASYNC_PREWRITE;
-	else
-		sync_op = BUS_DMASYNC_PREREAD;
-	bus_dmamap_sync(sc->sc_dma_buf_tag, sc->sc_dma_buf_map, sync_op);
-	bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, BUS_DMASYNC_PREWRITE);
-
-	/* Configure default DMA parameters */
-	sc->sc_dma_ctl = JZ_MODE_SEL | JZ_INCR_64 | JZ_DMAEN;
-
-	/* Enable unaligned buffer handling */
-	off = (uintptr_t)cmd->data->data & 3;
-	if (off != 0)
-		sc->sc_dma_ctl |= (off << JZ_AOFST_S) | JZ_ALIGNEN;
-	return (0);
-}
-
-static void
-jz4780_mmc_start_dma(struct jz4780_mmc_softc *sc)
-{
-
-	/* Set the address of the first descriptor */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_DMANDA, sc->sc_dma_desc_phys);
-	/* Enable and start the dma engine */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_DMAC, sc->sc_dma_ctl);
-}
-
-static int
-jz4780_mmc_reset(struct jz4780_mmc_softc *sc)
-{
-	int timeout;
-
-	/* Stop the clock */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_CLOCK_STOP);
-
-	timeout = 1000;
-	while (--timeout > 0) {
-		if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_CLK_EN) == 0)
-			break;
-		DELAY(100);
-	}
-	if (timeout == 0) {
-		device_printf(sc->sc_dev, "Failed to stop clk.\n");
-		return (ETIMEDOUT);
-	}
-
-	/* Reset */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_RESET);
-
-	timeout = 10;
-	while (--timeout > 0) {
-		if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_IS_RESETTING) == 0)
-			break;
-		DELAY(1000);
-	}
-
-	if (timeout == 0) {
-		/*
-		 * X1000 never clears reseting bit.
-		 * Ignore for now.
-		 */
-	}
-
-	/* Set the timeouts. */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_RESTO, 0xffff);
-	JZ_MMC_WRITE_4(sc, JZ_MSC_RDTO, 0xffffffff);
-
-	/* Mask all interrupt initially */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, 0xffffffff);
-	/* Clear pending interrupts. */
-	JZ_MMC_WRITE_4(sc, JZ_MSC_IFLG, 0xffffffff);
-
-	/* Remember interrupts we always want */
-	sc->sc_intr_mask = JZ_MSC_INT_ERR_BITS;
-
-	return (0);
-}
-
-static void
-jz4780_mmc_req_done(struct jz4780_mmc_softc *sc)
-{
-	struct mmc_command *cmd;
-	struct mmc_request *req;
-	bus_dmasync_op_t sync_op;
-
-	cmd = sc->sc_req->cmd;
-	/* Reset the controller in case of errors */
-	if (cmd->error != MMC_ERR_NONE)
-		jz4780_mmc_reset(sc);
-	/* Unmap DMA if necessary */
-	if (sc->sc_dma_inuse == 1) {
-		if (cmd->data->flags & MMC_DATA_WRITE)
-			sync_op = BUS_DMASYNC_POSTWRITE;
-		else
-			sync_op = BUS_DMASYNC_POSTREAD;
-		bus_dmamap_sync(sc->sc_dma_buf_tag, sc->sc_dma_buf_map,
-		    sync_op);
-		bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map,
-		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->sc_dma_buf_tag, sc->sc_dma_buf_map);
-	}
-	req = sc->sc_req;
-	callout_stop(&sc->sc_timeoutc);
-	sc->sc_req = NULL;
-	sc->sc_resid = 0;
-	sc->sc_dma_inuse = 0;
-	sc->sc_dma_map_err = 0;
-	sc->sc_intr_wait = 0;
-	sc->sc_intr_seen = 0;
-	req->done(req);
-}
-
-static void
-jz4780_mmc_read_response(struct jz4780_mmc_softc *sc)
-{
-	struct mmc_command *cmd;
-	int i;
-
-	cmd = sc->sc_req->cmd;
-	if (cmd->flags & MMC_RSP_PRESENT) {
-		if (cmd->flags & MMC_RSP_136) {
-			uint16_t val;
-
-			val = JZ_MMC_READ_2(sc, JZ_MSC_RES);
-			for (i = 0; i < 4; i++) {
-				cmd->resp[i] = val << 24;
-				val = JZ_MMC_READ_2(sc, JZ_MSC_RES);
-				cmd->resp[i] |= val << 8;
-				val = JZ_MMC_READ_2(sc, JZ_MSC_RES);
-				cmd->resp[i] |= val >> 8;
-			}
-		} else {
-			cmd->resp[0] = JZ_MMC_READ_2(sc, JZ_MSC_RES) << 24;
-			cmd->resp[0] |= JZ_MMC_READ_2(sc, JZ_MSC_RES) << 8;
-			cmd->resp[0] |= JZ_MMC_READ_2(sc, JZ_MSC_RES) & 0xff;
-		}
-	}
-}
-
-static void
-jz4780_mmc_req_ok(struct jz4780_mmc_softc *sc)
-{
-	struct mmc_command *cmd;
-
-	cmd = sc->sc_req->cmd;
-	/* All data has been transferred ? */
-	if (cmd->data != NULL && (sc->sc_resid << 2) < cmd->data->len)
-		cmd->error = MMC_ERR_FAILED;
-	jz4780_mmc_req_done(sc);
-}
-
-static void
-jz4780_mmc_timeout(void *arg)
-{
-	struct jz4780_mmc_softc *sc;
-
-	sc = (struct jz4780_mmc_softc *)arg;
-	if (sc->sc_req != NULL) {
-		device_printf(sc->sc_dev, "controller timeout, rint %#x stat %#x\n",
-		    JZ_MMC_READ_4(sc, JZ_MSC_IFLG), JZ_MMC_READ_4(sc, JZ_MSC_STAT));
-		sc->sc_req->cmd->error = MMC_ERR_TIMEOUT;
-		jz4780_mmc_req_done(sc);
-	} else
-		device_printf(sc->sc_dev,
-		    "Spurious timeout - no active request\n");
-}
-
-static int
-jz4780_mmc_pio_transfer(struct jz4780_mmc_softc *sc, struct mmc_data *data)
-{
-	uint32_t mask, *buf;
-	int i, write;
-
-	buf = (uint32_t *)data->data;
-	write = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
-	mask = write ? JZ_DATA_FIFO_FULL : JZ_DATA_FIFO_EMPTY;
-	for (i = sc->sc_resid; i < (data->len >> 2); i++) {
-		if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & mask))
-			return (1);
-		if (write)
-			JZ_MMC_WRITE_4(sc, JZ_MSC_TXFIFO, buf[i]);
-		else
-			buf[i] = JZ_MMC_READ_4(sc, JZ_MSC_RXFIFO);
-		sc->sc_resid = i + 1;
-	}
-
-	/* Done with pio transfer, shut FIFO interrupts down */
-	mask = JZ_MMC_READ_4(sc, JZ_MSC_IMASK);
-	mask |= (JZ_INT_TXFIFO_WR_REQ | JZ_INT_RXFIFO_RD_REQ);
-	JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, mask);
-	return (0);
-}
-
-static void
-jz4780_mmc_intr(void *arg)
-{
-	struct jz4780_mmc_softc *sc;
-	struct mmc_data *data;
-	uint32_t rint;
-
-	sc = (struct jz4780_mmc_softc *)arg;
-	JZ_MMC_LOCK(sc);
-	rint  = JZ_MMC_READ_4(sc, JZ_MSC_IFLG);
-#if defined(JZ_MMC_DEBUG)
-	device_printf(sc->sc_dev, "rint: %#x, stat: %#x\n",
-	    rint, JZ_MMC_READ_4(sc, JZ_MSC_STAT));
-	if (sc->sc_dma_inuse == 1 && (sc->sc_intr_seen & JZ_INT_DMAEND) == 0)
-		device_printf(sc->sc_dev, "\tdmada %#x dmanext %#x dmac %#x"
-		    " dmalen %d dmacmd %#x\n",
-		    JZ_MMC_READ_4(sc, JZ_MSC_DMADA),
-		    JZ_MMC_READ_4(sc, JZ_MSC_DMANDA),
-		    JZ_MMC_READ_4(sc, JZ_MSC_DMAC),
-		    JZ_MMC_READ_4(sc, JZ_MSC_DMALEN),
-		    JZ_MMC_READ_4(sc, JZ_MSC_DMACMD));
-#endif
-	if (sc->sc_req == NULL) {
-		device_printf(sc->sc_dev,
-		    "Spurious interrupt - no active request, rint: 0x%08X\n",
-		    rint);
-		goto end;
-	}
-	if (rint & JZ_MSC_INT_ERR_BITS) {
-#if defined(JZ_MMC_DEBUG)
-		device_printf(sc->sc_dev, "controller error, rint %#x stat %#x\n",
-		    rint,  JZ_MMC_READ_4(sc, JZ_MSC_STAT));
-#endif
-		if (rint & (JZ_INT_TIMEOUT_RES | JZ_INT_TIMEOUT_READ))
-			sc->sc_req->cmd->error = MMC_ERR_TIMEOUT;
-		else
-			sc->sc_req->cmd->error = MMC_ERR_FAILED;
-		jz4780_mmc_req_done(sc);
-		goto end;
-	}
-	data = sc->sc_req->cmd->data;
-	/* Check for command response */
-	if (rint & JZ_INT_END_CMD_RES) {
-		jz4780_mmc_read_response(sc);
-		if (sc->sc_dma_inuse == 1)
-			jz4780_mmc_start_dma(sc);
-	}
-	if (data != NULL) {
-		if (sc->sc_dma_inuse == 1 && (rint & JZ_INT_DMAEND))
-			sc->sc_resid = data->len >> 2;
-		else if (sc->sc_dma_inuse == 0 &&
-		    (rint & (JZ_INT_TXFIFO_WR_REQ | JZ_INT_RXFIFO_RD_REQ)))
-			jz4780_mmc_pio_transfer(sc, data);
-	}
-	sc->sc_intr_seen |= rint;
-	if ((sc->sc_intr_seen & sc->sc_intr_wait) == sc->sc_intr_wait)
-		jz4780_mmc_req_ok(sc);
-end:
-	JZ_MMC_WRITE_4(sc, JZ_MSC_IFLG, rint);
-	JZ_MMC_UNLOCK(sc);
-}
-
-static int
-jz4780_mmc_request(device_t bus, device_t child, struct mmc_request *req)
-{
-	struct jz4780_mmc_softc *sc;
-	struct mmc_command *cmd;
-	uint32_t cmdat, iwait;
-	int blksz;
-
-	sc = device_get_softc(bus);
-	JZ_MMC_LOCK(sc);
-	if (sc->sc_req != NULL) {
-		JZ_MMC_UNLOCK(sc);
-		return (EBUSY);
-	}
-	/* Start with template value */
-	cmdat = sc->sc_cmdat;
-	iwait = JZ_INT_END_CMD_RES;
-
-	/* Configure response format */
-	cmd = req->cmd;
-	switch (MMC_RSP(cmd->flags)) {
-	case MMC_RSP_R1:
-	case MMC_RSP_R1B:
-		cmdat |= JZ_RES_R1;
-		break;
-	case MMC_RSP_R2:
-		cmdat |= JZ_RES_R2;
-		break;
-	case MMC_RSP_R3:
-		cmdat |= JZ_RES_R3;
-		break;
-	};
-	if (cmd->opcode == MMC_GO_IDLE_STATE)
-		cmdat |= JZ_INIT;
-	if (cmd->flags & MMC_RSP_BUSY) {
-		cmdat |= JZ_BUSY;
-		iwait |= JZ_INT_PRG_DONE;
-	}
-
-	sc->sc_req = req;
-	sc->sc_resid = 0;
-	cmd->error = MMC_ERR_NONE;
-
-	if (cmd->data != NULL) {
-		cmdat |= JZ_DATA_EN;
-		if (cmd->data->flags & MMC_DATA_MULTI) {
-			cmdat |= JZ_AUTO_CMD12;
-			iwait |= JZ_INT_AUTO_CMD12_DONE;
-		}
-		if (cmd->data->flags & MMC_DATA_WRITE) {
-			cmdat |= JZ_WRITE;
-			iwait |= JZ_INT_PRG_DONE;
-		}
-		if (cmd->data->flags & MMC_DATA_STREAM)
-			cmdat |= JZ_STREAM;
-		else
-			iwait |= JZ_INT_DATA_TRAN_DONE;
-
-		blksz = min(cmd->data->len, MMC_SECTOR_SIZE);
-		JZ_MMC_WRITE_4(sc, JZ_MSC_BLKLEN, blksz);
-		JZ_MMC_WRITE_4(sc, JZ_MSC_NOB, cmd->data->len / blksz);
-
-		/* Attempt to setup DMA for this transaction */
-		if (jz4780_mmc_pio_mode == 0)
-			jz4780_mmc_prepare_dma(sc);
-		if (sc->sc_dma_inuse != 0) {
-			/* Wait for DMA completion interrupt */
-			iwait |= JZ_INT_DMAEND;
-		} else {
-			iwait |= (cmd->data->flags & MMC_DATA_WRITE) ?
-			    JZ_INT_TXFIFO_WR_REQ : JZ_INT_RXFIFO_RD_REQ;
-			JZ_MMC_WRITE_4(sc, JZ_MSC_DMAC, 0);
-		}
-	}
-
-	sc->sc_intr_seen = 0;
-	sc->sc_intr_wait = iwait;
-	JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, ~(sc->sc_intr_mask | iwait));
-
-#if defined(JZ_MMC_DEBUG)
-	device_printf(sc->sc_dev,
-	    "REQUEST: CMD%u arg %#x flags %#x cmdat %#x sc_intr_wait = %#x\n",
-	    cmd->opcode, cmd->arg, cmd->flags, cmdat, sc->sc_intr_wait);
-#endif
-
-	JZ_MMC_WRITE_4(sc, JZ_MSC_ARG, cmd->arg);
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CMD, cmd->opcode);
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CMDAT, cmdat);
-
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_START_OP | JZ_CLOCK_START);
-
-	callout_reset(&sc->sc_timeoutc, sc->sc_timeout * hz,
-	    jz4780_mmc_timeout, sc);
-	JZ_MMC_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-jz4780_mmc_read_ivar(device_t bus, device_t child, int which,
-    uintptr_t *result)
-{
-	struct jz4780_mmc_softc *sc;
-
-	sc = device_get_softc(bus);
-	switch (which) {
-	default:
-		return (EINVAL);
-	case MMCBR_IVAR_BUS_MODE:
-		*(int *)result = sc->sc_host.ios.bus_mode;
-		break;
-	case MMCBR_IVAR_BUS_WIDTH:
-		*(int *)result = sc->sc_host.ios.bus_width;
-		break;
-	case MMCBR_IVAR_CHIP_SELECT:
-		*(int *)result = sc->sc_host.ios.chip_select;
-		break;
-	case MMCBR_IVAR_CLOCK:
-		*(int *)result = sc->sc_host.ios.clock;
-		break;
-	case MMCBR_IVAR_F_MIN:
-		*(int *)result = sc->sc_host.f_min;
-		break;
-	case MMCBR_IVAR_F_MAX:
-		*(int *)result = sc->sc_host.f_max;
-		break;
-	case MMCBR_IVAR_HOST_OCR:
-		*(int *)result = sc->sc_host.host_ocr;
-		break;
-	case MMCBR_IVAR_MODE:
-		*(int *)result = sc->sc_host.mode;
-		break;
-	case MMCBR_IVAR_OCR:
-		*(int *)result = sc->sc_host.ocr;
-		break;
-	case MMCBR_IVAR_POWER_MODE:
-		*(int *)result = sc->sc_host.ios.power_mode;
-		break;
-	case MMCBR_IVAR_RETUNE_REQ:
-		*(int *)result = retune_req_none;
-		break;
-	case MMCBR_IVAR_VDD:
-		*(int *)result = sc->sc_host.ios.vdd;
-		break;
-	case MMCBR_IVAR_VCCQ:
-		*result = sc->sc_host.ios.vccq;
-		break;
-	case MMCBR_IVAR_CAPS:
-		*(int *)result = sc->sc_host.caps;
-		break;
-	case MMCBR_IVAR_TIMING:
-		*(int *)result = sc->sc_host.ios.timing;
-		break;
-	case MMCBR_IVAR_MAX_DATA:
-		*(int *)result = 65535;
-		break;
-	case MMCBR_IVAR_MAX_BUSY_TIMEOUT:
-		*(int *)result = 1000000;	/* 1s max */
-		break;
-	}
-
-	return (0);
-}
-
-static int
-jz4780_mmc_write_ivar(device_t bus, device_t child, int which,
-    uintptr_t value)
-{
-	struct jz4780_mmc_softc *sc;
-
-	sc = device_get_softc(bus);
-	switch (which) {
-	default:
-		return (EINVAL);
-	case MMCBR_IVAR_BUS_MODE:
-		sc->sc_host.ios.bus_mode = value;
-		break;
-	case MMCBR_IVAR_BUS_WIDTH:
-		sc->sc_host.ios.bus_width = value;
-		break;
-	case MMCBR_IVAR_CHIP_SELECT:
-		sc->sc_host.ios.chip_select = value;
-		break;
-	case MMCBR_IVAR_CLOCK:
-		sc->sc_host.ios.clock = value;
-		break;
-	case MMCBR_IVAR_MODE:
-		sc->sc_host.mode = value;
-		break;
-	case MMCBR_IVAR_OCR:
-		sc->sc_host.ocr = value;
-		break;
-	case MMCBR_IVAR_POWER_MODE:
-		sc->sc_host.ios.power_mode = value;
-		break;
-	case MMCBR_IVAR_VDD:
-		sc->sc_host.ios.vdd = value;
-		break;
-	case MMCBR_IVAR_VCCQ:
-		sc->sc_host.ios.vccq = value;
-		break;
-	case MMCBR_IVAR_TIMING:
-		sc->sc_host.ios.timing = value;
-		break;
-	/* These are read-only */
-	case MMCBR_IVAR_CAPS:
-	case MMCBR_IVAR_HOST_OCR:
-	case MMCBR_IVAR_F_MIN:
-	case MMCBR_IVAR_F_MAX:
-	case MMCBR_IVAR_MAX_DATA:
-		return (EINVAL);
-	}
-
-	return (0);
-}
-
-static int
-jz4780_mmc_disable_clock(struct jz4780_mmc_softc *sc)
-{
-	int timeout;
-
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_CLOCK_STOP);
-
-	for (timeout = 1000; timeout > 0; timeout--)
-		if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_CLK_EN) == 0)
-			return (0);
-	return (ETIMEDOUT);
-}
-
-static int
-jz4780_mmc_config_clock(struct jz4780_mmc_softc *sc, uint32_t freq)
-{
-	uint64_t rate;
-	uint32_t clk_freq;
-	int err, div;
-
-	err = jz4780_mmc_disable_clock(sc);
-	if (err != 0)
-		return (err);
-
-	clk_get_freq(sc->sc_clk, &rate);
-	clk_freq = (uint32_t)rate;
-
-	div = 0;
-	while (clk_freq > freq) {
-		div++;
-		clk_freq >>= 1;
-	}
-	if (div >= 7)
-		div = 7;
-#if defined(JZ_MMC_DEBUG)
-	if (div != JZ_MMC_READ_4(sc, JZ_MSC_CLKRT))
-		device_printf(sc->sc_dev,
-		    "UPDATE_IOS: clk -> %u\n", clk_freq);
-#endif
-	JZ_MMC_WRITE_4(sc, JZ_MSC_CLKRT, div);
-	return (0);
-}
-
-static int
-jz4780_mmc_update_ios(device_t bus, device_t child)
-{
-	struct jz4780_mmc_softc *sc;
-	struct mmc_ios *ios;
-	int error;
-
-	sc = device_get_softc(bus);
-	ios = &sc->sc_host.ios;
-	if (ios->clock) {
-		/* Set the MMC clock. */
-		error = jz4780_mmc_config_clock(sc, ios->clock);
-		if (error != 0)
-			return (error);
-	}
-
-	/* Set the bus width. */
-	switch (ios->bus_width) {
-	case bus_width_1:
-		sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M);
-		sc->sc_cmdat |= JZ_BUS_1BIT;
-		break;
-	case bus_width_4:
-		sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M);
-		sc->sc_cmdat |= JZ_BUS_4BIT;
-		break;
-	case bus_width_8:
-		sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M);
-		sc->sc_cmdat |= JZ_BUS_8BIT;
-		break;
-	}
-	return (0);
-}
-
-static int
-jz4780_mmc_get_ro(device_t bus, device_t child)
-{
-
-	return (0);
-}
-
-static int
-jz4780_mmc_acquire_host(device_t bus, device_t child)
-{
-	struct jz4780_mmc_softc *sc;
-	int error;
-
-	sc = device_get_softc(bus);
-	JZ_MMC_LOCK(sc);
-	while (sc->sc_bus_busy) {
-		error = msleep(sc, &sc->sc_mtx, PCATCH, "mmchw", 0);
-		if (error != 0) {
-			JZ_MMC_UNLOCK(sc);
-			return (error);
-		}
-	}
-	sc->sc_bus_busy++;
-	JZ_MMC_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-jz4780_mmc_release_host(device_t bus, device_t child)
-{
-	struct jz4780_mmc_softc *sc;
-
-	sc = device_get_softc(bus);
-	JZ_MMC_LOCK(sc);
-	sc->sc_bus_busy--;
-	wakeup(sc);
-	JZ_MMC_UNLOCK(sc);
-
-	return (0);
-}
-
-static device_method_t jz4780_mmc_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_mmc_probe),
-	DEVMETHOD(device_attach,	jz4780_mmc_attach),
-	DEVMETHOD(device_detach,	jz4780_mmc_detach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	jz4780_mmc_read_ivar),
-	DEVMETHOD(bus_write_ivar,	jz4780_mmc_write_ivar),
-
-	/* MMC bridge interface */
-	DEVMETHOD(mmcbr_update_ios,	jz4780_mmc_update_ios),
-	DEVMETHOD(mmcbr_request,	jz4780_mmc_request),
-	DEVMETHOD(mmcbr_get_ro,		jz4780_mmc_get_ro),
-	DEVMETHOD(mmcbr_acquire_host,	jz4780_mmc_acquire_host),
-	DEVMETHOD(mmcbr_release_host,	jz4780_mmc_release_host),
-
-	DEVMETHOD_END
-};
-
-static devclass_t jz4780_mmc_devclass;
-
-static driver_t jz4780_mmc_driver = {
-	"jzmmc",
-	jz4780_mmc_methods,
-	sizeof(struct jz4780_mmc_softc),
-};
-
-DRIVER_MODULE(jzmmc, simplebus, jz4780_mmc_driver, jz4780_mmc_devclass, NULL,
-    NULL);
-MMC_DECLARE_BRIDGE(jzmmc);
diff --git a/sys/mips/ingenic/jz4780_mp.c b/sys/mips/ingenic/jz4780_mp.c
deleted file mode 100644
index 2f6c8f31fe4f..000000000000
--- a/sys/mips/ingenic/jz4780_mp.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev <kan@FreeBSD.org>
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/smp.h>
-#include <sys/systm.h>
-
-#include <machine/cpufunc.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/smp.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-#include <mips/ingenic/jz4780_cpuregs.h>
-
-void jz4780_mpentry(void);
-
-#define JZ4780_MAXCPU	2
-
-void
-platform_ipi_send(int cpuid)
-{
-
-	if (cpuid == 0)
-		mips_wr_xburst_mbox0(1);
-	else
-		mips_wr_xburst_mbox1(1);
-}
-
-void
-platform_ipi_clear(void)
-{
-	int cpuid = PCPU_GET(cpuid);
-	uint32_t action;
-
-	action = (cpuid == 0) ? mips_rd_xburst_mbox0() : mips_rd_xburst_mbox1();
-	KASSERT(action == 1, ("CPU %d: unexpected IPIs: %#x", cpuid, action));
-	mips_wr_xburst_core_sts(~(JZ_CORESTS_MIRQ0P << cpuid));
-}
-
-int
-platform_processor_id(void)
-{
-
-	return (mips_rd_ebase() & 7);
-}
-
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (1);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (-1);
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	unsigned reg;
-
-	/*
-	 * Clear any pending IPIs.
-	 */
-	mips_wr_xburst_core_sts(~(JZ_CORESTS_MIRQ0P << cpuid));
-
-	/* Allow IPI mbox for this core */
-	reg = mips_rd_xburst_reim();
-	reg |= (JZ_REIM_MIRQ0M << cpuid);
-	mips_wr_xburst_reim(reg);
-
-	/*
-	 * Unmask the ipi interrupts.
-	 */
-	reg = hard_int_mask(platform_ipi_hardintr_num());
-	set_intr_mask(reg);
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	uint32_t i, m;
-
-	CPU_ZERO(mask);
-	for (i = 0, m = 1 ; i < JZ4780_MAXCPU; i++, m <<= 1)
-		CPU_SET(i, mask);
-}
-
-struct cpu_group *
-platform_smp_topo(void)
-{
-	return (smp_topo_none());
-}
-
-static void
-jz4780_core_powerup(void)
-{
-	uint32_t reg;
-
-	reg = readreg(JZ_CGU_BASE + JZ_LPCR);
-	reg &= ~LPCR_PD_SCPU;
-	writereg(JZ_CGU_BASE + JZ_LPCR, reg);
-	do {
-		reg = readreg(JZ_CGU_BASE + JZ_LPCR);
-	} while ((reg & LPCR_SCPUS) != 0);
-}
-
-/*
- * Spin up the second code. The code is roughly modeled after
- * similar routine in Linux.
- */
-int
-platform_start_ap(int cpuid)
-{
-	uint32_t reg, addr;
-
-	if (cpuid >= JZ4780_MAXCPU)
-		return (EINVAL);
-
-	/* Figure out address of mpentry in KSEG1 */
-	addr = MIPS_PHYS_TO_KSEG1(MIPS_KSEG0_TO_PHYS(jz4780_mpentry));
-	KASSERT((addr & ~JZ_REIM_ENTRY_MASK) == 0,
-	    ("Unaligned mpentry"));
-
-	/* Configure core alternative entry point */
-	reg = mips_rd_xburst_reim();
-	reg &= ~JZ_REIM_ENTRY_MASK;
-	reg |= addr & JZ_REIM_ENTRY_MASK;
-
-	/* Allow this core to get IPIs from one being started */
-	reg |= JZ_REIM_MIRQ0M;
-	mips_wr_xburst_reim(reg);
-
-	/* Force core into reset and enable use of alternate entry point */
-	reg = mips_rd_xburst_core_ctl();
-	reg |= (JZ_CORECTL_SWRST0 << cpuid) | (JZ_CORECTL_RPC0 << cpuid);
-	mips_wr_xburst_core_ctl(reg);
-
-	/* Power the core up */
-	jz4780_core_powerup();
-
-	/* Take the core out of reset */
-	reg &= ~(JZ_CORECTL_SWRST0 << cpuid);
-	mips_wr_xburst_core_ctl(reg);
-
-	return (0);
-}
diff --git a/sys/mips/ingenic/jz4780_mpboot.S b/sys/mips/ingenic/jz4780_mpboot.S
deleted file mode 100644
index acd9658d8ccc..000000000000
--- a/sys/mips/ingenic/jz4780_mpboot.S
+++ /dev/null
@@ -1,45 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include "assym.inc"
-
-	.text
-	.set	noat
-	.set	noreorder
-	.section .text.mpentry_jz4780
-	.balign 0x10000
-
-/*
- * JZ4870 has stricter alignment requirement for
- * CPU entry point. Enforce it in CPU-specific
- * file.
- */
-GLOBAL(jz4780_mpentry)
-	j	mpentry
-	nop
diff --git a/sys/mips/ingenic/jz4780_nand.c b/sys/mips/ingenic/jz4780_nand.c
deleted file mode 100644
index 4a658dbc044a..000000000000
--- a/sys/mips/ingenic/jz4780_nand.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-struct jz4780_nand_softc {
-	device_t		dev;
-	struct resource		*res[1];
-};
-
-static struct resource_spec jz4780_nand_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int jz4780_nand_probe(device_t dev);
-static int jz4780_nand_attach(device_t dev);
-static int jz4780_nand_detach(device_t dev);
-
-static int
-jz4780_nand_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-nand"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 NAND Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_nand_attach(device_t dev)
-{
-	struct jz4780_nand_softc *sc = device_get_softc(dev);
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_nand_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	return (0);
-}
-
-static int
-jz4780_nand_detach(device_t dev)
-{
-	struct jz4780_nand_softc *sc = device_get_softc(dev);
-
-	bus_release_resources(dev, jz4780_nand_spec, sc->res);
-	return (0);
-}
-
-static device_method_t jz4780_nand_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_nand_probe),
-	DEVMETHOD(device_attach,	jz4780_nand_attach),
-	DEVMETHOD(device_detach,	jz4780_nand_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_nand_driver = {
-	"nand",
-	jz4780_nand_methods,
-	sizeof(struct jz4780_nand_softc),
-};
-
-static devclass_t jz4780_nand_devclass;
-
-DRIVER_MODULE(jz4780_nand, simplebus, jz4780_nand_driver,
-    jz4780_nand_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_nemc.c b/sys/mips/ingenic/jz4780_nemc.c
deleted file mode 100644
index 5c0b11515765..000000000000
--- a/sys/mips/ingenic/jz4780_nemc.c
+++ /dev/null
@@ -1,373 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/fdt/simplebus.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-struct jz4780_nemc_devinfo {
-	struct simplebus_devinfo sinfo;
-	uint32_t                 bank;
-};
-
-struct jz4780_nemc_softc {
-	struct simplebus_softc	simplebus_sc;
-	device_t		dev;
-	struct resource		*res[1];
-	uint32_t		banks;
-	uint32_t		clock_tick_psecs;
-	clk_t			clk;
-};
-
-static struct resource_spec jz4780_nemc_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-#define	CSR_WRITE_4(sc, reg, val)	bus_write_4((sc)->res[0], reg, (val))
-#define	CSR_READ_4(sc, reg)		bus_read_4((sc)->res[0], reg)
-
-static int jz4780_nemc_probe(device_t dev);
-static int jz4780_nemc_attach(device_t dev);
-static int jz4780_nemc_detach(device_t dev);
-
-static int
-jz4780_nemc_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-nemc"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 NEMC");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-#define JZ4780_NEMC_NS_TO_TICKS(sc, val) howmany((val) * 1000,  (sc)->clock_tick_psecs)
-
-/* Use table from JZ4780 programmers manual to convert ticks to tBP/tAW register values */
-static const uint8_t ticks_to_tBP_tAW[32] = {
-	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,  /* 1:1 mapping */
-	11, 11,                            /* 12 cycles */
-	12, 12, 12,                        /* 15 cycles */
-	13, 13, 13, 13, 13,                /* 20 cycles */
-	14, 14, 14, 14, 14,                /* 25 cycles */
-	15, 15, 15, 15, 15, 15             /* 31 cycles */
-};
-
-static int
-jz4780_nemc_configure_bank(struct jz4780_nemc_softc *sc,
-        device_t dev, u_int bank)
-{
-	uint32_t smcr, cycles;
-	phandle_t node;
-	pcell_t   val;
-
-	/* Check if bank is configured already */
-	if (sc->banks & (1 << bank))
-		return 0;
-
-	smcr = CSR_READ_4(sc, JZ_NEMC_SMCR(bank));
-
-	smcr &= ~JZ_NEMC_SMCR_SMT_MASK;
-	smcr |= JZ_NEMC_SMCR_SMT_NORMAL << JZ_NEMC_SMCR_SMT_SHIFT;
-
-	node = ofw_bus_get_node(dev);
-	if (OF_getencprop(node, "ingenic,nemc-tAS", &val, sizeof(val)) > 0) {
-		cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val);
-		if (cycles > 15) {
-			device_printf(sc->dev,
-			    "invalid value of %s %u (%u cycles), maximum %u cycles supported\n",
-			    "ingenic,nemc-tAS", val, cycles, 15);
-			return -1;
-		}
-		smcr &= ~JZ_NEMC_SMCR_TAS_MASK;
-		smcr |= cycles << JZ_NEMC_SMCR_TAS_SHIFT;
-	}
-
-	if (OF_getencprop(node, "ingenic,nemc-tAH", &val, sizeof(val)) > 0) {
-		cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val);
-		if (cycles > 15) {
-			device_printf(sc->dev,
-			    "invalid value of %s %u (%u cycles), maximum %u cycles supported\n",
-			    "ingenic,nemc-tAH", val, cycles, 15);
-			return -1;
-		}
-		smcr &= ~JZ_NEMC_SMCR_TAH_MASK;
-		smcr |= cycles << JZ_NEMC_SMCR_TAH_SHIFT;
-	}
-
-	if (OF_getencprop(node, "ingenic,nemc-tBP", &val, sizeof(val)) > 0) {
-		cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val);
-		if (cycles > 31) {
-			device_printf(sc->dev,
-			    "invalid value of %s %u (%u cycles), maximum %u cycles supported\n",
-			    "ingenic,nemc-tBP", val, cycles, 15);
-			return -1;
-		}
-		smcr &= ~JZ_NEMC_SMCR_TBP_MASK;
-		smcr |= ticks_to_tBP_tAW[cycles] << JZ_NEMC_SMCR_TBP_SHIFT;
-	}
-
-	if (OF_getencprop(node, "ingenic,nemc-tAW", &val, sizeof(val)) > 0) {
-		cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val);
-		if (cycles > 31) {
-			device_printf(sc->dev,
-			    "invalid value of %s %u (%u cycles), maximum %u cycles supported\n",
-			    "ingenic,nemc-tAW", val, cycles, 15);
-			return -1;
-		}
-		smcr &= ~JZ_NEMC_SMCR_TAW_MASK;
-		smcr |= ticks_to_tBP_tAW[cycles] << JZ_NEMC_SMCR_TAW_SHIFT;
-	}
-
-	if (OF_getencprop(node, "ingenic,nemc-tSTRV", &val, sizeof(val)) > 0) {
-		cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val);
-		if (cycles > 63) {
-			device_printf(sc->dev,
-			    "invalid value of %s %u (%u cycles), maximum %u cycles supported\n",
-			    "ingenic,nemc-tSTRV", val, cycles, 15);
-			return -1;
-		}
-		smcr &= ~JZ_NEMC_SMCR_STRV_MASK;
-		smcr |= cycles << JZ_NEMC_SMCR_STRV_SHIFT;
-	}
-	CSR_WRITE_4(sc, JZ_NEMC_SMCR(bank), smcr);
-	sc->banks |= (1 << bank);
-	return 0;
-}
-
-/* Wholesale copy of simplebus routine */
-static int
-jz4780_nemc_fill_ranges(phandle_t node, struct simplebus_softc *sc)
-{
-	int host_address_cells;
-	cell_t *base_ranges;
-	ssize_t nbase_ranges;
-	int err;
-	int i, j, k;
-
-	err = OF_searchencprop(OF_parent(node), "#address-cells",
-	    &host_address_cells, sizeof(host_address_cells));
-	if (err <= 0)
-		return (-1);
-
-	nbase_ranges = OF_getproplen(node, "ranges");
-	if (nbase_ranges < 0)
-		return (-1);
-	sc->nranges = nbase_ranges / sizeof(cell_t) /
-	    (sc->acells + host_address_cells + sc->scells);
-	if (sc->nranges == 0)
-		return (0);
-
-	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
-	    M_DEVBUF, M_WAITOK);
-	base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
-	OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
-
-	for (i = 0, j = 0; i < sc->nranges; i++) {
-		sc->ranges[i].bus = 0;
-		for (k = 0; k < sc->acells; k++) {
-			sc->ranges[i].bus <<= 32;
-			sc->ranges[i].bus |= base_ranges[j++];
-		}
-		sc->ranges[i].host = 0;
-		for (k = 0; k < host_address_cells; k++) {
-			sc->ranges[i].host <<= 32;
-			sc->ranges[i].host |= base_ranges[j++];
-		}
-		sc->ranges[i].size = 0;
-		for (k = 0; k < sc->scells; k++) {
-			sc->ranges[i].size <<= 32;
-			sc->ranges[i].size |= base_ranges[j++];
-		}
-	}
-
-	free(base_ranges, M_DEVBUF);
-	return (sc->nranges);
-}
-
-static int
-jz4780_nemc_attach(device_t dev)
-{
-	struct jz4780_nemc_softc *sc = device_get_softc(dev);
-	phandle_t node;
-	uint64_t freq;
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_nemc_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	node = ofw_bus_get_node(dev);
-
-	/* Initialize simplebus and enumerate resources */
-	simplebus_init(dev, node);
-
-	if (jz4780_nemc_fill_ranges(node, &sc->simplebus_sc) < 0)
-		goto error;
-
-	/* Figure our underlying clock rate. */
-	if (clk_get_by_ofw_index(dev, 0, 0, &sc->clk) != 0) {
-		device_printf(dev, "could not lookup device clock\n");
-		goto error;
-	}
-	if (clk_enable(sc->clk) != 0) {
-		device_printf(dev, "could not enable device clock\n");
-		goto error;
-	}
-	if (clk_get_freq(sc->clk, &freq) != 0) {
-		device_printf(dev, "could not determine clock speed\n");
-		goto error;
-	}
-
-	/* Convert clock frequency to picoseconds-per-tick value. */
-	sc->clock_tick_psecs = (uint32_t)(1000000000000ULL / freq);
-
-	/*
-	 * Allow devices to identify.
-	 */
-	bus_generic_probe(dev);
-
-	/*
-	 * Now walk the tree and attach top level devices
-	 */
-	for (node = OF_child(node); node > 0; node = OF_peer(node))
-		simplebus_add_device(dev, node, 0, NULL, -1, NULL);
-
-	return (bus_generic_attach(dev));
-error:
-	jz4780_nemc_detach(dev);
-	return (ENXIO);
-}
-
-static int
-jz4780_nemc_detach(device_t dev)
-{
-	struct jz4780_nemc_softc *sc = device_get_softc(dev);
-
-	bus_generic_detach(dev);
-	if (sc->clk != NULL)
-		clk_release(sc->clk);
-	bus_release_resources(dev, jz4780_nemc_spec, sc->res);
-	return (0);
-}
-
-static int
-jz4780_nemc_decode_bank(struct simplebus_softc *sc, struct resource *r,
-    u_int *bank)
-{
-	rman_res_t start, end;
-	int i;
-
-	start = rman_get_start(r);
-	end = rman_get_end(r);
-
-	/* Remap through ranges property */
-	for (i = 0; i < sc->nranges; i++) {
-		if (start >= sc->ranges[i].host && end <
-		    sc->ranges[i].host + sc->ranges[i].size) {
-			*bank = (sc->ranges[i].bus >> 32);
-			return (0);
-		}
-	}
-	return (1);
-}
-
-static int
-jz4780_nemc_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	struct jz4780_nemc_softc *sc;
-	u_int bank;
-	int err;
-
-	if (type == SYS_RES_MEMORY) {
-		sc = device_get_softc(bus);
-
-		/* Figure out on what bank device is residing */
-		err = jz4780_nemc_decode_bank(&sc->simplebus_sc, r, &bank);
-		if (err == 0) {
-			/* Attempt to configure the bank if not done already */
-			err = jz4780_nemc_configure_bank(sc, child, bank);
-			if (err != 0)
-				return (err);
-		}
-	}
-
-	/* Call default implementation to finish the work */
-	return (bus_generic_activate_resource(bus, child,
-		type, rid, r));
-}
-
-static device_method_t jz4780_nemc_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_nemc_probe),
-	DEVMETHOD(device_attach,	jz4780_nemc_attach),
-	DEVMETHOD(device_detach,	jz4780_nemc_detach),
-
-	/* Overrides to configure bank on resource activation */
-	DEVMETHOD(bus_activate_resource, jz4780_nemc_activate_resource),
-
-	DEVMETHOD_END
-};
-
-static devclass_t jz4780_nemc_devclass;
-DEFINE_CLASS_1(nemc, jz4780_nemc_driver, jz4780_nemc_methods,
-        sizeof(struct jz4780_nemc_softc), simplebus_driver);
-DRIVER_MODULE(jz4780_nemc, simplebus, jz4780_nemc_driver,
-    jz4780_nemc_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_ohci.c b/sys/mips/ingenic/jz4780_ohci.c
deleted file mode 100644
index 3b4ffdbfcebb..000000000000
--- a/sys/mips/ingenic/jz4780_ohci.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/*-
- * Copyright (c) 2015, Alexander Kabaev <kan@FreeBSD.org>
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/condvar.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/gpio.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-#include <dev/usb/controller/ohci.h>
-#include <dev/usb/controller/ohcireg.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/gpio/gpiobusvar.h>
-
-#include <mips/ingenic/jz4780_clock.h>
-#include <mips/ingenic/jz4780_regs.h>
-
-static int jz4780_ohci_attach(device_t dev);
-static int jz4780_ohci_detach(device_t dev);
-static int jz4780_ohci_probe(device_t dev);
-
-struct jz4780_ohci_softc
-{
-	struct ohci_softc sc_ohci;
-	struct gpiobus_pin *gpio_vbus;
-	clk_t clk;
-};
-
-static int
-jz4780_ohci_probe(device_t dev)
-{
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-ohci"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 OHCI");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_ohci_vbus_gpio_enable(device_t dev, struct jz4780_ohci_softc *sc)
-{
-	struct gpiobus_pin *gpio_vbus;
-	int error;
-
-	error = ofw_gpiobus_parse_gpios(dev, "ingenic,vbus-gpio", &gpio_vbus);
-	/*
-	 * The pin can be mapped already by other device. Assume it also has need
-	 * activated and proceed happily.
-	 */
-	if (error <= 0)
-		return (0);
-
-	sc->gpio_vbus = gpio_vbus;
-	if (error > 1) {
-		device_printf(dev, "too many vbus gpios\n");
-		return (ENXIO);
-	}
-
-	if (sc->gpio_vbus != NULL) {
-		error = GPIO_PIN_SET(sc->gpio_vbus->dev, sc->gpio_vbus->pin, 1);
-		if (error != 0) {
-			device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-			    sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev));
-			return (error);
-		}
-
-		error = GPIO_PIN_SETFLAGS(sc->gpio_vbus->dev, sc->gpio_vbus->pin,
-		    GPIO_PIN_OUTPUT);
-		if (error != 0) {
-			device_printf(dev, "Cannot configure GPIO pin %d on %s\n",
-			    sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev));
-			return (error);
-		}
-	}
-	return (0);
-}
-
-static int
-jz4780_ohci_clk_enable(device_t dev)
-{
-	struct jz4780_ohci_softc *sc;
-	int err;
-
-	sc = device_get_softc(dev);
-
-	err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
-	if (err != 0) {
-		device_printf(dev, "unable to lookup device clock\n");
-		return (err);
-	}
-	err = clk_enable(sc->clk);
-	if (err != 0) {
-		device_printf(dev, "unable to enable device clock\n");
-		return (err);
-	}
-	err = clk_set_freq(sc->clk, 48000000, 0);
-	if (err != 0) {
-		device_printf(dev, "unable to set device clock to 48 kHZ\n");
-		return (err);
-	}
-	return (0);
-}
-
-static int
-jz4780_ohci_attach(device_t dev)
-{
-	struct jz4780_ohci_softc *sc = device_get_softc(dev);
-	int err;
-	int rid;
-
-	/* initialize some bus fields */
-	sc->sc_ohci.sc_bus.parent = dev;
-	sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
-	sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
-	sc->sc_ohci.sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
-	    USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
-		return (ENOMEM);
-	}
-
-	sc->sc_ohci.sc_dev = dev;
-
-	/* frob vbus gpio */
-	err = jz4780_ohci_vbus_gpio_enable(dev, sc);
-	if (err)
-		goto error;
-
-	err = jz4780_ohci_clk_enable(dev);
-	if (err)
-		goto error;
-
-	rid = 0;
-	sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (sc->sc_ohci.sc_io_res == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
-	sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
-	sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
-
-	rid = 0;
-	sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_ACTIVE);
-	if (sc->sc_ohci.sc_irq_res == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-
-	if (jz4780_ohci_enable() != 0) {
-		device_printf(dev, "CGU failed to enable OHCI\n");
-		err = ENXIO;
-		goto error;
-	}
-
-	sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (sc->sc_ohci.sc_bus.bdev == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
-
-	err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res,
-	    INTR_TYPE_BIO | INTR_MPSAFE, NULL,
-	    (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
-	if (err) {
-		err = ENXIO;
-		goto error;
-	}
-
-	strlcpy(sc->sc_ohci.sc_vendor, "Ingenic", sizeof(sc->sc_ohci.sc_vendor));
-	bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0);
-
-	err = ohci_init(&sc->sc_ohci);
-	if (!err)
-		err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
-
-	if (err)
-		goto error;
-	return (0);
-
-error:
-	if (err)
-		jz4780_ohci_detach(dev);
-	return (err);
-}
-
-static int
-jz4780_ohci_detach(device_t dev)
-{
-	struct jz4780_ohci_softc *sc = device_get_softc(dev);
-	device_t bdev;
-
-	if (sc->sc_ohci.sc_bus.bdev) {
-		bdev = sc->sc_ohci.sc_bus.bdev;
-		device_detach(bdev);
-		device_delete_child(dev, bdev);
-	}
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	/*
-	 * Put the controller into reset, then disable clocks and do
-	 * the MI tear down.  We have to disable the clocks/hardware
-	 * after we do the rest of the teardown.  We also disable the
-	 * clocks in the opposite order we acquire them, but that
-	 * doesn't seem to be absolutely necessary.  We free up the
-	 * clocks after we disable them, so the system could, in
-	 * theory, reuse them.
-	 */
-	if (sc->sc_ohci.sc_io_res != NULL) {
-		bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
-		    OHCI_CONTROL, 0);
-	}
-
-	if (sc->sc_ohci.sc_intr_hdl) {
-		bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl);
-		sc->sc_ohci.sc_intr_hdl = NULL;
-	}
-
-	if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
-		/*
-		 * only call ohci_detach() after ohci_init()
-		 */
-		ohci_detach(&sc->sc_ohci);
-
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
-		sc->sc_ohci.sc_irq_res = NULL;
-	}
-	if (sc->sc_ohci.sc_io_res) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res);
-		sc->sc_ohci.sc_io_res = NULL;
-		sc->sc_ohci.sc_io_tag = 0;
-		sc->sc_ohci.sc_io_hdl = 0;
-	}
-
-	if (sc->clk != NULL)
-		clk_release(sc->clk);
-
-	usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
-	free(sc->gpio_vbus, M_DEVBUF);
-	return (0);
-}
-
-static device_method_t ohci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, jz4780_ohci_probe),
-	DEVMETHOD(device_attach, jz4780_ohci_attach),
-	DEVMETHOD(device_detach, jz4780_ohci_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ohci_driver = {
-	.name = "ohci",
-	.methods = ohci_methods,
-	.size = sizeof(struct jz4780_ohci_softc),
-};
-
-static devclass_t ohci_devclass;
-
-DRIVER_MODULE(ohci, simplebus, ohci_driver, ohci_devclass, 0, 0);
diff --git a/sys/mips/ingenic/jz4780_pdma.c b/sys/mips/ingenic/jz4780_pdma.c
deleted file mode 100644
index 874dd0f5d6ac..000000000000
--- a/sys/mips/ingenic/jz4780_pdma.c
+++ /dev/null
@@ -1,585 +0,0 @@
-/*-
- * Copyright (c) 2016-2018 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* Ingenic JZ4780 PDMA Controller. */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_platform.h"
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-#ifdef FDT
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#endif
-
-#include <dev/xdma/xdma.h>
-
-#include <mips/ingenic/jz4780_common.h>
-#include <mips/ingenic/jz4780_pdma.h>
-
-#include "xdma_if.h"
-
-#define	PDMA_DEBUG
-#undef	PDMA_DEBUG
-
-#ifdef	PDMA_DEBUG
-#define	dprintf(fmt, ...)	printf(fmt, ##__VA_ARGS__)
-#else
-#define	dprintf(fmt, ...)
-#endif
-
-#define	PDMA_DESC_RING_ALIGN	2048
-
-struct pdma_softc {
-	device_t		dev;
-	struct resource		*res[2];
-	bus_space_tag_t		bst;
-	bus_space_handle_t	bsh;
-	void			*ih;
-};
-
-struct pdma_fdt_data {
-	int tx;
-	int rx;
-	int chan;
-};
-
-struct pdma_channel {
-	struct pdma_fdt_data	data;
-	int			cur_desc;
-	int			used;
-	int			index;
-	int			flags;
-#define	CHAN_DESCR_RELINK	(1 << 0)
-
-	/* Descriptors */
-	bus_dma_tag_t		desc_tag;
-	bus_dmamap_t		desc_map;
-	struct pdma_hwdesc	*desc_ring;
-	bus_addr_t		desc_ring_paddr;
-
-	/* xDMA */
-	xdma_channel_t		*xchan;
-	struct xdma_request	*req;
-};
-
-#define	PDMA_NCHANNELS	32
-struct pdma_channel pdma_channels[PDMA_NCHANNELS];
-
-static struct resource_spec pdma_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-static int pdma_probe(device_t dev);
-static int pdma_attach(device_t dev);
-static int pdma_detach(device_t dev);
-static int chan_start(struct pdma_softc *sc, struct pdma_channel *chan);
-
-static void
-pdma_intr(void *arg)
-{
-	struct xdma_request *req;
-	xdma_transfer_status_t status;
-	struct pdma_channel *chan;
-	struct pdma_softc *sc;
-	xdma_channel_t *xchan;
-	int pending;
-	int i;
-
-	sc = arg;
-
-	pending = READ4(sc, PDMA_DIRQP);
-
-	/* Ack all the channels. */
-	WRITE4(sc, PDMA_DIRQP, 0);
-
-	for (i = 0; i < PDMA_NCHANNELS; i++) {
-		if (pending & (1 << i)) {
-			chan = &pdma_channels[i];
-			xchan = chan->xchan;
-			req = chan->req;
-
-			/* TODO: check for AR, HLT error bits here. */
-
-			/* Disable channel */
-			WRITE4(sc, PDMA_DCS(chan->index), 0);
-
-			if (chan->flags & CHAN_DESCR_RELINK) {
-				/* Enable again */
-				chan->cur_desc = (chan->cur_desc + 1) % \
-				    req->block_num;
-				chan_start(sc, chan);
-			}
-
-			status.error = 0;
-			xdma_callback(chan->xchan, &status);
-		}
-	}
-}
-
-static int
-pdma_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-dma"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 PDMA Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-pdma_attach(device_t dev)
-{
-	struct pdma_softc *sc;
-	phandle_t xref, node;
-	int err;
-	int reg;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, pdma_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	/* Memory interface */
-	sc->bst = rman_get_bustag(sc->res[0]);
-	sc->bsh = rman_get_bushandle(sc->res[0]);
-
-	/* Setup interrupt handler */
-	err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
-	    NULL, pdma_intr, sc, &sc->ih);
-	if (err) {
-		device_printf(dev, "Unable to alloc interrupt resource.\n");
-		return (ENXIO);
-	}
-
-	node = ofw_bus_get_node(dev);
-	xref = OF_xref_from_node(node);
-	OF_device_register_xref(xref, dev);
-
-	reg = READ4(sc, PDMA_DMAC);
-	reg &= ~(DMAC_HLT | DMAC_AR);
-	reg |= (DMAC_DMAE);
-	WRITE4(sc, PDMA_DMAC, reg);
-
-	WRITE4(sc, PDMA_DMACP, 0);
-
-	return (0);
-}
-
-static int
-pdma_detach(device_t dev)
-{
-	struct pdma_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	bus_release_resources(dev, pdma_spec, sc->res);
-
-	return (0);
-}
-
-static int
-chan_start(struct pdma_softc *sc, struct pdma_channel *chan)
-{
-	struct xdma_channel *xchan;
-
-	xchan = chan->xchan;
-
-	/* 8 byte descriptor. */
-	WRITE4(sc, PDMA_DCS(chan->index), DCS_DES8);
-	WRITE4(sc, PDMA_DDA(chan->index),
-	    chan->desc_ring_paddr + 8 * 4 * chan->cur_desc);
-
-	WRITE4(sc, PDMA_DDS, (1 << chan->index));
-
-	/* Channel transfer enable. */
-	WRITE4(sc, PDMA_DCS(chan->index), (DCS_DES8 | DCS_CTE));
-
-	return (0);
-}
-
-static int
-chan_stop(struct pdma_softc *sc, struct pdma_channel *chan)
-{
-	int timeout;
-
-	WRITE4(sc, PDMA_DCS(chan->index), 0);
-
-	timeout = 100;
-
-	do {
-		if ((READ4(sc, PDMA_DCS(chan->index)) & DCS_CTE) == 0) {
-			break;
-		}
-	} while (timeout--);
-
-	if (timeout == 0) {
-		device_printf(sc->dev, "%s: Can't stop channel %d\n",
-		    __func__, chan->index);
-	}
-
-	return (0);
-}
-
-static void
-dwc_get1paddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
-{
-
-	if (error != 0)
-		return;
-	*(bus_addr_t *)arg = segs[0].ds_addr;
-}
-
-static int
-pdma_channel_setup_descriptors(device_t dev, struct pdma_channel *chan)
-{
-	struct pdma_softc *sc;
-	int error;
-
-	sc = device_get_softc(dev);
-
-	/*
-	 * Set up TX descriptor ring, descriptors, and dma maps.
-	 */
-	error = bus_dma_tag_create(
-	    bus_get_dma_tag(sc->dev),	/* Parent tag. */
-	    PDMA_DESC_RING_ALIGN, 0,	/* alignment, boundary */
-	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
-	    BUS_SPACE_MAXADDR,		/* highaddr */
-	    NULL, NULL,			/* filter, filterarg */
-	    CHAN_DESC_SIZE, 1, 		/* maxsize, nsegments */
-	    CHAN_DESC_SIZE,		/* maxsegsize */
-	    0,				/* flags */
-	    NULL, NULL,			/* lockfunc, lockarg */
-	    &chan->desc_tag);
-	if (error != 0) {
-		device_printf(sc->dev,
-		    "could not create TX ring DMA tag.\n");
-		return (-1);
-	}
-
-	error = bus_dmamem_alloc(chan->desc_tag, (void**)&chan->desc_ring,
-	    BUS_DMA_COHERENT | BUS_DMA_WAITOK | BUS_DMA_ZERO,
-	    &chan->desc_map);
-	if (error != 0) {
-		device_printf(sc->dev,
-		    "could not allocate TX descriptor ring.\n");
-		return (-1);
-	}
-
-	error = bus_dmamap_load(chan->desc_tag, chan->desc_map,
-	    chan->desc_ring, CHAN_DESC_SIZE, dwc_get1paddr,
-	    &chan->desc_ring_paddr, 0);
-	if (error != 0) {
-		device_printf(sc->dev,
-		    "could not load TX descriptor ring map.\n");
-		return (-1);
-	}
-
-	return (0);
-}
-
-static int
-pdma_channel_alloc(device_t dev, struct xdma_channel *xchan)
-{
-	struct pdma_channel *chan;
-	struct pdma_softc *sc;
-	int i;
-
-	sc = device_get_softc(dev);
-
-	for (i = 0; i < PDMA_NCHANNELS; i++) {
-		chan = &pdma_channels[i];
-		if (chan->used == 0) {
-			chan->xchan = xchan;
-			xchan->chan = (void *)chan;
-			chan->used = 1;
-			chan->index = i;
-
-			pdma_channel_setup_descriptors(dev, chan);
-
-			return (0);
-		}
-	}
-
-	return (-1);
-}
-
-static int
-pdma_channel_free(device_t dev, struct xdma_channel *xchan)
-{
-	struct pdma_channel *chan;
-	struct pdma_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	chan = (struct pdma_channel *)xchan->chan;
-	chan->used = 0;
-
-	return (0);
-}
-
-static int
-access_width(struct xdma_request *req, uint32_t *dcm, uint32_t *max_width)
-{
-
-	*dcm = 0;
-	*max_width = max(req->src_width, req->dst_width);
-
-	switch (req->src_width) {
-	case 1:
-		*dcm |= DCM_SP_1;
-		break;
-	case 2:
-		*dcm |= DCM_SP_2;
-		break;
-	case 4:
-		*dcm |= DCM_SP_4;
-		break;
-	default:
-		return (-1);
-	}
-
-	switch (req->dst_width) {
-	case 1:
-		*dcm |= DCM_DP_1;
-		break;
-	case 2:
-		*dcm |= DCM_DP_2;
-		break;
-	case 4:
-		*dcm |= DCM_DP_4;
-		break;
-	default:
-		return (-1);
-	}
-
-	switch (*max_width) {
-	case 1:
-		*dcm |= DCM_TSZ_1;
-		break;
-	case 2:
-		*dcm |= DCM_TSZ_2;
-		break;
-	case 4:
-		*dcm |= DCM_TSZ_4;
-		break;
-	default:
-		return (-1);
-	};
-
-	return (0);
-}
-
-static int
-pdma_channel_request(device_t dev, struct xdma_channel *xchan, struct xdma_request *req)
-{
-	struct pdma_fdt_data *data;
-	struct pdma_channel *chan;
-	struct pdma_hwdesc *desc;
-	xdma_controller_t *xdma;
-	struct pdma_softc *sc;
-	int max_width;
-	uint32_t reg;
-	uint32_t dcm;
-	int i;
-
-	sc = device_get_softc(dev);
-
-	dprintf("%s: block_len %d block_num %d\n",
-	    __func__, req->block_len, req->block_num);
-
-	xdma = xchan->xdma;
-	data = (struct pdma_fdt_data *)xdma->data;
-
-	chan = (struct pdma_channel *)xchan->chan;
-	/* Ensure we are not in operation */
-	chan_stop(sc, chan);
-	if (req->operation == XDMA_CYCLIC)
-		chan->flags = CHAN_DESCR_RELINK;
-	chan->cur_desc = 0;
-	chan->req = req;
-
-	for (i = 0; i < req->block_num; i++) {
-		desc = &chan->desc_ring[i];
-
-		if (req->direction == XDMA_MEM_TO_DEV) {
-			desc->dsa = req->src_addr + (i * req->block_len);
-			desc->dta = req->dst_addr;
-			desc->drt = data->tx;
-			desc->dcm = DCM_SAI;
-		} else if (req->direction == XDMA_DEV_TO_MEM) {
-			desc->dsa = req->src_addr;
-			desc->dta = req->dst_addr + (i * req->block_len);
-			desc->drt = data->rx;
-			desc->dcm = DCM_DAI;
-		} else if (req->direction == XDMA_MEM_TO_MEM) {
-			desc->dsa = req->src_addr + (i * req->block_len);
-			desc->dta = req->dst_addr + (i * req->block_len);
-			desc->drt = DRT_AUTO;
-			desc->dcm = DCM_SAI | DCM_DAI;
-		}
-
-		if (access_width(req, &dcm, &max_width) != 0) {
-			device_printf(dev,
-			    "%s: can't configure access width\n", __func__);
-			return (-1);
-		}
-
-		desc->dcm |= dcm | DCM_TIE;
-		desc->dtc = (req->block_len / max_width);
-
-		/*
-		 * TODO: bus dma pre read/write sync here
-		 */
-
-		/*
-		 * PDMA does not provide interrupt after processing each descriptor,
-		 * but after processing all the chain only.
-		 * As a workaround we do unlink descriptors here, so our chain will
-		 * consists of single descriptor only. And then we reconfigure channel
-		 * on each interrupt again.
-		 */
-		if ((chan->flags & CHAN_DESCR_RELINK) == 0) {
-			if (i != (req->block_num - 1)) {
-				desc->dcm |= DCM_LINK;
-				reg = ((i + 1) * sizeof(struct pdma_hwdesc));
-				desc->dtc |= (reg >> 4) << 24;
-			}
-		}
-	}
-
-	return (0);
-}
-
-static int
-pdma_channel_control(device_t dev, xdma_channel_t *xchan, int cmd)
-{
-	struct pdma_channel *chan;
-	struct pdma_softc *sc;
-
-	sc = device_get_softc(dev);
-
-	chan = (struct pdma_channel *)xchan->chan;
-
-	switch (cmd) {
-	case XDMA_CMD_BEGIN:
-		chan_start(sc, chan);
-		break;
-	case XDMA_CMD_TERMINATE:
-		chan_stop(sc, chan);
-		break;
-	case XDMA_CMD_PAUSE:
-		/* TODO: implement me */
-		return (-1);
-	}
-
-	return (0);
-}
-
-#ifdef FDT
-static int
-pdma_ofw_md_data(device_t dev, pcell_t *cells, int ncells, void **ptr)
-{
-	struct pdma_fdt_data *data;
-
-	if (ncells != 3) {
-		return (-1);
-	}
-
-	data = malloc(sizeof(struct pdma_fdt_data), M_DEVBUF, (M_WAITOK | M_ZERO));
-	if (data == NULL) {
-		device_printf(dev, "%s: Cant allocate memory\n", __func__);
-		return (-1);
-	}
-
-	data->tx = cells[0];
-	data->rx = cells[1];
-	data->chan = cells[2];
-
-	*ptr = data;
-
-	return (0);
-}
-#endif
-
-static device_method_t pdma_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,			pdma_probe),
-	DEVMETHOD(device_attach,		pdma_attach),
-	DEVMETHOD(device_detach,		pdma_detach),
-
-	/* xDMA Interface */
-	DEVMETHOD(xdma_channel_alloc,		pdma_channel_alloc),
-	DEVMETHOD(xdma_channel_free,		pdma_channel_free),
-	DEVMETHOD(xdma_channel_request,		pdma_channel_request),
-	DEVMETHOD(xdma_channel_control,		pdma_channel_control),
-#ifdef FDT
-	DEVMETHOD(xdma_ofw_md_data,		pdma_ofw_md_data),
-#endif
-
-	DEVMETHOD_END
-};
-
-static driver_t pdma_driver = {
-	"pdma",
-	pdma_methods,
-	sizeof(struct pdma_softc),
-};
-
-static devclass_t pdma_devclass;
-
-EARLY_DRIVER_MODULE(pdma, simplebus, pdma_driver, pdma_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
diff --git a/sys/mips/ingenic/jz4780_pdma.h b/sys/mips/ingenic/jz4780_pdma.h
deleted file mode 100644
index e950077d09d7..000000000000
--- a/sys/mips/ingenic/jz4780_pdma.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/* DMA Channel Registers */
-#define	PDMA_DSA(n)	(0x00 + 0x20 * n)	/* Channel n Source Address */
-#define	PDMA_DTA(n)	(0x04 + 0x20 * n)	/* Channel n Target Address */
-#define	PDMA_DTC(n)	(0x08 + 0x20 * n)	/* Channel n Transfer Count */
-#define	PDMA_DRT(n)	(0x0C + 0x20 * n)	/* Channel n Request Source */
-#define	 DRT_AUTO	(1 << 3)		/* Auto-request. */
-#define	PDMA_DCS(n)	(0x10 + 0x20 * n)	/* Channel n Control/Status */
-#define	 DCS_NDES	(1 << 31)		/* Non-descriptor mode. */
-#define	 DCS_DES8	(1 << 30)		/* Descriptor 8 Word. */
-#define	 DCS_AR		(1 << 4)		/* Address Error. */
-#define	 DCS_TT		(1 << 3)		/* Transfer Terminate. */
-#define	 DCS_HLT	(1 << 2)		/* DMA halt. */
-#define	 DCS_CTE	(1 << 0)		/* Channel transfer enable. */
-#define	PDMA_DCM(n)	(0x14 + 0x20 * n)	/* Channel n Command */
-#define	 DCM_SAI	(1 << 23) /* Source Address Increment. */
-#define	 DCM_DAI	(1 << 22) /* Destination Address Increment. */
-#define	 DCM_SP_S	14 /* Source port width. */
-#define	 DCM_SP_M	(0x3 << DCM_SP_S)
-#define	 DCM_SP_1	(0x1 << DCM_SP_S) /* 1 byte */
-#define	 DCM_SP_2	(0x2 << DCM_SP_S) /* 2 bytes */
-#define	 DCM_SP_4	(0x0 << DCM_SP_S) /* 4 bytes */
-#define	 DCM_DP_S	12 /* Destination port width. */
-#define	 DCM_DP_M	(0x3 << DCM_DP_S)
-#define	 DCM_DP_1	(0x1 << DCM_DP_S) /* 1 byte */
-#define	 DCM_DP_2	(0x2 << DCM_DP_S) /* 2 bytes */
-#define	 DCM_DP_4	(0x0 << DCM_DP_S) /* 4 bytes */
-#define	 DCM_TSZ_S	8 /* Transfer Data Size of a data unit. */
-#define	 DCM_TSZ_M	(0x7 << DCM_TSZ_S)
-#define	 DCM_TSZ_A	(0x7 << DCM_TSZ_S) /* Autonomy */
-#define	 DCM_TSZ_1	(0x1 << DCM_TSZ_S)
-#define	 DCM_TSZ_2	(0x2 << DCM_TSZ_S)
-#define	 DCM_TSZ_4	(0x0 << DCM_TSZ_S)
-#define	 DCM_TSZ_16	(0x3 << DCM_TSZ_S)
-#define	 DCM_TSZ_32	(0x4 << DCM_TSZ_S)
-#define	 DCM_TSZ_64	(0x5 << DCM_TSZ_S)
-#define	 DCM_TSZ_128	(0x6 << DCM_TSZ_S)
-#define	 DCM_TIE	(1 << 1) /* Transfer Interrupt Enable (TIE). */
-#define	 DCM_LINK	(1 << 0) /* Descriptor Link Enable. */
-#define	PDMA_DDA(n)	(0x18 + 0x20 * n)	/* Channel n Descriptor Address */
-#define	PDMA_DSD(n)	(0x1C + 0x20 * n)	/* Channel n Stride Difference */
-
-/* Global Control Registers */
-#define	PDMA_DMAC	0x1000	/* DMA Control */
-#define	 DMAC_FMSC	(1 << 31)
-#define	 DMAC_INTCC_S	17
-#define	 DMAC_INTCC_M 	(0x1f << DMAC_INTCC_S)
-#define	 DMAC_INTCE	(1 << 16) /* Permit INTC_IRQ to be bound to one of programmable channel. */
-#define	 DMAC_HLT	(1 << 3) /* Global halt status */
-#define	 DMAC_AR	(1 << 2) /* Global address error status */
-#define	 DMAC_DMAE	(1 << 0) /* Enable DMA. */
-#define	PDMA_DIRQP	0x1004	/* DMA Interrupt Pending */
-#define	PDMA_DDB	0x1008	/* DMA Doorbell */
-#define	PDMA_DDS	0x100C	/* DMA Doorbell Set */
-#define	PDMA_DIP	0x1010	/* Descriptor Interrupt Pending */
-#define	PDMA_DIC	0x1014	/* Descriptor Interrupt Clear */
-#define	PDMA_DMACP	0x101C	/* DMA Channel Programmable */
-#define	PDMA_DSIRQP	0x1020	/* Channel soft IRQ to MCU */
-#define	PDMA_DSIRQM	0x1024	/* Channel soft IRQ mask */
-#define	PDMA_DCIRQP	0x1028	/* Channel IRQ to MCU */
-#define	PDMA_DCIRQM	0x102C	/* Channel IRQ to MCU mask */
-#define	PDMA_DMCS	0x1030	/* MCU Control and Status */
-#define	PDMA_DMNMB	0x1034	/* MCU Normal Mailbox */
-#define	PDMA_DMSMB	0x1038	/* MCU Security Mailbox */
-#define	PDMA_DMINT	0x103C	/* MCU Interrupt */
-
-struct pdma_hwdesc {
-	uint32_t dcm;		/* DMA Channel Command */
-	uint32_t dsa;		/* DMA Source Address */
-	uint32_t dta;		/* DMA Target Address */
-	uint32_t dtc;		/* DMA Transfer Counter */
-	uint32_t sd;		/* Stride Address */
-	uint32_t drt;		/* DMA Request Type */
-	uint32_t reserved[2];
-};
-
-#define	CHAN_DESC_COUNT	4096
-#define	CHAN_DESC_SIZE	(sizeof(struct pdma_hwdesc) * CHAN_DESC_COUNT)
diff --git a/sys/mips/ingenic/jz4780_pinctrl.c b/sys/mips/ingenic/jz4780_pinctrl.c
deleted file mode 100644
index 2aba95b6e864..000000000000
--- a/sys/mips/ingenic/jz4780_pinctrl.c
+++ /dev/null
@@ -1,259 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 pinctrl driver.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/gpio.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/queue.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/fdt/fdt_pinctrl.h>
-#include <dev/fdt/simplebus.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-#include "jz4780_gpio_if.h"
-
-struct jz4780_pinctrl_softc {
-	struct simplebus_softc          ssc;
-	device_t			dev;
-};
-
-#define CHIP_REG_STRIDE			256
-#define CHIP_REG_OFFSET(base, chip)	((base) + (chip) * CHIP_REG_STRIDE)
-
-static int
-jz4780_pinctrl_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-pinctrl"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 GPIO");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_pinctrl_attach(device_t dev)
-{
-	struct jz4780_pinctrl_softc *sc;
-	struct resource_list *rs;
-	struct resource_list_entry *re;
-	phandle_t dt_parent, dt_child;
-	int i, ret;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	/*
-	 * Fetch our own resource list to dole memory between children
-	 */
-	rs = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
-	if (rs == NULL)
-		return (ENXIO);
-	re = resource_list_find(rs, SYS_RES_MEMORY, 0);
-	if (re == NULL)
-		return (ENXIO);
-
-	simplebus_init(dev, 0);
-
-	/* Iterate over this node children, looking for pin controllers */
-	dt_parent = ofw_bus_get_node(dev);
-	i = 0;
-	for (dt_child = OF_child(dt_parent); dt_child != 0;
-	    dt_child = OF_peer(dt_child)) {
-		struct simplebus_devinfo *ndi;
-		device_t child;
-		bus_addr_t phys;
-		bus_size_t size;
-
-		/* Add gpio controller child */
-		if (!OF_hasprop(dt_child, "gpio-controller"))
-			continue;
-		child = simplebus_add_device(dev, dt_child, 0,  NULL, -1, NULL);
-		if (child == NULL)
-			break;
-		/* Setup child resources */
-		phys = CHIP_REG_OFFSET(re->start, i);
-		size = CHIP_REG_STRIDE;
-		if (phys + size - 1 <= re->end) {
-			ndi = device_get_ivars(child);
-			resource_list_add(&ndi->rl, SYS_RES_MEMORY, 0,
-			    phys, phys + size - 1, size);
-		}
-		i++;
-	}
-
-	ret = bus_generic_attach(dev);
-	if (ret == 0) {
-	    fdt_pinctrl_register(dev, "ingenic,pins");
-	    fdt_pinctrl_configure_tree(dev);
-	}
-	return (ret);
-}
-
-static int
-jz4780_pinctrl_detach(device_t dev)
-{
-
-	bus_generic_detach(dev);
-	return (0);
-}
-
-struct jx4780_bias_prop {
-	const char *name;
-	uint32_t    bias;
-};
-
-static struct jx4780_bias_prop jx4780_bias_table[] = {
-	{ "bias-disable", 0 },
-	{ "bias-pull-up", GPIO_PIN_PULLUP },
-	{ "bias-pull-down", GPIO_PIN_PULLDOWN },
-};
-
-static int
-jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref, uint32_t *bias_value)
-{
-	phandle_t pincfg_node;
-	int i;
-
-	pincfg_node = OF_node_from_xref(pincfgxref);
-	for (i = 0; i < nitems(jx4780_bias_table); i++) {
-		if (OF_hasprop(pincfg_node, jx4780_bias_table[i].name)) {
-			*bias_value = jx4780_bias_table[i].bias;
-			return 0;
-		}
-	}
-
-	return -1;
-}
-
-static device_t
-jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc *sc, phandle_t chipxref)
-{
-	device_t chipdev;
-
-	chipdev = OF_device_from_xref(chipxref);
-	return chipdev;
-}
-
-static int
-jz4780_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
-{
-	struct jz4780_pinctrl_softc *sc = device_get_softc(dev);
-	device_t  chip;
-	phandle_t node;
-	ssize_t i, len;
-	uint32_t *value, *pconf;
-	int result;
-
-	node = OF_node_from_xref(cfgxref);
-
-	len = OF_getencprop_alloc_multi(node, "ingenic,pins",
-	    sizeof(uint32_t) * 4, (void **)&value);
-	if (len < 0) {
-		device_printf(dev,
-		    "missing ingenic,pins attribute in FDT\n");
-		return (ENXIO);
-	}
-
-	pconf = value;
-	result = EINVAL;
-	for (i = 0; i < len; i++, pconf += 4) {
-		uint32_t bias;
-
-		/* Lookup the chip that handles this configuration */
-		chip = jz4780_pinctrl_chip_lookup(sc, pconf[0]);
-		if (chip == NULL) {
-			device_printf(dev,
-			    "invalid gpio controller reference in FDT\n");
-			goto done;
-		}
-
-		if (jz4780_pinctrl_parse_pincfg(pconf[3], &bias) != 0) {
-			device_printf(dev,
-			    "invalid pin bias for pin %u on %s in FDT\n",
-			    pconf[1], ofw_bus_get_name(chip));
-			goto done;
-		}
-
-		result = JZ4780_GPIO_CONFIGURE_PIN(chip, pconf[1], pconf[2],
-		    bias);
-		if (result != 0) {
-			device_printf(dev,
-			    "failed to configure pin %u on %s\n", pconf[1],
-			    ofw_bus_get_name(chip));
-			goto done;
-		}
-	}
-
-	result = 0;
-done:
-	free(value, M_OFWPROP);
-	return (result);
-}
-
-static device_method_t jz4780_pinctrl_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_pinctrl_probe),
-	DEVMETHOD(device_attach,	jz4780_pinctrl_attach),
-	DEVMETHOD(device_detach,	jz4780_pinctrl_detach),
-
-	/* fdt_pinctrl interface */
-	DEVMETHOD(fdt_pinctrl_configure, jz4780_pinctrl_configure_pins),
-
-	DEVMETHOD_END
-};
-
-static devclass_t jz4780_pinctrl_devclass;
-DEFINE_CLASS_1(pinctrl, jz4780_pinctrl_driver, jz4780_pinctrl_methods,
-            sizeof(struct jz4780_pinctrl_softc), simplebus_driver);
-EARLY_DRIVER_MODULE(pinctrl, simplebus, jz4780_pinctrl_driver,
-    jz4780_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
diff --git a/sys/mips/ingenic/jz4780_pinctrl.h b/sys/mips/ingenic/jz4780_pinctrl.h
deleted file mode 100644
index b13f07e8bc1a..000000000000
--- a/sys/mips/ingenic/jz4780_pinctrl.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*-
- * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_MIPS_INGENIC_JZ4780_PINCTRL_H
-#define	_MIPS_INGENIC_JZ4780_PINCTRL_H
-
-#endif /* _MIPS_INGENIC_JZ4780_PINCTRL_H */
diff --git a/sys/mips/ingenic/jz4780_regs.h b/sys/mips/ingenic/jz4780_regs.h
deleted file mode 100644
index c46045ae0e18..000000000000
--- a/sys/mips/ingenic/jz4780_regs.h
+++ /dev/null
@@ -1,787 +0,0 @@
-/*	$NetBSD: ingenic_regs.h,v 1.22 2015/10/08 17:54:30 macallan Exp $ */
-
-/*-
- * Copyright (c) 2014 Michael Lorenz
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef JZ4780_REGS_H
-#define JZ4780_REGS_H
-
-/* for mips_wbflush() */
-#include <machine/locore.h>
-
-/* UARTs, mostly 16550 compatible with 32bit spaced registers */
-#define JZ_UART0 0x10030000
-#define JZ_UART1 0x10031000
-#define JZ_UART2 0x10032000
-#define JZ_UART3 0x10033000
-#define JZ_UART4 0x10034000
-
-/* LCD controller base addresses, registers are in jzfb_regs.h */
-#define JZ_LCDC0_BASE 0x13050000
-#define JZ_LCDC1_BASE 0x130a0000
-
-/* TCU unit base address */
-#define JZ_TCU_BASE	0x10002000
-
-/* Watchdog */
-#define JZ_WDOG_TDR	0x00000000	/* compare */
-#define JZ_WDOG_TCER	0x00000004
-	#define TCER_ENABLE	0x01	/* enable counter */
-#define JZ_WDOG_TCNT	0x00000008	/* 16bit up count */
-#define JZ_WDOG_TCSR	0x0000000c
-	#define TCSR_PCK_EN	0x01	/* PCLK */
-	#define TCSR_RTC_EN	0x02	/* RTCCLK - 32.768kHz */
-	#define TCSR_EXT_EN	0x04	/* EXTCLK - 48MHz */
-	#define TCSR_PRESCALE_M	0x38
-	#define TCSR_DIV_1	0x00
-	#define TCSR_DIV_4	0x08
-	#define TCSR_DIV_16	0x10
-	#define TCSR_DIV_64	0x18
-	#define TCSR_DIV_256	0x20
-	#define TCSR_DIV_1024	0x28
-
-/* timers and PWMs */
-#define JZ_TC_TER	0x00000010	/* TC enable reg, ro */
-#define JZ_TC_TESR	0x00000014	/* TC enable set reg. */
-	#define TESR_TCST0	0x0001	/* enable counter 0 */
-	#define TESR_TCST1	0x0002	/* enable counter 1 */
-	#define TESR_TCST2	0x0004	/* enable counter 2 */
-	#define TESR_TCST3	0x0008	/* enable counter 3 */
-	#define TESR_TCST4	0x0010	/* enable counter 4 */
-	#define TESR_TCST5	0x0020	/* enable counter 5 */
-	#define TESR_TCST6	0x0040	/* enable counter 6 */
-	#define TESR_TCST7	0x0080	/* enable counter 7 */
-	#define TESR_OST	0x8000	/* enable OST */
-#define JZ_TC_TECR	0x00000018	/* TC enable clear reg. */
-#define JZ_TC_TFR	0x00000020
-	#define TFR_FFLAG0	0x00000001	/* channel 0 */
-	#define TFR_FFLAG1	0x00000002	/* channel 1 */
-	#define TFR_FFLAG2	0x00000004	/* channel 2 */
-	#define TFR_FFLAG3	0x00000008	/* channel 3 */
-	#define TFR_FFLAG4	0x00000010	/* channel 4 */
-	#define TFR_FFLAG5	0x00000020	/* channel 5 */
-	#define TFR_FFLAG6	0x00000040	/* channel 6 */
-	#define TFR_FFLAG7	0x00000080	/* channel 7 */
-	#define TFR_OSTFLAG	0x00008000	/* OS timer */
-#define JZ_TC_TFSR	0x00000024	/* timer flag set */
-#define JZ_TC_TFCR	0x00000028	/* timer flag clear */
-#define JZ_TC_TMR	0x00000030	/* timer flag mask */
-	#define TMR_FMASK(n)	(1 << (n))
-	#define TMR_HMASK(n)	(1 << ((n) + 16))
-#define JZ_TC_TMSR	0x00000034	/* timer flag mask set */
-#define JZ_TC_TMCR	0x00000038	/* timer flag mask clear*/
-
-#define JZ_TC_TDFR(n)	(0x00000040 + (n * 0x10))	/* FULL compare */
-#define JZ_TC_TDHR(n)	(0x00000044 + (n * 0x10))	/* HALF compare */
-#define JZ_TC_TCNT(n)	(0x00000048 + (n * 0x10))	/* count */
-
-#define JZ_TC_TCSR(n)	(0x0000004c + (n * 0x10))
-/* same bits as in JZ_WDOG_TCSR	*/
-
-/* operating system timer */
-#define JZ_OST_DATA	0x000000e0	/* compare */
-#define JZ_OST_CNT_LO	0x000000e4
-#define JZ_OST_CNT_HI	0x000000e8
-#define JZ_OST_CTRL	0x000000ec
-	#define OSTC_PCK_EN	0x0001	/* use PCLK */
-	#define OSTC_RTC_EN	0x0002	/* use RTCCLK */
-	#define OSTC_EXT_EN	0x0004	/* use EXTCLK */
-	#define OSTC_PRESCALE_M	0x0038
-	#define OSTC_DIV_1	0x0000
-	#define OSTC_DIV_4	0x0008
-	#define OSTC_DIV_16	0x0010
-	#define OSTC_DIV_64	0x0018
-	#define OSTC_DIV_256	0x0020
-	#define OSTC_DIV_1024	0x0028
-	#define OSTC_SHUTDOWN	0x0200
-	#define OSTC_MODE	0x8000	/* 0 - reset to 0 when = OST_DATA */
-#define JZ_OST_CNT_U32	0x000000fc	/* copy of CNT_HI when reading CNT_LO */
-
-static inline void
-writereg(uint32_t reg, uint32_t val)
-{
-	*(volatile int32_t *)MIPS_PHYS_TO_KSEG1(reg) = val;
-	mips_wbflush();
-}
-
-static inline uint32_t
-readreg(uint32_t reg)
-{
-	mips_wbflush();
-	return *(volatile int32_t *)MIPS_PHYS_TO_KSEG1(reg);
-}
-
-/* Clock management */
-#define JZ_CGU_BASE	0x10000000
-
-#define JZ_CPCCR	0x00000000	/* Clock Control Register */
-	#define JZ_PDIV_M	0x000f0000	/* PCLK divider mask */
-	#define JZ_PDIV_S	16		/* PCLK divider shift */
-	#define JZ_CDIV_M	0x0000000f	/* CPU clock divider mask */
-	#define JZ_CDIV_S	0		/* CPU clock divider shift */
-#define JZ_CPAPCR	0x00000010	/* APLL */
-#define JZ_CPMPCR	0x00000014	/* MPLL */
-#define JZ_CPEPCR	0x00000018	/* EPLL */
-#define JZ_CPVPCR	0x0000001C	/* VPLL */
-	#define JZ_PLLM_S	19		/* PLL multiplier shift */
-	#define JZ_PLLM_M	0xfff80000	/* PLL multiplier mask */
-	#define JZ_PLLN_S	13		/* PLL divider shift */
-	#define JZ_PLLN_M	0x0007e000	/* PLL divider mask */
-	#define JZ_PLLP_S	9		/* PLL postdivider shift */
-	#define JZ_PLLP_M	0x00001700	/* PLL postdivider mask */
-	#define JZ_PLLON	0x00000010	/* PLL is on and stable */
-	#define JZ_PLLBP	0x00000002	/* PLL bypass */
-	#define JZ_PLLEN	0x00000001	/* PLL enable */
-#define JZ_CLKGR0	0x00000020	/* Clock Gating Registers */
-	#define CLK_NEMC	(1 << 0)
-	#define CLK_BCH		(1 << 1)
-	#define CLK_OTG0	(1 << 2)
-	#define CLK_MSC0	(1 << 3)
-	#define CLK_SSI0	(1 << 4)
-	#define CLK_SMB0	(1 << 5)
-	#define CLK_SMB1	(1 << 6)
-	#define CLK_SCC		(1 << 7)
-	#define CLK_AIC		(1 << 8)
-	#define CLK_TSSI0	(1 << 9)
-	#define CLK_OWI		(1 << 10)
-	#define CLK_MSC1	(1 << 11)
-	#define CLK_MSC2	(1 << 12)
-	#define CLK_KBC		(1 << 13)
-	#define CLK_SADC	(1 << 14)
-	#define CLK_UART0	(1 << 15)
-	#define CLK_UART1	(1 << 16)
-	#define CLK_UART2	(1 << 17)
-	#define CLK_UART3	(1 << 18)
-	#define CLK_SSI1	(1 << 19)
-	#define CLK_SSI2	(1 << 20)
-	#define CLK_PDMA	(1 << 21)
-	#define CLK_GPS		(1 << 22)
-	#define CLK_MAC		(1 << 23)
-	#define CLK_UHC		(1 << 24)
-	#define CLK_SMB2	(1 << 25)
-	#define CLK_CIM		(1 << 26)
-	#define CLK_TVE		(1 << 27)
-	#define CLK_LCD		(1 << 28)
-	#define CLK_IPU		(1 << 29)
-	#define CLK_DDR0	(1 << 30)
-	#define CLK_DDR1	(1 << 31)
-#define JZ_CLKGR1	0x00000028	/* Clock Gating Registers */
-	#define CLK_SMB3	(1 << 0)
-	#define CLK_TSSI1	(1 << 1)
-	#define CLK_VPU		(1 << 2)
-	#define CLK_PCM		(1 << 3)
-	#define CLK_GPU		(1 << 4)
-	#define CLK_COMPRESS	(1 << 5)
-	#define CLK_AIC1	(1 << 6)
-	#define CLK_GPVLC	(1 << 7)
-	#define CLK_OTG1	(1 << 8)
-	#define CLK_HDMI	(1 << 9)
-	#define CLK_UART4	(1 << 10)
-	#define CLK_AHB_MON	(1 << 11)
-	#define CLK_SMB4	(1 << 12)
-	#define CLK_DES		(1 << 13)
-	#define CLK_X2D		(1 << 14)
-	#define CLK_P1		(1 << 15)
-#define JZ_DDCDR	0x0000002c	/* DDR clock divider register */
-#define JZ_VPUCDR	0x00000030	/* VPU clock divider register */
-#define JZ_I2SCDR	0x00000060	/* I2S device clock divider register */
-#define JZ_I2S1CDR	0x000000a0	/* I2S device clock divider register */
-#define JZ_USBCDR	0x00000050	/* OTG PHY clock divider register */
-#define JZ_LP0CDR	0x00000054	/* LCD0 pix clock divider register */
-#define JZ_LP1CDR	0x00000064	/* LCD1 pix clock divider register */
-#define JZ_MSC0CDR	0x00000068	/* MSC0 clock divider register */
-#define JZ_MSC1CDR	0x000000a4	/* MSC1 clock divider register */
-#define JZ_MSC2CDR	0x000000a8	/* MSC2 clock divider register */
-	#define MSCCDR_SCLK_A	0x40000000
-	#define MSCCDR_MPLL	0x80000000
-	#define MSCCDR_CE	0x20000000
-	#define MSCCDR_BUSY	0x10000000
-	#define MSCCDR_STOP	0x08000000
-	#define MSCCDR_PHASE	0x00008000	/* 0 - 90deg phase, 1 - 180 */
-	#define MSCCDR_DIV_M	0x000000ff	/* src / ((div + 1) * 2) */
-	#define UHCCDR_DIV_M	0x000000ff
-#define JZ_UHCCDR	0x0000006c	/* UHC 48M clock divider register */
-	#define UHCCDR_SCLK_A	0x00000000
-	#define UHCCDR_MPLL	0x40000000
-	#define UHCCDR_EPLL	0x80000000
-	#define UHCCDR_OTG_PHY	0xc0000000
-	#define UHCCDR_CLK_MASK	0xc0000000
-	#define UHCCDR_CE	0x20000000
-	#define UHCCDR_BUSY	0x10000000
-	#define UHCCDR_STOP	0x08000000
-	#define UHCCDR_DIV_M	0x000000ff
-	#define UHCCDR_DIV(d)	(d)
-#define JZ_SSICDR	0x00000074	/* SSI clock divider register */
-#define JZ_CIMCDR	0x0000007c	/* CIM MCLK clock divider register */
-#define JZ_PCMCDR	0x00000084	/* PCM device clock divider register */
-#define JZ_GPUCDR	0x00000088	/* GPU clock divider register */
-#define JZ_HDMICDR	0x0000008c	/* HDMI clock divider register */
-#define JZ_BCHCDR	0x000000ac	/* BCH clock divider register */
-#define JZ_CPM_INTR	0x000000b0	/* CPM interrupt register */
-#define JZ_CPM_INTRE	0x000000b4	/* CPM interrupt enable register */
-#define JZ_CPSPR	0x00000034	/* CPM scratch register */
-#define JZ_CPSRPR	0x00000038	/* CPM scratch protected register */
-#define JZ_USBPCR	0x0000003c	/* USB parameter control register */
-	#define PCR_USB_MODE		0x80000000	/* 1 - otg */
-	#define PCR_AVLD_REG		0x40000000
-	#define PCR_IDPULLUP_MASK	0x30000000
-	#define PCR_INCR_MASK		0x08000000
-	#define PCR_TCRISETUNE		0x04000000
-	#define PCR_COMMONONN		0x02000000
-	#define PCR_VBUSVLDEXT		0x01000000
-	#define PCR_VBUSVLDEXTSEL	0x00800000
-	#define PCR_POR			0x00400000
-	#define PCR_SIDDQ		0x00200000
-	#define PCR_OTG_DISABLE		0x00100000
-	#define PCR_COMPDISTN_M		0x000e0000
-	#define PCR_OTGTUNE		0x0001c000
-	#define PCR_SQRXTUNE		0x00003800
-	#define PCR_TXFSLSTUNE		0x00000780
-	#define PCR_TXPREEMPHTUNE	0x00000040
-	#define PCR_TXHSXVTUNE		0x00000030
-	#define PCR_TXVREFTUNE		0x0000000f
-#define JZ_USBRDT	0x00000040	/* Reset detect timer register */
-	#define USBRDT_USBRDT_SHIFT	0
-	#define USBRDT_USBRDT_WIDTH	23
-	#define USBRDT_VBFIL_LD_EN	0x01000000
-#define JZ_USBVBFIL	0x00000044	/* USB jitter filter register */
-	#define USBVBFIL_IDDIGFIL_SHIFT 16
-	#define USBVBFIL_IDDIGFIL_WIDTH 16
-	#define USBVBFIL_USBVBFIL_SHIFT 0
-	#define USBVBFIL_USBVBFIL_WIDTH 16
-#define JZ_USBPCR1	0x00000048	/* USB parameter control register 1 */
-	#define PCR_SYNOPSYS	0x10000000	/* Mentor mode otherwise */
-	#define PCR_REFCLK_CORE	0x08000000
-	#define PCR_REFCLK_XO25	0x04000000
-	#define PCR_REFCLK_CO	0x00000000
-	#define PCR_REFCLK_M	0x0c000000
-	#define PCR_CLK_M	0x03000000	/* clock */
-	#define PCR_CLK_192	0x03000000	/* 19.2MHz */
-	#define PCR_CLK_48	0x02000000	/* 48MHz */
-	#define PCR_CLK_24	0x01000000	/* 24MHz */
-	#define PCR_CLK_12	0x00000000	/* 12MHz */
-	#define PCR_DMPD1	0x00800000	/* pull down D- on port 1 */
-	#define PCR_DPPD1	0x00400000	/* pull down D+ on port 1 */
-	#define PCR_PORT0_RST	0x00200000	/* port 0 reset */
-	#define PCR_PORT1_RST	0x00100000	/* port 1 reset */
-	#define PCR_WORD_I_F0	0x00080000	/* 1: 16bit/30M, 8/60 otherw. */
-	#define PCR_WORD_I_F1	0x00040000	/* same for port 1 */
-	#define PCR_COMPDISTUNE	0x00038000	/* disconnect threshold */
-	#define PCR_SQRXTUNE1	0x00007000	/* squelch threshold */
-	#define PCR_TXFSLSTUNE1	0x00000f00	/* FS/LS impedance adj. */
-	#define PCR_TXPREEMPH	0x00000080	/* HS transm. pre-emphasis */
-	#define PCR_TXHSXVTUNE1	0x00000060	/* dp/dm voltage adj. */
-	#define PCR_TXVREFTUNE1	0x00000017	/* HS DC voltage adj. */
-	#define PCR_TXRISETUNE1	0x00000001	/* rise/fall wave adj. */
-
-/* power manager */
-#define JZ_LPCR		0x00000004
-	#define LPCR_PD_SCPU	(1u << 31)	/* CPU1 power down */
-	#define LPCR_PD_VPU	(1u << 30)	/* VPU power down */
-	#define LPCR_PD_GPU	(1u << 29)	/* GPU power down */
-	#define LPCR_PD_GPS	(1u << 28)	/* GPS power down */
-	#define LPCR_SCPUS	(1u << 27)	/* CPU1 power down status */
-	#define LPCR_VPUS	(1u << 26)	/* VPU power down status */
-	#define LPCR_GPUS	(1u << 25)	/* GPU power down status */
-	#define LPCR_GPSS	(1u << 24)	/* GPS power down status */
-	#define LPCR_GPU_IDLE	(1u << 20)	/* GPU idle status */
-	#define LPCR_PST_SHIFT	8		/* Power stability time */
-	#define LPCR_PST_MASK	(0xFFFu << 8)
-	#define LPCR_DUTY_SHIFT	3		/* CPU clock duty */
-	#define LPCR_DUTY_MASK	(0x1Fu << 3)
-	#define LPCR_DOZE	(1u << 2)	/* Doze mode */
-	#define LPCR_LPM_SHIFT	0		/* Low power mode */
-	#define LPCR_LPM_MASK	(0x03u << 0)
-
-#define JZ_OPCR		0x00000024	/* Oscillator Power Control Reg. */
-	#define OPCR_IDLE_DIS	0x80000000	/* don't stop CPU clk on idle */
-	#define OPCR_GPU_CLK_ST	0x40000000	/* stop GPU clock */
-	#define OPCR_L2CM_M	0x0c000000
-	#define OPCR_L2CM_ON	0x00000000	/* L2 stays on in sleep */
-	#define OPCR_L2CM_RET	0x04000000	/* L2 retention mode in sleep */
-	#define OPCR_L2CM_OFF	0x08000000	/* L2 powers down in sleep */
-	#define OPCR_SPENDN0	0x00000080	/* 0 - OTG port forced down */
-	#define OPCR_SPENDN1	0x00000040	/* 0 - UHC port forced down */
-	#define OPCR_BUS_MODE	0x00000020	/* 1 - bursts */
-	#define OPCR_O1SE	0x00000010	/* EXTCLK on in sleep */
-	#define OPCR_PD		0x00000008	/* P0 down in sleep */
-	#define OPCR_ERCS	0x00000004	/* 1 RTCCLK, 0 EXTCLK/512 */
-	#define OPCR_CPU_MODE	0x00000002	/* 1 access 'accelerated' */
-	#define OPCR_OSE	0x00000001	/* disable EXTCLK */
-
-#define JZ_SPCR0	0x000000b8	/* SRAM Power Control Registers */
-#define JZ_SPCR1	0x000000bc
-#define JZ_SRBC		0x000000c4	/* Soft Reset & Bus Control */
-	#define SRBC_UHC_SR	0x00004000	/* UHC soft reset*/
-
-/*
- * random number generator
- *
- * Its function currently isn't documented by Ingenic.
- * However, testing suggests that it works as expected.
- */
-#define JZ_ERNG	0x000000d8
-#define JZ_RNG	0x000000dc
-
-/* Interrupt controller */
-#define JZ_ICBASE	0x10001000	/* IC base address */
-#define JZ_ICSR0	0x00000000	/* raw IRQ line status */
-#define JZ_ICMR0	0x00000004	/* IRQ mask, 1 masks IRQ */
-#define JZ_ICMSR0	0x00000008	/* sets bits in mask register */
-#define JZ_ICMCR0	0x0000000c	/* clears bits in mask register */
-#define JZ_ICPR0	0x00000010	/* line status after masking */
-
-#define JZ_ICSR1	0x00000020	/* raw IRQ line status */
-#define JZ_ICMR1	0x00000024	/* IRQ mask, 1 masks IRQ */
-#define JZ_ICMSR1	0x00000028	/* sets bits in mask register */
-#define JZ_ICMCR1	0x0000002c	/* clears bits in maks register */
-#define JZ_ICPR1	0x00000030	/* line status after masking */
-
-#define JZ_DSR0		0x00000034	/* source for PDMA */
-#define JZ_DMR0		0x00000038	/* mask for PDMA */
-#define JZ_DPR0		0x0000003c	/* pending for PDMA */
-
-#define JZ_DSR1		0x00000040	/* source for PDMA */
-#define JZ_DMR1		0x00000044	/* mask for PDMA */
-#define JZ_DPR1		0x00000048	/* pending for PDMA */
-
-/* memory controller */
-#define JZ_DMMAP0	0x13010024
-#define JZ_DMMAP1	0x13010028
-	#define	DMMAP_BASE	0x0000ff00	/* base PADDR of memory chunk */
-	#define DMMAP_MASK	0x000000ff	/* mask which bits of PADDR are
-						 * constant */
-/* USB controllers */
-#define JZ_EHCI_BASE	0x13490000
-#define JZ_EHCI_REG_UTMI_BUS 0x000000b0
-	#define UTMI_BUS_WIDTH	0x00000040
-#define JZ_OHCI_BASE	0x134a0000
-
-#define JZ_DWC2_BASE	0x13500000
-#define JZ_DWC2_GUSBCFG  0
-
-/* Ethernet */
-#define JZ_DME_BASE	0x16000000
-#define JZ_DME_IO	0
-#define JZ_DME_DATA	2
-
-/* GPIO */
-#define JZ_GPIO_A_BASE	0x10010000
-#define JZ_GPIO_B_BASE	0x10010100
-#define JZ_GPIO_C_BASE	0x10010200
-#define JZ_GPIO_D_BASE	0x10010300
-#define JZ_GPIO_E_BASE	0x10010400
-#define JZ_GPIO_F_BASE	0x10010500
-
-/* GPIO registers per port */
-#define JZ_GPIO_PIN	0x00000000	/* pin level register */
-/* 0 - normal gpio, 1 - interrupt */
-#define JZ_GPIO_INT	0x00000010	/* interrupt register */
-#define JZ_GPIO_INTS	0x00000014	/* interrupt set register */
-#define JZ_GPIO_INTC	0x00000018	/* interrupt clear register */
-/*
- * INT == 1: 1 disables interrupt
- * INT == 0: device select, see below
- */
-#define JZ_GPIO_MASK	0x00000020	/* port mask register */
-#define JZ_GPIO_MASKS	0x00000024	/* port mask set register */
-#define JZ_GPIO_MASKC	0x00000028	/* port mask clear register */
-/*
- * INT == 1: 0 - level triggered, 1 - edge triggered
- * INT == 0: 0 - device select, see below
- */
-#define JZ_GPIO_PAT1	0x00000030	/* pattern 1 register */
-#define JZ_GPIO_PAT1S	0x00000034	/* pattern 1 set register */
-#define JZ_GPIO_PAT1C	0x00000038	/* pattern 1 clear register */
-/*
- * INT == 1:
- *   PAT1 == 0: 0 - trigger on low, 1 - trigger on high
- *   PAT0 == 1: 0 - trigger on falling edge, 1 - trigger on rising edge
- * INT == 0:
- *   MASK == 0:
- *     PAT1 == 0: 0 - device 0, 1 - device 1
- *     PAT0 == 1: 0 - device 2, 1 - device 3
- *   MASK == 1:
- *     PAT1 == 0: set gpio output
- *     PAT1 == 1: pin is input
- */
-#define JZ_GPIO_PAT0	0x00000040	/* pattern 0 register */
-#define JZ_GPIO_PAT0S	0x00000044	/* pattern 0 set register */
-#define JZ_GPIO_PAT0C	0x00000048	/* pattern 0 clear register */
-/* 1 - interrupt happened */
-#define JZ_GPIO_FLAG	0x00000050	/* flag register */
-#define JZ_GPIO_FLAGC	0x00000058	/* flag clear register */
-/* 1 - disable pull up/down resistors */
-#define JZ_GPIO_DPULL	0x00000070	/* pull disable register */
-#define JZ_GPIO_DPULLS	0x00000074	/* pull disable set register */
-#define JZ_GPIO_DPULLC	0x00000078	/* pull disable clear register */
-/* the following are uncommented in the manual */
-#define JZ_GPIO_DRVL	0x00000080	/* drive low register */
-#define JZ_GPIO_DRVLS	0x00000084	/* drive low set register */
-#define JZ_GPIO_DRVLC	0x00000088	/* drive low clear register */
-#define JZ_GPIO_DIR	0x00000090	/* direction register */
-#define JZ_GPIO_DIRS	0x00000094	/* direction register */
-#define JZ_GPIO_DIRC	0x00000098	/* direction register */
-#define JZ_GPIO_DRVH	0x000000a0	/* drive high register */
-#define JZ_GPIO_DRVHS	0x000000a4	/* drive high set register */
-#define JZ_GPIO_DRVHC	0x000000a8	/* drive high clear register */
-
-/* I2C / SMBus */
-#define JZ_SMB0_BASE	0x10050000
-#define JZ_SMB1_BASE	0x10051000
-#define JZ_SMB2_BASE	0x10052000
-#define JZ_SMB3_BASE	0x10053000
-#define JZ_SMB4_BASE	0x10054000
-
-/* SMBus register offsets, per port */
-#define JZ_SMBCON	0x00 /* SMB control */
-	#define JZ_STPHLD	0x80 /* Stop Hold Enable bit */
-	#define JZ_SLVDIS	0x40 /* 1 - slave disabled */
-	#define JZ_REST		0x20 /* 1 - allow RESTART */
-	#define JZ_MATP		0x10 /* 1 - enable 10bit addr. for master */
-	#define JZ_SATP		0x08 /* 1 - enable 10bit addr. for slave */
-	#define JZ_SPD_M	0x06 /* bus speed control */
-	#define JZ_SPD_100KB	0x02 /* 100kBit/s mode */
-	#define JZ_SPD_400KB	0x04 /* 400kBit/s mode */
-	#define JZ_MD		0x01 /* enable master */
-#define JZ_SMBTAR	0x04 /* SMB target address */
-	#define JZ_SMATP	0x1000 /* enable 10bit master addr */
-	#define JZ_SPECIAL	0x0800 /* 1 - special command */
-	#define JZ_START	0x0400 /* 1 - send START */
-	#define JZ_SMBTAR_M	0x03ff /* target address */
-#define JZ_SMBSAR	0x08 /* SMB slave address */
-#define JZ_SMBDC	0x10 /* SMB data buffer and command */
-	#define JZ_CMD	0x100 /* 1 - read, 0 - write */
-	#define JZ_DATA	0x0ff
-#define JZ_SMBSHCNT	0x14 /* Standard speed SMB SCL high count */
-#define JZ_SMBSLCNT	0x18 /* Standard speed SMB SCL low count */
-#define JZ_SMBFHCNT	0x1C /* Fast speed SMB SCL high count */
-#define JZ_SMBFLCNT	0x20 /* Fast speed SMB SCL low count */
-#define JZ_SMBINTST	0x2C /* SMB Interrupt Status */
-	#define JZ_ISTT		0x400	/* START or RESTART occurred */
-	#define JZ_ISTP		0x200	/* STOP occurred */
-	#define JZ_TXABT	0x40	/* ABORT occurred */
-	#define JZ_TXEMP	0x10	/* TX FIFO is low */
-	#define JZ_TXOF		0x08	/* TX FIFO is high */
-	#define JZ_RXFL		0x04	/* RX FIFO is at  JZ_SMBRXTL*/
-	#define JZ_RXOF		0x02	/* RX FIFO is high */
-	#define JZ_RXUF		0x01	/* RX FIFO underflow */
-#define JZ_SMBINTM	0x30 /* SMB Interrupt Mask */
-#define JZ_SMBRXTL	0x38 /* SMB RxFIFO Threshold */
-#define JZ_SMBTXTL	0x3C /* SMB TxFIFO Threshold */
-#define JZ_SMBCINT	0x40 /* Clear Interrupts */
-	#define JZ_CLEARALL	0x01
-#define JZ_SMBCRXUF	0x44 /* Clear RXUF Interrupt */
-#define JZ_SMBCRXOF	0x48 /* Clear RX_OVER Interrupt */
-#define JZ_SMBCTXOF	0x4C /* Clear TX_OVER Interrupt */
-#define JZ_SMBCRXREQ	0x50 /* Clear RDREQ Interrupt */
-#define JZ_SMBCTXABT	0x54 /* Clear TX_ABRT Interrupt */
-#define JZ_SMBCRXDN	0x58 /* Clear RX_DONE Interrupt */
-#define JZ_SMBCACT	0x5c /* Clear ACTIVITY Interrupt */
-#define JZ_SMBCSTP	0x60 /* Clear STOP Interrupt */
-#define JZ_SMBCSTT	0x64 /* Clear START Interrupt */
-#define JZ_SMBCGC	0x68 /* Clear GEN_CALL Interrupt */
-#define JZ_SMBENB	0x6C /* SMB Enable */
-	#define JZ_ENABLE	0x01
-#define JZ_SMBST	0x70 /* SMB Status register */
-	#define JZ_SLVACT	0x40 /* slave is active */
-	#define JZ_MSTACT	0x20 /* master is active */
-	#define JZ_RFF		0x10 /* RX FIFO is full */
-	#define JZ_RFNE		0x08 /* RX FIFO not empty */
-	#define JZ_TFE		0x04 /* TX FIFO is empty */
-	#define JZ_TFNF		0x02 /* TX FIFO is not full */
-	#define JZ_ACT		0x01 /* JZ_SLVACT | JZ_MSTACT */
-#define JZ_SMBABTSRC	0x80 /* SMB Transmit Abort Status Register */
-#define JZ_SMBDMACR	0x88 /* DMA Control Register */
-#define JZ_SMBDMATDL	0x8c /* DMA Transmit Data Level */
-#define JZ_SMBDMARDL	0x90 /* DMA Receive Data Level */
-#define JZ_SMBSDASU	0x94 /* SMB SDA Setup Register */
-#define JZ_SMBACKGC	0x98 /* SMB ACK General Call Register */
-#define JZ_SMBENBST	0x9C /* SMB Enable Status Register */
-#define JZ_SMBSDAHD	0xD0 /* SMB SDA HolD time Register */
-	#define JZ_HDENB	0x100	/* enable hold time */
-
-/* SD/MMC hosts */
-#define JZ_MSC0_BASE	0x13450000
-#define JZ_MSC1_BASE	0x13460000
-#define JZ_MSC2_BASE	0x13470000
-
-#define JZ_MSC_CTRL	0x00
-	#define JZ_SEND_CCSD		0x8000
-	#define JZ_SEND_AS_CCSD		0x4000
-	#define JZ_EXIT_MULTIPLE	0x0080
-	#define JZ_EXIT_TRANSFER	0x0040
-	#define JZ_START_READWAIT	0x0020
-	#define JZ_STOP_READWAIT	0x0010
-	#define JZ_RESET		0x0008
-	#define JZ_START_OP		0x0004
-	#define JZ_CLOCK_CTRL_M		0x0003
-	#define JZ_CLOCK_START		0x0002
-	#define JZ_CLOCK_STOP		0x0001
-#define JZ_MSC_STAT	0x04
-	#define JZ_AUTO_CMD12_DONE	0x80000000
-	#define JZ_AUTO_CMD23_DONE	0x40000000
-	#define JZ_SVS			0x20000000
-	#define JZ_PIN_LEVEL_M		0x1f000000
-	#define JZ_BCE			0x00100000 /* boot CRC error */
-	#define JZ_BDE			0x00080000 /* boot data end */
-	#define JZ_BAE			0x00040000 /* boot acknowledge error */
-	#define JZ_BAR			0x00020000 /* boot ack. received */
-	#define JZ_DMAEND		0x00010000
-	#define JZ_IS_RESETTING		0x00008000
-	#define JZ_SDIO_INT_ACTIVE	0x00004000
-	#define JZ_PRG_DONE		0x00002000
-	#define JZ_DATA_TRAN_DONE	0x00001000
-	#define JZ_END_CMD_RES		0x00000800
-	#define JZ_DATA_FIFO_AFULL	0x00000400
-	#define JZ_IS_READWAIT		0x00000200
-	#define JZ_CLK_EN		0x00000100
-	#define JZ_DATA_FIFO_FULL	0x00000080
-	#define JZ_DATA_FIFO_EMPTY	0x00000040
-	#define JZ_CRC_RES_ERR		0x00000020
-	#define JZ_CRC_READ_ERR		0x00000010
-	#define JZ_CRC_WRITE_ERR_M	0x0000000c
-	#define JZ_CRC_WRITE_OK		0x00000000
-	#define JZ_CRC_CARD_ERR		0x00000004
-	#define JZ_CRC_NO_STATUS	0x00000008
-	#define JZ_TIME_OUT_RES		0x00000002
-	#define JZ_TIME_OUT_READ	0x00000001
-#define JZ_MSC_CLKRT	0x08
-	#define JZ_DEV_CLK	0x0
-	#define JZ_DEV_CLK_2	0x1	/* DEV_CLK / 2 */
-	#define JZ_DEV_CLK_4	0x2	/* DEV_CLK / 4 */
-	#define JZ_DEV_CLK_8	0x3	/* DEV_CLK / 8 */
-	#define JZ_DEV_CLK_16	0x4	/* DEV_CLK / 16 */
-	#define JZ_DEV_CLK_32	0x5	/* DEV_CLK / 32 */
-	#define JZ_DEV_CLK_64	0x6	/* DEV_CLK / 64 */
-	#define JZ_DEV_CLK_128	0x7	/* DEV_CLK / 128 */
-#define JZ_MSC_CMDAT	0x0c
-	#define JZ_CCS_EXPECTED	0x80000000
-	#define JZ_READ_CEATA	0x40000000
-	#define JZ_DIS_BOOT	0x08000000
-	#define JZ_ENA_BOOT	0x04000000
-	#define JZ_EXP_BOOT_ACK	0x02000000
-	#define JZ_BOOT_MODE	0x01000000
-	#define JZ_AUTO_CMD23	0x00040000
-	#define JZ_SDIO_PRDT	0x00020000
-	#define JZ_AUTO_CMD12	0x00010000
-	#define JZ_RTRG_M	0x0000c000 /* receive FIFO trigger */
-	#define JZ_RTRG_16	0x00000000 /* >= 16 */
-	#define JZ_RTRG_32	0x00004000 /* >= 32 */
-	#define JZ_RTRG_64	0x00008000 /* >= 64 */
-	#define JZ_RTRG_96	0x0000c000 /* >= 96 */
-	#define JZ_TTRG_M	0x00003000 /* transmit FIFO trigger */
-	#define JZ_TTRG_16	0x00000000 /* >= 16 */
-	#define JZ_TTRG_32	0x00001000 /* >= 32 */
-	#define JZ_TTRG_64	0x00002000 /* >= 64 */
-	#define JZ_TTRG_96	0x00003000 /* >= 96 */
-	#define JZ_IO_ABORT	0x00000800
-	#define JZ_BUS_WIDTH_M	0x00000600
-	#define JZ_BUS_1BIT	0x00000000
-	#define JZ_BUS_4BIT	0x00000400
-	#define JZ_BUS_8BIT	0x00000600
-	#define JZ_INIT		0x00000080 /* send 80 clk init before cmd */
-	#define JZ_BUSY		0x00000040
-	#define JZ_STREAM	0x00000020
-	#define JZ_WRITE	0x00000010 /* read otherwise */
-	#define JZ_DATA_EN	0x00000008
-	#define JZ_RESPONSE_M	0x00000007 /* response format */
-	#define JZ_RES_NONE	0x00000000
-	#define JZ_RES_R1	0x00000001 /* R1 and R1b */
-	#define JZ_RES_R2	0x00000002
-	#define JZ_RES_R3	0x00000003
-	#define JZ_RES_R4	0x00000004
-	#define JZ_RES_R5	0x00000005
-	#define JZ_RES_R6	0x00000006
-	#define JZ_RES_R7	0x00000007
-#define JZ_MSC_RESTO	0x10 /* 16bit response timeout in MSC_CLK */
-#define JZ_MSC_RDTO 	0x14 /* 32bit read timeout in MSC_CLK */
-#define JZ_MSC_BLKLEN	0x18 /* 16bit block length */
-#define JZ_MSC_NOB	0x1c /* 16bit block counter */
-#define JZ_MSC_SNOB	0x20 /* 16bit successful block counter */
-#define JZ_MSC_IMASK	0x24 /* interrupt mask */
-	#define JZ_INT_AUTO_CMD23_DONE	0x40000000
-	#define JZ_INT_SVS		0x20000000
-	#define JZ_INT_PIN_LEVEL_M	0x1f000000
-	#define JZ_INT_BCE		0x00100000
-	#define JZ_INT_BDE		0x00080000
-	#define JZ_INT_BAE		0x00040000
-	#define JZ_INT_BAR		0x00020000
-	#define JZ_INT_DMAEND		0x00010000
-	#define JZ_INT_AUTO_CMD12_DONE	0x00008000
-	#define JZ_INT_DATA_FIFO_FULL	0x00004000
-	#define JZ_INT_DATA_FIFO_EMPTY	0x00002000
-	#define JZ_INT_CRC_RES_ERR	0x00001000
-	#define JZ_INT_CRC_READ_ERR	0x00000800
-	#define JZ_INT_CRC_WRITE_ERR	0x00000400
-	#define JZ_INT_TIMEOUT_RES	0x00000200
-	#define JZ_INT_TIMEOUT_READ	0x00000100
-	#define JZ_INT_SDIO		0x00000080
-	#define JZ_INT_TXFIFO_WR_REQ	0x00000040
-	#define JZ_INT_RXFIFO_RD_REQ	0x00000020
-	#define JZ_INT_END_CMD_RES	0x00000004
-	#define JZ_INT_PRG_DONE		0x00000002
-	#define JZ_INT_DATA_TRAN_DONE	0x00000001
-#define JZ_MSC_IFLG	0x28 /* interrupt flags */
-#define JZ_MSC_CMD	0x2c /* 6bit CMD index */
-#define JZ_MSC_ARG	0x30 /* 32bit argument */
-#define JZ_MSC_RES	0x34 /* 8x16bit response data FIFO */
-#define JZ_MSC_RXFIFO	0x38
-#define JZ_MSC_TXFIFO	0x3c
-#define JZ_MSC_LPM	0x40
-	#define JZ_DRV_SEL_M	0xc0000000
-	#define JZ_FALLING_EDGE	0x00000000
-	#define JZ_RISING_1NS	0x40000000 /* 1ns delay */
-	#define JZ_RISING_4	0x80000000 /* 1/4 MSC_CLK delay */
-	#define JZ_SMP_SEL	0x20000000 /* 1 - rising edge */
-	#define JZ_LPM		0x00000001 /* low power mode */
-#define JZ_MSC_DMAC	0x44
-	#define JZ_MODE_SEL	0x80 /* 1 - specify transfer length */
-	#define JZ_AOFST_M	0x60 /* address offset in bytes */
-	#define JZ_AOFST_S	6    /* addrress offset shift */
-	#define JZ_ALIGNEN	0x10 /* allow non-32bit-aligned transfers */
-	#define JZ_INCR_M	0x0c /* burst type */
-	#define JZ_INCR_16	0x00
-	#define JZ_INCR_32	0x04
-	#define JZ_INCR_64	0x08
-	#define JZ_DMASEL	0x02 /* 1 - SoC DMAC, 0 - MSC built-in */
-	#define JZ_DMAEN	0x01 /* enable DMA */
-#define JZ_MSC_DMANDA	0x48 /* next descriptor paddr */
-#define JZ_MSC_DMADA	0x4c /* current descriptor */
-#define JZ_MSC_DMALEN	0x50 /* transfer tength */
-#define JZ_MSC_DMACMD	0x54
-	#define JZ_DMA_IDI_M	0xff000000
-	#define JZ_DMA_ID_M	0x00ff0000
-	#define JZ_DMA_AOFST_M	0x00000600
-	#define JZ_DMA_ALIGN	0x00000100
-	#define JZ_DMA_ENDI	0x00000002
-	#define JZ_DMA_LINK	0x00000001
-#define JZ_MSC_CTRL2	0x58
-	#define JZ_PIP		0x1f000000	/* 1 - intr trigger on high */
-	#define JZ_RST_EN	0x00800000
-	#define JZ_STPRM	0x00000010
-	#define JZ_SVC		0x00000008
-	#define JZ_SMS_M	0x00000007
-	#define JZ_SMS_DEF	0x00000000	/* default speed */
-	#define JZ_SMS_HIGH	0x00000001	/* high speed */
-	#define JZ_SMS_SDR12	0x00000002
-	#define JZ_SMS_SDR25	0x00000003
-	#define JZ_SMS_SDR50	0x00000004
-#define JZ_MSC_RTCNT	0x5c /* RT FIFO count */
-
-/* EFUSE Slave Interface */
-#define JZ_EFUSE	0x134100D0
-#define JZ_EFUCTRL	0x00
-	#define JZ_EFUSE_BANK	0x40000000	/* select upper 4KBit */
-	#define JZ_EFUSE_ADDR_M	0x3fe00000	/* in bytes */
-	#define JZ_EFUSE_ADDR_SHIFT	21
-	#define JZ_EFUSE_SIZE_M	0x001f0000	/* in bytes */
-	#define JZ_EFUSE_SIZE_SHIFT	16
-	#define JZ_EFUSE_PROG	0x00008000	/* enable programming */
-	#define JZ_EFUSE_WRITE	0x00000002	/* write enable */
-	#define JZ_EFUSE_READ	0x00000001	/* read enable */
-#define JZ_EFUCFG	0x04
-	#define JZ_EFUSE_INT_E		0x80000000	/* which IRQ? */
-	#define JZ_EFUSE_RD_ADJ_M	0x00f00000
-	#define JZ_EFUSE_RD_STROBE	0x000f0000
-	#define JZ_EFUSE_WR_ADJUST	0x0000f000
-	#define JZ_EFUSE_WR_STROBE	0x00000fff
-#define JZ_EFUSTATE	0x08
-	#define JZ_EFUSE_GLOBAL_P	0x00008000	/* wr protect bits */
-	#define JZ_EFUSE_CHIPID_P	0x00004000
-	#define JZ_EFUSE_CUSTID_P	0x00002000
-	#define JZ_EFUSE_SECWR_EN	0x00001000
-	#define JZ_EFUSE_PC_P		0x00000800
-	#define JZ_EFUSE_HDMIKEY_P	0x00000400
-	#define JZ_EFUSE_SECKEY_P	0x00000200
-	#define JZ_EFUSE_SECBOOT_EN	0x00000100
-	#define JZ_EFUSE_HDMI_BUSY	0x00000004
-	#define JZ_EFUSE_WR_DONE	0x00000002
-	#define JZ_EFUSE_RD_DONE	0x00000001
-#define JZ_EFUDATA0	0x0C
-#define JZ_EFUDATA1	0x10
-#define JZ_EFUDATA2	0x14
-#define JZ_EFUDATA3	0x18
-#define JZ_EFUDATA4	0x1C
-#define JZ_EFUDATA5	0x20
-#define JZ_EFUDATA6	0x24
-#define JZ_EFUDATA7	0x28
-
-/* NEMC */
-#define JZ_NEMC_BASE	0x13410000
-#define JZ_NEMC_SMCR(n) (0x10 + (n) * 4)
-
-# define JZ_NEMC_SMCR_SMT_SHIFT	0
-# define JZ_NEMC_SMCR_SMT_WIDTH	1
-# define JZ_NEMC_SMCR_SMT_MASK	(((1 << JZ_NEMC_SMCR_SMT_WIDTH) - 1) << JZ_NEMC_SMCR_SMT_SHIFT)
-# define JZ_NEMC_SMCR_SMT_NORMAL (0 << JZ_NEMC_SMCR_SMT_SHIFT)
-# define JZ_NEMC_SMCR_SMT_BROM	 (1 << JZ_NEMC_SMCR_SMT_SHIFT)
-
-# define JZ_NEMC_SMCR_BL_SHIFT	1
-# define JZ_NEMC_SMCR_BL_WIDTH	2
-# define JZ_NEMC_SMCR_BL_MASK	(((1 << JZ_NEMC_SMCR_BL_WIDTH) - 1) << JZ_NEMC_SMCR_BL_SHIFT)
-# define JZ_NEMC_SMCR_BL(n)	(((n) << JZ_NEMC_SMCR_BL_SHIFT)
-
-# define JZ_NEMC_SMCR_BW_SHIFT	6
-# define JZ_NEMC_SMCR_BW_WIDTH	2
-# define JZ_NEMC_SMCR_BW_MASK	(((1 << JZ_NEMC_SMCR_BW_WIDTH) - 1) << JZ_NEMC_SMCR_BW_SHIFT)
-# define JZ_NEMC_SMCR_BW_8	(0 << JZ_NEMC_SMCR_BW_SHIFT)
-
-# define JZ_NEMC_SMCR_TAS_SHIFT	8
-# define JZ_NEMC_SMCR_TAS_WIDTH	4
-# define JZ_NEMC_SMCR_TAS_MASK	(((1 << JZ_NEMC_SMCR_TAS_WIDTH) - 1) << JZ_NEMC_SMCR_TAS_SHIFT)
-
-# define JZ_NEMC_SMCR_TAH_SHIFT	12
-# define JZ_NEMC_SMCR_TAH_WIDTH	4
-# define JZ_NEMC_SMCR_TAH_MASK	(((1 << JZ_NEMC_SMCR_TAH_WIDTH) - 1) << JZ_NEMC_SMCR_TAH_SHIFT)
-
-# define JZ_NEMC_SMCR_TBP_SHIFT	16
-# define JZ_NEMC_SMCR_TBP_WIDTH	4
-# define JZ_NEMC_SMCR_TBP_MASK	(((1 << JZ_NEMC_SMCR_TBP_WIDTH) - 1) << JZ_NEMC_SMCR_TBP_SHIFT)
-
-# define JZ_NEMC_SMCR_TAW_SHIFT	20
-# define JZ_NEMC_SMCR_TAW_WIDTH	4
-# define JZ_NEMC_SMCR_TAW_MASK	(((1 << JZ_NEMC_SMCR_TAW_WIDTH) - 1) << JZ_NEMC_SMCR_TAW_SHIFT)
-
-# define JZ_NEMC_SMCR_STRV_SHIFT	24
-# define JZ_NEMC_SMCR_STRV_WIDTH	4
-# define JZ_NEMC_SMCR_STRV_MASK	(((1 << JZ_NEMC_SMCR_STRV_WIDTH) - 1) << JZ_NEMC_SMCR_STRV_SHIFT)
-
-#define JZ_NEMC_SACR(n) (0x30 + (n) * 4)
-
-# define JZ_NEMC_SACR_MASK_SHIFT	0
-# define JZ_NEMC_SACR_MASK_WIDTH	8
-# define JZ_NEMC_SACR_MASK_MASK	(((1 << JZ_NEMC_SACR_MASK_WIDTH) - 1) << JZ_NEMC_SACR_MASK_SHIFT)
-
-# define JZ_NEMC_SACR_ADDR_SHIFT	0
-# define JZ_NEMC_SACR_ADDR_WIDTH	8
-# define JZ_NEMC_SACR_ADDR_MASK	(((1 << JZ_NEMC_SACR_ADDR_WIDTH) - 1) << JZ_NEMC_SACR_ADDR_SHIFT)
-
-#define JC_NEMC_NFSCR	0x50
-
-#endif /* JZ4780_REGS_H */
diff --git a/sys/mips/ingenic/jz4780_rtc.c b/sys/mips/ingenic/jz4780_rtc.c
deleted file mode 100644
index 3f6af2141aaa..000000000000
--- a/sys/mips/ingenic/jz4780_rtc.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*-
- * Copyright 2016 Alexander Kabaev <kan@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Ingenic JZ4780 RTC driver
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/clock.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/resource.h>
-
-#include <machine/bus.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "clock_if.h"
-
-#define	JZ_RTC_TIMEOUT	5000
-
-#define JZ_RTCCR	0x00
-# define JZ_RTCCR_WRDY	(1u << 7)
-#define JZ_RTSR		0x04
-#define JZ_HSPR		0x34
-#define JZ_WENR		0x3C
-# define JZ_WENR_PAT	0xa55a
-# define JZ_WENR_WEN	(1u <<31)
-
-struct jz4780_rtc_softc {
-	device_t		dev;
-	struct resource		*res[2];
-};
-
-static struct resource_spec jz4780_rtc_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ SYS_RES_IRQ,    0, RF_ACTIVE },
-	{ -1, 0 }
-};
-
-#define	CSR_READ(sc, reg)	bus_read_4((sc)->res[0], (reg))
-#define	CSR_WRITE(sc, reg, val)	bus_write_4((sc)->res[0], (reg), (val))
-
-static int jz4780_rtc_probe(device_t dev);
-static int jz4780_rtc_attach(device_t dev);
-static int jz4780_rtc_detach(device_t dev);
-
-static int
-jz4780_rtc_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-rtc"))
-		return (ENXIO);
-
-	device_set_desc(dev, "JZ4780 RTC");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-/* Poll control register until RTC is ready to accept register writes */
-static int
-jz4780_rtc_wait(struct jz4780_rtc_softc *sc)
-{
-	int timeout;
-
-	timeout = JZ_RTC_TIMEOUT;
-	while (timeout-- > 0) {
-		if (CSR_READ(sc, JZ_RTCCR) & JZ_RTCCR_WRDY)
-			return (0);
-	}
-	return (EIO);
-}
-
-/*
- * Write RTC register. It appears that RTC goes into read-only mode at random,
- * which suggests something is up with how it is powered up, so do the pattern
- * writing dance every time just in case.
- */
-static int
-jz4780_rtc_write(struct jz4780_rtc_softc *sc, uint32_t reg, uint32_t val)
-{
-	int ret, timeout;
-
-	ret = jz4780_rtc_wait(sc);
-	if (ret != 0)
-		return (ret);
-
-	CSR_WRITE(sc, JZ_WENR, JZ_WENR_PAT);
-
-	ret = jz4780_rtc_wait(sc);
-	if (ret)
-		return ret;
-
-	timeout = JZ_RTC_TIMEOUT;
-	while (timeout-- > 0) {
-		if (CSR_READ(sc, JZ_WENR) & JZ_WENR_WEN)
-			break;
-	}
-	if (timeout < 0)
-		return (EIO);
-
-	CSR_WRITE(sc, reg, val);
-	return 0;
-}
-
-static int
-jz4780_rtc_attach(device_t dev)
-{
-	struct jz4780_rtc_softc *sc = device_get_softc(dev);
-	uint32_t scratch;
-	int ret;
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_rtc_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	scratch = CSR_READ(sc, JZ_HSPR);
-	if (scratch != 0x12345678) {
-		ret = jz4780_rtc_write(sc, JZ_HSPR, 0x12345678);
-		if (ret == 0)
-			ret = jz4780_rtc_write(sc, JZ_RTSR, 0);
-		if (ret) {
-			device_printf(dev, "Unable to write RTC registers\n");
-			jz4780_rtc_detach(dev);
-			return (ret);
-		}
-	}
-	clock_register(dev, 1000000); /* Register 1 HZ clock */
-	return (0);
-}
-
-static int
-jz4780_rtc_detach(device_t dev)
-{
-	struct jz4780_rtc_softc *sc;
-
-	sc = device_get_softc(dev);
-	bus_release_resources(dev, jz4780_rtc_spec, sc->res);
-	return (0);
-}
-
-static int
-jz4780_rtc_gettime(device_t dev, struct timespec *ts)
-{
-	struct jz4780_rtc_softc *sc;
-	uint32_t val1, val2;
-	int timeout;
-
-	sc = device_get_softc(dev);
-
-	timeout = JZ_RTC_TIMEOUT;
-	val2 = CSR_READ(sc, JZ_RTSR);
-	do {
-		val1 = val2;
-		val2 = CSR_READ(sc, JZ_RTSR);
-	} while (val1 != val2 && timeout-- >= 0);
-
-	if (timeout < 0)
-		return (EIO);
-
-	/* Convert secs to timespec directly */
-	ts->tv_sec = val1;
-	ts->tv_nsec = 0;
-	return 0;
-}
-
-static int
-jz4780_rtc_settime(device_t dev, struct timespec *ts)
-{
-	struct jz4780_rtc_softc *sc;
-
-	sc = device_get_softc(dev);
-	return jz4780_rtc_write(sc, JZ_RTSR, ts->tv_sec);
-}
-
-static device_method_t jz4780_rtc_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_rtc_probe),
-	DEVMETHOD(device_attach,	jz4780_rtc_attach),
-	DEVMETHOD(device_detach,	jz4780_rtc_detach),
-
-	DEVMETHOD(clock_gettime,        jz4780_rtc_gettime),
-	DEVMETHOD(clock_settime,        jz4780_rtc_settime),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_rtc_driver = {
-	"jz4780_rtc",
-	jz4780_rtc_methods,
-	sizeof(struct jz4780_rtc_softc),
-};
-
-static devclass_t jz4780_rtc_devclass;
-
-EARLY_DRIVER_MODULE(jz4780_rtc, simplebus, jz4780_rtc_driver,
-    jz4780_rtc_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/ingenic/jz4780_smb.c b/sys/mips/ingenic/jz4780_smb.c
deleted file mode 100644
index 323bfe38805f..000000000000
--- a/sys/mips/ingenic/jz4780_smb.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/*-
- * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Ingenic JZ4780 SMB Controller
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/time.h>
-#include <machine/bus.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/iicbus/iiconf.h>
-#include <dev/iicbus/iicbus.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <mips/ingenic/jz4780_smb.h>
-
-#include "iicbus_if.h"
-
-#define	JZSMB_TIMEOUT			((300UL * hz) / 1000)
-
-#define	JZSMB_SPEED_STANDARD		100000
-#define	JZSMB_SETUP_TIME_STANDARD	300
-#define	JZSMB_HOLD_TIME_STANDARD	400
-#define	JZSMB_PERIOD_MIN_STANDARD	4000
-#define	JZSMB_PERIOD_MAX_STANDARD	4700
-
-#define	JZSMB_SPEED_FAST		400000
-#define	JZSMB_SETUP_TIME_FAST		450
-#define	JZSMB_HOLD_TIME_FAST		450
-#define	JZSMB_PERIOD_MIN_FAST		600
-#define	JZSMB_PERIOD_MAX_FAST		1300
-
-#define	JZSMB_HCNT_BASE			8
-#define	JZSMB_HCNT_MIN			6
-#define	JZSMB_LCNT_BASE			1
-#define	JZSMB_LCNT_MIN			8
-
-static inline int
-tstohz(const struct timespec *tsp)
-{
-	struct timeval tv;
-
-	TIMESPEC_TO_TIMEVAL(&tv, tsp);
-	return (tvtohz(&tv));
-}
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ingenic,jz4780-i2c",		1 },
-	{ NULL,				0 }
-};
-
-static struct resource_spec jzsmb_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ -1, 0 }
-};
-
-struct jzsmb_softc {
-	struct resource	*res;
-	struct mtx	mtx;
-	clk_t		clk;
-	device_t	iicbus;
-	int		busy;
-	uint32_t	i2c_freq;
-	uint64_t	bus_freq;
-	uint32_t	status;
-
-	struct iic_msg	*msg;
-};
-
-#define	SMB_LOCK(sc)			mtx_lock(&(sc)->mtx)
-#define	SMB_UNLOCK(sc)			mtx_unlock(&(sc)->mtx)
-#define	SMB_ASSERT_LOCKED(sc)		mtx_assert(&(sc)->mtx, MA_OWNED)
-#define	SMB_READ(sc, reg)		bus_read_2((sc)->res, (reg))
-#define	SMB_WRITE(sc, reg, val)		bus_write_2((sc)->res, (reg), (val))
-
-static phandle_t
-jzsmb_get_node(device_t bus, device_t dev)
-{
-	return (ofw_bus_get_node(bus));
-}
-
-static int
-jzsmb_enable(struct jzsmb_softc *sc, int enable)
-{
-	SMB_ASSERT_LOCKED(sc);
-
-	if (enable) {
-		SMB_WRITE(sc, SMBENB, SMBENB_SMBENB);
-		while ((SMB_READ(sc, SMBENBST) & SMBENBST_SMBEN) == 0)
-			;
-	} else {
-		SMB_WRITE(sc, SMBENB, 0);
-		while ((SMB_READ(sc, SMBENBST) & SMBENBST_SMBEN) != 0)
-			;
-	}
-
-	return (0);
-}
-
-static int
-jzsmb_reset_locked(device_t dev, u_char addr)
-{
-	struct jzsmb_softc *sc;
-	uint16_t con;
-	uint32_t period;
-	int hcnt, lcnt, setup_time, hold_time;
-
-	sc = device_get_softc(dev);
-
-	SMB_ASSERT_LOCKED(sc);
-
-	/* Setup master mode operation */
-
-	/* Disable SMB */
-	jzsmb_enable(sc, 0);
-
-	/* Disable interrupts */
-	SMB_WRITE(sc, SMBINTM, 0);
-
-	/* Set supported speed mode and expected SCL frequency */
-	period = sc->bus_freq / sc->i2c_freq;
-	con = SMBCON_REST | SMBCON_SLVDIS | SMBCON_MD;
-	switch (sc->i2c_freq) {
-	case JZSMB_SPEED_STANDARD:
-		con |= SMBCON_SPD_STANDARD;
-		setup_time = JZSMB_SETUP_TIME_STANDARD;
-		hold_time = JZSMB_HOLD_TIME_STANDARD;
-		hcnt = (period * JZSMB_PERIOD_MIN_STANDARD) /
-		    (JZSMB_PERIOD_MAX_STANDARD + JZSMB_PERIOD_MIN_STANDARD);
-		lcnt = period - hcnt;
-		hcnt = MAX(hcnt - JZSMB_HCNT_BASE, JZSMB_HCNT_MIN);
-		lcnt = MAX(lcnt - JZSMB_LCNT_BASE, JZSMB_LCNT_MIN);
-		SMB_WRITE(sc, SMBCON, con);
-		SMB_WRITE(sc, SMBSHCNT, hcnt);
-		SMB_WRITE(sc, SMBSLCNT, lcnt);
-		break;
-	case JZSMB_SPEED_FAST:
-		con |= SMBCON_SPD_FAST;
-		setup_time = JZSMB_SETUP_TIME_FAST;
-		hold_time = JZSMB_HOLD_TIME_FAST;
-		hcnt = (period * JZSMB_PERIOD_MIN_FAST) /
-		    (JZSMB_PERIOD_MAX_FAST + JZSMB_PERIOD_MIN_FAST);
-		lcnt = period - hcnt;
-		hcnt = MAX(hcnt - JZSMB_HCNT_BASE, JZSMB_HCNT_MIN);
-		lcnt = MAX(lcnt - JZSMB_LCNT_BASE, JZSMB_LCNT_MIN);
-		SMB_WRITE(sc, SMBCON, con);
-		SMB_WRITE(sc, SMBFHCNT, hcnt);
-		SMB_WRITE(sc, SMBFLCNT, lcnt);
-		break;
-	default:
-		return (EINVAL);
-	}
-
-	setup_time = ((setup_time * sc->bus_freq / 1000) / 1000000) + 1;
-	setup_time = MIN(1, MAX(255, setup_time));
-	SMB_WRITE(sc, SMBSDASU, setup_time);
-
-	hold_time = ((hold_time * sc->bus_freq / 1000) / 1000000) - 1;
-	hold_time = MAX(255, hold_time);
-	if (hold_time >= 0)
-		SMB_WRITE(sc, SMBSDAHD, hold_time | SMBSDAHD_HDENB);
-	else
-		SMB_WRITE(sc, SMBSDAHD, 0);
-
-	SMB_WRITE(sc, SMBTAR, addr >> 1);
-
-	if (addr != 0) {
-		/* Enable SMB */
-		jzsmb_enable(sc, 1);
-	}
-
-	return (0);
-}
-
-static int
-jzsmb_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
-{
-	struct jzsmb_softc *sc;
-	int error;
-
-	sc = device_get_softc(dev);
-
-	SMB_LOCK(sc);
-	error = jzsmb_reset_locked(dev, addr);
-	SMB_UNLOCK(sc);
-
-	return (error);
-}
-
-static int
-jzsmb_transfer_read(device_t dev, struct iic_msg *msg)
-{
-	struct jzsmb_softc *sc;
-	struct timespec start, diff;
-	uint16_t con, resid;
-	int timeo;
-
-	sc = device_get_softc(dev);
-	timeo = JZSMB_TIMEOUT * msg->len;
-
-	SMB_ASSERT_LOCKED(sc);
-
-	con = SMB_READ(sc, SMBCON);
-	con |= SMBCON_STPHLD;
-	SMB_WRITE(sc, SMBCON, con);
-
-	getnanouptime(&start);
-	for (resid = msg->len; resid > 0; resid--) {
-		for (int i = 0; i < min(resid, 8); i++)
-			SMB_WRITE(sc, SMBDC, SMBDC_CMD);
-		for (;;) {
-			getnanouptime(&diff);
-			timespecsub(&diff, &start, &diff);
-			if ((SMB_READ(sc, SMBST) & SMBST_RFNE) != 0) {
-				msg->buf[msg->len - resid] =
-				    SMB_READ(sc, SMBDC) & SMBDC_DAT;
-				break;
-			} else
-				DELAY(1000);
-
-			if (tstohz(&diff) >= timeo) {
-				device_printf(dev,
-				    "read timeout (status=0x%02x)\n",
-				    SMB_READ(sc, SMBST));
-				return (EIO);
-			}
-		}
-	}
-
-	con = SMB_READ(sc, SMBCON);
-	con &= ~SMBCON_STPHLD;
-	SMB_WRITE(sc, SMBCON, con);
-
-	return (0);
-}
-
-static int
-jzsmb_transfer_write(device_t dev, struct iic_msg *msg, int stop_hold)
-{
-	struct jzsmb_softc *sc;
-	struct timespec start, diff;
-	uint16_t con, resid;
-	int timeo;
-
-	sc = device_get_softc(dev);
-	timeo = JZSMB_TIMEOUT * msg->len;
-
-	SMB_ASSERT_LOCKED(sc);
-
-	con = SMB_READ(sc, SMBCON);
-	con |= SMBCON_STPHLD;
-	SMB_WRITE(sc, SMBCON, con);
-
-	getnanouptime(&start);
-	for (resid = msg->len; resid > 0; resid--) {
-		for (;;) {
-			getnanouptime(&diff);
-			timespecsub(&diff, &start, &diff);
-			if ((SMB_READ(sc, SMBST) & SMBST_TFNF) != 0) {
-				SMB_WRITE(sc, SMBDC,
-				    msg->buf[msg->len - resid]);
-				break;
-			} else
-				DELAY((1000 * hz) / JZSMB_TIMEOUT);
-
-			if (tstohz(&diff) >= timeo) {
-				device_printf(dev,
-				    "write timeout (status=0x%02x)\n",
-				    SMB_READ(sc, SMBST));
-				return (EIO);
-			}
-		}
-	}
-
-	if (!stop_hold) {
-		con = SMB_READ(sc, SMBCON);
-		con &= ~SMBCON_STPHLD;
-		SMB_WRITE(sc, SMBCON, con);
-	}
-
-	return (0);
-}
-
-static int
-jzsmb_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
-{
-	struct jzsmb_softc *sc;
-	uint32_t n;
-	uint16_t con;
-	int error;
-
-	sc = device_get_softc(dev);
-
-	SMB_LOCK(sc);
-	while (sc->busy)
-		mtx_sleep(sc, &sc->mtx, 0, "i2cbuswait", 0);
-	sc->busy = 1;
-	sc->status = 0;
-
-	for (n = 0; n < nmsgs; n++) {
-		/* Set target address */
-		if (n == 0 || msgs[n].slave != msgs[n - 1].slave)
-			jzsmb_reset_locked(dev, msgs[n].slave);
-
-		/* Set read or write */
-		if ((msgs[n].flags & IIC_M_RD) != 0)
-			error = jzsmb_transfer_read(dev, &msgs[n]);
-		else
-			error = jzsmb_transfer_write(dev, &msgs[n],
-			    n < nmsgs - 1);
-
-		if (error != 0)
-			goto done;
-	}
-
-done:
-	/* Send stop if necessary */
-	con = SMB_READ(sc, SMBCON);
-	con &= ~SMBCON_STPHLD;
-	SMB_WRITE(sc, SMBCON, con);
-
-	/* Disable SMB */
-	jzsmb_enable(sc, 0);
-
-	sc->msg = NULL;
-	sc->busy = 0;
-	wakeup(sc);
-	SMB_UNLOCK(sc);
-
-	return (error);
-}
-
-static int
-jzsmb_probe(device_t dev)
-{
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 SMB Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jzsmb_attach(device_t dev)
-{
-	struct jzsmb_softc *sc;
-	phandle_t node;
-	int error;
-
-	sc = device_get_softc(dev);
-	node = ofw_bus_get_node(dev);
-	mtx_init(&sc->mtx, device_get_nameunit(dev), "jzsmb", MTX_DEF);
-
-	error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
-	if (error != 0) {
-		device_printf(dev, "cannot get clock\n");
-		goto fail;
-	}
-	error = clk_enable(sc->clk);
-	if (error != 0) {
-		device_printf(dev, "cannot enable clock\n");
-		goto fail;
-	}
-	error = clk_get_freq(sc->clk, &sc->bus_freq);
-	if (error != 0 || sc->bus_freq == 0) {
-		device_printf(dev, "cannot get bus frequency\n");
-		return (error);
-	}
-
-	if (bus_alloc_resources(dev, jzsmb_spec, &sc->res) != 0) {
-		device_printf(dev, "cannot allocate resources for device\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	if (OF_getencprop(node, "clock-frequency", &sc->i2c_freq,
-	    sizeof(sc->i2c_freq)) != 0 || sc->i2c_freq == 0)
-		sc->i2c_freq = 100000;	/* Default to standard mode */
-
-	sc->iicbus = device_add_child(dev, "iicbus", -1);
-	if (sc->iicbus == NULL) {
-		device_printf(dev, "cannot add iicbus child device\n");
-		error = ENXIO;
-		goto fail;
-	}
-
-	bus_generic_attach(dev);
-
-	return (0);
-
-fail:
-	bus_release_resources(dev, jzsmb_spec, &sc->res);
-	if (sc->clk != NULL)
-		clk_release(sc->clk);
-	mtx_destroy(&sc->mtx);
-	return (error);
-}
-
-static device_method_t jzsmb_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jzsmb_probe),
-	DEVMETHOD(device_attach,	jzsmb_attach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
-	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
-	DEVMETHOD(bus_set_resource,	bus_generic_rl_set_resource),
-	DEVMETHOD(bus_get_resource,	bus_generic_rl_get_resource),
-
-	/* OFW methods */
-	DEVMETHOD(ofw_bus_get_node,	jzsmb_get_node),
-
-	/* iicbus interface */
-	DEVMETHOD(iicbus_callback,	iicbus_null_callback),
-	DEVMETHOD(iicbus_reset,		jzsmb_reset),
-	DEVMETHOD(iicbus_transfer,	jzsmb_transfer),
-
-	DEVMETHOD_END
-};
-
-static driver_t jzsmb_driver = {
-	"iichb",
-	jzsmb_methods,
-	sizeof(struct jzsmb_softc),
-};
-
-static devclass_t jzsmb_devclass;
-
-EARLY_DRIVER_MODULE(iicbus, jzsmb, iicbus_driver, iicbus_devclass, 0, 0,
-    BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
-EARLY_DRIVER_MODULE(jzsmb, simplebus, jzsmb_driver, jzsmb_devclass, 0, 0,
-    BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
-MODULE_VERSION(jzsmb, 1);
diff --git a/sys/mips/ingenic/jz4780_smb.h b/sys/mips/ingenic/jz4780_smb.h
deleted file mode 100644
index 1402778ea0da..000000000000
--- a/sys/mips/ingenic/jz4780_smb.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*-
- * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Ingenic JZ4780 SMB Controller
- */
-
-#ifndef __JZ4780_SMB_H__
-#define __JZ4780_SMB_H__
-
-#define	SMBCON			0x00
-#define	 SMBCON_STPHLD		(1 << 7)
-#define	 SMBCON_SLVDIS		(1 << 6)
-#define	 SMBCON_REST		(1 << 5)
-#define	 SMBCON_MATP		(1 << 4)
-#define	 SMBCON_SATP		(1 << 3)
-#define	 SMBCON_SPD		(3 << 1)
-#define	 SMBCON_SPD_STANDARD	(1 << 1)
-#define	 SMBCON_SPD_FAST	(2 << 1)
-#define	 SMBCON_MD		(1 << 0)
-#define	SMBTAR			0x04
-#define	 SMBTAR_MATP		(1 << 12)
-#define	 SMBTAR_SPECIAL		(1 << 11)
-#define	 SMBTAR_GC_OR_START	(1 << 10)
-#define	 SMBTAR_SMBTAR		(0x3ff << 0)
-#define	SMBSAR			0x08
-#define	SMBDC			0x10
-#define	 SMBDC_CMD		(1 << 8)
-#define	 SMBDC_DAT		(0xff << 0)
-#define	SMBSHCNT		0x14
-#define	SMBSLCNT		0x18
-#define	SMBFHCNT		0x1c
-#define	SMBFLCNT		0x20
-#define	SMBINTST		0x2c
-#define	SMBINTM			0x30
-#define	SMBRXTL			0x38
-#define	SMBTXTL			0x3c
-#define	SMBCINT			0x40
-#define	SMBCRXUF		0x44
-#define	SMBCRXOF		0x48
-#define	SMBCTXOF		0x4c
-#define	SMBCRXREQ		0x50
-#define	SMBCTXABT		0x54
-#define	SMBCRXDN		0x58
-#define	SMBCACT			0x5c
-#define	SMBCSTP			0x60
-#define	SMBCSTT			0x64
-#define	SMBCGC			0x68
-#define	SMBENB			0x6c
-#define	 SMBENB_SMBENB		(1 << 0)
-#define	SMBST			0x70
-#define	 SMBST_SLVACT		(1 << 6)
-#define	 SMBST_MSTACT		(1 << 5)
-#define	 SMBST_RFF		(1 << 4)
-#define	 SMBST_RFNE		(1 << 3)
-#define	 SMBST_TFE		(1 << 2)
-#define	 SMBST_TFNF		(1 << 1)
-#define	 SMBST_ACT		(1 << 0)
-#define	SMBABTSRC		0x80
-#define	SMBDMACR		0x88
-#define	SMBDMATDLR		0x8c
-#define	SMBDMARDLR		0x90
-#define	SMBSDASU		0x94
-#define	SMBACKGC		0x98
-#define	SMBENBST		0x9c
-#define	 SMBENBST_SLVRDLST	(1 << 2)
-#define	 SMBENBST_SLVDISB	(1 << 1)
-#define	 SMBENBST_SMBEN		(1 << 0)
-#define	SMBSDAHD		0xd0		
-#define	 SMBSDAHD_HDENB		(1 << 8)
-#define	 SMBSDAHD_SDAHD		(0xff << 0)
-
-#endif /* !__JZ4780_SMB_H__ */
diff --git a/sys/mips/ingenic/jz4780_timer.c b/sys/mips/ingenic/jz4780_timer.c
deleted file mode 100644
index 75f9bb2fe34a..000000000000
--- a/sys/mips/ingenic/jz4780_timer.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*-
- * Copyright 2013-2015 Alexander Kabaev <kan@FreeBSD.org>
- * Copyright 2013-2015 John Wehle <john@feith.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/timetc.h>
-#include <sys/timeet.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/hwfunc.h>
-
-#include <dev/extres/clk/clk.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/ingenic/jz4780_regs.h>
-
-struct jz4780_timer_softc {
-	device_t		dev;
-	struct resource	*	res[4];
-	void *			ih_cookie;
-	struct eventtimer	et;
-	struct timecounter	tc;
-};
-
-static struct resource_spec jz4780_timer_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },	/* OST */
-	{ SYS_RES_IRQ,		1,	RF_ACTIVE },	/* TC5 */
-	{ SYS_RES_IRQ,		2,	RF_ACTIVE },	/* TC0-4,6 */
-	{ -1, 0 }
-};
-
-/*
- * devclass_get_device / device_get_softc could be used
- * to dynamically locate this, however the timers are a
- * required device which can't be unloaded so there's
- * no need for the overhead.
- */
-static struct jz4780_timer_softc *jz4780_timer_sc = NULL;
-
-#define	CSR_WRITE_4(sc, reg, val)	bus_write_4((sc)->res[0], reg, (val))
-#define	CSR_READ_4(sc, reg)		bus_read_4((sc)->res[0], reg)
-
-static unsigned
-jz4780_get_timecount(struct timecounter *tc)
-{
-	struct jz4780_timer_softc *sc =
-	    (struct jz4780_timer_softc *)tc->tc_priv;
-
-	return CSR_READ_4(sc, JZ_OST_CNT_LO);
-}
-
-static int
-jz4780_hardclock(void *arg)
-{
-	struct jz4780_timer_softc *sc = (struct jz4780_timer_softc *)arg;
-
-	CSR_WRITE_4(sc, JZ_TC_TFCR, TFR_FFLAG5);
-	CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST5);
-
-	if (sc->et.et_active)
-		sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-
-	return (FILTER_HANDLED);
-}
-
-static int
-jz4780_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
-{
-	struct jz4780_timer_softc *sc =
-	    (struct jz4780_timer_softc *)et->et_priv;
-	uint32_t ticks;
-
-	ticks = (first * et->et_frequency) / SBT_1S;
-	if (ticks == 0)
-		return (EINVAL);
-
-	CSR_WRITE_4(sc, JZ_TC_TDFR(5), ticks);
-	CSR_WRITE_4(sc, JZ_TC_TCNT(5), 0);
-	CSR_WRITE_4(sc, JZ_TC_TESR, TESR_TCST5);
-
-	return (0);
-}
-
-static int
-jz4780_timer_stop(struct eventtimer *et)
-{
-	struct jz4780_timer_softc *sc =
-	    (struct jz4780_timer_softc *)et->et_priv;
-
-	CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST5);
-	return (0);
-}
-
-static int
-jz4780_timer_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-tcu"))
-		return (ENXIO);
-
-	device_set_desc(dev, "Ingenic JZ4780 timer");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-jz4780_timer_attach(device_t dev)
-{
-	struct jz4780_timer_softc *sc = device_get_softc(dev);
-	pcell_t counter_freq;
-	clk_t clk;
-
-	/* There should be exactly one instance. */
-	if (jz4780_timer_sc != NULL)
-		return (ENXIO);
-
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, jz4780_timer_spec, sc->res)) {
-		device_printf(dev, "can not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	counter_freq = 0;
-	if (clk_get_by_name(dev, "ext", &clk) == 0) {
-		uint64_t clk_freq;
-
-		if (clk_get_freq(clk, &clk_freq) == 0)
-			counter_freq = (uint32_t)clk_freq / 16;
-		clk_release(clk);
-	}
-	if (counter_freq == 0) {
-		device_printf(dev, "unable to determine ext clock frequency\n");
-		/* Hardcode value we 'know' is correct */
-		counter_freq = 48000000 / 16;
-	}
-
-	/*
-	 * Disable the timers, select the input for each timer,
-	 * clear and then start OST.
-	 */
-
-	/* Stop OST, if it happens to be running */
-	CSR_WRITE_4(sc, JZ_TC_TECR, TESR_OST);
-	/* Stop all other channels as well */
-	CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST0 | TESR_TCST1 | TESR_TCST2 |
-	    TESR_TCST3 | TESR_TCST4 | TESR_TCST5 | TESR_TCST6 | TESR_TCST7);
-	/* Clear detect mask flags */
-	CSR_WRITE_4(sc, JZ_TC_TFCR, 0xFFFFFFFF);
-	/* Mask all interrupts */
-	CSR_WRITE_4(sc, JZ_TC_TMSR, 0xFFFFFFFF);
-
-	/* Init counter with known data */
-	CSR_WRITE_4(sc, JZ_OST_CTRL, 0);
-	CSR_WRITE_4(sc, JZ_OST_CNT_LO, 0);
-	CSR_WRITE_4(sc, JZ_OST_CNT_HI, 0);
-	CSR_WRITE_4(sc, JZ_OST_DATA, 0xffffffff);
-
-	/* Configure counter for external clock */
-	CSR_WRITE_4(sc, JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_16);
-
-	/* Start the counter again */
-	CSR_WRITE_4(sc, JZ_TC_TESR, TESR_OST);
-
-	/* Configure TCU channel 5 similarly to OST and leave it disabled */
-	CSR_WRITE_4(sc, JZ_TC_TCSR(5), TCSR_EXT_EN | TCSR_DIV_16);
-	CSR_WRITE_4(sc, JZ_TC_TMCR, TMR_FMASK(5));
-
-	if (bus_setup_intr(dev, sc->res[2], INTR_TYPE_CLK,
-	    jz4780_hardclock, NULL, sc, &sc->ih_cookie)) {
-		device_printf(dev, "could not setup interrupt handler\n");
-		bus_release_resources(dev, jz4780_timer_spec, sc->res);
-		return (ENXIO);
-	}
-
-	sc->et.et_name = "JZ4780 TCU5";
-	sc->et.et_flags = ET_FLAGS_ONESHOT;
-	sc->et.et_frequency = counter_freq;
-	sc->et.et_quality = 1000;
-	sc->et.et_min_period = (0x00000002LLU * SBT_1S) / sc->et.et_frequency;
-	sc->et.et_max_period = (0x0000fffeLLU * SBT_1S) / sc->et.et_frequency;
-	sc->et.et_start = jz4780_timer_start;
-	sc->et.et_stop = jz4780_timer_stop;
-	sc->et.et_priv = sc;
-
-	et_register(&sc->et);
-
-	sc->tc.tc_get_timecount = jz4780_get_timecount;
-	sc->tc.tc_name = "JZ4780 OST";
-	sc->tc.tc_frequency = counter_freq;
-	sc->tc.tc_counter_mask = ~0u;
-	sc->tc.tc_quality = 1000;
-	sc->tc.tc_priv = sc;
-
-	tc_init(&sc->tc);
-
-	/* Now when tc is initialized, allow DELAY to find it */
-	jz4780_timer_sc = sc;
-
-	return (0);
-}
-
-static int
-jz4780_timer_detach(device_t dev)
-{
-
-	return (EBUSY);
-}
-
-static device_method_t jz4780_timer_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_timer_probe),
-	DEVMETHOD(device_attach,	jz4780_timer_attach),
-	DEVMETHOD(device_detach,	jz4780_timer_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t jz4780_timer_driver = {
-	"timer",
-	jz4780_timer_methods,
-	sizeof(struct jz4780_timer_softc),
-};
-
-static devclass_t jz4780_timer_devclass;
-
-EARLY_DRIVER_MODULE(timer, simplebus, jz4780_timer_driver,
-    jz4780_timer_devclass, 0, 0, BUS_PASS_TIMER);
-
-void
-DELAY(int usec)
-{
-	uint32_t counter;
-	uint32_t delta, now, previous, remaining;
-
-	/* Timer has not yet been initialized */
-	if (jz4780_timer_sc == NULL) {
-		for (; usec > 0; usec--)
-			for (counter = 200; counter > 0; counter--) {
-				/* Prevent gcc from optimizing out the loop */
-				mips_rd_cause();
-			}
-		return;
-	}
-	TSENTER();
-
-	/*
-	 * Some of the other timers in the source tree do this calculation as:
-	 *
-	 *   usec * ((sc->tc.tc_frequency / 1000000) + 1)
-	 *
-	 * which gives a fairly pessimistic result when tc_frequency is an exact
-	 * multiple of 1000000.  Given the data type and typical values for
-	 * tc_frequency adding 999999 shouldn't overflow.
-	 */
-	remaining = usec * ((jz4780_timer_sc->tc.tc_frequency + 999999) /
-	    1000000);
-
-	/*
-	 * We add one since the first iteration may catch the counter just
-	 * as it is changing.
-	 */
-	remaining += 1;
-
-	previous = jz4780_get_timecount(&jz4780_timer_sc->tc);
-
-	for ( ; ; ) {
-		now = jz4780_get_timecount(&jz4780_timer_sc->tc);
-
-		/*
-		 * If the timer has rolled over, then we have the case:
-		 *
-		 *   if (previous > now) {
-		 *     delta = (0 - previous) + now
-		 *   }
-		 *
-		 * which is really no different then the normal case.
-		 * Both cases are simply:
-		 *
-		 *   delta = now - previous.
-		 */
-		delta = now - previous;
-
-		if (delta >= remaining)
-			break;
-
-		previous = now;
-		remaining -= delta;
-	}
-	TSEXIT();
-}
-
-void
-platform_initclocks(void)
-{
-
-}
diff --git a/sys/mips/ingenic/jz4780_uart.c b/sys/mips/ingenic/jz4780_uart.c
deleted file mode 100644
index 38d15493c155..000000000000
--- a/sys/mips/ingenic/jz4780_uart.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*-
- * Copyright (c) 2013 Ian Lepore
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/sysctl.h>
-#include <machine/bus.h>
-
-#include <dev/extres/clk/clk.h>
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_cpu_fdt.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_dev_ns8250.h>
-#include <dev/ic/ns16550.h>
-#include "uart_if.h"
-
-/*
- * High-level UART interface.
- */
-struct jz4780_uart_softc {
-	struct ns8250_softc ns8250_base;
-	clk_t		clk_mod;
-	clk_t		clk_baud;
-};
-
-static int
-jz4780_bus_attach(struct uart_softc *sc)
-{
-	struct ns8250_softc *ns8250;
-	struct uart_bas *bas;
-	int rv;
-
-	ns8250 = (struct ns8250_softc *)sc;
-	bas = &sc->sc_bas;
-
-	rv = ns8250_bus_attach(sc);
-	if (rv != 0)
-		return (0);
-
-	/* Configure uart to use extra IER_RXTMOUT bit */
-	ns8250->ier_rxbits = IER_RXTMOUT | IER_EMSC | IER_ERLS | IER_ERXRDY;
-	ns8250->ier_mask = ~(ns8250->ier_rxbits);
-	ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask;
-	ns8250->ier |= ns8250->ier_rxbits;
-	uart_setreg(bas, REG_IER, ns8250->ier);
-	uart_barrier(bas);
-	return (0);
-}
-
-static kobj_method_t jz4780_uart_methods[] = {
-	KOBJMETHOD(uart_probe,		ns8250_bus_probe),
-	KOBJMETHOD(uart_attach,		jz4780_bus_attach),
-	KOBJMETHOD(uart_detach,		ns8250_bus_detach),
-	KOBJMETHOD(uart_flush,		ns8250_bus_flush),
-	KOBJMETHOD(uart_getsig,		ns8250_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		ns8250_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		ns8250_bus_ipend),
-	KOBJMETHOD(uart_param,		ns8250_bus_param),
-	KOBJMETHOD(uart_receive,	ns8250_bus_receive),
-	KOBJMETHOD(uart_setsig,		ns8250_bus_setsig),
-	KOBJMETHOD(uart_transmit,	ns8250_bus_transmit),
-	KOBJMETHOD(uart_grab,		ns8250_bus_grab),
-	KOBJMETHOD(uart_ungrab,		ns8250_bus_ungrab),
-	KOBJMETHOD_END
-};
-
-static struct uart_class jz4780_uart_class = {
-	"jz4780_uart_class",
-	jz4780_uart_methods,
-	sizeof(struct jz4780_uart_softc),
-	.uc_ops = &uart_ns8250_ops,
-	.uc_range = 8,
-	.uc_rclk = 0,
-};
-
-/* Compatible devices. */
-static struct ofw_compat_data compat_data[] = {
-	{"ingenic,jz4780-uart", (uintptr_t)&jz4780_uart_class},
-	{NULL,			(uintptr_t)NULL},
-};
-
-UART_FDT_CLASS(compat_data);
-
-/*
- * UART Driver interface.
- */
-static int
-jz4780_uart_get_shift(device_t dev)
-{
-	phandle_t node;
-	pcell_t shift;
-
-	node = ofw_bus_get_node(dev);
-	if ((OF_getencprop(node, "reg-shift", &shift, sizeof(shift))) <= 0)
-		shift = 2;
-	return ((int)shift);
-}
-
-static int
-jz4780_uart_probe(device_t dev)
-{
-	struct jz4780_uart_softc *sc;
-	uint64_t freq;
-	int shift;
-	int rv;
-	const struct ofw_compat_data *cd;
-
-	sc = device_get_softc(dev);
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-	cd = ofw_bus_search_compatible(dev, compat_data);
-	if (cd->ocd_data == 0)
-		return (ENXIO);
-
-	/* Figure out clock setup */
-	rv = clk_get_by_ofw_name(dev, 0, "module", &sc->clk_mod);
-	if (rv != 0) {
-		device_printf(dev, "Cannot get UART clock: %d\n", rv);
-		return (ENXIO);
-	}
-	rv = clk_enable(sc->clk_mod);
-	if (rv != 0) {
-		device_printf(dev, "Cannot enable UART clock: %d\n", rv);
-		return (ENXIO);
-	}
-	rv = clk_get_by_ofw_name(dev, 0, "baud", &sc->clk_baud);
-	if (rv != 0) {
-		device_printf(dev, "Cannot get UART clock: %d\n", rv);
-		return (ENXIO);
-	}
-	rv = clk_enable(sc->clk_baud);
-	if (rv != 0) {
-		device_printf(dev, "Cannot enable UART clock: %d\n", rv);
-		return (ENXIO);
-	}
-	rv = clk_get_freq(sc->clk_baud, &freq);
-	if (rv != 0) {
-		device_printf(dev, "Cannot determine UART clock frequency: %d\n", rv);
-		return (ENXIO);
-	}
-
-	if (bootverbose)
-		device_printf(dev, "got UART clock: %lld\n", freq);
-	sc->ns8250_base.base.sc_class = (struct uart_class *)cd->ocd_data;
-	shift = jz4780_uart_get_shift(dev);
-	return (uart_bus_probe(dev, shift, 0, (int)freq, 0, 0, 0));
-}
-
-static int
-jz4780_uart_detach(device_t dev)
-{
-	struct jz4780_uart_softc *sc;
-	int rv;
-
-	rv = uart_bus_detach(dev);
-	if (rv != 0)
-		return (rv);
-
-	sc = device_get_softc(dev);
-	if (sc->clk_mod != NULL) {
-		clk_release(sc->clk_mod);
-	}
-	if (sc->clk_baud != NULL) {
-		clk_release(sc->clk_baud);
-	}
-	return (0);
-}
-
-static device_method_t jz4780_uart_bus_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		jz4780_uart_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	jz4780_uart_detach),
-	{ 0, 0 }
-};
-
-static driver_t jz4780_uart_driver = {
-	uart_driver_name,
-	jz4780_uart_bus_methods,
-	sizeof(struct jz4780_uart_softc),
-};
-
-DRIVER_MODULE(jz4780_uart, simplebus,  jz4780_uart_driver, uart_devclass,
-    0, 0);
diff --git a/sys/mips/malta/asm_malta.S b/sys/mips/malta/asm_malta.S
deleted file mode 100644
index 4f8fac223d56..000000000000
--- a/sys/mips/malta/asm_malta.S
+++ /dev/null
@@ -1,92 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * Portions of this software were developed by SRI International and the
- * University of Cambridge Computer Laboratory under DARPA/AFRL contract
- * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Portions of this software were developed by the University of Cambridge
- * Computer Laboratory as part of the CTSRD Project, with support from the
- * UK Higher Education Innovation Fund (HEIF).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-
-#define	VPECONF0_MVP	(1 << 1)
-#define	VPECONF0_VPA	(1 << 0)
-
-	.set noreorder
-
-#ifdef SMP
-/*
- * This function must be implemented in assembly because it is called early
- * in AP boot without a valid stack.
- */
-LEAF(platform_processor_id)
-	.set push
-	.set mips32r2
-	mfc0	v0, $15, 1
-	jr	ra
-	andi	v0, 0x1f
-	.set pop
-END(platform_processor_id)
-
-LEAF(malta_cpu_configure)
-	.set push
-	.set mips32r2
-	.set noat
-	li	t2, (VPECONF0_MVP | VPECONF0_VPA)
-	move	$1, t2
-	jr	ra
-	.word	0x41810000 | (1 << 11) | 2	# mttc0 t2, $1, 2
-	.set pop
-END(malta_cpu_configure)
-
-/*
- * Called on APs to wait until they are told to launch.
- */
-LEAF(malta_ap_wait)
-	jal	platform_processor_id
-	nop
-
-	PTR_LA	t1, malta_ap_boot
-
-1:
-	ll	t0, 0(t1)
-	bne	v0, t0, 1b
-	nop
-
-	move	t0, zero
-	sc	t0, 0(t1)
-
-	beqz	t0, 1b
-	nop
-
-	j	mpentry
-	nop
-END(malta_ap_wait)
-#endif
diff --git a/sys/mips/malta/files.malta b/sys/mips/malta/files.malta
deleted file mode 100644
index 507ab0ff9818..000000000000
--- a/sys/mips/malta/files.malta
+++ /dev/null
@@ -1,16 +0,0 @@
-# $FreeBSD$
-mips/malta/gt.c				standard
-mips/malta/gt_pci.c			standard
-mips/malta/gt_pci_bus_space.c			standard
-mips/malta/obio.c			optional uart
-mips/malta/uart_cpu_maltausart.c	optional uart
-mips/malta/uart_bus_maltausart.c	optional uart
-dev/uart/uart_dev_ns8250.c		optional uart
-mips/malta/malta_machdep.c		standard
-mips/malta/yamon.c			standard
-mips/mips/intr_machdep.c		standard
-mips/mips/tick.c			standard
-
-# SMP
-mips/malta/asm_malta.S			optional smp
-mips/malta/malta_mp.c			optional smp
diff --git a/sys/mips/malta/gt.c b/sys/mips/malta/gt.c
deleted file mode 100644
index fb6b0f5b344f..000000000000
--- a/sys/mips/malta/gt.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/types.h>
-
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/pmap.h>
-#include <vm/vm_page.h>
-#include <vm/vm_extern.h>
-
-#include <dev/ic/i8259.h>
-
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-
-#include <mips/malta/gtvar.h>
-
-static int
-gt_probe(device_t dev)
-{
-	device_set_desc(dev, "GT64120 chip");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-gt_identify(driver_t *drv, device_t parent)
-{
-	BUS_ADD_CHILD(parent, 0, "gt", 0);
-}
-
-static int
-gt_attach(device_t dev)
-{
-	struct gt_softc *sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	device_add_child(dev, "pcib", 0);
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-gt_alloc_resource(device_t dev, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
-		    type, rid, start, end, count, flags));
-
-}
-
-static int
-gt_setup_intr(device_t dev, device_t child,
-    struct resource *ires, int flags, driver_filter_t *filt, 
-    driver_intr_t *intr, void *arg, void **cookiep)
-{
-	return BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 
-	    filt, intr, arg, cookiep);
-}
-
-static int
-gt_teardown_intr(device_t dev, device_t child, struct resource *res,
-    void *cookie)
-{
-	return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
-}
-
-static int
-gt_activate_resource(device_t dev, device_t child, int type, int rid,
-    struct resource *r)
-{
-	return (BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child,
-		    type, rid, r));
-}
-
-static device_method_t gt_methods[] = {
-	DEVMETHOD(device_probe, gt_probe),
-	DEVMETHOD(device_identify, gt_identify),
-	DEVMETHOD(device_attach, gt_attach),
-
-	DEVMETHOD(bus_setup_intr, gt_setup_intr),
-	DEVMETHOD(bus_teardown_intr, gt_teardown_intr),
-	DEVMETHOD(bus_alloc_resource, gt_alloc_resource),
-	DEVMETHOD(bus_activate_resource, gt_activate_resource),
-
-	DEVMETHOD_END
-};
-
-static driver_t gt_driver = {
-	"gt",
-	gt_methods,
-	sizeof(struct gt_softc),
-};
-static devclass_t gt_devclass;
-
-DRIVER_MODULE(gt, nexus, gt_driver, gt_devclass, 0, 0);
diff --git a/sys/mips/malta/gt_pci.c b/sys/mips/malta/gt_pci.c
deleted file mode 100644
index 59eeb176f3a0..000000000000
--- a/sys/mips/malta/gt_pci.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/*	$NetBSD: gt_pci.c,v 1.4 2003/07/15 00:24:54 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * PCI configuration support for gt I/O Processor chip.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <mips/malta/maltareg.h>
-
-#include <mips/malta/gtreg.h>
-#include <mips/malta/gtvar.h>
-
-#include <isa/isareg.h>
-#include <dev/ic/i8259.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <mips/malta/gt_pci_bus_space.h>
-
-#define	ICU_LEN		16	/* number of ISA IRQs */
-
-/*
- * XXX: These defines are from NetBSD's <dev/ic/i8259reg.h>. Respective file
- * from FreeBSD src tree <dev/ic/i8259.h> lacks some definitions.
- */
-#define PIC_OCW1	1
-#define PIC_OCW2	0
-#define PIC_OCW3	0
-
-#define OCW2_SELECT	0
-#define OCW2_ILS(x)     ((x) << 0)      /* interrupt level select */
-
-#define OCW3_POLL_IRQ(x) ((x) & 0x7f)
-#define OCW3_POLL_PENDING (1U << 7)
-
-/*
- * Galileo controller's registers are LE so convert to then
- * to/from native byte order. We rely on boot loader or emulator
- * to set "swap bytes" configuration correctly for us
- */
-#define	GT_PCI_DATA(v)	htole32((v))
-#define	GT_HOST_DATA(v)	le32toh((v))
-
-struct gt_pci_softc;
-
-struct gt_pci_intr_cookie {
-	int irq;
-	struct gt_pci_softc *sc;
-};
-
-struct gt_pci_softc {
-	device_t 		sc_dev;
-	bus_space_tag_t 	sc_st;
-	bus_space_handle_t	sc_ioh_icu1;
-	bus_space_handle_t	sc_ioh_icu2;
-	bus_space_handle_t	sc_ioh_elcr;
-
-	int			sc_busno;
-	struct rman		sc_mem_rman;
-	struct rman		sc_io_rman;
-	struct rman		sc_irq_rman;
-	unsigned long		sc_mem;
-	bus_space_handle_t	sc_io;
-
-	struct resource		*sc_irq;
-	struct intr_event	*sc_eventstab[ICU_LEN];
-	struct gt_pci_intr_cookie	sc_intr_cookies[ICU_LEN];
-	uint16_t		sc_imask;
-	uint16_t		sc_elcr;
-
-	uint16_t		sc_reserved;
-
-	void			*sc_ih;
-};
-
-static void gt_pci_set_icus(struct gt_pci_softc *);
-static int gt_pci_intr(void *v);
-static int gt_pci_probe(device_t);
-static int gt_pci_attach(device_t);
-static int gt_pci_activate_resource(device_t, device_t, int, int, 
-    struct resource *);
-static int gt_pci_setup_intr(device_t, device_t, struct resource *, 
-    int, driver_filter_t *, driver_intr_t *, void *, void **);
-static int gt_pci_teardown_intr(device_t, device_t, struct resource *, void*);
-static int gt_pci_maxslots(device_t );
-static int gt_pci_conf_setup(struct gt_pci_softc *, int, int, int, int, 
-    uint32_t *);
-static uint32_t gt_pci_read_config(device_t, u_int, u_int, u_int, u_int, int);
-static void gt_pci_write_config(device_t, u_int, u_int, u_int, u_int, 
-    uint32_t, int);
-static int gt_pci_route_interrupt(device_t pcib, device_t dev, int pin);
-static struct resource * gt_pci_alloc_resource(device_t, device_t, int, 
-    int *, rman_res_t, rman_res_t, rman_res_t, u_int);
-
-static void
-gt_pci_mask_irq(void *source)
-{
-	struct gt_pci_intr_cookie *cookie = source;
-	struct gt_pci_softc *sc = cookie->sc;
-	int irq = cookie->irq;
-
-	sc->sc_imask |= (1 << irq);
-	sc->sc_elcr |= (1 << irq);
-
-	gt_pci_set_icus(sc);
-}
-
-static void
-gt_pci_unmask_irq(void *source)
-{
-	struct gt_pci_intr_cookie *cookie = source;
-	struct gt_pci_softc *sc = cookie->sc;
-	int irq = cookie->irq;
-
-	/* Enable it, set trigger mode. */
-	sc->sc_imask &= ~(1 << irq);
-	sc->sc_elcr &= ~(1 << irq);
-
-	gt_pci_set_icus(sc);
-}
-
-static void
-gt_pci_set_icus(struct gt_pci_softc *sc)
-{
-	/* Enable the cascade IRQ (2) if 8-15 is enabled. */
-	if ((sc->sc_imask & 0xff00) != 0xff00)
-		sc->sc_imask &= ~(1U << 2);
-	else
-		sc->sc_imask |= (1U << 2);
-
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW1,
-	    sc->sc_imask & 0xff);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, PIC_OCW1,
-	    (sc->sc_imask >> 8) & 0xff);
-
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 0,
-	    sc->sc_elcr & 0xff);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 1,
-	    (sc->sc_elcr >> 8) & 0xff);
-}
-
-static int
-gt_pci_intr(void *v)
-{
-	struct gt_pci_softc *sc = v;
-	struct intr_event *event;
-	int irq;
-
-	for (;;) {
-		bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW3,
-		    OCW3_SEL | OCW3_P);
-		irq = bus_space_read_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW3);
-		if ((irq & OCW3_POLL_PENDING) == 0)
-		{
-			return FILTER_HANDLED;
-		}
-
-		irq = OCW3_POLL_IRQ(irq);
-
-		if (irq == 2) {
-			bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2,
-			    PIC_OCW3, OCW3_SEL | OCW3_P);
-			irq = bus_space_read_1(sc->sc_st, sc->sc_ioh_icu2,
-			    PIC_OCW3);
-			if (irq & OCW3_POLL_PENDING)
-				irq = OCW3_POLL_IRQ(irq) + 8;
-			else
-				irq = 2;
-		}
-
-		event = sc->sc_eventstab[irq];
-
-		if (!event || CK_SLIST_EMPTY(&event->ie_handlers))
-			continue;
-
-		/* TODO: frame instead of NULL? */
-		intr_event_handle(event, NULL);
-		/* XXX: Log stray IRQs */
-
-		/* Send a specific EOI to the 8259. */
-		if (irq > 7) {
-			bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2,
-			    PIC_OCW2, OCW2_SELECT | OCW2_EOI | OCW2_SL |
-			    OCW2_ILS(irq & 7));
-			irq = 2;
-		}
-
-		bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW2,
-		    OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(irq));
-	}
-
-	return FILTER_HANDLED;
-}
-
-static int
-gt_pci_probe(device_t dev)
-{
-	device_set_desc(dev, "GT64120 PCI bridge");
-	return (0);
-}
-
-static int
-gt_pci_attach(device_t dev)
-{
-
-	uint32_t busno;				       
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	int rid;
-
-	busno = 0;
-	sc->sc_dev = dev;
-	sc->sc_busno = busno;
-	sc->sc_st = mips_bus_space_generic;
-
-	/* Use KSEG1 to access IO ports for it is uncached */
-	sc->sc_io = MALTA_PCI0_IO_BASE;
-	sc->sc_io_rman.rm_type = RMAN_ARRAY;
-	sc->sc_io_rman.rm_descr = "GT64120 PCI I/O Ports";
-	/* 
-	 * First 256 bytes are ISA's registers: e.g. i8259's
-	 * So do not use them for general purpose PCI I/O window
-	 */
-	if (rman_init(&sc->sc_io_rman) != 0 ||
-	    rman_manage_region(&sc->sc_io_rman, 0x100, 0xffff) != 0) {
-		panic("gt_pci_attach: failed to set up I/O rman");
-	}
-
-	/* Use KSEG1 to access PCI memory for it is uncached */
-	sc->sc_mem = MALTA_PCIMEM1_BASE;
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "GT64120 PCI Memory";
-	if (rman_init(&sc->sc_mem_rman) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman, 
-	    sc->sc_mem, sc->sc_mem + MALTA_PCIMEM1_SIZE) != 0) {
-		panic("gt_pci_attach: failed to set up memory rman");
-	}
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "GT64120 PCI IRQs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)
-		panic("gt_pci_attach: failed to set up IRQ rman");
-
-	/*
-	 * Map the PIC/ELCR registers.
-	 */
-#if 0
-	if (bus_space_map(sc->sc_st, 0x4d0, 2, 0, &sc->sc_ioh_elcr) != 0)
-		device_printf(dev, "unable to map ELCR registers\n");
-	if (bus_space_map(sc->sc_st, IO_ICU1, 2, 0, &sc->sc_ioh_icu1) != 0)
-		device_printf(dev, "unable to map ICU1 registers\n");
-	if (bus_space_map(sc->sc_st, IO_ICU2, 2, 0, &sc->sc_ioh_icu2) != 0)
-		device_printf(dev, "unable to map ICU2 registers\n");
-#else
-	sc->sc_ioh_elcr = MIPS_PHYS_TO_KSEG1(sc->sc_io + 0x4d0);
-	sc->sc_ioh_icu1 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU1);
-	sc->sc_ioh_icu2 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU2);
-#endif	
-
-	/* All interrupts default to "masked off". */
-	sc->sc_imask = 0xffff;
-
-	/* All interrupts default to edge-triggered. */
-	sc->sc_elcr = 0;
-
-	/*
-	 * Initialize the 8259s.
-	 */
-	/* reset, program device, 4 bytes */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0,
-	    ICW1_RESET | ICW1_IC4);
-	/*
-	 * XXX: values from NetBSD's <dev/ic/i8259reg.h>
-	 */	 
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1,
-	    0/*XXX*/);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1,
-	    1 << 2);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1,
-	    ICW4_8086);
-
-	/* mask all interrupts */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1,
-	    sc->sc_imask & 0xff);
-
-	/* enable special mask mode */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0,
-	    OCW3_SEL | OCW3_ESMM | OCW3_SMM);
-
-	/* read IRR by default */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0,
-	    OCW3_SEL | OCW3_RR);
-
-	/* reset, program device, 4 bytes */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0,
-	    ICW1_RESET | ICW1_IC4);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1,
-	    0/*XXX*/);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1,
-	    1 << 2);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1,
-	    ICW4_8086);
-
-	/* mask all interrupts */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1,
-	    sc->sc_imask & 0xff);
-
-	/* enable special mask mode */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0,
-	    OCW3_SEL | OCW3_ESMM | OCW3_SMM);
-
-	/* read IRR by default */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0,
-	    OCW3_SEL | OCW3_RR);
-
-	/*
-	 * Default all interrupts to edge-triggered.
-	 */
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 0,
-	    sc->sc_elcr & 0xff);
-	bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 1,
-	    (sc->sc_elcr >> 8) & 0xff);
-
-	/*
-	 * Some ISA interrupts are reserved for devices that
-	 * we know are hard-wired to certain IRQs.
-	 */
-	sc->sc_reserved =
-		(1U << 0) |     /* timer */
-		(1U << 1) |     /* keyboard controller (keyboard) */
-		(1U << 2) |     /* PIC cascade */
-		(1U << 3) |     /* COM 2 */
-		(1U << 4) |     /* COM 1 */
-		(1U << 6) |     /* floppy */
-		(1U << 7) |     /* centronics */
-		(1U << 8) |     /* RTC */
-		(1U << 9) |	/* I2C */
-		(1U << 12) |    /* keyboard controller (mouse) */
-		(1U << 14) |    /* IDE primary */
-		(1U << 15);     /* IDE secondary */
-
-	/* Hook up our interrupt handler. */
-	if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 
-	    MALTA_SOUTHBRIDGE_INTR, MALTA_SOUTHBRIDGE_INTR, 1, 
-	    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
-		device_printf(dev, "unable to allocate IRQ resource\n");
-		return ENXIO;
-	}
-
-	if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC,
-			    gt_pci_intr, NULL, sc, &sc->sc_ih))) {
-		device_printf(dev, 
-		    "WARNING: unable to register interrupt handler\n");
-		return ENXIO;
-	}
-
-	/* Initialize memory and i/o rmans. */
-	device_add_child(dev, "pci", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-gt_pci_maxslots(device_t dev)
-{
-	return (PCI_SLOTMAX);
-}
-
-static int
-gt_pci_conf_setup(struct gt_pci_softc *sc, int bus, int slot, int func,
-    int reg, uint32_t *addr)
-{
-	*addr = (bus << 16) | (slot << 11) | (func << 8) | reg;
-
-	return (0);
-}
-
-static uint32_t
-gt_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
-    int bytes)
-{
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	uint32_t data;
-	uint32_t addr;
-	uint32_t shift, mask;
-
-	if (gt_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
-		return (uint32_t)(-1);
-
-	/* Clear cause register bits. */
-	GT_REGVAL(GT_INTR_CAUSE) = GT_PCI_DATA(0);
-	GT_REGVAL(GT_PCI0_CFG_ADDR) = GT_PCI_DATA((1U << 31) | addr);
-	/* 
-	 * Galileo system controller is special
-	 */
-	if ((bus == 0) && (slot == 0))
-		data = GT_PCI_DATA(GT_REGVAL(GT_PCI0_CFG_DATA));
-	else
-		data = GT_REGVAL(GT_PCI0_CFG_DATA);
-
-	/* Check for master abort. */
-	if (GT_HOST_DATA(GT_REGVAL(GT_INTR_CAUSE)) & (GTIC_MASABORT0 | GTIC_TARABORT0))
-		data = (uint32_t) -1;
-
-	switch(reg % 4)
-	{
-	case 3:
-		shift = 24;
-		break;
-	case 2:
-		shift = 16;
-		break;
-	case 1:
-		shift = 8;
-		break;
-	default:
-		shift = 0;
-		break;
-	}	
-
-	switch(bytes)
-	{
-	case 1:
-		mask = 0xff;
-		data = (data >> shift) & mask;
-		break;
-	case 2:
-		mask = 0xffff;
-		if(reg % 4 == 0)
-			data = data & mask;
-		else
-			data = (data >> 16) & mask;
-		break;
-	case 4:
-		break;
-	default:
-		panic("gt_pci_readconfig: wrong bytes count");
-		break;
-	}
-#if 0
-	printf("PCICONF_READ(%02x:%02x.%02x[%04x] -> %02x(%d)\n", 
-	  bus, slot, func, reg, data, bytes);
-#endif
-
-	return (data);
-}
-
-static void
-gt_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
-    uint32_t data, int bytes)
-{
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	uint32_t addr;
-	uint32_t reg_data;
-	uint32_t shift, mask;
-
-	if(bytes != 4)
-	{
-		reg_data = gt_pci_read_config(dev, bus, slot, func, reg, 4);
-
-		shift = 8 * (reg & 3);
-
-		switch(bytes)
-		{
-		case 1:
-			mask = 0xff;
-			data = (reg_data & ~ (mask << shift)) | (data << shift);
-			break;
-		case 2:
-			mask = 0xffff;
-			if(reg % 4 == 0)
-				data = (reg_data & ~mask) | data;
-			else
-				data = (reg_data & ~ (mask << shift)) | 
-				    (data << shift);
-			break;
-		case 4:
-			break;
-		default:
-			panic("gt_pci_readconfig: wrong bytes count");
-			break;
-		}
-	}
-
-	if (gt_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
-		return;
-
-	/* The galileo has problems accessing device 31. */
-	if (bus == 0 && slot == 31)
-		return;
-
-	/* XXX: no support for bus > 0 yet */
-	if (bus > 0)
-		return;
-
-	/* Clear cause register bits. */
-	GT_REGVAL(GT_INTR_CAUSE) = GT_PCI_DATA(0);
-
-	GT_REGVAL(GT_PCI0_CFG_ADDR) = GT_PCI_DATA((1U << 31) | addr);
-
-	/* 
-	 * Galileo system controller is special
-	 */
-	if ((bus == 0) && (slot == 0))
-		GT_REGVAL(GT_PCI0_CFG_DATA) = GT_PCI_DATA(data);
-	else
-		GT_REGVAL(GT_PCI0_CFG_DATA) = data;
-
-#if 0
-	printf("PCICONF_WRITE(%02x:%02x.%02x[%04x] -> %02x(%d)\n", 
-	  bus, slot, func, reg, data, bytes);
-#endif
-
-}
-
-static int
-gt_pci_route_interrupt(device_t pcib, device_t dev, int pin)
-{
-	int bus;
-	int device;
-	int func;
-	/* struct gt_pci_softc *sc = device_get_softc(pcib); */
-	bus = pci_get_bus(dev);
-	device = pci_get_slot(dev);
-	func = pci_get_function(dev);
-	/* 
-	 * XXXMIPS: We need routing logic. This is just a stub .
-	 */
-	switch (device) {
-	case 9: /*
-		 * PIIX4 IDE adapter. HW IRQ0
-		 */
-		return 0;
-	case 11: /* Ethernet */
-		return 10;
-	default:
-		device_printf(pcib, "no IRQ mapping for %d/%d/%d/%d\n", bus, device, func, pin);
-		
-	}
-	return (0);
-
-}
-
-static int
-gt_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-		
-	}
-	return (ENOENT);
-}
-
-static int
-gt_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	struct gt_pci_softc * sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-	return (ENOENT);
-}
-
-static struct resource *
-gt_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct gt_pci_softc *sc = device_get_softc(bus);	
-	struct resource *rv = NULL;
-	struct rman *rm;
-	bus_space_handle_t bh = 0;
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		bh = sc->sc_mem;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io_rman;
-		bh = sc->sc_io;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL)
-		return (NULL);
-	rman_set_rid(rv, *rid);
-	if (type != SYS_RES_IRQ) {
-		bh += (rman_get_start(rv));
-
-		rman_set_bustag(rv, gt_pci_bus_space);
-		rman_set_bushandle(rv, bh);
-		if (flags & RF_ACTIVE) {
-			if (bus_activate_resource(child, type, *rid, rv)) {
-				rman_release_resource(rv);
-				return (NULL);
-			}
-		} 
-	}
-	return (rv);
-}
-
-static int
-gt_pci_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	bus_space_handle_t p;
-	int error;
-
-	if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
-		error = bus_space_map(rman_get_bustag(r),
-		    rman_get_bushandle(r), rman_get_size(r), 0, &p);
-		if (error) 
-			return (error);
-		rman_set_bushandle(r, p);
-	}
-	return (rman_activate_resource(r));
-}
-
-static int
-gt_pci_setup_intr(device_t dev, device_t child, struct resource *ires, 
-		int flags, driver_filter_t *filt, driver_intr_t *handler, 
-		void *arg, void **cookiep)
-{
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	struct intr_event *event;
-	int irq, error;
-
-	irq = rman_get_start(ires);
-	if (irq >= ICU_LEN || irq == 2)
-		panic("%s: bad irq or type", __func__);
-
-	event = sc->sc_eventstab[irq];
-	sc->sc_intr_cookies[irq].irq = irq;
-	sc->sc_intr_cookies[irq].sc = sc;
-	if (event == NULL) {
-                error = intr_event_create(&event, 
-		    (void *)&sc->sc_intr_cookies[irq], 0, irq,
-		    gt_pci_mask_irq, gt_pci_unmask_irq,
-		    NULL, NULL, "gt_pci intr%d:", irq);
-		if (error)
-			return 0;
-		sc->sc_eventstab[irq] = event;
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt, 
-	    handler, arg, intr_priority(flags), flags, cookiep);
-
-	gt_pci_unmask_irq((void *)&sc->sc_intr_cookies[irq]);
-	return 0;
-}
-
-static int
-gt_pci_teardown_intr(device_t dev, device_t child, struct resource *res,
-    void *cookie)
-{
-	struct gt_pci_softc *sc = device_get_softc(dev);
-	int irq;
-
-	irq = rman_get_start(res);
-	gt_pci_mask_irq((void *)&sc->sc_intr_cookies[irq]);
-
-	return (intr_event_remove_handler(cookie));
-}
-
-static device_method_t gt_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		gt_pci_probe),
-	DEVMETHOD(device_attach,	gt_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	gt_read_ivar),
-	DEVMETHOD(bus_write_ivar,	gt_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	gt_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, gt_pci_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	gt_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	gt_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	gt_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	gt_pci_read_config),
-	DEVMETHOD(pcib_write_config,	gt_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	gt_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD_END
-};
-
-static driver_t gt_pci_driver = {
-	"pcib",
-	gt_pci_methods,
-	sizeof(struct gt_pci_softc),
-};
-
-static devclass_t gt_pci_devclass;
-
-DRIVER_MODULE(gt_pci, gt, gt_pci_driver, gt_pci_devclass, 0, 0);
diff --git a/sys/mips/malta/gt_pci_bus_space.c b/sys/mips/malta/gt_pci_bus_space.c
deleted file mode 100644
index 861d42a7f5d7..000000000000
--- a/sys/mips/malta/gt_pci_bus_space.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*      $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $    */
-/*-
- * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
- *
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the NetBSD
- *	Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Christopher G. Demetriou
- *	for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-#include <mips/malta/gt_pci_bus_space.h>
-
-static bs_r_2_proto(gt_pci);
-static bs_r_4_proto(gt_pci);
-static bs_w_2_proto(gt_pci);
-static bs_w_4_proto(gt_pci);
-static bs_rm_2_proto(gt_pci);
-static bs_rm_4_proto(gt_pci);
-static bs_wm_2_proto(gt_pci);
-static bs_wm_4_proto(gt_pci);
-static bs_rr_2_proto(gt_pci);
-static bs_rr_4_proto(gt_pci);
-static bs_wr_2_proto(gt_pci);
-static bs_wr_4_proto(gt_pci);
-static bs_sm_2_proto(gt_pci);
-static bs_sm_4_proto(gt_pci);
-static bs_sr_2_proto(gt_pci);
-static bs_sr_4_proto(gt_pci);
-
-static struct bus_space gt_pci_space = {
-	/* cookie */
-	.bs_cookie =	(void *) 0,
-
-	/* mapping/unmapping */
-	.bs_map =	generic_bs_map,
-	.bs_unmap =	generic_bs_unmap,
-	.bs_subregion =	generic_bs_subregion,
-
-	/* allocation/deallocation */
-	.bs_alloc =	generic_bs_alloc,
-	.bs_free =	generic_bs_free,
-
-	/* barrier */
-	.bs_barrier =	generic_bs_barrier,
-
-	/* read (single) */
-	.bs_r_1 =	generic_bs_r_1,
-	.bs_r_2 =	gt_pci_bs_r_2,
-	.bs_r_4 =	gt_pci_bs_r_4,
-	.bs_r_8 =	NULL,
-
-	/* read multiple */
-	.bs_rm_1 =	generic_bs_rm_1,
-	.bs_rm_2 =	gt_pci_bs_rm_2,
-	.bs_rm_4 =	gt_pci_bs_rm_4,
-	.bs_rm_8 =	NULL,
-
-	/* read region */
-	.bs_rr_1 =	generic_bs_rr_1,
-	.bs_rr_2 =	gt_pci_bs_rr_2,
-	.bs_rr_4 =	gt_pci_bs_rr_4,
-	.bs_rr_8 =	NULL,
-
-	/* write (single) */
-	.bs_w_1 =	generic_bs_w_1,
-	.bs_w_2 =	gt_pci_bs_w_2,
-	.bs_w_4 =	gt_pci_bs_w_4,
-	.bs_w_8 =	NULL,
-
-	/* write multiple */
-	.bs_wm_1 =	generic_bs_wm_1,
-	.bs_wm_2 =	gt_pci_bs_wm_2,
-	.bs_wm_4 =	gt_pci_bs_wm_4,
-	.bs_wm_8 =	NULL,
-
-	/* write region */
-	.bs_wr_1 =	generic_bs_wr_1,
-	.bs_wr_2 =	gt_pci_bs_wr_2,
-	.bs_wr_4 =	gt_pci_bs_wr_4,
-	.bs_wr_8 =	NULL,
-
-	/* set multiple */
-	.bs_sm_1 =	generic_bs_sm_1,
-	.bs_sm_2 =	gt_pci_bs_sm_2,
-	.bs_sm_4 =	gt_pci_bs_sm_4,
-	.bs_sm_8 =	NULL,
-
-	/* set region */
-	.bs_sr_1 =	generic_bs_sr_1,
-	.bs_sr_2 =	gt_pci_bs_sr_2,
-	.bs_sr_4 =	gt_pci_bs_sr_4,
-	.bs_sr_8 =	NULL,
-
-	/* copy */
-	.bs_c_1 =	generic_bs_c_1,
-	.bs_c_2 =	generic_bs_c_2,
-	.bs_c_4 =	generic_bs_c_4,
-	.bs_c_8 =	NULL,
-
-	/* read (single) stream */
-	.bs_r_1_s =	generic_bs_r_1,
-	.bs_r_2_s =	generic_bs_r_2,
-	.bs_r_4_s =	generic_bs_r_4,
-	.bs_r_8_s =	NULL,
-
-	/* read multiple stream */
-	.bs_rm_1_s =	generic_bs_rm_1,
-	.bs_rm_2_s =	generic_bs_rm_2,
-	.bs_rm_4_s =	generic_bs_rm_4,
-	.bs_rm_8_s =	NULL,
-
-	/* read region stream */
-	.bs_rr_1_s =	generic_bs_rr_1,
-	.bs_rr_2_s =	generic_bs_rr_2,
-	.bs_rr_4_s =	generic_bs_rr_4,
-	.bs_rr_8_s =	NULL,
-
-	/* write (single) stream */
-	.bs_w_1_s =	generic_bs_w_1,
-	.bs_w_2_s =	generic_bs_w_2,
-	.bs_w_4_s =	generic_bs_w_4,
-	.bs_w_8_s =	NULL,
-
-	/* write multiple stream */
-	.bs_wm_1_s =	generic_bs_wm_1,
-	.bs_wm_2_s =	generic_bs_wm_2,
-	.bs_wm_4_s =	generic_bs_wm_4,
-	.bs_wm_8_s =	NULL,
-
-	/* write region stream */
-	.bs_wr_1_s =	generic_bs_wr_1,
-	.bs_wr_2_s =	generic_bs_wr_2,
-	.bs_wr_4_s =	generic_bs_wr_4,
-	.bs_wr_8_s =	NULL,
-};
-
-#define rd16(a) le16toh(readw(a))
-#define rd32(a) le32toh(readl(a))
-#define wr16(a, v) writew(a, htole16(v))
-#define wr32(a, v) writel(a, htole32(v))
-
-/* generic bus_space tag */
-bus_space_tag_t gt_pci_bus_space = &gt_pci_space;
-
-uint16_t
-gt_pci_bs_r_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd16(handle + offset));
-}
-
-uint32_t
-gt_pci_bs_r_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd32(handle + offset));
-}
-
-void
-gt_pci_bs_rm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd16(baddr);
-}
-
-void
-gt_pci_bs_rm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd32(baddr);
-}
-
-/*
- * Read `count' 2 or 4 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-gt_pci_bs_rr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd16(baddr);
-		baddr += 2;
-	}
-}
-
-void
-gt_pci_bs_rr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd32(baddr);
-		baddr += 4;
-	}
-}
-
-/*
- * Write the 2 or 4 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-void
-gt_pci_bs_w_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value)
-{
-
-	wr16(bsh + offset, value);
-}
-
-void
-gt_pci_bs_w_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value)
-{
-
-	wr32(bsh + offset, value);
-}
-
-/*
- * Write `count' 2 or 4 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-void
-gt_pci_bs_wm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr16(baddr, *addr++);
-}
-
-void
-gt_pci_bs_wm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr32(baddr, *addr++);
-}
-
-/*
- * Write `count' 2 or 4 byte quantities from the buffer provided
- * to bus space described by tag/handle starting at `offset'.
- */
-void
-gt_pci_bs_wr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr16(baddr, *addr++);
-		baddr += 2;
-	}
-}
-
-void
-gt_pci_bs_wr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr32(baddr, *addr++);
-		baddr += 4;
-	}
-}
-
-/*
- * Write the 2 or 4 byte value `val' to bus space described
- * by tag/handle/offset `count' times.
- */
-void
-gt_pci_bs_sm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr16(addr, value);
-}
-
-void
-gt_pci_bs_sm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr32(addr, value);
-}
-
-/*
- * Write `count' 2 or 4 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-void
-gt_pci_bs_sr_2(void *t, bus_space_handle_t bsh,
-		       bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		wr16(addr, value);
-}
-
-void
-gt_pci_bs_sr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		wr32(addr, value);
-}
diff --git a/sys/mips/malta/gt_pci_bus_space.h b/sys/mips/malta/gt_pci_bus_space.h
deleted file mode 100644
index 963808b647c8..000000000000
--- a/sys/mips/malta/gt_pci_bus_space.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef __GT_PCI_BUS_SPACEH__
-#define __GT_PCI_BUS_SPACEH__
-
-extern bus_space_tag_t gt_pci_bus_space;
-
-#endif /* __GT_PCI_BUS_SPACEH__ */
diff --git a/sys/mips/malta/gtreg.h b/sys/mips/malta/gtreg.h
deleted file mode 100644
index 40d4d25300af..000000000000
--- a/sys/mips/malta/gtreg.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*	$NetBSD: gtreg.h,v 1.2 2005/12/24 20:07:03 perry Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define GT_REGVAL(x)	*((volatile u_int32_t *) \
-			    (MIPS_PHYS_TO_KSEG1(MALTA_CORECTRL_BASE + (x))))
-
-/* CPU Configuration Register Map */
-#define	GT_CPU_INT	0x000
-#define	GT_MULTIGT	0x120
-
-/* CPU Address Decode Register Map */
-
-/* CPU Error Report Register Map */
-
-/* CPU Sync Barrier Register Map */
-
-/* SDRAM and Device Address Decode Register Map */
-
-/* SDRAM Configuration Register Map */
-
-/* SDRAM Parameters Register Map */
-
-/* ECC Register Map */
-
-/* Device Parameters Register Map */
-
-/* DMA Record Register Map */
-
-/* DMA Arbiter Register Map */
-
-/* Timer/Counter Register Map */
-//#define	GT_TC_0		0x850
-//#define	GT_TC_1		0x854
-//#define	GT_TC_2		0x858
-//#define	GT_TC_3		0x85c
-//#define	GT_TC_CONTROL	0x864
-
-/* PCI Internal Register Map */
-#define	GT_PCI0_CFG_ADDR	0xcf8
-#define	GT_PCI0_CFG_DATA	0xcfc
-#define	GT_PCI0_INTR_ACK	0xc34
-
-/* Interrupts Register Map */
-#define	GT_INTR_CAUSE	0xc18
-#define	 GTIC_INTSUM	 0x00000001
-#define	 GTIC_MEMOUT	 0x00000002
-#define	 GTIC_DMAOUT	 0x00000004
-#define	 GTIC_CPUOUT	 0x00000008
-#define	 GTIC_DMA0COMP	 0x00000010
-#define	 GTIC_DMA1COMP	 0x00000020
-#define	 GTIC_DMA2COMP	 0x00000040
-#define	 GTIC_DMA3COMP	 0x00000080
-#define	 GTIC_T0EXP	 0x00000100
-#define	 GTIC_T1EXP	 0x00000200
-#define	 GTIC_T2EXP	 0x00000400
-#define	 GTIC_T3EXP	 0x00000800
-#define	 GTIC_MASRDERR0	 0x00001000
-#define	 GTIC_SLVWRERR0	 0x00002000
-#define	 GTIC_MASWRERR0	 0x00004000
-#define	 GTIC_SLVRDERR0	 0x00008000
-#define	 GTIC_ADDRERR0	 0x00010000
-#define	 GTIC_MEMERR	 0x00020000
-#define	 GTIC_MASABORT0	 0x00040000
-#define	 GTIC_TARABORT0	 0x00080000
-#define	 GTIC_RETRYCNT0	 0x00100000
-#define	 GTIC_PMCINT_0	 0x00200000
-#define	 GTIC_CPUINT	 0x0c300000
-#define	 GTIC_PCINT	 0xc3000000
-#define	 GTIC_CPUINTSUM	 0x40000000
-#define	 GTIC_PCIINTSUM	 0x80000000
-
-/* PCI Configuration Register Map */
-//#define	GT_PCICONFIGBASE	0
-//#define	GT_PCIDID		BONITO(GT_PCICONFIGBASE + 0x00)
-//#define	GT_PCICMD		BONITO(GT_PCICONFIGBASE + 0x04)
-//#define	GT_PCICLASS		BONITO(GT_PCICONFIGBASE + 0x08)
-//#define	GT_PCILTIMER		BONITO(GT_PCICONFIGBASE + 0x0c)
-//#define	GT_PCIBASE0		BONITO(GT_PCICONFIGBASE + 0x10)
-//#define	GT_PCIBASE1		BONITO(GT_PCICONFIGBASE + 0x14)
-//#define	GT_PCIBASE2		BONITO(GT_PCICONFIGBASE + 0x18)
-//#define	GT_PCIEXPRBASE		BONITO(GT_PCICONFIGBASE + 0x30)
-//#define	GT_PCIINT		BONITO(GT_PCICONFIGBASE + 0x3c)
-
-/* PCI Configuration, Function 1, Register Map */
-
-/* I2O Support Register Map */
diff --git a/sys/mips/malta/gtvar.h b/sys/mips/malta/gtvar.h
deleted file mode 100644
index ac937fe6fd8b..000000000000
--- a/sys/mips/malta/gtvar.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-#ifndef _GTVAR_H_
-#define _GTVAR_H_
-
-#include <sys/rman.h>
-
-struct gt_softc {
-	device_t dev;
-};
-
-#endif /* _GTVAR_H_ */
diff --git a/sys/mips/malta/malta_machdep.c b/sys/mips/malta/malta_machdep.c
deleted file mode 100644
index fd2b00355f89..000000000000
--- a/sys/mips/malta/malta_machdep.c
+++ /dev/null
@@ -1,371 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/pmap.h>
-#include <machine/trap.h>
-
-#ifdef TICK_USE_YAMON_FREQ
-#include <mips/malta/yamon.h>
-#endif
-
-#ifdef TICK_USE_MALTA_RTC
-#include <mips/malta/maltareg.h>
-#include <isa/rtc.h>
-#endif
-
-#include <mips/malta/maltareg.h>
-
-extern int	*edata;
-extern int	*end;
-
-void	lcd_init(void);
-void	lcd_puts(char *);
-void	malta_reset(void);
-
-/*
- * Temporary boot environment used at startup.
- */
-static char boot1_env[4096];
-
-/*
- * Offsets to MALTA LCD characters.
- */
-static int malta_lcd_offs[] = {
-	MALTA_ASCIIPOS0,
-	MALTA_ASCIIPOS1,
-	MALTA_ASCIIPOS2,
-	MALTA_ASCIIPOS3,
-	MALTA_ASCIIPOS4,
-	MALTA_ASCIIPOS5,
-	MALTA_ASCIIPOS6,
-	MALTA_ASCIIPOS7
-};
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-/*
- * Put character to Malta LCD at given position.
- */
-static void
-malta_lcd_putc(int pos, char c)
-{
-	void *addr;
-	char *ch;
-
-	if (pos < 0 || pos > 7)
-		return;
-	addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]);
-	ch = (char *)MIPS_PHYS_TO_KSEG0(addr);
-	*ch = c;
-}
-
-/*
- * Print given string on LCD.
- */
-static void
-malta_lcd_print(char *str)
-{
-	int i;
-
-	if (str == NULL)
-		return;
-
-	for (i = 0; *str != '\0'; i++, str++)
-		malta_lcd_putc(i, *str);
-}
-
-void
-lcd_init(void)
-{
-	malta_lcd_print("FreeBSD_");
-}
-
-void
-lcd_puts(char *s)
-{
-	malta_lcd_print(s);
-}
-
-#ifdef TICK_USE_MALTA_RTC
-static __inline uint8_t
-malta_rtcin(uint8_t addr)
-{
-
-	*((volatile uint8_t *)
-	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
-	return (*((volatile uint8_t *)
-	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))));
-}
-
-static __inline void
-malta_writertc(uint8_t addr, uint8_t val)
-{
-
-	*((volatile uint8_t *)
-	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
-	*((volatile uint8_t *)
-	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val;
-}
-#endif
-
-static void
-mips_init(unsigned long memsize, uint64_t ememsize)
-{
-	int i;
-
-	for (i = 0; i < PHYS_AVAIL_ENTRIES; i++) {
-		phys_avail[i] = 0;
-	}
-
-	/*
-	 * memsize is the amount of RAM available below 256MB.
-	 * ememsize is the total amount of RAM available.
-	 *
-	 * The second bank starts at 0x90000000.
-	 */
-
-	/* phys_avail regions are in bytes */
-	phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-	phys_avail[1] = memsize;
-	dump_avail[0] = 0;
-	dump_avail[1] = phys_avail[1];
-
-	/* Only specify the extended region if it's set */
-	if (ememsize > memsize) {
-		phys_avail[2] = 0x90000000;
-		phys_avail[3] = 0x90000000 + (ememsize - memsize);
-		dump_avail[2] = phys_avail[2];
-		dump_avail[3] = phys_avail[3];
-	}
-
-	/* XXX realmem assigned in the caller of mips_init() */
-	physmem = realmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-/*
- * Perform a board-level soft-reset.
- * Note that this is not emulated by gxemul.
- */
-void
-platform_reset(void)
-{
-	char *c;
-
-	c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES);
-	*c = MALTA_GORESET;
-}
-
-static uint64_t
-malta_cpu_freq(void)
-{
-	uint64_t platform_counter_freq = 0;
-
-#if defined(TICK_USE_YAMON_FREQ)
-	/*
-	 * If we are running on a board which uses YAMON firmware,
-	 * then query CPU pipeline clock from the syscon object.
-	 * If unsuccessful, use hard-coded default.
-	 */
-	platform_counter_freq = yamon_getcpufreq();
-
-#elif defined(TICK_USE_MALTA_RTC)
-	/*
-	 * If we are running on a board with the MC146818 RTC,
-	 * use it to determine CPU pipeline clock frequency.
-	 */
-	u_int64_t counterval[2];
-
-	/* Set RTC to binary mode. */
-	malta_writertc(RTC_STATUSB, (malta_rtcin(RTC_STATUSB) | RTCSB_BCD));
-
-	/* Busy-wait for falling edge of RTC update. */
-	while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
-		;
-	while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
-		;
-	counterval[0] = mips_rd_count();
-
-	/* Busy-wait for falling edge of RTC update. */
-	while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
-		;
-	while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
-		;
-	counterval[1] = mips_rd_count();
-
-	platform_counter_freq = counterval[1] - counterval[0];
-#endif
-
-	if (platform_counter_freq == 0)
-		platform_counter_freq = MIPS_DEFAULT_HZ;
-
-	return (platform_counter_freq);
-}
-
-void
-platform_start(__register_t a0, __register_t a1,  __register_t a2, 
-    __register_t a3)
-{
-	vm_offset_t kernend;
-	uint64_t platform_counter_freq;
-	int argc = a0;
-	int32_t *argv = (int32_t*)a1;
-	int32_t *envp = (int32_t*)a2;
-	unsigned int memsize = a3;
-	uint64_t ememsize = 0;
-	int i;
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	mips_pcpu0_init();
-	platform_counter_freq = malta_cpu_freq();
-	mips_timer_early_init(platform_counter_freq);
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-
-	cninit();
-	printf("entry: platform_start()\n");
-
-	bootverbose = 1;
-
-	/* 
-	 * YAMON uses 32bit pointers to strings so
-	 * convert them to proper type manually
-	 */
-
-	if (bootverbose) {
-		printf("cmd line: ");
-		for (i = 0; i < argc; i++)
-			printf("%s ", (char*)(intptr_t)argv[i]);
-		printf("\n");
-	}
-
-	if (bootverbose)
-		printf("envp:\n");
-
-	/*
-	 * Parse the environment for things like ememsize.
-	 */
-	for (i = 0; envp[i]; i += 2) {
-		const char *a, *v;
-
-		a = (char *)(intptr_t)envp[i];
-		v = (char *)(intptr_t)envp[i+1];
-
-		if (bootverbose)
-			printf("\t%s = %s\n", a, v);
-
-		if (strcmp(a, "ememsize") == 0) {
-			ememsize = strtoul(v, NULL, 0);
-		}
-	}
-
-	if (bootverbose) {
-		printf("memsize = %llu (0x%08x)\n",
-		    (unsigned long long) memsize, memsize);
-		printf("ememsize = %llu\n", (unsigned long long) ememsize);
-
-#ifdef __mips_o32
-		/*
-		 * For O32 phys_avail[] can't address memory beyond 2^32,
-		 * so cap extended memory to 2GB minus one page.
-		 */
-		if (ememsize >= 2ULL * 1024 * 1024 * 1024)
-			ememsize = 2ULL * 1024 * 1024 * 1024 - PAGE_SIZE;
-#endif
-	}
-
-	/*
-	 * For <= 256MB RAM amounts, ememsize should equal memsize.
-	 * For > 256MB RAM amounts it's the total RAM available;
-	 * split between two banks.
-	 *
-	 * XXX TODO: just push realmem assignment into mips_init() ?
-	 */
-	realmem = btoc(ememsize);
-	mips_init(memsize, ememsize);
-
-	mips_timer_init_params(platform_counter_freq, 0);
-}
diff --git a/sys/mips/malta/malta_mp.c b/sys/mips/malta/malta_mp.c
deleted file mode 100644
index 64aeb3bee93c..000000000000
--- a/sys/mips/malta/malta_mp.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/*-
- * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
- * All rights reserved.
- *
- * Portions of this software were developed by SRI International and the
- * University of Cambridge Computer Laboratory under DARPA/AFRL contract
- * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Portions of this software were developed by the University of Cambridge
- * Computer Laboratory as part of the CTSRD Project, with support from the
- * UK Higher Education Innovation Fund (HEIF).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/smp.h>
-#include <sys/systm.h>
-
-#include <machine/cpufunc.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/smp.h>
-
-#define	VPECONF0_VPA	(1 << 0)
-#define	MVPCONTROL_VPC	(1 << 1)
-#define	MVPCONF0_PVPE_SHIFT	10
-#define	MVPCONF0_PVPE_MASK	(0xf << MVPCONF0_PVPE_SHIFT)
-#define	TCSTATUS_A	(1 << 13)
-
-unsigned malta_ap_boot = ~0;
-
-#define	C_SW0		(1 << 8)
-#define	C_SW1		(1 << 9)
-#define	C_IRQ0		(1 << 10)
-#define	C_IRQ1		(1 << 11)
-#define	C_IRQ2		(1 << 12)
-#define	C_IRQ3		(1 << 13)
-#define	C_IRQ4		(1 << 14)
-#define	C_IRQ5		(1 << 15)
-
-static inline void
-evpe(void)
-{
-	__asm __volatile(
-	"	.set push			\n"
-	"	.set noreorder			\n"
-	"	.set noat			\n"
-	"	.set mips32r2			\n"
-	"	.word	0x41600021	# evpe	\n"
-	"	ehb				\n"
-	"	.set pop			\n");
-}
-
-static inline void
-ehb(void)
-{
-	__asm __volatile(
-	"	.set mips32r2	\n"
-	"	ehb		\n"
-	"	.set mips0	\n");
-}
-
-#define	mttc0(rd, sel, val)						\
-({									\
-	__asm __volatile(						\
-	"	.set push					\n"	\
-	"	.set mips32r2					\n"	\
-	"	.set noat					\n"	\
-	"	move	$1, %0					\n"	\
-	"	.word 0x41810000 | (" #rd " << 11) | " #sel "	\n"	\
-	"	.set pop					\n"	\
-	:: "r" (val));							\
-})
-
-#define	mftc0(rt, sel)							\
-({									\
-	unsigned long __res;						\
-	__asm __volatile(						\
-	"	.set push					\n"	\
-	"	.set mips32r2					\n"	\
-	"	.set noat					\n"	\
-	"	.word 0x41000800 | (" #rt " << 16) | " #sel "	\n"	\
-	"	move	%0, $1					\n"	\
-	"	.set pop					\n"	\
-	: "=r" (__res));						\
-	 __res;								\
-})
-
-#define	write_c0_register32(reg, sel, val)				\
-({									\
-	__asm __volatile(						\
-	"	.set push					\n"	\
-	"	.set mips32					\n"	\
-	"	mtc0	%0, $%1, %2				\n"	\
-	"	.set pop					\n"	\
-	:: "r" (val), "i" (reg), "i" (sel));				\
-})
-
-#define	read_c0_register32(reg, sel)					\
-({									\
-	uint32_t __retval;						\
-	__asm __volatile(						\
-	"	.set push					\n"	\
-	"	.set mips32					\n"	\
-	"	mfc0	%0, $%1, %2				\n"	\
-	"	.set pop					\n"	\
-	: "=r" (__retval) : "i" (reg), "i" (sel));			\
-	__retval;							\
-})
-
-static void
-set_thread_context(int cpuid)
-{
-	uint32_t reg;
-
-	reg = read_c0_register32(1, 1);
-	reg &= ~(0xff);
-	reg |= cpuid;
-	write_c0_register32(1, 1, reg);
-
-	ehb();
-}
-
-void
-platform_ipi_send(int cpuid)
-{
-	uint32_t reg;
-
-	set_thread_context(cpuid);
-
-	/* Set cause */
-	reg = mftc0(13, 0);
-	reg |= (C_SW1);
-	mttc0(13, 0, reg);
-}
-
-void
-platform_ipi_clear(void)
-{
-	uint32_t reg;
-
-	reg = mips_rd_cause();
-	reg &= ~(C_SW1);
-	mips_wr_cause(reg);
-}
-
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (-1);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (1);
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	uint32_t clock_int_mask;
-	uint32_t ipi_intr_mask;
-
-	/*
-	 * Clear any pending IPIs.
-	 */
-	platform_ipi_clear();
-
-	/*
-	 * Unmask the clock and ipi interrupts.
-	 */
-	ipi_intr_mask = soft_int_mask(platform_ipi_softintr_num());
-	clock_int_mask = hard_int_mask(5);
-	set_intr_mask(ipi_intr_mask | clock_int_mask);
-
-	mips_wbflush();
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	uint32_t i, ncpus, reg;
-
-	reg = mftc0(0, 2);
-	ncpus = ((reg & MVPCONF0_PVPE_MASK) >> MVPCONF0_PVPE_SHIFT) + 1;
-
-	CPU_ZERO(mask);
-	for (i = 0; i < ncpus; i++)
-		CPU_SET(i, mask);
-}
-
-struct cpu_group *
-platform_smp_topo(void)
-{
-
-	return (smp_topo_none());
-}
-
-int
-platform_start_ap(int cpuid)
-{
-	uint32_t reg;
-	int timeout;
-
-	/* Enter into configuration */
-	reg = read_c0_register32(0, 1);
-	reg |= (MVPCONTROL_VPC);
-	write_c0_register32(0, 1, reg);
-
-	set_thread_context(cpuid);
-
-	/*
-	 * Hint: how to set entry point.
-	 * reg = 0x80000000;
-	 * mttc0(2, 3, reg);
-	 */
-
-	/* Enable thread */
-	reg = mftc0(2, 1);
-	reg |= (TCSTATUS_A);
-	mttc0(2, 1, reg);
-
-	/* Unhalt CPU core */
-	mttc0(2, 4, 0);
-
-	/* Activate VPE */
-	reg = mftc0(1, 2);
-	reg |= (VPECONF0_VPA);
-	mttc0(1, 2, reg);
-
-	/* Out of configuration */
-	reg = read_c0_register32(0, 1);
-	reg &= ~(MVPCONTROL_VPC);
-	write_c0_register32(0, 1, reg);
-
-	evpe();
-
-	if (atomic_cmpset_32(&malta_ap_boot, ~0, cpuid) == 0)
-		return (-1);
-
-	printf("Waiting for cpu%d to start\n", cpuid);
-
-	timeout = 100;
-	do {
-		DELAY(1000);
-		if (atomic_cmpset_32(&malta_ap_boot, 0, ~0) != 0) {
-			printf("CPU %d started\n", cpuid);
-			return (0);
-		}
-	} while (timeout--);
-
-	printf("CPU %d failed to start\n", cpuid);
-
-	return (0);
-}
diff --git a/sys/mips/malta/maltareg.h b/sys/mips/malta/maltareg.h
deleted file mode 100644
index 1b008e5891d2..000000000000
--- a/sys/mips/malta/maltareg.h
+++ /dev/null
@@ -1,244 +0,0 @@
-/*	$NetBSD: maltareg.h,v 1.1 2002/03/07 14:44:04 simonb Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
-	Memory Map
-
-	0000.0000 *	128MB	Typically SDRAM (on Core Board)
-	0800.0000 *	256MB	Typically PCI
-	1800.0000 *	 62MB	Typically PCI
-	1be0.0000 *	  2MB	Typically System controller's internal registers
-	1c00.0000 *	 32MB	Typically not used
-	1e00.0000	  4MB	Monitor Flash
-	1e40.0000	 12MB	reserved
-	1f00.0000	 12MB	Switches
-				LEDs
-				ASCII display
-				Soft reset
-				FPGA revision number
-				CBUS UART (tty2)
-				General Purpose I/O
-				I2C controller
-	1f10.0000 *	 11MB	Typically System Controller specific
-	1fc0.0000	  4MB	Maps to Monitor Flash
-	1fd0.0000 *	  3MB	Typically System Controller specific
-
-		  * depends on implementation of the Core Board and of software
- */
-
-/*
-	CPU interrupts
-
-		NMI	South Bridge or NMI button
-		 0	South Bridge INTR
-		 1	South Bridge SMI
-		 2	CBUS UART (tty2)
-		 3	COREHI (Core Card)
-		 4	CORELO (Core Card)
-		 5	Not used, driven inactive (typically CPU internal timer interrupt
-
-	IRQ mapping (as used by YAMON)
-
-		0	Timer		South Bridge
-		1	Keyboard	SuperIO
-		2			Reserved by South Bridge (for cascading)
-		3	UART (tty1)	SuperIO
-		4	UART (tty0)	SuperIO
-		5			Not used
-		6	Floppy Disk	SuperIO
-		7	Parallel Port	SuperIO
-		8	Real Time Clock	South Bridge
-		9	I2C bus		South Bridge
-		10	PCI A,B,eth	PCI slot 1..4, Ethernet
-		11	PCI C,audio	PCI slot 1..4, Audio, USB (South Bridge)
-			PCI D,USB
-		12	Mouse		SuperIO
-		13			Reserved by South Bridge
-		14	Primary IDE	Primary IDE slot
-		15	Secondary IDE	Secondary IDE slot/Compact flash connector
- */
-
-#define	MALTA_SYSTEMRAM_BASE	0x00000000ul  /* System RAM:	*/
-#define	MALTA_SYSTEMRAM_SIZE	0x08000000  /*   128 MByte	*/
-
-#define	MALTA_PCIMEM1_BASE	0x08000000ul  /* PCI 1 memory:	*/
-#define	MALTA_PCIMEM1_SIZE	0x08000000  /*   128 MByte	*/
-
-#define	MALTA_PCIMEM2_BASE	0x10000000ul  /* PCI 2 memory:	*/
-#define	MALTA_PCIMEM2_SIZE	0x08000000  /*   128 MByte	*/
-
-#define	MALTA_PCIMEM3_BASE	0x18000000ul  /* PCI 3 memory	*/
-#define	MALTA_PCIMEM3_SIZE	0x03e00000  /*    62 MByte	*/
-
-#define	MALTA_CORECTRL_BASE	0x1be00000ul  /* Core control:	*/
-#define	MALTA_CORECTRL_SIZE	0x00200000  /*     2 MByte	*/
-
-#define	MALTA_RESERVED_BASE1	0x1c000000ul  /* Reserved:	*/
-#define	MALTA_RESERVED_SIZE1	0x02000000  /*    32 MByte	*/
-
-#define	MALTA_MONITORFLASH_BASE	0x1e000000ul  /* Monitor Flash:	*/
-#define	MALTA_MONITORFLASH_SIZE	0x003e0000  /*     4 MByte	*/
-#define	MALTA_MONITORFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB */
-
-#define	MALTA_FILEFLASH_BASE	0x1e3e0000ul /* File Flash (for monitor): */
-#define	MALTA_FILEFLASH_SIZE	0x00020000 /*   128 KByte	*/
-
-#define	MALTA_FILEFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB	*/
-
-#define	MALTA_RESERVED_BASE2	0x1e400000ul  /* Reserved:	*/
-#define	MALTA_RESERVED_SIZE2	0x00c00000  /*    12 MByte	*/
-
-#define	MALTA_FPGA_BASE		0x1f000000ul  /* FPGA:		*/
-#define	MALTA_FPGA_SIZE		0x00c00000  /*    12 MByte	*/
-
-#define	MALTA_NMISTATUS		(MALTA_FPGA_BASE + 0x24)
-#define	 MALTA_NMI_SB		 0x2	/* Pending NMI from the South Bridge */
-#define	 MALTA_NMI_ONNMI	 0x1	/* Pending NMI from the ON/NMI push button */
-
-#define	MALTA_NMIACK		(MALTA_FPGA_BASE + 0x104)
-#define	 MALTA_NMIACK_ONNMI	 0x1	/* Write 1 to acknowledge ON/NMI */
-
-#define	MALTA_SWITCH		(MALTA_FPGA_BASE + 0x200)
-#define	 MALTA_SWITCH_MASK	 0xff	/* settings of DIP switch S2 */
-
-#define	MALTA_STATUS		(MALTA_FPGA_BASE + 0x208)
-#define	 MALTA_ST_MFWR		 0x10	/* Monitor Flash is write protected (JP1) */
-#define	 MALTA_S54		 0x08	/* switch S5-4 - set YAMON factory default mode */
-#define	 MALTA_S53		 0x04	/* switch S5-3 */
-#define	 MALTA_BIGEND		 0x02	/* switch S5-2 - big endian mode */
-
-#define	MALTA_JMPRS		(MALTA_FPGA_BASE + 0x210)
-#define	 MALTA_JMPRS_PCICLK	 0x1c	/* PCI clock frequency */
-#define	 MALTA_JMPRS_EELOCK	 0x02	/* I2C EEPROM is write protected */
-
-#define	MALTA_LEDBAR		(MALTA_FPGA_BASE + 0x408)
-#define	MALTA_ASCIIWORD		(MALTA_FPGA_BASE + 0x410)
-#define	MALTA_ASCII_BASE	(MALTA_FPGA_BASE + 0x418)
-#define	MALTA_ASCIIPOS0		0x00
-#define	MALTA_ASCIIPOS1		0x08
-#define	MALTA_ASCIIPOS2		0x10
-#define	MALTA_ASCIIPOS3		0x18
-#define	MALTA_ASCIIPOS4		0x20
-#define	MALTA_ASCIIPOS5		0x28
-#define	MALTA_ASCIIPOS6		0x30
-#define	MALTA_ASCIIPOS7		0x38
-
-#define	MALTA_SOFTRES		(MALTA_FPGA_BASE + 0x500)
-#define	 MALTA_GORESET		 0x42	/* write this to MALTA_SOFTRES for board reset */
-
-/*
- * BRKRES is the number of milliseconds before a "break" on tty will
- * trigger a reset.  A value of 0 will disable the reset.
- */
-#define	MALTA_BRKRES		(MALTA_FPGA_BASE + 0x508)
-#define	 MALTA_BRKRES_MASK	 0xff
-
-#define	MALTA_CBUSUART		(MALTA_FPGA_BASE + 0x900)
-/* 16C550C UART, 8 bit registers on 8 byte boundaries */
-/* RXTX    0x00 */
-/* INTEN   0x08 */
-/* IIFIFO  0x10 */
-/* LCTRL   0x18 */
-/* MCTRL   0x20 */
-/* LSTAT   0x28 */
-/* MSTAT   0x30 */
-/* SCRATCH 0x38 */
-#define	MALTA_CBUSUART_INTR	2
-
-#define	MALTA_GPIO_BASE		(MALTA_FPGA_BASE + 0xa00)
-#define	MALTA_GPOUT		0x0
-#define	MALTA_GPINP		0x8
-
-#define	MALTA_I2C_BASE		(MALTA_FPGA_BASE + 0xb00)
-#define	MALTA_I2CINP		0x00
-#define	MALTA_I2COE		0x08
-#define	MALTA_I2COUT		0x10
-#define	MALTA_I2CSEL		0x18
-
-#define	MALTA_BOOTROM_BASE	0x1fc00000ul  /* Boot ROM:	*/
-#define	MALTA_BOOTROM_SIZE	0x00400000  /*     4 MByte	*/
-
-#define	MALTA_REVISION		0x1fc00010ul
-#define	 MALTA_REV_FPGRV	 0xff0000	/* CBUS FPGA revision */
-#define	 MALTA_REV_CORID	 0x00fc00	/* Core Board ID */
-#define	 MALTA_REV_CORRV	 0x000300	/* Core Board Revision */
-#define	 MALTA_REV_PROID	 0x0000f0	/* Product ID */
-#define	 MALTA_REV_PRORV	 0x00000f	/* Product Revision */
-
-/* PCI definitions */
-#define	MALTA_SOUTHBRIDGE_INTR	   0
-
-#define MALTA_PCI0_IO_BASE         MALTA_PCIMEM3_BASE
-#define MALTA_PCI0_ADDR( addr )    (MALTA_PCI0_IO_BASE + (addr))
-
-#define MALTA_RTCADR               0x70 // MALTA_PCI_IO_ADDR8(0x70)
-#define MALTA_RTCDAT               0x71 // MALTA_PCI_IO_ADDR8(0x71)
-
-#define MALTA_SMSC_COM1_ADR        0x3f8
-#define MALTA_SMSC_COM2_ADR        0x2f8
-#define MALTA_UART0ADR             MALTA_PCI0_ADDR(MALTA_SMSC_COM1_ADR)
-#define MALTA_UART1ADR             MALTA_SMSC_COM2_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_COM2_ADR)
-
-#define MALTA_SMSC_1284_ADR        0x378
-#define MALTA_1284ADR              MALTA_SMSC_1284_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_1284_ADR)
-
-#define MALTA_SMSC_FDD_ADR         0x3f0
-#define MALTA_FDDADR               MALTA_SMSC_FDD_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_FDD_ADR)
-
-#define MALTA_SMSC_KYBD_ADR        0x60  /* Fixed 0x60, 0x64 */
-#define MALTA_KYBDADR              MALTA_SMSC_KYBD_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_KYBD_ADR)
-#define MALTA_SMSC_MOUSE_ADR       MALTA_SMSC_KYBD_ADR
-#define MALTA_MOUSEADR             MALTA_KYBDADR
-
-#define	MALTA_DMA_PCI_PCIBASE	0x00000000UL
-#define	MALTA_DMA_PCI_PHYSBASE	0x00000000UL
-#define	MALTA_DMA_PCI_SIZE	(256 * 1024 * 1024)
-
-#define	MALTA_DMA_ISA_PCIBASE	0x00800000UL
-#define	MALTA_DMA_ISA_PHYSBASE	0x00000000UL
-#define	MALTA_DMA_ISA_SIZE	(8 * 1024 * 1024)
-
-#ifndef _LOCORE
-void	led_bar(uint8_t);
-void	led_display_word(uint32_t);
-void	led_display_str(const char *);
-void	led_display_char(int, uint8_t);
-#endif
diff --git a/sys/mips/malta/obio.c b/sys/mips/malta/obio.c
deleted file mode 100644
index 00871bb84306..000000000000
--- a/sys/mips/malta/obio.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*	$NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * On-board device autoconfiguration support for Intel IQ80321
- * evaluation boards.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <mips/malta/maltareg.h>
-#include <mips/malta/obiovar.h>
-
-int	obio_probe(device_t);
-int	obio_attach(device_t);
-
-/*
- * A bit tricky and hackish. Since we need OBIO to rely
- * on PCI we make it pseudo-pci device. But there should 
- * be only one such device, so we use this static flag 
- * to prevent false positives on every real PCI device probe.
- */
-static int have_one = 0;
-
-int
-obio_probe(device_t dev)
-{
-	if (!have_one) {
-		have_one = 1;
-		return 0;
-	}
-	return (ENXIO);
-}
-
-int
-obio_attach(device_t dev)
-{
-	struct obio_softc *sc = device_get_softc(dev);
-
-	sc->oba_st = mips_bus_space_generic;
-	sc->oba_addr = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
-	sc->oba_size = MALTA_PCIMEM3_SIZE;
-	sc->oba_rman.rm_type = RMAN_ARRAY;
-	sc->oba_rman.rm_descr = "OBIO I/O";
-	if (rman_init(&sc->oba_rman) != 0 ||
-	    rman_manage_region(&sc->oba_rman,
-	    sc->oba_addr, sc->oba_addr + sc->oba_size) != 0)
-		panic("obio_attach: failed to set up I/O rman");
-	sc->oba_irq_rman.rm_type = RMAN_ARRAY;
-	sc->oba_irq_rman.rm_descr = "OBIO IRQ";
-
-	/* 
-	 * This module is intended for UART purposes only and
-	 * it's IRQ is 4
-	 */
-	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, 4, 4) != 0)
-		panic("obio_attach: failed to set up IRQ rman");
-
-	device_add_child(dev, "uart", 0);
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct resource *rv;
-	struct rman *rm;
-	bus_space_tag_t bt = 0;
-	bus_space_handle_t bh = 0;
-	struct obio_softc *sc = device_get_softc(bus);
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &sc->oba_irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		return (NULL);
-	case SYS_RES_IOPORT:
-		rm = &sc->oba_rman;
-		bt = sc->oba_st;
-		bh = sc->oba_addr;
-		start = bh;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) 
-		return (NULL);
-	if (type == SYS_RES_IRQ)
-		return (rv);
-	rman_set_rid(rv, *rid);
-	rman_set_bustag(rv, bt);
-	rman_set_bushandle(rv, bh);
-
-	if (0) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-	return (rv);
-
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	return (0);
-}
-static device_method_t obio_methods[] = {
-	DEVMETHOD(device_probe, obio_probe),
-	DEVMETHOD(device_attach, obio_attach),
-
-	DEVMETHOD(bus_alloc_resource, obio_alloc_resource),
-	DEVMETHOD(bus_activate_resource, obio_activate_resource),
-	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
-
-	{0, 0},
-};
-
-static driver_t obio_driver = {
-	"obio",
-	obio_methods,
-	sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, pci, obio_driver, obio_devclass, 0, 0);
diff --git a/sys/mips/malta/obiovar.h b/sys/mips/malta/obiovar.h
deleted file mode 100644
index 9f99c893d29f..000000000000
--- a/sys/mips/malta/obiovar.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
- */
-
-#ifndef _MALTA_OBIOVAR_H_
-#define	_MALTA_OBIOVAR_H_
-
-#include <sys/rman.h>
-
-struct obio_softc {
-	bus_space_tag_t oba_st;		/* bus space tag */
-	bus_addr_t oba_addr;		/* address of device */
-	bus_size_t oba_size;		/* size of device */
-	int oba_width;			/* bus width */
-	int oba_irq;			/* XINT interrupt bit # */
-	struct rman oba_rman;
-	struct rman oba_irq_rman;
-
-};
-extern struct bus_space obio_bs_tag;
-
-#endif /* _MALTA_OBIOVAR_H_ */
diff --git a/sys/mips/malta/std.malta b/sys/mips/malta/std.malta
deleted file mode 100644
index 5d175ba5260c..000000000000
--- a/sys/mips/malta/std.malta
+++ /dev/null
@@ -1,11 +0,0 @@
-# $FreeBSD$
-files	"../malta/files.malta"
-
-cpu		CPU_MALTA
-device		pci
-device		ata
-
-device		scbus		# SCSI bus (required for ATA/SCSI)
-device		cd		# CD
-device		da		# Direct Access (disks)
-device		pass		# Passthrough device (direct ATA/SCSI access)
diff --git a/sys/mips/malta/uart_bus_maltausart.c b/sys/mips/malta/uart_bus_maltausart.c
deleted file mode 100644
index a3fdf77f879c..000000000000
--- a/sys/mips/malta/uart_bus_maltausart.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/malta/maltareg.h>
-
-#include "uart_if.h"
-
-static int uart_malta_probe(device_t dev);
-
-extern struct uart_class malta_uart_class;
-
-static device_method_t uart_malta_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		uart_malta_probe),
-	DEVMETHOD(device_attach,	uart_bus_attach),
-	DEVMETHOD(device_detach,	uart_bus_detach),
-	{ 0, 0 }
-};
-
-static driver_t uart_malta_driver = {
-	uart_driver_name,
-	uart_malta_methods,
-	sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-static int
-uart_malta_probe(device_t dev)
-{
-	struct uart_softc *sc;
-
-	sc = device_get_softc(dev);
-	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
-	sc->sc_class = &uart_ns8250_class;
-	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
-	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
-	sc->sc_bas.bst = mips_bus_space_generic;
-	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
-	return(uart_bus_probe(dev, 0, 0, 0, 0, 0, 0));
-}
-
-DRIVER_MODULE(uart, obio, uart_malta_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/malta/uart_cpu_maltausart.c b/sys/mips/malta/uart_cpu_maltausart.c
deleted file mode 100644
index be5edfd4e50c..000000000000
--- a/sys/mips/malta/uart_cpu_maltausart.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- */
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/malta/maltareg.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-extern struct uart_ops malta_usart_ops;
-extern struct bus_space malta_bs_tag;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = mips_bus_space_generic;
-	di->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
-	di->bas.regshft = 0;
-	di->bas.rclk = 0;
-	di->baudrate = 0;	/* retain the baudrate configured by YAMON */
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = mips_bus_space_generic;
-	return (0);
-}
diff --git a/sys/mips/malta/yamon.c b/sys/mips/malta/yamon.c
deleted file mode 100644
index d2a30f2a42fe..000000000000
--- a/sys/mips/malta/yamon.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006-2008 Bruce M. Simpson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <mips/malta/yamon.h>
-
-char *
-yamon_getenv(char *name)
-{
-	char *value;
-	yamon_env_t *p;
-
-	value = NULL;
-	for (p = *fenvp; p->name != NULL; ++p) {
-	    if (!strcmp(name, p->name)) {
-		value = p->value;
-		break;
-	    }
-	}
-
-	return (value);
-}
-
-uint32_t
-yamon_getcpufreq(void)
-{
-	uint32_t freq;
-	int ret;
-
-	freq = 0;
-	ret = YAMON_SYSCON_READ(SYSCON_BOARD_CPU_CLOCK_FREQ_ID, &freq,
-	    sizeof(freq));
-	if (ret != 0)
-		freq = 0;
-
-	return (freq);
-}
diff --git a/sys/mips/malta/yamon.h b/sys/mips/malta/yamon.h
deleted file mode 100644
index aa2ee1a00bb1..000000000000
--- a/sys/mips/malta/yamon.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MALTA_YAMON_H_
-#define _MALTA_YAMON_H_
-
-#define YAMON_FUNCTION_BASE	0x1fc00500ul
-
-#define YAMON_PRINT_COUNT_OFS	(YAMON_FUNCTION_BASE + 0x04)
-#define YAMON_EXIT_OFS		(YAMON_FUNCTION_BASE + 0x20)
-#define YAMON_FLUSH_CACHE_OFS	(YAMON_FUNCTION_BASE + 0x2c)
-#define YAMON_PRINT_OFS		(YAMON_FUNCTION_BASE + 0x34)
-#define YAMON_REG_CPU_ISR_OFS	(YAMON_FUNCTION_BASE + 0x38)
-#define YAMON_DEREG_CPU_ISR_OFS	(YAMON_FUNCTION_BASE + 0x3c)
-#define YAMON_REG_IC_ISR_OFS	(YAMON_FUNCTION_BASE + 0x40)
-#define YAMON_DEREG_IC_ISR_OFS	(YAMON_FUNCTION_BASE + 0x44)
-#define YAMON_REG_ESR_OFS	(YAMON_FUNCTION_BASE + 0x48)
-#define YAMON_DEREG_ESR_OFS	(YAMON_FUNCTION_BASE + 0x4c)
-#define YAMON_GETCHAR_OFS	(YAMON_FUNCTION_BASE + 0x50)
-#define YAMON_SYSCON_READ_OFS	(YAMON_FUNCTION_BASE + 0x54)
-
-#define YAMON_FUNC(ofs)		((long)(*(int32_t *)(MIPS_PHYS_TO_KSEG0(ofs))))
-
-typedef void (*t_yamon_print_count)(uint32_t port, char *s, uint32_t count);
-#define YAMON_PRINT_COUNT(s, count) \
-	((t_yamon_print_count)(YAMON_FUNC(YAMON_PRINT_COUNT_OFS)))(0, s, count)
-
-typedef void (*t_yamon_exit)(uint32_t rc);
-#define YAMON_EXIT(rc) ((t_yamon_exit)(YAMON_FUNC(YAMON_EXIT_OFS)))(rc)
-
-typedef void (*t_yamon_print)(uint32_t port, const char *s);
-#define YAMON_PRINT(s) ((t_yamon_print)(YAMON_FUNC(YAMON_PRINT_OFS)))(0, s)
-
-typedef int (*t_yamon_getchar)(uint32_t port, char *ch);
-#define YAMON_GETCHAR(ch) \
-	((t_yamon_getchar)(YAMON_FUNC(YAMON_GETCHAR_OFS)))(0, ch)
-
-typedef int t_yamon_syscon_id;
-typedef int (*t_yamon_syscon_read)(t_yamon_syscon_id id, void *param,
-				   uint32_t size);
-#define YAMON_SYSCON_READ(id, param, size)				\
-	((t_yamon_syscon_read)(YAMON_FUNC(YAMON_SYSCON_READ_OFS)))	\
-	(id, param, size)
-
-typedef struct {
-	char *name;
-	char *value;
-} yamon_env_t;
-
-#define SYSCON_BOARD_CPU_CLOCK_FREQ_ID	34	/* UINT32 */
-#define SYSCON_BOARD_BUS_CLOCK_FREQ_ID	35	/* UINT32 */
-#define SYSCON_BOARD_PCI_FREQ_KHZ_ID	36	/* UINT32 */
-
-char*		yamon_getenv(char *name);
-uint32_t	yamon_getcpufreq(void);
-
-extern yamon_env_t *fenvp[];
-
-#endif /* _MALTA_YAMON_H_ */
diff --git a/sys/mips/mediatek/fdt_reset.c b/sys/mips/mediatek/fdt_reset.c
deleted file mode 100644
index d6674e2f4d65..000000000000
--- a/sys/mips/mediatek/fdt_reset.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * Copyright (c) 2014 Ian Lepore <ian@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/queue.h>
-#include <sys/systm.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "fdt_reset_if.h"
-#include <mips/mediatek/fdt_reset.h>
-
-/*
- * Loop through all the tuples in the resets= property for a device, asserting
- * or deasserting each reset.
- *
- * Be liberal about errors for now: warn about a failure to (de)assert but keep
- * trying with any other resets in the list.  Return ENXIO if any errors were
- * found, and let the caller decide whether the problem is fatal.
- */
-static int
-assert_deassert_all(device_t consumer, boolean_t assert)
-{
-	phandle_t rnode;
-	device_t resetdev;
-	int resetnum, err, i, ncells;
-	uint32_t *resets;
-	boolean_t anyerrors;
-
-	rnode = ofw_bus_get_node(consumer);
-	ncells = OF_getencprop_alloc_multi(rnode, "resets", sizeof(*resets),
-	    (void **)&resets);
-	if (!assert && ncells < 2) {
-		device_printf(consumer, "Warning: No resets specified in fdt "
-		    "data; device may not function.");
-		return (ENXIO);
-	}
-	anyerrors = false;
-	for (i = 0; i < ncells; i += 2) {
-		resetdev = OF_device_from_xref(resets[i]);
-		resetnum = resets[i + 1];
-		if (resetdev == NULL) {
-			if (!assert)
-				device_printf(consumer, "Warning: can not find "
-				    "driver for reset number %u; device may "
-				    "not function\n", resetnum);
-			anyerrors = true;
-			continue;
-		}
-		if (assert)
-			err = FDT_RESET_ASSERT(resetdev, resetnum);
-		else
-			err = FDT_RESET_DEASSERT(resetdev, resetnum);
-		if (err != 0) {
-			if (!assert)
-				device_printf(consumer, "Warning: failed to "
-				    "deassert reset number %u; device may not "
-				    "function\n", resetnum);
-			anyerrors = true;
-		}
-	}
-	OF_prop_free(resets);
-	return (anyerrors ? ENXIO : 0);
-}
-
-int
-fdt_reset_assert_all(device_t consumer)
-{
-
-	return (assert_deassert_all(consumer, true));
-}
-
-int
-fdt_reset_deassert_all(device_t consumer)
-{
-
-	return (assert_deassert_all(consumer, false));
-}
-
-void
-fdt_reset_register_provider(device_t provider)
-{
-
-	OF_device_register_xref(
-	    OF_xref_from_node(ofw_bus_get_node(provider)), provider);
-}
-
-void
-fdt_reset_unregister_provider(device_t provider)
-{
-
-	OF_device_register_xref(OF_xref_from_device(provider), NULL);
-}
diff --git a/sys/mips/mediatek/fdt_reset.h b/sys/mips/mediatek/fdt_reset.h
deleted file mode 100644
index 0ff1a866424b..000000000000
--- a/sys/mips/mediatek/fdt_reset.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * Copyright (c) 2014 Ian Lepore <ian@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef DEV_FDT_RESET_H
-#define DEV_FDT_RESET_H
-
-#include "fdt_reset_if.h"
-
-/*
- * Look up "resets" property in consumer's fdt data and assert or deassert all
- * configured resets.
- */
-int fdt_reset_assert_all(device_t consumer);
-int fdt_reset_deassert_all(device_t consumer);
-
-/*
- * [Un]register the given device instance as a driver that implements the
- * fdt_clock interface.
- */
-void fdt_reset_register_provider(device_t provider);
-void fdt_reset_unregister_provider(device_t provider);
-
-#endif /* DEV_FDT_RESET_H */
diff --git a/sys/mips/mediatek/fdt_reset_if.m b/sys/mips/mediatek/fdt_reset_if.m
deleted file mode 100644
index 2bde7b716271..000000000000
--- a/sys/mips/mediatek/fdt_reset_if.m
+++ /dev/null
@@ -1,58 +0,0 @@
-#-
-# Copyright (c) 2016 Stanislav Galabov
-# Copyright (c) 2014 Ian Lepore
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#
-# $FreeBSD$
-#
-
-#include <sys/types.h>
-
-#
-# This is the interface that fdt_reset drivers provide to other drivers.
-# In this context, reset refers to a reset signal provided to some other
-# hardware component within the system.  They are most often found within
-# embedded processors that have on-chip IO controllers.
-#
-
-INTERFACE fdt_reset;
-
-#
-# Enable/assert/apply the specified reset.
-# Returns 0 on success or a standard errno value.
-#
-METHOD int assert {
-	device_t	provider;
-	int		index;
-};
-
-#
-# Disable/de-assert/remove the specified reset.
-# Returns 0 on success or a standard errno value.
-#
-METHOD int deassert {
-	device_t	provider;
-	int		index;
-};
-
diff --git a/sys/mips/mediatek/files.mediatek b/sys/mips/mediatek/files.mediatek
deleted file mode 100644
index 755b28e28102..000000000000
--- a/sys/mips/mediatek/files.mediatek
+++ /dev/null
@@ -1,39 +0,0 @@
-# $FreeBSD$
-
-mips/mediatek/mtk_machdep.c 		standard
-mips/mediatek/mtk_sysctl.c 		standard
-mips/mediatek/mtk_soc.c 		standard
-mips/mediatek/mtk_reset.c 		standard
-mips/mediatek/mtk_clock.c 		standard
-mips/mediatek/mtk_pinctrl.c 		standard
-mips/mediatek/palmbus.c			standard
-mips/mediatek/mtk_intr_v1.c 		optional mtk_intr_v1
-mips/mediatek/mtk_intr_v2.c 		optional mtk_intr_v2
-mips/mediatek/mtk_intr_gic.c 		optional mtk_intr_gic
-mips/mediatek/uart_dev_mtk.c 		optional uart uart_dev_mtk
-mips/mediatek/mtk_spi_v1.c 		optional spibus mtk_spi_v1
-mips/mediatek/mtk_spi_v2.c 		optional spibus mtk_spi_v2
-mips/mediatek/mtk_usb_phy.c 		optional usb mtk_usb_phy
-mips/mediatek/mtk_xhci.c 		optional usb xhci
-mips/mediatek/mtk_ohci.c 		optional usb ohci
-mips/mediatek/mtk_ehci.c 		optional usb ehci
-mips/mediatek/mtk_dotg.c 		optional usb dwcotg
-mips/mediatek/mtk_pcie.c 		optional pci
-mips/mediatek/mtk_gpio_v1.c 		optional gpio mtk_gpio_v1
-mips/mediatek/mtk_gpio_v2.c 		optional gpio mtk_gpio_v2
-#mips/mediatek/mtk_mmc.c 		optional mmc
-
-# Ralink/Mediatek Ethernet driver
-dev/rt/if_rt.c 				optional rt
-
-# Standard MIPS ticker
-mips/mips/tick.c 			standard
-
-# Temporary Reset if
-mips/mediatek/fdt_reset.c 		standard
-mips/mediatek/fdt_reset_if.m 		standard
-
-# Switch
-dev/etherswitch/mtkswitch/mtkswitch.c 	optional mtkswitch
-dev/etherswitch/mtkswitch/mtkswitch_rt3050.c 	optional mtkswitch
-dev/etherswitch/mtkswitch/mtkswitch_mt7620.c 	optional mtkswitch
diff --git a/sys/mips/mediatek/mtk_clock.c b/sys/mips/mediatek/mtk_clock.c
deleted file mode 100644
index 915207b755af..000000000000
--- a/sys/mips/mediatek/mtk_clock.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/fdt/fdt_clock.h>
-
-#include <mips/mediatek/mtk_sysctl.h>
-
-#include "fdt_clock_if.h"
-
-static const struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-clock",	1 },
-
-	/* Sentinel */
-	{ NULL,				0 }
-};
-
-static int
-mtk_clock_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Clock Controller");
-
-	return (0);
-}
-
-static int
-mtk_clock_attach(device_t dev)
-{
-
-	if (device_get_unit(dev) != 0) {
-		device_printf(dev, "Only one clock control allowed\n");
-		return (ENXIO);
-	}
-
-	fdt_clock_register_provider(dev);
-
-	return (0);
-}
-
-#define CLOCK_ENABLE	1
-#define CLOCK_DISABLE	0
-
-static int
-mtk_clock_set(device_t dev, int index, int value)
-{
-	uint32_t mask;
-
-	/* Clock config register holds 32 clock gating bits */
-	if (index < 0 || index > 31)
-		return (EINVAL);
-
-	mask = (1u << index);
-
-	if (value == CLOCK_ENABLE)
-		mtk_sysctl_clr_set(SYSCTL_CLKCFG1, 0, mask);
-	else
-		mtk_sysctl_clr_set(SYSCTL_CLKCFG1, mask, 0);
-
-	return (0);
-}
-
-static int
-mtk_clock_enable(device_t dev, int index)
-{
-
-	return mtk_clock_set(dev, index, CLOCK_ENABLE);
-}
-
-static int
-mtk_clock_disable(device_t dev, int index)
-{
-
-	return mtk_clock_set(dev, index, CLOCK_DISABLE);
-}
-
-static int
-mtk_clock_get_info(device_t dev, int index, struct fdt_clock_info *info)
-{
-	uint32_t mask;
-
-	if (index < 0 || index > 31 || info == NULL)
-		return (EINVAL);
-
-	mask = (1u << index);
-
-	if (mtk_sysctl_get(SYSCTL_CLKCFG1) & mask)
-		info->flags = FDT_CIFLAG_RUNNING;
-	else
-		info->flags = 0;
-
-	return (0);
-}
-
-static device_method_t mtk_clock_methods[] = {
-	DEVMETHOD(device_probe,		mtk_clock_probe),
-	DEVMETHOD(device_attach,	mtk_clock_attach),
-
-	/* fdt_clock interface */
-	DEVMETHOD(fdt_clock_enable,	mtk_clock_enable),
-	DEVMETHOD(fdt_clock_disable,	mtk_clock_disable),
-	DEVMETHOD(fdt_clock_get_info,	mtk_clock_get_info),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_clock_driver = {
-	"clkctrl",
-	mtk_clock_methods,
-	0,
-};
-static devclass_t mtk_clock_devclass;
-
-EARLY_DRIVER_MODULE(mtk_clock, simplebus, mtk_clock_driver, mtk_clock_devclass,
-    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
-
-MODULE_DEPEND(mtk_clock, mtk_sysctl, 1, 1, 1);
diff --git a/sys/mips/mediatek/mtk_dotg.c b/sys/mips/mediatek/mtk_dotg.c
deleted file mode 100644
index 5bae0534727f..000000000000
--- a/sys/mips/mediatek/mtk_dotg.c
+++ /dev/null
@@ -1,193 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015-2016 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/dwc_otg.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#define	MEM_RID	0
-
-static device_probe_t dotg_fdt_probe;
-static device_attach_t dotg_fdt_attach;
-static device_detach_t dotg_fdt_detach;
-
-static int
-dotg_fdt_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(dev, "ralink,rt3050-otg"))
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK DWC-OTG USB Controller");
-	return (0);
-}
-
-static int
-dotg_fdt_attach(device_t dev)
-{
-	struct dwc_otg_softc *sc = device_get_softc(dev);
-	int err, rid;
-
-	/* setup controller interface softc */
-
-	/* initialise some bus fields */
-	sc->sc_mode = DWC_MODE_HOST;
-	sc->sc_bus.parent = dev;
-
-	rid = 0;
-	sc->sc_io_res =
-	    bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
-	if (!(sc->sc_io_res)) {
-		printf("Can`t alloc MEM\n");
-		goto error;
-	}
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
-	    &rid, RF_ACTIVE);
-	if (!(sc->sc_irq_res)) {
-		printf("Can`t alloc IRQ\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		printf("Can`t add usbus\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-
-	err = dwc_otg_init(sc);
-	if (err) printf("dotg_init fail\n");
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-		if (err) printf("device_probe_and_attach fail %d\n", err);
-	}
-	if (err) {
-		goto error;
-	}
-	return (0);
-
-error:
-	dotg_fdt_detach(dev);
-	return (ENXIO);
-}
-
-static int
-dotg_fdt_detach(device_t dev)
-{
-	struct dwc_otg_softc *sc = device_get_softc(dev);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(dev);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call dotg_fdt_uninit() after dotg_fdt_init()
-		 */
-		dwc_otg_uninit(sc);
-
-		err = bus_teardown_intr(dev, sc->sc_irq_res,
-		    sc->sc_intr_hdl);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(dev, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, NULL);
-
-	return (0);
-}
-
-static device_method_t dotg_fdt_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, dotg_fdt_probe),
-	DEVMETHOD(device_attach, dotg_fdt_attach),
-	DEVMETHOD(device_detach, dotg_fdt_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t dotg_fdt_driver = {
-	.name = "dwcotg",
-	.methods = dotg_fdt_methods,
-	.size = sizeof(struct dwc_otg_softc),
-};
-
-static devclass_t dotg_fdt_devclass;
-
-DRIVER_MODULE(dotg, simplebus, dotg_fdt_driver, dotg_fdt_devclass, 0, 0);
diff --git a/sys/mips/mediatek/mtk_ehci.c b/sys/mips/mediatek/mtk_ehci.c
deleted file mode 100644
index ed1d2fca1fe4..000000000000
--- a/sys/mips/mediatek/mtk_ehci.c
+++ /dev/null
@@ -1,217 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/ehci.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#define EHCI_HC_DEVSTR	"MTK USB 2.0 Controller"
-
-static device_probe_t ehci_fdt_probe;
-static device_attach_t ehci_fdt_attach;
-static device_detach_t ehci_fdt_detach;
-
-static int
-ehci_fdt_probe(device_t self)
-{
-
-	if (!ofw_bus_status_okay(self))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(self, "generic-ehci"))
-		return (ENXIO);
-
-	device_set_desc(self, EHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-ehci_fdt_attach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	int err;
-	int rid;
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
-		printf("No mem\n");
-		return (ENOMEM);
-	}
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-				RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-		RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "MediaTek");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-		NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ehci_init(sc);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	ehci_fdt_detach(self);
-	return (ENXIO);
-}
-
-static int
-ehci_fdt_detach(device_t self)
-{
-	ehci_softc_t *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ehci_detach() after ehci_init()
-		 */
-		ehci_detach(sc);
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-				err);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ehci_fdt_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ehci_fdt_probe),
-	DEVMETHOD(device_attach, ehci_fdt_attach),
-	DEVMETHOD(device_detach, ehci_fdt_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ehci_fdt_driver = {
-	.name = "ehci",
-	.methods = ehci_fdt_methods,
-	.size = sizeof(ehci_softc_t),
-};
-
-static devclass_t ehci_fdt_devclass;
-
-DRIVER_MODULE(ehci, simplebus, ehci_fdt_driver, ehci_fdt_devclass, 0, 0);
diff --git a/sys/mips/mediatek/mtk_gpio_v1.c b/sys/mips/mediatek/mtk_gpio_v1.c
deleted file mode 100644
index 8c7df30f81e3..000000000000
--- a/sys/mips/mediatek/mtk_gpio_v1.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/*-
- * Copyright 2016 Stanislav Galabov
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-        
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/resource.h>
-#include <sys/gpio.h>
-                
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <mips/mediatek/mtk_soc.h>
-                
-#include <dev/gpio/gpiobusvar.h>
-                
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#include "gpio_if.h"
-#include "pic_if.h"
-
-#define MTK_GPIO_PINS 32
-
-enum mtk_gpio_regs {
-	GPIO_PIOINT = 0,
-	GPIO_PIOEDGE,
-	GPIO_PIORENA,
-	GPIO_PIOFENA,
-	GPIO_PIODATA,
-	GPIO_PIODIR,
-	GPIO_PIOPOL,
-	GPIO_PIOSET,
-	GPIO_PIORESET,
-	GPIO_PIOTOG,
-	GPIO_PIOMAX
-};
-
-struct mtk_gpio_pin_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mtk_gpio_pin {
-	uint32_t			pin_caps;
-	uint32_t			pin_flags;
-	enum intr_trigger		intr_trigger;
-	enum intr_polarity		intr_polarity;
-	char				pin_name[GPIOMAXNAME];
-	struct mtk_gpio_pin_irqsrc	pin_irqsrc;
-};
-
-struct mtk_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct resource		*res[2];
-	struct mtx		mtx;
-	struct mtk_gpio_pin	pins[MTK_GPIO_PINS];
-	void			*intrhand;
-
-	uint8_t		regs[GPIO_PIOMAX];
-	uint32_t		num_pins;
-	uint8_t			do_remap;
-};
-
-#define PIC_INTR_ISRC(sc, irq)	(&(sc)->pins[(irq)].pin_irqsrc.isrc)
-
-static struct resource_spec mtk_gpio_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
-	{ SYS_RES_IRQ,    0, RF_ACTIVE | RF_SHAREABLE },
-	{ -1, 0 }
-};
-
-static int mtk_gpio_probe(device_t dev);
-static int mtk_gpio_attach(device_t dev);
-static int mtk_gpio_detach(device_t dev);
-static int mtk_gpio_intr(void *arg);
-
-#define MTK_GPIO_LOCK(sc)		mtx_lock_spin(&(sc)->mtx)
-#define MTK_GPIO_UNLOCK(sc)		mtx_unlock_spin(&(sc)->mtx)
-#define MTK_GPIO_LOCK_INIT(sc)		\
-    mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),	\
-    "mtk_gpio", MTX_SPIN)
-#define MTK_GPIO_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx)
-
-#define MTK_WRITE_4(sc, reg, val)	\
-    bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val))
-#define MTK_READ_4(sc, reg)		\
-    bus_read_4((sc)->res[0], (sc)->regs[(reg)])
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-gpio",		1 },
-	{ "ralink,rt3050-gpio",		1 },
-	{ "ralink,rt3352-gpio",		1 },
-	{ "ralink,rt3883-gpio",		1 },
-	{ "ralink,rt5350-gpio",		1 },
-	{ "ralink,mt7620a-gpio",	1 },
-	{ NULL,				0 }
-};
-
-static int
-mtk_gpio_probe(device_t dev)
-{
-	phandle_t node;
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	node = ofw_bus_get_node(dev);
-	if (!OF_hasprop(node, "gpio-controller"))
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK GPIO Controller (v1)");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->dev);
-	for (irq = 0; irq < sc->num_pins; irq++) {
-		sc->pins[irq].pin_irqsrc.irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
-    uint32_t dir)
-{
-	uint32_t regval, mask = (1u << pin);
-
-	if (!(sc->pins[pin].pin_caps & dir))
-		return (EINVAL);
-
-	regval = MTK_READ_4(sc, GPIO_PIODIR);
-	if (dir == GPIO_PIN_INPUT)
-		regval &= ~mask;
-	else
-		regval |= mask;
-	MTK_WRITE_4(sc, GPIO_PIODIR, regval);
-
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
-	sc->pins[pin].pin_flags |= dir;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
-{
-	uint32_t regval, mask = (1u << pin);
-
-	regval = MTK_READ_4(sc, GPIO_PIOPOL);
-	if (val)
-		regval |= mask;
-	else
-		regval &= ~mask;
-	MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
-	sc->pins[pin].pin_flags |= val;
-
-	return (0);
-}
-
-static void
-mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
-{
-	uint32_t mask = (1u << pin);
-	uint32_t val;
-
-	/* Clear cached gpio config */
-	sc->pins[pin].pin_flags = 0;
-
-	val = MTK_READ_4(sc, GPIO_PIORENA) |
-	    MTK_READ_4(sc, GPIO_PIOFENA);
-	if (val & mask) {
-		/* Pin is in interrupt mode */
-		sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
-		val = MTK_READ_4(sc, GPIO_PIORENA);
-		if (val & mask)
-			sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
-		else
-			sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
-	}
-
-	val = MTK_READ_4(sc, GPIO_PIODIR);
-	if (val & mask)
-		sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
-	else
-		sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
-
-	val = MTK_READ_4(sc, GPIO_PIOPOL);
-	if (val & mask) {
-		if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
-			sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
-		} else {
-			sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
-		}
-	}
-}
-
-static int
-mtk_gpio_attach(device_t dev)
-{
-	struct mtk_gpio_softc *sc;
-	phandle_t node;
-	uint32_t i, num_pins;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	MTK_GPIO_LOCK_INIT(sc);
-
-	node = ofw_bus_get_node(dev);
-
-	if (OF_hasprop(node, "clocks"))
-		mtk_soc_start_clock(dev);
-	if (OF_hasprop(node, "resets"))
-		mtk_soc_reset_device(dev);
-
-	if (OF_getprop(node, "ralink,register-map", sc->regs,
-	    GPIO_PIOMAX) <= 0) {
-		device_printf(dev, "Failed to read register map\n");
-		return (ENXIO);
-	}
-
-	if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
-	    "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
-		sc->num_pins = num_pins;
-	else
-		sc->num_pins = MTK_GPIO_PINS;
-
-	for (i = 0; i < sc->num_pins; i++) {
-		sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
-		    GPIO_PIN_INVIN | GPIO_PIN_INVOUT |
-		    GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING;
-		sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
-		sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
-
-		snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
-		    device_get_unit(dev) + 'a', i);
-		sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
-
-		mtk_gpio_pin_probe(sc, i);
-	}
-
-	if (mtk_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto fail;
-	}
-
-	if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto fail;
-	}
-
-	if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
-	    mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
-		goto fail_pic;
-
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL)
-		goto fail_pic;
-
-	return (0);
-fail_pic:
-	intr_pic_deregister(dev, OF_xref_from_node(node));
-fail:
-	if(sc->intrhand != NULL)
-		bus_teardown_intr(dev, sc->res[1], sc->intrhand);
-	bus_release_resources(dev, mtk_gpio_spec, sc->res);
-	MTK_GPIO_LOCK_DESTROY(sc);
-	return (ENXIO);
-}
-
-static int
-mtk_gpio_detach(device_t dev)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-	phandle_t node;
-
-	node = ofw_bus_get_node(dev);
-	intr_pic_deregister(dev, OF_xref_from_node(node));
-	if (sc->intrhand != NULL)
-		bus_teardown_intr(dev, sc->res[1], sc->intrhand);
-	bus_release_resources(dev, mtk_gpio_spec, sc->res);
-	MTK_GPIO_LOCK_DESTROY(sc);
-	return (0);
-}
-
-static device_t
-mtk_gpio_get_bus(device_t dev)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-mtk_gpio_pin_max(device_t dev, int *maxpin)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	*maxpin = sc->num_pins - 1;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	*caps = sc->pins[pin].pin_caps;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	*flags = sc->pins[pin].pin_flags;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
-	name[GPIOMAXNAME - 1] = '\0';
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	struct mtk_gpio_softc *sc;
-	int retval;
-
-	sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	retval = mtk_gpio_pin_set_direction(sc, pin,
-	    flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
-	if (retval == 0)
-		retval = mtk_gpio_pin_set_invert(sc, pin,
-		    flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
-	MTK_GPIO_UNLOCK(sc);
-
-	return (retval);
-}
-
-static int
-mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct mtk_gpio_softc *sc;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	if (value)
-		MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin));
-	else
-		MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin));
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t data;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	data = MTK_READ_4(sc, GPIO_PIODATA);
-	*val = (data & (1u << pin)) ? 1 : 0;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	struct mtk_gpio_softc *sc;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
-		ret = EINVAL;
-		goto out;
-	}
-	MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin));
-
-out:
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pic_map_fdt(struct mtk_gpio_softc *sc,
-    struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep)
-{
-	u_int irq;
-
-	if (daf->ncells != 1) {
-		device_printf(sc->dev, "Invalid #interrupt-cells\n");
-		return (EINVAL);
-	}
-
-	irq = daf->cells[0];
-
-	if (irq >= sc->num_pins) {
-		device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
-		return (EINVAL);
-	}
-
-	*irqp = irq;
-	if (modep != NULL)
-		*modep = GPIO_INTR_EDGE_BOTH;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pic_map_gpio(struct mtk_gpio_softc *sc,
-    struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep)
-{
-	u_int irq;
-
-	irq = dag->gpio_pin_num;
-	if (irq >= sc->num_pins) {
-		device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
-		return (EINVAL);
-	}
-
-	*irqp = irq;
-	if (modep != NULL)
-		*modep = dag->gpio_intr_mode;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	int error;
-	u_int irq;
-	struct mtk_gpio_softc *sc;
-
-	sc = device_get_softc(dev);
-	switch (data->type) {
-	case INTR_MAP_DATA_FDT:
-		error = (mtk_gpio_pic_map_fdt(sc, 
-		    (struct intr_map_data_fdt *)data, &irq, NULL));
-		break;
-	case INTR_MAP_DATA_GPIO:
-		error = (mtk_gpio_pic_map_gpio(sc, 
-		    (struct intr_map_data_gpio *)data, &irq, NULL));
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-
-	if (error != 0) {
-		device_printf(dev, "Invalid map type\n");
-		return (error);
-	}
-
-	*isrcp = PIC_INTR_ISRC(sc, irq);
-	return (0);
-}
-
-static void
-mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-	uint32_t pin, mask, val;
-
-	sc = device_get_softc(dev);
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	pin = pisrc->irq;
-	mask = 1u << pin;
-
-	MTK_GPIO_LOCK(sc);
-
-	if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
-		val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
-		MTK_WRITE_4(sc, GPIO_PIORENA, val);
-		val = MTK_READ_4(sc, GPIO_PIOFENA) | mask;
-		MTK_WRITE_4(sc, GPIO_PIOFENA, val);
-	} else {
-		val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
-		MTK_WRITE_4(sc, GPIO_PIOFENA, val);
-		val = MTK_READ_4(sc, GPIO_PIORENA) | mask;
-		MTK_WRITE_4(sc, GPIO_PIORENA, val);
-	}
-
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static void
-mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-	uint32_t pin, mask, val;
-
-	sc = device_get_softc(dev);
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	pin = pisrc->irq;
-	mask = 1u << pin;
-
-	MTK_GPIO_LOCK(sc);
-
-	val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
-	MTK_WRITE_4(sc, GPIO_PIORENA, val);
-	val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
-	MTK_WRITE_4(sc, GPIO_PIOFENA, val);
-
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static void
-mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gpio_pic_disable_intr(dev, isrc);
-}
-
-static void
-mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gpio_pic_enable_intr(dev, isrc);
-}
-
-static void
-mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	sc = device_get_softc(dev);
-	MTK_GPIO_LOCK(sc);
-	MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq);
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static int
-mtk_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
-    struct resource *res, struct intr_map_data *data)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t val;
-	int error;
-	uint32_t mode;
-	u_int irq;
-
-	if (data == NULL)
-		return (ENOTSUP);
-
-	sc = device_get_softc(dev);
-
-	switch (data->type) {
-	case INTR_MAP_DATA_FDT:
-		error = mtk_gpio_pic_map_fdt(sc, 
-		    (struct intr_map_data_fdt *)data, &irq, &mode);
-		break;
-	case INTR_MAP_DATA_GPIO:
-		error = mtk_gpio_pic_map_gpio(sc, 
-		    (struct intr_map_data_gpio *)data, &irq, &mode);
-		break;
-	default:
-		error = ENOTSUP;
-		break;
-	}
-
-	if (error != 0)
-		return (error);
-
-	MTK_GPIO_LOCK(sc);
-	if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_RISING) {
-		val = MTK_READ_4(sc, GPIO_PIORENA) | (1u << irq);
-		MTK_WRITE_4(sc, GPIO_PIORENA, val);
-	}
-	if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_FALLING) {
-		val = MTK_READ_4(sc, GPIO_PIOFENA) | (1u << irq);
-		MTK_WRITE_4(sc, GPIO_PIOFENA, val);
-	}
-	MTK_GPIO_UNLOCK(sc);
-	return (0);
-}
-
-static int
-mtk_gpio_intr(void *arg)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t i, interrupts;
-
-	sc = arg;
-	interrupts = MTK_READ_4(sc, GPIO_PIOINT);
-	MTK_WRITE_4(sc, GPIO_PIOINT, interrupts);
-
-	for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
-		if ((interrupts & 0x1) == 0)
-			continue;
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->dev, "spurious interrupt %d\n", i);
-		}
-	}       
-
-	return (FILTER_HANDLED);
-}
-
-static phandle_t
-mtk_gpio_get_node(device_t bus, device_t dev)
-{
-
-	/* We only have one child, the GPIO bus, which needs our own node. */
-	return (ofw_bus_get_node(bus));
-}
-
-static device_method_t mtk_gpio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_gpio_probe),
-	DEVMETHOD(device_attach,	mtk_gpio_attach),
-	DEVMETHOD(device_detach,	mtk_gpio_detach),
-        
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus,		mtk_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max,		mtk_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname,	mtk_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags,	mtk_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps,	mtk_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags,	mtk_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get,		mtk_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set,		mtk_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle,	mtk_gpio_pin_toggle),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mtk_gpio_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mtk_gpio_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mtk_gpio_pic_map_intr),
-	DEVMETHOD(pic_setup_intr,	mtk_gpio_pic_setup_intr),
-	DEVMETHOD(pic_post_filter,	mtk_gpio_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,	mtk_gpio_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	mtk_gpio_pic_pre_ithread),
-
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	mtk_gpio_get_node),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_gpio_driver = {
-	"gpio",
-	mtk_gpio_methods,
-	sizeof(struct mtk_gpio_softc),
-};
-
-static devclass_t mtk_gpio_devclass;
-
-EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver,
-    mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
diff --git a/sys/mips/mediatek/mtk_gpio_v2.c b/sys/mips/mediatek/mtk_gpio_v2.c
deleted file mode 100644
index 677c42c64c0b..000000000000
--- a/sys/mips/mediatek/mtk_gpio_v2.c
+++ /dev/null
@@ -1,668 +0,0 @@
-/*-
- * Copyright 2016 Stanislav Galabov
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-        
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/resource.h>
-#include <sys/gpio.h>
-                
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <mips/mediatek/mtk_soc.h>
-                
-#include <dev/gpio/gpiobusvar.h>
-                
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#include "gpio_if.h"
-#include "pic_if.h"
-
-#define MTK_GPIO_PINS 32
-
-struct mtk_gpio_pin_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mtk_gpio_pin {
-	uint32_t			pin_caps;
-	uint32_t			pin_flags;
-	enum intr_trigger		intr_trigger;
-	enum intr_polarity		intr_polarity;
-	char				pin_name[GPIOMAXNAME];
-	struct mtk_gpio_pin_irqsrc	pin_irqsrc;
-};
-
-struct mtk_gpio_softc {
-	device_t		dev;
-	device_t		busdev;
-	struct resource		*res[2];
-	struct mtx		mtx;
-	struct mtk_gpio_pin	pins[MTK_GPIO_PINS];
-	void			*intrhand;
-
-	uint32_t		num_pins;
-	uint32_t		bank_id;
-};
-
-#define PIC_INTR_ISRC(sc, irq)	(&(sc)->pins[(irq)].pin_irqsrc.isrc)
-
-static struct resource_spec mtk_gpio_spec[] = {
-	{ SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
-	{ SYS_RES_IRQ,    0, RF_ACTIVE | RF_SHAREABLE },
-	{ -1, 0 }
-};
-
-static int mtk_gpio_probe(device_t dev);
-static int mtk_gpio_attach(device_t dev);
-static int mtk_gpio_detach(device_t dev);
-static int mtk_gpio_intr(void *arg);
-
-#define MTK_GPIO_LOCK(sc)		mtx_lock_spin(&(sc)->mtx)
-#define MTK_GPIO_UNLOCK(sc)		mtx_unlock_spin(&(sc)->mtx)
-#define MTK_GPIO_LOCK_INIT(sc)		\
-    mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),	\
-    "mtk_gpio", MTX_SPIN)
-#define MTK_GPIO_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx)
-
-#define MTK_WRITE_4(sc, reg, val)	bus_write_4((sc)->res[0], (reg), (val))
-#define MTK_READ_4(sc, reg)		bus_read_4((sc)->res[0], (reg))
-
-/* Register definitions */
-#define GPIO_REG(_sc, _reg)		((_reg) + (_sc)->bank_id * 0x4)
-#define GPIO_PIOINT(_sc)		GPIO_REG((_sc), 0x0090)
-#define GPIO_PIOEDGE(_sc)		GPIO_REG((_sc), 0x00A0)
-#define GPIO_PIORENA(_sc)		GPIO_REG((_sc), 0x0050)
-#define GPIO_PIOFENA(_sc)		GPIO_REG((_sc), 0x0060)
-#define GPIO_PIODATA(_sc)		GPIO_REG((_sc), 0x0020)
-#define GPIO_PIODIR(_sc)		GPIO_REG((_sc), 0x0000)
-#define GPIO_PIOPOL(_sc)		GPIO_REG((_sc), 0x0010)
-#define GPIO_PIOSET(_sc)		GPIO_REG((_sc), 0x0030)
-#define GPIO_PIORESET(_sc)		GPIO_REG((_sc), 0x0040)
-
-static struct ofw_compat_data compat_data[] = {
-	{ "mtk,mt7621-gpio-bank",	1 },
-	{ "mtk,mt7628-gpio-bank",	1 },
-	{ NULL,			0 }
-};
-
-static int
-mtk_gpio_probe(device_t dev)
-{
-	phandle_t node;
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	node = ofw_bus_get_node(dev);
-	if (!OF_hasprop(node, "gpio-controller"))
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK GPIO Controller (v2)");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->dev);
-	for (irq = 0; irq < sc->num_pins; irq++) {
-		sc->pins[irq].pin_irqsrc.irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
-    uint32_t dir)
-{
-	uint32_t regval, mask = (1u << pin);
-
-	if (!(sc->pins[pin].pin_caps & dir))
-		return (EINVAL);
-
-	regval = MTK_READ_4(sc, GPIO_PIODIR(sc));
-	if (dir == GPIO_PIN_INPUT)
-		regval &= ~mask;
-	else
-		regval |= mask;
-	MTK_WRITE_4(sc, GPIO_PIODIR(sc), regval);
-
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
-	sc->pins[pin].pin_flags |= dir;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
-{
-	uint32_t regval, mask = (1u << pin);
-
-	regval = MTK_READ_4(sc, GPIO_PIOPOL(sc));
-	if (val)
-		regval |= mask;
-	else
-		regval &= ~mask;
-	MTK_WRITE_4(sc, GPIO_PIOPOL(sc), regval);
-	sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
-	sc->pins[pin].pin_flags |= val;
-
-	return (0);
-}
-
-static void
-mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
-{
-	uint32_t mask = (1u << pin);
-	uint32_t val;
-
-	/* Clear cached gpio config */
-	sc->pins[pin].pin_flags = 0;
-
-	val = MTK_READ_4(sc, GPIO_PIORENA(sc)) |
-	    MTK_READ_4(sc, GPIO_PIOFENA(sc));
-	if (val & mask) {
-		/* Pin is in interrupt mode */
-		sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
-		val = MTK_READ_4(sc, GPIO_PIORENA(sc));
-		if (val & mask)
-			sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
-		else
-			sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
-	}
-
-	val = MTK_READ_4(sc, GPIO_PIODIR(sc));
-	if (val & mask)
-		sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
-	else
-		sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
-
-	val = MTK_READ_4(sc, GPIO_PIOPOL(sc));
-	if (val & mask) {
-		if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
-			sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
-		} else {
-			sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
-		}
-	}
-}
-
-static int
-mtk_gpio_attach(device_t dev)
-{
-	struct mtk_gpio_softc *sc;
-	phandle_t node;
-	uint32_t i, num_pins, bank_id;
-
-	sc = device_get_softc(dev);
-	sc->dev = dev;
-
-	if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
-		device_printf(dev, "could not allocate resources for device\n");
-		return (ENXIO);
-	}
-
-	MTK_GPIO_LOCK_INIT(sc);
-
-	node = ofw_bus_get_node(dev);
-
-	if (OF_hasprop(node, "clocks"))
-		mtk_soc_start_clock(dev);
-	if (OF_hasprop(node, "resets"))
-		mtk_soc_reset_device(dev);
-
-	if (OF_hasprop(node, "mtk,bank-id") && (OF_getencprop(node,
-	    "mtk,bank-id", &bank_id, sizeof(bank_id)) >= 0))
-		sc->bank_id = bank_id;
-	else
-		sc->bank_id = device_get_unit(dev);
-
-	if (OF_hasprop(node, "mtk,num-pins") && (OF_getencprop(node,
-	    "mtk,num-pins", &num_pins, sizeof(num_pins)) >= 0))
-		sc->num_pins = num_pins;
-	else
-		sc->num_pins = MTK_GPIO_PINS;
-
-	for (i = 0; i < sc->num_pins; i++) {
-		sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
-		    GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
-		sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
-		sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
-
-		snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
-		    device_get_unit(dev) + 'a', i);
-		sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
-
-		mtk_gpio_pin_probe(sc, i);
-	}
-
-	if (mtk_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto fail;
-	}
-
-	if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto fail;
-	}
-
-	if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
-	    mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
-		goto fail_pic;
-
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL)
-		goto fail_pic;
-
-	return (0);
-fail_pic:
-	intr_pic_deregister(dev, OF_xref_from_node(node));
-fail:
-	if(sc->intrhand != NULL)
-		bus_teardown_intr(dev, sc->res[1], sc->intrhand);
-	bus_release_resources(dev, mtk_gpio_spec, sc->res);
-	MTK_GPIO_LOCK_DESTROY(sc);
-	return (ENXIO);
-}
-
-static int
-mtk_gpio_detach(device_t dev)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-	phandle_t node;
-
-	node = ofw_bus_get_node(dev);
-	intr_pic_deregister(dev, OF_xref_from_node(node));
-	if (sc->intrhand != NULL)
-		bus_teardown_intr(dev, sc->res[1], sc->intrhand);
-	bus_release_resources(dev, mtk_gpio_spec, sc->res);
-	MTK_GPIO_LOCK_DESTROY(sc);
-	return (0);
-}
-
-static device_t
-mtk_gpio_get_bus(device_t dev)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	return (sc->busdev);
-}
-
-static int
-mtk_gpio_pin_max(device_t dev, int *maxpin)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	*maxpin = sc->num_pins - 1;
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	*caps = sc->pins[pin].pin_caps;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	*flags = sc->pins[pin].pin_flags;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
-{
-	struct mtk_gpio_softc *sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
-	name[GPIOMAXNAME - 1] = '\0';
-
-	return (0);
-}
-
-static int
-mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
-{
-	struct mtk_gpio_softc *sc;
-	int retval;
-
-	sc = device_get_softc(dev);
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	retval = mtk_gpio_pin_set_direction(sc, pin,
-	    flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
-	if (retval == 0)
-		retval = mtk_gpio_pin_set_invert(sc, pin,
-		    flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
-	MTK_GPIO_UNLOCK(sc);
-
-	return (retval);
-}
-
-static int
-mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
-{
-	struct mtk_gpio_softc *sc;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	if (value)
-		MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin));
-	else
-		MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin));
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t data;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	data = MTK_READ_4(sc, GPIO_PIODATA(sc));
-	*val = (data & (1u << pin)) ? 1 : 0;
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t val;
-	int ret;
-
-	sc = device_get_softc(dev);
-	ret = 0;
-
-	if (pin >= sc->num_pins)
-		return (EINVAL);
-
-	MTK_GPIO_LOCK(sc);
-	if(!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
-		ret = EINVAL;
-		goto out;
-	}
-	val = MTK_READ_4(sc, GPIO_PIODATA(sc));
-	val &= (1u << pin);
-	if (val)
-		MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin));
-	else
-		MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin));
-
-out:
-	MTK_GPIO_UNLOCK(sc);
-
-	return (ret);
-}
-
-static int
-mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	struct intr_map_data_fdt *daf;
-	struct mtk_gpio_softc *sc;
-
-	if (data->type != INTR_MAP_DATA_FDT)
-		return (ENOTSUP);
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (daf->ncells != 1 || daf->cells[0] >= sc->num_pins)
-		return (EINVAL);
-
-	*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
-	return (0);
-}
-
-static void
-mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-	uint32_t pin, mask, val;
-
-	sc = device_get_softc(dev);
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	pin = pisrc->irq;
-	mask = 1u << pin;
-
-	MTK_GPIO_LOCK(sc);
-
-	if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
-		val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask;
-		MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
-		val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) | mask;
-		MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
-	} else {
-		val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask;
-		MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
-		val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | mask;
-		MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
-	}
-
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static void
-mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-	uint32_t pin, mask, val;
-
-	sc = device_get_softc(dev);
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	pin = pisrc->irq;
-	mask = 1u << pin;
-
-	MTK_GPIO_LOCK(sc);
-
-	val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask;
-	MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
-	val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask;
-	MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
-
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static void
-mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gpio_pic_disable_intr(dev, isrc);
-}
-
-static void
-mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gpio_pic_enable_intr(dev, isrc);
-}
-
-static void
-mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-	struct mtk_gpio_softc *sc;
-	struct mtk_gpio_pin_irqsrc *pisrc;
-
-	pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
-	sc = device_get_softc(dev);
-	MTK_GPIO_LOCK(sc);
-	MTK_WRITE_4(sc, GPIO_PIOINT(sc), 1u << pisrc->irq);
-	MTK_GPIO_UNLOCK(sc);
-}
-
-static int
-mtk_gpio_intr(void *arg)
-{
-	struct mtk_gpio_softc *sc;
-	uint32_t i, interrupts;
-
-	sc = arg;
-	interrupts = MTK_READ_4(sc, GPIO_PIOINT(sc));
-
-	for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
-		if ((interrupts & 0x1) == 0)
-			continue;
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->dev, "spurious interrupt %d\n", i);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static phandle_t
-mtk_gpio_get_node(device_t bus, device_t dev)
-{
-
-	/* We only have one child, the GPIO bus, which needs our own node. */
-	return (ofw_bus_get_node(bus));
-}
-
-static device_method_t mtk_gpio_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_gpio_probe),
-	DEVMETHOD(device_attach,	mtk_gpio_attach),
-	DEVMETHOD(device_detach,	mtk_gpio_detach),
-        
-	/* GPIO protocol */
-	DEVMETHOD(gpio_get_bus,		mtk_gpio_get_bus),
-	DEVMETHOD(gpio_pin_max,		mtk_gpio_pin_max),
-	DEVMETHOD(gpio_pin_getname,	mtk_gpio_pin_getname),
-	DEVMETHOD(gpio_pin_getflags,	mtk_gpio_pin_getflags),
-	DEVMETHOD(gpio_pin_getcaps,	mtk_gpio_pin_getcaps),
-	DEVMETHOD(gpio_pin_setflags,	mtk_gpio_pin_setflags),
-	DEVMETHOD(gpio_pin_get,		mtk_gpio_pin_get),
-	DEVMETHOD(gpio_pin_set,		mtk_gpio_pin_set),
-	DEVMETHOD(gpio_pin_toggle,	mtk_gpio_pin_toggle),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mtk_gpio_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mtk_gpio_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mtk_gpio_pic_map_intr),
-	DEVMETHOD(pic_post_filter,	mtk_gpio_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,	mtk_gpio_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	mtk_gpio_pic_pre_ithread),
-
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	mtk_gpio_get_node),
-
-	DEVMETHOD_END
-};
-        
-static driver_t mtk_gpio_driver = {
-	"gpio",
-	mtk_gpio_methods,
-	sizeof(struct mtk_gpio_softc),
-};
-        
-static devclass_t mtk_gpio_devclass;
-        
-EARLY_DRIVER_MODULE(mtk_gpio_v2, simplebus, mtk_gpio_driver,
-    mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
diff --git a/sys/mips/mediatek/mtk_intr_gic.c b/sys/mips/mediatek/mtk_intr_gic.c
deleted file mode 100644
index 98ccdcc5c5f6..000000000000
--- a/sys/mips/mediatek/mtk_intr_gic.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/cpuset.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/smp.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "pic_if.h"
-
-#define	MTK_NIRQS	64	/* We'll only use 64 for now */
-
-#define MTK_INTPOL		0x0100
-#define MTK_INTTRIG		0x0180
-#define MTK_INTDIS		0x0300
-#define MTK_INTENA		0x0380
-#define MTK_INTMASK		0x0400
-#define MTK_INTSTAT		0x0480
-#define MTK_MAPPIN(_i)		(0x0500 + (4 * (_i)))
-#define MTK_MAPVPE(_i, _v)	(0x2000 + (32 * (_i)) + (((_v) / 32) * 4))
-
-#define MTK_INTPOL_POS		1
-#define MTK_INTPOL_NEG		0
-#define MTK_INTTRIG_EDGE	1
-#define MTK_INTTRIG_LEVEL	0
-#define MTK_PIN_BITS(_i)	((1 << 31) | (_i))
-#define MTK_VPE_BITS(_v)	(1 << ((_v) % 32))
-
-static int mtk_gic_intr(void *);
-
-struct mtk_gic_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mtk_gic_softc {
-	device_t		gic_dev;
-	void *                  gic_intrhand;
-	struct resource *       gic_res[2];
-	struct mtk_gic_irqsrc	gic_irqs[MTK_NIRQS];
-	struct mtx		mutex;
-	uint32_t		nirqs;
-};
-
-#define GIC_INTR_ISRC(sc, irq)	(&(sc)->gic_irqs[(irq)].isrc)
-
-static struct resource_spec mtk_gic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Registers */
-	{ -1, 0 }
-};
-
-static struct ofw_compat_data compat_data[] = {
-	{ "mti,gic",	1 },
-	{ NULL,		0 }
-};
-
-#define READ4(_sc, _reg)	bus_read_4((_sc)->gic_res[0], (_reg))
-#define WRITE4(_sc, _reg, _val)	bus_write_4((_sc)->gic_res[0], (_reg), (_val))
-
-static int
-mtk_gic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Interrupt Controller (GIC)");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static inline void
-gic_irq_unmask(struct mtk_gic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTENA, (1u << (irq)));
-}
-
-static inline void
-gic_irq_mask(struct mtk_gic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTDIS, (1u << (irq)));
-}
-
-static inline intptr_t
-gic_xref(device_t dev)
-{
-
-	return (OF_xref_from_node(ofw_bus_get_node(dev)));
-}
-
-static int
-mtk_gic_register_isrcs(struct mtk_gic_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->gic_dev);
-	for (irq = 0; irq < sc->nirqs; irq++) {
-		sc->gic_irqs[irq].irq = irq;
-		isrc = GIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->gic_dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->gic_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mtk_gic_attach(device_t dev)
-{
-	struct mtk_gic_softc *sc;
-	intptr_t xref = gic_xref(dev);
-	int i;
-
-	sc = device_get_softc(dev);
-
-	if (bus_alloc_resources(dev, mtk_gic_spec, sc->gic_res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	sc->gic_dev = dev;
-
-	/* Initialize mutex */
-	mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN);
-
-	/* Set the number of interrupts */
-	sc->nirqs = nitems(sc->gic_irqs);
-
-	/* Mask all interrupts */
-	WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF);
-
-	/* All interrupts are of type level */
-	WRITE4(sc, MTK_INTTRIG, 0x00000000);
-
-	/* All interrupts are of positive polarity */
-	WRITE4(sc, MTK_INTPOL, 0xFFFFFFFF);
-
-	/*
-	 * Route all interrupts to pin 0 on VPE 0;
-	 */
-	for (i = 0; i < 32; i++) {
-		WRITE4(sc, MTK_MAPPIN(i), MTK_PIN_BITS(0));
-		WRITE4(sc, MTK_MAPVPE(i, 0), MTK_VPE_BITS(0));
-	}
-
-	/* Register the interrupts */
-	if (mtk_gic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register GIC ISRCs\n");
-		goto cleanup;
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup;
-	}
-
-	cpu_establish_hardintr("gic", mtk_gic_intr, NULL, sc, 0, INTR_TYPE_CLK,
-	    NULL);
-
-	return (0);
-
-cleanup:
-	bus_release_resources(dev, mtk_gic_spec, sc->gic_res);
-	return(ENXIO);
-}
-
-static int
-mtk_gic_intr(void *arg)
-{
-	struct mtk_gic_softc *sc = arg;
-	struct thread *td;
-	uint32_t i, intr;
-
-	td = curthread;
-	/* Workaround: do not inflate intr nesting level */
-	td->td_intr_nesting_level--;
-
-	intr = READ4(sc, MTK_INTSTAT) & READ4(sc, MTK_INTMASK);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if (intr_isrc_dispatch(GIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->gic_dev,
-				"Stray interrupt %u detected\n", i);
-			gic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	td->td_intr_nesting_level++;
-
-	return (FILTER_HANDLED);
-}
-
-static int
-mtk_gic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-#ifdef FDT
-	struct intr_map_data_fdt *daf;
-	struct mtk_gic_softc *sc;
-
-	if (data->type != INTR_MAP_DATA_FDT)
-		return (ENOTSUP);
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (daf->ncells != 3 || daf->cells[1] >= sc->nirqs)
-		return (EINVAL);
-
-	*isrcp = GIC_INTR_ISRC(sc, daf->cells[1]);
-	return (0);
-#else
-	return (ENOTSUP);
-#endif
-}
-
-static void
-mtk_gic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_gic_irqsrc *)isrc)->irq;
-	gic_irq_unmask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_gic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_gic_irqsrc *)isrc)->irq;
-	gic_irq_mask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_gic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gic_disable_intr(dev, isrc);
-}
-
-static void
-mtk_gic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_gic_enable_intr(dev, isrc);
-}
-
-static void
-mtk_gic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-#ifdef SMP
-static int
-mtk_gic_bind(device_t dev, struct intr_irqsrc *isrc)
-{
-	return (EOPNOTSUPP);
-}
-
-static void
-mtk_gic_init_secondary(device_t dev)
-{
-}
-
-static void
-mtk_gic_ipi_send(device_t dev, struct intr_irqsrc *isrc, cpuset_t cpus)
-{
-}
-#endif
-
-static device_method_t mtk_gic_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_gic_probe),
-	DEVMETHOD(device_attach,	mtk_gic_attach),
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mtk_gic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mtk_gic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mtk_gic_map_intr),
-	DEVMETHOD(pic_post_filter,	mtk_gic_post_filter),
-	DEVMETHOD(pic_post_ithread,	mtk_gic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	mtk_gic_pre_ithread),
-#ifdef SMP
-	DEVMETHOD(pic_bind,		mtk_gic_bind),
-	DEVMETHOD(pic_init_secondary,	mtk_gic_init_secondary),
-	DEVMETHOD(pic_ipi_send,		mtk_gic_ipi_send),
-#endif
-	{ 0, 0 }
-};
-
-static driver_t mtk_gic_driver = {
-	"intc",
-	mtk_gic_methods,
-	sizeof(struct mtk_gic_softc),
-};
-
-static devclass_t mtk_gic_devclass;
-
-EARLY_DRIVER_MODULE(intc_gic, simplebus, mtk_gic_driver, mtk_gic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/mediatek/mtk_intr_v1.c b/sys/mips/mediatek/mtk_intr_v1.c
deleted file mode 100644
index ed795201d053..000000000000
--- a/sys/mips/mediatek/mtk_intr_v1.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*-
- * Copyright (c) 2015 Stanislav Galabov
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/cpuset.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/smp.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "pic_if.h"
-
-#define	MTK_NIRQS	32
-
-#define MTK_IRQ0STAT	0x0000
-#define MTK_IRQ1STAT	0x0004
-#define MTK_INTTYPE	0x0020
-#define MTK_INTRAW	0x0030
-#define MTK_INTENA	0x0034
-#define MTK_INTDIS	0x0038
-
-static int mtk_pic_intr(void *);
-
-struct mtk_pic_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mtk_pic_softc {
-	device_t		pic_dev;
-	void *                  pic_intrhand;
-	struct resource *       pic_res[2];
-	struct mtk_pic_irqsrc	pic_irqs[MTK_NIRQS];
-	struct mtx		mutex;
-	uint32_t		nirqs;
-};
-
-#define PIC_INTR_ISRC(sc, irq)	(&(sc)->pic_irqs[(irq)].isrc)
-
-static struct resource_spec mtk_pic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Registers */
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },	/* Parent interrupt 1 */
-//	{ SYS_RES_IRQ,		1,	RF_ACTIVE },	/* Parent interrupt 2 */
-	{ -1, 0 }
-};
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-intc",  1 },
-	{ "ralink,rt3050-intc",  1 },
-	{ "ralink,rt3352-intc",  1 },
-	{ "ralink,rt3883-intc",  1 },
-	{ "ralink,rt5350-intc",  1 },
-	{ "ralink,mt7620a-intc", 1 },
-	{ NULL,				0 }
-};
-
-#define	READ4(_sc, _reg)	bus_read_4((_sc)->pic_res[0], _reg)
-#define	WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val)
-
-static int
-mtk_pic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Interrupt Controller (v2)");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static inline void
-pic_irq_unmask(struct mtk_pic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTENA, (1u << (irq)));
-}
-
-static inline void
-pic_irq_mask(struct mtk_pic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTDIS, (1u << (irq)));
-}
-
-static inline intptr_t
-pic_xref(device_t dev)
-{
-	return (OF_xref_from_node(ofw_bus_get_node(dev)));
-}
-
-static int
-mtk_pic_register_isrcs(struct mtk_pic_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->pic_dev);
-	for (irq = 0; irq < sc->nirqs; irq++) {
-		sc->pic_irqs[irq].irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->pic_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mtk_pic_attach(device_t dev)
-{
-	struct mtk_pic_softc *sc;
-	intptr_t xref = pic_xref(dev);
-
-	sc = device_get_softc(dev);
-
-	if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	sc->pic_dev = dev;
-
-	/* Initialize mutex */
-	mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN);
-
-	/* Set the number of interrupts */
-	sc->nirqs = nitems(sc->pic_irqs);
-
-	/* Mask all interrupts */
-	WRITE4(sc, MTK_INTDIS, 0x7FFFFFFF);
-
-	/* But enable interrupt generation/masking */
-	WRITE4(sc, MTK_INTENA, 0x80000000);
-
-	/* Set all interrupts to type 0 */
-	WRITE4(sc, MTK_INTTYPE, 0x00000000);
-
-	/* Register the interrupts */
-	if (mtk_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto cleanup;
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup;
-	}
-
-	if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK,
-	    mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) {
-		device_printf(dev, "could not setup irq handler\n");
-		intr_pic_deregister(dev, xref);
-		goto cleanup;
-	}
-	return (0);
-
-cleanup:
-	bus_release_resources(dev, mtk_pic_spec, sc->pic_res);
-	return(ENXIO);
-}
-
-static int
-mtk_pic_intr(void *arg)
-{
-	struct mtk_pic_softc *sc = arg;
-	struct thread *td;
-	uint32_t i, intr;
-
-	td = curthread;
-	/* Workaround: do not inflate intr nesting level */
-	td->td_intr_nesting_level--;
-
-#ifdef _notyet_
-	intr = READ4(sc, MTK_IRQ1STAT);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev,
-			    "Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-#endif
-
-	intr = READ4(sc, MTK_IRQ0STAT);
-
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev,
-				"Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	td->td_intr_nesting_level++;
-
-	return (FILTER_HANDLED);
-}
-
-static int
-mtk_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-#ifdef FDT
-	struct intr_map_data_fdt *daf;
-	struct mtk_pic_softc *sc;
-
-	if (data->type != INTR_MAP_DATA_FDT)
-		return (ENOTSUP);
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
-		return (EINVAL);
-
-	*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
-	return (0);
-#else
-	return (ENOTSUP);
-#endif
-}
-
-static void
-mtk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
-	pic_irq_unmask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
-	pic_irq_mask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_pic_disable_intr(dev, isrc);
-}
-
-static void
-mtk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_pic_enable_intr(dev, isrc);
-}
-
-static void
-mtk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-static device_method_t mtk_pic_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_pic_probe),
-	DEVMETHOD(device_attach,	mtk_pic_attach),
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mtk_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mtk_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mtk_pic_map_intr),
-	DEVMETHOD(pic_post_filter,	mtk_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,	mtk_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	mtk_pic_pre_ithread),
-	{ 0, 0 }
-};
-
-static driver_t mtk_pic_driver = {
-	"intc",
-	mtk_pic_methods,
-	sizeof(struct mtk_pic_softc),
-};
-
-static devclass_t mtk_pic_devclass;
-
-EARLY_DRIVER_MODULE(intc_v1, simplebus, mtk_pic_driver, mtk_pic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/mediatek/mtk_intr_v2.c b/sys/mips/mediatek/mtk_intr_v2.c
deleted file mode 100644
index bb544f5fed34..000000000000
--- a/sys/mips/mediatek/mtk_intr_v2.c
+++ /dev/null
@@ -1,352 +0,0 @@
-/*-
- * Copyright (c) 2015 Stanislav Galabov
- * Copyright (c) 2015 Alexander Kabaev
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/cpuset.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/smp.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include "pic_if.h"
-
-#define	MTK_NIRQS	32
-
-#define MTK_IRQ0STAT	0x009c
-#define MTK_IRQ1STAT	0x00a0
-#define MTK_INTTYPE	0x0000
-#define MTK_INTRAW	0x00a4
-#define MTK_INTENA	0x0080
-#define MTK_INTDIS	0x0078
-
-static int mtk_pic_intr(void *);
-
-struct mtk_pic_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mtk_pic_softc {
-	device_t		pic_dev;
-	void *                  pic_intrhand;
-	struct resource *       pic_res[2];
-	struct mtk_pic_irqsrc	pic_irqs[MTK_NIRQS];
-	struct mtx		mutex;
-	uint32_t		nirqs;
-};
-
-#define PIC_INTR_ISRC(sc, irq)	(&(sc)->pic_irqs[(irq)].isrc)
-
-static struct resource_spec mtk_pic_spec[] = {
-	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Registers */
-	{ SYS_RES_IRQ,		0,	RF_ACTIVE },	/* Parent interrupt 1 */
-//	{ SYS_RES_IRQ,		1,	RF_ACTIVE },	/* Parent interrupt 2 */
-	{ -1, 0 }
-};
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,mt7628an-intc",	1 },
-	{ NULL,				0 }
-};
-
-#define	READ4(_sc, _reg)	bus_read_4((_sc)->pic_res[0], _reg)
-#define	WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val)
-
-static int
-mtk_pic_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Interrupt Controller (v2)");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static inline void
-pic_irq_unmask(struct mtk_pic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTENA, (1u << (irq)));
-}
-
-static inline void
-pic_irq_mask(struct mtk_pic_softc *sc, u_int irq)
-{
-
-	WRITE4(sc, MTK_INTDIS, (1u << (irq)));
-}
-
-static inline intptr_t
-pic_xref(device_t dev)
-{
-	return (OF_xref_from_node(ofw_bus_get_node(dev)));
-}
-
-static int
-mtk_pic_register_isrcs(struct mtk_pic_softc *sc)
-{
-	int error;
-	uint32_t irq;
-	struct intr_irqsrc *isrc;
-	const char *name;
-
-	name = device_get_nameunit(sc->pic_dev);
-	for (irq = 0; irq < sc->nirqs; irq++) {
-		sc->pic_irqs[irq].irq = irq;
-		isrc = PIC_INTR_ISRC(sc, irq);
-		error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name);
-		if (error != 0) {
-			/* XXX call intr_isrc_deregister */
-			device_printf(sc->pic_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mtk_pic_attach(device_t dev)
-{
-	struct mtk_pic_softc *sc;
-	intptr_t xref = pic_xref(dev);
-
-	sc = device_get_softc(dev);
-
-	if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) {
-		device_printf(dev, "could not allocate resources\n");
-		return (ENXIO);
-	}
-
-	sc->pic_dev = dev;
-
-	/* Initialize mutex */
-	mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN);
-
-	/* Set the number of interrupts */
-	sc->nirqs = nitems(sc->pic_irqs);
-
-	/* Mask all interrupts */
-	WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF);
-
-	/* But enable interrupt generation/masking */
-	WRITE4(sc, MTK_INTENA, 0x00000000);
-
-	/* Set all interrupts to type 0 */
-	WRITE4(sc, MTK_INTTYPE, 0xFFFFFFFF);
-
-	/* Register the interrupts */
-	if (mtk_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto cleanup;
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup;
-	}
-
-	if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK,
-	    mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) {
-		device_printf(dev, "could not setup irq handler\n");
-		intr_pic_deregister(dev, xref);
-		goto cleanup;
-	}
-	return (0);
-
-cleanup:
-	bus_release_resources(dev, mtk_pic_spec, sc->pic_res);
-	return(ENXIO);
-}
-
-static int
-mtk_pic_intr(void *arg)
-{
-	struct mtk_pic_softc *sc = arg;
-	struct thread *td;
-	uint32_t i, intr;
-
-	td = curthread;
-	/* Workaround: do not inflate intr nesting level */
-	td->td_intr_nesting_level--;
-
-#ifdef _notyet_
-	intr = READ4(sc, MTK_IRQ1STAT);
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev,
-			    "Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-#endif
-
-	intr = READ4(sc, MTK_IRQ0STAT);
-
-	while ((i = fls(intr)) != 0) {
-		i--;
-		intr &= ~(1u << i);
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev,
-				"Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	td->td_intr_nesting_level++;
-
-	return (FILTER_HANDLED);
-}
-
-static int
-mtk_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-#ifdef FDT
-	struct intr_map_data_fdt *daf;
-	struct mtk_pic_softc *sc;
-
-	if (data->type != INTR_MAP_DATA_FDT)
-		return (ENOTSUP);
-
-	sc = device_get_softc(dev);
-	daf = (struct intr_map_data_fdt *)data;
-
-	if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
-		return (EINVAL);
-
-	*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
-	return (0);
-#else
-	return (ENOTSUP);
-#endif
-}
-
-static void
-mtk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
-	pic_irq_unmask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
-	pic_irq_mask(device_get_softc(dev), irq);
-}
-
-static void
-mtk_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_pic_disable_intr(dev, isrc);
-}
-
-static void
-mtk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mtk_pic_enable_intr(dev, isrc);
-}
-
-static void
-mtk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-static device_method_t mtk_pic_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_pic_probe),
-	DEVMETHOD(device_attach,	mtk_pic_attach),
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mtk_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mtk_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mtk_pic_map_intr),
-	DEVMETHOD(pic_post_filter,	mtk_pic_post_filter),
-	DEVMETHOD(pic_post_ithread,	mtk_pic_post_ithread),
-	DEVMETHOD(pic_pre_ithread,	mtk_pic_pre_ithread),
-	{ 0, 0 }
-};
-
-static driver_t mtk_pic_driver = {
-	"intc",
-	mtk_pic_methods,
-	sizeof(struct mtk_pic_softc),
-};
-
-static devclass_t mtk_pic_devclass;
-
-EARLY_DRIVER_MODULE(intc_v2, simplebus, mtk_pic_driver, mtk_pic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/mediatek/mtk_machdep.c b/sys/mips/mediatek/mtk_machdep.c
deleted file mode 100644
index e4406eacf6a5..000000000000
--- a/sys/mips/mediatek/mtk_machdep.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/*-
- * Copyright (C) 2015-2016 by Stanislav Galabov. All rights reserved.
- * Copyright (C) 2010-2011 by Aleksandr Rybalko. All rights reserved.
- * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/boot.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-
-#include <mips/mediatek/mtk_sysctl.h>
-#include <mips/mediatek/mtk_soc.h>
-
-#include "opt_platform.h"
-#include "opt_rt305x.h"
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-
-extern int	*edata;
-extern int	*end;
-static char 	boot1_env[0x1000];
-
-void
-platform_cpu_init()
-{
-	/* Nothing special */
-}
-
-static void
-mips_init(void)
-{
-	struct mem_region mr[FDT_MEM_REGIONS];
-	uint64_t val;
-	int i, j, mr_cnt;
-	char *memsize;
-
-	printf("entry: mips_init()\n");
-
-	bootverbose = 1;
-
-	for (i = 0; i < 10; i++)
-		phys_avail[i] = 0;
-
-	dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
-
-	/*
-	 * The most low memory MT7621 can have. Currently MT7621 is the chip
-	 * that supports the most memory, so that seems reasonable.
-	 */
-	realmem = btoc(448 * 1024 * 1024);
-
-	if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
-		physmem = btoc(val);
-
-		printf("RAM size: %ldMB (from FDT)\n",
-		    ctob(physmem) / (1024 * 1024));
-
-		KASSERT((phys_avail[0] >= mr[0].mr_start) && \
-			(phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)),
-			("First region is not within FDT memory range"));
-
-		/* Limit size of the first region */
-		phys_avail[1] = (mr[0].mr_start +
-		    MIN(mr[0].mr_size, ctob(realmem)));
-		dump_avail[1] = phys_avail[1];
-
-		/* Add the rest of the regions */
-		for (i = 1, j = 2; i < mr_cnt; i++, j+=2) {
-			phys_avail[j] = mr[i].mr_start;
-			phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size);
-			dump_avail[j] = phys_avail[j];
-			dump_avail[j+1] = phys_avail[j+1];
-		}
-	} else {
-		if ((memsize = kern_getenv("memsize")) != NULL) {
-			physmem = btoc(strtol(memsize, NULL, 0) << 20);
-			printf("RAM size: %ldMB (from memsize)\n",
-			    ctob(physmem) / (1024 * 1024));
-		} else { /* All else failed, assume 32MB */
-			physmem = btoc(32 * 1024 * 1024);
-			printf("RAM size: %ldMB (assumed)\n",
-			    ctob(physmem) / (1024 * 1024));
-		}
-
-		if (mtk_soc_get_socid() == MTK_SOC_RT2880) {
-			/* RT2880 memory start is 88000000 */
-			dump_avail[1] = phys_avail[1] = ctob(physmem)
-			    + 0x08000000;
-		} else if (ctob(physmem) < (448 * 1024 * 1024)) {
-			/*
-			 * Anything up to 448MB is assumed to be directly
-			 * mappable as low memory...
-			 */
-			dump_avail[1] = phys_avail[1] = ctob(physmem);
-		} else if (mtk_soc_get_socid() == MTK_SOC_MT7621) {
-			/*
-			 * On MT7621 the low memory is limited to 448MB, the
-			 * rest is high memory, mapped at 0x20000000
-			 */
-			phys_avail[1] = 448 * 1024 * 1024;
-			phys_avail[2] = 0x20000000;
-			phys_avail[3] = phys_avail[2] + ctob(physmem) -
-			    phys_avail[1];
-			dump_avail[1] = phys_avail[1] - phys_avail[0];
-			dump_avail[2] = phys_avail[2];
-			dump_avail[3] = phys_avail[3] - phys_avail[2];
-		} else {
-			/*
-			 * We have > 448MB RAM and we're not MT7621? Currently
-			 * there is no such chip, so we'll just limit the RAM to
-			 * 32MB and let the user know...
-			 */
-			printf("Unknown chip, assuming 32MB RAM\n");
-			physmem = btoc(32 * 1024 * 1024);
-			dump_avail[1] = phys_avail[1] = ctob(physmem);
-		}
-	}
-
-	if (physmem < realmem)
-		realmem = physmem;
-
-	init_param1();
-	init_param2(physmem);
-	mips_cpu_init();
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-	kdb_init();
-#ifdef KDB
-	if (boothowto & RB_KDB)
-		kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
-
-	mtk_soc_reset();
-}
-
-void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
-{
-	vm_offset_t kernend;
-	int argc = a0, i;//, res;
-	uint32_t timer_clk;
-	char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1);
-	char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2);
-	void *dtbp;
-	phandle_t chosen;
-	char buf[2048];
-
-	/* clear the BSS and SBSS segments */
-	kernend = (vm_offset_t)&end;
-	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
-	mips_postboot_fixup();
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	dtbp = &fdt_static_dtb;
-	if (OF_install(OFW_FDT, 0) == FALSE)
-		while (1);
-	if (OF_init((void *)dtbp) != 0)
-		while (1);
-
-	mtk_soc_try_early_detect();
-	mtk_soc_set_cpu_model();
-
-	if ((timer_clk = mtk_soc_get_timerclk()) == 0)
-		timer_clk = 1000000000; /* no such speed yet */
-
-	mips_timer_early_init(timer_clk);
-
-	/* initialize console so that we have printf */
-	boothowto |= (RB_SERIAL | RB_MULTIPLE);	/* Use multiple consoles */
-	boothowto |= (RB_VERBOSE);
-	cninit();
-
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-
-	/*
-	 * Get bsdbootargs from FDT if specified.
-	 */
-	chosen = OF_finddevice("/chosen");
-	if (OF_getprop(chosen, "bsdbootargs", buf, sizeof(buf)) != -1)
-		boothowto |= boot_parse_cmdline(buf);
-
-	printf("FDT DTB  at: 0x%08x\n", (uint32_t)dtbp);
-
-	printf("CPU   model: %s\n", cpu_model);
-	printf("CPU   clock: %4dMHz\n", mtk_soc_get_cpuclk()/(1000*1000));
-	printf("Timer clock: %4dMHz\n", timer_clk/(1000*1000));
-	printf("UART  clock: %4dMHz\n\n", mtk_soc_get_uartclk()/(1000*1000));
-
-	printf("U-Boot args (from %d args):\n", argc - 1);
-
-	if (argc == 1)
-		printf("\tNone\n");
-
-	for (i = 1; i < argc; i++) {
-		char *n = "argv  ", *arg;
-
-		if (i > 99)
-			break;
-
-		if (argv[i])
-		{
-			arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]);
-			printf("\targv[%d] = %s\n", i, arg);
-			sprintf(n, "argv%d", i);
-			kern_setenv(n, arg);
-		}
-	}
-
-	printf("Environment:\n");
-
-	for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) {
-		char *n, *arg;
-
-		arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
-		if (! MIPS_IS_VALID_PTR(arg))
-			continue;
-		printf("\t%s\n", arg);
-		n = strsep(&arg, "=");
-		if (arg == NULL)
-			kern_setenv(n, "1");
-		else
-			kern_setenv(n, arg);
-	}
-
-	mips_init();
-	mips_timer_init_params(timer_clk, 0);
-}
diff --git a/sys/mips/mediatek/mtk_ohci.c b/sys/mips/mediatek/mtk_ohci.c
deleted file mode 100644
index ad5c68f8069c..000000000000
--- a/sys/mips/mediatek/mtk_ohci.c
+++ /dev/null
@@ -1,217 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/ohci.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#define OHCI_HC_DEVSTR	"MTK USB Controller"
-
-static device_probe_t ohci_fdt_probe;
-static device_attach_t ohci_fdt_attach;
-static device_detach_t ohci_fdt_detach;
-
-static int
-ohci_fdt_probe(device_t self)
-{
-
-	if (!ofw_bus_status_okay(self))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(self, "generic-ohci"))
-		return (ENXIO);
-
-	device_set_desc(self, OHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-ohci_fdt_attach(device_t self)
-{
-	ohci_softc_t *sc = device_get_softc(self);
-	int err;
-	int rid;
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
-	sc->sc_bus.dma_bits = 32;
-
-	/* get all DMA memory */
-	if (usb_bus_mem_alloc_all(&sc->sc_bus,
-	    USB_GET_DMA_TAG(self), &ohci_iterate_hw_softc)) {
-		printf("No mem\n");
-		return (ENOMEM);
-	}
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-				RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-		RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, OHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "MediaTek");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-		NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = ohci_init(sc);
-	if (!err) {
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	}
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	ohci_fdt_detach(self);
-	return (ENXIO);
-}
-
-static int
-ohci_fdt_detach(device_t self)
-{
-	ohci_softc_t *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call ohci_detach() after ohci_init()
-		 */
-		ohci_detach(sc);
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-				err);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-	usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);
-
-	return (0);
-}
-
-static device_method_t ohci_fdt_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, ohci_fdt_probe),
-	DEVMETHOD(device_attach, ohci_fdt_attach),
-	DEVMETHOD(device_detach, ohci_fdt_detach),
-	DEVMETHOD(device_suspend, bus_generic_suspend),
-	DEVMETHOD(device_resume, bus_generic_resume),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t ohci_fdt_driver = {
-	.name = "ohci",
-	.methods = ohci_fdt_methods,
-	.size = sizeof(ohci_softc_t),
-};
-
-static devclass_t ohci_fdt_devclass;
-
-DRIVER_MODULE(ohci, simplebus, ohci_fdt_driver, ohci_fdt_devclass, 0, 0);
diff --git a/sys/mips/mediatek/mtk_pcie.c b/sys/mips/mediatek/mtk_pcie.c
deleted file mode 100644
index e6f6d3d99bf3..000000000000
--- a/sys/mips/mediatek/mtk_pcie.c
+++ /dev/null
@@ -1,1267 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/endian.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr.h>
-#include <machine/pmap.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-
-#include <dev/pci/pcib_private.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/fdt/fdt_clock.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/mtk_pcie.h>
-#include <mips/mediatek/mtk_soc.h>
-#include <mips/mediatek/mtk_sysctl.h>
-#include <mips/mediatek/fdt_reset.h>
-
-#include "ofw_bus_if.h"
-#include "pcib_if.h"
-#include "pic_if.h"
-
-/*
- * Note: We only support PCIe at the moment.
- * Most SoCs in the Ralink/Mediatek family that we target actually don't
- * support PCI anyway, with the notable exceptions being RT3662/RT3883, which
- * support both PCI and PCIe. If there exists a board based on one of them
- * which is of interest in the future it shouldn't be too hard to enable PCI
- * support for it.
- */
-
-/* Chip specific function declarations */
-static int  mtk_pcie_phy_init(device_t);
-static int  mtk_pcie_phy_start(device_t);
-static int  mtk_pcie_phy_stop(device_t);
-static int  mtk_pcie_phy_mt7621_init(device_t);
-static int  mtk_pcie_phy_mt7628_init(device_t);
-static int  mtk_pcie_phy_mt7620_init(device_t);
-static int  mtk_pcie_phy_rt3883_init(device_t);
-static void mtk_pcie_phy_setup_slots(device_t);
-
-/* Generic declarations */
-struct mtx mtk_pci_mtx;
-MTX_SYSINIT(mtk_pci_mtx, &mtk_pci_mtx, "MTK PCIe mutex", MTX_SPIN);
-
-static int mtk_pci_intr(void *);
-
-static struct mtk_pci_softc *mt_sc = NULL;
-
-struct mtk_pci_range {
-	u_long	base;
-	u_long	len;
-};
-
-#define FDT_RANGES_CELLS	((1 + 2 + 3) * 2)
-
-static void
-mtk_pci_range_dump(struct mtk_pci_range *range)
-{
-#ifdef DEBUG
-	printf("\n");
-	printf("  base = 0x%08lx\n", range->base);
-	printf("  len  = 0x%08lx\n", range->len);
-#endif
-}
-
-static int
-mtk_pci_ranges_decode(phandle_t node, struct mtk_pci_range *io_space,
-    struct mtk_pci_range *mem_space)
-{
-	struct mtk_pci_range *pci_space;
-	pcell_t ranges[FDT_RANGES_CELLS];
-	pcell_t addr_cells, size_cells, par_addr_cells;
-	pcell_t *rangesptr;
-	pcell_t cell0, cell1, cell2;
-	int tuple_size, tuples, i, rv, len;
-
-	/*
-	 * Retrieve 'ranges' property.
-	 */
-	if ((fdt_addrsize_cells(node, &addr_cells, &size_cells)) != 0)
-		return (EINVAL);
-	if (addr_cells != 3 || size_cells != 2)
-		return (ERANGE);
-
-	par_addr_cells = fdt_parent_addr_cells(node);
-	if (par_addr_cells != 1)
-		return (ERANGE);
-
-	len = OF_getproplen(node, "ranges");
-	if (len > sizeof(ranges))
-		return (ENOMEM);
-
-	if (OF_getprop(node, "ranges", ranges, sizeof(ranges)) <= 0)
-		return (EINVAL);
-
-	tuple_size = sizeof(pcell_t) * (addr_cells + par_addr_cells +
-	    size_cells);
-	tuples = len / tuple_size;
-
-	/*
-	 * Initialize the ranges so that we don't have to worry about
-	 * having them all defined in the FDT. In particular, it is
-	 * perfectly fine not to want I/O space on PCI busses.
-	 */
-	bzero(io_space, sizeof(*io_space));
-	bzero(mem_space, sizeof(*mem_space));
-
-	rangesptr = &ranges[0];
-	for (i = 0; i < tuples; i++) {
-		cell0 = fdt_data_get((void *)rangesptr, 1);
-		rangesptr++;
-		cell1 = fdt_data_get((void *)rangesptr, 1);
-		rangesptr++;
-		cell2 = fdt_data_get((void *)rangesptr, 1);
-		rangesptr++;
-
-		if (cell0 & 0x02000000) {
-			pci_space = mem_space;
-		} else if (cell0 & 0x01000000) {
-			pci_space = io_space;
-		} else {
-			rv = ERANGE;
-			goto out;
-		}
-
-		pci_space->base = fdt_data_get((void *)rangesptr,
-		    par_addr_cells);
-		rangesptr += par_addr_cells;
-
-		pci_space->len = fdt_data_get((void *)rangesptr, size_cells);
-		rangesptr += size_cells;
-	}
-
-	rv = 0;
-out:
-	return (rv);
-}
-
-static int
-mtk_pci_ranges(phandle_t node, struct mtk_pci_range *io_space,
-    struct mtk_pci_range *mem_space)
-{
-	int err;
-
-	if ((err = mtk_pci_ranges_decode(node, io_space, mem_space)) != 0) {
-		return (err);
-	}
-
-	mtk_pci_range_dump(io_space);
-	mtk_pci_range_dump(mem_space);
-
-	return (0);
-}
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt3883-pci",		MTK_SOC_RT3883 },
-	{ "mediatek,mt7620-pci",	MTK_SOC_MT7620A },
-	{ "mediatek,mt7628-pci",	MTK_SOC_MT7628 },
-	{ "mediatek,mt7621-pci",	MTK_SOC_MT7621 },
-	{ NULL,				MTK_SOC_UNKNOWN }
-};
-
-static int
-mtk_pci_probe(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	sc->socid = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
-	if (sc->socid == MTK_SOC_UNKNOWN)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK PCIe Controller");
-
-	return (0);
-}
-
-static int
-mtk_pci_attach(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-	struct mtk_pci_range io_space, mem_space;
-	phandle_t node;
-	intptr_t xref;
-	int i, rid;
-
-	sc->sc_dev = dev;
-	mt_sc = sc;
-	sc->addr_mask = 0xffffffff;
-
-	/* Request our memory */
-	rid = 0;
-	sc->pci_res[0] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-			    RF_ACTIVE);
-	if (sc->pci_res[0] == NULL) {
-		device_printf(dev, "could not allocate memory resource\n");
-		return (ENXIO);
-	}
-
-	/* See how many interrupts we need */
-	if (sc->socid == MTK_SOC_MT7621)
-		sc->sc_num_irq = 3;
-	else {
-		sc->sc_num_irq = 1;
-		sc->pci_res[2] = sc->pci_res[3] = NULL;
-		sc->pci_intrhand[1] = sc->pci_intrhand[2] = NULL;
-	}
-
-	/* Request our interrupts */	
-	for (i = 1; i <= sc->sc_num_irq ; i++) {
-		rid = i - 1;
-		sc->pci_res[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-				     RF_ACTIVE);
-		if (sc->pci_res[i] == NULL) {
-			device_printf(dev, "could not allocate interrupt "
-			    "resource %d\n", rid);
-			goto cleanup_res;
-		}
-	}
-
-	/* Parse our PCI 'ranges' property */
-	node = ofw_bus_get_node(dev);
-	xref = OF_xref_from_node(node);
-	if (mtk_pci_ranges(node, &io_space, &mem_space)) {
-		device_printf(dev, "could not retrieve 'ranges' data\n");
-		goto cleanup_res;
-	}
-
-	/* Memory, I/O and IRQ resource limits */
-	sc->sc_io_base = io_space.base;
-	sc->sc_io_size = io_space.len;
-	sc->sc_mem_base = mem_space.base;
-	sc->sc_mem_size = mem_space.len;
-	sc->sc_irq_start = MTK_PCIE0_IRQ;
-	sc->sc_irq_end = MTK_PCIE2_IRQ;
-
-	/* Init resource managers for memory, I/O and IRQ */
-	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
-	sc->sc_mem_rman.rm_descr = "mtk pcie memory window";
-	if (rman_init(&sc->sc_mem_rman) != 0 ||
-	    rman_manage_region(&sc->sc_mem_rman, sc->sc_mem_base,
-	    sc->sc_mem_base + sc->sc_mem_size - 1) != 0) {
-		device_printf(dev, "failed to setup memory rman\n");
-		goto cleanup_res;
-	}
-
-	sc->sc_io_rman.rm_type = RMAN_ARRAY;
-	sc->sc_io_rman.rm_descr = "mtk pcie io window";
-	if (rman_init(&sc->sc_io_rman) != 0 ||
-	    rman_manage_region(&sc->sc_io_rman, sc->sc_io_base,
-	    sc->sc_io_base + sc->sc_io_size - 1) != 0) {
-		device_printf(dev, "failed to setup io rman\n");
-		goto cleanup_res;
-	}
-
-	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
-	sc->sc_irq_rman.rm_descr = "mtk pcie irqs";
-	if (rman_init(&sc->sc_irq_rman) != 0 ||
-	    rman_manage_region(&sc->sc_irq_rman, sc->sc_irq_start,
-	    sc->sc_irq_end) != 0) {
-		device_printf(dev, "failed to setup irq rman\n");
-		goto cleanup_res;
-	}
-
-	/* Do SoC-specific PCIe initialization */
-	if (mtk_pcie_phy_init(dev)) {
-		device_printf(dev, "pcie phy init failed\n");
-		goto cleanup_rman;
-	}
-
-	/* Register ourselves as an interrupt controller */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup_rman;
-	}
-
-	/* Set up our interrupt handler */
-	for (i = 1; i <= sc->sc_num_irq; i++) {
-		sc->pci_intrhand[i - 1] = NULL;
-		if (bus_setup_intr(dev, sc->pci_res[i], INTR_TYPE_MISC,
-		    mtk_pci_intr, NULL, sc, &sc->pci_intrhand[i - 1])) {
-			device_printf(dev, "could not setup intr handler %d\n",
-			    i);
-			goto cleanup;
-		}
-	}
-
-	/* Attach our PCI child so bus enumeration can start */
-	if (device_add_child(dev, "pci", -1) == NULL) {
-		device_printf(dev, "could not attach pci bus\n");
-		goto cleanup;
-	}
-
-	/* And finally, attach ourselves to the bus */
-	if (bus_generic_attach(dev)) {
-		device_printf(dev, "could not attach to bus\n");
-		goto cleanup;
-	}
-
-	return (0);
-
-cleanup:
-#ifdef notyet
-	intr_pic_unregister(dev, xref);
-#endif
-	for (i = 1; i <= sc->sc_num_irq; i++) {
-		if (sc->pci_intrhand[i - 1] != NULL)
-			bus_teardown_intr(dev, sc->pci_res[i],
-			    sc->pci_intrhand[i - 1]);
-	}
-cleanup_rman:
-	mtk_pcie_phy_stop(dev);
-	rman_fini(&sc->sc_irq_rman);
-	rman_fini(&sc->sc_io_rman);
-	rman_fini(&sc->sc_mem_rman);
-cleanup_res:
-	mt_sc = NULL;
-	if (sc->pci_res[0] != NULL)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->pci_res[0]);
-	if (sc->pci_res[1] != NULL)
-		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->pci_res[1]);
-	if (sc->pci_res[2] != NULL)
-		bus_release_resource(dev, SYS_RES_IRQ, 1, sc->pci_res[2]);
-	if (sc->pci_res[3] != NULL)
-		bus_release_resource(dev, SYS_RES_IRQ, 2, sc->pci_res[3]);
-	return (ENXIO);
-}
-
-static int
-mtk_pci_read_ivar(device_t dev, device_t child, int which,
-	uintptr_t *result)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = device_get_unit(dev);
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = sc->sc_busno;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static int
-mtk_pci_write_ivar(device_t dev, device_t child, int which,
-	uintptr_t result)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	switch (which) {
-	case PCIB_IVAR_BUS:
-		sc->sc_busno = result;
-		return (0);
-	}
-
-	return (ENOENT);
-}
-
-static struct resource *
-mtk_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
-	rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct mtk_pci_softc *sc = device_get_softc(bus);
-	struct resource *rv;
-	struct rman *rm;
-
-	switch (type) {
-	case PCI_RES_BUS:
-		return pci_domain_alloc_bus(0, child, rid, start, end, count,
-					    flags);
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-
-	if (rv == NULL)
-		return (NULL);
-
-	rman_set_rid(rv, *rid);
-
-	if ((flags & RF_ACTIVE) && type != SYS_RES_IRQ) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-mtk_pci_release_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *res)
-{
-
-	if (type == PCI_RES_BUS)
-		return (pci_domain_release_bus(0, child, rid, res));
-
-	return (bus_generic_release_resource(bus, child, type, rid, res));
-}
-
-static int
-mtk_pci_adjust_resource(device_t bus, device_t child, int type,
-    struct resource *res, rman_res_t start, rman_res_t end)
-{
-	struct mtk_pci_softc *sc = device_get_softc(bus);
-	struct rman *rm;
-
-	switch (type) {
-	case PCI_RES_BUS:
-		return pci_domain_adjust_bus(0, child, res, start, end);
-	case SYS_RES_IRQ:
-		rm = &sc->sc_irq_rman;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &sc->sc_io_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &sc->sc_mem_rman;
-		break;
-	default:
-		rm = NULL;
-		break;
-	}
-
-	if (rm != NULL)
-		return (rman_adjust_resource(res, start, end));
-
-	return (bus_generic_adjust_resource(bus, child, type, res, start, end));
-}
-
-static inline int
-mtk_idx_to_irq(int idx)
-{
-
-	return ((idx == 0) ? MTK_PCIE0_IRQ :
-		(idx == 1) ? MTK_PCIE1_IRQ :
-		(idx == 2) ? MTK_PCIE2_IRQ : -1);
-}
-
-static inline int
-mtk_irq_to_idx(int irq)
-{
-
-	return ((irq == MTK_PCIE0_IRQ) ? 0 :
-		(irq == MTK_PCIE1_IRQ) ? 1 :
-		(irq == MTK_PCIE2_IRQ) ? 2 : -1);
-}
-
-static void
-mtk_pci_mask_irq(void *source)
-{
-	MT_WRITE32(mt_sc, MTK_PCI_PCIENA,
-		MT_READ32(mt_sc, MTK_PCI_PCIENA) & ~(1<<((int)source)));
-}
-
-static void
-mtk_pci_unmask_irq(void *source)
-{
-
-	MT_WRITE32(mt_sc, MTK_PCI_PCIENA,
-		MT_READ32(mt_sc, MTK_PCI_PCIENA) | (1<<((int)source)));
-}
-
-static int
-mtk_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
-	int flags, driver_filter_t *filt, driver_intr_t *handler,
-	void *arg, void **cookiep)
-{
-	struct mtk_pci_softc *sc = device_get_softc(bus);
-	struct intr_event *event;
-	int irq, error, irqidx;
-
-	irq = rman_get_start(ires);
-
-	if (irq < sc->sc_irq_start || irq > sc->sc_irq_end)
-		return (EINVAL);
-
-	irqidx = irq - sc->sc_irq_start;
-
-	event = sc->sc_eventstab[irqidx];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)irq, 0, irq,
-		    mtk_pci_mask_irq, mtk_pci_unmask_irq, NULL, NULL,
-		    "pci intr%d:", irq);
-
-		if (error == 0) {
-			sc->sc_eventstab[irqidx] = event;
-		}
-		else {
-			return (error);
-		}
-	}
-
-	intr_event_add_handler(event, device_get_nameunit(child), filt,
-		handler, arg, intr_priority(flags), flags, cookiep);
-
-	mtk_pci_unmask_irq((void*)irq);
-
-	return (0);
-}
-
-static int
-mtk_pci_teardown_intr(device_t dev, device_t child, struct resource *ires,
-	void *cookie)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-	int irq, result, irqidx;
-
-	irq = rman_get_start(ires);
-	if (irq < sc->sc_irq_start || irq > sc->sc_irq_end)
-		return (EINVAL);
-
-	irqidx = irq - sc->sc_irq_start;
-	if (sc->sc_eventstab[irqidx] == NULL)
-		panic("Trying to teardown unoccupied IRQ");
-
-	mtk_pci_mask_irq((void*)irq);
-
-	result = intr_event_remove_handler(cookie);
-	if (!result)
-		sc->sc_eventstab[irqidx] = NULL;
-
-	return (result);
-}
-
-static inline uint32_t
-mtk_pci_make_addr(int bus, int slot, int func, int reg)
-{
-	uint32_t addr;
-
-	addr = ((((reg & 0xf00) >> 8) << 24) | (bus << 16) | (slot << 11) |
-		(func << 8) | (reg & 0xfc) | (1 << 31));
-
-	return (addr);
-}
-
-static int
-mtk_pci_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static inline int
-mtk_pci_slot_has_link(device_t dev, int slot)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	return !!(sc->pcie_link_status & (1<<slot));
-}
-
-static uint32_t
-mtk_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
-	u_int reg, int bytes)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-	uint32_t addr = 0, data = 0;
-
-	/* Return ~0U if slot has no link */
-	if (bus == 0 && mtk_pci_slot_has_link(dev, slot) == 0) {
-		return (~0U);
-	}
-
-	mtx_lock_spin(&mtk_pci_mtx);
-	addr = mtk_pci_make_addr(bus, slot, func, (reg & ~3)) & sc->addr_mask;
-	MT_WRITE32(sc, MTK_PCI_CFGADDR, addr);
-	switch (bytes % 4) {
-	case 0:
-		data = MT_READ32(sc, MTK_PCI_CFGDATA);
-		break;
-	case 1:
-		data = MT_READ8(sc, MTK_PCI_CFGDATA + (reg & 0x3));
-		break;
-	case 2:
-		data = MT_READ16(sc, MTK_PCI_CFGDATA + (reg & 0x3));
-		break;
-	default:
-		panic("%s(): Wrong number of bytes (%d) requested!\n",
-			__FUNCTION__, bytes % 4);
-	}
-	mtx_unlock_spin(&mtk_pci_mtx);
-
-	return (data);
-}
-
-static void
-mtk_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
-	u_int reg, uint32_t val, int bytes)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-	uint32_t addr = 0, data = val;
-
-	/* Do not write if slot has no link */
-	if (bus == 0 && mtk_pci_slot_has_link(dev, slot) == 0)
-		return;
-
-	mtx_lock_spin(&mtk_pci_mtx);
-	addr = mtk_pci_make_addr(bus, slot, func, (reg & ~3)) & sc->addr_mask;
-	MT_WRITE32(sc, MTK_PCI_CFGADDR, addr);
-	switch (bytes % 4) {
-	case 0:
-		MT_WRITE32(sc, MTK_PCI_CFGDATA, data);
-		break;
-	case 1:
-		MT_WRITE8(sc, MTK_PCI_CFGDATA + (reg & 0x3), data);
-		break;
-	case 2:
-		MT_WRITE16(sc, MTK_PCI_CFGDATA + (reg & 0x3), data);
-		break;
-	default:
-		panic("%s(): Wrong number of bytes (%d) requested!\n",
-			__FUNCTION__, bytes % 4);
-	}
-	mtx_unlock_spin(&mtk_pci_mtx);
-}
-
-static int
-mtk_pci_route_interrupt(device_t pcib, device_t device, int pin)
-{
-	int bus, sl, dev;
-
-	bus = pci_get_bus(device);
-	sl = pci_get_slot(device);
-	dev = pci_get_device(device);
-
-	if (bus != 0)
-		panic("Unexpected bus number %d\n", bus);
-
-	/* PCIe only */
-	switch (sl) {
-	case 0: return MTK_PCIE0_IRQ;
-	case 1: return MTK_PCIE0_IRQ + 1;
-	case 2: return MTK_PCIE0_IRQ + 2;
-	default: return (-1);
-	}
-
-	return (-1);
-}
-
-static device_method_t mtk_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_pci_probe),
-	DEVMETHOD(device_attach,	mtk_pci_attach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar,	mtk_pci_read_ivar),
-	DEVMETHOD(bus_write_ivar,	mtk_pci_write_ivar),
-	DEVMETHOD(bus_alloc_resource,	mtk_pci_alloc_resource),
-	DEVMETHOD(bus_release_resource,	mtk_pci_release_resource),
-	DEVMETHOD(bus_adjust_resource,	mtk_pci_adjust_resource),
-	DEVMETHOD(bus_activate_resource,   bus_generic_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr,	mtk_pci_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	mtk_pci_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots,	mtk_pci_maxslots),
-	DEVMETHOD(pcib_read_config,	mtk_pci_read_config),
-	DEVMETHOD(pcib_write_config,	mtk_pci_write_config),
-	DEVMETHOD(pcib_route_interrupt,	mtk_pci_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	/* OFW bus interface */
-	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
-	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
-	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
-	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
-	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_pci_driver = {
-	"pcib",
-	mtk_pci_methods,
-	sizeof(struct mtk_pci_softc),
-};
-
-static devclass_t mtk_pci_devclass;
-
-DRIVER_MODULE(mtk_pci, simplebus, mtk_pci_driver, mtk_pci_devclass, 0, 0);
-
-/* Our interrupt handler */
-static int
-mtk_pci_intr(void *arg)
-{
-	struct mtk_pci_softc *sc = arg;
-	struct intr_event *event;
-	uint32_t reg, irq, irqidx;
-
-	reg = MT_READ32(sc, MTK_PCI_PCIINT);
-
-	for (irq = sc->sc_irq_start; irq <= sc->sc_irq_end; irq++) {
-		if (reg & (1u<<irq)) {
-			irqidx = irq - sc->sc_irq_start;
-			event = sc->sc_eventstab[irqidx];
-			if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-				if (irq != 0)
-					printf("Stray PCI IRQ %d\n", irq);
-				continue;
-			}
-
-			intr_event_handle(event, NULL);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-/* PCIe SoC-specific initialization */
-static int
-mtk_pcie_phy_init(device_t dev)
-{
-	struct mtk_pci_softc *sc;
-
-	/* Get our softc */
-	sc = device_get_softc(dev);
-
-	/* We don't know how many slots we have yet */
-	sc->num_slots = 0;
-
-	/* Handle SoC specific PCIe init */
-	switch (sc->socid) {
-	case MTK_SOC_MT7628: /* Fallthrough */
-	case MTK_SOC_MT7688:
-		if (mtk_pcie_phy_mt7628_init(dev))
-			return (ENXIO);
-		break;
-	case MTK_SOC_MT7621:
-		if (mtk_pcie_phy_mt7621_init(dev))
-			return (ENXIO);
-		break;
-	case MTK_SOC_MT7620A:
-		if (mtk_pcie_phy_mt7620_init(dev))
-			return (ENXIO);
-		break;
-	case MTK_SOC_RT3662: /* Fallthrough */
-	case MTK_SOC_RT3883:
-		if (mtk_pcie_phy_rt3883_init(dev))
-			return (ENXIO);
-		break;
-	default:
-		device_printf(dev, "unsupported device %x\n", sc->socid);
-		return (ENXIO);
-	}
-
-	/*
-	 * If we were successful so far go and set up the PCIe slots, so we
-	 * may allocate mem/io/irq resources and enumerate busses later.
-	 */
-	mtk_pcie_phy_setup_slots(dev);
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_start(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	if (sc->socid == MTK_SOC_MT7621 &&
-	    (mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) !=
-	    SYSCTL_MT7621_REV_E) {
-		if (fdt_reset_assert_all(dev))
-			return (ENXIO);
-	} else {
-		if (fdt_reset_deassert_all(dev))
-			return (ENXIO);
-	}
-
-	if (fdt_clock_enable_all(dev))
-		return (ENXIO);
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_stop(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	if (sc->socid == MTK_SOC_MT7621 &&
-	    (mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) !=
-	    SYSCTL_MT7621_REV_E) {
-		if (fdt_reset_deassert_all(dev))
-			return (ENXIO);
-	} else {
-		if (fdt_reset_assert_all(dev))
-			return (ENXIO);
-	}
-
-	if (fdt_clock_disable_all(dev))
-		return (ENXIO);
-
-	return (0);
-}
-
-#define mtk_pcie_phy_set(_sc, _reg, _s, _n, _v)			\
-	MT_WRITE32((_sc), (_reg), ((MT_READ32((_sc), (_reg)) &	\
-	    (~(((1ull << (_n)) - 1) << (_s)))) | ((_v) << (_s))))
-
-static void
-mtk_pcie_phy_mt7621_bypass_pipe_rst(struct mtk_pci_softc *sc, uint32_t off)
-{
-
-	mtk_pcie_phy_set(sc, off + 0x002c, 12, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x002c,  4, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x012c, 12, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x012c,  4, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x102c, 12, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x102c,  4, 1, 1);
-}
-
-static void
-mtk_pcie_phy_mt7621_setup_ssc(struct mtk_pci_softc *sc, uint32_t off)
-{
-	uint32_t xtal_sel;
-
-	xtal_sel = mtk_sysctl_get(SYSCTL_SYSCFG) >> 6;
-	xtal_sel &= 0x7;
-
-	mtk_pcie_phy_set(sc, off + 0x400, 8, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x400, 9, 2, 0);
-	mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x100, 4, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 0);
-	mtk_pcie_phy_set(sc, off + 0x100, 5, 1, 0);
-
-	if (xtal_sel <= 5 && xtal_sel >= 3) {
-		mtk_pcie_phy_set(sc, off + 0x490,  6,  2, 1);
-		mtk_pcie_phy_set(sc, off + 0x4a8,  0, 12, 0x1a);
-		mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a);
-	} else {
-		mtk_pcie_phy_set(sc, off + 0x490,  6,  2, 0);
-		if (xtal_sel >= 6) {
-			mtk_pcie_phy_set(sc, off + 0x4bc,  4,  2, 0x01);
-			mtk_pcie_phy_set(sc, off + 0x49c,  0, 31, 0x18000000);
-			mtk_pcie_phy_set(sc, off + 0x4a4,  0, 16, 0x18d);
-			mtk_pcie_phy_set(sc, off + 0x4a8,  0, 12, 0x4a);
-			mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x4a);
-			mtk_pcie_phy_set(sc, off + 0x4a8,  0, 12, 0x11);
-			mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x11);
-		} else {
-			mtk_pcie_phy_set(sc, off + 0x4a8,  0, 12, 0x1a);
-			mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a);
-		}
-	}
-
-	mtk_pcie_phy_set(sc, off + 0x4a0,  5, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x490, 22, 2, 2);
-	mtk_pcie_phy_set(sc, off + 0x490, 18, 4, 6);
-	mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 2);
-	mtk_pcie_phy_set(sc, off + 0x490,  8, 4, 1);
-	mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 0);
-	mtk_pcie_phy_set(sc, off + 0x490,  1, 3, 2);
-
-	if (xtal_sel <= 5 && xtal_sel >= 3) {
-		mtk_pcie_phy_set(sc, off + 0x414, 6, 2, 1);
-		mtk_pcie_phy_set(sc, off + 0x414, 5, 1, 1);
-	}
-
-	mtk_pcie_phy_set(sc, off + 0x414, 28, 2, 1);
-	mtk_pcie_phy_set(sc, off + 0x040, 17, 4, 7);
-	mtk_pcie_phy_set(sc, off + 0x040, 16, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x140, 17, 4, 7);
-	mtk_pcie_phy_set(sc, off + 0x140, 16, 1, 1);
-
-	mtk_pcie_phy_set(sc, off + 0x000,  5, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x100,  5, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x000,  4, 1, 0);
-	mtk_pcie_phy_set(sc, off + 0x100,  4, 1, 0);
-}
-
-/* XXX: ugly, we need to fix this at some point */
-#define MT7621_GPIO_CTRL0	*((volatile uint32_t *)0xbe000600)
-#define MT7621_GPIO_DATA0	*((volatile uint32_t *)0xbe000620)
-
-#define mtk_gpio_clr_set(_reg, _clr, _set)		\
-	do {						\
-		(_reg) = ((_reg) & (_clr)) | (_set);	\
-	} while (0)
-
-static int
-mtk_pcie_phy_mt7621_init(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	/* First off, stop the PHY */
-	if (mtk_pcie_phy_stop(dev))
-		return (ENXIO);
-
-	/* PCIe resets are GPIO pins */
-	mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7621_PERST_GPIO_MODE |
-	    MT7621_UARTL3_GPIO_MODE, MT7621_PERST_GPIO | MT7621_UARTL3_GPIO);
-
-	/* Set GPIO pins as outputs */
-	mtk_gpio_clr_set(MT7621_GPIO_CTRL0, 0, MT7621_PCIE_RST);
-
-	/* Assert resets to PCIe devices */
-	mtk_gpio_clr_set(MT7621_GPIO_DATA0, MT7621_PCIE_RST, 0);
-
-	/* Give everything a chance to sink in */
-	DELAY(100000);
-
-	/* Now start the PHY again */
-	if (mtk_pcie_phy_start(dev))
-		return (ENXIO);
-
-	/* Wait for things to settle */
-	DELAY(100000);
-
-	/* Only apply below to REV-E hardware */
-	if ((mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) == 
-	    SYSCTL_MT7621_REV_E)
-		mtk_pcie_phy_mt7621_bypass_pipe_rst(sc, 0x9000);
-
-	/* Setup PCIe ports 0 and 1 */
-	mtk_pcie_phy_mt7621_setup_ssc(sc, 0x9000);
-	/* Setup PCIe port 2 */
-	mtk_pcie_phy_mt7621_setup_ssc(sc, 0xa000);
-
-	/* Deassert resets to PCIe devices */
-	mtk_gpio_clr_set(MT7621_GPIO_DATA0, 0, MT7621_PCIE_RST);
-
-	/* Set number of slots supported */
-	sc->num_slots = 3;
-
-	/* Give it a chance to sink in */
-	DELAY(100000);
-
-	return (0);
-}
-
-static void
-mtk_pcie_phy_mt7628_setup(struct mtk_pci_softc *sc, uint32_t off)
-{
-	uint32_t xtal_sel;
-
-	xtal_sel = mtk_sysctl_get(SYSCTL_SYSCFG) >> 6;
-	xtal_sel &= 0x1;
-
-	mtk_pcie_phy_set(sc, off + 0x400,  8, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x400,  9, 2, 0);
-	mtk_pcie_phy_set(sc, off + 0x000,  4, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x000,  5, 1, 0);
-	mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 3);
-
-	if (xtal_sel == 1) {
-		mtk_pcie_phy_set(sc, off + 0x4bc, 24,  8, 0x7d);
-		mtk_pcie_phy_set(sc, off + 0x490, 12,  4, 0x08);
-		mtk_pcie_phy_set(sc, off + 0x490,  6,  2, 0x01);
-		mtk_pcie_phy_set(sc, off + 0x4c0,  0, 32, 0x1f400000);
-		mtk_pcie_phy_set(sc, off + 0x4a4,  0, 16, 0x013d);
-		mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x74);
-		mtk_pcie_phy_set(sc, off + 0x4a8,  0, 16, 0x74);
-	} else {
-		mtk_pcie_phy_set(sc, off + 0x4bc, 24,  8, 0x64);
-		mtk_pcie_phy_set(sc, off + 0x490, 12,  4, 0x0a);
-		mtk_pcie_phy_set(sc, off + 0x490,  6,  2, 0x00);
-		mtk_pcie_phy_set(sc, off + 0x4c0,  0, 32, 0x19000000);
-		mtk_pcie_phy_set(sc, off + 0x4a4,  0, 16, 0x018d);
-		mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x4a);
-		mtk_pcie_phy_set(sc, off + 0x4a8,  0, 16, 0x4a);
-	}
-
-	mtk_pcie_phy_set(sc, off + 0x498, 0, 8, 5);
-	mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 1);
-	mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 0);
-}
-
-static int
-mtk_pcie_phy_mt7628_init(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	/* Set PCIe reset to normal mode */
-	mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7628_PERST_GPIO_MODE,
-	    MT7628_PERST);
-
-	/* Start the PHY */
-	if (mtk_pcie_phy_start(dev))
-		return (ENXIO);
-
-	/* Give it a chance to sink in */
-	DELAY(100000);
-
-	/* Setup the PHY */
-	mtk_pcie_phy_mt7628_setup(sc, 0x9000);
-
-	/* Deassert PCIe device reset */
-	MT_CLR_SET32(sc, MTK_PCI_PCICFG, MTK_PCI_RESET, 0);
-
-	/* Set number of slots supported */
-	sc->num_slots = 1;
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_mt7620_wait_busy(struct mtk_pci_softc *sc)
-{
-	uint32_t reg_value, retry;
-
-	reg_value = retry = 0;
-
-	while (retry++ < MT7620_MAX_RETRIES) {
-		reg_value = MT_READ32(sc, MT7620_PCIE_PHY_CFG);
-		if (reg_value & PHY_BUSY)
-			DELAY(100000);
-		else
-			break;
-	}
-
-	if (retry >= MT7620_MAX_RETRIES)
-		return (ENXIO);
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_mt7620_set(struct mtk_pci_softc *sc, uint32_t reg,
-    uint32_t val)
-{
-	uint32_t reg_val;
-
-	if (mtk_pcie_phy_mt7620_wait_busy(sc))
-		return (ENXIO);
-
-	reg_val = PHY_MODE_WRITE | ((reg & 0xff) << PHY_ADDR_OFFSET) |
-	    (val & 0xff);
-	MT_WRITE32(sc, MT7620_PCIE_PHY_CFG, reg_val);
-	DELAY(1000);
-
-	if (mtk_pcie_phy_mt7620_wait_busy(sc))
-		return (ENXIO);
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_mt7620_init(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	/*
-	 * The below sets the PCIe PHY to bypass the PCIe DLL and enables
-	 * "elastic buffer control", whatever that may be...
-	 */
-	if (mtk_pcie_phy_mt7620_set(sc, 0x00, 0x80) ||
-	    mtk_pcie_phy_mt7620_set(sc, 0x01, 0x04) ||
-	    mtk_pcie_phy_mt7620_set(sc, 0x68, 0x84))
-		return (ENXIO);
-
-	/* Stop PCIe */
-	if (mtk_pcie_phy_stop(dev))
-		return (ENXIO);
-
-	/* Restore PPLL to a sane state before going on */
-	mtk_sysctl_clr_set(MT7620_PPLL_DRV, LC_CKDRVPD, PDRV_SW_SET);
-
-	/* No PCIe on the MT7620N */
-	if (!(mtk_sysctl_get(SYSCTL_REVID) & MT7620_PKG_BGA)) {
-		device_printf(dev, "PCIe disabled for MT7620N\n");
-		mtk_sysctl_clr_set(MT7620_PPLL_CFG0, 0, PPLL_SW_SET);
-		mtk_sysctl_clr_set(MT7620_PPLL_CFG1, 0, PPLL_PD);
-		return (ENXIO);
-	}
-
-	/* PCIe device reset pin is in normal mode */
-	mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7620_PERST_GPIO_MODE,
-	    MT7620_PERST);
-
-	/* Enable PCIe now */
-	if (mtk_pcie_phy_start(dev))
-		return (ENXIO);
-
-	/* Give it a chance to sink in */
-	DELAY(100000);
-
-	/* If PLL is not locked - bail */
-	if (!(mtk_sysctl_get(MT7620_PPLL_CFG1) & PPLL_LOCKED)) {
-		device_printf(dev, "no PPLL not lock\n");
-		mtk_pcie_phy_stop(dev);
-		return (ENXIO);
-	}
-
-	/* Configure PCIe PLL */
-	mtk_sysctl_clr_set(MT7620_PPLL_DRV, LC_CKDRVOHZ | LC_CKDRVHZ,
-	    LC_CKDRVPD | PDRV_SW_SET);
-
-	/* and give it a chance to settle */
-	DELAY(100000);
-
-	/* Deassert PCIe device reset */
-	MT_CLR_SET32(sc, MTK_PCI_PCICFG, MTK_PCI_RESET, 0);
-
-	/* MT7620 supports one PCIe slot */
-	sc->num_slots = 1;
-
-	return (0);
-}
-
-static int
-mtk_pcie_phy_rt3883_init(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-
-	/* Enable PCI host mode and PCIe RC mode */
-	mtk_sysctl_clr_set(SYSCTL_SYSCFG1, 0, RT3883_PCI_HOST_MODE |
-	    RT3883_PCIE_RC_MODE);
-
-	/* Enable PCIe PHY */
-	if (mtk_pcie_phy_start(dev))
-		return (ENXIO);
-
-	/* Disable PCI, we only support PCIe for now */
-	mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, RT3883_PCI_RST);
-	mtk_sysctl_clr_set(SYSCTL_CLKCFG1, RT3883_PCI_CLK, 0);
-
-	/* Give things a chance to sink in */
-	DELAY(500000);
-
-	/* Set PCIe port number to 0 and lift PCIe reset */
-	MT_WRITE32(sc, MTK_PCI_PCICFG, 0);
-
-	/* Configure PCI Arbiter */
-	MT_WRITE32(sc, MTK_PCI_ARBCTL, 0x79);
-
-	/* We have a single PCIe slot */
-	sc->num_slots = 1;
-
-	return (0);
-}
-
-static void
-mtk_pcie_phy_setup_slots(device_t dev)
-{
-	struct mtk_pci_softc *sc = device_get_softc(dev);
-	uint32_t bar0_val, val;
-	int i;
-
-	/* Disable all PCIe interrupts */
-	MT_WRITE32(sc, MTK_PCI_PCIENA, 0);
-
-	/* Default bar0_val is 64M, enabled */
-	bar0_val = 0x03FF0001;
-
-	/* But we override it to 2G, enabled for some SoCs */
-	if (sc->socid == MTK_SOC_MT7620A || sc->socid == MTK_SOC_MT7628 ||
-	    sc->socid == MTK_SOC_MT7688 || sc->socid == MTK_SOC_MT7621)
-		bar0_val = 0x7FFF0001;
-
-	/* We still don't know which slots have linked up */
-	sc->pcie_link_status = 0;
-
-	/* XXX: I am not sure if this delay is really necessary */
-	DELAY(500000);
-
-	/*
-	 * See which slots have links and mark them.
-	 * Set up all slots' BARs and make them look like PCIe bridges.
-	 */
-	for (i = 0; i < sc->num_slots; i++) {
-		/* If slot has link - mark it */
-		if (MT_READ32(sc, MTK_PCIE_STATUS(i)) & 1)
-			sc->pcie_link_status |= (1<<i);
-		else
-			continue;
-
-		/* Generic slot configuration follows */
-
-		/* We enable BAR0 */
-		MT_WRITE32(sc, MTK_PCIE_BAR0SETUP(i), bar0_val);
-		/* and disable BAR1 */
-		MT_WRITE32(sc, MTK_PCIE_BAR1SETUP(i), 0);
-		/* Internal memory base has no offset */
-		MT_WRITE32(sc, MTK_PCIE_IMBASEBAR0(i), 0);
-		/* We're a PCIe bridge */
-		MT_WRITE32(sc, MTK_PCIE_CLASS(i), 0x06040001);
-
-		val = mtk_pci_read_config(dev, 0, i, 0, 0x4, 4);
-		mtk_pci_write_config(dev, 0, i, 0, 0x4, val | 0x4, 4);
-		val = mtk_pci_read_config(dev, 0, i, 0, 0x70c, 4);
-		val &= ~(0xff << 8);
-		val |= (0x50 << 8);
-		mtk_pci_write_config(dev, 0, i, 0, 0x70c, val, 4);
-
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_IOBASEL_1, 0xff, 1);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_IOBASEH_1, 0xffff, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_IOLIMITL_1, 0, 1);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_IOLIMITH_1, 0, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_MEMBASE_1, 0xffff, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_MEMLIMIT_1, 0, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_PMBASEL_1, 0xffff, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_PMBASEH_1, 0xffffffff,
-		    4);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_PMLIMITL_1, 0, 2);
-		mtk_pci_write_config(dev, 0, i, 0, PCIR_PMLIMITH_1, 0, 4);
-	}
-}
diff --git a/sys/mips/mediatek/mtk_pcie.h b/sys/mips/mediatek/mtk_pcie.h
deleted file mode 100644
index 1b1b476b020a..000000000000
--- a/sys/mips/mediatek/mtk_pcie.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef __MTK_PCIE_H__
-#define __MTK_PCIE_H__
-
-#define MTK_PCI_NIRQS			3
-#define MTK_PCI_BASESLOT		0
-
-struct mtk_pci_softc {
-	device_t		sc_dev;
-
-	struct resource *	pci_res[MTK_PCI_NIRQS + 1];
-	void *			pci_intrhand[MTK_PCI_NIRQS];
-
-	int			sc_busno;
-	int			sc_cur_secbus;
-
-	struct rman		sc_mem_rman;
-	struct rman		sc_io_rman;
-	struct rman		sc_irq_rman;
-
-	uint32_t		sc_num_irq;
-	uint32_t		sc_irq_start;
-	uint32_t		sc_irq_end;
-
-	bus_addr_t		sc_mem_base;
-	bus_addr_t		sc_mem_size;
-
-	bus_addr_t		sc_io_base;
-	bus_addr_t		sc_io_size;
-
-	struct intr_event	*sc_eventstab[MTK_PCI_NIRQS];
-
-	uint32_t		pcie_link_status;
-	uint32_t		num_slots;
-	uint32_t		socid;
-	uint32_t		addr_mask;
-};
-
-#define MTK_PCI_PCICFG			0x0000
-#define    MTK_PCI_RESET			(1<<1)
-#define MTK_PCI_PCIINT			0x0008
-#define MTK_PCI_PCIENA			0x000C
-#define MTK_PCI_CFGADDR			0x0020
-#define MTK_PCI_CFGDATA			0x0024
-#define MTK_PCI_MEMBASE			0x0028
-#define MTK_PCI_IOBASE			0x002C
-#define MTK_PCI_ARBCTL			0x0080
-#define MTK_PCI_PHY0_CFG		0x0090
-
-#define MTK_PCI_PCIE0_BAR0SETUP		0x2010
-#define MTK_PCI_PCIE0_BAR1SETUP		0x2014
-#define MTK_PCI_PCIE0_IMBASEBAR0	0x2018
-#define MTK_PCI_PCIE0_ID		0x2030
-#define MTK_PCI_PCIE0_CLASS		0x2034
-#define MTK_PCI_PCIE0_SUBID		0x2038
-#define MTK_PCI_PCIE0_STATUS		0x2050
-#define MTK_PCI_PCIE0_DLECR		0x2060
-#define MTK_PCI_PCIE0_ECRC		0x2064
-
-#define MTK_PCIE_BAR0SETUP(_s)		(MTK_PCI_PCIE0_BAR0SETUP + (_s)*0x1000)
-#define MTK_PCIE_BAR1SETUP(_s)		(MTK_PCI_PCIE0_BAR1SETUP + (_s)*0x1000)
-#define MTK_PCIE_IMBASEBAR0(_s)		(MTK_PCI_PCIE0_IMBASEBAR0 + (_s)*0x1000)
-#define MTK_PCIE_ID(_s)			(MTK_PCI_PCIE0_ID + (_s)*0x1000)
-#define MTK_PCIE_CLASS(_s)		(MTK_PCI_PCIE0_CLASS + (_s)*0x1000)
-#define MTK_PCIE_SUBID(_s)		(MTK_PCI_PCIE0_SUBID + (_s)*0x1000)
-#define MTK_PCIE_STATUS(_s)		(MTK_PCI_PCIE0_STATUS + (_s)*0x1000)
-
-#define MTK_PCIE0_IRQ			20
-#define MTK_PCIE1_IRQ			21
-#define MTK_PCIE2_IRQ			22
-
-#define MTK_PCI_INTR_PIN		2
-
-/* Chip specific defines */
-#define MT7620_MAX_RETRIES	10
-#define MT7620_PCIE_PHY_CFG	0x90
-#define    PHY_BUSY			(1<<31)
-#define    PHY_MODE_WRITE		(1<<23)
-#define    PHY_ADDR_OFFSET		8
-#define MT7620_PPLL_CFG0	0x98
-#define    PPLL_SW_SET			(1<<31)
-#define MT7620_PPLL_CFG1	0x9c
-#define    PPLL_PD			(1<<26)
-#define    PPLL_LOCKED			(1<<23)
-#define MT7620_PPLL_DRV		0xa0
-#define   PDRV_SW_SET			(1<<31)
-#define   LC_CKDRVPD			(1<<19)
-#define   LC_CKDRVOHZ			(1<<18)
-#define   LC_CKDRVHZ			(1<<17)
-#define MT7620_PERST_GPIO_MODE	(3<<16)
-#define   MT7620_PERST			(0<<16)
-#define   MT7620_GPIO			(2<<16)
-#define MT7620_PKG_BGA		(1<<16)
-
-#define MT7628_PERST_GPIO_MODE	(1<<16)
-#define   MT7628_PERST			(0<<16)
-
-#define MT7621_PERST_GPIO_MODE	(3<<10)
-#define   MT7621_PERST_GPIO		(1<<10)
-#define MT7621_UARTL3_GPIO_MODE	(3<<3)
-#define   MT7621_UARTL3_GPIO		(1<<3)
-#define MT7621_PCIE0_RST	(1<<19)
-#define MT7621_PCIE1_RST	(1<<8)
-#define MT7621_PCIE2_RST	(1<<7)
-#define MT7621_PCIE_RST		(MT7621_PCIE0_RST | MT7621_PCIE1_RST | \
-				 MT7621_PCIE2_RST)
-
-#define RT3883_PCI_RST		(1<<24)
-#define RT3883_PCI_CLK		(1<<19)
-#define RT3883_PCI_HOST_MODE	(1<<7)
-#define RT3883_PCIE_RC_MODE	(1<<8)
-/* End of chip specific defines */
-
-#define MT_WRITE32(sc, off, val) \
-	bus_write_4((sc)->pci_res[0], (off), (val))
-#define MT_WRITE16(sc, off, val) \
-	bus_write_2((sc)->pci_res[0], (off), (val))
-#define MT_WRITE8(sc, off, val) \
-	bus_write_1((sc)->pci_res[0], (off), (val))
-#define MT_READ32(sc, off) \
-	bus_read_4((sc)->pci_res[0], (off))
-#define MT_READ16(sc, off) \
-	bus_read_2((sc)->pci_res[0], (off))
-#define MT_READ8(sc, off) \
-	bus_read_1((sc)->pci_res[0], (off))
-
-#define MT_CLR_SET32(sc, off, clr, set)	\
-	MT_WRITE32((sc), (off), ((MT_READ32((sc), (off)) & ~(clr)) | (off)))
-
-#endif /* __MTK_PCIE_H__ */
diff --git a/sys/mips/mediatek/mtk_pinctrl.c b/sys/mips/mediatek/mtk_pinctrl.c
deleted file mode 100644
index a965c75ac4b2..000000000000
--- a/sys/mips/mediatek/mtk_pinctrl.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/fdt/fdt_pinctrl.h>
-#include <mips/mediatek/mtk_sysctl.h>
-#include <mips/mediatek/mtk_soc.h>
-#include <mips/mediatek/mtk_pinctrl.h>
-
-#include "fdt_pinctrl_if.h"
-
-static const struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-pinmux",	1 },
-
-	/* Sentinel */
-	{ NULL,				0 }
-};
-
-static int
-mtk_pinctrl_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Pin Controller");
-
-	return (0);
-}
-
-static int
-mtk_pinctrl_attach(device_t dev)
-{
-
-	if (device_get_unit(dev) != 0) {
-		device_printf(dev, "Only one pin control allowed\n");
-		return (ENXIO);
-	}
-
-	if (bootverbose)
-		device_printf(dev, "GPIO mode start: 0x%08x\n",
-		    mtk_sysctl_get(SYSCTL_GPIOMODE));
-
-	fdt_pinctrl_register(dev, NULL);
-	fdt_pinctrl_configure_tree(dev);
-
-	if (bootverbose)
-		device_printf(dev, "GPIO mode end  : 0x%08x\n",
-		    mtk_sysctl_get(SYSCTL_GPIOMODE));
-
-	return (0);
-}
-
-static int
-mtk_pinctrl_process_entry(device_t dev, struct mtk_pin_group *table,
-    const char *group, char *func)
-{
-	uint32_t val;
-	int found = 0, i, j;
-
-	for (i = 0; table[i].name != NULL; i++) {
-                if (strcmp(table[i].name, group) == 0) {
-			found = 1;
-                        break;
-		}
-        }
-
-	if (!found)
-		return (ENOENT);
-
-        for (j = 0; j < table[i].funcnum; j++) {
-                if (strcmp(table[i].functions[j].name, func) == 0) {
-                        val = mtk_sysctl_get(table[i].sysc_reg);
-                        val &= ~(table[i].mask << table[i].offset);
-                        val |= (table[i].functions[j].value << table[i].offset);
-                        mtk_sysctl_set(table[i].sysc_reg, val);
-                        return (0);
-		}
-	}
-
-	return (ENOENT);
-}
-
-static int
-mtk_pinctrl_process_node(device_t dev, struct mtk_pin_group *table,
-    phandle_t node)
-{
-	const char **group_list = NULL;
-	char *pin_function = NULL;
-	int ret, num_groups, i;
-
-	ret = 0;
-
-	num_groups = ofw_bus_string_list_to_array(node, "ralink,group",
-	    &group_list);
-
-	if (num_groups <= 0)
-		return (ENOENT);
-
-	if (OF_getprop_alloc_multi(node, "ralink,function", sizeof(*pin_function),
-			     (void **)&pin_function) == -1) {
-		ret = ENOENT;
-		goto out;
-	}
-
-	for (i = 0; i < num_groups; i++) {
-		if ((ret = mtk_pinctrl_process_entry(dev, table, group_list[i],
-		    pin_function)) != 0)
-			goto out;
-	}
-
-out:
-	OF_prop_free(group_list);
-	OF_prop_free(pin_function);
-	return (ret);
-}
-
-static int
-mtk_pinctrl_configure(device_t dev, phandle_t cfgxref)
-{
-	struct mtk_pin_group *pintable;
-	phandle_t node, child;
-	uint32_t socid;
-	int ret;
-
-	node = OF_node_from_xref(cfgxref);
-	ret = 0;
-
-	/* Now, get the system type, so we can get the proper GPIO mode array */
-	socid = mtk_soc_get_socid();
-
-	switch (socid) {
-	case MTK_SOC_RT2880:
-		pintable = rt2880_pintable;
-		break;
-	case MTK_SOC_RT3050: /* fallthrough */
-	case MTK_SOC_RT3052:
-	case MTK_SOC_RT3350:
-		pintable = rt3050_pintable;
-		break;
-	case MTK_SOC_RT3352:
-		pintable = rt3352_pintable;
-		break;
-	case MTK_SOC_RT3662: /* fallthrough */
-	case MTK_SOC_RT3883:
-		pintable = rt3883_pintable;
-		break;
-	case MTK_SOC_RT5350:
-		pintable = rt5350_pintable;
-		break;
-	case MTK_SOC_MT7620A: /* fallthrough */
-	case MTK_SOC_MT7620N:
-		pintable = mt7620_pintable;
-		break;
-	case MTK_SOC_MT7628: /* fallthrough */
-	case MTK_SOC_MT7688:
-		pintable = mt7628_pintable;
-		break;
-	case MTK_SOC_MT7621:
-		pintable = mt7621_pintable;
-		break;
-	default:
-		ret = ENOENT;
-		goto out;
-	}
-
-	/*
-	 * OpenWRT dts files have single child within the pinctrl nodes, which
-	 * contains the 'ralink,group' and 'ralink,function' properties.
-	 */ 
-	for (child = OF_child(node); child != 0 && child != -1;
-	    child = OF_peer(child)) {
-		if ((ret = mtk_pinctrl_process_node(dev, pintable, child)) != 0)
-			return (ret);
-	}
-
-out:
-	return (ret);
-}
-
-static device_method_t mtk_pinctrl_methods[] = {
-	DEVMETHOD(device_probe,			mtk_pinctrl_probe),
-	DEVMETHOD(device_attach,		mtk_pinctrl_attach),
-
-	/* fdt_pinctrl interface */
-	DEVMETHOD(fdt_pinctrl_configure,	mtk_pinctrl_configure),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_pinctrl_driver = {
-	"pinctrl",
-	mtk_pinctrl_methods,
-	0,
-};
-static devclass_t mtk_pinctrl_devclass;
-
-EARLY_DRIVER_MODULE(mtk_pinctrl, simplebus, mtk_pinctrl_driver,
-    mtk_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
-
-MODULE_DEPEND(mtk_pinctrl, mtk_sysctl, 1, 1, 1);
diff --git a/sys/mips/mediatek/mtk_pinctrl.h b/sys/mips/mediatek/mtk_pinctrl.h
deleted file mode 100644
index 955de4643b16..000000000000
--- a/sys/mips/mediatek/mtk_pinctrl.h
+++ /dev/null
@@ -1,373 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MTK_PINCTRL_H_
-#define _MTK_PINCTRL_H_
-
-struct mtk_pin_function {
-	const char		*name;
-	uint32_t		value;
-};
-
-struct mtk_pin_group {
-	const char		*name;
-	uint32_t		sysc_reg;
-	uint32_t		offset;
-	uint32_t		mask;
-	struct mtk_pin_function	*functions;
-	uint32_t		funcnum;
-};
-
-#define FUNC(_name, _value)			\
-    { .name = (_name), .value = (_value) }
-
-#define GROUP(_name, _reg, _off, _mask, _funcs)	\
-    { .name = (_name), .sysc_reg = (_reg), .offset = (_off),		\
-    .mask = (_mask), .functions = (_funcs), .funcnum = nitems(_funcs) }
-#define GROUP_END	{ NULL, 0, 0, 0, NULL, 0 }
-
-#define DECL_FUNC(_name)	\
-    static struct mtk_pin_function _name[]
-#define DECL_TABLE(_name)	\
-    static struct mtk_pin_group _name[]
-
-/* Pin function declarations */
-DECL_FUNC(i2c_func) = {
-	FUNC("i2c", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(spi_func) = {
-	FUNC("spi", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(uartf_func) = {
-	FUNC("uartf", 0), FUNC("pcm uartf", 1), FUNC("pcm i2s", 2),
-	FUNC("i2s uartf", 3), FUNC("pcm gpio", 4), FUNC("gpio uartf", 5),
-	FUNC("gpio i2s", 6), FUNC("gpio", 7)
-};
-
-DECL_FUNC(wdt_func) = {
-	FUNC("wdt rst", 0), FUNC("wdt", 0), FUNC("wdt refclk", 1),
-	FUNC("gpio", 2)
-};
-
-DECL_FUNC(uartlite_func) = {
-	FUNC("uartlite", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(jtag_func) = {
-	FUNC("jtag", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mdio_func) = {
-	FUNC("mdio", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(led_func) = {
-	FUNC("led", 0), FUNC("gpio", 1), FUNC("bt", 2)
-};
-
-DECL_FUNC(cs1_func) = {
-	FUNC("spi_cs1", 0), FUNC("wdt_cs1", 1), FUNC("gpio", 2)
-};
-
-DECL_FUNC(sdram_func) = {
-	FUNC("sdram", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(rgmii_func) = {
-	FUNC("rgmii", 0), FUNC("rgmii1", 0), FUNC("rgmii2", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(lna_func) = {
-	FUNC("lna", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(pa_func) = {
-	FUNC("pa", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(gex_func) = {
-	FUNC("ge1", 0), FUNC("ge2", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(rt2880_uartf_func) = {
-	FUNC("uartf", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(rt2880_pci_func) = {
-	FUNC("pci", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(rt3883_pci_func) = {
-	FUNC("pci-dev", 0), FUNC("pci-host2", 1), FUNC("pci-host1", 2),
-	FUNC("pci-fnc", 3), FUNC("gpio", 7)
-};
-
-DECL_FUNC(mt7620_pcie_func) = {
-	FUNC("pcie rst", 0), FUNC("pcie refclk", 1), FUNC("gpio", 2)
-};
-
-DECL_FUNC(lna_a_func) = {
-	FUNC("lna a", 0), FUNC("lna g", 0), FUNC("codec", 2), FUNC("gpio", 3)
-};
-
-DECL_FUNC(nd_sd_func) = {
-	FUNC("nand", 0), FUNC("sd", 1), FUNC("gpio", 2)
-};
-
-DECL_FUNC(mt7620_mdio_func) = {
-	FUNC("mdio", 0), FUNC("mdio refclk", 1), FUNC("gpio", 2)
-};
-
-DECL_FUNC(spi_refclk_func) = {
-	FUNC("spi refclk", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(wled_func) = {
-	FUNC("wled", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(ephy_func) = {
-	FUNC("ephy", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7628_gpio_func) = {
-	FUNC("gpio", 0), FUNC("gpio", 1), FUNC("refclk", 2), FUNC("pcie", 3)
-};
-
-DECL_FUNC(mt7628_spis_func) = {
-	FUNC("spis", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("pwm", 3)
-};
-
-DECL_FUNC(mt7628_spi_cs1_func) = {
-	FUNC("spi", 0), FUNC("gpio", 1), FUNC("refclk", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7628_i2s_func) = {
-	FUNC("i2s", 0), FUNC("gpio", 1), FUNC("pcm", 2), FUNC("anttenna", 3)
-};
-
-DECL_FUNC(mt7628_uart0_func) = {
-	FUNC("uart0", 0), FUNC("gpio", 1), FUNC("-", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7628_sd_func) = {
-	FUNC("sdxc", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("jtag", 3)
-};
-
-DECL_FUNC(mt7628_perst_func) = {
-	FUNC("perst", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7628_refclk_func) = {
-	FUNC("refclk", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7628_i2c_func) = {
-	FUNC("i2c", 0), FUNC("gpio", 1), FUNC("debug", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7628_uart1_func) = {
-	FUNC("uart1", 0), FUNC("gpio", 1), FUNC("pwm", 2), FUNC("sw r", 3)
-};
-
-DECL_FUNC(mt7628_uart2_func) = {
-	FUNC("uart2", 0), FUNC("gpio", 1), FUNC("pwm", 2), FUNC("sdxc", 3)
-};
-
-DECL_FUNC(mt7628_pwm0_func) = {
-	FUNC("pwm", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("sdxc", 3)
-};
-
-DECL_FUNC(mt7621_uart1_func) = {
-	FUNC("uart1", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7621_i2c_func) = {
-	FUNC("i2c", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7621_uart3_func) = {
-	FUNC("uart3", 0), FUNC("gpio", 1), FUNC("i2s", 2), FUNC("spdif3", 3)
-};
-
-DECL_FUNC(mt7621_uart2_func) = {
-	FUNC("uart2", 0), FUNC("gpio", 1), FUNC("pcm", 2), FUNC("spdif2", 3)
-};
-
-DECL_FUNC(mt7621_jtag_func) = {
-	FUNC("jtag", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7621_wdt_func) = {
-	FUNC("wdt rst", 0), FUNC("gpio", 1), FUNC("wdt refclk", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7621_pcie_func) = {
-	FUNC("pcie rst", 0), FUNC("gpio", 1), FUNC("pcie refclk", 2),
-	FUNC("-", 3)
-};
-
-DECL_FUNC(mt7621_mdio_func) = {
-	FUNC("mdio", 0), FUNC("gpio", 1), FUNC("-", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7621_rgmii_func) = {
-	FUNC("rgmii1", 0), FUNC("rgmii2", 0), FUNC("gpio", 1)
-};
-
-DECL_FUNC(mt7621_spi_func) = {
-	FUNC("spi", 0), FUNC("gpio", 1), FUNC("nand1", 2), FUNC("-", 3)
-};
-
-DECL_FUNC(mt7621_sdhci_func) = {
-	FUNC("sdhci", 0), FUNC("gpio", 1), FUNC("nand1", 2), FUNC("-", 3)
-};
-
-/* Pin groups declarations */
-DECL_TABLE(mt7628_pintable) = {
-	GROUP("gpio", SYSCTL_GPIOMODE, 0, 3, mt7628_gpio_func),
-	GROUP("spis", SYSCTL_GPIOMODE, 2, 3, mt7628_spis_func),
-	GROUP("spi cs1", SYSCTL_GPIOMODE, 4, 3, mt7628_spi_cs1_func),
-	GROUP("i2s", SYSCTL_GPIOMODE, 6, 3, mt7628_i2s_func),
-	GROUP("uart0", SYSCTL_GPIOMODE, 8, 3, mt7628_uart0_func),
-	GROUP("sdmode", SYSCTL_GPIOMODE, 10, 3, mt7628_sd_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 12, 1, spi_func),
-	GROUP("wdt", SYSCTL_GPIOMODE, 14, 1, wdt_func),
-	GROUP("perst", SYSCTL_GPIOMODE, 16, 1, mt7628_perst_func),
-	GROUP("refclk", SYSCTL_GPIOMODE, 18, 1, mt7628_refclk_func),
-	GROUP("i2c", SYSCTL_GPIOMODE, 20, 3, mt7628_i2c_func),
-	GROUP("uart1", SYSCTL_GPIOMODE, 24, 3, mt7628_uart1_func),
-	GROUP("uart2", SYSCTL_GPIOMODE, 26, 3, mt7628_uart2_func),
-	GROUP("pwm0", SYSCTL_GPIOMODE, 28, 3, mt7628_pwm0_func),
-	GROUP("pwm1", SYSCTL_GPIOMODE, 30, 3, mt7628_pwm0_func),
-	GROUP_END
-};
-
-DECL_TABLE(mt7621_pintable) = {
-	GROUP("uart1", SYSCTL_GPIOMODE, 1, 1, mt7621_uart1_func),
-	GROUP("i2c", SYSCTL_GPIOMODE, 2, 1, mt7621_i2c_func),
-	GROUP("uart3", SYSCTL_GPIOMODE, 3, 3, mt7621_uart3_func),
-	GROUP("uart2", SYSCTL_GPIOMODE, 5, 3, mt7621_uart2_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 7, 1, mt7621_jtag_func),
-	GROUP("wdt", SYSCTL_GPIOMODE, 8, 3, mt7621_wdt_func),
-	GROUP("pcie", SYSCTL_GPIOMODE, 10, 3, mt7621_pcie_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 12, 3, mt7621_mdio_func),
-	GROUP("rgmii2", SYSCTL_GPIOMODE, 15, 1, mt7621_rgmii_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 16, 3, mt7621_spi_func),
-	GROUP("sdhci", SYSCTL_GPIOMODE, 18, 3, mt7621_sdhci_func),
-	GROUP("rgmii1", SYSCTL_GPIOMODE, 14, 1, mt7621_rgmii_func),
-	GROUP_END
-};
-
-DECL_TABLE(mt7620_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 7, 3, mt7620_mdio_func),
-	GROUP("rgmii1", SYSCTL_GPIOMODE, 9, 1, rgmii_func),
-	GROUP("rgmii2", SYSCTL_GPIOMODE, 10, 1, rgmii_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 11, 1, spi_func),
-	GROUP("spi refclk", SYSCTL_GPIOMODE, 12, 1, spi_refclk_func),
-	GROUP("wled", SYSCTL_GPIOMODE, 13, 1, wled_func),
-	GROUP("ephy", SYSCTL_GPIOMODE, 15, 1, ephy_func),
-	GROUP("pcie", SYSCTL_GPIOMODE, 16, 3, mt7620_pcie_func),
-	GROUP("nd_sd", SYSCTL_GPIOMODE, 18, 3, nd_sd_func),
-	GROUP("pa", SYSCTL_GPIOMODE, 20, 1, pa_func),
-	GROUP("wdt", SYSCTL_GPIOMODE, 21, 3, wdt_func),
-	GROUP_END
-};
-
-DECL_TABLE(rt2880_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 1, 1, rt2880_uartf_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 2, 1, spi_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 3, 1, uartlite_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 4, 1, jtag_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 5, 1, mdio_func),
-	GROUP("sdram", SYSCTL_GPIOMODE, 6, 1, sdram_func),
-	GROUP("pci", SYSCTL_GPIOMODE, 7, 1, rt2880_pci_func),
-	GROUP_END
-};
-
-DECL_TABLE(rt3050_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func),
-	GROUP("sdram", SYSCTL_GPIOMODE, 8, 1, sdram_func),
-	GROUP("rgmii", SYSCTL_GPIOMODE, 9, 1, rgmii_func),
-	GROUP_END
-};
-
-DECL_TABLE(rt3352_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 1, 1, i2c_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func),
-	GROUP("rgmii", SYSCTL_GPIOMODE, 9, 1, rgmii_func),
-	GROUP("led", SYSCTL_GPIOMODE, 14, 3, led_func),
-	GROUP("lna", SYSCTL_GPIOMODE, 18, 1, lna_func),
-	GROUP("pa", SYSCTL_GPIOMODE, 20, 1, pa_func),
-	GROUP("spi_cs1", SYSCTL_GPIOMODE, 21, 3, cs1_func),
-	GROUP_END
-};
-
-DECL_TABLE(rt3883_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func),
-	GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func),
-	GROUP("lna a", SYSCTL_GPIOMODE, 16, 3, lna_a_func),
-	GROUP("lna g", SYSCTL_GPIOMODE, 18, 3, lna_a_func),
-	GROUP("pci", SYSCTL_GPIOMODE, 11, 7, rt3883_pci_func),
-	GROUP("ge1", SYSCTL_GPIOMODE, 9, 1, gex_func),
-	GROUP("ge2", SYSCTL_GPIOMODE, 10, 1, gex_func),
-	GROUP_END
-};
-
-DECL_TABLE(rt5350_pintable) = {
-	GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func),
-	GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func),
-	GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func),
-	GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func),
-	GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func),
-	GROUP("led", SYSCTL_GPIOMODE, 14, 3, led_func),
-	GROUP("spi_cs1", SYSCTL_GPIOMODE, 21, 3, cs1_func),
-	GROUP_END
-};
-
-#endif /* _MTK_PINCTRL_H_ */
diff --git a/sys/mips/mediatek/mtk_reset.c b/sys/mips/mediatek/mtk_reset.c
deleted file mode 100644
index 31d56e44a1de..000000000000
--- a/sys/mips/mediatek/mtk_reset.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/fdt_reset.h>
-#include <mips/mediatek/mtk_sysctl.h>
-
-#include "fdt_reset_if.h"
-
-static const struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-reset",	1 },
-
-	/* Sentinel */
-	{ NULL,				0 }
-};
-
-static int
-mtk_reset_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Reset Controller");
-
-	return (0);
-}
-
-static int
-mtk_reset_attach(device_t dev)
-{
-
-	if (device_get_unit(dev) != 0) {
-		device_printf(dev, "Only one reset control allowed\n");
-		return (ENXIO);
-	}
-
-	fdt_reset_register_provider(dev);
-
-	return (0);
-}
-
-#define RESET_ASSERT	1
-#define RESET_DEASSERT	0
-
-static int
-mtk_reset_set(device_t dev, int index, int value)
-{
-	uint32_t mask;
-
-	/* index 0 is SoC reset, indices 1 - 31 are valid peripheral resets */
-	if (index < 1 || index > 31)
-		return (EINVAL);
-
-	mask = (1u << index);
-
-	if (value == RESET_ASSERT)
-		mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, mask);
-	else
-		mtk_sysctl_clr_set(SYSCTL_RSTCTRL, mask, 0);
-
-	return (0);
-}
-
-static int
-mtk_reset_assert(device_t dev, int index)
-{
-
-	return mtk_reset_set(dev, index, RESET_ASSERT);
-}
-
-static int
-mtk_reset_deassert(device_t dev, int index)
-{
-
-	return mtk_reset_set(dev, index, RESET_DEASSERT);
-}
-
-static device_method_t mtk_reset_methods[] = {
-	DEVMETHOD(device_probe,		mtk_reset_probe),
-	DEVMETHOD(device_attach,	mtk_reset_attach),
-
-	/* fdt_reset interface */
-	DEVMETHOD(fdt_reset_assert,	mtk_reset_assert),
-	DEVMETHOD(fdt_reset_deassert,	mtk_reset_deassert),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_reset_driver = {
-	"rstctrl",
-	mtk_reset_methods,
-	0,
-};
-static devclass_t mtk_reset_devclass;
-
-EARLY_DRIVER_MODULE(mtk_reset, simplebus, mtk_reset_driver, mtk_reset_devclass,
-    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
-
-MODULE_DEPEND(mtk_reset, mtk_sysctl, 1, 1, 1);
diff --git a/sys/mips/mediatek/mtk_soc.c b/sys/mips/mediatek/mtk_soc.c
deleted file mode 100644
index 96ce0bc0f12f..000000000000
--- a/sys/mips/mediatek/mtk_soc.c
+++ /dev/null
@@ -1,509 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <machine/fdt.h>
-#include <machine/md_var.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/fdt/fdt_clock.h>
-
-#include <mips/mediatek/fdt_reset.h>
-#include <mips/mediatek/mtk_sysctl.h>
-#include <mips/mediatek/mtk_soc.h>
-
-static uint32_t mtk_soc_socid = MTK_SOC_UNKNOWN;
-static uint32_t mtk_soc_uartclk = 0;
-static uint32_t mtk_soc_cpuclk = MTK_CPU_CLK_880MHZ;
-static uint32_t mtk_soc_timerclk = MTK_CPU_CLK_880MHZ / 2;
-
-static uint32_t mtk_soc_chipid0_3 = MTK_UNKNOWN_CHIPID0_3;
-static uint32_t mtk_soc_chipid4_7 = MTK_UNKNOWN_CHIPID4_7;
-
-static const struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-soc",		MTK_SOC_RT2880 },
-	{ "ralink,rt3050-soc",		MTK_SOC_RT3050 },
-	{ "ralink,rt3052-soc",		MTK_SOC_RT3052 },
-	{ "ralink,rt3350-soc",		MTK_SOC_RT3350 },
-	{ "ralink,rt3352-soc",		MTK_SOC_RT3352 },
-	{ "ralink,rt3662-soc",		MTK_SOC_RT3662 },
-	{ "ralink,rt3883-soc",		MTK_SOC_RT3883 },
-	{ "ralink,rt5350-soc",		MTK_SOC_RT5350 },
-	{ "ralink,mtk7620a-soc",	MTK_SOC_MT7620A },
-	{ "ralink,mt7620a-soc",		MTK_SOC_MT7620A },
-	{ "ralink,mtk7620n-soc",	MTK_SOC_MT7620N },
-	{ "ralink,mt7620n-soc",		MTK_SOC_MT7620N },
-	{ "mediatek,mtk7621-soc",	MTK_SOC_MT7621 },
-	{ "mediatek,mt7621-soc",	MTK_SOC_MT7621 },
-	{ "ralink,mt7621-soc",		MTK_SOC_MT7621 },
-	{ "ralink,mtk7621-soc",		MTK_SOC_MT7621 },
-	{ "ralink,mtk7628an-soc",	MTK_SOC_MT7628 },
-	{ "mediatek,mt7628an-soc",	MTK_SOC_MT7628 },
-	{ "ralink,mtk7688-soc",		MTK_SOC_MT7688 },
-
-	/* Sentinel */
-	{ NULL,				MTK_SOC_UNKNOWN },
-};
-
-static uint32_t
-mtk_detect_cpuclk_rt2880(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-	val >>= RT2880_CPU_CLKSEL_OFF;
-	val &= RT2880_CPU_CLKSEL_MSK;
-
-	switch (val) {
-	case 0:
-		return (MTK_CPU_CLK_250MHZ);
-	case 1:
-		return (MTK_CPU_CLK_266MHZ);
-	case 2:
-		return (MTK_CPU_CLK_280MHZ);
-	case 3:
-		return (MTK_CPU_CLK_300MHZ);
-	}
-
-	/* Never reached */
-	return (0);
-}
-
-static uint32_t
-mtk_detect_cpuclk_rt305x(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3);
-	if (val == RT3350_CHIPID0_3)
-		return (MTK_CPU_CLK_320MHZ);
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-	val >>= RT305X_CPU_CLKSEL_OFF;
-	val &= RT305X_CPU_CLKSEL_MSK;
-
-	return ((val == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ);
-}
-
-static uint32_t
-mtk_detect_cpuclk_rt3352(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-	val >>= RT3352_CPU_CLKSEL_OFF;
-	val &= RT3352_CPU_CLKSEL_MSK;
-
-	if (val)
-		return (MTK_CPU_CLK_400MHZ);
-
-	return (MTK_CPU_CLK_384MHZ);
-}
-
-static uint32_t
-mtk_detect_cpuclk_rt3883(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-	val >>= RT3883_CPU_CLKSEL_OFF;
-	val &= RT3883_CPU_CLKSEL_MSK;
-
-	switch (val) {
-	case 0:
-		return (MTK_CPU_CLK_250MHZ);
-	case 1:
-		return (MTK_CPU_CLK_384MHZ);
-	case 2:
-		return (MTK_CPU_CLK_480MHZ);
-	case 3:
-		return (MTK_CPU_CLK_500MHZ);
-	}
-
-	/* Never reached */
-	return (0);
-}
-
-static uint32_t
-mtk_detect_cpuclk_rt5350(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val1, val2;
-
-	val1 = val2 = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-
-	val1 >>= RT5350_CPU_CLKSEL_OFF1;
-	val2 >>= RT5350_CPU_CLKSEL_OFF2;
-	val1 &= RT5350_CPU_CLKSEL_MSK;
-	val2 &= RT5350_CPU_CLKSEL_MSK;
-	val1 |= (val2 << 1);
-
-	switch (val1) {
-	case 0:
-		return (MTK_CPU_CLK_360MHZ);
-	case 1:
-		/* Reserved value, but we return UNKNOWN */
-		return (MTK_CPU_CLK_UNKNOWN);
-	case 2:
-		return (MTK_CPU_CLK_320MHZ);
-	case 3:
-		return (MTK_CPU_CLK_300MHZ);
-	}
-
-	/* Never reached */
-	return (0);
-}
-
-static uint32_t
-mtk_detect_cpuclk_mt7620(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val, mul, div, res;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_MT7620_CPLL_CFG1);
-	if (val & MT7620_CPU_CLK_AUX0)
-		return (MTK_CPU_CLK_480MHZ);
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_MT7620_CPLL_CFG0);
-	if (!(val & MT7620_CPLL_SW_CFG))
-		return (MTK_CPU_CLK_600MHZ);
-
-	mul = MT7620_PLL_MULT_RATIO_BASE + ((val >> MT7620_PLL_MULT_RATIO_OFF) &
-	    MT7620_PLL_MULT_RATIO_MSK);
-	div = (val >> MT7620_PLL_DIV_RATIO_OFF) & MT7620_PLL_DIV_RATIO_MSK;
-
-	if (div != MT7620_PLL_DIV_RATIO_MSK)
-		div += MT7620_PLL_DIV_RATIO_BASE;
-	else
-		div = MT7620_PLL_DIV_RATIO_MAX;
-
-	res = (MT7620_XTAL_40 * mul) / div;
-
-	return (MTK_MHZ(res));
-}
-
-static uint32_t
-mtk_detect_cpuclk_mt7621(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val, div, res;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_CLKCFG0);
-	if (val & MT7621_USES_MEMDIV) {
-		div = bus_space_read_4(bst, bsh, MTK_MT7621_CLKDIV_REG);
-		div >>= MT7621_MEMDIV_OFF;
-		div &= MT7621_MEMDIV_MSK;
-		div += MT7621_MEMDIV_BASE;
-
-		val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-		val >>= MT7621_CLKSEL_OFF;
-		val &= MT7621_CLKSEL_MSK;
-
-		if (val >= MT7621_CLKSEL_25MHZ_VAL)
-			res = div * MT7621_CLKSEL_25MHZ;
-		else if (val >= MT7621_CLKSEL_20MHZ_VAL)
-			res = div * MT7621_CLKSEL_20MHZ;
-		else
-			res = div * 0; /* XXX: not sure about this */
-	} else {
-		val = bus_space_read_4(bst, bsh, SYSCTL_CUR_CLK_STS);
-		div = (val >> MT7621_CLK_STS_DIV_OFF) & MT7621_CLK_STS_MSK;
-		val &= MT7621_CLK_STS_MSK;
-
-		res = (MT7621_CLK_STS_BASE * val) / div;
-	}
-
-	return (MTK_MHZ(res));
-}
-
-static uint32_t
-mtk_detect_cpuclk_mt7628(bus_space_tag_t bst, bus_space_handle_t bsh)
-{
-	uint32_t val;
-
-	val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
-	val >>= MT7628_CPU_CLKSEL_OFF;
-	val &= MT7628_CPU_CLKSEL_MSK;
-
-	if (val)
-		return (MTK_CPU_CLK_580MHZ);
-
-	return (MTK_CPU_CLK_575MHZ);
-}
-
-void
-mtk_soc_try_early_detect(void)
-{
-	bus_space_tag_t bst;
-	bus_space_handle_t bsh;
-	uint32_t base;
-	phandle_t node;
-	int i;
-
-	if ((node = OF_finddevice("/")) == -1)
-		return;
-
-	for (i = 0; compat_data[i].ocd_str != NULL; i++) {
-		if (ofw_bus_node_is_compatible(node, compat_data[i].ocd_str)) {
-			mtk_soc_socid = compat_data[i].ocd_data;
-			break;
-		}
-	}
-
-	if (mtk_soc_socid == MTK_SOC_UNKNOWN) {
-		/* We don't know the SoC, so we don't know how to get clocks */
-		return;
-	}
-
-	bst = fdtbus_bs_tag;
-	if (mtk_soc_socid == MTK_SOC_RT2880)
-		base = MTK_RT2880_BASE;
-	else if (mtk_soc_socid == MTK_SOC_MT7621)
-		base = MTK_MT7621_BASE;
-	else
-		base = MTK_DEFAULT_BASE;
-
-	if (bus_space_map(bst, base, MTK_DEFAULT_SIZE, 0, &bsh))
-		return;
-
-	/* Get our CHIP ID */
-	mtk_soc_chipid0_3 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3);
-	mtk_soc_chipid4_7 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID4_7);
-
-	/* First, figure out the CPU clock */
-	switch (mtk_soc_socid) {
-	case MTK_SOC_RT2880:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_rt2880(bst, bsh);
-		break;
-	case MTK_SOC_RT3050:  /* fallthrough */
-	case MTK_SOC_RT3052:
-	case MTK_SOC_RT3350:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh);
-		break;
-	case MTK_SOC_RT3352:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_rt3352(bst, bsh);
-		break;
-	case MTK_SOC_RT3662:  /* fallthrough */
-	case MTK_SOC_RT3883:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_rt3883(bst, bsh);
-		break;
-	case MTK_SOC_RT5350:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_rt5350(bst, bsh);
-		break;
-	case MTK_SOC_MT7620A: /* fallthrough */
-	case MTK_SOC_MT7620N:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_mt7620(bst, bsh);
-		break;
-	case MTK_SOC_MT7621:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_mt7621(bst, bsh);
-		break;
-	case MTK_SOC_MT7628:  /* fallthrough */
-	case MTK_SOC_MT7688:
-		mtk_soc_cpuclk = mtk_detect_cpuclk_mt7628(bst, bsh);
-		break;
-	default:
-		/* We don't know the SoC, so we can't find the CPU clock */
-		break;
-	}
-
-	/* Now figure out the timer clock */
-	if (mtk_soc_socid == MTK_SOC_MT7621) {
-#ifdef notyet
-		/* 
-		 * We use the GIC timer for timing source and its clock freq is
-		 * the same as the CPU's clock freq
-		 */
-		mtk_soc_timerclk = mtk_soc_cpuclk;
-#else
-		/*
-		 * When GIC timer and MIPS timer are ready to co-exist and
-		 * GIC timer is actually implemented, we need to switch to it.
-		 * Until then we use a fake GIC timer, which is actually a
-		 * normal MIPS ticker, so the timer clock is half the CPU clock
-		 */
-		mtk_soc_timerclk = mtk_soc_cpuclk / 2;
-#endif
-	} else {
-		/*
-		 * We use the MIPS ticker for the rest for now, so
-		 * the CPU clock is divided by 2
-		 */
-		mtk_soc_timerclk = mtk_soc_cpuclk / 2;
-	}
-
-	switch (mtk_soc_socid) {
-	case MTK_SOC_RT2880:
-		mtk_soc_uartclk = mtk_soc_cpuclk / MTK_UARTDIV_2;
-		break;
-	case MTK_SOC_RT3350:  /* fallthrough */
-	case MTK_SOC_RT3050:  /* fallthrough */
-	case MTK_SOC_RT3052:
-		/* UART clock is CPU clock / 3 */
-		mtk_soc_uartclk = mtk_soc_cpuclk / MTK_UARTDIV_3;
-		break;
-	case MTK_SOC_RT3352:  /* fallthrough */
-	case MTK_SOC_RT3662:  /* fallthrough */
-	case MTK_SOC_RT3883:  /* fallthrough */
-	case MTK_SOC_RT5350:  /* fallthrough */
-	case MTK_SOC_MT7620A: /* fallthrough */
-	case MTK_SOC_MT7620N: /* fallthrough */
-	case MTK_SOC_MT7628:  /* fallthrough */
-	case MTK_SOC_MT7688:
-		/* UART clock is always 40MHz */
-		mtk_soc_uartclk = MTK_UART_CLK_40MHZ;
-		break;
-	case MTK_SOC_MT7621:
-		/* UART clock is always 50MHz */
-		mtk_soc_uartclk = MTK_UART_CLK_50MHZ;
-		break;
-	default:
-		/* We don't know the SoC, so we don't know the UART clock */
-		break;
-	}
-
-	bus_space_unmap(bst, bsh, MTK_DEFAULT_SIZE);
-}
-
-void
-mtk_soc_set_cpu_model(void)
-{
-	int idx, offset = sizeof(mtk_soc_chipid0_3);
-	char *chipid0_3 = (char *)(&mtk_soc_chipid0_3);
-	char *chipid4_7 = (char *)(&mtk_soc_chipid4_7);
-
-	/*
-	 * CHIPID is always 2x32 bit registers, containing the ASCII
-	 * representation of the chip, so use that directly.
-	 *
-	 * The info is either pre-populated in mtk_soc_try_early_detect() or
-	 * it is left at its default value of "unknown " if it could not be
-	 * obtained for some reason.
-	 */
-	for (idx = 0; idx < offset; idx++) {
-		cpu_model[idx] = chipid0_3[idx];
-		cpu_model[idx + offset] = chipid4_7[idx];
-	}
-
-	/* Null-terminate the string */
-	cpu_model[2 * offset] = 0;
-}
-
-uint32_t
-mtk_soc_get_uartclk(void)
-{
-
-	return mtk_soc_uartclk;
-}
-
-uint32_t
-mtk_soc_get_cpuclk(void)
-{
-
-	return mtk_soc_cpuclk;
-}
-
-uint32_t
-mtk_soc_get_timerclk(void)
-{
-
-	return mtk_soc_timerclk;
-}
-
-uint32_t
-mtk_soc_get_socid(void)
-{
-
-	return mtk_soc_socid;
-}
-
-/*
- * The following are generic reset and clock functions
- */
-
-/* Default reset time is 100ms */
-#define DEFAULT_RESET_TIME	100000
-
-int
-mtk_soc_reset_device(device_t dev)
-{
-	int res;
-
-	res = fdt_reset_assert_all(dev);
-	if (res == 0) {
-		DELAY(DEFAULT_RESET_TIME);
-		res = fdt_reset_deassert_all(dev);
-		if (res == 0)
-			DELAY(DEFAULT_RESET_TIME);
-	}
-
-	return (res);
-}
-
-int
-mtk_soc_stop_clock(device_t dev)
-{
-
-	return (fdt_clock_disable_all(dev));
-}
-
-int
-mtk_soc_start_clock(device_t dev)
-{
-
-	return (fdt_clock_enable_all(dev));
-}
-
-int
-mtk_soc_assert_reset(device_t dev)
-{
-
-	return (fdt_reset_assert_all(dev));
-}
-
-int
-mtk_soc_deassert_reset(device_t dev)
-{
-
-	return (fdt_reset_deassert_all(dev));
-}
-
-void
-mtk_soc_reset(void)
-{
-
-	mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, 1);
-	mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 1, 0);
-}
diff --git a/sys/mips/mediatek/mtk_soc.h b/sys/mips/mediatek/mtk_soc.h
deleted file mode 100644
index 9e9c738872cd..000000000000
--- a/sys/mips/mediatek/mtk_soc.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MTK_SOC_H_
-#define _MTK_SOC_H_
-
-enum mtk_soc_id {
-	MTK_SOC_UNKNOWN,
-	MTK_SOC_RT2880,
-	MTK_SOC_RT3050,
-	MTK_SOC_RT3052,
-	MTK_SOC_RT3350,
-	MTK_SOC_RT3352,
-	MTK_SOC_RT3662,
-	MTK_SOC_RT3883,
-	MTK_SOC_RT5350,
-	MTK_SOC_MT7620A,
-	MTK_SOC_MT7620N,
-	MTK_SOC_MT7621,
-	MTK_SOC_MT7628,
-	MTK_SOC_MT7688,
-	MTK_SOC_MAX
-};
-
-#define RT2880_CPU_CLKSEL_OFF	20
-#define RT2880_CPU_CLKSEL_MSK	0x3
-#define RT305X_CPU_CLKSEL_OFF	18
-#define RT305X_CPU_CLKSEL_MSK	0x1
-#define RT3352_CPU_CLKSEL_OFF	8
-#define RT3352_CPU_CLKSEL_MSK	0x1
-#define RT3883_CPU_CLKSEL_OFF	8
-#define RT3883_CPU_CLKSEL_MSK	0x3
-#define RT5350_CPU_CLKSEL_OFF1	8
-#define RT5350_CPU_CLKSEL_OFF2	10
-#define RT5350_CPU_CLKSEL_MSK	0x1
-#define MT7628_CPU_CLKSEL_OFF	6
-#define MT7628_CPU_CLKSEL_MSK	0x1
-
-#define MT7620_CPU_CLK_AUX0	(1u<<24)
-#define MT7620_CPLL_SW_CFG	(1u<<31)
-#define MT7620_PLL_MULT_RATIO_OFF	16
-#define MT7620_PLL_MULT_RATIO_MSK	0x7
-#define MT7620_PLL_MULT_RATIO_BASE	24
-#define MT7620_PLL_DIV_RATIO_OFF	10
-#define MT7620_PLL_DIV_RATIO_MSK	0x3
-#define MT7620_PLL_DIV_RATIO_BASE	2
-#define MT7620_PLL_DIV_RATIO_MAX	8
-#define MT7620_XTAL_40			40
-
-#define MT7621_USES_MEMDIV	(1u<<30)
-#define MT7621_MEMDIV_OFF	4
-#define MT7621_MEMDIV_MSK	0x7f
-#define MT7621_MEMDIV_BASE	1
-#define MT7621_CLKSEL_OFF	6
-#define MT7621_CLKSEL_MSK	0x7
-#define MT7621_CLKSEL_25MHZ_VAL	6
-#define MT7621_CLKSEL_20MHZ_VAL	3
-#define MT7621_CLKSEL_20MHZ	20
-#define MT7621_CLKSEL_25MHZ	25
-#define MT7621_CLK_STS_DIV_OFF	8
-#define MT7621_CLK_STS_MSK	0x1f
-#define MT7621_CLK_STS_BASE	500
-
-#define MTK_MT7621_CLKDIV_REG	0x5648
-#define MTK_MT7621_CLKDIV_OFF	4
-#define MTK_MT7621_CLKDIV_MSK	0x7f
-
-#define MTK_MHZ(x)		((x) * 1000 * 1000)
-
-#define MTK_CPU_CLK_UNKNOWN	0
-#define MTK_CPU_CLK_233MHZ	233333333
-#define MTK_CPU_CLK_250MHZ	250000000
-#define MTK_CPU_CLK_266MHZ	266666666
-#define MTK_CPU_CLK_280MHZ	280000000
-#define MTK_CPU_CLK_300MHZ	300000000
-#define MTK_CPU_CLK_320MHZ	320000000
-#define MTK_CPU_CLK_360MHZ	360000000
-#define MTK_CPU_CLK_384MHZ	384000000
-#define MTK_CPU_CLK_400MHZ	400000000
-#define MTK_CPU_CLK_480MHZ	480000000
-#define MTK_CPU_CLK_500MHZ	500000000
-#define MTK_CPU_CLK_575MHZ	575000000
-#define MTK_CPU_CLK_580MHZ	580000000
-#define MTK_CPU_CLK_600MHZ	600000000
-#define MTK_CPU_CLK_880MHZ	880000000
-
-#define MTK_UART_CLK_40MHZ	40000000
-#define MTK_UART_CLK_50MHZ	50000000
-
-#define MTK_UARTDIV_2		2
-#define MTK_UARTDIV_3		3
-
-#define MTK_DEFAULT_BASE	0x10000000
-#define MTK_RT2880_BASE		0x00300000
-#define MTK_MT7621_BASE		0x1e000000
-#define MTK_DEFAULT_SIZE	0x6000
-
-extern void     mtk_soc_try_early_detect(void);
-extern void	mtk_soc_set_cpu_model(void);
-extern uint32_t mtk_soc_get_uartclk(void);
-extern uint32_t mtk_soc_get_cpuclk(void);
-extern uint32_t mtk_soc_get_timerclk(void);
-extern uint32_t mtk_soc_get_socid(void);
-
-extern int	mtk_soc_reset_device(device_t);
-extern int	mtk_soc_stop_clock(device_t);
-extern int	mtk_soc_start_clock(device_t);
-extern int	mtk_soc_assert_reset(device_t);
-extern int	mtk_soc_deassert_reset(device_t);
-extern void     mtk_soc_reset(void);
-
-#endif /* _MTK_SOC_H_ */
diff --git a/sys/mips/mediatek/mtk_spi_v1.c b/sys/mips/mediatek/mtk_spi_v1.c
deleted file mode 100644
index 2c428b394815..000000000000
--- a/sys/mips/mediatek/mtk_spi_v1.c
+++ /dev/null
@@ -1,413 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <sys/gpio.h>
-#include "gpiobus_if.h"
-
-#include <dev/gpio/gpiobusvar.h>
-
-#include <dev/spibus/spi.h>
-#include <dev/spibus/spibusvar.h>
-#include "spibus_if.h"
-
-#include "opt_platform.h"
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/mtk_soc.h>
-#include <mips/mediatek/mtk_spi_v1.h>
-#include <dev/flash/mx25lreg.h>
-
-#undef MTK_SPI_DEBUG
-#ifdef MTK_SPI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * register space access macros
- */
-#define SPI_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->sc_mem_res, (reg), (val)); \
-	} while (0)
-
-#define SPI_READ(sc, reg)	 bus_read_4(sc->sc_mem_res, (reg))
-
-#define SPI_SET_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
-
-#define SPI_CLEAR_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
-
-struct mtk_spi_softc {
-	device_t		sc_dev;
-	struct resource		*sc_mem_res;
-	struct gpiobus_pin	*gpio_cs;
-	int			nonflash;
-};
-
-static int	mtk_spi_probe(device_t);
-static int	mtk_spi_attach(device_t);
-static int	mtk_spi_detach(device_t);
-static int	mtk_spi_wait(struct mtk_spi_softc *);
-static void	mtk_spi_chip_activate(struct mtk_spi_softc *);
-static void	mtk_spi_chip_deactivate(struct mtk_spi_softc *);
-static uint8_t	mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
-static int	mtk_spi_transfer(device_t, device_t, struct spi_command *);
-static phandle_t mtk_spi_get_node(device_t, device_t);
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-spi",	1 },
-	{ "ralink,rt3050-spi",	1 },
-	{ "ralink,rt3352-spi",	1 },
-	{ "ralink,rt3883-spi",	1 },
-	{ "ralink,rt5350-spi",	1 },
-	{ "ralink,mt7620a-spi",	1 },
-	{ NULL,			0 }
-};
-
-static int
-mtk_spi_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return(ENXIO);
-
-	device_set_desc(dev, "MTK SPI Controller (v1)");
-
-	return (0);
-}
-
-static int
-mtk_spi_attach(device_t dev)
-{
-	struct mtk_spi_softc *sc = device_get_softc(dev);
-	int rid;
-
-	sc->sc_dev = dev;
-        rid = 0;
-	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-	    RF_SHAREABLE | RF_ACTIVE);
-	if (!sc->sc_mem_res) {
-		device_printf(dev, "Could not map memory\n");
-		return (ENXIO);
-	}
-
-	if (mtk_spi_wait(sc)) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-		return (EBUSY);
-	}
-
-	if (ofw_bus_has_prop(dev, "non-flash"))
-		sc->nonflash = 1;
-	else
-		sc->nonflash = 0;
-
-	ofw_gpiobus_parse_gpios(dev, "cs-gpios", &sc->gpio_cs);
-
-	if (sc->gpio_cs != NULL) {
-		GPIO_PIN_SETFLAGS(sc->gpio_cs->dev, sc->gpio_cs->pin,
-		    GPIO_PIN_OUTPUT);
-		GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1);
-	}
-
-	device_add_child(dev, "spibus", -1);
-	return (bus_generic_attach(dev));
-}
-
-static int
-mtk_spi_detach(device_t dev)
-{
-	struct mtk_spi_softc *sc = device_get_softc(dev);
-
-	SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH);
-
-	if (sc->sc_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-
-	return (0);
-}
-
-static void
-mtk_spi_chip_activate(struct mtk_spi_softc *sc)
-{
-        mtk_spi_wait(sc);
-	/*
-	 * Put all CSx to low
-	 */
-	if (sc->gpio_cs != NULL) {
-		GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 0);
-		SPI_CLEAR_BITS(sc, MTK_SPICTL, HIZSMOSI);
-	} else {
-		SPI_CLEAR_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
-	}
-}
-
-static void
-mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
-{
-        mtk_spi_wait(sc);
-	/*
-	 * Put all CSx to high
-	 */
-	if (sc->gpio_cs != NULL) {
-		GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1);
-		SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI);
-	} else {
-		SPI_SET_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
-	}
-}
-
-static int
-mtk_spi_wait(struct mtk_spi_softc *sc)
-{
-	int i = 1000;
-
-	while (i--) {
-		if (!SPI_READ(sc, MTK_SPIBUSY))
-			break;
-	}
-	if (i == 0) {
-		printf("busy\n");
-		return (1);
-	}
-
-	return (0);
-}
-
-static uint8_t
-mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
-{
-
-	if (mtk_spi_wait(sc))
-		return (EBUSY);
-
-	if (write == MTK_SPI_WRITE) {
-		SPI_WRITE(sc, MTK_SPIDATA, *data);
-		SPI_SET_BITS(sc, MTK_SPICTL, START_WRITE);
-	} else {/* MTK_SPI_READ */
-		SPI_SET_BITS(sc, MTK_SPICTL, START_READ);
-		if (mtk_spi_wait(sc))
-			return (EBUSY);
-
-		*data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
-	}
-	return (0);
-}
-
-static int
-mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
-{
-	struct mtk_spi_softc *sc;
-	uint8_t *buf, byte, *tx_buf;
-	uint32_t cs, clock, mode;
-	int i, sz, error = 0, write = 0;
-	int div, clk, cfgreg;
-
-	sc = device_get_softc(dev);
-
-	spibus_get_cs(child, &cs);
-	spibus_get_clock(child, &clock);
-	spibus_get_mode(child, &mode);
-
-	cs &= ~SPIBUS_CS_HIGH;
-
-	if (cs != 0)
-		/* Only 1 CS */
-		return (ENXIO);
-
-	cfgreg = MSBFIRST;
-	switch(mode) {
-		case 0:	/* This is workadound because of
-			   mode 0 not work this soc. */
-		case 3:
-			cfgreg |= SPICLKPOL | TX_ON_CLK_FALL;
-                        break;
-		case 1:
-			cfgreg |= TX_ON_CLK_FALL;
-                        break;
-		case 2:
-			cfgreg |= CAPT_ON_CLK_FALL;
-                        break;
-	}
-
-	/*
-	 * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
-	 * Update: divide by 4, DEV2 to fast for flash.
-	 */
-	if (clock != 0) {
-		div = (mtk_soc_get_cpuclk() + (clock - 1)) / clock;
-		clk = fls(div) - 2;
-		if (clk < 0)
-			clk = 0;
-		else if (clk > 6)
-			clk = 6;
-	} else {
-		clk = 6;
-	}
-
-	SPI_WRITE(sc, MTK_SPICFG, cfgreg | clk);
-
-	if (sc->nonflash == 0) {
-		/* There is always a command to transfer. */
-		tx_buf = (uint8_t *)(cmd->tx_cmd);
-
-		/* Perform some fixup because MTK dont support duplex SPI */
-		switch(tx_buf[0]) {
-			case CMD_READ_IDENT:
-				cmd->tx_cmd_sz = 1;
-				cmd->rx_cmd_sz = 3;
-				break;
-			case CMD_ENTER_4B_MODE:
-			case CMD_EXIT_4B_MODE:
-			case CMD_WRITE_ENABLE:
-			case CMD_WRITE_DISABLE:
-				cmd->tx_cmd_sz = 1;
-				cmd->rx_cmd_sz = 0;
-				break;
-			case CMD_READ_STATUS:
-				cmd->tx_cmd_sz = 1;
-				cmd->rx_cmd_sz = 1;
-				break;
-			case CMD_READ:
-			case CMD_FAST_READ:
-				cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
-				break;
-			case CMD_SECTOR_ERASE:
-				cmd->rx_cmd_sz = 0;
-				break;
-			case CMD_PAGE_PROGRAM:
-				cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
-				break;
-		}
-	}
-        
-	mtk_spi_chip_activate(sc);
-
-	if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
-		buf = (uint8_t *)(cmd->rx_cmd);
-		tx_buf = (uint8_t *)(cmd->tx_cmd);
-		sz = cmd->tx_cmd_sz;
-		if (sc->nonflash == 0)
-			sz += cmd->rx_cmd_sz;
-
-		for (i = 0; i < sz; i++) {
-                        if(i < cmd->tx_cmd_sz) {
-			        byte = tx_buf[i];
-        			error = mtk_spi_txrx(sc, &byte,
-		        	    MTK_SPI_WRITE);
-        			if (error)
-        				goto mtk_spi_transfer_fail;
-                                continue;
-                        }
-                        error = mtk_spi_txrx(sc, &byte,
-		            MTK_SPI_READ);
-        		if (error)
-        			goto mtk_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-
-	/*
-	 * Transfer/Receive data
-	 */
-
-	if (cmd->tx_data_sz + cmd->rx_data_sz) {
-		write = (cmd->tx_data_sz > 0)?1:0;
-		buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
-		sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
-
-		for (i = 0; i < sz; i++) {
-			byte = buf[i];
-			error = mtk_spi_txrx(sc, &byte,
-			    write ? MTK_SPI_WRITE : MTK_SPI_READ);
-			if (error)
-				goto mtk_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-mtk_spi_transfer_fail:
-	mtk_spi_chip_deactivate(sc);
-
-	return (error);
-}
-
-static phandle_t
-mtk_spi_get_node(device_t bus, device_t dev)
-{
-
-	/* We only have one child, the SPI bus, which needs our own node. */
-	return (ofw_bus_get_node(bus));
-}
-
-static device_method_t mtk_spi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_spi_probe),
-	DEVMETHOD(device_attach,	mtk_spi_attach),
-	DEVMETHOD(device_detach,	mtk_spi_detach),
-
-	DEVMETHOD(spibus_transfer,	mtk_spi_transfer),
-
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	mtk_spi_get_node),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_spi_driver = {
-	.name = "spi",
-	.methods = mtk_spi_methods,
-	.size = sizeof(struct mtk_spi_softc),
-};
-
-static devclass_t mtk_spi_devclass;
-
-DRIVER_MODULE(mtk_spi_v1, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
diff --git a/sys/mips/mediatek/mtk_spi_v1.h b/sys/mips/mediatek/mtk_spi_v1.h
deleted file mode 100644
index 3b82e5b7bfb8..000000000000
--- a/sys/mips/mediatek/mtk_spi_v1.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MTK_SPIVAR_H_
-#define _MTK_SPIVAR_H_
-
-/* SPI controller interface */
-
-#define MTK_SPISTAT		0x00
-/* SPIBUSY is alias for SPIBUSY, because SPISTAT have only BUSY bit*/
-#define MTK_SPIBUSY		MTK_SPISTAT
-
-#define MTK_SPICFG		0x10
-#define		MSBFIRST		(1<<8)
-#define		SPICLKPOL		(1<<6)
-#define		CAPT_ON_CLK_FALL	(1<<5)
-#define		TX_ON_CLK_FALL		(1<<4)
-#define		HIZSPI			(1<<3)	/* Set SPI pins to Tri-state */
-#define		SPI_CLK_SHIFT		0	/* SPI clock divide control */
-#define		SPI_CLK_MASK		0x00000007
-#define		SPI_CLK_DIV2		0
-#define		SPI_CLK_DIV4		1
-#define		SPI_CLK_DIV8		2
-#define		SPI_CLK_DIV16		3
-#define		SPI_CLK_DIV32		4
-#define		SPI_CLK_DIV64		5
-#define		SPI_CLK_DIV128		6
-#define		SPI_CLK_DISABLED	7
-
-#define MTK_SPICTL		0x14
-#define		HIZSMOSI		(1<<3)
-#define		START_WRITE		(1<<2)
-#define		START_READ		(1<<1)
-#define		CS_HIGH			(1<<0)
-
-#define MTK_SPIDATA		0x20
-#define		SPIDATA_MASK		0x000000ff
-
-#define MTK_SPI_WRITE		1
-#define MTK_SPI_READ		0
-
-#endif /* _MTK_SPIVAR_H_ */
diff --git a/sys/mips/mediatek/mtk_spi_v2.c b/sys/mips/mediatek/mtk_spi_v2.c
deleted file mode 100644
index 8e9086343aad..000000000000
--- a/sys/mips/mediatek/mtk_spi_v2.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <dev/spibus/spi.h>
-#include <dev/spibus/spibusvar.h>
-#include "spibus_if.h"
-
-#include "opt_platform.h"
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/mtk_spi_v2.h>
-#include <dev/flash/mx25lreg.h>
-
-#undef MTK_SPI_DEBUG
-#ifdef MTK_SPI_DEBUG
-#define dprintf printf
-#else
-#define dprintf(x, arg...)
-#endif
-
-/*
- * register space access macros
- */
-#define SPI_WRITE(sc, reg, val)	do {	\
-		bus_write_4(sc->sc_mem_res, (reg), (val)); \
-	} while (0)
-
-#define SPI_READ(sc, reg)	 bus_read_4(sc->sc_mem_res, (reg))
-
-#define SPI_SET_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
-
-#define SPI_CLEAR_BITS(sc, reg, bits)	\
-	SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
-
-struct mtk_spi_softc {
-	device_t		sc_dev;
-	struct resource		*sc_mem_res;
-};
-
-static int	mtk_spi_probe(device_t);
-static int	mtk_spi_attach(device_t);
-static int	mtk_spi_detach(device_t);
-static int	mtk_spi_wait(struct mtk_spi_softc *);
-static void	mtk_spi_chip_activate(struct mtk_spi_softc *);
-static void	mtk_spi_chip_deactivate(struct mtk_spi_softc *);
-static uint8_t	mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
-static int	mtk_spi_transfer(device_t, device_t, struct spi_command *);
-static phandle_t mtk_spi_get_node(device_t, device_t);
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,mt7621-spi",		1 },
-	{ "ralink,mtk7628an-spi",	1 },
-	{ NULL,				0 }
-};
-
-static int
-mtk_spi_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return(ENXIO);
-
-	device_set_desc(dev, "MTK SPI Controller (v2)");
-
-	return (0);
-}
-
-static int
-mtk_spi_attach(device_t dev)
-{
-	struct mtk_spi_softc *sc = device_get_softc(dev);
-	uint32_t val;
-	int rid;
-
-	sc->sc_dev = dev;
-        rid = 0;
-	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (!sc->sc_mem_res) {
-		device_printf(dev, "Could not map memory\n");
-		return (ENXIO);
-	}
-
-	if (mtk_spi_wait(sc)) {
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-		return (EBUSY);
-	}
-
-	val = SPI_READ(sc, MTK_SPIMASTER);
-	val &= ~(0xfff << 16);
-	val |= 13 << 16;
-	val |= 7 << 29;
-	val |= 1 << 2;
-	SPI_WRITE(sc, MTK_SPIMASTER, val);
-	    /*
-	     * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
-	     * Update: divide by 4, DEV2 to fast for flash.
-	     */
-
-	device_add_child(dev, "spibus", 0);
-	return (bus_generic_attach(dev));
-}
-
-static int
-mtk_spi_detach(device_t dev)
-{
-	struct mtk_spi_softc *sc = device_get_softc(dev);
-
-	if (sc->sc_mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
-
-	return (0);
-}
-
-static void
-mtk_spi_chip_activate(struct mtk_spi_softc *sc)
-{
-        mtk_spi_wait(sc);
-	/*
-	 * Put all CSx to low
-	 */
-	SPI_SET_BITS(sc, MTK_SPIPOLAR, 1);
-}
-
-static void
-mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
-{
-        mtk_spi_wait(sc);
-	/*
-	 * Put all CSx to high
-	 */
-	SPI_CLEAR_BITS(sc, MTK_SPIPOLAR, 1);
-}
-
-static int
-mtk_spi_wait(struct mtk_spi_softc *sc)
-{
-	int i = 1000;
-
-	while (i--) {
-		if (!(SPI_READ(sc, MTK_SPITRANS) & SPIBUSY))
-			break;
-	}
-	if (i == 0) {
-		return (1);
-	}
-
-	return (0);
-}
-
-static uint8_t
-mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
-{
-
-	if (mtk_spi_wait(sc))
-		return (0xff);
-
-	if (write == MTK_SPI_WRITE) {
-		SPI_WRITE(sc, MTK_SPIOPCODE, (*data));
-		SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<24));
-	} else {
-		SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<12));
-	}
-
-	SPI_SET_BITS(sc, MTK_SPITRANS, SPISTART);
-
-	if (mtk_spi_wait(sc))
-		return (0xff);
-
-	if (write == MTK_SPI_READ) {
-		*data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
-	}
-
-	return (0);
-}
-
-static int
-mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
-{
-	struct mtk_spi_softc *sc;
-	uint8_t *buf, byte, *tx_buf;
-	uint32_t cs;
-	int i, sz, error, write = 0;
-
-	sc = device_get_softc(dev);
-
-	spibus_get_cs(child, &cs);
-
-	cs &= ~SPIBUS_CS_HIGH;
-
-	if (cs != 0)
-		/* Only 1 CS */
-		return (ENXIO);
-
-        /* There is always a command to transfer. */
-        tx_buf = (uint8_t *)(cmd->tx_cmd);
-
-        /* Perform some fixup because MTK dont support duplex SPI */
-        switch(tx_buf[0]) {
-                case CMD_READ_IDENT:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 3;
-                        break;
-		case CMD_ENTER_4B_MODE:
-		case CMD_EXIT_4B_MODE:
-                case CMD_WRITE_ENABLE:
-                case CMD_WRITE_DISABLE:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 0;
-                        break;
-                case CMD_READ_STATUS:
-                        cmd->tx_cmd_sz = 1;
-                        cmd->rx_cmd_sz = 1;
-                        break;
-                case CMD_READ:
-                case CMD_FAST_READ:
-                        cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
-                        break;
-                case CMD_SECTOR_ERASE:
-                        cmd->rx_cmd_sz = 0;
-                        break;
-                case CMD_PAGE_PROGRAM:
-                        cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
-                        break;
-        }      
-        
-	mtk_spi_chip_activate(sc);
-
-	if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
-		buf = (uint8_t *)(cmd->rx_cmd);
-		tx_buf = (uint8_t *)(cmd->tx_cmd);
-		sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
-
-		for (i = 0; i < sz; i++) {
-                        if(i < cmd->tx_cmd_sz) {
-			        byte = tx_buf[i];
-        			error = mtk_spi_txrx(sc, &byte,
-		        	    MTK_SPI_WRITE);
-				if (error)
-					goto mtk_spi_transfer_fail;
-				continue;
-                        }
-                        error = mtk_spi_txrx(sc, &byte,
-		            MTK_SPI_READ);
-			if (error)
-				goto mtk_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-
-	/*
-	 * Transfer/Receive data
-	 */
-
-	if (cmd->tx_data_sz + cmd->rx_data_sz) {
-		write = (cmd->tx_data_sz > 0)?1:0;
-		buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
-		sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
-
-		for (i = 0; i < sz; i++) {
-			byte = buf[i];
-			error = mtk_spi_txrx(sc, &byte,
-			    write ? MTK_SPI_WRITE : MTK_SPI_READ);
-			if (error)
-				goto mtk_spi_transfer_fail;
-			buf[i] = byte;
-		}
-	}
-mtk_spi_transfer_fail:
-	mtk_spi_chip_deactivate(sc);
-
-	return (0);
-}
-
-static phandle_t
-mtk_spi_get_node(device_t bus, device_t dev)
-{
-
-	/* We only have one child, the SPI bus, which needs our own node. */
-	return (ofw_bus_get_node(bus));
-}
-
-static device_method_t mtk_spi_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_spi_probe),
-	DEVMETHOD(device_attach,	mtk_spi_attach),
-	DEVMETHOD(device_detach,	mtk_spi_detach),
-
-	DEVMETHOD(spibus_transfer,	mtk_spi_transfer),
-
-	/* ofw_bus interface */
-	DEVMETHOD(ofw_bus_get_node,	mtk_spi_get_node),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_spi_driver = {
-	.name = "spi",
-	.methods = mtk_spi_methods,
-	.size = sizeof(struct mtk_spi_softc),
-};
-
-static devclass_t mtk_spi_devclass;
-
-DRIVER_MODULE(mtk_spi_v2, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
diff --git a/sys/mips/mediatek/mtk_spi_v2.h b/sys/mips/mediatek/mtk_spi_v2.h
deleted file mode 100644
index fc7ae31a26a2..000000000000
--- a/sys/mips/mediatek/mtk_spi_v2.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*-
- * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MTK_SPI_NEWVAR_H_
-#define _MTK_SPI_NEWVAR_H_
-
-/* SPI controller interface */
-
-#define MTK_SPITRANS		0x00
-#define 	SPIBUSY			(1<<16)
-#define		SPISTART		(1<<8)
-
-#define MTK_SPIMASTER		0x28
-
-#define MTK_SPIMOREBUF		0x2C
-
-#define MTK_SPIOPCODE		0x04
-#define MTK_SPIDATA		0x08
-#define		SPIDATA_MASK		0x000000ff
-
-#define MTK_SPI_WRITE		1
-#define MTK_SPI_READ		0
-
-#define MTK_SPIPOLAR		0x38
-
-#endif /* _MTK_SPI_NEWVAR_H_ */
diff --git a/sys/mips/mediatek/mtk_sysctl.c b/sys/mips/mediatek/mtk_sysctl.c
deleted file mode 100644
index c16b55d69c90..000000000000
--- a/sys/mips/mediatek/mtk_sysctl.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/fdt.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/mtk_sysctl.h>
-
-#include <dev/fdt/fdt_common.h>
-
-struct mtk_sysctl_softc {
-	device_t	dev;
-	struct resource	*mem_res;
-	int		mem_rid;
-	struct mtx	mtx;
-};
-
-static struct mtk_sysctl_softc *mtk_sysctl_sc = NULL;
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-sysc",		1 },
-	{ "ralink,rt3050-sysc",		1 },
-	{ "ralink,rt3352-sysc",		1 },
-	{ "ralink,rt3883-sysc",		1 },
-	{ "ralink,rt5350-sysc",		1 },
-	{ "ralink,mt7620a-sysc",	1 },
-	{ "mtk,mt7621-sysc",		1 },
-
-	/* Sentinel */
-	{ NULL,				0 }
-};
-
-#define MTK_SYSCTL_LOCK(sc)		mtx_lock_spin(&(sc)->mtx)
-#define MTK_SYSCTL_UNLOCK(sc)		mtx_unlock_spin(&(sc)->mtx)
-#define MTK_SYSCTL_LOCK_INIT(sc)		\
-    mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),	\
-    "mtk_sysctl", MTX_SPIN)
-#define MTK_SYSCTL_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->mtx)
-
-static int
-mtk_sysctl_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK System Controller");
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int mtk_sysctl_detach(device_t);
-
-static int
-mtk_sysctl_attach(device_t dev)
-{
-	struct mtk_sysctl_softc *sc = device_get_softc(dev);
-
-	if (device_get_unit(dev) != 0 || mtk_sysctl_sc != NULL) {
-		device_printf(dev, "Only one sysctl module supported\n");
-		return (ENXIO);
-	}
-
-	mtk_sysctl_sc = sc;
-
-	/* Map control/status registers. */
-	sc->mem_rid = 0;
-	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-	    &sc->mem_rid, RF_ACTIVE);
-
-	if (sc->mem_res == NULL) {
-		device_printf(dev, "couldn't map memory\n");
-		mtk_sysctl_detach(dev);
-		return (ENXIO);
-	}
-
-	sc->dev = dev;
-
-	MTK_SYSCTL_LOCK_INIT(sc);
-
-	return (0);
-}
-
-static int
-mtk_sysctl_detach(device_t dev)
-{
-	struct mtk_sysctl_softc *sc = device_get_softc(dev);
-
-	if (sc->mem_res)
-		bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
-		    sc->mem_res);
-
-	MTK_SYSCTL_LOCK_DESTROY(sc);
-
-	return(0);
-}
-
-uint32_t
-mtk_sysctl_get(uint32_t reg)
-{
-	uint32_t val;
-
-	MTK_SYSCTL_LOCK(mtk_sysctl_sc);
-	val = bus_read_4(mtk_sysctl_sc->mem_res, reg);
-	MTK_SYSCTL_UNLOCK(mtk_sysctl_sc);
-
-	return (val);
-}
-
-void
-mtk_sysctl_set(uint32_t reg, uint32_t val)
-{
-
-	MTK_SYSCTL_LOCK(mtk_sysctl_sc);
-	bus_write_4(mtk_sysctl_sc->mem_res, reg, val);
-	MTK_SYSCTL_UNLOCK(mtk_sysctl_sc);
-}
-
-void
-mtk_sysctl_clr_set(uint32_t reg, uint32_t clr, uint32_t set)
-{
-	uint32_t val;
-
-	MTK_SYSCTL_LOCK(mtk_sysctl_sc);
-	val = bus_read_4(mtk_sysctl_sc->mem_res, reg);
-	val &= ~(clr);
-	val |= set;
-	bus_write_4(mtk_sysctl_sc->mem_res, reg, val);
-	MTK_SYSCTL_UNLOCK(mtk_sysctl_sc);
-}
-
-static device_method_t mtk_sysctl_methods[] = {
-	DEVMETHOD(device_probe,		mtk_sysctl_probe),
-	DEVMETHOD(device_attach,	mtk_sysctl_attach),
-	DEVMETHOD(device_detach,	mtk_sysctl_detach),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_sysctl_driver = {
-	"sysc",
-	mtk_sysctl_methods,
-	sizeof(struct mtk_sysctl_softc),
-};
-static devclass_t mtk_sysctl_devclass;
-
-EARLY_DRIVER_MODULE(mtk_sysctl, simplebus, mtk_sysctl_driver,
-    mtk_sysctl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
diff --git a/sys/mips/mediatek/mtk_sysctl.h b/sys/mips/mediatek/mtk_sysctl.h
deleted file mode 100644
index e07e07280c01..000000000000
--- a/sys/mips/mediatek/mtk_sysctl.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _MTK_SYSCTL_H_
-#define _MTK_SYSCTL_H_
-
-/* System Control */
-#define SYSCTL_CHIPID0_3	0x00
-#define SYSCTL_CHIPID4_7	0x04
-
-#define SYSCTL_REVID		0x0C
-#define SYSCTL_REVID_MASK	0xFFFF
-#define SYSCTL_MT7621_REV_E	0x0101
-
-#define SYSCTL_SYSCFG		0x10
-#define SYSCTL_SYSCFG1		0x14
-#define SYSCTL_CLKCFG0		0x2C
-#define SYSCTL_CLKCFG1		0x30
-#define SYSCTL_RSTCTRL		0x34
-#define SYSCTL_GPIOMODE		0x60
-
-#define SYSCTL_CUR_CLK_STS	0x44
-
-#define SYSCTL_MT7620_CPLL_CFG0	0x54
-#define SYSCTL_MT7620_CPLL_CFG1	0x58
-
-#define SYSCFG1_USB_HOST_MODE	(1<<10)
-
-#define RT3350_CHIPID0_3	0x33335452
-
-#define MTK_UNKNOWN_CHIPID0_3	0x6E6B6E75	/* "unkn" */
-#define MTK_UNKNOWN_CHIPID4_7	0x206E776F	/* "own " */
-
-extern uint32_t	mtk_sysctl_get(uint32_t);
-extern void	mtk_sysctl_set(uint32_t, uint32_t);
-extern void	mtk_sysctl_clr_set(uint32_t, uint32_t, uint32_t);
-
-#endif /* _MTK_SYSCTL_H_ */
diff --git a/sys/mips/mediatek/mtk_usb_phy.c b/sys/mips/mediatek/mtk_usb_phy.c
deleted file mode 100644
index 7fa16011c9c9..000000000000
--- a/sys/mips/mediatek/mtk_usb_phy.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-
-#include <dev/fdt/fdt_common.h>
-#include <dev/fdt/fdt_clock.h>
-#include <mips/mediatek/fdt_reset.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/mediatek/mtk_sysctl.h>
-#include <mips/mediatek/mtk_soc.h>
-#include <mips/mediatek/mtk_usb_phy.h>
-
-#define RESET_ASSERT_DELAY	1000
-#define RESET_DEASSERT_DELAY	10000
-
-struct mtk_usb_phy_softc {
-	device_t		dev;
-	struct resource *	res;
-	uint32_t		fm_base;
-	uint32_t		u2_base;
-	uint32_t		sr_coef;
-	uint32_t		socid;
-};
-
-#define USB_PHY_READ(_sc, _off)		bus_read_4((_sc)->res, (_off))
-#define USB_PHY_WRITE(_sc, _off, _val)	bus_write_4((_sc)->res, (_off), (_val))
-#define USB_PHY_CLR_SET(_sc, _off, _clr, _set)	\
-	USB_PHY_WRITE(_sc, _off, ((USB_PHY_READ(_sc, _off) & ~(_clr)) | (_set)))
-
-#define USB_PHY_READ_U2(_sc, _off)			\
-	USB_PHY_READ((_sc), ((_sc)->u2_base + (_off)))
-#define USB_PHY_WRITE_U2(_sc, _off, _val)		\
-	USB_PHY_WRITE((_sc), ((_sc)->u2_base + (_off)), (_val))
-#define USB_PHY_CLR_SET_U2(_sc, _off, _clr, _set)	\
-	USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
-	    ~(_clr)) | (_set)))
-#define USB_PHY_BARRIER(_sc)	bus_barrier((_sc)->res, 0, 0, \
-			BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ)
-
-#define USB_PHY_READ_FM(_sc, _off)			\
-	USB_PHY_READ((_sc), ((_sc)->fm_base + (_off)))
-#define USB_PHY_WRITE_FM(_sc, _off)			\
-	USB_PHY_WRITE((_sc), ((_sc)->fm_base + (_off)), (_val))
-#define USB_PHY_CLR_SET_FM(_sc, _off, _clr, _set)	\
-	USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
-	    ~(_clr)) | (_set)))
-
-static void mtk_usb_phy_mt7621_init(device_t);
-static void mtk_usb_phy_mt7628_init(device_t);
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,mt7620-usbphy",	MTK_SOC_MT7620A },
-	{ "mediatek,mt7620-usbphy",	MTK_SOC_MT7620A },
-	{ "ralink,mt7628an-usbphy",	MTK_SOC_MT7628 },
-	{ "ralink,rt3352-usbphy",	MTK_SOC_RT3352 },
-	{ "ralink,rt3050-usbphy",	MTK_SOC_RT3050 },
-	{ NULL,				MTK_SOC_UNKNOWN }
-};
-
-static int
-mtk_usb_phy_probe(device_t dev)
-{
-	struct mtk_usb_phy_softc *sc = device_get_softc(dev);
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-	if ((sc->socid =
-	    ofw_bus_search_compatible(dev, compat_data)->ocd_data) ==
-	    MTK_SOC_UNKNOWN)
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK USB PHY");
-
-	return (0);
-}
-
-static int
-mtk_usb_phy_attach(device_t dev)
-{
-	struct mtk_usb_phy_softc * sc = device_get_softc(dev);
-	phandle_t node;
-	uint32_t val;
-	int rid;
-
-	sc->dev = dev;
-
-	/* Get our FDT node and SoC id */
-	node = ofw_bus_get_node(dev);
-
-	/* Now let's see about setting USB to host or device mode */
-	/* XXX: is it the same for all SoCs? */
-	val = mtk_sysctl_get(SYSCTL_SYSCFG1);
-	if (OF_hasprop(node, "mtk,usb-device"))
-		val &= ~SYSCFG1_USB_HOST_MODE;
-	else
-		val |= SYSCFG1_USB_HOST_MODE;
-	mtk_sysctl_set(SYSCTL_SYSCFG1, val);
-
-	/* If we have clocks defined - enable them */
-	if (OF_hasprop(node, "clocks"))
-		fdt_clock_enable_all(dev);
-
-	/* If we have resets defined - perform a reset sequence */
-	if (OF_hasprop(node, "resets")) {
-		fdt_reset_assert_all(dev);
-		DELAY(RESET_ASSERT_DELAY);
-		fdt_reset_deassert_all(dev);
-		DELAY(RESET_DEASSERT_DELAY);
-	}
-
-	/* Careful, some devices actually require resources */
-	if (OF_hasprop(node, "reg")) {
-		rid = 0;
-		sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
-		    RF_ACTIVE);
-		if (sc->res == NULL) {
-			device_printf(dev, "could not map memory\n");
-			return (ENXIO);
-		}
-	} else {
-		sc->res = NULL;
-	}
-
-	/* Some SoCs require specific USB PHY init... handle these */
-	switch (sc->socid) {
-	case MTK_SOC_MT7628: /* Fallthrough */
-	case MTK_SOC_MT7688:
-		if (sc->res == NULL)
-			return (ENXIO);
-		sc->fm_base = MT7628_FM_FEG_BASE;
-		sc->u2_base = MT7628_U2_BASE;
-		sc->sr_coef = MT7628_SR_COEF;
-		mtk_usb_phy_mt7628_init(dev);
-		break;
-	case MTK_SOC_MT7621:
-		if (sc->res == NULL)
-			return (ENXIO);
-		sc->fm_base = MT7621_FM_FEG_BASE;
-		sc->u2_base = MT7621_U2_BASE;
-		sc->sr_coef = MT7621_SR_COEF;
-		mtk_usb_phy_mt7621_init(dev);
-		break;
-	}
-
-	/* We no longer need the resources, release them */
-	if (sc->res != NULL)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
-
-	return (0);
-}
-
-static int
-mtk_usb_phy_detach(device_t dev)
-{
-	struct mtk_usb_phy_softc *sc = device_get_softc(dev);
-	phandle_t node;
-
-	/* Get our FDT node */
-	node = ofw_bus_get_node(dev);
-
-	/* If we have resets defined - assert them */
-	if (OF_hasprop(node, "resets"))
-		fdt_reset_assert_all(dev);
-
-	/* If we have clocks defined - disable them */
-	if (OF_hasprop(node, "clocks"))
-		fdt_clock_disable_all(dev);
-
-	/* Finally, release resources, if any were allocated */
-	if (sc->res != NULL)
-		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
-
-	return (0);
-}
-
-/*
- * Things currently seem to work a lot better without slew rate calibration
- * both on MT7621 and MT7688, so we leave it out for now.
- */
-#ifdef notyet
-static void
-mtk_usb_phy_slew_rate_calibration(struct mtk_usb_phy_softc *sc)
-{
-	uint32_t val;
-	int i;
-
-	USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, 0, SRCAL_EN);
-	USB_PHY_BARRIER(sc);
-	DELAY(1000);
-
-	USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, 0, FRCK_EN);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, CYCLECNT, 0x400);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, 0, FDET_EN);
-	USB_PHY_BARRIER(sc);
-
-	for (i = 0; i < 1000; i++) {
-		if ((val = USB_PHY_READ_FM(sc, U2_PHY_FMMONR0)) != 0) {
-			device_printf(sc->dev, "DONE with FDET\n");
-			break;
-		}
-		DELAY(10000);
-	}
-	device_printf(sc->dev, "After FDET\n");
-
-	USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, FDET_EN, 0);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, FRCK_EN, 0);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCAL_EN, 0);
-	USB_PHY_BARRIER(sc);
-	DELAY(1000);
-
-	if (val == 0) {
-		USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, 0x4 << SRCTRL_OFF);
-		USB_PHY_BARRIER(sc);
-	} else {
-		val = ((((1024 * 25 * sc->sr_coef) / val) + 500) / 1000) &
-		    SRCTRL_MSK;
-		USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, val << SRCTRL_OFF);
-		USB_PHY_BARRIER(sc);
-	}
-}
-#endif
-
-static void
-mtk_usb_phy_mt7621_init(device_t dev)
-{
-#ifdef notyet
-	struct mtk_usb_phy_softc *sc = device_get_softc(dev);
-
-	/* Slew rate calibration only, but for 2 ports */
-	mtk_usb_phy_slew_rate_calibration(sc);
-
-	sc->u2_base = MT7621_U2_BASE_P1;
-	mtk_usb_phy_slew_rate_calibration(sc);
-#endif
-}
-
-static void
-mtk_usb_phy_mt7628_init(device_t dev)
-{
-	struct mtk_usb_phy_softc *sc = device_get_softc(dev);
-
-	/* XXX: possibly add barriers between the next writes? */
-	USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00ffff02);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00555502);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00aaaa02);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00000402);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc,  U2_PHY_AC0, 0x0048086a);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc,  U2_PHY_AC1, 0x4400001c);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc, U2_PHY_ACR3, 0xc0200000);
-	USB_PHY_BARRIER(sc);
-	USB_PHY_WRITE_U2(sc, U2_PHY_DTM0, 0x02000000);
-	USB_PHY_BARRIER(sc);
-
-#ifdef notyet
-	/* Slew rate calibration */
-	mtk_usb_phy_slew_rate_calibration(sc);
-#endif
-}
-
-static device_method_t mtk_usb_phy_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_usb_phy_probe),
-	DEVMETHOD(device_attach,	mtk_usb_phy_attach),
-	DEVMETHOD(device_detach,	mtk_usb_phy_detach),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_usb_phy_driver = {
-	.name = "usbphy",
-	.methods = mtk_usb_phy_methods,
-	.size = sizeof(struct mtk_usb_phy_softc),
-};
-
-static devclass_t mtk_usb_phy_devclass;
-
-DRIVER_MODULE(usbphy, simplebus, mtk_usb_phy_driver, mtk_usb_phy_devclass, 0,
-    0);
diff --git a/sys/mips/mediatek/mtk_usb_phy.h b/sys/mips/mediatek/mtk_usb_phy.h
deleted file mode 100644
index 24fb6612a2f2..000000000000
--- a/sys/mips/mediatek/mtk_usb_phy.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _MTK_USB_PHY_H_
-#define _MTK_USB_PHY_H_
-
-#define MT7621_FM_FEG_BASE	0x0100
-#define MT7621_U2_BASE		0x0800
-#define MT7621_U2_BASE_P1	0x1000
-#define MT7621_SR_COEF		28
-
-#define MT7628_FM_FEG_BASE	0x0f00
-#define MT7628_U2_BASE		0x0800
-#define MT7628_SR_COEF		32
-
-#define U2_PHY_AC0		0x00
-#define U2_PHY_AC1		0x04
-#define U2_PHY_AC2		0x08
-#define U2_PHY_ACR0		0x10
-#define   SRCAL_EN			(1<<23)
-#define   SRCTRL_MSK			0x7
-#define   SRCTRL_OFF			16
-#define   SRCTRL			(SRCTRL_MSK<<SRCTRL_OFF)
-#define U2_PHY_ACR1		0x14
-#define U2_PHY_ACR2		0x18
-#define U2_PHY_ACR3		0x1C
-
-#define U2_PHY_DCR0		0x60
-#define U2_PHY_DCR1		0x64
-#define U2_PHY_DTM0		0x68
-#define U2_PHY_DTM1		0x6C
-
-#define U2_PHY_FMCR0		0x00
-#define   CYCLECNT			(0xffffff)
-#define   FDET_EN			(1<<24)
-#define U2_PHY_FMCR1		0x04
-#define   FRCK_EN			(1<<8)
-#define U2_PHY_FMCR2		0x08
-#define U2_PHY_FMMONR0		0x0C
-#define U2_PHY_FMMONR1		0x10
-
-#endif /* _MTK_USB_PHY_H_ */
diff --git a/sys/mips/mediatek/mtk_xhci.c b/sys/mips/mediatek/mtk_xhci.c
deleted file mode 100644
index 55f39d53daa7..000000000000
--- a/sys/mips/mediatek/mtk_xhci.c
+++ /dev/null
@@ -1,291 +0,0 @@
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*-
- * Copyright (c) 2015 Stanislav Galabov. All rights reserved.
- * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
- * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-#include <sys/rman.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-
-#include <dev/usb/usb_core.h>
-#include <dev/usb/usb_busdma.h>
-#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb_controller.h>
-#include <dev/usb/usb_bus.h>
-
-#include <dev/usb/controller/xhci.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#define XHCI_HC_DEVSTR	"MTK USB 3.0 controller"
-
-static device_probe_t	mtk_xhci_fdt_probe;
-static device_attach_t	mtk_xhci_fdt_attach;
-static device_detach_t	mtk_xhci_fdt_detach;
-
-static void		mtk_xhci_fdt_init(device_t dev);
-
-static int
-mtk_xhci_fdt_probe(device_t self)
-{
-
-	if (!ofw_bus_status_okay(self))
-		return (ENXIO);
-
-	if (!ofw_bus_is_compatible(self, "mediatek,mt8173-xhci"))
-		return (ENXIO);
-
-	device_set_desc(self, XHCI_HC_DEVSTR);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static int
-mtk_xhci_fdt_attach(device_t self)
-{
-	struct xhci_softc *sc = device_get_softc(self);
-	int err;
-	int rid;
-
-	/* initialise some bus fields */
-	sc->sc_bus.parent = self;
-	sc->sc_bus.devices = sc->sc_devices;
-	sc->sc_bus.devices_max = XHCI_MAX_DEVICES;
-
-	rid = 0;
-	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
-	    RF_ACTIVE);
-	if (!sc->sc_io_res) {
-		device_printf(self, "Could not map memory\n");
-		goto error;
-	}
-	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
-	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
-	sc->sc_io_size = rman_get_size(sc->sc_io_res);
-
-	mtk_xhci_fdt_init(self);
-
-	rid = 0;
-	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE);
-	if (sc->sc_irq_res == NULL) {
-		device_printf(self, "Could not allocate irq\n");
-		goto error;
-	}
-
-	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
-	if (!(sc->sc_bus.bdev)) {
-		device_printf(self, "Could not add USB device\n");
-		goto error;
-	}
-	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
-	device_set_desc(sc->sc_bus.bdev, XHCI_HC_DEVSTR);
-
-	sprintf(sc->sc_vendor, "Mediatek");
-
-	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
-	    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
-	if (err) {
-		device_printf(self, "Could not setup irq, %d\n", err);
-		sc->sc_intr_hdl = NULL;
-		goto error;
-	}
-
-	err = xhci_init(sc, self, 1);
-	if (err == 0)
-		err = xhci_halt_controller(sc);
-	if (err == 0)
-		err = xhci_start_controller(sc);
-	if (err == 0)
-		err = device_probe_and_attach(sc->sc_bus.bdev);
-	if (err) {
-		device_printf(self, "USB init failed err=%d\n", err);
-		goto error;
-	}
-	return (0);
-
-error:
-	mtk_xhci_fdt_detach(self);
-	return (ENXIO);
-}
-
-static int
-mtk_xhci_fdt_detach(device_t self)
-{
-	struct xhci_softc *sc = device_get_softc(self);
-	int err;
-
-	/* during module unload there are lots of children leftover */
-	device_delete_children(self);
-
-	if (sc->sc_irq_res && sc->sc_intr_hdl) {
-		/*
-		 * only call xhci_detach() after xhci_init()
-		 */
-		xhci_uninit(sc);
-
-		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
-		if (err)
-			device_printf(self, "Could not tear down irq, %d\n",
-			    err);
-		sc->sc_intr_hdl = NULL;
-	}
-	if (sc->sc_irq_res) {
-		bus_release_resource(self, SYS_RES_IRQ, 0,
-		    sc->sc_irq_res);
-		sc->sc_irq_res = NULL;
-	}
-	if (sc->sc_io_res) {
-		bus_release_resource(self, SYS_RES_MEMORY, 0,
-		    sc->sc_io_res);
-		sc->sc_io_res = NULL;
-	}
-
-	return (0);
-}
-
-static device_method_t mtk_xhci_fdt_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		mtk_xhci_fdt_probe),
-	DEVMETHOD(device_attach,	mtk_xhci_fdt_attach),
-	DEVMETHOD(device_detach,	mtk_xhci_fdt_detach),
-	DEVMETHOD(device_suspend,	bus_generic_suspend),
-	DEVMETHOD(device_resume,	bus_generic_resume),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-
-	DEVMETHOD_END
-};
-
-static driver_t mtk_xhci_fdt_driver = {
-	.name = "xhci",
-	.methods = mtk_xhci_fdt_methods,
-	.size = sizeof(struct xhci_softc),
-};
-
-static devclass_t mtk_xhci_fdt_devclass;
-
-DRIVER_MODULE(xhci, simplebus, mtk_xhci_fdt_driver, mtk_xhci_fdt_devclass, 0,
-    0);
-
-#define	USB_HDMA_CFG		0x950
-#define	USB_HDMA_CFG_MT7621_VAL	0x10E0E0C
-
-#define	U3_LTSSM_TIMING_PARAM3	0x2514
-#define	U3_LTSSM_TIMING_VAL	0x3E8012C
-
-#define	SYNC_HS_EOF		0x938
-#define	SYNC_HS_EOF_VAL		0x201F3
-
-#define	USB_IP_SPAR0		0x107C8
-#define	USB_IP_SPAR0_VAL	1
-
-#define	U2_PHY_BASE_P0		0x10800
-#define	U2_PHY_BASE_P1		0x11000
-#define	U2_PHYD_CR1		0x64
-#define	U2_PHYD_CR1_MASK	(3<<18)
-#define	U2_PHYD_CR1_VAL		(1<<18)
-
-#define	USB_IP_PW_CTRL		0x10700
-#define	USB_IP_PW_CTRL_1	0x10704
-#define	USB_IP_CAP		0x10724
-#define	USB_U3_CTRL(p)		(0x10730 + ((p) * 0x08))
-#define	USB_U2_CTRL(p)		(0x10750 + ((p) * 0x08))
-
-#define	USB_IP_SW_RST		(1 << 0)
-#define	USB_IP_PDN		(1 << 0)
-
-#define	USB_PORT_DIS		(1 << 0)
-#define	USB_PORT_PDN		(1 << 1)
-
-#define	U3_PORT_NUM(p)		(p & 0xFF)
-#define	U2_PORT_NUM(p)		((p>>8) & 0xFF)
-
-#define	RD4(_sc, _reg)		bus_read_4((_sc)->sc_io_res, (_reg))
-#define	WR4(_sc, _reg, _val)	bus_write_4((_sc)->sc_io_res, (_reg), (_val))
-#define	CLRSET4(_sc, _reg, _clr, _set)	\
-    WR4((_sc), (_reg), (RD4((_sc), (_reg)) & ~(_clr)) | (_set))
-
-static void
-mtk_xhci_fdt_init(device_t dev)
-{
-	struct xhci_softc *sc;
-	uint32_t temp, u3_ports, u2_ports, i;
-
-	sc = device_get_softc(dev);
-
-	temp = RD4(sc, USB_IP_CAP);
-	u3_ports = U3_PORT_NUM(temp);
-	u2_ports = U2_PORT_NUM(temp);
-
-	device_printf(dev, "%d USB3 ports, %d USB2 ports\n",
-	    u3_ports, u2_ports);
-
-	CLRSET4(sc, USB_IP_PW_CTRL, 0, USB_IP_SW_RST);
-	CLRSET4(sc, USB_IP_PW_CTRL, USB_IP_SW_RST, 0);
-	CLRSET4(sc, USB_IP_PW_CTRL_1, USB_IP_PDN, 0);
-
-	for (i = 0; i < u3_ports; i++)
-		CLRSET4(sc, USB_U3_CTRL(i), USB_PORT_PDN | USB_PORT_DIS, 0);
-
-	for (i = 0; i < u2_ports; i++)
-		CLRSET4(sc, USB_U2_CTRL(i), USB_PORT_PDN | USB_PORT_DIS, 0);
-
-	DELAY(100000);
-
-	WR4(sc, USB_HDMA_CFG, USB_HDMA_CFG_MT7621_VAL);
-	WR4(sc, U3_LTSSM_TIMING_PARAM3, U3_LTSSM_TIMING_VAL);
-	WR4(sc, SYNC_HS_EOF, SYNC_HS_EOF_VAL);
-	WR4(sc, USB_IP_SPAR0, USB_IP_SPAR0_VAL);
-	CLRSET4(sc, U2_PHY_BASE_P0 + U2_PHYD_CR1, U2_PHYD_CR1_MASK,
-	    U2_PHYD_CR1_VAL);
-	CLRSET4(sc, U2_PHY_BASE_P1 + U2_PHYD_CR1, U2_PHYD_CR1_MASK,
-	    U2_PHYD_CR1_VAL);
-}
diff --git a/sys/mips/mediatek/palmbus.c b/sys/mips/mediatek/palmbus.c
deleted file mode 100644
index 5fe143097b58..000000000000
--- a/sys/mips/mediatek/palmbus.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*-
- * Copyright (c) 2016 Stanislav Galabov.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/rman.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/fdt/simplebus.h>
-
-/*
- * Driver for Mediatek/Ralink Palmbus
- *
- * Currently the only reason for the existence of this driver is so that we can
- * minimize the changes required to the upstream DTS files we use.
- * Otherwise palmbus is a very simple subclass of our simplebus and the only
- * difference between the two is the actual value of the compatible property.
- */
-
-static int
-palmbus_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!(ofw_bus_is_compatible(dev, "palmbus") &&
-	    ofw_bus_has_prop(dev, "ranges")) &&
-	    (ofw_bus_get_type(dev) == NULL || strcmp(ofw_bus_get_type(dev),
-	    "soc") != 0))
-		return (ENXIO);
-
-	device_set_desc(dev, "MTK Palmbus");
-
-	return (0);
-}
-
-static device_method_t palmbus_methods[] = {
-	DEVMETHOD(device_probe,		palmbus_probe),
-
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_1(palmbus, palmbus_driver, palmbus_methods,
-    sizeof(struct simplebus_softc), simplebus_driver);
-static devclass_t palmbus_devclass;
-EARLY_DRIVER_MODULE(palmbus, ofwbus, palmbus_driver, palmbus_devclass, 0, 0,
-    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
-MODULE_VERSION(palmbus, 1);
diff --git a/sys/mips/mediatek/std.mediatek b/sys/mips/mediatek/std.mediatek
deleted file mode 100644
index d8c351aab36f..000000000000
--- a/sys/mips/mediatek/std.mediatek
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# std.mtk -- Base kernel configuration file for FreeBSD/MIPS Mediatek/Ralink
-# SoCs.
-#
-# This includes all the required drivers for the SoCs.
-#
-# $FreeBSD$
-#
-
-# Include the standard file list for Mediatek SoCs.
-files 		"../mediatek/files.mediatek"
-
-# Building a mips/mipsel kernel
-machine 	mips mipsel
-
-# Little-endian machine
-makeoptions 	MIPS_LITTLE_ENDIAN=defined
-
-# Default kernel load address
-makeoptions 	KERNLOADADDR=0x80001000
-
-# Mediatek/Ralink SoC support depends on FDT (with static DTB for the moment)
-options 	FDT
-options 	FDT_DTB_STATIC
-
-# We rely on INTRNG code
-options 	INTRNG
-options 	MIPS_NIRQ=256
-
-# We rely on NEW_PCIB code
-options 	NEW_PCIB
-
-# Build kernel with gdb(1) debug symbols
-makeoptions 	DEBUG=-g
-
-# Support for DDB and KDB
-options 	DDB
-options 	KDB
-
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-# For small memory footprints
-options 	VM_KMEM_SIZE_SCALE=1
-
-# General options, including scheduler, etc.
-options 	SCHED_ULE	# ULE scheduler
-options 	INET		# InterNETworking
-#options 	INET6		# IPv6
-options 	PSEUDOFS	# Pseude-filesystem framework
-options 	FFS		# Berkeley Fast Filesystem
-#options 	SOFTUPDATES	# Enable FFS soft updates support
-#options 	UFS_ACL		# Support for access control lists
-#options 	UFS_DIRHASH	# Improve big directory performance
-#options 	MSDOSFS		# Enable support for MSDOS filesystems
-options 	_KPOSIX_PRIORITY_SCHEDULING	# Posix P1003_1B real-time ext.
-
-#
-# Standard drivers section
-#
-# The drivers in the following section are required in order to successfully
-# compile the kernel.
-#
-
-# FDT clock and pinctrl framework
-device 		fdt_clock
-device 		fdt_pinctrl
-
-# UART support
-device 		uart
-
-# loop device support
-device 		loop
-
-# ether device support
-device 		ether
-
-# ether switch support
-device 		etherswitch
-device 		miibus
-device 		mtkswitch
-device 		mdio
diff --git a/sys/mips/mediatek/std.rt2880 b/sys/mips/mediatek/std.rt2880
deleted file mode 100644
index 397a0bc322da..000000000000
--- a/sys/mips/mediatek/std.rt2880
+++ /dev/null
@@ -1,86 +0,0 @@
-#
-# std.rt2880 -- Base kernel configuration file for FreeBSD/MIPS RT2800 SoC
-#
-# This includes all the required drivers for the SoCs.
-#
-# $FreeBSD$
-#
-
-# Include the standard file list for Mediatek SoCs.
-files 		"../mediatek/files.mediatek"
-
-# Building a mips/mipsel kernel
-machine 	mips mipsel
-
-# Little-endian machine
-makeoptions 	MIPS_LITTLE_ENDIAN=defined
-
-# Default kernel load address
-makeoptions 	KERNLOADADDR=0x88001000
-
-# Mediatek/Ralink SoC support depends on FDT (with static DTB for the moment)
-options 	FDT
-options 	FDT_DTB_STATIC
-
-# We rely on INTRNG code
-options 	INTRNG
-options 	MIPS_NIRQ=256
-
-# We rely on NEW_PCIB code
-options 	NEW_PCIB
-
-# Build kernel with gdb(1) debug symbols
-makeoptions 	DEBUG=-g
-
-# Support for DDB and KDB
-options 	DDB
-options 	KDB
-
-# Debugging for use in -current
-options 	INVARIANTS
-options 	INVARIANT_SUPPORT
-options 	WITNESS
-options 	WITNESS_SKIPSPIN
-options 	DEBUG_REDZONE
-options 	DEBUG_MEMGUARD
-
-# For small memory footprints
-options 	VM_KMEM_SIZE_SCALE=1
-
-# General options, including scheduler, etc.
-options 	SCHED_ULE	# ULE scheduler
-options 	INET		# InterNETworking
-#options 	INET6		# IPv6
-options 	PSEUDOFS	# Pseude-filesystem framework
-options 	FFS		# Berkeley Fast Filesystem
-#options 	SOFTUPDATES	# Enable FFS soft updates support
-#options 	UFS_ACL		# Support for access control lists
-#options 	UFS_DIRHASH	# Improve big directory performance
-#options 	MSDOSFS		# Enable support for MSDOS filesystems
-options 	_KPOSIX_PRIORITY_SCHEDULING	# Posix P1003_1B real-time ext.
-
-#
-# Standard drivers section
-#
-# The drivers in the following section are required in order to successfully
-# compile the kernel.
-#
-
-# FDT clock and pinctrl framework
-device 		fdt_clock
-device 		fdt_pinctrl
-
-# UART support
-device 		uart
-
-# loop device support
-device 		loop
-
-# ether device support
-device 		ether
-
-# ether switch support
-#device 		etherswitch
-#device 		miibus
-#device 		ip17x
-#device 		mdio
diff --git a/sys/mips/mediatek/uart_dev_mtk.c b/sys/mips/mediatek/uart_dev_mtk.c
deleted file mode 100644
index 8fcfb952c747..000000000000
--- a/sys/mips/mediatek/uart_dev_mtk.c
+++ /dev/null
@@ -1,551 +0,0 @@
-/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */
-
-/*-
- * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
- * Copyright (c) 2010 Aleksandr Rybalko.
- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
- * Copyright (c) 2007 Oleksandr Tymoshenko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kdb.h>
-#include <sys/reboot.h>
-#include <sys/sysctl.h>
-#include <sys/kernel.h>
-#include <machine/bus.h>
-#include <machine/fdt.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_cpu_fdt.h>
-#include <dev/uart/uart_bus.h>
-
-#include <mips/mediatek/uart_dev_mtk.h>
-#include <mips/mediatek/mtk_soc.h>
-#include <mips/mediatek/mtk_sysctl.h>
-
-#include "uart_if.h"
-
-/* Set some reference clock value. Real value will be taken from FDT */
-#define DEFAULT_RCLK            (120 * 1000 * 1000)
-
-/*
- * Low-level UART interface.
- */
-static int mtk_uart_probe(struct uart_bas *bas);
-static void mtk_uart_init(struct uart_bas *bas, int, int, int, int);
-static void mtk_uart_term(struct uart_bas *bas);
-static void mtk_uart_putc(struct uart_bas *bas, int);
-static int mtk_uart_rxready(struct uart_bas *bas);
-static int mtk_uart_getc(struct uart_bas *bas, struct mtx *);
-
-static struct uart_ops uart_mtk_ops = {
-	.probe = mtk_uart_probe,
-	.init = mtk_uart_init,
-	.term = mtk_uart_term,
-	.putc = mtk_uart_putc,
-	.rxready = mtk_uart_rxready,
-	.getc = mtk_uart_getc,
-};
-
-static int	uart_output = 1;
-TUNABLE_INT("kern.uart_output", &uart_output);
-SYSCTL_INT(_kern, OID_AUTO, uart_output, CTLFLAG_RW,
-    &uart_output, 0, "UART output enabled.");
-
-static int
-mtk_uart_probe(struct uart_bas *bas)
-{
-	return (0);
-}
-
-static void
-mtk_uart_init(struct uart_bas *bas, int baudrate, int databits,
-    int stopbits, int parity)
-{
-        /* CLKDIV  = 384000000/ 3/ 16/ br */
-        /* for 384MHz CLKDIV = 8000000 / baudrate; */
-        switch (databits) {
-        case 5:
-    		databits = UART_LCR_5B;
-    		break;
-        case 6:
-    		databits = UART_LCR_6B;
-    		break;
-        case 7:
-    		databits = UART_LCR_7B;
-    		break;
-        case 8:
-    		databits = UART_LCR_8B;
-    		break;
-    	default:
-    		/* Unsupported */
-    		return;
-        }
-	switch (parity) {
-	case UART_PARITY_EVEN:	parity = (UART_LCR_PEN|UART_LCR_EVEN); break;
-	case UART_PARITY_ODD:	parity = (UART_LCR_PEN); break;
-	case UART_PARITY_NONE:	parity = 0; break;
-	/* Unsupported */
-	default:		return;
-	}
-
-	if (bas->rclk && baudrate) {
-        	uart_setreg(bas, UART_CDDL_REG, bas->rclk/16/baudrate);
-		uart_barrier(bas);
-	}
-
-        uart_setreg(bas, UART_LCR_REG, databits |
-				(stopbits==1?0:UART_LCR_STB_15) |
-       			 	parity);
-	uart_barrier(bas);
-}
-
-static void
-mtk_uart_term(struct uart_bas *bas)
-{
-        uart_setreg(bas, UART_MCR_REG, 0);
-	uart_barrier(bas);
-}
-
-static void
-mtk_uart_putc(struct uart_bas *bas, int c)
-{
-	char chr;
-	if (!uart_output) return;
-	chr = c;
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE));
-	uart_setreg(bas, UART_TX_REG, c);
-	uart_barrier(bas);
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE));
-}
-
-static int
-mtk_uart_rxready(struct uart_bas *bas)
-{
-	if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)
-		return (1);
-	return (0);
-}
-
-static int
-mtk_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
-{
-	int c;
-
-	uart_lock(hwmtx);
-
-	while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) {
-		uart_unlock(hwmtx);
-		DELAY(10);
-		uart_lock(hwmtx);
-	}
-
-	c = uart_getreg(bas, UART_RX_REG);
-
-	uart_unlock(hwmtx);
-
-	return (c);
-}
-
-/*
- * High-level UART interface.
- */
-struct uart_mtk_softc {
-	struct uart_softc base;
-	uint8_t ier_mask;
-	uint8_t ier;
-};
-
-static int mtk_uart_bus_attach(struct uart_softc *);
-static int mtk_uart_bus_detach(struct uart_softc *);
-static int mtk_uart_bus_flush(struct uart_softc *, int);
-static int mtk_uart_bus_getsig(struct uart_softc *);
-static int mtk_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int mtk_uart_bus_ipend(struct uart_softc *);
-static int mtk_uart_bus_param(struct uart_softc *, int, int, int, int);
-static int mtk_uart_bus_probe(struct uart_softc *);
-static int mtk_uart_bus_receive(struct uart_softc *);
-static int mtk_uart_bus_setsig(struct uart_softc *, int);
-static int mtk_uart_bus_transmit(struct uart_softc *);
-static void mtk_uart_bus_grab(struct uart_softc *);
-static void mtk_uart_bus_ungrab(struct uart_softc *);
-
-static kobj_method_t uart_mtk_methods[] = {
-	KOBJMETHOD(uart_attach,		mtk_uart_bus_attach),
-	KOBJMETHOD(uart_detach,		mtk_uart_bus_detach),
-	KOBJMETHOD(uart_flush,		mtk_uart_bus_flush),
-	KOBJMETHOD(uart_getsig,		mtk_uart_bus_getsig),
-	KOBJMETHOD(uart_ioctl,		mtk_uart_bus_ioctl),
-	KOBJMETHOD(uart_ipend,		mtk_uart_bus_ipend),
-	KOBJMETHOD(uart_param,		mtk_uart_bus_param),
-	KOBJMETHOD(uart_probe,		mtk_uart_bus_probe),
-	KOBJMETHOD(uart_receive,	mtk_uart_bus_receive),
-	KOBJMETHOD(uart_setsig,		mtk_uart_bus_setsig),
-	KOBJMETHOD(uart_transmit,	mtk_uart_bus_transmit),
-	KOBJMETHOD(uart_grab,		mtk_uart_bus_grab),
-	KOBJMETHOD(uart_ungrab,		mtk_uart_bus_ungrab),
-	{ 0, 0 }
-};
-
-struct uart_class uart_mtk_class = {
-	"uart_mtk",
-	uart_mtk_methods,
-	sizeof(struct uart_mtk_softc),
-	.uc_ops = &uart_mtk_ops,
-	.uc_range = 1, /* use hinted range */
-	.uc_rclk = 0
-};
-
-static struct ofw_compat_data compat_data[] = {
-	{ "ralink,rt2880-uart",		(uintptr_t)&uart_mtk_class },
-	{ "ralink,rt3050-uart",		(uintptr_t)&uart_mtk_class },
-	{ "ralink,rt3352-uart",		(uintptr_t)&uart_mtk_class },
-	{ "ralink,rt3883-uart",		(uintptr_t)&uart_mtk_class },
-	{ "ralink,rt5350-uart",		(uintptr_t)&uart_mtk_class },
-	{ "ralink,mt7620a-uart",	(uintptr_t)&uart_mtk_class },
-	{ NULL,				(uintptr_t)NULL },
-};
-UART_FDT_CLASS_AND_DEVICE(compat_data);
-
-#define	SIGCHG(c, i, s, d)				\
-	if (c) {					\
-		i |= (i & s) ? s : s | d;		\
-	} else {					\
-		i = (i & s) ? (i & ~s) | d : i;		\
-	}
-
-/*
- * Disable TX interrupt. uart should be locked
- */
-static __inline void
-mtk_uart_disable_txintr(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint8_t cr;
-
-	cr = uart_getreg(bas, UART_IER_REG);
-	cr &= ~UART_IER_ETBEI;
-	uart_setreg(bas, UART_IER_REG, cr);
-	uart_barrier(bas);
-}
-
-/*
- * Enable TX interrupt. uart should be locked
- */
-static __inline void
-mtk_uart_enable_txintr(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint8_t cr;
-
-	cr = uart_getreg(bas, UART_IER_REG);
-	cr |= UART_IER_ETBEI;
-	uart_setreg(bas, UART_IER_REG, cr);
-	uart_barrier(bas);
-}
-
-static int
-mtk_uart_bus_attach(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	struct uart_devinfo *di;
-	struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc;
-
-	bas = &sc->sc_bas;
-
-	if (!bas->rclk) {
-		bas->rclk = mtk_soc_get_uartclk();
-	}
-
-	if (sc->sc_sysdev != NULL) {
-		di = sc->sc_sysdev;
-		mtk_uart_init(bas, di->baudrate, di->databits, di->stopbits,
-		    di->parity);
-	} else {
-		mtk_uart_init(bas, 57600, 8, 1, 0);
-	}
-
-	sc->sc_rxfifosz = 16;
-	sc->sc_txfifosz = 16;
-
-	(void)mtk_uart_bus_getsig(sc);
-
-	/* Enable FIFO */
-	uart_setreg(bas, UART_FCR_REG,
-	    uart_getreg(bas, UART_FCR_REG) |
-	    UART_FCR_FIFOEN | UART_FCR_TXTGR_1 | UART_FCR_RXTGR_1);
-	uart_barrier(bas);
-	/* Enable interrupts */
-	usc->ier_mask = 0xf0;
-	uart_setreg(bas, UART_IER_REG,
-	    UART_IER_EDSSI | UART_IER_ELSI | UART_IER_ERBFI);
-	uart_barrier(bas);
-
-	return (0);
-}
-
-static int
-mtk_uart_bus_detach(struct uart_softc *sc)
-{
-	return (0);
-}
-
-static int
-mtk_uart_bus_flush(struct uart_softc *sc, int what)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	uint32_t fcr = uart_getreg(bas, UART_FCR_REG);
-
-	if (what & UART_FLUSH_TRANSMITTER) {
-		uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_TXRST);
-		uart_barrier(bas);
-	}
-	if (what & UART_FLUSH_RECEIVER) {
-		uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_RXRST);
-		uart_barrier(bas);
-	}
-	uart_setreg(bas, UART_FCR_REG, fcr);
-	uart_barrier(bas);
-	return (0);
-}
-
-static int
-mtk_uart_bus_getsig(struct uart_softc *sc)
-{
-	uint32_t new, old, sig;
-	uint8_t bes;
-
-	return(0);
-	do {
-		old = sc->sc_hwsig;
-		sig = old;
-		uart_lock(sc->sc_hwmtx);
-		bes = uart_getreg(&sc->sc_bas, UART_MSR_REG);
-		uart_unlock(sc->sc_hwmtx);
-		/* XXX: chip can show delta */
-		SIGCHG(bes & UART_MSR_CTS, sig, SER_CTS, SER_DCTS);
-		SIGCHG(bes & UART_MSR_DCD, sig, SER_DCD, SER_DDCD);
-		SIGCHG(bes & UART_MSR_DSR, sig, SER_DSR, SER_DDSR);
-		new = sig & ~SER_MASK_DELTA;
-	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
-
-	return (sig);
-}
-
-static int
-mtk_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
-{
-	struct uart_bas *bas;
-	int baudrate, divisor, error;
-
-	bas = &sc->sc_bas;
-	error = 0;
-	uart_lock(sc->sc_hwmtx);
-	switch (request) {
-	case UART_IOCTL_BREAK:
-		/* TODO: Send BREAK */
-		break;
-	case UART_IOCTL_BAUD:
-		divisor = uart_getreg(bas, UART_CDDL_REG);
-		baudrate = bas->rclk / (divisor * 16);
-		*(int*)data = baudrate;
-		break;
-	default:
-		error = EINVAL;
-		break;
-	}
-	uart_unlock(sc->sc_hwmtx);
-	return (error);
-}
-
-static int
-mtk_uart_bus_ipend(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int ipend;
-	uint8_t iir, lsr, msr;
-
-//	breakpoint();
-
-	bas = &sc->sc_bas;
-	ipend = 0;
-
-	uart_lock(sc->sc_hwmtx);
-	iir = uart_getreg(&sc->sc_bas, UART_IIR_REG);
-	lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG);
-	uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr);
-	msr = uart_getreg(&sc->sc_bas, UART_MSR_REG);
-	uart_setreg(&sc->sc_bas, UART_MSR_REG, msr);
-	if (iir & UART_IIR_INTP) {
-		uart_unlock(sc->sc_hwmtx);
-		return (0);
-	}
-	switch ((iir >> 1) & 0x07) {
-	case UART_IIR_ID_THRE:
-		ipend |= SER_INT_TXIDLE;
-		break;
-	case UART_IIR_ID_DR2:
-		mtk_uart_bus_flush(sc, UART_FLUSH_RECEIVER);
-		/* passthrough */
-	case UART_IIR_ID_DR:
-		ipend |= SER_INT_RXREADY;
-		break;
-	case UART_IIR_ID_MST:
-	case UART_IIR_ID_LINESTATUS:
-		ipend |= SER_INT_SIGCHG;
-		if (lsr & UART_LSR_BI)
-			ipend |= SER_INT_BREAK;
-		if (lsr & UART_LSR_OE)
-			ipend |= SER_INT_OVERRUN;
-		break;
-	default:
-		/* XXX: maybe return error here */
-		break;
-	}
-
-	uart_unlock(sc->sc_hwmtx);
-
-	return (ipend);
-}
-
-static int
-mtk_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
-    int stopbits, int parity)
-{
-	uart_lock(sc->sc_hwmtx);
-	mtk_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity);
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-mtk_uart_bus_probe(struct uart_softc *sc)
-{
-	int error;
-
-	error = mtk_uart_probe(&sc->sc_bas);
-	if (error)
-		return (error);
-		
-	device_set_desc(sc->sc_dev, "MTK UART Controller");
-
-	return (0);
-}
-
-static int
-mtk_uart_bus_receive(struct uart_softc *sc)
-{
-	struct uart_bas *bas;
-	int xc;
-	uint8_t lsr;
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	lsr = uart_getreg(bas, UART_LSR_REG);
-	while ((lsr & UART_LSR_DR)) {
-		if (uart_rx_full(sc)) {
-			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
-			break;
-		}
-		xc = 0;
-		xc = uart_getreg(bas, UART_RX_REG);
-		if (lsr & UART_LSR_FE)
-			xc |= UART_STAT_FRAMERR;
-		if (lsr & UART_LSR_PE)
-			xc |= UART_STAT_PARERR;
-		if (lsr & UART_LSR_OE)
-			xc |= UART_STAT_OVERRUN;
-		uart_barrier(bas);
-		uart_rx_put(sc, xc);
-		lsr = uart_getreg(bas, UART_LSR_REG);
-	}
-
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-static int
-mtk_uart_bus_setsig(struct uart_softc *sc, int sig)
-{
-	/* TODO: implement (?) */
-	return (sig);
-}
-
-static int
-mtk_uart_bus_transmit(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	int i;
-
-	if (!uart_output) return (0);
-
-	bas = &sc->sc_bas;
-	uart_lock(sc->sc_hwmtx);
-	while ((uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE) == 0);
-	mtk_uart_enable_txintr(sc);
-	for (i = 0; i < sc->sc_txdatasz; i++) {
-		uart_setreg(bas, UART_TX_REG, sc->sc_txbuf[i]);
-		uart_barrier(bas);
-	}
-	sc->sc_txbusy = 1;
-	uart_unlock(sc->sc_hwmtx);
-	return (0);
-}
-
-void
-mtk_uart_bus_grab(struct uart_softc *sc)
-{
-	struct uart_bas *bas = &sc->sc_bas;
-	struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc;
-
-	uart_lock(sc->sc_hwmtx);
-	usc->ier = uart_getreg(bas, UART_IER_REG);
-	uart_setreg(bas, UART_IER_REG, usc->ier & usc->ier_mask);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
-
-void
-mtk_uart_bus_ungrab(struct uart_softc *sc)
-{
-	struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc;
-	struct uart_bas *bas = &sc->sc_bas;
-
-	uart_lock(sc->sc_hwmtx);
-	uart_setreg(bas, UART_IER_REG, usc->ier);
-	uart_barrier(bas);
-	uart_unlock(sc->sc_hwmtx);
-}
diff --git a/sys/mips/mediatek/uart_dev_mtk.h b/sys/mips/mediatek/uart_dev_mtk.h
deleted file mode 100644
index 44fcdd82c781..000000000000
--- a/sys/mips/mediatek/uart_dev_mtk.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*-
- * Copyright (c) 2010 Aleksandr Rybalko.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- *    copyright notice, this list of conditions and the following
- *    disclaimer in the documentation and/or other materials provided
- *    with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- *    products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef	_MTKUART_H
-#define	_MTKUART_H
-
-#undef	uart_getreg
-#undef	uart_setreg
-#define	uart_getreg(bas, reg)		\
-	bus_space_read_4((bas)->bst, (bas)->bsh, reg)
-#define	uart_setreg(bas, reg, value)	\
-	bus_space_write_4((bas)->bst, (bas)->bsh, reg, value)
-
-/* UART registers */
-#define	UART_RX_REG	0x00
-#define	UART_TX_REG	0x04
-
-#define	UART_IER_REG	0x08
-#define		UART_IER_EDSSI		(1<<3) /* Only full UART */
-#define		UART_IER_ELSI		(1<<2)
-#define		UART_IER_ETBEI		(1<<1)
-#define		UART_IER_ERBFI		(1<<0)
-
-#define	UART_IIR_REG	0x0c
-#define		UART_IIR_RXFIFO		(1<<7)
-#define		UART_IIR_TXFIFO		(1<<6)
-#define		UART_IIR_ID_MST		0
-#define		UART_IIR_ID_THRE	1
-#define		UART_IIR_ID_DR		2
-#define		UART_IIR_ID_LINESTATUS	3
-#define		UART_IIR_ID_DR2		6
-#define		UART_IIR_ID_SHIFT	1
-#define		UART_IIR_ID_MASK	0x0000000e
-#define		UART_IIR_INTP		(1<<0)
-
-#define	UART_FCR_REG	0x10
-#define		UART_FCR_RXTGR_1	(0<<6)
-#define		UART_FCR_RXTGR_4	(1<<6)
-#define		UART_FCR_RXTGR_8	(2<<6)
-#define		UART_FCR_RXTGR_12	(3<<6)
-#define		UART_FCR_TXTGR_1	(0<<4)
-#define		UART_FCR_TXTGR_4	(1<<4)
-#define		UART_FCR_TXTGR_8	(2<<4)
-#define		UART_FCR_TXTGR_12	(3<<4)
-#define		UART_FCR_DMA		(1<<3)
-#define		UART_FCR_TXRST		(1<<2)
-#define		UART_FCR_RXRST		(1<<1)
-#define		UART_FCR_FIFOEN		(1<<0)
-
-#define	UART_LCR_REG	0x14
-#define		UART_LCR_DLAB	(1<<7)
-#define		UART_LCR_BRK	(1<<6)
-#define		UART_LCR_FPAR	(1<<5)
-#define		UART_LCR_EVEN	(1<<4)
-#define		UART_LCR_PEN	(1<<3)
-#define		UART_LCR_STB_15	(1<<2)
-#define		UART_LCR_5B	0
-#define		UART_LCR_6B	1
-#define		UART_LCR_7B	2
-#define		UART_LCR_8B	3
-
-#define	UART_MCR_REG	0x18
-#define		UART_MCR_LOOP	(1<<4)
-#define		UART_MCR_OUT2_L	(1<<3) /* Only full UART */
-#define		UART_MCR_OUT1_L	(1<<2) /* Only full UART */
-#define		UART_MCR_RTS_L	(1<<1) /* Only full UART */
-#define		UART_MCR_DTR_L	(1<<0) /* Only full UART */
-
-#define	UART_LSR_REG	0x1c
-#define		UART_LSR_ERINF	(1<<7)
-#define		UART_LSR_TEMT	(1<<6)
-#define		UART_LSR_THRE	(1<<5)
-#define		UART_LSR_BI	(1<<4)
-#define		UART_LSR_FE	(1<<3)
-#define		UART_LSR_PE	(1<<2)
-#define		UART_LSR_OE	(1<<1)
-#define		UART_LSR_DR	(1<<0)
-
-#define	UART_MSR_REG	0x20 	/* Only full UART */
-#define		UART_MSR_DCD	(1<<7) /* Only full UART */
-#define		UART_MSR_RI	(1<<6) /* Only full UART */
-#define		UART_MSR_DSR	(1<<5) /* Only full UART */
-#define		UART_MSR_CTS	(1<<4) /* Only full UART */
-#define		UART_MSR_DDCD	(1<<3) /* Only full UART */
-#define		UART_MSR_TERI	(1<<2) /* Only full UART */
-#define		UART_MSR_DDSR	(1<<1) /* Only full UART */
-#define		UART_MSR_DCTS	(1<<0) /* Only full UART */
-
-#define	UART_CDDL_REG	0x28
-#define	UART_CDDLL_REG	0x2c
-#define	UART_CDDLH_REG	0x30
-
-#define	UART_IFCTL_REG	0x34
-#define		UART_IFCTL_IFCTL	(1<<0)
-
-int	uart_cnattach(void);
-#endif	/* _MTKUART_H */
diff --git a/sys/mips/mips/autoconf.c b/sys/mips/mips/autoconf.c
deleted file mode 100644
index 849351a2215e..000000000000
--- a/sys/mips/mips/autoconf.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)autoconf.c	7.1 (Berkeley) 5/9/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * Setup the system to run on the current machine.
- *
- * Configure() is called at boot time and initializes the vba
- * device tables and the memory controller monitoring.  Available
- * devices are determined (from possibilities mentioned in ioconf.c),
- * and the drivers are initialized.
- */
-#include "opt_bootp.h"
-#include "opt_bus.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/reboot.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/mount.h>
-#include <sys/cons.h>
-
-#include <sys/socket.h>
-#include <net/if.h>
-#include <net/if_dl.h>
-#include <net/if_types.h>
-#include <net/if_var.h>
-#include <net/ethernet.h>
-#include <netinet/in.h>
-
-#include <machine/cpufunc.h>
-#include <machine/md_var.h>
-
-static void	configure_first(void *);
-static void	configure(void *);
-static void	configure_final(void *);
-
-SYSINIT(configure1, SI_SUB_CONFIGURE, SI_ORDER_FIRST, configure_first, NULL);
-/* SI_ORDER_SECOND is hookable */
-SYSINIT(configure2, SI_SUB_CONFIGURE, SI_ORDER_THIRD, configure, NULL);
-/* SI_ORDER_MIDDLE is hookable */
-SYSINIT(configure3, SI_SUB_CONFIGURE, SI_ORDER_ANY, configure_final, NULL);
-
-/*
- * Determine i/o configuration for a machine.
- */
-static void
-configure_first(dummy)
-	void *dummy;
-{
-
-	/* nexus0 is the top of the mips device tree */
-	device_add_child(root_bus, "nexus", 0);
-}
-
-static void
-configure(dummy)
-	void *dummy;
-{
-
-	/* initialize new bus architecture */
-	root_bus_configure();
-}
-
-static void
-configure_final(dummy)
-	void *dummy;
-{
-	intr_enable();
-
-	cninit_finish(); 
-
-	if (bootverbose)
-		printf("Device configuration finished.\n");
-
-	cold = 0;
-}
diff --git a/sys/mips/mips/bcopy.S b/sys/mips/mips/bcopy.S
deleted file mode 100644
index ffd86f1de26d..000000000000
--- a/sys/mips/mips/bcopy.S
+++ /dev/null
@@ -1,286 +0,0 @@
-/*	$NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $	*/
-
-/*
- * Mach Operating System
- * Copyright (c) 1993 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie Mellon
- * the rights to redistribute these changes.
- */
-
-/*
- *	File:	mips_bcopy.s
- *	Author:	Chris Maeda
- *	Date:	June 1993
- *
- *	Fast copy routine.  Derived from aligned_block_copy.
- */
-
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD$");
-
-#include <machine/endian.h>
-
-#if defined(LIBC_SCCS) && !defined(lint)
-#if 0
-	ASMSTR("from: @(#)mips_bcopy.s	2.2 CMU 18/06/93")
-#else
-	ASMSTR("$NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $")
-#endif
-#endif /* LIBC_SCCS and not lint */
-
-#ifdef __ABICALLS__
-	.abicalls
-#endif
-
-/*
- *	bcopy(caddr_t src, caddr_t dst, unsigned int len)
- *
- *	a0 	src address
- *	a1	dst address
- *	a2	length
- */
-
-#define	SRCREG	a0
-#define	DSTREG	a1
-#define	SIZEREG	a2
-
-LEAF(memcpy)
-XLEAF(memmove)
-	.set	noat
-	.set	noreorder
-
-	move	v0, a0
-	move	a0, a1
-	move	a1, v0
-
-XLEAF(bcopy)
-	/*
-	 *	Make sure we can copy forwards.
-	 */
-	sltu	t0,SRCREG,DSTREG	# t0 == SRCREG < DSTREG
-	bne	t0,zero,6f		# copy backwards
-
-	/*
-	 * 	There are four alignment cases (with frequency)
-	 *	(Based on measurements taken with a DECstation 5000/200
-	 *	 inside a Mach kernel.)
-	 *
-	 * 	aligned   -> aligned		(mostly)
-	 * 	unaligned -> aligned		(sometimes)
-	 * 	aligned,unaligned -> unaligned	(almost never)
-	 *
-	 *	Note that we could add another case that checks if
-	 *	the destination and source are unaligned but the
-	 *	copy is alignable.  eg if src and dest are both
-	 *	on a halfword boundary.
-	 */
-	andi		t1,DSTREG,(SZREG-1)	# get last bits of dest
-	bne		t1,zero,3f		# dest unaligned
-	andi		t0,SRCREG,(SZREG-1)	# get last bits of src
-	bne		t0,zero,5f
-
-	/*
-	 *	Forward aligned->aligned copy, 8 words at a time.
-	 */
-98:
-	li		AT,-(SZREG*8)
-	and		t0,SIZEREG,AT		# count truncated to multiples
-	PTR_ADDU	a3,SRCREG,t0		# run fast loop up to this addr
-	sltu		AT,SRCREG,a3		# any work to do?
-	beq		AT,zero,2f
-	PTR_SUBU	SIZEREG,t0
-
-	/*
-	 *	loop body
-	 */
-1:	# cp
-	REG_L		t3,(0*SZREG)(SRCREG)
-	REG_L		v1,(1*SZREG)(SRCREG)
-	REG_L		t0,(2*SZREG)(SRCREG)
-	REG_L		t1,(3*SZREG)(SRCREG)
-	PTR_ADDU	SRCREG,SZREG*8
-	REG_S		t3,(0*SZREG)(DSTREG)
-	REG_S		v1,(1*SZREG)(DSTREG)
-	REG_S		t0,(2*SZREG)(DSTREG)
-	REG_S		t1,(3*SZREG)(DSTREG)
-	REG_L		t1,(-1*SZREG)(SRCREG)
-	REG_L		t0,(-2*SZREG)(SRCREG)
-	REG_L		v1,(-3*SZREG)(SRCREG)
-	REG_L		t3,(-4*SZREG)(SRCREG)
-	PTR_ADDU	DSTREG,SZREG*8
-	REG_S		t1,(-1*SZREG)(DSTREG)
-	REG_S		t0,(-2*SZREG)(DSTREG)
-	REG_S		v1,(-3*SZREG)(DSTREG)
-	bne		SRCREG,a3,1b
-	REG_S		t3,(-4*SZREG)(DSTREG)
-
-	/*
-	 *	Copy a word at a time, no loop unrolling.
-	 */
-2:	# wordcopy
-	andi		t2,SIZEREG,(SZREG-1)	# get byte count / SZREG
-	PTR_SUBU	t2,SIZEREG,t2		# t2 = words to copy * SZREG
-	beq		t2,zero,3f
-	PTR_ADDU	t0,SRCREG,t2		# stop at t0
-	PTR_SUBU	SIZEREG,SIZEREG,t2
-1:
-	REG_L		t3,0(SRCREG)
-	PTR_ADDU	SRCREG,SZREG
-	REG_S		t3,0(DSTREG)
-	bne		SRCREG,t0,1b
-	PTR_ADDU	DSTREG,SZREG
-
-3:	# bytecopy
-	beq		SIZEREG,zero,4f		# nothing left to do?
-	nop
-1:
-	lb		t3,0(SRCREG)
-	PTR_ADDU	SRCREG,1
-	sb		t3,0(DSTREG)
-	PTR_SUBU	SIZEREG,1
-	bgtz		SIZEREG,1b
-	PTR_ADDU	DSTREG,1
-
-4:	# copydone
-	j	ra
-	nop
-
-	/*
-	 *	Copy from unaligned source to aligned dest.
-	 */
-5:	# destaligned
-	andi		t0,SIZEREG,(SZREG-1)	# t0 = bytecount mod SZREG
-	PTR_SUBU	a3,SIZEREG,t0		# number of words to transfer
-	beq		a3,zero,3b
-	nop
-	move		SIZEREG,t0		# this many to do after we are done
-	PTR_ADDU	a3,SRCREG,a3		# stop point
-
-1:
-	REG_LHI		t3,0(SRCREG)
-	REG_LLO		t3,SZREG-1(SRCREG)
-	PTR_ADDI	SRCREG,SZREG
-	REG_S		t3,0(DSTREG)
-	bne		SRCREG,a3,1b
-	PTR_ADDI	DSTREG,SZREG
-
-	b		3b
-	nop
-
-6:	# backcopy -- based on above
-	PTR_ADDU	SRCREG,SIZEREG
-	PTR_ADDU	DSTREG,SIZEREG
-	andi		t1,DSTREG,SZREG-1	# get last 3 bits of dest
-	bne		t1,zero,3f
-	andi		t0,SRCREG,SZREG-1	# get last 3 bits of src
-	bne		t0,zero,5f
-
-	/*
-	 *	Forward aligned->aligned copy, 8*4 bytes at a time.
-	 */
-	li		AT,(-8*SZREG)
-	and		t0,SIZEREG,AT		# count truncated to multiple of 32
-	beq		t0,zero,2f		# any work to do?
-	PTR_SUBU	SIZEREG,t0
-	PTR_SUBU	a3,SRCREG,t0
-
-	/*
-	 *	loop body
-	 */
-1:	# cp
-	REG_L		t3,(-4*SZREG)(SRCREG)
-	REG_L		v1,(-3*SZREG)(SRCREG)
-	REG_L		t0,(-2*SZREG)(SRCREG)
-	REG_L		t1,(-1*SZREG)(SRCREG)
-	PTR_SUBU	SRCREG,8*SZREG
-	REG_S		t3,(-4*SZREG)(DSTREG)
-	REG_S		v1,(-3*SZREG)(DSTREG)
-	REG_S		t0,(-2*SZREG)(DSTREG)
-	REG_S		t1,(-1*SZREG)(DSTREG)
-	REG_L		t1,(3*SZREG)(SRCREG)
-	REG_L		t0,(2*SZREG)(SRCREG)
-	REG_L		v1,(1*SZREG)(SRCREG)
-	REG_L		t3,(0*SZREG)(SRCREG)
-	PTR_SUBU	DSTREG,8*SZREG
-	REG_S		t1,(3*SZREG)(DSTREG)
-	REG_S		t0,(2*SZREG)(DSTREG)
-	REG_S		v1,(1*SZREG)(DSTREG)
-	bne		SRCREG,a3,1b
-	REG_S		t3,(0*SZREG)(DSTREG)
-
-	/*
-	 *	Copy a word at a time, no loop unrolling.
-	 */
-2:	# wordcopy
-	andi		t2,SIZEREG,SZREG-1	# get byte count / 4
-	PTR_SUBU	t2,SIZEREG,t2		# t2 = number of words to copy
-	beq		t2,zero,3f
-	PTR_SUBU	t0,SRCREG,t2		# stop at t0
-	PTR_SUBU	SIZEREG,SIZEREG,t2
-1:
-	REG_L		t3,-SZREG(SRCREG)
-	PTR_SUBU	SRCREG,SZREG
-	REG_S		t3,-SZREG(DSTREG)
-	bne		SRCREG,t0,1b
-	PTR_SUBU	DSTREG,SZREG
-
-3:	# bytecopy
-	beq		SIZEREG,zero,4f		# nothing left to do?
-	nop
-1:
-	lb		t3,-1(SRCREG)
-	PTR_SUBU	SRCREG,1
-	sb		t3,-1(DSTREG)
-	PTR_SUBU	SIZEREG,1
-	bgtz		SIZEREG,1b
-	PTR_SUBU	DSTREG,1
-
-4:	# copydone
-	j	ra
-	nop
-
-	/*
-	 *	Copy from unaligned source to aligned dest.
-	 */
-5:	# destaligned
-	andi		t0,SIZEREG,SZREG-1	# t0 = bytecount mod 4
-	PTR_SUBU	a3,SIZEREG,t0		# number of words to transfer
-	beq		a3,zero,3b
-	nop
-	move		SIZEREG,t0		# this many to do after we are done
-	PTR_SUBU	a3,SRCREG,a3		# stop point
-
-1:
-	REG_LHI		t3,-SZREG(SRCREG)
-	REG_LLO		t3,-1(SRCREG)
-	PTR_SUBU	SRCREG,SZREG
-	REG_S		t3,-SZREG(DSTREG)
-	bne		SRCREG,a3,1b
-	PTR_SUBU	DSTREG,SZREG
-
-	b		3b
-	nop
-
-	.set	reorder
-	.set	at
-END(memcpy)
diff --git a/sys/mips/mips/bus_space_generic.c b/sys/mips/mips/bus_space_generic.c
deleted file mode 100644
index e9d67bcb4093..000000000000
--- a/sys/mips/mips/bus_space_generic.c
+++ /dev/null
@@ -1,744 +0,0 @@
-/*      $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $    */
-/*-
- * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
- *
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-4-Clause
- *
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Christopher G. Demetriou
- *	for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
- * $FreeBSD$
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-static struct bus_space generic_space = {
-	/* cookie */
-	.bs_cookie =	(void *) 0,
-
-	/* mapping/unmapping */
-	.bs_map =	generic_bs_map,
-	.bs_unmap =	generic_bs_unmap,
-	.bs_subregion =	generic_bs_subregion,
-
-	/* allocation/deallocation */
-	.bs_alloc =	generic_bs_alloc,
-	.bs_free =	generic_bs_free,
-
-	/* barrier */
-	.bs_barrier =	generic_bs_barrier,
-
-	/* read (single) */
-	.bs_r_1 =	generic_bs_r_1,
-	.bs_r_2 =	generic_bs_r_2,
-	.bs_r_4 =	generic_bs_r_4,
-	.bs_r_8 =	generic_bs_r_8,
-
-	/* read multiple */
-	.bs_rm_1 =	generic_bs_rm_1,
-	.bs_rm_2 =	generic_bs_rm_2,
-	.bs_rm_4 =	generic_bs_rm_4,
-	.bs_rm_8 =	generic_bs_rm_8,
-
-	/* read region */
-	.bs_rr_1 =	generic_bs_rr_1,
-	.bs_rr_2 =	generic_bs_rr_2,
-	.bs_rr_4 =	generic_bs_rr_4,
-	.bs_rr_8 =	generic_bs_rr_8,
-
-	/* write (single) */
-	.bs_w_1 =	generic_bs_w_1,
-	.bs_w_2 =	generic_bs_w_2,
-	.bs_w_4 =	generic_bs_w_4,
-	.bs_w_8 =	generic_bs_w_8,
-
-	/* write multiple */
-	.bs_wm_1 =	generic_bs_wm_1,
-	.bs_wm_2 =	generic_bs_wm_2,
-	.bs_wm_4 =	generic_bs_wm_4,
-	.bs_wm_8 =	generic_bs_wm_8,
-
-	/* write region */
-	.bs_wr_1 =	generic_bs_wr_1,
-	.bs_wr_2 =	generic_bs_wr_2,
-	.bs_wr_4 =	generic_bs_wr_4,
-	.bs_wr_8 =	generic_bs_wr_8,
-
-	/* set multiple */
-	.bs_sm_1 =	generic_bs_sm_1,
-	.bs_sm_2 =	generic_bs_sm_2,
-	.bs_sm_4 =	generic_bs_sm_4,
-	.bs_sm_8 =	generic_bs_sm_8,
-
-	/* set region */
-	.bs_sr_1 =	generic_bs_sr_1,
-	.bs_sr_2 =	generic_bs_sr_2,
-	.bs_sr_4 =	generic_bs_sr_4,
-	.bs_sr_8 =	generic_bs_sr_8,
-
-	/* copy */
-	.bs_c_1 =	generic_bs_c_1,
-	.bs_c_2 =	generic_bs_c_2,
-	.bs_c_4 =	generic_bs_c_4,
-	.bs_c_8 =	generic_bs_c_8,
-
-	/* read (single) stream */
-	.bs_r_1_s =	generic_bs_r_1,
-	.bs_r_2_s =	generic_bs_r_2,
-	.bs_r_4_s =	generic_bs_r_4,
-	.bs_r_8_s =	generic_bs_r_8,
-
-	/* read multiple stream */
-	.bs_rm_1_s =	generic_bs_rm_1,
-	.bs_rm_2_s =	generic_bs_rm_2,
-	.bs_rm_4_s =	generic_bs_rm_4,
-	.bs_rm_8_s =	generic_bs_rm_8,
-
-	/* read region stream */
-	.bs_rr_1_s =	generic_bs_rr_1,
-	.bs_rr_2_s =	generic_bs_rr_2,
-	.bs_rr_4_s =	generic_bs_rr_4,
-	.bs_rr_8_s =	generic_bs_rr_8,
-
-	/* write (single) stream */
-	.bs_w_1_s =	generic_bs_w_1,
-	.bs_w_2_s =	generic_bs_w_2,
-	.bs_w_4_s =	generic_bs_w_4,
-	.bs_w_8_s =	generic_bs_w_8,
-
-	/* write multiple stream */
-	.bs_wm_1_s =	generic_bs_wm_1,
-	.bs_wm_2_s =	generic_bs_wm_2,
-	.bs_wm_4_s =	generic_bs_wm_4,
-	.bs_wm_8_s =	generic_bs_wm_8,
-
-	/* write region stream */
-	.bs_wr_1_s =	generic_bs_wr_1,
-	.bs_wr_2_s =	generic_bs_wr_2,
-	.bs_wr_4_s =	generic_bs_wr_4,
-	.bs_wr_8_s =	generic_bs_wr_8,
-};
-
-/* Ultra-gross kludge */
-#if defined(CPU_CNMIPS) && (defined(__mips_n32) || defined(__mips_o32))
-#include <contrib/octeon-sdk/cvmx.h>
-#define rd8(a) cvmx_read64_uint8(a)
-#define rd16(a) cvmx_read64_uint16(a)
-#define rd32(a) cvmx_read64_uint32(a)
-#define rd64(a) cvmx_read64_uint64(a)
-#define wr8(a, v) cvmx_write64_uint8(a, v)
-#define wr16(a, v) cvmx_write64_uint16(a, v)
-#define wr32(a, v) cvmx_write64_uint32(a, v)
-#define wr64(a, v) cvmx_write64_uint64(a, v)
-#else
-#define rd8(a) readb(a)
-#define rd16(a) readw(a)
-#define rd32(a) readl(a)
-#ifdef readq
-#define rd64(a)	readq((a))
-#endif
-#define wr8(a, v) writeb(a, v)
-#define wr16(a, v) writew(a, v)
-#define wr32(a, v) writel(a, v)
-#ifdef writeq
-#define wr64(a, v) writeq(a, v)
-#endif
-#endif
-
-/* generic bus_space tag */
-bus_space_tag_t mips_bus_space_generic = &generic_space;
-
-int
-generic_bs_map(void *t __unused, bus_addr_t addr,
-	      bus_size_t size, int flags __unused,
-	      bus_space_handle_t *bshp)
-{
-
-	*bshp = (bus_space_handle_t)pmap_mapdev((vm_paddr_t)addr,
-	    (vm_size_t)size);
-	return (0);
-}
-
-void
-generic_bs_unmap(void *t __unused, bus_space_handle_t bh,
-	      bus_size_t size)
-{
-
-	pmap_unmapdev((vm_offset_t)bh, (vm_size_t)size);
-}
-
-int
-generic_bs_subregion(void *t __unused, bus_space_handle_t handle,
-	      bus_size_t offset, bus_size_t size __unused,
-	      bus_space_handle_t *bshp)
-{
-
-	*bshp = handle + offset;
-	return (0);
-}
-
-int
-generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
-    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
-    bus_addr_t *bpap, bus_space_handle_t *bshp)
-{
-
-	panic("%s: not implemented", __func__);
-}
-
-void    
-generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
-{
-
-	panic("%s: not implemented", __func__);
-}
-
-uint8_t
-generic_bs_r_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd8(handle + offset));
-}
-
-uint16_t
-generic_bs_r_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd16(handle + offset));
-}
-
-uint32_t
-generic_bs_r_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return (rd32(handle + offset));
-}
-
-uint64_t
-generic_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset)
-{
-
-#ifdef rd64
-	return(rd64(handle + offset));
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-void
-generic_bs_rm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t *addr, size_t count)
-{
-
-	while (count--)
-		*addr++ = rd8(bsh + offset);
-}
-
-void
-generic_bs_rm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd16(baddr);
-}
-
-void
-generic_bs_rm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd32(baddr);
-}
-
-void
-generic_bs_rm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    uint64_t *addr, size_t count)
-{
-#ifdef rd64
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		*addr++ = rd64(baddr);
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-generic_bs_rr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd8(baddr);
-		baddr += 1;
-	}
-}
-
-void
-generic_bs_rr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd16(baddr);
-		baddr += 2;
-	}
-}
-
-void
-generic_bs_rr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd32(baddr);
-		baddr += 4;
-	}
-}
-
-void
-generic_bs_rr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    uint64_t *addr, size_t count)
-{
-#ifdef rd64
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = rd64(baddr);
-		baddr += 8;
-	}
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-void
-generic_bs_w_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value)
-{
-
-	wr8(bsh + offset, value);
-}
-
-void
-generic_bs_w_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value)
-{
-
-	wr16(bsh + offset, value);
-}
-
-void
-generic_bs_w_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value)
-{
-
-	wr32(bsh + offset, value);
-}
-
-void
-generic_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    uint64_t value)
-{
-
-#ifdef wr64
-	wr64(bsh + offset, value);
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-void
-generic_bs_wm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr8(baddr, *addr++);
-}
-
-void
-generic_bs_wm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr16(baddr, *addr++);
-}
-
-void
-generic_bs_wm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr32(baddr, *addr++);
-}
-
-void
-generic_bs_wm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    const uint64_t *addr, size_t count)
-{
-#ifdef wr64
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--)
-		wr64(baddr, *addr++);
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
- * to bus space described by tag/handle starting at `offset'.
- */
-void
-generic_bs_wr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint8_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr8(baddr, *addr++);
-		baddr += 1;
-	}
-}
-
-void
-generic_bs_wr_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint16_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr16(baddr, *addr++);
-		baddr += 2;
-	}
-}
-
-void
-generic_bs_wr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const uint32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr32(baddr, *addr++);
-		baddr += 4;
-	}
-}
-
-void
-generic_bs_wr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    const uint64_t *addr, size_t count)
-{
-#ifdef wr64
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		wr64(baddr, *addr++);
-		baddr += 8;
-	}
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle/offset `count' times.
- */
-void
-generic_bs_sm_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr8(addr, value);
-}
-
-void
-generic_bs_sm_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr16(addr, value);
-}
-
-void
-generic_bs_sm_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr32(addr, value);
-}
-
-void
-generic_bs_sm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    uint64_t value, size_t count)
-{
-#ifdef wr64
-	bus_addr_t addr = bsh + offset;
-
-	while (count--)
-		wr64(addr, value);
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-void
-generic_bs_sr_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint8_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr++)
-		wr8(addr, value);
-}
-
-void
-generic_bs_sr_2(void *t, bus_space_handle_t bsh,
-		       bus_size_t offset, uint16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		wr16(addr, value);
-}
-
-void
-generic_bs_sr_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, uint32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		wr32(addr, value);
-}
-
-void
-generic_bs_sr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
-    uint64_t value, size_t count)
-{
-#ifdef wr64
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 8)
-		wr64(addr, value);
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-void
-generic_bs_c_1(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1++, addr2++)
-			wr8(addr2, rd8(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += (count - 1), addr2 += (count - 1);
-		    count != 0; count--, addr1--, addr2--)
-			wr8(addr2, rd8(addr1));
-	}
-}
-
-void
-generic_bs_c_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1 += 2, addr2 += 2)
-			wr16(addr2, rd16(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
-		    count != 0; count--, addr1 -= 2, addr2 -= 2)
-			wr16(addr2, rd16(addr1));
-	}
-}
-
-void
-generic_bs_c_4(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1 += 4, addr2 += 4)
-			wr32(addr2, rd32(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
-		    count != 0; count--, addr1 -= 4, addr2 -= 4)
-			wr32(addr2, rd32(addr1));
-	}
-}
-
-void
-generic_bs_c_8(void *t, bus_space_handle_t bsh1, bus_size_t off1,
-    bus_space_handle_t bsh2, bus_size_t off2, size_t count)
-{
-#if defined(rd64) && defined(wr64)
-	bus_addr_t addr1 = bsh1 + off1;
-	bus_addr_t addr2 = bsh2 + off2;
-
-	if (addr1 >= addr2) {
-		/* src after dest: copy forward */
-		for (; count != 0; count--, addr1 += 8, addr2 += 8)
-			wr64(addr2, rd64(addr1));
-	} else {
-		/* dest after src: copy backwards */
-		for (addr1 += 8 * (count - 1), addr2 += 8 * (count - 1);
-		    count != 0; count--, addr1 -= 8, addr2 -= 8)
-			wr64(addr2, rd64(addr1));
-	}
-#else
-	panic("%s: not implemented", __func__);
-#endif
-}
-
-void
-generic_bs_barrier(void *t __unused, 
-		bus_space_handle_t bsh __unused,
-		bus_size_t offset __unused, bus_size_t len __unused, 
-		int flags)
-{
-#if 0
-	if (flags & BUS_SPACE_BARRIER_WRITE)
-		mips_dcache_wbinv_all();
-#endif
-	if (flags & BUS_SPACE_BARRIER_READ)
-		rmb();
-	if (flags & BUS_SPACE_BARRIER_WRITE)
-		wmb();
-}
diff --git a/sys/mips/mips/busdma_machdep.c b/sys/mips/mips/busdma_machdep.c
deleted file mode 100644
index f408ca8f4260..000000000000
--- a/sys/mips/mips/busdma_machdep.c
+++ /dev/null
@@ -1,1549 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *  From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * MIPS bus dma support routines
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/busdma_bufalloc.h>
-#include <sys/interrupt.h>
-#include <sys/lock.h>
-#include <sys/proc.h>
-#include <sys/memdesc.h>
-#include <sys/mutex.h>
-#include <sys/ktr.h>
-#include <sys/kernel.h>
-#include <sys/sysctl.h>
-#include <sys/uio.h>
-
-#include <vm/uma.h>
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_map.h>
-
-#include <machine/atomic.h>
-#include <machine/bus.h>
-#include <machine/cache.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/md_var.h>
-
-#define MAX_BPAGES 64
-#define BUS_DMA_COULD_BOUNCE	BUS_DMA_BUS3
-#define BUS_DMA_MIN_ALLOC_COMP	BUS_DMA_BUS4
-
-/*
- * On XBurst cores from Ingenic, cache-line writeback is local
- * only, unless accompanied by invalidation. Invalidations force
- * dirty line writeout and invalidation requests forwarded to
- * other cores if other cores have the cache line dirty.
- */
-#if defined(SMP) && defined(CPU_XBURST)
-#define	BUS_DMA_FORCE_WBINV
-#endif
-
-struct bounce_zone;
-
-struct bus_dma_tag {
-	bus_dma_tag_t		parent;
-	bus_size_t		alignment;
-	bus_addr_t		boundary;
-	bus_addr_t		lowaddr;
-	bus_addr_t		highaddr;
-	bus_dma_filter_t	*filter;
-	void			*filterarg;
-	bus_size_t		maxsize;
-	u_int			nsegments;
-	bus_size_t		maxsegsz;
-	int			flags;
-	int			ref_count;
-	int			map_count;
-	bus_dma_lock_t		*lockfunc;
-	void			*lockfuncarg;
-	bus_dma_segment_t	*segments;
-	struct bounce_zone *bounce_zone;
-};
-
-struct bounce_page {
-	vm_offset_t	vaddr;		/* kva of bounce buffer */
-	vm_offset_t	vaddr_nocache;	/* kva of bounce buffer uncached */
-	bus_addr_t	busaddr;	/* Physical address */
-	vm_offset_t	datavaddr;	/* kva of client data */
-	bus_addr_t	dataaddr;	/* client physical address */
-	bus_size_t	datacount;	/* client data count */
-	STAILQ_ENTRY(bounce_page) links;
-};
-
-struct sync_list {
-	vm_offset_t	vaddr;		/* kva of bounce buffer */
-	bus_addr_t	busaddr;	/* Physical address */
-	bus_size_t	datacount;	/* client data count */
-};
-
-struct bounce_zone {
-	STAILQ_ENTRY(bounce_zone) links;
-	STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
-	int		total_bpages;
-	int		free_bpages;
-	int		reserved_bpages;
-	int		active_bpages;
-	int		total_bounced;
-	int		total_deferred;
-	int		map_count;
-	bus_size_t	alignment;
-	bus_addr_t	lowaddr;
-	char		zoneid[8];
-	char		lowaddrid[20];
-	struct sysctl_ctx_list sysctl_tree;
-	struct sysctl_oid *sysctl_tree_top;
-};
-
-static struct mtx bounce_lock;
-static int total_bpages;
-static int busdma_zonecount;
-static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
-static void *busdma_ih;
-
-static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0,
-    "Busdma parameters");
-SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
-	   "Total bounce pages");
-
-#define DMAMAP_UNCACHEABLE	0x08
-#define DMAMAP_CACHE_ALIGNED	0x10
-
-struct bus_dmamap {
-	struct bp_list	bpages;
-	int		pagesneeded;
-	int		pagesreserved;
-	bus_dma_tag_t	dmat;
-	struct memdesc	mem;
-	int		flags;
-	TAILQ_ENTRY(bus_dmamap)	freelist;
-	STAILQ_ENTRY(bus_dmamap) links;
-	bus_dmamap_callback_t *callback;
-	void		*callback_arg;
-	int		sync_count;
-	struct sync_list *slist;
-};
-
-static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
-static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
-
-static void init_bounce_pages(void *dummy);
-static int alloc_bounce_zone(bus_dma_tag_t dmat);
-static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
-static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
-				int commit);
-static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
-				  vm_offset_t vaddr, bus_addr_t addr,
-				  bus_size_t size);
-static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
-
-/* Default tag, as most drivers provide no parent tag. */
-bus_dma_tag_t mips_root_dma_tag;
-
-static uma_zone_t dmamap_zone;	/* Cache of struct bus_dmamap items */
-
-static busdma_bufalloc_t coherent_allocator;	/* Cache of coherent buffers */
-static busdma_bufalloc_t standard_allocator;	/* Cache of standard buffers */
-
-MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata");
-MALLOC_DEFINE(M_BOUNCE, "bounce", "busdma bounce pages");
-
-/*
- * This is the ctor function passed to uma_zcreate() for the pool of dma maps.
- * It'll need platform-specific changes if this code is copied.
- */
-static int
-dmamap_ctor(void *mem, int size, void *arg, int flags)
-{
-	bus_dmamap_t map;
-	bus_dma_tag_t dmat;
-
-	map = (bus_dmamap_t)mem;
-	dmat = (bus_dma_tag_t)arg;
-
-	dmat->map_count++;
-
-	bzero(map, sizeof(*map));
-	map->dmat = dmat;
-	STAILQ_INIT(&map->bpages);
-
-	return (0);
-}
-
-/*
- * This is the dtor function passed to uma_zcreate() for the pool of dma maps.
- * It may need platform-specific changes if this code is copied              .
- */
-static void
-dmamap_dtor(void *mem, int size, void *arg)
-{
-	bus_dmamap_t map;
-
-	map = (bus_dmamap_t)mem;
-
-	map->dmat->map_count--;
-}
-
-static void
-busdma_init(void *dummy)
-{
-
-	/* Create a cache of maps for bus_dmamap_create(). */
-	dmamap_zone = uma_zcreate("dma maps", sizeof(struct bus_dmamap),
-	    dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0);
-
-	/* Create a cache of buffers in standard (cacheable) memory. */
-	standard_allocator = busdma_bufalloc_create("buffer",
-	    mips_dcache_max_linesize,	/* minimum_alignment */
-	    NULL,			/* uma_alloc func */
-	    NULL,			/* uma_free func */
-	    0);				/* uma_zcreate_flags */
-
-	/*
-	 * Create a cache of buffers in uncacheable memory, to implement the
-	 * BUS_DMA_COHERENT flag.
-	 */
-	coherent_allocator = busdma_bufalloc_create("coherent",
-	    mips_dcache_max_linesize,	/* minimum_alignment */
-	    busdma_bufalloc_alloc_uncacheable,
-	    busdma_bufalloc_free_uncacheable,
-	    0);				/* uma_zcreate_flags */
-}
-SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_FOURTH, busdma_init, NULL);
-
-/*
- * Return true if a match is made.
- *
- * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
- *
- * If paddr is within the bounds of the dma tag then call the filter callback
- * to check for a match, if there is no filter callback then assume a match.
- */
-static int
-run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
-{
-	int retval;
-
-	retval = 0;
-
-	do {
-		if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
-		 || ((paddr & (dmat->alignment - 1)) != 0))
-		 && (dmat->filter == NULL
-		  || (*dmat->filter)(dmat->filterarg, paddr) != 0))
-			retval = 1;
-
-		dmat = dmat->parent;
-	} while (retval == 0 && dmat != NULL);
-	return (retval);
-}
-
-/*
- * Check to see if the specified page is in an allowed DMA range.
- */
-
-static __inline int
-_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
-{
-	int i;
-	for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
-		if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
-		    || (lowaddr < phys_avail[i] &&
-		    highaddr > phys_avail[i]))
-			return (1);
-	}
-	return (0);
-}
-
-/*
- * Convenience function for manipulating driver locks from busdma (during
- * busdma_swi, for example).
- */
-void
-busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
-{
-	struct mtx *dmtx;
-
-	dmtx = (struct mtx *)arg;
-	switch (op) {
-	case BUS_DMA_LOCK:
-		mtx_lock(dmtx);
-		break;
-	case BUS_DMA_UNLOCK:
-		mtx_unlock(dmtx);
-		break;
-	default:
-		panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
-	}
-}
-
-/*
- * dflt_lock should never get called.  It gets put into the dma tag when
- * lockfunc == NULL, which is only valid if the maps that are associated
- * with the tag are meant to never be defered.
- * XXX Should have a way to identify which driver is responsible here.
- */
-static void
-dflt_lock(void *arg, bus_dma_lock_op_t op)
-{
-#ifdef INVARIANTS
-	panic("driver error: busdma dflt_lock called");
-#else
-	printf("DRIVER_ERROR: busdma dflt_lock called\n");
-#endif
-}
-
-static __inline bus_dmamap_t
-_busdma_alloc_dmamap(bus_dma_tag_t dmat)
-{
-	struct sync_list *slist;
-	bus_dmamap_t map;
-
-	slist = malloc(sizeof(*slist) * dmat->nsegments, M_BUSDMA, M_NOWAIT);
-	if (slist == NULL)
-		return (NULL);
-	map = uma_zalloc_arg(dmamap_zone, dmat, M_NOWAIT);
-	if (map != NULL)
-		map->slist = slist;
-	else
-		free(slist, M_BUSDMA);
-	return (map);
-}
-
-static __inline void
-_busdma_free_dmamap(bus_dmamap_t map)
-{
-
-	free(map->slist, M_BUSDMA);
-	uma_zfree(dmamap_zone, map);
-}
-
-/*
- * Allocate a device specific dma_tag.
- */
-#define SEG_NB 1024
-
-int
-bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
-    bus_addr_t boundary, bus_addr_t lowaddr,
-    bus_addr_t highaddr, bus_dma_filter_t *filter,
-    void *filterarg, bus_size_t maxsize, int nsegments,
-    bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
-    void *lockfuncarg, bus_dma_tag_t *dmat)
-{
-	bus_dma_tag_t newtag;
-	int error = 0;
-	/* Return a NULL tag on failure */
-	*dmat = NULL;
-	if (!parent)
-		parent = mips_root_dma_tag;
-
-	newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_BUSDMA, M_NOWAIT);
-	if (newtag == NULL) {
-		CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
-		    __func__, newtag, 0, error);
-		return (ENOMEM);
-	}
-
-	newtag->parent = parent;
-	newtag->alignment = alignment;
-	newtag->boundary = boundary;
-	newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
-	newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
-	newtag->filter = filter;
-	newtag->filterarg = filterarg;
-	newtag->maxsize = maxsize;
-	newtag->nsegments = nsegments;
-	newtag->maxsegsz = maxsegsz;
-	newtag->flags = flags;
-	if (cpuinfo.cache_coherent_dma)
-		newtag->flags |= BUS_DMA_COHERENT;
-	newtag->ref_count = 1; /* Count ourself */
-	newtag->map_count = 0;
-	if (lockfunc != NULL) {
-		newtag->lockfunc = lockfunc;
-		newtag->lockfuncarg = lockfuncarg;
-	} else {
-		newtag->lockfunc = dflt_lock;
-		newtag->lockfuncarg = NULL;
-	}
-	newtag->segments = NULL;
-
-	/*
-	 * Take into account any restrictions imposed by our parent tag
-	 */
-	if (parent != NULL) {
-		newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
-		newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
-		if (newtag->boundary == 0)
-			newtag->boundary = parent->boundary;
-		else if (parent->boundary != 0)
-			newtag->boundary =
-			    MIN(parent->boundary, newtag->boundary);
-		if ((newtag->filter != NULL) ||
-		    ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
-			newtag->flags |= BUS_DMA_COULD_BOUNCE;
-		if (newtag->filter == NULL) {
-			/*
-			* Short circuit looking at our parent directly
-			* since we have encapsulated all of its information
-			*/
-			newtag->filter = parent->filter;
-			newtag->filterarg = parent->filterarg;
-			newtag->parent = parent->parent;
-		}
-		if (newtag->parent != NULL)
-			atomic_add_int(&parent->ref_count, 1);
-	}
-	if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
-	 || newtag->alignment > 1)
-		newtag->flags |= BUS_DMA_COULD_BOUNCE;
-
-	if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
-	    (flags & BUS_DMA_ALLOCNOW) != 0) {
-		struct bounce_zone *bz;
-
-		/* Must bounce */
-
-		if ((error = alloc_bounce_zone(newtag)) != 0) {
-			free(newtag, M_BUSDMA);
-			return (error);
-		}
-		bz = newtag->bounce_zone;
-
-		if (ptoa(bz->total_bpages) < maxsize) {
-			int pages;
-
-			pages = atop(maxsize) - bz->total_bpages;
-
-			/* Add pages to our bounce pool */
-			if (alloc_bounce_pages(newtag, pages) < pages)
-				error = ENOMEM;
-		}
-		/* Performed initial allocation */
-		newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
-	} else
-		newtag->bounce_zone = NULL;
-	if (error != 0)
-		free(newtag, M_BUSDMA);
-	else
-		*dmat = newtag;
-	CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
-	    __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
-
-	return (error);
-}
-
-void
-bus_dma_template_clone(bus_dma_template_t *t, bus_dma_tag_t dmat)
-{
-
-	if (t == NULL || dmat == NULL)
-		return;
-
-	t->parent = dmat->parent;
-	t->alignment = dmat->alignment;
-	t->boundary = dmat->boundary;
-	t->lowaddr = dmat->lowaddr;
-	t->highaddr = dmat->highaddr;
-	t->maxsize = dmat->maxsize;
-	t->nsegments = dmat->nsegments;
-	t->maxsegsize = dmat->maxsegsz;
-	t->flags = dmat->flags;
-	t->lockfunc = dmat->lockfunc;
-	t->lockfuncarg = dmat->lockfuncarg;
-}
-
-int
-bus_dma_tag_set_domain(bus_dma_tag_t dmat, int domain)
-{
-
-	return (0);
-}
-
-int
-bus_dma_tag_destroy(bus_dma_tag_t dmat)
-{
-#ifdef KTR
-	bus_dma_tag_t dmat_copy = dmat;
-#endif
-
-	if (dmat != NULL) {
-		if (dmat->map_count != 0)
-			return (EBUSY);
-
-		while (dmat != NULL) {
-			bus_dma_tag_t parent;
-
-			parent = dmat->parent;
-			atomic_subtract_int(&dmat->ref_count, 1);
-			if (dmat->ref_count == 0) {
-				if (dmat->segments != NULL)
-					free(dmat->segments, M_BUSDMA);
-				free(dmat, M_BUSDMA);
-				/*
-				 * Last reference count, so
-				 * release our reference
-				 * count on our parent.
-				 */
-				dmat = parent;
-			} else
-				dmat = NULL;
-		}
-	}
-	CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
-
-	return (0);
-}
-
-#include <sys/kdb.h>
-/*
- * Allocate a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
-{
-	bus_dmamap_t newmap;
-	int error = 0;
-
-	if (dmat->segments == NULL) {
-		dmat->segments = (bus_dma_segment_t *)malloc(
-		    sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA,
-		    M_NOWAIT);
-		if (dmat->segments == NULL) {
-			CTR3(KTR_BUSDMA, "%s: tag %p error %d",
-			    __func__, dmat, ENOMEM);
-			return (ENOMEM);
-		}
-	}
-
-	newmap = _busdma_alloc_dmamap(dmat);
-	if (newmap == NULL) {
-		CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
-		return (ENOMEM);
-	}
-	*mapp = newmap;
-
-	/*
-	 * Bouncing might be required if the driver asks for an active
-	 * exclusion region, a data alignment that is stricter than 1, and/or
-	 * an active address boundary.
-	 */
-	if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
-		/* Must bounce */
-		struct bounce_zone *bz;
-		int maxpages;
-
-		if (dmat->bounce_zone == NULL) {
-			if ((error = alloc_bounce_zone(dmat)) != 0) {
-				_busdma_free_dmamap(newmap);
-				*mapp = NULL;
-				return (error);
-			}
-		}
-		bz = dmat->bounce_zone;
-
-		/* Initialize the new map */
-		STAILQ_INIT(&((*mapp)->bpages));
-
-		/*
-		 * Attempt to add pages to our pool on a per-instance
-		 * basis up to a sane limit.
-		 */
-		maxpages = MAX_BPAGES;
-		if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
-		 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
-			int pages;
-
-			pages = MAX(atop(dmat->maxsize), 1);
-			pages = MIN(maxpages - bz->total_bpages, pages);
-			pages = MAX(pages, 1);
-			if (alloc_bounce_pages(dmat, pages) < pages)
-				error = ENOMEM;
-
-			if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
-				if (error == 0)
-					dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
-			} else {
-				error = 0;
-			}
-		}
-		bz->map_count++;
-	}
-
-	CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
-	    __func__, dmat, dmat->flags, error);
-
-	return (0);
-}
-
-/*
- * Destroy a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
-
-	if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
-		CTR3(KTR_BUSDMA, "%s: tag %p error %d",
-		    __func__, dmat, EBUSY);
-		return (EBUSY);
-	}
-	if (dmat->bounce_zone)
-		dmat->bounce_zone->map_count--;
-	_busdma_free_dmamap(map);
-	CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
-        return (0);
-}
-
-/*
- * Allocate a piece of memory that can be efficiently mapped into
- * bus device space based on the constraints lited in the dma tag.
- * A dmamap to for use with dmamap_load is also allocated.
- */
-int
-bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddrp, int flags,
-    bus_dmamap_t *mapp)
-{
-	bus_dmamap_t newmap = NULL;
-	busdma_bufalloc_t ba;
-	struct busdma_bufzone *bufzone;
-	vm_memattr_t memattr;
-	void *vaddr;
-
-	int mflags;
-
-	if (flags & BUS_DMA_NOWAIT)
-		mflags = M_NOWAIT;
-	else
-		mflags = M_WAITOK;
-	if (dmat->segments == NULL) {
-		dmat->segments = (bus_dma_segment_t *)malloc(
-		    sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA,
-		    mflags);
-		if (dmat->segments == NULL) {
-			CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
-			    __func__, dmat, dmat->flags, ENOMEM);
-			return (ENOMEM);
-		}
-	}
-
-	newmap = _busdma_alloc_dmamap(dmat);
-	if (newmap == NULL) {
-		CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
-		    __func__, dmat, dmat->flags, ENOMEM);
-		return (ENOMEM);
-	}
-
-	/*
-	 * If all the memory is coherent with DMA then we don't need to
-	 * do anything special for a coherent mapping request.
-	 */
-	if (dmat->flags & BUS_DMA_COHERENT)
-	    flags &= ~BUS_DMA_COHERENT;
-
-	if (flags & BUS_DMA_COHERENT) {
-		memattr = VM_MEMATTR_UNCACHEABLE;
-		ba = coherent_allocator;
-		newmap->flags |= DMAMAP_UNCACHEABLE;
-	} else {
-		memattr = VM_MEMATTR_DEFAULT;
-		ba = standard_allocator;
-	}
-	/* All buffers we allocate are cache-aligned. */
-	newmap->flags |= DMAMAP_CACHE_ALIGNED;
-
-	if (flags & BUS_DMA_ZERO)
-		mflags |= M_ZERO;
-
-	/*
-	 * Try to find a bufzone in the allocator that holds a cache of buffers
-	 * of the right size for this request.  If the buffer is too big to be
-	 * held in the allocator cache, this returns NULL.
-	 */
-	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
-
-	/*
-	 * Allocate the buffer from the uma(9) allocator if...
-	 *  - It's small enough to be in the allocator (bufzone not NULL).
-	 *  - The alignment constraint isn't larger than the allocation size
-	 *    (the allocator aligns buffers to their size boundaries).
-	 *  - There's no need to handle lowaddr/highaddr exclusion zones.
-	 * else allocate non-contiguous pages if...
-	 *  - The page count that could get allocated doesn't exceed
-	 *    nsegments also when the maximum segment size is less
-	 *    than PAGE_SIZE.
-	 *  - The alignment constraint isn't larger than a page boundary.
-	 *  - There are no boundary-crossing constraints.
-	 * else allocate a block of contiguous pages because one or more of the
-	 * constraints is something that only the contig allocator can fulfill.
-	 */
-	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
-	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
-		vaddr = uma_zalloc(bufzone->umazone, mflags);
-	} else if (dmat->nsegments >=
-	    howmany(dmat->maxsize, MIN(dmat->maxsegsz, PAGE_SIZE)) &&
-	    dmat->alignment <= PAGE_SIZE &&
-	    (dmat->boundary % PAGE_SIZE) == 0) {
-		vaddr = (void *)kmem_alloc_attr(dmat->maxsize, mflags, 0,
-		    dmat->lowaddr, memattr);
-	} else {
-		vaddr = (void *)kmem_alloc_contig(dmat->maxsize, mflags, 0,
-		    dmat->lowaddr, dmat->alignment, dmat->boundary, memattr);
-	}
-	if (vaddr == NULL) {
-		_busdma_free_dmamap(newmap);
-		newmap = NULL;
-	} else {
-		newmap->sync_count = 0;
-	}
-	*vaddrp = vaddr;
-	*mapp = newmap;
-
-	return (vaddr == NULL ? ENOMEM : 0);
-}
-
-/*
- * Free a piece of memory and it's allocated dmamap, that was allocated
- * via bus_dmamem_alloc.  Make the same choice for free/contigfree.
- */
-void
-bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
-{
-	struct busdma_bufzone *bufzone;
-	busdma_bufalloc_t ba;
-
-	if (map->flags & DMAMAP_UNCACHEABLE)
-		ba = coherent_allocator;
-	else
-		ba = standard_allocator;
-
-	free(map->slist, M_BUSDMA);
-	uma_zfree(dmamap_zone, map);
-
-	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
-
-	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
-	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
-		uma_zfree(bufzone->umazone, vaddr);
-	else
-		kmem_free((vm_offset_t)vaddr, dmat->maxsize);
-	CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
-}
-
-static void
-_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
-    bus_size_t buflen, int flags)
-{
-	bus_addr_t curaddr;
-	bus_size_t sgsize;
-
-	if (map->pagesneeded == 0) {
-		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
-		    dmat->lowaddr, dmat->boundary, dmat->alignment);
-		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
-		    map, map->pagesneeded);
-		/*
-		 * Count the number of bounce pages
-		 * needed in order to complete this transfer
-		 */
-		curaddr = buf;
-		while (buflen != 0) {
-			sgsize = MIN(buflen, dmat->maxsegsz);
-			if (run_filter(dmat, curaddr) != 0) {
-				sgsize = MIN(sgsize, PAGE_SIZE);
-				map->pagesneeded++;
-			}
-			curaddr += sgsize;
-			buflen -= sgsize;
-		}
-		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
-	}
-}
-
-static void
-_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
-    void *buf, bus_size_t buflen, int flags)
-{
-	vm_offset_t vaddr;
-	vm_offset_t vendaddr;
-	bus_addr_t paddr;
-
-	if (map->pagesneeded == 0) {
-		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
-		    dmat->lowaddr, dmat->boundary, dmat->alignment);
-		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
-		    map, map->pagesneeded);
-		/*
-		 * Count the number of bounce pages
-		 * needed in order to complete this transfer
-		 */
-		vaddr = (vm_offset_t)buf;
-		vendaddr = (vm_offset_t)buf + buflen;
-
-		while (vaddr < vendaddr) {
-			bus_size_t sg_len;
-
-			KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap"));
-			sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK);
-			paddr = pmap_kextract(vaddr);
-			if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
-			    run_filter(dmat, paddr) != 0) {
-				sg_len = roundup2(sg_len, dmat->alignment);
-				map->pagesneeded++;
-			}
-			vaddr += sg_len;
-		}
-		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
-	}
-}
-
-static int
-_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,int flags)
-{
-
-	/* Reserve Necessary Bounce Pages */
-	mtx_lock(&bounce_lock);
-	if (flags & BUS_DMA_NOWAIT) {
-		if (reserve_bounce_pages(dmat, map, 0) != 0) {
-			mtx_unlock(&bounce_lock);
-			return (ENOMEM);
-		}
-	} else {
-		if (reserve_bounce_pages(dmat, map, 1) != 0) {
-			/* Queue us for resources */
-			STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
-			    map, links);
-			mtx_unlock(&bounce_lock);
-			return (EINPROGRESS);
-		}
-	}
-	mtx_unlock(&bounce_lock);
-
-	return (0);
-}
-
-/*
- * Add a single contiguous physical range to the segment list.
- */
-static int
-_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
-    bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
-{
-	bus_addr_t baddr, bmask;
-	int seg;
-
-	/*
-	 * Make sure we don't cross any boundaries.
-	 */
-	bmask = ~(dmat->boundary - 1);
-	if (dmat->boundary > 0) {
-		baddr = (curaddr + dmat->boundary) & bmask;
-		if (sgsize > (baddr - curaddr))
-			sgsize = (baddr - curaddr);
-	}
-	/*
-	 * Insert chunk into a segment, coalescing with
-	 * the previous segment if possible.
-	 */
-	seg = *segp;
-	if (seg >= 0 &&
-	    curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
-	    (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
-	    (dmat->boundary == 0 ||
-	     (segs[seg].ds_addr & bmask) == (curaddr & bmask))) {
-		segs[seg].ds_len += sgsize;
-	} else {
-		if (++seg >= dmat->nsegments)
-			return (0);
-		segs[seg].ds_addr = curaddr;
-		segs[seg].ds_len = sgsize;
-	}
-	*segp = seg;
-	return (sgsize);
-}
-
-/*
- * Utility function to load a physical buffer.  segp contains
- * the starting segment on entrace, and the ending segment on exit.
- */
-int
-_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
-    vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
-    int *segp)
-{
-	bus_addr_t curaddr;
-	bus_size_t sgsize;
-	int error;
-
-	if (segs == NULL)
-		segs = dmat->segments;
-
-	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
-		_bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
-		if (map->pagesneeded != 0) {
-			error = _bus_dmamap_reserve_pages(dmat, map, flags);
-			if (error)
-				return (error);
-		}
-	}
-
-	while (buflen > 0) {
-		curaddr = buf;
-		sgsize = MIN(buflen, dmat->maxsegsz);
-		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
-		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
-			sgsize = MIN(sgsize, PAGE_SIZE);
-			curaddr = add_bounce_page(dmat, map, 0, curaddr,
-			    sgsize);
-		}
-		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
-		    segp);
-		if (sgsize == 0)
-			break;
-		buf += sgsize;
-		buflen -= sgsize;
-	}
-
-	/*
-	 * Did we fit?
-	 */
-	if (buflen != 0) {
-		bus_dmamap_unload(dmat, map);
-		return (EFBIG); /* XXX better return value here? */
-	}
-	return (0);
-}
-
-int
-_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map,
-    struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
-    bus_dma_segment_t *segs, int *segp)
-{
-
-	return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags,
-	    segs, segp));
-}
-
-/*
- * Utility function to load a linear buffer.  segp contains
- * the starting segment on entrance, and the ending segment on exit.
- * first indicates if this is the first invocation of this function.
- */
-int
-_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
-    bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs,
-    int *segp)
-{
-	bus_size_t sgsize;
-	bus_addr_t curaddr;
-	struct sync_list *sl;
-	vm_offset_t vaddr = (vm_offset_t)buf;
-	int error = 0;
-
-	if (segs == NULL)
-		segs = dmat->segments;
-	if ((flags & BUS_DMA_LOAD_MBUF) != 0)
-		map->flags |= DMAMAP_CACHE_ALIGNED;
-
-	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
-		_bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
-		if (map->pagesneeded != 0) {
-			error = _bus_dmamap_reserve_pages(dmat, map, flags);
-			if (error)
-				return (error);
-		}
-	}
-	CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
-	    "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
-
-	while (buflen > 0) {
-		/*
-		 * Get the physical address for this segment.
-		 *
-		 * XXX Don't support checking for coherent mappings
-		 * XXX in user address space.
-		 */
-		KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap"));
-		curaddr = pmap_kextract(vaddr);
-
-		/*
-		 * Compute the segment size, and adjust counts.
-		 */
-		sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
-		if (sgsize > dmat->maxsegsz)
-			sgsize = dmat->maxsegsz;
-		if (buflen < sgsize)
-			sgsize = buflen;
-
-		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
-		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
-			curaddr = add_bounce_page(dmat, map, vaddr, curaddr,
-			    sgsize);
-		} else {
-			sl = &map->slist[map->sync_count - 1];
-			if (map->sync_count == 0 ||
-			    vaddr != sl->vaddr + sl->datacount) {
-				if (++map->sync_count > dmat->nsegments)
-					goto cleanup;
-				sl++;
-				sl->vaddr = vaddr;
-				sl->datacount = sgsize;
-				sl->busaddr = curaddr;
-			} else
-				sl->datacount += sgsize;
-		}
-		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
-		    segp);
-		if (sgsize == 0)
-			break;
-		vaddr += sgsize;
-		buflen -= sgsize;
-	}
-
-cleanup:
-	/*
-	 * Did we fit?
-	 */
-	if (buflen != 0) {
-		bus_dmamap_unload(dmat, map);
-		error = EFBIG; /* XXX better return value here? */
-	}
-	return (error);
-}
-
-void
-_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
-    struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
-{
-
-	KASSERT(dmat != NULL, ("dmatag is NULL"));
-	KASSERT(map != NULL, ("dmamap is NULL"));
-	map->mem = *mem;
-	map->callback = callback;
-	map->callback_arg = callback_arg;
-}
-
-bus_dma_segment_t *
-_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
-    bus_dma_segment_t *segs, int nsegs, int error)
-{
-
-	if (segs == NULL)
-		segs = dmat->segments;
-	return (segs);
-}
-
-/*
- * Release the mapping held by map.
- */
-void
-bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
-	struct bounce_page *bpage;
-
-	while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
-		STAILQ_REMOVE_HEAD(&map->bpages, links);
-		free_bounce_page(dmat, bpage);
-	}
-	map->sync_count = 0;
-	return;
-}
-
-static void
-bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op, int aligned)
-{
-	char tmp_cl[mips_dcache_max_linesize], tmp_clend[mips_dcache_max_linesize];
-	vm_offset_t buf_cl, buf_clend;
-	vm_size_t size_cl, size_clend;
-	int cache_linesize_mask = mips_dcache_max_linesize - 1;
-
-	/*
-	 * dcache invalidation operates on cache line aligned addresses
-	 * and could modify areas of memory that share the same cache line
-	 * at the beginning and the ending of the buffer. In order to
-	 * prevent a data loss we save these chunks in temporary buffer
-	 * before invalidation and restore them afer it.
-	 *
-	 * If the aligned flag is set the buffer is either an mbuf or came from
-	 * our allocator caches.  In both cases they are always sized and
-	 * aligned to cacheline boundaries, so we can skip preserving nearby
-	 * data if a transfer appears to overlap cachelines.  An mbuf in
-	 * particular will usually appear to be overlapped because of offsetting
-	 * within the buffer to align the L3 headers, but we know that the bytes
-	 * preceeding that offset are part of the same mbuf memory and are not
-	 * unrelated adjacent data (and a rule of mbuf handling is that the cpu
-	 * is not allowed to touch the mbuf while dma is in progress, including
-	 * header fields).
-	 */
-	if (aligned) {
-		size_cl = 0;
-		size_clend = 0;
-	} else {
-		buf_cl = buf & ~cache_linesize_mask;
-		size_cl = buf & cache_linesize_mask;
-		buf_clend = buf + len;
-		size_clend = (mips_dcache_max_linesize -
-		    (buf_clend & cache_linesize_mask)) & cache_linesize_mask;
-	}
-
-	switch (op) {
-	case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
-	case BUS_DMASYNC_POSTREAD:
-
-		/*
-		 * Save buffers that might be modified by invalidation
-		 */
-		if (size_cl)
-			memcpy (tmp_cl, (void*)buf_cl, size_cl);
-		if (size_clend)
-			memcpy (tmp_clend, (void*)buf_clend, size_clend);
-		mips_dcache_inv_range(buf, len);
-		/*
-		 * Restore them
-		 */
-		if (size_cl)
-			memcpy ((void*)buf_cl, tmp_cl, size_cl);
-		if (size_clend)
-			memcpy ((void*)buf_clend, tmp_clend, size_clend);
-		/*
-		 * Copies above have brought corresponding memory
-		 * cache lines back into dirty state. Write them back
-		 * out and invalidate affected cache lines again if
-		 * necessary.
-		 */
-		if (size_cl)
-			mips_dcache_wbinv_range(buf_cl, size_cl);
-		if (size_clend && (size_cl == 0 ||
-                    buf_clend - buf_cl > mips_dcache_max_linesize))
-			mips_dcache_wbinv_range(buf_clend, size_clend);
-		break;
-
-	case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
-		mips_dcache_wbinv_range(buf, len);
-		break;
-
-	case BUS_DMASYNC_PREREAD:
-		/*
-		 * Save buffers that might be modified by invalidation
-		 */
-		if (size_cl)
-			memcpy (tmp_cl, (void *)buf_cl, size_cl);
-		if (size_clend)
-			memcpy (tmp_clend, (void *)buf_clend, size_clend);
-		mips_dcache_inv_range(buf, len);
-		/*
-		 * Restore them
-		 */
-		if (size_cl)
-			memcpy ((void *)buf_cl, tmp_cl, size_cl);
-		if (size_clend)
-			memcpy ((void *)buf_clend, tmp_clend, size_clend);
-		/*
-		 * Copies above have brought corresponding memory
-		 * cache lines back into dirty state. Write them back
-		 * out and invalidate affected cache lines again if
-		 * necessary.
-		 */
-		if (size_cl)
-			mips_dcache_wbinv_range(buf_cl, size_cl);
-		if (size_clend && (size_cl == 0 ||
-                    buf_clend - buf_cl > mips_dcache_max_linesize))
-			mips_dcache_wbinv_range(buf_clend, size_clend);
-		break;
-
-	case BUS_DMASYNC_PREWRITE:
-#ifdef BUS_DMA_FORCE_WBINV
-		mips_dcache_wbinv_range(buf, len);
-#else
-		mips_dcache_wb_range(buf, len);
-#endif
-		break;
-	}
-}
-
-static void
-_bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
-{
-	struct bounce_page *bpage;
-
-	STAILQ_FOREACH(bpage, &map->bpages, links) {
-		if (op & BUS_DMASYNC_PREWRITE) {
-			if (bpage->datavaddr != 0)
-				bcopy((void *)bpage->datavaddr,
-				    (void *)(bpage->vaddr_nocache != 0 ?
-					     bpage->vaddr_nocache :
-					     bpage->vaddr),
-				    bpage->datacount);
-			else
-				physcopyout(bpage->dataaddr,
-				    (void *)(bpage->vaddr_nocache != 0 ?
-					     bpage->vaddr_nocache :
-					     bpage->vaddr),
-				    bpage->datacount);
-			if (bpage->vaddr_nocache == 0) {
-#ifdef BUS_DMA_FORCE_WBINV
-				mips_dcache_wbinv_range(bpage->vaddr,
-				    bpage->datacount);
-#else
-				mips_dcache_wb_range(bpage->vaddr,
-				    bpage->datacount);
-#endif
-			}
-			dmat->bounce_zone->total_bounced++;
-		}
-		if (op & BUS_DMASYNC_POSTREAD) {
-			if (bpage->vaddr_nocache == 0) {
-				mips_dcache_inv_range(bpage->vaddr,
-				    bpage->datacount);
-			}
-			if (bpage->datavaddr != 0)
-				bcopy((void *)(bpage->vaddr_nocache != 0 ?
-				    bpage->vaddr_nocache : bpage->vaddr),
-				    (void *)bpage->datavaddr, bpage->datacount);
-			else
-				physcopyin((void *)(bpage->vaddr_nocache != 0 ?
-				    bpage->vaddr_nocache : bpage->vaddr),
-				    bpage->dataaddr, bpage->datacount);
-			dmat->bounce_zone->total_bounced++;
-		}
-	}
-}
-
-void
-bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
-{
-	struct sync_list *sl, *end;
-	int aligned;
-
-	if (op == BUS_DMASYNC_POSTWRITE)
-		return;
-	if (STAILQ_FIRST(&map->bpages))
-		_bus_dmamap_sync_bp(dmat, map, op);
-
-	if ((dmat->flags & BUS_DMA_COHERENT) ||
-	    (map->flags & DMAMAP_UNCACHEABLE)) {
-		if (op & BUS_DMASYNC_PREWRITE)
-			mips_sync();
-		return;
-	}
-
-	aligned = (map->flags & DMAMAP_CACHE_ALIGNED) ? 1 : 0;
-
-	CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
-	if (map->sync_count) {
-		end = &map->slist[map->sync_count];
-		for (sl = &map->slist[0]; sl != end; sl++)
-			bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op,
-			    aligned);
-	}
-}
-
-static void
-init_bounce_pages(void *dummy __unused)
-{
-
-	total_bpages = 0;
-	STAILQ_INIT(&bounce_zone_list);
-	STAILQ_INIT(&bounce_map_waitinglist);
-	STAILQ_INIT(&bounce_map_callbacklist);
-	mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
-}
-SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
-
-static struct sysctl_ctx_list *
-busdma_sysctl_tree(struct bounce_zone *bz)
-{
-	return (&bz->sysctl_tree);
-}
-
-static struct sysctl_oid *
-busdma_sysctl_tree_top(struct bounce_zone *bz)
-{
-	return (bz->sysctl_tree_top);
-}
-
-static int
-alloc_bounce_zone(bus_dma_tag_t dmat)
-{
-	struct bounce_zone *bz;
-
-	/* Check to see if we already have a suitable zone */
-	STAILQ_FOREACH(bz, &bounce_zone_list, links) {
-		if ((dmat->alignment <= bz->alignment)
-		 && (dmat->lowaddr >= bz->lowaddr)) {
-			dmat->bounce_zone = bz;
-			return (0);
-		}
-	}
-
-	if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_BUSDMA,
-	    M_NOWAIT | M_ZERO)) == NULL)
-		return (ENOMEM);
-
-	STAILQ_INIT(&bz->bounce_page_list);
-	bz->free_bpages = 0;
-	bz->reserved_bpages = 0;
-	bz->active_bpages = 0;
-	bz->lowaddr = dmat->lowaddr;
-	bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
-	bz->map_count = 0;
-	snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
-	busdma_zonecount++;
-	snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
-	STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
-	dmat->bounce_zone = bz;
-
-	sysctl_ctx_init(&bz->sysctl_tree);
-	bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
-	    SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
-	    CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "");
-	if (bz->sysctl_tree_top == NULL) {
-		sysctl_ctx_free(&bz->sysctl_tree);
-		return (0);	/* XXX error code? */
-	}
-
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
-	    "Total bounce pages");
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
-	    "Free bounce pages");
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
-	    "Reserved bounce pages");
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
-	    "Active bounce pages");
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
-	    "Total bounce requests");
-	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
-	    "Total bounce requests that were deferred");
-	SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
-	SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz),
-	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
-	    "alignment", CTLFLAG_RD, &bz->alignment, "");
-
-	return (0);
-}
-
-static int
-alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
-{
-	struct bounce_zone *bz;
-	int count;
-
-	bz = dmat->bounce_zone;
-	count = 0;
-	while (numpages > 0) {
-		struct bounce_page *bpage;
-
-		bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_BUSDMA,
-						     M_NOWAIT | M_ZERO);
-
-		if (bpage == NULL)
-			break;
-		bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_BOUNCE,
-							 M_NOWAIT, 0ul,
-							 bz->lowaddr,
-							 PAGE_SIZE,
-							 0);
-		if (bpage->vaddr == 0) {
-			free(bpage, M_BUSDMA);
-			break;
-		}
-		bpage->busaddr = pmap_kextract(bpage->vaddr);
-		bpage->vaddr_nocache =
-		    (vm_offset_t)pmap_mapdev(bpage->busaddr, PAGE_SIZE);
-		mtx_lock(&bounce_lock);
-		STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
-		total_bpages++;
-		bz->total_bpages++;
-		bz->free_bpages++;
-		mtx_unlock(&bounce_lock);
-		count++;
-		numpages--;
-	}
-	return (count);
-}
-
-static int
-reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
-{
-	struct bounce_zone *bz;
-	int pages;
-
-	mtx_assert(&bounce_lock, MA_OWNED);
-	bz = dmat->bounce_zone;
-	pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
-	if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
-		return (map->pagesneeded - (map->pagesreserved + pages));
-	bz->free_bpages -= pages;
-	bz->reserved_bpages += pages;
-	map->pagesreserved += pages;
-	pages = map->pagesneeded - map->pagesreserved;
-
-	return (pages);
-}
-
-static bus_addr_t
-add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
-		bus_addr_t addr, bus_size_t size)
-{
-	struct bounce_zone *bz;
-	struct bounce_page *bpage;
-
-	KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
-	KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
-
-	bz = dmat->bounce_zone;
-	if (map->pagesneeded == 0)
-		panic("add_bounce_page: map doesn't need any pages");
-	map->pagesneeded--;
-
-	if (map->pagesreserved == 0)
-		panic("add_bounce_page: map doesn't need any pages");
-	map->pagesreserved--;
-
-	mtx_lock(&bounce_lock);
-	bpage = STAILQ_FIRST(&bz->bounce_page_list);
-	if (bpage == NULL)
-		panic("add_bounce_page: free page list is empty");
-
-	STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
-	bz->reserved_bpages--;
-	bz->active_bpages++;
-	mtx_unlock(&bounce_lock);
-
-	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
-		/* Page offset needs to be preserved. */
-		bpage->vaddr |= addr & PAGE_MASK;
-		bpage->busaddr |= addr & PAGE_MASK;
-	}
-	bpage->datavaddr = vaddr;
-	bpage->dataaddr = addr;
-	bpage->datacount = size;
-	STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
-	return (bpage->busaddr);
-}
-
-static void
-free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
-{
-	struct bus_dmamap *map;
-	struct bounce_zone *bz;
-	bool schedule_swi;
-
-	bz = dmat->bounce_zone;
-	bpage->datavaddr = 0;
-	bpage->datacount = 0;
-	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
-		/*
-		 * Reset the bounce page to start at offset 0.  Other uses
-		 * of this bounce page may need to store a full page of
-		 * data and/or assume it starts on a page boundary.
-		 */
-		bpage->vaddr &= ~PAGE_MASK;
-		bpage->busaddr &= ~PAGE_MASK;
-	}
-
-	schedule_swi = false;
-	mtx_lock(&bounce_lock);
-	STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
-	bz->free_bpages++;
-	bz->active_bpages--;
-	if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
-		if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
-			STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
-			STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
-					   map, links);
-			bz->total_deferred++;
-			schedule_swi = true;
-		}
-	}
-	mtx_unlock(&bounce_lock);
-	if (schedule_swi)
-		swi_sched(busdma_ih, 0);
-}
-
-static void
-busdma_swi(void *dummy __unused)
-{
-	bus_dma_tag_t dmat;
-	struct bus_dmamap *map;
-
-	mtx_lock(&bounce_lock);
-	while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
-		STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
-		mtx_unlock(&bounce_lock);
-		dmat = map->dmat;
-		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
-		bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback,
-		    map->callback_arg, BUS_DMA_WAITOK);
-		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
-		mtx_lock(&bounce_lock);
-	}
-	mtx_unlock(&bounce_lock);
-}
-
-static void
-start_busdma_swi(void *dummy __unused)
-{
-	if (swi_add(NULL, "busdma", busdma_swi, NULL, SWI_BUSDMA, INTR_MPSAFE,
-	    &busdma_ih))
-		panic("died while creating busdma swi ithread");
-}
-SYSINIT(start_busdma_swi, SI_SUB_SOFTINTR, SI_ORDER_ANY, start_busdma_swi,
-    NULL);
diff --git a/sys/mips/mips/cache.c b/sys/mips/mips/cache.c
deleted file mode 100644
index 210462e5574b..000000000000
--- a/sys/mips/mips/cache.c
+++ /dev/null
@@ -1,333 +0,0 @@
-/*      $NetBSD: cache.c,v 1.33 2005/12/24 23:24:01 perry Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
- *
- * Copyright 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright 2000, 2001
- * Broadcom Corporation. All rights reserved.
- * 
- * This software is furnished under license and may be used and copied only
- * in accordance with the following terms and conditions.  Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * modified or unmodified copies of this software in source and/or binary
- * form. No title or ownership is transferred hereby.
- * 
- * 1) Any source code used, modified or distributed must reproduce and
- *    retain this copyright notice and list of conditions as they appear in
- *    the source file.
- * 
- * 2) No right is granted to use any trade name, trademark, or logo of
- *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
- *    used to endorse or promote products derived from this software
- *    without the prior written permission of Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
- *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
- *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
- *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
- *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
- *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <machine/cpuinfo.h>
-#include <machine/cache.h>
-
-struct mips_cache_ops mips_cache_ops;
-
-#if defined(MIPS_DISABLE_L1_CACHE) || defined(CPU_RMI) || defined(CPU_NLM)
-static void
-cache_noop(vm_offset_t va, vm_size_t size)
-{
-}
-#endif
-
-void
-mips_config_cache(struct mips_cpuinfo * cpuinfo)
-{
-
-	switch (cpuinfo->l1.ic_linesize) {
-	case 16:
-		mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_16;
-		mips_cache_ops.mco_icache_sync_range =
-		    mipsNN_icache_sync_range_16;
-		mips_cache_ops.mco_icache_sync_range_index =
-		    mipsNN_icache_sync_range_index_16;
-		break;
-	case 32:
-		mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_32;
-		mips_cache_ops.mco_icache_sync_range =
-		    mipsNN_icache_sync_range_32;
-		mips_cache_ops.mco_icache_sync_range_index =
-		    mipsNN_icache_sync_range_index_32;
-		break;
-	case 64:
-		mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_64;
-		mips_cache_ops.mco_icache_sync_range =
-		    mipsNN_icache_sync_range_64;
-		mips_cache_ops.mco_icache_sync_range_index =
-		    mipsNN_icache_sync_range_index_64;
-		break;
-	case 128:
-		mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_128;
-		mips_cache_ops.mco_icache_sync_range =
-		    mipsNN_icache_sync_range_128;
-		mips_cache_ops.mco_icache_sync_range_index =
-		    mipsNN_icache_sync_range_index_128;
-		break;
-
-#ifdef MIPS_DISABLE_L1_CACHE
-	case 0:
-		mips_cache_ops.mco_icache_sync_all = (void (*)(void))cache_noop;
-		mips_cache_ops.mco_icache_sync_range = cache_noop;
-		mips_cache_ops.mco_icache_sync_range_index = cache_noop;
-		break;
-#endif
-	default:
-		panic("no Icache ops for %d byte lines",
-		    cpuinfo->l1.ic_linesize);
-	}
-
-	switch (cpuinfo->l1.dc_linesize) {
-	case 16:
-		mips_cache_ops.mco_pdcache_wbinv_all =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    mipsNN_pdcache_wbinv_all_16;
-		mips_cache_ops.mco_pdcache_wbinv_range =
-		    mipsNN_pdcache_wbinv_range_16;
-		mips_cache_ops.mco_pdcache_wbinv_range_index =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    mipsNN_pdcache_wbinv_range_index_16;
-		mips_cache_ops.mco_pdcache_inv_range =
-		    mipsNN_pdcache_inv_range_16;
-		mips_cache_ops.mco_pdcache_wb_range =
-		    mips_cache_ops.mco_intern_pdcache_wb_range =
-		    mipsNN_pdcache_wb_range_16;
-		break;
-	case 32:
-		mips_cache_ops.mco_pdcache_wbinv_all =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    mipsNN_pdcache_wbinv_all_32;
-#if defined(CPU_RMI) || defined(CPU_NLM)
-		mips_cache_ops.mco_pdcache_wbinv_range = cache_noop;
-#else
-		mips_cache_ops.mco_pdcache_wbinv_range =
-		    mipsNN_pdcache_wbinv_range_32;
-#endif
-#if defined(CPU_RMI) || defined(CPU_NLM)
-		mips_cache_ops.mco_pdcache_wbinv_range_index =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_range_index = cache_noop;
-		mips_cache_ops.mco_pdcache_inv_range = cache_noop;
-#else
-		mips_cache_ops.mco_pdcache_wbinv_range_index =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    mipsNN_pdcache_wbinv_range_index_32;
-		mips_cache_ops.mco_pdcache_inv_range =
-		    mipsNN_pdcache_inv_range_32;
-#endif
-#if defined(CPU_RMI) || defined(CPU_NLM)
-		mips_cache_ops.mco_pdcache_wb_range =
-		    mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop;
-#else
-		mips_cache_ops.mco_pdcache_wb_range =
-		    mips_cache_ops.mco_intern_pdcache_wb_range =
-		    mipsNN_pdcache_wb_range_32;
-#endif
-		break;
-	case 64:
-		mips_cache_ops.mco_pdcache_wbinv_all =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    mipsNN_pdcache_wbinv_all_64;
-		mips_cache_ops.mco_pdcache_wbinv_range =
-		    mipsNN_pdcache_wbinv_range_64;
-		mips_cache_ops.mco_pdcache_wbinv_range_index =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    mipsNN_pdcache_wbinv_range_index_64;
-		mips_cache_ops.mco_pdcache_inv_range =
-		    mipsNN_pdcache_inv_range_64;
-		mips_cache_ops.mco_pdcache_wb_range =
-		    mips_cache_ops.mco_intern_pdcache_wb_range =
-		    mipsNN_pdcache_wb_range_64;
-		break;
-	case 128:
-		mips_cache_ops.mco_pdcache_wbinv_all =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    mipsNN_pdcache_wbinv_all_128;
-		mips_cache_ops.mco_pdcache_wbinv_range =
-		    mipsNN_pdcache_wbinv_range_128;
-		mips_cache_ops.mco_pdcache_wbinv_range_index =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    mipsNN_pdcache_wbinv_range_index_128;
-		mips_cache_ops.mco_pdcache_inv_range =
-		    mipsNN_pdcache_inv_range_128;
-		mips_cache_ops.mco_pdcache_wb_range =
-		    mips_cache_ops.mco_intern_pdcache_wb_range =
-		    mipsNN_pdcache_wb_range_128;
-		break;
-#ifdef MIPS_DISABLE_L1_CACHE
-	case 0:
-		mips_cache_ops.mco_pdcache_wbinv_all =
-		    mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    (void (*)(void))cache_noop;
-		mips_cache_ops.mco_pdcache_wbinv_range = cache_noop;
-		mips_cache_ops.mco_pdcache_wbinv_range_index = cache_noop;
-		mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    cache_noop;
-		mips_cache_ops.mco_pdcache_inv_range = cache_noop;
-		mips_cache_ops.mco_pdcache_wb_range = cache_noop;
-		mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop;
-		break;
-#endif
-	default:
-		panic("no Dcache ops for %d byte lines",
-		    cpuinfo->l1.dc_linesize);
-	}
-
-	mipsNN_cache_init(cpuinfo);
-
-#if 0
-	if (mips_cpu_flags &
-	    (CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_I_D_CACHE_COHERENT)) {
-#ifdef CACHE_DEBUG
-		printf("  Dcache is coherent\n");
-#endif
-		mips_cache_ops.mco_pdcache_wbinv_all = 
-		    (void (*)(void))cache_noop;
-		mips_cache_ops.mco_pdcache_wbinv_range = cache_noop;
-		mips_cache_ops.mco_pdcache_wbinv_range_index = cache_noop;
-		mips_cache_ops.mco_pdcache_inv_range = cache_noop;
-		mips_cache_ops.mco_pdcache_wb_range = cache_noop;
-	}
-	if (mips_cpu_flags & CPU_MIPS_I_D_CACHE_COHERENT) {
-#ifdef CACHE_DEBUG
-		printf("  Icache is coherent against Dcache\n");
-#endif
-		mips_cache_ops.mco_intern_pdcache_wbinv_all =
-		    (void (*)(void))cache_noop;
-		mips_cache_ops.mco_intern_pdcache_wbinv_range_index =
-		    cache_noop;
-		mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop;
-	}
-#endif
-
-	/* Check that all cache ops are set up. */
-	/* must have primary Icache */
-	if (cpuinfo->l1.ic_size) {   
-		
-		if (!mips_cache_ops.mco_icache_sync_all)
-			panic("no icache_sync_all cache op");
-		if (!mips_cache_ops.mco_icache_sync_range)
-			panic("no icache_sync_range cache op");
-		if (!mips_cache_ops.mco_icache_sync_range_index)
-			panic("no icache_sync_range_index cache op");
-	}
-	/* must have primary Dcache */
-	if (cpuinfo->l1.dc_size) {
-		if (!mips_cache_ops.mco_pdcache_wbinv_all)
-			panic("no pdcache_wbinv_all");
-		if (!mips_cache_ops.mco_pdcache_wbinv_range)
-			panic("no pdcache_wbinv_range");
-		if (!mips_cache_ops.mco_pdcache_wbinv_range_index)
-			panic("no pdcache_wbinv_range_index");
-		if (!mips_cache_ops.mco_pdcache_inv_range)
-			panic("no pdcache_inv_range");
-		if (!mips_cache_ops.mco_pdcache_wb_range)
-			panic("no pdcache_wb_range");
-	}
-
-	/* L2 data cache */
-	if (!cpuinfo->l2.dc_size) {
-		/* No L2 found, ignore */
-		return;
-	}
-
-	switch (cpuinfo->l2.dc_linesize) {
-	case 32:
-		mips_cache_ops.mco_sdcache_wbinv_all =
-			mipsNN_sdcache_wbinv_all_32;
-		mips_cache_ops.mco_sdcache_wbinv_range =
-			mipsNN_sdcache_wbinv_range_32;
-		mips_cache_ops.mco_sdcache_wbinv_range_index =
-			mipsNN_sdcache_wbinv_range_index_32;
-		mips_cache_ops.mco_sdcache_inv_range =
-			mipsNN_sdcache_inv_range_32;
-		mips_cache_ops.mco_sdcache_wb_range =
-			mipsNN_sdcache_wb_range_32;
-		break;
-	case 64:
-		mips_cache_ops.mco_sdcache_wbinv_all =
-			mipsNN_sdcache_wbinv_all_64;
-		mips_cache_ops.mco_sdcache_wbinv_range =
-			mipsNN_sdcache_wbinv_range_64;
-		mips_cache_ops.mco_sdcache_wbinv_range_index =
-			mipsNN_sdcache_wbinv_range_index_64;
-		mips_cache_ops.mco_sdcache_inv_range =
-			mipsNN_sdcache_inv_range_64;
-		mips_cache_ops.mco_sdcache_wb_range =
-			mipsNN_sdcache_wb_range_64;
-		break;
-	case 128:
-		mips_cache_ops.mco_sdcache_wbinv_all =
-			mipsNN_sdcache_wbinv_all_128;
-		mips_cache_ops.mco_sdcache_wbinv_range =
-			mipsNN_sdcache_wbinv_range_128;
-		mips_cache_ops.mco_sdcache_wbinv_range_index =
-			mipsNN_sdcache_wbinv_range_index_128;
-		mips_cache_ops.mco_sdcache_inv_range =
-			mipsNN_sdcache_inv_range_128;
-		mips_cache_ops.mco_sdcache_wb_range =
-			mipsNN_sdcache_wb_range_128;
-		break;
-	default:
-#ifdef CACHE_DEBUG
-		printf("  no sdcache ops for %d byte lines",
-		    cpuinfo->l2.dc_linesize);
-#endif
-		break;
-	}
-}
diff --git a/sys/mips/mips/cache_mipsNN.c b/sys/mips/mips/cache_mipsNN.c
deleted file mode 100644
index 2f924ed5c3c7..000000000000
--- a/sys/mips/mips/cache_mipsNN.c
+++ /dev/null
@@ -1,1381 +0,0 @@
-/*	$NetBSD: cache_mipsNN.c,v 1.10 2005/12/24 20:07:19 perry Exp $	*/
-
-/*
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed for the NetBSD Project by
- *	Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/param.h>
-
-#include <machine/cache.h>
-#include <machine/cache_r4k.h>
-#include <machine/cpuinfo.h>
-
-#define	round_line16(x)		(((x) + 15) & ~15)
-#define	trunc_line16(x)		((x) & ~15)
-
-#define	round_line32(x)		(((x) + 31) & ~31)
-#define	trunc_line32(x)		((x) & ~31)
-
-#define	round_line64(x)		(((x) + 63) & ~63)
-#define	trunc_line64(x)		((x) & ~63)
-
-#define	round_line128(x)	(((x) + 127) & ~127)
-#define	trunc_line128(x)	((x) & ~127)
-
-#if defined(CPU_NLM)
-static __inline void
-xlp_sync(void)
-{
-        __asm __volatile (
-	    ".set push              \n"
-	    ".set noreorder         \n"
-	    ".set mips64            \n"
-	    "dla    $8, 1f          \n"
-	    "/* jr.hb $8 */         \n"
-	    ".word 0x1000408        \n"
-	    "nop                    \n"
-	 "1: nop                    \n"
-	    ".set pop               \n"
-	    : : : "$8");
-}
-#endif
-
-#if defined(SB1250_PASS1)
-#define	SYNC	__asm volatile("sync; sync")
-#elif defined(CPU_NLM)
-#define SYNC	xlp_sync()
-#else
-#define	SYNC	__asm volatile("sync")
-#endif
-
-#if defined(CPU_CNMIPS)
-#define SYNCI  mips_sync_icache();
-#elif defined(CPU_NLM)
-#define SYNCI	xlp_sync()
-#else
-#define SYNCI
-#endif
-
-/*
- * Exported variables for consumers like bus_dma code
- */
-int mips_picache_linesize;
-int mips_pdcache_linesize;
-int mips_sdcache_linesize;
-int mips_dcache_max_linesize;
-
-static int picache_size;
-static int picache_stride;
-static int picache_loopcount;
-static int picache_way_mask;
-static int pdcache_size;
-static int pdcache_stride;
-static int pdcache_loopcount;
-static int pdcache_way_mask;
-static int sdcache_size;
-static int sdcache_stride;
-static int sdcache_loopcount;
-static int sdcache_way_mask;
-
-void
-mipsNN_cache_init(struct mips_cpuinfo * cpuinfo)
-{
-	int flush_multiple_lines_per_way;
-
-	flush_multiple_lines_per_way = cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize * cpuinfo->l1.ic_linesize > PAGE_SIZE;
-	if (cpuinfo->icache_virtual) {
-		/*
-		 * With a virtual Icache we don't need to flush
-		 * multiples of the page size with index ops; we just
-		 * need to flush one pages' worth.
-		 */
-		flush_multiple_lines_per_way = 0;
-	}
-
-	if (flush_multiple_lines_per_way) {
-		picache_stride = PAGE_SIZE;
-		picache_loopcount = (cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize / PAGE_SIZE) *
-		    cpuinfo->l1.ic_nways;
-	} else {
-		picache_stride = cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize;
-		picache_loopcount = cpuinfo->l1.ic_nways;
-	}
-
-	if (cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize < PAGE_SIZE) {
-		pdcache_stride = cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize;
-		pdcache_loopcount = cpuinfo->l1.dc_nways;
-	} else {
-		pdcache_stride = PAGE_SIZE;
-		pdcache_loopcount = (cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize / PAGE_SIZE) *
-		    cpuinfo->l1.dc_nways;
-	}
-
-	mips_picache_linesize = cpuinfo->l1.ic_linesize;
-	mips_pdcache_linesize = cpuinfo->l1.dc_linesize;
-
-	picache_size = cpuinfo->l1.ic_size;
-	picache_way_mask = cpuinfo->l1.ic_nways - 1;
-	pdcache_size = cpuinfo->l1.dc_size;
-	pdcache_way_mask = cpuinfo->l1.dc_nways - 1;
-
-	sdcache_stride = cpuinfo->l2.dc_nsets * cpuinfo->l2.dc_linesize;
-	sdcache_loopcount = cpuinfo->l2.dc_nways;
-	sdcache_size = cpuinfo->l2.dc_size;
-	sdcache_way_mask = cpuinfo->l2.dc_nways - 1;
-
-	mips_sdcache_linesize = cpuinfo->l2.dc_linesize;
-	mips_dcache_max_linesize = MAX(mips_pdcache_linesize,
-	    mips_sdcache_linesize);
-
-#define CACHE_DEBUG
-#ifdef CACHE_DEBUG
-	printf("Cache info:\n");
-	if (cpuinfo->icache_virtual)
-		printf("  icache is virtual\n");
-	printf("  picache_stride    = %d\n", picache_stride);
-	printf("  picache_loopcount = %d\n", picache_loopcount);
-	printf("  pdcache_stride    = %d\n", pdcache_stride);
-	printf("  pdcache_loopcount = %d\n", pdcache_loopcount);
-	printf("  max line size     = %d\n", mips_dcache_max_linesize);
-#endif
-}
-
-void
-mipsNN_icache_sync_all_16(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + picache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	mips_intern_dcache_wbinv_all();
-
-	while (va < eva) {
-		cache_r4k_op_32lines_16(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += (32 * 16);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_all_32(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + picache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	mips_intern_dcache_wbinv_all();
-
-	while (va < eva) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += (32 * 32);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_all_64(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + picache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	mips_intern_dcache_wbinv_all();
-
-	while (va < eva) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += (32 * 64);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	mips_intern_dcache_wb_range(va, (eva - va));
-
-	while ((eva - va) >= (32 * 16)) {
-		cache_r4k_op_32lines_16(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += (32 * 16);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += 16;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	mips_intern_dcache_wb_range(va, (eva - va));
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += 32;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	mips_intern_dcache_wb_range(va, (eva - va));
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += 64;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_index_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask);
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = picache_stride;
-	loopcount = picache_loopcount;
-
-	mips_intern_dcache_wbinv_range_index(va, (eva - va));
-
-	while ((eva - va) >= (8 * 16)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_16(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 8 * 16;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 16;
-	}
-}
-
-void
-mipsNN_icache_sync_range_index_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask);
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = picache_stride;
-	loopcount = picache_loopcount;
-
-	mips_intern_dcache_wbinv_range_index(va, (eva - va));
-
-	while ((eva - va) >= (8 * 32)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_32(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 8 * 32;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 32;
-	}
-}
-
-void
-mipsNN_icache_sync_range_index_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask);
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = picache_stride;
-	loopcount = picache_loopcount;
-
-	mips_intern_dcache_wbinv_range_index(va, (eva - va));
-
-	while ((eva - va) >= (8 * 64)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_64(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 8 * 64;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 64;
-	}
-}
-
-void
-mipsNN_pdcache_wbinv_all_16(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + pdcache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	while (va < eva) {
-		cache_r4k_op_32lines_16(va,
-		    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 16);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_all_32(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + pdcache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	while (va < eva) {
-		cache_r4k_op_32lines_32(va,
-		    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 32);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_all_64(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + pdcache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	while (va < eva) {
-		cache_r4k_op_32lines_64(va,
-		    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 64);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	while ((eva - va) >= (32 * 16)) {
-		cache_r4k_op_32lines_16(va,
-		    CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 16);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += 16;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va,
-		    CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += 32;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va,
-		    CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += 64;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_index_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask);
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = pdcache_stride;
-	loopcount = pdcache_loopcount;
-
-	while ((eva - va) >= (8 * 16)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_16(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 8 * 16;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 16;
-	}
-}
-
-void
-mipsNN_pdcache_wbinv_range_index_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask);
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = pdcache_stride;
-	loopcount = pdcache_loopcount;
-
-	while ((eva - va) >= (8 * 32)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_32(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 8 * 32;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 32;
-	}
-}
-
-void
-mipsNN_pdcache_wbinv_range_index_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask);
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = pdcache_stride;
-	loopcount = pdcache_loopcount;
-
-	while ((eva - va) >= (8 * 64)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_8lines_64(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 8 * 64;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 64;
-	}
-}
-
-void
-mipsNN_pdcache_inv_range_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	while ((eva - va) >= (32 * 16)) {
-		cache_r4k_op_32lines_16(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += (32 * 16);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += 16;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_inv_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += 32;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_inv_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += 64;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wb_range_16(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line16(va + size);
-	va = trunc_line16(va);
-
-	while ((eva - va) >= (32 * 16)) {
-		cache_r4k_op_32lines_16(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += (32 * 16);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += 16;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wb_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += 32;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wb_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += 64;
-	}
-
-	SYNC;
-}
-
-#ifdef CPU_CNMIPS
-
-void
-mipsNN_icache_sync_all_128(void)
-{
-        SYNCI
-}
-
-void
-mipsNN_icache_sync_range_128(vm_offset_t va, vm_size_t size)
-{
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_index_128(vm_offset_t va, vm_size_t size)
-{
-}
-
-void
-mipsNN_pdcache_wbinv_all_128(void)
-{
-}
-
-void
-mipsNN_pdcache_wbinv_range_128(vm_offset_t va, vm_size_t size)
-{
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size)
-{
-}
-
-void
-mipsNN_pdcache_inv_range_128(vm_offset_t va, vm_size_t size)
-{
-}
-
-void
-mipsNN_pdcache_wb_range_128(vm_offset_t va, vm_size_t size)
-{
-	SYNC;
-}
-
-#else
-
-void
-mipsNN_icache_sync_all_128(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + picache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	mips_intern_dcache_wbinv_all();
-
-	while (va < eva) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += (32 * 128);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	mips_intern_dcache_wb_range(va, (eva - va));
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV);
-		va += 128;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_icache_sync_range_index_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask);
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = picache_stride;
-	loopcount = picache_loopcount;
-
-	mips_intern_dcache_wbinv_range_index(va, (eva - va));
-
-	while ((eva - va) >= (32 * 128)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_32lines_128(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 32 * 128;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-		va += 128;
-	}
-}
-
-void
-mipsNN_pdcache_wbinv_all_128(void)
-{
-	vm_offset_t va, eva;
-
-	va = MIPS_PHYS_TO_KSEG0(0);
-	eva = va + pdcache_size;
-
-	/*
-	 * Since we're hitting the whole thing, we don't have to
-	 * worry about the N different "ways".
-	 */
-
-	while (va < eva) {
-		cache_r4k_op_32lines_128(va,
-		    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 128);
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va,
-		    CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
-		va += 128;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva, tmpva;
-	int i, stride, loopcount;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask);
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	/*
-	 * GCC generates better code in the loops if we reference local
-	 * copies of these global variables.
-	 */
-	stride = pdcache_stride;
-	loopcount = pdcache_loopcount;
-
-	while ((eva - va) >= (32 * 128)) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_r4k_op_32lines_128(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 32 * 128;
-	}
-
-	while (va < eva) {
-		tmpva = va;
-		for (i = 0; i < loopcount; i++, tmpva += stride)
-			cache_op_r4k_line(tmpva,
-			    CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-		va += 128;
-	}
-}
-
-void
-mipsNN_pdcache_inv_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
-		va += 128;
-	}
-
-	SYNC;
-}
-
-void
-mipsNN_pdcache_wb_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
-		va += 128;
-	}
-
-	SYNC;
-}
-
-#endif
-
-void
-mipsNN_sdcache_wbinv_all_32(void)
-{
-	vm_offset_t va = MIPS_PHYS_TO_KSEG0(0);
-	vm_offset_t eva = va + sdcache_size;
-
-	while (va < eva) {
-		cache_r4k_op_32lines_32(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 32);
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_all_64(void)
-{
-	vm_offset_t va = MIPS_PHYS_TO_KSEG0(0);
-	vm_offset_t eva = va + sdcache_size;
-
-	while (va < eva) {
-		cache_r4k_op_32lines_64(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 64);
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line32(va + size);
-
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += 32;
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line64(va + size);
-
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += 64;
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_index_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1));
-
-	eva = round_line32(va + size);
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += 32;
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_index_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1));
-
-	eva = round_line64(va + size);
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += 64;
-	}
-}
-
-void
-mipsNN_sdcache_inv_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line32(va + size);
-
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += 32;
-	}
-}
-
-void
-mipsNN_sdcache_inv_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line64(va + size);
-
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += 64;
-	}
-}
-
-void
-mipsNN_sdcache_wb_range_32(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line32(va + size);
-
-	va = trunc_line32(va);
-
-	while ((eva - va) >= (32 * 32)) {
-		cache_r4k_op_32lines_32(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += (32 * 32);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += 32;
-	}
-}
-
-void
-mipsNN_sdcache_wb_range_64(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line64(va + size);
-
-	va = trunc_line64(va);
-
-	while ((eva - va) >= (32 * 64)) {
-		cache_r4k_op_32lines_64(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += (32 * 64);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += 64;
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_all_128(void)
-{
-	vm_offset_t va = MIPS_PHYS_TO_KSEG0(0);
-	vm_offset_t eva = va + sdcache_size;
-
-	while (va < eva) {
-		cache_r4k_op_32lines_128(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 128);
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line128(va + size);
-
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV);
-		va += 128;
-	}
-}
-
-void
-mipsNN_sdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva;
-
-	/*
-	 * Since we're doing Index ops, we expect to not be able
-	 * to access the address we've been given.  So, get the
-	 * bits that determine the cache index, and make a KSEG0
-	 * address out of them.
-	 */
-	va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1));
-
-	eva = round_line128(va + size);
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va,
-		    CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-		va += 128;
-	}
-}
-
-void
-mipsNN_sdcache_inv_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line128(va + size);
-
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV);
-		va += 128;
-	}
-}
-
-void
-mipsNN_sdcache_wb_range_128(vm_offset_t va, vm_size_t size)
-{
-	vm_offset_t eva = round_line128(va + size);
-
-	va = trunc_line128(va);
-
-	while ((eva - va) >= (32 * 128)) {
-		cache_r4k_op_32lines_128(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += (32 * 128);
-	}
-
-	while (va < eva) {
-		cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB);
-		va += 128;
-	}
-}
diff --git a/sys/mips/mips/cpu.c b/sys/mips/mips/cpu.c
deleted file mode 100644
index 64450d24b6f3..000000000000
--- a/sys/mips/mips/cpu.c
+++ /dev/null
@@ -1,587 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004 Juli Mallett.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/proc.h>
-#include <sys/stdint.h>
-
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-#include <sys/systm.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <machine/cache.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpuregs.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/pte.h>
-#include <machine/tlb.h>
-#include <machine/hwfunc.h>
-#include <machine/mips_opcode.h>
-#include <machine/regnum.h>
-#include <machine/tls.h>
-
-#if defined(CPU_CNMIPS)
-#include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/octeon-model.h>
-#endif
-
-struct mips_cpuinfo cpuinfo;
-
-#define _ENCODE_INSN(a,b,c,d,e) \
-    ((uint32_t)(((a) << 26)|((b) << 21)|((c) << 16)|((d) << 11)|(e)))
-
-#define	_JR_RA	_ENCODE_INSN(OP_SPECIAL, RA, 0, 0, OP_JR)
-#define	_NOP	0
-
-/*
- * Patch cpu_switch() by removing the UserLocal register code at the end.
- * For MIPS hardware that don't support UserLocal Register Implementation
- * we remove the instructions that update this register which may cause a
- * reserved instruction exception in the kernel.
- */
-static void
-remove_userlocal_code(uint32_t *cpu_switch_code)
-{
-	uint32_t *instructp;
-
-	instructp = cpu_switch_code;
-	instructp[0] = _JR_RA;
-	instructp[1] = _NOP;
-}
-
-/*
- * Attempt to identify the MIPS CPU as much as possible.
- *
- * XXX: Assumes the CPU is MIPS{32,64}{,r2} compliant.
- * XXX: For now, skip config register selections 2 and 3
- * as we don't currently use L2/L3 cache or additional
- * MIPS32 processor features.
- */
-static void
-mips_get_identity(struct mips_cpuinfo *cpuinfo)
-{
-	u_int32_t prid;
-	u_int32_t cfg0;
-	u_int32_t cfg1;
-	u_int32_t cfg2;
-	u_int32_t cfg3;
-#if defined(CPU_CNMIPS)
-	u_int32_t cfg4;
-#endif
-	u_int32_t tmp;
-
-	memset(cpuinfo, 0, sizeof(struct mips_cpuinfo));
-
-	/* Read and store the PrID ID for CPU identification. */
-	prid = mips_rd_prid();
-	cpuinfo->cpu_vendor = MIPS_PRID_CID(prid);
-	cpuinfo->cpu_rev = MIPS_PRID_REV(prid);
-	cpuinfo->cpu_impl = MIPS_PRID_IMPL(prid);
-
-	/* Read config register selection 0 to learn TLB type. */
-	cfg0 = mips_rd_config();
-
-	cpuinfo->tlb_type = 
-	    ((cfg0 & MIPS_CONFIG0_MT_MASK) >> MIPS_CONFIG0_MT_SHIFT);
-	cpuinfo->icache_virtual = cfg0 & MIPS_CONFIG0_VI;
-
-	/* If config register selection 1 does not exist, return. */
-	if (!(cfg0 & MIPS_CONFIG0_M))
-		return;
-
-	/* Learn TLB size and L1 cache geometry. */
-	cfg1 = mips_rd_config1();
-
-	/* Get the Config2 and Config3 registers as well. */
-	cfg2 = 0;
-	cfg3 = 0;
-	if (cfg1 & MIPS_CONFIG1_M) {
-		cfg2 = mips_rd_config2();
-		if (cfg2 & MIPS_CONFIG2_M)
-			cfg3 = mips_rd_config3();
-	}
-
-	/* Save FP implementation revision if FP is present. */
-	if (cfg1 & MIPS_CONFIG1_FP)
-		cpuinfo->fpu_id = MipsFPID();
-
-	/* Check to see if UserLocal register is implemented. */
-	if (cfg3 & MIPS_CONFIG3_ULR) {
-		/* UserLocal register is implemented, enable it. */
-		cpuinfo->userlocal_reg = true;
-		tmp = mips_rd_hwrena();
-		mips_wr_hwrena(tmp | MIPS_HWRENA_UL);
-	} else {
-		/*
-		 * UserLocal register is not implemented. Patch
-		 * cpu_switch() and remove unsupported code.
-		 */
-		cpuinfo->userlocal_reg = false;
-		remove_userlocal_code((uint32_t *)cpu_switch_set_userlocal);
-	}
-
-#if defined(CPU_NLM)
-	/* Account for Extended TLB entries in XLP */
-	tmp = mips_rd_config6();
-	cpuinfo->tlb_nentries = ((tmp >> 16) & 0xffff) + 1;
-#elif defined(BERI_LARGE_TLB)
-	/* Check if we support extended TLB entries and if so activate. */
-	tmp = mips_rd_config5();
-#define	BERI_CP5_LTLB_SUPPORTED	0x1
-	if (tmp & BERI_CP5_LTLB_SUPPORTED) {
-		/* See how many extra TLB entries we have. */
-		tmp = mips_rd_config6();
-		cpuinfo->tlb_nentries = (tmp >> 16) + 1;
-		/* Activate the extended entries. */
-		mips_wr_config6(tmp|0x4);
-	} else
-#endif
-#if !defined(CPU_NLM)
-	cpuinfo->tlb_nentries = 
-	    ((cfg1 & MIPS_CONFIG1_TLBSZ_MASK) >> MIPS_CONFIG1_TLBSZ_SHIFT) + 1;
-#endif
-#if defined(CPU_CNMIPS)
-	/* Add extended TLB size information from config4.  */
-	cfg4 = mips_rd_config4();
-	if ((cfg4 & MIPS_CONFIG4_MMUEXTDEF) == MIPS_CONFIG4_MMUEXTDEF_MMUSIZEEXT)
-		cpuinfo->tlb_nentries += (cfg4 & MIPS_CONFIG4_MMUSIZEEXT) * 0x40;
-#endif
-
-	/* L1 instruction cache. */
-#ifdef MIPS_DISABLE_L1_CACHE
-	cpuinfo->l1.ic_linesize = 0;
-#else
-	tmp = (cfg1 & MIPS_CONFIG1_IL_MASK) >> MIPS_CONFIG1_IL_SHIFT;
-	if (tmp != 0) {
-		cpuinfo->l1.ic_linesize = 1 << (tmp + 1);
-		cpuinfo->l1.ic_nways = (((cfg1 & MIPS_CONFIG1_IA_MASK) >> MIPS_CONFIG1_IA_SHIFT)) + 1;
-		cpuinfo->l1.ic_nsets = 
-	    		1 << (((cfg1 & MIPS_CONFIG1_IS_MASK) >> MIPS_CONFIG1_IS_SHIFT) + 6);
-	}
-#endif
-
-	/* L1 data cache. */
-#ifdef MIPS_DISABLE_L1_CACHE
-	cpuinfo->l1.dc_linesize = 0;
-#else
-#ifndef CPU_CNMIPS
-	tmp = (cfg1 & MIPS_CONFIG1_DL_MASK) >> MIPS_CONFIG1_DL_SHIFT;
-	if (tmp != 0) {
-		cpuinfo->l1.dc_linesize = 1 << (tmp + 1);
-		cpuinfo->l1.dc_nways = 
-		    (((cfg1 & MIPS_CONFIG1_DA_MASK) >> MIPS_CONFIG1_DA_SHIFT)) + 1;
-		cpuinfo->l1.dc_nsets = 
-		    1 << (((cfg1 & MIPS_CONFIG1_DS_MASK) >> MIPS_CONFIG1_DS_SHIFT) + 6);
-	}
-#else
-	/*
-	 * Some Octeon cache configuration parameters are by model family, not
-	 * config1.
-	 */
-	if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
-		/* Octeon and Octeon XL.  */
-		cpuinfo->l1.dc_nsets = 1;
-		cpuinfo->l1.dc_nways = 64;
-	} else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) {
-		/* Octeon Plus.  */
-		cpuinfo->l1.dc_nsets = 2;
-		cpuinfo->l1.dc_nways = 64;
-	} else if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
-		/* Octeon II.  */
-		cpuinfo->l1.dc_nsets = 8;
-		cpuinfo->l1.dc_nways = 32;
-
-		cpuinfo->l1.ic_nsets = 8;
-		cpuinfo->l1.ic_nways = 37;
-	} else {
-		panic("%s: unsupported Cavium Networks CPU.", __func__);
-	}
-
-	/* All Octeon models use 128 byte line size.  */
-	cpuinfo->l1.dc_linesize = 128;
-#endif
-#endif
-
-	cpuinfo->l1.ic_size = cpuinfo->l1.ic_linesize
-	    * cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_nways;
-	cpuinfo->l1.dc_size = cpuinfo->l1.dc_linesize 
-	    * cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_nways;
-
-	/*
-	 * Probe PageMask register to see what sizes of pages are supported
-	 * by writing all one's and then reading it back.
-	 */
-	mips_wr_pagemask(~0);
-	cpuinfo->tlb_pgmask = mips_rd_pagemask();
-	mips_wr_pagemask(MIPS3_PGMASK_4K);
-
-#ifndef CPU_CNMIPS
-	/* L2 cache */
-	if (!(cfg1 & MIPS_CONFIG_CM)) {
-		/* We don't have valid cfg2 register */
-		return;
-	}
-
-	cfg2 = mips_rd_config2();
-
-	tmp = (cfg2 >> MIPS_CONFIG2_SL_SHIFT) & MIPS_CONFIG2_SL_MASK;
-	if (0 < tmp && tmp <= 7)
-		cpuinfo->l2.dc_linesize = 2 << tmp;
-
-	tmp = (cfg2 >> MIPS_CONFIG2_SS_SHIFT) & MIPS_CONFIG2_SS_MASK;
-	if (0 <= tmp && tmp <= 7)
-		cpuinfo->l2.dc_nsets = 64 << tmp;
-
-	tmp = (cfg2 >> MIPS_CONFIG2_SA_SHIFT) & MIPS_CONFIG2_SA_MASK;
-	if (0 <= tmp && tmp <= 7)
-		cpuinfo->l2.dc_nways = tmp + 1;
-
-	cpuinfo->l2.dc_size = cpuinfo->l2.dc_linesize
-	    * cpuinfo->l2.dc_nsets * cpuinfo->l2.dc_nways;
-#endif
-}
-
-void
-mips_cpu_init(void)
-{
-	platform_cpu_init();
-	mips_get_identity(&cpuinfo);
-	num_tlbentries = cpuinfo.tlb_nentries;
-	mips_wr_wired(0);
-	tlb_invalidate_all();
-	mips_wr_wired(VMWIRED_ENTRIES);
-	mips_config_cache(&cpuinfo);
-	mips_vector_init();
-
-	mips_icache_sync_all();
-	mips_dcache_wbinv_all();
-}
-
-void
-cpu_identify(void)
-{
-	uint32_t cfg0, cfg1, cfg2, cfg3;
-#if defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || defined (CPU_MIPS24K)
-	uint32_t cfg7;
-#endif
-	printf("CPU: ");
-	switch (cpuinfo.cpu_vendor) {
-	case MIPS_PRID_CID_MTI:
-		printf("MIPS Technologies");
-		break;
-	case MIPS_PRID_CID_BROADCOM:
-	case MIPS_PRID_CID_SIBYTE:
-		printf("Broadcom");
-		break;
-	case MIPS_PRID_CID_ALCHEMY:
-		printf("AMD");
-		break;
-	case MIPS_PRID_CID_SANDCRAFT:
-		printf("Sandcraft");
-		break;
-	case MIPS_PRID_CID_PHILIPS:
-		printf("Philips");
-		break;
-	case MIPS_PRID_CID_TOSHIBA:
-		printf("Toshiba");
-		break;
-	case MIPS_PRID_CID_LSI:
-		printf("LSI");
-		break;
-	case MIPS_PRID_CID_LEXRA:
-		printf("Lexra");
-		break;
-	case MIPS_PRID_CID_RMI:
-		printf("RMI");
-		break;
-	case MIPS_PRID_CID_CAVIUM:
-		printf("Cavium");
-		break;
-	case MIPS_PRID_CID_INGENIC:
-	case MIPS_PRID_CID_INGENIC2:
-		printf("Ingenic XBurst");
-		break;
-	case MIPS_PRID_CID_PREHISTORIC:
-	default:
-		printf("Unknown cid %#x", cpuinfo.cpu_vendor);
-		break;
-	}
-	if (cpu_model[0] != '\0')
-		printf(" (%s)", cpu_model);
-	printf(" processor v%d.%d\n", cpuinfo.cpu_rev, cpuinfo.cpu_impl);
-
-	printf("  MMU: ");
-	if (cpuinfo.tlb_type == MIPS_MMU_NONE) {
-		printf("none present\n");
-	} else {
-		if (cpuinfo.tlb_type == MIPS_MMU_TLB) {
-			printf("Standard TLB");
-		} else if (cpuinfo.tlb_type == MIPS_MMU_BAT) {
-			printf("Standard BAT");
-		} else if (cpuinfo.tlb_type == MIPS_MMU_FIXED) {
-			printf("Fixed mapping");
-		}
-		printf(", %d entries ", cpuinfo.tlb_nentries);
-	}
-
-	if (cpuinfo.tlb_pgmask) {
-		printf("(");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_MASKX)
-			printf("1K ");
-		printf("4K ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_16K)
-			printf("16K ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_64K)
-			printf("64K ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_256K)
-			printf("256K ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_1M)
-			printf("1M ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_16M)
-			printf("16M ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_64M)
-			printf("64M ");
-		if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_256M)
-			printf("256M ");
-		printf("pg sizes)");
-	}
-	printf("\n");
-
-	printf("  L1 i-cache: ");
-	if (cpuinfo.l1.ic_linesize == 0) {
-		printf("disabled");
-	} else {
-		if (cpuinfo.l1.ic_nways == 1) {
-			printf("direct-mapped with");
-		} else {
-			printf ("%d ways of", cpuinfo.l1.ic_nways);
-		}
-		printf(" %d sets, %d bytes per line\n", 
-		    cpuinfo.l1.ic_nsets, cpuinfo.l1.ic_linesize);
-	}
-
-	printf("  L1 d-cache: ");
-	if (cpuinfo.l1.dc_linesize == 0) {
-		printf("disabled");
-	} else {
-		if (cpuinfo.l1.dc_nways == 1) {
-			printf("direct-mapped with");
-		} else {
-			printf ("%d ways of", cpuinfo.l1.dc_nways);
-		}
-		printf(" %d sets, %d bytes per line\n", 
-		    cpuinfo.l1.dc_nsets, cpuinfo.l1.dc_linesize);
-	}
-
-	printf("  L2 cache: ");
-	if (cpuinfo.l2.dc_linesize == 0) {
-		printf("disabled\n");
-	} else {
-		printf("%d ways of %d sets, %d bytes per line, "
-		    "%d KiB total size\n",
-		    cpuinfo.l2.dc_nways,
-		    cpuinfo.l2.dc_nsets,
-		    cpuinfo.l2.dc_linesize,
-		    cpuinfo.l2.dc_size / 1024);
-	}
-
-	cfg0 = mips_rd_config();
-	/* If config register selection 1 does not exist, exit. */
-	if (!(cfg0 & MIPS_CONFIG_CM))
-		return;
-
-	cfg1 = mips_rd_config1();
-	printf("  Config1=0x%b\n", cfg1, 
-	    "\20\7COP2\6MDMX\5PerfCount\4WatchRegs\3MIPS16\2EJTAG\1FPU");
-
-	if (cpuinfo.fpu_id != 0)
-		printf("  FPU ID=0x%b\n", cpuinfo.fpu_id,
-		    "\020"
-		    "\020S"
-		    "\021D"
-		    "\022PS"
-		    "\0233D"
-		    "\024W"
-		    "\025L"
-		    "\026F64"
-		    "\0272008"
-		    "\034UFRP");
-
-	/* If config register selection 2 does not exist, exit. */
-	if (!(cfg1 & MIPS_CONFIG_CM))
-		return;
-	cfg2 = mips_rd_config2();
-	/* 
-	 * Config2 contains no useful information other then Config3 
-	 * existence flag
-	 */
-	printf("  Config2=0x%08x\n", cfg2);
-
-	/* If config register selection 3 does not exist, exit. */
-	if (!(cfg2 & MIPS_CONFIG_CM))
-		return;
-	cfg3 = mips_rd_config3();
-
-	/* Print Config3 if it contains any useful info */
-	if (cfg3 & ~(0x80000000))
-		printf("  Config3=0x%b\n", cfg3, "\20\16ULRI\2SmartMIPS\1TraceLogic");
-
-#if defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || defined (CPU_MIPS24K)
-	cfg7 = mips_rd_config7();
-	printf("  Config7=0x%b\n", cfg7, "\20\40WII\21AR");
-#endif
-}
-
-static struct rman cpu_hardirq_rman;
-
-static devclass_t cpu_devclass;
-
-/*
- * Device methods
- */
-static int cpu_probe(device_t);
-static int cpu_attach(device_t);
-static struct resource *cpu_alloc_resource(device_t, device_t, int, int *,
-					   rman_res_t, rman_res_t, rman_res_t,
-					   u_int);
-static int cpu_setup_intr(device_t, device_t, struct resource *, int,
-			  driver_filter_t *f, driver_intr_t *, void *, 
-			  void **);
-
-static device_method_t cpu_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		cpu_probe),
-	DEVMETHOD(device_attach,	cpu_attach),
-	DEVMETHOD(device_detach,	bus_generic_detach),
-	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
-
-	/* Bus interface */
-	DEVMETHOD(bus_alloc_resource,	cpu_alloc_resource),
-	DEVMETHOD(bus_setup_intr,	cpu_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
-	{ 0, 0 }
-};
-
-static driver_t cpu_driver = {
-	"cpu", cpu_methods, 1
-};
-
-static int
-cpu_probe(device_t dev)
-{
-
-	return (0);
-}
-
-static int
-cpu_attach(device_t dev)
-{
-	int error;
-#ifdef notyet
-	device_t clock;
-#endif
-
-	cpu_hardirq_rman.rm_start = 0;
-	cpu_hardirq_rman.rm_end = 5;
-	cpu_hardirq_rman.rm_type = RMAN_ARRAY;
-	cpu_hardirq_rman.rm_descr = "CPU Hard Interrupts";
-
-	error = rman_init(&cpu_hardirq_rman);
-	if (error != 0) {
-		device_printf(dev, "failed to initialize irq resources\n");
-		return (error);
-	}
-	/* XXX rman_manage_all. */
-	error = rman_manage_region(&cpu_hardirq_rman,
-				   cpu_hardirq_rman.rm_start,
-				   cpu_hardirq_rman.rm_end);
-	if (error != 0) {
-		device_printf(dev, "failed to manage irq resources\n");
-		return (error);
-	}
-
-	if (device_get_unit(dev) != 0)
-		panic("can't attach more cpus");
-	device_set_desc(dev, "MIPS32 processor");
-
-#ifdef notyet
-	clock = device_add_child(dev, "clock", device_get_unit(dev));
-	if (clock == NULL)
-		device_printf(dev, "clock failed to attach");
-#endif
-
-	return (bus_generic_attach(dev));
-}
-
-static struct resource *
-cpu_alloc_resource(device_t dev, device_t child, int type, int *rid,
-		   rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct resource *res;
-
-	if (type != SYS_RES_IRQ)
-		return (NULL);
-	res = rman_reserve_resource(&cpu_hardirq_rman, start, end, count, 0,
-				    child);
-	return (res);
-}
-
-static int
-cpu_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
-	       driver_filter_t *filt, driver_intr_t *handler, void *arg, 
-	       void **cookiep)
-{
-	int error;
-	int intr;
-
-	error = rman_activate_resource(res);
-	if (error != 0) {
-		device_printf(child, "could not activate irq\n");
-		return (error);
-	}
-
-	intr = rman_get_start(res);
-
-	cpu_establish_hardintr(device_get_nameunit(child), filt, handler, arg, 
-	    intr, flags, cookiep);
-	device_printf(child, "established CPU interrupt %d\n", intr);
-	return (0);
-}
-
-DRIVER_MODULE(cpu, root, cpu_driver, cpu_devclass, 0, 0);
diff --git a/sys/mips/mips/db_disasm.c b/sys/mips/mips/db_disasm.c
deleted file mode 100644
index 8df7e0e0197e..000000000000
--- a/sys/mips/mips/db_disasm.c
+++ /dev/null
@@ -1,399 +0,0 @@
-/*	$OpenBSD: db_disasm.c,v 1.1 1998/03/16 09:03:24 pefo Exp $	*/
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1991, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)kadb.c	8.1 (Berkeley) 6/10/93
- *	Id: db_disasm.c,v 1.1 1998/03/16 09:03:24 pefo Exp
- *	JNPR: db_disasm.c,v 1.1 2006/08/07 05:38:57 katta
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <vm/vm_param.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <sys/systm.h>
-
-#include <machine/mips_opcode.h>
-#include <machine/db_machdep.h>
-#include <ddb/ddb.h>
-#include <ddb/db_output.h>
-
-static char *op_name[64] = {
-/* 0 */ "spec", "bcond","j",	"jal",	"beq",	"bne",	"blez",	"bgtz",
-/* 8 */ "addi", "addiu","slti",	"sltiu","andi",	"ori",	"xori",	"lui",
-/*16 */ "cop0", "cop1",	"cop2",	"cop3", "beql",	"bnel",	"blezl","bgtzl",
-/*24 */ "daddi","daddiu","ldl",	"ldr",	"op34",	"op35",	"op36",	"op37",
-/*32 */ "lb",	"lh",	"lwl",	"lw",	"lbu",	"lhu",	"lwr",	"lwu",
-/*40 */ "sb",	"sh",	"swl",	"sw",	"sdl",	"sdr",	"swr",	"cache",
-/*48 */ "ll",	"lwc1",	"lwc2",	"lwc3", "lld",	"ldc1",	"ldc2",	"ld",
-/*56 */ "sc",	"swc1",	"swc2",	"swc3", "scd",	"sdc1",	"sdc2",	"sd"
-};
-
-static char *spec_name[64] = {
-/* 0 */ "sll",	"spec01","srl", "sra",	"sllv",	"spec05","srlv","srav",
-/* 8 */ "jr",	"jalr",	"spec12","spec13","syscall","break","spec16","sync",
-/*16 */ "mfhi",	"mthi",	"mflo", "mtlo",	"dsllv","spec25","dsrlv","dsrav",
-/*24 */ "mult",	"multu","div",	"divu",	"dmult","dmultu","ddiv","ddivu",
-/*32 */ "add",	"addu",	"sub",	"subu",	"and",	"or",	"xor",	"nor",
-/*40 */ "spec50","spec51","slt","sltu",	"dadd","daddu","dsub","dsubu",
-/*48 */ "tge","tgeu","tlt","tltu","teq","spec65","tne","spec67",
-/*56 */ "dsll","spec71","dsrl","dsra","dsll32","spec75","dsrl32","dsra32"
-};
-
-static char *bcond_name[32] = {
-/* 0 */ "bltz",	"bgez",	"bltzl", "bgezl", "?", "?", "?", "?",
-/* 8 */ "tgei",	"tgeiu", "tlti", "tltiu", "teqi", "?", "tnei", "?",
-/*16 */ "bltzal", "bgezal", "bltzall", "bgezall", "?", "?", "?", "?",
-/*24 */ "?", "?", "?", "?", "?", "?", "?", "?",
-};
-
-static char *cop1_name[64] = {
-/* 0 */ "fadd",	"fsub",	"fmpy",	"fdiv",	"fsqrt","fabs",	"fmov",	"fneg",
-/* 8 */ "fop08","fop09","fop0a","fop0b","fop0c","fop0d","fop0e","fop0f",
-/*16 */ "fop10","fop11","fop12","fop13","fop14","fop15","fop16","fop17",
-/*24 */ "fop18","fop19","fop1a","fop1b","fop1c","fop1d","fop1e","fop1f",
-/*32 */ "fcvts","fcvtd","fcvte","fop23","fcvtw","fop25","fop26","fop27",
-/*40 */ "fop28","fop29","fop2a","fop2b","fop2c","fop2d","fop2e","fop2f",
-/*48 */ "fcmp.f","fcmp.un","fcmp.eq","fcmp.ueq","fcmp.olt","fcmp.ult",
-	"fcmp.ole","fcmp.ule",
-/*56 */ "fcmp.sf","fcmp.ngle","fcmp.seq","fcmp.ngl","fcmp.lt","fcmp.nge",
-	"fcmp.le","fcmp.ngt"
-};
-
-static char *fmt_name[16] = {
-	"s",	"d",	"e",	"fmt3",
-	"w",	"fmt5",	"fmt6",	"fmt7",
-	"fmt8",	"fmt9",	"fmta",	"fmtb",
-	"fmtc",	"fmtd",	"fmte",	"fmtf"
-};
-
-static char *reg_name[32] = {
-	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3",
-#if defined(__mips_n32) || defined(__mips_n64)
-	"a4",	"a5",	"a6",	"a7",	"t0",	"t1",	"t2",	"t3",
-#else
-	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7",
-#endif
-	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7",
-	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra"
-};
-
-static char *c0_opname[64] = {
-	"c0op00","tlbr",  "tlbwi", "c0op03","c0op04","c0op05","tlbwr", "c0op07",
-	"tlbp",	"c0op11","c0op12","c0op13","c0op14","c0op15","c0op16","c0op17",
-	"rfe",	"c0op21","c0op22","c0op23","c0op24","c0op25","c0op26","c0op27",
-	"eret","c0op31","c0op32","c0op33","c0op34","c0op35","c0op36","c0op37",
-	"c0op40","c0op41","c0op42","c0op43","c0op44","c0op45","c0op46","c0op47",
-	"c0op50","c0op51","c0op52","c0op53","c0op54","c0op55","c0op56","c0op57",
-	"c0op60","c0op61","c0op62","c0op63","c0op64","c0op65","c0op66","c0op67",
-	"c0op70","c0op71","c0op72","c0op73","c0op74","c0op75","c0op77","c0op77",
-};
-
-static char *c0_reg[32] = {
-	"index","random","tlblo0","tlblo1","context","tlbmask","wired","c0r7",
-	"badvaddr","count","tlbhi","c0r11","sr","cause","epc",	"prid",
-	"config","lladr","watchlo","watchhi","xcontext","c0r21","c0r22","c0r23",
-	"c0r24","c0r25","ecc","cacheerr","taglo","taghi","errepc","c0r31"
-};
-
-static int md_printins(int ins, int mdbdot);
-
-db_addr_t
-db_disasm(db_addr_t loc, bool altfmt)
-
-{
-	int ins;
-
-	if (vtophys((vm_offset_t)loc)) {
-		db_read_bytes((vm_offset_t)loc, (size_t)sizeof(int),
-		    (char *)&ins);
-		md_printins(ins, loc);
-	}
-
-	return (loc + sizeof(int));
-} 
-
-/* ARGSUSED */
-static int
-md_printins(int ins, int mdbdot)
-{
-	InstFmt i;
-	int delay = 0;
-
-	i.word = ins;
-
-	switch (i.JType.op) {
-	case OP_SPECIAL:
-		if (i.word == 0) {
-			db_printf("nop");
-			break;
-		}
-		if (i.RType.func == OP_ADDU && i.RType.rt == 0) {
-			db_printf("move\t%s,%s",
-			    reg_name[i.RType.rd], reg_name[i.RType.rs]);
-			break;
-		}
-		db_printf("%s", spec_name[i.RType.func]);
-		switch (i.RType.func) {
-		case OP_SLL:
-		case OP_SRL:
-		case OP_SRA:
-		case OP_DSLL:
-		case OP_DSRL:
-		case OP_DSRA:
-		case OP_DSLL32:
-		case OP_DSRL32:
-		case OP_DSRA32:
-			db_printf("\t%s,%s,%d", reg_name[i.RType.rd],
-			    reg_name[i.RType.rt], i.RType.shamt);
-			break;
-
-		case OP_SLLV:
-		case OP_SRLV:
-		case OP_SRAV:
-		case OP_DSLLV:
-		case OP_DSRLV:
-		case OP_DSRAV:
-			db_printf("\t%s,%s,%s", reg_name[i.RType.rd],
-			    reg_name[i.RType.rt], reg_name[i.RType.rs]);
-			break;
-
-		case OP_MFHI:
-		case OP_MFLO:
-			db_printf("\t%s", reg_name[i.RType.rd]);
-			break;
-
-		case OP_JR:
-		case OP_JALR:
-			delay = 1;
-			/* FALLTHROUGH */
-		case OP_MTLO:
-		case OP_MTHI:
-			db_printf("\t%s", reg_name[i.RType.rs]);
-			break;
-
-		case OP_MULT:
-		case OP_MULTU:
-		case OP_DMULT:
-		case OP_DMULTU:
-		case OP_DIV:
-		case OP_DIVU:
-		case OP_DDIV:
-		case OP_DDIVU:
-			db_printf("\t%s,%s",
-			    reg_name[i.RType.rs], reg_name[i.RType.rt]);
-			break;
-
-		case OP_SYSCALL:
-		case OP_SYNC:
-			break;
-
-		case OP_BREAK:
-			db_printf("\t%d", (i.RType.rs << 5) | i.RType.rt);
-			break;
-
-		default:
-			db_printf("\t%s,%s,%s", reg_name[i.RType.rd],
-			    reg_name[i.RType.rs], reg_name[i.RType.rt]);
-		}
-		break;
-
-	case OP_BCOND:
-		db_printf("%s\t%s,", bcond_name[i.IType.rt],
-		    reg_name[i.IType.rs]);
-		goto pr_displ;
-
-	case OP_BLEZ:
-	case OP_BLEZL:
-	case OP_BGTZ:
-	case OP_BGTZL:
-		db_printf("%s\t%s,", op_name[i.IType.op],
-		    reg_name[i.IType.rs]);
-		goto pr_displ;
-
-	case OP_BEQ:
-	case OP_BEQL:
-		if (i.IType.rs == 0 && i.IType.rt == 0) {
-			db_printf("b\t");
-			goto pr_displ;
-		}
-		/* FALLTHROUGH */
-	case OP_BNE:
-	case OP_BNEL:
-		db_printf("%s\t%s,%s,", op_name[i.IType.op],
-		    reg_name[i.IType.rs], reg_name[i.IType.rt]);
-	pr_displ:
-		delay = 1;
-		db_printf("0x%08x", mdbdot + 4 + ((short)i.IType.imm << 2));
-		break;
-
-	case OP_COP0:
-		switch (i.RType.rs) {
-		case OP_BCx:
-		case OP_BCy:
-			db_printf("bc0%c\t",
-			    "ft"[i.RType.rt & COPz_BC_TF_MASK]);
-			goto pr_displ;
-
-		case OP_MT:
-			db_printf("mtc0\t%s,%s",
-			    reg_name[i.RType.rt], c0_reg[i.RType.rd]);
-			break;
-
-		case OP_DMT:
-			db_printf("dmtc0\t%s,%s",
-			    reg_name[i.RType.rt], c0_reg[i.RType.rd]);
-			break;
-
-		case OP_MF:
-			db_printf("mfc0\t%s,%s",
-			    reg_name[i.RType.rt], c0_reg[i.RType.rd]);
-			break;
-
-		case OP_DMF:
-			db_printf("dmfc0\t%s,%s",
-			    reg_name[i.RType.rt], c0_reg[i.RType.rd]);
-			break;
-
-		default:
-			db_printf("%s", c0_opname[i.FRType.func]);
-		}
-		break;
-
-	case OP_COP1:
-		switch (i.RType.rs) {
-		case OP_BCx:
-		case OP_BCy:
-			db_printf("bc1%c\t",
-			    "ft"[i.RType.rt & COPz_BC_TF_MASK]);
-			goto pr_displ;
-
-		case OP_MT:
-			db_printf("mtc1\t%s,f%d",
-			    reg_name[i.RType.rt], i.RType.rd);
-			break;
-
-		case OP_MF:
-			db_printf("mfc1\t%s,f%d",
-			    reg_name[i.RType.rt], i.RType.rd);
-			break;
-
-		case OP_CT:
-			db_printf("ctc1\t%s,f%d",
-			    reg_name[i.RType.rt], i.RType.rd);
-			break;
-
-		case OP_CF:
-			db_printf("cfc1\t%s,f%d",
-			    reg_name[i.RType.rt], i.RType.rd);
-			break;
-
-		default:
-			db_printf("%s.%s\tf%d,f%d,f%d",
-			    cop1_name[i.FRType.func], fmt_name[i.FRType.fmt],
-			    i.FRType.fd, i.FRType.fs, i.FRType.ft);
-		}
-		break;
-
-	case OP_J:
-	case OP_JAL:
-		db_printf("%s\t", op_name[i.JType.op]);
-		db_printf("0x%8x",(mdbdot & 0xF0000000) | (i.JType.target << 2));
-		delay = 1;
-		break;
-
-	case OP_LWC1:
-	case OP_SWC1:
-		db_printf("%s\tf%d,", op_name[i.IType.op], i.IType.rt);
-		goto loadstore;
-
-	case OP_LB:
-	case OP_LH:
-	case OP_LW:
-	case OP_LD:
-	case OP_LBU:
-	case OP_LHU:
-	case OP_LWU:
-	case OP_SB:
-	case OP_SH:
-	case OP_SW:
-	case OP_SD:
-		db_printf("%s\t%s,", op_name[i.IType.op],
-		    reg_name[i.IType.rt]);
-	loadstore:
-		db_printf("%d(%s)", (short)i.IType.imm, reg_name[i.IType.rs]);
-		break;
-
-	case OP_ORI:
-	case OP_XORI:
-		if (i.IType.rs == 0) {
-			db_printf("li\t%s,0x%x",
-			    reg_name[i.IType.rt], i.IType.imm);
-			break;
-		}
-		/* FALLTHROUGH */
-	case OP_ANDI:
-		db_printf("%s\t%s,%s,0x%x", op_name[i.IType.op],
-		    reg_name[i.IType.rt], reg_name[i.IType.rs], i.IType.imm);
-		break;
-
-	case OP_LUI:
-		db_printf("%s\t%s,0x%x", op_name[i.IType.op],
-		    reg_name[i.IType.rt], i.IType.imm);
-		break;
-
-	case OP_ADDI:
-	case OP_DADDI:
-	case OP_ADDIU:
-	case OP_DADDIU:
-		if (i.IType.rs == 0) {
-			db_printf("li\t%s,%d", reg_name[i.IType.rt],
-			    (short)i.IType.imm);
-			break;
-		}
-		/* FALLTHROUGH */
-	default:
-		db_printf("%s\t%s,%s,%d", op_name[i.IType.op],
-		    reg_name[i.IType.rt], reg_name[i.IType.rs],
-		    (short)i.IType.imm);
-	}
-	db_printf("\n");
-	return (delay);
-}
diff --git a/sys/mips/mips/db_interface.c b/sys/mips/mips/db_interface.c
deleted file mode 100644
index 318dae82c7ed..000000000000
--- a/sys/mips/mips/db_interface.c
+++ /dev/null
@@ -1,349 +0,0 @@
-/*	$OpenBSD: db_machdep.c,v 1.2 1998/09/15 10:50:13 pefo Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1998 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed under OpenBSD by
- *	Per Fogelstrom, Opsycon AB, Sweden.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: db_interface.c,v 1.6.2.1 2007/08/29 12:24:49 girish
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/cons.h>
-#include <sys/lock.h>
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <sys/user.h>
-#include <sys/proc.h>
-#include <sys/reboot.h>
-
-#include <machine/cache.h>
-#include <machine/db_machdep.h>
-#include <machine/mips_opcode.h>
-#include <machine/vmparam.h>
-#include <machine/md_var.h>
-#include <machine/setjmp.h>
-
-#include <ddb/ddb.h>
-#include <ddb/db_sym.h>
-#include <ddb/db_access.h>
-#include <ddb/db_output.h>
-#include <ddb/db_variables.h>
-#include <sys/kdb.h>
-
-static db_varfcn_t db_frame;
-
-#define	DB_OFFSET(x)	(db_expr_t *)offsetof(struct trapframe, x)
-struct db_variable db_regs[] = {
-	{ "at",  DB_OFFSET(ast),	db_frame },
-	{ "v0",  DB_OFFSET(v0),		db_frame },
-	{ "v1",  DB_OFFSET(v1),		db_frame },
-	{ "a0",  DB_OFFSET(a0),		db_frame },
-	{ "a1",  DB_OFFSET(a1),		db_frame },
-	{ "a2",  DB_OFFSET(a2),		db_frame },
-	{ "a3",  DB_OFFSET(a3),		db_frame },
-#if defined(__mips_n32) || defined(__mips_n64)
-	{ "a4",  DB_OFFSET(a4),		db_frame },
-	{ "a5",  DB_OFFSET(a5),		db_frame },
-	{ "a6",  DB_OFFSET(a6),		db_frame },
-	{ "a7",  DB_OFFSET(a7),		db_frame },
-	{ "t0",  DB_OFFSET(t0),		db_frame },
-	{ "t1",  DB_OFFSET(t1),		db_frame },
-	{ "t2",  DB_OFFSET(t2),		db_frame },
-	{ "t3",  DB_OFFSET(t3),		db_frame },
-#else
-	{ "t0",  DB_OFFSET(t0),		db_frame },
-	{ "t1",  DB_OFFSET(t1),		db_frame },
-	{ "t2",  DB_OFFSET(t2),		db_frame },
-	{ "t3",  DB_OFFSET(t3),		db_frame },
-	{ "t4",  DB_OFFSET(t4),		db_frame },
-	{ "t5",  DB_OFFSET(t5),		db_frame },
-	{ "t6",  DB_OFFSET(t6),		db_frame },
-	{ "t7",  DB_OFFSET(t7),		db_frame },
-#endif
-	{ "s0",  DB_OFFSET(s0),		db_frame },
-	{ "s1",  DB_OFFSET(s1),		db_frame },
-	{ "s2",  DB_OFFSET(s2),		db_frame },
-	{ "s3",  DB_OFFSET(s3),		db_frame },
-	{ "s4",  DB_OFFSET(s4),		db_frame },
-	{ "s5",  DB_OFFSET(s5),		db_frame },
-	{ "s6",  DB_OFFSET(s6),		db_frame },
-	{ "s7",  DB_OFFSET(s7),		db_frame },
-	{ "t8",  DB_OFFSET(t8),		db_frame },
-	{ "t9",  DB_OFFSET(t9),		db_frame },
-	{ "k0",  DB_OFFSET(k0),		db_frame },
-	{ "k1",  DB_OFFSET(k1),		db_frame },
-	{ "gp",  DB_OFFSET(gp),		db_frame },
-	{ "sp",  DB_OFFSET(sp),		db_frame },
-	{ "s8",  DB_OFFSET(s8),		db_frame },
-	{ "ra",  DB_OFFSET(ra),		db_frame },
-	{ "sr",  DB_OFFSET(sr),		db_frame },
-	{ "lo",  DB_OFFSET(mullo),	db_frame },
-	{ "hi",  DB_OFFSET(mulhi),	db_frame },
-	{ "bad", DB_OFFSET(badvaddr),	db_frame },
-	{ "cs",  DB_OFFSET(cause),	db_frame },
-	{ "pc",  DB_OFFSET(pc),		db_frame },
-};
-struct db_variable *db_eregs = db_regs + nitems(db_regs);
-
-int (*do_db_log_stack_trace_cmd)(char *);
-
-static int
-db_frame(struct db_variable *vp, db_expr_t *valuep, int op)
-{
-	register_t *reg;
-
-	if (kdb_frame == NULL)
-		return (0);
-
-	reg = (register_t *)((uintptr_t)kdb_frame + (size_t)(intptr_t)vp->valuep);
-	if (op == DB_VAR_GET)
-		*valuep = *reg;
-	else
-		*reg = *valuep;
-	return (1);
-}
-
-int
-db_read_bytes(vm_offset_t addr, size_t size, char *data)
-{
-	jmp_buf jb;
-	void *prev_jb;
-	int ret;
-
-	prev_jb = kdb_jmpbuf(jb);
-	ret = setjmp(jb);
-	if (ret == 0) {
-		/*
-		 * 'addr' could be a memory-mapped I/O address.  Try to
-		 * do atomic load/store in unit of size requested.
-		 * size == 8 is only atomic on 64bit or n32 kernel.
-		 */
-		if ((size == 2 || size == 4 || size == 8) &&
-		    ((addr & (size -1)) == 0) &&
-		    (((vm_offset_t)data & (size -1)) == 0)) {
-			switch (size) {
-			case 2:
-				*(uint16_t *)data = *(uint16_t *)addr;
-				break;
-			case 4:
-				*(uint32_t *)data = *(uint32_t *)addr;
-				break;
-			case 8:
-				*(uint64_t *)data = *(uint64_t *)addr;
-				break;
-			}
-		} else {
-			char *src;
-
-			src = (char *)addr;
-			while (size-- > 0)
-				*data++ = *src++;
-		}
-	}
-
-	(void)kdb_jmpbuf(prev_jb);
-	return (ret);
-}
-
-int
-db_write_bytes(vm_offset_t addr, size_t size, char *data)
-{
-	int ret;
-	jmp_buf jb;
-	void *prev_jb;
-
-	prev_jb = kdb_jmpbuf(jb);
-	ret = setjmp(jb);
-
-	if (ret == 0) {
-		/*
-		 * 'addr' could be a memory-mapped I/O address.  Try to
-		 * do atomic load/store in unit of size requested.
-		 * size == 8 is only atomic on 64bit or n32 kernel.
-		 */
-		if ((size == 2 || size == 4 || size == 8) &&
-		    ((addr & (size -1)) == 0) &&
-		    (((vm_offset_t)data & (size -1)) == 0)) {
-			switch (size) {
-			case 2:
-				*(uint16_t *)addr = *(uint16_t *)data;
-				break;
-			case 4:
-				*(uint32_t *)addr = *(uint32_t *)data;
-				break;
-			case 8:
-				*(uint64_t *)addr = *(uint64_t *)data;
-				break;
-			}
-		} else {
-			char *dst;
-			size_t len = size;
-
-			dst = (char *)addr;
-			while (len-- > 0)
-				*dst++ = *data++;
-		}
-
-		mips_icache_sync_range((db_addr_t) addr, size);
-		mips_dcache_wbinv_range((db_addr_t) addr, size);
-	}
-	(void)kdb_jmpbuf(prev_jb);
-	return (ret);
-}
-
-/*
- *	To do a single step ddb needs to know the next address
- *	that we will get to. It means that we need to find out
- *	both the address for a branch taken and for not taken, NOT! :-)
- *	MipsEmulateBranch will do the job to find out _exactly_ which
- *	address we will end up at so the 'dual bp' method is not
- *	requiered.
- */
-db_addr_t
-next_instr_address(db_addr_t pc, boolean_t bd)
-{
-	db_addr_t next;
-
-	next = (db_addr_t)MipsEmulateBranch(kdb_frame, pc, 0, 0);
-	return (next);
-}
-
-/*
- *	Decode instruction and figure out type.
- */
-int
-db_inst_type(int ins)
-{
-	InstFmt inst;
-	int	ityp = 0;
-
-	inst.word = ins;
-	switch ((int)inst.JType.op) {
-	case OP_SPECIAL:
-		switch ((int)inst.RType.func) {
-		case OP_JR:
-			ityp = IT_BRANCH;
-			break;
-		case OP_JALR:
-		case OP_SYSCALL:
-			ityp = IT_CALL;
-			break;
-		}
-		break;
-
-	case OP_BCOND:
-		switch ((int)inst.IType.rt) {
-		case OP_BLTZ:
-		case OP_BLTZL:
-		case OP_BGEZ:
-		case OP_BGEZL:
-			ityp = IT_BRANCH;
-			break;
-
-		case OP_BLTZAL:
-		case OP_BLTZALL:
-		case OP_BGEZAL:
-		case OP_BGEZALL:
-			ityp = IT_CALL;
-			break;
-		}
-		break;
-
-	case OP_JAL:
-		ityp = IT_CALL;
-		break;
-
-	case OP_J:
-	case OP_BEQ:
-	case OP_BEQL:
-	case OP_BNE:
-	case OP_BNEL:
-	case OP_BLEZ:
-	case OP_BLEZL:
-	case OP_BGTZ:
-	case OP_BGTZL:
-		ityp = IT_BRANCH;
-		break;
-
-	case OP_COP1:
-		switch (inst.RType.rs) {
-		case OP_BCx:
-		case OP_BCy:
-			ityp = IT_BRANCH;
-			break;
-		}
-		break;
-
-	case OP_LB:
-	case OP_LH:
-	case OP_LW:
-	case OP_LD:
-	case OP_LBU:
-	case OP_LHU:
-	case OP_LWU:
-	case OP_LWC1:
-		ityp = IT_LOAD;
-		break;
-
-	case OP_SB:
-	case OP_SH:
-	case OP_SW:
-	case OP_SD:  
-	case OP_SWC1:
-		ityp = IT_STORE;
-		break;
-	}
-	return (ityp);
-}
-
-/*
- * Return the next pc if the given branch is taken.
- * MachEmulateBranch() runs analysis for branch delay slot.
- */
-db_addr_t
-branch_taken(int inst, db_addr_t pc)
-{
-	db_addr_t ra;
-	register_t fpucsr;
-
-	/* TBD: when is fsr set */
-	fpucsr = (curthread) ? curthread->td_pcb->pcb_regs.fsr : 0;
-	ra = (db_addr_t)MipsEmulateBranch(kdb_frame, pc, fpucsr, 0);
-	return (ra);
-}
diff --git a/sys/mips/mips/db_trace.c b/sys/mips/mips/db_trace.c
deleted file mode 100644
index 4903b6d3d432..000000000000
--- a/sys/mips/mips/db_trace.c
+++ /dev/null
@@ -1,446 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004-2005, Juniper Networks, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	JNPR: db_trace.c,v 1.8 2007/08/09 11:23:32 katta
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kdb.h>
-#include <sys/proc.h>
-#include <sys/stack.h>
-#include <sys/sysent.h>
-
-#include <machine/asm.h>
-#include <machine/db_machdep.h>
-#include <machine/md_var.h>
-#include <machine/mips_opcode.h>
-#include <machine/pcb.h>
-#include <machine/trap.h>
-
-#include <ddb/ddb.h>
-#include <ddb/db_sym.h>
-
-extern char _locore[];
-extern char _locoreEnd[];
-extern char edata[];
-
-/*
- * A function using a stack frame has the following instruction as the first
- * one: [d]addiu sp,sp,-<frame_size>
- *
- * We make use of this to detect starting address of a function. This works
- * better than using 'j ra' instruction to signify end of the previous
- * function (for e.g. functions like boot() or panic() do not actually
- * emit a 'j ra' instruction).
- *
- * XXX the abi does not require that the addiu instruction be the first one.
- */
-#define	MIPS_START_OF_FUNCTION(ins)	((((ins) & 0xffff8000) == 0x27bd8000) \
-	|| (((ins) & 0xffff8000) == 0x67bd8000))
-
-/*
- * LLD will insert invalid instruction traps between functions.
- * Currently this is 0xefefefef but it may change in the future.
- */
-#define	MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(ins)	((ins) == 0xefefefef)
-
-#if defined(__mips_n64)
-#	define	MIPS_IS_VALID_KERNELADDR(reg)	((((reg) & 3) == 0) && \
-					((vm_offset_t)(reg) >= MIPS_XKPHYS_START))
-#else
-#	define	MIPS_IS_VALID_KERNELADDR(reg)	((((reg) & 3) == 0) && \
-					((vm_offset_t)(reg) >= MIPS_KSEG0_START))
-#endif
-
-static void
-stacktrace_subr(register_t pc, register_t sp, register_t ra)
-{
-	InstFmt i;
-	/*
-	 * Arrays for a0..a3 registers and flags if content
-	 * of these registers is valid, e.g. obtained from the stack
-	 */
-	int valid_args[4];
-	register_t args[4];
-	register_t va, subr, cause, badvaddr;
-	unsigned instr, mask;
-	unsigned int frames = 0;
-	int more, stksize, j;
-	register_t	next_ra;
-	bool trapframe;
-
-/* Jump here when done with a frame, to start a new one */
-loop:
-
-	/*
-	 * Invalidate arguments values
-	 */
-	valid_args[0] = 0;
-	valid_args[1] = 0;
-	valid_args[2] = 0;
-	valid_args[3] = 0;
-	next_ra = 0;
-	stksize = 0;
-	subr = 0;
-	trapframe = false;
-	if (frames++ > 100) {
-		db_printf("\nstackframe count exceeded\n");
-		return;
-	}
-
-	/* Check for bad SP: could foul up next frame. */
-	if (!MIPS_IS_VALID_KERNELADDR(sp)) {
-		db_printf("SP 0x%jx: not in kernel\n", (uintmax_t)sp);
-		ra = 0;
-		subr = 0;
-		goto done;
-	}
-#define Between(x, y, z) \
-		( ((x) <= (y)) && ((y) < (z)) )
-#define pcBetween(a,b) \
-		Between((uintptr_t)a, pc, (uintptr_t)b)
-
-	/*
-	 * Check for current PC in  exception handler code that don't have a
-	 * preceding "j ra" at the tail of the preceding function. Depends
-	 * on relative ordering of functions in exception.S, swtch.S.
-	 */
-	if (pcBetween(MipsKernGenException, MipsUserGenException)) {
-		subr = (uintptr_t)MipsKernGenException;
-		trapframe = true;
-	} else if (pcBetween(MipsUserGenException, MipsKernIntr))
-		subr = (uintptr_t)MipsUserGenException;
-	else if (pcBetween(MipsKernIntr, MipsUserIntr)) {
-		subr = (uintptr_t)MipsKernIntr;
-		trapframe = true;
-	} else if (pcBetween(MipsUserIntr, MipsTLBInvalidException))
-		subr = (uintptr_t)MipsUserIntr;
-	else if (pcBetween(MipsTLBInvalidException, MipsTLBMissException)) {
-		subr = (uintptr_t)MipsTLBInvalidException;
-		if (pc == (uintptr_t)MipsKStackOverflow)
-			trapframe = true;
-	} else if (pcBetween(fork_trampoline, savectx))
-		subr = (uintptr_t)fork_trampoline;
-	else if (pcBetween(savectx, cpu_throw))
-		subr = (uintptr_t)savectx;
-	else if (pcBetween(cpu_throw, cpu_switch))
-		subr = (uintptr_t)cpu_throw;
-	else if (pcBetween(cpu_switch, MipsSwitchFPState))
-		subr = (uintptr_t)cpu_switch;
-	else if (pcBetween(_locore, _locoreEnd)) {
-		subr = (uintptr_t)_locore;
-		ra = 0;
-		goto done;
-	}
-
-	/* Check for bad PC. */
-	if (!MIPS_IS_VALID_KERNELADDR(pc)) {
-		db_printf("PC 0x%jx: not in kernel\n", (uintmax_t)pc);
-		ra = 0;
-		goto done;
-	}
-
-	/*
-	 * For a trapframe, skip to the output and afterwards pull the
-	 * previous registers out of the trapframe instead of decoding
-	 * the function prologue.
-	 */
-	if (trapframe)
-		goto done;
-
-	/*
-	 * Find the beginning of the current subroutine by scanning
-	 * backwards from the current PC for the end of the previous
-	 * subroutine.
-	 */
-	if (!subr) {
-		va = pc;
-		while (1) {
-			instr = kdbpeek((int *)va);
-
-			/* LLD fills padding between functions with 0xefefefef */
-			if (MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(instr))
-				break;
-
-			if (MIPS_START_OF_FUNCTION(instr))
-				break;
-
- 			va -= sizeof(int);
-		}
-
-		/*
-		 * Skip over nulls/trap padding which might separate
-		 * object files or functions.
-		 */
-		instr = kdbpeek((int *)va);
-		while (instr == 0 || MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(instr)) {
-			va += sizeof(int);
-			instr = kdbpeek((int *)va);
-		}
-		subr = va;
-	}
-
-	/* scan forwards to find stack size and any saved registers */
-	stksize = 0;
-	more = 3;
-	mask = 0;
-	for (va = subr; more; va += sizeof(int),
-	    more = (more == 3) ? 3 : more - 1) {
-		/* stop if hit our current position */
-		if (va >= pc)
-			break;
-		instr = kdbpeek((int *)va);
-		i.word = instr;
-		switch (i.JType.op) {
-		case OP_SPECIAL:
-			switch (i.RType.func) {
-			case OP_JR:
-			case OP_JALR:
-				more = 2;	/* stop after next instruction */
-				break;
-
-			case OP_SYSCALL:
-			case OP_BREAK:
-				more = 1;	/* stop now */
-			}
-			break;
-
-		case OP_BCOND:
-		case OP_J:
-		case OP_JAL:
-		case OP_BEQ:
-		case OP_BNE:
-		case OP_BLEZ:
-		case OP_BGTZ:
-			more = 2;	/* stop after next instruction */
-			break;
-
-		case OP_COP0:
-		case OP_COP1:
-		case OP_COP2:
-		case OP_COP3:
-			switch (i.RType.rs) {
-			case OP_BCx:
-			case OP_BCy:
-				more = 2;	/* stop after next instruction */
-			}
-			break;
-
-		case OP_SW:
-			/* look for saved registers on the stack */
-			if (i.IType.rs != 29)
-				break;
-			/*
-			 * only restore the first one except RA for
-			 * MipsKernGenException case
-			 */
-			if (mask & (1 << i.IType.rt)) {
-				if (subr == (uintptr_t)MipsKernGenException &&
-				    i.IType.rt == 31)
-					next_ra = kdbpeek((int *)(sp +
-					    (short)i.IType.imm));
-				break;
-			}
-			mask |= (1 << i.IType.rt);
-			switch (i.IType.rt) {
-			case 4:/* a0 */
-				args[0] = kdbpeek((int *)(sp + (short)i.IType.imm));
-				valid_args[0] = 1;
-				break;
-
-			case 5:/* a1 */
-				args[1] = kdbpeek((int *)(sp + (short)i.IType.imm));
-				valid_args[1] = 1;
-				break;
-
-			case 6:/* a2 */
-				args[2] = kdbpeek((int *)(sp + (short)i.IType.imm));
-				valid_args[2] = 1;
-				break;
-
-			case 7:/* a3 */
-				args[3] = kdbpeek((int *)(sp + (short)i.IType.imm));
-				valid_args[3] = 1;
-				break;
-
-			case 31:	/* ra */
-				ra = kdbpeek((int *)(sp + (short)i.IType.imm));
-			}
-			break;
-
-		case OP_SD:
-			/* look for saved registers on the stack */
-			if (i.IType.rs != 29)
-				break;
-			/* only restore the first one */
-			if (mask & (1 << i.IType.rt))
-				break;
-			mask |= (1 << i.IType.rt);
-			switch (i.IType.rt) {
-			case 4:/* a0 */
-				args[0] = kdbpeekd((int *)(sp + (short)i.IType.imm));
-				valid_args[0] = 1;
-				break;
-
-			case 5:/* a1 */
-				args[1] = kdbpeekd((int *)(sp + (short)i.IType.imm));
-				valid_args[1] = 1;
-				break;
-
-			case 6:/* a2 */
-				args[2] = kdbpeekd((int *)(sp + (short)i.IType.imm));
-				valid_args[2] = 1;
-				break;
-
-			case 7:/* a3 */
-				args[3] = kdbpeekd((int *)(sp + (short)i.IType.imm));
-				valid_args[3] = 1;
-				break;
-
-			case 31:	/* ra */
-				ra = kdbpeekd((int *)(sp + (short)i.IType.imm));
-			}
-			break;
-
-		case OP_ADDI:
-		case OP_ADDIU:
-		case OP_DADDI:
-		case OP_DADDIU:
-			/* look for stack pointer adjustment */
-			if (i.IType.rs != 29 || i.IType.rt != 29)
-				break;
-			stksize = -((short)i.IType.imm);
-		}
-	}
-
-done:
-	db_printsym(pc, DB_STGY_PROC);
-	db_printf(" (");
-	for (j = 0; j < 4; j ++) {
-		if (j > 0)
-			db_printf(",");
-		if (valid_args[j])
-			db_printf("%jx", (uintmax_t)(u_register_t)args[j]);
-		else
-			db_printf("?");
-	}
-
-	db_printf(") ra %jx sp %jx sz %d\n",
-	    (uintmax_t)(u_register_t) ra,
-	    (uintmax_t)(u_register_t) sp,
-	    stksize);
-
-	if (trapframe) {
-#define	TF_REG(base, reg)	((base) + CALLFRAME_SIZ + ((reg) * SZREG))
-#if defined(__mips_n64) || defined(__mips_n32)
-		pc = kdbpeekd((int *)TF_REG(sp, PC));
-		ra = kdbpeekd((int *)TF_REG(sp, RA));
-		sp = kdbpeekd((int *)TF_REG(sp, SP));
-		cause = kdbpeekd((int *)TF_REG(sp, CAUSE));
-		badvaddr = kdbpeekd((int *)TF_REG(sp, BADVADDR));
-#else
-		pc = kdbpeek((int *)TF_REG(sp, PC));
-		ra = kdbpeek((int *)TF_REG(sp, RA));
-		sp = kdbpeek((int *)TF_REG(sp, SP));
-		cause = kdbpeek((int *)TF_REG(sp, CAUSE));
-		badvaddr = kdbpeek((int *)TF_REG(sp, BADVADDR));
-#endif
-#undef TF_REG
-		db_printf("--- exception, cause %jx badvaddr %jx ---\n",
-		    (uintmax_t)cause, (uintmax_t)badvaddr);
-		goto loop;
-	} else if (ra) {
-		/*
-		 * We subtract two instructions from ra to convert it
-		 * from a return address to a calling address,
-		 * accounting for the delay slot.
-		 */
-		register_t next_pc = ra - 2 * sizeof(int);
-		if (pc == next_pc && stksize == 0)
-			db_printf("stacktrace: loop!\n");
-		else {
-			pc = next_pc;
-			sp += stksize;
-			ra = next_ra;
-			goto loop;
-		}
-	}
-}
-
-void
-db_md_list_watchpoints()
-{
-}
-
-void
-db_trace_self(void)
-{
-	register_t pc, ra, sp;
-
-	sp = (register_t)(intptr_t)__builtin_frame_address(0);
-	ra = (register_t)(intptr_t)__builtin_return_address(0);
-
-	__asm __volatile(
-		"jal 99f\n"
-		"nop\n"
-		"99:\n"
-		 "move %0, $31\n" /* get ra */
-		 "move $31, %1\n" /* restore ra */
-		 : "=r" (pc)
-		 : "r" (ra));
-	stacktrace_subr(pc, sp, ra);
-	return;
-}
-
-int
-db_trace_thread(struct thread *thr, int count)
-{
-	register_t pc, ra, sp;
-	struct pcb *ctx;
-
-	ctx = kdb_thr_ctx(thr);
-	sp = (register_t)ctx->pcb_context[PCB_REG_SP];
-	pc = (register_t)ctx->pcb_context[PCB_REG_PC];
-	ra = (register_t)ctx->pcb_context[PCB_REG_RA];
-	stacktrace_subr(pc, sp, ra);
-
-	return (0);
-}
-
-void
-db_show_mdpcpu(struct pcpu *pc)
-{
-
-	db_printf("ipis         = 0x%x\n", pc->pc_pending_ipis);
-	db_printf("next ASID    = %d\n", pc->pc_next_asid);
-	db_printf("GENID        = %d\n", pc->pc_asid_generation);
-	return;
-}
diff --git a/sys/mips/mips/dump_machdep.c b/sys/mips/mips/dump_machdep.c
deleted file mode 100644
index 2e8540118b95..000000000000
--- a/sys/mips/mips/dump_machdep.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/kerneldump.h>
-#include <sys/sysctl.h>
-
-#include <machine/cache.h>
-#include <machine/dump.h>
-
-int do_minidump = 1;
-SYSCTL_INT(_debug, OID_AUTO, minidump, CTLFLAG_RWTUN, &do_minidump, 0,
-    "Enable mini crash dumps");
-
-void
-dumpsys_wbinv_all(void)
-{
-
-	/* Make sure we write coherent datas. */
-	mips_dcache_wbinv_all();
-}
-
-void
-dumpsys_map_chunk(vm_paddr_t pa, size_t chunk __unused, void **va)
-{
-
-	*va = (void *)(intptr_t)pa;
-}
diff --git a/sys/mips/mips/elf_machdep.c b/sys/mips/mips/elf_machdep.c
deleted file mode 100644
index c6a45f71107b..000000000000
--- a/sys/mips/mips/elf_machdep.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 1996-1998 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	from: src/sys/i386/i386/elf_machdep.c,v 1.20 2004/08/11 02:35:05 marcel
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/linker.h>
-#include <sys/sysent.h>
-#include <sys/imgact_elf.h>
-#include <sys/proc.h>
-#include <sys/syscall.h>
-#include <sys/signalvar.h>
-#include <sys/vnode.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_param.h>
-
-#include <machine/elf.h>
-#include <machine/md_var.h>
-#include <machine/cache.h>
-
-static struct sysentvec elf_freebsd_sysvec = {
-	.sv_size	= SYS_MAXSYSCALL,
-	.sv_table	= sysent,
-	.sv_transtrap	= NULL,
-	.sv_fixup	= __elfN(freebsd_fixup),
-	.sv_sendsig	= sendsig,
-	.sv_sigcode	= sigcode,
-	.sv_szsigcode	= &szsigcode,
-#ifdef __mips_n64
-	.sv_name	= "FreeBSD ELF64",
-#else
-	.sv_name	= "FreeBSD ELF32",
-#endif
-	.sv_coredump	= __elfN(coredump),
-	.sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR,
-	.sv_elf_core_prepare_notes = __elfN(prepare_notes),
-	.sv_imgact_try	= NULL,
-	.sv_minsigstksz	= MINSIGSTKSZ,
-	.sv_minuser	= VM_MIN_ADDRESS,
-	.sv_maxuser	= VM_MAXUSER_ADDRESS,
-	.sv_usrstack	= USRSTACK,
-	.sv_psstrings	= PS_STRINGS,
-	.sv_stackprot	= VM_PROT_ALL,
-	.sv_copyout_auxargs = __elfN(freebsd_copyout_auxargs),
-	.sv_copyout_strings = exec_copyout_strings,
-	.sv_setregs	= exec_setregs,
-	.sv_fixlimit	= NULL,
-	.sv_maxssiz	= NULL,
-	.sv_flags	= SV_ABI_FREEBSD | SV_ASLR | SV_RNG_SEED_VER |
-#ifdef __mips_n64
-	    SV_LP64,
-#else
-	    SV_ILP32,
-#endif
-	.sv_set_syscall_retval = cpu_set_syscall_retval,
-	.sv_fetch_syscall_args = cpu_fetch_syscall_args,
-	.sv_syscallnames = syscallnames,
-	.sv_schedtail	= NULL,
-	.sv_thread_detach = NULL,
-	.sv_trap	= NULL,
-	.sv_onexec_old	= exec_onexec_old,
-	.sv_onexit	= exit_onexit,
-};
-
-static __ElfN(Brandinfo) freebsd_brand_info = {
-	.brand		= ELFOSABI_FREEBSD,
-	.machine	= EM_MIPS,
-	.compat_3_brand	= "FreeBSD",
-	.emul_path	= NULL,
-	.interp_path	= "/libexec/ld-elf.so.1",
-	.sysvec		= &elf_freebsd_sysvec,
-	.interp_newpath	= NULL,
-	.brand_note	= &__elfN(freebsd_brandnote),
-	.flags		= BI_CAN_EXEC_DYN | BI_BRAND_NOTE
-};
-
-SYSINIT(elf, SI_SUB_EXEC, SI_ORDER_ANY,
-    (sysinit_cfunc_t) __elfN(insert_brand_entry),
-    &freebsd_brand_info);
-
-void
-__elfN(dump_thread)(struct thread *td __unused, void *dst __unused,
-    size_t *off __unused)
-{
-}
-
-/*
- * The following MIPS relocation code for tracking multiple
- * consecutive HI32/LO32 entries is because of the following:
- *
- * https://dmz-portal.mips.com/wiki/MIPS_relocation_types
- *
- * ===
- *
- * + R_MIPS_HI16
- *
- * An R_MIPS_HI16 must be followed eventually by an associated R_MIPS_LO16
- * relocation record in the same SHT_REL section. The contents of the two
- * fields to be relocated are combined to form a full 32-bit addend AHL.
- * An R_MIPS_LO16 entry which does not immediately follow a R_MIPS_HI16 is
- * combined with the most recent one encountered, i.e. multiple R_MIPS_LO16
- * entries may be associated with a single R_MIPS_HI16. Use of these
- * relocation types in a SHT_REL section is discouraged and may be
- * forbidden to avoid this complication.
- *
- * A GNU extension allows multiple R_MIPS_HI16 records to share the same
- * R_MIPS_LO16 relocation record(s). The association works like this within
- * a single relocation section:
- *
- * + From the beginning of the section moving to the end of the section,
- *   until R_MIPS_LO16 is not found each found R_MIPS_HI16 relocation will
- *   be associated with the first R_MIPS_LO16.
- *
- * + Until another R_MIPS_HI16 record is found all found R_MIPS_LO16
- *   relocations found are associated with the last R_MIPS_HI16.
- *
- * ===
- *
- * This is so gcc can do dead code detection/removal without having to
- * generate HI/LO pairs even if one of them would be deleted.
- *
- * So, the summary is:
- *
- * + A HI16 entry must occur before any LO16 entries;
- * + Multiple consecutive HI16 RELA entries need to be buffered until the
- *   first LO16 RELA entry occurs - and then all HI16 RELA relocations use
- *   the offset in the LOW16 RELA for calculating their offsets;
- * + The last HI16 RELA entry before a LO16 RELA entry is used (the AHL)
- *   for the first subsequent LO16 calculation;
- * + If multiple consecutive LO16 RELA entries occur, only the first
- *   LO16 RELA entry triggers an update of buffered HI16 RELA entries;
- *   any subsequent LO16 RELA entry before another HI16 RELA entry will
- *   not cause any further updates to the HI16 RELA entries.
- *
- * Additionally, flush out any outstanding HI16 entries that don't have
- * a LO16 entry in case some garbage entries are left in the file.
- */
-
-struct mips_tmp_reloc;
-struct mips_tmp_reloc {
-	struct mips_tmp_reloc *next;
-
-	Elf_Addr ahl;
-	Elf32_Addr *where_hi16;
-};
-
-static struct mips_tmp_reloc *ml = NULL;
-
-/*
- * Add a temporary relocation (ie, a HI16 reloc type.)
- */
-static int
-mips_tmp_reloc_add(Elf_Addr ahl, Elf32_Addr *where_hi16)
-{
-	struct mips_tmp_reloc *r;
-
-	r = malloc(sizeof(struct mips_tmp_reloc), M_TEMP, M_NOWAIT);
-	if (r == NULL) {
-		printf("%s: failed to malloc\n", __func__);
-		return (0);
-	}
-
-	r->ahl = ahl;
-	r->where_hi16 = where_hi16;
-	r->next = ml;
-	ml = r;
-
-	return (1);
-}
-
-/*
- * Flush the temporary relocation list.
- *
- * This should be done after a file is completely loaded
- * so no stale relocations exist to confuse the next
- * load.
- */
-static void
-mips_tmp_reloc_flush(void)
-{
-	struct mips_tmp_reloc *r, *rn;
-
-	r = ml;
-	ml = NULL;
-	while (r != NULL) {
-		rn = r->next;
-		free(r, M_TEMP);
-		r = rn;
-	}
-}
-
-/*
- * Get an entry from the reloc list; or NULL if we've run out.
- */
-static struct mips_tmp_reloc *
-mips_tmp_reloc_get(void)
-{
-	struct mips_tmp_reloc *r;
-
-	r = ml;
-	if (r == NULL)
-		return (NULL);
-	ml = ml->next;
-	return (r);
-}
-
-/*
- * Free a relocation entry.
- */
-static void
-mips_tmp_reloc_free(struct mips_tmp_reloc *r)
-{
-
-	free(r, M_TEMP);
-}
-
-bool
-elf_is_ifunc_reloc(Elf_Size r_info __unused)
-{
-
-	return (false);
-}
-
-/* Process one elf relocation with addend. */
-static int
-elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
-    int type, int local, elf_lookup_fn lookup)
-{
-	Elf32_Addr *where = (Elf32_Addr *)NULL;
-	Elf_Addr addr;
-	Elf_Addr addend = (Elf_Addr)0;
-	Elf_Word rtype = (Elf_Word)0, symidx;
-	struct mips_tmp_reloc *r;
-	const Elf_Rel *rel = NULL;
-	const Elf_Rela *rela = NULL;
-	int error;
-
-	/* Store the last seen ahl from a HI16 for LO16 processing */
-	static Elf_Addr last_ahl;
-
-	switch (type) {
-	case ELF_RELOC_REL:
-		rel = (const Elf_Rel *)data;
-		where = (Elf32_Addr *) (relocbase + rel->r_offset);
-		rtype = ELF_R_TYPE(rel->r_info);
-		symidx = ELF_R_SYM(rel->r_info);
-		switch (rtype) {
-		case R_MIPS_64:
-			addend = *(Elf64_Addr *)where;
-			break;
-		default:
-			addend = *where;
-			break;
-		}
-
-		break;
-	case ELF_RELOC_RELA:
-		rela = (const Elf_Rela *)data;
-		where = (Elf32_Addr *) (relocbase + rela->r_offset);
-		addend = rela->r_addend;
-		rtype = ELF_R_TYPE(rela->r_info);
-		symidx = ELF_R_SYM(rela->r_info);
-		break;
-	default:
-		panic("unknown reloc type %d\n", type);
-	}
-
-	switch (rtype) {
-	case R_MIPS_NONE:	/* none */
-		break;
-
-	case R_MIPS_32:		/* S + A */
-		error = lookup(lf, symidx, 1, &addr);
-		if (error != 0)
-			return (-1);
-		addr += addend;
-		if (*where != addr)
-			*where = (Elf32_Addr)addr;
-		break;
-
-	case R_MIPS_26:		/* ((A << 2) | (P & 0xf0000000) + S) >> 2 */
-		error = lookup(lf, symidx, 1, &addr);
-		if (error != 0)
-			return (-1);
-
-		addend &= 0x03ffffff;
-		/*
-		 * Addendum for .rela R_MIPS_26 is not shifted right
-		 */
-		if (rela == NULL)
-			addend <<= 2;
-
-		addr += ((Elf_Addr)where & 0xf0000000) | addend;
-		addr >>= 2;
-
-		*where &= ~0x03ffffff;
-		*where |= addr & 0x03ffffff;
-		break;
-
-	case R_MIPS_64:		/* S + A */
-		error = lookup(lf, symidx, 1, &addr);
-		if (error != 0)
-			return (-1);
-		addr += addend;
-		if (*(Elf64_Addr*)where != addr)
-			*(Elf64_Addr*)where = addr;
-		break;
-
-	/*
-	 * Handle the two GNU extension cases:
-	 *
-	 * + Multiple HI16s followed by a LO16, and
-	 * + A HI16 followed by multiple LO16s.
-	 *
-	 * The former is tricky - the HI16 relocations need
-	 * to be buffered until a LO16 occurs, at which point
-	 * each HI16 is replayed against the LO16 relocation entry
-	 * (with the relevant overflow information.)
-	 *
-	 * The latter should be easy to handle - when the
-	 * first LO16 is seen, write out and flush the
-	 * HI16 buffer.  Any subsequent LO16 entries will
-	 * find a blank relocation buffer.
-	 *
-	 */
-
-	case R_MIPS_HI16:	/* ((AHL + S) - ((short)(AHL + S)) >> 16 */
-		if (rela != NULL) {
-			error = lookup(lf, symidx, 1, &addr);
-			if (error != 0)
-				return (-1);
-			addr += addend;
-			*where &= 0xffff0000;
-			*where |= ((((long long) addr + 0x8000LL) >> 16) & 0xffff);
-		} else {
-			/*
-			 * Add a temporary relocation to the list;
-			 * will pop it off / free the list when
-			 * we've found a suitable HI16.
-			 */
-			if (mips_tmp_reloc_add(addend << 16, where) == 0)
-				return (-1);
-			/*
-			 * Track the last seen HI16 AHL for use by
-			 * the first LO16 AHL calculation.
-			 *
-			 * The assumption is any intermediary deleted
-			 * LO16's were optimised out, so the last
-			 * HI16 before the LO16 is the "true" relocation
-			 * entry to use for that LO16 write.
-			 */
-			last_ahl = addend << 16;
-		}
-		break;
-
-	case R_MIPS_LO16:	/* AHL + S */
-		if (rela != NULL) {
-			error = lookup(lf, symidx, 1, &addr);
-			if (error != 0)
-				return (-1);
-			addr += addend;
-			*where &= 0xffff0000;
-			*where |= addr & 0xffff;
-		} else {
-			Elf_Addr tmp_ahl;
-			Elf_Addr tmp_addend;
-
-			tmp_ahl = last_ahl + (int16_t) addend;
-			error = lookup(lf, symidx, 1, &addr);
-			if (error != 0)
-				return (-1);
-
-			tmp_addend = addend & 0xffff0000;
-
-			/* Use the last seen ahl for calculating addend */
-			tmp_addend |= (uint16_t)(tmp_ahl + addr);
-			*where = tmp_addend;
-
-			/*
-			 * This logic implements the "we saw multiple HI16
-			 * before a LO16" assignment /and/ "we saw multiple
-			 * LO16s".
-			 *
-			 * Multiple LO16s will be handled as a blank
-			 * relocation list.
-			 *
-			 * Multple HI16's are iterated over here.
-			 */
-			while ((r = mips_tmp_reloc_get()) != NULL) {
-				Elf_Addr rahl;
-
-				/*
-				 * We have the ahl from the HI16 entry, so
-				 * offset it by the 16 bits of the low ahl.
-				 */
-				rahl = r->ahl;
-				rahl += (int16_t) addend;
-
-				tmp_addend = *(r->where_hi16);
-				tmp_addend &= 0xffff0000;
-				tmp_addend |= ((rahl + addr) -
-				    (int16_t)(rahl + addr)) >> 16;
-				*(r->where_hi16) = tmp_addend;
-				mips_tmp_reloc_free(r);
-			}
-		}
-
-		break;
-
-	case R_MIPS_HIGHER:	/* %higher(A+S) */
-		error = lookup(lf, symidx, 1, &addr);
-		if (error != 0)
-			return (-1);
-		addr += addend;
-		*where &= 0xffff0000;
-		*where |= (((long long)addr + 0x80008000LL) >> 32) & 0xffff;
-		break;
-
-	case R_MIPS_HIGHEST:	/* %highest(A+S) */
-		error = lookup(lf, symidx, 1, &addr);
-		if (error != 0)
-			return (-1);
-		addr += addend;
-		*where &= 0xffff0000;
-		*where |= (((long long)addr + 0x800080008000LL) >> 48) & 0xffff;
-		break;
-
-	default:
-		printf("kldload: unexpected relocation type %d, "
-		    "symbol index %d\n", rtype, symidx);
-		return (-1);
-	}
-
-	return (0);
-}
-
-int
-elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type,
-    elf_lookup_fn lookup)
-{
-
-	return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup));
-}
-
-int
-elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data,
-    int type, elf_lookup_fn lookup)
-{
-
-	return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup));
-}
-
-int
-elf_cpu_load_file(linker_file_t lf __unused)
-{
-
-	/*
-	 * Sync the I and D caches to make sure our relocations are visible.
-	 */
-	mips_icache_sync_all();
-
-	/* Flush outstanding relocations */
-	mips_tmp_reloc_flush();
-
-	return (0);
-}
-
-int
-elf_cpu_unload_file(linker_file_t lf __unused)
-{
-
-	return (0);
-}
-
-int
-elf_cpu_parse_dynamic(caddr_t loadbase __unused, Elf_Dyn *dynamic __unused)
-{
-
-	return (0);
-}
diff --git a/sys/mips/mips/elf_trampoline.c b/sys/mips/mips/elf_trampoline.c
deleted file mode 100644
index dafd24bd4d25..000000000000
--- a/sys/mips/mips/elf_trampoline.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <machine/asm.h>
-#include <sys/param.h>
-
-#if ELFSIZE == 64
-#include <sys/elf64.h>
-#else
-#include <sys/elf32.h>
-#endif
-
-/*
- * Since we are compiled outside of the normal kernel build process, we
- * need to include opt_global.h manually.
- */
-#include "opt_global.h"
-
-#include <machine/elf.h>
-#include <machine/cpufunc.h>
-#include <machine/stdarg.h>
-
-#ifndef KERNNAME
-#error Kernel name not provided
-#endif
-
-extern char kernel_start[];
-extern char kernel_end[];
-
-static __inline void *
-memcpy(void *dst, const void *src, size_t len)
-{
-	const char *s = src;
-    	char *d = dst;
-
-	while (len) {
-		if (0 && len >= 4 && !((vm_offset_t)d & 3) &&
-		    !((vm_offset_t)s & 3)) {
-			*(uint32_t *)d = *(uint32_t *)s;
-			s += 4;
-			d += 4;
-			len -= 4;
-		} else {
-			*d++ = *s++;
-			len--;
-		}
-	}
-	return (dst);
-}
-
-static __inline void
-bzero(void *addr, size_t count)
-{
-	char *tmp = (char *)addr;
-
-	while (count > 0) {
-		if (count >= 4 && !((vm_offset_t)tmp & 3)) {
-			*(uint32_t *)tmp = 0;
-			tmp += 4;
-			count -= 4;
-		} else {
-			*tmp = 0;
-			tmp++;
-			count--;
-		}
-	}
-}
-
-/*
- * Convert number to pointer, truncate on 64->32 case, sign extend
- * in 32->64 case
- */
-#define	mkptr(x)	((void *)(intptr_t)(int)(x))
-
-/*
- * Relocate PT_LOAD segments of kernel ELF image to their respective
- * virtual addresses and return entry point
- */
-void *
-load_kernel(void * kstart)
-{
-#if ELFSIZE == 64
-	Elf64_Ehdr *eh;
-	Elf64_Phdr phdr[64] /* XXX */;
-	Elf64_Shdr shdr[64] /* XXX */;
-#else
-	Elf32_Ehdr *eh;
-	Elf32_Phdr phdr[64] /* XXX */;
-	Elf32_Shdr shdr[64] /* XXX */;
-#endif
-	int i, j;
-	void *entry_point;
-	vm_offset_t loadend = 0;
-	intptr_t lastaddr;
-	int symtabindex = -1;
-	int symstrindex = -1;
-	Elf_Size tmp;
-
-#if ELFSIZE == 64
-	eh = (Elf64_Ehdr *)kstart;
-#else
-	eh = (Elf32_Ehdr *)kstart;
-#endif
-	entry_point = mkptr(eh->e_entry);
-	memcpy(phdr, (void *)(kstart + eh->e_phoff),
-	    eh->e_phnum * sizeof(phdr[0]));
-
-	memcpy(shdr, (void *)(kstart + eh->e_shoff),
-	    sizeof(*shdr) * eh->e_shnum);
-
-	if (eh->e_shnum * eh->e_shentsize != 0 && eh->e_shoff != 0) {
-		for (i = 0; i < eh->e_shnum; i++) {
-			if (shdr[i].sh_type == SHT_SYMTAB) {
-				/*
-				 * XXX: check if .symtab is in PT_LOAD?
-				 */
-				if (shdr[i].sh_offset != 0 && 
-				    shdr[i].sh_size != 0) {
-					symtabindex = i;
-					symstrindex = shdr[i].sh_link;
-				}
-			}
-		}
-	}
-
-	/*
-	 * Copy loadable segments
-	 */
-	for (i = 0; i < eh->e_phnum; i++) {
-		volatile char c;
-
-		if (phdr[i].p_type != PT_LOAD)
-			continue;
-		
-		memcpy(mkptr(phdr[i].p_vaddr),
-		    (void*)(kstart + phdr[i].p_offset), phdr[i].p_filesz);
-
-		/* Clean space from oversized segments, eg: bss. */
-		if (phdr[i].p_filesz < phdr[i].p_memsz)
-			bzero(mkptr(phdr[i].p_vaddr + phdr[i].p_filesz),
-			    phdr[i].p_memsz - phdr[i].p_filesz);
-
-		if (loadend < phdr[i].p_vaddr + phdr[i].p_memsz)
-			loadend = phdr[i].p_vaddr + phdr[i].p_memsz;
-	}
-
-	/* Now grab the symbol tables. */
-	lastaddr = (intptr_t)(int)loadend;
-	if (symtabindex >= 0 && symstrindex >= 0) {
-		tmp = SYMTAB_MAGIC;
-		memcpy((void *)lastaddr, &tmp, sizeof(tmp));
-		lastaddr += sizeof(Elf_Size);
-		tmp = shdr[symtabindex].sh_size +
-		    shdr[symstrindex].sh_size + 2*sizeof(Elf_Size);
-		memcpy((void *)lastaddr, &tmp, sizeof(tmp));
-		lastaddr += sizeof(Elf_Size);
-		/* .symtab size */
-		tmp = shdr[symtabindex].sh_size;
-		memcpy((void *)lastaddr, &tmp, sizeof(tmp));
-		lastaddr += sizeof(shdr[symtabindex].sh_size);
-		/* .symtab data */
-		memcpy((void*)lastaddr,
-		    shdr[symtabindex].sh_offset + kstart,
-		    shdr[symtabindex].sh_size);
-		lastaddr += shdr[symtabindex].sh_size;
-
-		/* .strtab size */
-		tmp = shdr[symstrindex].sh_size;
-		memcpy((void *)lastaddr, &tmp, sizeof(tmp));
-		lastaddr += sizeof(shdr[symstrindex].sh_size);
-
-		/* .strtab data */
-		memcpy((void*)lastaddr,
-		    shdr[symstrindex].sh_offset + kstart,
-		    shdr[symstrindex].sh_size);
-	} else {
-		/* Do not take any chances */
-		tmp = 0;
-		memcpy((void *)lastaddr, &tmp, sizeof(tmp));
-	}
-
-	return entry_point;
-}
-
-void
-_startC(register_t a0, register_t a1, register_t a2, register_t a3)
-{
-	unsigned int * code;
-	int i;
-	void (*entry_point)(register_t, register_t, register_t, register_t);
-
-	/* 
-	 * Relocate segment to the predefined memory location
-	 * Most likely it will be KSEG0/KSEG1 address
-	 */
-	entry_point = load_kernel(kernel_start);
-
-	/* Pass saved registers to original _start */
-	entry_point(a0, a1, a2, a3);
-}
diff --git a/sys/mips/mips/exception.S b/sys/mips/mips/exception.S
deleted file mode 100644
index 719904ac83b7..000000000000
--- a/sys/mips/mips/exception.S
+++ /dev/null
@@ -1,1244 +0,0 @@
-/*	$OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Digital Equipment Corporation and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Copyright (C) 1989 Digital Equipment Corporation.
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby granted,
- * provided that the above copyright notice appears in all copies.
- * Digital Equipment Corporation makes no representations about the
- * suitability of this software for any purpose.  It is provided "as is"
- * without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
- *	v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
- *	v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
- *	v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
- *	from: @(#)locore.s	8.5 (Berkeley) 1/4/94
- *	JNPR: exception.S,v 1.5 2007/01/08 04:58:37 katta
- * $FreeBSD$
- */
-
-/*
- *	Contains code that is the first executed at boot time plus
- *	assembly language support routines.
- */
-
-#include "opt_ddb.h"
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/regnum.h>
-#include <machine/cpuregs.h>
-#include <machine/pte.h>
-#include <machine/pcb.h>
-
-#include "assym.inc"
-
-	.set	noreorder		# Noreorder is default style!
-
-#ifdef KDTRACE_HOOKS
-	.data
-	.globl	dtrace_invop_calltrap_addr
-	.align	4
-	.type	dtrace_invop_calltrap_addr, @object
-        .size	dtrace_invop_calltrap_addr, 8
-dtrace_invop_calltrap_addr:
-	.word	0
-	.word	0
-
-	.text
-#endif
-
-/*
- *----------------------------------------------------------------------------
- *
- * MipsTLBMiss --
- *
- *	Vector code for the TLB-miss exception vector 0x80000000.
- *
- * This code is copied to the TLB exception vector address to
- * which the CPU jumps in response to an exception or a TLB miss.
- * NOTE: This code must be position independent!!!
- *
- *
- */
-VECTOR(MipsTLBMiss, unknown)
-	.set push
-	.set noat
-	j	MipsDoTLBMiss
-	MFC0	k0, MIPS_COP_0_BAD_VADDR	# get the fault address
-	.set pop
-VECTOR_END(MipsTLBMiss)
-
-/*
- *----------------------------------------------------------------------------
- *
- * MipsDoTLBMiss --
- *
- * This is the real TLB Miss Handler code.
- * 'segbase' points to the base of the segment table for user processes.
- *
- * Don't check for invalid pte's here. We load them as well and
- * let the processor trap to load the correct value after service.
- *----------------------------------------------------------------------------
- */
- 	.set push
-	.set noat
-MipsDoTLBMiss:
-	bltz		k0, 1f				#02: k0<0 -> 1f (kernel fault)
-	PTR_SRL		k0, k0, SEGSHIFT - PTRSHIFT	#03: k0=seg offset (almost)
-
-	GET_CPU_PCPU(k1)
-	PTR_L		k1, PC_SEGBASE(k1)
-	beqz		k1, 2f				#05: make sure segbase is not null
-	andi		k0, k0, PDEPTRMASK		#06: k0=seg offset
-	PTR_ADDU	k1, k0, k1			#07: k1=seg entry address
-
-	PTR_L		k1, 0(k1)			#08: k1=seg entry
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	#09: k0=bad address (again)
-	beq		k1, zero, 2f			#0a: ==0 -- no page table
-#ifdef __mips_n64
-	PTR_SRL		k0, PDRSHIFT - PTRSHIFT		# k0=VPN
-	andi		k0, k0, PDEPTRMASK		# k0=pde offset
-	PTR_ADDU	k1, k0, k1			# k1=pde entry address
-	PTR_L		k1, 0(k1)			# k1=pde entry
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	# k0=bad address (again)
-	beq		k1, zero, 2f			# ==0 -- no page table
-#endif
-	PTR_SRL		k0, PAGE_SHIFT - PTESHIFT	#0b: k0=VPN (aka va>>10)
-	andi		k0, k0, PTE2MASK		#0c: k0=page tab offset
-	PTR_ADDU	k1, k1, k0			#0d: k1=pte address
-	PTE_L		k0, 0(k1)			#0e: k0=lo0 pte
-	PTE_L		k1, PTESIZE(k1)			#0f: k1=lo0 pte
-	CLEAR_PTE_SWBITS(k0)
-	PTE_MTC0	k0, MIPS_COP_0_TLB_LO0		#12: lo0 is loaded
-	COP0_SYNC
-	CLEAR_PTE_SWBITS(k1)
-	PTE_MTC0	k1, MIPS_COP_0_TLB_LO1		#15: lo1 is loaded
-	COP0_SYNC
-	tlbwr						#1a: write to tlb
-	HAZARD_DELAY
-	eret						#1f: retUrn from exception
-1:	j		MipsTLBMissException		#20: kernel exception
-	nop						#21: branch delay slot
-2:	j		SlowFault			#22: no page table present
-	nop						#23: branch delay slot
-	.set pop
-
-/*
- * This code is copied to the general exception vector address to
- * handle all execptions except RESET and TLBMiss.
- * NOTE: This code must be position independent!!!
- */
-VECTOR(MipsException, unknown)
-/*
- * Find out what mode we came from and jump to the proper handler.
- *
- * Note: at turned off here because we cannot trash the at register
- * in this exception code. Only k0 and k1 may be modified before
- * we save registers. This is true of all functions called through
- * the pointer magic: Mips{User,Kern}Intr, Mips{User,Kern}GenException
- * and MipsTLBInvalidException
- */
-	.set	noat
-	mfc0	k0, MIPS_COP_0_STATUS		# Get the status register
-	mfc0	k1, MIPS_COP_0_CAUSE		# Get the cause register value.
-	and	k0, k0, MIPS_SR_KSU_USER	# test for user mode
-						# sneaky but the bits are
-						# with us........
-	sll	k0, k0, 3			# shift user bit for cause index
-	and	k1, k1, MIPS_CR_EXC_CODE	# Mask out the cause bits.
-	or	k1, k1, k0			# change index to user table
-#if defined(__mips_n64)
-	PTR_SLL	k1, k1, 1			# shift to get 8-byte offset
-#endif
-1:
-	PTR_LA	k0, _C_LABEL(machExceptionTable)  # get base of the jump table
-	PTR_ADDU k0, k0, k1			# Get the address of the
-						#  function entry.  Note that
-						#  the cause is already
-						#  shifted left by 2 bits so
-						#  we dont have to shift.
-	PTR_L	k0, 0(k0)			# Get the function address
-	nop
-	j	k0				# Jump to the function.
-	nop
-	.set	at
-VECTOR_END(MipsException)
-
-/*
- * We couldn't find a TLB entry.
- * Find out what mode we came from and call the appropriate handler.
- */
-SlowFault:
-	.set	noat
-	mfc0	k0, MIPS_COP_0_STATUS
-	nop
-	and	k0, k0, MIPS_SR_KSU_USER
-	bne	k0, zero, _C_LABEL(MipsUserGenException)
-	nop
-	.set	at
-/*
- * Fall though ...
- */
-
-/*----------------------------------------------------------------------------
- *
- * MipsKernGenException --
- *
- *	Handle an exception from kernel mode.
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-
-#define	SAVE_REG(reg, offs, base) \
-	REG_S	reg, CALLFRAME_SIZ + (SZREG * offs) (base)
-
-#if defined(CPU_CNMIPS)
-#define CLEAR_STATUS \
-	mfc0    a0, MIPS_COP_0_STATUS   ;\
-	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
-	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
-	and     a0, a0, a2              ; \
-        mtc0    a0, MIPS_COP_0_STATUS   ; \
-	ITLBNOPFIX
-#elif defined(CPU_RMI) || defined(CPU_NLM)
-#define CLEAR_STATUS \
-	mfc0    a0, MIPS_COP_0_STATUS   ;\
-	li      a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \
-	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
-	and     a0, a0, a2              ; \
-        mtc0    a0, MIPS_COP_0_STATUS   ; \
-	ITLBNOPFIX
-#else
-#define CLEAR_STATUS \
-	mfc0    a0, MIPS_COP_0_STATUS   ;\
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
-	and     a0, a0, a2              ; \
-	mtc0	a0, MIPS_COP_0_STATUS   ; \
-	ITLBNOPFIX
-#endif
-
-/*
- * Save CPU and CP0 register state.
- *
- * This is straightforward except for saving the exception program
- * counter. The ddb backtrace code looks for the first instruction
- * matching the form "sw ra, (off)sp" to figure out the address of the
- * calling function. So we must make sure that we save the exception
- * PC by staging it through 'ra' as opposed to any other register.
- */
-#define	SAVE_CPU \
-	SAVE_REG(AT, AST, sp)		;\
-	.set	at		        ; \
-	SAVE_REG(v0, V0, sp)		;\
-	SAVE_REG(v1, V1, sp)		;\
-	SAVE_REG(a0, A0, sp)		;\
-	SAVE_REG(a1, A1, sp)		;\
-	SAVE_REG(a2, A2, sp)		;\
-	SAVE_REG(a3, A3, sp)		;\
-	SAVE_REG(t0, T0, sp)		;\
-	SAVE_REG(t1, T1, sp)		;\
-	SAVE_REG(t2, T2, sp)		;\
-	SAVE_REG(t3, T3, sp)		;\
-	SAVE_REG(ta0, TA0, sp)		;\
-	SAVE_REG(ta1, TA1, sp)		;\
-	SAVE_REG(ta2, TA2, sp)		;\
-	SAVE_REG(ta3, TA3, sp)		;\
-	SAVE_REG(t8, T8, sp)		;\
-	SAVE_REG(t9, T9, sp)		;\
-	SAVE_REG(gp, GP, sp)		;\
-	SAVE_REG(s0, S0, sp)		;\
-	SAVE_REG(s1, S1, sp)		;\
-	SAVE_REG(s2, S2, sp)		;\
-	SAVE_REG(s3, S3, sp)		;\
-	SAVE_REG(s4, S4, sp)		;\
-	SAVE_REG(s5, S5, sp)		;\
-	SAVE_REG(s6, S6, sp)		;\
-	SAVE_REG(s7, S7, sp)		;\
-	SAVE_REG(s8, S8, sp)	        ;\
-	mflo	v0			;\
-	mfhi	v1			;\
-	mfc0	a0, MIPS_COP_0_STATUS	;\
-	mfc0	a1, MIPS_COP_0_CAUSE	;\
-	MFC0	a2, MIPS_COP_0_BAD_VADDR;\
-	MFC0	a3, MIPS_COP_0_EXC_PC	;\
-	SAVE_REG(v0, MULLO, sp)		;\
-	SAVE_REG(v1, MULHI, sp)		;\
-	SAVE_REG(a0, SR, sp)		;\
-	SAVE_REG(a1, CAUSE, sp)		;\
-	SAVE_REG(a2, BADVADDR, sp)	;\
-	move	t0, ra			;\
-	move	ra, a3			;\
-	SAVE_REG(ra, PC, sp)		;\
-	move	ra, t0			;\
-	SAVE_REG(ra, RA, sp)		;\
-	PTR_ADDU v0, sp, KERN_EXC_FRAME_SIZE ;\
-	SAVE_REG(v0, SP, sp)		;\
-	CLEAR_STATUS			;\
-	PTR_ADDU a0, sp, CALLFRAME_SIZ	;\
-	ITLBNOPFIX
-
-#define	RESTORE_REG(reg, offs, base) \
-	REG_L	reg, CALLFRAME_SIZ + (SZREG * offs) (base)
-
-#define	RESTORE_CPU \
-	CLEAR_STATUS			;\
-	RESTORE_REG(k0, SR, sp)		;\
-	RESTORE_REG(t0, MULLO, sp)	;\
-	RESTORE_REG(t1, MULHI, sp)	;\
-	mtlo	t0			;\
-	mthi	t1			;\
-	MTC0	v0, MIPS_COP_0_EXC_PC	;\
-	.set noat		        ;\
-	RESTORE_REG(AT, AST, sp)	;\
-	RESTORE_REG(v0, V0, sp)		;\
-	RESTORE_REG(v1, V1, sp)		;\
-	RESTORE_REG(a0, A0, sp)		;\
-	RESTORE_REG(a1, A1, sp)		;\
-	RESTORE_REG(a2, A2, sp)		;\
-	RESTORE_REG(a3, A3, sp)		;\
-	RESTORE_REG(t0, T0, sp)		;\
-	RESTORE_REG(t1, T1, sp)		;\
-	RESTORE_REG(t2, T2, sp)		;\
-	RESTORE_REG(t3, T3, sp)		;\
-	RESTORE_REG(ta0, TA0, sp)	;\
-	RESTORE_REG(ta1, TA1, sp)	;\
-	RESTORE_REG(ta2, TA2, sp)	;\
-	RESTORE_REG(ta3, TA3, sp)	;\
-	RESTORE_REG(t8, T8, sp)		;\
-	RESTORE_REG(t9, T9, sp)		;\
-	RESTORE_REG(s0, S0, sp)		;\
-	RESTORE_REG(s1, S1, sp)		;\
-	RESTORE_REG(s2, S2, sp)		;\
-	RESTORE_REG(s3, S3, sp)		;\
-	RESTORE_REG(s4, S4, sp)		;\
-	RESTORE_REG(s5, S5, sp)		;\
-	RESTORE_REG(s6, S6, sp)		;\
-	RESTORE_REG(s7, S7, sp)		;\
-	RESTORE_REG(s8, S8, sp)	        ;\
-	RESTORE_REG(gp, GP, sp)		;\
-	RESTORE_REG(ra, RA, sp)		;\
-	PTR_ADDU sp, sp, KERN_EXC_FRAME_SIZE;\
-	mtc0	k0, MIPS_COP_0_STATUS
-
-
-/*
- * The kernel exception stack contains 18 saved general registers,
- * the status register and the multiply lo and high registers.
- * In addition, we set this up for linkage conventions.
- */
-#define	KERN_REG_SIZE		(NUMSAVEREGS * SZREG)
-#define	KERN_EXC_FRAME_SIZE	(CALLFRAME_SIZ + KERN_REG_SIZE + 16)
-
-NESTED_NOPROFILE(MipsKernGenException, KERN_EXC_FRAME_SIZE, ra)
-	.set	noat
-	PTR_SUBU	sp, sp, KERN_EXC_FRAME_SIZE
-	.mask	0x80000000, (CALLFRAME_RA - KERN_EXC_FRAME_SIZE)
-/*
- *  Save CPU state, building 'frame'.
- */
-	SAVE_CPU
-/*
- *  Call the exception handler. a0 points at the saved frame.
- */
-	PTR_LA	gp, _C_LABEL(_gp)
-	PTR_LA	k0, _C_LABEL(trap)
-	jalr	k0
-	REG_S	a3, CALLFRAME_RA + KERN_REG_SIZE(sp)		# for debugging
-
-	/*
-	 * Update interrupt and CPU mask in saved status register
-	 * Some of interrupts could be disabled by
-	 * intr filters if interrupts are enabled later
-	 * in trap handler
-	 */
-	mfc0	a0, MIPS_COP_0_STATUS
-	and	a0, a0, (MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY)
-	RESTORE_REG(a1, SR, sp)
-	and	a1, a1, ~(MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY)
-	or	a1, a1, a0
-	SAVE_REG(a1, SR, sp)
-	RESTORE_CPU			# v0 contains the return address.
-	sync
-	eret
-	.set	at
-END(MipsKernGenException)
-
-
-/*----------------------------------------------------------------------------
- *
- * MipsUserGenException --
- *
- *	Handle an exception from user mode.
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-NESTED_NOPROFILE(MipsUserGenException, CALLFRAME_SIZ, ra)
-	.set	noat
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-/*
- * Save all of the registers except for the kernel temporaries in u.u_pcb.
- */
-	GET_CPU_PCPU(k1)
-	PTR_L	k1, PC_CURPCB(k1)
-	SAVE_U_PCB_REG(AT, AST, k1)
-	.set	at
-	SAVE_U_PCB_REG(v0, V0, k1)
-	SAVE_U_PCB_REG(v1, V1, k1)
-	SAVE_U_PCB_REG(a0, A0, k1)
-	mflo	v0
-	SAVE_U_PCB_REG(a1, A1, k1)
-	SAVE_U_PCB_REG(a2, A2, k1)
-	SAVE_U_PCB_REG(a3, A3, k1)
-	SAVE_U_PCB_REG(t0, T0, k1)
-	mfhi	v1
-	SAVE_U_PCB_REG(t1, T1, k1)
-	SAVE_U_PCB_REG(t2, T2, k1)
-	SAVE_U_PCB_REG(t3, T3, k1)
-	SAVE_U_PCB_REG(ta0, TA0, k1)
-	mfc0	a0, MIPS_COP_0_STATUS		# First arg is the status reg.
-	SAVE_U_PCB_REG(ta1, TA1, k1)
-	SAVE_U_PCB_REG(ta2, TA2, k1)
-	SAVE_U_PCB_REG(ta3, TA3, k1)
-	SAVE_U_PCB_REG(s0, S0, k1)
-	mfc0	a1, MIPS_COP_0_CAUSE		# Second arg is the cause reg.
-	SAVE_U_PCB_REG(s1, S1, k1)
-	SAVE_U_PCB_REG(s2, S2, k1)
-	SAVE_U_PCB_REG(s3, S3, k1)
-	SAVE_U_PCB_REG(s4, S4, k1)
-	MFC0	a2, MIPS_COP_0_BAD_VADDR	# Third arg is the fault addr
-	SAVE_U_PCB_REG(s5, S5, k1)
-	SAVE_U_PCB_REG(s6, S6, k1)
-	SAVE_U_PCB_REG(s7, S7, k1)
-	SAVE_U_PCB_REG(t8, T8, k1)
-	MFC0	a3, MIPS_COP_0_EXC_PC		# Fourth arg is the pc.
-	SAVE_U_PCB_REG(t9, T9, k1)
-	SAVE_U_PCB_REG(gp, GP, k1)
-	SAVE_U_PCB_REG(sp, SP, k1)
-	SAVE_U_PCB_REG(s8, S8, k1)
-	PTR_SUBU	sp, k1, CALLFRAME_SIZ	 # switch to kernel SP
-	SAVE_U_PCB_REG(ra, RA, k1)
-	SAVE_U_PCB_REG(v0, MULLO, k1)
-	SAVE_U_PCB_REG(v1, MULHI, k1)
-	SAVE_U_PCB_REG(a0, SR, k1)
-	SAVE_U_PCB_REG(a1, CAUSE, k1)
-	SAVE_U_PCB_REG(a2, BADVADDR, k1)
-	SAVE_U_PCB_REG(a3, PC, k1)
-	REG_S	a3, CALLFRAME_RA(sp)	# for debugging
-	PTR_LA	gp, _C_LABEL(_gp)	# switch to kernel GP
-# Turn off fpu and enter kernel mode
-	and	t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_KSU_MASK | MIPS_SR_INT_IE)
-#if defined(CPU_CNMIPS)
-	and	t0, t0, ~(MIPS_SR_COP_2_BIT)
-	or      t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
-#elif defined(CPU_RMI)	|| defined(CPU_NLM)
-	or      t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
-#endif	
-	mtc0	t0, MIPS_COP_0_STATUS
-	PTR_ADDU a0, k1, U_PCB_REGS
-	ITLBNOPFIX
-
-/*
- * Call the exception handler.
- */
-	PTR_LA	k0, _C_LABEL(trap)
-	jalr	k0
-	nop
-
-/*
- * Restore user registers and return.
- * First disable interrupts and set exeption level.
- */
-	DO_AST
-
-	CLEAR_STATUS
-
-/*
- * The use of k1 for storing the PCB pointer must be done only
- * after interrupts are disabled.  Otherwise it will get overwritten
- * by the interrupt code.
- */
-	GET_CPU_PCPU(k1)
-	PTR_L	k1, PC_CURPCB(k1)
-
-	/*
-	 * Update interrupt mask in saved status register
-	 * Some of interrupts could be enabled by ithread
-	 * scheduled by ast()
-	 */
-	mfc0	a0, MIPS_COP_0_STATUS
-	and	a0, a0, MIPS_SR_INT_MASK
-	RESTORE_U_PCB_REG(a1, SR, k1)
-	and	a1, a1, ~MIPS_SR_INT_MASK
-	or	a1, a1, a0
-	SAVE_U_PCB_REG(a1, SR, k1)
-
-	RESTORE_U_PCB_REG(t0, MULLO, k1)
-	RESTORE_U_PCB_REG(t1, MULHI, k1)
-	mtlo	t0
-	mthi	t1
-	RESTORE_U_PCB_REG(a0, PC, k1)
-	RESTORE_U_PCB_REG(v0, V0, k1)
-        MTC0	a0, MIPS_COP_0_EXC_PC	# set return address
-	RESTORE_U_PCB_REG(v1, V1, k1)
-	RESTORE_U_PCB_REG(a0, A0, k1)
-	RESTORE_U_PCB_REG(a1, A1, k1)
-	RESTORE_U_PCB_REG(a2, A2, k1)
-	RESTORE_U_PCB_REG(a3, A3, k1)
-	RESTORE_U_PCB_REG(t0, T0, k1)
-	RESTORE_U_PCB_REG(t1, T1, k1)
-	RESTORE_U_PCB_REG(t2, T2, k1)
-	RESTORE_U_PCB_REG(t3, T3, k1)
-	RESTORE_U_PCB_REG(ta0, TA0, k1)
-	RESTORE_U_PCB_REG(ta1, TA1, k1)
-	RESTORE_U_PCB_REG(ta2, TA2, k1)
-	RESTORE_U_PCB_REG(ta3, TA3, k1)
-	RESTORE_U_PCB_REG(s0, S0, k1)
-	RESTORE_U_PCB_REG(s1, S1, k1)
-	RESTORE_U_PCB_REG(s2, S2, k1)
-	RESTORE_U_PCB_REG(s3, S3, k1)
-	RESTORE_U_PCB_REG(s4, S4, k1)
-	RESTORE_U_PCB_REG(s5, S5, k1)
-	RESTORE_U_PCB_REG(s6, S6, k1)
-	RESTORE_U_PCB_REG(s7, S7, k1)
-	RESTORE_U_PCB_REG(t8, T8, k1)
-	RESTORE_U_PCB_REG(t9, T9, k1)
-	RESTORE_U_PCB_REG(gp, GP, k1)
-	RESTORE_U_PCB_REG(sp, SP, k1)
-	RESTORE_U_PCB_REG(k0, SR, k1)
-	RESTORE_U_PCB_REG(s8, S8, k1)
-	RESTORE_U_PCB_REG(ra, RA, k1)
-	.set noat
-	RESTORE_U_PCB_REG(AT, AST, k1)
-
-	mtc0	k0, MIPS_COP_0_STATUS	# still exception level
-	ITLBNOPFIX
-	sync
-	eret
-	.set	at
-END(MipsUserGenException)
-
-	.set	push
-	.set	noat
-NESTED(mips_wait, CALLFRAME_SIZ, ra)
-	PTR_SUBU        sp, sp, CALLFRAME_SIZ
-	.mask   0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-	REG_S   ra, CALLFRAME_RA(sp)		# save RA
-	mfc0	t0, MIPS_COP_0_STATUS
-	xori	t1, t0, MIPS_SR_INT_IE
-	mtc0	t1, MIPS_COP_0_STATUS
-	COP0_SYNC
-	jal	sched_runnable
-	nop
-	REG_L   ra, CALLFRAME_RA(sp)
-	mfc0	t0, MIPS_COP_0_STATUS
-	ori	t1, t0, MIPS_SR_INT_IE
-	.align 4
-GLOBAL(MipsWaitStart)			# this is 16 byte aligned
-	mtc0	t1, MIPS_COP_0_STATUS
-	bnez	v0, MipsWaitEnd
-	nop
-#if defined(CPU_XBURST) && defined(SMP)
-	nop
-#else
-	wait
-#endif
-GLOBAL(MipsWaitEnd)			# MipsWaitStart + 16
-	jr	ra
-	PTR_ADDU        sp, sp, CALLFRAME_SIZ
-END(mips_wait)
-	.set	pop
-
-/*----------------------------------------------------------------------------
- *
- * MipsKernIntr --
- *
- *	Handle an interrupt from kernel mode.
- *	Interrupts use the standard kernel stack.
- *	switch_exit sets up a kernel stack after exit so interrupts won't fail.
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-
-NESTED_NOPROFILE(MipsKernIntr, KERN_EXC_FRAME_SIZE, ra)
-	.set	noat
-	PTR_SUBU	sp, sp, KERN_EXC_FRAME_SIZE
-	.mask	0x80000000, (CALLFRAME_RA - KERN_EXC_FRAME_SIZE)
-
-/*
- * Check for getting interrupts just before wait
- */
-	MFC0	k0, MIPS_COP_0_EXC_PC
-	ori	k0, 0xf
-	xori	k0, 0xf			# 16 byte align
-	PTR_LA	k1, MipsWaitStart
-	bne	k0, k1, 1f
-	nop
-	PTR_ADDU k1, 16			# skip over wait
-	MTC0	k1, MIPS_COP_0_EXC_PC
-1:
-/*
- *  Save CPU state, building 'frame'.
- */
-	SAVE_CPU
-/*
- *  Call the interrupt handler. a0 points at the saved frame.
- */
-	PTR_LA	gp, _C_LABEL(_gp)
-#ifdef INTRNG
-	PTR_LA	k0, _C_LABEL(intr_irq_handler)
-#else
-	PTR_LA	k0, _C_LABEL(cpu_intr)
-#endif
-	jalr	k0
-	REG_S	a3, CALLFRAME_RA + KERN_REG_SIZE(sp)		# for debugging
-
-	/*
-	 * Update interrupt and CPU mask in saved status register
-	 * Some of interrupts could be disabled by
-	 * intr filters if interrupts are enabled later
-	 * in trap handler
-	 */
-	mfc0	a0, MIPS_COP_0_STATUS
-	and	a0, a0, (MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY)
-	RESTORE_REG(a1, SR, sp)
-	and	a1, a1, ~(MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY)
-	or	a1, a1, a0
-	SAVE_REG(a1, SR, sp)
-	REG_L	v0, CALLFRAME_RA + KERN_REG_SIZE(sp)
-	RESTORE_CPU			# v0 contains the return address.
-	sync
-	eret
-	.set	at
-END(MipsKernIntr)
-
-/*----------------------------------------------------------------------------
- *
- * MipsUserIntr --
- *
- *	Handle an interrupt from user mode.
- *	Note: we save minimal state in the u.u_pcb struct and use the standard
- *	kernel stack since there has to be a u page if we came from user mode.
- *	If there is a pending software interrupt, then save the remaining state
- *	and call softintr(). This is all because if we call switch() inside
- *	interrupt(), not all the user registers have been saved in u.u_pcb.
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-NESTED_NOPROFILE(MipsUserIntr, CALLFRAME_SIZ, ra)
-	.set	noat
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-/*
- * Save the relevant user registers into the u.u_pcb struct.
- * We don't need to save s0 - s8 because the compiler does it for us.
- */
-	GET_CPU_PCPU(k1)
-	PTR_L	k1, PC_CURPCB(k1)
-	SAVE_U_PCB_REG(AT, AST, k1)
-	.set	at
-	SAVE_U_PCB_REG(v0, V0, k1)
-	SAVE_U_PCB_REG(v1, V1, k1)
-	SAVE_U_PCB_REG(a0, A0, k1)
-	SAVE_U_PCB_REG(a1, A1, k1)
-	SAVE_U_PCB_REG(a2, A2, k1)
-	SAVE_U_PCB_REG(a3, A3, k1)
-	SAVE_U_PCB_REG(t0, T0, k1)
-	SAVE_U_PCB_REG(t1, T1, k1)
-	SAVE_U_PCB_REG(t2, T2, k1)
-	SAVE_U_PCB_REG(t3, T3, k1)
-	SAVE_U_PCB_REG(ta0, TA0, k1)
-	SAVE_U_PCB_REG(ta1, TA1, k1)
-	SAVE_U_PCB_REG(ta2, TA2, k1)
-	SAVE_U_PCB_REG(ta3, TA3, k1)
-	SAVE_U_PCB_REG(t8, T8, k1)
-	SAVE_U_PCB_REG(t9, T9, k1)
-	SAVE_U_PCB_REG(gp, GP, k1)
-	SAVE_U_PCB_REG(sp, SP, k1)
-	SAVE_U_PCB_REG(ra, RA, k1)
-/*
- *  save remaining user state in u.u_pcb.
- */
-	SAVE_U_PCB_REG(s0, S0, k1)
-	SAVE_U_PCB_REG(s1, S1, k1)
-	SAVE_U_PCB_REG(s2, S2, k1)
-	SAVE_U_PCB_REG(s3, S3, k1)
-	SAVE_U_PCB_REG(s4, S4, k1)
-	SAVE_U_PCB_REG(s5, S5, k1)
-	SAVE_U_PCB_REG(s6, S6, k1)
-	SAVE_U_PCB_REG(s7, S7, k1)
-	SAVE_U_PCB_REG(s8, S8, k1)
-
-	mflo	v0			# get lo/hi late to avoid stall
-	mfhi	v1
-	mfc0	a0, MIPS_COP_0_STATUS
-	mfc0	a1, MIPS_COP_0_CAUSE
-	MFC0	a3, MIPS_COP_0_EXC_PC
-	SAVE_U_PCB_REG(v0, MULLO, k1)
-	SAVE_U_PCB_REG(v1, MULHI, k1)
-	SAVE_U_PCB_REG(a0, SR, k1)
-	SAVE_U_PCB_REG(a1, CAUSE, k1)
-	SAVE_U_PCB_REG(a3, PC, k1)	# PC in a3, note used later!
-	PTR_SUBU	sp, k1, CALLFRAME_SIZ  # switch to kernel SP
-	PTR_LA	gp, _C_LABEL(_gp)	# switch to kernel GP
-
-# Turn off fpu, disable interrupts, set kernel mode kernel mode, clear exception level.
-	and	t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_KSU_MASK)
-#ifdef CPU_CNMIPS
-	and	t0, t0, ~(MIPS_SR_COP_2_BIT)
-	or      t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
-#elif defined(CPU_RMI)	|| defined(CPU_NLM)
-	or      t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
-#endif	
-	mtc0	t0, MIPS_COP_0_STATUS
-	ITLBNOPFIX
-	PTR_ADDU a0, k1, U_PCB_REGS
-/*
- * Call the interrupt handler.
- */
-#ifdef INTRNG
-	PTR_LA	k0, _C_LABEL(intr_irq_handler)
-#else
-	PTR_LA	k0, _C_LABEL(cpu_intr)
-#endif
-	jalr	k0
-	REG_S	a3, CALLFRAME_RA(sp)	# for debugging
-
-/*
- * Enable interrupts before doing ast().
- *
- * On SMP kernels the AST processing might trigger IPI to other processors.
- * If that processor is also doing AST processing with interrupts disabled
- * then we may deadlock.
- */
-	mfc0	a0, MIPS_COP_0_STATUS
-	or	a0, a0, MIPS_SR_INT_IE
-	mtc0	a0, MIPS_COP_0_STATUS
-	ITLBNOPFIX
-
-/*
- * DO_AST enabled interrupts
- */
-	DO_AST
-	
-/*
- * Restore user registers and return. 
- */
- 	CLEAR_STATUS
-
-	GET_CPU_PCPU(k1)
-	PTR_L	k1, PC_CURPCB(k1)
-
-	/*
-	 * Update interrupt mask in saved status register
-	 * Some of interrupts could be disabled by
-	 * intr filters
-	 */
-	mfc0	a0, MIPS_COP_0_STATUS
-	and	a0, a0, MIPS_SR_INT_MASK
-	RESTORE_U_PCB_REG(a1, SR, k1)
-	and	a1, a1, ~MIPS_SR_INT_MASK
-	or	a1, a1, a0
-	SAVE_U_PCB_REG(a1, SR, k1)
-
-	RESTORE_U_PCB_REG(s0, S0, k1)
-	RESTORE_U_PCB_REG(s1, S1, k1)
-	RESTORE_U_PCB_REG(s2, S2, k1)
-	RESTORE_U_PCB_REG(s3, S3, k1)
-	RESTORE_U_PCB_REG(s4, S4, k1)
-	RESTORE_U_PCB_REG(s5, S5, k1)
-	RESTORE_U_PCB_REG(s6, S6, k1)
-	RESTORE_U_PCB_REG(s7, S7, k1)
-	RESTORE_U_PCB_REG(s8, S8, k1)
-	RESTORE_U_PCB_REG(t0, MULLO, k1)
-	RESTORE_U_PCB_REG(t1, MULHI, k1)
-	RESTORE_U_PCB_REG(t2, PC, k1)
-	mtlo	t0
-	mthi	t1
-	MTC0	t2, MIPS_COP_0_EXC_PC	# set return address
-	RESTORE_U_PCB_REG(v0, V0, k1)
-	RESTORE_U_PCB_REG(v1, V1, k1)
-	RESTORE_U_PCB_REG(a0, A0, k1)
-	RESTORE_U_PCB_REG(a1, A1, k1)
-	RESTORE_U_PCB_REG(a2, A2, k1)
-	RESTORE_U_PCB_REG(a3, A3, k1)
-	RESTORE_U_PCB_REG(t0, T0, k1)
-	RESTORE_U_PCB_REG(t1, T1, k1)
-	RESTORE_U_PCB_REG(t2, T2, k1)
-	RESTORE_U_PCB_REG(t3, T3, k1)
-	RESTORE_U_PCB_REG(ta0, TA0, k1)
-	RESTORE_U_PCB_REG(ta1, TA1, k1)
-	RESTORE_U_PCB_REG(ta2, TA2, k1)
-	RESTORE_U_PCB_REG(ta3, TA3, k1)
-	RESTORE_U_PCB_REG(t8, T8, k1)
-	RESTORE_U_PCB_REG(t9, T9, k1)
-	RESTORE_U_PCB_REG(gp, GP, k1)
-	RESTORE_U_PCB_REG(k0, SR, k1)
-	RESTORE_U_PCB_REG(sp, SP, k1)
-	RESTORE_U_PCB_REG(ra, RA, k1)
-	.set	noat
-	RESTORE_U_PCB_REG(AT, AST, k1)
-
-	mtc0	k0, MIPS_COP_0_STATUS	# SR with EXL set. 
-	ITLBNOPFIX
-	sync
-	eret
-	.set	at
-END(MipsUserIntr)
-
-LEAF_NOPROFILE(MipsTLBInvalidException)
-	.set push
-	.set noat
-	.set noreorder
-
-	MFC0		k0, MIPS_COP_0_BAD_VADDR
-	PTR_LI		k1, VM_MAXUSER_ADDRESS
-	sltu		k1, k0, k1
-	bnez		k1, 1f
-	nop
-
-	/* Kernel address.  */
-	lui		k1, %hi(kernel_segmap)		# k1=hi of segbase
-	b		2f
-	PTR_L		k1, %lo(kernel_segmap)(k1)	# k1=segment tab base
-
-1:	/* User address.  */
-	GET_CPU_PCPU(k1)
-	PTR_L		k1, PC_SEGBASE(k1)
-
-2:	/* Validate page directory pointer.  */
-	beqz		k1, 3f
-	nop
-
-	PTR_SRL		k0, SEGSHIFT - PTRSHIFT		# k0=seg offset (almost)
-	beq		k1, zero, MipsKernGenException	# ==0 -- no seg tab
-	andi		k0, k0, PDEPTRMASK		#06: k0=seg offset
-	PTR_ADDU	k1, k0, k1			# k1=seg entry address
-	PTR_L		k1, 0(k1)			# k1=seg entry
-
-	/* Validate page table pointer.  */
-	beqz		k1, 3f
-	nop
-
-#ifdef __mips_n64
-	MFC0		k0, MIPS_COP_0_BAD_VADDR
-	PTR_SRL		k0, PDRSHIFT - PTRSHIFT		# k0=pde offset (almost)
-	beq		k1, zero, MipsKernGenException	# ==0 -- no pde tab
-	andi		k0, k0, PDEPTRMASK		# k0=pde offset
-	PTR_ADDU	k1, k0, k1			# k1=pde entry address
-	PTR_L		k1, 0(k1)			# k1=pde entry
-
-	/* Validate pde table pointer.  */
-	beqz		k1, 3f
-	nop
-#endif
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	# k0=bad address (again)
-	PTR_SRL		k0, PAGE_SHIFT - PTESHIFT	# k0=VPN
-	andi		k0, k0, PTEMASK			# k0=page tab offset
-	PTR_ADDU	k1, k1, k0			# k1=pte address
-	PTE_L		k0, 0(k1)			# k0=this PTE
-
-	/* Validate page table entry.  */
-	andi		k0, PTE_V
-	beqz		k0, 3f
-	nop
-
-	/* Check whether this is an even or odd entry.  */
-	andi		k0, k1, PTESIZE
-	bnez		k0, odd_page
-	nop
-
-	PTE_L		k0, 0(k1)
-	PTE_L		k1, PTESIZE(k1)
-	CLEAR_PTE_SWBITS(k0)
-	PTE_MTC0	k0, MIPS_COP_0_TLB_LO0
-	COP0_SYNC
-	CLEAR_PTE_SWBITS(k1)
-	PTE_MTC0	k1, MIPS_COP_0_TLB_LO1
-	COP0_SYNC
-
-	b		tlb_insert_entry
-	nop
-
-odd_page:
-	PTE_L		k0, -PTESIZE(k1)
-	PTE_L		k1, 0(k1)
-	CLEAR_PTE_SWBITS(k0)
-	PTE_MTC0	k0, MIPS_COP_0_TLB_LO0
-	COP0_SYNC
-	CLEAR_PTE_SWBITS(k1)
-	PTE_MTC0	k1, MIPS_COP_0_TLB_LO1
-	COP0_SYNC
-
-tlb_insert_entry:
-	tlbp
-	HAZARD_DELAY
-	mfc0		k0, MIPS_COP_0_TLB_INDEX
-	bltz		k0, tlb_insert_random
-	nop
-	tlbwi
-	eret
-	ssnop
-
-tlb_insert_random:
-	tlbwr
-	eret
-	ssnop
-
-3:
-	/*
-	 * Branch to the comprehensive exception processing.
-	 */
-	mfc0	k1, MIPS_COP_0_STATUS
-	andi	k1, k1, MIPS_SR_KSU_USER
-	bnez	k1, _C_LABEL(MipsUserGenException)
-	nop
-
-	/*
-	 * Check for kernel stack overflow.
-	 */
-	GET_CPU_PCPU(k1)
-	PTR_L	k0, PC_CURTHREAD(k1)
-	PTR_L	k0, TD_KSTACK(k0)
-	sltu	k0, k0, sp
-	bnez	k0, _C_LABEL(MipsKernGenException)
-	nop
-
-	/*
-	 * Kernel stack overflow.
-	 *
-	 * Move to a valid stack before we call panic. We use the boot stack
-	 * for this purpose.
-	 */
-	GET_CPU_PCPU(k1)
-	lw	k1, PC_CPUID(k1)
-	sll	k1, k1, PAGE_SHIFT + 1
-
-	PTR_LA	k0, _C_LABEL(pcpu_space)
-	PTR_ADDU	k0, PAGE_SIZE * 2
-	PTR_ADDU	k0, k0, k1
-
-	/*
-	 * Stash the original value of 'sp' so we can update trapframe later.
-	 * We assume that SAVE_CPU does not trash 'k1'.
-	 */
-	move	k1, sp
-
-	move	sp, k0
-	PTR_SUBU	sp, sp, KERN_EXC_FRAME_SIZE
-
-	move	k0, ra
-	move	ra, zero
-	REG_S	ra, CALLFRAME_RA(sp)	/* stop the ddb backtrace right here */
-	REG_S	zero, CALLFRAME_SP(sp)
-	move	ra, k0
-
-	SAVE_CPU
-
-	/*
-	 * Now restore the value of 'sp' at the time of the tlb exception in
-	 * the trapframe.
-	 */
-	SAVE_REG(k1, SP, sp)
-
-	/*
-	 * Squelch any more overflow checks by setting the stack base to 0.
-	 */
-	GET_CPU_PCPU(k1)
-	PTR_L	k0, PC_CURTHREAD(k1)
-	PTR_S	zero, TD_KSTACK(k0)
-
-	move	a1, a0
-	PANIC("kernel stack overflow - trapframe at %p")
-
-	/*
-	 * This nop is necessary so that the 'ra' remains within the bounds
-	 * of this handler. Otherwise the ddb backtrace code will think that
-	 * the panic() was called from MipsTLBMissException.
-	 */
-	.globl	MipsKStackOverflow
-MipsKStackOverflow:
-	nop
-
-	.set pop
-END(MipsTLBInvalidException)
-
-/*----------------------------------------------------------------------------
- *
- * MipsTLBMissException --
- *
- *	Handle a TLB miss exception from kernel mode in kernel space.
- *	The BaddVAddr, Context, and EntryHi registers contain the failed
- *	virtual address.
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-LEAF_NOPROFILE(MipsTLBMissException)
-	.set	noat
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	# k0=bad address
-	PTR_LI		k1, VM_MAX_KERNEL_ADDRESS	# check fault address against
-	sltu		k1, k1, k0			# upper bound of kernel_segmap
-	bnez		k1, MipsKernGenException	# out of bound
-	lui		k1, %hi(kernel_segmap)		# k1=hi of segbase
-	PTR_SRL		k0, SEGSHIFT - PTRSHIFT		# k0=seg offset (almost)
-	PTR_L		k1, %lo(kernel_segmap)(k1)	# k1=segment tab base
-	beq		k1, zero, MipsKernGenException	# ==0 -- no seg tab
-	andi		k0, k0, PDEPTRMASK		#06: k0=seg offset
-	PTR_ADDU	k1, k0, k1			# k1=seg entry address
-	PTR_L		k1, 0(k1)			# k1=seg entry
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	# k0=bad address (again)
-	beq		k1, zero, MipsKernGenException	# ==0 -- no page table
-#ifdef __mips_n64
-	PTR_SRL		k0, PDRSHIFT - PTRSHIFT		# k0=VPN
-	andi		k0, k0, PDEPTRMASK		# k0=pde offset
-	PTR_ADDU	k1, k0, k1			# k1=pde entry address
-	PTR_L		k1, 0(k1)			# k1=pde entry
-	MFC0		k0, MIPS_COP_0_BAD_VADDR	# k0=bad address (again)
-  	beq		k1, zero, MipsKernGenException	# ==0 -- no page table
-#endif
-	PTR_SRL		k0, PAGE_SHIFT - PTESHIFT	# k0=VPN
-	andi		k0, k0, PTE2MASK		# k0=page tab offset
-	PTR_ADDU	k1, k1, k0			# k1=pte address
-	PTE_L		k0, 0(k1)			# k0=lo0 pte
-	PTE_L		k1, PTESIZE(k1)			# k1=lo1 pte
-	CLEAR_PTE_SWBITS(k0)
-	PTE_MTC0	k0, MIPS_COP_0_TLB_LO0		# lo0 is loaded
-	COP0_SYNC
-	CLEAR_PTE_SWBITS(k1)
-	PTE_MTC0	k1, MIPS_COP_0_TLB_LO1		# lo1 is loaded
-	COP0_SYNC
-	tlbwr					# write to tlb
-	HAZARD_DELAY
-	eret					# return from exception
-	.set	at
-END(MipsTLBMissException)
-
-/*----------------------------------------------------------------------------
- *
- * MipsFPTrap --
- *
- *	Handle a floating point Trap.
- *
- *	MipsFPTrap(statusReg, causeReg, pc)
- *		unsigned statusReg;
- *		unsigned causeReg;
- *		unsigned pc;
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-NESTED(MipsFPTrap, CALLFRAME_SIZ, ra)
-	.set push
-	.set hardfloat
-	PTR_SUBU	sp, sp, CALLFRAME_SIZ
-	mfc0	t0, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-	REG_S	ra, CALLFRAME_RA(sp)
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-
-#if defined(__mips_n32) || defined(__mips_n64)
-	or	t1, t0, MIPS_SR_COP_1_BIT | MIPS_SR_FR
-#else
-	or	t1, t0, MIPS_SR_COP_1_BIT
-#endif
-	mtc0	t1, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-	ITLBNOPFIX
-	cfc1	t1, MIPS_FPU_CSR		# stall til FP done
-	cfc1	t1, MIPS_FPU_CSR		# now get status
-	nop
-	sll	t2, t1, (31 - 17)		# unimplemented operation?
-	bgez	t2, 3f				# no, normal trap
-	nop
-/*
- * We got an unimplemented operation trap so
- * fetch the instruction, compute the next PC and emulate the instruction.
- */
-	bgez	a1, 1f				# Check the branch delay bit.
-	nop
-/*
- * The instruction is in the branch delay slot so the branch will have to
- * be emulated to get the resulting PC.
- */
-	PTR_S	a2, CALLFRAME_SIZ + 8(sp)
-	GET_CPU_PCPU(a0)
-#mips64 unsafe?
-	PTR_L	a0, PC_CURPCB(a0)
-	PTR_ADDU a0, a0, U_PCB_REGS		# first arg is ptr to CPU registers
-	move	a1, a2				# second arg is instruction PC
-	move	a2, t1				# third arg is floating point CSR
-	PTR_LA	t3, _C_LABEL(MipsEmulateBranch)	# compute PC after branch
-	jalr	t3				# compute PC after branch
-	move	a3, zero			# fourth arg is FALSE
-/*
- * Now load the floating-point instruction in the branch delay slot
- * to be emulated.
- */
-	PTR_L	a2, CALLFRAME_SIZ + 8(sp)	# restore EXC pc
-	b	2f
-	lw	a0, 4(a2)			# a0 = coproc instruction
-/*
- * This is not in the branch delay slot so calculate the resulting
- * PC (epc + 4) into v0 and continue to MipsEmulateFP().
- */
-1:
-	lw	a0, 0(a2)			# a0 = coproc instruction
-#xxx mips64 unsafe?
-	PTR_ADDU	v0, a2, 4			# v0 = next pc
-2:
-	GET_CPU_PCPU(t2)
-	PTR_L	t2, PC_CURPCB(t2)
-	SAVE_U_PCB_REG(v0, PC, t2)		# save new pc
-/*
- * Check to see if the instruction to be emulated is a floating-point
- * instruction.
- */
-	srl	a3, a0, MIPS_OPCODE_SHIFT
-	beq	a3, MIPS_OPCODE_C1, 4f		# this should never fail
-	nop
-/*
- * Send a floating point exception signal to the current process.
- */
-3:
-	GET_CPU_PCPU(a0)
-	PTR_L	a0, PC_CURTHREAD(a0)		# get current thread
-	cfc1	a2, MIPS_FPU_CSR		# code = FP execptions
-	ctc1	zero, MIPS_FPU_CSR		# Clear exceptions
-	PTR_LA	t3, _C_LABEL(trapsignal)
-	jalr	t3
-	li	a1, SIGFPE
-	b	FPReturn
-	nop
-
-/*
- * Finally, we can call MipsEmulateFP() where a0 is the instruction to emulate.
- */
-4:
-	PTR_LA	t3, _C_LABEL(MipsEmulateFP)
-	jalr	t3
-	nop
-
-/*
- * Turn off the floating point coprocessor and return.
- */
-FPReturn:
-	mfc0	t0, MIPS_COP_0_STATUS
-	PTR_L	ra, CALLFRAME_RA(sp)
-	and	t0, t0, ~MIPS_SR_COP_1_BIT
-	mtc0	t0, MIPS_COP_0_STATUS
-	ITLBNOPFIX
-	j	ra
-	PTR_ADDU sp, sp, CALLFRAME_SIZ
-	.set pop
-END(MipsFPTrap)
-
-/*
- * Vector to real handler in KSEG1.
- */
-	.text
-VECTOR(MipsCache, unknown)
-	PTR_LA	k0, _C_LABEL(MipsCacheException)
-	li	k1, MIPS_KSEG0_PHYS_MASK
-	and	k0, k1
-	PTR_LI	k1, MIPS_KSEG1_START
-	or	k0, k1
-	j	k0
-	nop
-VECTOR_END(MipsCache)
-
-	.set	at
-
-
-/*
- * Panic on cache errors.  A lot more could be done to recover
- * from some types of errors but it is tricky.
- */
-NESTED_NOPROFILE(MipsCacheException, KERN_EXC_FRAME_SIZE, ra)
-	.set	noat
-	.mask	0x80000000, -4
-	PTR_LA	k0, _C_LABEL(panic)		# return to panic
-	PTR_LA	a0, 9f				# panicstr
-	MFC0	a1, MIPS_COP_0_ERROR_PC
-	mfc0	a2, MIPS_COP_0_CACHE_ERR	# 3rd arg cache error
-
-	MTC0	k0, MIPS_COP_0_ERROR_PC		# set return address
-
-	mfc0	k0, MIPS_COP_0_STATUS		# restore status
-	li	k1, MIPS_SR_DIAG_PE		# ignore further errors
-	or	k0, k1
-	mtc0	k0, MIPS_COP_0_STATUS		# restore status
-	COP0_SYNC
-
-	eret
-
-	MSG("cache error @ EPC 0x%x CachErr 0x%x");
-	.set	at
-END(MipsCacheException)
diff --git a/sys/mips/mips/fp.S b/sys/mips/mips/fp.S
deleted file mode 100644
index b959f86fc631..000000000000
--- a/sys/mips/mips/fp.S
+++ /dev/null
@@ -1,3610 +0,0 @@
-/*	$OpenBSD: fp.S,v 1.2 1998/03/16 09:03:31 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)fp.s	8.1 (Berkeley) 6/10/93
- *	JNPR: fp.S,v 1.1 2006/08/07 05:38:57 katta
- * $FreeBSD$
- */
-
-/*
- * Standard header stuff.
- */
-
-#include <machine/asm.h>
-#include <machine/regnum.h>
-#include <machine/cpuregs.h>
-
-#include "assym.inc"
-
-#define	SEXP_INF	0xff
-#define	DEXP_INF	0x7ff
-#define	SEXP_BIAS	127
-#define	DEXP_BIAS	1023
-#define	SEXP_MIN	-126
-#define	DEXP_MIN	-1022
-#define	SEXP_MAX	127
-#define	DEXP_MAX	1023
-#define	WEXP_MAX	30		/* maximum unbiased exponent for int */
-#define	WEXP_MIN	-1		/* minimum unbiased exponent for int */
-#define	SFRAC_BITS	23
-#define	DFRAC_BITS	52
-#define	SIMPL_ONE	0x00800000
-#define	DIMPL_ONE	0x00100000
-#define	SLEAD_ZEROS	31 - 23
-#define	DLEAD_ZEROS	31 - 20
-#define	STICKYBIT	1
-#define	GUARDBIT	0x80000000
-#define	SSIGNAL_NAN	0x00400000
-#define	DSIGNAL_NAN	0x00080000
-#define	SQUIET_NAN	0x003fffff
-#define	DQUIET_NAN0	0x0007ffff
-#define	DQUIET_NAN1	0xffffffff
-#define	INT_MIN		0x80000000
-#define	INT_MAX		0x7fffffff
-
-#define	COND_UNORDERED	0x1
-#define	COND_EQUAL	0x2
-#define	COND_LESS	0x4
-#define	COND_SIGNAL	0x8
-
-.set hardfloat
-
-/*----------------------------------------------------------------------------
- *
- * MipsEmulateFP --
- *
- *	Emulate unimplemented floating point operations.
- *	This routine should only be called by MipsFPInterrupt().
- *
- *	MipsEmulateFP(instr)
- *		unsigned instr;
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	Floating point registers are modified according to instruction.
- *
- *----------------------------------------------------------------------------
- */
-NESTED(MipsEmulateFP, CALLFRAME_SIZ, ra)
-	subu	sp, sp, CALLFRAME_SIZ
-	sw	ra, CALLFRAME_RA(sp)
-/*
- * Decode the FMT field (bits 24-21) and FUNCTION field (bits 5-0).
- */
-	srl	v0, a0, 21 - 2			# get FMT field
-	and	v0, v0, 0xF << 2		# mask FMT field
-	and	v1, a0, 0x3F			# mask FUNC field
-	sll	v1, v1, 5			# align for table lookup
-	bgt	v0, 4 << 2, ill			# illegal format
-
-	or	v1, v1, v0
-	cfc1	a1, MIPS_FPU_CSR		# get exception register
-	lw	a3, func_fmt_tbl(v1)		# switch on FUNC & FMT
-	and	a1, a1, ~MIPS_FPU_EXCEPTION_UNIMPL # clear exception
-	ctc1	a1, MIPS_FPU_CSR
-	j	a3
-
-	.rdata
-func_fmt_tbl:
-	.word	add_s		# 0
-	.word	add_d		# 0
-	.word	ill		# 0
-	.word	ill		# 0
-	.word	ill		# 0
-	.word	ill		# 0
-	.word	ill		# 0
-	.word	ill		# 0
-	.word	sub_s		# 1
-	.word	sub_d		# 1
-	.word	ill		# 1
-	.word	ill		# 1
-	.word	ill		# 1
-	.word	ill		# 1
-	.word	ill		# 1
-	.word	ill		# 1
-	.word	mul_s		# 2
-	.word	mul_d		# 2
-	.word	ill		# 2
-	.word	ill		# 2
-	.word	ill		# 2
-	.word	ill		# 2
-	.word	ill		# 2
-	.word	ill		# 2
-	.word	div_s		# 3
-	.word	div_d		# 3
-	.word	ill		# 3
-	.word	ill		# 3
-	.word	ill		# 3
-	.word	ill		# 3
-	.word	ill		# 3
-	.word	ill		# 3
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	ill		# 4
-	.word	abs_s		# 5
-	.word	abs_d		# 5
-	.word	ill		# 5
-	.word	ill		# 5
-	.word	ill		# 5
-	.word	ill		# 5
-	.word	ill		# 5
-	.word	ill		# 5
-	.word	mov_s		# 6
-	.word	mov_d		# 6
-	.word	ill		# 6
-	.word	ill		# 6
-	.word	ill		# 6
-	.word	ill		# 6
-	.word	ill		# 6
-	.word	ill		# 6
-	.word	neg_s		# 7
-	.word	neg_d		# 7
-	.word	ill		# 7
-	.word	ill		# 7
-	.word	ill		# 7
-	.word	ill		# 7
-	.word	ill		# 7
-	.word	ill		# 7
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 8
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 9
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 10
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 11
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 12
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 13
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 14
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 15
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 16
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 17
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 18
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 19
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 20
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 21
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 22
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 23
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 24
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 25
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 26
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 27
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 28
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 29
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 30
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 31
-	.word	ill		# 32
-	.word	cvt_s_d		# 32
-	.word	ill		# 32
-	.word	ill		# 32
-	.word	cvt_s_w		# 32
-	.word	ill		# 32
-	.word	ill		# 32
-	.word	ill		# 32
-	.word	cvt_d_s		# 33
-	.word	ill		# 33
-	.word	ill		# 33
-	.word	ill		# 33
-	.word	cvt_d_w		# 33
-	.word	ill		# 33
-	.word	ill		# 33
-	.word	ill		# 33
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 34
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	ill		# 35
-	.word	cvt_w_s		# 36
-	.word	cvt_w_d		# 36
-	.word	ill		# 36
-	.word	ill		# 36
-	.word	ill		# 36
-	.word	ill		# 36
-	.word	ill		# 36
-	.word	ill		# 36
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 37
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 38
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 39
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 40
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 41
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 42
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 43
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 44
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 45
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 46
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	ill		# 47
-	.word	cmp_s		# 48
-	.word	cmp_d		# 48
-	.word	ill		# 48
-	.word	ill		# 48
-	.word	ill		# 48
-	.word	ill		# 48
-	.word	ill		# 48
-	.word	ill		# 48
-	.word	cmp_s		# 49
-	.word	cmp_d		# 49
-	.word	ill		# 49
-	.word	ill		# 49
-	.word	ill		# 49
-	.word	ill		# 49
-	.word	ill		# 49
-	.word	ill		# 49
-	.word	cmp_s		# 50
-	.word	cmp_d		# 50
-	.word	ill		# 50
-	.word	ill		# 50
-	.word	ill		# 50
-	.word	ill		# 50
-	.word	ill		# 50
-	.word	ill		# 50
-	.word	cmp_s		# 51
-	.word	cmp_d		# 51
-	.word	ill		# 51
-	.word	ill		# 51
-	.word	ill		# 51
-	.word	ill		# 51
-	.word	ill		# 51
-	.word	ill		# 51
-	.word	cmp_s		# 52
-	.word	cmp_d		# 52
-	.word	ill		# 52
-	.word	ill		# 52
-	.word	ill		# 52
-	.word	ill		# 52
-	.word	ill		# 52
-	.word	ill		# 52
-	.word	cmp_s		# 53
-	.word	cmp_d		# 53
-	.word	ill		# 53
-	.word	ill		# 53
-	.word	ill		# 53
-	.word	ill		# 53
-	.word	ill		# 53
-	.word	ill		# 53
-	.word	cmp_s		# 54
-	.word	cmp_d		# 54
-	.word	ill		# 54
-	.word	ill		# 54
-	.word	ill		# 54
-	.word	ill		# 54
-	.word	ill		# 54
-	.word	ill		# 54
-	.word	cmp_s		# 55
-	.word	cmp_d		# 55
-	.word	ill		# 55
-	.word	ill		# 55
-	.word	ill		# 55
-	.word	ill		# 55
-	.word	ill		# 55
-	.word	ill		# 55
-	.word	cmp_s		# 56
-	.word	cmp_d		# 56
-	.word	ill		# 56
-	.word	ill		# 56
-	.word	ill		# 56
-	.word	ill		# 56
-	.word	ill		# 56
-	.word	ill		# 56
-	.word	cmp_s		# 57
-	.word	cmp_d		# 57
-	.word	ill		# 57
-	.word	ill		# 57
-	.word	ill		# 57
-	.word	ill		# 57
-	.word	ill		# 57
-	.word	ill		# 57
-	.word	cmp_s		# 58
-	.word	cmp_d		# 58
-	.word	ill		# 58
-	.word	ill		# 58
-	.word	ill		# 58
-	.word	ill		# 58
-	.word	ill		# 58
-	.word	ill		# 58
-	.word	cmp_s		# 59
-	.word	cmp_d		# 59
-	.word	ill		# 59
-	.word	ill		# 59
-	.word	ill		# 59
-	.word	ill		# 59
-	.word	ill		# 59
-	.word	ill		# 59
-	.word	cmp_s		# 60
-	.word	cmp_d		# 60
-	.word	ill		# 60
-	.word	ill		# 60
-	.word	ill		# 60
-	.word	ill		# 60
-	.word	ill		# 60
-	.word	ill		# 60
-	.word	cmp_s		# 61
-	.word	cmp_d		# 61
-	.word	ill		# 61
-	.word	ill		# 61
-	.word	ill		# 61
-	.word	ill		# 61
-	.word	ill		# 61
-	.word	ill		# 61
-	.word	cmp_s		# 62
-	.word	cmp_d		# 62
-	.word	ill		# 62
-	.word	ill		# 62
-	.word	ill		# 62
-	.word	ill		# 62
-	.word	ill		# 62
-	.word	ill		# 62
-	.word	cmp_s		# 63
-	.word	cmp_d		# 63
-	.word	ill		# 63
-	.word	ill		# 63
-	.word	ill		# 63
-	.word	ill		# 63
-	.word	ill		# 63
-	.word	ill		# 63
-	.text
-
-/*
- * Single precision subtract.
- */
-sub_s:
-	jal	get_ft_fs_s
-	xor	ta0, ta0, 1			# negate FT sign bit
-	b	add_sub_s
-/*
- * Single precision add.
- */
-add_s:
-	jal	get_ft_fs_s
-add_sub_s:
-	bne	t1, SEXP_INF, 1f		# is FS an infinity?
-	bne	ta1, SEXP_INF, result_fs_s	# if FT is not inf, result=FS
-	bne	t2, zero, result_fs_s		# if FS is NAN, result is FS
-	bne	ta2, zero, result_ft_s		# if FT is NAN, result is FT
-	bne	t0, ta0, invalid_s		# both infinities same sign?
-	b	result_fs_s			# result is in FS
-1:
-	beq	ta1, SEXP_INF, result_ft_s	# if FT is inf, result=FT
-	bne	t1, zero, 4f			# is FS a denormalized num?
-	beq	t2, zero, 3f			# is FS zero?
-	bne	ta1, zero, 2f			# is FT a denormalized num?
-	beq	ta2, zero, result_fs_s		# FT is zero, result=FS
-	jal	renorm_fs_s
-	jal	renorm_ft_s
-	b	5f
-2:
-	jal	renorm_fs_s
-	subu	ta1, ta1, SEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, SIMPL_ONE		# set implied one bit
-	b	5f
-3:
-	bne	ta1, zero, result_ft_s		# if FT != 0, result=FT
-	bne	ta2, zero, result_ft_s
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	bne	v0, MIPS_FPU_ROUND_RM, 1f	# round to -infinity?
-	or	t0, t0, ta0			# compute result sign
-	b	result_fs_s
-1:
-	and	t0, t0, ta0			# compute result sign
-	b	result_fs_s
-4:
-	bne	ta1, zero, 2f			# is FT a denormalized num?
-	beq	ta2, zero, result_fs_s		# FT is zero, result=FS
-	subu	t1, t1, SEXP_BIAS		# unbias FS exponent
-	or	t2, t2, SIMPL_ONE		# set implied one bit
-	jal	renorm_ft_s
-	b	5f
-2:
-	subu	t1, t1, SEXP_BIAS		# unbias FS exponent
-	or	t2, t2, SIMPL_ONE		# set implied one bit
-	subu	ta1, ta1, SEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, SIMPL_ONE		# set implied one bit
-/*
- * Perform the addition.
- */
-5:
-	move	t8, zero			# no shifted bits (sticky reg)
-	beq	t1, ta1, 4f			# no shift needed
-	subu	v0, t1, ta1			# v0 = difference of exponents
-	move	v1, v0				# v1 = abs(difference)
-	bge	v0, zero, 1f
-	negu	v1
-1:
-	ble	v1, SFRAC_BITS+2, 2f		# is difference too great?
-	li	t8, STICKYBIT			# set the sticky bit
-	bge	v0, zero, 1f			# check which exp is larger
-	move	t1, ta1				# result exp is FTs
-	move	t2, zero			# FSs fraction shifted is zero
-	b	4f
-1:
-	move	ta2, zero			# FTs fraction shifted is zero
-	b	4f
-2:
-	li	t9, 32				# compute 32 - abs(exp diff)
-	subu	t9, t9, v1
-	bgt	v0, zero, 3f			# if FS > FT, shift FTs frac
-	move	t1, ta1				# FT > FS, result exp is FTs
-	sll	t8, t2, t9			# save bits shifted out
-	srl	t2, t2, v1			# shift FSs fraction
-	b	4f
-3:
-	sll	t8, ta2, t9			# save bits shifted out
-	srl	ta2, ta2, v1			# shift FTs fraction
-4:
-	bne	t0, ta0, 1f			# if signs differ, subtract
-	addu	t2, t2, ta2			# add fractions
-	b	norm_s
-1:
-	blt	t2, ta2, 3f			# subtract larger from smaller
-	bne	t2, ta2, 2f			# if same, result=0
-	move	t1, zero			# result=0
-	move	t2, zero
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	bne	v0, MIPS_FPU_ROUND_RM, 1f	# round to -infinity?
-	or	t0, t0, ta0			# compute result sign
-	b	result_fs_s
-1:
-	and	t0, t0, ta0			# compute result sign
-	b	result_fs_s
-2:
-	sltu	t9, zero, t8			# compute t2:zero - ta2:t8
-	subu	t8, zero, t8
-	subu	t2, t2, ta2			# subtract fractions
-	subu	t2, t2, t9			# subtract barrow
-	b	norm_s
-3:
-	move	t0, ta0				# sign of result = FTs
-	sltu	t9, zero, t8			# compute ta2:zero - t2:t8
-	subu	t8, zero, t8
-	subu	t2, ta2, t2			# subtract fractions
-	subu	t2, t2, t9			# subtract barrow
-	b	norm_s
-
-/*
- * Double precision subtract.
- */
-sub_d:
-	jal	get_ft_fs_d
-	xor	ta0, ta0, 1			# negate sign bit
-	b	add_sub_d
-/*
- * Double precision add.
- */
-add_d:
-	jal	get_ft_fs_d
-add_sub_d:
-	bne	t1, DEXP_INF, 1f		# is FS an infinity?
-	bne	ta1, DEXP_INF, result_fs_d	# if FT is not inf, result=FS
-	bne	t2, zero, result_fs_d		# if FS is NAN, result is FS
-	bne	t3, zero, result_fs_d
-	bne	ta2, zero, result_ft_d		# if FT is NAN, result is FT
-	bne	ta3, zero, result_ft_d
-	bne	t0, ta0, invalid_d		# both infinities same sign?
-	b	result_fs_d			# result is in FS
-1:
-	beq	ta1, DEXP_INF, result_ft_d	# if FT is inf, result=FT
-	bne	t1, zero, 4f			# is FS a denormalized num?
-	bne	t2, zero, 1f			# is FS zero?
-	beq	t3, zero, 3f
-1:
-	bne	ta1, zero, 2f			# is FT a denormalized num?
-	bne	ta2, zero, 1f
-	beq	ta3, zero, result_fs_d		# FT is zero, result=FS
-1:
-	jal	renorm_fs_d
-	jal	renorm_ft_d
-	b	5f
-2:
-	jal	renorm_fs_d
-	subu	ta1, ta1, DEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, DIMPL_ONE		# set implied one bit
-	b	5f
-3:
-	bne	ta1, zero, result_ft_d		# if FT != 0, result=FT
-	bne	ta2, zero, result_ft_d
-	bne	ta3, zero, result_ft_d
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	bne	v0, MIPS_FPU_ROUND_RM, 1f	# round to -infinity?
-	or	t0, t0, ta0			# compute result sign
-	b	result_fs_d
-1:
-	and	t0, t0, ta0			# compute result sign
-	b	result_fs_d
-4:
-	bne	ta1, zero, 2f			# is FT a denormalized num?
-	bne	ta2, zero, 1f
-	beq	ta3, zero, result_fs_d		# FT is zero, result=FS
-1:
-	subu	t1, t1, DEXP_BIAS		# unbias FS exponent
-	or	t2, t2, DIMPL_ONE		# set implied one bit
-	jal	renorm_ft_d
-	b	5f
-2:
-	subu	t1, t1, DEXP_BIAS		# unbias FS exponent
-	or	t2, t2, DIMPL_ONE		# set implied one bit
-	subu	ta1, ta1, DEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, DIMPL_ONE		# set implied one bit
-/*
- * Perform the addition.
- */
-5:
-	move	t8, zero			# no shifted bits (sticky reg)
-	beq	t1, ta1, 4f			# no shift needed
-	subu	v0, t1, ta1			# v0 = difference of exponents
-	move	v1, v0				# v1 = abs(difference)
-	bge	v0, zero, 1f
-	negu	v1
-1:
-	ble	v1, DFRAC_BITS+2, 2f		# is difference too great?
-	li	t8, STICKYBIT			# set the sticky bit
-	bge	v0, zero, 1f			# check which exp is larger
-	move	t1, ta1				# result exp is FTs
-	move	t2, zero			# FSs fraction shifted is zero
-	move	t3, zero
-	b	4f
-1:
-	move	ta2, zero			# FTs fraction shifted is zero
-	move	ta3, zero
-	b	4f
-2:
-	li	t9, 32
-	bge	v0, zero, 3f			# if FS > FT, shift FTs frac
-	move	t1, ta1				# FT > FS, result exp is FTs
-	blt	v1, t9, 1f			# shift right by < 32?
-	subu	v1, v1, t9
-	subu	t9, t9, v1
-	sll	t8, t2, t9			# save bits shifted out
-	sltu	t9, zero, t3			# dont lose any one bits
-	or	t8, t8, t9			# save sticky bit
-	srl	t3, t2, v1			# shift FSs fraction
-	move	t2, zero
-	b	4f
-1:
-	subu	t9, t9, v1
-	sll	t8, t3, t9			# save bits shifted out
-	srl	t3, t3, v1			# shift FSs fraction
-	sll	t9, t2, t9			# save bits shifted out of t2
-	or	t3, t3, t9			# and put into t3
-	srl	t2, t2, v1
-	b	4f
-3:
-	blt	v1, t9, 1f			# shift right by < 32?
-	subu	v1, v1, t9
-	subu	t9, t9, v1
-	sll	t8, ta2, t9			# save bits shifted out
-	srl	ta3, ta2, v1			# shift FTs fraction
-	move	ta2, zero
-	b	4f
-1:
-	subu	t9, t9, v1
-	sll	t8, ta3, t9			# save bits shifted out
-	srl	ta3, ta3, v1			# shift FTs fraction
-	sll	t9, ta2, t9			# save bits shifted out of t2
-	or	ta3, ta3, t9			# and put into t3
-	srl	ta2, ta2, v1
-4:
-	bne	t0, ta0, 1f			# if signs differ, subtract
-	addu	t3, t3, ta3			# add fractions
-	sltu	t9, t3, ta3			# compute carry
-	addu	t2, t2, ta2			# add fractions
-	addu	t2, t2, t9			# add carry
-	b	norm_d
-1:
-	blt	t2, ta2, 3f			# subtract larger from smaller
-	bne	t2, ta2, 2f
-	bltu	t3, ta3, 3f
-	bne	t3, ta3, 2f			# if same, result=0
-	move	t1, zero			# result=0
-	move	t2, zero
-	move	t3, zero
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	bne	v0, MIPS_FPU_ROUND_RM, 1f	# round to -infinity?
-	or	t0, t0, ta0			# compute result sign
-	b	result_fs_d
-1:
-	and	t0, t0, ta0			# compute result sign
-	b	result_fs_d
-2:
-	beq	t8, zero, 1f			# compute t2:t3:zero - ta2:ta3:t8
-	subu	t8, zero, t8
-	sltu	v0, t3, 1			# compute barrow out
-	subu	t3, t3, 1			# subtract barrow
-	subu	t2, t2, v0
-1:
-	sltu	v0, t3, ta3
-	subu	t3, t3, ta3			# subtract fractions
-	subu	t2, t2, ta2			# subtract fractions
-	subu	t2, t2, v0			# subtract barrow
-	b	norm_d
-3:
-	move	t0, ta0				# sign of result = FTs
-	beq	t8, zero, 1f			# compute ta2:ta3:zero - t2:t3:t8
-	subu	t8, zero, t8
-	sltu	v0, ta3, 1			# compute barrow out
-	subu	ta3, ta3, 1			# subtract barrow
-	subu	ta2, ta2, v0
-1:
-	sltu	v0, ta3, t3
-	subu	t3, ta3, t3			# subtract fractions
-	subu	t2, ta2, t2			# subtract fractions
-	subu	t2, t2, v0			# subtract barrow
-	b	norm_d
-
-/*
- * Single precision multiply.
- */
-mul_s:
-	jal	get_ft_fs_s
-	xor	t0, t0, ta0			# compute sign of result
-	move	ta0, t0
-	bne	t1, SEXP_INF, 2f		# is FS an infinity?
-	bne	t2, zero, result_fs_s		# if FS is a NAN, result=FS
-	bne	ta1, SEXP_INF, 1f		# FS is inf, is FT an infinity?
-	bne	ta2, zero, result_ft_s		# if FT is a NAN, result=FT
-	b	result_fs_s			# result is infinity
-1:
-	bne	ta1, zero, result_fs_s		# inf * zero? if no, result=FS
-	bne	ta2, zero, result_fs_s
-	b	invalid_s			# infinity * zero is invalid
-2:
-	bne	ta1, SEXP_INF, 1f		# FS != inf, is FT an infinity?
-	bne	t1, zero, result_ft_s		# zero * inf? if no, result=FT
-	bne	t2, zero, result_ft_s
-	bne	ta2, zero, result_ft_s		# if FT is a NAN, result=FT
-	b	invalid_s			# zero * infinity is invalid
-1:
-	bne	t1, zero, 1f			# is FS zero?
-	beq	t2, zero, result_fs_s		# result is zero
-	jal	renorm_fs_s
-	b	2f
-1:
-	subu	t1, t1, SEXP_BIAS		# unbias FS exponent
-	or	t2, t2, SIMPL_ONE		# set implied one bit
-2:
-	bne	ta1, zero, 1f			# is FT zero?
-	beq	ta2, zero, result_ft_s		# result is zero
-	jal	renorm_ft_s
-	b	2f
-1:
-	subu	ta1, ta1, SEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, SIMPL_ONE		# set implied one bit
-2:
-	addu	t1, t1, ta1			# compute result exponent
-	addu	t1, t1, 9			# account for binary point
-	multu	t2, ta2				# multiply fractions
-	mflo	t8
-	mfhi	t2
-	b	norm_s
-
-/*
- * Double precision multiply.
- */
-mul_d:
-	jal	get_ft_fs_d
-	xor	t0, t0, ta0			# compute sign of result
-	move	ta0, t0
-	bne	t1, DEXP_INF, 2f		# is FS an infinity?
-	bne	t2, zero, result_fs_d		# if FS is a NAN, result=FS
-	bne	t3, zero, result_fs_d
-	bne	ta1, DEXP_INF, 1f		# FS is inf, is FT an infinity?
-	bne	ta2, zero, result_ft_d		# if FT is a NAN, result=FT
-	bne	ta3, zero, result_ft_d
-	b	result_fs_d			# result is infinity
-1:
-	bne	ta1, zero, result_fs_d		# inf * zero? if no, result=FS
-	bne	ta2, zero, result_fs_d
-	bne	ta3, zero, result_fs_d
-	b	invalid_d			# infinity * zero is invalid
-2:
-	bne	ta1, DEXP_INF, 1f		# FS != inf, is FT an infinity?
-	bne	t1, zero, result_ft_d		# zero * inf? if no, result=FT
-	bne	t2, zero, result_ft_d		# if FS is a NAN, result=FS
-	bne	t3, zero, result_ft_d
-	bne	ta2, zero, result_ft_d		# if FT is a NAN, result=FT
-	bne	ta3, zero, result_ft_d
-	b	invalid_d			# zero * infinity is invalid
-1:
-	bne	t1, zero, 2f			# is FS zero?
-	bne	t2, zero, 1f
-	beq	t3, zero, result_fs_d		# result is zero
-1:
-	jal	renorm_fs_d
-	b	3f
-2:
-	subu	t1, t1, DEXP_BIAS		# unbias FS exponent
-	or	t2, t2, DIMPL_ONE		# set implied one bit
-3:
-	bne	ta1, zero, 2f			# is FT zero?
-	bne	ta2, zero, 1f
-	beq	ta3, zero, result_ft_d		# result is zero
-1:
-	jal	renorm_ft_d
-	b	3f
-2:
-	subu	ta1, ta1, DEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, DIMPL_ONE		# set implied one bit
-3:
-	addu	t1, t1, ta1			# compute result exponent
-	addu	t1, t1, 12			# ???
-	multu	t3, ta3				# multiply fractions (low * low)
-	move	ta0, t2				# free up t2,t3 for result
-	move	ta1, t3
-	mflo	a3				# save low order bits
-	mfhi	t8
-	not	v0, t8
-	multu	ta0, ta3			# multiply FS(high) * FT(low)
-	mflo	v1
-	mfhi	t3				# init low result
-	sltu	v0, v0, v1			# compute carry
-	addu	t8, v1
-	multu	ta1, ta2			# multiply FS(low) * FT(high)
-	addu	t3, t3, v0			# add carry
-	not	v0, t8
-	mflo	v1
-	mfhi	t2
-	sltu	v0, v0, v1
-	addu	t8, v1
-	multu	ta0, ta2			# multiply FS(high) * FT(high)
-	addu	t3, v0
-	not	v1, t3
-	sltu	v1, v1, t2
-	addu	t3, t2
-	not	v0, t3
-	mfhi	t2
-	addu	t2, v1
-	mflo	v1
-	sltu	v0, v0, v1
-	addu	t2, v0
-	addu	t3, v1
-	sltu	a3, zero, a3			# reduce t8,a3 to just t8
-	or	t8, a3
-	b	norm_d
-
-/*
- * Single precision divide.
- */
-div_s:
-	jal	get_ft_fs_s
-	xor	t0, t0, ta0			# compute sign of result
-	move	ta0, t0
-	bne	t1, SEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, result_fs_s		# if FS is NAN, result is FS
-	bne	ta1, SEXP_INF, result_fs_s	# is FT an infinity?
-	bne	ta2, zero, result_ft_s		# if FT is NAN, result is FT
-	b	invalid_s			# infinity/infinity is invalid
-1:
-	bne	ta1, SEXP_INF, 1f		# is FT an infinity?
-	bne	ta2, zero, result_ft_s		# if FT is NAN, result is FT
-	move	t1, zero			# x / infinity is zero
-	move	t2, zero
-	b	result_fs_s
-1:
-	bne	t1, zero, 2f			# is FS zero?
-	bne	t2, zero, 1f
-	bne	ta1, zero, result_fs_s		# FS=zero, is FT zero?
-	beq	ta2, zero, invalid_s		# 0 / 0
-	b	result_fs_s			# result = zero
-1:
-	jal	renorm_fs_s
-	b	3f
-2:
-	subu	t1, t1, SEXP_BIAS		# unbias FS exponent
-	or	t2, t2, SIMPL_ONE		# set implied one bit
-3:
-	bne	ta1, zero, 2f			# is FT zero?
-	bne	ta2, zero, 1f
-	or	a1, a1, MIPS_FPU_EXCEPTION_DIV0 | MIPS_FPU_STICKY_DIV0
-	and	v0, a1, MIPS_FPU_ENABLE_DIV0 	# trap enabled?
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	li	t1, SEXP_INF			# result is infinity
-	move	t2, zero
-	b	result_fs_s
-1:
-	jal	renorm_ft_s
-	b	3f
-2:
-	subu	ta1, ta1, SEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, SIMPL_ONE		# set implied one bit
-3:
-	subu	t1, t1, ta1			# compute exponent
-	subu	t1, t1, 3			# compensate for result position
-	li	v0, SFRAC_BITS+3		# number of bits to divide
-	move	t8, t2				# init dividend
-	move	t2, zero			# init result
-1:
-	bltu	t8, ta2, 3f			# is dividend >= divisor?
-2:
-	subu	t8, t8, ta2			# subtract divisor from dividend
-	or	t2, t2, 1			# remember that we did
-	bne	t8, zero, 3f			# if not done, continue
-	sll	t2, t2, v0			# shift result to final position
-	b	norm_s
-3:
-	sll	t8, t8, 1			# shift dividend
-	sll	t2, t2, 1			# shift result
-	subu	v0, v0, 1			# are we done?
-	bne	v0, zero, 1b			# no, continue
-	b	norm_s
-
-/*
- * Double precision divide.
- */
-div_d:
-	jal	get_ft_fs_d
-	xor	t0, t0, ta0			# compute sign of result
-	move	ta0, t0
-	bne	t1, DEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, result_fs_d		# if FS is NAN, result is FS
-	bne	t3, zero, result_fs_d
-	bne	ta1, DEXP_INF, result_fs_d	# is FT an infinity?
-	bne	ta2, zero, result_ft_d		# if FT is NAN, result is FT
-	bne	ta3, zero, result_ft_d
-	b	invalid_d			# infinity/infinity is invalid
-1:
-	bne	ta1, DEXP_INF, 1f		# is FT an infinity?
-	bne	ta2, zero, result_ft_d		# if FT is NAN, result is FT
-	bne	ta3, zero, result_ft_d
-	move	t1, zero			# x / infinity is zero
-	move	t2, zero
-	move	t3, zero
-	b	result_fs_d
-1:
-	bne	t1, zero, 2f			# is FS zero?
-	bne	t2, zero, 1f
-	bne	t3, zero, 1f
-	bne	ta1, zero, result_fs_d		# FS=zero, is FT zero?
-	bne	ta2, zero, result_fs_d
-	beq	ta3, zero, invalid_d		# 0 / 0
-	b	result_fs_d			# result = zero
-1:
-	jal	renorm_fs_d
-	b	3f
-2:
-	subu	t1, t1, DEXP_BIAS		# unbias FS exponent
-	or	t2, t2, DIMPL_ONE		# set implied one bit
-3:
-	bne	ta1, zero, 2f			# is FT zero?
-	bne	ta2, zero, 1f
-	bne	ta3, zero, 1f
-	or	a1, a1, MIPS_FPU_EXCEPTION_DIV0 | MIPS_FPU_STICKY_DIV0
-	and	v0, a1, MIPS_FPU_ENABLE_DIV0	# trap enabled?
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# Save exceptions
-	li	t1, DEXP_INF			# result is infinity
-	move	t2, zero
-	move	t3, zero
-	b	result_fs_d
-1:
-	jal	renorm_ft_d
-	b	3f
-2:
-	subu	ta1, ta1, DEXP_BIAS		# unbias FT exponent
-	or	ta2, ta2, DIMPL_ONE		# set implied one bit
-3:
-	subu	t1, t1, ta1			# compute exponent
-	subu	t1, t1, 3			# compensate for result position
-	li	v0, DFRAC_BITS+3		# number of bits to divide
-	move	t8, t2				# init dividend
-	move	t9, t3
-	move	t2, zero			# init result
-	move	t3, zero
-1:
-	bltu	t8, ta2, 3f			# is dividend >= divisor?
-	bne	t8, ta2, 2f
-	bltu	t9, ta3, 3f
-2:
-	sltu	v1, t9, ta3			# subtract divisor from dividend
-	subu	t9, t9, ta3
-	subu	t8, t8, ta2
-	subu	t8, t8, v1
-	or	t3, t3, 1			# remember that we did
-	bne	t8, zero, 3f			# if not done, continue
-	bne	t9, zero, 3f
-	li	v1, 32				# shift result to final position
-	blt	v0, v1, 2f			# shift < 32 bits?
-	subu	v0, v0, v1			# shift by > 32 bits
-	sll	t2, t3, v0			# shift upper part
-	move	t3, zero
-	b	norm_d
-2:
-	subu	v1, v1, v0			# shift by < 32 bits
-	sll	t2, t2, v0			# shift upper part
-	srl	t9, t3, v1			# save bits shifted out
-	or	t2, t2, t9			# and put into upper part
-	sll	t3, t3, v0
-	b	norm_d
-3:
-	sll	t8, t8, 1			# shift dividend
-	srl	v1, t9, 31			# save bit shifted out
-	or	t8, t8, v1			# and put into upper part
-	sll	t9, t9, 1
-	sll	t2, t2, 1			# shift result
-	srl	v1, t3, 31			# save bit shifted out
-	or	t2, t2, v1			# and put into upper part
-	sll	t3, t3, 1
-	subu	v0, v0, 1			# are we done?
-	bne	v0, zero, 1b			# no, continue
-	sltu	v0, zero, t9			# be sure to save any one bits
-	or	t8, t8, v0			# from the lower remainder
-	b	norm_d
-
-/*
- * Single precision absolute value.
- */
-abs_s:
-	jal	get_fs_s
-	move	t0, zero			# set sign positive
-	b	result_fs_s
-
-/*
- * Double precision absolute value.
- */
-abs_d:
-	jal	get_fs_d
-	move	t0, zero			# set sign positive
-	b	result_fs_d
-
-/*
- * Single precision move.
- */
-mov_s:
-	jal	get_fs_s
-	b	result_fs_s
-
-/*
- * Double precision move.
- */
-mov_d:
-	jal	get_fs_d
-	b	result_fs_d
-
-/*
- * Single precision negate.
- */
-neg_s:
-	jal	get_fs_s
-	xor	t0, t0, 1			# reverse sign
-	b	result_fs_s
-
-/*
- * Double precision negate.
- */
-neg_d:
-	jal	get_fs_d
-	xor	t0, t0, 1			# reverse sign
-	b	result_fs_d
-
-/*
- * Convert double to single.
- */
-cvt_s_d:
-	jal	get_fs_d
-	bne	t1, DEXP_INF, 1f		# is FS an infinity?
-	li	t1, SEXP_INF			# convert to single
-	sll	t2, t2, 3			# convert D fraction to S
-	srl	t8, t3, 32 - 3
-	or	t2, t2, t8
-	b	result_fs_s
-1:
-	bne	t1, zero, 2f			# is FS zero?
-	bne	t2, zero, 1f
-	beq	t3, zero, result_fs_s		# result=0
-1:
-	jal	renorm_fs_d
-	subu	t1, t1, 3			# correct exp for shift below
-	b	3f
-2:
-	subu	t1, t1, DEXP_BIAS		# unbias exponent
-	or	t2, t2, DIMPL_ONE		# add implied one bit
-3:
-	sll	t2, t2, 3			# convert D fraction to S
-	srl	t8, t3, 32 - 3
-	or	t2, t2, t8
-	sll	t8, t3, 3
-	b	norm_noshift_s
-
-/*
- * Convert integer to single.
- */
-cvt_s_w:
-	jal	get_fs_int
-	bne	t2, zero, 1f			# check for zero
-	move	t1, zero
-	b	result_fs_s
-/*
- * Find out how many leading zero bits are in t2 and put in t9.
- */
-1:
-	move	v0, t2
-	move	t9, zero
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2 the correct number of bits.
- */
-1:
-	subu	t9, t9, SLEAD_ZEROS		# dont count leading zeros
-	li	t1, 23				# init exponent
-	subu	t1, t1, t9			# compute exponent
-	beq	t9, zero, 1f
-	li	v0, 32
-	blt	t9, zero, 2f			# if shift < 0, shift right
-	subu	v0, v0, t9
-	sll	t2, t2, t9			# shift left
-1:
-	add	t1, t1, SEXP_BIAS		# bias exponent
-	and	t2, t2, ~SIMPL_ONE		# clear implied one bit
-	b	result_fs_s
-2:
-	negu	t9				# shift right by t9
-	subu	v0, v0, t9
-	sll	t8, t2, v0			# save bits shifted out
-	srl	t2, t2, t9
-	b	norm_noshift_s
-
-/*
- * Convert single to double.
- */
-cvt_d_s:
-	jal	get_fs_s
-	move	t3, zero
-	bne	t1, SEXP_INF, 1f		# is FS an infinity?
-	li	t1, DEXP_INF			# convert to double
-	b	result_fs_d
-1:
-	bne	t1, zero, 2f			# is FS denormalized or zero?
-	beq	t2, zero, result_fs_d		# is FS zero?
-	jal	renorm_fs_s
-	move	t8, zero
-	b	norm_d
-2:
-	addu	t1, t1, DEXP_BIAS - SEXP_BIAS	# bias exponent correctly
-	sll	t3, t2, 32 - 3			# convert S fraction to D
-	srl	t2, t2, 3
-	b	result_fs_d
-
-/*
- * Convert integer to double.
- */
-cvt_d_w:
-	jal	get_fs_int
-	bne	t2, zero, 1f			# check for zero
-	move	t1, zero			# result=0
-	move	t3, zero
-	b	result_fs_d
-/*
- * Find out how many leading zero bits are in t2 and put in t9.
- */
-1:
-	move	v0, t2
-	move	t9, zero
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2 the correct number of bits.
- */
-1:
-	subu	t9, t9, DLEAD_ZEROS		# dont count leading zeros
-	li	t1, DEXP_BIAS + 20		# init exponent
-	subu	t1, t1, t9			# compute exponent
-	beq	t9, zero, 1f
-	li	v0, 32
-	blt	t9, zero, 2f			# if shift < 0, shift right
-	subu	v0, v0, t9
-	sll	t2, t2, t9			# shift left
-1:
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-	move	t3, zero
-	b	result_fs_d
-2:
-	negu	t9				# shift right by t9
-	subu	v0, v0, t9
-	sll	t3, t2, v0
-	srl	t2, t2, t9
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-	b	result_fs_d
-
-/*
- * Convert single to integer.
- */
-cvt_w_s:
-	jal	get_fs_s
-	bne	t1, SEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, invalid_w		# invalid conversion
-1:
-	bne	t1, zero, 1f			# is FS zero?
-	beq	t2, zero, result_fs_w		# result is zero
-	move	t2, zero			# result is an inexact zero
-	b	inexact_w
-1:
-	subu	t1, t1, SEXP_BIAS		# unbias exponent
-	or	t2, t2, SIMPL_ONE		# add implied one bit
-	sll	t3, t2, 32 - 3			# convert S fraction to D
-	srl	t2, t2, 3
-	b	cvt_w
-
-/*
- * Convert double to integer.
- */
-cvt_w_d:
-	jal	get_fs_d
-	bne	t1, DEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, invalid_w		# invalid conversion
-	bne	t3, zero, invalid_w		# invalid conversion
-1:
-	bne	t1, zero, 2f			# is FS zero?
-	bne	t2, zero, 1f
-	beq	t3, zero, result_fs_w		# result is zero
-1:
-	move	t2, zero			# result is an inexact zero
-	b	inexact_w
-2:
-	subu	t1, t1, DEXP_BIAS		# unbias exponent
-	or	t2, t2, DIMPL_ONE		# add implied one bit
-cvt_w:
-	blt	t1, WEXP_MIN, underflow_w	# is exponent too small?
-	li	v0, WEXP_MAX+1
-	bgt	t1, v0, overflow_w		# is exponent too large?
-	bne	t1, v0, 1f			# special check for INT_MIN
-	beq	t0, zero, overflow_w		# if positive, overflow
-	bne	t2, DIMPL_ONE, overflow_w
-	bne	t3, zero, overflow_w
-	li	t2, INT_MIN			# result is INT_MIN
-	b	result_fs_w
-1:
-	subu	v0, t1, 20			# compute amount to shift
-	beq	v0, zero, 2f			# is shift needed?
-	li	v1, 32
-	blt	v0, zero, 1f			# if shift < 0, shift right
-	subu	v1, v1, v0			# shift left
-	sll	t2, t2, v0
-	srl	t9, t3, v1			# save bits shifted out of t3
-	or	t2, t2, t9			# and put into t2
-	sll	t3, t3, v0			# shift FSs fraction
-	b	2f
-1:
-	negu	v0				# shift right by v0
-	subu	v1, v1, v0
-	sll	t8, t3, v1			# save bits shifted out
-	sltu	t8, zero, t8			# dont lose any ones
-	srl	t3, t3, v0			# shift FSs fraction
-	or	t3, t3, t8
-	sll	t9, t2, v1			# save bits shifted out of t2
-	or	t3, t3, t9			# and put into t3
-	srl	t2, t2, v0
-/*
- * round result (t0 is sign, t2 is integer part, t3 is fractional part).
- */
-2:
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 5f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 1f	# round to +infinity
-	beq	t0, zero, 5f			# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, 5f			# if sign is negative, truncate
-2:
-	beq	t3, zero, 5f			# if no fraction bits, continue
-	addu	t2, t2, 1			# add rounding bit
-	blt	t2, zero, overflow_w		# overflow?
-	b	5f
-3:
-	li	v0, GUARDBIT			# load guard bit for rounding
-	addu	v0, v0, t3			# add remainder
-	sltu	v1, v0, t3			# compute carry out
-	beq	v1, zero, 4f			# if no carry, continue
-	addu	t2, t2, 1			# add carry to result
-	blt	t2, zero, overflow_w		# overflow?
-4:
-	bne	v0, zero, 5f			# if rounded remainder is zero
-	and	t2, t2, ~1			#  clear LSB (round to nearest)
-5:
-	beq	t0, zero, 1f			# result positive?
-	negu	t2				# convert to negative integer
-1:
-	beq	t3, zero, result_fs_w		# is result exact?
-/*
- * Handle inexact exception.
- */
-inexact_w:
-	or	a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	b	result_fs_w
-
-/*
- * Conversions to integer which overflow will trap (if enabled),
- * or generate an inexact trap (if enabled),
- * or generate an invalid exception.
- */
-overflow_w:
-	or	a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW
-	and	v0, a1, MIPS_FPU_ENABLE_OVERFLOW
-	bne	v0, zero, fpe_trap
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, inexact_w		# inexact traps enabled?
-	b	invalid_w
-
-/*
- * Conversions to integer which underflow will trap (if enabled),
- * or generate an inexact trap (if enabled),
- * or generate an invalid exception.
- */
-underflow_w:
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-	and	v0, a1, MIPS_FPU_ENABLE_UNDERFLOW
-	bne	v0, zero, fpe_trap
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, inexact_w		# inexact traps enabled?
-	b	invalid_w
-
-/*
- * Compare single.
- */
-cmp_s:
-	jal	get_cmp_s
-	bne	t1, SEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, unordered		# FS is a NAN
-1:
-	bne	ta1, SEXP_INF, 2f		# is FT an infinity?
-	bne	ta2, zero, unordered		# FT is a NAN
-2:
-	sll	t1, t1, 23			# reassemble exp & frac
-	or	t1, t1, t2
-	sll	ta1, ta1, 23			# reassemble exp & frac
-	or	ta1, ta1, ta2
-	beq	t0, zero, 1f			# is FS positive?
-	negu	t1
-1:
-	beq	ta0, zero, 1f			# is FT positive?
-	negu	ta1
-1:
-	li	v0, COND_LESS
-	blt	t1, ta1, test_cond		# is FS < FT?
-	li	v0, COND_EQUAL
-	beq	t1, ta1, test_cond		# is FS == FT?
-	move	v0, zero			# FS > FT
-	b	test_cond
-
-/*
- * Compare double.
- */
-cmp_d:
-	jal	get_cmp_d
-	bne	t1, DEXP_INF, 1f		# is FS an infinity?
-	bne	t2, zero, unordered
-	bne	t3, zero, unordered		# FS is a NAN
-1:
-	bne	ta1, DEXP_INF, 2f		# is FT an infinity?
-	bne	ta2, zero, unordered
-	bne	ta3, zero, unordered		# FT is a NAN
-2:
-	sll	t1, t1, 20			# reassemble exp & frac
-	or	t1, t1, t2
-	sll	ta1, ta1, 20			# reassemble exp & frac
-	or	ta1, ta1, ta2
-	beq	t0, zero, 1f			# is FS positive?
-	not	t3				# negate t1,t3
-	not	t1
-	addu	t3, t3, 1
-	seq	v0, t3, zero			# compute carry
-	addu	t1, t1, v0
-1:
-	beq	ta0, zero, 1f			# is FT positive?
-	not	ta3				# negate ta1,ta3
-	not	ta1
-	addu	ta3, ta3, 1
-	seq	v0, ta3, zero			# compute carry
-	addu	ta1, ta1, v0
-1:
-	li	v0, COND_LESS
-	blt	t1, ta1, test_cond		# is FS(MSW) < FT(MSW)?
-	move	v0, zero
-	bne	t1, ta1, test_cond		# is FS(MSW) > FT(MSW)?
-	li	v0, COND_LESS
-	bltu	t3, ta3, test_cond		# is FS(LSW) < FT(LSW)?
-	li	v0, COND_EQUAL
-	beq	t3, ta3, test_cond		# is FS(LSW) == FT(LSW)?
-	move	v0, zero			# FS > FT
-test_cond:
-	and	v0, v0, a0			# condition match instruction?
-set_cond:
-	bne	v0, zero, 1f
-	and	a1, a1, ~MIPS_FPU_COND_BIT	# clear condition bit
-	b	2f
-1:
-	or	a1, a1, MIPS_FPU_COND_BIT	# set condition bit
-2:
-	ctc1	a1, MIPS_FPU_CSR		# save condition bit
-	b	done
-
-unordered:
-	and	v0, a0, COND_UNORDERED		# this cmp match unordered?
-	bne	v0, zero, 1f
-	and	a1, a1, ~MIPS_FPU_COND_BIT	# clear condition bit
-	b	2f
-1:
-	or	a1, a1, MIPS_FPU_COND_BIT	# set condition bit
-2:
-	and	v0, a0, COND_SIGNAL
-	beq	v0, zero, 1f			# is this a signaling cmp?
-	or	a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID
-	and	v0, a1, MIPS_FPU_ENABLE_INVALID
-	bne	v0, zero, fpe_trap
-1:
-	ctc1	a1, MIPS_FPU_CSR		# save condition bit
-	b	done
-
-/*
- * Determine the amount to shift the fraction in order to restore the
- * normalized position. After that, round and handle exceptions.
- */
-norm_s:
-	move	v0, t2
-	move	t9, zero			# t9 = num of leading zeros
-	bne	t2, zero, 1f
-	move	v0, t8
-	addu	t9, 32
-1:
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2,t8 the correct number of bits.
- */
-1:
-	subu	t9, t9, SLEAD_ZEROS		# dont count leading zeros
-	subu	t1, t1, t9			# adjust the exponent
-	beq	t9, zero, norm_noshift_s
-	li	v1, 32
-	blt	t9, zero, 1f			# if shift < 0, shift right
-	subu	v1, v1, t9
-	sll	t2, t2, t9			# shift t2,t8 left
-	srl	v0, t8, v1			# save bits shifted out
-	or	t2, t2, v0
-	sll	t8, t8, t9
-	b	norm_noshift_s
-1:
-	negu	t9				# shift t2,t8 right by t9
-	subu	v1, v1, t9
-	sll	v0, t8, v1			# save bits shifted out
-	sltu	v0, zero, v0			# be sure to save any one bits
-	srl	t8, t8, t9
-	or	t8, t8, v0
-	sll	v0, t2, v1			# save bits shifted out
-	or	t8, t8, v0
-	srl	t2, t2, t9
-norm_noshift_s:
-	move	ta1, t1				# save unrounded exponent
-	move	ta2, t2				# save unrounded fraction
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 5f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 1f	# round to +infinity
-	beq	t0, zero, 5f			# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, 5f			# if sign is negative, truncate
-2:
-	beq	t8, zero, 5f			# if exact, continue
-	addu	t2, t2, 1			# add rounding bit
-	bne	t2, SIMPL_ONE<<1, 5f		# need to adjust exponent?
-	addu	t1, t1, 1			# adjust exponent
-	srl	t2, t2, 1			# renormalize fraction
-	b	5f
-3:
-	li	v0, GUARDBIT			# load guard bit for rounding
-	addu	v0, v0, t8			# add remainder
-	sltu	v1, v0, t8			# compute carry out
-	beq	v1, zero, 4f			# if no carry, continue
-	addu	t2, t2, 1			# add carry to result
-	bne	t2, SIMPL_ONE<<1, 4f		# need to adjust exponent?
-	addu	t1, t1, 1			# adjust exponent
-	srl	t2, t2, 1			# renormalize fraction
-4:
-	bne	v0, zero, 5f			# if rounded remainder is zero
-	and	t2, t2, ~1			#  clear LSB (round to nearest)
-5:
-	bgt	t1, SEXP_MAX, overflow_s	# overflow?
-	blt	t1, SEXP_MIN, underflow_s	# underflow?
-	bne	t8, zero, inexact_s		# is result inexact?
-	addu	t1, t1, SEXP_BIAS		# bias exponent
-	and	t2, t2, ~SIMPL_ONE		# clear implied one bit
-	b	result_fs_s
-
-/*
- * Handle inexact exception.
- */
-inexact_s:
-	addu	t1, t1, SEXP_BIAS		# bias exponent
-	and	t2, t2, ~SIMPL_ONE		# clear implied one bit
-inexact_nobias_s:
-	jal	set_fd_s			# save result
-	or	a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	b	done
-
-/*
- * Overflow will trap (if enabled),
- * or generate an inexact trap (if enabled),
- * or generate an infinity.
- */
-overflow_s:
-	or	a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW
-	and	v0, a1, MIPS_FPU_ENABLE_OVERFLOW
-	beq	v0, zero, 1f
-	subu	t1, t1, 192			# bias exponent
-	and	t2, t2, ~SIMPL_ONE		# clear implied one bit
-	jal	set_fd_s			# save result
-	b	fpe_trap
-1:
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 1f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 2f	# round to +infinity
-	bne	t0, zero, 3f
-1:
-	li	t1, SEXP_MAX			# result is max finite
-	li	t2, 0x007fffff
-	b	inexact_s
-2:
-	bne	t0, zero, 1b
-3:
-	li	t1, SEXP_MAX + 1		# result is infinity
-	move	t2, zero
-	b	inexact_s
-
-/*
- * In this implementation, "tininess" is detected "after rounding" and
- * "loss of accuracy" is detected as "an inexact result".
- */
-underflow_s:
-	and	v0, a1, MIPS_FPU_ENABLE_UNDERFLOW
-	beq	v0, zero, 1f
-/*
- * Underflow is enabled so compute the result and trap.
- */
-	addu	t1, t1, 192			# bias exponent
-	and	t2, t2, ~SIMPL_ONE		# clear implied one bit
-	jal	set_fd_s			# save result
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-	b	fpe_trap
-/*
- * Underflow is not enabled so compute the result,
- * signal inexact result (if it is) and trap (if enabled).
- */
-1:
-	move	t1, ta1				# get unrounded exponent
-	move	t2, ta2				# get unrounded fraction
-	li	t9, SEXP_MIN			# compute shift amount
-	subu	t9, t9, t1			# shift t2,t8 right by t9
-	blt	t9, SFRAC_BITS+2, 3f		# shift all the bits out?
-	move	t1, zero			# result is inexact zero
-	move	t2, zero
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-/*
- * Now round the zero result.
- * Only need to worry about rounding to +- infinity when the sign matches.
- */
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, inexact_nobias_s # round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, inexact_nobias_s # round to zero
-	beq	v0, MIPS_FPU_ROUND_RP, 1f		# round to +infinity
-	beq	t0, zero, inexact_nobias_s	# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, inexact_nobias_s	# if sign is negative, truncate
-2:
-	addu	t2, t2, 1			# add rounding bit
-	b	inexact_nobias_s
-3:
-	li	v1, 32
-	subu	v1, v1, t9
-	sltu	v0, zero, t8			# be sure to save any one bits
-	sll	t8, t2, v1			# save bits shifted out
-	or	t8, t8, v0			# include sticky bits
-	srl	t2, t2, t9
-/*
- * Now round the denormalized result.
- */
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 5f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 1f	# round to +infinity
-	beq	t0, zero, 5f			# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, 5f			# if sign is negative, truncate
-2:
-	beq	t8, zero, 5f			# if exact, continue
-	addu	t2, t2, 1			# add rounding bit
-	b	5f
-3:
-	li	v0, GUARDBIT			# load guard bit for rounding
-	addu	v0, v0, t8			# add remainder
-	sltu	v1, v0, t8			# compute carry out
-	beq	v1, zero, 4f			# if no carry, continue
-	addu	t2, t2, 1			# add carry to result
-4:
-	bne	v0, zero, 5f			# if rounded remainder is zero
-	and	t2, t2, ~1			#  clear LSB (round to nearest)
-5:
-	move	t1, zero			# denorm or zero exponent
-	jal	set_fd_s			# save result
-	beq	t8, zero, done			# check for exact result
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-	or	a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	b	done
-
-/*
- * Determine the amount to shift the fraction in order to restore the
- * normalized position. After that, round and handle exceptions.
- */
-norm_d:
-	move	v0, t2
-	move	t9, zero			# t9 = num of leading zeros
-	bne	t2, zero, 1f
-	move	v0, t3
-	addu	t9, 32
-	bne	t3, zero, 1f
-	move	v0, t8
-	addu	t9, 32
-1:
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2,t3,t8 the correct number of bits.
- */
-1:
-	subu	t9, t9, DLEAD_ZEROS		# dont count leading zeros
-	subu	t1, t1, t9			# adjust the exponent
-	beq	t9, zero, norm_noshift_d
-	li	v1, 32
-	blt	t9, zero, 2f			# if shift < 0, shift right
-	blt	t9, v1, 1f			# shift by < 32?
-	subu	t9, t9, v1			# shift by >= 32
-	subu	v1, v1, t9
-	sll	t2, t3, t9			# shift left by t9
-	srl	v0, t8, v1			# save bits shifted out
-	or	t2, t2, v0
-	sll	t3, t8, t9
-	move	t8, zero
-	b	norm_noshift_d
-1:
-	subu	v1, v1, t9
-	sll	t2, t2, t9			# shift left by t9
-	srl	v0, t3, v1			# save bits shifted out
-	or	t2, t2, v0
-	sll	t3, t3, t9
-	srl	v0, t8, v1			# save bits shifted out
-	or	t3, t3, v0
-	sll	t8, t8, t9
-	b	norm_noshift_d
-2:
-	negu	t9				# shift right by t9
-	subu	v1, v1, t9			#  (known to be < 32 bits)
-	sll	v0, t8, v1			# save bits shifted out
-	sltu	v0, zero, v0			# be sure to save any one bits
-	srl	t8, t8, t9
-	or	t8, t8, v0
-	sll	v0, t3, v1			# save bits shifted out
-	or	t8, t8, v0
-	srl	t3, t3, t9
-	sll	v0, t2, v1			# save bits shifted out
-	or	t3, t3, v0
-	srl	t2, t2, t9
-norm_noshift_d:
-	move	ta1, t1				# save unrounded exponent
-	move	ta2, t2				# save unrounded fraction (MS)
-	move	ta3, t3				# save unrounded fraction (LS)
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 5f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 1f	# round to +infinity
-	beq	t0, zero, 5f			# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, 5f			# if sign is negative, truncate
-2:
-	beq	t8, zero, 5f			# if exact, continue
-	addu	t3, t3, 1			# add rounding bit
-	bne	t3, zero, 5f			# branch if no carry
-	addu	t2, t2, 1			# add carry
-	bne	t2, DIMPL_ONE<<1, 5f		# need to adjust exponent?
-	addu	t1, t1, 1			# adjust exponent
-	srl	t2, t2, 1			# renormalize fraction
-	b	5f
-3:
-	li	v0, GUARDBIT			# load guard bit for rounding
-	addu	v0, v0, t8			# add remainder
-	sltu	v1, v0, t8			# compute carry out
-	beq	v1, zero, 4f			# branch if no carry
-	addu	t3, t3, 1			# add carry
-	bne	t3, zero, 4f			# branch if no carry
-	addu	t2, t2, 1			# add carry to result
-	bne	t2, DIMPL_ONE<<1, 4f		# need to adjust exponent?
-	addu	t1, t1, 1			# adjust exponent
-	srl	t2, t2, 1			# renormalize fraction
-4:
-	bne	v0, zero, 5f			# if rounded remainder is zero
-	and	t3, t3, ~1			#  clear LSB (round to nearest)
-5:
-	bgt	t1, DEXP_MAX, overflow_d	# overflow?
-	blt	t1, DEXP_MIN, underflow_d	# underflow?
-	bne	t8, zero, inexact_d		# is result inexact?
-	addu	t1, t1, DEXP_BIAS		# bias exponent
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-	b	result_fs_d
-
-/*
- * Handle inexact exception.
- */
-inexact_d:
-	addu	t1, t1, DEXP_BIAS		# bias exponent
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-inexact_nobias_d:
-	jal	set_fd_d			# save result
-	or	a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	b	done
-
-/*
- * Overflow will trap (if enabled),
- * or generate an inexact trap (if enabled),
- * or generate an infinity.
- */
-overflow_d:
-	or	a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW
-	and	v0, a1, MIPS_FPU_ENABLE_OVERFLOW
-	beq	v0, zero, 1f
-	subu	t1, t1, 1536			# bias exponent
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-	jal	set_fd_d			# save result
-	b	fpe_trap
-1:
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 1f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 2f	# round to +infinity
-	bne	t0, zero, 3f
-1:
-	li	t1, DEXP_MAX			# result is max finite
-	li	t2, 0x000fffff
-	li	t3, 0xffffffff
-	b	inexact_d
-2:
-	bne	t0, zero, 1b
-3:
-	li	t1, DEXP_MAX + 1		# result is infinity
-	move	t2, zero
-	move	t3, zero
-	b	inexact_d
-
-/*
- * In this implementation, "tininess" is detected "after rounding" and
- * "loss of accuracy" is detected as "an inexact result".
- */
-underflow_d:
-	and	v0, a1, MIPS_FPU_ENABLE_UNDERFLOW
-	beq	v0, zero, 1f
-/*
- * Underflow is enabled so compute the result and trap.
- */
-	addu	t1, t1, 1536			# bias exponent
-	and	t2, t2, ~DIMPL_ONE		# clear implied one bit
-	jal	set_fd_d			# save result
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-	b	fpe_trap
-/*
- * Underflow is not enabled so compute the result,
- * signal inexact result (if it is) and trap (if enabled).
- */
-1:
-	move	t1, ta1				# get unrounded exponent
-	move	t2, ta2				# get unrounded fraction (MS)
-	move	t3, ta3				# get unrounded fraction (LS)
-	li	t9, DEXP_MIN			# compute shift amount
-	subu	t9, t9, t1			# shift t2,t8 right by t9
-	blt	t9, DFRAC_BITS+2, 3f		# shift all the bits out?
-	move	t1, zero			# result is inexact zero
-	move	t2, zero
-	move	t3, zero
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-/*
- * Now round the zero result.
- * Only need to worry about rounding to +- infinity when the sign matches.
- */
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, inexact_nobias_d  # round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, inexact_nobias_d  # round to zero
-	beq	v0, MIPS_FPU_ROUND_RP, 1f		# round to +infinity
-	beq	t0, zero, inexact_nobias_d	# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, inexact_nobias_d	# if sign is negative, truncate
-2:
-	addu	t3, t3, 1			# add rounding bit
-	b	inexact_nobias_d
-3:
-	li	v1, 32
-	blt	t9, v1, 1f			# shift by < 32?
-	subu	t9, t9, v1			# shift right by >= 32
-	subu	v1, v1, t9
-	sltu	v0, zero, t8			# be sure to save any one bits
-	sll	t8, t2, v1			# save bits shifted out
-	or	t8, t8, v0			# include sticky bits
-	srl	t3, t2, t9
-	move	t2, zero
-	b	2f
-1:
-	subu	v1, v1, t9			# shift right by t9
-	sltu	v0, zero, t8			# be sure to save any one bits
-	sll	t8, t3, v1			# save bits shifted out
-	or	t8, t8, v0			# include sticky bits
-	srl	t3, t3, t9
-	sll	v0, t2, v1			# save bits shifted out
-	or	t3, t3, v0
-	srl	t2, t2, t9
-/*
- * Now round the denormalized result.
- */
-2:
-	and	v0, a1, MIPS_FPU_ROUNDING_BITS	# get rounding mode
-	beq	v0, MIPS_FPU_ROUND_RN, 3f	# round to nearest
-	beq	v0, MIPS_FPU_ROUND_RZ, 5f	# round to zero (truncate)
-	beq	v0, MIPS_FPU_ROUND_RP, 1f	# round to +infinity
-	beq	t0, zero, 5f			# if sign is positive, truncate
-	b	2f
-1:
-	bne	t0, zero, 5f			# if sign is negative, truncate
-2:
-	beq	t8, zero, 5f			# if exact, continue
-	addu	t3, t3, 1			# add rounding bit
-	bne	t3, zero, 5f			# if no carry, continue
-	addu	t2, t2, 1			# add carry
-	b	5f
-3:
-	li	v0, GUARDBIT			# load guard bit for rounding
-	addu	v0, v0, t8			# add remainder
-	sltu	v1, v0, t8			# compute carry out
-	beq	v1, zero, 4f			# if no carry, continue
-	addu	t3, t3, 1			# add rounding bit
-	bne	t3, zero, 4f			# if no carry, continue
-	addu	t2, t2, 1			# add carry
-4:
-	bne	v0, zero, 5f			# if rounded remainder is zero
-	and	t3, t3, ~1			#  clear LSB (round to nearest)
-5:
-	move	t1, zero			# denorm or zero exponent
-	jal	set_fd_d			# save result
-	beq	t8, zero, done			# check for exact result
-	or	a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW
-	or	a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT
-	and	v0, a1, MIPS_FPU_ENABLE_INEXACT
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	b	done
-
-/*
- * Signal an invalid operation if the trap is enabled; otherwise,
- * the result is a quiet NAN.
- */
-invalid_s:					# trap invalid operation
-	or	a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID
-	and	v0, a1, MIPS_FPU_ENABLE_INVALID
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	move	t0, zero			# result is a quiet NAN
-	li	t1, SEXP_INF
-	li	t2, SQUIET_NAN
-	jal	set_fd_s			# save result (in t0,t1,t2)
-	b	done
-
-/*
- * Signal an invalid operation if the trap is enabled; otherwise,
- * the result is a quiet NAN.
- */
-invalid_d:					# trap invalid operation
-	or	a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID
-	and	v0, a1, MIPS_FPU_ENABLE_INVALID
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	move	t0, zero			# result is a quiet NAN
-	li	t1, DEXP_INF
-	li	t2, DQUIET_NAN0
-	li	t3, DQUIET_NAN1
-	jal	set_fd_d			# save result (in t0,t1,t2,t3)
-	b	done
-
-/*
- * Signal an invalid operation if the trap is enabled; otherwise,
- * the result is INT_MAX or INT_MIN.
- */
-invalid_w:					# trap invalid operation
-	or	a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID
-	and	v0, a1, MIPS_FPU_ENABLE_INVALID
-	bne	v0, zero, fpe_trap
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	bne	t0, zero, 1f
-	li	t2, INT_MAX			# result is INT_MAX
-	b	result_fs_w
-1:
-	li	t2, INT_MIN			# result is INT_MIN
-	b	result_fs_w
-
-/*
- * Trap if the hardware should have handled this case.
- */
-fpe_trap:
-	move	a2, a1				# code = FP CSR
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	break	0
-
-/*
- * Send an illegal instruction signal to the current process.
- */
-ill:
-	ctc1	a1, MIPS_FPU_CSR		# save exceptions
-	move	a2, a0				# code = FP instruction
-	break	0
-
-result_ft_s:
-	move	t0, ta0				# result is FT
-	move	t1, ta1
-	move	t2, ta2
-result_fs_s:					# result is FS
-	jal	set_fd_s			# save result (in t0,t1,t2)
-	b	done
-
-result_fs_w:
-	jal	set_fd_word			# save result (in t2)
-	b	done
-
-result_ft_d:
-	move	t0, ta0				# result is FT
-	move	t1, ta1
-	move	t2, ta2
-	move	t3, ta3
-result_fs_d:					# result is FS
-	jal	set_fd_d			# save result (in t0,t1,t2,t3)
-
-done:
-	lw	ra, CALLFRAME_RA(sp)
-	addu	sp, sp, CALLFRAME_SIZ
-	j	ra
-END(MipsEmulateFP)
-
-/*----------------------------------------------------------------------------
- * get_fs_int --
- *
- *	Read (integer) the FS register (bits 15-11).
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the sign
- *	t2	contains the fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(get_fs_int)
-	srl	a3, a0, 12 - 2			# get FS field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FS field
-	lw	a3, get_fs_int_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-get_fs_int_tbl:
-	.word	get_fs_int_f0
-	.word	get_fs_int_f2
-	.word	get_fs_int_f4
-	.word	get_fs_int_f6
-	.word	get_fs_int_f8
-	.word	get_fs_int_f10
-	.word	get_fs_int_f12
-	.word	get_fs_int_f14
-	.word	get_fs_int_f16
-	.word	get_fs_int_f18
-	.word	get_fs_int_f20
-	.word	get_fs_int_f22
-	.word	get_fs_int_f24
-	.word	get_fs_int_f26
-	.word	get_fs_int_f28
-	.word	get_fs_int_f30
-	.text
-
-get_fs_int_f0:
-	mfc1	t2, $f0
-	b	get_fs_int_done
-get_fs_int_f2:
-	mfc1	t2, $f2
-	b	get_fs_int_done
-get_fs_int_f4:
-	mfc1	t2, $f4
-	b	get_fs_int_done
-get_fs_int_f6:
-	mfc1	t2, $f6
-	b	get_fs_int_done
-get_fs_int_f8:
-	mfc1	t2, $f8
-	b	get_fs_int_done
-get_fs_int_f10:
-	mfc1	t2, $f10
-	b	get_fs_int_done
-get_fs_int_f12:
-	mfc1	t2, $f12
-	b	get_fs_int_done
-get_fs_int_f14:
-	mfc1	t2, $f14
-	b	get_fs_int_done
-get_fs_int_f16:
-	mfc1	t2, $f16
-	b	get_fs_int_done
-get_fs_int_f18:
-	mfc1	t2, $f18
-	b	get_fs_int_done
-get_fs_int_f20:
-	mfc1	t2, $f20
-	b	get_fs_int_done
-get_fs_int_f22:
-	mfc1	t2, $f22
-	b	get_fs_int_done
-get_fs_int_f24:
-	mfc1	t2, $f24
-	b	get_fs_int_done
-get_fs_int_f26:
-	mfc1	t2, $f26
-	b	get_fs_int_done
-get_fs_int_f28:
-	mfc1	t2, $f28
-	b	get_fs_int_done
-get_fs_int_f30:
-	mfc1	t2, $f30
-get_fs_int_done:
-	srl	t0, t2, 31			# init the sign bit
-	bge	t2, zero, 1f
-	negu	t2
-1:
-	j	ra
-END(get_fs_int)
-
-/*----------------------------------------------------------------------------
- * get_ft_fs_s --
- *
- *	Read (single precision) the FT register (bits 20-16) and
- *	the FS register (bits 15-11) and break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the FS sign
- *	t1	contains the FS (biased) exponent
- *	t2	contains the FS fraction
- *	ta0	contains the FT sign
- *	ta1	contains the FT (biased) exponent
- *	ta2	contains the FT fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(get_ft_fs_s)
-	srl	a3, a0, 17 - 2			# get FT field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FT field
-	lw	a3, get_ft_s_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-get_ft_s_tbl:
-	.word	get_ft_s_f0
-	.word	get_ft_s_f2
-	.word	get_ft_s_f4
-	.word	get_ft_s_f6
-	.word	get_ft_s_f8
-	.word	get_ft_s_f10
-	.word	get_ft_s_f12
-	.word	get_ft_s_f14
-	.word	get_ft_s_f16
-	.word	get_ft_s_f18
-	.word	get_ft_s_f20
-	.word	get_ft_s_f22
-	.word	get_ft_s_f24
-	.word	get_ft_s_f26
-	.word	get_ft_s_f28
-	.word	get_ft_s_f30
-	.text
-
-get_ft_s_f0:
-	mfc1	ta0, $f0
-	b	get_ft_s_done
-get_ft_s_f2:
-	mfc1	ta0, $f2
-	b	get_ft_s_done
-get_ft_s_f4:
-	mfc1	ta0, $f4
-	b	get_ft_s_done
-get_ft_s_f6:
-	mfc1	ta0, $f6
-	b	get_ft_s_done
-get_ft_s_f8:
-	mfc1	ta0, $f8
-	b	get_ft_s_done
-get_ft_s_f10:
-	mfc1	ta0, $f10
-	b	get_ft_s_done
-get_ft_s_f12:
-	mfc1	ta0, $f12
-	b	get_ft_s_done
-get_ft_s_f14:
-	mfc1	ta0, $f14
-	b	get_ft_s_done
-get_ft_s_f16:
-	mfc1	ta0, $f16
-	b	get_ft_s_done
-get_ft_s_f18:
-	mfc1	ta0, $f18
-	b	get_ft_s_done
-get_ft_s_f20:
-	mfc1	ta0, $f20
-	b	get_ft_s_done
-get_ft_s_f22:
-	mfc1	ta0, $f22
-	b	get_ft_s_done
-get_ft_s_f24:
-	mfc1	ta0, $f24
-	b	get_ft_s_done
-get_ft_s_f26:
-	mfc1	ta0, $f26
-	b	get_ft_s_done
-get_ft_s_f28:
-	mfc1	ta0, $f28
-	b	get_ft_s_done
-get_ft_s_f30:
-	mfc1	ta0, $f30
-get_ft_s_done:
-	srl	ta1, ta0, 23			# get exponent
-	and	ta1, ta1, 0xFF
-	and	ta2, ta0, 0x7FFFFF		# get fraction
-	srl	ta0, ta0, 31			# get sign
-	bne	ta1, SEXP_INF, 1f		# is it a signaling NAN?
-	and	v0, ta2, SSIGNAL_NAN
-	bne	v0, zero, invalid_s
-1:
-	/* fall through to get FS */
-
-/*----------------------------------------------------------------------------
- * get_fs_s --
- *
- *	Read (single precision) the FS register (bits 15-11) and
- *	break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *
- *----------------------------------------------------------------------------
- */
-XLEAF(get_fs_s)
-	srl	a3, a0, 12 - 2			# get FS field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FS field
-	lw	a3, get_fs_s_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-get_fs_s_tbl:
-	.word	get_fs_s_f0
-	.word	get_fs_s_f2
-	.word	get_fs_s_f4
-	.word	get_fs_s_f6
-	.word	get_fs_s_f8
-	.word	get_fs_s_f10
-	.word	get_fs_s_f12
-	.word	get_fs_s_f14
-	.word	get_fs_s_f16
-	.word	get_fs_s_f18
-	.word	get_fs_s_f20
-	.word	get_fs_s_f22
-	.word	get_fs_s_f24
-	.word	get_fs_s_f26
-	.word	get_fs_s_f28
-	.word	get_fs_s_f30
-	.text
-
-get_fs_s_f0:
-	mfc1	t0, $f0
-	b	get_fs_s_done
-get_fs_s_f2:
-	mfc1	t0, $f2
-	b	get_fs_s_done
-get_fs_s_f4:
-	mfc1	t0, $f4
-	b	get_fs_s_done
-get_fs_s_f6:
-	mfc1	t0, $f6
-	b	get_fs_s_done
-get_fs_s_f8:
-	mfc1	t0, $f8
-	b	get_fs_s_done
-get_fs_s_f10:
-	mfc1	t0, $f10
-	b	get_fs_s_done
-get_fs_s_f12:
-	mfc1	t0, $f12
-	b	get_fs_s_done
-get_fs_s_f14:
-	mfc1	t0, $f14
-	b	get_fs_s_done
-get_fs_s_f16:
-	mfc1	t0, $f16
-	b	get_fs_s_done
-get_fs_s_f18:
-	mfc1	t0, $f18
-	b	get_fs_s_done
-get_fs_s_f20:
-	mfc1	t0, $f20
-	b	get_fs_s_done
-get_fs_s_f22:
-	mfc1	t0, $f22
-	b	get_fs_s_done
-get_fs_s_f24:
-	mfc1	t0, $f24
-	b	get_fs_s_done
-get_fs_s_f26:
-	mfc1	t0, $f26
-	b	get_fs_s_done
-get_fs_s_f28:
-	mfc1	t0, $f28
-	b	get_fs_s_done
-get_fs_s_f30:
-	mfc1	t0, $f30
-get_fs_s_done:
-	srl	t1, t0, 23			# get exponent
-	and	t1, t1, 0xFF
-	and	t2, t0, 0x7FFFFF		# get fraction
-	srl	t0, t0, 31			# get sign
-	bne	t1, SEXP_INF, 1f		# is it a signaling NAN?
-	and	v0, t2, SSIGNAL_NAN
-	bne	v0, zero, invalid_s
-1:
-	j	ra
-END(get_ft_fs_s)
-
-/*----------------------------------------------------------------------------
- * get_ft_fs_d --
- *
- *	Read (double precision) the FT register (bits 20-16) and
- *	the FS register (bits 15-11) and break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the FS sign
- *	t1	contains the FS (biased) exponent
- *	t2	contains the FS fraction
- *	t3	contains the FS remaining fraction
- *	ta0	contains the FT sign
- *	ta1	contains the FT (biased) exponent
- *	ta2	contains the FT fraction
- *	ta3	contains the FT remaining fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(get_ft_fs_d)
-	srl	a3, a0, 17 - 2			# get FT field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FT field
-	lw	a3, get_ft_d_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-get_ft_d_tbl:
-	.word	get_ft_d_f0
-	.word	get_ft_d_f2
-	.word	get_ft_d_f4
-	.word	get_ft_d_f6
-	.word	get_ft_d_f8
-	.word	get_ft_d_f10
-	.word	get_ft_d_f12
-	.word	get_ft_d_f14
-	.word	get_ft_d_f16
-	.word	get_ft_d_f18
-	.word	get_ft_d_f20
-	.word	get_ft_d_f22
-	.word	get_ft_d_f24
-	.word	get_ft_d_f26
-	.word	get_ft_d_f28
-	.word	get_ft_d_f30
-	.text
-
-get_ft_d_f0:
-	mfc1	ta3, $f0
-	mfc1	ta0, $f1
-	b	get_ft_d_done
-get_ft_d_f2:
-	mfc1	ta3, $f2
-	mfc1	ta0, $f3
-	b	get_ft_d_done
-get_ft_d_f4:
-	mfc1	ta3, $f4
-	mfc1	ta0, $f5
-	b	get_ft_d_done
-get_ft_d_f6:
-	mfc1	ta3, $f6
-	mfc1	ta0, $f7
-	b	get_ft_d_done
-get_ft_d_f8:
-	mfc1	ta3, $f8
-	mfc1	ta0, $f9
-	b	get_ft_d_done
-get_ft_d_f10:
-	mfc1	ta3, $f10
-	mfc1	ta0, $f11
-	b	get_ft_d_done
-get_ft_d_f12:
-	mfc1	ta3, $f12
-	mfc1	ta0, $f13
-	b	get_ft_d_done
-get_ft_d_f14:
-	mfc1	ta3, $f14
-	mfc1	ta0, $f15
-	b	get_ft_d_done
-get_ft_d_f16:
-	mfc1	ta3, $f16
-	mfc1	ta0, $f17
-	b	get_ft_d_done
-get_ft_d_f18:
-	mfc1	ta3, $f18
-	mfc1	ta0, $f19
-	b	get_ft_d_done
-get_ft_d_f20:
-	mfc1	ta3, $f20
-	mfc1	ta0, $f21
-	b	get_ft_d_done
-get_ft_d_f22:
-	mfc1	ta3, $f22
-	mfc1	ta0, $f23
-	b	get_ft_d_done
-get_ft_d_f24:
-	mfc1	ta3, $f24
-	mfc1	ta0, $f25
-	b	get_ft_d_done
-get_ft_d_f26:
-	mfc1	ta3, $f26
-	mfc1	ta0, $f27
-	b	get_ft_d_done
-get_ft_d_f28:
-	mfc1	ta3, $f28
-	mfc1	ta0, $f29
-	b	get_ft_d_done
-get_ft_d_f30:
-	mfc1	ta3, $f30
-	mfc1	ta0, $f31
-get_ft_d_done:
-	srl	ta1, ta0, 20			# get exponent
-	and	ta1, ta1, 0x7FF
-	and	ta2, ta0, 0xFFFFF		# get fraction
-	srl	ta0, ta0, 31			# get sign
-	bne	ta1, DEXP_INF, 1f		# is it a signaling NAN?
-	and	v0, ta2, DSIGNAL_NAN
-	bne	v0, zero, invalid_d
-1:
-	/* fall through to get FS */
-
-/*----------------------------------------------------------------------------
- * get_fs_d --
- *
- *	Read (double precision) the FS register (bits 15-11) and
- *	break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *	t3	contains the remaining fraction
- *
- *----------------------------------------------------------------------------
- */
-XLEAF(get_fs_d)
-	srl	a3, a0, 12 - 2			# get FS field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FS field
-	lw	a3, get_fs_d_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-get_fs_d_tbl:
-	.word	get_fs_d_f0
-	.word	get_fs_d_f2
-	.word	get_fs_d_f4
-	.word	get_fs_d_f6
-	.word	get_fs_d_f8
-	.word	get_fs_d_f10
-	.word	get_fs_d_f12
-	.word	get_fs_d_f14
-	.word	get_fs_d_f16
-	.word	get_fs_d_f18
-	.word	get_fs_d_f20
-	.word	get_fs_d_f22
-	.word	get_fs_d_f24
-	.word	get_fs_d_f26
-	.word	get_fs_d_f28
-	.word	get_fs_d_f30
-	.text
-
-get_fs_d_f0:
-	mfc1	t3, $f0
-	mfc1	t0, $f1
-	b	get_fs_d_done
-get_fs_d_f2:
-	mfc1	t3, $f2
-	mfc1	t0, $f3
-	b	get_fs_d_done
-get_fs_d_f4:
-	mfc1	t3, $f4
-	mfc1	t0, $f5
-	b	get_fs_d_done
-get_fs_d_f6:
-	mfc1	t3, $f6
-	mfc1	t0, $f7
-	b	get_fs_d_done
-get_fs_d_f8:
-	mfc1	t3, $f8
-	mfc1	t0, $f9
-	b	get_fs_d_done
-get_fs_d_f10:
-	mfc1	t3, $f10
-	mfc1	t0, $f11
-	b	get_fs_d_done
-get_fs_d_f12:
-	mfc1	t3, $f12
-	mfc1	t0, $f13
-	b	get_fs_d_done
-get_fs_d_f14:
-	mfc1	t3, $f14
-	mfc1	t0, $f15
-	b	get_fs_d_done
-get_fs_d_f16:
-	mfc1	t3, $f16
-	mfc1	t0, $f17
-	b	get_fs_d_done
-get_fs_d_f18:
-	mfc1	t3, $f18
-	mfc1	t0, $f19
-	b	get_fs_d_done
-get_fs_d_f20:
-	mfc1	t3, $f20
-	mfc1	t0, $f21
-	b	get_fs_d_done
-get_fs_d_f22:
-	mfc1	t3, $f22
-	mfc1	t0, $f23
-	b	get_fs_d_done
-get_fs_d_f24:
-	mfc1	t3, $f24
-	mfc1	t0, $f25
-	b	get_fs_d_done
-get_fs_d_f26:
-	mfc1	t3, $f26
-	mfc1	t0, $f27
-	b	get_fs_d_done
-get_fs_d_f28:
-	mfc1	t3, $f28
-	mfc1	t0, $f29
-	b	get_fs_d_done
-get_fs_d_f30:
-	mfc1	t3, $f30
-	mfc1	t0, $f31
-get_fs_d_done:
-	srl	t1, t0, 20			# get exponent
-	and	t1, t1, 0x7FF
-	and	t2, t0, 0xFFFFF			# get fraction
-	srl	t0, t0, 31			# get sign
-	bne	t1, DEXP_INF, 1f		# is it a signaling NAN?
-	and	v0, t2, DSIGNAL_NAN
-	bne	v0, zero, invalid_d
-1:
-	j	ra
-END(get_ft_fs_d)
-
-/*----------------------------------------------------------------------------
- * get_cmp_s --
- *
- *	Read (single precision) the FS register (bits 15-11) and
- *	the FT register (bits 20-16) and break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *	ta0	contains the sign
- *	ta1	contains the (biased) exponent
- *	ta2	contains the fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(get_cmp_s)
-	srl	a3, a0, 12 - 2			# get FS field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FS field
-	lw	a3, cmp_fs_s_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-cmp_fs_s_tbl:
-	.word	cmp_fs_s_f0
-	.word	cmp_fs_s_f2
-	.word	cmp_fs_s_f4
-	.word	cmp_fs_s_f6
-	.word	cmp_fs_s_f8
-	.word	cmp_fs_s_f10
-	.word	cmp_fs_s_f12
-	.word	cmp_fs_s_f14
-	.word	cmp_fs_s_f16
-	.word	cmp_fs_s_f18
-	.word	cmp_fs_s_f20
-	.word	cmp_fs_s_f22
-	.word	cmp_fs_s_f24
-	.word	cmp_fs_s_f26
-	.word	cmp_fs_s_f28
-	.word	cmp_fs_s_f30
-	.text
-
-cmp_fs_s_f0:
-	mfc1	t0, $f0
-	b	cmp_fs_s_done
-cmp_fs_s_f2:
-	mfc1	t0, $f2
-	b	cmp_fs_s_done
-cmp_fs_s_f4:
-	mfc1	t0, $f4
-	b	cmp_fs_s_done
-cmp_fs_s_f6:
-	mfc1	t0, $f6
-	b	cmp_fs_s_done
-cmp_fs_s_f8:
-	mfc1	t0, $f8
-	b	cmp_fs_s_done
-cmp_fs_s_f10:
-	mfc1	t0, $f10
-	b	cmp_fs_s_done
-cmp_fs_s_f12:
-	mfc1	t0, $f12
-	b	cmp_fs_s_done
-cmp_fs_s_f14:
-	mfc1	t0, $f14
-	b	cmp_fs_s_done
-cmp_fs_s_f16:
-	mfc1	t0, $f16
-	b	cmp_fs_s_done
-cmp_fs_s_f18:
-	mfc1	t0, $f18
-	b	cmp_fs_s_done
-cmp_fs_s_f20:
-	mfc1	t0, $f20
-	b	cmp_fs_s_done
-cmp_fs_s_f22:
-	mfc1	t0, $f22
-	b	cmp_fs_s_done
-cmp_fs_s_f24:
-	mfc1	t0, $f24
-	b	cmp_fs_s_done
-cmp_fs_s_f26:
-	mfc1	t0, $f26
-	b	cmp_fs_s_done
-cmp_fs_s_f28:
-	mfc1	t0, $f28
-	b	cmp_fs_s_done
-cmp_fs_s_f30:
-	mfc1	t0, $f30
-cmp_fs_s_done:
-	srl	t1, t0, 23			# get exponent
-	and	t1, t1, 0xFF
-	and	t2, t0, 0x7FFFFF		# get fraction
-	srl	t0, t0, 31			# get sign
-
-	srl	a3, a0, 17 - 2			# get FT field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FT field
-	lw	a3, cmp_ft_s_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-cmp_ft_s_tbl:
-	.word	cmp_ft_s_f0
-	.word	cmp_ft_s_f2
-	.word	cmp_ft_s_f4
-	.word	cmp_ft_s_f6
-	.word	cmp_ft_s_f8
-	.word	cmp_ft_s_f10
-	.word	cmp_ft_s_f12
-	.word	cmp_ft_s_f14
-	.word	cmp_ft_s_f16
-	.word	cmp_ft_s_f18
-	.word	cmp_ft_s_f20
-	.word	cmp_ft_s_f22
-	.word	cmp_ft_s_f24
-	.word	cmp_ft_s_f26
-	.word	cmp_ft_s_f28
-	.word	cmp_ft_s_f30
-	.text
-
-cmp_ft_s_f0:
-	mfc1	ta0, $f0
-	b	cmp_ft_s_done
-cmp_ft_s_f2:
-	mfc1	ta0, $f2
-	b	cmp_ft_s_done
-cmp_ft_s_f4:
-	mfc1	ta0, $f4
-	b	cmp_ft_s_done
-cmp_ft_s_f6:
-	mfc1	ta0, $f6
-	b	cmp_ft_s_done
-cmp_ft_s_f8:
-	mfc1	ta0, $f8
-	b	cmp_ft_s_done
-cmp_ft_s_f10:
-	mfc1	ta0, $f10
-	b	cmp_ft_s_done
-cmp_ft_s_f12:
-	mfc1	ta0, $f12
-	b	cmp_ft_s_done
-cmp_ft_s_f14:
-	mfc1	ta0, $f14
-	b	cmp_ft_s_done
-cmp_ft_s_f16:
-	mfc1	ta0, $f16
-	b	cmp_ft_s_done
-cmp_ft_s_f18:
-	mfc1	ta0, $f18
-	b	cmp_ft_s_done
-cmp_ft_s_f20:
-	mfc1	ta0, $f20
-	b	cmp_ft_s_done
-cmp_ft_s_f22:
-	mfc1	ta0, $f22
-	b	cmp_ft_s_done
-cmp_ft_s_f24:
-	mfc1	ta0, $f24
-	b	cmp_ft_s_done
-cmp_ft_s_f26:
-	mfc1	ta0, $f26
-	b	cmp_ft_s_done
-cmp_ft_s_f28:
-	mfc1	ta0, $f28
-	b	cmp_ft_s_done
-cmp_ft_s_f30:
-	mfc1	ta0, $f30
-cmp_ft_s_done:
-	srl	ta1, ta0, 23			# get exponent
-	and	ta1, ta1, 0xFF
-	and	ta2, ta0, 0x7FFFFF		# get fraction
-	srl	ta0, ta0, 31			# get sign
-	j	ra
-END(get_cmp_s)
-
-/*----------------------------------------------------------------------------
- * get_cmp_d --
- *
- *	Read (double precision) the FS register (bits 15-11) and
- *	the FT register (bits 20-16) and break up into fields.
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Results:
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *	t3	contains the remaining fraction
- *	ta0	contains the sign
- *	ta1	contains the (biased) exponent
- *	ta2	contains the fraction
- *	ta3	contains the remaining fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(get_cmp_d)
-	srl	a3, a0, 12 - 2			# get FS field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FS field
-	lw	a3, cmp_fs_d_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-cmp_fs_d_tbl:
-	.word	cmp_fs_d_f0
-	.word	cmp_fs_d_f2
-	.word	cmp_fs_d_f4
-	.word	cmp_fs_d_f6
-	.word	cmp_fs_d_f8
-	.word	cmp_fs_d_f10
-	.word	cmp_fs_d_f12
-	.word	cmp_fs_d_f14
-	.word	cmp_fs_d_f16
-	.word	cmp_fs_d_f18
-	.word	cmp_fs_d_f20
-	.word	cmp_fs_d_f22
-	.word	cmp_fs_d_f24
-	.word	cmp_fs_d_f26
-	.word	cmp_fs_d_f28
-	.word	cmp_fs_d_f30
-	.text
-
-cmp_fs_d_f0:
-	mfc1	t3, $f0
-	mfc1	t0, $f1
-	b	cmp_fs_d_done
-cmp_fs_d_f2:
-	mfc1	t3, $f2
-	mfc1	t0, $f3
-	b	cmp_fs_d_done
-cmp_fs_d_f4:
-	mfc1	t3, $f4
-	mfc1	t0, $f5
-	b	cmp_fs_d_done
-cmp_fs_d_f6:
-	mfc1	t3, $f6
-	mfc1	t0, $f7
-	b	cmp_fs_d_done
-cmp_fs_d_f8:
-	mfc1	t3, $f8
-	mfc1	t0, $f9
-	b	cmp_fs_d_done
-cmp_fs_d_f10:
-	mfc1	t3, $f10
-	mfc1	t0, $f11
-	b	cmp_fs_d_done
-cmp_fs_d_f12:
-	mfc1	t3, $f12
-	mfc1	t0, $f13
-	b	cmp_fs_d_done
-cmp_fs_d_f14:
-	mfc1	t3, $f14
-	mfc1	t0, $f15
-	b	cmp_fs_d_done
-cmp_fs_d_f16:
-	mfc1	t3, $f16
-	mfc1	t0, $f17
-	b	cmp_fs_d_done
-cmp_fs_d_f18:
-	mfc1	t3, $f18
-	mfc1	t0, $f19
-	b	cmp_fs_d_done
-cmp_fs_d_f20:
-	mfc1	t3, $f20
-	mfc1	t0, $f21
-	b	cmp_fs_d_done
-cmp_fs_d_f22:
-	mfc1	t3, $f22
-	mfc1	t0, $f23
-	b	cmp_fs_d_done
-cmp_fs_d_f24:
-	mfc1	t3, $f24
-	mfc1	t0, $f25
-	b	cmp_fs_d_done
-cmp_fs_d_f26:
-	mfc1	t3, $f26
-	mfc1	t0, $f27
-	b	cmp_fs_d_done
-cmp_fs_d_f28:
-	mfc1	t3, $f28
-	mfc1	t0, $f29
-	b	cmp_fs_d_done
-cmp_fs_d_f30:
-	mfc1	t3, $f30
-	mfc1	t0, $f31
-cmp_fs_d_done:
-	srl	t1, t0, 20			# get exponent
-	and	t1, t1, 0x7FF
-	and	t2, t0, 0xFFFFF			# get fraction
-	srl	t0, t0, 31			# get sign
-
-	srl	a3, a0, 17 - 2			# get FT field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FT field
-	lw	a3, cmp_ft_d_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-cmp_ft_d_tbl:
-	.word	cmp_ft_d_f0
-	.word	cmp_ft_d_f2
-	.word	cmp_ft_d_f4
-	.word	cmp_ft_d_f6
-	.word	cmp_ft_d_f8
-	.word	cmp_ft_d_f10
-	.word	cmp_ft_d_f12
-	.word	cmp_ft_d_f14
-	.word	cmp_ft_d_f16
-	.word	cmp_ft_d_f18
-	.word	cmp_ft_d_f20
-	.word	cmp_ft_d_f22
-	.word	cmp_ft_d_f24
-	.word	cmp_ft_d_f26
-	.word	cmp_ft_d_f28
-	.word	cmp_ft_d_f30
-	.text
-
-cmp_ft_d_f0:
-	mfc1	ta3, $f0
-	mfc1	ta0, $f1
-	b	cmp_ft_d_done
-cmp_ft_d_f2:
-	mfc1	ta3, $f2
-	mfc1	ta0, $f3
-	b	cmp_ft_d_done
-cmp_ft_d_f4:
-	mfc1	ta3, $f4
-	mfc1	ta0, $f5
-	b	cmp_ft_d_done
-cmp_ft_d_f6:
-	mfc1	ta3, $f6
-	mfc1	ta0, $f7
-	b	cmp_ft_d_done
-cmp_ft_d_f8:
-	mfc1	ta3, $f8
-	mfc1	ta0, $f9
-	b	cmp_ft_d_done
-cmp_ft_d_f10:
-	mfc1	ta3, $f10
-	mfc1	ta0, $f11
-	b	cmp_ft_d_done
-cmp_ft_d_f12:
-	mfc1	ta3, $f12
-	mfc1	ta0, $f13
-	b	cmp_ft_d_done
-cmp_ft_d_f14:
-	mfc1	ta3, $f14
-	mfc1	ta0, $f15
-	b	cmp_ft_d_done
-cmp_ft_d_f16:
-	mfc1	ta3, $f16
-	mfc1	ta0, $f17
-	b	cmp_ft_d_done
-cmp_ft_d_f18:
-	mfc1	ta3, $f18
-	mfc1	ta0, $f19
-	b	cmp_ft_d_done
-cmp_ft_d_f20:
-	mfc1	ta3, $f20
-	mfc1	ta0, $f21
-	b	cmp_ft_d_done
-cmp_ft_d_f22:
-	mfc1	ta3, $f22
-	mfc1	ta0, $f23
-	b	cmp_ft_d_done
-cmp_ft_d_f24:
-	mfc1	ta3, $f24
-	mfc1	ta0, $f25
-	b	cmp_ft_d_done
-cmp_ft_d_f26:
-	mfc1	ta3, $f26
-	mfc1	ta0, $f27
-	b	cmp_ft_d_done
-cmp_ft_d_f28:
-	mfc1	ta3, $f28
-	mfc1	ta0, $f29
-	b	cmp_ft_d_done
-cmp_ft_d_f30:
-	mfc1	ta3, $f30
-	mfc1	ta0, $f31
-cmp_ft_d_done:
-	srl	ta1, ta0, 20			# get exponent
-	and	ta1, ta1, 0x7FF
-	and	ta2, ta0, 0xFFFFF		# get fraction
-	srl	ta0, ta0, 31			# get sign
-	j	ra
-END(get_cmp_d)
-
-/*----------------------------------------------------------------------------
- * set_fd_s --
- *
- *	Write (single precision) the FD register (bits 10-6).
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Arguments:
- *	a0	contains the FP instruction
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *
- * set_fd_word --
- *
- *	Write (integer) the FD register (bits 10-6).
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Arguments:
- *	a0	contains the FP instruction
- *	t2	contains the integer
- *
- *----------------------------------------------------------------------------
- */
-LEAF(set_fd_s)
-	sll	t0, t0, 31			# position sign
-	sll	t1, t1, 23			# position exponent
-	or	t2, t2, t0
-	or	t2, t2, t1
-XLEAF(set_fd_word)
-	srl	a3, a0, 7 - 2			# get FD field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FT field
-	lw	a3, set_fd_s_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-set_fd_s_tbl:
-	.word	set_fd_s_f0
-	.word	set_fd_s_f2
-	.word	set_fd_s_f4
-	.word	set_fd_s_f6
-	.word	set_fd_s_f8
-	.word	set_fd_s_f10
-	.word	set_fd_s_f12
-	.word	set_fd_s_f14
-	.word	set_fd_s_f16
-	.word	set_fd_s_f18
-	.word	set_fd_s_f20
-	.word	set_fd_s_f22
-	.word	set_fd_s_f24
-	.word	set_fd_s_f26
-	.word	set_fd_s_f28
-	.word	set_fd_s_f30
-	.text
-
-set_fd_s_f0:
-	mtc1	t2, $f0
-	j	ra
-set_fd_s_f2:
-	mtc1	t2, $f2
-	j	ra
-set_fd_s_f4:
-	mtc1	t2, $f4
-	j	ra
-set_fd_s_f6:
-	mtc1	t2, $f6
-	j	ra
-set_fd_s_f8:
-	mtc1	t2, $f8
-	j	ra
-set_fd_s_f10:
-	mtc1	t2, $f10
-	j	ra
-set_fd_s_f12:
-	mtc1	t2, $f12
-	j	ra
-set_fd_s_f14:
-	mtc1	t2, $f14
-	j	ra
-set_fd_s_f16:
-	mtc1	t2, $f16
-	j	ra
-set_fd_s_f18:
-	mtc1	t2, $f18
-	j	ra
-set_fd_s_f20:
-	mtc1	t2, $f20
-	j	ra
-set_fd_s_f22:
-	mtc1	t2, $f22
-	j	ra
-set_fd_s_f24:
-	mtc1	t2, $f24
-	j	ra
-set_fd_s_f26:
-	mtc1	t2, $f26
-	j	ra
-set_fd_s_f28:
-	mtc1	t2, $f28
-	j	ra
-set_fd_s_f30:
-	mtc1	t2, $f30
-	j	ra
-END(set_fd_s)
-
-/*----------------------------------------------------------------------------
- * set_fd_d --
- *
- *	Write (double precision) the FT register (bits 10-6).
- *	This is an internal routine used by MipsEmulateFP only.
- *
- * Arguments:
- *	a0	contains the FP instruction
- *	t0	contains the sign
- *	t1	contains the (biased) exponent
- *	t2	contains the fraction
- *	t3	contains the remaining fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(set_fd_d)
-	sll	t0, t0, 31			# set sign
-	sll	t1, t1, 20			# set exponent
-	or	t0, t0, t1
-	or	t0, t0, t2			# set fraction
-	srl	a3, a0, 7 - 2			# get FD field (even regs only)
-	and	a3, a3, 0xF << 2		# mask FD field
-	lw	a3, set_fd_d_tbl(a3)		# switch on register number
-	j	a3
-
-	.rdata
-set_fd_d_tbl:
-	.word	set_fd_d_f0
-	.word	set_fd_d_f2
-	.word	set_fd_d_f4
-	.word	set_fd_d_f6
-	.word	set_fd_d_f8
-	.word	set_fd_d_f10
-	.word	set_fd_d_f12
-	.word	set_fd_d_f14
-	.word	set_fd_d_f16
-	.word	set_fd_d_f18
-	.word	set_fd_d_f20
-	.word	set_fd_d_f22
-	.word	set_fd_d_f24
-	.word	set_fd_d_f26
-	.word	set_fd_d_f28
-	.word	set_fd_d_f30
-	.text
-
-set_fd_d_f0:
-	mtc1	t3, $f0
-	mtc1	t0, $f1
-	j	ra
-set_fd_d_f2:
-	mtc1	t3, $f2
-	mtc1	t0, $f3
-	j	ra
-set_fd_d_f4:
-	mtc1	t3, $f4
-	mtc1	t0, $f5
-	j	ra
-set_fd_d_f6:
-	mtc1	t3, $f6
-	mtc1	t0, $f7
-	j	ra
-set_fd_d_f8:
-	mtc1	t3, $f8
-	mtc1	t0, $f9
-	j	ra
-set_fd_d_f10:
-	mtc1	t3, $f10
-	mtc1	t0, $f11
-	j	ra
-set_fd_d_f12:
-	mtc1	t3, $f12
-	mtc1	t0, $f13
-	j	ra
-set_fd_d_f14:
-	mtc1	t3, $f14
-	mtc1	t0, $f15
-	j	ra
-set_fd_d_f16:
-	mtc1	t3, $f16
-	mtc1	t0, $f17
-	j	ra
-set_fd_d_f18:
-	mtc1	t3, $f18
-	mtc1	t0, $f19
-	j	ra
-set_fd_d_f20:
-	mtc1	t3, $f20
-	mtc1	t0, $f21
-	j	ra
-set_fd_d_f22:
-	mtc1	t3, $f22
-	mtc1	t0, $f23
-	j	ra
-set_fd_d_f24:
-	mtc1	t3, $f24
-	mtc1	t0, $f25
-	j	ra
-set_fd_d_f26:
-	mtc1	t3, $f26
-	mtc1	t0, $f27
-	j	ra
-set_fd_d_f28:
-	mtc1	t3, $f28
-	mtc1	t0, $f29
-	j	ra
-set_fd_d_f30:
-	mtc1	t3, $f30
-	mtc1	t0, $f31
-	j	ra
-END(set_fd_d)
-
-/*----------------------------------------------------------------------------
- * renorm_fs_s --
- *
- * Results:
- *	t1	unbiased exponent
- *	t2	normalized fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(renorm_fs_s)
-/*
- * Find out how many leading zero bits are in t2 and put in t9.
- */
-	move	v0, t2
-	move	t9, zero
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2 the correct number of bits.
- */
-1:
-	subu	t9, t9, SLEAD_ZEROS	# dont count normal leading zeros
-	li	t1, SEXP_MIN
-	subu	t1, t1, t9		# adjust exponent
-	sll	t2, t2, t9
-	j	ra
-END(renorm_fs_s)
-
-/*----------------------------------------------------------------------------
- * renorm_fs_d --
- *
- * Results:
- *	t1	unbiased exponent
- *	t2,t3	normalized fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(renorm_fs_d)
-/*
- * Find out how many leading zero bits are in t2,t3 and put in t9.
- */
-	move	v0, t2
-	move	t9, zero
-	bne	t2, zero, 1f
-	move	v0, t3
-	addu	t9, 32
-1:
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift t2,t3 the correct number of bits.
- */
-1:
-	subu	t9, t9, DLEAD_ZEROS	# dont count normal leading zeros
-	li	t1, DEXP_MIN
-	subu	t1, t1, t9		# adjust exponent
-	li	v0, 32
-	blt	t9, v0, 1f
-	subu	t9, t9, v0		# shift fraction left >= 32 bits
-	sll	t2, t3, t9
-	move	t3, zero
-	j	ra
-1:
-	subu	v0, v0, t9		# shift fraction left < 32 bits
-	sll	t2, t2, t9
-	srl	v1, t3, v0
-	or	t2, t2, v1
-	sll	t3, t3, t9
-	j	ra
-END(renorm_fs_d)
-
-/*----------------------------------------------------------------------------
- * renorm_ft_s --
- *
- * Results:
- *	ta1	unbiased exponent
- *	ta2	normalized fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(renorm_ft_s)
-/*
- * Find out how many leading zero bits are in ta2 and put in t9.
- */
-	move	v0, ta2
-	move	t9, zero
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift ta2 the correct number of bits.
- */
-1:
-	subu	t9, t9, SLEAD_ZEROS	# dont count normal leading zeros
-	li	ta1, SEXP_MIN
-	subu	ta1, ta1, t9		# adjust exponent
-	sll	ta2, ta2, t9
-	j	ra
-END(renorm_ft_s)
-
-/*----------------------------------------------------------------------------
- * renorm_ft_d --
- *
- * Results:
- *	ta1	unbiased exponent
- *	ta2,ta3	normalized fraction
- *
- *----------------------------------------------------------------------------
- */
-LEAF(renorm_ft_d)
-/*
- * Find out how many leading zero bits are in ta2,ta3 and put in t9.
- */
-	move	v0, ta2
-	move	t9, zero
-	bne	ta2, zero, 1f
-	move	v0, ta3
-	addu	t9, 32
-1:
-	srl	v1, v0, 16
-	bne	v1, zero, 1f
-	addu	t9, 16
-	sll	v0, 16
-1:
-	srl	v1, v0, 24
-	bne	v1, zero, 1f
-	addu	t9, 8
-	sll	v0, 8
-1:
-	srl	v1, v0, 28
-	bne	v1, zero, 1f
-	addu	t9, 4
-	sll	v0, 4
-1:
-	srl	v1, v0, 30
-	bne	v1, zero, 1f
-	addu	t9, 2
-	sll	v0, 2
-1:
-	srl	v1, v0, 31
-	bne	v1, zero, 1f
-	addu	t9, 1
-/*
- * Now shift ta2,ta3 the correct number of bits.
- */
-1:
-	subu	t9, t9, DLEAD_ZEROS	# dont count normal leading zeros
-	li	ta1, DEXP_MIN
-	subu	ta1, ta1, t9		# adjust exponent
-	li	v0, 32
-	blt	t9, v0, 1f
-	subu	t9, t9, v0		# shift fraction left >= 32 bits
-	sll	ta2, ta3, t9
-	move	ta3, zero
-	j	ra
-1:
-	subu	v0, v0, t9		# shift fraction left < 32 bits
-	sll	ta2, ta2, t9
-	srl	v1, ta3, v0
-	or	ta2, ta2, v1
-	sll	ta3, ta3, t9
-	j	ra
-END(renorm_ft_d)
diff --git a/sys/mips/mips/freebsd32_machdep.c b/sys/mips/mips/freebsd32_machdep.c
deleted file mode 100644
index eb5f82c572ce..000000000000
--- a/sys/mips/mips/freebsd32_machdep.c
+++ /dev/null
@@ -1,488 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Based on nwhitehorn's COMPAT_FREEBSD32 support code for PowerPC64.
- */
-
-#define __ELF_WORD_SIZE 32
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/sysent.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/ktr.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/namei.h>
-#include <sys/fcntl.h>
-#include <sys/sysent.h>
-#include <sys/imgact_elf.h>
-#include <sys/reg.h>
-#include <sys/syscall.h>
-#include <sys/syscallsubr.h>
-#include <sys/sysproto.h>
-#include <sys/signalvar.h>
-#include <sys/vnode.h>
-#include <sys/linker.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-
-#include <machine/cpuinfo.h>
-#include <machine/md_var.h>
-#include <machine/sigframe.h>
-#include <machine/sysarch.h>
-#include <machine/tls.h>
-
-#include <compat/freebsd32/freebsd32_signal.h>
-#include <compat/freebsd32/freebsd32_util.h>
-#include <compat/freebsd32/freebsd32_proto.h>
-
-static int get_mcontext32(struct thread *, mcontext32_t *, int);
-static int set_mcontext32(struct thread *, mcontext32_t *);
-static void freebsd32_sendsig(sig_t, ksiginfo_t *, sigset_t *);
-
-extern const char *freebsd32_syscallnames[];
-
-struct sysentvec elf32_freebsd_sysvec = {
-	.sv_size	= SYS_MAXSYSCALL,
-	.sv_table	= freebsd32_sysent,
-	.sv_transtrap	= NULL,
-	.sv_fixup	= __elfN(freebsd_fixup),
-	.sv_sendsig	= freebsd32_sendsig,
-	.sv_sigcode	= sigcode32,
-	.sv_szsigcode	= &szsigcode32,
-	.sv_name	= "FreeBSD ELF32",
-	.sv_coredump	= __elfN(coredump),
-	.sv_elf_core_osabi = ELFOSABI_FREEBSD,
-	.sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR,
-	.sv_elf_core_prepare_notes = __elfN(prepare_notes),
-	.sv_imgact_try	= NULL,
-	.sv_minsigstksz	= MINSIGSTKSZ,
-	.sv_minuser	= VM_MIN_ADDRESS,
-	.sv_maxuser	= ((vm_offset_t)0x80000000),
-	.sv_usrstack	= FREEBSD32_USRSTACK,
-	.sv_psstrings	= FREEBSD32_PS_STRINGS,
-	.sv_stackprot	= VM_PROT_ALL,
-	.sv_copyout_auxargs = __elfN(freebsd_copyout_auxargs),
-	.sv_copyout_strings = freebsd32_copyout_strings,
-	.sv_setregs	= exec_setregs,
-	.sv_fixlimit	= NULL,
-	.sv_maxssiz	= NULL,
-	.sv_flags	= SV_ABI_FREEBSD | SV_ILP32 | SV_RNG_SEED_VER,
-	.sv_set_syscall_retval = cpu_set_syscall_retval,
-	.sv_fetch_syscall_args = cpu_fetch_syscall_args,
-	.sv_syscallnames = freebsd32_syscallnames,
-	.sv_schedtail	= NULL,
-	.sv_thread_detach = NULL,
-	.sv_trap	= NULL,
-};
-INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec);
-
-static Elf32_Brandinfo freebsd_brand_info = {
-	.brand		= ELFOSABI_FREEBSD,
-	.machine	= EM_MIPS,
-	.compat_3_brand	= "FreeBSD",
-	.emul_path	= NULL,
-	.interp_path	= "/libexec/ld-elf.so.1",
-	.sysvec		= &elf32_freebsd_sysvec,
-	.interp_newpath	= "/libexec/ld-elf32.so.1",
-	.brand_note	= &elf32_freebsd_brandnote,
-	.flags		= BI_CAN_EXEC_DYN | BI_BRAND_NOTE
-};
-
-SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_FIRST,
-    (sysinit_cfunc_t) elf32_insert_brand_entry,
-    &freebsd_brand_info);
-
-int
-set_regs32(struct thread *td, struct reg32 *regs)
-{
-	struct reg r;
-	unsigned i;
-
-	for (i = 0; i < NUMSAVEREGS; i++)
-		r.r_regs[i] = regs->r_regs[i];
-
-	return (set_regs(td, &r));
-}
-
-int
-fill_regs32(struct thread *td, struct reg32 *regs)
-{
-	struct reg r;
-	unsigned i;
-	int error;
-
-	error = fill_regs(td, &r);
-	if (error != 0)
-		return (error);
-
-	for (i = 0; i < NUMSAVEREGS; i++)
-		regs->r_regs[i] = r.r_regs[i];
-
-	return (0);
-}
-
-int
-set_fpregs32(struct thread *td, struct fpreg32 *fpregs)
-{
-	struct fpreg fp;
-	unsigned i;
-
-	for (i = 0; i < NUMFPREGS; i++)
-		fp.r_regs[i] = fpregs->r_regs[i];
-
-	return (set_fpregs(td, &fp));
-}
-
-int
-fill_fpregs32(struct thread *td, struct fpreg32 *fpregs)
-{
-	struct fpreg fp;
-	unsigned i;
-	int error;
-
-	error = fill_fpregs(td, &fp);
-	if (error != 0)
-		return (error);
-
-	for (i = 0; i < NUMFPREGS; i++)
-		fpregs->r_regs[i] = fp.r_regs[i];
-
-	return (0);
-}
-
-static int
-get_mcontext32(struct thread *td, mcontext32_t *mcp, int flags)
-{
-	mcontext_t mcp64;
-	unsigned i;
-	int error;
-
-	error = get_mcontext(td, &mcp64, flags);
-	if (error != 0)
-		return (error);
-
-	mcp->mc_onstack = mcp64.mc_onstack;
-	mcp->mc_pc = mcp64.mc_pc;
-	for (i = 0; i < 32; i++)
-		mcp->mc_regs[i] = mcp64.mc_regs[i];
-	mcp->sr = mcp64.sr;
-	mcp->mullo = mcp64.mullo;
-	mcp->mulhi = mcp64.mulhi;
-	mcp->mc_fpused = mcp64.mc_fpused;
-	for (i = 0; i < 33; i++)
-		mcp->mc_fpregs[i] = mcp64.mc_fpregs[i];
-	mcp->mc_fpc_eir = mcp64.mc_fpc_eir;
-	mcp->mc_tls = (int32_t)(intptr_t)mcp64.mc_tls;
-
-	return (0);
-}
-
-static int
-set_mcontext32(struct thread *td, mcontext32_t *mcp)
-{
-	mcontext_t mcp64;
-	unsigned i;
-
-	mcp64.mc_onstack = mcp->mc_onstack;
-	mcp64.mc_pc = mcp->mc_pc;
-	for (i = 0; i < 32; i++)
-		mcp64.mc_regs[i] = mcp->mc_regs[i];
-	mcp64.sr = mcp->sr;
-	mcp64.mullo = mcp->mullo;
-	mcp64.mulhi = mcp->mulhi;
-	mcp64.mc_fpused = mcp->mc_fpused;
-	for (i = 0; i < 33; i++)
-		mcp64.mc_fpregs[i] = mcp->mc_fpregs[i];
-	mcp64.mc_fpc_eir = mcp->mc_fpc_eir;
-	mcp64.mc_tls = (void *)(intptr_t)mcp->mc_tls;
-
-	return (set_mcontext(td, &mcp64));
-}
-
-int
-freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap)
-{
-	ucontext32_t uc;
-	int error;
-
-	CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp);
-
-	if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) {
-		CTR1(KTR_SIG, "sigreturn: efault td=%p", td);
-		return (EFAULT);
-	}
-
-	error = set_mcontext32(td, &uc.uc_mcontext);
-	if (error != 0)
-		return (error);
-
-	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
-
-#if 0
-	CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x",
-	     td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]);
-#endif
-
-	return (EJUSTRETURN);
-}
-
-/*
- * The first two fields of a ucontext_t are the signal mask and the machine
- * context.  The next field is uc_link; we want to avoid destroying the link
- * when copying out contexts.
- */
-#define	UC32_COPY_SIZE	offsetof(ucontext32_t, uc_link)
-
-int
-freebsd32_getcontext(struct thread *td, struct freebsd32_getcontext_args *uap)
-{
-	ucontext32_t uc;
-	int ret;
-
-	if (uap->ucp == NULL)
-		ret = EINVAL;
-	else {
-		bzero(&uc, sizeof(uc));
-		get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET);
-		PROC_LOCK(td->td_proc);
-		uc.uc_sigmask = td->td_sigmask;
-		PROC_UNLOCK(td->td_proc);
-		ret = copyout(&uc, uap->ucp, UC32_COPY_SIZE);
-	}
-	return (ret);
-}
-
-int
-freebsd32_setcontext(struct thread *td, struct freebsd32_setcontext_args *uap)
-{
-	ucontext32_t uc;
-	int ret;	
-
-	if (uap->ucp == NULL)
-		ret = EINVAL;
-	else {
-		ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE);
-		if (ret == 0) {
-			ret = set_mcontext32(td, &uc.uc_mcontext);
-			if (ret == 0) {
-				kern_sigprocmask(td, SIG_SETMASK,
-				    &uc.uc_sigmask, NULL, 0);
-			}
-		}
-	}
-	return (ret == 0 ? EJUSTRETURN : ret);
-}
-
-int
-freebsd32_swapcontext(struct thread *td, struct freebsd32_swapcontext_args *uap)
-{
-	ucontext32_t uc;
-	int ret;
-
-	if (uap->oucp == NULL || uap->ucp == NULL)
-		ret = EINVAL;
-	else {
-		bzero(&uc, sizeof(uc));
-		get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET);
-		PROC_LOCK(td->td_proc);
-		uc.uc_sigmask = td->td_sigmask;
-		PROC_UNLOCK(td->td_proc);
-		ret = copyout(&uc, uap->oucp, UC32_COPY_SIZE);
-		if (ret == 0) {
-			ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE);
-			if (ret == 0) {
-				ret = set_mcontext32(td, &uc.uc_mcontext);
-				if (ret == 0) {
-					kern_sigprocmask(td, SIG_SETMASK,
-					    &uc.uc_sigmask, NULL, 0);
-				}
-			}
-		}
-	}
-	return (ret == 0 ? EJUSTRETURN : ret);
-}
-
-#define	UCONTEXT_MAGIC	0xACEDBADE
-
-/*
- * Send an interrupt to process.
- *
- * Stack is set up to allow sigcode stored
- * at top to call routine, followed by kcall
- * to sigreturn routine below.	After sigreturn
- * resets the signal mask, the stack, and the
- * frame pointer, it returns to the user
- * specified pc, psl.
- */
-static void
-freebsd32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
-{
-	struct proc *p;
-	struct thread *td;
-	struct fpreg32 fpregs;
-	struct reg32 regs;
-	struct sigacts *psp;
-	struct sigframe32 sf, *sfp;
-	int sig;
-	int oonstack;
-	unsigned i;
-
-	td = curthread;
-	p = td->td_proc;
-	PROC_LOCK_ASSERT(p, MA_OWNED);
-	sig = ksi->ksi_signo;
-	psp = p->p_sigacts;
-	mtx_assert(&psp->ps_mtx, MA_OWNED);
-
-	fill_regs32(td, &regs);
-	oonstack = sigonstack(td->td_frame->sp);
-
-	/* save user context */
-	bzero(&sf, sizeof sf);
-	sf.sf_uc.uc_sigmask = *mask;
-	sf.sf_uc.uc_stack.ss_sp = (int32_t)(intptr_t)td->td_sigstk.ss_sp;
-	sf.sf_uc.uc_stack.ss_size = td->td_sigstk.ss_size;
-	sf.sf_uc.uc_stack.ss_flags = td->td_sigstk.ss_flags;
-	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
-	sf.sf_uc.uc_mcontext.mc_pc = regs.r_regs[PC];
-	sf.sf_uc.uc_mcontext.mullo = regs.r_regs[MULLO];
-	sf.sf_uc.uc_mcontext.mulhi = regs.r_regs[MULHI];
-	sf.sf_uc.uc_mcontext.mc_tls = (int32_t)(intptr_t)td->td_md.md_tls;
-	sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC;  /* magic number */
-	for (i = 1; i < 32; i++)
-		sf.sf_uc.uc_mcontext.mc_regs[i] = regs.r_regs[i];
-	sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
-	if (sf.sf_uc.uc_mcontext.mc_fpused) {
-		/* if FPU has current state, save it first */
-		if (td == PCPU_GET(fpcurthread))
-			MipsSaveCurFPState(td);
-		fill_fpregs32(td, &fpregs);
-		for (i = 0; i < 33; i++)
-			sf.sf_uc.uc_mcontext.mc_fpregs[i] = fpregs.r_regs[i];
-	}
-
-	/* Allocate and validate space for the signal handler context. */
-	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
-	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
-		sfp = (struct sigframe32 *)(((uintptr_t)td->td_sigstk.ss_sp +
-		    td->td_sigstk.ss_size - sizeof(struct sigframe32))
-		    & ~(sizeof(__int64_t) - 1));
-	} else
-		sfp = (struct sigframe32 *)((vm_offset_t)(td->td_frame->sp - 
-		    sizeof(struct sigframe32)) & ~(sizeof(__int64_t) - 1));
-
-	/* Build the argument list for the signal handler. */
-	td->td_frame->a0 = sig;
-	td->td_frame->a2 = (register_t)(intptr_t)&sfp->sf_uc;
-	if (SIGISMEMBER(psp->ps_siginfo, sig)) {
-		/* Signal handler installed with SA_SIGINFO. */
-		td->td_frame->a1 = (register_t)(intptr_t)&sfp->sf_si;
-		/* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
-
-		/* fill siginfo structure */
-		sf.sf_si.si_signo = sig;
-		sf.sf_si.si_code = ksi->ksi_code;
-		sf.sf_si.si_addr = td->td_frame->badvaddr;
-	} else {
-		/* Old FreeBSD-style arguments. */
-		td->td_frame->a1 = ksi->ksi_code;
-		td->td_frame->a3 = td->td_frame->badvaddr;
-		/* sf.sf_ahu.sf_handler = catcher; */
-	}
-
-	mtx_unlock(&psp->ps_mtx);
-	PROC_UNLOCK(p);
-
-	/*
-	 * Copy the sigframe out to the user's stack.
-	 */
-	if (copyout(&sf, sfp, sizeof(struct sigframe32)) != 0) {
-		/*
-		 * Something is wrong with the stack pointer.
-		 * ...Kill the process.
-		 */
-		PROC_LOCK(p);
-		sigexit(td, SIGILL);
-	}
-
-	td->td_frame->pc = (register_t)(intptr_t)catcher;
-	td->td_frame->t9 = (register_t)(intptr_t)catcher;
-	td->td_frame->sp = (register_t)(intptr_t)sfp;
-	/*
-	 * Signal trampoline code is at base of user stack.
-	 */
-	td->td_frame->ra = (register_t)(intptr_t)FREEBSD32_PS_STRINGS - *(p->p_sysent->sv_szsigcode);
-	PROC_LOCK(p);
-	mtx_lock(&psp->ps_mtx);
-}
-
-int
-freebsd32_sysarch(struct thread *td, struct freebsd32_sysarch_args *uap)
-{
-	int error;
-	int32_t tlsbase;
-
-	switch (uap->op) {
-	case MIPS_SET_TLS:
-		td->td_md.md_tls = (void *)(intptr_t)uap->parms;
-
-		/*
-		 * If there is an user local register implementation (ULRI)
-		 * update it as well.  Add the TLS and TCB offsets so the
-		 * value in this register is adjusted like in the case of the
-		 * rdhwr trap() instruction handler.
-		 */
-		if (cpuinfo.userlocal_reg == true) {
-			mips_wr_userlocal((unsigned long)(uap->parms +
-			    td->td_proc->p_md.md_tls_tcb_offset));
-		}
-		return (0);
-	case MIPS_GET_TLS: 
-		tlsbase = (int32_t)(intptr_t)td->td_md.md_tls;
-		error = copyout(&tlsbase, uap->parms, sizeof(tlsbase));
-		return (error);
-	default:
-		break;
-	}
-	return (EINVAL);
-}
-
-void
-elf32_dump_thread(struct thread *td __unused, void *dst __unused,
-    size_t *off __unused)
-{
-}
diff --git a/sys/mips/mips/gdb_machdep.c b/sys/mips/mips/gdb_machdep.c
deleted file mode 100644
index 4b999613d7f6..000000000000
--- a/sys/mips/mips/gdb_machdep.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*	$NetBSD: kgdb_machdep.c,v 1.11 2005/12/24 22:45:35 perry Exp $	*/
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Copyright (c) 1996 Matthias Pfaller.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Matthias Pfaller.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *	JNPR: gdb_machdep.c,v 1.1 2007/08/09 12:25:25 katta
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/signal.h>
-#include <sys/pcpu.h>
-
-#include <machine/gdb_machdep.h>
-#include <machine/pcb.h>
-#include <machine/trap.h>
-
-#include <gdb/gdb.h>
-
-void *
-gdb_cpu_getreg(int regnum, size_t *regsz)
-{
-
- 	*regsz = gdb_cpu_regsz(regnum);
- 	if (kdb_thread == curthread) {
-		register_t *zero_ptr = &kdb_frame->zero;
-		return zero_ptr + regnum;
-	}
-
-	switch (regnum) {
-	/* 
-	 * S0..S7
-	 */
-	case 16:
-	case 17:
-	case 18:
-	case 19:
-	case 20:
-	case 21:
-	case 22:
-	case 23:
- 		return (&kdb_thrctx->pcb_context[PCB_REG_S0 + regnum - 16]);
-	case 28: 
-		return (&kdb_thrctx->pcb_context[PCB_REG_GP]);
-	case 29: 
-		return (&kdb_thrctx->pcb_context[PCB_REG_SP]);
-	case 30: 
-		return (&kdb_thrctx->pcb_context[PCB_REG_S8]);
-	case 31: 
-		return (&kdb_thrctx->pcb_context[PCB_REG_RA]);
-	case 37: 
-		return (&kdb_thrctx->pcb_context[PCB_REG_PC]);
-	}
-	return (NULL);
-}
-
-void
-gdb_cpu_setreg(int regnum, void *val)
-{
-	switch (regnum) {
-	case GDB_REG_PC:
-		kdb_thrctx->pcb_context[10] = *(register_t *)val;
-		if (kdb_thread == curthread)
-			kdb_frame->pc = *(register_t *)val;
-	}
-}
-
-int
-gdb_cpu_signal(int entry, int code)
-{
-	switch (entry) {
-	case T_TLB_MOD:
-	case T_TLB_MOD+T_USER:
-	case T_TLB_LD_MISS:
-	case T_TLB_ST_MISS:
-	case T_TLB_LD_MISS+T_USER:
-	case T_TLB_ST_MISS+T_USER:
-	case T_ADDR_ERR_LD:		/* misaligned access */
-	case T_ADDR_ERR_ST:		/* misaligned access */
-	case T_BUS_ERR_LD_ST:		/* BERR asserted to CPU */
-	case T_ADDR_ERR_LD+T_USER:	/* misaligned or kseg access */
-	case T_ADDR_ERR_ST+T_USER:	/* misaligned or kseg access */
-	case T_BUS_ERR_IFETCH+T_USER:	/* BERR asserted to CPU */
-	case T_BUS_ERR_LD_ST+T_USER:	/* BERR asserted to CPU */
-		return (SIGSEGV);
-
-	case T_BREAK:
-	case T_BREAK+T_USER:
-		return (SIGTRAP);
-
-	case T_RES_INST+T_USER:
-	case T_COP_UNUSABLE+T_USER:
-		return (SIGILL);
-
-	case T_FPE+T_USER:
-	case T_OVFLOW+T_USER:
-		return (SIGFPE);
-
-	default:
-		return (SIGEMT);
-	}
-}
diff --git a/sys/mips/mips/genassym.c b/sys/mips/mips/genassym.c
deleted file mode 100644
index ed4cc08607cd..000000000000
--- a/sys/mips/mips/genassym.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1982, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
- *	from: src/sys/i386/i386/genassym.c,v 1.86.2.1 2000/05/16 06:58:06 dillon
- *	JNPR: genassym.c,v 1.4 2007/08/09 11:23:32 katta
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/assym.h>
-#include <machine/pte.h>
-#include <sys/proc.h>
-#include <sys/errno.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/socket.h>
-#include <sys/resourcevar.h>
-#include <sys/ucontext.h>
-#include <sys/vmmeter.h>
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <machine/cpuregs.h>
-#include <machine/pcb.h>
-#include <machine/sigframe.h>
-#include <machine/proc.h>
-#include <machine/tls.h>
-
-#ifdef	CPU_CNMIPS
-#include <machine/octeon_cop2.h>
-#endif
-
-#ifndef offsetof
-#define	offsetof(t,m) (int)((&((t *)0L)->m))
-#endif
-
-ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
-ASSYM(TD_PROC, offsetof(struct thread, td_proc));
-ASSYM(TD_UPTE, offsetof(struct thread, td_md.md_upte));
-ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack));
-ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
-ASSYM(TD_LOCK, offsetof(struct thread, td_lock));
-ASSYM(TD_MDFLAGS, offsetof(struct thread, td_md.md_flags));
-ASSYM(TD_MDTLS, offsetof(struct thread, td_md.md_tls));
-
-ASSYM(P_MDTLS_TCB_OFFSET, offsetof(struct proc, p_md.md_tls_tcb_offset));
-
-ASSYM(U_PCB_REGS, offsetof(struct pcb, pcb_regs.zero));
-ASSYM(U_PCB_CONTEXT, offsetof(struct pcb, pcb_context));
-ASSYM(U_PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-ASSYM(U_PCB_FPREGS, offsetof(struct pcb, pcb_regs.f0));
-
-ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
-ASSYM(PC_SEGBASE, offsetof(struct pcpu, pc_segbase));
-ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
-ASSYM(PC_FPCURTHREAD, offsetof(struct pcpu, pc_fpcurthread));
-ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
-
-ASSYM(VM_MAX_KERNEL_ADDRESS, VM_MAX_KERNEL_ADDRESS);
-ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS);
-ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc));
-#ifdef COMPAT_FREEBSD32
-ASSYM(SIGF32_UC, offsetof(struct sigframe32, sf_uc));
-#endif
-ASSYM(SIGFPE, SIGFPE);
-ASSYM(PAGE_SHIFT, PAGE_SHIFT);
-ASSYM(PAGE_SIZE, PAGE_SIZE);
-ASSYM(PDRSHIFT, PDRSHIFT);
-ASSYM(SEGSHIFT, SEGSHIFT);
-ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
-ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
-ASSYM(MAXCOMLEN, MAXCOMLEN);
-ASSYM(MDTD_COP2USED, MDTD_COP2USED);
-
-ASSYM(MIPS_KSEG0_START, MIPS_KSEG0_START);
-ASSYM(MIPS_KSEG1_START, MIPS_KSEG1_START);
-ASSYM(MIPS_KSEG2_START, MIPS_KSEG2_START);
-ASSYM(MIPS_XKSEG_START, MIPS_XKSEG_START);
-
-#ifdef	CPU_CNMIPS
-ASSYM(TD_COP2OWNER, offsetof(struct thread, td_md.md_cop2owner));
-ASSYM(TD_COP2, offsetof(struct thread, td_md.md_cop2));
-ASSYM(TD_UCOP2, offsetof(struct thread, td_md.md_ucop2));
-ASSYM(COP2_CRC_IV_OFFSET, offsetof(struct octeon_cop2_state, crc_iv));
-ASSYM(COP2_CRC_LENGTH_OFFSET, offsetof(struct octeon_cop2_state, crc_length));
-ASSYM(COP2_CRC_POLY_OFFSET, offsetof(struct octeon_cop2_state, crc_poly));
-ASSYM(COP2_LLM_DAT0_OFFSET, offsetof(struct octeon_cop2_state, llm_dat));
-ASSYM(COP2_LLM_DAT1_OFFSET, offsetof(struct octeon_cop2_state, llm_dat) + 8);
-ASSYM(COP2_3DES_IV_OFFSET, offsetof(struct octeon_cop2_state, _3des_iv));
-ASSYM(COP2_3DES_KEY0_OFFSET, offsetof(struct octeon_cop2_state, _3des_key));
-ASSYM(COP2_3DES_KEY1_OFFSET, offsetof(struct octeon_cop2_state, _3des_key) + 8);
-ASSYM(COP2_3DES_KEY2_OFFSET, offsetof(struct octeon_cop2_state, _3des_key) + 16);
-ASSYM(COP2_3DES_RESULT_OFFSET, offsetof(struct octeon_cop2_state, _3des_result));
-ASSYM(COP2_AES_INP0_OFFSET, offsetof(struct octeon_cop2_state, aes_inp0));
-ASSYM(COP2_AES_IV0_OFFSET, offsetof(struct octeon_cop2_state, aes_iv));
-ASSYM(COP2_AES_IV1_OFFSET, offsetof(struct octeon_cop2_state, aes_iv) + 8);
-ASSYM(COP2_AES_KEY0_OFFSET, offsetof(struct octeon_cop2_state, aes_key));
-ASSYM(COP2_AES_KEY1_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 8);
-ASSYM(COP2_AES_KEY2_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 16);
-ASSYM(COP2_AES_KEY3_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 24);
-ASSYM(COP2_AES_KEYLEN_OFFSET, offsetof(struct octeon_cop2_state, aes_keylen));
-ASSYM(COP2_AES_RESULT0_OFFSET, offsetof(struct octeon_cop2_state, aes_result));
-ASSYM(COP2_AES_RESULT1_OFFSET, offsetof(struct octeon_cop2_state, aes_result) + 8);
-ASSYM(COP2_HSH_DATW0_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw));
-ASSYM(COP2_HSH_DATW1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 8);
-ASSYM(COP2_HSH_DATW2_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 16);
-ASSYM(COP2_HSH_DATW3_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 24);
-ASSYM(COP2_HSH_DATW4_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 32);
-ASSYM(COP2_HSH_DATW5_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 40);
-ASSYM(COP2_HSH_DATW6_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 48);
-ASSYM(COP2_HSH_DATW7_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 56);
-ASSYM(COP2_HSH_DATW8_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 64);
-ASSYM(COP2_HSH_DATW9_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 72);
-ASSYM(COP2_HSH_DATW10_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 80);
-ASSYM(COP2_HSH_DATW11_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 88);
-ASSYM(COP2_HSH_DATW12_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 96);
-ASSYM(COP2_HSH_DATW13_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 104);
-ASSYM(COP2_HSH_DATW14_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 112);
-ASSYM(COP2_HSH_IVW0_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw));
-ASSYM(COP2_HSH_IVW1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 8);
-ASSYM(COP2_HSH_IVW2_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 16);
-ASSYM(COP2_HSH_IVW3_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 24);
-ASSYM(COP2_HSH_IVW4_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 32);
-ASSYM(COP2_HSH_IVW5_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 40);
-ASSYM(COP2_HSH_IVW6_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 48);
-ASSYM(COP2_HSH_IVW7_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 56);
-ASSYM(COP2_GFM_MULT0_OFFSET, offsetof(struct octeon_cop2_state, gfm_mult));
-ASSYM(COP2_GFM_MULT1_OFFSET, offsetof(struct octeon_cop2_state, gfm_mult) + 8);
-ASSYM(COP2_GFM_POLY_OFFSET, offsetof(struct octeon_cop2_state, gfm_poly));
-ASSYM(COP2_GFM_RESULT0_OFFSET, offsetof(struct octeon_cop2_state, gfm_result));
-ASSYM(COP2_GFM_RESULT1_OFFSET, offsetof(struct octeon_cop2_state, gfm_result) + 8);
-ASSYM(COP2_HSH_DATW0_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw));
-ASSYM(COP2_HSH_DATW1_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 8);
-ASSYM(COP2_HSH_DATW2_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 16);
-ASSYM(COP2_HSH_DATW3_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 24);
-ASSYM(COP2_HSH_DATW4_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 32);
-ASSYM(COP2_HSH_DATW5_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 40);
-ASSYM(COP2_HSH_DATW6_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 48);
-ASSYM(COP2_HSH_IVW0_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw));
-ASSYM(COP2_HSH_IVW1_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 8);
-ASSYM(COP2_HSH_IVW2_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 16);
-#endif
diff --git a/sys/mips/mips/inckern.S b/sys/mips/mips/inckern.S
deleted file mode 100644
index ca0e8d155edd..000000000000
--- a/sys/mips/mips/inckern.S
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD$")
-
-ENTRY(_start)
-	PTR_LA	t0, kernel_end
-	move	sp, t0
-	add	sp, 0x2000
-	and	sp, ~0x7
-	PTR_LA	t0, _startC
-	j	t0
-	nop
-END(_start)
-
-#ifndef KERNNAME
-#error Need a kernel name here
-#endif
-
-.section ".real_kernel","aw"
-.globl kernel_start;
-kernel_start:
-.incbin KERNNAME
-.globl kernel_end;
-kernel_end:
diff --git a/sys/mips/mips/intr_machdep.c b/sys/mips/mips/intr_machdep.c
deleted file mode 100644
index a36944f657ca..000000000000
--- a/sys/mips/mips/intr_machdep.c
+++ /dev/null
@@ -1,302 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006 Oleksandr Tymoshenko
- * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_hwpmc_hooks.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/pmc.h>
-#include <sys/pmckern.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/intr_machdep.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-
-#ifndef INTRNG
-#define INTRCNT_COUNT	256
-#define	INTRNAME_LEN	(2*MAXCOMLEN + 1)
-
-MALLOC_DECLARE(M_MIPSINTR);
-MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling");
-
-u_long *intrcnt;
-char *intrnames;
-size_t sintrcnt;
-size_t sintrnames;
-#endif
-
-static struct intr_event *hardintr_events[NHARD_IRQS];
-static struct intr_event *softintr_events[NSOFT_IRQS];
-static mips_intrcnt_t mips_intr_counters[NSOFT_IRQS + NHARD_IRQS];
-
-static int intrcnt_index;
-
-static cpu_intr_mask_t		hardintr_mask_func;
-static cpu_intr_unmask_t	hardintr_unmask_func;
-
-mips_intrcnt_t
-mips_intrcnt_create(const char* name)
-{
-	mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
-
-	mips_intrcnt_setname(counter, name);
-	return counter;
-}
-
-void
-mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
-{
-	int idx = counter - intrcnt;
-
-	KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
-
-	snprintf(intrnames + (MAXCOMLEN + 1) * idx,
-	    MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
-}
-
-static void
-mips_mask_hard_irq(void *source)
-{
-	uintptr_t irq = (uintptr_t)source;
-
-	mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2));
-}
-
-static void
-mips_unmask_hard_irq(void *source)
-{
-	uintptr_t irq = (uintptr_t)source;
-
-	mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2));
-}
-
-static void
-mips_mask_soft_irq(void *source)
-{
-	uintptr_t irq = (uintptr_t)source;
-
-	mips_wr_status(mips_rd_status() & ~((1 << irq) << 8));
-}
-
-static void
-mips_unmask_soft_irq(void *source)
-{
-	uintptr_t irq = (uintptr_t)source;
-
-	mips_wr_status(mips_rd_status() | ((1 << irq) << 8));
-}
-
-/*
- * Perform initialization of interrupts prior to setting 
- * handlings
- */
-void
-cpu_init_interrupts()
-{
-	int i;
-	char name[MAXCOMLEN + 1];
-
-#ifndef INTRNG
-	intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR,
-	    M_WAITOK | M_ZERO);
-	intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR,
-	    M_WAITOK | M_ZERO);
-	sintrcnt = INTRCNT_COUNT * sizeof(u_long);
-	sintrnames = INTRCNT_COUNT * INTRNAME_LEN;
-#endif
-
-	/*
-	 * Initialize all available vectors so spare IRQ
-	 * would show up in systat output 
-	 */
-	for (i = 0; i < NSOFT_IRQS; i++) {
-		snprintf(name, MAXCOMLEN + 1, "sint%d:", i);
-		mips_intr_counters[i] = mips_intrcnt_create(name);
-	}
-
-	for (i = 0; i < NHARD_IRQS; i++) {
-		snprintf(name, MAXCOMLEN + 1, "int%d:", i);
-		mips_intr_counters[NSOFT_IRQS + i] = mips_intrcnt_create(name);
-	}
-}
-
-void
-cpu_set_hardintr_mask_func(cpu_intr_mask_t func)
-{
-
-	hardintr_mask_func = func;
-}
-
-void
-cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func)
-{
-
-	hardintr_unmask_func = func;
-}
-
-void
-cpu_establish_hardintr(const char *name, driver_filter_t *filt,
-    void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
-{
-	struct intr_event *event;
-	int error;
-
-	/*
-	 * We have 6 levels, but thats 0 - 5 (not including 6)
-	 */
-	if (irq < 0 || irq >= NHARD_IRQS)
-		panic("%s called for unknown hard intr %d", __func__, irq);
-
-	if (hardintr_mask_func == NULL)
-		hardintr_mask_func = mips_mask_hard_irq;
-
-	if (hardintr_unmask_func == NULL)
-		hardintr_unmask_func = mips_unmask_hard_irq;
-
-	event = hardintr_events[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
-		    irq, hardintr_mask_func, hardintr_unmask_func,
-		    NULL, NULL, "int%d", irq);
-		if (error)
-			return;
-		hardintr_events[irq] = event;
-		mips_unmask_hard_irq((void*)(uintptr_t)irq);
-	}
-
-	intr_event_add_handler(event, name, filt, handler, arg,
-	    intr_priority(flags), flags, cookiep);
-
-	mips_intrcnt_setname(mips_intr_counters[NSOFT_IRQS + irq],
-			     event->ie_fullname);
-}
-
-void
-cpu_establish_softintr(const char *name, driver_filter_t *filt,
-    void (*handler)(void*), void *arg, int irq, int flags,
-    void **cookiep)
-{
-	struct intr_event *event;
-	int error;
-
-#if 0
-	printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n",
-	    irq, filt, handler, arg);
-#endif
-	if (irq < 0 || irq > NSOFT_IRQS)
-		panic("%s called for unknown hard intr %d", __func__, irq);
-
-	event = softintr_events[irq];
-	if (event == NULL) {
-		error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
-		    irq, mips_mask_soft_irq, mips_unmask_soft_irq,
-		    NULL, NULL, "sint%d:", irq);
-		if (error)
-			return;
-		softintr_events[irq] = event;
-		mips_unmask_soft_irq((void*)(uintptr_t)irq);
-	}
-
-	intr_event_add_handler(event, name, filt, handler, arg,
-	    intr_priority(flags), flags, cookiep);
-
-	mips_intrcnt_setname(mips_intr_counters[irq], event->ie_fullname);
-}
-
-void
-cpu_intr(struct trapframe *tf)
-{
-	struct intr_event *event;
-	register_t cause, status;
-	int hard, i, intr;
-
-	critical_enter();
-
-	cause = mips_rd_cause();
-	status = mips_rd_status();
-	intr = (cause & MIPS_INT_MASK) >> 8;
-	/*
-	 * Do not handle masked interrupts. They were masked by 
-	 * pre_ithread function (mips_mask_XXX_intr) and will be 
-	 * unmasked once ithread is through with handler
-	 */
-	intr &= (status & MIPS_INT_MASK) >> 8;
-	while ((i = fls(intr)) != 0) {
-		intr &= ~(1 << (i - 1));
-		switch (i) {
-		case 1: case 2:
-			/* Software interrupt. */
-			i--; /* Get a 0-offset interrupt. */
-			hard = 0;
-			event = softintr_events[i];
-			mips_intrcnt_inc(mips_intr_counters[i]);
-			break;
-		default:
-			/* Hardware interrupt. */
-			i -= 2; /* Trim software interrupt bits. */
-			i--; /* Get a 0-offset interrupt. */
-			hard = 1;
-			event = hardintr_events[i];
-			mips_intrcnt_inc(mips_intr_counters[NSOFT_IRQS + i]);
-			break;
-		}
-
-		if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
-			printf("stray %s interrupt %d\n",
-			    hard ? "hard" : "soft", i);
-			continue;
-		}
-
-		if (intr_event_handle(event, tf) != 0) {
-			printf("stray %s interrupt %d\n", 
-			    hard ? "hard" : "soft", i);
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-	critical_exit();
-
-#ifdef HWPMC_HOOKS
-	if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
-		pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
-#endif
-}
diff --git a/sys/mips/mips/libkern_machdep.c b/sys/mips/mips/libkern_machdep.c
deleted file mode 100644
index 2ff3608145e6..000000000000
--- a/sys/mips/mips/libkern_machdep.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2012 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- * Include libkern support routines for 64-bit operations when building o32
- * kernels.
- */
-#if defined(__mips_o32)
-#include <libkern/divdi3.c>
-#include <libkern/moddi3.c>
-#include <libkern/qdivrem.c>
-#include <libkern/udivdi3.c>
-#include <libkern/umoddi3.c>
-#endif
diff --git a/sys/mips/mips/locore.S b/sys/mips/mips/locore.S
deleted file mode 100644
index e3470b52ce78..000000000000
--- a/sys/mips/mips/locore.S
+++ /dev/null
@@ -1,205 +0,0 @@
-/*	$OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Digital Equipment Corporation and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Copyright (C) 1989 Digital Equipment Corporation.
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby granted,
- * provided that the above copyright notice appears in all copies.
- * Digital Equipment Corporation makes no representations about the
- * suitability of this software for any purpose.  It is provided "as is"
- * without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
- *	v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
- *	v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
- *	v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
- *
- *	from: @(#)locore.s	8.5 (Berkeley) 1/4/94
- *	JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish
- * $FreeBSD$
- */
-
-/*
- * FREEBSD_DEVELOPERS_FIXME
- * The start routine below was written for a multi-core CPU
- * with each core being hyperthreaded. This serves as an example
- * for a complex CPU architecture. For a different CPU complex
- * please make necessary changes to read CPU-ID etc.
- * A clean solution would be to have a different locore file for
- * each CPU type.
- */
-
-/*
- *	Contains code that is the first executed at boot time plus
- *	assembly language support routines.
- */
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/regnum.h>
-
-#include "assym.inc"
-
-	.data
-#ifdef YAMON
-GLOBAL(fenvp)
-	.space 4			# Assumes mips32?  Is that OK?
-#endif
-
-	.set noreorder
-
-	.text
-
-GLOBAL(btext)
-ASM_ENTRY(_start)
-VECTOR(_locore, unknown)
-	/* UNSAFE TO USE a0..a3, need to preserve the args from boot loader */
-	mtc0	zero, MIPS_COP_0_CAUSE	# Clear soft interrupts
-	
-#if defined(CPU_CNMIPS)
-	/*
-	 * t1: Bits to set explicitly:
-	 *	Enable FPU
-	 */
-
-	/* Set these bits */
-        li	t1, (MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV)
-
-	/* Reset these bits */
-        li	t0, ~(MIPS_SR_DE | MIPS_SR_SR | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_COP_2_BIT)
-#elif defined (CPU_RMI) || defined (CPU_NLM) 
-	/* Set these bits */
-        li	t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX)
-
-	/* Reset these bits */
-        li	t0, ~(MIPS_SR_BEV | MIPS_SR_SR | MIPS_SR_INT_IE)
-#else
-	/*
-	 * t0: Bits to preserve if set:
-	 * 	Soft reset
-	 *	Boot exception vectors (firmware-provided)
-	 */
-	li	t0, (MIPS_SR_BEV | MIPS_SR_SR)
-	/*
-	 * t1: Bits to set explicitly:
-	 *	Enable FPU
-	 */
-	li	t1, MIPS_SR_COP_1_BIT
-#if defined(__mips_n32) || defined(__mips_n64)
-	or	t1, MIPS_SR_FR
-#endif
-#ifdef __mips_n64
-	or	t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX
-#endif
-#endif
-	/*
-	 * Read coprocessor 0 status register, clear bits not
-	 * preserved (namely, clearing interrupt bits), and set
-	 * bits we want to explicitly set.
-	 */
-	mfc0	t2, MIPS_COP_0_STATUS
-	and	t2, t0
-	or	t2, t1
-	mtc0	t2, MIPS_COP_0_STATUS
-	COP0_SYNC
-
-	/* Make sure KSEG0 is cached */
-	li	t0, MIPS_CCA_CACHED
-	mtc0	t0, MIPS_COP_0_CONFIG
-	COP0_SYNC
-
-	/*xxximp
-	 * now that we pass a0...a3 to the platform_init routine, do we need
-	 * to stash this stuff here?
-	 */
-#ifdef YAMON
-	/* Save YAMON boot environment pointer */
-	sw	a2, _C_LABEL(fenvp)
-#endif
-
-#if defined(CPU_CNMIPS) && defined(SMP)
-	.set push
-	.set mips32r2
-	rdhwr	t2, $0
-	beqz	t2, 1f
-	nop
-	j	octeon_ap_wait
-	nop
-	.set pop
-1:
-#endif
-
-#if defined(CPU_MALTA) && defined(SMP)
-	.set push
-	.set mips32r2
-	jal	malta_cpu_configure
-	nop
-	jal	platform_processor_id
-	nop
-	beqz	v0, 1f
-	nop
-	j	malta_ap_wait
-	nop
-	.set pop
-1:
-#endif
-
-	/*
-	 * Initialize stack and call machine startup.
-	 */
-	PTR_LA		sp, _C_LABEL(pcpu_space)
-	PTR_ADDU	sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
-
-	REG_S	zero, CALLFRAME_RA(sp)	# Zero out old ra for debugger
-	REG_S	zero, CALLFRAME_SP(sp)	# Zero out old fp for debugger
-
-	PTR_LA	gp, _C_LABEL(_gp)
-
-	/* Call the platform-specific startup code. */
-	jal	_C_LABEL(platform_start)
-	nop
-
-	PTR_LA	sp, _C_LABEL(thread0_st)
-	PTR_L	a0, TD_PCB(sp)
-	REG_LI	t0, ~7
-	and	a0, a0, t0
-	PTR_SUBU	sp, a0, CALLFRAME_SIZ
-
-	jal	_C_LABEL(mi_startup)		# mi_startup(frame)
-	sw	zero, CALLFRAME_SIZ - 8(sp)	# Zero out old fp for debugger
-
-	PANIC("Startup failed!")
-
-VECTOR_END(_locore)
diff --git a/sys/mips/mips/machdep.c b/sys/mips/mips/machdep.c
deleted file mode 100644
index ec0f3f31c254..000000000000
--- a/sys/mips/mips/machdep.c
+++ /dev/null
@@ -1,580 +0,0 @@
-    /*	$OpenBSD: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp $	*/
-/* tracked to 1.38 */
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, The Mach Operating System project at
- * Carnegie-Mellon University and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)machdep.c	8.3 (Berkeley) 1/12/94
- *	Id: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp
- *	JNPR: machdep.c,v 1.11.2.3 2007/08/29 12:24:49
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_md.h"
-
-#include <sys/param.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/cpu.h>
-#include <sys/kernel.h>
-#include <sys/linker.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/msgbuf.h>
-#include <sys/reboot.h>
-#include <sys/reg.h>
-#include <sys/rwlock.h>
-#include <sys/sched.h>
-#include <sys/sysctl.h>
-#include <sys/sysproto.h>
-#include <sys/vmmeter.h>
-
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <vm/vm_pager.h>
-#include <vm/vm_extern.h>
-#include <sys/socket.h>
-
-#include <sys/user.h>
-#include <sys/interrupt.h>
-#include <sys/cons.h>
-#include <sys/syslog.h>
-#include <machine/asm.h>
-#include <machine/bootinfo.h>
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/elf.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/md_var.h>
-#include <machine/tlb.h>
-#ifdef DDB
-#include <sys/kdb.h>
-#include <ddb/ddb.h>
-#endif
-
-#include <sys/random.h>
-#include <net/if.h>
-
-#define	BOOTINFO_DEBUG	0
-
-char machine[] = "mips";
-SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "Machine class");
-
-char cpu_model[80];
-SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model");
-
-char cpu_board[80];
-SYSCTL_STRING(_hw, OID_AUTO, board, CTLFLAG_RD, cpu_board, 0, "Machine board");
-
-int cold = 1;
-long realmem = 0;
-long Maxmem = 0;
-int cpu_clock = MIPS_DEFAULT_HZ;
-SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, 
-    &cpu_clock, 0, "CPU instruction clock rate");
-int clocks_running = 0;
-
-vm_offset_t kstack0;
-
-/*
- * Each entry in the pcpu_space[] array is laid out in the following manner:
- * struct pcpu for cpu 'n'	pcpu_space[n]
- * boot stack for cpu 'n'	pcpu_space[n] + PAGE_SIZE * 2 - CALLFRAME_SIZ
- *
- * Note that the boot stack grows downwards and we assume that we never
- * use enough stack space to trample over the 'struct pcpu' that is at
- * the beginning of the array.
- *
- * The array is aligned on a (PAGE_SIZE * 2) boundary so that the 'struct pcpu'
- * is always in the even page frame of the wired TLB entry on SMP kernels.
- *
- * The array is in the .data section so that the stack does not get zeroed out
- * when the .bss section is zeroed.
- */
-char pcpu_space[MAXCPU][PAGE_SIZE * 2] \
-	__aligned(PAGE_SIZE * 2) __section(".data");
-
-struct pcpu *pcpup = (struct pcpu *)pcpu_space;
-
-vm_paddr_t physmem_desc[PHYS_AVAIL_COUNT];
-
-#ifdef UNIMPLEMENTED
-struct platform platform;
-#endif
-
-static void cpu_startup(void *);
-SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
-
-struct kva_md_info kmi;
-
-int cpucfg;			/* Value of processor config register */
-int num_tlbentries = 64;	/* Size of the CPU tlb */
-int cputype;
-
-extern char MipsException[], MipsExceptionEnd[];
-
-/* TLB miss handler address and end */
-extern char MipsTLBMiss[], MipsTLBMissEnd[];
-
-/* Cache error handler */
-extern char MipsCache[], MipsCacheEnd[];
-
-/* MIPS wait skip region */
-extern char MipsWaitStart[], MipsWaitEnd[];
-
-extern char edata[], end[];
-
-u_int32_t bootdev;
-struct bootinfo bootinfo;
-/*
- * First kseg0 address available for use. By default it's equal to &end.
- * But in some cases there might be additional data placed right after 
- * _end by loader or ELF trampoline.
- */
-vm_offset_t kernel_kseg0_end = (vm_offset_t)&end;
-
-static void
-cpu_startup(void *dummy)
-{
-
-	if (boothowto & RB_VERBOSE)
-		bootverbose++;
-
-	cpu_identify();
-
-	printf("real memory  = %ju (%juK bytes)\n", ptoa((uintmax_t)realmem),
-	    ptoa((uintmax_t)realmem) / 1024);
-
-	/*
-	 * Display any holes after the first chunk of extended memory.
-	 */
-	if (bootverbose) {
-		int indx;
-
-		printf("Physical memory chunk(s):\n");
-		for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
-			vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
-
-			printf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
-			    (uintmax_t)phys_avail[indx],
-			    (uintmax_t)phys_avail[indx + 1] - 1,
-			    (uintmax_t)size1,
-			    (uintmax_t)size1 / PAGE_SIZE);
-		}
-	}
-
-	vm_ksubmap_init(&kmi);
-
-	printf("avail memory = %ju (%juMB)\n", 
-	    ptoa((uintmax_t)vm_free_count()),
-	    ptoa((uintmax_t)vm_free_count()) / 1048576);
-	cpu_init_interrupts();
-
-	/*
-	 * Set up buffers, so they can be used to read disk labels.
-	 */
-	bufinit();
-	vm_pager_bufferinit();
-}
-
-/*
- * Shutdown the CPU as much as possible
- */
-void
-cpu_reset(void)
-{
-
-	platform_reset();
-}
-
-/*
- * Flush the D-cache for non-DMA I/O so that the I-cache can
- * be made coherent later.
- */
-void
-cpu_flush_dcache(void *ptr, size_t len)
-{
-	/* TBD */
-}
-
-/* Get current clock frequency for the given cpu id. */
-int
-cpu_est_clockrate(int cpu_id, uint64_t *rate)
-{
-
-	return (ENXIO);
-}
-
-/*
- * Shutdown the CPU as much as possible
- */
-void
-cpu_halt(void)
-{
-	for (;;)
-		;
-}
-
-SYSCTL_STRUCT(_machdep, OID_AUTO, bootinfo, CTLFLAG_RD, &bootinfo,
-    bootinfo, "Bootinfo struct: kernel filename, BIOS harddisk geometry, etc");
-
-/*
- * Initialize per cpu data structures, include curthread.
- */
-void
-mips_pcpu0_init()
-{
-	/* Initialize pcpu info of cpu-zero */
-	pcpu_init(PCPU_ADDR(0), 0, sizeof(struct pcpu));
-	PCPU_SET(curthread, &thread0);
-}
-
-/*
- * Initialize mips and configure to run kernel
- */
-void
-mips_proc0_init(void)
-{
-#ifdef SMP
-	if (platform_processor_id() != 0)
-		panic("BSP must be processor number 0");
-#endif
-	proc_linkup0(&proc0, &thread0);
-
-	KASSERT((kstack0 & PAGE_MASK) == 0,
-		("kstack0 is not aligned on a page boundary: 0x%0lx",
-		(long)kstack0));
-	thread0.td_kstack = kstack0;
-	thread0.td_kstack_pages = KSTACK_PAGES;
-	/* 
-	 * Do not use cpu_thread_alloc to initialize these fields 
-	 * thread0 is the only thread that has kstack located in KSEG0 
-	 * while cpu_thread_alloc handles kstack allocated in KSEG2.
-	 */
-	thread0.td_pcb = (struct pcb *)(thread0.td_kstack +
-	    thread0.td_kstack_pages * PAGE_SIZE) - 1;
-	thread0.td_frame = &thread0.td_pcb->pcb_regs;
-
-	/* Steal memory for the dynamic per-cpu area. */
-	dpcpu_init((void *)pmap_steal_memory(DPCPU_SIZE), 0);
-
-	PCPU_SET(curpcb, thread0.td_pcb);
-	/*
-	 * There is no need to initialize md_upte array for thread0 as it's
-	 * located in .bss section and should be explicitly zeroed during 
-	 * kernel initialization.
-	 */
-}
-
-void
-cpu_initclocks(void)
-{
-
-	platform_initclocks();
-	cpu_initclocks_bsp();
-}
-
-/*
- * Initialize the hardware exception vectors, and the jump table used to
- * call locore cache and TLB management functions, based on the kind
- * of CPU the kernel is running on.
- */
-void
-mips_vector_init(void)
-{
-	/*
-	 * Make sure that the Wait region logic is not been 
-	 * changed
-	 */
-	if (MipsWaitEnd - MipsWaitStart != 16)
-		panic("startup: MIPS wait region not correct");
-	/*
-	 * Copy down exception vector code.
-	 */
-	if (MipsTLBMissEnd - MipsTLBMiss > 0x80)
-		panic("startup: UTLB code too large");
-
-	if (MipsCacheEnd - MipsCache > 0x80)
-		panic("startup: Cache error code too large");
-
-	bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
-	      MipsTLBMissEnd - MipsTLBMiss);
-
-	/*
-	 * XXXRW: Why don't we install the XTLB handler for all 64-bit
-	 * architectures?
-	 */
-#if defined(__mips_n64) || defined(CPU_RMI) || defined(CPU_NLM) || defined(CPU_BERI)
-/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses  */
-	bcopy(MipsTLBMiss, (void *)MIPS_XTLB_MISS_EXC_VEC,
-	      MipsTLBMissEnd - MipsTLBMiss);
-#endif
-
-	bcopy(MipsException, (void *)MIPS_GEN_EXC_VEC,
-	      MipsExceptionEnd - MipsException);
-
-	bcopy(MipsCache, (void *)MIPS_CACHE_ERR_EXC_VEC,
-	      MipsCacheEnd - MipsCache);
-
-	/*
-	 * Clear out the I and D caches.
-	 */
-	mips_icache_sync_all();
-	mips_dcache_wbinv_all();
-
-	/* 
-	 * Mask all interrupts. Each interrupt will be enabled
-	 * when handler is installed for it
-	 */
-	set_intr_mask(0);
-
-	/* Clear BEV in SR so we start handling our own exceptions */
-	mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV);
-}
-
-/*
- * Fix kernel_kseg0_end address in case trampoline placed debug sympols 
- * data there
- */
-void
-mips_postboot_fixup(void)
-{
-	/*
-	 * We store u_long sized objects into the reload area, so the array
-	 * must be so aligned. The standard allows any alignment for char data.
-	 */
-	_Alignas(_Alignof(u_long)) static char fake_preload[256];
-	caddr_t preload_ptr = (caddr_t)&fake_preload[0];
-	size_t size = 0;
-
-#define PRELOAD_PUSH_VALUE(type, value) do {		\
-	*(type *)(preload_ptr + size) = (value);	\
-	size += sizeof(type);				\
-} while (0);
-
-	/*
-	 * Provide kernel module file information
-	 */
-	PRELOAD_PUSH_VALUE(uint32_t, MODINFO_NAME);
-	PRELOAD_PUSH_VALUE(uint32_t, strlen("kernel") + 1);
-	strcpy((char*)(preload_ptr + size), "kernel");
-	size += strlen("kernel") + 1;
-	size = roundup(size, sizeof(u_long));
-
-	PRELOAD_PUSH_VALUE(uint32_t, MODINFO_TYPE);
-	PRELOAD_PUSH_VALUE(uint32_t, strlen("elf kernel") + 1);
-	strcpy((char*)(preload_ptr + size), "elf kernel");
-	size += strlen("elf kernel") + 1;
-	size = roundup(size, sizeof(u_long));
-
-	PRELOAD_PUSH_VALUE(uint32_t, MODINFO_ADDR);
-	PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
-	PRELOAD_PUSH_VALUE(vm_offset_t, KERNLOADADDR);
-	size = roundup(size, sizeof(u_long));
-
-	PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE);
-	PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t));
-	PRELOAD_PUSH_VALUE(size_t, (size_t)&end - KERNLOADADDR);
-	size = roundup(size, sizeof(u_long));
-
-	/* End marker */
-	PRELOAD_PUSH_VALUE(uint32_t, 0);
-	PRELOAD_PUSH_VALUE(uint32_t, 0);
-
-#undef	PRELOAD_PUSH_VALUE
-
-	KASSERT((size < sizeof(fake_preload)),
-		("fake preload size is more thenallocated"));
-
-	preload_metadata = (void *)fake_preload;
-
-#ifdef DDB
-	Elf_Size *trampoline_data = (Elf_Size*)kernel_kseg0_end;
-	Elf_Size symtabsize = 0;
-	vm_offset_t ksym_start;
-	vm_offset_t ksym_end;
-
-	if (trampoline_data[0] == SYMTAB_MAGIC) {
-		symtabsize = trampoline_data[1];
-		kernel_kseg0_end += 2 * sizeof(Elf_Size);
-		/* start of .symtab */
-		ksym_start = kernel_kseg0_end;
-		kernel_kseg0_end += symtabsize;
-		/* end of .strtab */
-		ksym_end = kernel_kseg0_end;
-		db_fetch_ksymtab(ksym_start, ksym_end, 0);
-	}
-#endif
-}
-
-#ifdef SMP
-void
-mips_pcpu_tlb_init(struct pcpu *pcpu)
-{
-	vm_paddr_t pa;
-	pt_entry_t pte;
-
-	/*
-	 * Map the pcpu structure at the virtual address 'pcpup'.
-	 * We use a wired tlb index to do this one-time mapping.
-	 */
-	pa = vtophys(pcpu);
-	pte = PTE_D | PTE_V | PTE_G | PTE_C_CACHE;
-	tlb_insert_wired(PCPU_TLB_ENTRY, (vm_offset_t)pcpup,
-			 TLBLO_PA_TO_PFN(pa) | pte,
-			 TLBLO_PA_TO_PFN(pa + PAGE_SIZE) | pte);
-}
-#endif
-
-/*
- * Initialise a struct pcpu.
- */
-void
-cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
-{
-
-	pcpu->pc_next_asid = 1;
-	pcpu->pc_asid_generation = 1;
-	pcpu->pc_self = pcpu;
-#ifdef SMP
-	if ((vm_offset_t)pcpup >= VM_MIN_KERNEL_ADDRESS &&
-	    (vm_offset_t)pcpup <= VM_MAX_KERNEL_ADDRESS) {
-		mips_pcpu_tlb_init(pcpu);
-	}
-#endif
-}
-
-int
-fill_dbregs(struct thread *td, struct dbreg *dbregs)
-{
-
-	/* No debug registers on mips */
-	return (ENOSYS);
-}
-
-int
-set_dbregs(struct thread *td, struct dbreg *dbregs)
-{
-
-	/* No debug registers on mips */
-	return (ENOSYS);
-}
-
-void
-spinlock_enter(void)
-{
-	struct thread *td;
-	register_t intr;
-
-	td = curthread;
-	if (td->td_md.md_spinlock_count == 0) {
-		intr = intr_disable();
-		td->td_md.md_spinlock_count = 1;
-		td->td_md.md_saved_intr = intr;
-		critical_enter();
-	} else
-		td->td_md.md_spinlock_count++;
-}
-
-void
-spinlock_exit(void)
-{
-	struct thread *td;
-	register_t intr;
-
-	td = curthread;
-	intr = td->td_md.md_saved_intr;
-	td->td_md.md_spinlock_count--;
-	if (td->td_md.md_spinlock_count == 0) {
-		critical_exit();
-		intr_restore(intr);
-	}
-}
-
-/*
- * call platform specific code to halt (until next interrupt) for the idle loop
- */
-void
-cpu_idle(int busy)
-{
-	KASSERT((mips_rd_status() & MIPS_SR_INT_IE) != 0,
-		("interrupts disabled in idle process."));
-	KASSERT((mips_rd_status() & MIPS_INT_MASK) != 0,
-		("all interrupts masked in idle process."));
-
-	if (!busy) {
-		critical_enter();
-		cpu_idleclock();
-	}
-	mips_wait();
-	if (!busy) {
-		cpu_activeclock();
-		critical_exit();
-	}
-}
-
-int
-cpu_idle_wakeup(int cpu)
-{
-
-	return (0);
-}
-
-int
-is_cacheable_mem(vm_paddr_t pa)
-{
-	int i;
-
-	for (i = 0; physmem_desc[i + 1] != 0; i += 2) {
-		if (pa >= physmem_desc[i] && pa < physmem_desc[i + 1])
-			return (1);
-	}
-
-	return (0);
-}
diff --git a/sys/mips/mips/mem.c b/sys/mips/mips/mem.c
deleted file mode 100644
index da45cea8c8d8..000000000000
--- a/sys/mips/mips/mem.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and code derived from software contributed to
- * Berkeley by William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: Utah $Hdr: mem.c 1.13 89/10/08$
- *	from: @(#)mem.c	7.2 (Berkeley) 5/9/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * Memory special file
- */
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/fcntl.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/memrange.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/msgbuf.h>
-#include <sys/systm.h>
-#include <sys/signalvar.h>
-#include <sys/uio.h>
-
-#include <machine/md_var.h>
-#include <machine/vmparam.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_page.h>
-
-#include <machine/memdev.h>
-
-struct mem_range_softc mem_range_softc;
-
-/* ARGSUSED */
-int
-memrw(struct cdev *dev, struct uio *uio, int flags)
-{
-	struct iovec *iov;
-	int error = 0;
-	vm_offset_t va, eva, off, v;
-	vm_prot_t prot;
-	struct vm_page m;
-	vm_page_t marr;
-	vm_size_t cnt;
-
-	cnt = 0;
-	error = 0;
-
-	pmap_page_init(&m);
-	while (uio->uio_resid > 0 && !error) {
-		iov = uio->uio_iov;
-		if (iov->iov_len == 0) {
-			uio->uio_iov++;
-			uio->uio_iovcnt--;
-			if (uio->uio_iovcnt < 0)
-				panic("memrw");
-			continue;
-		}
-		if (dev2unit(dev) == CDEV_MINOR_MEM) {
-			v = uio->uio_offset;
-
-			off = uio->uio_offset & PAGE_MASK;
-			cnt = PAGE_SIZE - ((vm_offset_t)iov->iov_base &
-			    PAGE_MASK);
-			cnt = min(cnt, PAGE_SIZE - off);
-			cnt = min(cnt, iov->iov_len);
-
-			m.phys_addr = trunc_page(v);
-			marr = &m;
-			error = uiomove_fromphys(&marr, off, cnt, uio);
-		}
-		else if (dev2unit(dev) == CDEV_MINOR_KMEM) {
-			va = uio->uio_offset;
-
-			va = trunc_page(uio->uio_offset);
-			eva = round_page(uio->uio_offset
-			    + iov->iov_len);
-
-			/* 
-			 * Make sure that all the pages are currently resident
-			 * so that we don't create any zero-fill pages.
-			 */
-			if (va >= VM_MIN_KERNEL_ADDRESS &&
-			    eva <= VM_MAX_KERNEL_ADDRESS) {
-				for (; va < eva; va += PAGE_SIZE)
-					if (pmap_extract(kernel_pmap, va) == 0)
-						return (EFAULT);
-
-				prot = (uio->uio_rw == UIO_READ)
-				    ? VM_PROT_READ : VM_PROT_WRITE;
-
-				va = uio->uio_offset;
-				if (kernacc((void *) va, iov->iov_len, prot)
-				    == FALSE)
-					return (EFAULT);
-			}
-
-			va = uio->uio_offset;
-			error = uiomove((void *)va, iov->iov_len, uio);
-			continue;
-		}
-	}
-
-	return (error);
-}
-
-/*
- * allow user processes to MMAP some memory sections
- * instead of going through read/write
- */
-int
-memmmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr,
-    int prot, vm_memattr_t *memattr)
-{
-	if (dev2unit(dev) != CDEV_MINOR_MEM)
-		return (-1);
-
-	*paddr = offset;
-
-	return (0);
-}
-
-int
-memioctl_md(struct cdev *dev __unused, u_long cmd __unused,
-    caddr_t data __unused, int flags __unused, struct thread *td __unused)
-{
-	return (ENOTTY);
-}
diff --git a/sys/mips/mips/minidump_machdep.c b/sys/mips/mips/minidump_machdep.c
deleted file mode 100644
index cbf9a83395a6..000000000000
--- a/sys/mips/mips/minidump_machdep.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2010 Oleksandr Tymoshenko <gonzo@freebsd.org>
- * Copyright (c) 2008 Semihalf, Grzegorz Bernacki
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * from: FreeBSD: src/sys/arm/arm/minidump_machdep.c v214223
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/kernel.h>
-#include <sys/kerneldump.h>
-#include <sys/msgbuf.h>
-#include <sys/watchdog.h>
-#include <sys/vmmeter.h>
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-#include <machine/atomic.h>
-#include <machine/elf.h>
-#include <machine/md_var.h>
-#include <machine/minidump.h>
-#include <machine/cache.h>
-
-CTASSERT(sizeof(struct kerneldumpheader) == 512);
-
-static struct kerneldumpheader kdh;
-
-/* Handle chunked writes. */
-static uint64_t dumpsize;
-/* Just auxiliary bufffer */
-static char tmpbuffer[PAGE_SIZE] __aligned(sizeof(uint64_t));
-
-extern pd_entry_t *kernel_segmap;
-
-static int
-write_buffer(struct dumperinfo *di, char *ptr, size_t sz)
-{
-	size_t len;
-	int error, c;
-	u_int maxdumpsz;
-
-	maxdumpsz = di->maxiosize;
-
-	if (maxdumpsz == 0)	/* seatbelt */
-		maxdumpsz = PAGE_SIZE;
-
-	error = 0;
-
-	while (sz) {
-		len = min(maxdumpsz, sz);
-
-		dumpsys_pb_progress(len);
-		wdog_kern_pat(WD_LASTVAL);
-
-		if (ptr) {
-			error = dump_append(di, ptr, 0, len);
-			if (error)
-				return (error);
-			ptr += len;
-			sz -= len;
-		} else {
-			panic("pa is not supported");
-		}
-
-		/* Check for user abort. */
-		c = cncheckc();
-		if (c == 0x03)
-			return (ECANCELED);
-		if (c != -1)
-			printf(" (CTRL-C to abort) ");
-	}
-
-	return (0);
-}
-
-int
-cpu_minidumpsys(struct dumperinfo *di, const struct minidumpstate *state)
-{
-	struct minidumphdr mdhdr;
-	struct msgbuf *mbp;
-	uint64_t *dump_avail_buf;
-	uint32_t ptesize;
-	vm_paddr_t pa;
-	vm_offset_t prev_pte = 0;
-	uint32_t count = 0;
-	vm_offset_t va;
-	pt_entry_t *pte;
-	int i, error;
-	void *dump_va;
-
-	/* Live dumps are untested. */
-	if (!dumping)
-		return (EOPNOTSUPP);
-
-	/* Flush cache */
-	mips_dcache_wbinv_all();
-
-	/* Walk page table pages, set bits in vm_page_dump */
-	ptesize = 0;
-
-	for (va = VM_MIN_KERNEL_ADDRESS; va < kernel_vm_end; va += NBPDR) {
-		ptesize += PAGE_SIZE;
-		pte = pmap_pte(kernel_pmap, va);
-		KASSERT(pte != NULL, ("pte for %jx is NULL", (uintmax_t)va));
-		for (i = 0; i < NPTEPG; i++) {
-			if (pte_test(&pte[i], PTE_V)) {
-				pa = TLBLO_PTE_TO_PA(pte[i]);
-				if (vm_phys_is_dumpable(pa))
-					vm_page_dump_add(state->dump_bitset,
-					    pa);
-			}
-		}
-	}
-
-	/*
-	 * Now mark pages from 0 to phys_avail[0], that's where kernel 
-	 * and pages allocated by pmap_steal reside
-	 */
-	for (pa = 0; pa < phys_avail[0]; pa += PAGE_SIZE) {
-		if (vm_phys_is_dumpable(pa))
-			vm_page_dump_add(state->dump_bitset, pa);
-	}
-
-	/* Calculate dump size. */
-	mbp = state->msgbufp;
-	dumpsize = ptesize;
-	dumpsize += round_page(mbp->msg_size);
-	dumpsize += round_page(nitems(dump_avail) * sizeof(uint64_t));
-	dumpsize += round_page(BITSET_SIZE(vm_page_dump_pages));
-	VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) {
-		/* Clear out undumpable pages now if needed */
-		if (vm_phys_is_dumpable(pa))
-			dumpsize += PAGE_SIZE;
-		else
-			vm_page_dump_drop(state->dump_bitset, pa);
-	}
-	dumpsize += PAGE_SIZE;
-
-	dumpsys_pb_init(dumpsize);
-
-	/* Initialize mdhdr */
-	bzero(&mdhdr, sizeof(mdhdr));
-	strcpy(mdhdr.magic, MINIDUMP_MAGIC);
-	mdhdr.version = MINIDUMP_VERSION;
-	mdhdr.msgbufsize = mbp->msg_size;
-	mdhdr.bitmapsize = round_page(BITSET_SIZE(vm_page_dump_pages));
-	mdhdr.ptesize = ptesize;
-	mdhdr.kernbase = VM_MIN_KERNEL_ADDRESS;
-	mdhdr.dumpavailsize = round_page(nitems(dump_avail) * sizeof(uint64_t));
-
-	dump_init_header(di, &kdh, KERNELDUMPMAGIC, KERNELDUMP_MIPS_VERSION,
-	    dumpsize);
-
-	error = dump_start(di, &kdh);
-	if (error != 0)
-		goto fail;
-
-	printf("Dumping %llu out of %ju MB:", (long long)dumpsize >> 20,
-	    ptoa((uintmax_t)physmem) / 1048576);
-
-	/* Dump my header */
-	bzero(tmpbuffer, sizeof(tmpbuffer));
-	bcopy(&mdhdr, tmpbuffer, sizeof(mdhdr));
-	error = write_buffer(di, tmpbuffer, PAGE_SIZE);
-	if (error)
-		goto fail;
-
-	/* Dump msgbuf up front */
-	error = write_buffer(di, mbp->msg_ptr, round_page(mbp->msg_size));
-	if (error)
-		goto fail;
-
-	/* Dump dump_avail.  Make a copy using 64-bit physical addresses. */
-	_Static_assert(nitems(dump_avail) * sizeof(uint64_t) <=
-	    sizeof(tmpbuffer), "Large dump_avail not handled");
-	bzero(tmpbuffer, sizeof(tmpbuffer));
-	if (sizeof(dump_avail[0]) != sizeof(uint64_t)) {
-		dump_avail_buf = (uint64_t *)tmpbuffer;
-		for (i = 0; dump_avail[i] != 0 || dump_avail[i + 1] != 0; i++) {
-			dump_avail_buf[i] = dump_avail[i];
-			dump_avail_buf[i + 1] = dump_avail[i + 1];
-		}
-	} else {
-		memcpy(tmpbuffer, dump_avail, sizeof(dump_avail));
-	}
-	error = write_buffer(di, tmpbuffer, PAGE_SIZE);
-	if (error)
-		goto fail;
-
-	/* Dump bitmap */
-	error = write_buffer(di, (char *)vm_page_dump,
-	    round_page(BITSET_SIZE(vm_page_dump_pages)));
-	if (error)
-		goto fail;
-
-	/* Dump kernel page table pages */
-	for (va = VM_MIN_KERNEL_ADDRESS; va < kernel_vm_end; va += NBPDR) {
-		pte = pmap_pte(kernel_pmap, va);
-		KASSERT(pte != NULL, ("pte for %jx is NULL", (uintmax_t)va));
-		if (!count) {
-			prev_pte = (vm_offset_t)pte;
-			count++;
-		} else {
-			if ((vm_offset_t)pte == (prev_pte + count * PAGE_SIZE))
-				count++;
-			else {
-				error = write_buffer(di, (char*)prev_pte,
-				    count * PAGE_SIZE);
-				if (error)
-					goto fail;
-				count = 1;
-				prev_pte = (vm_offset_t)pte;
-			}
-		}
-	}
-
-	if (count) {
-		error = write_buffer(di, (char*)prev_pte, count * PAGE_SIZE);
-		if (error)
-			goto fail;
-		count = 0;
-		prev_pte = 0;
-	}
-
-	/* Dump memory chunks page by page */
-	VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) {
-		dump_va = pmap_kenter_temporary(pa, 0);
-		error = write_buffer(di, dump_va, PAGE_SIZE);
-		if (error)
-			goto fail;
-		pmap_kenter_temporary_free(pa);
-	}
-
-	error = dump_finish(di, &kdh);
-	if (error != 0)
-		goto fail;
-
-	printf("\nDump complete\n");
-	return (0);
-
-fail:
-	if (error < 0)
-		error = -error;
-
-	if (error == ECANCELED)
-		printf("\nDump aborted\n");
-	else if (error == E2BIG || error == ENOSPC) {
-		printf("\nDump failed. Partition too small (about %lluMB were "
-		    "needed this time).\n", (long long)dumpsize >> 20);
-	} else
-		printf("\n** DUMP FAILED (ERROR %d) **\n", error);
-	return (error);
-}
diff --git a/sys/mips/mips/mips_pic.c b/sys/mips/mips/mips_pic.c
deleted file mode 100644
index defe29531f5a..000000000000
--- a/sys/mips/mips/mips_pic.c
+++ /dev/null
@@ -1,712 +0,0 @@
-/*-
- * Copyright (c) 2015 Alexander Kabaev
- * Copyright (c) 2006 Oleksandr Tymoshenko
- * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_platform.h"
-#include "opt_hwpmc_hooks.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/rman.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/cpuset.h>
-#include <sys/limits.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <sys/pmc.h>
-#include <sys/pmckern.h>
-
-#include <machine/bus.h>
-#include <machine/hwfunc.h>
-#include <machine/intr.h>
-#include <machine/smp.h>
-
-#ifdef FDT
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#endif
-
-#include "pic_if.h"
-
-struct mips_pic_softc;
-
-static int			 mips_pic_intr(void *);
-static struct mips_pic_intr	*mips_pic_find_intr(struct resource *r);
-static int			 mips_pic_map_fixed_intr(u_int irq,
-				     struct mips_pic_intr **mapping);
-static void			 cpu_establish_intr(struct mips_pic_softc *sc,
-				     const char *name, driver_filter_t *filt,
-				     void (*handler)(void*), void *arg, int irq,
-				     int flags, void **cookiep);
-
-#define	INTR_MAP_DATA_MIPS	INTR_MAP_DATA_PLAT_1
-
-struct intr_map_data_mips_pic {
-	struct intr_map_data	hdr;
-	u_int			irq;
-};
-
-/**
- * MIPS interrupt state; available prior to MIPS PIC device attachment.
- */
-static struct mips_pic_intr {
-	u_int			 mips_irq;	/**< MIPS IRQ# 0-7 */
-	u_int			 intr_irq;	/**< INTRNG IRQ#, or INTR_IRQ_INVALID if unmapped */
-	u_int			 consumers;	/**< INTRNG activation refcount */
-	struct resource		*res;		/**< resource shared by all interrupt handlers registered via
-						     cpu_establish_hardintr() or cpu_establish_softintr(); NULL
-						     if no interrupt handlers are yet registered. */
-} mips_pic_intrs[] = {
-	{ 0, INTR_IRQ_INVALID, 0, NULL },
-	{ 1, INTR_IRQ_INVALID, 0, NULL },
-	{ 2, INTR_IRQ_INVALID, 0, NULL },
-	{ 3, INTR_IRQ_INVALID, 0, NULL },
-	{ 4, INTR_IRQ_INVALID, 0, NULL },
-	{ 5, INTR_IRQ_INVALID, 0, NULL },
-	{ 6, INTR_IRQ_INVALID, 0, NULL },
-	{ 7, INTR_IRQ_INVALID, 0, NULL },
-};
-
-struct mtx mips_pic_mtx;
-MTX_SYSINIT(mips_pic_mtx, &mips_pic_mtx, "mips intr controller mutex", MTX_DEF);
-
-struct mips_pic_irqsrc {
-	struct intr_irqsrc	isrc;
-	u_int			irq;
-};
-
-struct mips_pic_softc {
-	device_t			pic_dev;
-	struct mips_pic_irqsrc		pic_irqs[NREAL_IRQS];
-	uint32_t			nirqs;
-};
-
-static struct mips_pic_softc *pic_sc;
-
-#define PIC_INTR_ISRC(sc, irq)		(&(sc)->pic_irqs[(irq)].isrc)
-
-#ifdef FDT
-static struct ofw_compat_data compat_data[] = {
-	{"mti,cpu-interrupt-controller",	true},
-	{NULL,					false}
-};
-#endif
-
-#ifndef FDT
-static void
-mips_pic_identify(driver_t *drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "cpupic", 0);
-}
-#endif
-
-static int
-mips_pic_probe(device_t dev)
-{
-
-#ifdef FDT
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
-		return (ENXIO);
-#endif
-	device_set_desc(dev, "MIPS32 Interrupt Controller");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static inline void
-pic_irq_unmask(struct mips_pic_softc *sc, u_int irq)
-{
-
-	mips_wr_status(mips_rd_status() | ((1 << irq) << 8));
-}
-
-static inline void
-pic_irq_mask(struct mips_pic_softc *sc, u_int irq)
-{
-
-	mips_wr_status(mips_rd_status() & ~((1 << irq) << 8));
-}
-
-static inline intptr_t
-pic_xref(device_t dev)
-{
-#ifdef FDT
-	return (OF_xref_from_node(ofw_bus_get_node(dev)));
-#else
-	return (MIPS_PIC_XREF);
-#endif
-}
-
-static int
-mips_pic_register_isrcs(struct mips_pic_softc *sc)
-{
-	int error;
-	uint32_t irq, i, tmpirq;
-	struct intr_irqsrc *isrc;
-	char *name;
-
-	for (irq = 0; irq < sc->nirqs; irq++) {
-		sc->pic_irqs[irq].irq = irq;
-
-		isrc = PIC_INTR_ISRC(sc, irq);
-		if (irq < NSOFT_IRQS) {
-			name = "sint";
-			tmpirq = irq;
-		} else {
-			name = "int";
-			tmpirq = irq - NSOFT_IRQS;
-		}
-		error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s%u",
-		    name, tmpirq);
-		if (error != 0) {
-			for (i = 0; i < irq; i++) {
-				intr_isrc_deregister(PIC_INTR_ISRC(sc, i));
-			}
-			device_printf(sc->pic_dev, "%s failed", __func__);
-			return (error);
-		}
-	}
-
-	return (0);
-}
-
-static int
-mips_pic_attach(device_t dev)
-{
-	struct		mips_pic_softc *sc;
-	intptr_t	xref = pic_xref(dev);
-
-	if (pic_sc)
-		return (ENXIO);
-
-	sc = device_get_softc(dev);
-
-	sc->pic_dev = dev;
-	pic_sc = sc;
-
-	/* Set the number of interrupts */
-	sc->nirqs = nitems(sc->pic_irqs);
-
-	/* Register the interrupts */
-	if (mips_pic_register_isrcs(sc) != 0) {
-		device_printf(dev, "could not register PIC ISRCs\n");
-		goto cleanup;
-	}
-
-	/*
-	 * Now, when everything is initialized, it's right time to
-	 * register interrupt controller to interrupt framefork.
-	 */
-	if (intr_pic_register(dev, xref) == NULL) {
-		device_printf(dev, "could not register PIC\n");
-		goto cleanup;
-	}
-
-	/* Claim our root controller role */
-	if (intr_pic_claim_root(dev, xref, mips_pic_intr, sc, 0) != 0) {
-		device_printf(dev, "could not set PIC as a root\n");
-		intr_pic_deregister(dev, xref);
-		goto cleanup;
-	}
-
-	return (0);
-
-cleanup:
-	return(ENXIO);
-}
-
-int
-mips_pic_intr(void *arg)
-{
-	struct mips_pic_softc *sc = arg;
-	register_t cause, status;
-	int i, intr;
-
-	cause = mips_rd_cause();
-	status = mips_rd_status();
-	intr = (cause & MIPS_INT_MASK) >> 8;
-	/*
-	 * Do not handle masked interrupts. They were masked by
-	 * pre_ithread function (mips_mask_XXX_intr) and will be
-	 * unmasked once ithread is through with handler
-	 */
-	intr &= (status & MIPS_INT_MASK) >> 8;
-	while ((i = fls(intr)) != 0) {
-		i--; /* Get a 0-offset interrupt. */
-		intr &= ~(1 << i);
-
-		if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
-		    curthread->td_intr_frame) != 0) {
-			device_printf(sc->pic_dev,
-			    "Stray interrupt %u detected\n", i);
-			pic_irq_mask(sc, i);
-			continue;
-		}
-	}
-
-	KASSERT(i == 0, ("all interrupts handled"));
-
-#ifdef HWPMC_HOOKS
-	if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) {
-		struct trapframe *tf = PCPU_GET(curthread)->td_intr_frame;
-
-		pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
-	}
-#endif
-	return (FILTER_HANDLED);
-}
-
-static void
-mips_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mips_pic_irqsrc *)isrc)->irq;
-	pic_irq_mask(device_get_softc(dev), irq);
-}
-
-static void
-mips_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
-	u_int irq;
-
-	irq = ((struct mips_pic_irqsrc *)isrc)->irq;
-	pic_irq_unmask(device_get_softc(dev), irq);
-}
-
-static int
-mips_pic_map_intr(device_t dev, struct intr_map_data *data,
-    struct intr_irqsrc **isrcp)
-{
-	struct mips_pic_softc *sc;
-	int res;
-
-	sc = device_get_softc(dev);
-	res = 0;
-#ifdef FDT
-	if (data->type == INTR_MAP_DATA_FDT) {
-		struct intr_map_data_fdt *daf;
-
-		daf = (struct intr_map_data_fdt *)data;
-
-		if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
-			return (EINVAL);
-
-		*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
-	} else
-#endif
-	if (data->type == INTR_MAP_DATA_MIPS) {
-		struct intr_map_data_mips_pic *mpd;
-
-		mpd = (struct intr_map_data_mips_pic *)data;
-
-		if (mpd->irq < 0 || mpd->irq >= sc->nirqs)
-			return (EINVAL);
-
-		*isrcp = PIC_INTR_ISRC(sc, mpd->irq);
-	} else {
-		res = ENOTSUP;
-	}
-
-	return (res);
-}
-
-static void
-mips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mips_pic_disable_intr(dev, isrc);
-}
-
-static void
-mips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
-
-	mips_pic_enable_intr(dev, isrc);
-}
-
-static void
-mips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-static device_method_t mips_pic_methods[] = {
-	/* Device interface */
-#ifndef FDT
-	DEVMETHOD(device_identify,	mips_pic_identify),
-#endif
-	DEVMETHOD(device_probe,		mips_pic_probe),
-	DEVMETHOD(device_attach,	mips_pic_attach),
-
-	/* Interrupt controller interface */
-	DEVMETHOD(pic_disable_intr,	mips_pic_disable_intr),
-	DEVMETHOD(pic_enable_intr,	mips_pic_enable_intr),
-	DEVMETHOD(pic_map_intr,		mips_pic_map_intr),
-	DEVMETHOD(pic_pre_ithread,	mips_pic_pre_ithread),
-	DEVMETHOD(pic_post_ithread,	mips_pic_post_ithread),
-	DEVMETHOD(pic_post_filter,	mips_pic_post_filter),
-	{ 0, 0 }
-};
-
-static driver_t mips_pic_driver = {
-	"cpupic",
-	mips_pic_methods,
-	sizeof(struct mips_pic_softc),
-};
-
-static devclass_t mips_pic_devclass;
-
-#ifdef FDT
-EARLY_DRIVER_MODULE(cpupic, ofwbus, mips_pic_driver, mips_pic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT);
-#else
-EARLY_DRIVER_MODULE(cpupic, nexus, mips_pic_driver, mips_pic_devclass, 0, 0,
-    BUS_PASS_INTERRUPT);
-#endif
-
-/**
- * Return the MIPS interrupt map entry for @p r, or NULL if no such entry has
- * been created.
- */
-static struct mips_pic_intr *
-mips_pic_find_intr(struct resource *r)
-{
-	struct mips_pic_intr	*intr;
-	rman_res_t		 irq;
-
-	irq = rman_get_start(r);
-	if (irq != rman_get_end(r) || rman_get_size(r) != 1)
-		return (NULL);
-
-	mtx_lock(&mips_pic_mtx);
-	for (size_t i = 0; i < nitems(mips_pic_intrs); i++) {
-		intr = &mips_pic_intrs[i];
-
-		if (intr->intr_irq != irq)
-			continue;
-
-		mtx_unlock(&mips_pic_mtx);
-		return (intr);
-	}
-	mtx_unlock(&mips_pic_mtx);
-
-	/* Not found */
-	return (NULL);
-}
-
-/**
- * Allocate a fixed IRQ mapping for the given MIPS @p irq, or return the
- * existing mapping if @p irq was previously mapped.
- * 
- * @param	irq	The MIPS IRQ to be mapped.
- * @param[out]	mapping	On success, will be populated with the interrupt
- *			mapping.
- *
- * @retval 0		success
- * @retval EINVAL	if @p irq is not a valid MIPS IRQ#.
- * @retval non-zero	If allocating the MIPS IRQ mapping otherwise fails, a
- *			regular unix error code will be returned.
- */
-static int
-mips_pic_map_fixed_intr(u_int irq, struct mips_pic_intr **mapping)
-{
-	struct mips_pic_intr		*intr;
-	struct intr_map_data_mips_pic	*data;
-	device_t			 pic_dev;
-	uintptr_t			 xref;
-
-	if (irq < 0 || irq >= nitems(mips_pic_intrs))
-		return (EINVAL);
-
-	mtx_lock(&mips_pic_mtx);
-
-	/* Fetch corresponding interrupt entry */
-	intr = &mips_pic_intrs[irq];
-	KASSERT(intr->mips_irq == irq,
-		("intr %u found at index %u", intr->mips_irq, irq));
-
-	/* Already mapped? */
-	if (intr->intr_irq != INTR_IRQ_INVALID) {
-		mtx_unlock(&mips_pic_mtx);
-		*mapping = intr;
-		return (0);
-	}
-
-	/* Map the interrupt */
-	data = (struct intr_map_data_mips_pic *)intr_alloc_map_data(
-		INTR_MAP_DATA_MIPS, sizeof(*data), M_WAITOK | M_ZERO);
-	data->irq = intr->mips_irq;
-
-#ifdef FDT
-	/* PIC must be attached on FDT devices */
-	KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
-
-	pic_dev = pic_sc->pic_dev;
-	xref = pic_xref(pic_dev);
-#else /* !FDT */
-	/* PIC has a fixed xref, and may not have been attached yet */
-	pic_dev = NULL;
-	if (pic_sc != NULL)
-		pic_dev = pic_sc->pic_dev;
-
-	xref = MIPS_PIC_XREF;
-#endif /* FDT */
-
-	KASSERT(intr->intr_irq == INTR_IRQ_INVALID, ("duplicate map"));
-	intr->intr_irq = intr_map_irq(pic_dev, xref, &data->hdr);
-	*mapping = intr;
-
-	mtx_unlock(&mips_pic_mtx);
-	return (0);
-}
-
-/**
- * 
- * Produce fixed IRQ mappings for all MIPS IRQs.
- *
- * Non-FDT/OFW MIPS targets do not provide an equivalent to OFW_BUS_MAP_INTR();
- * it is instead necessary to reserve INTRNG IRQ# 0-7 for use by MIPS device
- * drivers that assume INTRNG IRQs 0-7 are directly mapped to MIPS IRQs 0-7.
- * 
- * XXX: There is no support in INTRNG for reserving a fixed IRQ range. However,
- * we should be called prior to any other interrupt mapping requests, and work
- * around this by iteratively allocating the required 0-7 MIP IRQ# range.
- *
- * @retval 0		success
- * @retval non-zero	If allocating the MIPS IRQ mappings otherwise fails, a
- *			regular unix error code will be returned.
- */
-int
-mips_pic_map_fixed_intrs(void)
-{
-	int error;
-
-	for (u_int i = 0; i < nitems(mips_pic_intrs); i++) {
-		struct mips_pic_intr *intr;
-
-		if ((error = mips_pic_map_fixed_intr(i, &intr)))
-			return (error);
-
-		/* INTRNG IRQs 0-7 must be directly mapped to MIPS IRQs 0-7 */
-		if (intr->intr_irq != intr->mips_irq) {
-			panic("invalid IRQ mapping: %u->%u", intr->intr_irq,
-			    intr->mips_irq);
-		}
-	}
-
-	return (0);
-}
-
-/**
- * If @p r references a MIPS interrupt mapped by the MIPS32 interrupt
- * controller, handle interrupt activation internally.
- *
- * Otherwise, delegate directly to intr_activate_irq().
- */
-int
-mips_pic_activate_intr(device_t child, struct resource *r)
-{
-	struct mips_pic_intr	*intr;
-	int			 error;
-
-	/* Is this one of our shared MIPS interrupts? */
-	if ((intr = mips_pic_find_intr(r)) == NULL) {
-		/* Delegate to standard INTRNG activation */
-		return (intr_activate_irq(child, r));
-	}
-
-	/* Bump consumer count and request activation if required */
-	mtx_lock(&mips_pic_mtx);
-	if (intr->consumers == UINT_MAX) {
-		mtx_unlock(&mips_pic_mtx);
-		return (ENOMEM);
-	}
-
-	if (intr->consumers == 0) {
-		if ((error = intr_activate_irq(child, r))) {
-			mtx_unlock(&mips_pic_mtx);
-			return (error);
-		}
-	}
-
-	intr->consumers++;
-	mtx_unlock(&mips_pic_mtx);
-
-	return (0);
-}
-
-/**
- * If @p r references a MIPS interrupt mapped by the MIPS32 interrupt
- * controller, handle interrupt deactivation internally.
- * 
- * Otherwise, delegate directly to intr_deactivate_irq().
- */
-int
-mips_pic_deactivate_intr(device_t child, struct resource *r)
-{
-	struct mips_pic_intr	*intr;
-	int			 error;
-
-	/* Is this one of our shared MIPS interrupts? */
-	if ((intr = mips_pic_find_intr(r)) == NULL) {
-		/* Delegate to standard INTRNG deactivation */
-		return (intr_deactivate_irq(child, r));
-	}
-
-	/* Decrement consumer count and request deactivation if required */
-	mtx_lock(&mips_pic_mtx);
-	KASSERT(intr->consumers > 0, ("refcount overrelease"));
-
-	if (intr->consumers == 1) {
-		if ((error = intr_deactivate_irq(child, r))) {
-			mtx_unlock(&mips_pic_mtx);
-			return (error);
-		}
-	}
-	intr->consumers--;
-
-	mtx_unlock(&mips_pic_mtx);
-	return (0);
-}
-
-void
-cpu_init_interrupts(void)
-{
-}
-
-/**
- * Provide backwards-compatible support for registering a MIPS interrupt handler
- * directly, without allocating a bus resource. 
- */
-static void
-cpu_establish_intr(struct mips_pic_softc *sc, const char *name,
-    driver_filter_t *filt, void (*handler)(void*), void *arg, int irq,
-    int flags, void **cookiep)
-{
-	struct mips_pic_intr	*intr;
-	struct resource		*res;
-	int			 rid;
-	int			 error;
-
-	rid = -1;
-
-	/* Fetch (or create) a fixed mapping */
-	if ((error = mips_pic_map_fixed_intr(irq, &intr)))
-		panic("Unable to map IRQ %d: %d", irq, error);
-
-	/* Fetch the backing resource, if any */
-	mtx_lock(&mips_pic_mtx);
-	res = intr->res;
-	mtx_unlock(&mips_pic_mtx);
-
-	/* Allocate our IRQ resource */
-	if (res == NULL) {
-		/* Optimistically perform resource allocation */
-		rid = intr->intr_irq;
-		res = bus_alloc_resource(sc->pic_dev, SYS_RES_IRQ, &rid,
-		    intr->intr_irq, intr->intr_irq, 1, RF_SHAREABLE|RF_ACTIVE);
-
-		if (res != NULL) {
-			/* Try to update intr->res */
-			mtx_lock(&mips_pic_mtx);
-			if (intr->res == NULL) {
-				intr->res = res;
-			}
-			mtx_unlock(&mips_pic_mtx);
-
-			/* If intr->res was updated concurrently, free our local
-			 * resource allocation */
-			if (intr->res != res) {
-				bus_release_resource(sc->pic_dev, SYS_RES_IRQ,
-				    rid, res);
-			}
-		} else {
-			/* Maybe someone else allocated it? */
-			mtx_lock(&mips_pic_mtx);
-			res = intr->res;
-			mtx_unlock(&mips_pic_mtx);
-		}
-
-		if (res == NULL) {
-			panic("Unable to allocate IRQ %d->%u resource", irq,
-			    intr->intr_irq);
-		}
-	}
-
-	error = bus_setup_intr(sc->pic_dev, res, flags, filt, handler, arg,
-	    cookiep);
-	if (error)
-		panic("Unable to add IRQ %d handler: %d", irq, error);
-}
-
-void
-cpu_establish_hardintr(const char *name, driver_filter_t *filt,
-    void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
-{
-	KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
-
-	if (irq < 0 || irq >= NHARD_IRQS)
-		panic("%s called for unknown hard intr %d", __func__, irq);
-
-	cpu_establish_intr(pic_sc, name, filt, handler, arg, irq+NSOFT_IRQS,
-	    flags, cookiep);
-}
-
-void
-cpu_establish_softintr(const char *name, driver_filter_t *filt,
-    void (*handler)(void*), void *arg, int irq, int flags,
-    void **cookiep)
-{
-	KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
-
-	if (irq < 0 || irq >= NSOFT_IRQS)
-		panic("%s called for unknown soft intr %d", __func__, irq);
-
-	cpu_establish_intr(pic_sc, name, filt, handler, arg, irq, flags,
-	    cookiep);
-}
diff --git a/sys/mips/mips/mp_machdep.c b/sys/mips/mips/mp_machdep.c
deleted file mode 100644
index 2582c2b65e78..000000000000
--- a/sys/mips/mips/mp_machdep.c
+++ /dev/null
@@ -1,375 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 Neelkanth Natu
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/cpuset.h>
-#include <sys/ktr.h>
-#include <sys/proc.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/kernel.h>
-#include <sys/pcpu.h>
-#include <sys/smp.h>
-#include <sys/sched.h>
-#include <sys/bus.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-
-#include <machine/clock.h>
-#include <machine/smp.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/cache.h>
-#include <machine/tlb.h>
-
-struct pcb stoppcbs[MAXCPU];
-
-static void *dpcpu;
-static struct mtx ap_boot_mtx;
-
-static volatile int aps_ready;
-static volatile int mp_naps;
-
-static void
-ipi_send(struct pcpu *pc, int ipi)
-{
-
-	CTR3(KTR_SMP, "%s: cpu=%d, ipi=%x", __func__, pc->pc_cpuid, ipi);
-
-	atomic_set_32(&pc->pc_pending_ipis, ipi);
-	platform_ipi_send(pc->pc_cpuid);
-
-	CTR1(KTR_SMP, "%s: sent", __func__);
-}
-
-void
-ipi_all_but_self(int ipi)
-{
-	cpuset_t other_cpus;
-
-	other_cpus = all_cpus;
-	CPU_CLR(PCPU_GET(cpuid), &other_cpus);
-	ipi_selected(other_cpus, ipi);
-}
-
-/* Send an IPI to a set of cpus. */
-void
-ipi_selected(cpuset_t cpus, int ipi)
-{
-	struct pcpu *pc;
-
-	STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
-		if (CPU_ISSET(pc->pc_cpuid, &cpus)) {
-			CTR3(KTR_SMP, "%s: pc: %p, ipi: %x\n", __func__, pc,
-			    ipi);
-			ipi_send(pc, ipi);
-		}
-	}
-}
-
-/* Send an IPI to a specific CPU. */
-void
-ipi_cpu(int cpu, u_int ipi)
-{
-
-	CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x\n", __func__, cpu, ipi);
-	ipi_send(cpuid_to_pcpu[cpu], ipi);
-}
-
-/*
- * Handle an IPI sent to this processor.
- */
-static int
-mips_ipi_handler(void *arg)
-{
-	u_int	cpu, ipi, ipi_bitmap;
-	int	bit;
-
-	cpu = PCPU_GET(cpuid);
-
-	platform_ipi_clear();	/* quiesce the pending ipi interrupt */
-
-	ipi_bitmap = atomic_readandclear_int(PCPU_PTR(pending_ipis));
-	if (ipi_bitmap == 0)
-		return (FILTER_STRAY);
-
-	CTR1(KTR_SMP, "smp_handle_ipi(), ipi_bitmap=%x", ipi_bitmap);
-
-	while ((bit = ffs(ipi_bitmap))) {
-		bit = bit - 1;
-		ipi = 1 << bit;
-		ipi_bitmap &= ~ipi;
-		switch (ipi) {
-		case IPI_RENDEZVOUS:
-			CTR0(KTR_SMP, "IPI_RENDEZVOUS");
-			smp_rendezvous_action();
-			break;
-
-		case IPI_AST:
-			CTR0(KTR_SMP, "IPI_AST");
-			break;
-
-		case IPI_STOP:
-			/*
-			 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
-			 * necessary to add it in the switch.
-			 */
-			CTR0(KTR_SMP, "IPI_STOP or IPI_STOP_HARD");
-
-			savectx(&stoppcbs[cpu]);
-			tlb_save();
-
-			/* Indicate we are stopped */
-			CPU_SET_ATOMIC(cpu, &stopped_cpus);
-
-			/* Wait for restart */
-			while (!CPU_ISSET(cpu, &started_cpus))
-				cpu_spinwait();
-
-			CPU_CLR_ATOMIC(cpu, &started_cpus);
-			CPU_CLR_ATOMIC(cpu, &stopped_cpus);
-			CTR0(KTR_SMP, "IPI_STOP (restart)");
-			break;
-		case IPI_PREEMPT:
-			CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
-			sched_preempt(curthread);
-			break;
-		case IPI_HARDCLOCK:
-			CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
-			hardclockintr();
-			break;
-		default:
-			panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu);
-		}
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static int
-start_ap(int cpuid)
-{
-	int cpus, ms;
-
-	cpus = mp_naps;
-	dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
-
-	mips_sync();
-
-	if (platform_start_ap(cpuid) != 0)
-		return (-1);			/* could not start AP */
-
-	for (ms = 0; ms < 5000; ++ms) {
-		if (mp_naps > cpus)
-			return (0);		/* success */
-		else
-			DELAY(1000);
-	}
-
-	return (-2);				/* timeout initializing AP */
-}
-
-void
-cpu_mp_setmaxid(void)
-{
-	cpuset_t cpumask;
-	int cpu, last;
-
-	platform_cpu_mask(&cpumask);
-	mp_ncpus = 0;
-	last = 1;
-	while ((cpu = CPU_FFS(&cpumask)) != 0) {
-		last = cpu;
-		cpu--;
-		CPU_CLR(cpu, &cpumask);
-		mp_ncpus++;
-	}
-	if (mp_ncpus <= 0)
-		mp_ncpus = 1;
-
-	mp_maxid = min(last, MAXCPU) - 1;
-}
-
-void
-cpu_mp_announce(void)
-{
-	/* NOTHING */
-}
-
-struct cpu_group *
-cpu_topo(void)
-{
-	return (platform_smp_topo());
-}
-
-int
-cpu_mp_probe(void)
-{
-
-	return (mp_ncpus > 1);
-}
-
-void
-cpu_mp_start(void)
-{
-	int error, cpuid;
-	cpuset_t cpumask;
-
-	mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
-
-	CPU_ZERO(&all_cpus);
-	platform_cpu_mask(&cpumask);
-
-	while (!CPU_EMPTY(&cpumask)) {
-		cpuid = CPU_FFS(&cpumask) - 1;
-		CPU_CLR(cpuid, &cpumask);
-
-		if (cpuid >= MAXCPU) {
-			printf("cpu_mp_start: ignoring AP #%d.\n", cpuid);
-			continue;
-		}
-
-		if (cpuid != platform_processor_id()) {
-			if ((error = start_ap(cpuid)) != 0) {
-				printf("AP #%d failed to start: %d\n", cpuid, error);
-				continue;
-			}
-			if (bootverbose)
-				printf("AP #%d started!\n", cpuid);
-		}
-		CPU_SET(cpuid, &all_cpus);
-	}
-}
-
-void
-smp_init_secondary(u_int32_t cpuid)
-{
-
-	/* TLB */
-	mips_wr_wired(0);
-	tlb_invalidate_all();
-	mips_wr_wired(VMWIRED_ENTRIES);
-
-	/*
-	 * We assume that the L1 cache on the APs is identical to the one
-	 * on the BSP.
-	 */
-	mips_dcache_wbinv_all();
-	mips_icache_sync_all();
-
-	mips_sync();
-
-	mips_wr_entryhi(0);
-
-	pcpu_init(PCPU_ADDR(cpuid), cpuid, sizeof(struct pcpu));
-	dpcpu_init(dpcpu, cpuid);
-
-	/* The AP has initialized successfully - allow the BSP to proceed */
-	++mp_naps;
-
-	/* Spin until the BSP is ready to release the APs */
-	while (!aps_ready)
-		;
-
-#ifdef PLATFORM_INIT_SECONDARY
-	platform_init_secondary(cpuid);
-#endif
-
-	/* Initialize curthread. */
-	KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
-	PCPU_SET(curthread, PCPU_GET(idlethread));
-	schedinit_ap();
-
-	mtx_lock_spin(&ap_boot_mtx);
-
-	smp_cpus++;
-
-	CTR1(KTR_SMP, "SMP: AP CPU #%d launched", PCPU_GET(cpuid));
-
-	if (bootverbose)
-		printf("SMP: AP CPU #%d launched.\n", PCPU_GET(cpuid));
-
-	if (smp_cpus == mp_ncpus) {
-		atomic_store_rel_int(&smp_started, 1);
-	}
-
-	mtx_unlock_spin(&ap_boot_mtx);
-
-	while (smp_started == 0)
-		; /* nothing */
-
-	/* Start per-CPU event timers. */
-	cpu_initclocks_ap();
-
-	/* enter the scheduler */
-	sched_ap_entry();
-
-	panic("scheduler returned us to %s", __func__);
-	/* NOTREACHED */
-}
-
-static void
-release_aps(void *dummy __unused)
-{
-	int ipi_irq;
-
-	if (mp_ncpus == 1)
-		return;
-
-#ifdef PLATFORM_INIT_SECONDARY
-	platform_init_secondary(0);
-#endif
-
-	/*
-	 * IPI handler
-	 */
-	ipi_irq = platform_ipi_hardintr_num();
-	if (ipi_irq != -1) {
-		cpu_establish_hardintr("ipi", mips_ipi_handler, NULL, NULL,
-		    ipi_irq, INTR_TYPE_MISC | INTR_EXCL, NULL);
-	} else {
-		ipi_irq = platform_ipi_softintr_num();
-		cpu_establish_softintr("ipi", mips_ipi_handler, NULL, NULL,
-		    ipi_irq, INTR_TYPE_MISC | INTR_EXCL, NULL);
-	}
-
-	atomic_store_rel_int(&aps_ready, 1);
-
-	while (smp_started == 0)
-		; /* nothing */
-}
-
-SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
diff --git a/sys/mips/mips/mpboot.S b/sys/mips/mips/mpboot.S
deleted file mode 100644
index 7487b317847d..000000000000
--- a/sys/mips/mips/mpboot.S
+++ /dev/null
@@ -1,89 +0,0 @@
-/*-
- * Copyright (c) 2010 Neelkanth Natu
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-
-#include "assym.inc"
-
-	.text
-	.set	noat
-	.set	noreorder
-
-/* XXX move this to a header file */
-#if defined(CPU_CNMIPS)
-#define CLEAR_STATUS \
-	mfc0    a0, MIPS_COP_0_STATUS   ;\
-	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
-	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER | MIPS_SR_BEV) ; \
-	and     a0, a0, a2              ; \
-        mtc0    a0, MIPS_COP_0_STATUS
-#elif defined(__mips_n64)
-#define CLEAR_STATUS \
-	li	a0, (MIPS_SR_KX | MIPS_SR_UX) ; \
-	mtc0	a0, MIPS_COP_0_STATUS
-#else
-#define CLEAR_STATUS \
-	mtc0	zero, MIPS_COP_0_STATUS
-#endif
-
-GLOBAL(mpentry)
-	CLEAR_STATUS			/* disable interrupts */
-
-	mtc0	zero, MIPS_COP_0_CAUSE	/* clear soft interrupts */
-
-	li	t0, MIPS_CCA_CACHED	/* make sure kseg0 is cached */
-	mtc0	t0, MIPS_COP_0_CONFIG
-	COP0_SYNC
-
-	jal	platform_processor_id	/* get the processor number */
-	nop
-	move	s0, v0
-
-	/*
-	 * Initialize stack and call machine startup
-	 */
-	PTR_LA	sp, _C_LABEL(pcpu_space)
-	addiu	sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
-	sll	t0, s0, PAGE_SHIFT + 1
-	addu	sp, sp, t0
-
-	/* Zero out old ra and old fp for debugger */
-	sw      zero, CALLFRAME_SIZ - 4(sp)
-	sw      zero, CALLFRAME_SIZ - 8(sp)
-
-	PTR_LA	gp, _C_LABEL(_gp)
-
-	jal	platform_init_ap
-	move	a0, s0
-	jal	smp_init_secondary
-	move	a0, s0
-
-	PANIC("AP startup failed!")
diff --git a/sys/mips/mips/nexus.c b/sys/mips/mips/nexus.c
deleted file mode 100644
index 46e7f1831029..000000000000
--- a/sys/mips/mips/nexus.c
+++ /dev/null
@@ -1,617 +0,0 @@
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission.  M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose.  It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''.  M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * This code implements a `root nexus' for MIPS Architecture
- * machines.  The function of the root nexus is to serve as an
- * attachment point for both processors and buses, and to manage
- * resources which are common to all of them.  In particular,
- * this code implements the core resource managers for interrupt
- * requests and memory address space.
- */
-#include "opt_platform.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/interrupt.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <machine/vmparam.h>
-
-#ifdef INTRNG
-#include <machine/intr.h>
-#else
-#include <machine/intr_machdep.h>
-#endif
-
-#ifdef FDT
-#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/ofw/openfirm.h>
-#include "ofw_bus_if.h"
-#endif
-
-#undef NEXUS_DEBUG
-#ifdef NEXUS_DEBUG
-#define dprintf printf
-#else 
-#define dprintf(x, arg...)
-#endif  /* NEXUS_DEBUG */
-
-#ifdef INTRNG
-#define	NUM_MIPS_IRQS	intr_nirq	/* Any INTRNG-mapped IRQ */
-#else
-#define	NUM_MIPS_IRQS	6	/* HW IRQs only */
-#endif
-
-static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
-
-struct nexus_device {
-	struct resource_list	nx_resources;
-};
-
-#define DEVTONX(dev)	((struct nexus_device *)device_get_ivars(dev))
-
-static struct rman irq_rman;
-static struct rman mem_rman;
-
-static struct resource *
-		nexus_alloc_resource(device_t, device_t, int, int *, rman_res_t,
-		    rman_res_t, rman_res_t, u_int);
-static device_t	nexus_add_child(device_t, u_int, const char *, int);
-static int	nexus_attach(device_t);
-static void	nexus_delete_resource(device_t, device_t, int, int);
-static struct resource_list *
-		nexus_get_reslist(device_t, device_t);
-static int	nexus_get_resource(device_t, device_t, int, int, rman_res_t *,
-		    rman_res_t *);
-static int	nexus_print_child(device_t, device_t);
-static int	nexus_print_all_resources(device_t dev);
-static int	nexus_probe(device_t);
-static int	nexus_release_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	nexus_set_resource(device_t, device_t, int, int, rman_res_t,
-		    rman_res_t);
-static int	nexus_activate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static int	nexus_deactivate_resource(device_t, device_t, int, int,
-		    struct resource *);
-static void	nexus_hinted_child(device_t, const char *, int);
-static int	nexus_setup_intr(device_t dev, device_t child,
-		    struct resource *res, int flags, driver_filter_t *filt,
-		    driver_intr_t *intr, void *arg, void **cookiep);
-static int	nexus_teardown_intr(device_t, device_t, struct resource *,
-		    void *);
-#ifdef INTRNG
-#ifdef SMP
-static int	nexus_bind_intr(device_t, device_t, struct resource *, int);
-#endif
-#ifdef FDT
-static int	nexus_ofw_map_intr(device_t dev, device_t child,
-		    phandle_t iparent, int icells, pcell_t *intr);
-#endif
-static int	nexus_describe_intr(device_t dev, device_t child,
-		    struct resource *irq, void *cookie, const char *descr);
-static int	nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
-		    enum intr_polarity pol);
-#endif
-
-static device_method_t nexus_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		nexus_probe),
-	DEVMETHOD(device_attach,	nexus_attach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_add_child,	nexus_add_child),
-	DEVMETHOD(bus_alloc_resource,	nexus_alloc_resource),
-	DEVMETHOD(bus_delete_resource,	nexus_delete_resource),
-	DEVMETHOD(bus_get_resource,	nexus_get_resource),
-	DEVMETHOD(bus_get_resource_list,	nexus_get_reslist),
-	DEVMETHOD(bus_print_child,	nexus_print_child),
-	DEVMETHOD(bus_release_resource,	nexus_release_resource),
-	DEVMETHOD(bus_set_resource,	nexus_set_resource),
-	DEVMETHOD(bus_setup_intr,	nexus_setup_intr),
-	DEVMETHOD(bus_teardown_intr,	nexus_teardown_intr),
-	DEVMETHOD(bus_activate_resource,nexus_activate_resource),
-	DEVMETHOD(bus_deactivate_resource,	nexus_deactivate_resource),
-	DEVMETHOD(bus_hinted_child,	nexus_hinted_child),
-#ifdef INTRNG
-	DEVMETHOD(bus_config_intr,	nexus_config_intr),
-	DEVMETHOD(bus_describe_intr,	nexus_describe_intr),
-#ifdef SMP
-	DEVMETHOD(bus_bind_intr,	nexus_bind_intr),
-#endif
-#ifdef FDT
-	DEVMETHOD(ofw_bus_map_intr,	nexus_ofw_map_intr),
-#endif
-#endif
-	{ 0, 0 }
-};
-
-static driver_t nexus_driver = {
-	"nexus",
-	nexus_methods,
-	1			/* no softc */
-};
-static devclass_t nexus_devclass;
-
-static int
-nexus_probe(device_t dev)
-{
-
-	device_set_desc(dev, "MIPS32 root nexus");
-
-	irq_rman.rm_start = 0;
-	irq_rman.rm_end = NUM_MIPS_IRQS - 1;
-	irq_rman.rm_type = RMAN_ARRAY;
-	irq_rman.rm_descr = "Hardware IRQs";
-	if (rman_init(&irq_rman) != 0 ||
-	    rman_manage_region(&irq_rman, 0, NUM_MIPS_IRQS - 1) != 0) {
-		panic("%s: irq_rman", __func__);
-	}
-
-	mem_rman.rm_start = 0;
-	mem_rman.rm_end = BUS_SPACE_MAXADDR;
-	mem_rman.rm_type = RMAN_ARRAY;
-	mem_rman.rm_descr = "Memory addresses";
-	if (rman_init(&mem_rman) != 0 ||
-	    rman_manage_region(&mem_rman, 0, BUS_SPACE_MAXADDR) != 0) {
-		panic("%s: mem_rman", __func__);
-	}
-
-	return (0);
-}
-
-static int
-nexus_attach(device_t dev)
-{
-#if defined(INTRNG) && !defined(FDT)
-	int error;
-
-	if ((error = mips_pic_map_fixed_intrs()))
-		return (error);
-#endif
-
-	bus_generic_probe(dev);
-	bus_enumerate_hinted_children(dev);
-	bus_generic_attach(dev);
-
-	return (0);
-}
-
-static int
-nexus_print_child(device_t bus, device_t child)
-{
-	int retval = 0;
-
-	retval += bus_print_child_header(bus, child);
-	retval += nexus_print_all_resources(child);
-	if (device_get_flags(child))
-		retval += printf(" flags %#x", device_get_flags(child));
-	retval += printf(" on %s\n", device_get_nameunit(bus));
-
-	return (retval);
-}
-
-static int
-nexus_print_all_resources(device_t dev)
-{
-	struct nexus_device *ndev = DEVTONX(dev);
-	struct resource_list *rl = &ndev->nx_resources;
-	int retval = 0;
-
-	if (STAILQ_FIRST(rl))
-		retval += printf(" at");
-
-	retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
-	retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
-
-	return (retval);
-}
-
-static device_t
-nexus_add_child(device_t bus, u_int order, const char *name, int unit)
-{
-	device_t	child;
-	struct nexus_device *ndev;
-
-	ndev = malloc(sizeof(struct nexus_device), M_NEXUSDEV, M_NOWAIT|M_ZERO);
-	if (!ndev)
-		return (0);
-	resource_list_init(&ndev->nx_resources);
-
-	child = device_add_child_ordered(bus, order, name, unit);
-	if (child == NULL) {
-		device_printf(bus, "failed to add child: %s%d\n", name, unit);
-		return (0);
-	}
-
-	/* should we free this in nexus_child_detached? */
-	device_set_ivars(child, ndev);
-
-	return (child);
-}
-
-/*
- * Allocate a resource on behalf of child.  NB: child is usually going to be a
- * child of one of our descendants, not a direct child of nexus0.
- * (Exceptions include footbridge.)
- */
-static struct resource *
-nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
-	rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct nexus_device		*ndev = DEVTONX(child);
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct rman			*rm;
-	int				 isdefault, needactivate, passthrough;
-
-	dprintf("%s: entry (%p, %p, %d, %p, %p, %p, %jd, %d)\n",
-	    __func__, bus, child, type, rid, (void *)(intptr_t)start,
-	    (void *)(intptr_t)end, count, flags);
-	dprintf("%s: requested rid is %d\n", __func__, *rid);
-
-	isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1);
-	needactivate = flags & RF_ACTIVE;
-	passthrough = (device_get_parent(child) != bus);
-	rle = NULL;
-
-	/*
-	 * If this is an allocation of the "default" range for a given RID,
-	 * and we know what the resources for this device are (ie. they aren't
-	 * maintained by a child bus), then work out the start/end values.
-	 */
-	if (!passthrough && isdefault) {
-		rle = resource_list_find(&ndev->nx_resources, type, *rid);
-		if (rle == NULL)
-			return (NULL);
-		if (rle->res != NULL) {
-			panic("%s: resource entry is busy", __func__);
-		}
-		start = rle->start;
-		end = rle->end;
-		count = rle->count;
-	}
-
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &irq_rman;
-		break;
-	case SYS_RES_MEMORY:
-		rm = &mem_rman;
-		break;
-	default:
-		printf("%s: unknown resource type %d\n", __func__, type);
-		return (0);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		printf("%s: could not reserve resource for %s\n", __func__,
-		    device_get_nameunit(child));
-		return (0);
-	}
-
-	rman_set_rid(rv, *rid);
-
-	if (needactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			printf("%s: could not activate resource\n", __func__);
-			rman_release_resource(rv);
-			return (0);
-		}
-	}
-
-	return (rv);
-}
-
-static struct resource_list *
-nexus_get_reslist(device_t dev, device_t child)
-{
-	struct nexus_device *ndev = DEVTONX(child);
-
-	return (&ndev->nx_resources);
-}
-
-static int
-nexus_set_resource(device_t dev, device_t child, int type, int rid,
-    rman_res_t start, rman_res_t count)
-{
-	struct nexus_device		*ndev = DEVTONX(child);
-	struct resource_list		*rl = &ndev->nx_resources;
-	struct resource_list_entry	*rle;
-
-	dprintf("%s: entry (%p, %p, %d, %d, %p, %jd)\n",
-	    __func__, dev, child, type, rid, (void *)(intptr_t)start, count);
-
-	rle = resource_list_add(rl, type, rid, start, start + count - 1,
-	    count);
-	if (rle == NULL)
-		return (ENXIO);
-
-	return (0);
-}
-
-static int
-nexus_get_resource(device_t dev, device_t child, int type, int rid,
-    rman_res_t *startp, rman_res_t *countp)
-{
-	struct nexus_device		*ndev = DEVTONX(child);
-	struct resource_list		*rl = &ndev->nx_resources;
-	struct resource_list_entry	*rle;
-
-	rle = resource_list_find(rl, type, rid);
-	if (!rle)
-		return(ENOENT);
-	if (startp)
-		*startp = rle->start;
-	if (countp)
-		*countp = rle->count;
-	return (0);
-}
-
-static void
-nexus_delete_resource(device_t dev, device_t child, int type, int rid)
-{
-	struct nexus_device	*ndev = DEVTONX(child);
-	struct resource_list	*rl = &ndev->nx_resources;
-
-	dprintf("%s: entry\n", __func__);
-
-	resource_list_delete(rl, type, rid);
-}
-
-static int
-nexus_release_resource(device_t bus, device_t child, int type, int rid,
-		       struct resource *r)
-{
-	dprintf("%s: entry\n", __func__);
-
-	if (rman_get_flags(r) & RF_ACTIVE) {
-		int error = bus_deactivate_resource(child, type, rid, r);
-		if (error)
-			return error;
-	}
-
-	return (rman_release_resource(r));
-}
-
-static int
-nexus_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	void *vaddr;
-	vm_paddr_t paddr;
-	vm_size_t psize;
-	int err;
-
-	/*
-	 * If this is a memory resource, use pmap_mapdev to map it.
-	 */
-	if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
-		paddr = rman_get_start(r);
-		psize = rman_get_size(r);
-		rman_set_bustag(r, mips_bus_space_generic);
-		err = bus_space_map(rman_get_bustag(r), paddr, psize, 0,
-		    (bus_space_handle_t *)&vaddr);
-		if (err != 0) {
-			rman_deactivate_resource(r);
-			return (err);
-		}
-		rman_set_virtual(r, vaddr);
-		rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr);
-	} else if (type == SYS_RES_IRQ) {
-#ifdef INTRNG
-		err = mips_pic_activate_intr(child, r);
-		if (err != 0) {
-			rman_deactivate_resource(r);
-			return (err);
-		}
-#endif
-	}
-
-	return (rman_activate_resource(r));
-}
-
-static int
-nexus_deactivate_resource(device_t bus, device_t child, int type, int rid,
-			  struct resource *r)
-{
-	bus_space_handle_t vaddr;
-	bus_size_t psize;
-
-	vaddr = rman_get_bushandle(r);
-
-	if (type == SYS_RES_MEMORY && vaddr != 0) {
-		psize = (bus_size_t)rman_get_size(r);
-		bus_space_unmap(rman_get_bustag(r), vaddr, psize);
-		rman_set_virtual(r, NULL);
-		rman_set_bushandle(r, 0);
-	} else if (type == SYS_RES_IRQ) {
-#ifdef INTRNG
-		mips_pic_deactivate_intr(child, r);
-#endif
-	}
-
-	return (rman_deactivate_resource(r));
-}
-
-static int
-nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
-    driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
-{
-#ifdef INTRNG
-	return (intr_setup_irq(child, res, filt, intr, arg, flags, cookiep));
-#else
-	int irq;
-	register_t s;
-
-	s = intr_disable();
-	irq = rman_get_start(res);
-	if (irq >= NUM_MIPS_IRQS) {
-		intr_restore(s);
-		return (0);
-	}
-
-	cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg,
-	    irq, flags, cookiep);
-	intr_restore(s);
-
-	return (0);
-#endif
-}
-
-static int
-nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
-{
-
-#ifdef INTRNG
-	return (intr_teardown_irq(child, r, ih));
-#else
-	printf("Unimplemented %s at %s:%d\n", __func__, __FILE__, __LINE__);
-	return (0);
-#endif
-}
-
-#ifdef INTRNG
-static int
-nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
-    enum intr_polarity pol)
-{
-
-	device_printf(dev, "bus_config_intr is obsolete and not supported!\n");
-	return (EOPNOTSUPP);
-}
-
-static int
-nexus_describe_intr(device_t dev, device_t child, struct resource *irq,
-    void *cookie, const char *descr)
-{
-
-	return (intr_describe_irq(child, irq, cookie, descr));
-}
-
-#ifdef SMP
-static int
-nexus_bind_intr(device_t dev, device_t child, struct resource *irq, int cpu)
-{
-
-	return (intr_bind_irq(child, irq, cpu));
-}
-#endif
-
-#ifdef FDT
-static int
-nexus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells,
-    pcell_t *intr)
-{
-	u_int irq;
-	struct intr_map_data_fdt *fdt_data;
-	size_t len;
-
-	len = sizeof(*fdt_data) + icells * sizeof(pcell_t);
-	fdt_data = (struct intr_map_data_fdt *)intr_alloc_map_data(
-	    INTR_MAP_DATA_FDT, len, M_WAITOK | M_ZERO);
-	fdt_data->iparent = iparent;
-	fdt_data->ncells = icells;
-	memcpy(fdt_data->cells, intr, icells * sizeof(pcell_t));
-	irq = intr_map_irq(NULL, iparent, (struct intr_map_data *)fdt_data);
-	return (irq);
-}
-#endif
-#endif /* INTRNG */
-
-static void
-nexus_hinted_child(device_t bus, const char *dname, int dunit)
-{
-	device_t child;
-	long	maddr;
-	int	msize;
-	int	order;
-	int	result;
-	int	irq;
-	int	mem_hints_count;
-
-	if ((resource_int_value(dname, dunit, "order", &order)) != 0)
-		order = 1000;
-	child = BUS_ADD_CHILD(bus, order, dname, dunit);
-	if (child == NULL)
-		return;
-
-	/*
-	 * Set hard-wired resources for hinted child using
-	 * specific RIDs.
-	 */
-	mem_hints_count = 0;
-	if (resource_long_value(dname, dunit, "maddr", &maddr) == 0)
-		mem_hints_count++;
-	if (resource_int_value(dname, dunit, "msize", &msize) == 0)
-		mem_hints_count++;
-
-	/* check if all info for mem resource has been provided */
-	if ((mem_hints_count > 0) && (mem_hints_count < 2)) {
-		printf("Either maddr or msize hint is missing for %s%d\n",
-		    dname, dunit);
-	} 
-	else if (mem_hints_count) {
-		dprintf("%s: discovered hinted child %s at maddr %p(%d)\n",
-		    __func__, device_get_nameunit(child),
-		    (void *)(intptr_t)maddr, msize);
-
-		result = bus_set_resource(child, SYS_RES_MEMORY, 0,
-		    (u_long) maddr, msize);
-		if (result != 0) {
-			device_printf(bus, 
-			    "warning: bus_set_resource() failed\n");
-		}
-	}
-
-	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
-		result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
-		if (result != 0)
-			device_printf(bus,
-			    "warning: bus_set_resource() failed\n");
-	}
-}
-
-EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0,
-    BUS_PASS_BUS + BUS_PASS_ORDER_EARLY);
diff --git a/sys/mips/mips/octeon_cop2.c b/sys/mips/mips/octeon_cop2.c
deleted file mode 100644
index 4d76643c618a..000000000000
--- a/sys/mips/mips/octeon_cop2.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <vm/uma.h>
-
-#include <machine/octeon_cop2.h>
-
-static uma_zone_t ctxzone;
-
-static void 
-octeon_cop2_init(void* dummy)
-{
-	printf("Create COP2 context zone\n");
-	ctxzone = uma_zcreate("COP2 context",
-	                        sizeof(struct octeon_cop2_state), 
-				NULL, NULL, NULL, NULL, UMA_ALIGN_LONG, 0);
-}
-
-struct octeon_cop2_state *
-octeon_cop2_alloc_ctx()
-{
-	return uma_zalloc(ctxzone, M_NOWAIT);
-}
-
-void
-octeon_cop2_free_ctx(struct octeon_cop2_state *ctx)
-{
-	uma_zfree(ctxzone, ctx);
-}
-
-SYSINIT(octeon_cop2, SI_SUB_CPU, SI_ORDER_FIRST, octeon_cop2_init, NULL);
diff --git a/sys/mips/mips/octeon_cop2_swtch.S b/sys/mips/mips/octeon_cop2_swtch.S
deleted file mode 100644
index 62b672ac64ef..000000000000
--- a/sys/mips/mips/octeon_cop2_swtch.S
+++ /dev/null
@@ -1,246 +0,0 @@
-/*-
- * Copyright (c) 2011 Oleksandr Tymoshenko
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include <machine/cpuregs.h>
-#include <machine/octeon_cop2.h>
-
-#include "assym.inc"
-
-.set noreorder
-
-#define SAVE_COP2_REGISTER(reg)				\
-	dmfc2	t1, reg; sd	t1, reg##_OFFSET(a0)
-
-
-#define RESTORE_COP2_REGISTER(reg)			\
-	ld	t1, reg##_OFFSET(a0); dmtc2	t1, reg##_SET
- 
-LEAF(octeon_cop2_save)
-
-	/* save original cop2 status in t2*/
-	mfc0	t2, MIPS_COP_0_STATUS
-	or	t0, t2, MIPS_SR_COP_2_BIT
-	and	t0, t0, ~MIPS_SR_INT_IE
-	mtc0	t0, MIPS_COP_0_STATUS
-
-	/* Get CvmCtl register */
-	dmfc0	t0, $9, 7
-
-	/* CRC state */
-	SAVE_COP2_REGISTER(COP2_CRC_IV)
-	SAVE_COP2_REGISTER(COP2_CRC_LENGTH)
-	SAVE_COP2_REGISTER(COP2_CRC_POLY)
-
-	/* if CvmCtl[NODFA_CP2] -> save_nodfa */
-	bbit1	t0, 28, save_nodfa
-	nop
-
-	/* LLM state */
-	SAVE_COP2_REGISTER(COP2_LLM_DAT0)
-	SAVE_COP2_REGISTER(COP2_LLM_DAT1)
-
-save_nodfa:
-	/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO]  */
-	bbit1	t0, 26, save_done
-	nop
-
-	SAVE_COP2_REGISTER(COP2_3DES_IV)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY0)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY1)
-	SAVE_COP2_REGISTER(COP2_3DES_KEY2)
-	SAVE_COP2_REGISTER(COP2_3DES_RESULT)
-
-	SAVE_COP2_REGISTER(COP2_AES_INP0)
-	SAVE_COP2_REGISTER(COP2_AES_IV0)
-	SAVE_COP2_REGISTER(COP2_AES_IV1)
-	SAVE_COP2_REGISTER(COP2_AES_KEY0)
-	SAVE_COP2_REGISTER(COP2_AES_KEY1)
-	SAVE_COP2_REGISTER(COP2_AES_KEY2)
-	SAVE_COP2_REGISTER(COP2_AES_KEY3)
-	SAVE_COP2_REGISTER(COP2_AES_KEYLEN)
-	SAVE_COP2_REGISTER(COP2_AES_RESULT0)
-	SAVE_COP2_REGISTER(COP2_AES_RESULT1)
-
-	dmfc0	t0, $15
-	li	t1, 0x000d0000 /* Octeon Pass1 */
-	beq	t0, t1, save_pass1
-	nop
-
-	SAVE_COP2_REGISTER(COP2_HSH_DATW0)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW2)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW3)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW4)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW5)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW6)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW7)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW8)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW9)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW10)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW11)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW12)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW13)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW14)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW0)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW2)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW3)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW4)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW5)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW6)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW7)
-	SAVE_COP2_REGISTER(COP2_GFM_MULT0)
-	SAVE_COP2_REGISTER(COP2_GFM_MULT1)
-	SAVE_COP2_REGISTER(COP2_GFM_POLY)
-	SAVE_COP2_REGISTER(COP2_GFM_RESULT0)
-	SAVE_COP2_REGISTER(COP2_GFM_RESULT1)
-	/* restore saved COP2 status */
-	mtc0	t2, MIPS_COP_0_STATUS
-	jr ra
-	nop
-
-save_pass1:
-	SAVE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
-	SAVE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
-
-save_done:	
-	/* restore saved COP2 status */
-	mtc0	t2, MIPS_COP_0_STATUS
-	jr ra
-	nop
-END(octeon_cop2_save)
-
-LEAF(octeon_cop2_restore)
-	/* save original cop2 status in t2*/
-	mfc0	t2, MIPS_COP_0_STATUS
-	or	t0, t2, MIPS_SR_COP_2_BIT
-	and	t0, t0, ~MIPS_SR_INT_IE
-	mtc0	t0, MIPS_COP_0_STATUS
-	/* Get CvmCtl register */
-	dmfc0	t0, $9, 7
-
-	/* CRC state */
-	RESTORE_COP2_REGISTER(COP2_CRC_IV)
-	RESTORE_COP2_REGISTER(COP2_CRC_LENGTH)
-	RESTORE_COP2_REGISTER(COP2_CRC_POLY)
-
-	/* if CvmCtl[NODFA_CP2] -> save_nodfa */
-	bbit1	t0, 28, restore_nodfa
-	nop
-
-	/* LLM state */
-	RESTORE_COP2_REGISTER(COP2_LLM_DAT0)
-	RESTORE_COP2_REGISTER(COP2_LLM_DAT1)
-
-restore_nodfa:
-	/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO]  */
-	bbit1	t0, 26, restore_done
-	nop
-
-	RESTORE_COP2_REGISTER(COP2_3DES_IV)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY0)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY1)
-	RESTORE_COP2_REGISTER(COP2_3DES_KEY2)
-	RESTORE_COP2_REGISTER(COP2_3DES_RESULT)
-
-	RESTORE_COP2_REGISTER(COP2_AES_INP0)
-	RESTORE_COP2_REGISTER(COP2_AES_IV0)
-	RESTORE_COP2_REGISTER(COP2_AES_IV1)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY0)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY1)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY2)
-	RESTORE_COP2_REGISTER(COP2_AES_KEY3)
-	RESTORE_COP2_REGISTER(COP2_AES_KEYLEN)
-	RESTORE_COP2_REGISTER(COP2_AES_RESULT0)
-	RESTORE_COP2_REGISTER(COP2_AES_RESULT1)
-
-	dmfc0	t0, $15
-	li	t1, 0x000d0000 /* Octeon Pass1 */
-	beq	t0, t1, restore_pass1
-	nop
-
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW0)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW2)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW3)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW4)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW5)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW6)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW7)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW8)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW9)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW10)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW11)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW12)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW13)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW14)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW0)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW2)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW3)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW4)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW5)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW6)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW7)
-	RESTORE_COP2_REGISTER(COP2_GFM_MULT0)
-	RESTORE_COP2_REGISTER(COP2_GFM_MULT1)
-	RESTORE_COP2_REGISTER(COP2_GFM_POLY)
-	RESTORE_COP2_REGISTER(COP2_GFM_RESULT0)
-	RESTORE_COP2_REGISTER(COP2_GFM_RESULT1)
-	/* restore saved COP2 status */
-	mtc0	t2, MIPS_COP_0_STATUS
-	jr ra
-	nop
-
-restore_pass1:
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
-	RESTORE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
-
-restore_done:	
-	/* restore saved COP2 status */
-	mtc0	t2, MIPS_COP_0_STATUS
-	jr ra
-	nop
-END(octeon_cop2_restore)
diff --git a/sys/mips/mips/ofw_machdep.c b/sys/mips/mips/ofw_machdep.c
deleted file mode 100644
index 6b840e73911e..000000000000
--- a/sys/mips/mips/ofw_machdep.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*-
- * Copyright (c) 2015 Ian Lepore <ian@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-#include <machine/fdt.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_subr.h>
-
-int
-OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
-    bus_space_handle_t *handle, bus_size_t *sz)
-{
-	bus_addr_t addr;
-	bus_size_t size;
-	pcell_t pci_hi;
-	int flags, res;
-
-	res = ofw_reg_to_paddr(dev, regno, &addr, &size, &pci_hi);
-	if (res < 0)
-		return (res);
-
-	/*
-	 * Nothing special to do for PCI busses right now.
-	 * This may need to be handled per-platform when it does come up.
-	 */
-#ifdef notyet
-	if (pci_hi == OFW_PADDR_NOT_PCI) {
-		*tag = fdtbus_bs_tag;
-		flags = 0;
-	} else {
-		*tag = fdtbus_bs_tag;
-		flags = (pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) ? 
-		    BUS_SPACE_MAP_PREFETCHABLE: 0;
-	}
-#else
-	*tag = fdtbus_bs_tag;
-	flags = 0;
-#endif
-
-	if (sz != NULL)
-		*sz = size;
-
-	return (bus_space_map(*tag, addr, size, flags, handle));
-}
diff --git a/sys/mips/mips/pm_machdep.c b/sys/mips/mips/pm_machdep.c
deleted file mode 100644
index 7a9db29b6ff6..000000000000
--- a/sys/mips/mips/pm_machdep.c
+++ /dev/null
@@ -1,517 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1992 Terrence R. Lambert.
- * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
- *	from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien
- *	JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysent.h>
-#include <sys/proc.h>
-#include <sys/reg.h>
-#include <sys/signalvar.h>
-#include <sys/exec.h>
-#include <sys/ktr.h>
-#include <sys/imgact.h>
-#include <sys/ucontext.h>
-#include <sys/lock.h>
-#include <sys/syscallsubr.h>
-#include <sys/sysproto.h>
-#include <sys/ptrace.h>
-#include <sys/syslog.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-#include <sys/user.h>
-#include <sys/uio.h>
-#include <machine/abi.h>
-#include <machine/cpuinfo.h>
-#include <machine/md_var.h>
-#include <machine/sigframe.h>
-#include <machine/tls.h>
-#include <machine/vmparam.h>
-#include <sys/vnode.h>
-#include <fs/pseudofs/pseudofs.h>
-#include <fs/procfs/procfs.h>
-
-#define	UCONTEXT_MAGIC	0xACEDBADE
-
-/*
- * Send an interrupt to process.
- *
- * Stack is set up to allow sigcode stored
- * at top to call routine, followed by kcall
- * to sigreturn routine below.	After sigreturn
- * resets the signal mask, the stack, and the
- * frame pointer, it returns to the user
- * specified pc, psl.
- */
-void
-sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
-{
-	struct proc *p;
-	struct thread *td;
-	struct trapframe *regs;
-	struct sigacts *psp;
-	struct sigframe sf, *sfp;
-	int sig;
-	int oonstack;
-
-	td = curthread;
-	p = td->td_proc;
-	PROC_LOCK_ASSERT(p, MA_OWNED);
-	sig = ksi->ksi_signo;
-	psp = p->p_sigacts;
-	mtx_assert(&psp->ps_mtx, MA_OWNED);
-
-	regs = td->td_frame;
-	oonstack = sigonstack(regs->sp);
-
-	/* save user context */
-	bzero(&sf, sizeof(struct sigframe));
-	sf.sf_uc.uc_sigmask = *mask;
-	sf.sf_uc.uc_stack = td->td_sigstk;
-	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
-	sf.sf_uc.uc_mcontext.mc_pc = regs->pc;
-	sf.sf_uc.uc_mcontext.mullo = regs->mullo;
-	sf.sf_uc.uc_mcontext.mulhi = regs->mulhi;
-	sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls;
-	sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC;  /* magic number */
-	bcopy((void *)&regs->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1],
-	    sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t));
-	sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
-	if (sf.sf_uc.uc_mcontext.mc_fpused) {
-		/* if FPU has current state, save it first */
-		if (td == PCPU_GET(fpcurthread))
-			MipsSaveCurFPState(td);
-		bcopy((void *)&td->td_frame->f0,
-		    (void *)sf.sf_uc.uc_mcontext.mc_fpregs,
-		    sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
-	}
-
-	/* Allocate and validate space for the signal handler context. */
-	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
-	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
-		sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp +
-		    td->td_sigstk.ss_size - sizeof(struct sigframe))
-		    & ~(STACK_ALIGN - 1));
-	} else
-		sfp = (struct sigframe *)((vm_offset_t)(regs->sp - 
-		    sizeof(struct sigframe)) & ~(STACK_ALIGN - 1));
-
-	/* Build the argument list for the signal handler. */
-	regs->a0 = sig;
-	regs->a2 = (register_t)(intptr_t)&sfp->sf_uc;
-	if (SIGISMEMBER(psp->ps_siginfo, sig)) {
-		/* Signal handler installed with SA_SIGINFO. */
-		regs->a1 = (register_t)(intptr_t)&sfp->sf_si;
-		/* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
-
-		/* fill siginfo structure */
-		sf.sf_si = ksi->ksi_info;
-		sf.sf_si.si_signo = sig;
-	} else {
-		/* Old FreeBSD-style arguments. */
-		regs->a1 = ksi->ksi_code;
-		regs->a3 = (uintptr_t)ksi->ksi_addr;
-		/* sf.sf_ahu.sf_handler = catcher; */
-	}
-
-	mtx_unlock(&psp->ps_mtx);
-	PROC_UNLOCK(p);
-
-	/*
-	 * Copy the sigframe out to the user's stack.
-	 */
-	if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
-		/*
-		 * Something is wrong with the stack pointer.
-		 * ...Kill the process.
-		 */
-		PROC_LOCK(p);
-		sigexit(td, SIGILL);
-	}
-
-	regs->pc = (register_t)(intptr_t)catcher;
-	regs->t9 = (register_t)(intptr_t)catcher;
-	regs->sp = (register_t)(intptr_t)sfp;
-	/*
-	 * Signal trampoline code is at base of user stack.
-	 */
-	regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode);
-	PROC_LOCK(p);
-	mtx_lock(&psp->ps_mtx);
-}
-
-/*
- * System call to cleanup state after a signal
- * has been taken.  Reset signal mask and
- * stack state from context left by sendsig (above).
- * Return to previous pc as specified by
- * context left by sendsig.
- */
-int
-sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
-{
-	ucontext_t uc;
-	int error;
-
-	error = copyin(uap->sigcntxp, &uc, sizeof(uc));
-	if (error != 0)
-	    return (error);
-
-	error = set_mcontext(td, &uc.uc_mcontext);
-	if (error != 0)
-		return (error);
-
-	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
-
-	return (EJUSTRETURN);
-}
-
-int
-ptrace_set_pc(struct thread *td, unsigned long addr)
-{
-	td->td_frame->pc = (register_t) addr;
-	return 0;
-}
-
-static int
-ptrace_read_int(struct thread *td, uintptr_t addr, int *v)
-{
-
-	if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
-		return (EFAULT);
-	return (0);
-}
-
-static int
-ptrace_write_int(struct thread *td, uintptr_t addr, int v)
-{
-
-	if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
-		return (EFAULT);
-	return (0);
-}
-
-int
-ptrace_single_step(struct thread *td)
-{
-	uintptr_t va;
-	struct trapframe *locr0 = td->td_frame;
-	int error;
-	int bpinstr = MIPS_BREAK_SSTEP;
-	int curinstr;
-	struct proc *p;
-
-	p = td->td_proc;
-	PROC_UNLOCK(p);
-	/*
-	 * Fetch what's at the current location.
-	 */
-	error = ptrace_read_int(td, locr0->pc, &curinstr);
-	if (error)
-		goto out;
-
-	CTR3(KTR_PTRACE,
-	    "ptrace_single_step: tid %d, current instr at %#lx: %#08x",
-	    td->td_tid, locr0->pc, curinstr);
-
-	/* compute next address after current location */
-	if (locr0->cause & MIPS_CR_BR_DELAY) {
-		va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr,
-		    (uintptr_t)&curinstr);
-	} else {
-		va = locr0->pc + 4;
-	}
-	if (td->td_md.md_ss_addr) {
-		printf("SS %s (%d): breakpoint already set at %p (va %p)\n",
-		    p->p_comm, p->p_pid, (void *)td->td_md.md_ss_addr,
-		    (void *)va); /* XXX */
-		error = EFAULT;
-		goto out;
-	}
-	td->td_md.md_ss_addr = va;
-	/*
-	 * Fetch what's at the current location.
-	 */
-	error = ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr);
-	if (error)
-		goto out;
-
-	/*
-	 * Store breakpoint instruction at the "next" location now.
-	 */
-	error = ptrace_write_int(td, va, bpinstr);
-
-	/*
-	 * The sync'ing of I & D caches is done by proc_rwmem()
-	 * through proc_writemem().
-	 */
-
-out:
-	PROC_LOCK(p);
-	if (error == 0)
-		CTR3(KTR_PTRACE,
-		    "ptrace_single_step: tid %d, break set at %#lx: (%#08x)",
-		    td->td_tid, va, td->td_md.md_ss_instr); 
-	return (error);
-}
-
-void
-makectx(struct trapframe *tf, struct pcb *pcb)
-{
-
-	pcb->pcb_context[PCB_REG_RA] = tf->ra;
-	pcb->pcb_context[PCB_REG_PC] = tf->pc;
-	pcb->pcb_context[PCB_REG_SP] = tf->sp;
-}
-
-int
-fill_regs(struct thread *td, struct reg *regs)
-{
-	memcpy(regs, td->td_frame, sizeof(struct reg));
-	return (0);
-}
-
-int
-set_regs(struct thread *td, struct reg *regs)
-{
-	struct trapframe *f;
-	register_t sr;
-
-	f = (struct trapframe *) td->td_frame;
-	/*
-	 * Don't allow the user to change SR
-	 */
-	sr = f->sr;
-	memcpy(td->td_frame, regs, sizeof(struct reg));
-	f->sr = sr;
-	return (0);
-}
-
-int
-get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
-{
-	struct trapframe *tp;
-
-	tp = td->td_frame;
-	PROC_LOCK(curthread->td_proc);
-	mcp->mc_onstack = sigonstack(tp->sp);
-	PROC_UNLOCK(curthread->td_proc);
-	bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs,
-	    sizeof(mcp->mc_regs));
-
-	mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
-	if (mcp->mc_fpused) {
-		bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs,
-		    sizeof(mcp->mc_fpregs));
-	}
-	if (flags & GET_MC_CLEAR_RET) {
-		mcp->mc_regs[V0] = 0;
-		mcp->mc_regs[V1] = 0;
-		mcp->mc_regs[A3] = 0;
-	}
-
-	mcp->mc_pc = td->td_frame->pc;
-	mcp->mullo = td->td_frame->mullo;
-	mcp->mulhi = td->td_frame->mulhi;
-	mcp->mc_tls = td->td_md.md_tls;
-	return (0);
-}
-
-int
-set_mcontext(struct thread *td, mcontext_t *mcp)
-{
-	struct trapframe *tp;
-
-	tp = td->td_frame;
-	bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero,
-	    sizeof(mcp->mc_regs));
-
-	td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED;
-	if (mcp->mc_fpused) {
-		bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0,
-		    sizeof(mcp->mc_fpregs));
-	}
-	td->td_frame->pc = mcp->mc_pc;
-	td->td_frame->mullo = mcp->mullo;
-	td->td_frame->mulhi = mcp->mulhi;
-	td->td_md.md_tls = mcp->mc_tls;
-	/* Dont let user to set any bits in status and cause registers. */
-
-	return (0);
-}
-
-int
-fill_fpregs(struct thread *td, struct fpreg *fpregs)
-{
-	if (td == PCPU_GET(fpcurthread))
-		MipsSaveCurFPState(td);
-	memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg));
-	fpregs->r_regs[FIR_NUM] = cpuinfo.fpu_id;
-	return 0;
-}
-
-int
-set_fpregs(struct thread *td, struct fpreg *fpregs)
-{
-	if (PCPU_GET(fpcurthread) == td)
-		PCPU_SET(fpcurthread, (struct thread *)0);
-	memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg));
-	return 0;
-}
-
-/*
- * Clear registers on exec
- * $sp is set to the stack pointer passed in.  $pc is set to the entry
- * point given by the exec_package passed in, as is $t9 (used for PIC
- * code by the MIPS elf abi).
- */
-void
-exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
-{
-
-	bzero((caddr_t)td->td_frame, sizeof(struct trapframe));
-
-	td->td_frame->sp = ((register_t)stack) & ~(STACK_ALIGN - 1);
-
-	/*
-	 * If we're running o32 or n32 programs but have 64-bit registers,
-	 * GCC may use stack-relative addressing near the top of user
-	 * address space that, due to sign extension, will yield an
-	 * invalid address.  For instance, if sp is 0x7fffff00 then GCC
-	 * might do something like this to load a word from 0x7ffffff0:
-	 *
-	 * 	addu	sp, sp, 32768
-	 * 	lw	t0, -32528(sp)
-	 *
-	 * On systems with 64-bit registers, sp is sign-extended to
-	 * 0xffffffff80007f00 and the load is instead done from
-	 * 0xffffffff7ffffff0.
-	 *
-	 * To prevent this, we subtract 64K from the stack pointer here
-	 * for processes with 32-bit pointers.
-	 */
-#if defined(__mips_n32) || defined(__mips_n64)
-	if (!SV_PROC_FLAG(td->td_proc, SV_LP64))
-		td->td_frame->sp -= 65536;
-#endif
-
-	td->td_frame->pc = imgp->entry_addr & ~3;
-	td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */
-	td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
-	    (mips_rd_status() & MIPS_SR_INT_MASK);
-#if defined(__mips_n32) || defined(__mips_n64)
-	td->td_frame->sr |= MIPS_SR_PX;
-#endif
-#if defined(__mips_n64)
-	if (SV_PROC_FLAG(td->td_proc, SV_LP64))
-		td->td_frame->sr |= MIPS_SR_UX;
-	td->td_frame->sr |= MIPS_SR_KX;
-#endif
-	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Setup any other CPU-Specific registers (Not MIPS Standard)
-	 * and/or bits in other standard MIPS registers (if CPU-Specific)
-	 *  that are needed.
-	 */
-
-	/*
-	 * Set up arguments for the rtld-capable crt0:
-	 *	a0	stack pointer
-	 *	a1	rtld cleanup (filled in by dynamic loader)
-	 *	a2	rtld object (filled in by dynamic loader)
-	 *	a3	ps_strings
-	 */
-	td->td_frame->a0 = (register_t) stack;
-	td->td_frame->a1 = 0;
-	td->td_frame->a2 = 0;
-	td->td_frame->a3 = (register_t)imgp->ps_strings;
-
-	td->td_md.md_flags &= ~MDTD_FPUSED;
-	if (PCPU_GET(fpcurthread) == td)
-	    PCPU_SET(fpcurthread, (struct thread *)0);
-	td->td_md.md_ss_addr = 0;
-
-	td->td_md.md_tls = NULL;
-#ifdef COMPAT_FREEBSD32
-	if (!SV_PROC_FLAG(td->td_proc, SV_LP64))
-		td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET +
-		    TLS_TCB_SIZE32;
-	else
-#endif
-		td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET +
-		    TLS_TCB_SIZE;
-}
-
-int
-ptrace_clear_single_step(struct thread *td)
-{
-	struct proc *p;
-	int error;
-
-	p = td->td_proc;
-	PROC_LOCK_ASSERT(p, MA_OWNED);
-	if (!td->td_md.md_ss_addr)
-		return EINVAL;
-
-	/*
-	 * Restore original instruction and clear BP
-	 */
-	PROC_UNLOCK(p);
-	CTR3(KTR_PTRACE,
-	    "ptrace_clear_single_step: tid %d, restore instr at %#lx: %#08x",
-	    td->td_tid, td->td_md.md_ss_addr, td->td_md.md_ss_instr);
-	error = ptrace_write_int(td, td->td_md.md_ss_addr,
-	    td->td_md.md_ss_instr);
-	PROC_LOCK(p);
-
-	/* The sync'ing of I & D caches is done by proc_rwmem(). */
-
-	if (error != 0) {
-		log(LOG_ERR,
-		    "SS %s %d: can't restore instruction at %p: %x\n",
-		    p->p_comm, p->p_pid, (void *)td->td_md.md_ss_addr,
-		    td->td_md.md_ss_instr);
-	}
-	td->td_md.md_ss_addr = 0;
-	return 0;
-}
diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c
deleted file mode 100644
index a41614c5457b..000000000000
--- a/sys/mips/mips/pmap.c
+++ /dev/null
@@ -1,3765 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- * Copyright (c) 1994 John S. Dyson
- * All rights reserved.
- * Copyright (c) 1994 David Greenman
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and William Jolitz of UUNET Technologies Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from:	@(#)pmap.c	7.7 (Berkeley)	5/12/91
- *	from: src/sys/i386/i386/pmap.c,v 1.250.2.8 2000/11/21 00:09:14 ps
- *	JNPR: pmap.c,v 1.11.2.1 2007/08/16 11:51:06 girish
- */
-
-/*
- *	Manages physical address maps.
- *
- *	Since the information managed by this module is
- *	also stored by the logical address mapping module,
- *	this module may throw away valid virtual-to-physical
- *	mappings at almost any time.  However, invalidations
- *	of virtual-to-physical mappings must be done as
- *	requested.
- *
- *	In order to cope with hardware architectures which
- *	make virtual-to-physical map invalidates expensive,
- *	this module may delay invalidate or reduced protection
- *	operations until such time as they are actually
- *	necessary.  This module is given full information as
- *	to which processors are currently using which maps,
- *	and to when physical maps must be made correct.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_pmap.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mman.h>
-#include <sys/msgbuf.h>
-#include <sys/mutex.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/rwlock.h>
-#include <sys/sched.h>
-#include <sys/smp.h>
-#include <sys/sysctl.h>
-#include <sys/vmmeter.h>
-
-#ifdef DDB
-#include <ddb/ddb.h>
-#endif
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_pageout.h>
-#include <vm/vm_pager.h>
-#include <vm/vm_dumpset.h>
-#include <vm/uma.h>
-
-#include <machine/cache.h>
-#include <machine/md_var.h>
-#include <machine/tlb.h>
-
-#undef PMAP_DEBUG
-
-#if !defined(DIAGNOSTIC)
-#define	PMAP_INLINE __inline
-#else
-#define	PMAP_INLINE
-#endif
-
-#ifdef PV_STATS
-#define PV_STAT(x)	do { x ; } while (0)
-#else
-#define PV_STAT(x)	do { } while (0)
-#endif
-
-/*
- * Get PDEs and PTEs for user/kernel address space
- */
-#define	pmap_seg_index(v)	(((v) >> SEGSHIFT) & (NPDEPG - 1))
-#define	pmap_pde_index(v)	(((v) >> PDRSHIFT) & (NPDEPG - 1))
-#define	pmap_pte_index(v)	(((v) >> PAGE_SHIFT) & (NPTEPG - 1))
-#define	pmap_pde_pindex(v)	((v) >> PDRSHIFT)
-
-#ifdef __mips_n64
-#define	NUPDE			(NPDEPG * NPDEPG)
-#define	NUSERPGTBLS		(NUPDE + NPDEPG)
-#else
-#define	NUPDE			(NPDEPG)
-#define	NUSERPGTBLS		(NUPDE)
-#endif
-
-#define	is_kernel_pmap(x)	((x) == kernel_pmap)
-
-struct pmap kernel_pmap_store;
-pd_entry_t *kernel_segmap;
-
-vm_offset_t virtual_avail;	/* VA of first avail page (after kernel bss) */
-vm_offset_t virtual_end;	/* VA of last avail page (end of kernel AS) */
-
-static int need_local_mappings;
-
-static int nkpt;
-unsigned pmap_max_asid;		/* max ASID supported by the system */
-
-#define	PMAP_ASID_RESERVED	0
-
-vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
-
-static void pmap_asid_alloc(pmap_t pmap);
-
-static struct rwlock_padalign pvh_global_lock;
-
-/*
- * Data for the pv entry allocation mechanism
- */
-static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
-static int pv_entry_count;
-
-static void free_pv_chunk(struct pv_chunk *pc);
-static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
-static pv_entry_t get_pv_entry(pmap_t pmap, boolean_t try);
-static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap);
-static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
-static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
-    vm_offset_t va);
-static vm_page_t pmap_alloc_direct_page(unsigned int index, int req);
-static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
-    vm_page_t m, vm_prot_t prot, vm_page_t mpte);
-static void pmap_grow_direct_page(int req);
-static int pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
-    pd_entry_t pde);
-static void pmap_remove_page(struct pmap *pmap, vm_offset_t va);
-static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, vm_offset_t va);
-static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte,
-    vm_offset_t va, vm_page_t m);
-static void pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte);
-static void pmap_invalidate_all(pmap_t pmap);
-static void pmap_invalidate_page(pmap_t pmap, vm_offset_t va);
-static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m);
-
-static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags);
-static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, u_int flags);
-static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t);
-static pt_entry_t init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot);
-
-static void pmap_invalidate_page_action(void *arg);
-static void pmap_invalidate_range_action(void *arg);
-static void pmap_update_page_action(void *arg);
-
-#ifndef __mips_n64
-
-static vm_offset_t crashdumpva;
-
-/*
- * These functions are for high memory (memory above 512Meg in 32 bit) support.
- * The highmem area does not have a KSEG0 mapping, and we need a mechanism to
- * do temporary per-CPU mappings for pmap_zero_page, pmap_copy_page etc.
- *
- * At bootup, we reserve 2 virtual pages per CPU for mapping highmem pages. To
- * access a highmem physical address on a CPU, we map the physical address to
- * the reserved virtual address for the CPU in the kernel pagetable.
- */
-
-static void
-pmap_init_reserved_pages(void)
-{
-	struct pcpu *pc;
-	vm_offset_t pages;
- 	int i;
-
-	if (need_local_mappings == 0)
-		return;
-
-	CPU_FOREACH(i) {
-		pc = pcpu_find(i);
-		/*
-		 * Skip if the mapping has already been initialized,
-		 * i.e. this is the BSP.
-		 */
-		if (pc->pc_cmap1_addr != 0)
-			continue;
-		pages =  kva_alloc(PAGE_SIZE * 3);
-		if (pages == 0)
-			panic("%s: unable to allocate KVA", __func__);
-		pc->pc_cmap1_ptep = pmap_pte(kernel_pmap, pages);
-		pc->pc_cmap2_ptep = pmap_pte(kernel_pmap, pages + PAGE_SIZE);
-		pc->pc_qmap_ptep =
-		    pmap_pte(kernel_pmap, pages + (PAGE_SIZE * 2));
-		pc->pc_cmap1_addr = pages;
-		pc->pc_cmap2_addr = pages + PAGE_SIZE;
-		pc->pc_qmap_addr = pages + (PAGE_SIZE * 2);
- 	}
-}
-SYSINIT(rpages_init, SI_SUB_CPU, SI_ORDER_ANY, pmap_init_reserved_pages, NULL);
-
-static __inline void
-pmap_alloc_lmem_map(void)
-{
-	PCPU_SET(cmap1_addr, virtual_avail);
-	PCPU_SET(cmap2_addr, virtual_avail + PAGE_SIZE);
-	PCPU_SET(cmap1_ptep, pmap_pte(kernel_pmap, virtual_avail));
-	PCPU_SET(cmap2_ptep, pmap_pte(kernel_pmap, virtual_avail + PAGE_SIZE));
-	PCPU_SET(qmap_addr, virtual_avail + (2 * PAGE_SIZE));
-	PCPU_SET(qmap_ptep, pmap_pte(kernel_pmap, virtual_avail + (2 * PAGE_SIZE)));
-	crashdumpva = virtual_avail + (3 * PAGE_SIZE);
-	virtual_avail += PAGE_SIZE * 4;
-}
-
-static __inline vm_offset_t
-pmap_lmem_map1(vm_paddr_t phys)
-{
-	critical_enter();
-	*PCPU_GET(cmap1_ptep) =
-	    TLBLO_PA_TO_PFN(phys) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
-	return (PCPU_GET(cmap1_addr));
-}
-
-static __inline vm_offset_t
-pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2)
-{
-	critical_enter();
-	*PCPU_GET(cmap1_ptep) =
-	    TLBLO_PA_TO_PFN(phys1) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
-	*PCPU_GET(cmap2_ptep) =
-	    TLBLO_PA_TO_PFN(phys2) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
-	return (PCPU_GET(cmap1_addr));
-}
-
-static __inline void
-pmap_lmem_unmap(void)
-{
-	 *PCPU_GET(cmap1_ptep) = PTE_G;
-	tlb_invalidate_address(kernel_pmap, PCPU_GET(cmap1_addr));
-	if (*PCPU_GET(cmap2_ptep) != PTE_G) {
-		*PCPU_GET(cmap2_ptep) = PTE_G;
-		tlb_invalidate_address(kernel_pmap, PCPU_GET(cmap2_addr));
- 	}
-	critical_exit();
-}
-
-#else  /* __mips_n64 */
-
-static __inline void
-pmap_alloc_lmem_map(void)
-{
-}
-
-static __inline vm_offset_t
-pmap_lmem_map1(vm_paddr_t phys)
-{
-
-	return (0);
-}
-
-static __inline vm_offset_t
-pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2)
-{
-
-	return (0);
-}
-
-static __inline vm_offset_t
-pmap_lmem_unmap(void)
-{
-
-	return (0);
-}
-#endif /* !__mips_n64 */
-
-static __inline int
-pmap_pte_cache_bits(vm_paddr_t pa, vm_page_t m)
-{
-	vm_memattr_t ma;
-
-	ma = pmap_page_get_memattr(m);
-	if (ma == VM_MEMATTR_WRITE_BACK && !is_cacheable_mem(pa))
-		ma = VM_MEMATTR_UNCACHEABLE;
-	return PTE_C(ma);
-}
-#define PMAP_PTE_SET_CACHE_BITS(pte, pa, m) {	\
-	pte &= ~PTE_C_MASK;			\
-	pte |= pmap_pte_cache_bits(pa, m);	\
-}
-
-/*
- * Page table entry lookup routines.
- */
-static __inline pd_entry_t *
-pmap_segmap(pmap_t pmap, vm_offset_t va)
-{
-
-	return (&pmap->pm_segtab[pmap_seg_index(va)]);
-}
-
-#ifdef __mips_n64
-static __inline pd_entry_t *
-pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va)
-{
-	pd_entry_t *pde;
-
-	pde = (pd_entry_t *)*pdpe;
-	return (&pde[pmap_pde_index(va)]);
-}
-
-static __inline pd_entry_t *
-pmap_pde(pmap_t pmap, vm_offset_t va)
-{
-	pd_entry_t *pdpe;
-
-	pdpe = pmap_segmap(pmap, va);
-	if (*pdpe == NULL)
-		return (NULL);
-
-	return (pmap_pdpe_to_pde(pdpe, va));
-}
-#else
-static __inline pd_entry_t *
-pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va)
-{
-
-	return (pdpe);
-}
-
-static __inline
-pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va)
-{
-
-	return (pmap_segmap(pmap, va));
-}
-#endif
-
-static __inline pt_entry_t *
-pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
-{
-	pt_entry_t *pte;
-
-	pte = (pt_entry_t *)*pde;
-	return (&pte[pmap_pte_index(va)]);
-}
-
-pt_entry_t *
-pmap_pte(pmap_t pmap, vm_offset_t va)
-{
-	pd_entry_t *pde;
-
-	pde = pmap_pde(pmap, va);
-	if (pde == NULL || *pde == NULL)
-		return (NULL);
-
-	return (pmap_pde_to_pte(pde, va));
-}
-
-vm_offset_t
-pmap_steal_memory(vm_size_t size)
-{
-	vm_paddr_t bank_size, pa;
-	vm_offset_t va;
-
-	size = round_page(size);
-	bank_size = phys_avail[1] - phys_avail[0];
-	while (size > bank_size) {
-		int i;
-
-		for (i = 0; phys_avail[i + 2]; i += 2) {
-			phys_avail[i] = phys_avail[i + 2];
-			phys_avail[i + 1] = phys_avail[i + 3];
-		}
-		phys_avail[i] = 0;
-		phys_avail[i + 1] = 0;
-		if (!phys_avail[0])
-			panic("pmap_steal_memory: out of memory");
-		bank_size = phys_avail[1] - phys_avail[0];
-	}
-
-	pa = phys_avail[0];
-	phys_avail[0] += size;
-	if (MIPS_DIRECT_MAPPABLE(pa) == 0)
-		panic("Out of memory below 512Meg?");
-	va = MIPS_PHYS_TO_DIRECT(pa);
-	bzero((caddr_t)va, size);
-	return (va);
-}
-
-/*
- * Bootstrap the system enough to run with virtual memory.  This
- * assumes that the phys_avail array has been initialized.
- */
-static void
-pmap_create_kernel_pagetable(void)
-{
-	int i, j;
-	vm_offset_t ptaddr;
-	pt_entry_t *pte;
-#ifdef __mips_n64
-	pd_entry_t *pde;
-	vm_offset_t pdaddr;
-	int npt, npde;
-#endif
-
-	/*
-	 * Allocate segment table for the kernel
-	 */
-	kernel_segmap = (pd_entry_t *)pmap_steal_memory(PAGE_SIZE);
-
-	/*
-	 * Allocate second level page tables for the kernel
-	 */
-#ifdef __mips_n64
-	npde = howmany(NKPT, NPDEPG);
-	pdaddr = pmap_steal_memory(PAGE_SIZE * npde);
-#endif
-	nkpt = NKPT;
-	ptaddr = pmap_steal_memory(PAGE_SIZE * nkpt);
-
-	/*
-	 * The R[4-7]?00 stores only one copy of the Global bit in the
-	 * translation lookaside buffer for each 2 page entry. Thus invalid
-	 * entrys must have the Global bit set so when Entry LO and Entry HI
-	 * G bits are anded together they will produce a global bit to store
-	 * in the tlb.
-	 */
-	for (i = 0, pte = (pt_entry_t *)ptaddr; i < (nkpt * NPTEPG); i++, pte++)
-		*pte = PTE_G;
-
-#ifdef __mips_n64
-	for (i = 0,  npt = nkpt; npt > 0; i++) {
-		kernel_segmap[i] = (pd_entry_t)(pdaddr + i * PAGE_SIZE);
-		pde = (pd_entry_t *)kernel_segmap[i];
-
-		for (j = 0; j < NPDEPG && npt > 0; j++, npt--)
-			pde[j] = (pd_entry_t)(ptaddr + (i * NPDEPG + j) * PAGE_SIZE);
-	}
-#else
-	for (i = 0, j = pmap_seg_index(VM_MIN_KERNEL_ADDRESS); i < nkpt; i++, j++)
-		kernel_segmap[j] = (pd_entry_t)(ptaddr + (i * PAGE_SIZE));
-#endif
-
-	PMAP_LOCK_INIT(kernel_pmap);
-	kernel_pmap->pm_segtab = kernel_segmap;
-	CPU_FILL(&kernel_pmap->pm_active);
-	TAILQ_INIT(&kernel_pmap->pm_pvchunk);
-	kernel_pmap->pm_asid[0].asid = PMAP_ASID_RESERVED;
-	kernel_pmap->pm_asid[0].gen = 0;
-	kernel_vm_end += nkpt * NPTEPG * PAGE_SIZE;
-}
-
-void
-pmap_bootstrap(void)
-{
-	int i;
-
-	/* Sort. */
-again:
-	for (i = 0; phys_avail[i + 1] != 0; i += 2) {
-		/*
-		 * Keep the memory aligned on page boundary.
-		 */
-		phys_avail[i] = round_page(phys_avail[i]);
-		phys_avail[i + 1] = trunc_page(phys_avail[i + 1]);
-
-		if (i < 2)
-			continue;
-		if (phys_avail[i - 2] > phys_avail[i]) {
-			vm_paddr_t ptemp[2];
-
-			ptemp[0] = phys_avail[i + 0];
-			ptemp[1] = phys_avail[i + 1];
-
-			phys_avail[i + 0] = phys_avail[i - 2];
-			phys_avail[i + 1] = phys_avail[i - 1];
-
-			phys_avail[i - 2] = ptemp[0];
-			phys_avail[i - 1] = ptemp[1];
-			goto again;
-		}
-	}
-
-       	/*
-	 * In 32 bit, we may have memory which cannot be mapped directly.
-	 * This memory will need temporary mapping before it can be
-	 * accessed.
-	 */
-	if (!MIPS_DIRECT_MAPPABLE(phys_avail[i - 1] - 1))
-		need_local_mappings = 1;
-
-	/*
-	 * Copy the phys_avail[] array before we start stealing memory from it.
-	 */
-	for (i = 0; phys_avail[i + 1] != 0; i += 2) {
-		physmem_desc[i] = phys_avail[i];
-		physmem_desc[i + 1] = phys_avail[i + 1];
-	}
-
-	Maxmem = atop(phys_avail[i - 1]);
-
-	if (bootverbose) {
-		printf("Physical memory chunk(s):\n");
-		for (i = 0; phys_avail[i + 1] != 0; i += 2) {
-			vm_paddr_t size;
-
-			size = phys_avail[i + 1] - phys_avail[i];
-			printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n",
-			    (uintmax_t) phys_avail[i],
-			    (uintmax_t) phys_avail[i + 1] - 1,
-			    (uintmax_t) size, (uintmax_t) size / PAGE_SIZE);
-		}
-		printf("Maxmem is 0x%0jx\n", ptoa((uintmax_t)Maxmem));
-	}
-	/*
-	 * Steal the message buffer from the beginning of memory.
-	 */
-	msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize);
-	msgbufinit(msgbufp, msgbufsize);
-
-	/*
-	 * Steal thread0 kstack.
-	 */
-	kstack0 = pmap_steal_memory(KSTACK_PAGES << PAGE_SHIFT);
-
-	virtual_avail = VM_MIN_KERNEL_ADDRESS;
-	virtual_end = VM_MAX_KERNEL_ADDRESS;
-
-#ifdef SMP
-	/*
-	 * Steal some virtual address space to map the pcpu area.
-	 */
-	virtual_avail = roundup2(virtual_avail, PAGE_SIZE * 2);
-	pcpup = (struct pcpu *)virtual_avail;
-	virtual_avail += PAGE_SIZE * 2;
-
-	/*
-	 * Initialize the wired TLB entry mapping the pcpu region for
-	 * the BSP at 'pcpup'. Up until this point we were operating
-	 * with the 'pcpup' for the BSP pointing to a virtual address
-	 * in KSEG0 so there was no need for a TLB mapping.
-	 */
-	mips_pcpu_tlb_init(PCPU_ADDR(0));
-
-	if (bootverbose)
-		printf("pcpu is available at virtual address %p.\n", pcpup);
-#endif
-
-	pmap_create_kernel_pagetable();
-	if (need_local_mappings)
-		pmap_alloc_lmem_map();
-	pmap_max_asid = VMNUM_PIDS;
-	mips_wr_entryhi(0);
-	mips_wr_pagemask(0);
-
- 	/*
-	 * Initialize the global pv list lock.
-	 */
-	rw_init(&pvh_global_lock, "pmap pv global");
-}
-
-/*
- * Initialize a vm_page's machine-dependent fields.
- */
-void
-pmap_page_init(vm_page_t m)
-{
-
-	TAILQ_INIT(&m->md.pv_list);
-	m->md.pv_flags = VM_MEMATTR_DEFAULT << PV_MEMATTR_SHIFT;
-}
-
-/*
- *	Initialize the pmap module.
- *	Called by vm_init, to initialize any structures that the pmap
- *	system needs to map virtual memory.
- */
-void
-pmap_init(void)
-{
-}
-
-/***************************************************
- * Low level helper routines.....
- ***************************************************/
-
-#ifdef	SMP
-static __inline void
-pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg)
-{
-	int	cpuid, cpu, self;
-	cpuset_t active_cpus;
-
-	sched_pin();
-	if (is_kernel_pmap(pmap)) {
-		smp_rendezvous(NULL, fn, NULL, arg);
-		goto out;
-	}
-	/* Force ASID update on inactive CPUs */
-	CPU_FOREACH(cpu) {
-		if (!CPU_ISSET(cpu, &pmap->pm_active))
-			pmap->pm_asid[cpu].gen = 0;
-	}
-	cpuid = PCPU_GET(cpuid);
-	/*
-	 * XXX: barrier/locking for active?
-	 *
-	 * Take a snapshot of active here, any further changes are ignored.
-	 * tlb update/invalidate should be harmless on inactive CPUs
-	 */
-	active_cpus = pmap->pm_active;
-	self = CPU_ISSET(cpuid, &active_cpus);
-	CPU_CLR(cpuid, &active_cpus);
-	/* Optimize for the case where this cpu is the only active one */
-	if (CPU_EMPTY(&active_cpus)) {
-		if (self)
-			fn(arg);
-	} else {
-		if (self)
-			CPU_SET(cpuid, &active_cpus);
-		smp_rendezvous_cpus(active_cpus, NULL, fn, NULL, arg);
-	}
-out:
-	sched_unpin();
-}
-#else /* !SMP */
-static __inline void
-pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg)
-{
-	int	cpuid;
-
-	if (is_kernel_pmap(pmap)) {
-		fn(arg);
-		return;
-	}
-	cpuid = PCPU_GET(cpuid);
-	if (!CPU_ISSET(cpuid, &pmap->pm_active))
-		pmap->pm_asid[cpuid].gen = 0;
-	else
-		fn(arg);
-}
-#endif /* SMP */
-
-static void
-pmap_invalidate_all(pmap_t pmap)
-{
-
-	pmap_call_on_active_cpus(pmap,
-	    (void (*)(void *))tlb_invalidate_all_user, pmap);
-}
-
-struct pmap_invalidate_page_arg {
-	pmap_t pmap;
-	vm_offset_t va;
-};
-
-static void
-pmap_invalidate_page_action(void *arg)
-{
-	struct pmap_invalidate_page_arg *p = arg;
-
-	tlb_invalidate_address(p->pmap, p->va);
-}
-
-static void
-pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
-{
-	struct pmap_invalidate_page_arg arg;
-
-	arg.pmap = pmap;
-	arg.va = va;
-	pmap_call_on_active_cpus(pmap, pmap_invalidate_page_action, &arg);
-}
-
-struct pmap_invalidate_range_arg {
-	pmap_t pmap;
-	vm_offset_t sva;
-	vm_offset_t eva;
-};
-
-static void
-pmap_invalidate_range_action(void *arg)
-{
-	struct pmap_invalidate_range_arg *p = arg;
-
-	tlb_invalidate_range(p->pmap, p->sva, p->eva);
-}
-
-static void
-pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
-	struct pmap_invalidate_range_arg arg;
-
-	arg.pmap = pmap;
-	arg.sva = sva;
-	arg.eva = eva;
-	pmap_call_on_active_cpus(pmap, pmap_invalidate_range_action, &arg);
-}
-
-struct pmap_update_page_arg {
-	pmap_t pmap;
-	vm_offset_t va;
-	pt_entry_t pte;
-};
-
-static void
-pmap_update_page_action(void *arg)
-{
-	struct pmap_update_page_arg *p = arg;
-
-	tlb_update(p->pmap, p->va, p->pte);
-}
-
-static void
-pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte)
-{
-	struct pmap_update_page_arg arg;
-
-	arg.pmap = pmap;
-	arg.va = va;
-	arg.pte = pte;
-	pmap_call_on_active_cpus(pmap, pmap_update_page_action, &arg);
-}
-
-/*
- *	Routine:	pmap_extract
- *	Function:
- *		Extract the physical page address associated
- *		with the given map/virtual_address pair.
- */
-vm_paddr_t
-pmap_extract(pmap_t pmap, vm_offset_t va)
-{
-	pt_entry_t *pte;
-	vm_offset_t retval = 0;
-
-	PMAP_LOCK(pmap);
-	pte = pmap_pte(pmap, va);
-	if (pte) {
-		retval = TLBLO_PTE_TO_PA(*pte) | (va & PAGE_MASK);
-	}
-	PMAP_UNLOCK(pmap);
-	return (retval);
-}
-
-/*
- *	Routine:	pmap_extract_and_hold
- *	Function:
- *		Atomically extract and hold the physical page
- *		with the given pmap and virtual address pair
- *		if that mapping permits the given protection.
- */
-vm_page_t
-pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
-{
-	pt_entry_t pte, *ptep;
-	vm_paddr_t pa;
-	vm_page_t m;
-
-	m = NULL;
-	PMAP_LOCK(pmap);
-	ptep = pmap_pte(pmap, va);
-	if (ptep != NULL) {
-		pte = *ptep;
-		if (pte_test(&pte, PTE_V) && (!pte_test(&pte, PTE_RO) ||
-		    (prot & VM_PROT_WRITE) == 0)) {
-			pa = TLBLO_PTE_TO_PA(pte);
-			m = PHYS_TO_VM_PAGE(pa);
-			if (!vm_page_wire_mapped(m))
-				m = NULL;
-		}
-	}
-	PMAP_UNLOCK(pmap);
-	return (m);
-}
-
-/***************************************************
- * Low level mapping routines.....
- ***************************************************/
-
-/*
- * add a wired page to the kva
- */
-void
-pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma)
-{
-	pt_entry_t *pte;
-	pt_entry_t opte, npte;
-
-#ifdef PMAP_DEBUG
-	printf("pmap_kenter:  va: %p -> pa: %p\n", (void *)va, (void *)pa);
-#endif
-
-	pte = pmap_pte(kernel_pmap, va);
-	opte = *pte;
-	npte = TLBLO_PA_TO_PFN(pa) | PTE_C(ma) | PTE_D | PTE_V | PTE_G;
-	*pte = npte;
-	if (pte_test(&opte, PTE_V) && opte != npte)
-		pmap_update_page(kernel_pmap, va, npte);
-}
-
-void
-pmap_kenter(vm_offset_t va, vm_paddr_t pa)
-{
-
-	KASSERT(is_cacheable_mem(pa),
-		("pmap_kenter: memory at 0x%lx is not cacheable", (u_long)pa));
-
-	pmap_kenter_attr(va, pa, VM_MEMATTR_DEFAULT);
-}
-
-void
-pmap_kenter_device(vm_offset_t va, vm_size_t size, vm_paddr_t pa)
-{
-
-	KASSERT((size & PAGE_MASK) == 0,
-	    ("%s: device mapping not page-sized", __func__));
-
-	for (; size > 0; size -= PAGE_SIZE) {
-		/*
-		 * XXXCEM: this is somewhat inefficient on SMP systems in that
-		 * every single page is individually TLB-invalidated via
-		 * rendezvous (pmap_update_page()), instead of invalidating the
-		 * entire range via a single rendezvous.
-		 */
-		pmap_kenter_attr(va, pa, VM_MEMATTR_UNCACHEABLE);
-		va += PAGE_SIZE;
-		pa += PAGE_SIZE;
-	}
-}
-
-void
-pmap_kremove_device(vm_offset_t va, vm_size_t size)
-{
-
-	KASSERT((size & PAGE_MASK) == 0,
-	    ("%s: device mapping not page-sized", __func__));
-
-	/*
-	 * XXXCEM: Similar to pmap_kenter_device, this is inefficient on SMP,
-	 * in that pages are invalidated individually instead of a single range
-	 * rendezvous.
-	 */
-	for (; size > 0; size -= PAGE_SIZE) {
-		pmap_kremove(va);
-		va += PAGE_SIZE;
-	}
-}
-
-/*
- * remove a page from the kernel pagetables
- */
- /* PMAP_INLINE */ void
-pmap_kremove(vm_offset_t va)
-{
-	pt_entry_t *pte;
-
-	/*
-	 * Write back all caches from the page being destroyed
-	 */
-	mips_dcache_wbinv_range_index(va, PAGE_SIZE);
-
-	pte = pmap_pte(kernel_pmap, va);
-	*pte = PTE_G;
-	pmap_invalidate_page(kernel_pmap, va);
-}
-
-/*
- *	Used to map a range of physical addresses into kernel
- *	virtual address space.
- *
- *	The value passed in '*virt' is a suggested virtual address for
- *	the mapping. Architectures which can support a direct-mapped
- *	physical to virtual region can return the appropriate address
- *	within that region, leaving '*virt' unchanged. Other
- *	architectures should map the pages starting at '*virt' and
- *	update '*virt' with the first usable address after the mapped
- *	region.
- *
- *	Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
- */
-vm_offset_t
-pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
-{
-	vm_offset_t va, sva;
-
-	if (MIPS_DIRECT_MAPPABLE(end - 1))
-		return (MIPS_PHYS_TO_DIRECT(start));
-
-	va = sva = *virt;
-	while (start < end) {
-		pmap_kenter(va, start);
-		va += PAGE_SIZE;
-		start += PAGE_SIZE;
-	}
-	*virt = va;
-	return (sva);
-}
-
-/*
- * Add a list of wired pages to the kva
- * this routine is only used for temporary
- * kernel mappings that do not need to have
- * page modification or references recorded.
- * Note that old mappings are simply written
- * over.  The page *must* be wired.
- */
-void
-pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
-{
-	int i;
-	vm_offset_t origva = va;
-
-	for (i = 0; i < count; i++) {
-		pmap_flush_pvcache(m[i]);
-		pmap_kenter(va, VM_PAGE_TO_PHYS(m[i]));
-		va += PAGE_SIZE;
-	}
-
-	mips_dcache_wbinv_range_index(origva, PAGE_SIZE*count);
-}
-
-/*
- * this routine jerks page mappings from the
- * kernel -- it is meant only for temporary mappings.
- */
-void
-pmap_qremove(vm_offset_t va, int count)
-{
-	pt_entry_t *pte;
-	vm_offset_t origva;
-
-	if (count < 1)
-		return;
-	mips_dcache_wbinv_range_index(va, PAGE_SIZE * count);
-	origva = va;
-	do {
-		pte = pmap_pte(kernel_pmap, va);
-		*pte = PTE_G;
-		va += PAGE_SIZE;
-	} while (--count > 0);
-	pmap_invalidate_range(kernel_pmap, origva, va);
-}
-
-/***************************************************
- * Page table page management routines.....
- ***************************************************/
-
-/*
- * Decrements a page table page's reference count, which is used to record the
- * number of valid page table entries within the page.  If the reference count
- * drops to zero, then the page table page is unmapped.  Returns TRUE if the
- * page table page was unmapped and FALSE otherwise.
- */
-static PMAP_INLINE boolean_t
-pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m)
-{
-
-	--m->ref_count;
-	if (m->ref_count == 0) {
-		_pmap_unwire_ptp(pmap, va, m);
-		return (TRUE);
-	} else
-		return (FALSE);
-}
-
-static void
-_pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m)
-{
-	pd_entry_t *pde;
-	vm_offset_t sva, eva;
-
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-	/*
-	 * unmap the page table page
-	 */
-#ifdef __mips_n64
-	if (m->pindex < NUPDE) {
-		pde = pmap_pde(pmap, va);
-		sva = va & ~PDRMASK;
-		eva = sva + NBPDR;
-	} else {
-		pde = pmap_segmap(pmap, va);
-		sva = va & ~SEGMASK;
-		eva = sva + NBSEG;
-	}
-#else
-	pde = pmap_pde(pmap, va);
-	sva = va & ~SEGMASK;
-	eva = sva + NBSEG;
-#endif
-	*pde = 0;
-	pmap->pm_stats.resident_count--;
-
-#ifdef __mips_n64
-	if (m->pindex < NUPDE) {
-		pd_entry_t *pdp;
-		vm_page_t pdpg;
-
-		/*
-		 * Recursively decrement next level pagetable refcount.
-		 * Either that shoots down a larger range from TLBs (below)
-		 * or we're to shoot down just the page in question.
-		 */
-		pdp = (pd_entry_t *)*pmap_segmap(pmap, va);
-		pdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pdp));
-		if (!pmap_unwire_ptp(pmap, va, pdpg)) {
-			pmap_invalidate_range(pmap, sva, eva);
-		}
-	} else {
-		/* Segmap entry shootdown */
-		pmap_invalidate_range(pmap, sva, eva);
-	}
-#else
-	/* Segmap entry shootdown */
-	pmap_invalidate_range(pmap, sva, eva);
-#endif
-
-	/*
-	 * If the page is finally unwired, simply free it.
-	 */
-	vm_page_free_zero(m);
-	vm_wire_sub(1);
-}
-
-/*
- * After removing a page table entry, this routine is used to
- * conditionally free the page, and manage the reference count.
- */
-static int
-pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t pde)
-{
-	vm_page_t mpte;
-
-	if (va >= VM_MAXUSER_ADDRESS)
-		return (0);
-	KASSERT(pde != 0, ("pmap_unuse_pt: pde != 0"));
-	mpte = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pde));
-	return (pmap_unwire_ptp(pmap, va, mpte));
-}
-
-void
-pmap_pinit0(pmap_t pmap)
-{
-	int i;
-
-	PMAP_LOCK_INIT(pmap);
-	pmap->pm_segtab = kernel_segmap;
-	CPU_ZERO(&pmap->pm_active);
-	for (i = 0; i < MAXCPU; i++) {
-		pmap->pm_asid[i].asid = PMAP_ASID_RESERVED;
-		pmap->pm_asid[i].gen = 0;
-	}
-	PCPU_SET(curpmap, pmap);
-	TAILQ_INIT(&pmap->pm_pvchunk);
-	bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
-}
-
-static void
-pmap_grow_direct_page(int req)
-{
-
-#ifdef __mips_n64
-	vm_wait(NULL);
-#else
-	if (!vm_page_reclaim_contig(req, 1, 0, MIPS_KSEG0_LARGEST_PHYS,
-	    PAGE_SIZE, 0))
-		vm_wait(NULL);
-#endif
-}
-
-static vm_page_t
-pmap_alloc_direct_page(unsigned int index, int req)
-{
-	vm_page_t m;
-
-	m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, req | VM_ALLOC_WIRED |
-	    VM_ALLOC_ZERO);
-	if (m == NULL)
-		return (NULL);
-	m->pindex = index;
-	return (m);
-}
-
-/*
- * Initialize a preallocated and zeroed pmap structure,
- * such as one in a vmspace structure.
- */
-int
-pmap_pinit(pmap_t pmap)
-{
-	vm_offset_t ptdva;
-	vm_page_t ptdpg;
-	int i, req_class;
-
-	/*
-	 * allocate the page directory page
-	 */
-	req_class = VM_ALLOC_NORMAL;
-	while ((ptdpg = pmap_alloc_direct_page(NUSERPGTBLS, req_class)) ==
-	    NULL)
-		pmap_grow_direct_page(req_class);
-
-	ptdva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(ptdpg));
-	pmap->pm_segtab = (pd_entry_t *)ptdva;
-	CPU_ZERO(&pmap->pm_active);
-	for (i = 0; i < MAXCPU; i++) {
-		pmap->pm_asid[i].asid = PMAP_ASID_RESERVED;
-		pmap->pm_asid[i].gen = 0;
-	}
-	TAILQ_INIT(&pmap->pm_pvchunk);
-	bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
-
-	return (1);
-}
-
-/*
- * this routine is called if the page table page is not
- * mapped correctly.
- */
-static vm_page_t
-_pmap_allocpte(pmap_t pmap, unsigned ptepindex, u_int flags)
-{
-	vm_offset_t pageva;
-	vm_page_t m;
-	int req_class;
-
-	/*
-	 * Find or fabricate a new pagetable page
-	 */
-	req_class = VM_ALLOC_NORMAL;
-	if ((m = pmap_alloc_direct_page(ptepindex, req_class)) == NULL) {
-		if ((flags & PMAP_ENTER_NOSLEEP) == 0) {
-			PMAP_UNLOCK(pmap);
-			rw_wunlock(&pvh_global_lock);
-			pmap_grow_direct_page(req_class);
-			rw_wlock(&pvh_global_lock);
-			PMAP_LOCK(pmap);
-		}
-
-		/*
-		 * Indicate the need to retry.	While waiting, the page
-		 * table page may have been allocated.
-		 */
-		return (NULL);
-	}
-
-	/*
-	 * Map the pagetable page into the process address space, if it
-	 * isn't already there.
-	 */
-	pageva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
-
-#ifdef __mips_n64
-	if (ptepindex >= NUPDE) {
-		pmap->pm_segtab[ptepindex - NUPDE] = (pd_entry_t)pageva;
-	} else {
-		pd_entry_t *pdep, *pde;
-		int segindex = ptepindex >> (SEGSHIFT - PDRSHIFT);
-		int pdeindex = ptepindex & (NPDEPG - 1);
-		vm_page_t pg;
-
-		pdep = &pmap->pm_segtab[segindex];
-		if (*pdep == NULL) {
-			/* recurse for allocating page dir */
-			if (_pmap_allocpte(pmap, NUPDE + segindex,
-			    flags) == NULL) {
-				/* alloc failed, release current */
-				vm_page_unwire_noq(m);
-				vm_page_free_zero(m);
-				return (NULL);
-			}
-		} else {
-			pg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pdep));
-			pg->ref_count++;
-		}
-		/* Next level entry */
-		pde = (pd_entry_t *)*pdep;
-		KASSERT(pde[pdeindex] == 0,
-		    ("%s: PTE %p is valid", __func__, pde[pdeindex]));
-		pde[pdeindex] = (pd_entry_t)pageva;
-	}
-#else
-	KASSERT(pmap->pm_segtab[ptepindex] == 0,
-	    ("%s: PTE %p is valid", __func__, pmap->pm_segtab[ptepindex]));
-	pmap->pm_segtab[ptepindex] = (pd_entry_t)pageva;
-#endif
-	pmap->pm_stats.resident_count++;
-	return (m);
-}
-
-static vm_page_t
-pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags)
-{
-	unsigned ptepindex;
-	pd_entry_t *pde;
-	vm_page_t m;
-
-	/*
-	 * Calculate pagetable page index
-	 */
-	ptepindex = pmap_pde_pindex(va);
-retry:
-	/*
-	 * Get the page directory entry
-	 */
-	pde = pmap_pde(pmap, va);
-
-	/*
-	 * If the page table page is mapped, we just increment the hold
-	 * count, and activate it.
-	 */
-	if (pde != NULL && *pde != NULL) {
-		m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pde));
-		m->ref_count++;
-	} else {
-		/*
-		 * Here if the pte page isn't mapped, or if it has been
-		 * deallocated.
-		 */
-		m = _pmap_allocpte(pmap, ptepindex, flags);
-		if (m == NULL && (flags & PMAP_ENTER_NOSLEEP) == 0)
-			goto retry;
-	}
-	return (m);
-}
-
-/***************************************************
- * Pmap allocation/deallocation routines.
- ***************************************************/
-
-/*
- * Release any resources held by the given physical map.
- * Called when a pmap initialized by pmap_pinit is being released.
- * Should only be called if the map contains no valid mappings.
- */
-void
-pmap_release(pmap_t pmap)
-{
-	vm_offset_t ptdva;
-	vm_page_t ptdpg;
-
-	KASSERT(pmap->pm_stats.resident_count == 0,
-	    ("pmap_release: pmap resident count %ld != 0",
-	    pmap->pm_stats.resident_count));
-
-	ptdva = (vm_offset_t)pmap->pm_segtab;
-	ptdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(ptdva));
-
-	vm_page_unwire_noq(ptdpg);
-	vm_page_free_zero(ptdpg);
-}
-
-/*
- * grow the number of kernel page table entries, if needed
- */
-void
-pmap_growkernel(vm_offset_t addr)
-{
-	vm_page_t nkpg;
-	pd_entry_t *pde, *pdpe;
-	pt_entry_t *pte;
-	int i, req_class;
-
-	mtx_assert(&kernel_map->system_mtx, MA_OWNED);
-	req_class = VM_ALLOC_INTERRUPT;
-	addr = roundup2(addr, NBSEG);
-	if (addr - 1 >= vm_map_max(kernel_map))
-		addr = vm_map_max(kernel_map);
-	while (kernel_vm_end < addr) {
-		pdpe = pmap_segmap(kernel_pmap, kernel_vm_end);
-#ifdef __mips_n64
-		if (*pdpe == 0) {
-			/* new intermediate page table entry */
-			nkpg = pmap_alloc_direct_page(nkpt, req_class);
-			if (nkpg == NULL)
-				panic("pmap_growkernel: no memory to grow kernel");
-			*pdpe = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg));
-			continue; /* try again */
-		}
-#endif
-		pde = pmap_pdpe_to_pde(pdpe, kernel_vm_end);
-		if (*pde != 0) {
-			kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
-			if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
-				kernel_vm_end = vm_map_max(kernel_map);
-				break;
-			}
-			continue;
-		}
-
-		/*
-		 * This index is bogus, but out of the way
-		 */
-		nkpg = pmap_alloc_direct_page(nkpt, req_class);
-#ifndef __mips_n64
-		if (nkpg == NULL && vm_page_reclaim_contig(req_class, 1,
-		    0, MIPS_KSEG0_LARGEST_PHYS, PAGE_SIZE, 0))
-			nkpg = pmap_alloc_direct_page(nkpt, req_class);
-#endif
-		if (nkpg == NULL)
-			panic("pmap_growkernel: no memory to grow kernel");
-		nkpt++;
-		*pde = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg));
-
-		/*
-		 * The R[4-7]?00 stores only one copy of the Global bit in
-		 * the translation lookaside buffer for each 2 page entry.
-		 * Thus invalid entrys must have the Global bit set so when
-		 * Entry LO and Entry HI G bits are anded together they will
-		 * produce a global bit to store in the tlb.
-		 */
-		pte = (pt_entry_t *)*pde;
-		for (i = 0; i < NPTEPG; i++)
-			pte[i] = PTE_G;
-
-		kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
-		if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
-			kernel_vm_end = vm_map_max(kernel_map);
-			break;
-		}
-	}
-}
-
-/***************************************************
- * page management routines.
- ***************************************************/
-
-CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
-#ifdef __mips_n64
-CTASSERT(_NPCM == 3);
-CTASSERT(_NPCPV == 168);
-#else
-CTASSERT(_NPCM == 11);
-CTASSERT(_NPCPV == 336);
-#endif
-
-static __inline struct pv_chunk *
-pv_to_chunk(pv_entry_t pv)
-{
-
-	return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
-}
-
-#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
-
-#ifdef __mips_n64
-#define	PC_FREE0_1	0xfffffffffffffffful
-#define	PC_FREE2	0x000000fffffffffful
-#else
-#define	PC_FREE0_9	0xfffffffful	/* Free values for index 0 through 9 */
-#define	PC_FREE10	0x0000fffful	/* Free values for index 10 */
-#endif
-
-static const u_long pc_freemask[_NPCM] = {
-#ifdef __mips_n64
-	PC_FREE0_1, PC_FREE0_1, PC_FREE2
-#else
-	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
-	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
-	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
-	PC_FREE0_9, PC_FREE10
-#endif
-};
-
-static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
-    "VM/pmap parameters");
-
-SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
-    "Current number of pv entries");
-
-#ifdef PV_STATS
-static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
-
-SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
-    "Current number of pv entry chunks");
-SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
-    "Current number of pv entry chunks allocated");
-SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
-    "Current number of pv entry chunks frees");
-SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
-    "Number of times tried to get a chunk page but failed.");
-
-static long pv_entry_frees, pv_entry_allocs;
-static int pv_entry_spare;
-
-SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
-    "Current number of pv entry frees");
-SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
-    "Current number of pv entry allocs");
-SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
-    "Current number of spare pv entries");
-#endif
-
-/*
- * We are in a serious low memory condition.  Resort to
- * drastic measures to free some pages so we can allocate
- * another pv entry chunk.
- */
-static vm_page_t
-pmap_pv_reclaim(pmap_t locked_pmap)
-{
-	struct pch newtail;
-	struct pv_chunk *pc;
-	pd_entry_t *pde;
-	pmap_t pmap;
-	pt_entry_t *pte, oldpte;
-	pv_entry_t pv;
-	vm_offset_t va;
-	vm_page_t m, m_pc;
-	u_long inuse;
-	int bit, field, freed, idx;
-
-	PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED);
-	pmap = NULL;
-	m_pc = NULL;
-	TAILQ_INIT(&newtail);
-	while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL) {
-		TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
-		if (pmap != pc->pc_pmap) {
-			if (pmap != NULL) {
-				pmap_invalidate_all(pmap);
-				if (pmap != locked_pmap)
-					PMAP_UNLOCK(pmap);
-			}
-			pmap = pc->pc_pmap;
-			/* Avoid deadlock and lock recursion. */
-			if (pmap > locked_pmap)
-				PMAP_LOCK(pmap);
-			else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
-				pmap = NULL;
-				TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
-				continue;
-			}
-		}
-
-		/*
-		 * Destroy every non-wired, 4 KB page mapping in the chunk.
-		 */
-		freed = 0;
-		for (field = 0; field < _NPCM; field++) {
-			for (inuse = ~pc->pc_map[field] & pc_freemask[field];
-			    inuse != 0; inuse &= ~(1UL << bit)) {
-				bit = ffsl(inuse) - 1;
-				idx = field * sizeof(inuse) * NBBY + bit;
-				pv = &pc->pc_pventry[idx];
-				va = pv->pv_va;
-				pde = pmap_pde(pmap, va);
-				KASSERT(pde != NULL && *pde != 0,
-				    ("pmap_pv_reclaim: pde"));
-				pte = pmap_pde_to_pte(pde, va);
-				oldpte = *pte;
-				if (pte_test(&oldpte, PTE_W))
-					continue;
-				if (is_kernel_pmap(pmap))
-					*pte = PTE_G;
-				else
-					*pte = 0;
-				m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(oldpte));
-				if (pte_test(&oldpte, PTE_D))
-					vm_page_dirty(m);
-				if (m->md.pv_flags & PV_TABLE_REF)
-					vm_page_aflag_set(m, PGA_REFERENCED);
-				m->md.pv_flags &= ~PV_TABLE_REF;
-				TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
-				if (TAILQ_EMPTY(&m->md.pv_list))
-					vm_page_aflag_clear(m, PGA_WRITEABLE);
-				pc->pc_map[field] |= 1UL << bit;
-
-				/*
-				 * For simplicity, we will unconditionally shoot
-				 * down TLBs either at the end of this function
-				 * or at the top of the loop above if we switch
-				 * to a different pmap.
-				 */
-				(void)pmap_unuse_pt(pmap, va, *pde);
-
-				freed++;
-			}
-		}
-		if (freed == 0) {
-			TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
-			continue;
-		}
-		/* Every freed mapping is for a 4 KB page. */
-		pmap->pm_stats.resident_count -= freed;
-		PV_STAT(pv_entry_frees += freed);
-		PV_STAT(pv_entry_spare += freed);
-		pv_entry_count -= freed;
-		TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
-		for (field = 0; field < _NPCM; field++)
-			if (pc->pc_map[field] != pc_freemask[field]) {
-				TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
-				    pc_list);
-				TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
-
-				/*
-				 * One freed pv entry in locked_pmap is
-				 * sufficient.
-				 */
-				if (pmap == locked_pmap)
-					goto out;
-				break;
-			}
-		if (field == _NPCM) {
-			PV_STAT(pv_entry_spare -= _NPCPV);
-			PV_STAT(pc_chunk_count--);
-			PV_STAT(pc_chunk_frees++);
-			/* Entire chunk is free; return it. */
-			m_pc = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(
-			    (vm_offset_t)pc));
-			dump_drop_page(m_pc->phys_addr);
-			break;
-		}
-	}
-out:
-	TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
-	if (pmap != NULL) {
-		pmap_invalidate_all(pmap);
-		if (pmap != locked_pmap)
-			PMAP_UNLOCK(pmap);
-	}
-	return (m_pc);
-}
-
-/*
- * free the pv_entry back to the free list
- */
-static void
-free_pv_entry(pmap_t pmap, pv_entry_t pv)
-{
-	struct pv_chunk *pc;
-	int bit, field, idx;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-	PV_STAT(pv_entry_frees++);
-	PV_STAT(pv_entry_spare++);
-	pv_entry_count--;
-	pc = pv_to_chunk(pv);
-	idx = pv - &pc->pc_pventry[0];
-	field = idx / (sizeof(u_long) * NBBY);
-	bit = idx % (sizeof(u_long) * NBBY);
-	pc->pc_map[field] |= 1ul << bit;
-	for (idx = 0; idx < _NPCM; idx++)
-		if (pc->pc_map[idx] != pc_freemask[idx]) {
-			/*
-			 * 98% of the time, pc is already at the head of the
-			 * list.  If it isn't already, move it to the head.
-			 */
-			if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
-			    pc)) {
-				TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
-				TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
-				    pc_list);
-			}
-			return;
-		}
-	TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
-	free_pv_chunk(pc);
-}
-
-static void
-free_pv_chunk(struct pv_chunk *pc)
-{
-	vm_page_t m;
-
- 	TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
-	PV_STAT(pv_entry_spare -= _NPCPV);
-	PV_STAT(pc_chunk_count--);
-	PV_STAT(pc_chunk_frees++);
-	/* entire chunk is free, return it */
-	m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS((vm_offset_t)pc));
-	dump_drop_page(m->phys_addr);
-	vm_page_unwire_noq(m);
-	vm_page_free(m);
-}
-
-/*
- * get a new pv_entry, allocating a block from the system
- * when needed.
- */
-static pv_entry_t
-get_pv_entry(pmap_t pmap, boolean_t try)
-{
-	struct pv_chunk *pc;
-	pv_entry_t pv;
-	vm_page_t m;
-	int bit, field, idx;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-	PV_STAT(pv_entry_allocs++);
-	pv_entry_count++;
-retry:
-	pc = TAILQ_FIRST(&pmap->pm_pvchunk);
-	if (pc != NULL) {
-		for (field = 0; field < _NPCM; field++) {
-			if (pc->pc_map[field]) {
-				bit = ffsl(pc->pc_map[field]) - 1;
-				break;
-			}
-		}
-		if (field < _NPCM) {
-			idx = field * sizeof(pc->pc_map[field]) * NBBY + bit;
-			pv = &pc->pc_pventry[idx];
-			pc->pc_map[field] &= ~(1ul << bit);
-			/* If this was the last item, move it to tail */
-			for (field = 0; field < _NPCM; field++)
-				if (pc->pc_map[field] != 0) {
-					PV_STAT(pv_entry_spare--);
-					return (pv);	/* not full, return */
-				}
-			TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
-			TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
-			PV_STAT(pv_entry_spare--);
-			return (pv);
-		}
-	}
-	/* No free items, allocate another chunk */
-	m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, VM_ALLOC_NORMAL |
-	    VM_ALLOC_WIRED);
-	if (m == NULL) {
-		if (try) {
-			pv_entry_count--;
-			PV_STAT(pc_chunk_tryfail++);
-			return (NULL);
-		}
-		m = pmap_pv_reclaim(pmap);
-		if (m == NULL)
-			goto retry;
-	}
-	PV_STAT(pc_chunk_count++);
-	PV_STAT(pc_chunk_allocs++);
-	dump_add_page(m->phys_addr);
-	pc = (struct pv_chunk *)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
-	pc->pc_pmap = pmap;
-	pc->pc_map[0] = pc_freemask[0] & ~1ul;	/* preallocated bit 0 */
-	for (field = 1; field < _NPCM; field++)
-		pc->pc_map[field] = pc_freemask[field];
-	TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
-	pv = &pc->pc_pventry[0];
-	TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
-	PV_STAT(pv_entry_spare += _NPCPV - 1);
-	return (pv);
-}
-
-static pv_entry_t
-pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
-{
-	pv_entry_t pv;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
-		if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
-			TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
-			break;
-		}
-	}
-	return (pv);
-}
-
-static void
-pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
-{
-	pv_entry_t pv;
-
-	pv = pmap_pvh_remove(pvh, pmap, va);
-	KASSERT(pv != NULL, ("pmap_pvh_free: pv not found, pa %lx va %lx",
-	     (u_long)VM_PAGE_TO_PHYS(__containerof(pvh, struct vm_page, md)),
-	     (u_long)va));
-	free_pv_entry(pmap, pv);
-}
-
-static void
-pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
-{
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	pmap_pvh_free(&m->md, pmap, va);
-	if (TAILQ_EMPTY(&m->md.pv_list))
-		vm_page_aflag_clear(m, PGA_WRITEABLE);
-}
-
-/*
- * Conditionally create a pv entry.
- */
-static boolean_t
-pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte, vm_offset_t va,
-    vm_page_t m)
-{
-	pv_entry_t pv;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-	if ((pv = get_pv_entry(pmap, TRUE)) != NULL) {
-		pv->pv_va = va;
-		TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
-		return (TRUE);
-	} else
-		return (FALSE);
-}
-
-/*
- * pmap_remove_pte: do the things to unmap a page in a process
- *
- * Returns true if this was the last PTE in the PT (and possibly the last PT in
- * the PD, and possibly the last PD in the segmap), in which case...
- *
- *   1) the TLB has been invalidated for the whole PT's span (at least),
- *   already, to ensure that MipsDoTLBMiss does not attempt to follow a
- *   dangling pointer into a freed page.  No additional TLB shootdown is
- *   required.
- *
- *   2) if this removal was part of a sweep to remove PTEs, it is safe to jump
- *   to the PT span boundary and continue.
- *
- *   3) The given pde may now point onto a freed page and must not be
- *   dereferenced
- *
- * If the return value is false, the TLB has not been shot down (and the segmap
- * entry, PD, and PT all remain in place).
- */
-static int
-pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
-    pd_entry_t pde)
-{
-	pt_entry_t oldpte;
-	vm_page_t m;
-	vm_paddr_t pa;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-
-	/*
-	 * Write back all cache lines from the page being unmapped.
-	 */
-	mips_dcache_wbinv_range_index(va, PAGE_SIZE);
-
-	oldpte = *ptq;
-	if (is_kernel_pmap(pmap))
-		*ptq = PTE_G;
-	else
-		*ptq = 0;
-
-	if (pte_test(&oldpte, PTE_W))
-		pmap->pm_stats.wired_count -= 1;
-
-	pmap->pm_stats.resident_count -= 1;
-
-	if (pte_test(&oldpte, PTE_MANAGED)) {
-		pa = TLBLO_PTE_TO_PA(oldpte);
-		m = PHYS_TO_VM_PAGE(pa);
-		if (pte_test(&oldpte, PTE_D)) {
-			KASSERT(!pte_test(&oldpte, PTE_RO),
-			    ("%s: modified page not writable: va: %p, pte: %#jx",
-			    __func__, (void *)va, (uintmax_t)oldpte));
-			vm_page_dirty(m);
-		}
-		if (m->md.pv_flags & PV_TABLE_REF)
-			vm_page_aflag_set(m, PGA_REFERENCED);
-		m->md.pv_flags &= ~PV_TABLE_REF;
-
-		pmap_remove_entry(pmap, m, va);
-	}
-	return (pmap_unuse_pt(pmap, va, pde));
-}
-
-/*
- * Remove a single page from a process address space
- */
-static void
-pmap_remove_page(struct pmap *pmap, vm_offset_t va)
-{
-	pd_entry_t *pde;
-	pt_entry_t *ptq;
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-	pde = pmap_pde(pmap, va);
-	if (pde == NULL || *pde == 0)
-		return;
-	ptq = pmap_pde_to_pte(pde, va);
-
-	/*
-	 * If there is no pte for this address, just skip it!
-	 */
-	if (!pte_test(ptq, PTE_V))
-		return;
-
-	/*
-	 * Remove this PTE from the PT.  If this is the last one, then
-	 * the TLB has already been shot down, so don't bother again
-	 */
-	if (!pmap_remove_pte(pmap, ptq, va, *pde))
-		pmap_invalidate_page(pmap, va);
-}
-
-/*
- *	Remove the given range of addresses from the specified map.
- *
- *	It is assumed that the start and end are properly
- *	rounded to the page size.
- */
-void
-pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
-	pd_entry_t *pde, *pdpe;
-	pt_entry_t *pte;
-	vm_offset_t va_next;
-	vm_offset_t va_init, va_fini;
-	bool need_tlb_shootdown;
-
-	/*
-	 * Perform an unsynchronized read.  This is, however, safe.
-	 */
-	if (pmap->pm_stats.resident_count == 0)
-		return;
-
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-
-	/*
-	 * special handling of removing one page.  a very common operation
-	 * and easy to short circuit some code.
-	 */
-	if ((sva + PAGE_SIZE) == eva) {
-		pmap_remove_page(pmap, sva);
-		goto out;
-	}
-	for (; sva < eva; sva = va_next) {
-		pdpe = pmap_segmap(pmap, sva);
-#ifdef __mips_n64
-		if (*pdpe == 0) {
-			va_next = (sva + NBSEG) & ~SEGMASK;
-			if (va_next < sva)
-				va_next = eva;
-			continue;
-		}
-#endif
-
-		/* Scan up to the end of the page table pointed to by pde */
-		va_next = (sva + NBPDR) & ~PDRMASK;
-		if (va_next < sva)
-			va_next = eva;
-
-		pde = pmap_pdpe_to_pde(pdpe, sva);
-		if (*pde == NULL)
-			continue;
-
-		/*
-		 * Limit our scan to either the end of the va represented
-		 * by the current page table page, or to the end of the
-		 * range being removed.
-		 */
-		if (va_next > eva)
-			va_next = eva;
-
-		need_tlb_shootdown = false;
-		va_init = sva;
-		va_fini = va_next;
-		for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
-		    sva += PAGE_SIZE) {
-			/* Skip over invalid entries; no need to shootdown */
-			if (!pte_test(pte, PTE_V)) {
-				/*
-				 * If we have not yet found a valid entry, then
-				 * we can move the lower edge of the region to
-				 * invalidate to the next PTE.
-				 */
-				if (!need_tlb_shootdown)
-					va_init = sva + PAGE_SIZE;
-				continue;
-			}
-
-			/*
-			 * A valid entry; the range we are shooting down must
-			 * include this page.  va_fini is used instead of sva
-			 * so that if the range ends with a run of !PTE_V PTEs,
-			 * but doesn't clear out so much that pmap_remove_pte
-			 * removes the entire PT, we won't include these !PTE_V
-			 * entries in the region to be shot down.
-			 */
-			va_fini = sva + PAGE_SIZE;
-
-			if (pmap_remove_pte(pmap, pte, sva, *pde)) {
-				/* Entire PT removed and TLBs shot down. */
-				need_tlb_shootdown = false;
-				break;
-			} else {
-				need_tlb_shootdown = true;
-			}
-		}
-		if (need_tlb_shootdown)
-			pmap_invalidate_range(pmap, va_init, va_fini);
-	}
-out:
-	rw_wunlock(&pvh_global_lock);
-	PMAP_UNLOCK(pmap);
-}
-
-/*
- *	Routine:	pmap_remove_all
- *	Function:
- *		Removes this physical page from
- *		all physical maps in which it resides.
- *		Reflects back modify bits to the pager.
- *
- *	Notes:
- *		Original versions of this routine were very
- *		inefficient because they iteratively called
- *		pmap_remove (slow...)
- */
-
-void
-pmap_remove_all(vm_page_t m)
-{
-	pv_entry_t pv;
-	pmap_t pmap;
-	pd_entry_t *pde;
-	pt_entry_t *pte, tpte;
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_remove_all: page %p is not managed", m));
-	rw_wlock(&pvh_global_lock);
-
-	if (m->md.pv_flags & PV_TABLE_REF)
-		vm_page_aflag_set(m, PGA_REFERENCED);
-
-	while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
-		pmap = PV_PMAP(pv);
-		PMAP_LOCK(pmap);
-
-		/*
-		 * If it's last mapping writeback all caches from
-		 * the page being destroyed
-	 	 */
-		if (TAILQ_NEXT(pv, pv_list) == NULL)
-			mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);
-
-		pmap->pm_stats.resident_count--;
-
-		pde = pmap_pde(pmap, pv->pv_va);
-		KASSERT(pde != NULL && *pde != 0, ("pmap_remove_all: pde"));
-		pte = pmap_pde_to_pte(pde, pv->pv_va);
-
-		tpte = *pte;
-		if (is_kernel_pmap(pmap))
-			*pte = PTE_G;
-		else
-			*pte = 0;
-
-		if (pte_test(&tpte, PTE_W))
-			pmap->pm_stats.wired_count--;
-
-		/*
-		 * Update the vm_page_t clean and reference bits.
-		 */
-		if (pte_test(&tpte, PTE_D)) {
-			KASSERT(!pte_test(&tpte, PTE_RO),
-			    ("%s: modified page not writable: va: %p, pte: %#jx",
-			    __func__, (void *)pv->pv_va, (uintmax_t)tpte));
-			vm_page_dirty(m);
-		}
-
-		if (!pmap_unuse_pt(pmap, pv->pv_va, *pde))
-			pmap_invalidate_page(pmap, pv->pv_va);
-
-		TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
-		free_pv_entry(pmap, pv);
-		PMAP_UNLOCK(pmap);
-	}
-
-	vm_page_aflag_clear(m, PGA_WRITEABLE);
-	m->md.pv_flags &= ~PV_TABLE_REF;
-	rw_wunlock(&pvh_global_lock);
-}
-
-/*
- *	Set the physical protection on the
- *	specified range of this map as requested.
- */
-void
-pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
-{
-	pt_entry_t pbits, *pte;
-	pd_entry_t *pde, *pdpe;
-	vm_offset_t va, va_next;
-	vm_paddr_t pa;
-	vm_page_t m;
-
-	if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
-		pmap_remove(pmap, sva, eva);
-		return;
-	}
-	if (prot & VM_PROT_WRITE)
-		return;
-
-	PMAP_LOCK(pmap);
-	for (; sva < eva; sva = va_next) {
-		pdpe = pmap_segmap(pmap, sva);
-#ifdef __mips_n64
-		if (*pdpe == 0) {
-			va_next = (sva + NBSEG) & ~SEGMASK;
-			if (va_next < sva)
-				va_next = eva;
-			continue;
-		}
-#endif
-		va_next = (sva + NBPDR) & ~PDRMASK;
-		if (va_next < sva)
-			va_next = eva;
-
-		pde = pmap_pdpe_to_pde(pdpe, sva);
-		if (*pde == NULL)
-			continue;
-
-		/*
-		 * Limit our scan to either the end of the va represented
-		 * by the current page table page, or to the end of the
-		 * range being write protected.
-		 */
-		if (va_next > eva)
-			va_next = eva;
-
-		va = va_next;
-		for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
-		    sva += PAGE_SIZE) {
-			pbits = *pte;
-			if (!pte_test(&pbits, PTE_V) || pte_test(&pbits,
-			    PTE_RO)) {
-				if (va != va_next) {
-					pmap_invalidate_range(pmap, va, sva);
-					va = va_next;
-				}
-				continue;
-			}
-			pte_set(&pbits, PTE_RO);
-			if (pte_test(&pbits, PTE_D)) {
-				pte_clear(&pbits, PTE_D);
-				if (pte_test(&pbits, PTE_MANAGED)) {
-					pa = TLBLO_PTE_TO_PA(pbits);
-					m = PHYS_TO_VM_PAGE(pa);
-					vm_page_dirty(m);
-				}
-				if (va == va_next)
-					va = sva;
-			} else {
-				/*
-				 * Unless PTE_D is set, any TLB entries
-				 * mapping "sva" don't allow write access, so
-				 * they needn't be invalidated.
-				 */
-				if (va != va_next) {
-					pmap_invalidate_range(pmap, va, sva);
-					va = va_next;
-				}
-			}
-			*pte = pbits;
-		}
-		if (va != va_next)
-			pmap_invalidate_range(pmap, va, sva);
-	}
-	PMAP_UNLOCK(pmap);
-}
-
-/*
- *	Insert the given physical page (p) at
- *	the specified virtual address (v) in the
- *	target physical map with the protection requested.
- *
- *	If specified, the page will be wired down, meaning
- *	that the related pte can not be reclaimed.
- *
- *	NB:  This is the only routine which MAY NOT lazy-evaluate
- *	or lose information.  That is, this routine must actually
- *	insert this page into the given map NOW.
- */
-int
-pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
-    u_int flags, int8_t psind __unused)
-{
-	vm_paddr_t pa, opa;
-	pt_entry_t *pte;
-	pt_entry_t origpte, newpte;
-	pv_entry_t pv;
-	vm_page_t mpte, om;
-
-	va &= ~PAGE_MASK;
- 	KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
-	KASSERT((m->oflags & VPO_UNMANAGED) != 0 || !VA_IS_CLEANMAP(va),
-	    ("pmap_enter: managed mapping within the clean submap"));
-	if ((m->oflags & VPO_UNMANAGED) == 0)
-		VM_PAGE_OBJECT_BUSY_ASSERT(m);
-	pa = VM_PAGE_TO_PHYS(m);
-	newpte = TLBLO_PA_TO_PFN(pa) | init_pte_prot(m, flags, prot);
-	if ((flags & PMAP_ENTER_WIRED) != 0)
-		newpte |= PTE_W;
-	if (is_kernel_pmap(pmap))
-		newpte |= PTE_G;
-	PMAP_PTE_SET_CACHE_BITS(newpte, pa, m);
-	if ((m->oflags & VPO_UNMANAGED) == 0)
-		newpte |= PTE_MANAGED;
-
-	mpte = NULL;
-
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-
-	/*
-	 * In the case that a page table page is not resident, we are
-	 * creating it here.
-	 */
-	if (va < VM_MAXUSER_ADDRESS) {
-		mpte = pmap_allocpte(pmap, va, flags);
-		if (mpte == NULL) {
-			KASSERT((flags & PMAP_ENTER_NOSLEEP) != 0,
-			    ("pmap_allocpte failed with sleep allowed"));
-			rw_wunlock(&pvh_global_lock);
-			PMAP_UNLOCK(pmap);
-			return (KERN_RESOURCE_SHORTAGE);
-		}
-	}
-	pte = pmap_pte(pmap, va);
-
-	/*
-	 * Page Directory table entry not valid, we need a new PT page
-	 */
-	if (pte == NULL) {
-		panic("pmap_enter: invalid page directory, pdir=%p, va=%p",
-		    (void *)pmap->pm_segtab, (void *)va);
-	}
-
-	origpte = *pte;
-	KASSERT(!pte_test(&origpte, PTE_D | PTE_RO | PTE_V),
-	    ("pmap_enter: modified page not writable: va: %p, pte: %#jx",
-	    (void *)va, (uintmax_t)origpte));
-	opa = TLBLO_PTE_TO_PA(origpte);
-
-	/*
-	 * Mapping has not changed, must be protection or wiring change.
-	 */
-	if (pte_test(&origpte, PTE_V) && opa == pa) {
-		/*
-		 * Wiring change, just update stats. We don't worry about
-		 * wiring PT pages as they remain resident as long as there
-		 * are valid mappings in them. Hence, if a user page is
-		 * wired, the PT page will be also.
-		 */
-		if (pte_test(&newpte, PTE_W) && !pte_test(&origpte, PTE_W))
-			pmap->pm_stats.wired_count++;
-		else if (!pte_test(&newpte, PTE_W) && pte_test(&origpte,
-		    PTE_W))
-			pmap->pm_stats.wired_count--;
-
-		/*
-		 * Remove extra pte reference
-		 */
-		if (mpte)
-			mpte->ref_count--;
-
-		if (pte_test(&origpte, PTE_MANAGED)) {
-			m->md.pv_flags |= PV_TABLE_REF;
-			if (!pte_test(&newpte, PTE_RO))
-				vm_page_aflag_set(m, PGA_WRITEABLE);
-		}
-		goto validate;
-	}
-
-	pv = NULL;
-
-	/*
-	 * Mapping has changed, invalidate old range and fall through to
-	 * handle validating new mapping.
-	 */
-	if (opa) {
-		if (is_kernel_pmap(pmap))
-			*pte = PTE_G;
-		else
-			*pte = 0;
-		if (pte_test(&origpte, PTE_W))
-			pmap->pm_stats.wired_count--;
-		if (pte_test(&origpte, PTE_MANAGED)) {
-			om = PHYS_TO_VM_PAGE(opa);
-			if (pte_test(&origpte, PTE_D))
-				vm_page_dirty(om);
-			if ((om->md.pv_flags & PV_TABLE_REF) != 0) {
-				om->md.pv_flags &= ~PV_TABLE_REF;
-				vm_page_aflag_set(om, PGA_REFERENCED);
-			}
-			pv = pmap_pvh_remove(&om->md, pmap, va);
-			if (!pte_test(&newpte, PTE_MANAGED))
-				free_pv_entry(pmap, pv);
-			if ((om->a.flags & PGA_WRITEABLE) != 0 &&
-			    TAILQ_EMPTY(&om->md.pv_list))
-				vm_page_aflag_clear(om, PGA_WRITEABLE);
-		}
-		pmap_invalidate_page(pmap, va);
-		origpte = 0;
-		if (mpte != NULL) {
-			mpte->ref_count--;
-			KASSERT(mpte->ref_count > 0,
-			    ("pmap_enter: missing reference to page table page,"
-			    " va: %p", (void *)va));
-		}
-	} else
-		pmap->pm_stats.resident_count++;
-
-	/*
-	 * Enter on the PV list if part of our managed memory.
-	 */
-	if (pte_test(&newpte, PTE_MANAGED)) {
-		m->md.pv_flags |= PV_TABLE_REF;
-		if (pv == NULL) {
-			pv = get_pv_entry(pmap, FALSE);
-			pv->pv_va = va;
-		}
-		TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
-		if (!pte_test(&newpte, PTE_RO))
-			vm_page_aflag_set(m, PGA_WRITEABLE);
-	}
-
-	/*
-	 * Increment counters
-	 */
-	if (pte_test(&newpte, PTE_W))
-		pmap->pm_stats.wired_count++;
-
-validate:
-
-#ifdef PMAP_DEBUG
-	printf("pmap_enter:  va: %p -> pa: %p\n", (void *)va, (void *)pa);
-#endif
-
-	/*
-	 * if the mapping or permission bits are different, we need to
-	 * update the pte.
-	 */
-	if (origpte != newpte) {
-		*pte = newpte;
-		if (pte_test(&origpte, PTE_V)) {
-			KASSERT(opa == pa, ("pmap_enter: invalid update"));
-			if (pte_test(&origpte, PTE_D)) {
-				if (pte_test(&origpte, PTE_MANAGED))
-					vm_page_dirty(m);
-			}
-			pmap_update_page(pmap, va, newpte);
-		}
-	}
-
-	/*
-	 * Sync I & D caches for executable pages.  Do this only if the
-	 * target pmap belongs to the current process.  Otherwise, an
-	 * unresolvable TLB miss may occur.
-	 */
-	if (!is_kernel_pmap(pmap) && (pmap == &curproc->p_vmspace->vm_pmap) &&
-	    (prot & VM_PROT_EXECUTE)) {
-		mips_icache_sync_range(va, PAGE_SIZE);
-		mips_dcache_wbinv_range(va, PAGE_SIZE);
-	}
-	rw_wunlock(&pvh_global_lock);
-	PMAP_UNLOCK(pmap);
-	return (KERN_SUCCESS);
-}
-
-/*
- * this code makes some *MAJOR* assumptions:
- * 1. Current pmap & pmap exists.
- * 2. Not wired.
- * 3. Read access.
- * 4. No page table pages.
- * but is *MUCH* faster than pmap_enter...
- */
-
-void
-pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
-{
-
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-	(void)pmap_enter_quick_locked(pmap, va, m, prot, NULL);
-	rw_wunlock(&pvh_global_lock);
-	PMAP_UNLOCK(pmap);
-}
-
-static vm_page_t
-pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
-    vm_prot_t prot, vm_page_t mpte)
-{
-	pt_entry_t *pte, npte;
-	vm_paddr_t pa;
-
-	KASSERT(!VA_IS_CLEANMAP(va) ||
-	    (m->oflags & VPO_UNMANAGED) != 0,
-	    ("pmap_enter_quick_locked: managed mapping within the clean submap"));
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
-
-	/*
-	 * In the case that a page table page is not resident, we are
-	 * creating it here.
-	 */
-	if (va < VM_MAXUSER_ADDRESS) {
-		pd_entry_t *pde;
-		unsigned ptepindex;
-
-		/*
-		 * Calculate pagetable page index
-		 */
-		ptepindex = pmap_pde_pindex(va);
-		if (mpte && (mpte->pindex == ptepindex)) {
-			mpte->ref_count++;
-		} else {
-			/*
-			 * Get the page directory entry
-			 */
-			pde = pmap_pde(pmap, va);
-
-			/*
-			 * If the page table page is mapped, we just
-			 * increment the hold count, and activate it.
-			 */
-			if (pde && *pde != 0) {
-				mpte = PHYS_TO_VM_PAGE(
-				    MIPS_DIRECT_TO_PHYS(*pde));
-				mpte->ref_count++;
-			} else {
-				mpte = _pmap_allocpte(pmap, ptepindex,
-				    PMAP_ENTER_NOSLEEP);
-				if (mpte == NULL)
-					return (mpte);
-			}
-		}
-	} else {
-		mpte = NULL;
-	}
-
-	pte = pmap_pte(pmap, va);
-	if (pte_test(pte, PTE_V)) {
-		if (mpte != NULL) {
-			mpte->ref_count--;
-			mpte = NULL;
-		}
-		return (mpte);
-	}
-
-	/*
-	 * Enter on the PV list if part of our managed memory.
-	 */
-	if ((m->oflags & VPO_UNMANAGED) == 0 &&
-	    !pmap_try_insert_pv_entry(pmap, mpte, va, m)) {
-		if (mpte != NULL) {
-			pmap_unwire_ptp(pmap, va, mpte);
-			mpte = NULL;
-		}
-		return (mpte);
-	}
-
-	/*
-	 * Increment counters
-	 */
-	pmap->pm_stats.resident_count++;
-
-	pa = VM_PAGE_TO_PHYS(m);
-
-	/*
-	 * Now validate mapping with RO protection
-	 */
-	npte = PTE_RO | TLBLO_PA_TO_PFN(pa) | PTE_V;
-	if ((m->oflags & VPO_UNMANAGED) == 0)
-		npte |= PTE_MANAGED;
-
-	PMAP_PTE_SET_CACHE_BITS(npte, pa, m);
-
-	if (is_kernel_pmap(pmap))
-		*pte = npte | PTE_G;
-	else {
-		*pte = npte;
-		/*
-		 * Sync I & D caches.  Do this only if the target pmap
-		 * belongs to the current process.  Otherwise, an
-		 * unresolvable TLB miss may occur. */
-		if (pmap == &curproc->p_vmspace->vm_pmap) {
-			va &= ~PAGE_MASK;
-			mips_icache_sync_range(va, PAGE_SIZE);
-			mips_dcache_wbinv_range(va, PAGE_SIZE);
-		}
-	}
-	return (mpte);
-}
-
-/*
- * Make a temporary mapping for a physical address.  This is only intended
- * to be used for panic dumps.
- *
- * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
- */
-void *
-pmap_kenter_temporary(vm_paddr_t pa, int i)
-{
-	vm_offset_t va;
-
-	if (i != 0)
-		printf("%s: ERROR!!! More than one page of virtual address mapping not supported\n",
-		    __func__);
-
-	if (MIPS_DIRECT_MAPPABLE(pa)) {
-		va = MIPS_PHYS_TO_DIRECT(pa);
-	} else {
-#ifndef __mips_n64    /* XXX : to be converted to new style */
-		pt_entry_t *pte, npte;
-
-		pte = pmap_pte(kernel_pmap, crashdumpva); 
-
-		/* Since this is for the debugger, no locks or any other fun */
-		npte = TLBLO_PA_TO_PFN(pa) | PTE_C_CACHE | PTE_D | PTE_V |
-		    PTE_G;
-		*pte = npte;
-		pmap_update_page(kernel_pmap, crashdumpva, npte);
-		va = crashdumpva;
-#endif
-	}
-	return ((void *)va);
-}
-
-void
-pmap_kenter_temporary_free(vm_paddr_t pa)
-{
- #ifndef __mips_n64    /* XXX : to be converted to new style */
-	pt_entry_t *pte;
- #endif
-	if (MIPS_DIRECT_MAPPABLE(pa)) {
-		/* nothing to do for this case */
-		return;
-	}
-#ifndef __mips_n64    /* XXX : to be converted to new style */
-	pte = pmap_pte(kernel_pmap, crashdumpva);
-	*pte = PTE_G;
-	pmap_invalidate_page(kernel_pmap, crashdumpva);
-#endif
-}
-
-/*
- * Maps a sequence of resident pages belonging to the same object.
- * The sequence begins with the given page m_start.  This page is
- * mapped at the given virtual address start.  Each subsequent page is
- * mapped at a virtual address that is offset from start by the same
- * amount as the page is offset from m_start within the object.  The
- * last page in the sequence is the page with the largest offset from
- * m_start that can be mapped at a virtual address less than the given
- * virtual address end.  Not every virtual page between start and end
- * is mapped; only those for which a resident page exists with the
- * corresponding offset from m_start are mapped.
- */
-void
-pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
-    vm_page_t m_start, vm_prot_t prot)
-{
-	vm_page_t m, mpte;
-	vm_pindex_t diff, psize;
-
-	VM_OBJECT_ASSERT_LOCKED(m_start->object);
-
-	psize = atop(end - start);
-	mpte = NULL;
-	m = m_start;
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-	while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
-		mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
-		    prot, mpte);
-		m = TAILQ_NEXT(m, listq);
-	}
-	rw_wunlock(&pvh_global_lock);
- 	PMAP_UNLOCK(pmap);
-}
-
-/*
- * pmap_object_init_pt preloads the ptes for a given object
- * into the specified pmap.  This eliminates the blast of soft
- * faults on process startup and immediately after an mmap.
- */
-void
-pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
-    vm_object_t object, vm_pindex_t pindex, vm_size_t size)
-{
-	VM_OBJECT_ASSERT_WLOCKED(object);
-	KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
-	    ("pmap_object_init_pt: non-device object"));
-}
-
-/*
- *	Clear the wired attribute from the mappings for the specified range of
- *	addresses in the given pmap.  Every valid mapping within that range
- *	must have the wired attribute set.  In contrast, invalid mappings
- *	cannot have the wired attribute set, so they are ignored.
- *
- *	The wired attribute of the page table entry is not a hardware feature,
- *	so there is no need to invalidate any TLB entries.
- */
-void
-pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
-	pd_entry_t *pde, *pdpe;
-	pt_entry_t *pte;
-	vm_offset_t va_next;
-
-	PMAP_LOCK(pmap);
-	for (; sva < eva; sva = va_next) {
-		pdpe = pmap_segmap(pmap, sva);
-#ifdef __mips_n64
-		if (*pdpe == NULL) {
-			va_next = (sva + NBSEG) & ~SEGMASK;
-			if (va_next < sva)
-				va_next = eva;
-			continue;
-		}
-#endif
-		va_next = (sva + NBPDR) & ~PDRMASK;
-		if (va_next < sva)
-			va_next = eva;
-		pde = pmap_pdpe_to_pde(pdpe, sva);
-		if (*pde == NULL)
-			continue;
-		if (va_next > eva)
-			va_next = eva;
-		for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
-		    sva += PAGE_SIZE) {
-			if (!pte_test(pte, PTE_V))
-				continue;
-			if (!pte_test(pte, PTE_W))
-				panic("pmap_unwire: pte %#jx is missing PG_W",
-				    (uintmax_t)*pte);
-			pte_clear(pte, PTE_W);
-			pmap->pm_stats.wired_count--;
-		}
-	}
-	PMAP_UNLOCK(pmap);
-}
-
-/*
- *	Copy the range specified by src_addr/len
- *	from the source map to the range dst_addr/len
- *	in the destination map.
- *
- *	This routine is only advisory and need not do anything.
- */
-
-void
-pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
-    vm_size_t len, vm_offset_t src_addr)
-{
-}
-
-/*
- *	pmap_zero_page zeros the specified hardware page by mapping
- *	the page into KVM and using bzero to clear its contents.
- *
- * 	Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
- */
-void
-pmap_zero_page(vm_page_t m)
-{
-	vm_offset_t va;
-	vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
-
-	if (MIPS_DIRECT_MAPPABLE(phys)) {
-		va = MIPS_PHYS_TO_DIRECT(phys);
-		bzero((caddr_t)va, PAGE_SIZE);
-		mips_dcache_wbinv_range(va, PAGE_SIZE);
-	} else {
-		va = pmap_lmem_map1(phys);
-		bzero((caddr_t)va, PAGE_SIZE);
-		mips_dcache_wbinv_range(va, PAGE_SIZE);
-		pmap_lmem_unmap();
-	}
-}
-
-/*
- *	pmap_zero_page_area zeros the specified hardware page by mapping
- *	the page into KVM and using bzero to clear its contents.
- *
- *	off and size may not cover an area beyond a single hardware page.
- */
-void
-pmap_zero_page_area(vm_page_t m, int off, int size)
-{
-	vm_offset_t va;
-	vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
-
-	if (MIPS_DIRECT_MAPPABLE(phys)) {
-		va = MIPS_PHYS_TO_DIRECT(phys);
-		bzero((char *)(caddr_t)va + off, size);
-		mips_dcache_wbinv_range(va + off, size);
-	} else {
-		va = pmap_lmem_map1(phys);
-		bzero((char *)va + off, size);
-		mips_dcache_wbinv_range(va + off, size);
-		pmap_lmem_unmap();
-	}
-}
-
-/*
- *	pmap_copy_page copies the specified (machine independent)
- *	page by mapping the page into virtual memory and using
- *	bcopy to copy the page, one machine dependent page at a
- *	time.
- *
- * 	Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
- */
-void
-pmap_copy_page(vm_page_t src, vm_page_t dst)
-{
-	vm_offset_t va_src, va_dst;
-	vm_paddr_t phys_src = VM_PAGE_TO_PHYS(src);
-	vm_paddr_t phys_dst = VM_PAGE_TO_PHYS(dst);
-
-	if (MIPS_DIRECT_MAPPABLE(phys_src) && MIPS_DIRECT_MAPPABLE(phys_dst)) {
-		/* easy case, all can be accessed via KSEG0 */
-		/*
-		 * Flush all caches for VA that are mapped to this page
-		 * to make sure that data in SDRAM is up to date
-		 */
-		pmap_flush_pvcache(src);
-		mips_dcache_wbinv_range_index(
-		    MIPS_PHYS_TO_DIRECT(phys_dst), PAGE_SIZE);
-		va_src = MIPS_PHYS_TO_DIRECT(phys_src);
-		va_dst = MIPS_PHYS_TO_DIRECT(phys_dst);
-		bcopy((caddr_t)va_src, (caddr_t)va_dst, PAGE_SIZE);
-		mips_dcache_wbinv_range(va_dst, PAGE_SIZE);
-	} else {
-		va_src = pmap_lmem_map2(phys_src, phys_dst);
-		va_dst = va_src + PAGE_SIZE;
-		bcopy((void *)va_src, (void *)va_dst, PAGE_SIZE);
-		mips_dcache_wbinv_range(va_dst, PAGE_SIZE);
-		pmap_lmem_unmap();
-	}
-}
-
-int unmapped_buf_allowed;
-
-void
-pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
-    vm_offset_t b_offset, int xfersize)
-{
-	char *a_cp, *b_cp;
-	vm_page_t a_m, b_m;
-	vm_offset_t a_pg_offset, b_pg_offset;
-	vm_paddr_t a_phys, b_phys;
-	int cnt;
-
-	while (xfersize > 0) {
-		a_pg_offset = a_offset & PAGE_MASK;
-		cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
-		a_m = ma[a_offset >> PAGE_SHIFT];
-		a_phys = VM_PAGE_TO_PHYS(a_m);
-		b_pg_offset = b_offset & PAGE_MASK;
-		cnt = min(cnt, PAGE_SIZE - b_pg_offset);
-		b_m = mb[b_offset >> PAGE_SHIFT];
-		b_phys = VM_PAGE_TO_PHYS(b_m);
-		if (MIPS_DIRECT_MAPPABLE(a_phys) &&
-		    MIPS_DIRECT_MAPPABLE(b_phys)) {
-			pmap_flush_pvcache(a_m);
-			mips_dcache_wbinv_range_index(
-			    MIPS_PHYS_TO_DIRECT(b_phys), PAGE_SIZE);
-			a_cp = (char *)MIPS_PHYS_TO_DIRECT(a_phys) +
-			    a_pg_offset;
-			b_cp = (char *)MIPS_PHYS_TO_DIRECT(b_phys) +
-			    b_pg_offset;
-			bcopy(a_cp, b_cp, cnt);
-			mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt);
-		} else {
-			a_cp = (char *)pmap_lmem_map2(a_phys, b_phys);
-			b_cp = (char *)a_cp + PAGE_SIZE;
-			a_cp += a_pg_offset;
-			b_cp += b_pg_offset;
-			bcopy(a_cp, b_cp, cnt);
-			mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt);
-			pmap_lmem_unmap();
-		}
-		a_offset += cnt;
-		b_offset += cnt;
-		xfersize -= cnt;
-	}
-}
-
-vm_offset_t
-pmap_quick_enter_page(vm_page_t m)
-{
-#if defined(__mips_n64)
-	return MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
-#else
-	vm_offset_t qaddr;
-	vm_paddr_t pa;
-	pt_entry_t *pte, npte;
-
-	pa = VM_PAGE_TO_PHYS(m);
-
-	if (MIPS_DIRECT_MAPPABLE(pa)) {
-		if (pmap_page_get_memattr(m) != VM_MEMATTR_WRITE_BACK)
-			return (MIPS_PHYS_TO_DIRECT_UNCACHED(pa));
-		else
-			return (MIPS_PHYS_TO_DIRECT(pa));
-	}
-	critical_enter();
-	qaddr = PCPU_GET(qmap_addr);
-	pte = PCPU_GET(qmap_ptep);
-
-	KASSERT(*pte == PTE_G, ("pmap_quick_enter_page: PTE busy"));
-
-	npte = TLBLO_PA_TO_PFN(pa) | PTE_D | PTE_V | PTE_G;
-	PMAP_PTE_SET_CACHE_BITS(npte, pa, m);
-	*pte = npte;
-
-	return (qaddr);
-#endif
-}
-
-void
-pmap_quick_remove_page(vm_offset_t addr)
-{
-	mips_dcache_wbinv_range(addr, PAGE_SIZE);
-
-#if !defined(__mips_n64)
-	pt_entry_t *pte;
-
-	if (addr >= MIPS_KSEG0_START && addr < MIPS_KSEG0_END)
-		return;
-
-	pte = PCPU_GET(qmap_ptep);
-
-	KASSERT(*pte != PTE_G,
-	    ("pmap_quick_remove_page: PTE not in use"));
-	KASSERT(PCPU_GET(qmap_addr) == addr,
-	    ("pmap_quick_remove_page: invalid address"));
-
-	*pte = PTE_G;
-	tlb_invalidate_address(kernel_pmap, addr);
-	critical_exit();
-#endif
-}
-
-/*
- * Returns true if the pmap's pv is one of the first
- * 16 pvs linked to from this page.  This count may
- * be changed upwards or downwards in the future; it
- * is only necessary that true be returned for a small
- * subset of pmaps for proper page aging.
- */
-boolean_t
-pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
-{
-	pv_entry_t pv;
-	int loops = 0;
-	boolean_t rv;
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_page_exists_quick: page %p is not managed", m));
-	rv = FALSE;
-	rw_wlock(&pvh_global_lock);
-	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
-		if (PV_PMAP(pv) == pmap) {
-			rv = TRUE;
-			break;
-		}
-		loops++;
-		if (loops >= 16)
-			break;
-	}
-	rw_wunlock(&pvh_global_lock);
-	return (rv);
-}
-
-/*
- * Remove all pages from specified address space
- * this aids process exit speeds.  Also, this code
- * is special cased for current process only, but
- * can have the more generic (and slightly slower)
- * mode enabled.  This is much faster than pmap_remove
- * in the case of running down an entire address space.
- */
-void
-pmap_remove_pages(pmap_t pmap)
-{
-	pd_entry_t *pde;
-	pt_entry_t *pte, tpte;
-	pv_entry_t pv;
-	vm_page_t m;
-	struct pv_chunk *pc, *npc;
-	u_long inuse, bitmask;
-	int allfree, bit, field, idx;
-
-	if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
-		printf("warning: pmap_remove_pages called with non-current pmap\n");
-		return;
-	}
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-	TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
-		allfree = 1;
-		for (field = 0; field < _NPCM; field++) {
-			inuse = ~pc->pc_map[field] & pc_freemask[field];
-			while (inuse != 0) {
-				bit = ffsl(inuse) - 1;
-				bitmask = 1UL << bit;
-				idx = field * sizeof(inuse) * NBBY + bit;
-				pv = &pc->pc_pventry[idx];
-				inuse &= ~bitmask;
-
-				pde = pmap_pde(pmap, pv->pv_va);
-				KASSERT(pde != NULL && *pde != 0,
-				    ("pmap_remove_pages: pde"));
-				pte = pmap_pde_to_pte(pde, pv->pv_va);
-				if (!pte_test(pte, PTE_V))
-					panic("pmap_remove_pages: bad pte");
-				tpte = *pte;
-
-/*
- * We cannot remove wired pages from a process' mapping at this time
- */
-				if (pte_test(&tpte, PTE_W)) {
-					allfree = 0;
-					continue;
-				}
-				*pte = is_kernel_pmap(pmap) ? PTE_G : 0;
-
-				m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(tpte));
-				KASSERT(m != NULL,
-				    ("pmap_remove_pages: bad tpte %#jx",
-				    (uintmax_t)tpte));
-
-				/*
-				 * Update the vm_page_t clean and reference bits.
-				 */
-				if (pte_test(&tpte, PTE_D))
-					vm_page_dirty(m);
-
-				/* Mark free */
-				PV_STAT(pv_entry_frees++);
-				PV_STAT(pv_entry_spare++);
-				pv_entry_count--;
-				pc->pc_map[field] |= bitmask;
-				pmap->pm_stats.resident_count--;
-				TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
-				if (TAILQ_EMPTY(&m->md.pv_list))
-					vm_page_aflag_clear(m, PGA_WRITEABLE);
-
-				/*
-				 * For simplicity, unconditionally call
-				 * pmap_invalidate_all(), below.
-				 */
-				(void)pmap_unuse_pt(pmap, pv->pv_va, *pde);
-			}
-		}
-		if (allfree) {
-			TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
-			free_pv_chunk(pc);
-		}
-	}
-	pmap_invalidate_all(pmap);
-	PMAP_UNLOCK(pmap);
-	rw_wunlock(&pvh_global_lock);
-}
-
-/*
- * pmap_testbit tests bits in pte's
- */
-static boolean_t
-pmap_testbit(vm_page_t m, int bit)
-{
-	pv_entry_t pv;
-	pmap_t pmap;
-	pt_entry_t *pte;
-	boolean_t rv = FALSE;
-
-	if (m->oflags & VPO_UNMANAGED)
-		return (rv);
-
-	rw_assert(&pvh_global_lock, RA_WLOCKED);
-	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
-		pmap = PV_PMAP(pv);
-		PMAP_LOCK(pmap);
-		pte = pmap_pte(pmap, pv->pv_va);
-		rv = pte_test(pte, bit);
-		PMAP_UNLOCK(pmap);
-		if (rv)
-			break;
-	}
-	return (rv);
-}
-
-/*
- *	pmap_page_wired_mappings:
- *
- *	Return the number of managed mappings to the given physical page
- *	that are wired.
- */
-int
-pmap_page_wired_mappings(vm_page_t m)
-{
-	pv_entry_t pv;
-	pmap_t pmap;
-	pt_entry_t *pte;
-	int count;
-
-	count = 0;
-	if ((m->oflags & VPO_UNMANAGED) != 0)
-		return (count);
-	rw_wlock(&pvh_global_lock);
-	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
-		pmap = PV_PMAP(pv);
-		PMAP_LOCK(pmap);
-		pte = pmap_pte(pmap, pv->pv_va);
-		if (pte_test(pte, PTE_W))
-			count++;
-		PMAP_UNLOCK(pmap);
-	}
-	rw_wunlock(&pvh_global_lock);
-	return (count);
-}
-
-/*
- * Clear the write and modified bits in each of the given page's mappings.
- */
-void
-pmap_remove_write(vm_page_t m)
-{
-	pmap_t pmap;
-	pt_entry_t pbits, *pte;
-	pv_entry_t pv;
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_remove_write: page %p is not managed", m));
-	vm_page_assert_busied(m);
-
-	if (!pmap_page_is_write_mapped(m))
-		return;
-	rw_wlock(&pvh_global_lock);
-	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
-		pmap = PV_PMAP(pv);
-		PMAP_LOCK(pmap);
-		pte = pmap_pte(pmap, pv->pv_va);
-		KASSERT(pte != NULL && pte_test(pte, PTE_V),
-		    ("page on pv_list has no pte"));
-		pbits = *pte;
-		if (pte_test(&pbits, PTE_D)) {
-			pte_clear(&pbits, PTE_D);
-			vm_page_dirty(m);
-		}
-		pte_set(&pbits, PTE_RO);
-		if (pbits != *pte) {
-			*pte = pbits;
-			pmap_update_page(pmap, pv->pv_va, pbits);
-		}
-		PMAP_UNLOCK(pmap);
-	}
-	vm_page_aflag_clear(m, PGA_WRITEABLE);
-	rw_wunlock(&pvh_global_lock);
-}
-
-/*
- *	pmap_ts_referenced:
- *
- *	Return the count of reference bits for a page, clearing all of them.
- */
-int
-pmap_ts_referenced(vm_page_t m)
-{
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_ts_referenced: page %p is not managed", m));
-	if (m->md.pv_flags & PV_TABLE_REF) {
-		rw_wlock(&pvh_global_lock);
-		m->md.pv_flags &= ~PV_TABLE_REF;
-		rw_wunlock(&pvh_global_lock);
-		return (1);
-	}
-	return (0);
-}
-
-/*
- *	pmap_is_modified:
- *
- *	Return whether or not the specified physical page was modified
- *	in any physical maps.
- */
-boolean_t
-pmap_is_modified(vm_page_t m)
-{
-	boolean_t rv;
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_is_modified: page %p is not managed", m));
-
-	/*
-	 * If the page is not busied then this check is racy.
-	 */
-	if (!pmap_page_is_write_mapped(m))
-		return (FALSE);
-
-	rw_wlock(&pvh_global_lock);
-	rv = pmap_testbit(m, PTE_D);
-	rw_wunlock(&pvh_global_lock);
-	return (rv);
-}
-
-/* N/C */
-
-/*
- *	pmap_is_prefaultable:
- *
- *	Return whether or not the specified virtual address is elgible
- *	for prefault.
- */
-boolean_t
-pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
-{
-	pd_entry_t *pde;
-	pt_entry_t *pte;
-	boolean_t rv;
-
-	rv = FALSE;
-	PMAP_LOCK(pmap);
-	pde = pmap_pde(pmap, addr);
-	if (pde != NULL && *pde != 0) {
-		pte = pmap_pde_to_pte(pde, addr);
-		rv = (*pte == 0);
-	}
-	PMAP_UNLOCK(pmap);
-	return (rv);
-}
-
-/*
- *	Apply the given advice to the specified range of addresses within the
- *	given pmap.  Depending on the advice, clear the referenced and/or
- *	modified flags in each mapping and set the mapped page's dirty field.
- */
-void
-pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
-{
-	pd_entry_t *pde, *pdpe;
-	pt_entry_t *pte;
-	vm_offset_t va, va_next;
-	vm_paddr_t pa;
-	vm_page_t m;
-
-	if (advice != MADV_DONTNEED && advice != MADV_FREE)
-		return;
-	rw_wlock(&pvh_global_lock);
-	PMAP_LOCK(pmap);
-	for (; sva < eva; sva = va_next) {
-		pdpe = pmap_segmap(pmap, sva);
-#ifdef __mips_n64
-		if (*pdpe == 0) {
-			va_next = (sva + NBSEG) & ~SEGMASK;
-			if (va_next < sva)
-				va_next = eva;
-			continue;
-		}
-#endif
-		va_next = (sva + NBPDR) & ~PDRMASK;
-		if (va_next < sva)
-			va_next = eva;
-
-		pde = pmap_pdpe_to_pde(pdpe, sva);
-		if (*pde == NULL)
-			continue;
-
-		/*
-		 * Limit our scan to either the end of the va represented
-		 * by the current page table page, or to the end of the
-		 * range being write protected.
-		 */
-		if (va_next > eva)
-			va_next = eva;
-
-		va = va_next;
-		for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
-		    sva += PAGE_SIZE) {
-			if (!pte_test(pte, PTE_MANAGED | PTE_V)) {
-				if (va != va_next) {
-					pmap_invalidate_range(pmap, va, sva);
-					va = va_next;
-				}
-				continue;
-			}
-			pa = TLBLO_PTE_TO_PA(*pte);
-			m = PHYS_TO_VM_PAGE(pa);
-			m->md.pv_flags &= ~PV_TABLE_REF;
-			if (pte_test(pte, PTE_D)) {
-				if (advice == MADV_DONTNEED) {
-					/*
-					 * Future calls to pmap_is_modified()
-					 * can be avoided by making the page
-					 * dirty now.
-					 */
-					vm_page_dirty(m);
-				} else {
-					pte_clear(pte, PTE_D);
-					if (va == va_next)
-						va = sva;
-				}
-			} else {
-				/*
-				 * Unless PTE_D is set, any TLB entries
-				 * mapping "sva" don't allow write access, so
-				 * they needn't be invalidated.
-				 */
-				if (va != va_next) {
-					pmap_invalidate_range(pmap, va, sva);
-					va = va_next;
-				}
-			}
-		}
-		if (va != va_next)
-			pmap_invalidate_range(pmap, va, sva);
-	}
-	rw_wunlock(&pvh_global_lock);
-	PMAP_UNLOCK(pmap);
-}
-
-/*
- *	Clear the modify bits on the specified physical page.
- */
-void
-pmap_clear_modify(vm_page_t m)
-{
-	pmap_t pmap;
-	pt_entry_t *pte;
-	pv_entry_t pv;
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_clear_modify: page %p is not managed", m));
-	vm_page_assert_busied(m);
-
-	if (!pmap_page_is_write_mapped(m))
-		return;
-	rw_wlock(&pvh_global_lock);
-	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
-		pmap = PV_PMAP(pv);
-		PMAP_LOCK(pmap);
-		pte = pmap_pte(pmap, pv->pv_va);
-		if (pte_test(pte, PTE_D)) {
-			pte_clear(pte, PTE_D);
-			pmap_update_page(pmap, pv->pv_va, *pte);
-		}
-		PMAP_UNLOCK(pmap);
-	}
-	rw_wunlock(&pvh_global_lock);
-}
-
-/*
- *	pmap_is_referenced:
- *
- *	Return whether or not the specified physical page was referenced
- *	in any physical maps.
- */
-boolean_t
-pmap_is_referenced(vm_page_t m)
-{
-
-	KASSERT((m->oflags & VPO_UNMANAGED) == 0,
-	    ("pmap_is_referenced: page %p is not managed", m));
-	return ((m->md.pv_flags & PV_TABLE_REF) != 0);
-}
-
-/*
- * Miscellaneous support routines follow
- */
-
-/*
- * Map a set of physical memory pages into the kernel virtual
- * address space. Return a pointer to where it is mapped. This
- * routine is intended to be used for mapping device memory,
- * NOT real memory.
- *
- * Use XKPHYS uncached for 64 bit, and KSEG1 where possible for 32 bit.
- */
-void *
-pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
-{
-        vm_offset_t va, tmpva, offset;
-
-	/*
-	 * KSEG1 maps only first 512M of phys address space. For
-	 * pa > 0x20000000 we should make proper mapping * using pmap_kenter.
-	 */
-	if (MIPS_DIRECT_MAPPABLE(pa + size - 1) && ma == VM_MEMATTR_UNCACHEABLE)
-		return ((void *)MIPS_PHYS_TO_DIRECT_UNCACHED(pa));
-	else {
-		offset = pa & PAGE_MASK;
-		size = roundup(size + offset, PAGE_SIZE);
-
-		va = kva_alloc(size);
-		if (!va)
-			panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
-		pa = trunc_page(pa);
-		for (tmpva = va; size > 0;) {
-			pmap_kenter_attr(tmpva, pa, ma);
-			size -= PAGE_SIZE;
-			tmpva += PAGE_SIZE;
-			pa += PAGE_SIZE;
-		}
-	}
-
-	return ((void *)(va + offset));
-}
-
-void *
-pmap_mapdev(vm_paddr_t pa, vm_size_t size)
-{
-	return pmap_mapdev_attr(pa, size, VM_MEMATTR_UNCACHEABLE);
-}
-
-void
-pmap_unmapdev(vm_offset_t va, vm_size_t size)
-{
-#ifndef __mips_n64
-	vm_offset_t base, offset;
-
-	/* If the address is within KSEG1 then there is nothing to do */
-	if (va >= MIPS_KSEG1_START && va <= MIPS_KSEG1_END)
-		return;
-
-	base = trunc_page(va);
-	offset = va & PAGE_MASK;
-	size = roundup(size + offset, PAGE_SIZE);
-	pmap_qremove(base, atop(size));
-	kva_free(base, size);
-#endif
-}
-
-/*
- * Perform the pmap work for mincore(2).  If the page is not both referenced and
- * modified by this pmap, returns its physical address so that the caller can
- * find other mappings.
- */
-int
-pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
-{
-	pt_entry_t *ptep, pte;
-	vm_paddr_t pa;
-	vm_page_t m;
-	int val;
-
-	PMAP_LOCK(pmap);
-	ptep = pmap_pte(pmap, addr);
-	pte = (ptep != NULL) ? *ptep : 0;
-	if (!pte_test(&pte, PTE_V)) {
-		PMAP_UNLOCK(pmap);
-		return (0);
-	}
-	val = MINCORE_INCORE;
-	if (pte_test(&pte, PTE_D))
-		val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
-	pa = TLBLO_PTE_TO_PA(pte);
-	if (pte_test(&pte, PTE_MANAGED)) {
-		/*
-		 * This may falsely report the given address as
-		 * MINCORE_REFERENCED.  Unfortunately, due to the lack of
-		 * per-PTE reference information, it is impossible to
-		 * determine if the address is MINCORE_REFERENCED.
-		 */
-		m = PHYS_TO_VM_PAGE(pa);
-		if ((m->a.flags & PGA_REFERENCED) != 0)
-			val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
-	}
-	if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
-	    (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
-	    pte_test(&pte, PTE_MANAGED)) {
-		*pap = pa;
-	}
-	PMAP_UNLOCK(pmap);
-	return (val);
-}
-
-void
-pmap_activate(struct thread *td)
-{
-	pmap_t pmap, oldpmap;
-	struct proc *p = td->td_proc;
-	u_int cpuid;
-
-	critical_enter();
-
-	pmap = vmspace_pmap(p->p_vmspace);
-	oldpmap = PCPU_GET(curpmap);
-	cpuid = PCPU_GET(cpuid);
-
-	if (oldpmap)
-		CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active);
-	CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
-	pmap_asid_alloc(pmap);
-	if (td == curthread) {
-		PCPU_SET(segbase, pmap->pm_segtab);
-		mips_wr_entryhi(pmap->pm_asid[cpuid].asid);
-	}
-
-	PCPU_SET(curpmap, pmap);
-	critical_exit();
-}
-
-static void
-pmap_sync_icache_one(void *arg __unused)
-{
-
-	mips_icache_sync_all();
-	mips_dcache_wbinv_all();
-}
-
-void
-pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
-{
-
-	smp_rendezvous(NULL, pmap_sync_icache_one, NULL, NULL);
-}
-
-/*
- *	Increase the starting virtual address of the given mapping if a
- *	different alignment might result in more superpage mappings.
- */
-void
-pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
-    vm_offset_t *addr, vm_size_t size)
-{
-	vm_offset_t superpage_offset;
-
-	if (size < PDRSIZE)
-		return;
-	if (object != NULL && (object->flags & OBJ_COLORED) != 0)
-		offset += ptoa(object->pg_color);
-	superpage_offset = offset & PDRMASK;
-	if (size - ((PDRSIZE - superpage_offset) & PDRMASK) < PDRSIZE ||
-	    (*addr & PDRMASK) == superpage_offset)
-		return;
-	if ((*addr & PDRMASK) < superpage_offset)
-		*addr = (*addr & ~PDRMASK) + superpage_offset;
-	else
-		*addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
-}
-
-#ifdef DDB
-DB_SHOW_COMMAND(ptable, ddb_pid_dump)
-{
-	pmap_t pmap;
-	struct thread *td = NULL;
-	struct proc *p;
-	int i, j, k;
-	vm_paddr_t pa;
-	vm_offset_t va;
-
-	if (have_addr) {
-		td = db_lookup_thread(addr, true);
-		if (td == NULL) {
-			db_printf("Invalid pid or tid");
-			return;
-		}
-		p = td->td_proc;
-		if (p->p_vmspace == NULL) {
-			db_printf("No vmspace for process");
-			return;
-		}
-			pmap = vmspace_pmap(p->p_vmspace);
-	} else
-		pmap = kernel_pmap;
-
-	db_printf("pmap:%p segtab:%p asid:%x generation:%x\n",
-	    pmap, pmap->pm_segtab, pmap->pm_asid[0].asid,
-	    pmap->pm_asid[0].gen);
-	for (i = 0; i < NPDEPG; i++) {
-		pd_entry_t *pdpe;
-		pt_entry_t *pde;
-		pt_entry_t pte;
-
-		pdpe = (pd_entry_t *)pmap->pm_segtab[i];
-		if (pdpe == NULL)
-			continue;
-		db_printf("[%4d] %p\n", i, pdpe);
-#ifdef __mips_n64
-		for (j = 0; j < NPDEPG; j++) {
-			pde = (pt_entry_t *)pdpe[j];
-			if (pde == NULL)
-				continue;
-			db_printf("\t[%4d] %p\n", j, pde);
-#else
-		{
-			j = 0;
-			pde =  (pt_entry_t *)pdpe;
-#endif
-			for (k = 0; k < NPTEPG; k++) {
-				pte = pde[k];
-				if (pte == 0 || !pte_test(&pte, PTE_V))
-					continue;
-				pa = TLBLO_PTE_TO_PA(pte);
-				va = ((u_long)i << SEGSHIFT) | (j << PDRSHIFT) | (k << PAGE_SHIFT);
-				db_printf("\t\t[%04d] va: %p pte: %8jx pa:%jx\n",
-				       k, (void *)va, (uintmax_t)pte, (uintmax_t)pa);
-			}
-		}
-	}
-}
-#endif
-
-/*
- * Allocate TLB address space tag (called ASID or TLBPID) and return it.
- * It takes almost as much or more time to search the TLB for a
- * specific ASID and flush those entries as it does to flush the entire TLB.
- * Therefore, when we allocate a new ASID, we just take the next number. When
- * we run out of numbers, we flush the TLB, increment the generation count
- * and start over. ASID zero is reserved for kernel use.
- */
-static void
-pmap_asid_alloc(pmap)
-	pmap_t pmap;
-{
-	if (pmap->pm_asid[PCPU_GET(cpuid)].asid != PMAP_ASID_RESERVED &&
-	    pmap->pm_asid[PCPU_GET(cpuid)].gen == PCPU_GET(asid_generation));
-	else {
-		if (PCPU_GET(next_asid) == pmap_max_asid) {
-			tlb_invalidate_all_user(NULL);
-			PCPU_SET(asid_generation,
-			    (PCPU_GET(asid_generation) + 1) & ASIDGEN_MASK);
-			if (PCPU_GET(asid_generation) == 0) {
-				PCPU_SET(asid_generation, 1);
-			}
-			PCPU_SET(next_asid, 1);	/* 0 means invalid */
-		}
-		pmap->pm_asid[PCPU_GET(cpuid)].asid = PCPU_GET(next_asid);
-		pmap->pm_asid[PCPU_GET(cpuid)].gen = PCPU_GET(asid_generation);
-		PCPU_SET(next_asid, PCPU_GET(next_asid) + 1);
-	}
-}
-
-static pt_entry_t
-init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot)
-{
-	pt_entry_t rw;
-
-	if (!(prot & VM_PROT_WRITE))
-		rw = PTE_V | PTE_RO;
-	else if ((m->oflags & VPO_UNMANAGED) == 0) {
-		if ((access & VM_PROT_WRITE) != 0)
-			rw = PTE_V | PTE_D;
-		else
-			rw = PTE_V;
-	} else
-		/* Needn't emulate a modified bit for unmanaged pages. */
-		rw = PTE_V | PTE_D;
-	return (rw);
-}
-
-/*
- * pmap_emulate_modified : do dirty bit emulation
- *
- * On SMP, update just the local TLB, other CPUs will update their
- * TLBs from PTE lazily, if they get the exception.
- * Returns 0 in case of sucess, 1 if the page is read only and we
- * need to fault.
- */
-int
-pmap_emulate_modified(pmap_t pmap, vm_offset_t va)
-{
-	pt_entry_t *pte;
-
-	PMAP_LOCK(pmap);
-	pte = pmap_pte(pmap, va);
-
-	/*
-	 * It is possible that some other CPU or thread changed the pmap while
-	 * we weren't looking; in the SMP case, this is readily apparent, but
-	 * it can even happen in the UP case, because we may have been blocked
-	 * on PMAP_LOCK(pmap) above while someone changed this out from
-	 * underneath us.
-	 */
-
-	if (pte == NULL) {
-		/*
-		 * This PTE's PTP (or one of its ancestors) has been reclaimed;
-		 * trigger a full fault to reconstruct it via pmap_enter.
-		 */
-		PMAP_UNLOCK(pmap);
-		return (1);
-	}
-
-	if (!pte_test(pte, PTE_V)) {
-		/*
-		 * This PTE is no longer valid; the other thread or other
-		 * processor must have arranged for our TLB to no longer
-		 * have this entry, possibly by IPI, so no tlb_update is
-		 * required.  Fall out of the fast path and go take a
-		 * general fault before retrying the instruction (or taking
-		 * a signal).
-		 */
-		PMAP_UNLOCK(pmap);
-		return (1);
-	}
-
-	if (pte_test(pte, PTE_D)) {
-		/*
-		 * This PTE is valid and has the PTE_D bit asserted; since
-		 * this is an increase in permission, we may have been expected
-		 * to update the TLB lazily.  Do so here and return, on the
-		 * fast path, to retry the instruction.
-		 */
-		tlb_update(pmap, va, *pte);
-		PMAP_UNLOCK(pmap);
-		return (0);
-	}
-
-	if (pte_test(pte, PTE_RO)) {
-		/*
-		 * This PTE is valid, not dirty, and read-only.  Go take a
-		 * full fault (most likely to upgrade this part of the address
-		 * space to writeable).
-		 */
-		PMAP_UNLOCK(pmap);
-		return (1);
-	}
-
-	if (!pte_test(pte, PTE_MANAGED))
-		panic("pmap_emulate_modified: unmanaged page");
-
-	/*
-	 * PTE is valid, managed, not dirty, and not read-only.  Set PTE_D
-	 * and eagerly update the local TLB, returning on the fast path.
-	 */
-
-	pte_set(pte, PTE_D);
-	tlb_update(pmap, va, *pte);
-	PMAP_UNLOCK(pmap);
-
-	return (0);
-}
-
-/*
- *	Routine:	pmap_kextract
- *	Function:
- *		Extract the physical page address associated
- *		virtual address.
- */
-vm_paddr_t
-pmap_kextract(vm_offset_t va)
-{
-	int mapped;
-
-	/*
-	 * First, the direct-mapped regions.
-	 */
-#if defined(__mips_n64)
-	if (va >= MIPS_XKPHYS_START && va < MIPS_XKPHYS_END)
-		return (MIPS_XKPHYS_TO_PHYS(va));
-#endif
-	if (va >= MIPS_KSEG0_START && va < MIPS_KSEG0_END)
-		return (MIPS_KSEG0_TO_PHYS(va));
-
-	if (va >= MIPS_KSEG1_START && va < MIPS_KSEG1_END)
-		return (MIPS_KSEG1_TO_PHYS(va));
-
-	/*
-	 * User virtual addresses.
-	 */
-	if (va < VM_MAXUSER_ADDRESS) {
-		pt_entry_t *ptep;
-
-		if (curproc && curproc->p_vmspace) {
-			ptep = pmap_pte(&curproc->p_vmspace->vm_pmap, va);
-			if (ptep) {
-				return (TLBLO_PTE_TO_PA(*ptep) |
-				    (va & PAGE_MASK));
-			}
-			return (0);
-		}
-	}
-
-	/*
-	 * Should be kernel virtual here, otherwise fail
-	 */
-	mapped = (va >= MIPS_KSEG2_START || va < MIPS_KSEG2_END);
-#if defined(__mips_n64)
-	mapped = mapped || (va >= MIPS_XKSEG_START || va < MIPS_XKSEG_END);
-#endif
-	/*
-	 * Kernel virtual.
-	 */
-
-	if (mapped) {
-		pt_entry_t *ptep;
-
-		/* Is the kernel pmap initialized? */
-		if (!CPU_EMPTY(&kernel_pmap->pm_active)) {
-			/* It's inside the virtual address range */
-			ptep = pmap_pte(kernel_pmap, va);
-			if (ptep) {
-				return (TLBLO_PTE_TO_PA(*ptep) |
-				    (va & PAGE_MASK));
-			}
-		}
-		return (0);
-	}
-
-	panic("%s for unknown address space %p.", __func__, (void *)va);
-}
-
-void
-pmap_flush_pvcache(vm_page_t m)
-{
-	pv_entry_t pv;
-
-	if (m != NULL) {
-		for (pv = TAILQ_FIRST(&m->md.pv_list); pv;
-		    pv = TAILQ_NEXT(pv, pv_list)) {
-			mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);
-		}
-	}
-}
-
-void
-pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
-{
-
-	/*
-	 * It appears that this function can only be called before any mappings
-	 * for the page are established.  If this ever changes, this code will
-	 * need to walk the pv_list and make each of the existing mappings
-	 * uncacheable, being careful to sync caches and PTEs (and maybe
-	 * invalidate TLB?) for any current mapping it modifies.
-	 */
-	if (TAILQ_FIRST(&m->md.pv_list) != NULL)
-		panic("Can't change memattr on page with existing mappings");
-
-	/* Clean memattr portion of pv_flags */
-	m->md.pv_flags &= ~PV_MEMATTR_MASK;
-	m->md.pv_flags |= (ma << PV_MEMATTR_SHIFT) & PV_MEMATTR_MASK;
-}
-
-static __inline void
-pmap_pte_attr(pt_entry_t *pte, vm_memattr_t ma)
-{
-	u_int npte;
-
-	npte = *(u_int *)pte;
-	npte &= ~PTE_C_MASK;
-	npte |= PTE_C(ma);
-	*pte = npte;
-}
-
-int
-pmap_change_attr(vm_offset_t sva, vm_size_t size, vm_memattr_t ma)
-{
-	pd_entry_t *pde, *pdpe;
-	pt_entry_t *pte;
-	vm_offset_t ova, eva, va, va_next;
-	pmap_t pmap;
-
-	ova = sva;
-	eva = sva + size;
-	if (eva < sva)
-		return (EINVAL);
-
-	pmap = kernel_pmap;
-	PMAP_LOCK(pmap);
-
-	for (; sva < eva; sva = va_next) {
-		pdpe = pmap_segmap(pmap, sva);
-#ifdef __mips_n64
-		if (*pdpe == 0) {
-			va_next = (sva + NBSEG) & ~SEGMASK;
-			if (va_next < sva)
-				va_next = eva;
-			continue;
-		}
-#endif
-		va_next = (sva + NBPDR) & ~PDRMASK;
-		if (va_next < sva)
-			va_next = eva;
-
-		pde = pmap_pdpe_to_pde(pdpe, sva);
-		if (*pde == NULL)
-			continue;
-
-		/*
-		 * Limit our scan to either the end of the va represented
-		 * by the current page table page, or to the end of the
-		 * range being removed.
-		 */
-		if (va_next > eva)
-			va_next = eva;
-
-		va = va_next;
-		for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
-		    sva += PAGE_SIZE) {
-			if (!pte_test(pte, PTE_V) || pte_cache_bits(pte) == ma) {
-				if (va != va_next) {
-					pmap_invalidate_range(pmap, va, sva);
-					va = va_next;
-				}
-				continue;
-			}
-			if (va == va_next)
-				va = sva;
-
-			pmap_pte_attr(pte, ma);
-		}
-		if (va != va_next)
-			pmap_invalidate_range(pmap, va, sva);
-	}
-	PMAP_UNLOCK(pmap);
-
-	/* Flush caches to be in the safe side */
-	mips_dcache_wbinv_range(ova, size);
-	return 0;
-}
-
-boolean_t
-pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
-{
-
-	switch (mode) {
-	case VM_MEMATTR_UNCACHEABLE:
-	case VM_MEMATTR_WRITE_BACK:
-#ifdef MIPS_CCA_WC
-	case VM_MEMATTR_WRITE_COMBINING:
-#endif
-		return (TRUE);
-	default:
-		return (FALSE);
-	}
-}
diff --git a/sys/mips/mips/ptrace_machdep.c b/sys/mips/mips/ptrace_machdep.c
deleted file mode 100644
index 8de58d6cc236..000000000000
--- a/sys/mips/mips/ptrace_machdep.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2009 M. Warner Losh <imp@FreeBSD.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#if 0
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * This file is a place holder for MIPS.  Some models of MIPS may need special
- * functions here, but for now nothing is needed.  The MI parts of ptrace
- * suffice.
- */
-#endif
diff --git a/sys/mips/mips/sc_machdep.c b/sys/mips/mips/sc_machdep.c
deleted file mode 100644
index 4e2fd65bce14..000000000000
--- a/sys/mips/mips/sc_machdep.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003 Jake Burkholder.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kbio.h>
-#include <sys/consio.h>
-#include <sys/sysctl.h>
-
-#include <dev/syscons/syscons.h>
-
-static sc_softc_t sc_softcs[8];
-
-int
-sc_get_cons_priority(int *unit, int *flags)
-{
-
-	*unit = 0;
-	*flags = 0;
-	return (CN_INTERNAL);
-}
-
-int
-sc_max_unit(void)
-{
-	return (1);
-}
-
-sc_softc_t *
-sc_get_softc(int unit, int flags)
-{
-	sc_softc_t *sc;
-
-	if (unit < 0)
-		return (NULL);
-	sc = &sc_softcs[unit];
-	sc->unit = unit;
-	if ((sc->flags & SC_INIT_DONE) == 0) {
-		sc->adapter = -1;
-		sc->cursor_char = SC_CURSOR_CHAR;
-		sc->mouse_char = SC_MOUSE_CHAR;
-	}
-	return (sc);
-}
-
-void
-sc_get_bios_values(bios_values_t *values)
-{
-}
-
-int
-sc_tone(int hz)
-{
-	return (0);
-}
diff --git a/sys/mips/mips/stack_machdep.c b/sys/mips/mips/stack_machdep.c
deleted file mode 100644
index 3766f3e1cbd1..000000000000
--- a/sys/mips/mips/stack_machdep.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2005 Antoine Brodin
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/stack.h>
-
-#include <machine/mips_opcode.h>
-
-#include <machine/pcb.h>
-#include <machine/regnum.h>
-
-#define	VALID_PC(addr)		((addr) >= (uintptr_t)btext && (addr) % 4 == 0)
-
-static void
-stack_capture(struct stack *st, struct thread *td, uintptr_t pc, uintptr_t sp)
-{
-	u_register_t ra;
-	uintptr_t i, ra_addr;
-	int ra_stack_pos, stacksize;
-	InstFmt insn;
-
-	stack_zero(st);
-
-	for (;;) {
-		if (!VALID_PC(pc))
-			break;
-
-		/*
-		 * Walk backward from the PC looking for the function
-		 * start.  Assume a subtraction from SP is the start
-		 * of a function.  Hope that we find the store of RA
-		 * into the stack frame along the way and save the
-		 * offset of the saved RA relative to SP.
-		 */
-		ra_stack_pos = -1;
-		stacksize = 0;
-		for (i = pc; VALID_PC(i); i -= sizeof(insn)) {
-			bcopy((void *)i, &insn, sizeof(insn));
-			switch (insn.IType.op) {
-			case OP_ADDI:
-			case OP_ADDIU:
-			case OP_DADDI:
-			case OP_DADDIU:
-				if (insn.IType.rs != SP || insn.IType.rt != SP)
-					break;
-
-				/*
-				 * Ignore stack fixups in "early"
-				 * returns in a function, or if the
-				 * call was from an unlikely branch
-				 * moved after the end of the normal
-				 * return.
-				 */
-				if ((short)insn.IType.imm > 0)
-					break;
-
-				stacksize = -(short)insn.IType.imm;
-				break;
-
-			case OP_SW:
-			case OP_SD:
-				if (insn.IType.rs != SP || insn.IType.rt != RA)
-					break;
-				ra_stack_pos = (short)insn.IType.imm;
-				break;
-			default:
-				break;
-			}
-
-			if (stacksize != 0)
-				break;
-		}
-
-		if (stack_put(st, pc) == -1)
-			break;
-
-		if (ra_stack_pos == -1)
-			break;
-
-		/*
-		 * Walk forward from the PC to find the function end
-		 * (jr RA).  If eret is hit instead, stop unwinding.
-		 */
-		ra_addr = sp + ra_stack_pos;
-		ra = 0;
-		for (i = pc; VALID_PC(i); i += sizeof(insn)) {
-			bcopy((void *)i, &insn, sizeof(insn));
-
-			switch (insn.IType.op) {
-			case OP_SPECIAL:
-				if (insn.RType.func == OP_JR) {
-					if (insn.RType.rs != RA)
-						break;
-					if (!kstack_contains(td, ra_addr,
-					    sizeof(ra)))
-						goto done;
-					ra = *(u_register_t *)ra_addr;
-					if (ra == 0)
-						goto done;
-					ra -= 8;
-				}
-				break;
-			default:
-				break;
-			}
-
-			/* eret */
-			if (insn.word == 0x42000018)
-				goto done;
-
-			if (ra != 0)
-				break;
-		}
-
-		if (pc == ra && stacksize == 0)
-			break;
-
-		sp += stacksize;
-		pc = ra;
-	}
-done:
-	return;
-}
-
-int
-stack_save_td(struct stack *st, struct thread *td)
-{
-	uintptr_t pc, sp;
-
-	THREAD_LOCK_ASSERT(td, MA_OWNED);
-	KASSERT(!TD_IS_SWAPPED(td),
-	    ("stack_save_td: thread %p is swapped", td));
-
-	if (TD_IS_RUNNING(td))
-		return (EOPNOTSUPP);
-
-	pc = td->td_pcb->pcb_context[PCB_REG_RA];
-	sp = td->td_pcb->pcb_context[PCB_REG_SP];
-	stack_capture(st, td, pc, sp);
-	return (0);
-}
-
-void
-stack_save(struct stack *st)
-{
-	uintptr_t pc, sp;
-
-	pc = (uintptr_t)&&here;
-	sp = (uintptr_t)__builtin_frame_address(0);
-here:
-	stack_capture(st, curthread, pc, sp);
-}
diff --git a/sys/mips/mips/stdatomic.c b/sys/mips/mips/stdatomic.c
deleted file mode 100644
index bd27f667f3ec..000000000000
--- a/sys/mips/mips/stdatomic.c
+++ /dev/null
@@ -1,415 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2013 Ed Schouten <ed@FreeBSD.org>
- * All rights reserved.
- *
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/stdatomic.h>
-#include <sys/types.h>
-
-#ifndef _KERNEL
-#include <stdbool.h>
-#endif /* _KERNEL */
-
-#if defined(__SYNC_ATOMICS)
-
-/*
- * Memory barriers.
- *
- * It turns out __sync_synchronize() does not emit any code when used
- * with GCC 4.2. Implement our own version that does work reliably.
- *
- * Although __sync_lock_test_and_set() should only perform an acquire
- * barrier, make it do a full barrier like the other functions. This
- * should make <stdatomic.h>'s atomic_exchange_explicit() work reliably.
- */
-
-static inline void
-do_sync(void)
-{
-
-	__asm volatile (
-#if !defined(_KERNEL) || defined(SMP)
-		".set noreorder\n"
-		"\tsync\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		"\tnop\n"
-		".set reorder\n"
-#else /* _KERNEL && !SMP */
-		""
-#endif /* !KERNEL || SMP */
-		: : : "memory");
-}
-
-typedef union {
-	uint8_t		v8[4];
-	uint32_t	v32;
-} reg_t;
-
-/*
- * Given a memory address pointing to an 8-bit or 16-bit integer, return
- * the address of the 32-bit word containing it.
- */
-
-static inline uint32_t *
-round_to_word(void *ptr)
-{
-
-	return ((uint32_t *)((intptr_t)ptr & ~3));
-}
-
-/*
- * Utility functions for loading and storing 8-bit and 16-bit integers
- * in 32-bit words at an offset corresponding with the location of the
- * atomic variable.
- */
-
-static inline void
-put_1(reg_t *r, const uint8_t *offset_ptr, uint8_t val)
-{
-	size_t offset;
-
-	offset = (intptr_t)offset_ptr & 3;
-	r->v8[offset] = val;
-}
-
-static inline uint8_t
-get_1(const reg_t *r, const uint8_t *offset_ptr)
-{
-	size_t offset;
-
-	offset = (intptr_t)offset_ptr & 3;
-	return (r->v8[offset]);
-}
-
-static inline void
-put_2(reg_t *r, const uint16_t *offset_ptr, uint16_t val)
-{
-	size_t offset;
-	union {
-		uint16_t in;
-		uint8_t out[2];
-	} bytes;
-
-	offset = (intptr_t)offset_ptr & 3;
-	bytes.in = val;
-	r->v8[offset] = bytes.out[0];
-	r->v8[offset + 1] = bytes.out[1];
-}
-
-static inline uint16_t
-get_2(const reg_t *r, const uint16_t *offset_ptr)
-{
-	size_t offset;
-	union {
-		uint8_t in[2];
-		uint16_t out;
-	} bytes;
-
-	offset = (intptr_t)offset_ptr & 3;
-	bytes.in[0] = r->v8[offset];
-	bytes.in[1] = r->v8[offset + 1];
-	return (bytes.out);
-}
-
-/*
- * 8-bit and 16-bit routines.
- *
- * These operations are not natively supported by the CPU, so we use
- * some shifting and bitmasking on top of the 32-bit instructions.
- */
-
-#define	EMIT_LOCK_TEST_AND_SET_N(N, uintN_t)				\
-uintN_t									\
-__sync_lock_test_and_set_##N(uintN_t *mem, uintN_t val)			\
-{									\
-	uint32_t *mem32;						\
-	reg_t val32, negmask, old;					\
-	uint32_t temp;							\
-									\
-	mem32 = round_to_word(mem);					\
-	val32.v32 = 0x00000000;						\
-	put_##N(&val32, mem, val);					\
-	negmask.v32 = 0xffffffff;					\
-	put_##N(&negmask, mem, 0);					\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tll	%0, %5\n"	/* Load old value. */		\
-		"\tand	%2, %4, %0\n"	/* Remove the old value. */	\
-		"\tor	%2, %3\n"	/* Put in the new value. */	\
-		"\tsc	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		: "=&r" (old.v32), "=m" (*mem32), "=&r" (temp)		\
-		: "r" (val32.v32), "r" (negmask.v32), "m" (*mem32));	\
-	return (get_##N(&old, mem));					\
-}
-
-EMIT_LOCK_TEST_AND_SET_N(1, uint8_t)
-EMIT_LOCK_TEST_AND_SET_N(2, uint16_t)
-
-#define	EMIT_VAL_COMPARE_AND_SWAP_N(N, uintN_t)				\
-uintN_t									\
-__sync_val_compare_and_swap_##N(uintN_t *mem, uintN_t expected,		\
-    uintN_t desired)							\
-{									\
-	uint32_t *mem32;						\
-	reg_t expected32, desired32, posmask, old;			\
-	uint32_t negmask, temp;						\
-									\
-	mem32 = round_to_word(mem);					\
-	expected32.v32 = 0x00000000;					\
-	put_##N(&expected32, mem, expected);				\
-	desired32.v32 = 0x00000000;					\
-	put_##N(&desired32, mem, desired);				\
-	posmask.v32 = 0x00000000;					\
-	put_##N(&posmask, mem, ~0);					\
-	negmask = ~posmask.v32;						\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tll	%0, %7\n"	/* Load old value. */		\
-		"\tand	%2, %5, %0\n"	/* Isolate the old value. */	\
-		"\tbne	%2, %3, 2f\n"	/* Compare to expected value. */\
-		"\tand	%2, %6, %0\n"	/* Remove the old value. */	\
-		"\tor	%2, %4\n"	/* Put in the new value. */	\
-		"\tsc	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		"2:"							\
-		: "=&r" (old), "=m" (*mem32), "=&r" (temp)		\
-		: "r" (expected32.v32), "r" (desired32.v32),		\
-		  "r" (posmask.v32), "r" (negmask), "m" (*mem32));	\
-	return (get_##N(&old, mem));					\
-}
-
-EMIT_VAL_COMPARE_AND_SWAP_N(1, uint8_t)
-EMIT_VAL_COMPARE_AND_SWAP_N(2, uint16_t)
-
-#define	EMIT_ARITHMETIC_FETCH_AND_OP_N(N, uintN_t, name, op)		\
-uintN_t									\
-__sync_##name##_##N(uintN_t *mem, uintN_t val)				\
-{									\
-	uint32_t *mem32;						\
-	reg_t val32, posmask, old;					\
-	uint32_t negmask, temp1, temp2;					\
-									\
-	mem32 = round_to_word(mem);					\
-	val32.v32 = 0x00000000;						\
-	put_##N(&val32, mem, val);					\
-	posmask.v32 = 0x00000000;					\
-	put_##N(&posmask, mem, ~0);					\
-	negmask = ~posmask.v32;						\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tll	%0, %7\n"	/* Load old value. */		\
-		"\t"op"	%2, %0, %4\n"	/* Calculate new value. */	\
-		"\tand	%2, %5\n"	/* Isolate the new value. */	\
-		"\tand	%3, %6, %0\n"	/* Remove the old value. */	\
-		"\tor	%2, %3\n"	/* Put in the new value. */	\
-		"\tsc	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		: "=&r" (old.v32), "=m" (*mem32), "=&r" (temp1),	\
-		  "=&r" (temp2)						\
-		: "r" (val32.v32), "r" (posmask.v32), "r" (negmask),	\
-		  "m" (*mem32));					\
-	return (get_##N(&old, mem));					\
-}
-
-EMIT_ARITHMETIC_FETCH_AND_OP_N(1, uint8_t, fetch_and_add, "addu")
-EMIT_ARITHMETIC_FETCH_AND_OP_N(1, uint8_t, fetch_and_sub, "subu")
-EMIT_ARITHMETIC_FETCH_AND_OP_N(2, uint16_t, fetch_and_add, "addu")
-EMIT_ARITHMETIC_FETCH_AND_OP_N(2, uint16_t, fetch_and_sub, "subu")
-
-#define	EMIT_BITWISE_FETCH_AND_OP_N(N, uintN_t, name, op, idempotence)	\
-uintN_t									\
-__sync_##name##_##N(uintN_t *mem, uintN_t val)				\
-{									\
-	uint32_t *mem32;						\
-	reg_t val32, old;						\
-	uint32_t temp;							\
-									\
-	mem32 = round_to_word(mem);					\
-	val32.v32 = idempotence ? 0xffffffff : 0x00000000;		\
-	put_##N(&val32, mem, val);					\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tll	%0, %4\n"	/* Load old value. */		\
-		"\t"op"	%2, %3, %0\n"	/* Calculate new value. */	\
-		"\tsc	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		: "=&r" (old.v32), "=m" (*mem32), "=&r" (temp)		\
-		: "r" (val32.v32), "m" (*mem32));			\
-	return (get_##N(&old, mem));					\
-}
-
-EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_and, "and", 1)
-EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_or, "or", 0)
-EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_xor, "xor", 0)
-EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_and, "and", 1)
-EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_or, "or", 0)
-EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_xor, "xor", 0)
-
-/*
- * 32-bit routines.
- */
-
-static __inline uint32_t
-do_compare_and_swap_4(uint32_t *mem, uint32_t expected,
-    uint32_t desired)
-{
-	uint32_t old, temp;
-
-	do_sync();
-	__asm volatile (
-		"1:"
-		"\tll	%0, %5\n"	/* Load old value. */
-		"\tbne	%0, %3, 2f\n"	/* Compare to expected value. */
-		"\tmove	%2, %4\n"	/* Value to store. */
-		"\tsc	%2, %1\n"	/* Attempt to store. */
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */
-		"2:"
-		: "=&r" (old), "=m" (*mem), "=&r" (temp)
-		: "r" (expected), "r" (desired), "m" (*mem));
-	return (old);
-}
-
-uint32_t
-__sync_val_compare_and_swap_4(uint32_t *mem, uint32_t expected,
-    uint32_t desired)
-{
-
-	return (do_compare_and_swap_4(mem, expected, desired));
-}
-
-bool
-__sync_bool_compare_and_swap_4(uint32_t *mem, uint32_t expected,
-    uint32_t desired)
-{
-
-	return (do_compare_and_swap_4(mem, expected, desired) ==
-	    expected);
-}
-
-#define	EMIT_FETCH_AND_OP_4(name, op)					\
-uint32_t								\
-__sync_##name##_4(uint32_t *mem, uint32_t val)				\
-{									\
-	uint32_t old, temp;						\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tll	%0, %4\n"	/* Load old value. */		\
-		"\t"op"\n"		/* Calculate new value. */	\
-		"\tsc	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		: "=&r" (old), "=m" (*mem), "=&r" (temp)		\
-		: "r" (val), "m" (*mem));				\
-	return (old);							\
-}
-
-EMIT_FETCH_AND_OP_4(lock_test_and_set, "move %2, %3")
-EMIT_FETCH_AND_OP_4(fetch_and_add, "addu %2, %0, %3")
-EMIT_FETCH_AND_OP_4(fetch_and_and, "and %2, %0, %3")
-EMIT_FETCH_AND_OP_4(fetch_and_or, "or %2, %0, %3")
-EMIT_FETCH_AND_OP_4(fetch_and_sub, "subu %2, %0, %3")
-EMIT_FETCH_AND_OP_4(fetch_and_xor, "xor %2, %0, %3")
-
-/*
- * 64-bit routines.
- *
- * Note: All the 64-bit atomic operations are only atomic when running
- * in 64-bit mode. It is assumed that code compiled for n32 and n64 fits
- * into this definition and no further safeties are needed.
- */
-
-#if defined(__mips_n32) || defined(__mips_n64)
-
-uint64_t
-__sync_val_compare_and_swap_8(uint64_t *mem, uint64_t expected,
-    uint64_t desired)
-{
-	uint64_t old, temp;
-
-	do_sync();
-	__asm volatile (
-		"1:"
-		"\tlld	%0, %5\n"	/* Load old value. */
-		"\tbne	%0, %3, 2f\n"	/* Compare to expected value. */
-		"\tmove	%2, %4\n"	/* Value to store. */
-		"\tscd	%2, %1\n"	/* Attempt to store. */
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */
-		"2:"
-		: "=&r" (old), "=m" (*mem), "=&r" (temp)
-		: "r" (expected), "r" (desired), "m" (*mem));
-	return (old);
-}
-
-#define	EMIT_FETCH_AND_OP_8(name, op)					\
-uint64_t								\
-__sync_##name##_8(uint64_t *mem, uint64_t val)				\
-{									\
-	uint64_t old, temp;						\
-									\
-	do_sync();							\
-	__asm volatile (						\
-		"1:"							\
-		"\tlld	%0, %4\n"	/* Load old value. */		\
-		"\t"op"\n"		/* Calculate new value. */	\
-		"\tscd	%2, %1\n"	/* Attempt to store. */		\
-		"\tbeqz	%2, 1b\n"	/* Spin if failed. */		\
-		: "=&r" (old), "=m" (*mem), "=&r" (temp)		\
-		: "r" (val), "m" (*mem));				\
-	return (old);							\
-}
-
-EMIT_FETCH_AND_OP_8(lock_test_and_set, "move %2, %3")
-EMIT_FETCH_AND_OP_8(fetch_and_add, "daddu %2, %0, %3")
-EMIT_FETCH_AND_OP_8(fetch_and_and, "and %2, %0, %3")
-EMIT_FETCH_AND_OP_8(fetch_and_or, "or %2, %0, %3")
-EMIT_FETCH_AND_OP_8(fetch_and_sub, "dsubu %2, %0, %3")
-EMIT_FETCH_AND_OP_8(fetch_and_xor, "xor %2, %0, %3")
-
-#endif /* __mips_n32 || __mips_n64 */
-
-#endif /* __SYNC_ATOMICS */
diff --git a/sys/mips/mips/support.S b/sys/mips/mips/support.S
deleted file mode 100644
index 50aefc1fb9d0..000000000000
--- a/sys/mips/mips/support.S
+++ /dev/null
@@ -1,807 +0,0 @@
-/*	$OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Digital Equipment Corporation and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Copyright (C) 1989 Digital Equipment Corporation.
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby granted,
- * provided that the above copyright notice appears in all copies.
- * Digital Equipment Corporation makes no representations about the
- * suitability of this software for any purpose.  It is provided "as is"
- * without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
- *	v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
- *	v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
- *	v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
- *
- *	from: @(#)locore.s	8.5 (Berkeley) 1/4/94
- *	JNPR: support.S,v 1.5.2.2 2007/08/29 10:03:49 girish
- * $FreeBSD$
- */
-
-/*
- * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Jonathan R. Stone for
- *      the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- *	Contains assembly language support routines.
- */
-
-#include "opt_ddb.h"
-#include <sys/errno.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/endian.h>
-#include <machine/regnum.h>
-#include <machine/cpuregs.h>
-#include <machine/pcb.h>
-
-#include "assym.inc"
-
-	.set	noreorder		# Noreorder is default style!
-
-/*
- * Primitives
- */
-
-	.text
-
-/*
- * Copy a null terminated string from the user address space into
- * the kernel address space.
- *
- *	copyinstr(fromaddr, toaddr, maxlength, &lencopied)
- *		caddr_t fromaddr;
- *		caddr_t toaddr;
- *		u_int maxlength;
- *		u_int *lencopied;
- */
-LEAF(copyinstr)
-	PTR_LA		v0, __copyinstr_err
-	blt		a0, zero, __copyinstr_err  # make sure address is in user space
-	GET_CPU_PCPU(v1)
-	PTR_L		v1, PC_CURPCB(v1)
-	PTR_S		v0, U_PCB_ONFAULT(v1)
-
-	move		t0, a2
-	beq		a2, zero, 4f
-1:
-	lbu		v0, 0(a0)
-	PTR_SUBU	a2, a2, 1
-	beq		v0, zero, 2f
-	sb		v0, 0(a1)		# each byte until NIL
-	PTR_ADDU	a0, a0, 1
-	bne		a2, zero, 1b		# less than maxlen
-	PTR_ADDU	a1, a1, 1
-4:
-	li		v0, ENAMETOOLONG	# run out of space
-2:
-	beq		a3, zero, 3f		# return num. of copied bytes
-	PTR_SUBU	a2, t0, a2		# if the 4th arg was non-NULL
-	PTR_S		a2, 0(a3)
-3:
-
-	PTR_S		zero, U_PCB_ONFAULT(v1)
-	j		ra
-	nop
-
-__copyinstr_err:
-	j		ra
-	li		v0, EFAULT
-END(copyinstr)
-
-/*
- * Copy specified amount of data from user space into the kernel
- *	copyin(from, to, len)
- *		caddr_t *from;	(user source address)
- *		caddr_t *to;	(kernel destination address)
- *		unsigned len;
- */
-NESTED(copyin, CALLFRAME_SIZ, ra)
-	PTR_SUBU	sp, sp, CALLFRAME_SIZ
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-	PTR_LA	v0, copyerr
-	blt	a0, zero, _C_LABEL(copyerr)  # make sure address is in user space
-	REG_S	ra, CALLFRAME_RA(sp)
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	jal	_C_LABEL(bcopy)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	REG_L	ra, CALLFRAME_RA(sp)
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)	 	# bcopy modified v1, so reload
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	PTR_ADDU	sp, sp, CALLFRAME_SIZ
-	j	ra
-	move	v0, zero
-END(copyin)
-
-/*
- * Copy specified amount of data from kernel to the user space
- *	copyout(from, to, len)
- *		caddr_t *from;	(kernel source address)
- *		caddr_t *to;	(user destination address)
- *		unsigned len;
- */
-NESTED(copyout, CALLFRAME_SIZ, ra)
-	PTR_SUBU	sp, sp, CALLFRAME_SIZ
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-	PTR_LA	v0, copyerr
-	blt	a1, zero, _C_LABEL(copyerr) # make sure address is in user space
-	REG_S	ra, CALLFRAME_RA(sp)
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	jal	_C_LABEL(bcopy)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	REG_L	ra, CALLFRAME_RA(sp)
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)	 	# bcopy modified v1, so reload
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	PTR_ADDU	sp, sp, CALLFRAME_SIZ
-	j	ra
-	move	v0, zero
-END(copyout)
-
-LEAF(copyerr)
-	REG_L	ra, CALLFRAME_RA(sp)
-	PTR_ADDU	sp, sp, CALLFRAME_SIZ
-	j	ra
-	li	v0, EFAULT			# return error
-END(copyerr)
-
-/*
- * {fu,su},{byte,sword,word}, fetch or store a byte, short or word to
- * user-space.
- */
-#ifdef __mips_n64
-LEAF(fueword64)
-XLEAF(fueword)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	ld	v0, 0(a0)		# fetch word
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	sd	v0, 0(a1)		# store word
-	j	ra
-	li	v0, 0
-END(fueword64)
-#endif
-
-LEAF(fueword32)
-#ifndef __mips_n64
-XLEAF(fueword)
-#endif
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	lw	v0, 0(a0)		# fetch word
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	sw	v0, 0(a1)		# store word
-	j	ra
-	li	v0, 0
-END(fueword32)
-
-LEAF(fuesword)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	lhu	v0, 0(a0)		# fetch short
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	sh	v0, 0(a1)		# store short
-	j	ra
-	li	v0, 0
-END(fuesword)
-
-LEAF(fubyte)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	lbu	v0, 0(a0)		# fetch byte
-	j	ra
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-END(fubyte)
-
-LEAF(suword16)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	sh	a1, 0(a0)		# store short
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	j	ra
-	move	v0, zero
-END(suword16)
-
-LEAF(suword32)
-#ifndef __mips_n64
-XLEAF(suword)
-#endif
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	sw	a1, 0(a0)		# store word
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	j	ra
-	move	v0, zero
-END(suword32)
-
-#ifdef __mips_n64
-LEAF(suword64)
-XLEAF(suword)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	sd	a1, 0(a0)		# store word
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	j	ra
-	move	v0, zero
-END(suword64)
-#endif
-
-/*
- * casueword(9)
- * <v0>u_long casueword(<a0>u_long *p, <a1>u_long oldval, <a2>u_long *oldval_p,
- *		       <a3>u_long newval)
- */
-/*
- * casueword32(9)
- * <v0>uint32_t casueword(<a0>uint32_t *p, <a1>uint32_t oldval,
- *			 <a2>uint32_t newval)
- */
-LEAF(casueword32)
-#ifndef __mips_n64
-XLEAF(casueword)
-#endif
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-
-	li	v0, 1
-	move	t0, a3
-	ll	t1, 0(a0)
-	bne	a1, t1, 1f
-	nop
-	sc	t0, 0(a0)		# store word
-	xori	v0, t0, 1
-1:
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	jr	ra
-	sw	t1, 0(a2)		# unconditionally store old word
-END(casueword32)
-
-#ifdef __mips_n64
-LEAF(casueword64)
-XLEAF(casueword)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-
-	li	v0, 1
-	move	t0, a3
-	lld	t1, 0(a0)
-	bne	a1, t1, 1f
-	nop
-	scd	t0, 0(a0)		# store double word
-	xori	v0, t0, 1
-1:
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	jr	ra
-	sd	t1, 0(a2)		# unconditionally store old word
-END(casueword64)
-#endif
-
-/*
- * Will have to flush the instruction cache if byte merging is done in hardware.
- */
-LEAF(susword)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	sh	a1, 0(a0)		# store short
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	j	ra
-	move	v0, zero
-END(susword)
-
-LEAF(subyte)
-	PTR_LA	v0, fswberr
-	blt	a0, zero, fswberr	# make sure address is in user space
-	nop
-	GET_CPU_PCPU(v1)
-	PTR_L	v1, PC_CURPCB(v1)
-	PTR_S	v0, U_PCB_ONFAULT(v1)
-	sb	a1, 0(a0)		# store byte
-	PTR_S	zero, U_PCB_ONFAULT(v1)
-	j	ra
-	move	v0, zero
-END(subyte)
-
-LEAF(fswberr)
-	j	ra
-	li	v0, -1
-END(fswberr)
-
-/*
- * memset(void *s1, int c, int len)
- * NetBSD: memset.S,v 1.3 2001/10/16 15:40:53 uch Exp
- */
-LEAF(memset)
-	.set noreorder
-	blt	a2, 12, memsetsmallclr	# small amount to clear?
-	move	v0, a0			# save s1 for result
-
-	sll	t1, a1, 8		# compute  c << 8 in t1
-	or	t1, t1, a1		# compute c << 8 | c in 11
-	sll	t2, t1, 16		# shift that left 16
-	or	t1, t2, t1		# or together
-
-	PTR_SUBU	t0, zero, a0		# compute # bytes to word align address
-	and	t0, t0, 3
-	beq	t0, zero, 1f		# skip if word aligned
-	PTR_SUBU	a2, a2, t0		# subtract from remaining count
-	SWHI	t1, 0(a0)		# store 1, 2, or 3 bytes to align
-	PTR_ADDU	a0, a0, t0
-1:
-	and	v1, a2, 3		# compute number of whole words left
-	PTR_SUBU	t0, a2, v1
-	PTR_SUBU	a2, a2, t0
-	PTR_ADDU	t0, t0, a0		# compute ending address
-2:
-	PTR_ADDU	a0, a0, 4		# clear words
-	bne	a0, t0, 2b		#  unrolling loop does not help
-	sw	t1, -4(a0)		#  since we are limited by memory speed
-
-memsetsmallclr:
-	ble	a2, zero, 2f
-	PTR_ADDU	t0, a2, a0		# compute ending address
-1:
-	PTR_ADDU	a0, a0, 1		# clear bytes
-	bne	a0, t0, 1b
-	sb	a1, -1(a0)
-2:
-	j	ra
-	nop
-	.set reorder
-END(memset)
-
-/*
- * blkclr(s1, n)
- */
-LEAF(blkclr)
-	.set	noreorder
-	blt	a1, 12, smallclr	# small amount to clear?
-	PTR_SUBU	a3, zero, a0		# compute # bytes to word align address
-	and	a3, a3, 3
-	beq	a3, zero, 1f		# skip if word aligned
-	PTR_SUBU	a1, a1, a3		# subtract from remaining count
-	SWHI	zero, 0(a0)		# clear 1, 2, or 3 bytes to align
-	PTR_ADDU	a0, a0, a3
-1:
-	and	v0, a1, 3		# compute number of words left
-	PTR_SUBU	a3, a1, v0
-	move	a1, v0
-	PTR_ADDU	a3, a3, a0		# compute ending address
-2:
-	PTR_ADDU	a0, a0, 4		# clear words
-	bne	a0, a3, 2b		#  unrolling loop does not help
-	sw	zero, -4(a0)		#  since we are limited by memory speed
-smallclr:
-	ble	a1, zero, 2f
-	PTR_ADDU	a3, a1, a0		# compute ending address
-1:
-	PTR_ADDU	a0, a0, 1		# clear bytes
-	bne	a0, a3, 1b
-	sb	zero, -1(a0)
-2:
-	j	ra
-	nop
-END(blkclr)
-
-/*
- * bit = ffs(value)
- */
-LEAF(ffs)
-	.set	noreorder
-	beq	a0, zero, 2f
-	move	v0, zero
-1:
-	and	v1, a0, 1		# bit set?
-	addu	v0, v0, 1
-	beq	v1, zero, 1b		# no, continue
-	srl	a0, a0, 1
-2:
-	j	ra
-	nop
-END(ffs)
-
-/**
- * void
- * atomic_set_16(u_int16_t *a, u_int16_t b)
- * {
- *	*a |= b;
- * }
- */
-LEAF(atomic_set_16)
-	.set	noreorder
-	/* NB: Only bit 1 is masked so the ll catches unaligned inputs */
-	andi	t0, a0, 2	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 2
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right half
-1:
-	ll	t0, 0(a0)
-	or	t0, t0, a1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_set_16)
-
-/**
- * void
- * atomic_clear_16(u_int16_t *a, u_int16_t b)
- * {
- *	*a &= ~b;
- * }
- */
-LEAF(atomic_clear_16)
-	.set	noreorder
-	/* NB: Only bit 1 is masked so the ll catches unaligned inputs */
-	andi	t0, a0, 2	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 2
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right half
-	not	a1, a1
-1:
-	ll	t0, 0(a0)
-	and	t0, t0, a1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_clear_16)
-
-
-/**
- * void
- * atomic_subtract_16(uint16_t *a, uint16_t b)
- * {
- *	*a -= b;
- * }
- */
-LEAF(atomic_subtract_16)
-	.set	noreorder
-	/* NB: Only bit 1 is masked so the ll catches unaligned inputs */
-	andi	t0, a0, 2	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 2	# flip order for big-endian
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right half
-	li	t2, 0xffff
-	sll	t2, t2, t0	# compute mask
-1:
-	ll	t0, 0(a0)
-	subu	t1, t0, a1
-	/* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */
-	xor	t1, t0, t1
-	and	t1, t1, t2
-	xor	t0, t0, t1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_subtract_16)
-
-/**
- * void
- * atomic_add_16(uint16_t *a, uint16_t b)
- * {
- *	*a += b;
- * }
- */
-LEAF(atomic_add_16)
-	.set	noreorder
-	/* NB: Only bit 1 is masked so the ll catches unaligned inputs */
-	andi	t0, a0, 2	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 2	# flip order for big-endian
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right half
-	li	t2, 0xffff
-	sll	t2, t2, t0	# compute mask
-1:
-	ll	t0, 0(a0)
-	addu	t1, t0, a1
-	/* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */
-	xor	t1, t0, t1
-	and	t1, t1, t2
-	xor	t0, t0, t1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_add_16)
-
-/**
- * void
- * atomic_add_8(uint8_t *a, uint8_t b)
- * {
- *	*a += b;
- * }
- */
-LEAF(atomic_add_8)
-	.set	noreorder
-	andi	t0, a0, 3	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 3	# flip order for big-endian
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right quarter
-	li	t2, 0xff
-	sll	t2, t2, t0	# compute mask
-1:
-	ll	t0, 0(a0)
-	addu	t1, t0, a1
-	/* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */
-	xor	t1, t0, t1
-	and	t1, t1, t2
-	xor	t0, t0, t1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_add_8)
-
-
-/**
- * void
- * atomic_subtract_8(uint8_t *a, uint8_t b)
- * {
- *	*a += b;
- * }
- */
-LEAF(atomic_subtract_8)
-	.set	noreorder
-	andi	t0, a0, 3	# get unaligned offset
-	xor	a0, a0, t0	# align pointer
-#if _BYTE_ORDER == BIG_ENDIAN
-	xori	t0, t0, 3	# flip order for big-endian
-#endif
-	sll	t0, t0, 3	# convert byte offset to bit offset
-	sll	a1, a1, t0	# put bits in the right quarter
-	li	t2, 0xff
-	sll	t2, t2, t0	# compute mask
-1:
-	ll	t0, 0(a0)
-	subu	t1, t0, a1
-	/* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */
-	xor	t1, t0, t1
-	and	t1, t1, t2
-	xor	t0, t0, t1
-	sc	t0, 0(a0)
-	beq	t0, zero, 1b
-	nop
-	j	ra
-	nop
-END(atomic_subtract_8)
-
-	.set	noreorder		# Noreorder is default style!
-
-#if defined(DDB) || defined(DEBUG)
-
-LEAF(kdbpeek)
-	PTR_LA	v1, ddberr
-	and	v0, a0, 3			# unaligned ?
-	GET_CPU_PCPU(t1)
-	PTR_L	t1, PC_CURPCB(t1)
-	bne	v0, zero, 1f
-	PTR_S	v1, U_PCB_ONFAULT(t1)
-
-	lw	v0, (a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-
-1:
-	LWHI	v0, 0(a0)
-	LWLO	v0, 3(a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-END(kdbpeek)
-
-LEAF(kdbpeekd)
-	PTR_LA	v1, ddberr
-	and	v0, a0, 3			# unaligned ?
-	GET_CPU_PCPU(t1)
-	PTR_L	t1, PC_CURPCB(t1)
-	bne	v0, zero, 1f
-	PTR_S	v1, U_PCB_ONFAULT(t1)
-
-	ld	v0, (a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-
-1:
-	REG_LHI	v0, 0(a0)
-	REG_LLO	v0, 7(a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-END(kdbpeekd)
-
-ddberr:
-	jr	ra
-	nop
-
-#if defined(DDB)
-LEAF(kdbpoke)
-	PTR_LA	v1, ddberr
-	and	v0, a0, 3			# unaligned ?
-	GET_CPU_PCPU(t1)
-	PTR_L	t1, PC_CURPCB(t1)
-	bne	v0, zero, 1f
-	PTR_S	v1, U_PCB_ONFAULT(t1)
-
-	sw	a1, (a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-
-1:
-	SWHI	a1, 0(a0)
-	SWLO	a1, 3(a0)
-	jr	ra
-	PTR_S	zero, U_PCB_ONFAULT(t1)
-END(kdbpoke)
-
-	.data
-	.globl	esym
-esym:	.word	0
-
-#endif /* DDB */
-#endif /* DDB || DEBUG */
-
-	.text
-LEAF(breakpoint)
-	break	MIPS_BREAK_SOVER_VAL
-	jr	ra
-	nop
-END(breakpoint)
-
-LEAF(setjmp)
-	mfc0	v0, MIPS_COP_0_STATUS	# Later the "real" spl value!
-	REG_S	s0, (SZREG * PCB_REG_S0)(a0)
-	REG_S	s1, (SZREG * PCB_REG_S1)(a0)
-	REG_S	s2, (SZREG * PCB_REG_S2)(a0)
-	REG_S	s3, (SZREG * PCB_REG_S3)(a0)
-	REG_S	s4, (SZREG * PCB_REG_S4)(a0)
-	REG_S	s5, (SZREG * PCB_REG_S5)(a0)
-	REG_S	s6, (SZREG * PCB_REG_S6)(a0)
-	REG_S	s7, (SZREG * PCB_REG_S7)(a0)
-	REG_S	s8, (SZREG * PCB_REG_S8)(a0)
-	REG_S	sp, (SZREG * PCB_REG_SP)(a0)
-	REG_S	ra, (SZREG * PCB_REG_RA)(a0)
-	REG_S	v0, (SZREG * PCB_REG_SR)(a0)
-	jr	ra
-	li	v0, 0			# setjmp return
-END(setjmp)
-
-LEAF(longjmp)
-	REG_L	v0, (SZREG * PCB_REG_SR)(a0)
-	REG_L	ra, (SZREG * PCB_REG_RA)(a0)
-	REG_L	s0, (SZREG * PCB_REG_S0)(a0)
-	REG_L	s1, (SZREG * PCB_REG_S1)(a0)
-	REG_L	s2, (SZREG * PCB_REG_S2)(a0)
-	REG_L	s3, (SZREG * PCB_REG_S3)(a0)
-	REG_L	s4, (SZREG * PCB_REG_S4)(a0)
-	REG_L	s5, (SZREG * PCB_REG_S5)(a0)
-	REG_L	s6, (SZREG * PCB_REG_S6)(a0)
-	REG_L	s7, (SZREG * PCB_REG_S7)(a0)
-	REG_L	s8, (SZREG * PCB_REG_S8)(a0)
-	REG_L	sp, (SZREG * PCB_REG_SP)(a0)
-	mtc0	v0, MIPS_COP_0_STATUS	# Later the "real" spl value!
-	ITLBNOPFIX
-	jr	ra
-	li	v0, 1			# longjmp return
-END(longjmp)
diff --git a/sys/mips/mips/swtch.S b/sys/mips/mips/swtch.S
deleted file mode 100644
index 8d357004c84a..000000000000
--- a/sys/mips/mips/swtch.S
+++ /dev/null
@@ -1,691 +0,0 @@
-/*	$OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Digital Equipment Corporation and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Copyright (C) 1989 Digital Equipment Corporation.
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby granted,
- * provided that the above copyright notice appears in all copies.
- * Digital Equipment Corporation makes no representations about the
- * suitability of this software for any purpose.  It is provided "as is"
- * without express or implied warranty.
- *
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
- *	v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
- *	v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
- * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
- *	v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
- *
- *	from: @(#)locore.s	8.5 (Berkeley) 1/4/94
- *	JNPR: swtch.S,v 1.6.2.1 2007/09/10 10:36:50 girish
- * $FreeBSD$
- */
-
-/*
- *	Contains code that is the first executed at boot time plus
- *	assembly language support routines.
- */
-
-#include <sys/syscall.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <machine/regnum.h>
-#include <machine/pte.h>
-#include <machine/pcb.h>
-
-#include "assym.inc"
-
-	.set	noreorder			# Noreorder is default style!
-
-/*
- * Setup for and return to user.
- */
-LEAF(fork_trampoline)
-	move	a0,s0
-	move	a1,s1
-	jal	_C_LABEL(fork_exit)
-	move	a2,s2			  #BDSlot
-
-	DO_AST
-
-	mfc0	v0, MIPS_COP_0_STATUS
-	and     v0, ~(MIPS_SR_INT_IE)
-	mtc0	v0, MIPS_COP_0_STATUS	# disable interrupts
-	COP0_SYNC
-/*
- * The use of k1 for storing the PCB pointer must be done only
- * after interrupts are disabled.  Otherwise it will get overwritten
- * by the interrupt code.
- */
-	.set	noat
-	GET_CPU_PCPU(k1)
-	PTR_L	k1, PC_CURPCB(k1)
-
-	RESTORE_U_PCB_REG(t0, MULLO, k1)
-	RESTORE_U_PCB_REG(t1, MULHI, k1)
-	mtlo	t0
-	mthi	t1
-	RESTORE_U_PCB_REG(a0, PC, k1)
-	RESTORE_U_PCB_REG(AT, AST, k1)
-	RESTORE_U_PCB_REG(v0, V0, k1)
-	MTC0	a0, MIPS_COP_0_EXC_PC	# set return address
-
-	RESTORE_U_PCB_REG(v1, V1, k1)
-	RESTORE_U_PCB_REG(a0, A0, k1)
-	RESTORE_U_PCB_REG(a1, A1, k1)
-	RESTORE_U_PCB_REG(a2, A2, k1)
-	RESTORE_U_PCB_REG(a3, A3, k1)
-	RESTORE_U_PCB_REG(t0, T0, k1)
-	RESTORE_U_PCB_REG(t1, T1, k1)
-	RESTORE_U_PCB_REG(t2, T2, k1)
-	RESTORE_U_PCB_REG(t3, T3, k1)
-	RESTORE_U_PCB_REG(ta0, TA0, k1)
-	RESTORE_U_PCB_REG(ta1, TA1, k1)
-	RESTORE_U_PCB_REG(ta2, TA2, k1)
-	RESTORE_U_PCB_REG(ta3, TA3, k1)
-	RESTORE_U_PCB_REG(s0, S0, k1)
-	RESTORE_U_PCB_REG(s1, S1, k1)
-	RESTORE_U_PCB_REG(s2, S2, k1)
-	RESTORE_U_PCB_REG(s3, S3, k1)
-	RESTORE_U_PCB_REG(s4, S4, k1)
-	RESTORE_U_PCB_REG(s5, S5, k1)
-	RESTORE_U_PCB_REG(s6, S6, k1)
-	RESTORE_U_PCB_REG(s7, S7, k1)
-	RESTORE_U_PCB_REG(t8, T8, k1)
-	RESTORE_U_PCB_REG(t9, T9, k1)
-	RESTORE_U_PCB_REG(k0, SR, k1)
-	RESTORE_U_PCB_REG(gp, GP, k1)
-	RESTORE_U_PCB_REG(s8, S8, k1)
-	RESTORE_U_PCB_REG(ra, RA, k1)
-	RESTORE_U_PCB_REG(sp, SP, k1)
-	li	k1, ~MIPS_SR_INT_MASK
-	and	k0, k0, k1
-	mfc0	k1, MIPS_COP_0_STATUS
-	and	k1, k1, MIPS_SR_INT_MASK
-	or	k0, k0, k1
-	mtc0	k0, MIPS_COP_0_STATUS	# switch to user mode (when eret...)
-	HAZARD_DELAY
-	sync
-	eret
-	.set	at
-END(fork_trampoline)
-
-/*
- * Update pcb, saving current processor state.
- * Note: this only works if pcbp != curproc's pcb since
- * cpu_switch() will copy over pcb_context.
- *
- *	savectx(struct pcb *pcbp);
- */
-LEAF(savectx)
-	SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0)
-	SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
-	SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
-	SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
-	mfc0	v0, MIPS_COP_0_STATUS
-	SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
-	SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
-	SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
-	SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
-	SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0)
-	SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
-	SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0)
-	SAVE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0)
-	SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
-
-	move	v0, ra			/* save 'ra' before we trash it */
-	jal	1f
-	nop
-1:
-	SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0)
-	move	ra, v0			/* restore 'ra' before returning */
-
-	j	ra
-	move	v0, zero
-END(savectx)
-
-NESTED(cpu_throw, CALLFRAME_SIZ, ra)
-	mfc0	t0, MIPS_COP_0_STATUS		# t0 = saved status register
-	nop
-	nop
-	and     a3, t0, ~(MIPS_SR_INT_IE)
-	mtc0	a3, MIPS_COP_0_STATUS		# Disable all interrupts
-	ITLBNOPFIX
-	j	mips_sw1			# We're not interested in old 
-						# thread's context, so jump 
-						# right to action
-	nop					# BDSLOT
-END(cpu_throw)
-
-/*
- * cpu_switch(struct thread *old, struct thread *new, struct mutex *mtx);
- *	a0 - old
- *	a1 - new
- *	a2 - mtx
- * Find the highest priority process and resume it.
- */
-NESTED(cpu_switch, CALLFRAME_SIZ, ra)
-	mfc0	t0, MIPS_COP_0_STATUS		# t0 = saved status register
-	nop
-	nop
-	and     a3, t0, ~(MIPS_SR_INT_IE)	
-	mtc0	a3, MIPS_COP_0_STATUS		# Disable all interrupts
-	ITLBNOPFIX
-	beqz	a0, mips_sw1
-	move	a3, a0
-	PTR_L	a0, TD_PCB(a0)		# load PCB addr of curproc
-	SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0)		# save old sp
-	PTR_SUBU	sp, sp, CALLFRAME_SIZ
-	REG_S	ra, CALLFRAME_RA(sp)
-	.mask	0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
-	SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0)		# do a 'savectx()'
-	SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
-	SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
-	SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
-	SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
-	SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
-	SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
-	SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
-	SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
-	SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0)		# save return address
-	SAVE_U_PCB_CONTEXT(t0, PCB_REG_SR, a0)		# save status register
-	SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
-	jal	getpc
-	nop
-getpc:
-	SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0)		# save return address
-
-#ifdef CPU_CNMIPS
-
-	lw	t2, TD_MDFLAGS(a3)		# get md_flags
-	and	t1, t2, MDTD_COP2USED
-	beqz	t1, cop2_untouched
-	nop
-
-	/* Clear cop2used flag */
-	and	t2, t2, ~MDTD_COP2USED
-	sw	t2, TD_MDFLAGS(a3)
-
-	and	t2, t0, ~MIPS_SR_COP_2_BIT	# clear COP_2 enable bit
-	SAVE_U_PCB_CONTEXT(t2, PCB_REG_SR, a0)	# save status register
-
-	RESTORE_U_PCB_REG(t0, PS, a0)		# get CPU status register
-	and	t2, t0, ~MIPS_SR_COP_2_BIT	# clear COP_2 enable bit
-	SAVE_U_PCB_REG(t2, PS, a0)		# save stratus register
-
-	/* preserve a0..a3 */
-	move	s0, a0
-	move	s1, a1
-	move	s2, a2
-	move	s3, a3
-
-	/* does kernel own COP2 context? */
-	lw	t1, TD_COP2OWNER(a3)		# get md_cop2owner
-	beqz	t1, userland_cop2		# 0 - it's userland context
-	nop
-
-	PTR_L	a0, TD_COP2(a3)
-	beqz	a0, no_cop2_context
-	nop
-
-	j	do_cop2_save
-	nop
-
-userland_cop2:
-
-	PTR_L	a0, TD_UCOP2(a3)
-	beqz	a0, no_cop2_context
-	nop
-
-do_cop2_save:
-	jal	octeon_cop2_save
-	nop
-
-no_cop2_context:
-	move	a3, s3
-	move	a2, s2
-	move	a1, s1
-	move	a0, s0
-
-cop2_untouched:
-#endif
-
-	PTR_S	a2, TD_LOCK(a3)			# Switchout td_lock 
-
-mips_sw1:
-#if defined(SMP) && defined(SCHED_ULE)
-	PTR_LA	t0, _C_LABEL(blocked_lock)
-blocked_loop:
-	PTR_L	t1, TD_LOCK(a1)
-	beq	t0, t1, blocked_loop
-	nop
-#endif
-	move	s7, a1	# Store newthread
-/*
- * Switch to new context.
- */
-	GET_CPU_PCPU(a3)
-	PTR_S	a1, PC_CURTHREAD(a3)
-	PTR_L	a2, TD_PCB(a1)
-	PTR_S	a2, PC_CURPCB(a3)
-	PTR_L	v0, TD_KSTACK(a1)
-#if defined(__mips_n64)
-	PTR_LI	s0, MIPS_XKSEG_START
-#else
-	PTR_LI	s0, MIPS_KSEG2_START		# If Uarea addr is below kseg2,
-#endif
-	bltu	v0, s0, sw2			# no need to insert in TLB.
-	PTE_L	a1, TD_UPTE + 0(s7)		# a1 = u. pte #0
-	PTE_L	a2, TD_UPTE + PTESIZE(s7)	# a2 = u. pte #1
-/*
- * Wiredown the USPACE of newproc in TLB entry#0.  Check whether target
- * USPACE is already in another place of TLB before that, and if so
- * invalidate that TLB entry.
- * NOTE: This is hard coded to UPAGES == 2.
- * Also, there should be no TLB faults at this point.
- */
-	MTC0	v0, MIPS_COP_0_TLB_HI		# VPN = va
-	HAZARD_DELAY
-	tlbp					# probe VPN
-	HAZARD_DELAY
-	mfc0	s0, MIPS_COP_0_TLB_INDEX
-	HAZARD_DELAY
-
-	PTR_LI	t1, MIPS_KSEG0_START		# invalidate tlb entry
-	bltz	s0, entry0set
-	nop
-	sll	s0, PAGE_SHIFT + 1
-	addu	t1, s0
-	MTC0	t1, MIPS_COP_0_TLB_HI
-	PTE_MTC0	zero, MIPS_COP_0_TLB_LO0
-	PTE_MTC0	zero, MIPS_COP_0_TLB_LO1
-	HAZARD_DELAY
-	tlbwi
-	HAZARD_DELAY
-	MTC0	v0, MIPS_COP_0_TLB_HI		# set VPN again
-
-entry0set:
-/* SMP!! - Works only for  unshared TLB case - i.e. no v-cpus */
-	mtc0	zero, MIPS_COP_0_TLB_INDEX		# TLB entry #0
-	HAZARD_DELAY
-	PTE_MTC0	a1, MIPS_COP_0_TLB_LO0		# upte[0]
-	HAZARD_DELAY
-	PTE_MTC0	a2, MIPS_COP_0_TLB_LO1		# upte[1]
-	HAZARD_DELAY
-	tlbwi					# set TLB entry #0
-	HAZARD_DELAY
-/*
- * Now running on new u struct.
- */
-sw2:
-	PTR_L	s0, TD_PCB(s7)
-	RESTORE_U_PCB_CONTEXT(sp, PCB_REG_SP, s0)
-	PTR_LA	t1, _C_LABEL(pmap_activate)	# s7 = new proc pointer
-	jalr	t1				# s7 = new proc pointer
-	move	a0, s7				# BDSLOT
-/*
- * Restore registers and return.
- */
-	move	a0, s0
-	move	a1, s7
-	RESTORE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
-	RESTORE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0)	# restore kernel context
-	RESTORE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0)
-	RESTORE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0)
-	RESTORE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
-	RESTORE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
-	RESTORE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
-	RESTORE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
-	RESTORE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
-	RESTORE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
-	RESTORE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
-	RESTORE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
-
-	mfc0	t0, MIPS_COP_0_STATUS
-	and	t0, t0, MIPS_SR_INT_MASK
-	and	v0, v0, ~MIPS_SR_INT_MASK
-	or	v0, v0, t0
-	mtc0	v0, MIPS_COP_0_STATUS
-	ITLBNOPFIX
-/*
- * Set the new thread's TLS pointer.
- *
- * Note that this code is removed if the CPU doesn't support ULRI by
- * remove_userlocal_code() in cpu.c.
- */
-	.globl	cpu_switch_set_userlocal
-cpu_switch_set_userlocal:
-	PTR_L	t0, TD_MDTLS(a1)		# Get TLS pointer
-	PTR_L	t1, TD_PROC(a1)
-	PTR_L	t1, P_MDTLS_TCB_OFFSET(t1)	# Get TLS/TCB offset
-	PTR_ADDU v0, t0, t1
-	MTC0	v0, MIPS_COP_0_USERLOCAL, 2	# write it to ULR for rdhwr
-
-	j	ra
-	nop
-END(cpu_switch)
-
-/*----------------------------------------------------------------------------
- *
- * MipsSwitchFPState --
- *
- *	Save the current state into 'from' and restore it from 'to'.
- *
- *	MipsSwitchFPState(from, to)
- *		struct thread *from;
- *		struct trapframe *to;
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-LEAF(MipsSwitchFPState)
-	.set push
-	.set hardfloat
-	mfc0	t1, MIPS_COP_0_STATUS	# Save old SR
-	HAZARD_DELAY
-#if defined(__mips_n32) || defined(__mips_n64)
-	or	t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR	# enable the coprocessor
-#else
-	or	t0, t1, MIPS_SR_COP_1_BIT 		# enable the coprocessor
-#endif
-	mtc0	t0, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-	ITLBNOPFIX
-
-	beq	a0, zero, 1f		# skip save if NULL pointer
-	nop
-/*
- * First read out the status register to make sure that all FP operations
- * have completed.
- */
-	PTR_L	a0, TD_PCB(a0)			# get pointer to pcb for proc
-	cfc1	t0, MIPS_FPU_CSR		# stall til FP done
-	cfc1	t0, MIPS_FPU_CSR		# now get status
-	li	t3, ~MIPS_SR_COP_1_BIT
-	RESTORE_U_PCB_REG(t2, PS, a0)		# get CPU status register
-	SAVE_U_PCB_FPSR(t0, FSR_NUM, a0)	# save FP status
-	and	t2, t2, t3			# clear COP_1 enable bit
-	SAVE_U_PCB_REG(t2, PS, a0)		# save new status register
-/*
- * Save the floating point registers.
- */
-	SAVE_U_PCB_FPREG($f0, F0_NUM, a0)
-	SAVE_U_PCB_FPREG($f1, F1_NUM, a0)
-	SAVE_U_PCB_FPREG($f2, F2_NUM, a0)
-	SAVE_U_PCB_FPREG($f3, F3_NUM, a0)
-	SAVE_U_PCB_FPREG($f4, F4_NUM, a0)
-	SAVE_U_PCB_FPREG($f5, F5_NUM, a0)
-	SAVE_U_PCB_FPREG($f6, F6_NUM, a0)
-	SAVE_U_PCB_FPREG($f7, F7_NUM, a0)
-	SAVE_U_PCB_FPREG($f8, F8_NUM, a0)
-	SAVE_U_PCB_FPREG($f9, F9_NUM, a0)
-	SAVE_U_PCB_FPREG($f10, F10_NUM, a0)
-	SAVE_U_PCB_FPREG($f11, F11_NUM, a0)
-	SAVE_U_PCB_FPREG($f12, F12_NUM, a0)
-	SAVE_U_PCB_FPREG($f13, F13_NUM, a0)
-	SAVE_U_PCB_FPREG($f14, F14_NUM, a0)
-	SAVE_U_PCB_FPREG($f15, F15_NUM, a0)
-	SAVE_U_PCB_FPREG($f16, F16_NUM, a0)
-	SAVE_U_PCB_FPREG($f17, F17_NUM, a0)
-	SAVE_U_PCB_FPREG($f18, F18_NUM, a0)
-	SAVE_U_PCB_FPREG($f19, F19_NUM, a0)
-	SAVE_U_PCB_FPREG($f20, F20_NUM, a0)
-	SAVE_U_PCB_FPREG($f21, F21_NUM, a0)
-	SAVE_U_PCB_FPREG($f22, F22_NUM, a0)
-	SAVE_U_PCB_FPREG($f23, F23_NUM, a0)
-	SAVE_U_PCB_FPREG($f24, F24_NUM, a0)
-	SAVE_U_PCB_FPREG($f25, F25_NUM, a0)
-	SAVE_U_PCB_FPREG($f26, F26_NUM, a0)
-	SAVE_U_PCB_FPREG($f27, F27_NUM, a0)
-	SAVE_U_PCB_FPREG($f28, F28_NUM, a0)
-	SAVE_U_PCB_FPREG($f29, F29_NUM, a0)
-	SAVE_U_PCB_FPREG($f30, F30_NUM, a0)
-	SAVE_U_PCB_FPREG($f31, F31_NUM, a0)
-
-1:
-/*
- *  Restore the floating point registers.
- */
-	RESTORE_U_PCB_FPSR(t0, FSR_NUM, a1)	# get status register
-	RESTORE_U_PCB_FPREG($f0, F0_NUM, a1)
-	RESTORE_U_PCB_FPREG($f1, F1_NUM, a1)
-	RESTORE_U_PCB_FPREG($f2, F2_NUM, a1)
-	RESTORE_U_PCB_FPREG($f3, F3_NUM, a1)
-	RESTORE_U_PCB_FPREG($f4, F4_NUM, a1)
-	RESTORE_U_PCB_FPREG($f5, F5_NUM, a1)
-	RESTORE_U_PCB_FPREG($f6, F6_NUM, a1)
-	RESTORE_U_PCB_FPREG($f7, F7_NUM, a1)
-	RESTORE_U_PCB_FPREG($f8, F8_NUM, a1)
-	RESTORE_U_PCB_FPREG($f9, F9_NUM, a1)
-	RESTORE_U_PCB_FPREG($f10, F10_NUM, a1)
-	RESTORE_U_PCB_FPREG($f11, F11_NUM, a1)
-	RESTORE_U_PCB_FPREG($f12, F12_NUM, a1)
-	RESTORE_U_PCB_FPREG($f13, F13_NUM, a1)
-	RESTORE_U_PCB_FPREG($f14, F14_NUM, a1)
-	RESTORE_U_PCB_FPREG($f15, F15_NUM, a1)
-	RESTORE_U_PCB_FPREG($f16, F16_NUM, a1)
-	RESTORE_U_PCB_FPREG($f17, F17_NUM, a1)
-	RESTORE_U_PCB_FPREG($f18, F18_NUM, a1)
-	RESTORE_U_PCB_FPREG($f19, F19_NUM, a1)
-	RESTORE_U_PCB_FPREG($f20, F20_NUM, a1)
-	RESTORE_U_PCB_FPREG($f21, F21_NUM, a1)
-	RESTORE_U_PCB_FPREG($f22, F22_NUM, a1)
-	RESTORE_U_PCB_FPREG($f23, F23_NUM, a1)
-	RESTORE_U_PCB_FPREG($f24, F24_NUM, a1)
-	RESTORE_U_PCB_FPREG($f25, F25_NUM, a1)
-	RESTORE_U_PCB_FPREG($f26, F26_NUM, a1)
-	RESTORE_U_PCB_FPREG($f27, F27_NUM, a1)
-	RESTORE_U_PCB_FPREG($f28, F28_NUM, a1)
-	RESTORE_U_PCB_FPREG($f29, F29_NUM, a1)
-	RESTORE_U_PCB_FPREG($f30, F30_NUM, a1)
-	RESTORE_U_PCB_FPREG($f31, F31_NUM, a1)
-
-	and	t0, t0, ~MIPS_FPU_EXCEPTION_BITS
-	ctc1	t0, MIPS_FPU_CSR
-	nop
-
-	mtc0	t1, MIPS_COP_0_STATUS		# Restore the status register.
-	ITLBNOPFIX
-	j	ra
-	nop
-	.set pop
-END(MipsSwitchFPState)
-
-/*----------------------------------------------------------------------------
- *
- * MipsFPID --
- *
- *	Read and return the floating point implementation register.
- *
- *	uint32_t
- *	MipsFPID(void)
- *
- * Results:
- *	Floating point implementation register.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-LEAF(MipsFPID)
-	.set push
-	.set hardfloat
-	mfc0	t1, MIPS_COP_0_STATUS		# Save the status register.
-	HAZARD_DELAY
-#if defined(__mips_n32) || defined(__mips_n64)
-	or	t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR
-#else
-	or	t0, t1, MIPS_SR_COP_1_BIT
-#endif
-	mtc0	t0, MIPS_COP_0_STATUS 		# Enable the coprocessor
-	HAZARD_DELAY
-	ITLBNOPFIX
-	cfc1	v0, MIPS_FPU_ID
-	mtc0	t1, MIPS_COP_0_STATUS		# Restore the status register.
-	ITLBNOPFIX
-	j	ra
-	nop
-	.set pop
-END(MipsFPID)
-
-/*----------------------------------------------------------------------------
- *
- * MipsSaveCurFPState --
- *
- *	Save the current floating point coprocessor state.
- *
- *	MipsSaveCurFPState(td)
- *		struct thread *td;
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	machFPCurProcPtr is cleared.
- *
- *----------------------------------------------------------------------------
- */
-LEAF(MipsSaveCurFPState)
-	.set push
-	.set hardfloat
-	PTR_L	a0, TD_PCB(a0)			# get pointer to pcb for thread
-	mfc0	t1, MIPS_COP_0_STATUS		# Disable interrupts and
-	HAZARD_DELAY
-#if defined(__mips_n32) || defined(__mips_n64)
-	or	t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR		#  enable the coprocessor
-#else
-	or	t0, t1, MIPS_SR_COP_1_BIT 			#  enable the coprocessor
-#endif
-	mtc0	t0, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-	ITLBNOPFIX
-	GET_CPU_PCPU(a1)
-	PTR_S	zero, PC_FPCURTHREAD(a1)	# indicate state has been saved
-/*
- * First read out the status register to make sure that all FP operations
- * have completed.
- */
-	RESTORE_U_PCB_REG(t2, PS, a0)		# get CPU status register
-	li	t3, ~MIPS_SR_COP_1_BIT
-	and	t2, t2, t3			# clear COP_1 enable bit
-	cfc1	t0, MIPS_FPU_CSR		# stall til FP done
-	cfc1	t0, MIPS_FPU_CSR		# now get status
-	SAVE_U_PCB_REG(t2, PS, a0)		# save new status register
-	SAVE_U_PCB_FPSR(t0, FSR_NUM, a0)	# save FP status
-/*
- * Save the floating point registers.
- */
-	SAVE_U_PCB_FPREG($f0, F0_NUM, a0)
-	SAVE_U_PCB_FPREG($f1, F1_NUM, a0)
-	SAVE_U_PCB_FPREG($f2, F2_NUM, a0)
-	SAVE_U_PCB_FPREG($f3, F3_NUM, a0)
-	SAVE_U_PCB_FPREG($f4, F4_NUM, a0)
-	SAVE_U_PCB_FPREG($f5, F5_NUM, a0)
-	SAVE_U_PCB_FPREG($f6, F6_NUM, a0)
-	SAVE_U_PCB_FPREG($f7, F7_NUM, a0)
-	SAVE_U_PCB_FPREG($f8, F8_NUM, a0)
-	SAVE_U_PCB_FPREG($f9, F9_NUM, a0)
-	SAVE_U_PCB_FPREG($f10, F10_NUM, a0)
-	SAVE_U_PCB_FPREG($f11, F11_NUM, a0)
-	SAVE_U_PCB_FPREG($f12, F12_NUM, a0)
-	SAVE_U_PCB_FPREG($f13, F13_NUM, a0)
-	SAVE_U_PCB_FPREG($f14, F14_NUM, a0)
-	SAVE_U_PCB_FPREG($f15, F15_NUM, a0)
-	SAVE_U_PCB_FPREG($f16, F16_NUM, a0)
-	SAVE_U_PCB_FPREG($f17, F17_NUM, a0)
-	SAVE_U_PCB_FPREG($f18, F18_NUM, a0)
-	SAVE_U_PCB_FPREG($f19, F19_NUM, a0)
-	SAVE_U_PCB_FPREG($f20, F20_NUM, a0)
-	SAVE_U_PCB_FPREG($f21, F21_NUM, a0)
-	SAVE_U_PCB_FPREG($f22, F22_NUM, a0)
-	SAVE_U_PCB_FPREG($f23, F23_NUM, a0)
-	SAVE_U_PCB_FPREG($f24, F24_NUM, a0)
-	SAVE_U_PCB_FPREG($f25, F25_NUM, a0)
-	SAVE_U_PCB_FPREG($f26, F26_NUM, a0)
-	SAVE_U_PCB_FPREG($f27, F27_NUM, a0)
-	SAVE_U_PCB_FPREG($f28, F28_NUM, a0)
-	SAVE_U_PCB_FPREG($f29, F29_NUM, a0)
-	SAVE_U_PCB_FPREG($f30, F30_NUM, a0)
-	SAVE_U_PCB_FPREG($f31, F31_NUM, a0)
-
-	mtc0	t1, MIPS_COP_0_STATUS		# Restore the status register.
-	ITLBNOPFIX
-	j	ra
-	nop
-	.set pop
-END(MipsSaveCurFPState)
-
-/*
- * This code is copied the user's stack for returning from signal handlers
- * (see sendsig() and sigreturn()). We have to compute the address
- * of the sigcontext struct for the sigreturn call.
- */
-	.globl	_C_LABEL(sigcode)
-_C_LABEL(sigcode):
-	PTR_ADDU	a0, sp, SIGF_UC		# address of ucontext
-	li		v0, SYS_sigreturn
-# sigreturn (ucp)
-	syscall
-	break	0				# just in case sigreturn fails
-	.globl	_C_LABEL(esigcode)
-_C_LABEL(esigcode):
-
-	.data
-	.globl	szsigcode
-szsigcode:
-	.long	esigcode-sigcode
-	.text
-
-#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
-	.globl	_C_LABEL(sigcode32)
-_C_LABEL(sigcode32):
-	addu		a0, sp, SIGF32_UC	# address of ucontext
-	li		v0, SYS_sigreturn
-# sigreturn (ucp)
-	syscall
-	break	0				# just in case sigreturn fails
-	.globl	_C_LABEL(esigcode32)
-_C_LABEL(esigcode32):
-
-	.data
-	.globl	szsigcode32
-szsigcode32:
-	.long	esigcode32-sigcode32
-	.text
-#endif
diff --git a/sys/mips/mips/sys_machdep.c b/sys/mips/mips/sys_machdep.c
deleted file mode 100644
index 87158b5c3cf3..000000000000
--- a/sys/mips/mips/sys_machdep.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-4-Clause
- *
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)sys_machdep.c	5.5 (Berkeley) 1/19/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/sysproto.h>
-#include <sys/syscall.h>
-#include <sys/sysent.h>
-
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/sysarch.h>
-#include <machine/cpuregs.h>
-#include <machine/tls.h>
-
-#ifndef _SYS_SYSPROTO_H_
-struct sysarch_args {
-	int op;
-	char *parms;
-};
-#endif
-
-int
-sysarch(struct thread *td, struct sysarch_args *uap)
-{
-	int error;
-	void *tlsbase;
-
-	switch (uap->op) {
-	case MIPS_SET_TLS:
-		td->td_md.md_tls = uap->parms;
-
-		/*
-		 * If there is an user local register implementation (ULRI)
-		 * update it as well.  Add the TLS and TCB offsets so the
-		 * value in this register is adjusted like in the case of the
-		 * rdhwr trap() instruction handler.
-		 */
-		if (cpuinfo.userlocal_reg == true) {
-			mips_wr_userlocal((unsigned long)(uap->parms +
-			    td->td_proc->p_md.md_tls_tcb_offset));
-		}
-		return (0);
-	case MIPS_GET_TLS: 
-		tlsbase = td->td_md.md_tls;
-		error = copyout(&tlsbase, uap->parms, sizeof(tlsbase));
-		return (error);
-	default:
-		break;
-	}
-	return (EINVAL);
-}
diff --git a/sys/mips/mips/tick.c b/sys/mips/mips/tick.c
deleted file mode 100644
index cdeb479e735b..000000000000
--- a/sys/mips/mips/tick.c
+++ /dev/null
@@ -1,401 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2006-2007 Bruce M. Simpson.
- * Copyright (c) 2003-2004 Juli Mallett.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *	notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *	notice, this list of conditions and the following disclaimer in the
- *	documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Simple driver for the 32-bit interval counter built in to all
- * MIPS32 CPUs.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/power.h>
-#include <sys/smp.h>
-#include <sys/time.h>
-#include <sys/timeet.h>
-#include <sys/timetc.h>
-
-#include <machine/hwfunc.h>
-#include <machine/clock.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-
-#ifdef INTRNG
-#include <machine/intr.h>
-#endif
-
-uint64_t counter_freq;
-
-struct timecounter *platform_timecounter;
-
-DPCPU_DEFINE_STATIC(uint32_t, cycles_per_tick);
-static uint32_t cycles_per_usec;
-
-DPCPU_DEFINE_STATIC(volatile uint32_t, counter_upper);
-DPCPU_DEFINE_STATIC(volatile uint32_t, counter_lower_last);
-DPCPU_DEFINE_STATIC(uint32_t, compare_ticks);
-DPCPU_DEFINE_STATIC(uint32_t, lost_ticks);
-
-struct clock_softc {
-	int intr_rid;
-	struct resource *intr_res;
-	void *intr_handler;
-	struct timecounter tc;
-	struct eventtimer et;
-};
-static struct clock_softc *softc;
-
-/*
- * Device methods
- */
-static int clock_probe(device_t);
-static void clock_identify(driver_t *, device_t);
-static int clock_attach(device_t);
-static unsigned counter_get_timecount(struct timecounter *tc);
-
-void 
-mips_timer_early_init(uint64_t clock_hz)
-{
-	/* Initialize clock early so that we can use DELAY sooner */
-	counter_freq = clock_hz;
-	cycles_per_usec = (clock_hz / (1000 * 1000));
-}
-
-void
-platform_initclocks(void)
-{
-
-	if (platform_timecounter != NULL)
-		tc_init(platform_timecounter);
-}
-
-static uint64_t
-tick_ticker(void)
-{
-	uint64_t ret;
-	uint32_t ticktock;
-	uint32_t t_lower_last, t_upper;
-
-	/*
-	 * Disable preemption because we are working with cpu specific data.
-	 */
-	critical_enter();
-
-	/*
-	 * Note that even though preemption is disabled, interrupts are
-	 * still enabled. In particular there is a race with clock_intr()
-	 * reading the values of 'counter_upper' and 'counter_lower_last'.
-	 *
-	 * XXX this depends on clock_intr() being executed periodically
-	 * so that 'counter_upper' and 'counter_lower_last' are not stale.
-	 */
-	do {
-		t_upper = DPCPU_GET(counter_upper);
-		t_lower_last = DPCPU_GET(counter_lower_last);
-	} while (t_upper != DPCPU_GET(counter_upper));
-
-	ticktock = mips_rd_count();
-
-	critical_exit();
-
-	/* COUNT register wrapped around */
-	if (ticktock < t_lower_last)
-		t_upper++;
-
-	ret = ((uint64_t)t_upper << 32) | ticktock;
-	return (ret);
-}
-
-void
-mips_timer_init_params(uint64_t platform_counter_freq, int double_count)
-{
-
-	/*
-	 * XXX: Do not use printf here: uart code 8250 may use DELAY so this
-	 * function should  be called before cninit.
-	 */
-	counter_freq = platform_counter_freq;
-	/*
-	 * XXX: Some MIPS32 cores update the Count register only every two
-	 * pipeline cycles.
-	 * We know this because of status registers in CP0, make it automatic.
-	 */
-	if (double_count != 0)
-		counter_freq /= 2;
-
-	cycles_per_usec = counter_freq / (1 * 1000 * 1000);
-	set_cputicker(tick_ticker, counter_freq, 1);
-}
-
-static int
-sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS)
-{
-	int error;
-	uint64_t freq;
-
-	if (softc == NULL)
-		return (EOPNOTSUPP);
-	freq = counter_freq;
-	error = sysctl_handle_64(oidp, &freq, sizeof(freq), req);
-	if (error == 0 && req->newptr != NULL) {
-		counter_freq = freq;
-		softc->et.et_frequency = counter_freq;
-		softc->tc.tc_frequency = counter_freq;
-	}
-	return (error);
-}
-
-SYSCTL_PROC(_machdep, OID_AUTO, counter_freq,
-    CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, NULL, 0,
-    sysctl_machdep_counter_freq, "QU",
-    "Timecounter frequency in Hz");
-
-static unsigned
-counter_get_timecount(struct timecounter *tc)
-{
-
-	return (mips_rd_count());
-}
-
-/*
- * Wait for about n microseconds (at least!).
- */
-void
-DELAY(int n)
-{
-	uint32_t cur, last, delta, usecs;
-
-	TSENTER();
-	/*
-	 * This works by polling the timer and counting the number of
-	 * microseconds that go by.
-	 */
-	last = mips_rd_count();
-	delta = usecs = 0;
-
-	while (n > usecs) {
-		cur = mips_rd_count();
-
-		/* Check to see if the timer has wrapped around. */
-		if (cur < last)
-			delta += cur + (0xffffffff - last) + 1;
-		else
-			delta += cur - last;
-
-		last = cur;
-
-		if (delta >= cycles_per_usec) {
-			usecs += delta / cycles_per_usec;
-			delta %= cycles_per_usec;
-		}
-	}
-	TSEXIT();
-}
-
-static int
-clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
-{
-	uint32_t fdiv, div, next;
-
-	if (period != 0) {
-		div = (et->et_frequency * period) >> 32;
-	} else
-		div = 0;
-	if (first != 0)
-		fdiv = (et->et_frequency * first) >> 32;
-	else 
-		fdiv = div;
-	DPCPU_SET(cycles_per_tick, div);
-	next = mips_rd_count() + fdiv;
-	DPCPU_SET(compare_ticks, next);
-	mips_wr_compare(next);
-	return (0);
-}
-
-static int
-clock_stop(struct eventtimer *et)
-{
-
-	DPCPU_SET(cycles_per_tick, 0);
-	mips_wr_compare(0xffffffff);
-	return (0);
-}
-
-/*
- * Device section of file below
- */
-static int
-clock_intr(void *arg)
-{
-	struct clock_softc *sc = (struct clock_softc *)arg;
-	uint32_t cycles_per_tick;
-	uint32_t count, compare_last, compare_next, lost_ticks;
-
-	cycles_per_tick = DPCPU_GET(cycles_per_tick);
-	/*
-	 * Set next clock edge.
-	 */
-	count = mips_rd_count();
-	compare_last = DPCPU_GET(compare_ticks);
-	if (cycles_per_tick > 0) {
-		compare_next = count + cycles_per_tick;
-		DPCPU_SET(compare_ticks, compare_next);
-		mips_wr_compare(compare_next);
-	} else	/* In one-shot mode timer should be stopped after the event. */
-		mips_wr_compare(0xffffffff);
-
-	/* COUNT register wrapped around */
-	if (count < DPCPU_GET(counter_lower_last)) {
-		DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1);
-	}
-	DPCPU_SET(counter_lower_last, count);
-
-	if (cycles_per_tick > 0) {
-		/*
-		 * Account for the "lost time" between when the timer interrupt
-		 * fired and when 'clock_intr' actually started executing.
-		 */
-		lost_ticks = DPCPU_GET(lost_ticks);
-		lost_ticks += count - compare_last;
-
-		/*
-		 * If the COUNT and COMPARE registers are no longer in sync
-		 * then make up some reasonable value for the 'lost_ticks'.
-		 *
-		 * This could happen, for e.g., after we resume normal
-		 * operations after exiting the debugger.
-		 */
-		if (lost_ticks > 2 * cycles_per_tick)
-			lost_ticks = cycles_per_tick;
-
-		while (lost_ticks >= cycles_per_tick) {
-			if (sc->et.et_active)
-				sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-			lost_ticks -= cycles_per_tick;
-		}
-		DPCPU_SET(lost_ticks, lost_ticks);
-	}
-	if (sc->et.et_active)
-		sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-	return (FILTER_HANDLED);
-}
-
-static int
-clock_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Generic MIPS32 ticker");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-clock_identify(driver_t * drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "clock", 0);
-}
-
-static int
-clock_attach(device_t dev)
-{
-	struct clock_softc *sc;
-#ifndef INTRNG
-	int error;
-#endif
-
-	if (device_get_unit(dev) != 0)
-		panic("can't attach more clocks");
-
-	softc = sc = device_get_softc(dev);
-#ifdef INTRNG
-	cpu_establish_hardintr("clock", clock_intr, NULL, sc, 5, INTR_TYPE_CLK,
-	    NULL);
-#else
-	sc->intr_rid = 0;
-	sc->intr_res = bus_alloc_resource(dev,
-	    SYS_RES_IRQ, &sc->intr_rid, 5, 5, 1, RF_ACTIVE);
-	if (sc->intr_res == NULL) {
-		device_printf(dev, "failed to allocate irq\n");
-		return (ENXIO);
-	}
-	error = bus_setup_intr(dev, sc->intr_res, INTR_TYPE_CLK,
-	    clock_intr, NULL, sc, &sc->intr_handler);
-	if (error != 0) {
-		device_printf(dev, "bus_setup_intr returned %d\n", error);
-		return (error);
-	}
-#endif
-
-	sc->tc.tc_get_timecount = counter_get_timecount;
-	sc->tc.tc_counter_mask = 0xffffffff;
-	sc->tc.tc_frequency = counter_freq;
-	sc->tc.tc_name = "MIPS32";
-	sc->tc.tc_quality = 800;
-	sc->tc.tc_priv = sc;
-	tc_init(&sc->tc);
-	sc->et.et_name = "MIPS32";
-	sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
-	    ET_FLAGS_PERCPU;
-	sc->et.et_quality = 800;
-	sc->et.et_frequency = counter_freq;
-	sc->et.et_min_period = 0x00004000LLU; /* To be safe. */
-	sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
-	sc->et.et_start = clock_start;
-	sc->et.et_stop = clock_stop;
-	sc->et.et_priv = sc;
-	et_register(&sc->et);
-	return (0);
-}
-
-static device_method_t clock_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, clock_probe),
-	DEVMETHOD(device_identify, clock_identify),
-	DEVMETHOD(device_attach, clock_attach),
-	DEVMETHOD(device_detach, bus_generic_detach),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-	{0, 0}
-};
-
-static driver_t clock_driver = {
-	"clock",
-	clock_methods,
-	sizeof(struct clock_softc),
-};
-
-static devclass_t clock_devclass;
-
-DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0);
diff --git a/sys/mips/mips/tlb.c b/sys/mips/mips/tlb.c
deleted file mode 100644
index d2df51cb018c..000000000000
--- a/sys/mips/mips/tlb.c
+++ /dev/null
@@ -1,389 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/pcpu.h>
-#include <sys/smp.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/pte.h>
-#include <machine/tlb.h>
-
-#if defined(CPU_CNMIPS)
-#define	MIPS_MAX_TLB_ENTRIES	128
-#elif defined(CPU_NLM)
-#define	MIPS_MAX_TLB_ENTRIES	(2048 + 128)
-#else
-#define	MIPS_MAX_TLB_ENTRIES	64
-#endif
-
-struct tlb_state {
-	unsigned wired;
-	struct tlb_entry {
-		register_t entryhi;
-		register_t entrylo0;
-		register_t entrylo1;
-		register_t pagemask;
-	} entry[MIPS_MAX_TLB_ENTRIES];
-};
-
-static struct tlb_state tlb_state[MAXCPU];
-
-#if 0
-/*
- * PageMask must increment in steps of 2 bits.
- */
-COMPILE_TIME_ASSERT(POPCNT(TLBMASK_MASK) % 2 == 0);
-#endif
-
-static inline void
-tlb_probe(void)
-{
-	__asm __volatile ("tlbp" : : : "memory");
-	mips_cp0_sync();
-}
-
-static inline void
-tlb_read(void)
-{
-	__asm __volatile ("tlbr" : : : "memory");
-	mips_cp0_sync();
-}
-
-static inline void
-tlb_write_indexed(void)
-{
-	__asm __volatile ("tlbwi" : : : "memory");
-	mips_cp0_sync();
-}
-
-static void tlb_invalidate_one(unsigned);
-
-void
-tlb_insert_wired(unsigned i, vm_offset_t va, pt_entry_t pte0, pt_entry_t pte1)
-{
-	register_t asid;
-	register_t s;
-
-	va &= ~PAGE_MASK;
-
-	s = intr_disable();
-	asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	mips_wr_index(i);
-	mips_wr_pagemask(0);
-	mips_wr_entryhi(TLBHI_ENTRY(va, 0));
-	mips_wr_entrylo0(pte0);
-	mips_wr_entrylo1(pte1);
-	tlb_write_indexed();
-
-	mips_wr_entryhi(asid);
-	intr_restore(s);
-}
-
-void
-tlb_invalidate_address(struct pmap *pmap, vm_offset_t va)
-{
-	register_t asid;
-	register_t s;
-	int i;
-
-	va &= ~PAGE_MASK;
-
-	s = intr_disable();
-	asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	mips_wr_pagemask(0);
-	mips_wr_entryhi(TLBHI_ENTRY(va, pmap_asid(pmap)));
-	tlb_probe();
-	i = mips_rd_index();
-	if (i >= 0)
-		tlb_invalidate_one(i);
-
-	mips_wr_entryhi(asid);
-	intr_restore(s);
-}
-
-void
-tlb_invalidate_all(void)
-{
-	register_t asid;
-	register_t s;
-	unsigned i;
-
-	s = intr_disable();
-	asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	for (i = mips_rd_wired(); i < num_tlbentries; i++)
-		tlb_invalidate_one(i);
-
-	mips_wr_entryhi(asid);
-	intr_restore(s);
-}
-
-void
-tlb_invalidate_all_user(struct pmap *pmap)
-{
-	register_t asid;
-	register_t s;
-	unsigned i;
-
-	s = intr_disable();
-	asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	for (i = mips_rd_wired(); i < num_tlbentries; i++) {
-		register_t uasid;
-
-		mips_wr_index(i);
-		tlb_read();
-
-		uasid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-		if (pmap == NULL) {
-			/*
-			 * Invalidate all non-kernel entries.
-			 */
-			if (uasid == 0)
-				continue;
-		} else {
-			/*
-			 * Invalidate this pmap's entries.
-			 */
-			if (uasid != pmap_asid(pmap))
-				continue;
-		}
-		tlb_invalidate_one(i);
-	}
-
-	mips_wr_entryhi(asid);
-	intr_restore(s);
-}
-
-/*
- * Invalidates any TLB entries that map a virtual page from the specified
- * address range.  If "end" is zero, then every virtual page is considered to
- * be within the address range's upper bound.
- */
-void
-tlb_invalidate_range(pmap_t pmap, vm_offset_t start, vm_offset_t end)
-{
-	register_t asid, end_hi, hi, hi_pagemask, s, save_asid, start_hi;
-	int i;
-
-	KASSERT(start < end || (end == 0 && start > 0),
-	    ("tlb_invalidate_range: invalid range"));
-
-	/*
-	 * Truncate the virtual address "start" to an even page frame number,
-	 * and round the virtual address "end" to an even page frame number.
-	 */
-	start &= ~((1 << TLBMASK_SHIFT) - 1);
-	end = roundup2(end, 1 << TLBMASK_SHIFT);
-
-	s = intr_disable();
-	save_asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	asid = pmap_asid(pmap);
-	start_hi = TLBHI_ENTRY(start, asid);
-	end_hi = TLBHI_ENTRY(end, asid);
-
-	/*
-	 * Select the fastest method for invalidating the TLB entries.
-	 */
-	if (end - start < num_tlbentries << TLBMASK_SHIFT || (end == 0 &&
-	    start >= -(num_tlbentries << TLBMASK_SHIFT))) {
-		/*
-		 * The virtual address range is small compared to the size of
-		 * the TLB.  Probe the TLB for each even numbered page frame
-		 * within the virtual address range.
-		 */
-		for (hi = start_hi; hi != end_hi; hi += 1 << TLBMASK_SHIFT) {
-			mips_wr_pagemask(0);
-			mips_wr_entryhi(hi);
-			tlb_probe();
-			i = mips_rd_index();
-			if (i >= 0)
-				tlb_invalidate_one(i);
-		}
-	} else {
-		/*
-		 * The virtual address range is large compared to the size of
-		 * the TLB.  Test every non-wired TLB entry.
-		 */
-		for (i = mips_rd_wired(); i < num_tlbentries; i++) {
-			mips_wr_index(i);
-			tlb_read();
-			hi = mips_rd_entryhi();
-			if ((hi & TLBHI_ASID_MASK) == asid && (hi < end_hi ||
-			    end == 0)) {
-				/*
-				 * If "hi" is a large page that spans
-				 * "start_hi", then it must be invalidated.
-				 */
-				hi_pagemask = mips_rd_pagemask();
-				if (hi >= (start_hi & ~(hi_pagemask <<
-				    TLBMASK_SHIFT)))
-					tlb_invalidate_one(i);
-			}
-		}
-	}
-
-	mips_wr_entryhi(save_asid);
-	intr_restore(s);
-}
-
-/* XXX Only if DDB?  */
-void
-tlb_save(void)
-{
-	unsigned ntlb, i, cpu;
-
-	cpu = PCPU_GET(cpuid);
-	if (num_tlbentries > MIPS_MAX_TLB_ENTRIES)
-		ntlb = MIPS_MAX_TLB_ENTRIES;
-	else
-		ntlb = num_tlbentries;
-	tlb_state[cpu].wired = mips_rd_wired();
-	for (i = 0; i < ntlb; i++) {
-		mips_wr_index(i);
-		tlb_read();
-
-		tlb_state[cpu].entry[i].entryhi = mips_rd_entryhi();
-		tlb_state[cpu].entry[i].pagemask = mips_rd_pagemask();
-		tlb_state[cpu].entry[i].entrylo0 = mips_rd_entrylo0();
-		tlb_state[cpu].entry[i].entrylo1 = mips_rd_entrylo1();
-	}
-}
-
-void
-tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte)
-{
-	register_t asid;
-	register_t s;
-	int i;
-
-	va &= ~PAGE_MASK;
-	pte &= ~TLBLO_SWBITS_MASK;
-
-	s = intr_disable();
-	asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-
-	mips_wr_pagemask(0);
-	mips_wr_entryhi(TLBHI_ENTRY(va, pmap_asid(pmap)));
-	tlb_probe();
-	i = mips_rd_index();
-	if (i >= 0) {
-		tlb_read();
-
-		if ((va & PAGE_SIZE) == 0) {
-			mips_wr_entrylo0(pte);
-		} else {
-			mips_wr_entrylo1(pte);
-		}
-		tlb_write_indexed();
-	}
-
-	mips_wr_entryhi(asid);
-	intr_restore(s);
-}
-
-static void
-tlb_invalidate_one(unsigned i)
-{
-	/* XXX an invalid ASID? */
-	mips_wr_entryhi(TLBHI_ENTRY(MIPS_KSEG0_START + (2 * i * PAGE_SIZE), 0));
-	mips_wr_entrylo0(0);
-	mips_wr_entrylo1(0);
-	mips_wr_pagemask(0);
-	mips_wr_index(i);
-	tlb_write_indexed();
-}
-
-#ifdef DDB
-#include <ddb/ddb.h>
-
-DB_SHOW_COMMAND(tlb, ddb_dump_tlb)
-{
-	register_t ehi, elo0, elo1, epagemask;
-	unsigned i, cpu, ntlb;
-
-	/*
-	 * XXX
-	 * The worst conversion from hex to decimal ever.
-	 */
-	if (have_addr)
-		cpu = ((addr >> 4) % 16) * 10 + (addr % 16);
-	else
-		cpu = PCPU_GET(cpuid);
-
-	if (cpu >= mp_ncpus) {
-		db_printf("Invalid CPU %u\n", cpu);
-		return;
-	}
-	if (num_tlbentries > MIPS_MAX_TLB_ENTRIES) {
-		ntlb = MIPS_MAX_TLB_ENTRIES;
-		db_printf("Warning: Only %d of %d TLB entries saved!\n",
-		    ntlb, num_tlbentries);
-	} else
-		ntlb = num_tlbentries;
-
-	if (cpu == PCPU_GET(cpuid))
-		tlb_save();
-
-	db_printf("Beginning TLB dump for CPU %u...\n", cpu);
-	for (i = 0; i < ntlb; i++) {
-		if (i == tlb_state[cpu].wired) {
-			if (i != 0)
-				db_printf("^^^ WIRED ENTRIES ^^^\n");
-			else
-				db_printf("(No wired entries.)\n");
-		}
-
-		/* XXX PageMask.  */
-		ehi = tlb_state[cpu].entry[i].entryhi;
-		elo0 = tlb_state[cpu].entry[i].entrylo0;
-		elo1 = tlb_state[cpu].entry[i].entrylo1;
-		epagemask = tlb_state[cpu].entry[i].pagemask;
-
-		if (elo0 == 0 && elo1 == 0)
-			continue;
-
-		db_printf("#%u\t=> %jx (pagemask %jx)\n", i, (intmax_t)ehi, (intmax_t) epagemask);
-		db_printf(" Lo0\t%jx\t(%#jx)\n", (intmax_t)elo0, (intmax_t)TLBLO_PTE_TO_PA(elo0));
-		db_printf(" Lo1\t%jx\t(%#jx)\n", (intmax_t)elo1, (intmax_t)TLBLO_PTE_TO_PA(elo1));
-	}
-	db_printf("Finished.\n");
-}
-#endif
diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c
deleted file mode 100644
index 9d7a07606373..000000000000
--- a/sys/mips/mips/trap.c
+++ /dev/null
@@ -1,1701 +0,0 @@
-/*	$OpenBSD: trap.c,v 1.19 1998/09/30 12:40:41 pefo Exp $	*/
-/* tracked to 1.23 */
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah Hdr: trap.c 1.32 91/04/06
- *
- *	from: @(#)trap.c	8.5 (Berkeley) 1/11/94
- *	JNPR: trap.c,v 1.13.2.2 2007/08/29 10:03:49 girish
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_ktrace.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysent.h>
-#include <sys/proc.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/signalvar.h>
-#include <sys/syscall.h>
-#include <sys/lock.h>
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_param.h>
-#include <sys/vmmeter.h>
-#include <sys/ptrace.h>
-#include <sys/user.h>
-#include <sys/buf.h>
-#include <sys/vnode.h>
-#include <sys/sysctl.h>
-#include <sys/syslog.h>
-#include <sys/bus.h>
-#ifdef KTRACE
-#include <sys/ktrace.h>
-#endif
-#include <net/netisr.h>
-
-#include <machine/trap.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/pte.h>
-#include <machine/pmap.h>
-#include <machine/md_var.h>
-#include <machine/mips_opcode.h>
-#include <machine/frame.h>
-#include <machine/regnum.h>
-#include <machine/tls.h>
-
-#ifdef DDB
-#include <machine/db_machdep.h>
-#include <ddb/db_sym.h>
-#include <ddb/ddb.h>
-#include <sys/kdb.h>
-#endif
-
-#ifdef KDTRACE_HOOKS
-#include <sys/dtrace_bsd.h>
-#endif
-
-#ifdef TRAP_DEBUG
-int trap_debug = 0;
-SYSCTL_INT(_machdep, OID_AUTO, trap_debug, CTLFLAG_RW,
-    &trap_debug, 0, "Debug information on all traps");
-#endif
-
-#define	lbu_macro(data, addr)						\
-	__asm __volatile ("lbu %0, 0x0(%1)"				\
-			: "=r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	lb_macro(data, addr)						\
-	__asm __volatile ("lb %0, 0x0(%1)"				\
-			: "=r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	lwl_macro(data, addr)						\
-	__asm __volatile ("lwl %0, 0x0(%1)"				\
-			: "+r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	lwr_macro(data, addr)						\
-	__asm __volatile ("lwr %0, 0x0(%1)"				\
-			: "+r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	ldl_macro(data, addr)						\
-	__asm __volatile ("ldl %0, 0x0(%1)"				\
-			: "+r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	ldr_macro(data, addr)						\
-	__asm __volatile ("ldr %0, 0x0(%1)"				\
-			: "+r" (data)	/* outputs */			\
-			: "r" (addr));	/* inputs */
-
-#define	sb_macro(data, addr)						\
-	__asm __volatile ("sb %0, 0x0(%1)"				\
-			:				/* outputs */	\
-			: "r" (data), "r" (addr));	/* inputs */
-
-#define	swl_macro(data, addr)						\
-	__asm __volatile ("swl %0, 0x0(%1)"				\
-			: 				/* outputs */	\
-			: "r" (data), "r" (addr));	/* inputs */
-
-#define	swr_macro(data, addr)						\
-	__asm __volatile ("swr %0, 0x0(%1)"				\
-			: 				/* outputs */	\
-			: "r" (data), "r" (addr));	/* inputs */
-
-#define	sdl_macro(data, addr)						\
-	__asm __volatile ("sdl %0, 0x0(%1)"				\
-			: 				/* outputs */	\
-			: "r" (data), "r" (addr));	/* inputs */
-
-#define	sdr_macro(data, addr)						\
-	__asm __volatile ("sdr %0, 0x0(%1)"				\
-			:				/* outputs */	\
-			: "r" (data), "r" (addr));	/* inputs */
-
-static void log_illegal_instruction(const char *, struct trapframe *);
-static void log_bad_page_fault(char *, struct trapframe *, int);
-static void log_frame_dump(struct trapframe *frame);
-static void get_mapping_info(vm_offset_t, pd_entry_t **, pt_entry_t **);
-
-int (*dtrace_invop_jump_addr)(struct trapframe *);
-
-#ifdef TRAP_DEBUG
-static void trap_frame_dump(struct trapframe *frame);
-#endif
-
-void (*machExceptionTable[]) (void)= {
-/*
- * The kernel exception handlers.
- */
-	MipsKernIntr,		/* external interrupt */
-	MipsKernGenException,	/* TLB modification */
-	MipsTLBInvalidException,/* TLB miss (load or instr. fetch) */
-	MipsTLBInvalidException,/* TLB miss (store) */
-	MipsKernGenException,	/* address error (load or I-fetch) */
-	MipsKernGenException,	/* address error (store) */
-	MipsKernGenException,	/* bus error (I-fetch) */
-	MipsKernGenException,	/* bus error (load or store) */
-	MipsKernGenException,	/* system call */
-	MipsKernGenException,	/* breakpoint */
-	MipsKernGenException,	/* reserved instruction */
-	MipsKernGenException,	/* coprocessor unusable */
-	MipsKernGenException,	/* arithmetic overflow */
-	MipsKernGenException,	/* trap exception */
-	MipsKernGenException,	/* virtual coherence exception inst */
-	MipsKernGenException,	/* floating point exception */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* watch exception */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* reserved */
-	MipsKernGenException,	/* virtual coherence exception data */
-/*
- * The user exception handlers.
- */
-	MipsUserIntr,		/* 0 */
-	MipsUserGenException,	/* 1 */
-	MipsTLBInvalidException,/* 2 */
-	MipsTLBInvalidException,/* 3 */
-	MipsUserGenException,	/* 4 */
-	MipsUserGenException,	/* 5 */
-	MipsUserGenException,	/* 6 */
-	MipsUserGenException,	/* 7 */
-	MipsUserGenException,	/* 8 */
-	MipsUserGenException,	/* 9 */
-	MipsUserGenException,	/* 10 */
-	MipsUserGenException,	/* 11 */
-	MipsUserGenException,	/* 12 */
-	MipsUserGenException,	/* 13 */
-	MipsUserGenException,	/* 14 */
-	MipsUserGenException,	/* 15 */
-	MipsUserGenException,	/* 16 */
-	MipsUserGenException,	/* 17 */
-	MipsUserGenException,	/* 18 */
-	MipsUserGenException,	/* 19 */
-	MipsUserGenException,	/* 20 */
-	MipsUserGenException,	/* 21 */
-	MipsUserGenException,	/* 22 */
-	MipsUserGenException,	/* 23 */
-	MipsUserGenException,	/* 24 */
-	MipsUserGenException,	/* 25 */
-	MipsUserGenException,	/* 26 */
-	MipsUserGenException,	/* 27 */
-	MipsUserGenException,	/* 28 */
-	MipsUserGenException,	/* 29 */
-	MipsUserGenException,	/* 20 */
-	MipsUserGenException,	/* 31 */
-};
-
-char *trap_type[] = {
-	"external interrupt",
-	"TLB modification",
-	"TLB miss (load or instr. fetch)",
-	"TLB miss (store)",
-	"address error (load or I-fetch)",
-	"address error (store)",
-	"bus error (I-fetch)",
-	"bus error (load or store)",
-	"system call",
-	"breakpoint",
-	"reserved instruction",
-	"coprocessor unusable",
-	"arithmetic overflow",
-	"trap",
-	"virtual coherency instruction",
-	"floating point",
-	"reserved 16",
-	"reserved 17",
-	"reserved 18",
-	"reserved 19",
-	"reserved 20",
-	"reserved 21",
-	"reserved 22",
-	"watch",
-	"reserved 24",
-	"reserved 25",
-	"reserved 26",
-	"reserved 27",
-	"reserved 28",
-	"reserved 29",
-	"reserved 30",
-	"virtual coherency data",
-};
-
-#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
-struct trapdebug trapdebug[TRAPSIZE], *trp = trapdebug;
-#endif
-
-#define	KERNLAND(x)	((vm_offset_t)(x) >= VM_MIN_KERNEL_ADDRESS && (vm_offset_t)(x) < VM_MAX_KERNEL_ADDRESS)
-#define	DELAYBRANCH(x)	((x) & MIPS_CR_BR_DELAY)
-
-/*
- * MIPS load/store access type
- */
-enum {
-	MIPS_LHU_ACCESS = 1,
-	MIPS_LH_ACCESS,
-	MIPS_LWU_ACCESS,
-	MIPS_LW_ACCESS,
-	MIPS_LD_ACCESS,
-	MIPS_SH_ACCESS,
-	MIPS_SW_ACCESS,
-	MIPS_SD_ACCESS
-};
-
-char *access_name[] = {
-	"Load Halfword Unsigned",
-	"Load Halfword",
-	"Load Word Unsigned",
-	"Load Word",
-	"Load Doubleword",
-	"Store Halfword",
-	"Store Word",
-	"Store Doubleword"
-};
-
-#ifdef	CPU_CNMIPS
-#include <machine/octeon_cop2.h>
-#endif
-
-static int allow_unaligned_acc = 1;
-
-SYSCTL_INT(_vm, OID_AUTO, allow_unaligned_acc, CTLFLAG_RW,
-    &allow_unaligned_acc, 0, "Allow unaligned accesses");
-
-/*
- * FP emulation is assumed to work on O32, but the code is outdated and crufty
- * enough that it's a more sensible default to have it disabled when using
- * other ABIs.  At the very least, it needs a lot of help in using
- * type-semantic ABI-oblivious macros for everything it does.
- */
-#if defined(__mips_o32)
-static int emulate_fp = 1;
-#else
-static int emulate_fp = 0;
-#endif
-SYSCTL_INT(_machdep, OID_AUTO, emulate_fp, CTLFLAG_RW,
-    &emulate_fp, 0, "Emulate unimplemented FPU instructions");
-
-static int emulate_unaligned_access(struct trapframe *frame, int mode);
-
-extern void fswintrberr(void); /* XXX */
-
-int
-cpu_fetch_syscall_args(struct thread *td)
-{
-	struct trapframe *locr0;
-	struct sysentvec *se;
-	struct syscall_args *sa;
-	int error, nsaved;
-
-	locr0 = td->td_frame;
-	sa = &td->td_sa;
-
-	bzero(sa->args, sizeof(sa->args));
-
-	/* compute next PC after syscall instruction */
-	td->td_pcb->pcb_tpc = locr0->pc; /* Remember if restart */
-	if (DELAYBRANCH(locr0->cause))	 /* Check BD bit */
-		locr0->pc = MipsEmulateBranch(locr0, locr0->pc, 0, 0);
-	else
-		locr0->pc += sizeof(int);
-	sa->code = locr0->v0;
-	sa->original_code = sa->code;
-
-	switch (sa->code) {
-	case SYS___syscall:
-	case SYS_syscall:
-		/*
-		 * This is an indirect syscall, in which the code is the first argument.
-		 */
-#if (!defined(__mips_n32) && !defined(__mips_n64)) || defined(COMPAT_FREEBSD32)
-		if (sa->code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
-			/*
-			 * Like syscall, but code is a quad, so as to maintain alignment
-			 * for the rest of the arguments.
-			 */
-			if (_QUAD_LOWWORD == 0)
-				sa->code = locr0->a0;
-			else
-				sa->code = locr0->a1;
-			sa->args[0] = locr0->a2;
-			sa->args[1] = locr0->a3;
-			nsaved = 2;
-			break;
-		} 
-#endif
-		/*
-		 * This is either not a quad syscall, or is a quad syscall with a
-		 * new ABI in which quads fit in a single register.
-		 */
-		sa->code = locr0->a0;
-		sa->args[0] = locr0->a1;
-		sa->args[1] = locr0->a2;
-		sa->args[2] = locr0->a3;
-		nsaved = 3;
-#if defined(__mips_n32) || defined(__mips_n64)
-#ifdef COMPAT_FREEBSD32
-		if (!SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
-#endif
-			/*
-			 * Non-o32 ABIs support more arguments in registers.
-			 */
-			sa->args[3] = locr0->a4;
-			sa->args[4] = locr0->a5;
-			sa->args[5] = locr0->a6;
-			sa->args[6] = locr0->a7;
-			nsaved += 4;
-#ifdef COMPAT_FREEBSD32
-		}
-#endif
-#endif
-		break;
-	default:
-		/*
-		 * A direct syscall, arguments are just parameters to the syscall.
-		 */
-		sa->args[0] = locr0->a0;
-		sa->args[1] = locr0->a1;
-		sa->args[2] = locr0->a2;
-		sa->args[3] = locr0->a3;
-		nsaved = 4;
-#if defined (__mips_n32) || defined(__mips_n64)
-#ifdef COMPAT_FREEBSD32
-		if (!SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
-#endif
-			/*
-			 * Non-o32 ABIs support more arguments in registers.
-			 */
-			sa->args[4] = locr0->a4;
-			sa->args[5] = locr0->a5;
-			sa->args[6] = locr0->a6;
-			sa->args[7] = locr0->a7;
-			nsaved += 4;
-#ifdef COMPAT_FREEBSD32
-		}
-#endif
-#endif
-		break;
-	}
-
-#ifdef TRAP_DEBUG
-	if (trap_debug)
-		printf("SYSCALL #%d pid:%u\n", sa->code, td->td_proc->p_pid);
-#endif
-
-	se = td->td_proc->p_sysent;
-	/*
-	 * XXX
-	 * Shouldn't this go before switching on the code?
-	 */
-
-	if (sa->code >= se->sv_size)
-		sa->callp = &se->sv_table[0];
-	else
-		sa->callp = &se->sv_table[sa->code];
-
-	if (sa->callp->sy_narg > nsaved) {
-#if defined(__mips_n32) || defined(__mips_n64)
-		/*
-		 * XXX
-		 * Is this right for new ABIs?  I think the 4 there
-		 * should be 8, size there are 8 registers to skip,
-		 * not 4, but I'm not certain.
-		 */
-#ifdef COMPAT_FREEBSD32
-		if (!SV_PROC_FLAG(td->td_proc, SV_ILP32))
-#endif
-			printf("SYSCALL #%u pid:%u, narg (%u) > nsaved (%u).\n",
-			    sa->code, td->td_proc->p_pid, sa->callp->sy_narg, nsaved);
-#endif
-#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
-		if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
-			unsigned i;
-			int32_t arg;
-
-			error = 0; /* XXX GCC is awful.  */
-			for (i = nsaved; i < sa->callp->sy_narg; i++) {
-				error = copyin((caddr_t)(intptr_t)(locr0->sp +
-				    (4 + (i - nsaved)) * sizeof(int32_t)),
-				    (caddr_t)&arg, sizeof arg);
-				if (error != 0)
-					break;
-				sa->args[i] = arg;
-			}
-		} else
-#endif
-		error = copyin((caddr_t)(intptr_t)(locr0->sp +
-		    4 * sizeof(register_t)), (caddr_t)&sa->args[nsaved],
-		   (u_int)(sa->callp->sy_narg - nsaved) * sizeof(register_t));
-		if (error != 0) {
-			locr0->v0 = error;
-			locr0->a3 = 1;
-		}
-	} else
-		error = 0;
-
-	if (error == 0) {
-		td->td_retval[0] = 0;
-		td->td_retval[1] = locr0->v1;
-	}
-
-	return (error);
-}
-
-#undef __FBSDID
-#define __FBSDID(x)
-#include "../../kern/subr_syscall.c"
-
-/*
- * Handle an exception.
- * Called from MipsKernGenException() or MipsUserGenException()
- * when a processor trap occurs.
- * In the case of a kernel trap, we return the pc where to resume if
- * p->p_addr->u_pcb.pcb_onfault is set, otherwise, return old pc.
- */
-register_t
-trap(struct trapframe *trapframe)
-{
-	int type, usermode;
-	int i = 0;
-	unsigned ucode = 0;
-	struct thread *td = curthread;
-	struct proc *p = curproc;
-	vm_prot_t ftype;
-	pmap_t pmap;
-	int access_type;
-	ksiginfo_t ksi;
-	char *msg = NULL;
-	intptr_t addr = 0;
-	register_t pc;
-	int cop, error;
-	register_t *frame_regs;
-#ifdef KDB
-	bool handled;
-#endif
-
-	trapdebug_enter(trapframe, 0);
-#ifdef KDB
-	if (kdb_active) {
-		kdb_reenter();
-		return (0);
-	}
-#endif
-	type = (trapframe->cause & MIPS_CR_EXC_CODE) >> MIPS_CR_EXC_CODE_SHIFT;
-	if (TRAPF_USERMODE(trapframe)) {
-		type |= T_USER;
-		usermode = 1;
-	} else {
-		usermode = 0;
-	}
-
-	/*
-	 * Enable hardware interrupts if they were on before the trap. If it
-	 * was off disable all so we don't accidently enable it when doing a
-	 * return to userland.
-	 */
-	if (trapframe->sr & MIPS_SR_INT_IE) {
-		set_intr_mask(trapframe->sr & MIPS_SR_INT_MASK);
-		intr_enable();
-	} else {
-		intr_disable();
-	}
-
-#ifdef TRAP_DEBUG
-	if (trap_debug) {
-		static vm_offset_t last_badvaddr = 0;
-		static vm_offset_t this_badvaddr = 0;
-		static int count = 0;
-		u_int32_t pid;
-
-		printf("trap type %x (%s - ", type,
-		    trap_type[type & (~T_USER)]);
-
-		if (type & T_USER)
-			printf("user mode)\n");
-		else
-			printf("kernel mode)\n");
-
-#ifdef SMP
-		printf("cpuid = %d\n", PCPU_GET(cpuid));
-#endif
-		pid = mips_rd_entryhi() & TLBHI_ASID_MASK;
-		printf("badaddr = %#jx, pc = %#jx, ra = %#jx, sp = %#jx, sr = %jx, pid = %d, ASID = %u\n",
-		    (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra,
-		    (intmax_t)trapframe->sp, (intmax_t)trapframe->sr,
-		    (curproc ? curproc->p_pid : -1), pid);
-
-		switch (type & ~T_USER) {
-		case T_TLB_MOD:
-		case T_TLB_LD_MISS:
-		case T_TLB_ST_MISS:
-		case T_ADDR_ERR_LD:
-		case T_ADDR_ERR_ST:
-			this_badvaddr = trapframe->badvaddr;
-			break;
-		case T_SYSCALL:
-			this_badvaddr = trapframe->ra;
-			break;
-		default:
-			this_badvaddr = trapframe->pc;
-			break;
-		}
-		if ((last_badvaddr == this_badvaddr) &&
-		    ((type & ~T_USER) != T_SYSCALL) &&
-		    ((type & ~T_USER) != T_COP_UNUSABLE)) {
-			if (++count == 3) {
-				trap_frame_dump(trapframe);
-				panic("too many faults at %p\n", (void *)last_badvaddr);
-			}
-		} else {
-			last_badvaddr = this_badvaddr;
-			count = 0;
-		}
-	}
-#endif
-
-#ifdef KDTRACE_HOOKS
-	/*
-	 * A trap can occur while DTrace executes a probe. Before
-	 * executing the probe, DTrace blocks re-scheduling and sets
-	 * a flag in its per-cpu flags to indicate that it doesn't
-	 * want to fault. On returning from the probe, the no-fault
-	 * flag is cleared and finally re-scheduling is enabled.
-	 *
-	 * If the DTrace kernel module has registered a trap handler,
-	 * call it and if it returns non-zero, assume that it has
-	 * handled the trap and modified the trap frame so that this
-	 * function can return normally.
-	 */
-	/*
-	 * XXXDTRACE: add pid probe handler here (if ever)
-	 */
-	if (!usermode) {
-		if (dtrace_trap_func != NULL &&
-		    (*dtrace_trap_func)(trapframe, type) != 0)
-			return (trapframe->pc);
-	}
-#endif
-
-	switch (type) {
-	case T_MCHECK:
-#ifdef DDB
-		kdb_trap(type, 0, trapframe);
-#endif
-		panic("MCHECK\n");
-		break;
-	case T_TLB_MOD:
-		/* check for kernel address */
-		if (KERNLAND(trapframe->badvaddr)) {
-			if (pmap_emulate_modified(kernel_pmap, 
-			    trapframe->badvaddr) != 0) {
-				ftype = VM_PROT_WRITE;
-				goto kernel_fault;
-			}
-			return (trapframe->pc);
-		}
-		/* FALLTHROUGH */
-
-	case T_TLB_MOD + T_USER:
-		pmap = &p->p_vmspace->vm_pmap;
-		if (pmap_emulate_modified(pmap, trapframe->badvaddr) != 0) {
-			ftype = VM_PROT_WRITE;
-			goto dofault;
-		}
-		if (!usermode)
-			return (trapframe->pc);
-		goto out;
-
-	case T_TLB_LD_MISS:
-	case T_TLB_ST_MISS:
-		ftype = (type == T_TLB_ST_MISS) ? VM_PROT_WRITE : VM_PROT_READ;
-		/* check for kernel address */
-		if (KERNLAND(trapframe->badvaddr)) {
-			vm_offset_t va;
-			int rv;
-
-	kernel_fault:
-			va = (vm_offset_t)trapframe->badvaddr;
-			rv = vm_fault_trap(kernel_map, va, ftype,
-			    VM_FAULT_NORMAL, NULL, NULL);
-			if (rv == KERN_SUCCESS)
-				return (trapframe->pc);
-			if (td->td_pcb->pcb_onfault != NULL) {
-				pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
-				td->td_pcb->pcb_onfault = NULL;
-				return (pc);
-			}
-			goto err;
-		}
-
-		/*
-		 * It is an error for the kernel to access user space except
-		 * through the copyin/copyout routines.
-		 */
-		if (td->td_pcb->pcb_onfault == NULL)
-			goto err;
-
-		goto dofault;
-
-	case T_TLB_LD_MISS + T_USER:
-		ftype = VM_PROT_READ;
-		goto dofault;
-
-	case T_TLB_ST_MISS + T_USER:
-		ftype = VM_PROT_WRITE;
-dofault:
-		{
-			vm_offset_t va;
-			struct vmspace *vm;
-			vm_map_t map;
-			int rv = 0;
-
-			vm = p->p_vmspace;
-			map = &vm->vm_map;
-			va = (vm_offset_t)trapframe->badvaddr;
-			if (KERNLAND(trapframe->badvaddr)) {
-				/*
-				 * Don't allow user-mode faults in kernel
-				 * address space.
-				 */
-				goto nogo;
-			}
-
-			rv = vm_fault_trap(map, va, ftype, VM_FAULT_NORMAL,
-			    &i, &ucode);
-			/*
-			 * XXXDTRACE: add dtrace_doubletrap_func here?
-			 */
-#ifdef VMFAULT_TRACE
-			printf("vm_fault(%p (pmap %p), %p (%p), %x, %d) -> %x at pc %p\n",
-			    map, &vm->vm_pmap, (void *)va, (void *)(intptr_t)trapframe->badvaddr,
-			    ftype, VM_FAULT_NORMAL, rv, (void *)(intptr_t)trapframe->pc);
-#endif
-
-			if (rv == KERN_SUCCESS) {
-				if (!usermode) {
-					return (trapframe->pc);
-				}
-				goto out;
-			}
-	nogo:
-			if (!usermode) {
-				if (td->td_pcb->pcb_onfault != NULL) {
-					pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
-					td->td_pcb->pcb_onfault = NULL;
-					return (pc);
-				}
-				goto err;
-			}
-			addr = trapframe->badvaddr;
-
-			msg = "BAD_PAGE_FAULT";
-			log_bad_page_fault(msg, trapframe, type);
-
-			break;
-		}
-
-	case T_ADDR_ERR_LD + T_USER:	/* misaligned or kseg access */
-	case T_ADDR_ERR_ST + T_USER:	/* misaligned or kseg access */
-		if (trapframe->badvaddr < 0 ||
-		    trapframe->badvaddr >= VM_MAXUSER_ADDRESS) {
-			msg = "ADDRESS_SPACE_ERR";
-		} else if (allow_unaligned_acc) {
-			int mode;
-
-			if (type == (T_ADDR_ERR_LD + T_USER))
-				mode = VM_PROT_READ;
-			else
-				mode = VM_PROT_WRITE;
-
-			access_type = emulate_unaligned_access(trapframe, mode);
-			if (access_type != 0)
-				goto out;
-			msg = "ALIGNMENT_FIX_ERR";
-		} else {
-			msg = "ADDRESS_ERR";
-		}
-
-		/* FALL THROUGH */
-
-	case T_BUS_ERR_IFETCH + T_USER:	/* BERR asserted to cpu */
-	case T_BUS_ERR_LD_ST + T_USER:	/* BERR asserted to cpu */
-		ucode = 0;	/* XXX should be VM_PROT_something */
-		i = SIGBUS;
-		addr = trapframe->pc;
-		if (!msg)
-			msg = "BUS_ERR";
-		log_bad_page_fault(msg, trapframe, type);
-		break;
-
-	case T_SYSCALL + T_USER:
-		{
-			syscallenter(td);
-
-#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
-			if (trp == trapdebug)
-				trapdebug[TRAPSIZE - 1].code = td->td_sa.code;
-			else
-				trp[-1].code = td->td_sa.code;
-#endif
-			trapdebug_enter(td->td_frame, -td->td_sa.code);
-
-			/*
-			 * The sync'ing of I & D caches for SYS_ptrace() is
-			 * done by procfs_domem() through procfs_rwmem()
-			 * instead of being done here under a special check
-			 * for SYS_ptrace().
-			 */
-			syscallret(td);
-			return (trapframe->pc);
-		}
-
-#if defined(KDTRACE_HOOKS) || defined(DDB)
-	case T_BREAK:
-#ifdef KDTRACE_HOOKS
-		if (!usermode && dtrace_invop_jump_addr != NULL &&
-		    dtrace_invop_jump_addr(trapframe) == 0)
-			return (trapframe->pc);
-#endif
-#ifdef DDB
-		kdb_trap(type, 0, trapframe);
-		return (trapframe->pc);
-#endif
-#endif
-
-	case T_BREAK + T_USER:
-		{
-			intptr_t va;
-			uint32_t instr;
-
-			i = SIGTRAP;
-			ucode = TRAP_BRKPT;
-
-			/* compute address of break instruction */
-			va = trapframe->pc;
-			if (DELAYBRANCH(trapframe->cause))
-				va += sizeof(int);
-			addr = va;
-
-			if (td->td_md.md_ss_addr != va)
-				break;
-
-			/* read break instruction */
-			instr = fuword32((caddr_t)va);
-
-			if (instr != MIPS_BREAK_SSTEP)
-				break;
-
-			CTR3(KTR_PTRACE,
-			    "trap: tid %d, single step at %#lx: %#08x",
-			    td->td_tid, va, instr);
-			PROC_LOCK(p);
-			_PHOLD(p);
-			error = ptrace_clear_single_step(td);
-			_PRELE(p);
-			PROC_UNLOCK(p);
-			if (error == 0)
-				ucode = TRAP_TRACE;
-			break;
-		}
-
-	case T_IWATCH + T_USER:
-	case T_DWATCH + T_USER:
-		{
-			intptr_t va;
-
-			/* compute address of trapped instruction */
-			va = trapframe->pc;
-			if (DELAYBRANCH(trapframe->cause))
-				va += sizeof(int);
-			printf("watch exception @ %p\n", (void *)va);
-			i = SIGTRAP;
-			ucode = TRAP_BRKPT;
-			addr = va;
-			break;
-		}
-
-	case T_TRAP + T_USER:
-		{
-			intptr_t va;
-			struct trapframe *locr0 = td->td_frame;
-
-			/* compute address of trap instruction */
-			va = trapframe->pc;
-			if (DELAYBRANCH(trapframe->cause))
-				va += sizeof(int);
-
-			if (DELAYBRANCH(trapframe->cause)) {	/* Check BD bit */
-				locr0->pc = MipsEmulateBranch(locr0, trapframe->pc, 0,
-				    0);
-			} else {
-				locr0->pc += sizeof(int);
-			}
-			addr = va;
-			i = SIGEMT;	/* Stuff it with something for now */
-			break;
-		}
-
-	case T_RES_INST + T_USER:
-		{
-			InstFmt inst;
-			inst = *(InstFmt *)(intptr_t)trapframe->pc;
-			switch (inst.RType.op) {
-			case OP_SPECIAL3:
-				switch (inst.RType.func) {
-				case OP_RDHWR:
-					/* Register 29 used for TLS */
-					if (inst.RType.rd == 29) {
-						frame_regs = &(trapframe->zero);
-						frame_regs[inst.RType.rt] = (register_t)(intptr_t)td->td_md.md_tls;
-						frame_regs[inst.RType.rt] += td->td_proc->p_md.md_tls_tcb_offset;
-						trapframe->pc += sizeof(int);
-						goto out;
-					}
-				break;
-				}
-			break;
-			}
-
-			log_illegal_instruction("RES_INST", trapframe);
-			i = SIGILL;
-			addr = trapframe->pc;
-		}
-		break;
-	case T_C2E:
-	case T_C2E + T_USER:
-		goto err;
-		break;
-	case T_COP_UNUSABLE:
-#ifdef	CPU_CNMIPS
-		cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT;
-		/* Handle only COP2 exception */
-		if (cop != 2)
-			goto err;
-
-		addr = trapframe->pc;
-		/* save userland cop2 context if it has been touched */
-		if ((td->td_md.md_flags & MDTD_COP2USED) &&
-		    (td->td_md.md_cop2owner == COP2_OWNER_USERLAND)) {
-			if (td->td_md.md_ucop2)
-				octeon_cop2_save(td->td_md.md_ucop2);
-			else
-				panic("COP2 was used in user mode but md_ucop2 is NULL");
-		}
-
-		if (td->td_md.md_cop2 == NULL) {
-			td->td_md.md_cop2 = octeon_cop2_alloc_ctx();
-			if (td->td_md.md_cop2 == NULL)
-				panic("Failed to allocate COP2 context");
-			memset(td->td_md.md_cop2, 0, sizeof(*td->td_md.md_cop2));
-		}
-
-		octeon_cop2_restore(td->td_md.md_cop2);
-		
-		/* Make userland re-request its context */
-		td->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
-		td->td_md.md_flags |= MDTD_COP2USED;
-		td->td_md.md_cop2owner = COP2_OWNER_KERNEL;
-		/* Enable COP2, it will be disabled in cpu_switch */
-		mips_wr_status(mips_rd_status() | MIPS_SR_COP_2_BIT);
-		return (trapframe->pc);
-#else
-		goto err;
-		break;
-#endif
-
-	case T_COP_UNUSABLE + T_USER:
-		cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT;
-		if (cop == 1) {
-			/* FP (COP1) instruction */
-			if (cpuinfo.fpu_id == 0) {
-				log_illegal_instruction("COP1_UNUSABLE",
-				    trapframe);
-				i = SIGILL;
-				break;
-			}
-			addr = trapframe->pc;
-			MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame);
-			PCPU_SET(fpcurthread, td);
-#if defined(__mips_n32) || defined(__mips_n64)
-			td->td_frame->sr |= MIPS_SR_COP_1_BIT | MIPS_SR_FR;
-#else
-			td->td_frame->sr |= MIPS_SR_COP_1_BIT;
-#endif
-			td->td_md.md_flags |= MDTD_FPUSED;
-			goto out;
-		}
-#ifdef	CPU_CNMIPS
-		else  if (cop == 2) {
-			addr = trapframe->pc;
-			if ((td->td_md.md_flags & MDTD_COP2USED) &&
-			    (td->td_md.md_cop2owner == COP2_OWNER_KERNEL)) {
-				if (td->td_md.md_cop2)
-					octeon_cop2_save(td->td_md.md_cop2);
-				else
-					panic("COP2 was used in kernel mode but md_cop2 is NULL");
-			}
-
-			if (td->td_md.md_ucop2 == NULL) {
-				td->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
-				if (td->td_md.md_ucop2 == NULL)
-					panic("Failed to allocate userland COP2 context");
-				memset(td->td_md.md_ucop2, 0, sizeof(*td->td_md.md_ucop2));
-			}
-
-			octeon_cop2_restore(td->td_md.md_ucop2);
-
-			td->td_frame->sr |= MIPS_SR_COP_2_BIT;
-			td->td_md.md_flags |= MDTD_COP2USED;
-			td->td_md.md_cop2owner = COP2_OWNER_USERLAND;
-			goto out;
-		}
-#endif
-		else {
-			log_illegal_instruction("COPn_UNUSABLE", trapframe);
-			i = SIGILL;	/* only FPU instructions allowed */
-			break;
-		}
-
-	case T_FPE:
-#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
-		trapDump("fpintr");
-#else
-		printf("FPU Trap: PC %#jx CR %x SR %x\n",
-		    (intmax_t)trapframe->pc, (unsigned)trapframe->cause, (unsigned)trapframe->sr);
-		goto err;
-#endif
-
-	case T_FPE + T_USER:
-		if (!emulate_fp) {
-			i = SIGFPE;
-			addr = trapframe->pc;
-			break;
-		}
-		MipsFPTrap(trapframe->sr, trapframe->cause, trapframe->pc);
-		goto out;
-
-	case T_OVFLOW + T_USER:
-		i = SIGFPE;
-		addr = trapframe->pc;
-		break;
-
-	case T_ADDR_ERR_LD:	/* misaligned access */
-	case T_ADDR_ERR_ST:	/* misaligned access */
-#ifdef TRAP_DEBUG
-		if (trap_debug) {
-			printf("+++ ADDR_ERR: type = %d, badvaddr = %#jx\n", type,
-			    (intmax_t)trapframe->badvaddr);
-		}
-#endif
-		/* Only allow emulation on a user address */
-		if (allow_unaligned_acc &&
-		    ((vm_offset_t)trapframe->badvaddr < VM_MAXUSER_ADDRESS)) {
-			int mode;
-
-			if (type == T_ADDR_ERR_LD)
-				mode = VM_PROT_READ;
-			else
-				mode = VM_PROT_WRITE;
-
-			access_type = emulate_unaligned_access(trapframe, mode);
-			if (access_type != 0)
-				return (trapframe->pc);
-		}
-		/* FALLTHROUGH */
-
-	case T_BUS_ERR_LD_ST:	/* BERR asserted to cpu */
-		if (td->td_pcb->pcb_onfault != NULL) {
-			pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault;
-			td->td_pcb->pcb_onfault = NULL;
-			return (pc);
-		}
-
-		/* FALLTHROUGH */
-
-	default:
-err:
-
-#if !defined(SMP) && defined(DEBUG)
-		trapDump("trap");
-#endif
-#ifdef SMP
-		printf("cpu:%d-", PCPU_GET(cpuid));
-#endif
-		printf("Trap cause = %d (%s - ", type,
-		    trap_type[type & (~T_USER)]);
-
-		if (type & T_USER)
-			printf("user mode)\n");
-		else
-			printf("kernel mode)\n");
-
-#ifdef TRAP_DEBUG
-		if (trap_debug)
-			printf("badvaddr = %#jx, pc = %#jx, ra = %#jx, sr = %#jxx\n",
-			       (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra,
-			       (intmax_t)trapframe->sr);
-#endif
-
-#ifdef KDB
-		if (debugger_on_trap) {
-			kdb_why = KDB_WHY_TRAP;
-			handled = kdb_trap(type, 0, trapframe);
-			kdb_why = KDB_WHY_UNSET;
-			if (handled)
-				return (trapframe->pc);
-		}
-#endif
-		panic("trap");
-	}
-	td->td_frame->pc = trapframe->pc;
-	td->td_frame->cause = trapframe->cause;
-	td->td_frame->badvaddr = trapframe->badvaddr;
-	ksiginfo_init_trap(&ksi);
-	ksi.ksi_signo = i;
-	ksi.ksi_code = ucode;
-	ksi.ksi_addr = (void *)addr;
-	ksi.ksi_trapno = type & ~T_USER;
-	trapsignal(td, &ksi);
-out:
-
-	/*
-	 * Note: we should only get here if returning to user mode.
-	 */
-	userret(td, trapframe);
-	return (trapframe->pc);
-}
-
-#if !defined(SMP) && (defined(DDB) || defined(DEBUG))
-void
-trapDump(char *msg)
-{
-	register_t s;
-	int i;
-
-	s = intr_disable();
-	printf("trapDump(%s)\n", msg);
-	for (i = 0; i < TRAPSIZE; i++) {
-		if (trp == trapdebug) {
-			trp = &trapdebug[TRAPSIZE - 1];
-		} else {
-			trp--;
-		}
-
-		if (trp->cause == 0)
-			break;
-
-		printf("%s: ADR %jx PC %jx CR %jx SR %jx\n",
-		    trap_type[(trp->cause & MIPS_CR_EXC_CODE) >> 
-			MIPS_CR_EXC_CODE_SHIFT],
-		    (intmax_t)trp->vadr, (intmax_t)trp->pc,
-		    (intmax_t)trp->cause, (intmax_t)trp->status);
-
-		printf("   RA %jx SP %jx code %d\n", (intmax_t)trp->ra,
-		    (intmax_t)trp->sp, (int)trp->code);
-	}
-	intr_restore(s);
-}
-#endif
-
-/*
- * Return the resulting PC as if the branch was executed.
- */
-uintptr_t
-MipsEmulateBranch(struct trapframe *framePtr, uintptr_t instPC, int fpcCSR,
-    uintptr_t instptr)
-{
-	InstFmt inst;
-	register_t *regsPtr = (register_t *) framePtr;
-	uintptr_t retAddr = 0;
-	int condition;
-
-#define	GetBranchDest(InstPtr, inst) \
-	(InstPtr + 4 + ((short)inst.IType.imm << 2))
-
-	if (instptr) {
-		if (instptr < MIPS_KSEG0_START)
-			inst.word = fuword32((void *)instptr);
-		else
-			inst = *(InstFmt *) instptr;
-	} else {
-		if ((vm_offset_t)instPC < MIPS_KSEG0_START)
-			inst.word = fuword32((void *)instPC);
-		else
-			inst = *(InstFmt *) instPC;
-	}
-
-	switch ((int)inst.JType.op) {
-	case OP_SPECIAL:
-		switch ((int)inst.RType.func) {
-		case OP_JR:
-		case OP_JALR:
-			retAddr = regsPtr[inst.RType.rs];
-			break;
-
-		default:
-			retAddr = instPC + 4;
-			break;
-		}
-		break;
-
-	case OP_BCOND:
-		switch ((int)inst.IType.rt) {
-		case OP_BLTZ:
-		case OP_BLTZL:
-		case OP_BLTZAL:
-		case OP_BLTZALL:
-			if ((int)(regsPtr[inst.RType.rs]) < 0)
-				retAddr = GetBranchDest(instPC, inst);
-			else
-				retAddr = instPC + 8;
-			break;
-
-		case OP_BGEZ:
-		case OP_BGEZL:
-		case OP_BGEZAL:
-		case OP_BGEZALL:
-			if ((int)(regsPtr[inst.RType.rs]) >= 0)
-				retAddr = GetBranchDest(instPC, inst);
-			else
-				retAddr = instPC + 8;
-			break;
-
-		case OP_TGEI:
-		case OP_TGEIU:
-		case OP_TLTI:
-		case OP_TLTIU:
-		case OP_TEQI:
-		case OP_TNEI:
-			retAddr = instPC + 4;	/* Like syscall... */
-			break;
-
-		default:
-			panic("MipsEmulateBranch: Bad branch cond");
-		}
-		break;
-
-	case OP_J:
-	case OP_JAL:
-		retAddr = (inst.JType.target << 2) |
-		    ((unsigned)(instPC + 4) & 0xF0000000);
-		break;
-
-	case OP_BEQ:
-	case OP_BEQL:
-		if (regsPtr[inst.RType.rs] == regsPtr[inst.RType.rt])
-			retAddr = GetBranchDest(instPC, inst);
-		else
-			retAddr = instPC + 8;
-		break;
-
-	case OP_BNE:
-	case OP_BNEL:
-		if (regsPtr[inst.RType.rs] != regsPtr[inst.RType.rt])
-			retAddr = GetBranchDest(instPC, inst);
-		else
-			retAddr = instPC + 8;
-		break;
-
-	case OP_BLEZ:
-	case OP_BLEZL:
-		if ((int)(regsPtr[inst.RType.rs]) <= 0)
-			retAddr = GetBranchDest(instPC, inst);
-		else
-			retAddr = instPC + 8;
-		break;
-
-	case OP_BGTZ:
-	case OP_BGTZL:
-		if ((int)(regsPtr[inst.RType.rs]) > 0)
-			retAddr = GetBranchDest(instPC, inst);
-		else
-			retAddr = instPC + 8;
-		break;
-
-	case OP_COP1:
-		switch (inst.RType.rs) {
-		case OP_BCx:
-		case OP_BCy:
-			if ((inst.RType.rt & COPz_BC_TF_MASK) == COPz_BC_TRUE)
-				condition = fpcCSR & MIPS_FPU_COND_BIT;
-			else
-				condition = !(fpcCSR & MIPS_FPU_COND_BIT);
-			if (condition)
-				retAddr = GetBranchDest(instPC, inst);
-			else
-				retAddr = instPC + 8;
-			break;
-
-		default:
-			retAddr = instPC + 4;
-		}
-		break;
-
-	default:
-		retAddr = instPC + 4;
-	}
-	return (retAddr);
-}
-
-static void
-log_frame_dump(struct trapframe *frame)
-{
-	log(LOG_ERR, "Trapframe Register Dump:\n");
-	log(LOG_ERR, "\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n",
-	    (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1);
-
-	log(LOG_ERR, "\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n",
-	    (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3);
-
-#if defined(__mips_n32) || defined(__mips_n64)
-	log(LOG_ERR, "\ta4: %#jx\ta5: %#jx\ta6: %#jx\ta6: %#jx\n",
-	    (intmax_t)frame->a4, (intmax_t)frame->a5, (intmax_t)frame->a6, (intmax_t)frame->a7);
-
-	log(LOG_ERR, "\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
-	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
-#else
-	log(LOG_ERR, "\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
-	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
-
-	log(LOG_ERR, "\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n",
-	    (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7);
-#endif
-	log(LOG_ERR, "\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n",
-	    (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1);
-
-	log(LOG_ERR, "\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n",
-	    (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5);
-
-	log(LOG_ERR, "\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n",
-	    (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1);
-
-	log(LOG_ERR, "\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n",
-	    (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra);
-
-	log(LOG_ERR, "\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n",
-	    (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr);
-
-	log(LOG_ERR, "\tcause: %#jx\tpc: %#jx\n",
-	    (intmax_t)frame->cause, (intmax_t)frame->pc);
-}
-
-#ifdef TRAP_DEBUG
-static void
-trap_frame_dump(struct trapframe *frame)
-{
-	printf("Trapframe Register Dump:\n");
-	printf("\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n",
-	    (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1);
-
-	printf("\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n",
-	    (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3);
-#if defined(__mips_n32) || defined(__mips_n64)
-	printf("\ta4: %#jx\ta5: %#jx\ta6: %#jx\ta7: %#jx\n",
-	    (intmax_t)frame->a4, (intmax_t)frame->a5, (intmax_t)frame->a6, (intmax_t)frame->a7);
-
-	printf("\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
-	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
-#else
-	printf("\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n",
-	    (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3);
-
-	printf("\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n",
-	    (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7);
-#endif
-	printf("\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n",
-	    (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1);
-
-	printf("\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n",
-	    (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5);
-
-	printf("\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n",
-	    (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1);
-
-	printf("\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n",
-	    (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra);
-
-	printf("\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n",
-	    (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr);
-
-	printf("\tcause: %#jx\tpc: %#jx\n",
-	    (intmax_t)frame->cause, (intmax_t)frame->pc);
-}
-
-#endif
-
-static void
-get_mapping_info(vm_offset_t va, pd_entry_t **pdepp, pt_entry_t **ptepp)
-{
-	pt_entry_t *ptep;
-	pd_entry_t *pdep;
-	struct proc *p = curproc;
-
-	pdep = (&(p->p_vmspace->vm_pmap.pm_segtab[(va >> SEGSHIFT) & (NPDEPG - 1)]));
-	if (*pdep)
-		ptep = pmap_pte(&p->p_vmspace->vm_pmap, va);
-	else
-		ptep = (pt_entry_t *)0;
-
-	*pdepp = pdep;
-	*ptepp = ptep;
-}
-
-static void
-log_illegal_instruction(const char *msg, struct trapframe *frame)
-{
-	pt_entry_t *ptep;
-	pd_entry_t *pdep;
-	unsigned int *addr, instr[4];
-	struct thread *td;
-	struct proc *p;
-	register_t pc;
-
-	td = curthread;
-	p = td->td_proc;
-
-#ifdef SMP
-	printf("cpuid = %d\n", PCPU_GET(cpuid));
-#endif
-	pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0);
-	log(LOG_ERR, "%s: pid %d tid %ld (%s), uid %d: pc %#jx ra %#jx\n",
-	    msg, p->p_pid, (long)td->td_tid, p->p_comm,
-	    p->p_ucred ? p->p_ucred->cr_uid : -1,
-	    (intmax_t)pc,
-	    (intmax_t)frame->ra);
-
-	/* log registers in trap frame */
-	log_frame_dump(frame);
-
-	get_mapping_info((vm_offset_t)pc, &pdep, &ptep);
-
-	/*
-	 * Dump a few words around faulting instruction, if the addres is
-	 * valid.
-	 */
-	addr = (unsigned int *)(intptr_t)pc;
-	if ((pc & 3) == 0 && copyin(addr, instr, sizeof(instr)) == 0) {
-		/* dump page table entry for faulting instruction */
-		log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n",
-		    (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
-
-		log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
-		    addr);
-		log(LOG_ERR, "%08x %08x %08x %08x\n",
-		    instr[0], instr[1], instr[2], instr[3]);
-	} else {
-		log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n",
-		    (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
-	}
-}
-
-static void
-log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type)
-{
-	pt_entry_t *ptep;
-	pd_entry_t *pdep;
-	unsigned int *addr, instr[4];
-	struct thread *td;
-	struct proc *p;
-	char *read_or_write;
-	register_t pc;
-
-	trap_type &= ~T_USER;
-
-	td = curthread;
-	p = td->td_proc;
-
-#ifdef SMP
-	printf("cpuid = %d\n", PCPU_GET(cpuid));
-#endif
-	switch (trap_type) {
-	case T_TLB_MOD:
-	case T_TLB_ST_MISS:
-	case T_ADDR_ERR_ST:
-		read_or_write = "write";
-		break;
-	case T_TLB_LD_MISS:
-	case T_ADDR_ERR_LD:
-	case T_BUS_ERR_IFETCH:
-		read_or_write = "read";
-		break;
-	default:
-		read_or_write = "unknown";
-	}
-
-	pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0);
-	log(LOG_ERR, "%s: pid %d tid %ld (%s), uid %d: pc %#jx got a %s fault "
-	    "(type %#x) at %#jx\n",
-	    msg, p->p_pid, (long)td->td_tid, p->p_comm,
-	    p->p_ucred ? p->p_ucred->cr_uid : -1,
-	    (intmax_t)pc,
-	    read_or_write,
-	    trap_type,
-	    (intmax_t)frame->badvaddr);
-
-	/* log registers in trap frame */
-	log_frame_dump(frame);
-
-	get_mapping_info((vm_offset_t)pc, &pdep, &ptep);
-
-	/*
-	 * Dump a few words around faulting instruction, if the addres is
-	 * valid.
-	 */
-	addr = (unsigned int *)(intptr_t)pc;
-	if ((pc & 3) == 0 && pc != frame->badvaddr &&
-	    trap_type != T_BUS_ERR_IFETCH &&
-	    copyin((caddr_t)(intptr_t)pc, instr, sizeof(instr)) == 0) {
-		/* dump page table entry for faulting instruction */
-		log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n",
-		    (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
-
-		log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n",
-		    addr);
-		log(LOG_ERR, "%08x %08x %08x %08x\n",
-		    instr[0], instr[1], instr[2], instr[3]);
-	} else {
-		log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n",
-		    (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
-	}
-
-	get_mapping_info((vm_offset_t)frame->badvaddr, &pdep, &ptep);
-	log(LOG_ERR, "Page table info for bad address %#jx: pde = %p, pte = %#jx\n",
-	    (intmax_t)frame->badvaddr, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0));
-}
-
-/*
- * Unaligned load/store emulation
- */
-static int
-mips_unaligned_load_store(struct trapframe *frame, int mode, register_t addr, register_t pc)
-{
-	register_t *reg = (register_t *) frame;
-	u_int32_t inst = *((u_int32_t *)(intptr_t)pc);
-	register_t value_msb = 0, value = 0;
-	unsigned size;
-
-	/*
-	 * ADDR_ERR faults have higher priority than TLB
-	 * Miss faults.  Therefore, it is necessary to
-	 * verify that the faulting address is a valid
-	 * virtual address within the process' address space
-	 * before trying to emulate the unaligned access.
-	 */
-	switch (MIPS_INST_OPCODE(inst)) {
-	case OP_LHU: case OP_LH:
-	case OP_SH:
-		size = 2;
-		break;
-	case OP_LWU: case OP_LW:
-	case OP_SW:
-		size = 4;
-		break;
-	case OP_LD:
-	case OP_SD:
-		size = 8;
-		break;
-	default:
-		printf("%s: unhandled opcode in address error: %#x\n", __func__, MIPS_INST_OPCODE(inst));
-		return (0);
-	}
-
-	if (!useracc((void *)rounddown2((vm_offset_t)addr, size), size * 2, mode))
-		return (0);
-
-	/*
-	 * XXX
-	 * Handle LL/SC LLD/SCD.
-	 */
-	switch (MIPS_INST_OPCODE(inst)) {
-	case OP_LHU:
-		KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction."));
-		lbu_macro(value_msb, addr);
-		addr += 1;
-		lbu_macro(value, addr);
-		value |= value_msb << 8;
-		reg[MIPS_INST_RT(inst)] = value;
-		return (MIPS_LHU_ACCESS);
-
-	case OP_LH:
-		KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction."));
-		lb_macro(value_msb, addr);
-		addr += 1;
-		lbu_macro(value, addr);
-		value |= value_msb << 8;
-		reg[MIPS_INST_RT(inst)] = value;
-		return (MIPS_LH_ACCESS);
-
-	case OP_LWU:
-		KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction."));
-		lwl_macro(value, addr);
-		addr += 3;
-		lwr_macro(value, addr);
-		value &= 0xffffffff;
-		reg[MIPS_INST_RT(inst)] = value;
-		return (MIPS_LWU_ACCESS);
-
-	case OP_LW:
-		KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction."));
-		lwl_macro(value, addr);
-		addr += 3;
-		lwr_macro(value, addr);
-		reg[MIPS_INST_RT(inst)] = value;
-		return (MIPS_LW_ACCESS);
-
-#if defined(__mips_n32) || defined(__mips_n64)
-	case OP_LD:
-		KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction."));
-		ldl_macro(value, addr);
-		addr += 7;
-		ldr_macro(value, addr);
-		reg[MIPS_INST_RT(inst)] = value;
-		return (MIPS_LD_ACCESS);
-#endif
-
-	case OP_SH:
-		KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction."));
-		value = reg[MIPS_INST_RT(inst)];
-		value_msb = value >> 8;
-		sb_macro(value_msb, addr);
-		addr += 1;
-		sb_macro(value, addr);
-		return (MIPS_SH_ACCESS);
-
-	case OP_SW:
-		KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction."));
-		value = reg[MIPS_INST_RT(inst)];
-		swl_macro(value, addr);
-		addr += 3;
-		swr_macro(value, addr);
-		return (MIPS_SW_ACCESS);
-
-#if defined(__mips_n32) || defined(__mips_n64)
-	case OP_SD:
-		KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction."));
-		value = reg[MIPS_INST_RT(inst)];
-		sdl_macro(value, addr);
-		addr += 7;
-		sdr_macro(value, addr);
-		return (MIPS_SD_ACCESS);
-#endif
-	}
-	panic("%s: should not be reached.", __func__);
-}
-
-/*
- * XXX TODO: SMP?
- */
-static struct timeval unaligned_lasterr;
-static int unaligned_curerr;
-
-static int unaligned_pps_log_limit = 4;
-
-SYSCTL_INT(_machdep, OID_AUTO, unaligned_log_pps_limit, CTLFLAG_RWTUN,
-    &unaligned_pps_log_limit, 0,
-    "limit number of userland unaligned log messages per second");
-
-static int
-emulate_unaligned_access(struct trapframe *frame, int mode)
-{
-	register_t pc;
-	int access_type = 0;
-	struct thread *td = curthread;
-	struct proc *p = curproc;
-
-	pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0);
-
-	/*
-	 * Fall through if it's instruction fetch exception
-	 */
-	if (!((pc & 3) || (pc == frame->badvaddr))) {
-		/*
-		 * Handle unaligned load and store
-		 */
-
-		/*
-		 * Return access type if the instruction was emulated.
-		 * Otherwise restore pc and fall through.
-		 */
-		access_type = mips_unaligned_load_store(frame,
-		    mode, frame->badvaddr, pc);
-
-		if (access_type) {
-			if (DELAYBRANCH(frame->cause))
-				frame->pc = MipsEmulateBranch(frame, frame->pc,
-				    0, 0);
-			else
-				frame->pc += 4;
-
-			if (ppsratecheck(&unaligned_lasterr,
-			    &unaligned_curerr, unaligned_pps_log_limit)) {
-				/* XXX TODO: keep global/tid/pid counters? */
-				log(LOG_INFO,
-				    "Unaligned %s: pid=%ld (%s), tid=%ld, "
-				    "pc=%#jx, badvaddr=%#jx\n",
-				    access_name[access_type - 1],
-				    (long) p->p_pid,
-				    p->p_comm,
-				    (long) td->td_tid,
-				    (intmax_t)pc,
-				    (intmax_t)frame->badvaddr);
-			}
-		}
-	}
-	return access_type;
-}
diff --git a/sys/mips/mips/uio_machdep.c b/sys/mips/mips/uio_machdep.c
deleted file mode 100644
index 55dbff6eadd3..000000000000
--- a/sys/mips/mips/uio_machdep.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2004 Alan L. Cox <alc@cs.rice.edu>
- * Copyright (c) 1982, 1986, 1991, 1993
- *	The Regents of the University of California.  All rights reserved.
- * (c) UNIX System Laboratories, Inc.
- * All or some portions of this file are derived from material licensed
- * to the University of California by American Telephone and Telegraph
- * Co. or Unix System Laboratories, Inc. and are reproduced herein with
- * the permission of UNIX System Laboratories, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)kern_subr.c	8.3 (Berkeley) 1/21/94
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/sf_buf.h>
-#include <sys/uio.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-#include <vm/vm_param.h>
-
-#include <machine/cache.h>
-
-/*
- * Implement uiomove(9) from physical memory using a combination
- * of the direct mapping and sf_bufs to reduce the creation and
- * destruction of ephemeral mappings.  
- */
-int
-uiomove_fromphys(vm_page_t ma[], vm_offset_t offset, int n, struct uio *uio)
-{
-	struct sf_buf *sf;
-	struct thread *td = curthread;
-	struct iovec *iov;
-	void *cp;
-	vm_offset_t page_offset;
-	vm_paddr_t pa;
-	vm_page_t m;
-	size_t cnt;
-	int error = 0;
-	int save = 0;
-
-	KASSERT(uio->uio_rw == UIO_READ || uio->uio_rw == UIO_WRITE,
-	    ("uiomove_fromphys: mode"));
-	KASSERT(uio->uio_segflg != UIO_USERSPACE || uio->uio_td == curthread,
-	    ("uiomove_fromphys proc"));
-	save = td->td_pflags & TDP_DEADLKTREAT;
-	td->td_pflags |= TDP_DEADLKTREAT;
-	while (n > 0 && uio->uio_resid) {
-		iov = uio->uio_iov;
-		cnt = iov->iov_len;
-		if (cnt == 0) {
-			uio->uio_iov++;
-			uio->uio_iovcnt--;
-			continue;
-		}
-		if (cnt > n)
-			cnt = n;
-		page_offset = offset & PAGE_MASK;
-		cnt = ulmin(cnt, PAGE_SIZE - page_offset);
-		m = ma[offset >> PAGE_SHIFT];
-		pa = VM_PAGE_TO_PHYS(m);
-		if (MIPS_DIRECT_MAPPABLE(pa)) {
-			sf = NULL;
-			cp = (char *)MIPS_PHYS_TO_DIRECT(pa) + page_offset;
-			/*
-			 * flush all mappings to this page, KSEG0 address first
-			 * in order to get it overwritten by correct data
-			 */
-			mips_dcache_wbinv_range((vm_offset_t)cp, cnt);
-			pmap_flush_pvcache(m);
-		} else {
-			sf = sf_buf_alloc(m, 0);
-			cp = (char *)sf_buf_kva(sf) + page_offset;
-		}
-		switch (uio->uio_segflg) {
-		case UIO_USERSPACE:
-			maybe_yield();
-			if (uio->uio_rw == UIO_READ)
-				error = copyout(cp, iov->iov_base, cnt);
-			else
-				error = copyin(iov->iov_base, cp, cnt);
-			if (error) {
-				if (sf != NULL)
-					sf_buf_free(sf);
-				goto out;
-			}
-			break;
-		case UIO_SYSSPACE:
-			if (uio->uio_rw == UIO_READ)
-				bcopy(cp, iov->iov_base, cnt);
-			else
-				bcopy(iov->iov_base, cp, cnt);
-			break;
-		case UIO_NOCOPY:
-			break;
-		}
-		if (sf != NULL)
-			sf_buf_free(sf);
-		else
-			mips_dcache_wbinv_range((vm_offset_t)cp, cnt);
-		iov->iov_base = (char *)iov->iov_base + cnt;
-		iov->iov_len -= cnt;
-		uio->uio_resid -= cnt;
-		uio->uio_offset += cnt;
-		offset += cnt;
-		n -= cnt;
-	}
-out:
-	if (save == 0)
-		td->td_pflags &= ~TDP_DEADLKTREAT;
-	return (error);
-}
diff --git a/sys/mips/mips/uma_machdep.c b/sys/mips/mips/uma_machdep.c
deleted file mode 100644
index 321804d634d5..000000000000
--- a/sys/mips/mips/uma_machdep.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003 Alan L. Cox <alc@cs.rice.edu>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/malloc.h>
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pageout.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-#include <vm/uma.h>
-#include <vm/uma_int.h>
-
-void *
-uma_small_alloc(uma_zone_t zone, vm_size_t bytes, int domain, u_int8_t *flags,
-    int wait)
-{
-	vm_paddr_t pa;
-	vm_page_t m;
-	int pflags;
-	void *va;
-
-	*flags = UMA_SLAB_PRIV;
-	pflags = malloc2vm_flags(wait) | VM_ALLOC_WIRED;
-#ifndef __mips_n64
-	pflags &= ~(VM_ALLOC_WAITOK | VM_ALLOC_WAITFAIL);
-	pflags |= VM_ALLOC_NOWAIT;
-#endif
-
-	for (;;) {
-		m = vm_page_alloc_freelist_domain(domain, VM_FREELIST_DIRECT,
-		    pflags);
-#ifndef __mips_n64
-		if (m == NULL && vm_page_reclaim_contig(pflags, 1,
-		    0, MIPS_KSEG0_LARGEST_PHYS, PAGE_SIZE, 0))
-			continue;
-#endif
-		if (m != NULL)
-			break;
-		if ((wait & M_NOWAIT) != 0)
-			return (NULL);
-		vm_wait(NULL);
-	}
-
-	pa = VM_PAGE_TO_PHYS(m);
-	if ((wait & M_NODUMP) == 0)
-		dump_add_page(pa);
-	va = (void *)MIPS_PHYS_TO_DIRECT(pa);
-	return (va);
-}
-
-void
-uma_small_free(void *mem, vm_size_t size, u_int8_t flags)
-{
-	vm_page_t m;
-	vm_paddr_t pa;
-
-	pa = MIPS_DIRECT_TO_PHYS((vm_offset_t)mem);
-	dump_drop_page(pa);
-	m = PHYS_TO_VM_PAGE(pa);
-	vm_page_unwire_noq(m);
-	vm_page_free(m);
-}
diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c
deleted file mode 100644
index eb313e2da8de..000000000000
--- a/sys/mips/mips/vm_machdep.c
+++ /dev/null
@@ -1,600 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * Copyright (c) 1989, 1990 William Jolitz
- * Copyright (c) 1994 John Dyson
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)vm_machdep.c	7.3 (Berkeley) 5/13/91
- *	Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
- *	from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
- *	JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/syscall.h>
-#include <sys/sysent.h>
-#include <sys/buf.h>
-#include <sys/vnode.h>
-#include <sys/vmmeter.h>
-#include <sys/kernel.h>
-#include <sys/sysctl.h>
-#include <sys/unistd.h>
-
-#include <machine/abi.h>
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-#include <machine/tls.h>
-
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_map.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pageout.h>
-#include <vm/vm_param.h>
-#include <vm/uma.h>
-#include <vm/uma_int.h>
-
-#include <sys/user.h>
-#include <sys/mbuf.h>
-
-/*
- * Finish a fork operation, with process p2 nearly set up.
- * Copy and update the pcb, set up the stack so that the child
- * ready to run and return to user mode.
- */
-void
-cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags)
-{
-	struct pcb *pcb2;
-
-	if ((flags & RFPROC) == 0)
-		return;
-	/* It is assumed that the vm_thread_alloc called
-	 * cpu_thread_alloc() before cpu_fork is called.
-	 */
-
-	/* Point the pcb to the top of the stack */
-	pcb2 = td2->td_pcb;
-
-	/* Copy td1's pcb, note that in this case
-	 * our pcb also includes the td_frame being copied
-	 * too. The older mips2 code did an additional copy
-	 * of the td_frame, for us that's not needed any
-	 * longer (this copy does them both) 
-	 */
-	bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
-
-	/* Point mdproc and then copy over td1's contents
-	 * md_proc is empty for MIPS
-	 */
-	td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
-
-	/*
-	 * Set up return-value registers as fork() libc stub expects.
-	 */
-	td2->td_frame->v0 = 0;
-	td2->td_frame->v1 = 1;
-	td2->td_frame->a3 = 0;
-
-	if (td1 == PCPU_GET(fpcurthread))
-		MipsSaveCurFPState(td1);
-
-	pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
-	/* Make sp 64-bit aligned */
-	pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
-	    ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
-	pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
-	pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
-	pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
-	pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
-	    (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
-	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Setup any other CPU-Specific registers (Not MIPS Standard)
-	 * and/or bits in other standard MIPS registers (if CPU-Specific)
-	 *  that are needed.
-	 */
-
-	td2->td_md.md_tls = td1->td_md.md_tls;
-	p2->p_md.md_tls_tcb_offset = td1->td_proc->p_md.md_tls_tcb_offset;
-	td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
-	td2->td_md.md_spinlock_count = 1;
-#ifdef CPU_CNMIPS
-	if (td1->td_md.md_flags & MDTD_COP2USED) {
-		if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
-			if (td1->td_md.md_ucop2)
-				octeon_cop2_save(td1->td_md.md_ucop2);
-			else
-				panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
-		}
-		else {
-			if (td1->td_md.md_cop2)
-				octeon_cop2_save(td1->td_md.md_cop2);
-			else
-				panic("cpu_fork: cop2 is NULL but COP2 is enabled");
-		}
-	}
-
-	if (td1->td_md.md_cop2) {
-		td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
-		memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2, 
-			sizeof(*td1->td_md.md_cop2));
-	}
-	if (td1->td_md.md_ucop2) {
-		td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
-		memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2, 
-			sizeof(*td1->td_md.md_ucop2));
-	}
-	td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
-	pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
-	/* Clear COP2 bits for userland & kernel */
-	td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
-	pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
-#endif
-}
-
-/*
- * Intercept the return address from a freshly forked process that has NOT
- * been scheduled yet.
- *
- * This is needed to make kernel threads stay in kernel mode.
- */
-void
-cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
-{
-	/*
-	 * Note that the trap frame follows the args, so the function
-	 * is really called like this:	func(arg, frame);
-	 */
-	td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
-	td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
-}
-
-void
-cpu_exit(struct thread *td)
-{
-}
-
-void
-cpu_thread_exit(struct thread *td)
-{
-
-	if (PCPU_GET(fpcurthread) == td)
-		PCPU_GET(fpcurthread) = (struct thread *)0;
-#ifdef  CPU_CNMIPS
-	if (td->td_md.md_cop2)
-		memset(td->td_md.md_cop2, 0,
-			sizeof(*td->td_md.md_cop2));
-	if (td->td_md.md_ucop2)
-		memset(td->td_md.md_ucop2, 0,
-			sizeof(*td->td_md.md_ucop2));
-#endif
-}
-
-void
-cpu_thread_free(struct thread *td)
-{
-#ifdef  CPU_CNMIPS
-	if (td->td_md.md_cop2)
-		octeon_cop2_free_ctx(td->td_md.md_cop2);
-	if (td->td_md.md_ucop2)
-		octeon_cop2_free_ctx(td->td_md.md_ucop2);
-	td->td_md.md_cop2 = NULL;
-	td->td_md.md_ucop2 = NULL;
-#endif
-}
-
-void
-cpu_thread_clean(struct thread *td)
-{
-}
-
-void
-cpu_thread_swapin(struct thread *td)
-{
-	pt_entry_t *pte;
-	int i;
-
-	/*
-	 * The kstack may be at a different physical address now.
-	 * Cache the PTEs for the Kernel stack in the machine dependent
-	 * part of the thread struct so cpu_switch() can quickly map in
-	 * the pcb struct and kernel stack.
-	 */
-	for (i = 0; i < KSTACK_PAGES; i++) {
-		pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
-		td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
-	}
-}
-
-void
-cpu_thread_swapout(struct thread *td)
-{
-}
-
-void
-cpu_thread_alloc(struct thread *td)
-{
-	pt_entry_t *pte;
-	int i;
-
-	KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
-	td->td_pcb = (struct pcb *)(td->td_kstack +
-	    td->td_kstack_pages * PAGE_SIZE) - 1;
-	td->td_frame = &td->td_pcb->pcb_regs;
-
-	for (i = 0; i < KSTACK_PAGES; i++) {
-		pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
-		td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
-	}
-}
-
-void
-cpu_set_syscall_retval(struct thread *td, int error)
-{
-	struct trapframe *locr0 = td->td_frame;
-	unsigned int code;
-	int quad_syscall;
-
-	code = locr0->v0;
-	quad_syscall = 0;
-#if defined(__mips_n32) || defined(__mips_n64)
-#ifdef COMPAT_FREEBSD32
-	if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
-		quad_syscall = 1;
-#endif
-#else
-	if (code == SYS___syscall)
-		quad_syscall = 1;
-#endif
-
-	if (code == SYS_syscall)
-		code = locr0->a0;
-	else if (code == SYS___syscall) {
-		if (quad_syscall)
-			code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
-		else
-			code = locr0->a0;
-	}
-
-	switch (error) {
-	case 0:
-		if (quad_syscall && code != SYS_lseek) {
-			/*
-			 * System call invoked through the
-			 * SYS___syscall interface but the
-			 * return value is really just 32
-			 * bits.
-			 */
-			locr0->v0 = td->td_retval[0];
-			if (_QUAD_LOWWORD)
-				locr0->v1 = td->td_retval[0];
-			locr0->a3 = 0;
-		} else {
-			locr0->v0 = td->td_retval[0];
-			locr0->v1 = td->td_retval[1];
-			locr0->a3 = 0;
-		}
-		break;
-
-	case ERESTART:
-		locr0->pc = td->td_pcb->pcb_tpc;
-		break;
-
-	case EJUSTRETURN:
-		break;	/* nothing to do */
-
-	default:
-		if (quad_syscall && code != SYS_lseek) {
-			locr0->v0 = error;
-			if (_QUAD_LOWWORD)
-				locr0->v1 = error;
-			locr0->a3 = 1;
-		} else {
-			locr0->v0 = error;
-			locr0->a3 = 1;
-		}
-	}
-}
-
-/*
- * Initialize machine state, mostly pcb and trap frame for a new
- * thread, about to return to userspace.  Put enough state in the new
- * thread's PCB to get it to go back to the fork_return(), which
- * finalizes the thread state and handles peculiarities of the first
- * return to userspace for the new thread.
- */
-void
-cpu_copy_thread(struct thread *td, struct thread *td0)
-{
-	struct pcb *pcb2;
-
-	/* Point the pcb to the top of the stack. */
-	pcb2 = td->td_pcb;
-
-	/*
-	 * Copy the upcall pcb.  This loads kernel regs.
-	 * Those not loaded individually below get their default
-	 * values here.
-	 *
-	 * XXXKSE It might be a good idea to simply skip this as
-	 * the values of the other registers may be unimportant.
-	 * This would remove any requirement for knowing the KSE
-	 * at this time (see the matching comment below for
-	 * more analysis) (need a good safe default).
-	 * In MIPS, the trapframe is the first element of the PCB
-	 * and gets copied when we copy the PCB. No separate copy
-	 * is needed.
-	 */
-	bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
-
-	/*
-	 * Set registers for trampoline to user mode.
-	 */
-
-	pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
-	/* Make sp 64-bit aligned */
-	pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
-	    ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
-	pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
-	pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
-	pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
-	/* Dont set IE bit in SR. sched lock release will take care of it */
-	pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
-	    (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
-
-	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Setup any other CPU-Specific registers (Not MIPS Standard)
-	 * that are needed.
-	 */
-
-	/* Setup to release spin count in in fork_exit(). */
-	td->td_md.md_spinlock_count = 1;
-	td->td_md.md_saved_intr = MIPS_SR_INT_IE;
-#if 0
-	    /* Maybe we need to fix this? */
-	td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
-	                          (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
-	                          (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
-#endif
-	td->td_md.md_tls = NULL;
-}
-
-/*
- * Set that machine state for performing an upcall that starts
- * the entry function with the given argument.
- */
-void
-cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
-    stack_t *stack)
-{
-	struct trapframe *tf;
-	register_t sp, sr;
-
-	sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) -
-	    CALLFRAME_SIZ;
-
-	/*
-	 * Set the trap frame to point at the beginning of the uts
-	 * function.
-	 */
-	tf = td->td_frame;
-	sr = tf->sr;
-	bzero(tf, sizeof(struct trapframe));
-	tf->sp = sp;
-	tf->sr = sr;
-	tf->pc = (register_t)(intptr_t)entry;
-	/* 
-	 * MIPS ABI requires T9 to be the same as PC 
-	 * in subroutine entry point
-	 */
-	tf->t9 = (register_t)(intptr_t)entry; 
-	tf->a0 = (register_t)(intptr_t)arg;
-
-	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Setup any other CPU-Specific registers (Not MIPS Standard)
-	 * that are needed.
-	 */
-}
-
-bool
-cpu_exec_vmspace_reuse(struct proc *p __unused, vm_map_t map __unused)
-{
-
-	return (true);
-}
-
-int
-cpu_procctl(struct thread *td __unused, int idtype __unused, id_t id __unused,
-    int com __unused, void *data __unused)
-{
-
-	return (EINVAL);
-}
-
-int
-cpu_set_user_tls(struct thread *td, void *tls_base)
-{
-
-	td->td_md.md_tls = (char*)tls_base;
-	if (td == curthread && cpuinfo.userlocal_reg == true) {
-		mips_wr_userlocal((unsigned long)tls_base +
-		    td->td_proc->p_md.md_tls_tcb_offset);
-	}
-
-	return (0);
-}
-
-#ifdef DDB
-#include <ddb/ddb.h>
-
-#define DB_PRINT_REG(ptr, regname)			\
-	db_printf("  %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
-
-#define DB_PRINT_REG_ARRAY(ptr, arrname, regname)	\
-	db_printf("  %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
-
-static void
-dump_trapframe(struct trapframe *trapframe)
-{
-
-	db_printf("Trapframe at %p\n", trapframe);
-
-	DB_PRINT_REG(trapframe, zero);
-	DB_PRINT_REG(trapframe, ast);
-	DB_PRINT_REG(trapframe, v0);
-	DB_PRINT_REG(trapframe, v1);
-	DB_PRINT_REG(trapframe, a0);
-	DB_PRINT_REG(trapframe, a1);
-	DB_PRINT_REG(trapframe, a2);
-	DB_PRINT_REG(trapframe, a3);
-#if defined(__mips_n32) || defined(__mips_n64)
-	DB_PRINT_REG(trapframe, a4);
-	DB_PRINT_REG(trapframe, a5);
-	DB_PRINT_REG(trapframe, a6);
-	DB_PRINT_REG(trapframe, a7);
-	DB_PRINT_REG(trapframe, t0);
-	DB_PRINT_REG(trapframe, t1);
-	DB_PRINT_REG(trapframe, t2);
-	DB_PRINT_REG(trapframe, t3);
-#else
-	DB_PRINT_REG(trapframe, t0);
-	DB_PRINT_REG(trapframe, t1);
-	DB_PRINT_REG(trapframe, t2);
-	DB_PRINT_REG(trapframe, t3);
-	DB_PRINT_REG(trapframe, t4);
-	DB_PRINT_REG(trapframe, t5);
-	DB_PRINT_REG(trapframe, t6);
-	DB_PRINT_REG(trapframe, t7);
-#endif
-	DB_PRINT_REG(trapframe, s0);
-	DB_PRINT_REG(trapframe, s1);
-	DB_PRINT_REG(trapframe, s2);
-	DB_PRINT_REG(trapframe, s3);
-	DB_PRINT_REG(trapframe, s4);
-	DB_PRINT_REG(trapframe, s5);
-	DB_PRINT_REG(trapframe, s6);
-	DB_PRINT_REG(trapframe, s7);
-	DB_PRINT_REG(trapframe, t8);
-	DB_PRINT_REG(trapframe, t9);
-	DB_PRINT_REG(trapframe, k0);
-	DB_PRINT_REG(trapframe, k1);
-	DB_PRINT_REG(trapframe, gp);
-	DB_PRINT_REG(trapframe, sp);
-	DB_PRINT_REG(trapframe, s8);
-	DB_PRINT_REG(trapframe, ra);
-	DB_PRINT_REG(trapframe, sr);
-	DB_PRINT_REG(trapframe, mullo);
-	DB_PRINT_REG(trapframe, mulhi);
-	DB_PRINT_REG(trapframe, badvaddr);
-	DB_PRINT_REG(trapframe, cause);
-	DB_PRINT_REG(trapframe, pc);
-}
-
-DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
-{
-	struct thread *td;
-	struct pcb *pcb;
-	struct trapframe *trapframe;
-
-	/* Determine which thread to examine. */
-	if (have_addr)
-		td = db_lookup_thread(addr, true);
-	else
-		td = curthread;
-
-	pcb = td->td_pcb;
-
-	db_printf("Thread %d at %p\n", td->td_tid, td);
-
-	db_printf("PCB at %p\n", pcb);
-
-	trapframe = &pcb->pcb_regs;
-	dump_trapframe(trapframe);
-
-	db_printf("PCB Context:\n");
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
-	DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
-
-	db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
-	db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
-	db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
-
-	if (td->td_frame != trapframe) {
-		db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
-			  td->td_frame, trapframe);
-	}
-}
-
-/*
- * Dump the trapframe beginning at address specified by first argument.
- */
-DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
-{
-
-	if (!have_addr)
-		return;
-
-	dump_trapframe((struct trapframe *)addr);
-}
-
-#endif	/* DDB */
diff --git a/sys/mips/nlm/board.c b/sys/mips/nlm/board.c
deleted file mode 100644
index 145676dd579a..000000000000
--- a/sys/mips/nlm/board.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <net/ethernet.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/fmn.h>
-#include <mips/nlm/hal/pic.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/uart.h>
-#include <mips/nlm/hal/poe.h>
-
-#include <mips/nlm/xlp.h>
-#include <mips/nlm/board.h>
-#include <mips/nlm/msgring.h>
-
-static uint8_t board_eeprom_buf[EEPROM_SIZE];
-static int board_eeprom_set;
-
-struct xlp_board_info xlp_board_info;
-
-struct vfbid_tbl {
-	int vfbid;
-	int dest_vc;
-};
-
-/* XXXJC : this should be derived from msg thread mask */
-static struct vfbid_tbl nlm_vfbid[] = {
-	/* NULL FBID should map to cpu0 to detect NAE send msg errors */
-	{127,   0}, /* NAE <-> NAE mappings */
-	{51, 1019}, {50, 1018}, {49, 1017}, {48, 1016},
-	{47, 1015}, {46, 1014}, {45, 1013}, {44, 1012},
-	{43, 1011}, {42, 1010}, {41, 1009}, {40, 1008},
-	{39, 1007}, {38, 1006}, {37, 1005}, {36, 1004},
-	{35, 1003}, {34, 1002}, {33, 1001}, {32, 1000},
-	/* NAE <-> CPU mappings, freeback got to vc 3 of each thread */
-	{31,  127}, {30,  123}, {29,  119}, {28,  115},
-	{27,  111}, {26,  107}, {25,  103}, {24,   99},
-	{23,   95}, {22,   91}, {21,   87}, {20,   83},
-	{19,   79}, {18,   75}, {17,   71}, {16,   67},
-	{15,   63}, {14,   59}, {13,   55}, {12,   51},
-	{11,   47}, {10,   43}, { 9,   39}, { 8,   35},
-	{ 7,   31}, { 6,   27}, { 5,   23}, { 4,   19},
-	{ 3,   15}, { 2,   11}, { 1,    7}, { 0,    3},
-};
-
-static struct vfbid_tbl nlm3xx_vfbid[] = {
-	/* NULL FBID should map to cpu0 to detect NAE send msg errors */
-	{127,   0}, /* NAE <-> NAE mappings */
-	{39,  503}, {38,  502}, {37,  501}, {36,  500},
-	{35,  499}, {34,  498}, {33,  497}, {32,  496},
-	/* NAE <-> CPU mappings, freeback got to vc 3 of each thread */
-	{31,  127}, {30,  123}, {29,  119}, {28,  115},
-	{27,  111}, {26,  107}, {25,  103}, {24,   99},
-	{23,   95}, {22,   91}, {21,   87}, {20,   83},
-	{19,   79}, {18,   75}, {17,   71}, {16,   67},
-	{15,   63}, {14,   59}, {13,   55}, {12,   51},
-	{11,   47}, {10,   43}, { 9,   39}, { 8,   35},
-	{ 7,   31}, { 6,   27}, { 5,   23}, { 4,   19},
-	{ 3,   15}, { 2,   11}, { 1,    7}, { 0,    3},
-};
-
-int
-nlm_get_vfbid_mapping(int vfbid)
-{
-	int i, nentries;
-	struct vfbid_tbl *p;
-
-	if (nlm_is_xlp3xx()) {
-		nentries = nitems(nlm3xx_vfbid);
-		p = nlm3xx_vfbid;
-	} else {
-		nentries = nitems(nlm_vfbid);
-		p = nlm_vfbid;
-	}
-
-	for (i = 0; i < nentries; i++) {
-		if (p[i].vfbid == vfbid)
-		    return (p[i].dest_vc);
-	}
-
-	return (-1);
-}
-
-int
-nlm_get_poe_distvec(int vec, uint32_t *distvec)
-{
-
-	if (vec != 0)
-		return (-1);  /* we support just vec 0 */
-	nlm_calc_poe_distvec(xlp_msg_thread_mask, 0, 0, 0,
-	    0x1 << XLPGE_RX_VC, distvec);
-	return (0);
-}
-
-/*
- * All our knowledge of chip and board that cannot be detected by probing
- * at run-time goes here
- */
-
-void
-xlpge_get_macaddr(uint8_t *macaddr)
-{
-
-	if (board_eeprom_set == 0) {
-		/* No luck, take some reasonable value */
-		macaddr[0] = 0x00; macaddr[1] = 0x0f; macaddr[2] = 0x30;
-		macaddr[3] = 0x20; macaddr[4] = 0x0d; macaddr[5] = 0x5b;
-	} else
-		memcpy(macaddr, &board_eeprom_buf[EEPROM_MACADDR_OFFSET],
-		    ETHER_ADDR_LEN);
-}
-
-static void
-nlm_setup_port_defaults(struct xlp_port_ivars *p)
-{
-	p->loopback_mode = 0;
-	p->num_channels = 1;
-	p->free_desc_sizes = 2048;
-	p->vlan_pri_en = 0;
-	p->hw_parser_en = 1;
-	p->ieee1588_userval = 0;
-	p->ieee1588_ptpoff = 0;
-	p->ieee1588_tmr1 = 0;
-	p->ieee1588_tmr2 = 0;
-	p->ieee1588_tmr3 = 0;
-	p->ieee1588_inc_intg = 0;
-	p->ieee1588_inc_den = 1;
-	p->ieee1588_inc_num = 1;
-
-	if (nlm_is_xlp3xx()) {
-		p->stg2_fifo_size = XLP3XX_STG2_FIFO_SZ;
-		p->eh_fifo_size = XLP3XX_EH_FIFO_SZ;
-		p->frout_fifo_size = XLP3XX_FROUT_FIFO_SZ;
-		p->ms_fifo_size = XLP3XX_MS_FIFO_SZ;
-		p->pkt_fifo_size = XLP3XX_PKT_FIFO_SZ;
-		p->pktlen_fifo_size = XLP3XX_PKTLEN_FIFO_SZ;
-		p->max_stg2_offset = XLP3XX_MAX_STG2_OFFSET;
-		p->max_eh_offset = XLP3XX_MAX_EH_OFFSET;
-		p->max_frout_offset = XLP3XX_MAX_FREE_OUT_OFFSET;
-		p->max_ms_offset = XLP3XX_MAX_MS_OFFSET;
-		p->max_pmem_offset = XLP3XX_MAX_PMEM_OFFSET;
-		p->stg1_2_credit = XLP3XX_STG1_2_CREDIT;
-		p->stg2_eh_credit = XLP3XX_STG2_EH_CREDIT;
-		p->stg2_frout_credit = XLP3XX_STG2_FROUT_CREDIT;
-		p->stg2_ms_credit = XLP3XX_STG2_MS_CREDIT;
-	} else {
-		p->stg2_fifo_size = XLP8XX_STG2_FIFO_SZ;
-		p->eh_fifo_size = XLP8XX_EH_FIFO_SZ;
-		p->frout_fifo_size = XLP8XX_FROUT_FIFO_SZ;
-		p->ms_fifo_size = XLP8XX_MS_FIFO_SZ;
-		p->pkt_fifo_size = XLP8XX_PKT_FIFO_SZ;
-		p->pktlen_fifo_size = XLP8XX_PKTLEN_FIFO_SZ;
-		p->max_stg2_offset = XLP8XX_MAX_STG2_OFFSET;
-		p->max_eh_offset = XLP8XX_MAX_EH_OFFSET;
-		p->max_frout_offset = XLP8XX_MAX_FREE_OUT_OFFSET;
-		p->max_ms_offset = XLP8XX_MAX_MS_OFFSET;
-		p->max_pmem_offset = XLP8XX_MAX_PMEM_OFFSET;
-		p->stg1_2_credit = XLP8XX_STG1_2_CREDIT;
-		p->stg2_eh_credit = XLP8XX_STG2_EH_CREDIT;
-		p->stg2_frout_credit = XLP8XX_STG2_FROUT_CREDIT;
-		p->stg2_ms_credit = XLP8XX_STG2_MS_CREDIT;
-	}
-
-	switch (p->type) {
-	case SGMIIC:
-		p->num_free_descs = 52;
-		p->iface_fifo_size = 13;
-		p->rxbuf_size = 128;
-		p->rx_slots_reqd = SGMII_CAL_SLOTS;
-		p->tx_slots_reqd = SGMII_CAL_SLOTS;
-		if (nlm_is_xlp3xx())
-		    p->pseq_fifo_size = 30;
-		else
-		    p->pseq_fifo_size = 62;
-		break;
-	case ILC:
-		p->num_free_descs = 150;
-		p->rxbuf_size = 944;
-		p->rx_slots_reqd = IL8_CAL_SLOTS;
-		p->tx_slots_reqd = IL8_CAL_SLOTS;
-		p->pseq_fifo_size = 225;
-		p->iface_fifo_size = 55;
-		break;
-	case XAUIC:
-	default:
-		p->num_free_descs = 150;
-		p->rxbuf_size = 944;
-		p->rx_slots_reqd = XAUI_CAL_SLOTS;
-		p->tx_slots_reqd = XAUI_CAL_SLOTS;
-		if (nlm_is_xlp3xx()) {
-		    p->pseq_fifo_size = 120;
-		    p->iface_fifo_size = 52;
-		} else {
-		    p->pseq_fifo_size = 225;
-		    p->iface_fifo_size = 55;
-		}
-		break;
-	}
-}
-
-/* XLP 8XX evaluation boards have the following phy-addr
- * assignment. There are two external mdio buses in XLP --
- * bus 0 and bus 1. The management ports (16 and 17) are
- * on mdio bus 0 while blocks/complexes[0 to 3] are all
- * on mdio bus 1. The phy_addr on bus 0 (mgmt ports 16
- * and 17) match the port numbers.
- * These are the details:
- * block  port   phy_addr   mdio_bus
- * ====================================
- * 0         0     4          1
- * 0         1     7          1
- * 0         2     6          1
- * 0         3     5          1
- * 1         0     8          1
- * 1         1     11         1
- * 1         2     10         1
- * 1         3     9          1
- * 2         0     0          1
- * 2         1     3          1
- * 2         2     2          1
- * 2         3     1          1
- * 3         0     12         1
- * 3         1     15         1
- * 3         2     14         1
- * 3         3     13         1
- *
- * 4         0     16         0
- * 4         1     17         0
- *
- * The XLP 3XX evaluation boards have the following phy-addr
- * assignments.
- * block  port   phy_addr   mdio_bus
- * ====================================
- * 0         0     4          0
- * 0         1     7          0
- * 0         2     6          0
- * 0         3     5          0
- * 1         0     8          0
- * 1         1     11         0
- * 1         2     10         0
- * 1         3     9          0
- */
-static void
-nlm_board_get_phyaddr(int block, int port, int *phyaddr)
-{
-	switch (block) {
-	case 0: switch (port) {
-		case 0: *phyaddr = 4; break;
-		case 1: *phyaddr = 7; break;
-		case 2: *phyaddr = 6; break;
-		case 3: *phyaddr = 5; break;
-		}
-		break;
-	case 1: switch (port) {
-		case 0: *phyaddr = 8; break;
-		case 1: *phyaddr = 11; break;
-		case 2: *phyaddr = 10; break;
-		case 3: *phyaddr = 9; break;
-		}
-		break;
-	case 2: switch (port) {
-		case 0: *phyaddr = 0; break;
-		case 1: *phyaddr = 3; break;
-		case 2: *phyaddr = 2; break;
-		case 3: *phyaddr = 1; break;
-		}
-		break;
-	case 3: switch (port) {
-		case 0: *phyaddr = 12; break;
-		case 1: *phyaddr = 15; break;
-		case 2: *phyaddr = 14; break;
-		case 3: *phyaddr = 13; break;
-		}
-		break;
-	case 4: switch (port) { /* management SGMII */
-		case 0: *phyaddr = 16; break;
-		case 1: *phyaddr = 17; break;
-		}
-		break;
-	}
-}
-
-static void
-nlm_print_processor_info(void)
-{
-	uint32_t procid;
-	int prid, rev;
-	char *chip, *revstr;
-
-	procid = mips_rd_prid();
-	prid = (procid >> 8) & 0xff;
-	rev = procid & 0xff;
-
-	switch (prid) {
-	case CHIP_PROCESSOR_ID_XLP_8XX:
-		chip = "XLP 832";
-		break;
-	case CHIP_PROCESSOR_ID_XLP_3XX:
-		chip = "XLP 3xx";
-		break;
-	case CHIP_PROCESSOR_ID_XLP_432:
-	case CHIP_PROCESSOR_ID_XLP_416:
-		chip = "XLP 4xx";
-		break;
-	default:
-		chip = "XLP ?xx";
-		break;
-	}
-	switch (rev) {
-	case 0:
-		revstr = "A0"; break;
-	case 1:
-		revstr = "A1"; break;
-	case 2:
-		revstr = "A2"; break;
-	case 3:
-		revstr = "B0"; break;
-	case 4:
-		revstr = "B1"; break;
-	default:
-		revstr = "??"; break;
-	}
-
-	printf("Processor info:\n");
-	printf("  Netlogic %s %s [%x]\n", chip, revstr, procid);
-}
-
-/*
- * All our knowledge of chip and board that cannot be detected by probing
- * at run-time goes here
- */
-static int
-nlm_setup_xlp_board(int node)
-{
-	struct xlp_board_info	*boardp;
-	struct xlp_node_info	*nodep;
-	struct xlp_nae_ivars	*naep;
-	struct xlp_block_ivars	*blockp;
-	struct xlp_port_ivars	*portp;
-	uint64_t cpldbase, nae_pcibase;
-	int	block, port, rv, dbtype, usecpld = 0, evp = 0, svp = 0;
-	uint8_t *b;
-
-	/* start with a clean slate */
-	boardp = &xlp_board_info;
-	if (boardp->nodemask == 0)
-		memset(boardp, 0, sizeof(xlp_board_info));
-	boardp->nodemask |= (1 << node);
-	nlm_print_processor_info();
-
-	b =  board_eeprom_buf;
-	rv = nlm_board_eeprom_read(node, EEPROM_I2CBUS, EEPROM_I2CADDR, 0, b,
-	    EEPROM_SIZE);
-	if (rv == 0) {
-		board_eeprom_set = 1;
-		printf("Board info (EEPROM on i2c@%d at %#X):\n",
-		    EEPROM_I2CBUS, EEPROM_I2CADDR);
-		printf("  Model:      %7.7s %2.2s\n", &b[16], &b[24]);
-		printf("  Serial #:   %3.3s-%2.2s\n", &b[27], &b[31]);
-		printf("  MAC addr:   %02x:%02x:%02x:%02x:%02x:%02x\n",
-		    b[2], b[3], b[4], b[5], b[6], b[7]);
-	} else
-		printf("Board Info: Error on EEPROM read (i2c@%d %#X).\n",
-		    EEPROM_I2CBUS, EEPROM_I2CADDR);
-
-	nae_pcibase = nlm_get_nae_pcibase(node);
-	nodep = &boardp->nodes[node];
-	naep = &nodep->nae_ivars;
-	naep->node = node;
-
-	/* frequency at which network block runs */
-	naep->freq = 500;
-
-	/* CRC16 polynomial used for flow table generation */
-	naep->flow_crc_poly = 0xffff;
-	naep->hw_parser_en = 1;
-	naep->prepad_en = 1;
-	naep->prepad_size = 3; /* size in 16 byte units */
-	naep->ieee_1588_en = 1;
-
-	naep->ilmask = 0x0;	/* set this based on daughter card */
-	naep->xauimask = 0x0;	/* set this based on daughter card */
-	naep->sgmiimask = 0x0;	/* set this based on daughter card */
-	naep->nblocks = nae_num_complex(nae_pcibase);
-	if (strncmp(&b[16], "PCIE", 4) == 0) {
-		usecpld = 0; /* XLP PCIe card */
-		/* Broadcom's XLP PCIe card has the following
-		 * blocks fixed.
-		 * blk 0-XAUI, 1-XAUI, 4-SGMII(one port) */
-		naep->blockmask = 0x13;
-	} else if (strncmp(&b[16], "MB-EVP", 6) == 0) {
-		usecpld = 1; /* XLP non-PCIe card which has CPLD */
-		evp = 1;
-		naep->blockmask = (1 << naep->nblocks) - 1;
-	} else if ((strncmp(&b[16], "MB-S", 4) == 0) ||
-	    (strncmp(&b[16], "MB_S", 4) == 0)) {
-		usecpld = 1; /* XLP non-PCIe card which has CPLD */
-		svp = 1;
-		/* 3xx chip reports one block extra which is a bug */
-		naep->nblocks = naep->nblocks - 1;
-		naep->blockmask = (1 << naep->nblocks) - 1;
-	} else {
-		printf("ERROR!!! Board type:%7s didn't match any board"
-		    " type we support\n", &b[16]);
-		return (-1);
-	}
-	cpldbase = nlm_board_cpld_base(node, XLP_EVB_CPLD_CHIPSELECT);
-
-	/* pretty print network config */
-	printf("Network config");
-	if (usecpld)
-		printf("(from CPLD@%d):\n", XLP_EVB_CPLD_CHIPSELECT);
-	else
-		printf("(defaults):\n");
-	printf("  NAE@%d Blocks: ", node);
-	for (block = 0; block < naep->nblocks; block++) {
-		char *s = "???";
-
-		if ((naep->blockmask & (1 << block)) == 0)
-			continue;
-		blockp = &naep->block_ivars[block];
-		blockp->block = block;
-		if (usecpld)
-			dbtype = nlm_board_cpld_dboard_type(cpldbase, block);
-		else
-			dbtype = DCARD_XAUI;  /* default XAUI */
-
-		/* XLP PCIe cards */
-		if ((!evp && !svp) && ((block == 2) || (block == 3)))
-			dbtype = DCARD_NOT_PRSNT;
-
-		if (block == 4) {
-			/* management block 4 on 8xx or XLP PCIe */
-			blockp->type = SGMIIC;
-			if (evp)
-				blockp->portmask = 0x3;
-			else
-				blockp->portmask = 0x1;
-			naep->sgmiimask |= (1 << block);
-		} else {
-			switch (dbtype) {
-			case DCARD_ILAKEN:
-				blockp->type = ILC;
-				blockp->portmask = 0x1;
-				naep->ilmask |= (1 << block);
-				break;
-			case DCARD_SGMII:
-				blockp->type = SGMIIC;
-				blockp->portmask = 0xf;
-				naep->sgmiimask |= (1 << block);
-				break;
-			case DCARD_XAUI:
-				blockp->type = XAUIC;
-				blockp->portmask = 0x1;
-				naep->xauimask |= (1 << block);
-				break;
-			default: /* DCARD_NOT_PRSNT */
-				blockp->type = UNKNOWN;
-				blockp->portmask = 0;
-				break;
-			}
-		}
-		if (blockp->type != UNKNOWN) {
-			for (port = 0; port < PORTS_PER_CMPLX; port++) {
-				if ((blockp->portmask & (1 << port)) == 0)
-					continue;
-				portp = &blockp->port_ivars[port];
-				nlm_board_get_phyaddr(block, port,
-				    &portp->phy_addr);
-				if (svp || (block == 4))
-					portp->mdio_bus = 0;
-				else
-					portp->mdio_bus = 1;
-				portp->port = port;
-				portp->block = block;
-				portp->node = node;
-				portp->type = blockp->type;
-				nlm_setup_port_defaults(portp);
-			}
-		}
-		switch (blockp->type) {
-		case SGMIIC : s = "SGMII"; break;
-		case XAUIC  : s = "XAUI"; break;
-		case ILC    : s = "IL"; break;
-		}
-		printf(" [%d %s]", block, s);
-	}
-	printf("\n");
-	return (0);
-}
-
-int nlm_board_info_setup(void)
-{
-	if (nlm_setup_xlp_board(0) != 0)
-		return (-1);
-	return (0);
-}
diff --git a/sys/mips/nlm/board.h b/sys/mips/nlm/board.h
deleted file mode 100644
index 17f9c04e33bf..000000000000
--- a/sys/mips/nlm/board.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_BOARD_H__
-#define __NLM_BOARD_H__
-
-#define XLP_NAE_NBLOCKS		5
-#define XLP_NAE_NPORTS		4
-
-/*
- * EVP board EEPROM info
- */
-#define	EEPROM_I2CBUS		1
-#define	EEPROM_I2CADDR		0xAE
-#define	EEPROM_SIZE		48
-#define	EEPROM_MACADDR_OFFSET	2
-
-/* used if there is no FDT */
-#define	BOARD_CONSOLE_SPEED	115200
-#define	BOARD_CONSOLE_UART	0
-
-/*
- * EVP board CPLD chip select and daughter card info field
- */
-#define XLP_EVB_CPLD_CHIPSELECT	2
-
-#define DCARD_ILAKEN		0x0
-#define DCARD_SGMII		0x1
-#define DCARD_XAUI		0x2
-#define DCARD_NOT_PRSNT		0x3
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-/*
- * NAE configuration
- */
-
-struct xlp_port_ivars {
-	int	port;
-	int	block;
-	int	node;
-	int	type;
-	int	phy_addr;
-	int	mdio_bus;
-	int	loopback_mode;
-	int	num_channels;
-	int	free_desc_sizes;
-	int	num_free_descs;
-	int	pseq_fifo_size;
-	int	iface_fifo_size;
-	int	rxbuf_size;
-	int	rx_slots_reqd;
-	int	tx_slots_reqd;
-	int	vlan_pri_en;
-	int	stg2_fifo_size;
-	int	eh_fifo_size;
-	int	frout_fifo_size;
-	int	ms_fifo_size;
-	int	pkt_fifo_size;
-	int	pktlen_fifo_size;
-	int	max_stg2_offset;
-	int	max_eh_offset;
-	int	max_frout_offset;
-	int	max_ms_offset;
-	int	max_pmem_offset;
-	int	stg1_2_credit;
-	int	stg2_eh_credit;
-	int	stg2_frout_credit;
-	int	stg2_ms_credit;
-	int	hw_parser_en;
-	u_int	ieee1588_inc_intg;
-	u_int	ieee1588_inc_den;
-	u_int	ieee1588_inc_num;
-	uint64_t ieee1588_userval;
-	uint64_t ieee1588_ptpoff;
-	uint64_t ieee1588_tmr1;
-	uint64_t ieee1588_tmr2;
-	uint64_t ieee1588_tmr3;
-};
-
-struct xlp_block_ivars {
-	int	block;
-	int	type;
-	u_int	portmask;
-	struct xlp_port_ivars	port_ivars[XLP_NAE_NPORTS];
-};
-
-struct xlp_nae_ivars {
-	int	node;
-	int	nblocks;
-	u_int	blockmask;
-	u_int	ilmask;
-	u_int	xauimask;
-	u_int	sgmiimask;
-	int	freq;
-	u_int	flow_crc_poly;
-	u_int	hw_parser_en;
-	u_int	prepad_en;
-	u_int	prepad_size;	/* size in 16 byte units */
-	u_int	ieee_1588_en;
-	struct xlp_block_ivars	block_ivars[XLP_NAE_NBLOCKS];
-};
-
-struct xlp_board_info {
-	u_int	nodemask;
-	struct xlp_node_info {
-		struct xlp_nae_ivars	nae_ivars;
-	} nodes[XLP_MAX_NODES];
-};
-
-extern struct xlp_board_info xlp_board_info;
-
-/* Network configuration */
-int nlm_get_vfbid_mapping(int);
-int nlm_get_poe_distvec(int vec, uint32_t *distvec);
-void xlpge_get_macaddr(uint8_t *macaddr);
-
-int nlm_board_info_setup(void);
-
-/* EEPROM & CPLD */
-int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs,
-    uint8_t *buf,int sz);
-uint64_t nlm_board_cpld_base(int node, int chipselect);
-int nlm_board_cpld_majorversion(uint64_t cpldbase);
-int nlm_board_cpld_minorversion(uint64_t cpldbase);
-void nlm_board_cpld_reset(uint64_t cpldbase);
-int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot);
-
-#endif
-#endif
diff --git a/sys/mips/nlm/board_cpld.c b/sys/mips/nlm/board_cpld.c
deleted file mode 100644
index e1a3a2c18e14..000000000000
--- a/sys/mips/nlm/board_cpld.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/endian.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/gbu.h>
-
-#include <mips/nlm/board.h>
-
-#define CPLD_REVISION		0x0
-#define CPLD_RESET		0x1
-#define CPLD_CTRL		0x2
-#define CPLD_RSVD		0x3
-#define CPLD_PWR_CTRL		0x4
-#define CPLD_MISC		0x5
-#define CPLD_CTRL_STATUS	0x6
-#define CPLD_PWR_INTR_STATUS	0x7
-#define CPLD_DATA		0x8
-
-static __inline
-int nlm_cpld_read(uint64_t base, int reg)
-{
-	uint16_t val;
-
-	val = *(volatile uint16_t *)(long)(base + reg * 2);
-	return le16toh(val);
-}
-
-static __inline void
-nlm_cpld_write(uint64_t base, int reg, uint16_t data)
-{
-	data = htole16(data);
-	*(volatile uint16_t *)(long)(base + reg * 2) = data;
-}
-
-int
-nlm_board_cpld_majorversion(uint64_t base)
-{
-	return (nlm_cpld_read(base, CPLD_REVISION) >> 8);
-}
-
-int
-nlm_board_cpld_minorversion(uint64_t base)
-{
-	return (nlm_cpld_read(base, CPLD_REVISION) & 0xff);
-}
-
-uint64_t nlm_board_cpld_base(int node, int chipselect)
-{
-	uint64_t gbubase, cpld_phys;
-
-	gbubase = nlm_get_gbu_regbase(node);
-	cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect));
-	return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8));
-}
-
-void
-nlm_board_cpld_reset(uint64_t base)
-{
-
-	nlm_cpld_write(base, CPLD_RESET, 1 << 15);
-	for(;;)
-		__asm __volatile("wait");
-}
-
-/* get daughter board type */
-int
-nlm_board_cpld_dboard_type(uint64_t base, int slot)
-{
-	uint16_t val;
-	int shift = 0;
-
-	switch (slot) {
-	case 0: shift = 0; break;
-	case 1: shift = 4; break;
-	case 2: shift = 2; break;
-	case 3: shift = 6; break;
-	}
-	val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift;
-	return (val & 0x3);
-}
diff --git a/sys/mips/nlm/board_eeprom.c b/sys/mips/nlm/board_eeprom.c
deleted file mode 100644
index d4fe1cbf3e33..000000000000
--- a/sys/mips/nlm/board_eeprom.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-
-#include <dev/iicbus/iicoc.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h> /* needed by board.h */
-
-#include <mips/nlm/board.h>
-
-/*
- * We have to read the EEPROM in early boot (now only for MAC addr)
- * but later for board information.  Use simple polled mode driver
- * for I2C
- */
-#define	oc_read_reg(reg)	nlm_read_reg(eeprom_i2c_base, reg)
-#define	oc_write_reg(reg, val)	nlm_write_reg(eeprom_i2c_base, reg, val)
-
-static uint64_t eeprom_i2c_base;
-
-static int
-oc_wait_on_status(uint8_t bit)
-{
-	int tries = I2C_TIMEOUT;
-	uint8_t status;
-
-	do {
-		status = oc_read_reg(OC_I2C_STATUS_REG);
-	} while ((status & bit) != 0 && --tries > 0);
-
-	return (tries == 0 ? -1: 0);
-}
-
-static int
-oc_rd_cmd(uint8_t cmd)
-{
-	uint8_t data;
-
-		oc_write_reg(OC_I2C_CMD_REG, cmd);
-		if (oc_wait_on_status(OC_STATUS_TIP) < 0)
-			return (-1);
-
-	data = oc_read_reg(OC_I2C_DATA_REG);
-	return (data);
-}
-
-static int
-oc_wr_cmd(uint8_t data, uint8_t cmd)
-{
-	oc_write_reg(OC_I2C_DATA_REG, data);
-	oc_write_reg(OC_I2C_CMD_REG, cmd);
-
-	if (oc_wait_on_status(OC_STATUS_TIP) < 0)
-		return (-1);
-	return (0);
-}
-
-int
-nlm_board_eeprom_read(int node, int bus, int addr, int offs, uint8_t *buf,
-    int sz)
-{
-	int rd, i;
-	char *err = NULL;
-
-	eeprom_i2c_base = nlm_pcicfg_base(XLP_IO_I2C_OFFSET(node, bus)) +
-	    XLP_IO_PCI_HDRSZ;
-
-	if (oc_wait_on_status(OC_STATUS_BUSY) < 0) {
-		err = "Not idle";
-		goto err_exit;
-	}
-
-	/* write start */
-	if (oc_wr_cmd(addr, OC_COMMAND_START)) {
-		err = "I2C write start failed.";
-		goto err_exit;
-	}
-
-	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
-		err = "No ack after start";
-		goto err_exit_stop;
-	}
-
-	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_AL) {
-		err = "I2C Bus Arbitration Lost";
-		goto err_exit_stop;
-	}
-
-	/* Write offset */
-	if (oc_wr_cmd(offs, OC_COMMAND_WRITE)) {
-		err = "I2C write slave offset failed.";
-		goto err_exit_stop;
-	}
-
-	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
-		err = "No ack after write";
-		goto err_exit_stop;
-	}
-
-	/* read start */
-	if (oc_wr_cmd(addr | 1, OC_COMMAND_START)) {
-		err = "I2C read start failed.";
-		goto err_exit_stop;
-	}
-
-	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
-		err = "No ack after read start";
-		goto err_exit_stop;
-	}
-
-	for (i = 0; i < sz - 1; i++) {
-		if ((rd = oc_rd_cmd(OC_COMMAND_READ)) < 0) {
-			err = "I2C read data byte failed.";
-			goto err_exit_stop;
-		}
-	buf[i] = rd;
-	}
-
-	/* last byte */
-	if ((rd = oc_rd_cmd(OC_COMMAND_RDNACK)) < 0) {
-		err = "I2C read last data byte failed.";
-		goto err_exit_stop;
-	}
-	buf[sz - 1] = rd;
-
-err_exit_stop:
-	oc_write_reg(OC_I2C_CMD_REG, OC_COMMAND_STOP);
-	if (oc_wait_on_status(OC_STATUS_BUSY) < 0)
-		printf("%s: stop failed", __func__);
-
-err_exit:
-	if (err) {
-		printf("%s: Failed (%s)\n", __func__, err);
-		return (-1);
-	}
-	return (0);
-}
diff --git a/sys/mips/nlm/bus_space_rmi.c b/sys/mips/nlm/bus_space_rmi.c
deleted file mode 100644
index 6c194fc11ed7..000000000000
--- a/sys/mips/nlm/bus_space_rmi.c
+++ /dev/null
@@ -1,762 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/endian.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-static int
-rmi_bus_space_map(void *t, bus_addr_t addr,
-    bus_size_t size, int flags,
-    bus_space_handle_t *bshp);
-
-static void
-rmi_bus_space_unmap(void *t, bus_space_handle_t bsh,
-    bus_size_t size);
-
-static int
-rmi_bus_space_subregion(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size,
-    bus_space_handle_t *nbshp);
-
-static u_int8_t
-rmi_bus_space_read_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t
-rmi_bus_space_read_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t
-rmi_bus_space_read_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static void
-rmi_bus_space_read_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_region_1(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value);
-
-static void
-rmi_bus_space_write_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void
-rmi_bus_space_write_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void
-rmi_bus_space_write_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int32_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_set_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value,
-    size_t count);
-static void
-rmi_bus_space_set_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value,
-    size_t count);
-
-static void
-rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags);
-
-static void
-rmi_bus_space_copy_region_2(void *t,
-    bus_space_handle_t bsh1,
-    bus_size_t off1,
-    bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count);
-
-u_int8_t
-rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t
-rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t
-rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-static void
-rmi_bus_space_read_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_read_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t *addr,
-    size_t count);
-
-void
-rmi_bus_space_write_stream_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t value);
-static void
-rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void
-rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void
-rmi_bus_space_write_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t *addr,
-    size_t count);
-static void
-rmi_bus_space_write_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t *addr,
-    size_t count);
-
-static void
-rmi_bus_space_write_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t *addr,
-    size_t count);
-
-#define TODO() printf("XLP bus space: '%s' unimplemented\n", __func__)
-
-static struct bus_space local_rmi_bus_space = {
-	/* cookie */
-	(void *)0,
-
-	/* mapping/unmapping */
-	rmi_bus_space_map,
-	rmi_bus_space_unmap,
-	rmi_bus_space_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	rmi_bus_space_barrier,
-
-	/* read (single) */
-	rmi_bus_space_read_1,
-	rmi_bus_space_read_2,
-	rmi_bus_space_read_4,
-	NULL,
-
-	/* read multiple */
-	rmi_bus_space_read_multi_1,
-	rmi_bus_space_read_multi_2,
-	rmi_bus_space_read_multi_4,
-	NULL,
-
-	/* read region */
-	rmi_bus_space_read_region_1,
-	rmi_bus_space_read_region_2,
-	rmi_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) */
-	rmi_bus_space_write_1,
-	rmi_bus_space_write_2,
-	rmi_bus_space_write_4,
-	NULL,
-
-	/* write multiple */
-	rmi_bus_space_write_multi_1,
-	rmi_bus_space_write_multi_2,
-	rmi_bus_space_write_multi_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	rmi_bus_space_write_region_2,
-	rmi_bus_space_write_region_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	rmi_bus_space_set_region_2,
-	rmi_bus_space_set_region_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	rmi_bus_space_copy_region_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	rmi_bus_space_read_stream_1,
-	rmi_bus_space_read_stream_2,
-	rmi_bus_space_read_stream_4,
-	NULL,
-
-	/* read multiple stream */
-	rmi_bus_space_read_multi_stream_1,
-	rmi_bus_space_read_multi_stream_2,
-	rmi_bus_space_read_multi_stream_4,
-	NULL,
-
-	/* read region stream */
-	rmi_bus_space_read_region_1,
-	rmi_bus_space_read_region_2,
-	rmi_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) stream */
-	rmi_bus_space_write_stream_1,
-	rmi_bus_space_write_stream_2,
-	rmi_bus_space_write_stream_4,
-	NULL,
-
-	/* write multiple stream */
-	rmi_bus_space_write_multi_stream_1,
-	rmi_bus_space_write_multi_stream_2,
-	rmi_bus_space_write_multi_stream_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	rmi_bus_space_write_region_2,
-	rmi_bus_space_write_region_4,
-	NULL,
-};
-
-/* generic bus_space tag */
-bus_space_tag_t rmi_bus_space = &local_rmi_bus_space;
-
-/*
- * Map a region of device bus space into CPU virtual address space.
- */
-static int
-rmi_bus_space_map(void *t __unused, bus_addr_t addr,
-    bus_size_t size __unused, int flags __unused,
-    bus_space_handle_t *bshp)
-{
-
-	*bshp = MIPS_PHYS_TO_DIRECT_UNCACHED(addr);
-	return (0);
-}
-
-/*
- * Unmap a region of device bus space.
- */
-static void
-rmi_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused,
-    bus_size_t size __unused)
-{
-}
-
-/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-
-static int
-rmi_bus_space_subregion(void *t __unused, bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size __unused,
-    bus_space_handle_t *nbshp)
-{
-	*nbshp = bsh + offset;
-	return (0);
-}
-
-/*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-
-static u_int8_t
-rmi_bus_space_read_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int8_t) (*(volatile u_int8_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_bus_space_read_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int16_t)(*(volatile u_int16_t *)(handle + offset));
-}
-
-static u_int32_t
-rmi_bus_space_read_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-static void
-rmi_bus_space_read_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t *addr, size_t count)
-{
-	TODO();
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-static void
-rmi_bus_space_write_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	*(volatile u_int8_t *)(handle + offset) =  value;
-}
-
-static void
-rmi_bus_space_write_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	*(volatile u_int16_t *)(handle + offset) = value;
-}
-
-static void
-rmi_bus_space_write_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	*(volatile u_int32_t *)(handle + offset) = value;
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-static void
-rmi_bus_space_write_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t *addr, size_t count)
-{
-	TODO();
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-
-static void
-rmi_bus_space_set_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-static void
-rmi_bus_space_set_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-static void
-rmi_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	printf("bus_space_copy_region_2 - unimplemented\n");
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-
-u_int8_t
-rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return *((volatile u_int8_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return *(volatile u_int16_t *)(handle + offset);
-}
-
-static u_int32_t
-rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-static void
-rmi_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t *addr, size_t count)
-{
-	TODO();
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-rmi_bus_space_read_region_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t *addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_read_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t *addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_read_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t *addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int32_t *)(baddr));
-		baddr += 4;
-	}
-}
-
-void
-rmi_bus_space_write_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t *addr, size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t *addr,
-    size_t count)
-{
-	TODO();
-}
-
-void
-rmi_bus_space_write_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const u_int32_t *addr, size_t count)
-{
-	TODO();
-}
-
-static void
-rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags)
-{
-}
-
-/*
- * need a special bus space for this, because the Netlogic SoC
- * UART allows only 32 bit access to its registers
- */
-
-static u_int8_t
-rmi_uart_bus_space_read_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int8_t)(*(volatile u_int32_t *)(handle + offset));
-}
-
-static void
-rmi_uart_bus_space_write_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	*(volatile u_int32_t *)(handle + offset) =  value;
-}
-
-static struct bus_space local_rmi_uart_bus_space = {
-	/* cookie */
-	(void *)0,
-
-	/* mapping/unmapping */
-	rmi_bus_space_map,
-	rmi_bus_space_unmap,
-	rmi_bus_space_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	rmi_bus_space_barrier,
-
-	/* read (single) */
-	rmi_uart_bus_space_read_1, NULL, NULL, NULL,
-
-	/* read multiple */
-	NULL, NULL, NULL, NULL,
-
-	/* read region */
-	NULL, NULL, NULL, NULL,
-
-	/* write (single) */
-	rmi_uart_bus_space_write_1, NULL, NULL, NULL,
-
-	/* write multiple */
-	NULL, NULL, NULL, NULL,
-
-	/* write region */
-	NULL, NULL, NULL, NULL,
-
-	/* set multiple */
-	NULL, NULL, NULL, NULL,
-
-	/* set region */
-	NULL, NULL, NULL, NULL,
-
-	/* copy */
-	NULL, NULL, NULL, NULL,
-
-	/* read (single) stream */
-	NULL, NULL, NULL, NULL,
-
-	/* read multiple stream */
-	NULL, NULL, NULL, NULL,
-
-	/* read region stream */
-	NULL, NULL, NULL, NULL,
-
-	/* write (single) stream */
-	NULL, NULL, NULL, NULL,
-
-	/* write multiple stream */
-	NULL, NULL, NULL, NULL,
-
-	/* write region stream */
-	NULL, NULL, NULL, NULL,
-};
-
-/* generic bus_space tag */
-bus_space_tag_t rmi_uart_bus_space = &local_rmi_uart_bus_space;
diff --git a/sys/mips/nlm/bus_space_rmi_pci.c b/sys/mips/nlm/bus_space_rmi_pci.c
deleted file mode 100644
index d98b0ba5d367..000000000000
--- a/sys/mips/nlm/bus_space_rmi_pci.c
+++ /dev/null
@@ -1,762 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/endian.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-#include <machine/cache.h>
-
-static int
-rmi_pci_bus_space_map(void *t, bus_addr_t addr,
-    bus_size_t size, int flags,
-    bus_space_handle_t * bshp);
-
-static void
-rmi_pci_bus_space_unmap(void *t, bus_space_handle_t bsh,
-    bus_size_t size);
-
-static int
-rmi_pci_bus_space_subregion(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size,
-    bus_space_handle_t * nbshp);
-
-static u_int8_t
-rmi_pci_bus_space_read_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t
-rmi_pci_bus_space_read_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t
-rmi_pci_bus_space_read_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset);
-
-static void
-rmi_pci_bus_space_read_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_region_1(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value);
-
-static void
-rmi_pci_bus_space_write_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void
-rmi_pci_bus_space_write_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void
-rmi_pci_bus_space_write_multi_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_multi_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_multi_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_set_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value,
-    size_t count);
-
-static void
-rmi_pci_bus_space_set_region_4(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value,
-    size_t count);
-
-static void
-rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags);
-
-static void
-rmi_pci_bus_space_copy_region_2(void *t,
-    bus_space_handle_t bsh1,
-    bus_size_t off1,
-    bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count);
-
-u_int8_t
-rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int16_t
-rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static u_int32_t
-rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset);
-
-static void
-rmi_pci_bus_space_read_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_read_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr,
-    size_t count);
-
-void
-rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t value);
-
-static void
-rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value);
-
-static void
-rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value);
-
-static void
-rmi_pci_bus_space_write_multi_stream_1(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int8_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_multi_stream_2(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count);
-
-static void
-rmi_pci_bus_space_write_multi_stream_4(void *t,
-    bus_space_handle_t handle,
-    bus_size_t offset,
-    const u_int32_t * addr,
-    size_t count);
-
-#define TODO() printf("XLR memory bus space function '%s' unimplemented\n", __func__)
-
-static struct bus_space local_rmi_pci_bus_space = {
-	/* cookie */
-	(void *)0,
-
-	/* mapping/unmapping */
-	rmi_pci_bus_space_map,
-	rmi_pci_bus_space_unmap,
-	rmi_pci_bus_space_subregion,
-
-	/* allocation/deallocation */
-	NULL,
-	NULL,
-
-	/* barrier */
-	rmi_pci_bus_space_barrier,
-
-	/* read (single) */
-	rmi_pci_bus_space_read_1,
-	rmi_pci_bus_space_read_2,
-	rmi_pci_bus_space_read_4,
-	NULL,
-
-	/* read multiple */
-	rmi_pci_bus_space_read_multi_1,
-	rmi_pci_bus_space_read_multi_2,
-	rmi_pci_bus_space_read_multi_4,
-	NULL,
-
-	/* read region */
-	rmi_pci_bus_space_read_region_1,
-	rmi_pci_bus_space_read_region_2,
-	rmi_pci_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) */
-	rmi_pci_bus_space_write_1,
-	rmi_pci_bus_space_write_2,
-	rmi_pci_bus_space_write_4,
-	NULL,
-
-	/* write multiple */
-	rmi_pci_bus_space_write_multi_1,
-	rmi_pci_bus_space_write_multi_2,
-	rmi_pci_bus_space_write_multi_4,
-	NULL,
-
-	/* write region */
-	NULL,
-	rmi_pci_bus_space_write_region_2,
-	rmi_pci_bus_space_write_region_4,
-	NULL,
-
-	/* set multiple */
-	NULL,
-	NULL,
-	NULL,
-	NULL,
-
-	/* set region */
-	NULL,
-	rmi_pci_bus_space_set_region_2,
-	rmi_pci_bus_space_set_region_4,
-	NULL,
-
-	/* copy */
-	NULL,
-	rmi_pci_bus_space_copy_region_2,
-	NULL,
-	NULL,
-
-	/* read (single) stream */
-	rmi_pci_bus_space_read_stream_1,
-	rmi_pci_bus_space_read_stream_2,
-	rmi_pci_bus_space_read_stream_4,
-	NULL,
-
-	/* read multiple stream */
-	rmi_pci_bus_space_read_multi_stream_1,
-	rmi_pci_bus_space_read_multi_stream_2,
-	rmi_pci_bus_space_read_multi_stream_4,
-	NULL,
-
-	/* read region stream */
-	rmi_pci_bus_space_read_region_1,
-	rmi_pci_bus_space_read_region_2,
-	rmi_pci_bus_space_read_region_4,
-	NULL,
-
-	/* write (single) stream */
-	rmi_pci_bus_space_write_stream_1,
-	rmi_pci_bus_space_write_stream_2,
-	rmi_pci_bus_space_write_stream_4,
-	NULL,
-
-	/* write multiple stream */
-	rmi_pci_bus_space_write_multi_stream_1,
-	rmi_pci_bus_space_write_multi_stream_2,
-	rmi_pci_bus_space_write_multi_stream_4,
-	NULL,
-
-	/* write region stream */
-	NULL,
-	rmi_pci_bus_space_write_region_2,
-	rmi_pci_bus_space_write_region_4,
-	NULL,
-};
-
-/* generic bus_space tag */
-bus_space_tag_t rmi_pci_bus_space = &local_rmi_pci_bus_space;
-
-/*
- * Map a region of device bus space into CPU virtual address space.
- */
-static int
-rmi_pci_bus_space_map(void *t __unused, bus_addr_t addr,
-    bus_size_t size __unused, int flags __unused,
-    bus_space_handle_t * bshp)
-{
-	*bshp = addr;
-	return (0);
-}
-
-/*
- * Unmap a region of device bus space.
- */
-static void
-rmi_pci_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused,
-    bus_size_t size __unused)
-{
-}
-
-/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-
-static int
-rmi_pci_bus_space_subregion(void *t __unused, bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size __unused,
-    bus_space_handle_t * nbshp)
-{
-	*nbshp = bsh + offset;
-	return (0);
-}
-
-/*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-
-static u_int8_t
-rmi_pci_bus_space_read_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (u_int8_t) (*(volatile u_int8_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_pci_bus_space_read_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	u_int16_t value;
-
-	value = *(volatile u_int16_t *)(handle + offset);
-	return bswap16(value);
-}
-
-static u_int32_t
-rmi_pci_bus_space_read_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	uint32_t value;
-
-	value = *(volatile u_int32_t *)(handle + offset);
-	return bswap32(value);
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-static void
-rmi_pci_bus_space_read_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = *(volatile u_int8_t *)(handle + offset);
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-
-	while (count--) {
-		*addr = *(volatile u_int16_t *)(handle + offset);
-		*addr = bswap16(*addr);
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-
-	while (count--) {
-		*addr = *(volatile u_int32_t *)(handle + offset);
-		*addr = bswap32(*addr);
-		addr++;
-	}
-}
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-static void
-rmi_pci_bus_space_write_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	mips_sync();
-	*(volatile u_int8_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	mips_sync();
-	*(volatile u_int16_t *)(handle + offset) = bswap16(value);
-}
-
-static void
-rmi_pci_bus_space_write_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	mips_sync();
-	*(volatile u_int32_t *)(handle + offset) = bswap32(value);
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-static void
-rmi_pci_bus_space_write_multi_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int8_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int16_t *)(handle + offset)) = bswap16(*addr);
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int32_t *)(handle + offset)) = bswap32(*addr);
-		addr++;
-	}
-}
-
-/*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-
-static void
-rmi_pci_bus_space_set_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 2)
-		(*(volatile u_int16_t *)(addr)) = value;
-}
-
-static void
-rmi_pci_bus_space_set_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t value, size_t count)
-{
-	bus_addr_t addr = bsh + offset;
-
-	for (; count != 0; count--, addr += 4)
-		(*(volatile u_int32_t *)(addr)) = value;
-}
-
-/*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-static void
-rmi_pci_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1,
-    bus_size_t off1, bus_space_handle_t bsh2,
-    bus_size_t off2, size_t count)
-{
-	TODO();
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-
-u_int8_t
-rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-
-	return *((volatile u_int8_t *)(handle + offset));
-}
-
-static u_int16_t
-rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return *(volatile u_int16_t *)(handle + offset);
-}
-
-static u_int32_t
-rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset)
-{
-	return (*(volatile u_int32_t *)(handle + offset));
-}
-
-static void
-rmi_pci_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int8_t *)(handle + offset));
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int16_t *)(handle + offset));
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	while (count--) {
-		*addr = (*(volatile u_int32_t *)(handle + offset));
-		addr++;
-	}
-}
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-void
-rmi_pci_bus_space_read_region_1(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int8_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int8_t *)(baddr));
-		baddr += 1;
-	}
-}
-
-void
-rmi_pci_bus_space_read_region_2(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int16_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int16_t *)(baddr));
-		baddr += 2;
-	}
-}
-
-void
-rmi_pci_bus_space_read_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, u_int32_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		*addr++ = (*(volatile u_int32_t *)(baddr));
-		baddr += 4;
-	}
-}
-
-void
-rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int8_t value)
-{
-	mips_sync();
-	*(volatile u_int8_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int16_t value)
-{
-	mips_sync();
-	*(volatile u_int16_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle,
-    bus_size_t offset, u_int32_t value)
-{
-	mips_sync();
-	*(volatile u_int32_t *)(handle + offset) = value;
-}
-
-static void
-rmi_pci_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int8_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int8_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int16_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int16_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-static void
-rmi_pci_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	mips_sync();
-	while (count--) {
-		(*(volatile u_int32_t *)(handle + offset)) = *addr;
-		addr++;
-	}
-}
-
-void
-rmi_pci_bus_space_write_region_2(void *t,
-    bus_space_handle_t bsh,
-    bus_size_t offset,
-    const u_int16_t * addr,
-    size_t count)
-{
-	bus_addr_t baddr = (bus_addr_t) bsh + offset;
-
-	while (count--) {
-		(*(volatile u_int16_t *)(baddr)) = *addr;
-		addr++;
-		baddr += 2;
-	}
-}
-
-void
-rmi_pci_bus_space_write_region_4(void *t, bus_space_handle_t bsh,
-    bus_size_t offset, const u_int32_t * addr, size_t count)
-{
-	bus_addr_t baddr = bsh + offset;
-
-	while (count--) {
-		(*(volatile u_int32_t *)(baddr)) = *addr;
-		addr++;
-		baddr += 4;
-	}
-}
-
-static void
-rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused,
-    bus_size_t offset __unused, bus_size_t len __unused, int flags)
-{
-
-}
diff --git a/sys/mips/nlm/clock.h b/sys/mips/nlm/clock.h
deleted file mode 100644
index b36823f97468..000000000000
--- a/sys/mips/nlm/clock.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef _RMI_CLOCK_H_
-#define _RMI_CLOCK_H_
-
-#define XLP_PIC_HZ 133000000U
-#define XLP_CPU_HZ (nlm_cpu_frequency)
-
-void count_compare_clockhandler(struct trapframe *);
-void pic_hardclockhandler(struct trapframe *);
-void pic_timecounthandler(struct trapframe *);
-
-#endif /* _RMI_CLOCK_H_ */
diff --git a/sys/mips/nlm/cms.c b/sys/mips/nlm/cms.c
deleted file mode 100644
index 4b6ad7c95db4..000000000000
--- a/sys/mips/nlm/cms.c
+++ /dev/null
@@ -1,497 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-#include <sys/sbuf.h>
-
-#include <sys/ktr.h>
-#include <sys/kernel.h>
-#include <sys/kthread.h>
-#include <sys/proc.h>
-#include <sys/resourcevar.h>
-#include <sys/sched.h>
-#include <sys/unistd.h>
-#include <sys/sysctl.h>
-#include <sys/malloc.h>
-
-#include <machine/cpu.h>
-#include <machine/hwfunc.h>
-#include <machine/mips_opcode.h>
-#include <machine/intr_machdep.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/cop2.h>
-#include <mips/nlm/hal/fmn.h>
-#include <mips/nlm/hal/pic.h>
-
-#include <mips/nlm/msgring.h>
-#include <mips/nlm/interrupt.h>
-#include <mips/nlm/xlp.h>
-
-#define	MSGRNG_NSTATIONS	1024
-/*
- * Keep track of our message ring handler threads, each core has a
- * different message station. Ideally we will need to start a few
- * message handling threads every core, and wake them up depending on
- * load
- */
-struct msgring_thread {
-	struct thread	*thread;	/* msgring handler threads */
-	int	needed;			/* thread needs to wake up */
-};
-static struct msgring_thread msgring_threads[XLP_MAX_CORES * XLP_MAX_THREADS];
-static struct proc *msgring_proc;	/* all threads are under a proc */
-
-/*
- * The device drivers can register a handler for the messages sent
- * from a station (corresponding to the device).
- */
-struct tx_stn_handler {
-	msgring_handler action;
-	void *arg;
-};
-static struct tx_stn_handler msgmap[MSGRNG_NSTATIONS];
-static struct mtx	msgmap_lock;
-uint32_t xlp_msg_thread_mask;
-static int xlp_msg_threads_per_core = XLP_MAX_THREADS;
-
-static void create_msgring_thread(int hwtid);
-static int msgring_process_fast_intr(void *arg);
-
-/* Debug counters */
-static int msgring_nintr[XLP_MAX_CORES * XLP_MAX_THREADS];
-static int msgring_wakeup_sleep[XLP_MAX_CORES * XLP_MAX_THREADS];
-static int msgring_wakeup_nosleep[XLP_MAX_CORES * XLP_MAX_THREADS];
-static int fmn_msgcount[XLP_MAX_CORES * XLP_MAX_THREADS][4];
-static int fmn_loops[XLP_MAX_CORES * XLP_MAX_THREADS];
-
-/* Whether polled driver implementation */
-static int polled = 0;
-
-/* We do only i/o device credit setup here. CPU credit setup is now
- * moved to xlp_msgring_cpu_init() so that the credits get setup
- * only if the CPU exists. xlp_msgring_cpu_init() gets called from
- * platform_init_ap; and this makes it easy for us to setup CMS
- * credits for various types of XLP chips, with varying number of
- * cpu's and cores.
- */
-static void
-xlp_cms_credit_setup(int credit)
-{
-	uint64_t cmspcibase, cmsbase, pcibase;
-	uint32_t devoffset;
-	int dev, fn, maxqid;
-	int src, qid, i;
-
-	for (i = 0; i < XLP_MAX_NODES; i++) {
-		cmspcibase = nlm_get_cms_pcibase(i);
-		if (!nlm_dev_exists(XLP_IO_CMS_OFFSET(i)))
-			continue;
-		cmsbase = nlm_get_cms_regbase(i);
-		maxqid = nlm_read_reg(cmspcibase, XLP_PCI_DEVINFO_REG0);
-		for (dev = 0; dev < 8; dev++) {
-			for (fn = 0; fn < 8; fn++) {
-				devoffset = XLP_HDR_OFFSET(i, 0, dev, fn);
-				if (nlm_dev_exists(devoffset) == 0)
-					continue;
-				pcibase = nlm_pcicfg_base(devoffset);
-				src = nlm_qidstart(pcibase);
-				if (src == 0)
-					continue;
-#if 0 /* Debug */
-				printf("Setup CMS credits for queues ");
-				printf("[%d to %d] from src %d\n", 0,
-				    maxqid, src);
-#endif
-				for (qid = 0; qid < maxqid; qid++)
-					nlm_cms_setup_credits(cmsbase, qid,
-					    src, credit);
-			}
-		}
-	}
-}
-
-void
-xlp_msgring_cpu_init(int node, int cpu, int credit)
-{
-	uint64_t cmspcibase = nlm_get_cms_pcibase(node);
-	uint64_t cmsbase = nlm_get_cms_regbase(node);
-	int qid, maxqid, src;
-
-	maxqid = nlm_read_reg(cmspcibase, XLP_PCI_DEVINFO_REG0);
-
-	/* cpu credit setup is done only from thread-0 of each core */
-	if((cpu % 4) == 0) {
-		src = cpu << 2; /* each thread has 4 vc's */
-		for (qid = 0; qid < maxqid; qid++)
-			nlm_cms_setup_credits(cmsbase, qid, src, credit);
-	}
-}
-
-/*
- * Drain out max_messages for the buckets set in the bucket mask.
- * Use max_msgs = 0 to drain out all messages.
- */
-int
-xlp_handle_msg_vc(u_int vcmask, int max_msgs)
-{
-	struct nlm_fmn_msg msg;
-	int srcid = 0, size = 0, code = 0;
-	struct tx_stn_handler *he;
-	uint32_t mflags, status;
-	int n_msgs = 0, vc, m, hwtid;
-	u_int msgmask;
-
-	hwtid = nlm_cpuid();
-	for (;;) {
-		/* check if VC empty */
-		mflags = nlm_save_flags_cop2();
-		status = nlm_read_c2_msgstatus1();
-		nlm_restore_flags(mflags);
-
-		msgmask = ((status >> 24) & 0xf) ^ 0xf;
-		msgmask &= vcmask;
-		if (msgmask == 0)
-			    break;
-		m = 0;
-		for (vc = 0; vc < 4; vc++) {
-			if ((msgmask & (1 << vc)) == 0)
-				continue;
-
-			mflags = nlm_save_flags_cop2();
-			status = nlm_fmn_msgrcv(vc, &srcid, &size, &code,
-			    &msg);
-			nlm_restore_flags(mflags);
-			if (status != 0)	/*  no msg or error */
-				continue;
-			if (srcid < 0 || srcid >= 1024) {
-				printf("[%s]: bad src id %d\n", __func__,
-				    srcid);
-				continue;
-			}
-			he = &msgmap[srcid];
-			if(he->action != NULL)
-				(he->action)(vc, size, code, srcid, &msg,
-				he->arg);
-#if 0
-			else
-				printf("[%s]: No Handler for msg from stn %d,"
-				    " vc=%d, size=%d, msg0=%jx, droppinge\n",
-				    __func__, srcid, vc, size,
-				    (uintmax_t)msg.msg[0]);
-#endif
-			fmn_msgcount[hwtid][vc] += 1;
-			m++;	/* msgs handled in this iter */
-		}
-		if (m == 0)
-			break;	/* nothing done in this iter */
-		n_msgs += m;
-		if (max_msgs > 0 && n_msgs >= max_msgs)
-			break;
-	}
-
-	return (n_msgs);
-}
-
-static void
-xlp_discard_msg_vc(u_int vcmask)
-{
-	struct nlm_fmn_msg msg;
-	int srcid = 0, size = 0, code = 0, vc;
-	uint32_t mflags, status;
-
-	for (vc = 0; vc < 4; vc++) {
-		for (;;) {
-			mflags = nlm_save_flags_cop2();
-			status = nlm_fmn_msgrcv(vc, &srcid,
-			    &size, &code, &msg);
-			nlm_restore_flags(mflags);
-
-			/* break if there is no msg or error */
-			if (status != 0)
-				break;
-		}
-	}
-}
-
-void
-xlp_cms_enable_intr(int node, int cpu, int type, int watermark)
-{
-	uint64_t cmsbase;
-	int i, qid;
-
-	cmsbase = nlm_get_cms_regbase(node);
-
-	for (i = 0; i < 4; i++) {
-		qid = (i + (cpu * 4)) & 0x7f;
-		nlm_cms_per_queue_level_intr(cmsbase, qid, type, watermark);
-		nlm_cms_per_queue_timer_intr(cmsbase, qid, 0x1, 0);
-	}
-}
-
-static int
-msgring_process_fast_intr(void *arg)
-{
-	struct msgring_thread *mthd;
-	struct thread *td;
-	int	cpu;
-
-	cpu = nlm_cpuid();
-	mthd = &msgring_threads[cpu];
-	msgring_nintr[cpu]++;
-	td = mthd->thread;
-
-	/* clear pending interrupts */
-	nlm_write_c0_eirr(1ULL << IRQ_MSGRING);
-
-	/* wake up the target thread */
-	mthd->needed = 1;
-	thread_lock(td);
-	if (TD_AWAITING_INTR(td)) {
-		msgring_wakeup_sleep[cpu]++;
-		TD_CLR_IWAIT(td);
-		sched_add(td, SRQ_INTR);
-	} else {
-		thread_unlock(td);
-		msgring_wakeup_nosleep[cpu]++;
-	}
-
-	return (FILTER_HANDLED);
-}
-
-static void
-msgring_process(void * arg)
-{
-	volatile struct msgring_thread *mthd;
-	struct thread *td;
-	uint32_t mflags, msgstatus1;
-	int hwtid, nmsgs;
-
-	hwtid = (intptr_t)arg;
-	mthd = &msgring_threads[hwtid];
-	td = mthd->thread;
-	KASSERT(curthread == td,
-	    ("%s:msg_ithread and proc linkage out of sync", __func__));
-
-	/* First bind this thread to the right CPU */
-	thread_lock(td);
-	sched_bind(td, xlp_hwtid_to_cpuid[hwtid]);
-	thread_unlock(td);
-
-	if (hwtid != nlm_cpuid())
-		printf("Misscheduled hwtid %d != cpuid %d\n", hwtid,
-		    nlm_cpuid());
-
-	xlp_discard_msg_vc(0xf);
-	xlp_msgring_cpu_init(nlm_nodeid(), nlm_cpuid(), CMS_DEFAULT_CREDIT);
-	if (polled == 0) {
-		mflags = nlm_save_flags_cop2();
-		nlm_fmn_cpu_init(IRQ_MSGRING, 0, 0, 0, 0, 0);
-		nlm_restore_flags(mflags);
-		xlp_cms_enable_intr(nlm_nodeid(), nlm_cpuid(), 0x2, 0);
-		/* clear pending interrupts.
-		 *  they will get re-raised if still valid */
-		nlm_write_c0_eirr(1ULL << IRQ_MSGRING);
-	}
-
-	/* start processing messages */
-	for (;;) {
-		atomic_store_rel_int(&mthd->needed, 0);
-		nmsgs = xlp_handle_msg_vc(0xf, 0);
-
-		/* sleep */
-		if (polled == 0) {
-			/* clear VC-pend bits */
-			mflags = nlm_save_flags_cop2();
-			msgstatus1 = nlm_read_c2_msgstatus1();
-			msgstatus1 |= (0xf << 16);
-			nlm_write_c2_msgstatus1(msgstatus1);
-			nlm_restore_flags(mflags);
-
-			thread_lock(td);
-			if (mthd->needed) {
-				thread_unlock(td);
-				continue;
-			}
-			sched_class(td, PRI_ITHD);
-			TD_SET_IWAIT(td);
-			mi_switch(SW_VOL);
-		} else
-			pause("wmsg", 1);
-
-		fmn_loops[hwtid]++;
-	}
-}
-
-static void
-create_msgring_thread(int hwtid)
-{
-	struct msgring_thread *mthd;
-	struct thread *td;
-	int	error;
-
-	mthd = &msgring_threads[hwtid];
-	error = kproc_kthread_add(msgring_process, (void *)(uintptr_t)hwtid,
-	    &msgring_proc, &td, RFSTOPPED, 2, "msgrngproc",
-	    "msgthr%d", hwtid);
-	if (error)
-		panic("kproc_kthread_add() failed with %d", error);
-	mthd->thread = td;
-
-	thread_lock(td);
-	sched_class(td, PRI_ITHD);
-	sched_add(td, SRQ_INTR);
-}
-
-int
-register_msgring_handler(int startb, int endb, msgring_handler action,
-    void *arg)
-{
-	int	i;
-
-	if (bootverbose)
-		printf("Register handler %d-%d %p(%p)\n",
-		    startb, endb, action, arg);
-	KASSERT(startb >= 0 && startb <= endb && endb < MSGRNG_NSTATIONS,
-	    ("Invalid value for bucket range %d,%d", startb, endb));
-
-	mtx_lock_spin(&msgmap_lock);
-	for (i = startb; i <= endb; i++) {
-		KASSERT(msgmap[i].action == NULL,
-		   ("Bucket %d already used [action %p]", i, msgmap[i].action));
-		msgmap[i].action = action;
-		msgmap[i].arg = arg;
-	}
-	mtx_unlock_spin(&msgmap_lock);
-	return (0);
-}
-
-/*
- * Initialize the messaging subsystem.
- *
- * Message Stations are shared among all threads in a cpu core, this
- * has to be called once from every core which is online.
- */
-static void
-xlp_msgring_config(void *arg)
-{
-	void *cookie;
-	unsigned int thrmask, mask;
-	int i;
-
-	/* used polled handler for Ax silion */
-	if (nlm_is_xlp8xx_ax())
-		polled = 1;
-
-	/* Don't poll on all threads, if polled */
-	if (polled)
-		xlp_msg_threads_per_core -= 1;
-
-	mtx_init(&msgmap_lock, "msgring", NULL, MTX_SPIN);
-	if (xlp_threads_per_core < xlp_msg_threads_per_core)
-		xlp_msg_threads_per_core = xlp_threads_per_core;
-	thrmask = ((1 << xlp_msg_threads_per_core) - 1);
-	mask = 0;
-	for (i = 0; i < XLP_MAX_CORES; i++) {
-		mask <<= XLP_MAX_THREADS;
-		mask |= thrmask;
-	}
-	xlp_msg_thread_mask = xlp_hw_thread_mask & mask;
-#if 0
-	printf("CMS Message handler thread mask %#jx\n",
-	    (uintmax_t)xlp_msg_thread_mask);
-#endif
-	xlp_cms_credit_setup(CMS_DEFAULT_CREDIT);
-	create_msgring_thread(0);
-	cpu_establish_hardintr("msgring", msgring_process_fast_intr, NULL,
-	    NULL, IRQ_MSGRING, INTR_TYPE_NET, &cookie);
-}
-
-/*
- * Start message ring processing threads on other CPUs, after SMP start
- */
-static void
-start_msgring_threads(void *arg)
-{
-	int	hwt;
-
-	for (hwt = 1; hwt < XLP_MAX_CORES * XLP_MAX_THREADS; hwt++) {
-		if ((xlp_msg_thread_mask & (1 << hwt)) == 0)
-			continue;
-		create_msgring_thread(hwt);
-	}
-}
-
-SYSINIT(xlp_msgring_config, SI_SUB_DRIVERS, SI_ORDER_FIRST,
-    xlp_msgring_config, NULL);
-SYSINIT(start_msgring_threads, SI_SUB_SMP, SI_ORDER_MIDDLE,
-    start_msgring_threads, NULL);
-
-/*
- * DEBUG support, XXX: static buffer, not locked
- */
-static int
-sys_print_debug(SYSCTL_HANDLER_ARGS)
-{
-	struct sbuf sb;
-	int error, i;
-
-	sbuf_new_for_sysctl(&sb, NULL, 64, req);
-	sbuf_printf(&sb, 
-	    "\nID     vc0       vc1       vc2     vc3     loops\n");
-	for (i = 0; i < 32; i++) {
-		if ((xlp_hw_thread_mask & (1 << i)) == 0)
-			continue;
-		sbuf_printf(&sb, "%2d: %8d %8d %8d %8d %8d\n", i,
-		    fmn_msgcount[i][0], fmn_msgcount[i][1],
-		    fmn_msgcount[i][2], fmn_msgcount[i][3],
-		    fmn_loops[i]);
-	}
-	error = sbuf_finish(&sb);
-	sbuf_delete(&sb);
-	return (error);
-}
-
-SYSCTL_PROC(_debug, OID_AUTO, msgring,
-    CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 0, 0,
-    sys_print_debug, "A",
-    "msgring debug info");
diff --git a/sys/mips/nlm/dev/net/mdio.c b/sys/mips/nlm/dev/net/mdio.c
deleted file mode 100644
index 7cf82248080a..000000000000
--- a/sys/mips/nlm/dev/net/mdio.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/mdio.h>
-
-#include <mips/nlm/xlp.h>
-
-/* Internal MDIO READ/WRITE Routines */
-int
-nlm_int_gmac_mdio_read(uint64_t nae_base, int bus, int block,
-    int intf_type, int phyaddr, int regidx)
-{
-	uint32_t mdio_ld_cmd;
-	uint32_t ctrlval;
-
-	ctrlval = INT_MDIO_CTRL_SMP		|
-	    (phyaddr << INT_MDIO_CTRL_PHYADDR_POS) |
-	    (regidx << INT_MDIO_CTRL_DEVTYPE_POS) |
-	    (2 << INT_MDIO_CTRL_OP_POS)		|
-	    (1 << INT_MDIO_CTRL_ST_POS)		|
-	    (7 << INT_MDIO_CTRL_XDIV_POS)	|
-	    (2 << INT_MDIO_CTRL_TA_POS)		|
-	    (2 << INT_MDIO_CTRL_MIIM_POS)	|
-	    (1 << INT_MDIO_CTRL_MCDIV_POS);
-
-	mdio_ld_cmd = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)));
-	if (mdio_ld_cmd & INT_MDIO_CTRL_CMD_LOAD) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)),
-		    (mdio_ld_cmd & ~INT_MDIO_CTRL_CMD_LOAD));
-	}
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval);
-
-	/* Toggle Load Cmd Bit */
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval | (1 << INT_MDIO_CTRL_LOAD_POS));
-
-	/* poll master busy bit until it is not busy */
-	while(nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4))) &
-	    INT_MDIO_STAT_MBSY) {
-	}
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval);
-
-	/* Read the data back */
-	return nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4)));
-}
-
-/* Internal MDIO WRITE Routines */
-int
-nlm_int_gmac_mdio_write(uint64_t nae_base, int bus, int block,
-    int intf_type, int phyaddr, int regidx, uint16_t val)
-{
-	uint32_t mdio_ld_cmd;
-	uint32_t ctrlval;
-
-	ctrlval = INT_MDIO_CTRL_SMP		|
-	    (phyaddr << INT_MDIO_CTRL_PHYADDR_POS) |
-	    (regidx << INT_MDIO_CTRL_DEVTYPE_POS) |
-	    (1 << INT_MDIO_CTRL_OP_POS)		|
-	    (1 << INT_MDIO_CTRL_ST_POS)		|
-	    (7 << INT_MDIO_CTRL_XDIV_POS)	|
-	    (2 << INT_MDIO_CTRL_TA_POS)		|
-	    (1 << INT_MDIO_CTRL_MIIM_POS)	|
-	    (1 << INT_MDIO_CTRL_MCDIV_POS);
-
-	mdio_ld_cmd = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)));
-	if (mdio_ld_cmd & INT_MDIO_CTRL_CMD_LOAD) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)),
-		    (mdio_ld_cmd & ~INT_MDIO_CTRL_CMD_LOAD));
-	}
-
-	/* load data into ctrl data reg */
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL_DATA + bus * 4)),
-	    val);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval | (1 << INT_MDIO_CTRL_LOAD_POS));
-
-	/* poll master busy bit until it is not busy */
-	while(nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4))) &
-	    INT_MDIO_STAT_MBSY) {
-	}
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    ctrlval);
-
-	return (0);
-}
-
-int
-nlm_int_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
-    int intf_type)
-{
-	uint32_t val;
-
-	val = (7 << INT_MDIO_CTRL_XDIV_POS) |
-	    (1 << INT_MDIO_CTRL_MCDIV_POS) |
-	    (INT_MDIO_CTRL_SMP);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    val | INT_MDIO_CTRL_RST);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
-	    val);
-
-        return (0);
-}
-
-/*
- *  nae_gmac_mdio_read - Read sgmii phy register
- *
- *  Input parameters:
- *         bus          - bus number, nae has two external gmac bus: 0 and 1
- *         phyaddr      - PHY's address
- *         regidx       - index of register to read
- *
- *  Return value:
- *         value read (16 bits), or 0xffffffff if an error occurred.
- */
-int
-nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
-    int intf_type, int phyaddr, int regidx)
-{
-	uint32_t mdio_ld_cmd;
-	uint32_t ctrlval;
-
-	mdio_ld_cmd = nlm_read_nae_reg(nae_base, NAE_REG(block, intf_type,
-	    (EXT_G0_MDIO_CTRL + bus * 4)));
-	if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-		    (mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
-		while(nlm_read_nae_reg(nae_base,
-		    NAE_REG(block, intf_type,
-		    (EXT_G0_MDIO_RD_STAT + bus * 4))) &
-		    EXT_G_MDIO_STAT_MBSY);
-	}
-
-	ctrlval = EXT_G_MDIO_CMD_SP |
-	    (phyaddr << EXT_G_MDIO_PHYADDR_POS) |
-	    (regidx << EXT_G_MDIO_REGADDR_POS);
-	if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
-		ctrlval |= EXT_G_MDIO_DIV;
-	else
-		ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval | (1<<18));
-	DELAY(1000);
-	/* poll master busy bit until it is not busy */
-	while(nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_RD_STAT + bus * 4))) &
-	    EXT_G_MDIO_STAT_MBSY);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval);
-
-	/* Read the data back */
-	return nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_RD_STAT + bus * 4)));
-}
-
-/*
- *  nae_gmac_mdio_write -Write sgmac mii PHY register.
- *
- *  Input parameters:
- *         bus          - bus number, nae has two external gmac bus: 0 and 1
- *         phyaddr      - PHY to use
- *         regidx       - register within the PHY
- *         val          - data to write to register
- *
- *  Return value:
- *         0 - success
- */
-int
-nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
-    int intf_type, int phyaddr, int regidx, uint16_t val)
-{
-	uint32_t mdio_ld_cmd;
-	uint32_t ctrlval;
-
-	mdio_ld_cmd = nlm_read_nae_reg(nae_base, NAE_REG(block, intf_type,
-	    (EXT_G0_MDIO_CTRL + bus * 4)));
-	if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-		    (mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
-		while(nlm_read_nae_reg(nae_base,
-		    NAE_REG(block, intf_type,
-		    (EXT_G0_MDIO_RD_STAT + bus * 4))) &
-		    EXT_G_MDIO_STAT_MBSY);
-	}
-
-	/* load data into ctrl data reg */
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)),
-	    val);
-
-	ctrlval = EXT_G_MDIO_CMD_SP		|
-	    (phyaddr << EXT_G_MDIO_PHYADDR_POS)	|
-	    (regidx << EXT_G_MDIO_REGADDR_POS);
-	if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
-		ctrlval |= EXT_G_MDIO_DIV;
-	else
-		ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval | EXT_G_MDIO_CMD_LCD);
-	DELAY(1000);
-
-	/* poll master busy bit until it is not busy */
-	while(nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type,
-	    (EXT_G0_MDIO_RD_STAT + bus * 4))) & EXT_G_MDIO_STAT_MBSY);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
-	    ctrlval);
-
-	return (0);
-}
-
-/*
- *  nae_gmac_mdio_reset -Reset sgmii mdio module.
- *
- *  Input parameters:
- *         bus - bus number, nae has two external gmac bus: 0 and 1
- *
- *  Return value:
- *        0 - success
- */
-int
-nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
-    int intf_type)
-{
-	uint32_t ctrlval;
-
-	ctrlval = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)));
-
-	if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
-		ctrlval |= EXT_G_MDIO_DIV;
-	else
-		ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)),
-	    EXT_G_MDIO_MMRST | ctrlval);
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), ctrlval);
-	return (0);
-}
-
-/*
- * nlm_mdio_reset_all : reset all internal and external MDIO
- */
-void
-nlm_mdio_reset_all(uint64_t nae_base)
-{
-	/* reset internal MDIO */
-	nlm_int_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG);
-	/* reset external MDIO */
-	nlm_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG);
-	nlm_gmac_mdio_reset(nae_base, 1, BLOCK_7, LANE_CFG);
-}
diff --git a/sys/mips/nlm/dev/net/nae.c b/sys/mips/nlm/dev/net/nae.c
deleted file mode 100644
index 0b55fe750f8a..000000000000
--- a/sys/mips/nlm/dev/net/nae.c
+++ /dev/null
@@ -1,1456 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/mdio.h>
-#include <mips/nlm/hal/sgmii.h>
-#include <mips/nlm/hal/xaui.h>
-
-#include <mips/nlm/board.h>
-#include <mips/nlm/xlp.h>
-
-void
-nlm_nae_flush_free_fifo(uint64_t nae_base, int nblocks)
-{
-	uint32_t data, fifo_mask;
-
-	fifo_mask = (1 << (4 * nblocks)) - 1;
-
-	nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, fifo_mask);
-	do {
-		data = nlm_read_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP);
-	} while (data != fifo_mask);
-
-	nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, 0);
-}
-
-void
-nlm_program_nae_parser_seq_fifo(uint64_t nae_base, int maxports,
-    struct nae_port_config *cfg)
-{
-	uint32_t val;
-	int start = 0, size, i;
-
-	for (i = 0; i < maxports; i++) {
-		size = cfg[i].pseq_fifo_size;
-		val = (((size & 0x1fff) << 17) |
-		    ((start & 0xfff) << 5) |
-		    (i & 0x1f));
-		nlm_write_nae_reg(nae_base, NAE_PARSER_SEQ_FIFO_CFG, val);
-		start += size;
-	}
-}
-
-void
-nlm_setup_rx_cal_cfg(uint64_t nae_base, int total_num_ports,
-    struct nae_port_config *cfg)
-{
-	int rx_slots = 0, port;
-	int cal_len, cal = 0, last_free = 0;
-	uint32_t val;
-
-	for (port = 0; port < total_num_ports; port++) {
-		if (cfg[port].rx_slots_reqd)
-		    rx_slots += cfg[port].rx_slots_reqd;
-		if (rx_slots > MAX_CAL_SLOTS) {
-			rx_slots = MAX_CAL_SLOTS;
-			break;
-		}
-	}
-
-	cal_len = rx_slots - 1;
-
-	do {
-		if (cal >= MAX_CAL_SLOTS)
-			break;
-		last_free = cal;
-		for (port = 0; port < total_num_ports; port++) {
-			if (cfg[port].rx_slots_reqd > 0) {
-				val = (cal_len << 16) | (port << 8) | cal;
-				nlm_write_nae_reg(nae_base,
-				    NAE_RX_IF_SLOT_CAL, val);
-				cal++;
-				cfg[port].rx_slots_reqd--;
-			}
-		}
-		if (last_free == cal)
-			break;
-	} while (1);
-}
-
-void
-nlm_setup_tx_cal_cfg(uint64_t nae_base, int total_num_ports,
-    struct nae_port_config *cfg)
-{
-	int tx_slots = 0, port;
-	int cal = 0, last_free = 0;
-	uint32_t val;
-
-	for (port = 0; port < total_num_ports; port++) {
-		if (cfg[port].tx_slots_reqd)
-			tx_slots += cfg[port].tx_slots_reqd;
-		if (tx_slots > MAX_CAL_SLOTS) {
-			tx_slots = MAX_CAL_SLOTS;
-			break;
-		}
-	}
-
-	nlm_write_nae_reg(nae_base, NAE_EGR_NIOR_CAL_LEN_REG, tx_slots - 1);
-	do {
-		if (cal >= MAX_CAL_SLOTS)
-			break;
-		last_free = cal;
-		for (port = 0; port < total_num_ports; port++) {
-			if (cfg[port].tx_slots_reqd > 0) {
-				val = (port << 7) | (cal << 1) | 1;
-				nlm_write_nae_reg(nae_base,
-				    NAE_EGR_NIOR_CRDT_CAL_PROG, val);
-				cal++;
-				cfg[port].tx_slots_reqd--;
-			}
-		}
-		if (last_free == cal)
-			break;
-	} while (1);
-}
-
-void
-nlm_deflate_frin_fifo_carving(uint64_t nae_base, int total_num_ports)
-{
-	const int minimum_size = 8;
-	uint32_t value;
-	int intf, start;
-
-	for (intf = 0; intf < total_num_ports; intf++) {
-		start = minimum_size * intf;
-		value = (minimum_size << 20) | (start << 8) | (intf);
-		nlm_write_nae_reg(nae_base, NAE_FREE_IN_FIFO_CFG, value);
-	}
-}
-
-void
-nlm_reset_nae(int node)
-{
-	uint64_t sysbase;
-	uint64_t nae_base;
-	uint64_t nae_pcibase;
-	uint32_t rx_config;
-	uint32_t bar0;
-	int reset_bit;
-
-	sysbase  = nlm_get_sys_regbase(node);
-	nae_base = nlm_get_nae_regbase(node);
-	nae_pcibase = nlm_get_nae_pcibase(node);
-
-	bar0 = nlm_read_pci_reg(nae_pcibase, XLP_PCI_CFGREG4);
-
-#if BYTE_ORDER == LITTLE_ENDIAN
-	if (nlm_is_xlp8xx_ax()) {
-		uint8_t	val;
-		/* membar fixup */
-		val = (bar0 >> 24) & 0xff;
-		bar0 = (val << 24) | (val << 16) | (val << 8) | val;
-	}
-#endif
-
-	if (nlm_is_xlp3xx())
-		reset_bit = 6;
-	else
-		reset_bit = 9;
-
-	/* Reset NAE */
-	nlm_write_sys_reg(sysbase, SYS_RESET, (1 << reset_bit));
-
-	/* XXXJC - 1s delay here may be too high */
-	DELAY(1000000);
-	nlm_write_sys_reg(sysbase, SYS_RESET, (0 << reset_bit));
-	DELAY(1000000);
-
-	rx_config = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
-	nlm_write_pci_reg(nae_pcibase, XLP_PCI_CFGREG4, bar0);
-}
-
-void
-nlm_setup_poe_class_config(uint64_t nae_base, int max_poe_classes,
-    int num_contexts, int *poe_cl_tbl)
-{
-	uint32_t val;
-	int i, max_poe_class_ctxt_tbl_sz;
-
-	max_poe_class_ctxt_tbl_sz = num_contexts/max_poe_classes;
-	for (i = 0; i < max_poe_class_ctxt_tbl_sz; i++) {
-		val = (poe_cl_tbl[(i/max_poe_classes) & 0x7] << 8) | i;
-		nlm_write_nae_reg(nae_base, NAE_POE_CLASS_SETUP_CFG, val);
-	}
-}
-
-void
-nlm_setup_vfbid_mapping(uint64_t nae_base)
-{
-	uint32_t val;
-	int dest_vc, vfbid;
-
-	/* 127 is max vfbid */
-	for (vfbid = 127; vfbid >= 0; vfbid--) {
-		dest_vc = nlm_get_vfbid_mapping(vfbid);
-		if (dest_vc < 0)
-			continue;
-		val = (dest_vc << 16) | (vfbid << 4) | 1;
-		nlm_write_nae_reg(nae_base, NAE_VFBID_DESTMAP_CMD, val);
-	}
-}
-
-void
-nlm_setup_flow_crc_poly(uint64_t nae_base, uint32_t poly)
-{
-	nlm_write_nae_reg(nae_base, NAE_FLOW_CRC16_POLY_CFG, poly);
-}
-
-void
-nlm_setup_iface_fifo_cfg(uint64_t nae_base, int maxports,
-    struct nae_port_config *cfg)
-{
-	uint32_t reg;
-	int fifo_xoff_thresh = 12;
-	int i, size;
-	int cur_iface_start = 0;
-
-	for (i = 0; i < maxports; i++) {
-		size = cfg[i].iface_fifo_size;
-		reg = ((fifo_xoff_thresh << 25) |
-		    ((size & 0x1ff) << 16) |
-		    ((cur_iface_start & 0xff) << 8) |
-		    (i & 0x1f));
-		nlm_write_nae_reg(nae_base, NAE_IFACE_FIFO_CFG, reg);
-		cur_iface_start += size;
-	}
-}
-
-void
-nlm_setup_rx_base_config(uint64_t nae_base, int maxports,
-    struct nae_port_config *cfg)
-{
-	int base = 0;
-	uint32_t val;
-	int i;
-	int id;
-
-	for (i = 0; i < (maxports/2); i++) {
-		id = 0x12 + i; /* RX_IF_BASE_CONFIG0 */
-
-		val = (base & 0x3ff);
-		base += cfg[(i * 2)].num_channels;
-
-		val |= ((base & 0x3ff) << 16);
-		base += cfg[(i * 2) + 1].num_channels;
-
-		nlm_write_nae_reg(nae_base, NAE_REG(7, 0, id), val);
-	}
-}
-
-void
-nlm_setup_rx_buf_config(uint64_t nae_base, int maxports,
-    struct nae_port_config *cfg)
-{
-	uint32_t val;
-	int i, sz, k;
-	int context = 0;
-	int base = 0;
-
-	for (i = 0; i < maxports; i++) {
-		if (cfg[i].type == UNKNOWN)
-			continue;
-		for (k = 0; k < cfg[i].num_channels; k++) {
-			/* write index (context num) */
-			nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH_ADDR,
-			    (context+k));
-
-			/* write value (rx buf sizes) */
-			sz = cfg[i].rxbuf_size;
-			val = 0x80000000 | ((base << 2) & 0x3fff); /* base */
-			val |= (((sz << 2)  & 0x3fff) << 16); /* size */
-
-			nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH, val);
-			nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH,
-			    (0x7fffffff & val));
-			base += sz;
-		}
-		context += cfg[i].num_channels;
-	}
-}
-
-void
-nlm_setup_freein_fifo_cfg(uint64_t nae_base, struct nae_port_config *cfg)
-{
-	int size, i;
-	uint32_t reg;
-	int start = 0, maxbufpool;
-
-	if (nlm_is_xlp8xx())
-		maxbufpool = MAX_FREE_FIFO_POOL_8XX;
-	else
-		maxbufpool = MAX_FREE_FIFO_POOL_3XX;
-	for (i = 0; i < maxbufpool; i++) {
-		/* Each entry represents 2 descs; hence division by 2 */
-		size = (cfg[i].num_free_descs / 2);
-		if (size == 0)
-			size = 8;
-		reg = ((size  & 0x3ff ) << 20) | /* fcSize */
-		    ((start & 0x1ff)  << 8) | /* fcStart */
-		    (i & 0x1f);
-
-		nlm_write_nae_reg(nae_base, NAE_FREE_IN_FIFO_CFG, reg);
-		start += size;
-	}
-}
-
-/* XXX function name */
-int
-nlm_get_flow_mask(int num_ports)
-{
-	const int max_bits = 5; /* upto 32 ports */
-	int i;
-
-	/* Compute the number of bits to needed to
-	 * represent all the ports */
-	for (i = 0; i < max_bits; i++) {
-		if (num_ports <= (2 << i))
-			return (i + 1);
-	}
-	return (max_bits);
-}
-
-void
-nlm_program_flow_cfg(uint64_t nae_base, int port,
-    uint32_t cur_flow_base, uint32_t flow_mask)
-{
-	uint32_t val;
-
-	val = (cur_flow_base << 16) | port;
-	val |= ((flow_mask & 0x1f) << 8);
-	nlm_write_nae_reg(nae_base, NAE_FLOW_BASEMASK_CFG, val);
-}
-
-void
-xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
-    int mode)
-{
-	uint32_t val = 0, saved_data;
-	int rext_sel = 0;
-
-	val = PHY_LANE_CTRL_RST |
-	    PHY_LANE_CTRL_PWRDOWN |
-	    (mode << PHY_LANE_CTRL_PHYMODE_POS);
-
-	/* set comma bypass for XAUI */
-	if (mode != PHYMODE_SGMII)
-		val |= PHY_LANE_CTRL_BPC_XAUI;
-
-	nlm_write_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl), val);
-
-	if (lane_ctrl != 4) {
-		rext_sel = (1 << 23);
-		if (mode != PHYMODE_SGMII)
-			rext_sel |= PHY_LANE_CTRL_BPC_XAUI;
-
-		val = nlm_read_nae_reg(nae_base,
-		    NAE_REG(block, PHY, lane_ctrl));
-		val &= ~PHY_LANE_CTRL_RST;
-		val |= rext_sel;
-
-		/* Resetting PMA for non-zero lanes */
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, PHY, lane_ctrl), val);
-
-		DELAY(20000);	/* 20 ms delay, XXXJC: needed? */
-
-		val |= PHY_LANE_CTRL_RST;
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, PHY, lane_ctrl), val);
-
-		val = 0;
-	}
-
-	/* Come out of reset for TXPLL */
-	saved_data = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl)) & 0xFFC00000;
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl),
-	    (0x66 << PHY_LANE_CTRL_ADDR_POS)
-	    | PHY_LANE_CTRL_CMD_READ
-	    | PHY_LANE_CTRL_CMD_START
-	    | PHY_LANE_CTRL_RST
-	    | rext_sel
-	    | val );
-
-	while (((val = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl))) &
-	    PHY_LANE_CTRL_CMD_PENDING));
-
-	val &= 0xFF;
-	/* set bit[4] to 0 */
-	val &= ~(1 << 4);
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl),
-	    (0x66 << PHY_LANE_CTRL_ADDR_POS)
-	    | PHY_LANE_CTRL_CMD_WRITE
-	    | PHY_LANE_CTRL_CMD_START
-	    | (0x0 << 19) /* (0x4 << 19) */
-	    | rext_sel
-	    | saved_data
-	    | val );
-
-	/* re-do */
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl),
-	    (0x66 << PHY_LANE_CTRL_ADDR_POS)
-	    | PHY_LANE_CTRL_CMD_WRITE
-	    | PHY_LANE_CTRL_CMD_START
-	    | (0x0 << 19) /* (0x4 << 19) */
-	    | rext_sel
-	    | saved_data
-	    | val );
-
-	while (!((val = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) &
-	    PHY_LANE_STAT_PCR));
-
-	/* Clear the Power Down bit */
-	val = nlm_read_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl));
-	val &= ~((1 << 29) | (0x7ffff));
-	nlm_write_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl),
-	    (rext_sel | val));
-}
-
-void
-xlp_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
-    int mode)
-{
-	uint32_t val = 0;
-	int rext_sel = 0;
-
-	if (lane_ctrl != 4)
-		rext_sel = (1 << 23);
-
-	val = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl));
-
-	/* set comma bypass for XAUI */
-	if (mode != PHYMODE_SGMII)
-		val |= PHY_LANE_CTRL_BPC_XAUI;
-	val |= 0x100000;
-	val |= (mode << PHY_LANE_CTRL_PHYMODE_POS);
-	val &= ~(0x20000);
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl), val);
-
-	val = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl));
-	val |= 0x40000000;
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl), val);
-
-	/* clear the power down bit */
-	val = nlm_read_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl));
-	val &= ~( (1 << 29) | (0x7ffff));
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, PHY, lane_ctrl), rext_sel | val);
-}
-
-void
-xlp_nae_config_lane_gmac(uint64_t nae_base, int cplx_mask)
-{
-	int block, lane_ctrl;
-	int cplx_lane_enable;
-	int lane_enable = 0;
-
-	cplx_lane_enable = LM_SGMII |
-	    (LM_SGMII << 4) |
-	    (LM_SGMII << 8) |
-	    (LM_SGMII << 12);
-
-	/*  Lane mode progamming */
-	block = 7;
-
-	/* Complexes 0, 1 */
-	if (cplx_mask & 0x1)
-		lane_enable |= cplx_lane_enable;
-
-	if (cplx_mask & 0x2)
-		lane_enable |= (cplx_lane_enable << 16);
-
-	if (lane_enable) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1),
-		    lane_enable);
-		lane_enable = 0;
-	}
-	/* Complexes 2 3 */
-	if (cplx_mask & 0x4)
-		lane_enable |= cplx_lane_enable;
-
-	if (cplx_mask & 0x8)
-		lane_enable |= (cplx_lane_enable << 16);
-
-	nlm_write_nae_reg(nae_base,
-	    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3),
-	    lane_enable);
-
-	/* complex 4 */
-	/* XXXJC : fix duplicate code */
-	if (cplx_mask & 0x10) {
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_4),
-		    ((LM_SGMII << 4) | LM_SGMII));
-		for (lane_ctrl = PHY_LANE_0_CTRL;
-		    lane_ctrl <= PHY_LANE_1_CTRL; lane_ctrl++) {
-			if (!nlm_is_xlp8xx_ax())
-				xlp_nae_lane_reset_txpll(nae_base,
-				    4, lane_ctrl, PHYMODE_SGMII);
-			else
-				xlp_ax_nae_lane_reset_txpll(nae_base, 4,
-				    lane_ctrl, PHYMODE_SGMII);
-		}
-	}
-
-	for (block = 0; block < 4; block++) {
-		if ((cplx_mask & (1 << block)) == 0)
-			continue;
-
-		for (lane_ctrl = PHY_LANE_0_CTRL;
-		    lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) {
-			if (!nlm_is_xlp8xx_ax())
-				xlp_nae_lane_reset_txpll(nae_base,
-				    block, lane_ctrl, PHYMODE_SGMII);
-			else
-				xlp_ax_nae_lane_reset_txpll(nae_base, block,
-				    lane_ctrl, PHYMODE_SGMII);
-		}
-	}
-}
-
-void
-config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
-    int num_ctxts, int max_ctxts, struct nae_port_config *cfg)
-{
-	static uint32_t cur_start[6] = {0, 0, 0, 0, 0, 0};
-	uint32_t data = 0;
-	uint32_t start = 0, size, offset;
-	int i, limit;
-
-	limit = start_ctxt + num_ctxts;
-	/* Stage 2 FIFO */
-	start = cur_start[0];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].stg2_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size;
-		if (offset > cfg[hwport].max_stg2_offset)
-			offset = cfg[hwport].max_stg2_offset;
-		data = offset << 23  |
-		    start << 11 |
-		    i << 1      |
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_STG2_PMEM_PROG, data);
-		start += size;
-	}
-	cur_start[0] = start;
-
-	/* EH FIFO */
-	start  = cur_start[1];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].eh_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size ;
-		if (offset > cfg[hwport].max_eh_offset)
-		    offset = cfg[hwport].max_eh_offset;
-		data = offset << 23  |
-		    start << 11 |
-		    i << 1      |
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_EH_PMEM_PROG, data);
-		start += size;
-	}
-	cur_start[1] = start;
-
-	/* FROUT FIFO */
-	start  = cur_start[2];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].frout_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size ;
-		if (offset > cfg[hwport].max_frout_offset)
-			offset = cfg[hwport].max_frout_offset;
-		data = offset << 23  |
-		    start << 11 |
-		    i << 1      |
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_FREE_PMEM_PROG, data);
-		start += size;
-	}
-	cur_start[2] = start;
-
-	/* MS FIFO */
-	start = cur_start[3];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].ms_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size ;
-		if (offset > cfg[hwport].max_ms_offset)
-			offset = cfg[hwport].max_ms_offset;
-		data = offset << 22  |	/* FIXME in PRM */
-		    start << 11 |
-		    i << 1      |
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_STR_PMEM_CMD, data);
-		start += size;
-	}
-	cur_start[3] = start;
-
-	/* PKT FIFO */
-	start  = cur_start[4];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].pkt_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size ;
-		if (offset > cfg[hwport].max_pmem_offset)
-			offset = cfg[hwport].max_pmem_offset;
-		nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD1, offset);
-
-		data = start << 11	|
-		    i << 1		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD0, data);
-		start += size;
-	}
-	cur_start[4] = start;
-
-	/* PKT LEN FIFO */
-	start  = cur_start[5];
-	for (i = start_ctxt; i < limit; i++) {
-		size = cfg[hwport].pktlen_fifo_size / max_ctxts;
-		if (size)
-			offset = size - 1;
-		else
-			offset = size ;
-		data = offset  << 22	|
-		    start << 11		|
-		    i << 1		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_TX_PKTLEN_PMEM_CMD, data);
-		start += size;
-	}
-	cur_start[5] = start;
-}
-
-void
-config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
-    int num_ctxts, int max_ctxts, struct nae_port_config *cfg)
-{
-	uint32_t data, credit, max_credit;
-	int i, limit;
-
-	limit = start_ctxt + num_ctxts;
-	/* Stage1 -> Stage2 */
-	max_credit = cfg[hwport].max_stg2_offset + 1;
-	for (i = start_ctxt; i < limit; i++) {
-		credit = cfg[hwport].stg1_2_credit / max_ctxts;
-		if (credit > max_credit)
-		    credit = max_credit;
-		data = credit << 16	|
-		    i << 4		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_STG1_STG2CRDT_CMD, data);
-	}
-
-	/* Stage2 -> EH */
-	max_credit = cfg[hwport].max_eh_offset + 1;
-	for (i = start_ctxt; i < limit; i++) {
-		credit = cfg[hwport].stg2_eh_credit / max_ctxts;
-		if (credit > max_credit)
-			credit = max_credit;
-		data = credit << 16	|
-		    i << 4		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_STG2_EHCRDT_CMD, data);
-	}
-
-	/* Stage2 -> Frout */
-	max_credit = cfg[hwport].max_frout_offset + 1;
-	for (i = start_ctxt; i < limit; i++) {
-		credit = cfg[hwport].stg2_frout_credit / max_ctxts;
-		if (credit > max_credit)
-			credit = max_credit;
-		data = credit << 16	|
-		    i << 4		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_EH_FREECRDT_CMD, data);
-	}
-
-	/* Stage2 -> MS */
-	max_credit = cfg[hwport].max_ms_offset + 1;
-	for (i = start_ctxt; i < limit; i++) {
-		credit = cfg[hwport].stg2_ms_credit / max_ctxts;
-		if (credit > max_credit)
-			credit = max_credit;
-		data = credit << 16	|
-		    i << 4		|
-		    1;
-		nlm_write_nae_reg(nae_base, NAE_STG2_STRCRDT_CMD, data);
-	}
-}
-
-void
-nlm_config_freein_fifo_uniq_cfg(uint64_t nae_base, int port,
-    int nblock_free_desc)
-{
-	uint32_t val;
-	int size_in_clines;
-
-	size_in_clines = (nblock_free_desc / NAE_CACHELINE_SIZE);
-	val = (size_in_clines << 8) | (port & 0x1f);
-	nlm_write_nae_reg(nae_base, NAE_FREEIN_FIFO_UNIQ_SZ_CFG, val);
-}
-
-/* XXXJC: redundant, see ucore_spray_config() */
-void
-nlm_config_ucore_iface_mask_cfg(uint64_t nae_base, int port,
-    int nblock_ucore_mask)
-{
-	uint32_t val;
-
-	val = ( 0x1U << 31) | ((nblock_ucore_mask & 0xffff) << 8) |
-	    (port & 0x1f);
-	nlm_write_nae_reg(nae_base, NAE_UCORE_IFACEMASK_CFG, val);
-}
-
-int
-nlm_nae_init_netior(uint64_t nae_base, int nblocks)
-{
-	uint32_t ctrl1, ctrl2, ctrl3;
-
-	if (nblocks == 5)
-		ctrl3 = 0x07 << 18;
-	else
-		ctrl3 = 0;
-
-	switch (nblocks) {
-	case 2:
-		ctrl1 = 0xff;
-		ctrl2 = 0x0707;
-		break;
-	case 4:
-	case 5:
-		ctrl1 = 0xfffff;
-		ctrl2 = 0x07070707;
-		break;
-	default:
-		printf("WARNING: unsupported blocks %d\n", nblocks);
-		return (-1);
-	}
-
-	nlm_write_nae_reg(nae_base, NAE_LANE_CFG_SOFTRESET, 0);
-	nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL3, ctrl3);
-	nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL2, ctrl2);
-	nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL1, ctrl1);
-	nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL1, 0x0);
-	return (0);
-}
-
-void
-nlm_nae_init_ingress(uint64_t nae_base, uint32_t desc_size)
-{
-	uint32_t rx_cfg;
-	uint32_t parser_threshold = 384;
-
-	rx_cfg = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
-	rx_cfg &= ~(0x3 << 1);		/* reset max message size */
-	rx_cfg &= ~(0xff << 4);		/* clear freein desc cluster size */
-	rx_cfg &= ~(0x3f << 24);	/* reset rx status mask */ /*XXX: why not 7f */
-
-	rx_cfg |= 1;			/* rx enable */
-	rx_cfg |= (0x0 << 1);		/* max message size */
-	rx_cfg |= (0x43 & 0x7f) << 24;	/* rx status mask */
-	rx_cfg |= ((desc_size / 64) & 0xff) << 4; /* freein desc cluster size */
-	nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, rx_cfg);
-	nlm_write_nae_reg(nae_base, NAE_PARSER_CONFIG,
-	    (parser_threshold & 0x3ff) |
-	    (((parser_threshold / desc_size) + 1) & 0xff) << 12 |
-	    (((parser_threshold / 64) % desc_size) & 0xff) << 20);
-
-	/*nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_THRESH, 33);*/
-}
-
-void
-nlm_nae_init_egress(uint64_t nae_base)
-{
-	uint32_t tx_cfg;
-
-	tx_cfg = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG);
-	if (!nlm_is_xlp8xx_ax()) {
-		nlm_write_nae_reg(nae_base, NAE_TX_CONFIG,
-		    tx_cfg	|
-		    0x1		|	/* tx enable */
-		    0x2		|	/* tx ace */
-		    0x4		|	/* tx compatible */
-		    (1 << 3));
-	} else {
-		nlm_write_nae_reg(nae_base, NAE_TX_CONFIG,
-		    tx_cfg	|
-		    0x1		|	/* tx enable */
-		    0x2);		/* tx ace */
-	}
-}
-
-uint32_t
-ucore_spray_config(uint32_t interface, uint32_t ucore_mask, int cmd)
-{
-	return ((cmd & 0x1) << 31) | ((ucore_mask & 0xffff) << 8) |
-	    (interface & 0x1f);
-}
-
-void
-nlm_nae_init_ucore(uint64_t nae_base, int if_num, u_int ucore_mask)
-{
-	uint32_t ucfg;
-
-	ucfg = ucore_spray_config(if_num, ucore_mask, 1); /* 1 : write */
-	nlm_write_nae_reg(nae_base, NAE_UCORE_IFACEMASK_CFG, ucfg);
-}
-
-uint64_t
-nae_tx_desc(u_int type, u_int rdex, u_int fbid, u_int len, uint64_t addr)
-{
-	return ((uint64_t)type  << 62) |
-		((uint64_t)rdex << 61) |
-		((uint64_t)fbid << 54) |
-		((uint64_t)len  << 40) | addr;
-}
-
-void
-nlm_setup_l2type(uint64_t nae_base, int hwport, uint32_t l2extlen,
-    uint32_t l2extoff, uint32_t extra_hdrsize, uint32_t proto_offset,
-    uint32_t fixed_hdroff, uint32_t l2proto)
-{
-	uint32_t val;
-
-	val = ((l2extlen & 0x3f) << 26)		|
-	    ((l2extoff & 0x3f) << 20)		|
-	    ((extra_hdrsize & 0x3f) << 14)	|
-	    ((proto_offset & 0x3f) << 8)	|
-	    ((fixed_hdroff & 0x3f) << 2)	|
-	    (l2proto & 0x3);
-	nlm_write_nae_reg(nae_base, (NAE_L2_TYPE_PORT0 + hwport), val);
-}
-
-void
-nlm_setup_l3ctable_mask(uint64_t nae_base, int hwport, uint32_t ptmask,
-    uint32_t l3portmask)
-{
-	uint32_t val;
-
-	val = ((ptmask & 0x1) << 6)	|
-	    ((l3portmask & 0x1) << 5)	|
-	    (hwport & 0x1f);
-	nlm_write_nae_reg(nae_base, NAE_L3_CTABLE_MASK0, val);
-}
-
-void
-nlm_setup_l3ctable_even(uint64_t nae_base, int entry, uint32_t l3hdroff,
-    uint32_t ipcsum_en, uint32_t l4protooff,
-    uint32_t l2proto, uint32_t eth_type)
-{
-	uint32_t val;
-
-	val = ((l3hdroff & 0x3f) << 26)	|
-	    ((l4protooff & 0x3f) << 20)	|
-	    ((ipcsum_en & 0x1) << 18)	|
-	    ((l2proto & 0x3) << 16)	|
-	    (eth_type & 0xffff);
-	nlm_write_nae_reg(nae_base, (NAE_L3CTABLE0 + (entry * 2)), val);
-}
-
-void
-nlm_setup_l3ctable_odd(uint64_t nae_base, int entry, uint32_t l3off0,
-    uint32_t l3len0, uint32_t l3off1, uint32_t l3len1,
-    uint32_t l3off2, uint32_t l3len2)
-{
-	uint32_t val;
-
-	val = ((l3off0 & 0x3f) << 26)	|
-	    ((l3len0 & 0x1f) << 21)	|
-	    ((l3off1 & 0x3f) << 15)	|
-	    ((l3len1 & 0x1f) << 10)	|
-	    ((l3off2 & 0x3f) << 4)	|
-	    (l3len2 & 0xf);
-	nlm_write_nae_reg(nae_base, (NAE_L3CTABLE0 + ((entry * 2) + 1)), val);
-}
-
-void
-nlm_setup_l4ctable_even(uint64_t nae_base, int entry, uint32_t im,
-    uint32_t l3cm, uint32_t l4pm, uint32_t port,
-    uint32_t l3camaddr, uint32_t l4proto)
-{
-	uint32_t val;
-
-	val = ((im & 0x1) << 19)	|
-	    ((l3cm & 0x1) << 18)	|
-	    ((l4pm & 0x1) << 17)	|
-	    ((port & 0x1f) << 12)	|
-	    ((l3camaddr & 0xf) << 8)	|
-	    (l4proto & 0xff);
-	nlm_write_nae_reg(nae_base, (NAE_L4CTABLE0 + (entry * 2)), val);
-}
-
-void
-nlm_setup_l4ctable_odd(uint64_t nae_base, int entry, uint32_t l4off0,
-    uint32_t l4len0, uint32_t l4off1, uint32_t l4len1)
-{
-	uint32_t val;
-
-	val = ((l4off0 & 0x3f) << 21)	|
-	    ((l4len0 & 0xf) << 17)	|
-	    ((l4off1 & 0x3f) << 11)	|
-	    (l4len1 & 0xf);
-	nlm_write_nae_reg(nae_base, (NAE_L4CTABLE0 + ((entry * 2) + 1)), val);
-}
-
-void
-nlm_enable_hardware_parser(uint64_t nae_base)
-{
-	uint32_t val;
-
-	val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
-	val |= (1 << 12); /* hardware parser enable */
-	nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
-
-	/***********************************************
-	 * program L3 CAM table
-	 ***********************************************/
-
-	/*
-	 *  entry-0 is ipv4 MPLS type 1 label
-	 */
-	 /* l3hdroff = 4 bytes, ether_type = 0x8847 for MPLS_type1 */
-	nlm_setup_l3ctable_even(nae_base, 0, 4, 1, 9, 1, 0x8847);
-	/* l3off0 (8 bytes) -> l3len0 (1 byte) := ip proto
-	 * l3off1 (12 bytes) -> l3len1 (4 bytes) := src ip
-	 * l3off2 (16 bytes) -> l3len2 (4 bytes) := dst ip
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 0, 9, 1, 12, 4, 16, 4);
-
-	/*
-	 * entry-1 is for ethernet IPv4 packets
-	 */
-	nlm_setup_l3ctable_even(nae_base, 1, 0, 1, 9, 1, 0x0800);
-	/* l3off0 (8 bytes) -> l3len0 (1 byte) := ip proto
-	 * l3off1 (12 bytes) -> l3len1 (4 bytes) := src ip
-	 * l3off2 (16 bytes) -> l3len2 (4 bytes) := dst ip
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 1, 9, 1, 12, 4, 16, 4);
-
-	/*
-	 * entry-2 is for ethernet IPv6 packets
-	 */
-	nlm_setup_l3ctable_even(nae_base, 2, 0, 1, 6, 1, 0x86dd);
-	/* l3off0 (6 bytes) -> l3len0 (1 byte) := next header (ip proto)
-	 * l3off1 (8 bytes) -> l3len1 (16 bytes) := src ip
-	 * l3off2 (24 bytes) -> l3len2 (16 bytes) := dst ip
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 2, 6, 1, 8, 16, 24, 16);
-
-	/*
-	 * entry-3 is for ethernet ARP packets
-	 */
-	nlm_setup_l3ctable_even(nae_base, 3, 0, 0, 9, 1, 0x0806);
-	/* extract 30 bytes from packet start */
-	nlm_setup_l3ctable_odd(nae_base, 3, 0, 30, 0, 0, 0, 0);
-
-	/*
-	 * entry-4 is for ethernet FCoE packets
-	 */
-	nlm_setup_l3ctable_even(nae_base, 4, 0, 0, 9, 1, 0x8906);
-	/* FCoE packet consists of 4 byte start-of-frame,
-	 * and 24 bytes of frame header, followed by
-	 * 64 bytes of optional-header (ESP, network..),
-	 * 2048 bytes of payload, 36 bytes of optional
-	 * "fill bytes" or ESP trailer, 4 bytes of CRC,
-	 * and 4 bytes of end-of-frame
-	 * We extract the first 4 + 24 = 28 bytes
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 4, 0, 28, 0, 0, 0, 0);
-
-	/*
-	 * entry-5 is for vlan tagged frames (0x8100)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 5, 0, 0, 9, 1, 0x8100);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 5, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-6 is for ieee 802.1ad provider bridging
-	 * tagged frames (0x88a8)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 6, 0, 0, 9, 1, 0x88a8);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 6, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-7 is for Cisco's Q-in-Q tagged frames (0x9100)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 7, 0, 0, 9, 1, 0x9100);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 7, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-8 is for Ethernet Jumbo frames (0x8870)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 8, 0, 0, 9, 1, 0x8870);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 8, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-9 is for MPLS Multicast frames (0x8848)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 9, 0, 0, 9, 1, 0x8848);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 9, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-10 is for IEEE 802.1ae MAC Security frames (0x88e5)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 10, 0, 0, 9, 1, 0x88e5);
-	/* we extract 31 bytes from the payload */
-	nlm_setup_l3ctable_odd(nae_base, 10, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-11 is for PTP frames (0x88f7)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 11, 0, 0, 9, 1, 0x88f7);
-	/* PTP messages can be sent as UDP messages over
-	 * IPv4 or IPv6; and as a raw ethernet message
-	 * with ethertype 0x88f7. The message contents
-	 * are the same for UDP or ethernet based encapsulations
-	 * The header is 34 bytes long, and we extract
-	 * it all out.
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 11, 0, 31, 31, 2, 0, 0);
-
-	/*
-	 * entry-12 is for ethernet Link Control Protocol (LCP)
-	 * used with PPPoE
-	 */
-	nlm_setup_l3ctable_even(nae_base, 12, 0, 0, 9, 1, 0xc021);
-	/* LCP packet consists of 1 byte of code, 1 byte of
-	 * identifier and two bytes of length followed by
-	 * data (upto length bytes).
-	 * We extract 4 bytes from start of packet
-	 */
-	nlm_setup_l3ctable_odd(nae_base, 12, 0, 4, 0, 0, 0, 0);
-
-	/*
-	 * entry-13 is for ethernet Link Quality Report (0xc025)
-	 * used with PPPoE
-	 */
-	nlm_setup_l3ctable_even(nae_base, 13, 0, 0, 9, 1, 0xc025);
-	/* We extract 31 bytes from packet start */
-	nlm_setup_l3ctable_odd(nae_base, 13, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-14 is for PPPoE Session (0x8864)
-	 */
-	nlm_setup_l3ctable_even(nae_base, 14, 0, 0, 9, 1, 0x8864);
-	/* We extract 31 bytes from packet start */
-	nlm_setup_l3ctable_odd(nae_base, 14, 0, 31, 0, 0, 0, 0);
-
-	/*
-	 * entry-15 - default entry
-	 */
-	nlm_setup_l3ctable_even(nae_base, 15, 0, 0, 0, 0, 0x0000);
-	/* We extract 31 bytes from packet start */
-	nlm_setup_l3ctable_odd(nae_base, 15, 0, 31, 0, 0, 0, 0);
-
-	/***********************************************
-	 * program L4 CAM table
-	 ***********************************************/
-
-	/*
-	 * entry-0 - tcp packets (0x6)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 0, 0, 0, 1, 0, 0, 0x6);
-	/* tcp header is 20 bytes without tcp options
-	 * We extract 20 bytes from tcp start */
-	nlm_setup_l4ctable_odd(nae_base, 0, 0, 15, 15, 5);
-
-	/*
-	 * entry-1 - udp packets (0x11)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 1, 0, 0, 1, 0, 0, 0x11);
-	/* udp header is 8 bytes in size.
-	 * We extract 8 bytes from udp start */
-	nlm_setup_l4ctable_odd(nae_base, 1, 0, 8, 0, 0);
-
-	/*
-	 * entry-2 - sctp packets (0x84)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 2, 0, 0, 1, 0, 0, 0x84);
-	/* sctp packets have a 12 byte generic header
-	 * and various chunks.
-	 * We extract 12 bytes from sctp start */
-	nlm_setup_l4ctable_odd(nae_base, 2, 0, 12, 0, 0);
-
-	/*
-	 * entry-3 - RDP packets (0x1b)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 3, 0, 0, 1, 0, 0, 0x1b);
-	/* RDP packets have 18 bytes of generic header
-	 * before variable header starts.
-	 * We extract 18 bytes from rdp start */
-	nlm_setup_l4ctable_odd(nae_base, 3, 0, 15, 15, 3);
-
-	/*
-	 * entry-4 - DCCP packets (0x21)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 4, 0, 0, 1, 0, 0, 0x21);
-	/* DCCP has two types of generic headers of
-	 * sizes 16 bytes and 12 bytes if X = 1.
-	 * We extract 16 bytes from dccp start */
-	nlm_setup_l4ctable_odd(nae_base, 4, 0, 15, 15, 1);
-
-	/*
-	 * entry-5 - ipv6 encapsulated in ipv4 packets (0x29)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 5, 0, 0, 1, 0, 0, 0x29);
-	/* ipv4 header is 20 bytes excluding IP options.
-	 * We extract 20 bytes from IPv4 start */
-	nlm_setup_l4ctable_odd(nae_base, 5, 0, 15, 15, 5);
-
-	/*
-	 * entry-6 - ip in ip encapsulation packets (0x04)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 6, 0, 0, 1, 0, 0, 0x04);
-	/* ipv4 header is 20 bytes excluding IP options.
-	 * We extract 20 bytes from ipv4 start */
-	nlm_setup_l4ctable_odd(nae_base, 6, 0, 15, 15, 5);
-
-	/*
-	 * entry-7 - default entry (0x0)
-	 */
-	nlm_setup_l4ctable_even(nae_base, 7, 0, 0, 1, 0, 0, 0x0);
-	/* We extract 20 bytes from packet start */
-	nlm_setup_l4ctable_odd(nae_base, 7, 0, 15, 15, 5);
-}
-
-void
-nlm_enable_hardware_parser_per_port(uint64_t nae_base, int block, int port)
-{
-	int hwport = (block * 4) + (port & 0x3);
-
-	/* program L2 and L3 header extraction for each port */
-	/* enable ethernet L2 mode on port */
-	nlm_setup_l2type(nae_base, hwport, 0, 0, 0, 0, 0, 1);
-
-	/* l2proto and ethtype included in l3cam */
-	nlm_setup_l3ctable_mask(nae_base, hwport, 1, 0);
-}
-
-void
-nlm_prepad_enable(uint64_t nae_base, int size)
-{
-	uint32_t val;
-
-	val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
-	val |= (1 << 13); /* prepad enable */
-	val |= ((size & 0x3) << 22); /* prepad size */
-	nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
-}
-
-void
-nlm_setup_1588_timer(uint64_t nae_base, struct nae_port_config *cfg)
-{
-	uint32_t hi, lo, val;
-
-	hi = cfg[0].ieee1588_userval >> 32;
-	lo = cfg[0].ieee1588_userval & 0xffffffff;
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_USER_VALUE_HI, hi);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_USER_VALUE_LO, lo);
-
-	hi = cfg[0].ieee1588_ptpoff >> 32;
-	lo = cfg[0].ieee1588_ptpoff & 0xffffffff;
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_OFFSET_HI, hi);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_OFFSET_LO, lo);
-
-	hi = cfg[0].ieee1588_tmr1 >> 32;
-	lo = cfg[0].ieee1588_tmr1 & 0xffffffff;
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR1_HI, hi);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR1_LO, lo);
-
-	hi = cfg[0].ieee1588_tmr2 >> 32;
-	lo = cfg[0].ieee1588_tmr2 & 0xffffffff;
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR2_HI, hi);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR2_LO, lo);
-
-	hi = cfg[0].ieee1588_tmr3 >> 32;
-	lo = cfg[0].ieee1588_tmr3 & 0xffffffff;
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR3_HI, hi);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR3_LO, lo);
-
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_INTG,
-	    cfg[0].ieee1588_inc_intg);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_NUM,
-	    cfg[0].ieee1588_inc_num);
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_DEN,
-	    cfg[0].ieee1588_inc_den);
-
-	val = nlm_read_nae_reg(nae_base, NAE_1588_PTP_CONTROL);
-	/* set and clear freq_mul = 1 */
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val | (0x1 << 1));
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val);
-	/* set and clear load_user_val = 1 */
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val | (0x1 << 6));
-	nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val);
-}
-
-void
-nlm_mac_enable(uint64_t nae_base, int nblock, int port_type, int port)
-{
-	uint32_t mac_cfg1, xaui_cfg;
-	uint32_t netwk_inf;
-	int iface = port & 0x3;
-
-	switch(port_type) {
-	case SGMIIC:
-		netwk_inf = nlm_read_nae_reg(nae_base,
-		    SGMII_NET_IFACE_CTRL(nblock, iface));
-		nlm_write_nae_reg(nae_base,
-		    SGMII_NET_IFACE_CTRL(nblock, iface),
-		    netwk_inf		|
-		    (1 << 2));			/* enable tx */
-		mac_cfg1 = nlm_read_nae_reg(nae_base,
-		    SGMII_MAC_CONF1(nblock, iface));
-		nlm_write_nae_reg(nae_base,
-		    SGMII_MAC_CONF1(nblock, iface),
-		    mac_cfg1		|
-		    (1 << 2)		|	/* rx enable */
-		    1);				/* tx enable */
-		break;
-	case XAUIC:
-		xaui_cfg = nlm_read_nae_reg(nae_base,
-		    XAUI_CONFIG1(nblock));
-		nlm_write_nae_reg(nae_base,
-		    XAUI_CONFIG1(nblock),
-		    xaui_cfg		|
-		    XAUI_CONFIG_TFEN	|
-		    XAUI_CONFIG_RFEN);
-		break;
-	case ILC:
-		break;
-	}
-}
-
-void
-nlm_mac_disable(uint64_t nae_base, int nblock, int port_type, int port)
-{
-	uint32_t mac_cfg1, xaui_cfg;
-	uint32_t netwk_inf;
-	int iface = port & 0x3;
-
-	switch(port_type) {
-	case SGMIIC:
-		mac_cfg1 = nlm_read_nae_reg(nae_base,
-		    SGMII_MAC_CONF1(nblock, iface));
-		nlm_write_nae_reg(nae_base,
-		    SGMII_MAC_CONF1(nblock, iface),
-		    mac_cfg1		&
-		    ~((1 << 2)		|	/* rx enable */
-		    1));			/* tx enable */
-		netwk_inf = nlm_read_nae_reg(nae_base,
-		    SGMII_NET_IFACE_CTRL(nblock, iface));
-		nlm_write_nae_reg(nae_base,
-		    SGMII_NET_IFACE_CTRL(nblock, iface),
-		    netwk_inf		&
-		    ~(1 << 2));			/* enable tx */
-		break;
-	case XAUIC:
-		xaui_cfg = nlm_read_nae_reg(nae_base,
-		    XAUI_CONFIG1(nblock));
-		nlm_write_nae_reg(nae_base,
-		    XAUI_CONFIG1(nblock),
-		    xaui_cfg		&
-		    ~(XAUI_CONFIG_TFEN	|
-		    XAUI_CONFIG_RFEN));
-		break;
-	case ILC:
-		break;
-	}
-}
-
-/*
- * Set IOR credits for the ports in ifmask to valmask
- */
-static void
-nlm_nae_set_ior_credit(uint64_t nae_base, uint32_t ifmask, uint32_t valmask)
-{
-	uint32_t tx_config, tx_ior_credit;
-
-	tx_ior_credit = nlm_read_nae_reg(nae_base, NAE_TX_IORCRDT_INIT);
-	tx_ior_credit &= ~ifmask;
-	tx_ior_credit |= valmask;
-	nlm_write_nae_reg(nae_base, NAE_TX_IORCRDT_INIT, tx_ior_credit);
-
-	tx_config = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG);
-	/* need to toggle these bits for credits to be loaded */
-	nlm_write_nae_reg(nae_base, NAE_TX_CONFIG,
-	    tx_config | (TXINITIORCR(ifmask)));
-	nlm_write_nae_reg(nae_base, NAE_TX_CONFIG,
-	    tx_config & ~(TXINITIORCR(ifmask)));
-}
-
-int
-nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type,
-    int port, uint32_t desc_size)
-{
-	uint32_t netwk_inf;
-	uint32_t mac_cfg1, netior_ctrl3;
-	int iface, iface_ctrl_reg, iface_ctrl3_reg, conf1_reg, conf2_reg;
-
-	switch (port_type) {
-	case XAUIC:
-		netwk_inf = nlm_read_nae_reg(nae_base,
-		    XAUI_NETIOR_XGMAC_CTRL1(nblock));
-		netwk_inf |= (1 << NETIOR_XGMAC_STATS_CLR_POS);
-		nlm_write_nae_reg(nae_base,
-		    XAUI_NETIOR_XGMAC_CTRL1(nblock), netwk_inf);
-
-		nlm_nae_set_ior_credit(nae_base, 0xf << port, 0xf << port);
-		break;
-
-	case ILC:
-		nlm_nae_set_ior_credit(nae_base, 0xff << port, 0xff << port);
-		break;
-
-	case SGMIIC:
-		nlm_nae_set_ior_credit(nae_base, 0x1 << port, 0);
-
-		/*
-		 * XXXJC: split this and merge to sgmii.c
-		 * some of this is duplicated from there.
-		 */
-		/* init phy id to access internal PCS */
-		iface = port & 0x3;
-		iface_ctrl_reg = SGMII_NET_IFACE_CTRL(nblock, iface);
-		conf1_reg = SGMII_MAC_CONF1(nblock, iface);
-		conf2_reg = SGMII_MAC_CONF2(nblock, iface);
-
-		netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg);
-		netwk_inf &= 0x7ffffff;
-		netwk_inf |= (port << 27);
-		nlm_write_nae_reg(nae_base, iface_ctrl_reg, netwk_inf);
-
-		/* Sofreset sgmii port - set bit 11 to 0  */
-		netwk_inf &= 0xfffff7ff;
-		nlm_write_nae_reg(nae_base, iface_ctrl_reg, netwk_inf);
-
-		/* Reset Gmac */
-		mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
-		nlm_write_nae_reg(nae_base, conf1_reg,
-		    mac_cfg1	|
-		    (1U << 31)	|	/* soft reset */
-		    (1 << 2)	|	/* rx enable */
-		    (1));		/* tx enable */
-
-		/* default to 1G */
-		nlm_write_nae_reg(nae_base,
-		    conf2_reg,
-		    (0x7 << 12)	|	/* interface preamble length */
-		    (0x2 << 8)	|	/* interface mode */
-		    (0x1 << 2)	|	/* pad crc enable */
-		    (0x1));		/* full duplex */
-
-		/* clear gmac reset */
-		mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
-		nlm_write_nae_reg(nae_base, conf1_reg, mac_cfg1 & ~(1U << 31));
-
-		/* clear speed debug bit */
-		iface_ctrl3_reg = SGMII_NET_IFACE_CTRL3(nblock, iface);
-		netior_ctrl3 = nlm_read_nae_reg(nae_base, iface_ctrl3_reg);
-		nlm_write_nae_reg(nae_base, iface_ctrl3_reg,
-		    netior_ctrl3 & ~(1 << 6));
-
-		/* disable TX, RX for now */
-		mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
-		nlm_write_nae_reg(nae_base, conf1_reg, mac_cfg1 & ~(0x5));
-		netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg);
-		nlm_write_nae_reg(nae_base, iface_ctrl_reg,
-		    netwk_inf & ~(0x1 << 2));
-
-		/* clear stats counters */
-		netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg);
-		nlm_write_nae_reg(nae_base, iface_ctrl_reg,
-		    netwk_inf | (1 << 15));
-
-		/* enable stats counters */
-		netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg);
-		nlm_write_nae_reg(nae_base, iface_ctrl_reg,
-		    (netwk_inf & ~(1 << 15)) | (1 << 16));
-
-		/* flow control? */
-		mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
-		nlm_write_nae_reg(nae_base, conf1_reg,
-		    mac_cfg1 | (0x3 << 4));
-		break;
-	}
-
-	nlm_nae_init_ingress(nae_base, desc_size);
-	nlm_nae_init_egress(nae_base);
-
-	return (0);
-}
diff --git a/sys/mips/nlm/dev/net/sgmii.c b/sys/mips/nlm/dev/net/sgmii.c
deleted file mode 100644
index 8c51ddf08fe9..000000000000
--- a/sys/mips/nlm/dev/net/sgmii.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/mdio.h>
-#include <mips/nlm/hal/sgmii.h>
-
-void
-nlm_configure_sgmii_interface(uint64_t nae_base, int block, int port,
-    int mtu, int loopback)
-{
-	uint32_t data1, data2;
-
-	/* Apply a soft reset */
-	data1 = (0x1 << 31); /* soft reset */
-	if (loopback)
-		data1 |= (0x01 << 8);
-	data1 |= (0x01 << 2); /* Rx enable */
-	data1 |= 0x01; /* Tx enable */
-	nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1);
-
-	data2 = (0x7 << 12) | /* pre-amble length=7 */
-	    (0x2 << 8) | /* byteMode */
-	    0x1;         /* fullDuplex */
-	nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF2), data2);
-
-	/* Remove a soft reset */
-	data1 &= ~(0x01 << 31);
-	nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1);
-
-	/* setup sgmii max frame length */
-	nlm_write_nae_reg(nae_base, SGMII_MAX_FRAME(block, port), mtu);
-}
-
-void
-nlm_sgmii_pcs_init(uint64_t nae_base, uint32_t cplx_mask)
-{
-	xlp_nae_config_lane_gmac(nae_base, cplx_mask);
-}
-
-void
-nlm_nae_setup_mac(uint64_t nae_base, int nblock, int iface, int reset,
-    int rx_en, int tx_en, int speed, int duplex)
-{
-	uint32_t mac_cfg1, mac_cfg2, netwk_inf;
-
-	mac_cfg1 = nlm_read_nae_reg(nae_base,
-	    SGMII_MAC_CONF1(nblock,iface));
-	mac_cfg2 = nlm_read_nae_reg(nae_base,
-	    SGMII_MAC_CONF2(nblock,iface));
-	netwk_inf = nlm_read_nae_reg(nae_base,
-	    SGMII_NET_IFACE_CTRL(nblock, iface));
-
-	mac_cfg1 &= ~(0x1 << 31); /* remove reset */
-	mac_cfg1 &= ~(0x1 << 2); /* remove rx */
-	mac_cfg1 &= ~(0x1); /* remove tx */
-	mac_cfg2 &= ~(0x3 << 8); /* remove interface mode bits */
-	mac_cfg2 &= ~(0x1); /* remove duplex */
-	netwk_inf &= ~(0x1 << 2); /* remove tx */
-	netwk_inf &= ~(0x3); /* remove speed */
-
-	switch (speed) {
-	case NLM_SGMII_SPEED_10:
-		netwk_inf |= 0x0; /* 2.5 Mhz clock for 10 Mbps */
-		mac_cfg2  |= (0x1 << 8); /* enable 10/100 Mbps */
-		break;
-	case NLM_SGMII_SPEED_100:
-		netwk_inf |= 0x1; /* 25 Mhz clock for 100 Mbps */
-		mac_cfg2  |= (0x1 << 8); /* enable 10/100 Mbps */
-		break;
-	default: /* make it as 1G */
-		netwk_inf |= 0x2; /* 125 Mhz clock for 1G */
-		mac_cfg2  |= (0x2 << 8); /* enable 1G */
-		break;
-	}
-
-	if (reset)
-		mac_cfg1 |= (0x1 << 31); /* set reset */
-
-	if (rx_en)
-		mac_cfg1 |= (0x1 << 2); /* set rx */
-
-        nlm_write_nae_reg(nae_base,
-	    SGMII_NET_IFACE_CTRL(nblock, iface),
-	    netwk_inf);
-
-	if (tx_en) {
-		mac_cfg1 |= 0x1; /* set tx */
-		netwk_inf |= (0x1 << 2); /* set tx */
-	}
-
-	switch (duplex) {
-	case NLM_SGMII_DUPLEX_HALF:
-		/* duplexity is already set to half duplex */
-		break;
-	default:
-		mac_cfg2 |= 0x1; /* set full duplex */
-	}
-
-	nlm_write_nae_reg(nae_base, SGMII_MAC_CONF1(nblock, iface), mac_cfg1);
-	nlm_write_nae_reg(nae_base, SGMII_MAC_CONF2(nblock, iface), mac_cfg2);
-	nlm_write_nae_reg(nae_base, SGMII_NET_IFACE_CTRL(nblock, iface),
-	    netwk_inf);
-}
-
-void
-nlm_nae_setup_rx_mode_sgmii(uint64_t base, int nblock, int iface, int port_type,
-    int broadcast_en, int multicast_en, int pause_en, int promisc_en)
-{
-	uint32_t val;
-
-	/* bit[17] of vlan_typefilter - allows packet matching in MAC.
-	 * When DA filtering is disabled, this bit and bit[16] should
-	 * be zero.
-	 * bit[16] of vlan_typefilter - Allows hash matching to be used
-	 * for DA filtering. When DA filtering is disabled, this bit and
-	 * bit[17] should be zero.
-	 * Both bits have to be set only if you want to turn on both
-	 * features / modes.
-	 */
-	if (promisc_en == 1) {
-		val = nlm_read_nae_reg(base,
-		    SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface));
-		val &= (~(0x3 << 16));
-		nlm_write_nae_reg(base,
-		    SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface), val);
-	} else {
-		val = nlm_read_nae_reg(base,
-		    SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface));
-		val |= (0x1 << 17);
-		nlm_write_nae_reg(base,
-		    SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface), val);
-	}
-
-	val = ((broadcast_en & 0x1) << 10)  |
-	    ((pause_en & 0x1) << 9)     |
-	    ((multicast_en & 0x1) << 8) |
-	    ((promisc_en & 0x1) << 7)   | /* unicast_enable - enables promisc mode */
-	    1; /* MAC address is always valid */
-
-	nlm_write_nae_reg(base, SGMII_MAC_FILTER_CONFIG(nblock, iface), val);
-
-}
-
-void
-nlm_nae_setup_mac_addr_sgmii(uint64_t base, int nblock, int iface,
-    int port_type, uint8_t *mac_addr)
-{
-	nlm_write_nae_reg(base,
-	    SGMII_MAC_ADDR0_LO(nblock, iface),
-	    (mac_addr[5] << 24) |
-	    (mac_addr[4] << 16) |
-	    (mac_addr[3] << 8)  |
-	    mac_addr[2]);
-
-	nlm_write_nae_reg(base,
-	    SGMII_MAC_ADDR0_HI(nblock, iface),
-	    (mac_addr[1] << 24) |
-	    (mac_addr[0] << 16));
-
-	nlm_write_nae_reg(base,
-	    SGMII_MAC_ADDR_MASK0_LO(nblock, iface),
-	    0xffffffff);
-	nlm_write_nae_reg(base,
-	    SGMII_MAC_ADDR_MASK0_HI(nblock, iface),
-	    0xffffffff);
-
-	nlm_nae_setup_rx_mode_sgmii(base, nblock, iface,
-	    SGMIIC,
-	    1, /* broadcast enabled */
-	    1, /* multicast enabled */
-	    0, /* do not accept pause frames */
-	    0 /* promisc mode disabled */
-	    );
-}
diff --git a/sys/mips/nlm/dev/net/ucore/crt0_basic.S b/sys/mips/nlm/dev/net/ucore/crt0_basic.S
deleted file mode 100644
index 25acbb7e28c4..000000000000
--- a/sys/mips/nlm/dev/net/ucore/crt0_basic.S
+++ /dev/null
@@ -1,66 +0,0 @@
-/*-
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-
-	.text
-	.align	2
-	.globl	_start
-	.ent	_start
-_start:
-	.set	noreorder
-	la	gp, _gp
-	.end	_start
-
-	.globl	__stack
-
-	.ent	zerobss
-zerobss:
-	la	v0, _fbss
-	la	v1, _end
-3:
-	sw	zero, 0(v0)
-	bltu	v0,v1,3b
-	addiu	v0,v0,4			# executed in delay slot
-	la	sp, __stack		# set stack pointer
-	.end	zerobss
-
-	.ent	init
-init:
-	addiu	a1,sp,32		# argv = sp + 32
-	addiu	a2,sp,40		# envp = sp + 40
-	sw	zero,(a1)		# argv[argc] = 0
-	sw	zero,(a2)		# envp[0] = 0
-	jal	main			# call the program start function
-	move	a0,zero			# set argc to 0
-1:	b	1b
-	nop
-	.end	init
-
diff --git a/sys/mips/nlm/dev/net/ucore/ld.ucore.S b/sys/mips/nlm/dev/net/ucore/ld.ucore.S
deleted file mode 100644
index 036f2283e1b3..000000000000
--- a/sys/mips/nlm/dev/net/ucore/ld.ucore.S
+++ /dev/null
@@ -1,162 +0,0 @@
-/*-
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-__DYNAMIC  =  0;
-
-SECTIONS
-{
-	. = 0x0;
-	_loadaddr = .	;
-
-	/* ----------------------------------------- */
-
-	.text : {
-		_ftext = . ;
-		PROVIDE (eprol = .);
-		_shim_reg = . ;
-		*(.text)
-		*(.text.*)
-		*(.gnu.linkonce.t*)
-		*(.mips16.fn.*)
-		*(.mips16.call.*)
-	}
-	.init : {
-		KEEP(*(.init))
-		*(.init)
-	}
-	.fini : {
-		*(.fini)
-	}
-	.rel.sdata : {
-		PROVIDE (__runtime_reloc_start = .);
-		*(.rel.sdata)
-		PROVIDE (__runtime_reloc_stop = .);
-	}
-	PROVIDE (etext = .);
-	.ctors    :
-	{
-		KEEP (*crtbegin.o(.ctors))
-		KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-		KEEP (*(SORT(.ctors.*)))
-		KEEP (*(.ctors))
-	}
-	.dtors    :
-	{
-		KEEP (*crtbegin.o(.dtors))
-		KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-		KEEP (*(SORT(.dtors.*)))
-		KEEP (*(.dtors))
-	}
-	. = .;
-	.rodata : {
-		*(.rdata)
-		*(.rodata)
-		*(.rodata.*)
-		*(.gnu.linkonce.r*)
-	}
-	. = . + (0x1000 - .) ;
-
-	/* ----------------------------------------- */
-
-	. = 0x8000 ;
-	magicstart = . ;
-	.magicregs : {
-		*(.magicregs)
-	}
-	magicend = . ;
-
-	/* ----------------------------------------- */
-
-	. = 0x18000 ;
-	shmemstart = . ;
-	.sharedmem : {
-		*(.sharedmem)
-	}
-	shmemend = . ;
-
-	/* ----------------------------------------- */
-
-	. = 0xFF800 ;
-	.data : {
-		*(.data)
-		*(.data.*)
-		*(.gnu.linkonce.d*)
-	}
-	. = ALIGN(8);
-	.lit8 : {
-		*(.lit8)
-	}
-	.lit4 : {
-		*(.lit4)
-	}
-	.sdata : {
-		*(.sdata)
-		*(.sdata.*)
-		*(.gnu.linkonce.s*)
-	}
-	. = ALIGN (8);
-	PROVIDE (edata  =  .);
-	_edata  =  .;
-	_fbss = .;
-	.sbss : {
-		*(.sbss)
-		*(.scommon)
-	}
-	.bss : {
-		_bss_start = . ;
-		*(.bss)
-		*(COMMON)
-	}
-	_bss_end = . ;
-	_end = .;
-
-	_gp = . ;
-	__global = _gp ;
-	. = ALIGN (8);
-
-	PROVIDE(__stackmarker = .) ;
-
-	. = 0xFFA00 ;
-
-	/* 32 + 4(argc) + 4(argv), aligned to 64 */
-	PROVIDE(__stack =  . - 64);
-
-	/* ----------------------------------------- */
-
-	. = 0xFFE00 ;
-	.pktbuf : {
-		*(.pktbuf)
-	}
-	. = . + (0x100000 - .) ;
-
-	PROVIDE(_endaddr = 0x0 + 0x100000);
-}
diff --git a/sys/mips/nlm/dev/net/ucore/ucore.h b/sys/mips/nlm/dev/net/ucore/ucore.h
deleted file mode 100644
index aa3512a2c12d..000000000000
--- a/sys/mips/nlm/dev/net/ucore/ucore.h
+++ /dev/null
@@ -1,353 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef __NLM_UCORE_H__
-#define	__NLM_UCORE_H__
-
-/* Microcode registers */
-#define	UCORE_OUTBUF_DONE	0x8000
-#define	UCORE_RX_PKT_RDY	0x8004
-#define	UCORE_RX_PKT_INFO	0x8008
-#define	UCORE_CAM0		0x800c
-#define	UCORE_CAM1		0x8010
-#define	UCORE_CAM2		0x8014
-#define	UCORE_CAM3		0x8018
-#define	UCORE_CAM_RESULT	0x801c
-#define	UCORE_CSUMINFO		0x8020
-#define	UCORE_CRCINFO		0x8024
-#define	UCORE_CRCPOS		0x8028
-#define	UCORE_FR_FIFOEMPTY	0x802c
-#define	UCORE_PKT_DISTR		0x8030
-
-#define	PACKET_MEMORY		0xFFE00
-#define	PACKET_DATA_OFFSET	64
-#define	SHARED_SCRATCH_MEM	0x18000
-
-/* Distribution mode */
-#define	VAL_PDM(x)		(((x) & 0x7) << 0)
-
-/* Dest distribution or distribution list */
-#define	VAL_DEST(x)		(((x) & 0x3ff) << 8)
-#define	VAL_PDL(x)		(((x) & 0xf) << 4)
-
-/*output buffer done*/
-#define	VAL_FSV(x)		(x << 19)
-#define	VAL_FFS(x)		(x << 14)
-
-#define	FWD_DEST_ONLY		1
-#define	FWD_ENQ_DIST_VEC	2
-#define	FWD_ENQ_DEST		3
-#define	FWD_DIST_VEC		4
-#define	FWD_ENQ_DIST_VEC_SER	6
-#define	FWD_ENQ_DEST_SER	7
-
-#define	USE_HASH_DST		(1 << 20)
-
-static __inline unsigned int
-nlm_read_ucore_reg(int reg)
-{
-	volatile unsigned int *addr = (volatile void *)reg;
-
-	return (*addr);
-}
-
-static __inline void
-nlm_write_ucore_reg(int reg, unsigned int val)
-{
-	volatile unsigned int *addr = (volatile void *)reg;
-
-	*addr = val;
-}
-
-#define	NLM_DEFINE_UCORE(name, reg)				\
-static __inline unsigned int					\
-nlm_read_ucore_##name(void)					\
-{								\
-	return nlm_read_ucore_reg(reg);				\
-}								\
-								\
-static __inline void						\
-nlm_write_ucore_##name(unsigned int v)				\
-{								\
-	nlm_write_ucore_reg(reg, v);				\
-} struct __hack
-
-NLM_DEFINE_UCORE(obufdone,		UCORE_OUTBUF_DONE);
-NLM_DEFINE_UCORE(rxpktrdy,		UCORE_RX_PKT_RDY);
-NLM_DEFINE_UCORE(rxpktinfo,		UCORE_RX_PKT_INFO);
-NLM_DEFINE_UCORE(cam0,			UCORE_CAM0);
-NLM_DEFINE_UCORE(cam1,			UCORE_CAM1);
-NLM_DEFINE_UCORE(cam2,			UCORE_CAM2);
-NLM_DEFINE_UCORE(cam3,			UCORE_CAM3);
-NLM_DEFINE_UCORE(camresult,		UCORE_CAM_RESULT);
-NLM_DEFINE_UCORE(csuminfo,		UCORE_CSUMINFO);
-NLM_DEFINE_UCORE(crcinfo,		UCORE_CRCINFO);
-NLM_DEFINE_UCORE(crcpos,		UCORE_CRCPOS);
-NLM_DEFINE_UCORE(freefifo_empty,	UCORE_FR_FIFOEMPTY);
-NLM_DEFINE_UCORE(pktdistr,		UCORE_PKT_DISTR);
-
-/*
- * l3cachelines - number of cache lines to allocate into l3
- * fsv - 0 : use interface-id for selecting the free fifo pool
- *       1 : use free fifo pool selected by FFS field
- * ffs - selects which free fifo pool to use to take a free fifo
- * prepad_en - If this field is set to 1, part or all of the
- *             64 byte prepad seen by micro engines, is written
- *             infront of every packet.
- * prepad_ovride - If this field is 1, the ucore system uses
- *                 prepad configuration defined in this register,
- *                 0 means that it uses the configuration defined
- *                 in NAE RX_CONFIG register
- * prepad_size - number of 16 byte words in the 64-byte prepad
- *               seen by micro engines and dma'ed to memory as
- *               pkt prepad. This field is meaningful only if
- *               prepad_en and prepad_ovride is set.
- *               0 : 1 word
- *               1 : 2 words
- *               2 : 3 words
- *               3 : 4 words
- * prepad[0-3]: writing 0 to this means that the 1st 16 byte offset
- *              of prepad in micro engine, gets setup as prepad0/1/2/3.
- *              prepad word.
- *              1 : means 2nd 16 byte chunk in prepad0/1/2/3
- *              2 : means 3rd 16 byte chunk in prepad0/1/2/3
- *              3 : means 4rth 16 byte chunk in prepad0/1/2/3
- * pkt_discard - packet will be discarded if this is set to 1
- * rd5 - value (single bit) to be inserted in bit 5, the unclassified
- *       pkt bit of receive descriptor. If this bit is set, HPRE bit
- *       should also be set in ucore_rxpktready register
- */
-static __inline__ void
-nlm_ucore_pkt_done(int l3cachelines, int fsv, int ffs, int prepad_en,
-    int prepad_ovride, int prepad_size, int prepad0, int prepad1,
-    int prepad2, int prepad3, int pkt_discard, int rd5)
-{
-	unsigned int val = 0;
-
-	val |= ((l3cachelines & 0xfff) << 20);
-	val |= ((fsv & 0x1) << 19);
-	val |= ((ffs & 0x1f) << 14);
-	val |= ((prepad_en & 0x1) << 3);
-	val |= ((prepad_ovride & 0x1) << 2);
-	val |= ((prepad_size & 0x3) << 12);
-	val |= ((prepad0 & 0x3) << 4);
-	val |= ((prepad1 & 0x3) << 6);
-	val |= ((prepad2 & 0x3) << 8);
-	val |= ((prepad3 & 0x3) << 10);
-	val |= ((pkt_discard & 0x1) << 1);
-	val |= ((rd5 & 0x1) << 0);
-
-	nlm_write_ucore_obufdone(val);
-}
-
-/* Get the class full vector field from POE.
- * The POE maintains a threshold for each class.
- * A bit in this field will be set corresponding to the class approaching
- * class full status.
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_poeclassfullvec(unsigned int pktrdy)
-{
-	return ((pktrdy >> 24) & 0xff);
-}
-
-/* This function returns 1 if the hardware parser extraction process
- * resulted in an error. Else, returns 0.
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_hwparsererr(unsigned int pktrdy)
-{
-	return ((pktrdy >> 23) & 0x1);
-}
-
-/* This function returns the context number assigned to incoming
- * packet
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_context(unsigned int pktrdy)
-{
-	return ((pktrdy >> 13) & 0x3ff);
-}
-
-/* this function returns the channel number of incoming packet,
- * and applies only to interlaken.
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_channel(unsigned int pktrdy)
-{
-	return ((pktrdy >> 5) & 0xff);
-}
-
-/* This function returns the interface number on which the pkt
- * was received
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_interface(unsigned int pktrdy)
-{
-	return (pktrdy & 0x1f);
-}
-
-/* This function returns 1 if end of packet (EOP) is set in
- * packet data.
- */
-static __inline__ int
-nlm_ucore_get_rxpkt_eop(unsigned int rxpkt_info)
-{
-	return ((rxpkt_info >> 9) & 0x1);
-}
-
-/* This function returns packet length of received pkt */
-static __inline__ int
-nlm_ucore_get_rxpktlen(unsigned int rxpkt_info)
-{
-	return (rxpkt_info & 0x1ff);
-}
-
-/* this function sets up the ucore TCAM keys. */
-static __inline__ void
-nlm_ucore_setup_camkey(unsigned int cam_key0, unsigned int cam_key1,
-    unsigned int cam_key2, unsigned int cam_key3)
-{
-	nlm_write_ucore_cam0(cam_key0);
-	nlm_write_ucore_cam1(cam_key1);
-	nlm_write_ucore_cam2(cam_key2);
-	nlm_write_ucore_cam3(cam_key3);
-}
-
-/* This function checks if the cam result is valid or not.
- * If valid, it returns the result, else it returns 0.
- */
-static __inline__ int
-nlm_ucore_get_cam_result(unsigned int cam_result)
-{
-	if (((cam_result >> 15) & 0x1) == 1) /* valid result */
-	    return (cam_result & 0x3fff);
-
-	return 0;
-}
-
-/* This function sets up the csum in ucore.
- * iphdr_start - defines the start of ip header (to check - is this byte
- * position???)
- * iphdr_len - This field is auto filled by h/w parser if zero, else
- * the value defined will be used.
- */
-static __inline__ void
-nlm_ucore_csum_setup(int iphdr_start, int iphdr_len)
-{
-	unsigned int val = 0;
-
-	val |= ((iphdr_len & 0xff) << 8);
-	val |= (iphdr_len & 0xff);
-	nlm_write_ucore_csuminfo(val);
-}
-
-/* crcpos - position of crc in pkt. If crc position is within startcrc and
- * endcrc, zero out these bytes in the packet before computing crc. This
- * field is not needed for FCoE.
- * cps - If 1, uses the polynomial in RX_CRC_POLY1 of NAE register.
- *       if 0, uses the polynomial in RX_CRC_POLY0 of NAE register.
- * fcoe - If this is 1, crc calculation starts from 'startCRC' and the CRC
- * engine ends calculation before the last byte.
- * cbm - if 1, enables crc byte mirroring, where bits within a byte will get
- * reversed (mirrored) during calculation of crc.
- * cfi - If 1, performs a final inversion of crc before comarison is done during
- * pkt reception.
- * startcrc - This field is always required for both FCoE and SCTP crc.
- * endcrc - This information needs to be setup only for SCTP. For FCoE this
- * information is provided by hardware.
- * valid - if set to 1, CRC status is placed into bit 2 of rx descriptor
- *         if set to 0, TCP checksum status is placed into bit 2 of rx descriptor
- * keysize - defines the number of bytes in the pre-pad that contains the key
- */
-static __inline__ void
-nlm_ucore_crc_setup(int crcpos, int cps, int cfi, int cbm, int fcoe,
-    int keysize, int valid, int startcrc, int endcrc)
-{
-	unsigned int val = 0;
-
-	val |= ((cfi & 0x1) << 20);
-	val |= ((cbm & 0x1) << 19);
-	val |= ((fcoe & 0x1) << 18);
-	val |= ((cps & 0x1) << 16);
-	val |= (crcpos & 0xffff);
-
-	nlm_write_ucore_crcpos(val);
-
-	val = 0;
-	val |= ((keysize & 0x3f) << 25);
-	val |= ((valid & 0x1) << 24);
-	val |= ((endcrc & 0xffff) << 8);
-	val |= (startcrc & 0xff);
-
-	nlm_write_ucore_crcinfo(val);
-}
-
-/* This function returns a fifo empty vector, where each bit provides
- * the status of a fifo pool, where if the pool is empty the bit gets
- * set to 1.
- */
-static __inline__ int
-nlm_ucore_get_fifoempty(unsigned int fifoempty)
-{
-	return (fifoempty & 0xfffff);
-}
-
-/* This function controls how POE will distribute the packet.
- * pdm - is the packet distribution mode, where
- *       0x0 - means packet distribution mode is not used
- *       0x1 - means forwarding based on destination only (no enqueue)
- *       0x2 - means forwarding based on FID and distr vector (enqueue)
- *       0x3 - means forwarding based on dest and FID (enqueue)
- *       0x4 - means forwarding based on distr vec (no enqueue)
- *       0x6 - means forward based on FID (enqueue), distr vec and serial mode
- *       0x7 - means forward based on FID (enqueue), dest and serial mode
- * mc3 - If 1, then the 3 most significant bits of distribution list are taken
- * from context->class_table
- * pdl - poe distribution list
- * dest - fixed destination setup
- * hash - if 1, use hash based destination
- */
-static __inline__ void
-nlm_ucore_setup_poepktdistr(int pdm, int mc3, int pdl, int dest, int hash)
-{
-	unsigned int val = 0;
-
-	val |= ((hash & 0x1) << 20);
-	val |= ((dest & 0xfff) << 8);
-	val |= ((pdl & 0xf) << 4);
-	val |= ((mc3 & 0x1) << 3);
-	val |= (pdm & 0x7);
-
-	nlm_write_ucore_pktdistr(val);
-}
-
-#endif
diff --git a/sys/mips/nlm/dev/net/ucore/ucore_app.c b/sys/mips/nlm/dev/net/ucore/ucore_app.c
deleted file mode 100644
index 17e1e3e8b2c2..000000000000
--- a/sys/mips/nlm/dev/net/ucore/ucore_app.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include "ucore.h"
-
-int main(void)
-{
-	int num_cachelines = 1518 / 64 ; /* pktsize / L3 cacheline size */
-
-	/* Spray packets to using distribution vector */
-	while (1) {
-		(void)nlm_read_ucore_rxpktrdy();
-		nlm_ucore_setup_poepktdistr(FWD_DIST_VEC, 0, 0, 0, 0);
-		nlm_ucore_pkt_done(num_cachelines, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-		    0, 0);
-	}
-
-	return (0);
-}
diff --git a/sys/mips/nlm/dev/net/xaui.c b/sys/mips/nlm/dev/net/xaui.c
deleted file mode 100644
index ac51c4cd2f44..000000000000
--- a/sys/mips/nlm/dev/net/xaui.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/mdio.h>
-#include <mips/nlm/hal/sgmii.h>
-#include <mips/nlm/hal/xaui.h>
-
-#include <mips/nlm/xlp.h>
-void
-nlm_xaui_pcs_init(uint64_t nae_base, int xaui_cplx_mask)
-{
-	int block, lane_ctrl, reg;
-	int cplx_lane_enable;
-	int lane_enable = 0;
-	uint32_t regval;
-
-	cplx_lane_enable = LM_XAUI |
-	    (LM_XAUI << 4) |
-	    (LM_XAUI << 8) |
-	    (LM_XAUI << 12);
-
-	if (xaui_cplx_mask == 0)
-		return;
-
-	/* write 0x2 to enable SGMII for all lane */
-	block = 7;
-
-	if (xaui_cplx_mask & 0x3) { /* Complexes 0, 1 */
-		lane_enable = nlm_read_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1));
-		if (xaui_cplx_mask & 0x1) { /* Complex 0 */
-			lane_enable &= ~(0xFFFF);
-			lane_enable |= cplx_lane_enable;
-		}
-		if (xaui_cplx_mask & 0x2) { /* Complex 1 */
-			lane_enable &= ~(0xFFFF<<16);
-			lane_enable |= (cplx_lane_enable << 16);
-		}
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1),
-		    lane_enable);
-	}
-	lane_enable = 0;
-	if (xaui_cplx_mask & 0xc) { /* Complexes 2, 3 */
-		lane_enable = nlm_read_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3));
-		if (xaui_cplx_mask & 0x4) { /* Complex 2 */
-			lane_enable &= ~(0xFFFF);
-			lane_enable |= cplx_lane_enable;
-		}
-		if (xaui_cplx_mask & 0x8) { /* Complex 3 */
-			lane_enable &= ~(0xFFFF<<16);
-			lane_enable |= (cplx_lane_enable << 16);
-		}
-		nlm_write_nae_reg(nae_base,
-		    NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3),
-		    lane_enable);
-	}
-
-	/* Bring txpll out of reset */
-	for (block = 0; block < 4; block++) {
-		if ((xaui_cplx_mask & (1 << block)) == 0)
-			continue;
-
-		for (lane_ctrl = PHY_LANE_0_CTRL;
-		    lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) {
-			if (!nlm_is_xlp8xx_ax())
-				xlp_nae_lane_reset_txpll(nae_base,
-				    block, lane_ctrl, PHYMODE_XAUI);
-			else
-				xlp_ax_nae_lane_reset_txpll(nae_base, block,
-				    lane_ctrl, PHYMODE_XAUI);
-		}
-	}
-
-	/* Wait for Rx & TX clock stable */
-	for (block = 0; block < 4; block++) {
-		if ((xaui_cplx_mask & (1 << block)) == 0)
-			continue;
-
-		for (lane_ctrl = PHY_LANE_0_CTRL;
-		    lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) {
-			reg = NAE_REG(block, PHY, lane_ctrl - 4);
-			/* Wait for TX clock to be set */
-			do {
-				regval = nlm_read_nae_reg(nae_base, reg);
-			} while ((regval & LANE_TX_CLK) == 0);
-
-			/* Wait for RX clock to be set */
-			do {
-				regval = nlm_read_nae_reg(nae_base, reg);
-			} while ((regval & LANE_RX_CLK) == 0);
-
-			/* Wait for XAUI Lane fault to be cleared */
-			do {
-				regval = nlm_read_nae_reg(nae_base, reg);
-			} while ((regval & XAUI_LANE_FAULT) != 0);
-		}
-	}
-}
-
-void
-nlm_nae_setup_rx_mode_xaui(uint64_t base, int nblock, int iface, int port_type,
-    int broadcast_en, int multicast_en, int pause_en, int promisc_en)
-{
-	uint32_t val;
-
-	val = ((broadcast_en & 0x1) << 10)  |
-	    ((pause_en & 0x1) << 9)     |
-	    ((multicast_en & 0x1) << 8) |
-	    ((promisc_en & 0x1) << 7)   | /* unicast_enable - enables promisc mode */
-	    1; /* MAC address is always valid */
-
-	nlm_write_nae_reg(base, XAUI_MAC_FILTER_CFG(nblock), val);
-}
-
-void
-nlm_nae_setup_mac_addr_xaui(uint64_t base, int nblock, int iface,
-    int port_type, unsigned char *mac_addr)
-{
-	nlm_write_nae_reg(base,
-	    XAUI_MAC_ADDR0_LO(nblock),
-	    (mac_addr[5] << 24) |
-	    (mac_addr[4] << 16) |
-	    (mac_addr[3] << 8)  |
-	    mac_addr[2]);
-
-	nlm_write_nae_reg(base,
-	    XAUI_MAC_ADDR0_HI(nblock),
-	    (mac_addr[1] << 24) |
-	    (mac_addr[0] << 16));
-
-	nlm_write_nae_reg(base,
-	    XAUI_MAC_ADDR_MASK0_LO(nblock),
-	    0xffffffff);
-	nlm_write_nae_reg(base,
-	    XAUI_MAC_ADDR_MASK0_HI(nblock),
-	    0xffffffff);
-
-	nlm_nae_setup_rx_mode_xaui(base, nblock, iface,
-	    XAUIC,
-	    1, /* broadcast enabled */
-	    1, /* multicast enabled */
-	    0, /* do not accept pause frames */
-	    0 /* promisc mode disabled */
-	    );
-}
-
-void
-nlm_config_xaui_mtu(uint64_t nae_base, int nblock,
-    int max_tx_frame_sz, int max_rx_frame_sz)
-{
-	uint32_t tx_words = max_tx_frame_sz >> 2; /* max_tx_frame_sz / 4 */
-
-	/* write max frame length */
-	nlm_write_nae_reg(nae_base,
-	    XAUI_MAX_FRAME_LEN(nblock),
-	    ((tx_words & 0x3ff) << 16) | (max_rx_frame_sz & 0xffff));
-}
-
-void
-nlm_config_xaui(uint64_t nae_base, int nblock,
-    int max_tx_frame_sz, int max_rx_frame_sz, int vlan_pri_en)
-{
-	uint32_t val;
-
-	val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock));
-	val &= ~(0x1 << 11);	/* clear soft reset */
-	nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val);
-
-	val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock));
-	val &= ~(0x3 << 11);	/* clear soft reset and hard reset */
-	nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val);
-	nlm_write_nae_reg(nae_base, XAUI_CONFIG0(nblock), 0xffffffff);
-	nlm_write_nae_reg(nae_base, XAUI_CONFIG0(nblock), 0);
-
-	/* Enable tx/rx frame */
-	val = 0x000010A8;
-	val |= XAUI_CONFIG_LENCHK;
-	val |= XAUI_CONFIG_GENFCS;
-	val |= XAUI_CONFIG_PAD_64;
-	nlm_write_nae_reg(nae_base, XAUI_CONFIG1(nblock), val);
-
-	/* write max frame length */
-	nlm_config_xaui_mtu(nae_base, nblock, max_tx_frame_sz,
-	    max_rx_frame_sz);
-
-	/* set stats counter */
-	val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock));
-	val |= (0x1 << NETIOR_XGMAC_VLAN_DC_POS);
-	val |= (0x1 << NETIOR_XGMAC_STATS_EN_POS);
-	if (vlan_pri_en) {
-		val |= (0x1 << NETIOR_XGMAC_TX_PFC_EN_POS);
-		val |= (0x1 << NETIOR_XGMAC_RX_PFC_EN_POS);
-		val |= (0x1 << NETIOR_XGMAC_TX_PAUSE_POS);
-	} else {
-		val &= ~(0x1 << NETIOR_XGMAC_TX_PFC_EN_POS);
-		val |= (0x1 << NETIOR_XGMAC_TX_PAUSE_POS);
-	}
-	nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val);
-	/* configure on / off timer */
-	if (vlan_pri_en)
-		val = 0xF1230000; /* PFC mode, offtimer = 0xf123, ontimer = 0 */
-	else
-		val = 0x0000F123; /* link level FC mode, offtimer = 0xf123 */
-	nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL2(nblock), val);
-
-	/* set xaui tx threshold */
-	val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL3(nblock));
-	val &= ~(0x1f << 10);
-	val |= ~(15 << 10);
-	nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL3(nblock), val);
-}
diff --git a/sys/mips/nlm/dev/net/xlpge.c b/sys/mips/nlm/dev/net/xlpge.c
deleted file mode 100644
index 20fe16048212..000000000000
--- a/sys/mips/nlm/dev/net/xlpge.c
+++ /dev/null
@@ -1,1541 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/socket.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-#include <sys/taskqueue.h>
-
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/bpf.h>
-#include <net/if_types.h>
-#include <net/if_vlan_var.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/uma.h>
-
-#include <machine/cpu.h>
-#include <machine/mips_opcode.h>
-#include <machine/asm.h>
-#include <machine/cpuregs.h>
-
-#include <machine/intr_machdep.h>
-#include <machine/clock.h>	/* for DELAY */
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/cop2.h>
-#include <mips/nlm/hal/fmn.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/nae.h>
-#include <mips/nlm/hal/mdio.h>
-#include <mips/nlm/hal/sgmii.h>
-#include <mips/nlm/hal/xaui.h>
-#include <mips/nlm/hal/poe.h>
-#include <ucore_app_bin.h>
-#include <mips/nlm/hal/ucore_loader.h>
-#include <mips/nlm/xlp.h>
-#include <mips/nlm/board.h>
-#include <mips/nlm/msgring.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-#include "miidevs.h"
-#include <dev/mii/brgphyreg.h>
-#include "miibus_if.h"
-#include <sys/sysctl.h>
-
-#include <mips/nlm/dev/net/xlpge.h>
-
-/*#define XLP_DRIVER_LOOPBACK*/
-
-static struct nae_port_config nae_port_config[64];
-
-int poe_cl_tbl[MAX_POE_CLASSES] = {
-	0x0, 0x249249,
-	0x492492, 0x6db6db,
-	0x924924, 0xb6db6d,
-	0xdb6db6, 0xffffff
-};
-
-/* #define DUMP_PACKET */
-
-static uint64_t
-nlm_paddr_ld(uint64_t paddr)
-{
-	uint64_t xkaddr = 0x9800000000000000 | paddr;
-
-	return (nlm_load_dword_daddr(xkaddr));
-}
-
-struct nlm_xlp_portdata ifp_ports[64];
-static uma_zone_t nl_tx_desc_zone;
-
-/* This implementation will register the following tree of device
- * registration:
- *                      pcibus
- *                       |
- *                      xlpnae (1 instance - virtual entity)
- *                       |
- *                     xlpge
- *      (18 sgmii / 4 xaui / 2 interlaken instances)
- *                       |
- *                    miibus
- */
-
-static int nlm_xlpnae_probe(device_t);
-static int nlm_xlpnae_attach(device_t);
-static int nlm_xlpnae_detach(device_t);
-static int nlm_xlpnae_suspend(device_t);
-static int nlm_xlpnae_resume(device_t);
-static int nlm_xlpnae_shutdown(device_t);
-
-static device_method_t nlm_xlpnae_methods[] = {
-	/* Methods from the device interface */
-	DEVMETHOD(device_probe,		nlm_xlpnae_probe),
-	DEVMETHOD(device_attach,	nlm_xlpnae_attach),
-	DEVMETHOD(device_detach,	nlm_xlpnae_detach),
-	DEVMETHOD(device_suspend,	nlm_xlpnae_suspend),
-	DEVMETHOD(device_resume,	nlm_xlpnae_resume),
-	DEVMETHOD(device_shutdown,	nlm_xlpnae_shutdown),
-
-	DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
-
-	DEVMETHOD_END
-};
-
-static driver_t nlm_xlpnae_driver = {
-	"xlpnae",
-	nlm_xlpnae_methods,
-	sizeof(struct nlm_xlpnae_softc)
-};
-
-static devclass_t nlm_xlpnae_devclass;
-
-static int nlm_xlpge_probe(device_t);
-static int nlm_xlpge_attach(device_t);
-static int nlm_xlpge_detach(device_t);
-static int nlm_xlpge_suspend(device_t);
-static int nlm_xlpge_resume(device_t);
-static int nlm_xlpge_shutdown(device_t);
-
-/* mii override functions */
-static int nlm_xlpge_mii_read(device_t, int, int);
-static int nlm_xlpge_mii_write(device_t, int, int, int);
-static void nlm_xlpge_mii_statchg(device_t);
-
-static device_method_t nlm_xlpge_methods[] = {
-	/* Methods from the device interface */
-	DEVMETHOD(device_probe,		nlm_xlpge_probe),
-	DEVMETHOD(device_attach,	nlm_xlpge_attach),
-	DEVMETHOD(device_detach,	nlm_xlpge_detach),
-	DEVMETHOD(device_suspend,	nlm_xlpge_suspend),
-	DEVMETHOD(device_resume,	nlm_xlpge_resume),
-	DEVMETHOD(device_shutdown,	nlm_xlpge_shutdown),
-
-	/* Methods from the nexus bus needed for explicitly
-	 * probing children when driver is loaded as a kernel module
-	 */
-	DEVMETHOD(miibus_readreg,	nlm_xlpge_mii_read),
-	DEVMETHOD(miibus_writereg,	nlm_xlpge_mii_write),
-	DEVMETHOD(miibus_statchg,	nlm_xlpge_mii_statchg),
-
-	/* Terminate method list */
-	DEVMETHOD_END
-};
-
-static driver_t nlm_xlpge_driver = {
-	"xlpge",
-	nlm_xlpge_methods,
-	sizeof(struct nlm_xlpge_softc)
-};
-
-static devclass_t nlm_xlpge_devclass;
-
-DRIVER_MODULE(xlpnae, pci, nlm_xlpnae_driver, nlm_xlpnae_devclass, 0, 0);
-DRIVER_MODULE(xlpge, xlpnae, nlm_xlpge_driver, nlm_xlpge_devclass, 0, 0);
-DRIVER_MODULE(miibus, xlpge, miibus_driver, miibus_devclass, 0, 0);
-
-MODULE_DEPEND(pci, xlpnae, 1, 1, 1);
-MODULE_DEPEND(xlpnae, xlpge, 1, 1, 1);
-MODULE_DEPEND(xlpge, ether, 1, 1, 1);
-MODULE_DEPEND(xlpge, miibus, 1, 1, 1);
-
-#define SGMII_RCV_CONTEXT_WIDTH 8
-
-/* prototypes */
-static void nlm_xlpge_msgring_handler(int vc, int size,
-    int code, int srcid, struct nlm_fmn_msg *msg, void *data);
-static void nlm_xlpge_submit_rx_free_desc(struct nlm_xlpge_softc *sc, int num);
-static void nlm_xlpge_init(void *addr);
-static void nlm_xlpge_port_disable(struct nlm_xlpge_softc *sc);
-static void nlm_xlpge_port_enable(struct nlm_xlpge_softc *sc);
-
-/* globals */
-int dbg_on = 1;
-int cntx2port[524];
-
-static __inline void
-atomic_incr_long(unsigned long *addr)
-{
-	atomic_add_long(addr, 1);
-}
-
-/*
- * xlpnae driver implementation
- */
-static int
-nlm_xlpnae_probe(device_t dev)
-{
-	if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC ||
-	    pci_get_device(dev) != PCI_DEVICE_ID_NLM_NAE)
-		return (ENXIO);
-
-	return (BUS_PROBE_DEFAULT);
-}
-
-static void
-nlm_xlpnae_print_frin_desc_carving(struct nlm_xlpnae_softc *sc)
-{
-	int intf;
-	uint32_t value;
-	int start, size;
-
-	/* XXXJC: use max_ports instead of 20 ? */
-	for (intf = 0; intf < 20; intf++) {
-		nlm_write_nae_reg(sc->base, NAE_FREE_IN_FIFO_CFG,
-		    (0x80000000 | intf));
-		value = nlm_read_nae_reg(sc->base, NAE_FREE_IN_FIFO_CFG);
-		size = 2 * ((value >> 20) & 0x3ff);
-		start = 2 * ((value >> 8) & 0x1ff);
-	}
-}
-
-static void
-nlm_config_egress(struct nlm_xlpnae_softc *sc, int nblock,
-    int context_base, int hwport, int max_channels)
-{
-	int offset, num_channels;
-	uint32_t data;
-
-	num_channels = sc->portcfg[hwport].num_channels;
-
-	data = (2048 << 12) | (hwport << 4) | 1;
-	nlm_write_nae_reg(sc->base, NAE_TX_IF_BURSTMAX_CMD, data);
-
-	data = ((context_base + num_channels - 1) << 22) |
-	    (context_base << 12) | (hwport << 4) | 1;
-	nlm_write_nae_reg(sc->base, NAE_TX_DDR_ACTVLIST_CMD, data);
-
-	config_egress_fifo_carvings(sc->base, hwport,
-	    context_base, num_channels, max_channels, sc->portcfg);
-	config_egress_fifo_credits(sc->base, hwport,
-	    context_base, num_channels, max_channels, sc->portcfg);
-
-	data = nlm_read_nae_reg(sc->base, NAE_DMA_TX_CREDIT_TH);
-	data |= (1 << 25) | (1 << 24);
-	nlm_write_nae_reg(sc->base, NAE_DMA_TX_CREDIT_TH, data);
-
-	for (offset = 0; offset < num_channels; offset++) {
-		nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD1,
-		    NAE_DRR_QUANTA);
-		data = (hwport << 15) | ((context_base + offset) << 5);
-		if (sc->cmplx_type[nblock] == ILC)
-			data |= (offset << 20);
-		nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data | 1);
-		nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data);
-	}
-}
-
-static int
-xlpnae_get_maxchannels(struct nlm_xlpnae_softc *sc)
-{
-	int maxchans = 0;
-	int i;
-
-	for (i = 0; i < sc->max_ports; i++) {
-		if (sc->portcfg[i].type == UNKNOWN)
-			continue;
-		maxchans += sc->portcfg[i].num_channels;
-	}
-
-	return (maxchans);
-}
-
-static void
-nlm_setup_interface(struct nlm_xlpnae_softc *sc, int nblock,
-    int port, uint32_t cur_flow_base, uint32_t flow_mask,
-    int max_channels, int context)
-{
-	uint64_t nae_base = sc->base;
-	int mtu = 1536;			/* XXXJC: don't hard code */
-	uint32_t ucore_mask;
-
-	if (sc->cmplx_type[nblock] == XAUIC)
-		nlm_config_xaui(nae_base, nblock, mtu,
-		    mtu, sc->portcfg[port].vlan_pri_en);
-	nlm_config_freein_fifo_uniq_cfg(nae_base,
-	    port, sc->portcfg[port].free_desc_sizes);
-	nlm_config_ucore_iface_mask_cfg(nae_base,
-	    port, sc->portcfg[port].ucore_mask);
-
-	nlm_program_flow_cfg(nae_base, port, cur_flow_base, flow_mask);
-
-	if (sc->cmplx_type[nblock] == SGMIIC)
-		nlm_configure_sgmii_interface(nae_base, nblock, port, mtu, 0);
-
-	nlm_config_egress(sc, nblock, context, port, max_channels);
-
-	nlm_nae_init_netior(nae_base, sc->nblocks);
-	nlm_nae_open_if(nae_base, nblock, sc->cmplx_type[nblock], port,
-	    sc->portcfg[port].free_desc_sizes);
-
-	/*  XXXJC: check mask calculation */
-	ucore_mask = (1 << sc->nucores) - 1;
-	nlm_nae_init_ucore(nae_base, port, ucore_mask);
-}
-
-static void
-nlm_setup_interfaces(struct nlm_xlpnae_softc *sc)
-{
-	uint64_t nae_base;
-	uint32_t cur_slot, cur_slot_base;
-	uint32_t cur_flow_base, port, flow_mask;
-	int max_channels;
-	int i, context;
-
-	cur_slot = 0;
-	cur_slot_base = 0;
-	cur_flow_base = 0;
-	nae_base = sc->base;
-	flow_mask = nlm_get_flow_mask(sc->total_num_ports);
-	/* calculate max_channels */
-	max_channels = xlpnae_get_maxchannels(sc);
-
-	port = 0;
-	context = 0;
-	for (i = 0; i < sc->max_ports; i++) {
-		if (sc->portcfg[i].type == UNKNOWN)
-			continue;
-		nlm_setup_interface(sc, sc->portcfg[i].block, i, cur_flow_base,
-		    flow_mask, max_channels, context);
-		cur_flow_base += sc->per_port_num_flows;
-		context += sc->portcfg[i].num_channels;
-	}
-}
-
-static void
-nlm_xlpnae_init(int node, struct nlm_xlpnae_softc *sc)
-{
-	uint64_t nae_base;
-	uint32_t ucoremask = 0;
-	uint32_t val;
-	int i;
-
-	nae_base = sc->base;
-
-	nlm_nae_flush_free_fifo(nae_base, sc->nblocks);
-	nlm_deflate_frin_fifo_carving(nae_base, sc->max_ports);
-	nlm_reset_nae(node);
-
-	for (i = 0; i < sc->nucores; i++)	/* XXXJC: code repeated below */
-		ucoremask |= (0x1 << i);
-	printf("Loading 0x%x ucores with microcode\n", ucoremask);
-	nlm_ucore_load_all(nae_base, ucoremask, 1);
-
-	val = nlm_set_device_frequency(node, DFS_DEVICE_NAE, sc->freq);
-	printf("Setup NAE frequency to %dMHz\n", val);
-
-	nlm_mdio_reset_all(nae_base);
-
-	printf("Initialze SGMII PCS for blocks 0x%x\n", sc->sgmiimask);
-	nlm_sgmii_pcs_init(nae_base, sc->sgmiimask);
-
-	printf("Initialze XAUI PCS for blocks 0x%x\n", sc->xauimask);
-	nlm_xaui_pcs_init(nae_base, sc->xauimask);
-
-	/* clear NETIOR soft reset */
-	nlm_write_nae_reg(nae_base, NAE_LANE_CFG_SOFTRESET, 0x0);
-
-	/* Disable RX enable bit in RX_CONFIG */
-	val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG);
-	val &= 0xfffffffe;
-	nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
-
-	if (nlm_is_xlp8xx_ax() == 0) {
-		val = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG);
-		val &= ~(1 << 3);
-		nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, val);
-	}
-
-	nlm_setup_poe_class_config(nae_base, MAX_POE_CLASSES,
-	    sc->ncontexts, poe_cl_tbl);
-
-	nlm_setup_vfbid_mapping(nae_base);
-
-	nlm_setup_flow_crc_poly(nae_base, sc->flow_crc_poly);
-
-	nlm_setup_rx_cal_cfg(nae_base, sc->max_ports, sc->portcfg);
-	/* note: xlp8xx Ax does not have Tx Calendering */
-	if (!nlm_is_xlp8xx_ax())
-		nlm_setup_tx_cal_cfg(nae_base, sc->max_ports, sc->portcfg);
-
-	nlm_setup_interfaces(sc);
-	nlm_config_poe(sc->poe_base, sc->poedv_base);
-
-	if (sc->hw_parser_en)
-		nlm_enable_hardware_parser(nae_base);
-
-	if (sc->prepad_en)
-		nlm_prepad_enable(nae_base, sc->prepad_size);
-
-	if (sc->ieee_1588_en)
-		nlm_setup_1588_timer(sc->base, sc->portcfg);
-}
-
-static void
-nlm_xlpnae_update_pde(void *dummy __unused)
-{
-	struct nlm_xlpnae_softc *sc;
-	uint32_t dv[NUM_WORDS_PER_DV];
-	device_t dev;
-	int vec;
-
-	dev = devclass_get_device(devclass_find("xlpnae"), 0);
-	sc = device_get_softc(dev);
-
-	nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 0);
-	for (vec = 0; vec < NUM_DIST_VEC; vec++) {
-		if (nlm_get_poe_distvec(vec, dv) != 0)
-			continue;
-
-		nlm_write_poe_distvec(sc->poedv_base, vec, dv);
-	}
-	nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 1);
-}
-
-SYSINIT(nlm_xlpnae_update_pde, SI_SUB_SMP, SI_ORDER_ANY,
-    nlm_xlpnae_update_pde, NULL);
-
-/* configuration common for sgmii, xaui, ilaken goes here */
-static void
-nlm_setup_portcfg(struct nlm_xlpnae_softc *sc, struct xlp_nae_ivars *naep,
-    int block, int port)
-{
-	int i;
-	uint32_t ucore_mask = 0;
-	struct xlp_block_ivars *bp;
-	struct xlp_port_ivars *p;
-
-	bp = &(naep->block_ivars[block]);
-	p  = &(bp->port_ivars[port & 0x3]);
-
-	sc->portcfg[port].node = p->node;
-	sc->portcfg[port].block = p->block;
-	sc->portcfg[port].port = p->port;
-	sc->portcfg[port].type = p->type;
-	sc->portcfg[port].mdio_bus = p->mdio_bus;
-	sc->portcfg[port].phy_addr = p->phy_addr;
-	sc->portcfg[port].loopback_mode = p->loopback_mode;
-	sc->portcfg[port].num_channels = p->num_channels;
-	if (p->free_desc_sizes != MCLBYTES) {
-		printf("[%d, %d] Error: free_desc_sizes %d != %d\n",
-		    block, port, p->free_desc_sizes, MCLBYTES);
-		return;
-	}
-	sc->portcfg[port].free_desc_sizes = p->free_desc_sizes;
-	for (i = 0; i < sc->nucores; i++)	/* XXXJC: configure this */
-		ucore_mask |= (0x1 << i);
-	sc->portcfg[port].ucore_mask = ucore_mask;
-	sc->portcfg[port].vlan_pri_en = p->vlan_pri_en;
-	sc->portcfg[port].num_free_descs = p->num_free_descs;
-	sc->portcfg[port].iface_fifo_size = p->iface_fifo_size;
-	sc->portcfg[port].rxbuf_size = p->rxbuf_size;
-	sc->portcfg[port].rx_slots_reqd = p->rx_slots_reqd;
-	sc->portcfg[port].tx_slots_reqd = p->tx_slots_reqd;
-	sc->portcfg[port].pseq_fifo_size = p->pseq_fifo_size;
-
-	sc->portcfg[port].stg2_fifo_size = p->stg2_fifo_size;
-	sc->portcfg[port].eh_fifo_size = p->eh_fifo_size;
-	sc->portcfg[port].frout_fifo_size = p->frout_fifo_size;
-	sc->portcfg[port].ms_fifo_size = p->ms_fifo_size;
-	sc->portcfg[port].pkt_fifo_size = p->pkt_fifo_size;
-	sc->portcfg[port].pktlen_fifo_size = p->pktlen_fifo_size;
-	sc->portcfg[port].max_stg2_offset = p->max_stg2_offset;
-	sc->portcfg[port].max_eh_offset = p->max_eh_offset;
-	sc->portcfg[port].max_frout_offset = p->max_frout_offset;
-	sc->portcfg[port].max_ms_offset = p->max_ms_offset;
-	sc->portcfg[port].max_pmem_offset = p->max_pmem_offset;
-	sc->portcfg[port].stg1_2_credit = p->stg1_2_credit;
-	sc->portcfg[port].stg2_eh_credit = p->stg2_eh_credit;
-	sc->portcfg[port].stg2_frout_credit = p->stg2_frout_credit;
-	sc->portcfg[port].stg2_ms_credit = p->stg2_ms_credit;
-	sc->portcfg[port].ieee1588_inc_intg = p->ieee1588_inc_intg;
-	sc->portcfg[port].ieee1588_inc_den = p->ieee1588_inc_den;
-	sc->portcfg[port].ieee1588_inc_num = p->ieee1588_inc_num;
-	sc->portcfg[port].ieee1588_userval = p->ieee1588_userval;
-	sc->portcfg[port].ieee1588_ptpoff = p->ieee1588_ptpoff;
-	sc->portcfg[port].ieee1588_tmr1 = p->ieee1588_tmr1;
-	sc->portcfg[port].ieee1588_tmr2 = p->ieee1588_tmr2;
-	sc->portcfg[port].ieee1588_tmr3 = p->ieee1588_tmr3;
-
-	sc->total_free_desc += sc->portcfg[port].free_desc_sizes;
-	sc->total_num_ports++;
-}
-
-static int
-nlm_xlpnae_attach(device_t dev)
-{
-	struct xlp_nae_ivars	*nae_ivars;
-	struct nlm_xlpnae_softc *sc;
-	device_t tmpd;
-	uint32_t dv[NUM_WORDS_PER_DV];
-	int port, i, j, nchan, nblock, node, qstart, qnum;
-	int offset, context, txq_base, rxvcbase;
-	uint64_t poe_pcibase, nae_pcibase;
-
-	node = pci_get_slot(dev) / 8;
-	nae_ivars = &xlp_board_info.nodes[node].nae_ivars;
-
-	sc = device_get_softc(dev);
-	sc->xlpnae_dev = dev;
-	sc->node = nae_ivars->node;
-	sc->base = nlm_get_nae_regbase(sc->node);
-	sc->poe_base = nlm_get_poe_regbase(sc->node);
-	sc->poedv_base = nlm_get_poedv_regbase(sc->node);
-	sc->portcfg = nae_port_config;
-	sc->blockmask = nae_ivars->blockmask;
-	sc->ilmask = nae_ivars->ilmask;
-	sc->xauimask = nae_ivars->xauimask;
-	sc->sgmiimask = nae_ivars->sgmiimask;
-	sc->nblocks = nae_ivars->nblocks;
-	sc->freq = nae_ivars->freq;
-
-	/* flow table generation is done by CRC16 polynomial */
-	sc->flow_crc_poly = nae_ivars->flow_crc_poly;
-
-	sc->hw_parser_en = nae_ivars->hw_parser_en;
-	sc->prepad_en = nae_ivars->prepad_en;
-	sc->prepad_size = nae_ivars->prepad_size;
-	sc->ieee_1588_en = nae_ivars->ieee_1588_en;
-
-	nae_pcibase = nlm_get_nae_pcibase(sc->node);
-	sc->ncontexts = nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5);
-	sc->nucores = nlm_num_uengines(nae_pcibase);
-
-	for (nblock = 0; nblock < sc->nblocks; nblock++) {
-		sc->cmplx_type[nblock] = nae_ivars->block_ivars[nblock].type;
-		sc->portmask[nblock] = nae_ivars->block_ivars[nblock].portmask;
-	}
-
-	for (i = 0; i < sc->ncontexts; i++)
-		cntx2port[i] = 18;	/* 18 is an invalid port */
-
-	if (sc->nblocks == 5)
-		sc->max_ports = 18;	/* 8xx has a block 4 with 2 ports */
-	else
-		sc->max_ports = sc->nblocks * PORTS_PER_CMPLX;
-
-	for (i = 0; i < sc->max_ports; i++)
-		sc->portcfg[i].type = UNKNOWN; /* Port Not Present */
-	/*
-	 * Now setup all internal fifo carvings based on
-	 * total number of ports in the system
-	 */
-	sc->total_free_desc = 0;
-	sc->total_num_ports = 0;
-	port = 0;
-	context = 0;
-	txq_base = nlm_qidstart(nae_pcibase);
-	rxvcbase = txq_base + sc->ncontexts;
-	for (i = 0; i < sc->nblocks; i++) {
-		uint32_t portmask;
-
-		if ((nae_ivars->blockmask & (1 << i)) == 0) {
-			port += 4;
-			continue;
-		}
-		portmask = nae_ivars->block_ivars[i].portmask;
-		for (j = 0; j < PORTS_PER_CMPLX; j++, port++) {
-			if ((portmask & (1 << j)) == 0)
-				continue;
-			nlm_setup_portcfg(sc, nae_ivars, i, port);
-			nchan = sc->portcfg[port].num_channels;
-			for (offset = 0; offset < nchan; offset++)
-				cntx2port[context + offset] = port;
-			sc->portcfg[port].txq = txq_base + context;
-			sc->portcfg[port].rxfreeq = rxvcbase + port;
-			context += nchan;
-		}
-	}
-
-	poe_pcibase = nlm_get_poe_pcibase(sc->node);
-	sc->per_port_num_flows =
-	    nlm_poe_max_flows(poe_pcibase) / sc->total_num_ports;
-
-	/* zone for P2P descriptors */
-	nl_tx_desc_zone = uma_zcreate("NL Tx Desc",
-	    sizeof(struct xlpge_tx_desc), NULL, NULL, NULL, NULL,
-	    NAE_CACHELINE_SIZE, 0);
-
-	/* NAE FMN messages have CMS src station id's in the
-	 * range of qstart to qnum.
-	 */
-	qstart = nlm_qidstart(nae_pcibase);
-	qnum = nlm_qnum(nae_pcibase);
-	if (register_msgring_handler(qstart, qstart + qnum - 1,
-	    nlm_xlpge_msgring_handler, sc)) {
-		panic("Couldn't register NAE msgring handler\n");
-	}
-
-	/* POE FMN messages have CMS src station id's in the
-	 * range of qstart to qnum.
-	 */
-	qstart = nlm_qidstart(poe_pcibase);
-	qnum = nlm_qnum(poe_pcibase);
-	if (register_msgring_handler(qstart, qstart + qnum - 1,
-	    nlm_xlpge_msgring_handler, sc)) {
-		panic("Couldn't register POE msgring handler\n");
-	}
-
-	nlm_xlpnae_init(node, sc);
-
-	for (i = 0; i < sc->max_ports; i++) {
-		char desc[32];
-		int block, port;
-
-		if (sc->portcfg[i].type == UNKNOWN)
-			continue;
-		block = sc->portcfg[i].block;
-		port = sc->portcfg[i].port;
-		tmpd = device_add_child(dev, "xlpge", i);
-		device_set_ivars(tmpd,
-		    &(nae_ivars->block_ivars[block].port_ivars[port]));
-		sprintf(desc, "XLP NAE Port %d,%d", block, port);
-		device_set_desc_copy(tmpd, desc);
-	}
-	nlm_setup_iface_fifo_cfg(sc->base, sc->max_ports, sc->portcfg);
-	nlm_setup_rx_base_config(sc->base, sc->max_ports, sc->portcfg);
-	nlm_setup_rx_buf_config(sc->base, sc->max_ports, sc->portcfg);
-	nlm_setup_freein_fifo_cfg(sc->base, sc->portcfg);
-	nlm_program_nae_parser_seq_fifo(sc->base, sc->max_ports, sc->portcfg);
-
-	nlm_xlpnae_print_frin_desc_carving(sc);
-	bus_generic_probe(dev);
-	bus_generic_attach(dev);
-
-	/*
-	 * Enable only boot cpu at this point, full distribution comes
-	 * only after SMP is started
-	 */
-	nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 0);
-	nlm_calc_poe_distvec(0x1, 0, 0, 0, 0x1 << XLPGE_RX_VC, dv);
-	nlm_write_poe_distvec(sc->poedv_base, 0, dv);
-	nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 1);
-
-	return (0);
-}
-
-static int
-nlm_xlpnae_detach(device_t dev)
-{
-	/*  TODO - free zone here */
-	return (0);
-}
-
-static int
-nlm_xlpnae_suspend(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlm_xlpnae_resume(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlm_xlpnae_shutdown(device_t dev)
-{
-	return (0);
-}
-
-/*
- * xlpge driver implementation
- */
-
-static void
-nlm_xlpge_mac_set_rx_mode(struct nlm_xlpge_softc *sc)
-{
-	if (sc->if_flags & IFF_PROMISC) {
-		if (sc->type == SGMIIC)
-			nlm_nae_setup_rx_mode_sgmii(sc->base_addr,
-			    sc->block, sc->port, sc->type, 1 /* broadcast */,
-			    1/* multicast */, 0 /* pause */, 1 /* promisc */);
-		else
-			nlm_nae_setup_rx_mode_xaui(sc->base_addr,
-			    sc->block, sc->port, sc->type, 1 /* broadcast */,
-			    1/* multicast */, 0 /* pause */, 1 /* promisc */);
-	} else {
-		if (sc->type == SGMIIC)
-			nlm_nae_setup_rx_mode_sgmii(sc->base_addr,
-			    sc->block, sc->port, sc->type, 1 /* broadcast */,
-			    1/* multicast */, 0 /* pause */, 0 /* promisc */);
-		else
-			nlm_nae_setup_rx_mode_xaui(sc->base_addr,
-			    sc->block, sc->port, sc->type, 1 /* broadcast */,
-			    1/* multicast */, 0 /* pause */, 0 /* promisc */);
-	}
-}
-
-static int
-nlm_xlpge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
-	struct mii_data		*mii;
-	struct nlm_xlpge_softc	*sc;
-	struct ifreq		*ifr;
-	int			error;
-
-	sc = ifp->if_softc;
-	error = 0;
-	ifr = (struct ifreq *)data;
-
-	switch (command) {
-	case SIOCSIFFLAGS:
-		XLPGE_LOCK(sc);
-		sc->if_flags = ifp->if_flags;
-		if (ifp->if_flags & IFF_UP) {
-			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
-				nlm_xlpge_init(sc);
-			else
-				nlm_xlpge_port_enable(sc);
-			nlm_xlpge_mac_set_rx_mode(sc);
-			sc->link = NLM_LINK_UP;
-		} else {
-			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
-				nlm_xlpge_port_disable(sc);
-			sc->link = NLM_LINK_DOWN;
-		}
-		XLPGE_UNLOCK(sc);
-		error = 0;
-		break;
-	case SIOCGIFMEDIA:
-	case SIOCSIFMEDIA:
-		if (sc->mii_bus != NULL) {
-			mii = device_get_softc(sc->mii_bus);
-			error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
-			    command);
-		}
-		break;
-	default:
-		error = ether_ioctl(ifp, command, data);
-		break;
-	}
-
-	return (error);
-}
-
-static int
-xlpge_tx(struct ifnet *ifp, struct mbuf *mbuf_chain)
-{
-	struct nlm_fmn_msg	msg;
-	struct xlpge_tx_desc	*p2p;
-	struct nlm_xlpge_softc	*sc;
-	struct mbuf	*m;
-	vm_paddr_t      paddr;
-	int		fbid, dst, pos, err;
-	int		ret = 0, tx_msgstatus, retries;
-
-	err = 0;
-	if (mbuf_chain == NULL)
-		return (0);
-
-	sc = ifp->if_softc;
-	p2p = NULL;
-	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) ||
-	    ifp->if_drv_flags & IFF_DRV_OACTIVE) {
-		err = ENXIO;
-		goto fail;
-	}
-
-	/* free a few in coming messages on the fb vc */
-	xlp_handle_msg_vc(1 << XLPGE_FB_VC, 2);
-
-	/* vfb id table is setup to map cpu to vc 3 of the cpu */
-	fbid = nlm_cpuid();
-	dst = sc->txq;
-
-	pos = 0;
-	p2p = uma_zalloc(nl_tx_desc_zone, M_NOWAIT);
-	if (p2p == NULL) {
-		printf("alloc fail\n");
-		err = ENOBUFS;
-		goto fail;
-	}
-
-	for (m = mbuf_chain; m != NULL; m = m->m_next) {
-		vm_offset_t buf = (vm_offset_t) m->m_data;
-		int	len = m->m_len;
-		int	frag_sz;
-		uint64_t desc;
-
-		/*printf("m_data = %p len %d\n", m->m_data, len); */
-		while (len) {
-			if (pos == XLP_NTXFRAGS - 3) {
-				device_printf(sc->xlpge_dev,
-				    "packet defrag %d\n",
-				    m_length(mbuf_chain, NULL));
-				err = ENOBUFS; /* TODO fix error */
-				goto fail;
-			}
-			paddr = vtophys(buf);
-			frag_sz = PAGE_SIZE - (buf & PAGE_MASK);
-			if (len < frag_sz)
-				frag_sz = len;
-			desc = nae_tx_desc(P2D_NEOP, 0, 127,
-			    frag_sz, paddr);
-			p2p->frag[pos] = htobe64(desc);
-			pos++;
-			len -= frag_sz;
-			buf += frag_sz;
-		}
-	}
-
-	KASSERT(pos != 0, ("Zero-length mbuf chain?\n"));
-
-	/* Make the last one P2D EOP */
-	p2p->frag[pos-1] |= htobe64((uint64_t)P2D_EOP << 62);
-
-	/* stash useful pointers in the desc */
-	p2p->frag[XLP_NTXFRAGS-3] = 0xf00bad;
-	p2p->frag[XLP_NTXFRAGS-2] = (uintptr_t)p2p;
-	p2p->frag[XLP_NTXFRAGS-1] = (uintptr_t)mbuf_chain;
-
-	paddr = vtophys(p2p);
-	msg.msg[0] = nae_tx_desc(P2P, 0, fbid, pos, paddr);
-
-	for (retries = 16;  retries > 0; retries--) {
-		ret = nlm_fmn_msgsend(dst, 1, FMN_SWCODE_NAE, &msg);
-		if (ret == 0)
-			return (0);
-	}
-
-fail:
-	if (ret != 0) {
-		tx_msgstatus = nlm_read_c2_txmsgstatus();
-		if ((tx_msgstatus >> 24) & 0x1)
-			device_printf(sc->xlpge_dev, "Transmit queue full - ");
-		if ((tx_msgstatus >> 3) & 0x1)
-			device_printf(sc->xlpge_dev, "ECC error - ");
-		if ((tx_msgstatus >> 2) & 0x1)
-			device_printf(sc->xlpge_dev, "Pending Sync - ");
-		if ((tx_msgstatus >> 1) & 0x1)
-			device_printf(sc->xlpge_dev,
-			    "Insufficient input queue credits - ");
-		if (tx_msgstatus & 0x1)
-			device_printf(sc->xlpge_dev,
-			    "Insufficient output queue credits - ");
-	}
-	device_printf(sc->xlpge_dev, "Send failed! err = %d\n", err);
-	if (p2p)
-		uma_zfree(nl_tx_desc_zone, p2p);
-	m_freem(mbuf_chain);
-	if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
-	return (err);
-}
-
-static int
-nlm_xlpge_gmac_config_speed(struct nlm_xlpge_softc *sc)
-{
-	struct mii_data *mii;
-
-	if (sc->type == XAUIC || sc->type == ILC)
-		return (0);
-
-	if (sc->mii_bus) {
-		mii = device_get_softc(sc->mii_bus);
-		mii_pollstat(mii);
-	}
-
-	return (0);
-}
-
-static void
-nlm_xlpge_port_disable(struct nlm_xlpge_softc *sc)
-{
-	struct ifnet   *ifp;
-
-	ifp = sc->xlpge_if;
-	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
-
-	callout_stop(&sc->xlpge_callout);
-	nlm_mac_disable(sc->base_addr, sc->block, sc->type, sc->port);
-}
-
-static void
-nlm_mii_pollstat(void *arg)
-{
-	struct nlm_xlpge_softc *sc = (struct nlm_xlpge_softc *)arg;
-	struct mii_data *mii = NULL;
-
-	if (sc->mii_bus) {
-		mii = device_get_softc(sc->mii_bus);
-
-		KASSERT(mii != NULL, ("mii ptr is NULL"));
-
-		mii_pollstat(mii);
-
-		callout_reset(&sc->xlpge_callout, hz,
-		    nlm_mii_pollstat, sc);
-	}
-}
-
-static void
-nlm_xlpge_port_enable(struct nlm_xlpge_softc *sc)
-{
-	if ((sc->type != SGMIIC) && (sc->type != XAUIC))
-		return;
-	nlm_mac_enable(sc->base_addr, sc->block, sc->type, sc->port);
-	nlm_mii_pollstat((void *)sc);
-}
-
-static void
-nlm_xlpge_init(void *addr)
-{
-	struct nlm_xlpge_softc *sc;
-	struct ifnet   *ifp;
-	struct mii_data *mii = NULL;
-
-	sc = (struct nlm_xlpge_softc *)addr;
-	ifp = sc->xlpge_if;
-
-	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
-		return;
-
-	if (sc->mii_bus) {
-		mii = device_get_softc(sc->mii_bus);
-		mii_mediachg(mii);
-	}
-
-	nlm_xlpge_gmac_config_speed(sc);
-	ifp->if_drv_flags |= IFF_DRV_RUNNING;
-	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-	nlm_xlpge_port_enable(sc);
-
-	/* start the callout */
-	callout_reset(&sc->xlpge_callout, hz, nlm_mii_pollstat, sc);
-}
-
-/*
- * Read the MAC address from FDT or board eeprom.
- */
-static void
-xlpge_read_mac_addr(struct nlm_xlpge_softc *sc)
-{
-
-	xlpge_get_macaddr(sc->dev_addr);
-	/* last octet is port specific */
-	sc->dev_addr[5] += (sc->block * 4) + sc->port;
-
-	if (sc->type == SGMIIC)
-		nlm_nae_setup_mac_addr_sgmii(sc->base_addr, sc->block,
-		    sc->port, sc->type, sc->dev_addr);
-	else if (sc->type == XAUIC)
-		nlm_nae_setup_mac_addr_xaui(sc->base_addr, sc->block,
-		    sc->port, sc->type, sc->dev_addr);
-}
-
-static int
-xlpge_mediachange(struct ifnet *ifp)
-{
-	return (0);
-}
-
-static void
-xlpge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
-	struct nlm_xlpge_softc *sc;
-	struct mii_data *md;
-
-	md = NULL;
-	sc = ifp->if_softc;
-
-	if (sc->mii_bus)
-		md = device_get_softc(sc->mii_bus);
-
-	ifmr->ifm_status = IFM_AVALID;
-	ifmr->ifm_active = IFM_ETHER;
-
-	if (sc->link == NLM_LINK_DOWN)
-		return;
-
-	if (md != NULL)
-		ifmr->ifm_active = md->mii_media.ifm_cur->ifm_media;
-	ifmr->ifm_status |= IFM_ACTIVE;
-}
-
-static int
-nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc)
-{
-	struct ifnet *ifp;
-	device_t dev;
-	int port = sc->block * 4 + sc->port;
-
-	dev = sc->xlpge_dev;
-	ifp = sc->xlpge_if = if_alloc(IFT_ETHER);
-	/*(sc->network_sc)->ifp_ports[port].xlpge_if = ifp;*/
-	ifp_ports[port].xlpge_if = ifp;
-
-	if (ifp == NULL) {
-		device_printf(dev, "cannot if_alloc()\n");
-		return (ENOSPC);
-	}
-	ifp->if_softc = sc;
-	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-	sc->if_flags = ifp->if_flags;
-	/*ifp->if_capabilities = IFCAP_TXCSUM | IFCAP_VLAN_HWTAGGING;*/
-	ifp->if_capabilities = 0;
-	ifp->if_capenable = ifp->if_capabilities;
-	ifp->if_ioctl = nlm_xlpge_ioctl;
-	ifp->if_init  = nlm_xlpge_init ;
-	ifp->if_hwassist = 0;
-	ifp->if_snd.ifq_drv_maxlen = NLM_XLPGE_TXQ_SIZE; /* TODO: make this a sysint */
-	IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
-	IFQ_SET_READY(&ifp->if_snd);
-
-	ifmedia_init(&sc->xlpge_mii.mii_media, 0, xlpge_mediachange,
-	    xlpge_mediastatus);
-	ifmedia_add(&sc->xlpge_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, NULL);
-	ifmedia_set(&sc->xlpge_mii.mii_media, IFM_ETHER | IFM_AUTO);
-	sc->xlpge_mii.mii_media.ifm_media =
-	    sc->xlpge_mii.mii_media.ifm_cur->ifm_media;
-	xlpge_read_mac_addr(sc);
-
-	ether_ifattach(ifp, sc->dev_addr);
-
-	/* override if_transmit : per ifnet(9), do it after if_attach */
-	ifp->if_transmit = xlpge_tx;
-
-	return (0);
-}
-
-static int
-nlm_xlpge_probe(device_t dev)
-{
-	return (BUS_PROBE_DEFAULT);
-}
-
-static void *
-get_buf(void)
-{
-	struct mbuf     *m_new;
-	uint64_t        *md;
-#ifdef INVARIANTS
-	vm_paddr_t      temp1, temp2;
-#endif
-
-	if ((m_new = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR)) == NULL)
-		return (NULL);
-	m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
-	KASSERT(((uintptr_t)m_new->m_data & (NAE_CACHELINE_SIZE - 1)) == 0,
-	    ("m_new->m_data is not cacheline aligned"));
-	md = (uint64_t *)m_new->m_data;
-	md[0] = (intptr_t)m_new;        /* Back Ptr */
-	md[1] = 0xf00bad;
-	m_adj(m_new, NAE_CACHELINE_SIZE);
-
-#ifdef INVARIANTS
-	temp1 = vtophys((vm_offset_t) m_new->m_data);
-	temp2 = vtophys((vm_offset_t) m_new->m_data + 1536);
-	KASSERT((temp1 + 1536) == temp2,
-	    ("Alloced buffer is not contiguous"));
-#endif
-	return ((void *)m_new->m_data);
-}
-
-static void
-nlm_xlpge_mii_init(device_t dev, struct nlm_xlpge_softc *sc)
-{
-	int error;
-
-	error = mii_attach(dev, &sc->mii_bus, sc->xlpge_if,
-			xlpge_mediachange, xlpge_mediastatus,
-			BMSR_DEFCAPMASK, sc->phy_addr, MII_OFFSET_ANY, 0);
-
-	if (error) {
-		device_printf(dev, "attaching PHYs failed\n");
-		sc->mii_bus = NULL;
-	}
-
-	if (sc->mii_bus != NULL) {
-		/* enable MDIO interrupts in the PHY */
-		/* XXXJC: TODO */
-	}
-}
-
-static int
-xlpge_stats_sysctl(SYSCTL_HANDLER_ARGS)
-{
-	struct nlm_xlpge_softc *sc;
-	uint32_t val;
-	int reg, field;
-
-	sc = arg1;
-	field = arg2;
-	reg = SGMII_STATS_MLR(sc->block, sc->port) + field;
-	val = nlm_read_nae_reg(sc->base_addr, reg);
-	return (sysctl_handle_int(oidp, &val, 0, req));
-}
-
-static void
-nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc)
-{
-	struct sysctl_ctx_list *ctx;
-	struct sysctl_oid_list *child;
-	struct sysctl_oid *tree;
-
-	ctx = device_get_sysctl_ctx(dev);
-	tree = device_get_sysctl_tree(dev);
-	child = SYSCTL_CHILDREN(tree);
-
-#define XLPGE_STAT(name, offset, desc)				\
-	SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name,		\
-	    CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT,	\
-	    sc, offset,	xlpge_stats_sysctl, "IU", desc)
-
-	XLPGE_STAT("tr127", nlm_sgmii_stats_tr127, "TxRx 64 - 127 Bytes");
-	XLPGE_STAT("tr255", nlm_sgmii_stats_tr255, "TxRx 128 - 255 Bytes");
-	XLPGE_STAT("tr511", nlm_sgmii_stats_tr511, "TxRx 256 - 511 Bytes");
-	XLPGE_STAT("tr1k",  nlm_sgmii_stats_tr1k,  "TxRx 512 - 1023 Bytes");
-	XLPGE_STAT("trmax", nlm_sgmii_stats_trmax, "TxRx 1024 - 1518 Bytes");
-	XLPGE_STAT("trmgv", nlm_sgmii_stats_trmgv, "TxRx 1519 - 1522 Bytes");
-
-	XLPGE_STAT("rbyt", nlm_sgmii_stats_rbyt, "Rx Bytes");
-	XLPGE_STAT("rpkt", nlm_sgmii_stats_rpkt, "Rx Packets");
-	XLPGE_STAT("rfcs", nlm_sgmii_stats_rfcs, "Rx FCS Error");
-	XLPGE_STAT("rmca", nlm_sgmii_stats_rmca, "Rx Multicast Packets");
-	XLPGE_STAT("rbca", nlm_sgmii_stats_rbca, "Rx Broadcast Packets");
-	XLPGE_STAT("rxcf", nlm_sgmii_stats_rxcf, "Rx Control Frames");
-	XLPGE_STAT("rxpf", nlm_sgmii_stats_rxpf, "Rx Pause Frames");
-	XLPGE_STAT("rxuo", nlm_sgmii_stats_rxuo, "Rx Unknown Opcode");
-	XLPGE_STAT("raln", nlm_sgmii_stats_raln, "Rx Alignment Errors");
-	XLPGE_STAT("rflr", nlm_sgmii_stats_rflr, "Rx Framelength Errors");
-	XLPGE_STAT("rcde", nlm_sgmii_stats_rcde, "Rx Code Errors");
-	XLPGE_STAT("rcse", nlm_sgmii_stats_rcse, "Rx Carrier Sense Errors");
-	XLPGE_STAT("rund", nlm_sgmii_stats_rund, "Rx Undersize Packet Errors");
-	XLPGE_STAT("rovr", nlm_sgmii_stats_rovr, "Rx Oversize Packet Errors");
-	XLPGE_STAT("rfrg", nlm_sgmii_stats_rfrg, "Rx Fragments");
-	XLPGE_STAT("rjbr", nlm_sgmii_stats_rjbr, "Rx Jabber");
-
-	XLPGE_STAT("tbyt", nlm_sgmii_stats_tbyt, "Tx Bytes");
-	XLPGE_STAT("tpkt", nlm_sgmii_stats_tpkt, "Tx Packets");
-	XLPGE_STAT("tmca", nlm_sgmii_stats_tmca, "Tx Multicast Packets");
-	XLPGE_STAT("tbca", nlm_sgmii_stats_tbca, "Tx Broadcast Packets");
-	XLPGE_STAT("txpf", nlm_sgmii_stats_txpf, "Tx Pause Frame");
-	XLPGE_STAT("tdfr", nlm_sgmii_stats_tdfr, "Tx Deferral Packets");
-	XLPGE_STAT("tedf", nlm_sgmii_stats_tedf, "Tx Excessive Deferral Pkts");
-	XLPGE_STAT("tscl", nlm_sgmii_stats_tscl, "Tx Single Collisions");
-	XLPGE_STAT("tmcl", nlm_sgmii_stats_tmcl, "Tx Multiple Collisions");
-	XLPGE_STAT("tlcl", nlm_sgmii_stats_tlcl, "Tx Late Collision Pkts");
-	XLPGE_STAT("txcl", nlm_sgmii_stats_txcl, "Tx Excessive Collisions");
-	XLPGE_STAT("tncl", nlm_sgmii_stats_tncl, "Tx Total Collisions");
-	XLPGE_STAT("tjbr", nlm_sgmii_stats_tjbr, "Tx Jabber Frames");
-	XLPGE_STAT("tfcs", nlm_sgmii_stats_tfcs, "Tx FCS Errors");
-	XLPGE_STAT("txcf", nlm_sgmii_stats_txcf, "Tx Control Frames");
-	XLPGE_STAT("tovr", nlm_sgmii_stats_tovr, "Tx Oversize Frames");
-	XLPGE_STAT("tund", nlm_sgmii_stats_tund, "Tx Undersize Frames");
-	XLPGE_STAT("tfrg", nlm_sgmii_stats_tfrg, "Tx Fragments");
-#undef XLPGE_STAT
-}
-
-static int
-nlm_xlpge_attach(device_t dev)
-{
-	struct xlp_port_ivars *pv;
-	struct nlm_xlpge_softc *sc;
-	int port;
-
-	pv = device_get_ivars(dev);
-	sc = device_get_softc(dev);
-	sc->xlpge_dev = dev;
-	sc->mii_bus = NULL;
-	sc->block = pv->block;
-	sc->node = pv->node;
-	sc->port = pv->port;
-	sc->type = pv->type;
-	sc->xlpge_if = NULL;
-	sc->phy_addr = pv->phy_addr;
-	sc->mdio_bus = pv->mdio_bus;
-	sc->portcfg = nae_port_config;
-	sc->hw_parser_en = pv->hw_parser_en;
-
-	/* default settings */
-	sc->speed = NLM_SGMII_SPEED_10;
-	sc->duplexity = NLM_SGMII_DUPLEX_FULL;
-	sc->link = NLM_LINK_DOWN;
-	sc->flowctrl = NLM_FLOWCTRL_DISABLED;
-
-	sc->network_sc = device_get_softc(device_get_parent(dev));
-	sc->base_addr = sc->network_sc->base;
-	sc->prepad_en = sc->network_sc->prepad_en;
-	sc->prepad_size = sc->network_sc->prepad_size;
-
-	callout_init(&sc->xlpge_callout, 1);
-
-	XLPGE_LOCK_INIT(sc, device_get_nameunit(dev));
-
-	port = (sc->block*4)+sc->port;
-	sc->nfree_desc = nae_port_config[port].num_free_descs;
-	sc->txq = nae_port_config[port].txq;
-	sc->rxfreeq = nae_port_config[port].rxfreeq;
-
-	nlm_xlpge_submit_rx_free_desc(sc, sc->nfree_desc);
-	if (sc->hw_parser_en)
-		nlm_enable_hardware_parser_per_port(sc->base_addr,
-		    sc->block, sc->port);
-
-	nlm_xlpge_ifinit(sc);
-	ifp_ports[port].xlpge_sc = sc;
-	nlm_xlpge_mii_init(dev, sc);
-
-	nlm_xlpge_setup_stats_sysctl(dev, sc);
-
-	return (0);
-}
-
-static int
-nlm_xlpge_detach(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlm_xlpge_suspend(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlm_xlpge_resume(device_t dev)
-{
-	return (0);
-}
-
-static int
-nlm_xlpge_shutdown(device_t dev)
-{
-	return (0);
-}
-
-/*
- * miibus function with custom implementation
- */
-static int
-nlm_xlpge_mii_read(device_t dev, int phyaddr, int regidx)
-{
-	struct nlm_xlpge_softc *sc;
-	int val;
-
-	sc = device_get_softc(dev);
-	if (sc->type == SGMIIC)
-		val = nlm_gmac_mdio_read(sc->base_addr, sc->mdio_bus,
-		    BLOCK_7, LANE_CFG, phyaddr, regidx);
-	else
-		val = 0xffff;
-
-	return (val);
-}
-
-static int
-nlm_xlpge_mii_write(device_t dev, int phyaddr, int regidx, int val)
-{
-	struct nlm_xlpge_softc *sc;
-
-	sc = device_get_softc(dev);
-	if (sc->type == SGMIIC)
-		nlm_gmac_mdio_write(sc->base_addr, sc->mdio_bus, BLOCK_7,
-		    LANE_CFG, phyaddr, regidx, val);
-
-	return (0);
-}
-
-static void
-nlm_xlpge_mii_statchg(device_t dev)
-{
-	struct nlm_xlpge_softc *sc;
-	struct mii_data *mii;
-	char *speed, *duplexity;
-
-	sc = device_get_softc(dev);
-	if (sc->mii_bus == NULL)
-		return;
-
-	mii = device_get_softc(sc->mii_bus);
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		if (IFM_SUBTYPE(mii->mii_media_active) ==  IFM_10_T) {
-			sc->speed = NLM_SGMII_SPEED_10;
-			speed =  "10Mbps";
-		} else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
-			sc->speed = NLM_SGMII_SPEED_100;
-			speed = "100Mbps";
-		} else { /* default to 1G */
-			sc->speed = NLM_SGMII_SPEED_1000;
-			speed =  "1Gbps";
-		}
-
-		if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
-			sc->duplexity = NLM_SGMII_DUPLEX_FULL;
-			duplexity =  "full";
-		} else {
-			sc->duplexity = NLM_SGMII_DUPLEX_HALF;
-			duplexity = "half";
-		}
-
-		printf("Port [%d, %d] setup with speed=%s duplex=%s\n",
-		    sc->block, sc->port, speed, duplexity);
-
-		nlm_nae_setup_mac(sc->base_addr, sc->block, sc->port, 0, 1, 1,
-		    sc->speed, sc->duplexity);
-	}
-}
-
-/*
- * xlpge support function implementations
- */
-static void
-nlm_xlpge_release_mbuf(uint64_t paddr)
-{
-	uint64_t	mag, desc, mbuf;
-
-	paddr += (XLP_NTXFRAGS - 3) * sizeof(uint64_t);
-	mag = nlm_paddr_ld(paddr);
-	desc = nlm_paddr_ld(paddr + sizeof(uint64_t));
-	mbuf = nlm_paddr_ld(paddr + 2 * sizeof(uint64_t));
-
-	if (mag != 0xf00bad) {
-		/* somebody else packet Error - FIXME in intialization */
-		printf("cpu %d: ERR Tx packet paddr %jx, mag %jx, desc %jx mbuf %jx\n",
-		    nlm_cpuid(), (uintmax_t)paddr, (uintmax_t)mag,
-		    (intmax_t)desc, (uintmax_t)mbuf);
-		return;
-	}
-	m_freem((struct mbuf *)(uintptr_t)mbuf);
-	uma_zfree(nl_tx_desc_zone, (void *)(uintptr_t)desc);
-}
-
-static void
-nlm_xlpge_rx(struct nlm_xlpge_softc *sc, int port, vm_paddr_t paddr, int len)
-{
-	struct ifnet	*ifp;
-	struct mbuf	*m;
-	vm_offset_t	temp;
-	unsigned long	mag;
-	int		prepad_size;
-
-	ifp = sc->xlpge_if;
-	temp = nlm_paddr_ld(paddr - NAE_CACHELINE_SIZE);
-	mag = nlm_paddr_ld(paddr - NAE_CACHELINE_SIZE + sizeof(uint64_t));
-
-	m = (struct mbuf *)(intptr_t)temp;
-	if (mag != 0xf00bad) {
-		/* somebody else packet Error - FIXME in intialization */
-		printf("cpu %d: ERR Rx packet paddr %jx, temp %p, mag %lx\n",
-		    nlm_cpuid(), (uintmax_t)paddr, (void *)temp, mag);
-		return;
-	}
-
-	m->m_pkthdr.rcvif = ifp;
-
-#ifdef DUMP_PACKET
-	{
-		int     i = 0, j = 64;
-		unsigned char *buf = (char *)m->m_data;
-		printf("(cpu_%d: nlge_rx, !RX_COPY) Rx Packet: length=%d\n",
-				nlm_cpuid(), len);
-		if (len < j)
-			j = len;
-		if (sc->prepad_en)
-			j += ((sc->prepad_size + 1) * 16);
-		for (i = 0; i < j; i++) {
-			if (i && (i % 16) == 0)
-				printf("\n");
-			printf("%02x ", buf[i]);
-		}
-		printf("\n");
-	}
-#endif
-
-	if (sc->prepad_en) {
-		prepad_size = ((sc->prepad_size + 1) * 16);
-		m->m_data += prepad_size;
-		m->m_pkthdr.len = m->m_len = (len - prepad_size);
-	} else
-		m->m_pkthdr.len = m->m_len = len;
-
-	if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
-#ifdef XLP_DRIVER_LOOPBACK
-	if (port == 16 || port == 17)
-		(*ifp->if_input)(ifp, m);
-	else
-		xlpge_tx(ifp, m);
-#else
-	(*ifp->if_input)(ifp, m);
-#endif
-}
-
-void
-nlm_xlpge_submit_rx_free_desc(struct nlm_xlpge_softc *sc, int num)
-{
-	int i, size, ret, n;
-	struct nlm_fmn_msg msg;
-	void *ptr;
-
-	for(i = 0; i < num; i++) {
-		memset(&msg, 0, sizeof(msg));
-		ptr = get_buf();
-		if (!ptr) {
-			device_printf(sc->xlpge_dev, "Cannot allocate mbuf\n");
-			break;
-		}
-
-		msg.msg[0] = vtophys(ptr);
-		if (msg.msg[0] == 0) {
-			printf("Bad ptr for %p\n", ptr);
-			break;
-		}
-		size = 1;
-
-		n = 0;
-		while (1) {
-			/* on success returns 1, else 0 */
-			ret = nlm_fmn_msgsend(sc->rxfreeq, size, 0, &msg);
-			if (ret == 0)
-				break;
-			if (n++ > 10000) {
-				printf("Too many credit fails for send free desc\n");
-				break;
-			}
-		}
-	}
-}
-
-void
-nlm_xlpge_msgring_handler(int vc, int size, int code, int src_id,
-    struct nlm_fmn_msg *msg, void *data)
-{
-	uint64_t phys_addr;
-	struct nlm_xlpnae_softc *sc;
-	struct nlm_xlpge_softc *xlpge_sc;
-	struct ifnet *ifp;
-	uint32_t context;
-	uint32_t port = 0;
-	uint32_t length;
-
-	sc = (struct nlm_xlpnae_softc *)data;
-	KASSERT(sc != NULL, ("Null sc in msgring handler"));
-
-	if (size == 1) { /* process transmit complete */
-		phys_addr = msg->msg[0] & 0xffffffffffULL;
-
-		/* context is SGMII_RCV_CONTEXT_NUM + three bit vlan type
-		 * or vlan priority
-		 */
-		context = (msg->msg[0] >> 40) & 0x3fff;
-		port = cntx2port[context];
-
-		if (port >= XLP_MAX_PORTS) {
-			printf("%s:%d Bad port %d (context=%d)\n",
-				__func__, __LINE__, port, context);
-			return;
-		}
-		ifp = ifp_ports[port].xlpge_if;
-		xlpge_sc = ifp_ports[port].xlpge_sc;
-
-		nlm_xlpge_release_mbuf(phys_addr);
-
-		if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
-
-	} else if (size > 1) { /* Recieve packet */
-		phys_addr = msg->msg[1] & 0xffffffffc0ULL;
-		length = (msg->msg[1] >> 40) & 0x3fff;
-		length -= MAC_CRC_LEN;
-
-		/* context is SGMII_RCV_CONTEXT_NUM + three bit vlan type
-		 * or vlan priority
-		 */
-		context = (msg->msg[1] >> 54) & 0x3ff;
-		port = cntx2port[context];
-
-		if (port >= XLP_MAX_PORTS) {
-			printf("%s:%d Bad port %d (context=%d)\n",
-				__func__, __LINE__, port, context);
-			return;
-		}
-
-		ifp = ifp_ports[port].xlpge_if;
-		xlpge_sc = ifp_ports[port].xlpge_sc;
-
-		nlm_xlpge_rx(xlpge_sc, port, phys_addr, length);
-		/* return back a free descriptor to NA */
-		nlm_xlpge_submit_rx_free_desc(xlpge_sc, 1);
-	}
-}
diff --git a/sys/mips/nlm/dev/net/xlpge.h b/sys/mips/nlm/dev/net/xlpge.h
deleted file mode 100644
index 5aabc68cae68..000000000000
--- a/sys/mips/nlm/dev/net/xlpge.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __XLPGE_H__
-#define __XLPGE_H__
-
-#define	NLM_XLPGE_TXQ_SIZE	1024
-#define	MAC_CRC_LEN		4
-
-enum xlpge_link_state {
-	NLM_LINK_DOWN,
-	NLM_LINK_UP
-};
-
-enum xlpge_floctrl_status {
-	NLM_FLOWCTRL_DISABLED,
-	NLM_FLOWCTRL_ENABLED
-};
-
-struct nlm_xlp_portdata {
-	struct ifnet *xlpge_if;
-	struct nlm_xlpge_softc *xlpge_sc;
-};
-
-struct nlm_xlpnae_softc {
-	device_t	xlpnae_dev;
-	int		node;		/* XLP Node id */
-	uint64_t	base;		/* NAE IO base */
-	uint64_t	poe_base;	/* POE IO base */
-	uint64_t	poedv_base;	/* POE distribution vec IO base */
-
-	int		freq;		/* frequency of nae block */
-	int		flow_crc_poly;	/* Flow CRC16 polynomial */
-	int		total_free_desc; /* total for node */
-	int		max_ports;
-	int		total_num_ports;
-	int		per_port_num_flows;
-
-	u_int		nucores;
-	u_int		nblocks;
-	u_int		num_complex;
-	u_int		ncontexts;
-
-	/*  Ingress side parameters */
-	u_int		num_desc;	/* no of descriptors in each packet */
-	u_int		parser_threshold;/* threshold of entries above which */
-					/* the parser sequencer is scheduled */
-	/* NetIOR configs */
-	u_int		cmplx_type[8];		/* XXXJC: redundant? */
-	struct nae_port_config *portcfg;
-	u_int		blockmask;
-	u_int		portmask[XLP_NAE_NBLOCKS];
-	u_int		ilmask;
-	u_int		xauimask;
-	u_int		sgmiimask;
-	u_int		hw_parser_en;
-	u_int		prepad_en;
-	u_int		prepad_size;
-	u_int		driver_mode;
-	u_int		ieee_1588_en;
-};
-
-struct nlm_xlpge_softc {
-	struct ifnet	*xlpge_if;	/* should be first member */
-					/* see - mii.c:miibus_attach() */
-	device_t	xlpge_dev;
-	device_t	mii_bus;
-	struct nlm_xlpnae_softc *network_sc;
-	uint64_t	base_addr;	/* NAE IO base */
-	int		node;		/* node id (quickread) */
-	int		block;		/* network block id (quickread) */
-	int		port;		/* port id - among the 18 in XLP */
-	int		type;		/* port type - see xlp_gmac_port_types */
-	int		valid;		/* boolean: valid port or not */
-	struct mii_data	xlpge_mii;
-	int		nfree_desc;	/* No of free descriptors sent to port */
-	int		phy_addr;	/* PHY id for the interface */
-
-	int		speed;		/* Port speed */
-	int		duplexity;	/* Port duplexity */
-	int		link;		/* Port link status */
-	int		 flowctrl;	/* Port flow control setting */
-
-	unsigned char	dev_addr[ETHER_ADDR_LEN];
-	struct mtx	sc_lock;
-	int		if_flags;
-	struct nae_port_config *portcfg;
-	struct callout  xlpge_callout;
-	int		mdio_bus;
-	int		txq;
-	int		rxfreeq;
-	int		hw_parser_en;
-	int		prepad_en;
-	int		prepad_size;
-};
-
-#define	XLP_NTXFRAGS		16
-#define	NULL_VFBID		127
-
-struct xlpge_tx_desc {
-        uint64_t        frag[XLP_NTXFRAGS];
-};
-
-#define	XLPGE_LOCK_INIT(_sc, _name)	\
-	mtx_init(&(_sc)->sc_lock, _name, MTX_NETWORK_LOCK, MTX_DEF)
-#define	XLPGE_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_lock)
-#define	XLPGE_LOCK(_sc)		mtx_lock(&(_sc)->sc_lock)
-#define	XLPGE_UNLOCK(_sc)	mtx_unlock(&(_sc)->sc_lock)
-#define	XLPGE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->sc_lock, MA_OWNED)
-
-#endif
diff --git a/sys/mips/nlm/dev/sec/nlmsec.c b/sys/mips/nlm/dev/sec/nlmsec.c
deleted file mode 100644
index fb3e0b65b5a1..000000000000
--- a/sys/mips/nlm/dev/sec/nlmsec.c
+++ /dev/null
@@ -1,692 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/cdefs.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/errno.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/random.h>
-#include <sys/rman.h>
-#include <sys/uio.h>
-#include <sys/kobj.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <opencrypto/cryptodev.h>
-#include <opencrypto/xform_auth.h>
-
-#include "cryptodev_if.h"
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/xlp.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/fmn.h>
-#include <mips/nlm/hal/nlmsaelib.h>
-#include <mips/nlm/dev/sec/nlmseclib.h>
-#include <mips/nlm/hal/cop2.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/msgring.h>
-
-unsigned int creditleft;
-
-static	int xlp_sec_init(struct xlp_sec_softc *sc);
-static	int xlp_sec_probesession(device_t,
-    const struct crypto_session_params *);
-static	int xlp_sec_newsession(device_t , crypto_session_t,
-    const struct crypto_session_params *);
-static	int xlp_sec_process(device_t , struct cryptop *, int);
-static void xlp_copyiv(struct xlp_sec_softc *, struct xlp_sec_command *,
-    const struct crypto_session_params *);
-static int xlp_get_nsegs(struct cryptop *, unsigned int *);
-static int xlp_alloc_cmd_params(struct xlp_sec_command *, unsigned int);
-static void  xlp_free_cmd_params(struct xlp_sec_command *);
-
-static	int xlp_sec_probe(device_t);
-static	int xlp_sec_attach(device_t);
-static	int xlp_sec_detach(device_t);
-
-static device_method_t xlp_sec_methods[] = {
-	/* device interface */
-	DEVMETHOD(device_probe, xlp_sec_probe),
-	DEVMETHOD(device_attach, xlp_sec_attach),
-	DEVMETHOD(device_detach, xlp_sec_detach),
-
-	/* bus interface */
-	DEVMETHOD(bus_print_child, bus_generic_print_child),
-	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
-
-	/* crypto device methods */
-	DEVMETHOD(cryptodev_probesession, xlp_sec_probesession),
-	DEVMETHOD(cryptodev_newsession, xlp_sec_newsession),
-	DEVMETHOD(cryptodev_process,    xlp_sec_process),
-
-	DEVMETHOD_END
-};
-
-static driver_t xlp_sec_driver = {
-	"nlmsec",
-	xlp_sec_methods,
-	sizeof(struct xlp_sec_softc)
-};
-static devclass_t xlp_sec_devclass;
-
-DRIVER_MODULE(nlmsec, pci, xlp_sec_driver, xlp_sec_devclass, 0, 0);
-MODULE_DEPEND(nlmsec, crypto, 1, 1, 1);
-
-void
-nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
-    struct nlm_fmn_msg *msg, void *data);
-
-#ifdef NLM_SEC_DEBUG
-
-#define extract_bits(x, bitshift, bitcnt)				\
-    (((unsigned long long)x >> bitshift) & ((1ULL << bitcnt) - 1))
-
-void
-print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m)
-{
-	unsigned long long msg0,msg1,msg2,msg3,msg4,msg5,msg6,msg7,msg8;
-
-	msg0 = cmd->ctrlp->desc0;
-	msg1 = cmd->paramp->desc0;
-	msg2 = cmd->paramp->desc1;
-	msg3 = cmd->paramp->desc2;
-	msg4 = cmd->paramp->desc3;
-	msg5 = cmd->paramp->segment[0][0];
-	msg6 = cmd->paramp->segment[0][1];
-	msg7 = m.msg[0];
-	msg8 = m.msg[1];
-
-	printf("msg0 %llx msg1 %llx msg2 %llx msg3 %llx msg4 %llx msg5 %llx"
-	    "msg6 %llx msg7 %llx msg8 %llx\n", msg0, msg1, msg2, msg3, msg4,
-	    msg5, msg6, msg7, msg8);
-
-	printf("c0: hmac %d htype %d hmode %d ctype %d cmode %d arc4 %x\n",
-	    (unsigned int)extract_bits(msg0, 61, 1),
-	    (unsigned int)extract_bits(msg0, 52, 8),
-	    (unsigned int)extract_bits(msg0, 43, 8),
-	    (unsigned int)extract_bits(msg0, 34, 8),
-	    (unsigned int)extract_bits(msg0, 25, 8),
-	    (unsigned int)extract_bits(msg0, 0, 23));
-
-	printf("p0: tls %d hsrc %d hl3 %d enc %d ivl %d hd %llx\n",
-	    (unsigned int)extract_bits(msg1, 63, 1),
-	    (unsigned int)extract_bits(msg1,62,1),
-	    (unsigned int)extract_bits(msg1,60,1),
-	    (unsigned int)extract_bits(msg1,59,1),
-	    (unsigned int)extract_bits(msg1,41,16), extract_bits(msg1,0,40));
-
-	printf("p1: clen %u hl %u\n",  (unsigned int)extract_bits(msg2, 32, 32),
-	    (unsigned int)extract_bits(msg2,0,32));
-
-	printf("p2: ivoff %d cbit %d coff %d hbit %d hclb %d hoff %d\n",
-	    (unsigned int)extract_bits(msg3, 45, 17),
-	    (unsigned int)extract_bits(msg3, 42,3),
-	    (unsigned int)extract_bits(msg3, 22,16),
-	    (unsigned int)extract_bits(msg3, 19,3),
-	    (unsigned int)extract_bits(msg3, 18,1),
-	    (unsigned int)extract_bits(msg3, 0, 16));
-
-	printf("p3: desfbid %d tlen %d arc4 %x hmacpad %d\n",
-	    (unsigned int)extract_bits(msg4, 48,16),
-	    (unsigned int)extract_bits(msg4,11,16),
-	    (unsigned int)extract_bits(msg4,6,3),
-	    (unsigned int)extract_bits(msg4,5,1));
-
-	printf("p4: sflen %d sddr %llx \n",
-	    (unsigned int)extract_bits(msg5, 48, 16),extract_bits(msg5, 0, 40));
-
-	printf("p5: dflen %d cl3 %d cclob %d cdest %llx \n",
-	    (unsigned int)extract_bits(msg6, 48, 16),
-	    (unsigned int)extract_bits(msg6, 46, 1),
-	    (unsigned int)extract_bits(msg6, 41, 1), extract_bits(msg6, 0, 40));
-
-	printf("fmn0: fbid %d dfrlen %d dfrv %d cklen %d cdescaddr %llx\n",
-	    (unsigned int)extract_bits(msg7, 48, 16),
-	    (unsigned int)extract_bits(msg7,46,2),
-	    (unsigned int)extract_bits(msg7,45,1),
-	    (unsigned int)extract_bits(msg7,40,5),
-	    (extract_bits(msg7,0,34)<< 6));
-
-	printf("fmn1: arc4 %d hklen %d pdesclen %d pktdescad %llx\n",
-	    (unsigned int)extract_bits(msg8, 63, 1),
-	    (unsigned int)extract_bits(msg8,56,5),
-	    (unsigned int)extract_bits(msg8,43,12),
-	    (extract_bits(msg8,0,34) << 6));
-
-	return;
-}
-
-void
-print_cmd(struct xlp_sec_command *cmd)
-{
-	printf("session_num		:%d\n",cmd->session_num);
-	printf("crp			:0x%x\n",(uint32_t)cmd->crp);
-	printf("enccrd			:0x%x\n",(uint32_t)cmd->enccrd);
-	printf("maccrd			:0x%x\n",(uint32_t)cmd->maccrd);
-	printf("ses			:%d\n",(uint32_t)cmd->ses);
-	printf("ctrlp			:0x%x\n",(uint32_t)cmd->ctrlp);
-	printf("paramp			:0x%x\n",(uint32_t)cmd->paramp);
-	printf("hashdest		:0x%x\n",(uint32_t)cmd->hashdest);
-	printf("hashsrc			:%d\n",cmd->hashsrc);
-	printf("hmacpad			:%d\n",cmd->hmacpad);
-	printf("hashoff			:%d\n",cmd->hashoff);
-	printf("hashlen			:%d\n",cmd->hashlen);
-	printf("cipheroff		:%d\n",cmd->cipheroff);
-	printf("cipherlen		:%d\n",cmd->cipherlen);
-	printf("ivoff			:%d\n",cmd->ivoff);
-	printf("ivlen			:%d\n",cmd->ivlen);
-	printf("hashalg			:%d\n",cmd->hashalg);
-	printf("hashmode		:%d\n",cmd->hashmode);
-	printf("cipheralg		:%d\n",cmd->cipheralg);
-	printf("ciphermode		:%d\n",cmd->ciphermode);
-	printf("nsegs     		:%d\n",cmd->nsegs);
-	printf("hash_dst_len		:%d\n",cmd->hash_dst_len);
-}
-#endif /* NLM_SEC_DEBUG */
-
-static int
-xlp_sec_init(struct xlp_sec_softc *sc)
-{
-
-	/* Register interrupt handler for the SEC CMS messages */
-	if (register_msgring_handler(sc->sec_vc_start,
-	    sc->sec_vc_end, nlm_xlpsec_msgring_handler, sc) != 0) {
-		printf("Couldn't register sec msgring handler\n");
-		return (-1);
-	}
-
-	/* Do the CMS credit initialization */
-	/* Currently it is configured by default to 50 when kernel comes up */
-
-	return (0);
-}
-
-/* This function is called from an interrupt handler */
-void
-nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
-    struct nlm_fmn_msg *msg, void *data)
-{
-	struct xlp_sec_command *cmd = NULL;
-	struct xlp_sec_softc *sc = NULL;
-	uint8_t hash[HASH_MAX_LEN];
-
-	KASSERT(code == FMN_SWCODE_CRYPTO,
-	    ("%s: bad code = %d, expected code = %d\n", __FUNCTION__,
-	    code, FMN_SWCODE_CRYPTO));
-
-	sc = (struct xlp_sec_softc *)data;
-	KASSERT(src_id >= sc->sec_vc_start && src_id <= sc->sec_vc_end,
-	    ("%s: bad src_id = %d, expect %d - %d\n", __FUNCTION__,
-	    src_id, sc->sec_vc_start, sc->sec_vc_end));
-
-	cmd = (struct xlp_sec_command *)(uintptr_t)msg->msg[0];
-	KASSERT(cmd != NULL && cmd->crp != NULL,
-		("%s :cmd not received properly\n",__FUNCTION__));
-
-	KASSERT(CRYPTO_ERROR(msg->msg[1]) == 0,
-	    ("%s: Message rcv msg0 %llx msg1 %llx err %x \n", __FUNCTION__,
-	    (unsigned long long)msg->msg[0], (unsigned long long)msg->msg[1],
-	    (int)CRYPTO_ERROR(msg->msg[1])));
-
-	/* If there are not enough credits to send, then send request
-	 * will fail with ERESTART and the driver will be blocked until it is
-	 * unblocked here after knowing that there are sufficient credits to
-	 * send the request again.
-	 */
-	if (sc->sc_needwakeup) {
-		atomic_add_int(&creditleft, sc->sec_msgsz);
-		if (creditleft >= (NLM_CRYPTO_LEFT_REQS)) {
-			crypto_unblock(sc->sc_cid, sc->sc_needwakeup);
-			sc->sc_needwakeup &= ~CRYPTO_SYMQ;
-		}
-	}
-	if (cmd->hash_dst_len != 0) {
-		if (cmd->crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) {
-			crypto_copydata(cmd->crp, cmd->crp->crp_digest_start,
-			    cmd->hash_dst_len, hash);
-			if (timingsafe_bcmp(cmd->hashdest, hash,
-			    cmd->hash_dst_len) != 0)
-				cmd->crp->crp_etype = EBADMSG;
-		} else
-			crypto_copyback(cmd->crp, cmd->crp->crp_digest_start,
-			    cmd->hash_dst_len, cmd->hashdest);
-	}
-
-	/* This indicates completion of the crypto operation */
-	crypto_done(cmd->crp);
-
-	xlp_free_cmd_params(cmd);
-
-	return;
-}
-
-static int
-xlp_sec_probe(device_t dev)
-{
-	struct xlp_sec_softc *sc;
-
-	if (pci_get_vendor(dev) == PCI_VENDOR_NETLOGIC &&
-	    pci_get_device(dev) == PCI_DEVICE_ID_NLM_SAE) {
-		sc = device_get_softc(dev);
-		return (BUS_PROBE_DEFAULT);
-	}
-	return (ENXIO);
-}
-
-/*
- * Attach an interface that successfully probed.
- */
-static int
-xlp_sec_attach(device_t dev)
-{
-	struct xlp_sec_softc *sc = device_get_softc(dev);
-	uint64_t base;
-	int qstart, qnum;
-	int freq, node;
-
-	sc->sc_dev = dev;
-
-	node = nlm_get_device_node(pci_get_slot(dev));
-	freq = nlm_set_device_frequency(node, DFS_DEVICE_SAE, 250);
-	if (bootverbose)
-		device_printf(dev, "SAE Freq: %dMHz\n", freq);
-	if(pci_get_device(dev) == PCI_DEVICE_ID_NLM_SAE) {
-		device_set_desc(dev, "XLP Security Accelerator");
-		sc->sc_cid = crypto_get_driverid(dev,
-		    sizeof(struct xlp_sec_session), CRYPTOCAP_F_HARDWARE);
-		if (sc->sc_cid < 0) {
-			printf("xlp_sec - error : could not get the driver"
-			    " id\n");
-			goto error_exit;
-		}
-
-		base = nlm_get_sec_pcibase(node);
-		qstart = nlm_qidstart(base);
-		qnum = nlm_qnum(base);
-		sc->sec_vc_start = qstart;
-		sc->sec_vc_end = qstart + qnum - 1;
-	}
-
-	if (xlp_sec_init(sc) != 0)
-		goto error_exit;
-	if (bootverbose)
-		device_printf(dev, "SEC Initialization complete!\n");
-	return (0);
-
-error_exit:
-	return (ENXIO);
-
-}
-
-/*
- * Detach an interface that successfully probed.
- */
-static int
-xlp_sec_detach(device_t dev)
-{
-	return (0);
-}
-
-static bool
-xlp_sec_auth_supported(const struct crypto_session_params *csp)
-{
-
-	switch (csp->csp_auth_alg) {
-	case CRYPTO_SHA1:
-	case CRYPTO_SHA1_HMAC:
-		break;
-	default:
-		return (false);
-	}
-	return (true);
-}
-
-static bool
-xlp_sec_cipher_supported(const struct crypto_session_params *csp)
-{
-
-	switch (csp->csp_cipher_alg) {
-	case CRYPTO_AES_CBC:
-		if (csp->csp_ivlen != XLP_SEC_AES_IV_LENGTH)
-			return (false);
-		break;
-	default:
-		return (false);
-	}
-
-	return (true);
-}
-
-static int
-xlp_sec_probesession(device_t dev, const struct crypto_session_params *csp)
-{
-
-	if (csp->csp_flags != 0)
-		return (EINVAL);
-	switch (csp->csp_mode) {
-	case CSP_MODE_DIGEST:
-		if (!xlp_sec_auth_supported(csp))
-			return (EINVAL);
-		break;
-	case CSP_MODE_CIPHER:
-		if (!xlp_sec_cipher_supported(csp))
-			return (EINVAL);
-		break;
-	case CSP_MODE_ETA:
-		if (!xlp_sec_auth_supported(csp) ||
-		    !xlp_sec_cipher_supported(csp))
-			return (EINVAL);
-		break;
-	default:
-		return (EINVAL);
-	}
-	return (CRYPTODEV_PROBE_HARDWARE);
-}
-
-static int
-xlp_sec_newsession(device_t dev, crypto_session_t cses,
-    const struct crypto_session_params *csp)
-{
-	struct xlp_sec_session *ses;
-
-	ses = crypto_get_driver_session(cses);
-
-	if (csp->csp_auth_alg != 0) {
-		if (csp->csp_auth_mlen == 0)
-			ses->hs_mlen = crypto_auth_hash(csp)->hashsize;
-		else
-			ses->hs_mlen = csp->csp_auth_mlen;
-	}
-
-	return (0);
-}
-
-/*
- * XXX freesession routine should run a zero'd mac/encrypt key into context
- * ram.  to blow away any keys already stored there.
- */
-
-static void
-xlp_copyiv(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	struct cryptop *crp = NULL;
-
-	crp = cmd->crp;
-
-	if (crp->crp_flags & CRYPTO_F_IV_SEPARATE)
-		memcpy(cmd->iv, crp->crp_iv, csp->csp_ivlen);
-}
-
-static int
-xlp_get_nsegs(struct cryptop *crp, unsigned int *nsegs)
-{
-
-	switch (crp->crp_buf.cb_type) {
-	case CRYPTO_BUF_MBUF:
-	case CRYPTO_BUF_SINGLE_MBUF:
-	{
-		struct mbuf *m = NULL;
-
-		m = crp->crp_buf.cb_mbuf;
-		while (m != NULL) {
-			*nsegs += NLM_CRYPTO_NUM_SEGS_REQD(m->m_len);
-			if (crp->crp_buf.cb_type == CRYPTO_BUF_SINGLE_MBUF)
-				break;
-			m = m->m_next;
-		}
-		break;
-	}
-	case CRYPTO_BUF_UIO:
-	{
-		struct uio *uio = NULL;
-		struct iovec *iov = NULL;
-		int iol = 0;
-
-		uio = crp->crp_buf.cb_uio;
-		iov = uio->uio_iov;
-		iol = uio->uio_iovcnt;
-		while (iol > 0) {
-			*nsegs += NLM_CRYPTO_NUM_SEGS_REQD(iov->iov_len);
-			iol--;
-			iov++;
-		}
-		break;
-	}
-	case CRYPTO_BUF_CONTIG:
-		*nsegs = NLM_CRYPTO_NUM_SEGS_REQD(crp->crp_buf.cb_buf_len);
-		break;
-	default:
-		return (EINVAL);
-	}
-	return (0);
-}
-
-static int
-xlp_alloc_cmd_params(struct xlp_sec_command *cmd, unsigned int nsegs)
-{
-	int err = 0;
-
-	if(cmd == NULL) {
-		err = EINVAL;
-		goto error;
-	}
-	if ((cmd->ctrlp = malloc(sizeof(struct nlm_crypto_pkt_ctrl), M_DEVBUF,
-	    M_NOWAIT | M_ZERO)) == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	if (((uintptr_t)cmd->ctrlp & (XLP_L2L3_CACHELINE_SIZE - 1))) {
-		err = EINVAL;
-		goto error;
-	}
-	/* (nsegs - 1) because one seg is part of the structure already */
-	if ((cmd->paramp = malloc(sizeof(struct nlm_crypto_pkt_param) +
-	    (16 * (nsegs - 1)), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	if (((uintptr_t)cmd->paramp & (XLP_L2L3_CACHELINE_SIZE - 1))) {
-		err = EINVAL;
-		goto error;
-	}
-	if ((cmd->iv = malloc(EALG_MAX_BLOCK_LEN, M_DEVBUF,
-	    M_NOWAIT | M_ZERO)) == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-	if ((cmd->hashdest = malloc(HASH_MAX_LEN, M_DEVBUF,
-	    M_NOWAIT | M_ZERO)) == NULL) {
-		err = ENOMEM;
-		goto error;
-	}
-error:
-	return (err);
-}
-
-static void
-xlp_free_cmd_params(struct xlp_sec_command *cmd)
-{
-	if (cmd->ctrlp != NULL)
-		free(cmd->ctrlp, M_DEVBUF);
-	if (cmd->paramp != NULL)
-		free(cmd->paramp, M_DEVBUF);
-	if (cmd->iv != NULL)
-		free(cmd->iv, M_DEVBUF);
-	if (cmd->hashdest != NULL)
-		free(cmd->hashdest, M_DEVBUF);
-	if (cmd != NULL)
-		free(cmd, M_DEVBUF);
-	return;
-}
-
-static int
-xlp_sec_process(device_t dev, struct cryptop *crp, int hint)
-{
-	struct xlp_sec_softc *sc = device_get_softc(dev);
-	const struct crypto_session_params *csp;
-	struct xlp_sec_command *cmd = NULL;
-	int err = -1, ret = 0;
-	struct xlp_sec_session *ses;
-	unsigned int nsegs = 0;
-
-	ses = crypto_get_driver_session(crp->crp_session);
-	csp = crypto_get_params(crp->crp_session);
-
-	/*
-	 * This device only support AAD requests where the AAD is
-	 * adjacent to the payload.
-	 */
-	if (crp->crp_aad_length != 0 && crp->crp_payload_start !=
-	    crp->crp_aad_start + crp->crp_aad_length) {
-		err = EFBIG;
-		goto errout;
-	}
-
-	if ((cmd = malloc(sizeof(struct xlp_sec_command), M_DEVBUF,
-	    M_NOWAIT | M_ZERO)) == NULL) {
-		err = ENOMEM;
-		goto errout;
-	}
-
-	cmd->crp = crp;
-	cmd->ses = ses;
-	cmd->hash_dst_len = ses->hs_mlen;
-
-	if ((ret = xlp_get_nsegs(crp, &nsegs)) != 0) {
-		err = EINVAL;
-		goto errout;
-	}
-
-	if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) {
-		/* Since IV is given as separate segment to avoid copy */
-		nsegs += 1;
-	}
-	cmd->nsegs = nsegs;
-
-	if ((err = xlp_alloc_cmd_params(cmd, nsegs)) != 0)
-		goto errout;
-
-	switch (csp->csp_mode) {
-	case CSP_MODE_CIPHER:
-		if ((ret = nlm_get_cipher_param(cmd, csp)) != 0) {
-			err = EINVAL;
-			goto errout;
-		}
-		cmd->cipheroff = crp->crp_payload_start;
-		cmd->cipherlen = crp->crp_payload_length;
-		if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) {
-			cmd->cipheroff += cmd->ivlen;
-			cmd->ivoff = 0;
-		} else
-			cmd->ivoff = crp->crp_iv_start;
-		xlp_copyiv(sc, cmd, csp);
-		if ((err = nlm_crypto_do_cipher(sc, cmd, csp)) != 0)
-			goto errout;
-		break;
-	case CSP_MODE_DIGEST:
-		if ((ret = nlm_get_digest_param(cmd, csp)) != 0) {
-			err = EINVAL;
-			goto errout;
-		}
-		cmd->hashoff = crp->crp_payload_start;
-		cmd->hashlen = crp->crp_payload_length;
-		cmd->hmacpad = 0;
-		cmd->hashsrc = 0;
-		if ((err = nlm_crypto_do_digest(sc, cmd, csp)) != 0)
-			goto errout;
-		break;
-	case CSP_MODE_ETA:
-		if ((ret = nlm_get_cipher_param(cmd, csp)) != 0) {
-			err = EINVAL;
-			goto errout;
-		}
-		if ((ret = nlm_get_digest_param(cmd, csp)) != 0) {
-			err = EINVAL;
-			goto errout;
-		}
-		if (crp->crp_aad_length != 0) {
-			cmd->hashoff = crp->crp_aad_start;
-			cmd->hashlen = crp->crp_aad_length +
-			    crp->crp_payload_length;
-		} else {
-			cmd->hashoff = crp->crp_payload_start;
-			cmd->hashlen = crp->crp_payload_length;
-		}
-		cmd->hmacpad = 0;
-		if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op))
-			cmd->hashsrc = 1;
-		else
-			cmd->hashsrc = 0;
-		cmd->cipheroff = crp->crp_payload_start;
-		cmd->cipherlen = crp->crp_payload_length;
-		if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) {
-			cmd->hashoff += cmd->ivlen;
-			cmd->cipheroff += cmd->ivlen;
-			cmd->ivoff = 0;
-		} else
-			cmd->ivoff = crp->crp_iv_start;
-		xlp_copyiv(sc, cmd, csp);
-		if ((err = nlm_crypto_do_cipher_digest(sc, cmd, csp)) != 0)
-			goto errout;
-		break;
-	default:
-		err = EINVAL;
-		goto errout;
-	}
-	return (0);
-errout:
-	xlp_free_cmd_params(cmd);
-	if (err == ERESTART) {
-		sc->sc_needwakeup |= CRYPTO_SYMQ;
-		creditleft = 0;
-		return (err);
-	}
-	crp->crp_etype = err;
-	crypto_done(crp);
-	return (err);
-}
diff --git a/sys/mips/nlm/dev/sec/nlmseclib.c b/sys/mips/nlm/dev/sec/nlmseclib.c
deleted file mode 100644
index 6e5e715c28f8..000000000000
--- a/sys/mips/nlm/dev/sec/nlmseclib.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/uio.h>
-#include <machine/bus.h>
-#include <machine/md_var.h>
-#include <machine/cpuregs.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <opencrypto/cryptodev.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/cop2.h>
-#include <mips/nlm/hal/fmn.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/nlmsaelib.h>
-#include <mips/nlm/dev/sec/nlmseclib.h>
-
-static int
-nlm_crypto_complete_sec_request(struct xlp_sec_softc *sc,
-    struct xlp_sec_command *cmd)
-{
-	unsigned int fbvc;
-	struct nlm_fmn_msg m;
-	int ret;
-
-	fbvc = nlm_cpuid() / CMS_MAX_VCPU_VC;
-	m.msg[0] = m.msg[1] = m.msg[2] = m.msg[3] = 0;
-
-	m.msg[0] = nlm_crypto_form_pkt_fmn_entry0(fbvc, 0, 0,
-	    cmd->ctrlp->cipherkeylen, vtophys(cmd->ctrlp));
-
-	m.msg[1] = nlm_crypto_form_pkt_fmn_entry1(0, cmd->ctrlp->hashkeylen,
-	    NLM_CRYPTO_PKT_DESC_SIZE(cmd->nsegs), vtophys(cmd->paramp));
-
-	/* Software scratch pad */
-	m.msg[2] = (uintptr_t)cmd;
-	sc->sec_msgsz = 3;
-
-	/* Send the message to sec/rsa engine vc */
-	ret = nlm_fmn_msgsend(sc->sec_vc_start, sc->sec_msgsz,
-	    FMN_SWCODE_CRYPTO, &m);
-	if (ret != 0) {
-#ifdef NLM_SEC_DEBUG
-		printf("%s: msgsnd failed (%x)\n", __func__, ret);
-#endif
-		return (ERESTART);
-	}
-	return (0);
-}
-
-int
-nlm_crypto_form_srcdst_segs(struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	unsigned int srcseg = 0, dstseg = 0;
-	struct cryptop *crp = NULL;
-
-	crp = cmd->crp;
-
-	if (csp->csp_mode != CSP_MODE_DIGEST) {
-		/* IV is given as ONE segment to avoid copy */
-		if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) {
-			srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg,
-			    cmd->iv, cmd->ivlen);
-			dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, dstseg,
-			    cmd->iv, cmd->ivlen);
-		}
-	}
-
-	switch (crp->crp_buf.cb_type) {
-	case CRYPTO_BUF_MBUF:
-	case CRYPTO_BUF_SINGLE_MBUF:
-	{
-		struct mbuf *m = NULL;
-
-		m = crp->crp_buf.cb_mbuf;
-		while (m != NULL) {
-			srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg,
-			    mtod(m,caddr_t), m->m_len);
-			if (csp->csp_mode != CSP_MODE_DIGEST) {
-				dstseg = nlm_crypto_fill_dst_seg(cmd->paramp,
-				    dstseg, mtod(m,caddr_t), m->m_len);
-			}
-			if (crp->crp_buf.cb_type == CRYPTO_BUF_SINGLE_MBUF)
-				break;
-			m = m->m_next;
-		}
-		break;
-	}
-	case CRYPTO_BUF_UIO:
-	{
-		struct uio *uio = NULL;
-		struct iovec *iov = NULL;
-	        int iol = 0;
-
-		uio = crp->crp_buf.cb_uio;
-		iov = uio->uio_iov;
-		iol = uio->uio_iovcnt;
-
-		while (iol > 0) {
-			srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg,
-			    (caddr_t)iov->iov_base, iov->iov_len);
-			if (csp->csp_mode != CSP_MODE_DIGEST) {
-				dstseg = nlm_crypto_fill_dst_seg(cmd->paramp,
-				    dstseg, (caddr_t)iov->iov_base,
-				    iov->iov_len);
-			}
-			iov++;
-			iol--;
-		}
-	}
-	case CRYPTO_BUF_CONTIG:
-		srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg,
-		    crp->crp_buf.cb_buf, crp->crp_buf.cb_buf_len);
-		if (csp->csp_mode != CSP_MODE_DIGEST) {
-			dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, dstseg,
-			    crp->crp_buf.cb_buf, crp->crp_buf.cb_buf_len);
-		}
-		break;
-	default:
-		__assert_unreachable();
-	}
-	return (0);
-}
-
-int
-nlm_crypto_do_cipher(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	const unsigned char *cipkey = NULL;
-	int ret = 0;
-
-	if (cmd->crp->crp_cipher_key != NULL)
-		cipkey = cmd->crp->crp_cipher_key;
-	else
-		cipkey = csp->csp_cipher_key;
-	nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, 0, NLM_HASH_BYPASS, 0,
-	    cmd->cipheralg, cmd->ciphermode, cipkey,
-	    csp->csp_cipher_klen, NULL, 0);
-
-	nlm_crypto_fill_cipher_pkt_param(cmd->ctrlp, cmd->paramp,
-	    CRYPTO_OP_IS_ENCRYPT(cmd->crp->crp_op) ? 1 : 0, cmd->ivoff,
-	    cmd->ivlen, cmd->cipheroff, cmd->cipherlen);
-	nlm_crypto_form_srcdst_segs(cmd, csp);
-
-	ret = nlm_crypto_complete_sec_request(sc, cmd);
-	return (ret);
-}
-
-int
-nlm_crypto_do_digest(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	const char *key;
-	int ret=0;
-
-	if (cmd->crp->crp_auth_key != NULL)
-		key = cmd->crp->crp_auth_key;
-	else
-		key = csp->csp_auth_key;
-	nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, csp->csp_auth_klen ? 1 : 0,
-	    cmd->hashalg, cmd->hashmode, NLM_CIPHER_BYPASS, 0,
-	    NULL, 0, key, csp->csp_auth_klen);
-
-	nlm_crypto_fill_auth_pkt_param(cmd->ctrlp, cmd->paramp,
-	    cmd->hashoff, cmd->hashlen, cmd->hmacpad,
-	    (unsigned char *)cmd->hashdest);
-
-	nlm_crypto_form_srcdst_segs(cmd, csp);
-
-	ret = nlm_crypto_complete_sec_request(sc, cmd);
-
-	return (ret);
-}
-
-int
-nlm_crypto_do_cipher_digest(struct xlp_sec_softc *sc,
-    struct xlp_sec_command *cmd, const struct crypto_session_params *csp)
-{
-	const unsigned char *cipkey = NULL;
-	const char *authkey;
-	int ret=0;
-
-	if (cmd->crp->crp_cipher_key != NULL)
-		cipkey = cmd->crp->crp_cipher_key;
-	else
-		cipkey = csp->csp_cipher_key;
-	if (cmd->crp->crp_auth_key != NULL)
-		authkey = cmd->crp->crp_auth_key;
-	else
-		authkey = csp->csp_auth_key;
-	nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, csp->csp_auth_klen ? 1 : 0,
-	    cmd->hashalg, cmd->hashmode, cmd->cipheralg, cmd->ciphermode,
-	    cipkey, csp->csp_cipher_klen,
-	    authkey, csp->csp_auth_klen);
-
-	nlm_crypto_fill_cipher_auth_pkt_param(cmd->ctrlp, cmd->paramp,
-	    CRYPTO_OP_IS_ENCRYPT(cmd->crp->crp_op) ? 1 : 0, cmd->hashsrc,
-	    cmd->ivoff, cmd->ivlen, cmd->hashoff, cmd->hashlen,
-	    cmd->hmacpad, cmd->cipheroff, cmd->cipherlen,
-	    (unsigned char *)cmd->hashdest);
-
-	nlm_crypto_form_srcdst_segs(cmd, csp);
-
-	ret = nlm_crypto_complete_sec_request(sc, cmd);
-	return (ret);
-}
-
-int
-nlm_get_digest_param(struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	switch(csp->csp_auth_alg) {
-	case CRYPTO_SHA1:
-		cmd->hashalg  = NLM_HASH_SHA;
-		cmd->hashmode = NLM_HASH_MODE_SHA1;
-		break;
-	case CRYPTO_SHA1_HMAC:
-		cmd->hashalg  = NLM_HASH_SHA;
-		cmd->hashmode = NLM_HASH_MODE_SHA1;
-		break;
-	default:
-		/* Not supported */
-		return (-1);
-	}
-	return (0);
-}
-int
-nlm_get_cipher_param(struct xlp_sec_command *cmd,
-    const struct crypto_session_params *csp)
-{
-	switch(csp->csp_cipher_alg) {
-	case CRYPTO_AES_CBC:
-		cmd->cipheralg  = NLM_CIPHER_AES128;
-		cmd->ciphermode = NLM_CIPHER_MODE_CBC;
-		cmd->ivlen	= XLP_SEC_AES_IV_LENGTH;
-		break;
-	default:
-		/* Not supported */
-		return (-1);
-	}
-	return (0);
-}
diff --git a/sys/mips/nlm/dev/sec/nlmseclib.h b/sys/mips/nlm/dev/sec/nlmseclib.h
deleted file mode 100644
index 6f4d4d487e9d..000000000000
--- a/sys/mips/nlm/dev/sec/nlmseclib.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _NLMSECLIB_H_
-#define	_NLMSECLIB_H_
-
-/*
- * Cryptographic parameter definitions
- */
-#define	XLP_SEC_DES_KEY_LENGTH		8	/* Bytes */
-#define	XLP_SEC_3DES_KEY_LENGTH		24	/* Bytes */
-#define	XLP_SEC_AES128_KEY_LENGTH	16	/* Bytes */
-#define	XLP_SEC_AES192_KEY_LENGTH	24	/* Bytes */
-#define	XLP_SEC_AES256_KEY_LENGTH	32	/* Bytes */
-#define	XLP_SEC_AES128F8_KEY_LENGTH	32	/* Bytes */
-#define	XLP_SEC_AES192F8_KEY_LENGTH	48	/* Bytes */
-#define	XLP_SEC_AES256F8_KEY_LENGTH	64	/* Bytes */
-#define	XLP_SEC_KASUMI_F8_KEY_LENGTH	16	/* Bytes */
-#define	XLP_SEC_MAX_CRYPT_KEY_LENGTH	XLP_SEC_AES256F8_KEY_LENGTH
-
-#define	XLP_SEC_DES_IV_LENGTH		8	/* Bytes */
-#define	XLP_SEC_AES_IV_LENGTH		16	/* Bytes */
-#define	XLP_SEC_ARC4_IV_LENGTH		0	/* Bytes */
-#define	XLP_SEC_KASUMI_F8_IV_LENGTH	16	/* Bytes */
-#define	XLP_SEC_MAX_IV_LENGTH		16	/* Bytes */
-#define	XLP_SEC_IV_LENGTH_BYTES		8	/* Bytes */
-
-#define	XLP_SEC_AES_BLOCK_SIZE		16	/* Bytes */
-#define	XLP_SEC_DES_BLOCK_SIZE		8	/* Bytes */
-#define	XLP_SEC_3DES_BLOCK_SIZE		8	/* Bytes */
-
-#define	XLP_SEC_MD5_BLOCK_SIZE		64	/* Bytes */
-#define	XLP_SEC_SHA1_BLOCK_SIZE		64	/* Bytes */
-#define	XLP_SEC_SHA256_BLOCK_SIZE	64	/* Bytes */
-#define	XLP_SEC_SHA384_BLOCK_SIZE	128	/* Bytes */
-#define	XLP_SEC_SHA512_BLOCK_SIZE	128	/* Bytes */
-#define	XLP_SEC_GCM_BLOCK_SIZE		16	/* XXX: Bytes */
-#define	XLP_SEC_KASUMI_F9_BLOCK_SIZE	16	/* XXX: Bytes */
-#define	XLP_SEC_MAX_BLOCK_SIZE		64	/* Max of MD5/SHA */
-#define	XLP_SEC_MD5_LENGTH		16	/* Bytes */
-#define	XLP_SEC_SHA1_LENGTH		20	/* Bytes */
-#define	XLP_SEC_SHA256_LENGTH		32	/* Bytes */
-#define	XLP_SEC_SHA384_LENGTH		64	/* Bytes */
-#define	XLP_SEC_SHA512_LENGTH		64	/* Bytes */
-#define	XLP_SEC_GCM_LENGTH		16	/* Bytes */
-#define	XLP_SEC_KASUMI_F9_LENGTH	16	/* Bytes */
-#define	XLP_SEC_KASUMI_F9_RESULT_LENGTH	4	/* Bytes */
-#define	XLP_SEC_HMAC_LENGTH		64	/* Max of MD5/SHA/SHA256 */
-#define	XLP_SEC_MAX_AUTH_KEY_LENGTH	XLP_SEC_SHA512_BLOCK_SIZE
-#define	XLP_SEC_MAX_RC4_STATE_SIZE	264	/* char s[256], int i, int j */
-
-#define	CRYPTO_ERROR(msg1)	((unsigned int)msg1)
-
-#define	NLM_CRYPTO_LEFT_REQS (CMS_DEFAULT_CREDIT/2)
-#define	NLM_CRYPTO_NUM_SEGS_REQD(__bufsize)				\
-	((__bufsize + NLM_CRYPTO_MAX_SEG_LEN - 1) / NLM_CRYPTO_MAX_SEG_LEN)
-
-#define	NLM_CRYPTO_PKT_DESC_SIZE(nsegs) (32 + (nsegs * 16))
-
-extern unsigned int creditleft;
-
-struct xlp_sec_command {
-	struct cryptop *crp;
-	struct xlp_sec_session *ses;
-	struct nlm_crypto_pkt_ctrl *ctrlp;
-	struct nlm_crypto_pkt_param *paramp;
-	void *iv;
-	uint8_t des3key[24];
-	uint8_t *hashdest;
-	uint8_t hashsrc;
-	uint8_t hmacpad;
-	uint32_t hashoff;
-	uint32_t hashlen;
-	uint32_t cipheroff;
-	uint32_t cipherlen;
-	uint32_t ivoff;
-	uint32_t ivlen;
-	uint32_t hashalg;
-	uint32_t hashmode;
-	uint32_t cipheralg;
-	uint32_t ciphermode;
-	uint32_t nsegs;
-	uint32_t hash_dst_len; /* used to store hash alg dst size */
-};
-
-struct xlp_sec_session {
-	int hs_mlen;
-};
-
-/*
- * Holds data specific to nlm security accelerators
- */
-struct xlp_sec_softc {
-	device_t sc_dev;	/* device backpointer */
-	uint64_t sec_base;
-	int32_t sc_cid;
-	int sc_needwakeup;
-	uint32_t sec_vc_start;
-	uint32_t sec_vc_end;
-	uint32_t sec_msgsz;
-};
-
-#ifdef NLM_SEC_DEBUG
-void	print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m);
-void	print_cmd(struct xlp_sec_command *cmd);
-#endif
-int	nlm_crypto_form_srcdst_segs(struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-int	nlm_crypto_do_cipher(struct xlp_sec_softc *sc,
-	    struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-int	nlm_crypto_do_digest(struct xlp_sec_softc *sc,
-	    struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-int	nlm_crypto_do_cipher_digest(struct xlp_sec_softc *sc,
-	    struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-int	nlm_get_digest_param(struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-int	nlm_get_cipher_param(struct xlp_sec_command *cmd,
-	    const struct crypto_session_params *csp);
-
-#endif /* _NLMSECLIB_H_ */
diff --git a/sys/mips/nlm/dev/sec/rsa_ucode.h b/sys/mips/nlm/dev/sec/rsa_ucode.h
deleted file mode 100644
index 057a2194d17c..000000000000
--- a/sys/mips/nlm/dev/sec/rsa_ucode.h
+++ /dev/null
@@ -1,958 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _NLM_HAL_RSA_UCODE_H
-#define _NLM_HAL_RSA_UCODE_H
-static uint64_t  nlm_rsa_ucode_data [] = {
-	0x0000000000000000ULL,
-	0x00000000503840ecULL,
-	0x00000001903800ecULL,
-	0x00000002c03820ecULL,
-	0x0000003760000044ULL,
-	0x0000000000000014ULL,
-	0x000000071000000cULL,
-	0x00000007d000010cULL,
-	0x0000001b80000c0cULL,
-	0x00000000e03fc0ecULL,
-	0x00000001103fc1ecULL,
-	0x00000001403f42ecULL,
-	0x00000001403fc4ecULL,
-	0x0000003760000044ULL,
-	0x000000001800003cULL,
-	0x0000000d8000030cULL,
-	0x0000000630000044ULL,
-	0x000000002800003cULL,
-	0x0000000ef000030cULL,
-	0x0000000630000044ULL,
-	0x00000000503fc23cULL,
-	0x00000000a03fc33cULL,
-	0x00000001403fc43cULL,
-	0x00000010c000030cULL,
-	0x0000000630000044ULL,
-	0x0000000000000014ULL,
-	0x000000071000000cULL,
-	0x0000001c1000070cULL,
-	0x0000002500000d0cULL,
-	0x00000027c0000e0cULL,
-	0x0000002d60000f0cULL,
-	0x00000002603f00ecULL,
-	0x00000002603f82ecULL,
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-	0x0000000000000000ULL,
-	0x000000180306760aULL,
-	0x0000001806866d0aULL,
-	0x000000000380f502ULL,
-	0x0000005007a0450aULL,
-	0x000000300281070aULL,
-	0x000000200000502aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000002bc000006cULL,
-	0x000000000600dc02ULL,
-	0x000000500020e60aULL,
-	0x000000180086fc0aULL,
-	0x000000140107170aULL,
-	0x00000000000000c4ULL,
-	0x000000000200a102ULL,
-	0x000000500620920aULL,
-	0x000000140600c40aULL,
-	0x000000000200a002ULL,
-	0x0000005006a0820aULL,
-	0x000000140680d40aULL,
-	0x000000140200dc0aULL,
-	0x000000000700a202ULL,
-	0x0000005002a0dd0aULL,
-	0x000000000300c402ULL,
-	0x0000005003a0350aULL,
-	0x0000000000000000ULL,
-	0x000000140300670aULL,
-	0x000000000380d502ULL,
-	0x0000005007a0e60aULL,
-	0x0000000000000000ULL,
-	0x0000001407807f0aULL,
-	0x000000000380d102ULL,
-	0x000000500320c00aULL,
-	0x0000000000000000ULL,
-	0x000000140380760aULL,
-	0x0000000003007502ULL,
-	0x0000005002a0d50aULL,
-	0x000000000200f402ULL,
-	0x0000005003a0e50aULL,
-	0x000000300281070aULL,
-	0x000000200000502aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000002bc000006cULL,
-	0x000000000000df02ULL,
-	0x0000005000a0a60aULL,
-	0x000000140101170aULL,
-	0x000000140080410aULL,
-	0x00000000000000c4ULL,
-	0x000000300281020aULL,
-	0x0000003006810a0aULL,
-	0x0000003006010c0aULL,
-	0x000000200000202aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000002d1000006cULL,
-	0x000000200000a02aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000002d5000006cULL,
-	0x000000200000c02aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000002cd0000064ULL,
-	0x00000034000000d4ULL,
-	0x00000000000000c4ULL,
-	0x0000000001000002ULL,
-	0x00000006000b0003ULL,
-	0x0000000000000000ULL,
-	0x00000000000000c4ULL,
-	0x000000140001180aULL,
-	0x000000140081190aULL,
-	0x0000001401011a0aULL,
-	0x00000000000000c4ULL,
-	0x00000000000000c4ULL,
-	0x0000000001810302ULL,
-	0x0000005005a10b0aULL,
-	0x0000000002000002ULL,
-	0x000000500620110aULL,
-	0x000000140206340aULL,
-	0x000000180606cb0aULL,
-	0x0000000002000402ULL,
-	0x0000005006210c0aULL,
-	0x000000140206c40aULL,
-	0x000000300201040aULL,
-	0x00000000000000c4ULL,
-	0x0000000002801002ULL,
-	0x0000005005a10b0aULL,
-	0x000000140286b50aULL,
-	0x000000140186300aULL,
-	0x0000000002000002ULL,
-	0x000000500620110aULL,
-	0x000000140606c50aULL,
-	0x0000000002003402ULL,
-	0x0000005006210c0aULL,
-	0x000000140206c40aULL,
-	0x000000300201040aULL,
-	0x00000000000000c4ULL,
-	0x000000040400000aULL,
-	0x000000000000002cULL,
-	0x0000000c0000800eULL,
-	0x0000000c0400880aULL,
-	0x000000080000007cULL,
-	0x0000000004000002ULL,
-	0x00000006808b0013ULL,
-	0x0000000000000034ULL,
-	0x0000000000000002ULL,
-	0x0000002ff000005cULL,
-	0x0000002f4000004cULL,
-	0x00000002000b0101ULL,
-	0x0000000a000b0003ULL,
-	0x0000003760000044ULL,
-	0x0000000000000034ULL,
-	0x0000000c0000000aULL,
-	0x0000002ff0000054ULL,
-	0x0000000c0000800aULL,
-	0x0000002fb000004cULL,
-	0x0000003640000044ULL,
-	0x0000000c0000800aULL,
-	0x000000040400000aULL,
-	0x000000000000002cULL,
-	0x0000000c0000800eULL,
-	0x0000000c0400880aULL,
-	0x000000080000007cULL,
-	0x000000040400000aULL,
-	0x000000000000002cULL,
-	0x0000000c0000800eULL,
-	0x0000000c0400880aULL,
-	0x000000080000007cULL,
-	0x0000003640000044ULL,
-	0x000000080180000aULL,
-	0x0000000001820002ULL,
-	0x00000007040b0013ULL,
-	0x000000040200000aULL,
-	0x000000000000002cULL,
-	0x0000000c0180430eULL,
-	0x0000000c0200440aULL,
-	0x000000080000007cULL,
-	0x0000000001010002ULL,
-	0x00000006108b0093ULL,
-	0x0000000005010002ULL,
-	0x00000006108b0093ULL,
-	0x0000000000000000ULL,
-	0x00000032e01f80e4ULL,
-	0x00000034401f81e4ULL,
-	0x00000034601f82e4ULL,
-	0x0000000c0181020aULL,
-	0x0000000c0181030aULL,
-	0x0000001c000000d4ULL,
-	0x0000000000004002ULL,
-	0x0000005000a0410aULL,
-	0x0000000001004202ULL,
-	0x000000500021000aULL,
-	0x0000000000810102ULL,
-	0x000000500121020aULL,
-	0x000000200000202aULL,
-	0x00000000000000fcULL,
-	0x0000000c000000a4ULL,
-	0x0000000000000002ULL,
-	0x0000000600098003ULL,
-	0x0000000000810002ULL,
-	0x0000000610898093ULL,
-	0x0000003760000044ULL,
-	0x0000000004000002ULL,
-	0x00000006808b0013ULL,
-	0x0000000004800102ULL,
-	0x00000006808b0013ULL,
-	0x0000000005000202ULL,
-	0x00000006808b0013ULL,
-	0x0000000000000034ULL,
-	0x0000000000000002ULL,
-	0x000000342000005cULL,
-	0x000000334000004cULL,
-	0x0000001000000084ULL,
-	0x00000006000b0009ULL,
-	0x00000002000b0101ULL,
-	0x0000002000000084ULL,
-	0x00000006000b0009ULL,
-	0x0000003760000044ULL,
-	0x0000000000000034ULL,
-	0x00000034000000d4ULL,
-	0x0000003420000054ULL,
-	0x00000038000000d4ULL,
-	0x00000033e000004cULL,
-	0x00000031d0000044ULL,
-	0x00000038000000d4ULL,
-	0x00000031d0000044ULL,
-	0x00000034000000d4ULL,
-	0x00000031d0000044ULL,
-	0x000000080180000aULL,
-	0x0000000001820002ULL,
-	0x00000007040b0013ULL,
-	0x0000000005840002ULL,
-	0x00000007040b0013ULL,
-	0x0000003c000000d4ULL,
-	0x00000004000000a4ULL,
-	0x000000200000402aULL,
-	0x0000000000000012ULL,
-	0x00000000000b0001ULL,
-	0x0000000000098101ULL,
-	0x0000003760000044ULL,
-	0x000000040200000aULL,
-	0x000000000000002cULL,
-	0x0000000c0000400eULL,
-	0x0000000c0200440aULL,
-	0x000000080000007cULL,
-	0x00000036c01f87e4ULL,
-	0x00000036401f89e4ULL,
-	0x000000040200000aULL,
-	0x000000000000002cULL,
-	0x0000000c0400480eULL,
-	0x0000000c0200440aULL,
-	0x000000080000007cULL,
-	0x00000036a01f86e4ULL,
-	0x000000080180000aULL,
-	0x00000036601f84e4ULL,
-	0x00000036801f85e4ULL,
-	0x000000300001000aULL,
-	0x0000003760000044ULL,
-	0x000000140006800aULL,
-	0x0000003640000044ULL,
-	0x000000180006800aULL,
-	0x0000003640000044ULL,
-	0x0000000c0000800aULL,
-	0x0000003640000044ULL,
-	0x0000000c0181080aULL,
-	0x0000001c000000d4ULL,
-	0x00000004000000a4ULL,
-	0x0000000c0000400aULL,
-	0x0000003640000044ULL,
-	0x0000000c0181000aULL,
-	0x0000001c000000d4ULL,
-	0x00000004000000a4ULL,
-	0x000000140001140aULL,
-	0x0000003640000044ULL,
-	0x0000000c000000a4ULL,
-	0x0000000000000044ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-	0x0000000000000000ULL,
-};
-
-#endif /* _NLM_HAL_RSA_UCODE_H_ */
diff --git a/sys/mips/nlm/files.xlp b/sys/mips/nlm/files.xlp
deleted file mode 100644
index ecb2477bab06..000000000000
--- a/sys/mips/nlm/files.xlp
+++ /dev/null
@@ -1,38 +0,0 @@
-# $FreeBSD$
-mips/nlm/hal/nlm_hal.c				standard
-mips/nlm/hal/fmn.c				standard
-mips/nlm/xlp_machdep.c				standard
-mips/nlm/intr_machdep.c				standard
-mips/nlm/tick.c					standard
-mips/nlm/board.c				standard
-mips/nlm/cms.c					standard
-mips/nlm/bus_space_rmi.c			standard
-mips/nlm/bus_space_rmi_pci.c			standard
-mips/nlm/mpreset.S				standard
-mips/nlm/board_eeprom.c				standard
-mips/nlm/board_cpld.c				standard
-mips/nlm/xlp_simplebus.c			optional fdt
-mips/nlm/xlp_pci.c				optional pci
-mips/nlm/uart_cpu_xlp.c				optional uart
-mips/nlm/usb_init.c				optional usb
-#
-# Network driver and micro-core code
-mips/nlm/dev/net/nae.c				optional xlpge
-mips/nlm/dev/net/mdio.c				optional xlpge
-mips/nlm/dev/net/sgmii.c			optional xlpge
-mips/nlm/dev/net/xaui.c				optional xlpge
-mips/nlm/dev/net/xlpge.c			optional xlpge
-ucore_app.bin					optional xlpge	\
-	compile-with	"${CC} -EB -march=mips32 -mabi=32 -msoft-float -I. -I$S -O3 -funroll-loops -fomit-frame-pointer -Wno-unused-command-line-argument -mno-branch-likely -fno-pic -mno-abicalls -ffunction-sections -fdata-sections -G0 -Wall -Werror -c $S/$M/nlm/dev/net/ucore/crt0_basic.S  $S/$M/nlm/dev/net/ucore/ucore_app.c && ${LD} -melf32btsmip_fbsd -d -warn-common -T$S/$M/nlm/dev/net/ucore/ld.ucore.S crt0_basic.o ucore_app.o -o ucore_app && ${OBJCOPY} -S -O binary -R .note -R .comment ucore_app ${.TARGET}" \
-	no-obj no-implicit-rule	before-depend			\
-	clean		"crt0_basic.o ucore_app.o ucore_app ucore_app.bin"
-ucore_app_bin.h					optional xlpge	\
-	dependency	"ucore_app.bin"				\
-	compile-with	"file2c -sx 'static char ucore_app_bin[] = {' '};' < ucore_app.bin > ${.TARGET}" \
-	no-obj no-implicit-rule	before-depend			\
-	clean		"ucore_app_bin.h"
-#
-# Security Driver
-#
-mips/nlm/dev/sec/nlmsec.c			optional nlmsec
-mips/nlm/dev/sec/nlmseclib.c			optional nlmsec
diff --git a/sys/mips/nlm/hal/bridge.h b/sys/mips/nlm/hal/bridge.h
deleted file mode 100644
index 9374a7cdcfe7..000000000000
--- a/sys/mips/nlm/hal/bridge.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_BRIDGE_H__
-#define	__NLM_HAL_BRIDGE_H__
-
-/**
-* @file_name mio.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP memory and io subsystem
-*/
-
-/*
- * BRIDGE specific registers
- *
- * These registers start after the PCIe header, which has 0x40
- * standard entries
- */
-#define	BRIDGE_MODE			0x00
-#define	BRIDGE_PCI_CFG_BASE		0x01
-#define	BRIDGE_PCI_CFG_LIMIT		0x02
-#define	BRIDGE_PCIE_CFG_BASE		0x03
-#define	BRIDGE_PCIE_CFG_LIMIT		0x04
-#define	BRIDGE_BUSNUM_BAR0		0x05
-#define	BRIDGE_BUSNUM_BAR1		0x06
-#define	BRIDGE_BUSNUM_BAR2		0x07
-#define	BRIDGE_BUSNUM_BAR3		0x08
-#define	BRIDGE_BUSNUM_BAR4		0x09
-#define	BRIDGE_BUSNUM_BAR5		0x0a
-#define	BRIDGE_BUSNUM_BAR6		0x0b
-#define	BRIDGE_FLASH_BAR0		0x0c
-#define	BRIDGE_FLASH_BAR1		0x0d
-#define	BRIDGE_FLASH_BAR2		0x0e
-#define	BRIDGE_FLASH_BAR3		0x0f
-#define	BRIDGE_FLASH_LIMIT0		0x10
-#define	BRIDGE_FLASH_LIMIT1		0x11
-#define	BRIDGE_FLASH_LIMIT2		0x12
-#define	BRIDGE_FLASH_LIMIT3		0x13
-
-#define	BRIDGE_DRAM_BAR(i)		(0x14 + (i))
-#define	BRIDGE_DRAM_BAR0		0x14
-#define	BRIDGE_DRAM_BAR1		0x15
-#define	BRIDGE_DRAM_BAR2		0x16
-#define	BRIDGE_DRAM_BAR3		0x17
-#define	BRIDGE_DRAM_BAR4		0x18
-#define	BRIDGE_DRAM_BAR5		0x19
-#define	BRIDGE_DRAM_BAR6		0x1a
-#define	BRIDGE_DRAM_BAR7		0x1b
-
-#define	BRIDGE_DRAM_LIMIT(i)		(0x1c + (i))
-#define	BRIDGE_DRAM_LIMIT0		0x1c
-#define	BRIDGE_DRAM_LIMIT1		0x1d
-#define	BRIDGE_DRAM_LIMIT2		0x1e
-#define	BRIDGE_DRAM_LIMIT3		0x1f
-#define	BRIDGE_DRAM_LIMIT4		0x20
-#define	BRIDGE_DRAM_LIMIT5		0x21
-#define	BRIDGE_DRAM_LIMIT6		0x22
-#define	BRIDGE_DRAM_LIMIT7		0x23
-
-#define	BRIDGE_DRAM_NODE_TRANSLN0	0x24
-#define	BRIDGE_DRAM_NODE_TRANSLN1	0x25
-#define	BRIDGE_DRAM_NODE_TRANSLN2	0x26
-#define	BRIDGE_DRAM_NODE_TRANSLN3	0x27
-#define	BRIDGE_DRAM_NODE_TRANSLN4	0x28
-#define	BRIDGE_DRAM_NODE_TRANSLN5	0x29
-#define	BRIDGE_DRAM_NODE_TRANSLN6	0x2a
-#define	BRIDGE_DRAM_NODE_TRANSLN7	0x2b
-#define	BRIDGE_DRAM_CHNL_TRANSLN0	0x2c
-#define	BRIDGE_DRAM_CHNL_TRANSLN1	0x2d
-#define	BRIDGE_DRAM_CHNL_TRANSLN2	0x2e
-#define	BRIDGE_DRAM_CHNL_TRANSLN3	0x2f
-#define	BRIDGE_DRAM_CHNL_TRANSLN4	0x30
-#define	BRIDGE_DRAM_CHNL_TRANSLN5	0x31
-#define	BRIDGE_DRAM_CHNL_TRANSLN6	0x32
-#define	BRIDGE_DRAM_CHNL_TRANSLN7	0x33
-#define	BRIDGE_PCIEMEM_BASE0		0x34
-#define	BRIDGE_PCIEMEM_BASE1		0x35
-#define	BRIDGE_PCIEMEM_BASE2		0x36
-#define	BRIDGE_PCIEMEM_BASE3		0x37
-#define	BRIDGE_PCIEMEM_LIMIT0		0x38
-#define	BRIDGE_PCIEMEM_LIMIT1		0x39
-#define	BRIDGE_PCIEMEM_LIMIT2		0x3a
-#define	BRIDGE_PCIEMEM_LIMIT3		0x3b
-#define	BRIDGE_PCIEIO_BASE0		0x3c
-#define	BRIDGE_PCIEIO_BASE1		0x3d
-#define	BRIDGE_PCIEIO_BASE2		0x3e
-#define	BRIDGE_PCIEIO_BASE3		0x3f
-#define	BRIDGE_PCIEIO_LIMIT0		0x40
-#define	BRIDGE_PCIEIO_LIMIT1		0x41
-#define	BRIDGE_PCIEIO_LIMIT2		0x42
-#define	BRIDGE_PCIEIO_LIMIT3		0x43
-#define	BRIDGE_PCIEMEM_BASE4		0x44
-#define	BRIDGE_PCIEMEM_BASE5		0x45
-#define	BRIDGE_PCIEMEM_BASE6		0x46
-#define	BRIDGE_PCIEMEM_LIMIT4		0x47
-#define	BRIDGE_PCIEMEM_LIMIT5		0x48
-#define	BRIDGE_PCIEMEM_LIMIT6		0x49
-#define	BRIDGE_PCIEIO_BASE4		0x4a
-#define	BRIDGE_PCIEIO_BASE5		0x4b
-#define	BRIDGE_PCIEIO_BASE6		0x4c
-#define	BRIDGE_PCIEIO_LIMIT4		0x4d
-#define	BRIDGE_PCIEIO_LIMIT5		0x4e
-#define	BRIDGE_PCIEIO_LIMIT6		0x4f
-#define	BRIDGE_NBU_EVENT_CNT_CTL	0x50
-#define	BRIDGE_EVNTCTR1_LOW		0x51
-#define	BRIDGE_EVNTCTR1_HI		0x52
-#define	BRIDGE_EVNT_CNT_CTL2		0x53
-#define	BRIDGE_EVNTCTR2_LOW		0x54
-#define	BRIDGE_EVNTCTR2_HI		0x55
-#define	BRIDGE_TRACEBUF_MATCH0		0x56
-#define	BRIDGE_TRACEBUF_MATCH1		0x57
-#define	BRIDGE_TRACEBUF_MATCH_LOW	0x58
-#define	BRIDGE_TRACEBUF_MATCH_HI	0x59
-#define	BRIDGE_TRACEBUF_CTRL		0x5a
-#define	BRIDGE_TRACEBUF_INIT		0x5b
-#define	BRIDGE_TRACEBUF_ACCESS		0x5c
-#define	BRIDGE_TRACEBUF_READ_DATA0	0x5d
-#define	BRIDGE_TRACEBUF_READ_DATA1	0x5d
-#define	BRIDGE_TRACEBUF_READ_DATA2	0x5f
-#define	BRIDGE_TRACEBUF_READ_DATA3	0x60
-#define	BRIDGE_TRACEBUF_STATUS		0x61
-#define	BRIDGE_ADDRESS_ERROR0		0x62
-#define	BRIDGE_ADDRESS_ERROR1		0x63
-#define	BRIDGE_ADDRESS_ERROR2		0x64
-#define	BRIDGE_TAG_ECC_ADDR_ERROR0	0x65
-#define	BRIDGE_TAG_ECC_ADDR_ERROR1	0x66
-#define	BRIDGE_TAG_ECC_ADDR_ERROR2	0x67
-#define	BRIDGE_LINE_FLUSH0		0x68
-#define	BRIDGE_LINE_FLUSH1		0x69
-#define	BRIDGE_NODE_ID			0x6a
-#define	BRIDGE_ERROR_INTERRUPT_EN	0x6b
-#define	BRIDGE_PCIE0_WEIGHT		0x2c0
-#define	BRIDGE_PCIE1_WEIGHT		0x2c1
-#define	BRIDGE_PCIE2_WEIGHT		0x2c2
-#define	BRIDGE_PCIE3_WEIGHT		0x2c3
-#define	BRIDGE_USB_WEIGHT		0x2c4
-#define	BRIDGE_NET_WEIGHT		0x2c5
-#define	BRIDGE_POE_WEIGHT		0x2c6
-#define	BRIDGE_CMS_WEIGHT		0x2c7
-#define	BRIDGE_DMAENG_WEIGHT		0x2c8
-#define	BRIDGE_SEC_WEIGHT		0x2c9
-#define	BRIDGE_COMP_WEIGHT		0x2ca
-#define	BRIDGE_GIO_WEIGHT		0x2cb
-#define	BRIDGE_FLASH_WEIGHT		0x2cc
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_bridge_reg(b, r)	nlm_read_reg(b, r)
-#define	nlm_write_bridge_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_get_bridge_pcibase(node)	\
-			nlm_pcicfg_base(XLP_IO_BRIDGE_OFFSET(node))
-#define	nlm_get_bridge_regbase(node)	\
-			(nlm_get_bridge_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-#endif
-#endif
diff --git a/sys/mips/nlm/hal/cop2.h b/sys/mips/nlm/hal/cop2.h
deleted file mode 100644
index 80ec474a242f..000000000000
--- a/sys/mips/nlm/hal/cop2.h
+++ /dev/null
@@ -1,304 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_COP2_H__
-#define	__NLM_HAL_COP2_H__
-
-#define	COP2_TX_BUF		0
-#define	COP2_RX_BUF		1
-#define	COP2_TXMSGSTATUS	2
-#define	COP2_RXMSGSTATUS	3
-#define	COP2_MSGSTATUS1		4
-#define	COP2_MSGCONFIG		5
-#define	COP2_MSGERROR		6
-
-#define	CROSSTHR_POPQ_EN	0x01
-#define	VC0_POPQ_EN		0x02
-#define	VC1_POPQ_EN		0x04
-#define	VC2_POPQ_EN		0x08
-#define	VC3_POPQ_EN		0x10
-#define	ALL_VC_POPQ_EN		0x1E
-#define	ALL_VC_CT_POPQ_EN	0x1F
-
-struct nlm_fmn_msg {
-	uint64_t msg[4];
-};
-
-#define	NLM_DEFINE_COP2_ACCESSORS32(name, reg, sel)		\
-static inline uint32_t nlm_read_c2_##name(void)			\
-{								\
-	uint32_t __rv;						\
-	__asm__ __volatile__ (					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"mfc2	%0, $%1, %2\n"					\
-	".set	pop\n"						\
-	: "=r" (__rv)						\
-	: "i" (reg), "i" (sel));				\
-	return __rv;						\
-}								\
-								\
-static inline void nlm_write_c2_##name(uint32_t val)		\
-{								\
-	__asm__ __volatile__(					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"mtc2	%0, $%1, %2\n"					\
-	".set	pop\n"						\
-	: : "r" (val), "i" (reg), "i" (sel));			\
-} struct __hack
-
-#if (__mips == 64)
-#define	NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel)		\
-static inline uint64_t nlm_read_c2_##name(void)			\
-{								\
-	uint64_t __rv;						\
-	__asm__ __volatile__ (					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"dmfc2	%0, $%1, %2\n"					\
-	".set	pop\n"						\
-	: "=r" (__rv)						\
-	: "i" (reg), "i" (sel));				\
-	return __rv;						\
-}								\
-								\
-static inline void nlm_write_c2_##name(uint64_t val)		\
-{								\
-	__asm__ __volatile__ (					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"dmtc2	%0, $%1, %2\n"					\
-	".set	pop\n"						\
-	: : "r" (val), "i" (reg), "i" (sel));			\
-} struct __hack
-
-#else
-
-#define	NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel)		\
-static inline uint64_t nlm_read_c2_##name(void)			\
-{								\
-	uint32_t __high, __low;					\
-	__asm__ __volatile__ (					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"dmfc2	$8, $%2, %3\n"					\
-	"dsra32	%0, $8, 0\n"					\
-	"sll	%1, $8, 0\n"					\
-	".set	pop\n"						\
-	: "=r"(__high), "=r"(__low)				\
-	: "i"(reg), "i"(sel)					\
-	: "$8");						\
-								\
-	return ((uint64_t)__high << 32) | __low;		\
-}								\
-								\
-static inline void nlm_write_c2_##name(uint64_t val)		\
-{								\
-	uint32_t __high = val >> 32;				\
-	uint32_t __low = val & 0xffffffff;			\
-	__asm__ __volatile__ (					\
-	".set	push\n"						\
-	".set	noreorder\n"					\
-	".set	mips64\n"					\
-	"dsll32	$8, %1, 0\n"					\
-	"dsll32	$9, %0, 0\n"					\
-	"dsrl32	$8, $8, 0\n"					\
-	"or	$8, $8, $9\n"					\
-	"dmtc2	$8, $%2, %3\n"					\
-	".set	pop\n"						\
-	: : "r"(__high), "r"(__low),  "i"(reg), "i"(sel)	\
-	: "$8", "$9");						\
-} struct __hack
-
-#endif
-
-NLM_DEFINE_COP2_ACCESSORS64(txbuf0, COP2_TX_BUF, 0);
-NLM_DEFINE_COP2_ACCESSORS64(txbuf1, COP2_TX_BUF, 1);
-NLM_DEFINE_COP2_ACCESSORS64(txbuf2, COP2_TX_BUF, 2);
-NLM_DEFINE_COP2_ACCESSORS64(txbuf3, COP2_TX_BUF, 3);
-
-NLM_DEFINE_COP2_ACCESSORS64(rxbuf0, COP2_RX_BUF, 0);
-NLM_DEFINE_COP2_ACCESSORS64(rxbuf1, COP2_RX_BUF, 1);
-NLM_DEFINE_COP2_ACCESSORS64(rxbuf2, COP2_RX_BUF, 2);
-NLM_DEFINE_COP2_ACCESSORS64(rxbuf3, COP2_RX_BUF, 3);
-
-NLM_DEFINE_COP2_ACCESSORS32(txmsgstatus, COP2_TXMSGSTATUS, 0);
-NLM_DEFINE_COP2_ACCESSORS32(rxmsgstatus, COP2_RXMSGSTATUS, 0);
-NLM_DEFINE_COP2_ACCESSORS32(msgstatus1, COP2_MSGSTATUS1, 0);
-NLM_DEFINE_COP2_ACCESSORS32(msgconfig, COP2_MSGCONFIG, 0);
-NLM_DEFINE_COP2_ACCESSORS32(msgerror0, COP2_MSGERROR, 0);
-NLM_DEFINE_COP2_ACCESSORS32(msgerror1, COP2_MSGERROR, 1);
-NLM_DEFINE_COP2_ACCESSORS32(msgerror2, COP2_MSGERROR, 2);
-NLM_DEFINE_COP2_ACCESSORS32(msgerror3, COP2_MSGERROR, 3);
-
-/* successful completion returns 1, else 0 */
-static inline int
-nlm_msgsend(int val)
-{
-	int result;
-	__asm__ volatile (
-		".set push\n"
-		".set noreorder\n"
-		".set mips64\n"
-		"move	$8, %1\n"
-		"sync\n"
-		"/* msgsnds	$9, $8 */\n"
-		".word	0x4a084801\n"
-		"move	%0, $9\n"
-		".set pop\n"
-		: "=r" (result)
-		: "r" (val)
-		: "$8", "$9");
-	return result;
-}
-
-static inline int
-nlm_msgld(int vc)
-{
-	int val;
-	__asm__ volatile (
-		".set push\n"
-		".set noreorder\n"
-		".set mips64\n"
-		"move	$8, %1\n"
-		"/* msgld	$9, $8 */\n"
-		".word 0x4a084802\n"
-		"move	%0, $9\n"
-		".set pop\n"
-		: "=r" (val)
-		: "r" (vc)
-		: "$8", "$9");
-	return val;
-}
-
-static inline void
-nlm_msgwait(int vc)
-{
-	__asm__ volatile (
-		".set push\n"
-		".set noreorder\n"
-		".set mips64\n"
-		"move	$8, %0\n"
-		"/* msgwait	$8 */\n"
-		".word 0x4a080003\n"
-		".set pop\n"
-		: : "r" (vc)
-		: "$8");
-}
-
-static inline int
-nlm_fmn_msgsend(int dstid, int size, int swcode, struct nlm_fmn_msg *m)
-{
-	uint32_t flags, status;
-	int rv;
-
-	size -= 1;
-	flags = nlm_save_flags_cop2();
-	switch (size) {
-	case 3:
-		nlm_write_c2_txbuf3(m->msg[3]);
-	case 2:
-		nlm_write_c2_txbuf2(m->msg[2]);
-	case 1:
-		nlm_write_c2_txbuf1(m->msg[1]);
-	case 0:
-		nlm_write_c2_txbuf0(m->msg[0]);
-	}
-
-	dstid |= ((swcode << 24) | (size << 16));
-	status = nlm_msgsend(dstid);
-	rv = !status;
-	if (rv != 0)
-		rv = nlm_read_c2_txmsgstatus();
-	nlm_restore_flags(flags);
-
-	return rv;
-}
-
-static inline int
-nlm_fmn_msgrcv(int vc, int *srcid, int *size, int *code, struct nlm_fmn_msg *m)
-{
-	uint32_t status;
-	uint32_t msg_status, flags;
-	int tmp_sz, rv;
-
-	flags = nlm_save_flags_cop2();
-	status = nlm_msgld(vc); /* will return 0, if error */
-	rv = !status;
-	if (rv == 0) {
-		msg_status = nlm_read_c2_rxmsgstatus();
-		*size = ((msg_status >> 26) & 0x3) + 1;
-		*code = (msg_status >> 18) & 0xff;
-		*srcid = (msg_status >> 4) & 0xfff;
-		tmp_sz = *size - 1;
-		switch (tmp_sz) {
-		case 3:
-			m->msg[3] = nlm_read_c2_rxbuf3();
-		case 2:
-			m->msg[2] = nlm_read_c2_rxbuf2();
-		case 1:
-			m->msg[1] = nlm_read_c2_rxbuf1();
-		case 0:
-			m->msg[0] = nlm_read_c2_rxbuf0();
-		}
-	}
-	nlm_restore_flags(flags);
-
-	return rv;
-}
-
-static inline void
-nlm_fmn_cpu_init(int int_vec, int ecc_en, int v0pe, int v1pe, int v2pe, int v3pe)
-{
-	uint32_t val = nlm_read_c2_msgconfig();
-
-	/* Note: in XLP PRM 0.8.1, the int_vec bits are un-documented
-	 * in msgconfig register of cop2.
-	 * As per chip/cpu RTL, [16:20] bits consist of int_vec.
-	 */
-	val |= (((int_vec & 0x1f) << 16) |
-		((ecc_en & 0x1) << 8) |
-		((v3pe & 0x1) << 4) |
-		((v2pe & 0x1) << 3) |
-		((v1pe & 0x1) << 2) |
-		((v0pe & 0x1) << 1));
-
-	nlm_write_c2_msgconfig(val);
-}
-#endif
diff --git a/sys/mips/nlm/hal/cpucontrol.h b/sys/mips/nlm/hal/cpucontrol.h
deleted file mode 100644
index 501b80db5fac..000000000000
--- a/sys/mips/nlm/hal/cpucontrol.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_CPUCONTROL_H__
-#define	__NLM_HAL_CPUCONTROL_H__
-
-#define	CPU_BLOCKID_IFU		0
-#define	CPU_BLOCKID_ICU		1
-#define	CPU_BLOCKID_IEU		2
-#define	CPU_BLOCKID_LSU		3
-#define	CPU_BLOCKID_MMU		4
-#define	CPU_BLOCKID_PRF		5
-#define	CPU_BLOCKID_SCH		7
-#define	CPU_BLOCKID_SCU		8
-#define	CPU_BLOCKID_FPU		9
-#define	CPU_BLOCKID_MAP		10
-
-#define	LSU_DEFEATURE		0x304
-#define	LSU_DEBUG_ADDR		0x305
-#define	LSU_DEBUG_DATA0		0x306
-#define	LSU_CERRLOG_REGID	0x09
-#define	SCHED_DEFEATURE		0x700
-
-/* Offsets of interest from the 'MAP' Block */
-#define	MAP_THREADMODE			0x00
-#define	MAP_EXT_EBASE_ENABLE		0x04
-#define	MAP_CCDI_CONFIG			0x08
-#define	MAP_THRD0_CCDI_STATUS		0x0c
-#define	MAP_THRD1_CCDI_STATUS		0x10
-#define	MAP_THRD2_CCDI_STATUS		0x14
-#define	MAP_THRD3_CCDI_STATUS		0x18
-#define	MAP_THRD0_DEBUG_MODE		0x1c
-#define	MAP_THRD1_DEBUG_MODE		0x20
-#define	MAP_THRD2_DEBUG_MODE		0x24
-#define	MAP_THRD3_DEBUG_MODE		0x28
-#define	MAP_MISC_STATE			0x60
-#define	MAP_DEBUG_READ_CTL		0x64
-#define	MAP_DEBUG_READ_REG0		0x68
-#define	MAP_DEBUG_READ_REG1		0x6c
-
-#define	MMU_SETUP		0x400
-#define	MMU_LFSRSEED		0x401
-#define	MMU_HPW_NUM_PAGE_LVL	0x410
-#define	MMU_PGWKR_PGDBASE	0x411
-#define	MMU_PGWKR_PGDSHFT	0x412
-#define	MMU_PGWKR_PGDMASK	0x413
-#define	MMU_PGWKR_PUDSHFT	0x414
-#define	MMU_PGWKR_PUDMASK	0x415
-#define	MMU_PGWKR_PMDSHFT	0x416
-#define	MMU_PGWKR_PMDMASK	0x417
-#define	MMU_PGWKR_PTESHFT	0x418
-#define	MMU_PGWKR_PTEMASK	0x419
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-#if defined(__mips_n64) || defined(__mips_n32)
-static __inline uint64_t
-nlm_mfcr(uint32_t reg)
-{
-	uint64_t res;
-
-	__asm__ __volatile__(
-	    ".set	push\n\t"
-	    ".set	noreorder\n\t"
-	    "move	$9, %1\n\t"
-	    ".word	0x71280018\n\t"  /* mfcr $8, $9 */
-	    "move	%0, $8\n\t"
-	    ".set	pop\n"
-	    : "=r" (res) : "r"(reg)
-	    : "$8", "$9"
-	);
-	return (res);
-}
-
-static __inline void
-nlm_mtcr(uint32_t reg, uint64_t value)
-{
-	__asm__ __volatile__(
-	    ".set	push\n\t"
-	    ".set	noreorder\n\t"
-	    "move	$8, %0\n"
-	    "move	$9, %1\n"
-	    ".word	0x71280019\n"    /* mtcr $8, $9  */
-	    ".set	pop\n"
-	    :
-	    : "r" (value), "r" (reg)
-	    : "$8", "$9"
-	);
-}
-
-#else /* !(defined(__mips_n64) || defined(__mips_n32)) */
-
-static __inline__  uint64_t
-nlm_mfcr(uint32_t reg)
-{
-	uint32_t hi, lo;
-
-	__asm__ __volatile__ (
-	    ".set push\n"
-	    ".set mips64\n"
-	    "move   $8, %2\n"
-	    ".word  0x71090018\n"
-	    "nop	\n"
-	    "dsra32 %0, $9, 0\n"
-	    "sll    %1, $9, 0\n"
-	    ".set pop\n"
-	    : "=r"(hi), "=r"(lo)
-	    : "r"(reg) : "$8", "$9");
-
-	return (((uint64_t)hi) << 32) | lo;
-}
-
-static __inline__  void
-nlm_mtcr(uint32_t reg, uint64_t val)
-{
-	uint32_t hi, lo;
-
-	hi = val >> 32;
-	lo = val & 0xffffffff;
-
-	__asm__ __volatile__ (
-	    ".set push\n"
-	    ".set mips64\n"
-	    "move   $9, %0\n"
-	    "dsll32 $9, %1, 0\n"
-	    "dsll32 $8, %0, 0\n"
-	    "dsrl32 $9, $9, 0\n"
-	    "or     $9, $9, $8\n"
-	    "move   $8, %2\n"
-	    ".word  0x71090019\n"
-	    "nop	\n"
-	    ".set pop\n"
-	    : :"r"(hi), "r"(lo), "r"(reg)
-	    : "$8", "$9");
-}
-#endif /* (defined(__mips_n64) || defined(__mips_n32)) */
-
-/* hashindex_en = 1 to enable hash mode, hashindex_en=0 to disable
- * global_mode = 1 to enable global mode, global_mode=0 to disable
- * clk_gating = 0 to enable clock gating, clk_gating=1 to disable
- */
-static __inline__ void nlm_mmu_setup(int hashindex_en, int global_mode,
-		int clk_gating)
-{
-	uint32_t mmusetup = 0;
-
-	mmusetup |= (hashindex_en << 13);
-	mmusetup |= (clk_gating << 3);
-	mmusetup |= (global_mode << 0);
-	nlm_mtcr(MMU_SETUP, mmusetup);
-}
-
-static __inline__ void nlm_mmu_lfsr_seed (int thr0_seed, int thr1_seed,
-		int thr2_seed, int thr3_seed)
-{
-	uint32_t seed = nlm_mfcr(MMU_LFSRSEED);
-
-	seed |= ((thr3_seed & 0x7f) << 23);
-	seed |= ((thr2_seed & 0x7f) << 16);
-	seed |= ((thr1_seed & 0x7f) << 7);
-	seed |= ((thr0_seed & 0x7f) << 0);
-	nlm_mtcr(MMU_LFSRSEED, seed);
-}
-
-#endif /* __ASSEMBLY__ */
-#endif /* __NLM_CPUCONTROL_H__ */
diff --git a/sys/mips/nlm/hal/fmn.c b/sys/mips/nlm/hal/fmn.c
deleted file mode 100644
index 5e568e2df08b..000000000000
--- a/sys/mips/nlm/hal/fmn.c
+++ /dev/null
@@ -1,356 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <machine/cpufunc.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/fmn.h>
-
-/* XLP can take upto 16K of FMN messages per hardware queue, as spill.
-* But, configuring all 16K causes the total spill memory to required
-* to blow upto 192MB for single chip configuration, and 768MB in four
-* chip configuration. Hence for now, we will setup the per queue spill
-* as 1K FMN messages. With this, the total spill memory needed for 1024
-* hardware queues (with 12bytes per single entry FMN message) becomes
-* (1*1024)*12*1024queues = 12MB. For the four chip config, the memory
-* needed = 12 * 4 = 48MB.
-*/
-uint64_t nlm_cms_spill_total_messages = 1 * 1024;
-
-/* On a XLP832, we have the following FMN stations:
-* CPU    stations: 8
-* PCIE0  stations: 1
-* PCIE1  stations: 1
-* PCIE2  stations: 1
-* PCIE3  stations: 1
-* GDX    stations: 1
-* CRYPTO stations: 1
-* RSA    stations: 1
-* CMP    stations: 1
-* POE    stations: 1
-* NAE    stations: 1
-* ==================
-* Total          : 18 stations per chip
-*
-* For all 4 nodes, there are 18*4 = 72 FMN stations
-*/
-uint32_t nlm_cms_total_stations = 18 * 4 /*xlp_num_nodes*/;
-
-/**
- * Takes inputs as node, queue_size and maximum number of queues.
- * Calculates the base, start & end and returns the same for a
- * defined qid.
- *
- * The output queues are maintained in the internal output buffer
- * which is a on-chip SRAM structure. For the actial hardware
- * internal implementation, It is a structure which consists
- * of eight banks of 4096-entry x message-width SRAMs. The SRAM
- * implementation is designed to run at 1GHz with a 1-cycle read/write
- * access. A read/write transaction can be initiated for each bank
- * every cycle for a total of eight accesses per cycle. Successive
- * entries of the same output queue are placed in successive banks.
- * This is done to spread different read & write accesses to same/different
- * output queue over as many different banks as possible so that they
- * can be scheduled concurrently. Spreading the accesses to as many banks
- * as possible to maximize the concurrency internally is important for
- * achieving the desired peak throughput. This is done by h/w implementation
- * itself.
- *
- * Output queues are allocated from this internal output buffer by
- * software. The total capacity of the output buffer is 32K-entry.
- * Each output queue can be sized from 32-entry to 1024-entry in
- * increments of 32-entry. This is done by specifying a Start & a
- * End pointer: pointers to the first & last 32-entry chunks allocated
- * to the output queue.
- *
- * To optimize the storage required for 1024 OQ pointers, the upper 5-bits
- * are shared by the Start & the End pointer. The side-effect of this
- * optimization is that an OQ can't cross a 1024-entry boundary. Also, the
- * lower 5-bits don't need to be specified in the Start & the End pointer
- * as the allocation is in increments of 32-entries.
- *
- * Queue occupancy is tracked by a Head & a Tail pointer. Tail pointer
- * indicates the location to which next entry will be written & Head
- * pointer indicates the location from which next entry will be read. When
- * these pointers reach the top of the allocated space (indicated by the
- * End pointer), they are reset to the bottom of the allocated space
- * (indicated by the Start pointer).
- *
- * Output queue pointer information:
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *   14               10 9              5 4                 0
- *   ------------------
- *   | base ptr       |
- *   ------------------
- *                       ----------------
- *                       | start ptr    |
- *                       ----------------
- *                       ----------------
- *                       | end   ptr    |
- *                       ----------------
- *                       ------------------------------------
- *                       |           head ptr               |
- *                       ------------------------------------
- *                       ------------------------------------
- *                       |           tail ptr               |
- *                       ------------------------------------
- * Note:
- * A total of 1024 segments can sit on one software-visible "bank"
- * of internal SRAM. Each segment contains 32 entries. Also note
- * that sw-visible "banks" are not the same as the actual internal
- * 8-bank implementation of hardware. It is an optimization of
- * internal access.
- *
- */
-
-void nlm_cms_setup_credits(uint64_t base, int destid, int srcid, int credit)
-{
-	uint64_t val;
-
-	val = (((uint64_t)credit << 24) | (destid << 12) | (srcid << 0));
-	nlm_write_cms_reg(base, CMS_OUTPUTQ_CREDIT_CFG, val);
-
-}
-
-/*
- * base		- CMS module base address for this node.
- * qid		- is the output queue id otherwise called as vc id
- * spill_base   - is the 40-bit physical address of spill memory. Must be
-		  4KB aligned.
- * nsegs	- No of segments where a "1" indicates 4KB. Spill size must be
- *                a multiple of 4KB.
- */
-int nlm_cms_alloc_spill_q(uint64_t base, int qid, uint64_t spill_base,
-				int nsegs)
-{
-	uint64_t queue_config;
-	uint32_t spill_start;
-
-	if (nsegs > CMS_MAX_SPILL_SEGMENTS_PER_QUEUE) {
-		return 1;
-	}
-
-	queue_config = nlm_read_cms_reg(base,(CMS_OUTPUTQ_CONFIG(qid)));
-
-	spill_start = ((spill_base >> 12) & 0x3F);
-	/* Spill configuration */
-	queue_config = (((uint64_t)CMS_SPILL_ENA << 62) |
-				(((spill_base >> 18) & 0x3FFFFF) << 27) |
-				(spill_start + nsegs - 1) << 21 |
-				(spill_start << 15));
-
-	nlm_write_cms_reg(base,(CMS_OUTPUTQ_CONFIG(qid)),queue_config);
-
-	return 0;
-}
-
-uint64_t nlm_cms_get_onchip_queue (uint64_t base, int qid)
-{
-	return nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-}
-
-void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val)
-{
-	uint64_t rdval;
-
-	rdval = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-	rdval |= val;
-	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), rdval);
-}
-
-void nlm_cms_per_queue_level_intr(uint64_t base, int qid, int sub_type,
-					int intr_val)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-
-	val &= ~((0x7ULL << 56) | (0x3ULL << 54));
-
-	val |= (((uint64_t)sub_type<<54) |
-		((uint64_t)intr_val<<56));
-
-	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
-}
-
-void nlm_cms_per_queue_timer_intr(uint64_t base, int qid, int sub_type,
-					int intr_val)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-
-	val &= ~((0x7ULL << 51) | (0x3ULL << 49));
-
-	val |= (((uint64_t)sub_type<<49) |
-		((uint64_t)intr_val<<51));
-
-	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
-}
-
-/* returns 1 if interrupt has been generated for this output queue */
-int nlm_cms_outputq_intr_check(uint64_t base, int qid)
-{
-	uint64_t val;
-	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-
-	return ((val >> 59) & 0x1);
-}
-
-void nlm_cms_outputq_clr_intr(uint64_t base, int qid)
-{
-	uint64_t val;
-	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
-	val |= (1ULL<<59);
-	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
-}
-
-void nlm_cms_illegal_dst_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<8);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_timeout_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<7);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_biu_error_resp_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<6);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_spill_uncorrectable_ecc_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<5) | (en<<3);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_spill_correctable_ecc_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<4) | (en<<2);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_outputq_uncorrectable_ecc_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<1);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_outputq_correctable_ecc_error_intr(uint64_t base, int en)
-{
-	uint64_t val;
-
-	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
-	val |= (en<<0);
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-uint64_t nlm_cms_network_error_status(uint64_t base)
-{
-	return nlm_read_cms_reg(base, CMS_MSG_ERR);
-}
-
-int nlm_cms_get_net_error_code(uint64_t err)
-{
-	return ((err >> 12) & 0xf);
-}
-
-int nlm_cms_get_net_error_syndrome(uint64_t err)
-{
-	return ((err >> 32) & 0x1ff);
-}
-
-int nlm_cms_get_net_error_ramindex(uint64_t err)
-{
-	return ((err >> 44) & 0x7fff);
-}
-
-int nlm_cms_get_net_error_outputq(uint64_t err)
-{
-	return ((err >> 16) & 0xfff);
-}
-
-/*========================= FMN Tracing related APIs ================*/
-
-void nlm_cms_trace_setup(uint64_t base, int en, uint64_t trace_base,
-				uint64_t trace_limit, int match_dstid_en,
-				int dst_id, int match_srcid_en, int src_id,
-				int wrap)
-{
-	uint64_t val;
-
-	nlm_write_cms_reg(base, CMS_TRACE_BASE_ADDR, trace_base);
-	nlm_write_cms_reg(base, CMS_TRACE_LIMIT_ADDR, trace_limit);
-
-	val = nlm_read_cms_reg(base, CMS_TRACE_CONFIG);
-	val |= (((uint64_t)match_dstid_en << 39) |
-		((dst_id & 0xfff) << 24) |
-		(match_srcid_en << 23) |
-		((src_id & 0xfff) << 8) |
-		(wrap << 1) |
-		(en << 0));
-	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
-}
-
-void nlm_cms_endian_byte_swap (uint64_t base, int en)
-{
-	nlm_write_cms_reg(base, CMS_MSG_ENDIAN_SWAP, en);
-}
diff --git a/sys/mips/nlm/hal/fmn.h b/sys/mips/nlm/hal/fmn.h
deleted file mode 100644
index 60548723b6ef..000000000000
--- a/sys/mips/nlm/hal/fmn.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_FMNV2_H__
-#define	__NLM_FMNV2_H__
-
-/**
-* @file_name fmn.h
-* @author Netlogic Microsystems
-* @brief HAL for Fast message network V2
-*/
-
-/* FMN configuration registers */
-#define	CMS_OUTPUTQ_CONFIG(i)		((i)*2)
-#define	CMS_MAX_OUTPUTQ			1024
-#define	CMS_OUTPUTQ_CREDIT_CFG		(0x2000/4)
-#define	CMS_MSG_CONFIG			(0x2008/4)
-#define	CMS_MSG_ERR			(0x2010/4)
-#define	CMS_TRACE_CONFIG		(0x2018/4)
-#define	CMS_TRACE_BASE_ADDR		(0x2020/4)
-#define	CMS_TRACE_LIMIT_ADDR		(0x2028/4)
-#define	CMS_TRACE_CURRENT_ADDR		(0x2030/4)
-#define	CMS_MSG_ENDIAN_SWAP		(0x2038/4)
-
-#define	CMS_CPU_PUSHQ(node, core, thread, vc)	\
-		(((node)<<10) | ((core)<<4) | ((thread)<<2) | ((vc)<<0))
-#define	CMS_POPQ(node, queue)	(((node)<<10) | (queue))
-#define	CMS_IO_PUSHQ(node, queue)	(((node)<<10) | (queue))
-
-#define	CMS_POPQ_QID(i)		(128+(i))
-
-/* FMN Level Interrupt Type */
-#define	CMS_LVL_INTR_DISABLE	0
-#define	CMS_LVL_LOW_WATERMARK	1
-#define	CMS_LVL_HI_WATERMARK	2
-
-/* FMN Level interrupt trigger values */
-#define	CMS_QUEUE_NON_EMPTY		0
-#define	CMS_QUEUE_QUARTER_FULL		1
-#define	CMS_QUEUE_HALF_FULL		2
-#define	CMS_QUEUE_THREE_QUARTER_FULL	3
-#define	CMS_QUEUE_FULL			4
-
-/* FMN Timer Interrupt Type */
-#define	CMS_TIMER_INTR_DISABLE	0
-#define	CMS_TIMER_CONSUMER		1
-#define	CMS_TIMER_PRODUCER		1
-
-/* FMN timer interrupt trigger values */
-#define	CMS_TWO_POW_EIGHT_CYCLES	0
-#define	CMS_TWO_POW_TEN_CYCLES		1
-#define	CMS_TWO_POW_TWELVE_CYCLES	2
-#define	CMS_TWO_POW_FOURTEEN_CYCLES	3
-#define	CMS_TWO_POW_SIXTEEN_CYCLES	4
-#define	CMS_TWO_POW_EIGHTTEEN_CYCLES	5
-#define	CMS_TWO_POW_TWENTY_CYCLES	6
-#define	CMS_TWO_POW_TWENTYTWO_CYCLES	7
-
-#define	CMS_QUEUE_ENA		1ULL
-#define	CMS_QUEUE_DIS		0
-#define	CMS_SPILL_ENA		1ULL
-#define	CMS_SPILL_DIS		0
-
-#define	CMS_MAX_VCPU_VC		4
-
-/* Each XLP chip can hold upto 32K messages on the chip itself */
-#define	CMS_ON_CHIP_MESG_SPACE	(32*1024)
-#define	CMS_MAX_ONCHIP_SEGMENTS	1024
-#define	CMS_MAX_SPILL_SEGMENTS_PER_QUEUE	64
-
-/* FMN Network error */
-#define	CMS_ILLEGAL_DST_ERROR		0x100
-#define	CMS_BIU_TIMEOUT_ERROR		0x080
-#define	CMS_BIU_ERROR			0x040
-#define	CMS_SPILL_FILL_UNCORRECT_ECC_ERROR	0x020
-#define	CMS_SPILL_FILL_CORRECT_ECC_ERROR	0x010
-#define	CMS_SPILL_UNCORRECT_ECC_ERROR	0x008
-#define	CMS_SPILL_CORRECT_ECC_ERROR		0x004
-#define	CMS_OUTPUTQ_UNCORRECT_ECC_ERROR	0x002
-#define	CMS_OUTPUTQ_CORRECT_ECC_ERROR	0x001
-
-/* worst case, a single entry message consists of a 4 byte header
- * and an 8-byte entry = 12 bytes in total
- */
-#define	CMS_SINGLE_ENTRY_MSG_SIZE	12
-/* total spill memory needed for one FMN queue */
-#define	CMS_PER_QUEUE_SPILL_MEM(spilltotmsgs)		\
-		((spilltotmsgs) * (CMS_SINGLE_ENTRY_MSG_SIZE))
-
-/* FMN Src station id's */
-#define	CMS_CPU0_SRC_STID		(0 << 4)
-#define	CMS_CPU1_SRC_STID		(1 << 4)
-#define	CMS_CPU2_SRC_STID		(2 << 4)
-#define	CMS_CPU3_SRC_STID		(3 << 4)
-#define	CMS_CPU4_SRC_STID		(4 << 4)
-#define	CMS_CPU5_SRC_STID		(5 << 4)
-#define	CMS_CPU6_SRC_STID		(6 << 4)
-#define	CMS_CPU7_SRC_STID		(7 << 4)
-#define	CMS_PCIE0_SRC_STID		256
-#define	CMS_PCIE1_SRC_STID		258
-#define	CMS_PCIE2_SRC_STID		260
-#define	CMS_PCIE3_SRC_STID		262
-#define	CMS_DTE_SRC_STID		264
-#define	CMS_RSA_ECC_SRC_STID		272
-#define	CMS_CRYPTO_SRC_STID		281
-#define	CMS_CMP_SRC_STID		298
-#define	CMS_POE_SRC_STID		384
-#define	CMS_NAE_SRC_STID		476
-
-/* POPQ related defines */
-#define	CMS_POPQID_START	128
-#define	CMS_POPQID_END		255
-
-#define	CMS_INT_RCVD		0x800000000000000ULL
-
-#define	nlm_read_cms_reg(b, r)	nlm_read_reg64_xkphys(b,r)
-#define	nlm_write_cms_reg(b, r, v)	nlm_write_reg64_xkphys(b,r,v)
-#define	nlm_get_cms_pcibase(node)	\
-	nlm_pcicfg_base(XLP_IO_CMS_OFFSET(node))
-#define	nlm_get_cms_regbase(node)	\
-	nlm_xkphys_map_pcibar0(nlm_get_cms_pcibase(node))
-
-#define	XLP_CMS_ON_CHIP_PER_QUEUE_SPACE(node)			\
-		((XLP_CMS_ON_CHIP_MESG_SPACE)/			\
-		(nlm_read_reg(nlm_pcibase_cms(node),		\
-		XLP_PCI_DEVINFO_REG0))
-/* total spill memory needed */
-#define	XLP_CMS_TOTAL_SPILL_MEM(node, spilltotmsgs)		\
-               ((XLP_CMS_PER_QUEUE_SPILL_MEM(spilltotmsgs)) *	\
-		(nlm_read_reg(nlm_pcibase_cms(node),		\
-		XLP_PCI_DEVINFO_REG0))
-#define	CMS_TOTAL_QUEUE_SIZE(node, spilltotmsgs)		\
-		((spilltotmsgs) + (CMS_ON_CHIP_PER_QUEUE_SPACE(node)))
-
-enum fmn_swcode {
-	FMN_SWCODE_CPU0=1,
-	FMN_SWCODE_CPU1,
-	FMN_SWCODE_CPU2,
-	FMN_SWCODE_CPU3,
-	FMN_SWCODE_CPU4,
-	FMN_SWCODE_CPU5,
-	FMN_SWCODE_CPU6,
-	FMN_SWCODE_CPU7,
-	FMN_SWCODE_CPU8,
-	FMN_SWCODE_CPU9,
-	FMN_SWCODE_CPU10,
-	FMN_SWCODE_CPU11,
-	FMN_SWCODE_CPU12,
-	FMN_SWCODE_CPU13,
-	FMN_SWCODE_CPU14,
-	FMN_SWCODE_CPU15,
-	FMN_SWCODE_CPU16,
-	FMN_SWCODE_CPU17,
-	FMN_SWCODE_CPU18,
-	FMN_SWCODE_CPU19,
-	FMN_SWCODE_CPU20,
-	FMN_SWCODE_CPU21,
-	FMN_SWCODE_CPU22,
-	FMN_SWCODE_CPU23,
-	FMN_SWCODE_CPU24,
-	FMN_SWCODE_CPU25,
-	FMN_SWCODE_CPU26,
-	FMN_SWCODE_CPU27,
-	FMN_SWCODE_CPU28,
-	FMN_SWCODE_CPU29,
-	FMN_SWCODE_CPU30,
-	FMN_SWCODE_CPU31,
-	FMN_SWCODE_CPU32,
-	FMN_SWCODE_PCIE0,
-	FMN_SWCODE_PCIE1,
-	FMN_SWCODE_PCIE2,
-	FMN_SWCODE_PCIE3,
-	FMN_SWCODE_DTE,
-	FMN_SWCODE_CRYPTO,
-	FMN_SWCODE_RSA,
-	FMN_SWCODE_CMP,
-	FMN_SWCODE_POE,
-	FMN_SWCODE_NAE,
-};
-
-extern uint64_t nlm_cms_spill_total_messages;
-extern uint32_t nlm_cms_total_stations;
-
-extern uint64_t cms_base_addr(int node);
-extern int nlm_cms_verify_credit_config (int spill_en, int tot_credit);
-extern int nlm_cms_get_oc_space(int qsize, int max_queues, int qid, int *ocbase, int *ocstart, int *ocend);
-extern void nlm_cms_setup_credits (uint64_t base, int destid, int srcid, int credit);
-extern int nlm_cms_config_onchip_queue (uint64_t base, uint64_t cms_spill_base, int qid, int spill_en);
-extern void nlm_cms_default_setup(int node, uint64_t spill_base, int spill_en, int popq_en);
-extern uint64_t nlm_cms_get_onchip_queue (uint64_t base, int qid);
-extern void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val);
-extern void nlm_cms_per_queue_level_intr(uint64_t base, int qid, int sub_type, int intr_val);
-extern void nlm_cms_level_intr(int node, int sub_type, int intr_val);
-extern void nlm_cms_per_queue_timer_intr(uint64_t base, int qid, int sub_type, int intr_val);
-extern void nlm_cms_timer_intr(int node, int en, int sub_type, int intr_val);
-extern int nlm_cms_outputq_intr_check(uint64_t base, int qid);
-extern void nlm_cms_outputq_clr_intr(uint64_t base, int qid);
-extern void nlm_cms_illegal_dst_error_intr(uint64_t base, int en);
-extern void nlm_cms_timeout_error_intr(uint64_t base, int en);
-extern void nlm_cms_biu_error_resp_intr(uint64_t base, int en);
-extern void nlm_cms_spill_uncorrectable_ecc_error_intr(uint64_t base, int en);
-extern void nlm_cms_spill_correctable_ecc_error_intr(uint64_t base, int en);
-extern void nlm_cms_outputq_uncorrectable_ecc_error_intr(uint64_t base, int en);
-extern void nlm_cms_outputq_correctable_ecc_error_intr(uint64_t base, int en);
-extern uint64_t nlm_cms_network_error_status(uint64_t base);
-extern int nlm_cms_get_net_error_code(uint64_t err);
-extern int nlm_cms_get_net_error_syndrome(uint64_t err);
-extern int nlm_cms_get_net_error_ramindex(uint64_t err);
-extern int nlm_cms_get_net_error_outputq(uint64_t err);
-extern void nlm_cms_trace_setup(uint64_t base, int en, uint64_t trace_base, uint64_t trace_limit, int match_dstid_en, int dst_id, int match_srcid_en, int src_id, int wrap);
-extern void nlm_cms_endian_byte_swap (uint64_t base, int en);
-extern uint8_t xlp_msg_send(uint8_t vc, uint8_t size);
-extern int nlm_cms_alloc_spill_q(uint64_t base, int qid, uint64_t spill_base,
-	int nsegs);
-extern int nlm_cms_alloc_onchip_q(uint64_t base, int qid, int nsegs);
-
-#endif
diff --git a/sys/mips/nlm/hal/gbu.h b/sys/mips/nlm/hal/gbu.h
deleted file mode 100644
index adb67bbfd94c..000000000000
--- a/sys/mips/nlm/hal/gbu.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef _NLM_HAL_GBU_H__
-#define	_NLM_HAL_GBU_H__
-
-/* Global Bus Unit (GBU) for flash Specific registers */
-
-#define	GBU_CS_BASEADDR(cs)	(0x0+cs)
-#define	GBU_CS0_BASEADDR	0x0
-#define	GBU_CS1_BASEADDR	0x1
-#define	GBU_CS2_BASEADDR	0x2
-#define	GBU_CS3_BASEADDR	0x3
-#define	GBU_CS4_BASEADDR	0x4
-#define	GBU_CS5_BASEADDR	0x5
-#define	GBU_CS6_BASEADDR	0x6
-#define	GBU_CS7_BASEADDR	0x7
-#define	GBU_CS_BASELIMIT(cs)	(0x8+cs)
-#define	GBU_CS0_BASELIMIT	0x8
-#define	GBU_CS1_BASELIMIT	0x9
-#define	GBU_CS2_BASELIMIT	0xa
-#define	GBU_CS3_BASELIMIT	0xb
-#define	GBU_CS4_BASELIMIT	0xc
-#define	GBU_CS5_BASELIMIT	0xd
-#define	GBU_CS6_BASELIMIT	0xe
-#define	GBU_CS7_BASELIMIT	0xf
-#define	GBU_CS_DEVPARAM(cs)	(0x10+cs)
-#define	GBU_CS0_DEVPARAM	0x10
-#define	GBU_CS1_DEVPARAM	0x11
-#define	GBU_CS2_DEVPARAM	0x12
-#define	GBU_CS3_DEVPARAM	0x13
-#define	GBU_CS4_DEVPARAM	0x14
-#define	GBU_CS5_DEVPARAM	0x15
-#define	GBU_CS6_DEVPARAM	0x16
-#define	GBU_CS7_DEVPARAM	0x17
-#define	GBU_CS_DEVTIME0(cs)	(0x18+cs)
-#define	GBU_CS0_DEVTIME0	0x18
-#define	GBU_CS1_DEVTIME0	0x1a
-#define	GBU_CS2_DEVTIME0	0x1c
-#define	GBU_CS3_DEVTIME0	0x1e
-#define	GBU_CS4_DEVTIME0	0x20
-#define	GBU_CS5_DEVTIME0	0x22
-#define	GBU_CS6_DEVTIME0	0x24
-#define	GBU_CS7_DEVTIME0	0x26
-#define	GBU_CS_DEVTIME1(cs)	(0x19+cs)
-#define	GBU_CS0_DEVTIME1	0x19
-#define	GBU_CS1_DEVTIME1	0x1b
-#define	GBU_CS2_DEVTIME1	0x1d
-#define	GBU_CS3_DEVTIME1	0x1f
-#define	GBU_CS4_DEVTIME1	0x21
-#define	GBU_CS5_DEVTIME1	0x23
-#define	GBU_CS6_DEVTIME1	0x25
-#define	GBU_CS7_DEVTIME1	0x27
-#define	GBU_SYSCTRL		0x28
-#define	GBU_BYTESWAP		0x29
-#define	GBU_DI_TIMEOUT_VAL	0x2d
-#define	GBU_INTSTAT		0x2e
-#define	GBU_INTEN		0x2f
-#define	GBU_STATUS		0x30
-#define	GBU_ERRLOG0		0x2a
-#define	GBU_ERRLOG1		0x2b
-#define	GBU_ERRLOG2		0x2c
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_gbu_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_gbu_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_get_gbu_pcibase(node)	\
-				nlm_pcicfg_base(XLP_IO_NOR_OFFSET(node))
-#define	nlm_get_gbu_regbase(node)	\
-				(nlm_get_gbu_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-#endif /* !LOCORE && !__ASSEMBLY__ */
-#endif /* _NLM_HAL_GBU_H__ */
diff --git a/sys/mips/nlm/hal/haldefs.h b/sys/mips/nlm/hal/haldefs.h
deleted file mode 100644
index 44890a165cc0..000000000000
--- a/sys/mips/nlm/hal/haldefs.h
+++ /dev/null
@@ -1,439 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_MMIO_H__
-#define	__NLM_HAL_MMIO_H__
-
-/*
- * This file contains platform specific memory mapped IO implementation
- * and will provide a way to read 32/64 bit memory mapped registers in
- * all ABIs
- */
-
-/*
- * For o32 compilation, we have to disable interrupts and enable KX bit to
- * access 64 bit addresses or data.
- *
- * We need to disable interrupts because we save just the lower 32 bits of
- * registers in  interrupt handling. So if we get hit by an interrupt while
- * using the upper 32 bits of a register, we lose.
- */
-static inline uint32_t nlm_save_flags_kx(void)
-{
-	uint32_t sr = mips_rd_status();
-
-	mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX);
-	return (sr);
-}
-
-static inline uint32_t nlm_save_flags_cop2(void)
-{
-	uint32_t sr = mips_rd_status();
-
-	mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_COP_2_BIT);
-	return (sr);
-}
-
-static inline void nlm_restore_flags(uint32_t sr)
-{
-	mips_wr_status(sr);
-}
-
-static inline uint32_t
-nlm_load_word(uint64_t addr)
-{
-	volatile uint32_t *p = (volatile uint32_t *)(long)addr;
-
-	return *p;
-}
-
-static inline void
-nlm_store_word(uint64_t addr, uint32_t val)
-{
-	volatile uint32_t *p = (volatile uint32_t *)(long)addr;
-
-	*p = val;
-}
-
-#if defined(__mips_n64) || defined(__mips_n32)
-static inline uint64_t
-nlm_load_dword(volatile uint64_t addr)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-
-	return *p;
-}
-
-static inline void
-nlm_store_dword(volatile uint64_t addr, uint64_t val)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-
-	*p = val;
-}
-
-#else /* o32 */
-static inline uint64_t
-nlm_load_dword(uint64_t addr)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-	uint32_t valhi, vallo, sr;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"ld	$8, 0(%2)\n\t"
-		"dsra32	%0, $8, 0\n\t"
-		"sll	%1, $8, 0\n\t"
-		".set	pop\n"
-		: "=r"(valhi), "=r"(vallo)
-		: "r"(p)
-		: "$8");
-	nlm_restore_flags(sr);
-
-	return ((uint64_t)valhi << 32) | vallo;
-}
-
-static inline void
-nlm_store_dword(uint64_t addr, uint64_t val)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-	uint32_t valhi, vallo, sr;
-
-	valhi = val >> 32;
-	vallo = val & 0xffffffff;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"dsll32	$8, %1, 0\n\t"
-		"dsll32	$9, %2, 0\n\t"  /* get rid of the */
-		"dsrl32	$9, $9, 0\n\t"  /* sign extend */
-		"or	$9, $9, $8\n\t"
-		"sd	$9, 0(%0)\n\t"
-		".set	pop\n"
-		: : "r"(p), "r"(valhi), "r"(vallo)
-		: "$8", "$9", "memory");
-	nlm_restore_flags(sr);
-}
-#endif
-
-#if defined(__mips_n64)
-static inline uint64_t
-nlm_load_word_daddr(uint64_t addr)
-{
-	volatile uint32_t *p = (volatile uint32_t *)(long)addr;
-
-	return *p;
-}
-
-static inline void
-nlm_store_word_daddr(uint64_t addr, uint32_t val)
-{
-	volatile uint32_t *p = (volatile uint32_t *)(long)addr;
-
-	*p = val;
-}
-
-static inline uint64_t
-nlm_load_dword_daddr(uint64_t addr)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-
-	return *p;
-}
-
-static inline void
-nlm_store_dword_daddr(uint64_t addr, uint64_t val)
-{
-	volatile uint64_t *p = (volatile uint64_t *)(long)addr;
-
-	*p = val;
-}
-
-#elif defined(__mips_n32)
-
-static inline uint64_t
-nlm_load_word_daddr(uint64_t addr)
-{
-	uint32_t val;
-
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"lw		%0, 0(%1)\n\t"
-		".set	pop\n"
-		: "=r"(val)
-		: "r"(addr));
-
-	return val;
-}
-
-static inline void
-nlm_store_word_daddr(uint64_t addr, uint32_t val)
-{
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"sw		%0, 0(%1)\n\t"
-		".set	pop\n"
-		: : "r"(val), "r"(addr)
-		: "memory");
-}
-
-static inline uint64_t
-nlm_load_dword_daddr(uint64_t addr)
-{
-	uint64_t val;
-
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"ld		%0, 0(%1)\n\t"
-		".set	pop\n"
-		: "=r"(val)
-		: "r"(addr));
-	return val;
-}
-
-static inline void
-nlm_store_dword_daddr(uint64_t addr, uint64_t val)
-{
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"sd		%0, 0(%1)\n\t"
-		".set	pop\n"
-		: : "r"(val), "r"(addr)
-		: "memory");
-}
-
-#else /* o32 */
-static inline uint64_t
-nlm_load_word_daddr(uint64_t addr)
-{
-	uint32_t val, addrhi, addrlo, sr;
-
-	addrhi = addr >> 32;
-	addrlo = addr & 0xffffffff;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"dsll32	$8, %1, 0\n\t"
-		"dsll32	$9, %2, 0\n\t"
-		"dsrl32	$9, $9, 0\n\t"
-		"or	$9, $9, $8\n\t"
-		"lw	%0, 0($9)\n\t"
-		".set	pop\n"
-		:	"=r"(val)
-		:	"r"(addrhi), "r"(addrlo)
-		:	"$8", "$9");
-	nlm_restore_flags(sr);
-
-	return val;
-
-}
-
-static inline void
-nlm_store_word_daddr(uint64_t addr, uint32_t val)
-{
-	uint32_t addrhi, addrlo, sr;
-
-	addrhi = addr >> 32;
-	addrlo = addr & 0xffffffff;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"dsll32	$8, %1, 0\n\t"
-		"dsll32	$9, %2, 0\n\t"
-		"dsrl32	$9, $9, 0\n\t"
-		"or	$9, $9, $8\n\t"
-		"sw	%0, 0($9)\n\t"
-		".set	pop\n"
-		: : "r"(val), "r"(addrhi), "r"(addrlo)
-		:	"$8", "$9", "memory");
-	nlm_restore_flags(sr);
-}
-
-static inline uint64_t
-nlm_load_dword_daddr(uint64_t addr)
-{
-	uint32_t addrh, addrl, sr;
-	uint32_t valh, vall;
-
-	addrh = addr >> 32;
-	addrl = addr & 0xffffffff;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"dsll32	$8, %2, 0\n\t"
-		"dsll32	$9, %3, 0\n\t"
-		"dsrl32	$9, $9, 0\n\t"
-		"or	$9, $9, $8\n\t"
-		"ld	$8, 0($9)\n\t"
-		"dsra32	%0, $8, 0\n\t"
-		"sll	%1, $8, 0\n\t"
-		".set	pop\n"
-		: "=r"(valh), "=r"(vall)
-		: "r"(addrh), "r"(addrl)
-		: "$8", "$9");
-	nlm_restore_flags(sr);
-
-	return ((uint64_t)valh << 32) | vall;
-}
-
-static inline void
-nlm_store_dword_daddr(uint64_t addr, uint64_t val)
-{
-	uint32_t addrh, addrl, sr;
-	uint32_t valh, vall;
-
-	addrh = addr >> 32;
-	addrl = addr & 0xffffffff;
-	valh = val >> 32;
-	vall = val & 0xffffffff;
-
-	sr = nlm_save_flags_kx();
-	__asm__ __volatile__(
-		".set	push\n\t"
-		".set	mips64\n\t"
-		"dsll32	$8, %2, 0\n\t"
-		"dsll32	$9, %3, 0\n\t"
-		"dsrl32	$9, $9, 0\n\t"
-		"or	$9, $9, $8\n\t"
-		"dsll32	$8, %0, 0\n\t"
-		"dsll32	$10, %1, 0\n\t"
-		"dsrl32	$10, $10, 0\n\t"
-		"or	$8, $8, $10\n\t"
-		"sd	$8, 0($9)\n\t"
-		".set	pop\n"
-		: :	"r"(valh), "r"(vall), "r"(addrh), "r"(addrl)
-		:	"$8", "$9", "memory");
-	nlm_restore_flags(sr);
-}
-#endif /* __mips_n64 */
-
-static inline uint32_t
-nlm_read_reg(uint64_t base, uint32_t reg)
-{
-	volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg;
-
-	return *addr;
-}
-
-static inline void
-nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val)
-{
-	volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg;
-
-	*addr = val;
-}
-
-static inline uint64_t
-nlm_read_reg64(uint64_t base, uint32_t reg)
-{
-	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
-
-	return nlm_load_dword(addr);
-}
-
-static inline void
-nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val)
-{
-	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
-
-	return nlm_store_dword(addr, val);
-}
-
-/*
- * Routines to store 32/64 bit values to 64 bit addresses,
- * used when going thru XKPHYS to access registers
- */
-static inline uint32_t
-nlm_read_reg_xkphys(uint64_t base, uint32_t reg)
-{
-	uint64_t addr = base + reg * sizeof(uint32_t);
-
-	return nlm_load_word_daddr(addr);
-}
-
-static inline void
-nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val)
-{
-	uint64_t addr = base + reg * sizeof(uint32_t);
-	return nlm_store_word_daddr(addr, val);
-}
-
-static inline uint64_t
-nlm_read_reg64_xkphys(uint64_t base, uint32_t reg)
-{
-	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
-
-	return nlm_load_dword_daddr(addr);
-}
-
-static inline void
-nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val)
-{
-	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
-
-	return nlm_store_dword_daddr(addr, val);
-}
-
-/* Location where IO base is mapped */
-extern uint64_t xlp_io_base;
-
-static inline uint64_t
-nlm_pcicfg_base(uint32_t devoffset)
-{
-	return xlp_io_base + devoffset;
-}
-
-static inline uint64_t
-nlm_xkphys_map_pcibar0(uint64_t pcibase)
-{
-	uint64_t paddr;
-
-	paddr = nlm_read_reg(pcibase, 0x4) & ~0xfu;
-	return (uint64_t)0x9000000000000000 | paddr;
-}
-
-#endif
diff --git a/sys/mips/nlm/hal/interlaken.h b/sys/mips/nlm/hal/interlaken.h
deleted file mode 100644
index b967b8b89054..000000000000
--- a/sys/mips/nlm/hal/interlaken.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef __NLM_ILAKEN_H__
-#define	__NLM_ILAKEN_H__
-
-/**
-* @file_name interlaken.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP ILAKEN ports
-*/
-
-#define	ILK_TX_CONTROL(block)		NAE_REG(block, 5, 0x00)
-#define	ILK_TX_RATE_LIMIT(block)	NAE_REG(block, 5, 0x01)
-#define	ILK_TX_META_CTRL(block)		NAE_REG(block, 5, 0x02)
-#define	ILK_RX_CTRL(block)		NAE_REG(block, 5, 0x03)
-#define	ILK_RX_STATUS1(block)		NAE_REG(block, 5, 0x04)
-#define	ILK_RX_STATUS2(block)		NAE_REG(block, 5, 0x05)
-#define	ILK_GENERAL_CTRL1(block)	NAE_REG(block, 5, 0x06)
-#define	ILK_STATUS3(block)		NAE_REG(block, 5, 0x07)
-#define	ILK_RX_FC_TMAP0(block)		NAE_REG(block, 5, 0x08)
-#define	ILK_RX_FC_TMAP1(block)		NAE_REG(block, 5, 0x09)
-#define	ILK_RX_FC_TMAP2(block)		NAE_REG(block, 5, 0x0a)
-#define	ILK_RX_FC_TMAP3(block)		NAE_REG(block, 5, 0x0b)
-#define	ILK_RX_FC_TMAP4(block)		NAE_REG(block, 5, 0x0c)
-#define	ILK_RX_FC_TADDR(block)		NAE_REG(block, 5, 0x0d)
-#define	ILK_GENERAL_CTRL2(block)	NAE_REG(block, 5, 0x0e)
-#define	ILK_GENERAL_CTRL3(block)	NAE_REG(block, 5, 0x0f)
-#define	ILK_SMALL_COUNT0(block)		NAE_REG(block, 5, 0x10)
-#define	ILK_SMALL_COUNT1(block)		NAE_REG(block, 5, 0x11)
-#define	ILK_SMALL_COUNT2(block)		NAE_REG(block, 5, 0x12)
-#define	ILK_SMALL_COUNT3(block)		NAE_REG(block, 5, 0x13)
-#define	ILK_SMALL_COUNT4(block)		NAE_REG(block, 5, 0x14)
-#define	ILK_SMALL_COUNT5(block)		NAE_REG(block, 5, 0x15)
-#define	ILK_SMALL_COUNT6(block)		NAE_REG(block, 5, 0x16)
-#define	ILK_SMALL_COUNT7(block)		NAE_REG(block, 5, 0x17)
-#define	ILK_MID_COUNT0(block)		NAE_REG(block, 5, 0x18)
-#define	ILK_MID_COUNT1(block)		NAE_REG(block, 5, 0x19)
-#define	ILK_LARGE_COUNT0(block)		NAE_REG(block, 5, 0x1a)
-#define	ILK_LARGE_COUNT1(block)		NAE_REG(block, 5, 0x1b)
-#define	ILK_LARGE_COUNT_H0(block)	NAE_REG(block, 5, 0x1c)
-#define	ILK_LARGE_COUNT_H1(block)	NAE_REG(block, 5, 0x1d)
-
-#endif
diff --git a/sys/mips/nlm/hal/iomap.h b/sys/mips/nlm/hal/iomap.h
deleted file mode 100644
index c5ebb68bffd2..000000000000
--- a/sys/mips/nlm/hal/iomap.h
+++ /dev/null
@@ -1,208 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_IOMAP_H__
-#define	__NLM_HAL_IOMAP_H__
-
-#define	XLP_DEFAULT_IO_BASE             0x18000000
-#define	NMI_BASE			0xbfc00000
-#define	XLP_IO_CLK			133333333
-
-#define	XLP_L2L3_CACHELINE_SIZE		64
-#define	XLP_PCIE_CFG_SIZE		0x1000		/* 4K */
-#define	XLP_PCIE_DEV_BLK_SIZE		(8 * XLP_PCIE_CFG_SIZE)
-#define	XLP_PCIE_BUS_BLK_SIZE		(256 * XLP_PCIE_DEV_BLK_SIZE)
-#define	XLP_IO_SIZE			(64 << 20)	/* ECFG space size */
-#define	XLP_IO_PCI_HDRSZ		0x100
-#define	XLP_IO_DEV(node, dev)		((dev) + (node) * 8)
-#define	XLP_HDR_OFFSET(node, bus, dev, fn)	(((bus) << 20) | \
-				((XLP_IO_DEV(node, dev)) << 15) | ((fn) << 12))
-
-#define	XLP_IO_BRIDGE_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 0, 0)
-/* coherent inter chip */
-#define	XLP_IO_CIC0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 0, 1)
-#define	XLP_IO_CIC1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 0, 2)
-#define	XLP_IO_CIC2_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 0, 3)
-#define	XLP_IO_PIC_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 0, 4)
-
-#define	XLP_IO_PCIE_OFFSET(node, i)	XLP_HDR_OFFSET(node, 0, 1, i)
-#define	XLP_IO_PCIE0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 1, 0)
-#define	XLP_IO_PCIE1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 1, 1)
-#define	XLP_IO_PCIE2_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 1, 2)
-#define	XLP_IO_PCIE3_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 1, 3)
-
-#define	XLP_IO_USB_OFFSET(node, i)	XLP_HDR_OFFSET(node, 0, 2, i)
-#define	XLP_IO_USB_EHCI0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 0)
-#define	XLP_IO_USB_OHCI0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 1)
-#define	XLP_IO_USB_OHCI1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 2)
-#define	XLP_IO_USB_EHCI1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 3)
-#define	XLP_IO_USB_OHCI2_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 4)
-#define	XLP_IO_USB_OHCI3_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 2, 5)
-
-#define	XLP_IO_NAE_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 3, 0)
-#define	XLP_IO_POE_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 3, 1)
-#define	XLP_IO_SATA_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 3, 2)
-
-#define	XLP_IO_CMS_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 4, 0)
-
-#define	XLP_IO_DMA_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 5, 0)
-#define	XLP_IO_SEC_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 5, 1)
-#define	XLP_IO_RSA_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 5, 2)
-#define	XLP_IO_CMP_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 5, 3)
-#define	XLP_IO_SRIO_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 5, 4)
-#define	XLP_IO_REGEX_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 5, 5)
-
-#define	XLP_IO_UART_OFFSET(node, i)	XLP_HDR_OFFSET(node, 0, 6, i)
-#define	XLP_IO_UART0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 0)
-#define	XLP_IO_UART1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 1)
-#define	XLP_IO_I2C_OFFSET(node, i)	XLP_HDR_OFFSET(node, 0, 6, 2 + i)
-#define	XLP_IO_I2C0_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 2)
-#define	XLP_IO_I2C1_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 3)
-#define	XLP_IO_GPIO_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 4)
-/* system management */
-#define	XLP_IO_SYS_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 6, 5)
-#define	XLP_IO_JTAG_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 6, 6)
-
-#define	XLP_IO_NOR_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 7, 0)
-#define	XLP_IO_NAND_OFFSET(node)	XLP_HDR_OFFSET(node, 0, 7, 1)
-#define	XLP_IO_SPI_OFFSET(node)		XLP_HDR_OFFSET(node, 0, 7, 2)
-/* SD flash */
-#define	XLP_IO_SD_OFFSET(node)          XLP_HDR_OFFSET(node, 0, 7, 3)
-#define	XLP_IO_MMC_OFFSET(node, slot)   \
-		((XLP_IO_SD_OFFSET(node))+(slot*0x100)+XLP_IO_PCI_HDRSZ)
-
-/* PCI config header register id's */
-#define	XLP_PCI_CFGREG0			0x00
-#define	XLP_PCI_CFGREG1			0x01
-#define	XLP_PCI_CFGREG2			0x02
-#define	XLP_PCI_CFGREG3			0x03
-#define	XLP_PCI_CFGREG4			0x04
-#define	XLP_PCI_CFGREG5			0x05
-#define	XLP_PCI_DEVINFO_REG0		0x30
-#define	XLP_PCI_DEVINFO_REG1		0x31
-#define	XLP_PCI_DEVINFO_REG2		0x32
-#define	XLP_PCI_DEVINFO_REG3		0x33
-#define	XLP_PCI_DEVINFO_REG4		0x34
-#define	XLP_PCI_DEVINFO_REG5		0x35
-#define	XLP_PCI_DEVINFO_REG6		0x36
-#define	XLP_PCI_DEVINFO_REG7		0x37
-#define	XLP_PCI_DEVSCRATCH_REG0		0x38
-#define	XLP_PCI_DEVSCRATCH_REG1		0x39
-#define	XLP_PCI_DEVSCRATCH_REG2		0x3a
-#define	XLP_PCI_DEVSCRATCH_REG3		0x3b
-#define	XLP_PCI_MSGSTN_REG		0x3c
-#define	XLP_PCI_IRTINFO_REG		0x3d
-#define	XLP_PCI_UCODEINFO_REG		0x3e
-#define	XLP_PCI_SBB_WT_REG		0x3f
-
-/* PCI IDs for SoC device */
-#define	PCI_VENDOR_NETLOGIC		0x184e
-
-#define	PCI_DEVICE_ID_NLM_ROOT		0x1001
-#define	PCI_DEVICE_ID_NLM_ICI		0x1002
-#define	PCI_DEVICE_ID_NLM_PIC		0x1003
-#define	PCI_DEVICE_ID_NLM_PCIE		0x1004
-#define	PCI_DEVICE_ID_NLM_EHCI		0x1007
-#define	PCI_DEVICE_ID_NLM_ILK		0x1008
-#define	PCI_DEVICE_ID_NLM_NAE		0x1009
-#define	PCI_DEVICE_ID_NLM_POE		0x100A
-#define	PCI_DEVICE_ID_NLM_FMN		0x100B
-#define	PCI_DEVICE_ID_NLM_RAID		0x100D
-#define	PCI_DEVICE_ID_NLM_SAE		0x100D
-#define	PCI_DEVICE_ID_NLM_RSA		0x100E
-#define	PCI_DEVICE_ID_NLM_CMP		0x100F
-#define	PCI_DEVICE_ID_NLM_UART		0x1010
-#define	PCI_DEVICE_ID_NLM_I2C		0x1011
-#define	PCI_DEVICE_ID_NLM_NOR		0x1015
-#define	PCI_DEVICE_ID_NLM_NAND		0x1016
-#define	PCI_DEVICE_ID_NLM_MMC		0x1018
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_pci_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_pci_reg(b, r, v)	nlm_write_reg(b, r, v)
-
-extern uint64_t xlp_sys_base;
-extern uint64_t xlp_pic_base;
-
-static __inline__ int
-nlm_dev_exists(uint32_t devoffset)
-{
-	uint64_t pcibase = nlm_pcicfg_base(devoffset);
-
-	return (nlm_read_reg(pcibase, XLP_PCI_CFGREG0) != 0xffffffff);
-}
-
-static __inline__ int
-nlm_qidstart(uint64_t pcibase)
-{
-	return (nlm_read_reg(pcibase, XLP_PCI_MSGSTN_REG) & 0xffff);
-}
-
-static __inline__ int
-nlm_qnum(uint64_t pcibase)
-{
-	return (nlm_read_reg(pcibase, XLP_PCI_MSGSTN_REG) >> 16);
-}
-
-static __inline__ int
-nlm_irtstart(uint64_t pcibase)
-{
-	return (nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff);
-}
-
-static __inline__ int
-nlm_irtnum(uint64_t pcibase)
-{
-	return (nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) >> 16);
-}
-
-static __inline__ int
-nlm_num_uengines(uint64_t pcibase)
-{
-	return nlm_read_reg(pcibase, XLP_PCI_UCODEINFO_REG);
-}
-
-/*
- * Find node on which a given Soc device is located.
- * input is the pci device (slot) number.
- */
-static __inline__ int
-nlm_get_device_node(int device)
-{
-	return (device / 8);
-}
-
-#endif /* !LOCORE or !__ASSEMBLY */
-
-#endif /* __NLM_HAL_IOMAP_H__ */
diff --git a/sys/mips/nlm/hal/mdio.h b/sys/mips/nlm/hal/mdio.h
deleted file mode 100644
index c4f3e8cde6ca..000000000000
--- a/sys/mips/nlm/hal/mdio.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __NLM_MDIO_H__
-#define	__NLM_MDIO_H__
-
-/**
-* @file_name mdio.h
-* @author Netlogic Microsystems
-* @brief Access functions for XLP MDIO
-*/
-#define	INT_MDIO_CTRL				0x19
-#define	INT_MDIO_CTRL_DATA			0x1A
-#define	INT_MDIO_RD_STAT			0x1B
-#define	INT_MDIO_LINK_STAT			0x1C
-#define	EXT_G0_MDIO_CTRL			0x1D
-#define	EXT_G1_MDIO_CTRL			0x21
-#define	EXT_G0_MDIO_CTRL_DATA			0x1E
-#define	EXT_G1_MDIO_CTRL_DATA			0x22
-#define	EXT_G0_MDIO_LINK_STAT			0x20
-#define	EXT_G1_MDIO_LINK_STAT			0x24
-#define	EXT_G0_MDIO_RD_STAT			0x1F
-#define	EXT_G1_MDIO_RD_STAT			0x23
-
-#define	INT_MDIO_CTRL_ST_POS			0
-#define	INT_MDIO_CTRL_OP_POS			2
-#define	INT_MDIO_CTRL_PHYADDR_POS		4
-#define	INT_MDIO_CTRL_DEVTYPE_POS		9
-#define	INT_MDIO_CTRL_TA_POS			14
-#define	INT_MDIO_CTRL_MIIM_POS			16
-#define	INT_MDIO_CTRL_LOAD_POS			19
-#define	INT_MDIO_CTRL_XDIV_POS			21
-#define	INT_MDIO_CTRL_MCDIV_POS			28
-#define	INT_MDIO_CTRL_RST			0x40000000
-#define	INT_MDIO_CTRL_SMP			0x00100000
-#define	INT_MDIO_CTRL_CMD_LOAD			0x00080000
-
-#define	INT_MDIO_RD_STAT_MASK			0x0000FFFF
-#define	INT_MDIO_STAT_LFV			0x00010000
-#define	INT_MDIO_STAT_SC			0x00020000
-#define	INT_MDIO_STAT_SM			0x00040000
-#define	INT_MDIO_STAT_MIILFS			0x00080000
-#define	INT_MDIO_STAT_MBSY			0x00100000
-
-#define	EXT_G_MDIO_CLOCK_DIV_4			0
-#define	EXT_G_MDIO_CLOCK_DIV_2			1
-#define	EXT_G_MDIO_CLOCK_DIV_1			2
-#define	EXT_G_MDIO_REGADDR_POS			5
-#define	EXT_G_MDIO_PHYADDR_POS			10
-#define	EXT_G_MDIO_CMD_SP			0x00008000
-#define	EXT_G_MDIO_CMD_PSIA			0x00010000
-#define	EXT_G_MDIO_CMD_LCD			0x00020000
-#define	EXT_G_MDIO_CMD_RDS			0x00040000
-#define	EXT_G_MDIO_CMD_SC			0x00080000
-#define	EXT_G_MDIO_MMRST			0x00100000
-#define	EXT_G_MDIO_DIV				0x0000001E
-#define	EXT_G_MDIO_DIV_WITH_HW_DIV64		0x00000010
-
-#define	EXT_G_MDIO_RD_STAT_MASK			0x0000FFFF
-#define	EXT_G_MDIO_STAT_LFV			0x00010000
-#define	EXT_G_MDIO_STAT_SC			0x00020000
-#define	EXT_G_MDIO_STAT_SM			0x00040000
-#define	EXT_G_MDIO_STAT_MIILFS			0x00080000
-#define	EXT_G_MDIO_STAT_MBSY			0x80000000
-#define	MDIO_OP_CMD_READ			0x10
-#define	MDIO_OP_CMD_WRITE			0x01
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-int nlm_int_gmac_mdio_read(uint64_t, int, int, int, int, int);
-int nlm_int_gmac_mdio_write(uint64_t, int, int, int, int, int, uint16_t);
-int nlm_int_gmac_mdio_reset(uint64_t, int, int, int);
-int nlm_gmac_mdio_read(uint64_t, int, int, int, int, int);
-int nlm_gmac_mdio_write(uint64_t, int, int, int, int, int, uint16_t);
-int nlm_gmac_mdio_reset(uint64_t, int, int, int);
-void nlm_mdio_reset_all(uint64_t);
-
-#endif /* !(LOCORE) && !(__ASSEMBLY__) */
-#endif
diff --git a/sys/mips/nlm/hal/mips-extns.h b/sys/mips/nlm/hal/mips-extns.h
deleted file mode 100644
index 93c9db5d81cc..000000000000
--- a/sys/mips/nlm/hal/mips-extns.h
+++ /dev/null
@@ -1,276 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_MIPS_EXTNS_H__
-#define	__NLM_MIPS_EXTNS_H__
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-static __inline__ int32_t nlm_swapw(int32_t *loc, int32_t val)
-{
-	int32_t oldval = 0;
-
-	__asm__ __volatile__ (
-		".set push\n"
-		".set noreorder\n"
-		"move $9, %2\n"
-		"move $8, %3\n"
-		".word 0x71280014\n"   /* "swapw $8, $9\n" */
-		"move %1, $8\n"
-		".set pop\n"
-		: "+m" (*loc), "=r" (oldval)
-		: "r" (loc), "r" (val)
-		: "$8", "$9" );
-
-	return oldval;
-}
-
-static __inline__ uint32_t nlm_swapwu(int32_t *loc, uint32_t val)
-{
-	uint32_t oldval;
-
-	__asm__ __volatile__ (
-		".set push\n"
-		".set noreorder\n"
-		"move $9, %2\n"
-		"move $8, %3\n"
-		".word 0x71280015\n"   /* "swapwu $8, $9\n" */
-		"move %1, $8\n"
-		".set pop\n"
-		: "+m" (*loc), "=r" (oldval)
-		: "r" (loc), "r" (val)
-		: "$8", "$9" );
-
-	return oldval;
-}
-
-#if (__mips == 64)
-static __inline__ uint64_t nlm_swapd(int32_t *loc, uint64_t val)
-{
-	uint64_t oldval;
-
-	__asm__ __volatile__ (
-		".set push\n"
-		".set noreorder\n"
-		"move $9, %2\n"
-		"move $8, %3\n"
-		".word 0x71280014\n"   /* "swapw $8, $9\n" */
-		"move %1, $8\n"
-		".set pop\n"
-		: "+m" (*loc), "=r" (oldval)
-		: "r" (loc), "r" (val)
-		: "$8", "$9" );
-
-	return oldval;
-}
-#endif
-
-/*
- * Atomic increment a unsigned  int
- */
-static __inline unsigned int
-nlm_ldaddwu(unsigned int value, unsigned int *addr)
-{
-	__asm__	 __volatile__(
-	    ".set	push\n"
-	    ".set	noreorder\n"
-	    "move	$8, %2\n"
-	    "move	$9, %3\n"
-	    ".word	0x71280011\n"  /* ldaddwu $8, $9 */
-	    "move	%0, $8\n"
-	    ".set	pop\n"
-	    : "=&r"(value), "+m"(*addr)
-	    : "0"(value), "r" ((unsigned long)addr)
-	    :  "$8", "$9");
-
-	return (value);
-}
-/*
- * 32 bit read write for c0
- */
-#define	read_c0_register32(reg, sel)				\
-({								\
-	 uint32_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mfc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define	write_c0_register32(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips32\n\t"				\
-	    "mtc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-
-#if defined(__mips_n64) || defined(__mips_n32)
-/*
- * On 64 bit compilation, the operations are simple
- */
-#define	read_c0_register64(reg, sel)				\
-({								\
-	uint64_t __rv;						\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	    : "=r" (__rv) : "i" (reg), "i" (sel) );		\
-	__rv;							\
- })
-
-#define	write_c0_register64(reg,  sel, value)			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmtc0	%0, $%1, %2\n\t"			\
-	    ".set	pop\n"					\
-	: : "r" (value), "i" (reg), "i" (sel) );
-#else /* ! (defined(__mips_n64) || defined(__mips_n32)) */
-
-/*
- * 32 bit compilation, 64 bit values has to split
- */
-#define	read_c0_register64(reg, sel)				\
-({								\
-	uint32_t __high, __low;					\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dmfc0	$8, $%2, %3\n\t"			\
-	    "dsra32	%0, $8, 0\n\t"				\
-	    "sll	%1, $8, 0\n\t"				\
-	    ".set	pop\n"					\
-	    : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel)	\
-	    : "$8");						\
-	((uint64_t)__high << 32) | __low;			\
-})
-
-#define	write_c0_register64(reg, sel, value)			\
-do {								\
-       uint32_t __high = value >> 32;				\
-       uint32_t __low = value & 0xffffffff;			\
-	__asm__ __volatile__(					\
-	    ".set	push\n\t"				\
-	    ".set	noreorder\n\t"				\
-	    ".set	mips64\n\t"				\
-	    "dsll32	$8, %1, 0\n\t"				\
-	    "dsll32	$9, %0, 0\n\t"				\
-	    "dsrl32	$8, $8, 0\n\t"				\
-	    "or		$8, $8, $9\n\t"				\
-	    "dmtc0	$8, $%2, %3\n\t"			\
-	    ".set	pop"					\
-	    :: "r"(__high), "r"(__low),	 "i"(reg), "i"(sel)	\
-	    :"$8", "$9");					\
-} while(0)
-
-#endif
-/* functions to write to and read from the extended
- * cp0 registers.
- * EIRR : Extended Interrupt Request Register
- *        cp0 register 9 sel 6
- *        bits 0...7 are same as cause register 8...15
- * EIMR : Extended Interrupt Mask Register
- *        cp0 register 9 sel 7
- *        bits 0...7 are same as status register 8...15
- */
-static __inline uint64_t
-nlm_read_c0_eirr(void)
-{
-
-	return (read_c0_register64(9, 6));
-}
-
-static __inline void
-nlm_write_c0_eirr(uint64_t val)
-{
-
-	write_c0_register64(9, 6, val);
-}
-
-static __inline uint64_t
-nlm_read_c0_eimr(void)
-{
-
-	return (read_c0_register64(9, 7));
-}
-
-static __inline void
-nlm_write_c0_eimr(uint64_t val)
-{
-
-	write_c0_register64(9, 7, val);
-}
-
-static __inline__ uint32_t
-nlm_read_c0_ebase(void)
-{
-
-	return (read_c0_register32(15, 1));
-}
-
-static __inline__ int
-nlm_nodeid(void)
-{
-	return (nlm_read_c0_ebase() >> 5) & 0x3;
-}
-
-static __inline__ int
-nlm_cpuid(void)
-{
-	return nlm_read_c0_ebase() & 0x1f;
-}
-
-static __inline__ int
-nlm_threadid(void)
-{
-	return nlm_read_c0_ebase() & 0x3;
-}
-
-static __inline__ int
-nlm_coreid(void)
-{
-	return (nlm_read_c0_ebase() >> 2) & 0x7;
-}
-#endif
-
-#define	XLP_MAX_NODES	4
-#define	XLP_MAX_CORES	8
-#define	XLP_MAX_THREADS	4
-
-#endif
diff --git a/sys/mips/nlm/hal/mmu.h b/sys/mips/nlm/hal/mmu.h
deleted file mode 100644
index 1173eb48a6b0..000000000000
--- a/sys/mips/nlm/hal/mmu.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __XLP_MMU_H__
-#define	__XLP_MMU_H__
-
-#include <mips/nlm/hal/mips-extns.h>
-
-static __inline__ uint32_t
-nlm_read_c0_config6(void)
-{
-	uint32_t rv;
-
-	__asm__ __volatile__ (
-		".set	push\n"
-		".set	mips64\n"
-		"mfc0	%0, $16, 6\n"
-		".set	pop\n"
-		: "=r" (rv));
-
-        return rv;
-}
-
-static __inline__ void
-nlm_write_c0_config6(uint32_t value)
-{
-	__asm__ __volatile__ (
-		".set	push\n"
-		".set	mips64\n"
-		"mtc0	%0, $16, 6\n"
-		".set	pop\n"
-		: : "r" (value));
-}
-
-static __inline__ uint32_t
-nlm_read_c0_config7(void)
-{
-	uint32_t rv;
-
-	__asm__ __volatile__ (
-		".set	push\n"
-		".set	mips64\n"
-		"mfc0	%0, $16, 7\n"
-		".set	pop\n"
-		: "=r" (rv));
-
-        return rv;
-}
-
-static __inline__ void
-nlm_write_c0_config7(uint32_t value)
-{
-	__asm__ __volatile__ (
-		".set	push\n"
-		".set	mips64\n"
-		"mtc0	%0, $16, 7\n"
-		".set	pop\n"
-		: : "r" (value));
-}
-/**
- * On power on reset, XLP comes up with 64 TLBs.
- * Large-variable-tlb's (ELVT) and extended TLB is disabled.
- * Enabling large-variable-tlb's sets up the standard
- * TLB size from 64 to 128 TLBs.
- * Enabling fixed TLB (EFT) sets up an additional 2048 tlbs.
- * ELVT + EFT = 128 + 2048 = 2176 TLB entries.
- * threads  64-entry-standard-tlb    128-entry-standard-tlb
- * per      std-tlb-only| std+EFT  | std-tlb-only| std+EFT
- * core                 |          |             |
- * --------------------------------------------------------
- * 1         64           64+2048     128          128+2048
- * 2         64           64+1024      64           64+1024
- * 4         32           32+512       32           32+512
- *
- * 1(G)      64           64+2048     128          128+2048
- * 2(G)      128         128+2048     128          128+2048
- * 4(G)      128         128+2048     128          128+2048
- * (G) = Global mode
- */
-
-/* en = 1 to enable
- * en = 0 to disable
- */
-static __inline__ void nlm_large_variable_tlb_en (int en)
-{
-	unsigned int val;
-
-	val = nlm_read_c0_config6();
-	val |= (en << 5);
-	nlm_write_c0_config6(val);
-	return;
-}
-
-/* en = 1 to enable
- * en = 0 to disable
- */
-static __inline__ void nlm_pagewalker_en(int en)
-{
-	unsigned int val;
-
-	val = nlm_read_c0_config6();
-	val |= (en << 3);
-	nlm_write_c0_config6(val);
-	return;
-}
-
-/* en = 1 to enable
- * en = 0 to disable
- */
-static __inline__ void nlm_extended_tlb_en(int en)
-{
-	unsigned int val;
-
-	val = nlm_read_c0_config6();
-	val |= (en << 2);
-	nlm_write_c0_config6(val);
-	return;
-}
-
-static __inline__ int nlm_get_num_combined_tlbs(void)
-{
-	return (((nlm_read_c0_config6() >> 16) & 0xffff) + 1);
-}
-
-/* get number of variable TLB entries */
-static __inline__ int nlm_get_num_vtlbs(void)
-{
-	return (((nlm_read_c0_config6() >> 6) & 0x3ff) + 1);
-}
-
-static __inline__ void nlm_setup_extended_pagemask(int mask)
-{
-	nlm_write_c0_config7(mask);
-}
-
-#endif
diff --git a/sys/mips/nlm/hal/nae.h b/sys/mips/nlm/hal/nae.h
deleted file mode 100644
index a2a3756947d7..000000000000
--- a/sys/mips/nlm/hal/nae.h
+++ /dev/null
@@ -1,658 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __NLM_NAE_H__
-#define	__NLM_NAE_H__
-
-/**
-* @file_name nae.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP Networt Accelerator Engine
-*/
-
-/* NAE specific registers */
-#define	NAE_REG(blk, intf, reg)	(((blk) << 11) | ((intf) << 7) | (reg))
-
-/* ingress path registers */
-#define	NAE_RX_CONFIG			NAE_REG(7, 0, 0x10)
-#define	NAE_RX_IF_BASE_CONFIG0		NAE_REG(7, 0, 0x12)
-#define	NAE_RX_IF_BASE_CONFIG1		NAE_REG(7, 0, 0x13)
-#define	NAE_RX_IF_BASE_CONFIG2		NAE_REG(7, 0, 0x14)
-#define	NAE_RX_IF_BASE_CONFIG3		NAE_REG(7, 0, 0x15)
-#define	NAE_RX_IF_BASE_CONFIG4		NAE_REG(7, 0, 0x16)
-#define	NAE_RX_IF_BASE_CONFIG5		NAE_REG(7, 0, 0x17)
-#define	NAE_RX_IF_BASE_CONFIG6		NAE_REG(7, 0, 0x18)
-#define	NAE_RX_IF_BASE_CONFIG7		NAE_REG(7, 0, 0x19)
-#define	NAE_RX_IF_BASE_CONFIG8		NAE_REG(7, 0, 0x1a)
-#define	NAE_RX_IF_BASE_CONFIG9		NAE_REG(7, 0, 0x1b)
-#define	NAE_RX_IF_VEC_VALID		NAE_REG(7, 0, 0x1c)
-#define	NAE_RX_IF_SLOT_CAL		NAE_REG(7, 0, 0x1d)
-#define	NAE_PARSER_CONFIG		NAE_REG(7, 0, 0x1e)
-#define	NAE_PARSER_SEQ_FIFO_CFG		NAE_REG(7, 0, 0x1f)
-#define	NAE_FREE_IN_FIFO_CFG		NAE_REG(7, 0, 0x20)
-#define	NAE_RXBUF_BASE_DPTH_ADDR	NAE_REG(7, 0, 0x21)
-#define	NAE_RXBUF_BASE_DPTH		NAE_REG(7, 0, 0x22)
-#define	NAE_RX_UCORE_CFG		NAE_REG(7, 0, 0x23)
-#define	NAE_RX_UCORE_CAM_MASK0		NAE_REG(7, 0, 0x24)
-#define	NAE_RX_UCORE_CAM_MASK1		NAE_REG(7, 0, 0x25)
-#define	NAE_RX_UCORE_CAM_MASK2		NAE_REG(7, 0, 0x26)
-#define	NAE_RX_UCORE_CAM_MASK3		NAE_REG(7, 0, 0x27)
-#define	NAE_FREEIN_FIFO_UNIQ_SZ_CFG	NAE_REG(7, 0, 0x28)
-#define	NAE_RX_CRC_POLY0_CFG		NAE_REG(7, 0, 0x2a)
-#define	NAE_RX_CRC_POLY1_CFG		NAE_REG(7, 0, 0x2b)
-#define	NAE_FREE_SPILL0_MEM_CFG		NAE_REG(7, 0, 0x2c)
-#define	NAE_FREE_SPILL1_MEM_CFG		NAE_REG(7, 0, 0x2d)
-#define	NAE_FREEFIFO_THRESH_CFG		NAE_REG(7, 0, 0x2e)
-#define	NAE_FLOW_CRC16_POLY_CFG		NAE_REG(7, 0, 0x2f)
-#define	NAE_EGR_NIOR_CAL_LEN_REG	NAE_REG(7, 0, 0x4e)
-#define	NAE_EGR_NIOR_CRDT_CAL_PROG	NAE_REG(7, 0, 0x52)
-#define	NAE_TEST			NAE_REG(7, 0, 0x5f)
-#define	NAE_BIU_TIMEOUT_CFG		NAE_REG(7, 0, 0x60)
-#define	NAE_BIU_CFG			NAE_REG(7, 0, 0x61)
-#define	NAE_RX_FREE_FIFO_POP		NAE_REG(7, 0, 0x62)
-#define	NAE_RX_DSBL_ECC			NAE_REG(7, 0, 0x63)
-#define	NAE_FLOW_BASEMASK_CFG		NAE_REG(7, 0, 0x80)
-#define	NAE_POE_CLASS_SETUP_CFG		NAE_REG(7, 0, 0x81)
-#define	NAE_UCORE_IFACEMASK_CFG		NAE_REG(7, 0, 0x82)
-#define	NAE_RXBUF_XOFFON_THRESH		NAE_REG(7, 0, 0x83)
-#define	NAE_FLOW_TABLE1_CFG		NAE_REG(7, 0, 0x84)
-#define	NAE_FLOW_TABLE2_CFG		NAE_REG(7, 0, 0x85)
-#define	NAE_FLOW_TABLE3_CFG		NAE_REG(7, 0, 0x86)
-#define	NAE_RX_FREE_FIFO_THRESH		NAE_REG(7, 0, 0x87)
-#define	NAE_RX_PARSER_UNCLA		NAE_REG(7, 0, 0x88)
-#define	NAE_RX_BUF_INTR_THRESH		NAE_REG(7, 0, 0x89)
-#define	NAE_IFACE_FIFO_CFG		NAE_REG(7, 0, 0x8a)
-#define	NAE_PARSER_SEQ_FIFO_THRESH_CFG	NAE_REG(7, 0, 0x8b)
-#define	NAE_RX_ERRINJ_CTRL0		NAE_REG(7, 0, 0x8c)
-#define	NAE_RX_ERRINJ_CTRL1		NAE_REG(7, 0, 0x8d)
-#define	NAE_RX_ERR_LATCH0		NAE_REG(7, 0, 0x8e)
-#define	NAE_RX_ERR_LATCH1		NAE_REG(7, 0, 0x8f)
-#define	NAE_RX_PERF_CTR_CFG		NAE_REG(7, 0, 0xa0)
-#define	NAE_RX_PERF_CTR_VAL		NAE_REG(7, 0, 0xa1)
-
-/* NAE hardware parser registers */
-#define	NAE_L2_TYPE_PORT0		NAE_REG(7, 0, 0x210)
-#define	NAE_L2_TYPE_PORT1		NAE_REG(7, 0, 0x211)
-#define	NAE_L2_TYPE_PORT2		NAE_REG(7, 0, 0x212)
-#define	NAE_L2_TYPE_PORT3		NAE_REG(7, 0, 0x213)
-#define	NAE_L2_TYPE_PORT4		NAE_REG(7, 0, 0x214)
-#define	NAE_L2_TYPE_PORT5		NAE_REG(7, 0, 0x215)
-#define	NAE_L2_TYPE_PORT6		NAE_REG(7, 0, 0x216)
-#define	NAE_L2_TYPE_PORT7		NAE_REG(7, 0, 0x217)
-#define	NAE_L2_TYPE_PORT8		NAE_REG(7, 0, 0x218)
-#define	NAE_L2_TYPE_PORT9		NAE_REG(7, 0, 0x219)
-#define	NAE_L2_TYPE_PORT10		NAE_REG(7, 0, 0x21a)
-#define	NAE_L2_TYPE_PORT11		NAE_REG(7, 0, 0x21b)
-#define	NAE_L2_TYPE_PORT12		NAE_REG(7, 0, 0x21c)
-#define	NAE_L2_TYPE_PORT13		NAE_REG(7, 0, 0x21d)
-#define	NAE_L2_TYPE_PORT14		NAE_REG(7, 0, 0x21e)
-#define	NAE_L2_TYPE_PORT15		NAE_REG(7, 0, 0x21f)
-#define	NAE_L2_TYPE_PORT16		NAE_REG(7, 0, 0x220)
-#define	NAE_L2_TYPE_PORT17		NAE_REG(7, 0, 0x221)
-#define	NAE_L2_TYPE_PORT18		NAE_REG(7, 0, 0x222)
-#define	NAE_L2_TYPE_PORT19		NAE_REG(7, 0, 0x223)
-#define	NAE_L3_CTABLE_MASK0		NAE_REG(7, 0, 0x22c)
-#define	NAE_L3_CTABLE_MASK1		NAE_REG(7, 0, 0x22d)
-#define	NAE_L3_CTABLE_MASK2		NAE_REG(7, 0, 0x22e)
-#define	NAE_L3_CTABLE_MASK3		NAE_REG(7, 0, 0x22f)
-#define	NAE_L3CTABLE0			NAE_REG(7, 0, 0x230)
-#define	NAE_L3CTABLE1			NAE_REG(7, 0, 0x231)
-#define	NAE_L3CTABLE2			NAE_REG(7, 0, 0x232)
-#define	NAE_L3CTABLE3			NAE_REG(7, 0, 0x233)
-#define	NAE_L3CTABLE4			NAE_REG(7, 0, 0x234)
-#define	NAE_L3CTABLE5			NAE_REG(7, 0, 0x235)
-#define	NAE_L3CTABLE6			NAE_REG(7, 0, 0x236)
-#define	NAE_L3CTABLE7			NAE_REG(7, 0, 0x237)
-#define	NAE_L3CTABLE8			NAE_REG(7, 0, 0x238)
-#define	NAE_L3CTABLE9			NAE_REG(7, 0, 0x239)
-#define	NAE_L3CTABLE10			NAE_REG(7, 0, 0x23a)
-#define	NAE_L3CTABLE11			NAE_REG(7, 0, 0x23b)
-#define	NAE_L3CTABLE12			NAE_REG(7, 0, 0x23c)
-#define	NAE_L3CTABLE13			NAE_REG(7, 0, 0x23d)
-#define	NAE_L3CTABLE14			NAE_REG(7, 0, 0x23e)
-#define	NAE_L3CTABLE15			NAE_REG(7, 0, 0x23f)
-#define	NAE_L4CTABLE0			NAE_REG(7, 0, 0x250)
-#define	NAE_L4CTABLE1			NAE_REG(7, 0, 0x251)
-#define	NAE_L4CTABLE2			NAE_REG(7, 0, 0x252)
-#define	NAE_L4CTABLE3			NAE_REG(7, 0, 0x253)
-#define	NAE_L4CTABLE4			NAE_REG(7, 0, 0x254)
-#define	NAE_L4CTABLE5			NAE_REG(7, 0, 0x255)
-#define	NAE_L4CTABLE6			NAE_REG(7, 0, 0x256)
-#define	NAE_L4CTABLE7			NAE_REG(7, 0, 0x257)
-#define	NAE_IPV6_EXT_HEADER0		NAE_REG(7, 0, 0x260)
-#define	NAE_IPV6_EXT_HEADER1		NAE_REG(7, 0, 0x261)
-#define	NAE_VLAN_TYPES01		NAE_REG(7, 0, 0x262)
-#define	NAE_VLAN_TYPES23		NAE_REG(7, 0, 0x263)
-
-/* NAE Egress path registers */
-#define	NAE_TX_CONFIG			NAE_REG(7, 0, 0x11)
-#define	NAE_DMA_TX_CREDIT_TH		NAE_REG(7, 0, 0x29)
-#define	NAE_STG1_STG2CRDT_CMD		NAE_REG(7, 0, 0x30)
-#define	NAE_STG2_EHCRDT_CMD		NAE_REG(7, 0, 0x32)
-#define	NAE_EH_FREECRDT_CMD		NAE_REG(7, 0, 0x34)
-#define	NAE_STG2_STRCRDT_CMD		NAE_REG(7, 0, 0x36)
-#define	NAE_TXFIFO_IFACEMAP_CMD		NAE_REG(7, 0, 0x38)
-#define	NAE_VFBID_DESTMAP_CMD		NAE_REG(7, 0, 0x3a)
-#define	NAE_STG1_PMEM_PROG		NAE_REG(7, 0, 0x3c)
-#define	NAE_STG2_PMEM_PROG		NAE_REG(7, 0, 0x3e)
-#define	NAE_EH_PMEM_PROG		NAE_REG(7, 0, 0x40)
-#define	NAE_FREE_PMEM_PROG		NAE_REG(7, 0, 0x42)
-#define	NAE_TX_DDR_ACTVLIST_CMD		NAE_REG(7, 0, 0x44)
-#define	NAE_TX_IF_BURSTMAX_CMD		NAE_REG(7, 0, 0x46)
-#define	NAE_TX_IF_ENABLE_CMD		NAE_REG(7, 0, 0x48)
-#define	NAE_TX_PKTLEN_PMEM_CMD		NAE_REG(7, 0, 0x4a)
-#define	NAE_TX_SCHED_MAP_CMD0		NAE_REG(7, 0, 0x4c)
-#define	NAE_TX_SCHED_MAP_CMD1		NAE_REG(7, 0, 0x4d)
-#define	NAE_TX_PKT_PMEM_CMD0		NAE_REG(7, 0, 0x50)
-#define	NAE_TX_PKT_PMEM_CMD1		NAE_REG(7, 0, 0x51)
-#define	NAE_TX_SCHED_CTRL		NAE_REG(7, 0, 0x53)
-#define	NAE_TX_CRC_POLY0		NAE_REG(7, 0, 0x54)
-#define	NAE_TX_CRC_POLY1		NAE_REG(7, 0, 0x55)
-#define	NAE_TX_CRC_POLY2		NAE_REG(7, 0, 0x56)
-#define	NAE_TX_CRC_POLY3		NAE_REG(7, 0, 0x57)
-#define	NAE_STR_PMEM_CMD		NAE_REG(7, 0, 0x58)
-#define	NAE_TX_IORCRDT_INIT		NAE_REG(7, 0, 0x59)
-#define	NAE_TX_DSBL_ECC			NAE_REG(7, 0, 0x5a)
-#define	NAE_TX_IORCRDT_IGNORE		NAE_REG(7, 0, 0x5b)
-#define	NAE_IF0_1588_TMSTMP_HI		NAE_REG(7, 0, 0x300)
-#define	NAE_IF1_1588_TMSTMP_HI		NAE_REG(7, 0, 0x302)
-#define	NAE_IF2_1588_TMSTMP_HI		NAE_REG(7, 0, 0x304)
-#define	NAE_IF3_1588_TMSTMP_HI		NAE_REG(7, 0, 0x306)
-#define	NAE_IF4_1588_TMSTMP_HI		NAE_REG(7, 0, 0x308)
-#define	NAE_IF5_1588_TMSTMP_HI		NAE_REG(7, 0, 0x30a)
-#define	NAE_IF6_1588_TMSTMP_HI		NAE_REG(7, 0, 0x30c)
-#define	NAE_IF7_1588_TMSTMP_HI		NAE_REG(7, 0, 0x30e)
-#define	NAE_IF8_1588_TMSTMP_HI		NAE_REG(7, 0, 0x310)
-#define	NAE_IF9_1588_TMSTMP_HI		NAE_REG(7, 0, 0x312)
-#define	NAE_IF10_1588_TMSTMP_HI		NAE_REG(7, 0, 0x314)
-#define	NAE_IF11_1588_TMSTMP_HI		NAE_REG(7, 0, 0x316)
-#define	NAE_IF12_1588_TMSTMP_HI		NAE_REG(7, 0, 0x318)
-#define	NAE_IF13_1588_TMSTMP_HI		NAE_REG(7, 0, 0x31a)
-#define	NAE_IF14_1588_TMSTMP_HI		NAE_REG(7, 0, 0x31c)
-#define	NAE_IF15_1588_TMSTMP_HI		NAE_REG(7, 0, 0x31e)
-#define	NAE_IF16_1588_TMSTMP_HI		NAE_REG(7, 0, 0x320)
-#define	NAE_IF17_1588_TMSTMP_HI		NAE_REG(7, 0, 0x322)
-#define	NAE_IF18_1588_TMSTMP_HI		NAE_REG(7, 0, 0x324)
-#define	NAE_IF19_1588_TMSTMP_HI		NAE_REG(7, 0, 0x326)
-#define	NAE_IF0_1588_TMSTMP_LO		NAE_REG(7, 0, 0x301)
-#define	NAE_IF1_1588_TMSTMP_LO		NAE_REG(7, 0, 0x303)
-#define	NAE_IF2_1588_TMSTMP_LO		NAE_REG(7, 0, 0x305)
-#define	NAE_IF3_1588_TMSTMP_LO		NAE_REG(7, 0, 0x307)
-#define	NAE_IF4_1588_TMSTMP_LO		NAE_REG(7, 0, 0x309)
-#define	NAE_IF5_1588_TMSTMP_LO		NAE_REG(7, 0, 0x30b)
-#define	NAE_IF6_1588_TMSTMP_LO		NAE_REG(7, 0, 0x30d)
-#define	NAE_IF7_1588_TMSTMP_LO		NAE_REG(7, 0, 0x30f)
-#define	NAE_IF8_1588_TMSTMP_LO		NAE_REG(7, 0, 0x311)
-#define	NAE_IF9_1588_TMSTMP_LO		NAE_REG(7, 0, 0x313)
-#define	NAE_IF10_1588_TMSTMP_LO		NAE_REG(7, 0, 0x315)
-#define	NAE_IF11_1588_TMSTMP_LO		NAE_REG(7, 0, 0x317)
-#define	NAE_IF12_1588_TMSTMP_LO		NAE_REG(7, 0, 0x319)
-#define	NAE_IF13_1588_TMSTMP_LO		NAE_REG(7, 0, 0x31b)
-#define	NAE_IF14_1588_TMSTMP_LO		NAE_REG(7, 0, 0x31d)
-#define	NAE_IF15_1588_TMSTMP_LO		NAE_REG(7, 0, 0x31f)
-#define	NAE_IF16_1588_TMSTMP_LO		NAE_REG(7, 0, 0x321)
-#define	NAE_IF17_1588_TMSTMP_LO		NAE_REG(7, 0, 0x323)
-#define	NAE_IF18_1588_TMSTMP_LO		NAE_REG(7, 0, 0x325)
-#define	NAE_IF19_1588_TMSTMP_LO		NAE_REG(7, 0, 0x327)
-#define	NAE_TX_EL0			NAE_REG(7, 0, 0x328)
-#define	NAE_TX_EL1			NAE_REG(7, 0, 0x329)
-#define	NAE_EIC0			NAE_REG(7, 0, 0x32a)
-#define	NAE_EIC1			NAE_REG(7, 0, 0x32b)
-#define	NAE_STG1_STG2CRDT_STATUS	NAE_REG(7, 0, 0x32c)
-#define	NAE_STG2_EHCRDT_STATUS		NAE_REG(7, 0, 0x32d)
-#define	NAE_STG2_FREECRDT_STATUS	NAE_REG(7, 0, 0x32e)
-#define	NAE_STG2_STRCRDT_STATUS		NAE_REG(7, 0, 0x32f)
-#define	NAE_TX_PERF_CNTR_INTR_STATUS	NAE_REG(7, 0, 0x330)
-#define	NAE_TX_PERF_CNTR_ROLL_STATUS	NAE_REG(7, 0, 0x331)
-#define	NAE_TX_PERF_CNTR0		NAE_REG(7, 0, 0x332)
-#define	NAE_TX_PERF_CNTR1		NAE_REG(7, 0, 0x334)
-#define	NAE_TX_PERF_CNTR2		NAE_REG(7, 0, 0x336)
-#define	NAE_TX_PERF_CNTR3		NAE_REG(7, 0, 0x338)
-#define	NAE_TX_PERF_CNTR4		NAE_REG(7, 0, 0x33a)
-#define	NAE_TX_PERF_CNTR0_CTL		NAE_REG(7, 0, 0x333)
-#define	NAE_TX_PERF_CNTR1_CTL		NAE_REG(7, 0, 0x335)
-#define	NAE_TX_PERF_CNTR2_CTL		NAE_REG(7, 0, 0x337)
-#define	NAE_TX_PERF_CNTR3_CTL		NAE_REG(7, 0, 0x339)
-#define	NAE_TX_PERF_CNTR4_CTL		NAE_REG(7, 0, 0x33b)
-#define	NAE_VFBID_DESTMAP_STATUS	NAE_REG(7, 0, 0x380)
-#define	NAE_STG2_PMEM_STATUS		NAE_REG(7, 0, 0x381)
-#define	NAE_EH_PMEM_STATUS		NAE_REG(7, 0, 0x382)
-#define	NAE_FREE_PMEM_STATUS		NAE_REG(7, 0, 0x383)
-#define	NAE_TX_DDR_ACTVLIST_STATUS	NAE_REG(7, 0, 0x384)
-#define	NAE_TX_IF_BURSTMAX_STATUS	NAE_REG(7, 0, 0x385)
-#define	NAE_TX_PKTLEN_PMEM_STATUS	NAE_REG(7, 0, 0x386)
-#define	NAE_TX_SCHED_MAP_STATUS0	NAE_REG(7, 0, 0x387)
-#define	NAE_TX_SCHED_MAP_STATUS1	NAE_REG(7, 0, 0x388)
-#define	NAE_TX_PKT_PMEM_STATUS		NAE_REG(7, 0, 0x389)
-#define	NAE_STR_PMEM_STATUS		NAE_REG(7, 0, 0x38a)
-
-/* Network interface interrupt registers */
-#define	NAE_NET_IF0_INTR_STAT		NAE_REG(7, 0, 0x280)
-#define	NAE_NET_IF1_INTR_STAT		NAE_REG(7, 0, 0x282)
-#define	NAE_NET_IF2_INTR_STAT		NAE_REG(7, 0, 0x284)
-#define	NAE_NET_IF3_INTR_STAT		NAE_REG(7, 0, 0x286)
-#define	NAE_NET_IF4_INTR_STAT		NAE_REG(7, 0, 0x288)
-#define	NAE_NET_IF5_INTR_STAT		NAE_REG(7, 0, 0x28a)
-#define	NAE_NET_IF6_INTR_STAT		NAE_REG(7, 0, 0x28c)
-#define	NAE_NET_IF7_INTR_STAT		NAE_REG(7, 0, 0x28e)
-#define	NAE_NET_IF8_INTR_STAT		NAE_REG(7, 0, 0x290)
-#define	NAE_NET_IF9_INTR_STAT		NAE_REG(7, 0, 0x292)
-#define	NAE_NET_IF10_INTR_STAT		NAE_REG(7, 0, 0x294)
-#define	NAE_NET_IF11_INTR_STAT		NAE_REG(7, 0, 0x296)
-#define	NAE_NET_IF12_INTR_STAT		NAE_REG(7, 0, 0x298)
-#define	NAE_NET_IF13_INTR_STAT		NAE_REG(7, 0, 0x29a)
-#define	NAE_NET_IF14_INTR_STAT		NAE_REG(7, 0, 0x29c)
-#define	NAE_NET_IF15_INTR_STAT		NAE_REG(7, 0, 0x29e)
-#define	NAE_NET_IF16_INTR_STAT		NAE_REG(7, 0, 0x2a0)
-#define	NAE_NET_IF17_INTR_STAT		NAE_REG(7, 0, 0x2a2)
-#define	NAE_NET_IF18_INTR_STAT		NAE_REG(7, 0, 0x2a4)
-#define	NAE_NET_IF19_INTR_STAT		NAE_REG(7, 0, 0x2a6)
-#define	NAE_NET_IF0_INTR_MASK		NAE_REG(7, 0, 0x281)
-#define	NAE_NET_IF1_INTR_MASK		NAE_REG(7, 0, 0x283)
-#define	NAE_NET_IF2_INTR_MASK		NAE_REG(7, 0, 0x285)
-#define	NAE_NET_IF3_INTR_MASK		NAE_REG(7, 0, 0x287)
-#define	NAE_NET_IF4_INTR_MASK		NAE_REG(7, 0, 0x289)
-#define	NAE_NET_IF5_INTR_MASK		NAE_REG(7, 0, 0x28b)
-#define	NAE_NET_IF6_INTR_MASK		NAE_REG(7, 0, 0x28d)
-#define	NAE_NET_IF7_INTR_MASK		NAE_REG(7, 0, 0x28f)
-#define	NAE_NET_IF8_INTR_MASK		NAE_REG(7, 0, 0x291)
-#define	NAE_NET_IF9_INTR_MASK		NAE_REG(7, 0, 0x293)
-#define	NAE_NET_IF10_INTR_MASK		NAE_REG(7, 0, 0x295)
-#define	NAE_NET_IF11_INTR_MASK		NAE_REG(7, 0, 0x297)
-#define	NAE_NET_IF12_INTR_MASK		NAE_REG(7, 0, 0x299)
-#define	NAE_NET_IF13_INTR_MASK		NAE_REG(7, 0, 0x29b)
-#define	NAE_NET_IF14_INTR_MASK		NAE_REG(7, 0, 0x29d)
-#define	NAE_NET_IF15_INTR_MASK		NAE_REG(7, 0, 0x29f)
-#define	NAE_NET_IF16_INTR_MASK		NAE_REG(7, 0, 0x2a1)
-#define	NAE_NET_IF17_INTR_MASK		NAE_REG(7, 0, 0x2a3)
-#define	NAE_NET_IF18_INTR_MASK		NAE_REG(7, 0, 0x2a5)
-#define	NAE_NET_IF19_INTR_MASK		NAE_REG(7, 0, 0x2a7)
-#define	NAE_COMMON0_INTR_STAT		NAE_REG(7, 0, 0x2a8)
-#define	NAE_COMMON0_INTR_MASK		NAE_REG(7, 0, 0x2a9)
-#define	NAE_COMMON1_INTR_STAT		NAE_REG(7, 0, 0x2aa)
-#define	NAE_COMMON1_INTR_MASK		NAE_REG(7, 0, 0x2ab)
-
-/* Network Interface Low-block Registers */
-#define	NAE_PHY_LANE0_STATUS(block)	NAE_REG(block, 0xe, 0)
-#define	NAE_PHY_LANE1_STATUS(block)	NAE_REG(block, 0xe, 1)
-#define	NAE_PHY_LANE2_STATUS(block)	NAE_REG(block, 0xe, 2)
-#define	NAE_PHY_LANE3_STATUS(block)	NAE_REG(block, 0xe, 3)
-#define	NAE_PHY_LANE0_CTRL(block)	NAE_REG(block, 0xe, 4)
-#define	NAE_PHY_LANE1_CTRL(block)	NAE_REG(block, 0xe, 5)
-#define	NAE_PHY_LANE2_CTRL(block)	NAE_REG(block, 0xe, 6)
-#define	NAE_PHY_LANE3_CTRL(block)	NAE_REG(block, 0xe, 7)
-
-/* Network interface Top-block registers */
-#define	NAE_LANE_CFG_CPLX_0_1		NAE_REG(7, 0, 0x780)
-#define	NAE_LANE_CFG_CPLX_2_3		NAE_REG(7, 0, 0x781)
-#define	NAE_LANE_CFG_CPLX_4		NAE_REG(7, 0, 0x782)
-#define	NAE_LANE_CFG_SOFTRESET		NAE_REG(7, 0, 0x783)
-#define	NAE_1588_PTP_OFFSET_HI		NAE_REG(7, 0, 0x784)
-#define	NAE_1588_PTP_OFFSET_LO		NAE_REG(7, 0, 0x785)
-#define	NAE_1588_PTP_INC_DEN		NAE_REG(7, 0, 0x786)
-#define	NAE_1588_PTP_INC_NUM		NAE_REG(7, 0, 0x787)
-#define	NAE_1588_PTP_INC_INTG		NAE_REG(7, 0, 0x788)
-#define	NAE_1588_PTP_CONTROL		NAE_REG(7, 0, 0x789)
-#define	NAE_1588_PTP_STATUS		NAE_REG(7, 0, 0x78a)
-#define	NAE_1588_PTP_USER_VALUE_HI	NAE_REG(7, 0, 0x78b)
-#define	NAE_1588_PTP_USER_VALUE_LO	NAE_REG(7, 0, 0x78c)
-#define	NAE_1588_PTP_TMR1_HI		NAE_REG(7, 0, 0x78d)
-#define	NAE_1588_PTP_TMR1_LO		NAE_REG(7, 0, 0x78e)
-#define	NAE_1588_PTP_TMR2_HI		NAE_REG(7, 0, 0x78f)
-#define	NAE_1588_PTP_TMR2_LO		NAE_REG(7, 0, 0x790)
-#define	NAE_1588_PTP_TMR3_HI		NAE_REG(7, 0, 0x791)
-#define	NAE_1588_PTP_TMR3_LO		NAE_REG(7, 0, 0x792)
-#define	NAE_TX_FC_CAL_IDX_TBL_CTRL	NAE_REG(7, 0, 0x793)
-#define	NAE_TX_FC_CAL_TBL_CTRL		NAE_REG(7, 0, 0x794)
-#define	NAE_TX_FC_CAL_TBL_DATA0		NAE_REG(7, 0, 0x795)
-#define	NAE_TX_FC_CAL_TBL_DATA1		NAE_REG(7, 0, 0x796)
-#define	NAE_TX_FC_CAL_TBL_DATA2		NAE_REG(7, 0, 0x797)
-#define	NAE_TX_FC_CAL_TBL_DATA3		NAE_REG(7, 0, 0x798)
-#define	NAE_INT_MDIO_CTRL		NAE_REG(7, 0, 0x799)
-#define	NAE_INT_MDIO_CTRL_DATA		NAE_REG(7, 0, 0x79a)
-#define	NAE_INT_MDIO_RD_STAT		NAE_REG(7, 0, 0x79b)
-#define	NAE_INT_MDIO_LINK_STAT		NAE_REG(7, 0, 0x79c)
-#define	NAE_EXT_G0_MDIO_CTRL		NAE_REG(7, 0, 0x79d)
-#define	NAE_EXT_G1_MDIO_CTRL		NAE_REG(7, 0, 0x7a1)
-#define	NAE_EXT_G0_MDIO_CTRL_DATA	NAE_REG(7, 0, 0x79e)
-#define	NAE_EXT_G1_MDIO_CTRL_DATA	NAE_REG(7, 0, 0x7a2)
-#define	NAE_EXT_G0_MDIO_RD_STAT		NAE_REG(7, 0, 0x79f)
-#define	NAE_EXT_G1_MDIO_RD_STAT		NAE_REG(7, 0, 0x7a3)
-#define	NAE_EXT_G0_MDIO_LINK_STAT	NAE_REG(7, 0, 0x7a0)
-#define	NAE_EXT_G1_MDIO_LINK_STAT	NAE_REG(7, 0, 0x7a4)
-#define	NAE_EXT_XG0_MDIO_CTRL		NAE_REG(7, 0, 0x7a5)
-#define	NAE_EXT_XG1_MDIO_CTRL		NAE_REG(7, 0, 0x7a9)
-#define	NAE_EXT_XG0_MDIO_CTRL_DATA	NAE_REG(7, 0, 0x7a6)
-#define	NAE_EXT_XG1_MDIO_CTRL_DATA	NAE_REG(7, 0, 0x7aa)
-#define	NAE_EXT_XG0_MDIO_RD_STAT	NAE_REG(7, 0, 0x7a7)
-#define	NAE_EXT_XG1_MDIO_RD_STAT	NAE_REG(7, 0, 0x7ab)
-#define	NAE_EXT_XG0_MDIO_LINK_STAT	NAE_REG(7, 0, 0x7a8)
-#define	NAE_EXT_XG1_MDIO_LINK_STAT	NAE_REG(7, 0, 0x7ac)
-#define	NAE_GMAC_FC_SLOT0		NAE_REG(7, 0, 0x7ad)
-#define	NAE_GMAC_FC_SLOT1		NAE_REG(7, 0, 0x7ae)
-#define	NAE_GMAC_FC_SLOT2		NAE_REG(7, 0, 0x7af)
-#define	NAE_GMAC_FC_SLOT3		NAE_REG(7, 0, 0x7b0)
-#define	NAE_NETIOR_NTB_SLOT		NAE_REG(7, 0, 0x7b1)
-#define	NAE_NETIOR_MISC_CTRL0		NAE_REG(7, 0, 0x7b2)
-#define	NAE_NETIOR_INT0			NAE_REG(7, 0, 0x7b3)
-#define	NAE_NETIOR_INT0_MASK		NAE_REG(7, 0, 0x7b4)
-#define	NAE_NETIOR_INT1			NAE_REG(7, 0, 0x7b5)
-#define	NAE_NETIOR_INT1_MASK		NAE_REG(7, 0, 0x7b6)
-#define	NAE_GMAC_PFC_REPEAT		NAE_REG(7, 0, 0x7b7)
-#define	NAE_XGMAC_PFC_REPEAT		NAE_REG(7, 0, 0x7b8)
-#define	NAE_NETIOR_MISC_CTRL1		NAE_REG(7, 0, 0x7b9)
-#define	NAE_NETIOR_MISC_CTRL2		NAE_REG(7, 0, 0x7ba)
-#define	NAE_NETIOR_INT2			NAE_REG(7, 0, 0x7bb)
-#define	NAE_NETIOR_INT2_MASK		NAE_REG(7, 0, 0x7bc)
-#define	NAE_NETIOR_MISC_CTRL3		NAE_REG(7, 0, 0x7bd)
-
-/* Network interface lane configuration registers */
-#define	NAE_LANE_CFG_MISCREG1		NAE_REG(7, 0xf, 0x39)
-#define	NAE_LANE_CFG_MISCREG2		NAE_REG(7, 0xf, 0x3A)
-
-/* Network interface soft reset register */
-#define	NAE_SOFT_RESET			NAE_REG(7, 0xf, 3)
-
-/* ucore instruction/shared CAM RAM access */
-#define	NAE_UCORE_SHARED_RAM_OFFSET	0x10000
-
-#define	PORTS_PER_CMPLX			4
-#define	NAE_CACHELINE_SIZE		64
-
-#define	PHY_LANE_0_CTRL			4
-#define	PHY_LANE_1_CTRL			5
-#define	PHY_LANE_2_CTRL			6
-#define	PHY_LANE_3_CTRL			7
-
-#define	PHY_LANE_STAT_SRCS		0x00000001
-#define	PHY_LANE_STAT_STD		0x00000010
-#define	PHY_LANE_STAT_SFEA		0x00000020
-#define	PHY_LANE_STAT_STCS		0x00000040
-#define	PHY_LANE_STAT_SPC		0x00000200
-#define	PHY_LANE_STAT_XLF		0x00000400
-#define	PHY_LANE_STAT_PCR		0x00000800
-
-#define	PHY_LANE_CTRL_DATA_POS		0
-#define	PHY_LANE_CTRL_ADDR_POS		8
-#define	PHY_LANE_CTRL_CMD_READ		0x00010000
-#define	PHY_LANE_CTRL_CMD_WRITE		0x00000000
-#define	PHY_LANE_CTRL_CMD_START		0x00020000
-#define	PHY_LANE_CTRL_CMD_PENDING	0x00040000
-#define	PHY_LANE_CTRL_ALL		0x00200000
-#define	PHY_LANE_CTRL_FAST_INIT		0x00400000
-#define	PHY_LANE_CTRL_REXSEL_POS	23
-#define	PHY_LANE_CTRL_PHYMODE_POS	25
-#define	PHY_LANE_CTRL_PWRDOWN		0x20000000
-#define	PHY_LANE_CTRL_RST		0x40000000
-#define	PHY_LANE_CTRL_RST_XAUI		0xc0000000
-#define	PHY_LANE_CTRL_BPC_XAUI		0x80000000
-
-#define	LANE_CFG_CPLX_0_1		0x0
-#define	LANE_CFG_CPLX_2_3		0x1
-#define	LANE_CFG_CPLX_4			0x2
-
-#define	MAC_CONF1			0x0
-#define	MAC_CONF2			0x1
-#define	MAX_FRM				0x4
-
-#define	NETIOR_GMAC_CTRL1		0x7F
-#define	NETIOR_GMAC_CTRL2		0x7E
-#define	NETIOR_GMAC_CTRL3		0x7C
-
-#define	SGMII_CAL_SLOTS			3
-#define	XAUI_CAL_SLOTS			13
-#define	IL8_CAL_SLOTS			26
-#define	IL4_CAL_SLOTS			10
-
-#define	NAE_DRR_QUANTA			2048
-
-#define	XLP3XX_STG2_FIFO_SZ		512
-#define	XLP3XX_EH_FIFO_SZ		512
-#define	XLP3XX_FROUT_FIFO_SZ		512
-#define	XLP3XX_MS_FIFO_SZ		512
-#define	XLP3XX_PKT_FIFO_SZ		8192
-#define	XLP3XX_PKTLEN_FIFO_SZ		512
-
-#define	XLP3XX_MAX_STG2_OFFSET		0x7F
-#define	XLP3XX_MAX_EH_OFFSET		0x1f
-#define	XLP3XX_MAX_FREE_OUT_OFFSET	0x1f
-#define	XLP3XX_MAX_MS_OFFSET		0xF
-#define	XLP3XX_MAX_PMEM_OFFSET		0x7FE
-
-#define	XLP3XX_STG1_2_CREDIT		XLP3XX_STG2_FIFO_SZ
-#define	XLP3XX_STG2_EH_CREDIT		XLP3XX_EH_FIFO_SZ
-#define	XLP3XX_STG2_FROUT_CREDIT	XLP3XX_FROUT_FIFO_SZ
-#define	XLP3XX_STG2_MS_CREDIT		XLP3XX_MS_FIFO_SZ
-
-#define	XLP8XX_STG2_FIFO_SZ		2048
-#define	XLP8XX_EH_FIFO_SZ		4096
-#define	XLP8XX_FROUT_FIFO_SZ		4096
-#define	XLP8XX_MS_FIFO_SZ		2048
-#define	XLP8XX_PKT_FIFO_SZ		16384
-#define	XLP8XX_PKTLEN_FIFO_SZ		2048
-
-#define	XLP8XX_MAX_STG2_OFFSET		0x7F
-#define	XLP8XX_MAX_EH_OFFSET		0x7F
-#define	XLP8XX_MAX_FREE_OUT_OFFSET	0x7F
-#define	XLP8XX_MAX_MS_OFFSET		0x1F
-#define	XLP8XX_MAX_PMEM_OFFSET		0x7FE
-
-#define	XLP8XX_STG1_2_CREDIT		XLP8XX_STG2_FIFO_SZ
-#define	XLP8XX_STG2_EH_CREDIT		XLP8XX_EH_FIFO_SZ
-#define	XLP8XX_STG2_FROUT_CREDIT	XLP8XX_FROUT_FIFO_SZ
-#define	XLP8XX_STG2_MS_CREDIT		XLP8XX_MS_FIFO_SZ
-
-#define	MAX_CAL_SLOTS			64
-#define	XLP_MAX_PORTS			18
-#define	XLP_STORM_MAX_PORTS		8
-
-#define	MAX_FREE_FIFO_POOL_8XX		20
-#define	MAX_FREE_FIFO_POOL_3XX		9
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_nae_reg(b, r)		nlm_read_reg_xkphys(b, r)
-#define	nlm_write_nae_reg(b, r, v)	nlm_write_reg_xkphys(b, r, v)
-#define	nlm_get_nae_pcibase(node)	\
-			nlm_pcicfg_base(XLP_IO_NAE_OFFSET(node))
-#define	nlm_get_nae_regbase(node)	\
-			nlm_xkphys_map_pcibar0(nlm_get_nae_pcibase(node))
-
-#define	MAX_POE_CLASSES			8
-#define	MAX_POE_CLASS_CTXT_TBL_SZ	((NUM_CONTEXTS / MAX_POE_CLASSES) + 1)
-#define	TXINITIORCR(x)			(((x) & 0x7ffff) << 8)
-
-enum XLPNAE_TX_TYPE {
-        P2D_NEOP = 0,
-        P2P,
-        P2D_EOP,
-        MSC
-};
-
-enum nblock_type {
-	UNKNOWN	= 0, /* DONT MAKE IT NON-ZERO */
-	SGMIIC	= 1,
-	XAUIC	= 2,
-	ILC	= 3
-};
-
-enum nae_interface_type {
-        GMAC_0 = 0,
-        GMAC_1,
-        GMAC_2,
-        GMAC_3,
-        XGMAC,
-        INTERLAKEN,
-        PHY = 0xE,
-        LANE_CFG = 0xF,
-};
-
-enum {
-	LM_UNCONNECTED = 0,
-	LM_SGMII = 1,
-	LM_XAUI = 2,
-	LM_IL = 3,
-};
-
-enum nae_block {
-        BLOCK_0 = 0,
-        BLOCK_1,
-        BLOCK_2,
-        BLOCK_3,
-        BLOCK_4,
-        BLOCK_5,
-        BLOCK_6,
-        BLOCK_7,
-};
-
-enum {
-        PHYMODE_NONE = 0,
-        PHYMODE_HS_SGMII = 1,
-        PHYMODE_XAUI = 1,
-        PHYMODE_SGMII = 2,
-        PHYMODE_IL = 3,
-};
-
-static __inline int
-nae_num_complex(uint64_t nae_pcibase)
-{
-	return (nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG0) & 0xff);
-}
-
-static __inline int
-nae_num_context(uint64_t nae_pcibase)
-{
-	return (nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5));
-}
-
-/* per port config structure */
-struct nae_port_config {
-	int		node;	/* node id (quickread) */
-	int		block;	/* network block id (quickread) */
-	int		port;	/* port id - among the 18 in XLP */
-	int		type;	/* port type - see xlp_gmac_port_types */
-	int		mdio_bus;
-	int		phy_addr;
-	int		num_channels;
-	int		num_free_descs;
-	int		free_desc_sizes;
-	int		ucore_mask;
-	int		loopback_mode;	/* is complex is in loopback? */
-	uint32_t	freein_spill_size; /* Freein spill size for each port */
-	uint32_t	free_fifo_size;	/* (512entries x 2desc/entry)1024desc */
-	uint32_t	iface_fifo_size;/* 256 entries x 64B/entry    = 16KB */
-	uint32_t	pseq_fifo_size;	/* 1024 entries - 1 pktlen/entry */
-	uint32_t	rxbuf_size;	/* 4096 entries x 64B = 256KB */
-	uint32_t	rx_if_base_config;
-	uint32_t	rx_slots_reqd;
-	uint32_t	tx_slots_reqd;
-	uint32_t	stg2_fifo_size;
-	uint32_t	eh_fifo_size;
-	uint32_t	frout_fifo_size;
-	uint32_t	ms_fifo_size;
-	uint32_t	pkt_fifo_size;
-	uint32_t	pktlen_fifo_size;
-	uint32_t	max_stg2_offset;
-	uint32_t	max_eh_offset;
-	uint32_t	max_frout_offset;
-	uint32_t	max_ms_offset;
-	uint32_t	max_pmem_offset;
-	uint32_t	stg1_2_credit;
-	uint32_t	stg2_eh_credit;
-	uint32_t	stg2_frout_credit;
-	uint32_t	stg2_ms_credit;
-	uint32_t	vlan_pri_en;
-	uint32_t	txq;
-	uint32_t	rxfreeq;
-	uint32_t	ieee1588_inc_intg;
-	uint32_t	ieee1588_inc_den;
-	uint32_t	ieee1588_inc_num;
-	uint64_t	ieee1588_userval;
-	uint64_t	ieee1588_ptpoff;
-	uint64_t	ieee1588_tmr1;
-	uint64_t	ieee1588_tmr2;
-	uint64_t	ieee1588_tmr3;
-};
-
-void nlm_nae_flush_free_fifo(uint64_t nae_base, int nblocks);
-void nlm_program_nae_parser_seq_fifo(uint64_t, int, struct nae_port_config *);
-void nlm_setup_rx_cal_cfg(uint64_t, int, struct nae_port_config *);
-void nlm_setup_tx_cal_cfg(uint64_t, int, struct nae_port_config *cfg);
-void nlm_deflate_frin_fifo_carving(uint64_t, int);
-void nlm_reset_nae(int);
-int nlm_set_nae_frequency(int, int);
-void nlm_setup_poe_class_config(uint64_t nae_base, int max_poe_classes,
-    int num_contexts, int *poe_cl_tbl);
-void nlm_setup_vfbid_mapping(uint64_t);
-void nlm_setup_flow_crc_poly(uint64_t, uint32_t);
-void nlm_setup_iface_fifo_cfg(uint64_t, int, struct nae_port_config *);
-void nlm_setup_rx_base_config(uint64_t, int, struct nae_port_config *);
-void nlm_setup_rx_buf_config(uint64_t, int, struct nae_port_config *);
-void nlm_setup_freein_fifo_cfg(uint64_t, struct nae_port_config *);
-int nlm_get_flow_mask(int);
-void nlm_program_flow_cfg(uint64_t, int, uint32_t, uint32_t);
-void xlp_ax_nae_lane_reset_txpll(uint64_t, int, int, int);
-void xlp_nae_lane_reset_txpll(uint64_t, int, int, int);
-void xlp_nae_config_lane_gmac(uint64_t, int);
-void config_egress_fifo_carvings(uint64_t, int, int, int, int,
-    struct nae_port_config *);
-void config_egress_fifo_credits(uint64_t, int, int, int, int,
-    struct nae_port_config *);
-void nlm_config_freein_fifo_uniq_cfg(uint64_t, int, int);
-void nlm_config_ucore_iface_mask_cfg(uint64_t, int, int);
-int nlm_nae_init_netior(uint64_t nae_base, int nblocks);
-void nlm_nae_init_ingress(uint64_t, uint32_t);
-void nlm_nae_init_egress(uint64_t);
-uint32_t ucore_spray_config(uint32_t, uint32_t, int);
-void nlm_nae_init_ucore(uint64_t nae_base, int if_num, uint32_t ucore_mask);
-int nlm_nae_open_if(uint64_t, int, int, int, uint32_t);
-void nlm_mac_enable(uint64_t, int, int, int);
-void nlm_mac_disable(uint64_t, int, int, int);
-uint64_t nae_tx_desc(u_int, u_int, u_int, u_int, uint64_t);
-void nlm_setup_l2type(uint64_t, int, uint32_t, uint32_t, uint32_t,
-    uint32_t, uint32_t, uint32_t);
-void nlm_setup_l3ctable_mask(uint64_t, int, uint32_t, uint32_t);
-void nlm_setup_l3ctable_even(uint64_t, int, uint32_t, uint32_t, uint32_t,
-    uint32_t, uint32_t);
-void nlm_setup_l3ctable_odd(uint64_t, int, uint32_t, uint32_t, uint32_t,
-    uint32_t, uint32_t, uint32_t);
-void nlm_setup_l4ctable_even(uint64_t, int, uint32_t, uint32_t, uint32_t,
-    uint32_t, uint32_t, uint32_t);
-void nlm_setup_l4ctable_odd(uint64_t, int, uint32_t, uint32_t, uint32_t, uint32_t);
-void nlm_enable_hardware_parser(uint64_t);
-void nlm_enable_hardware_parser_per_port(uint64_t, int, int);
-void nlm_prepad_enable(uint64_t, int);
-void nlm_setup_1588_timer(uint64_t, struct nae_port_config *);
-
-#endif /* !(LOCORE) && !(__ASSEMBLY__) */
-
-#endif
diff --git a/sys/mips/nlm/hal/nlm_hal.c b/sys/mips/nlm/hal/nlm_hal.c
deleted file mode 100644
index aa4bf5e00edd..000000000000
--- a/sys/mips/nlm/hal/nlm_hal.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/xlp.h>
-
-uint32_t
-xlp_get_cpu_frequency(int node, int core)
-{
-	uint64_t sysbase = nlm_get_sys_regbase(node);
-	unsigned int pll_divf, pll_divr, dfs_div, ext_div;
-	unsigned int rstval, dfsval;
-
-	rstval = nlm_read_sys_reg(sysbase, SYS_POWER_ON_RESET_CFG);
-	dfsval = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIV_VALUE);
-	pll_divf = ((rstval >> 10) & 0x7f) + 1;
-	pll_divr = ((rstval >> 8)  & 0x3) + 1;
-	if (!nlm_is_xlp8xx_ax())
-		ext_div = ((rstval >> 30) & 0x3) + 1;
-	else
-		ext_div = 1;
-	dfs_div  = ((dfsval >> (core << 2)) & 0xf) + 1;
-
-	return ((800000000ULL * pll_divf)/(3 * pll_divr * ext_div * dfs_div));
-}
-
-static u_int
-nlm_get_device_frequency(uint64_t sysbase, int devtype)
-{
-	uint32_t pllctrl, dfsdiv, spf, spr, div_val;
-	int extra_div;
-
-	pllctrl = nlm_read_sys_reg(sysbase, SYS_PLL_CTRL);
-	if (devtype <= 7)
-		div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE0);
-	else {
-		devtype -= 8;
-		div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE1);
-	}
-	dfsdiv = ((div_val >> (devtype << 2)) & 0xf) + 1;
-	spf = (pllctrl >> 3 & 0x7f) + 1;
-	spr = (pllctrl >> 1 & 0x03) + 1;
-	if (devtype == DFS_DEVICE_NAE && !nlm_is_xlp8xx_ax())
-		extra_div = 2;
-	else
-		extra_div = 1;
-
-	return ((400 * spf) / (3 * extra_div * spr * dfsdiv));
-}
-
-int
-nlm_set_device_frequency(int node, int devtype, int frequency)
-{
-	uint64_t sysbase;
-	u_int cur_freq;
-	int dec_div;
-
-	sysbase = nlm_get_sys_regbase(node);
-	cur_freq = nlm_get_device_frequency(sysbase, devtype);
-	if (cur_freq < (frequency - 5))
-		dec_div = 1;
-	else
-		dec_div = 0;
-
-	for(;;) {
-		if ((cur_freq >= (frequency - 5)) && (cur_freq <= frequency))
-			break;
-		if (dec_div)
-			nlm_write_sys_reg(sysbase, SYS_DFS_DIV_DEC_CTRL,
-			    (1 << devtype));
-		else
-			nlm_write_sys_reg(sysbase, SYS_DFS_DIV_INC_CTRL,
-			    (1 << devtype));
-		cur_freq = nlm_get_device_frequency(sysbase, devtype);
-	}
-	return (nlm_get_device_frequency(sysbase, devtype));
-}
diff --git a/sys/mips/nlm/hal/nlmsaelib.h b/sys/mips/nlm/hal/nlmsaelib.h
deleted file mode 100644
index 6e1451beeb27..000000000000
--- a/sys/mips/nlm/hal/nlmsaelib.h
+++ /dev/null
@@ -1,607 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _NLM_HAL_CRYPTO_H_
-#define _NLM_HAL_CRYPTO_H_
-
-#define	SAE_CFG_REG		0x00
-#define SAE_ENG_SEL_0		0x01
-#define SAE_ENG_SEL_1		0x02
-#define SAE_ENG_SEL_2		0x03
-#define SAE_ENG_SEL_3		0x04
-#define SAE_ENG_SEL_4		0x05
-#define SAE_ENG_SEL_5		0x06
-#define SAE_ENG_SEL_6		0x07
-#define SAE_ENG_SEL_7		0x08
-
-#define	RSA_CFG_REG		0x00
-#define RSA_ENG_SEL_0		0x01
-#define RSA_ENG_SEL_1		0x02
-#define RSA_ENG_SEL_2		0x03
-
-#define nlm_read_sec_reg(b, r)		nlm_read_reg(b, r)
-#define nlm_write_sec_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define nlm_get_sec_pcibase(node)	nlm_pcicfg_base(XLP_IO_SEC_OFFSET(node))
-#define nlm_get_sec_regbase(node)        \
-                        (nlm_get_sec_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-#define nlm_read_rsa_reg(b, r)		nlm_read_reg(b, r)
-#define nlm_write_rsa_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define nlm_get_rsa_pcibase(node)	nlm_pcicfg_base(XLP_IO_RSA_OFFSET(node))
-#define nlm_get_rsa_regbase(node)        \
-                        (nlm_get_rsa_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-#define nlm_pcibase_sec(node)     nlm_pcicfg_base(XLP_IO_SEC_OFFSET(node))
-#define nlm_qidstart_sec(node)    nlm_qidstart_kseg(nlm_pcibase_sec(node))
-#define nlm_qnum_sec(node)        nlm_qnum_kseg(nlm_pcibase_sec(node))
-
-/*
- * Since buffer allocation for crypto at kernel is done as malloc, each
- * segment size is given as page size which is 4K by default
- */
-#define NLM_CRYPTO_MAX_SEG_LEN	PAGE_SIZE
-
-#define MAX_KEY_LEN_IN_DW		20
-
-#define left_shift64(x, bitshift, numofbits)			\
-    ((uint64_t)(x) << (bitshift))
-
-#define left_shift64_mask(x, bitshift, numofbits)			\
-    (((uint64_t)(x) & ((1ULL << (numofbits)) - 1)) << (bitshift))
-
-/**
-* @brief cipher algorithms
-* @ingroup crypto
-*/
-enum nlm_cipher_algo {
-	NLM_CIPHER_BYPASS = 0,
-	NLM_CIPHER_DES = 1,
-	NLM_CIPHER_3DES = 2,
-	NLM_CIPHER_AES128 = 3,
-	NLM_CIPHER_AES192 = 4,
-	NLM_CIPHER_AES256 = 5,
-	NLM_CIPHER_ARC4 = 6,
-	NLM_CIPHER_KASUMI_F8 = 7,
-	NLM_CIPHER_SNOW3G_F8 = 8,
-	NLM_CIPHER_CAMELLIA128 = 9,
-	NLM_CIPHER_CAMELLIA192 = 0xA,
-	NLM_CIPHER_CAMELLIA256 = 0xB,
-	NLM_CIPHER_MAX = 0xC,
-};
-
-/**
-* @brief cipher modes
-* @ingroup crypto
-*/
-enum nlm_cipher_mode {
-	NLM_CIPHER_MODE_ECB = 0,
-	NLM_CIPHER_MODE_CBC = 1,
-	NLM_CIPHER_MODE_CFB = 2,
-	NLM_CIPHER_MODE_OFB = 3,
-	NLM_CIPHER_MODE_CTR = 4,
-	NLM_CIPHER_MODE_AES_F8 = 5,
-	NLM_CIPHER_MODE_GCM = 6,
-	NLM_CIPHER_MODE_CCM = 7,
-	NLM_CIPHER_MODE_UNDEFINED1 = 8,
-	NLM_CIPHER_MODE_UNDEFINED2 = 9,
-	NLM_CIPHER_MODE_LRW = 0xA,
-	NLM_CIPHER_MODE_XTS = 0xB,
-	NLM_CIPHER_MODE_MAX = 0xC,
-};
-
-/**
-* @brief hash algorithms
-* @ingroup crypto
-*/
-enum nlm_hash_algo {
-	NLM_HASH_BYPASS = 0,
-	NLM_HASH_MD5 = 1,
-	NLM_HASH_SHA = 2,
-	NLM_HASH_UNDEFINED = 3,
-	NLM_HASH_AES128 = 4,
-	NLM_HASH_AES192 = 5,
-	NLM_HASH_AES256 = 6,
-	NLM_HASH_KASUMI_F9 = 7,
-	NLM_HASH_SNOW3G_F9 = 8,
-	NLM_HASH_CAMELLIA128 = 9,
-	NLM_HASH_CAMELLIA192 = 0xA,
-	NLM_HASH_CAMELLIA256 = 0xB,
-	NLM_HASH_GHASH = 0xC,
-	NLM_HASH_MAX = 0xD
-};
-
-/**
-* @brief hash modes
-* @ingroup crypto
-*/
-enum nlm_hash_mode {
-	NLM_HASH_MODE_SHA1 = 0,	/* Only SHA */
-	NLM_HASH_MODE_SHA224 = 1,	/* Only SHA */
-	NLM_HASH_MODE_SHA256 = 2,	/* Only SHA */
-	NLM_HASH_MODE_SHA384 = 3,	/* Only SHA */
-	NLM_HASH_MODE_SHA512 = 4,	/* Only SHA */
-	NLM_HASH_MODE_CMAC = 5,	/* AES and Camellia */
-	NLM_HASH_MODE_XCBC = 6,	/* AES and Camellia */
-	NLM_HASH_MODE_CBC_MAC = 7,	/* AES and Camellia */
-	NLM_HASH_MODE_CCM = 8,	/* AES */
-	NLM_HASH_MODE_GCM = 9,	/* AES */
-	NLM_HASH_MODE_MAX = 0xA,
-};
-
-/**
-* @brief crypto control descriptor, should be cache aligned
-* @ingroup crypto
-*/
-struct nlm_crypto_pkt_ctrl {
-	uint64_t desc0;
-	/* combination of cipher and hash keys */
-	uint64_t key[MAX_KEY_LEN_IN_DW];
-	uint32_t cipherkeylen;
-	uint32_t hashkeylen;
-	uint32_t taglen;
-};
-
-/**
-* @brief crypto packet descriptor, should be cache aligned
-* @ingroup crypto
-*/
-struct nlm_crypto_pkt_param {
-	uint64_t desc0;
-	uint64_t desc1;
-	uint64_t desc2;
-	uint64_t desc3;
-	uint64_t segment[1][2];
-};
-
-static __inline__ uint64_t
-nlm_crypto_form_rsa_ecc_fmn_entry0(unsigned int l3alloc, unsigned int type,
-    unsigned int func, uint64_t srcaddr)
-{
-	return (left_shift64(l3alloc, 61, 1) |
-	    left_shift64(type, 46, 7) |
-	    left_shift64(func, 40, 6) |
-	    left_shift64(srcaddr, 0, 40));
-}
-
-static __inline__ uint64_t
-nlm_crypto_form_rsa_ecc_fmn_entry1(unsigned int dstclobber,
-    unsigned int l3alloc, unsigned int fbvc, uint64_t dstaddr)
-{
-	return (left_shift64(dstclobber, 62, 1) |
-	    left_shift64(l3alloc, 61, 1) |
-	    left_shift64(fbvc, 40, 12) |
-	    left_shift64(dstaddr, 0, 40));
-}
-
-/**
-* @brief Generate cypto control descriptor
-* @ingroup crypto
-* hmac : 1 for hash with hmac
-* hashalg, see hash_alg enums
-* hashmode, see hash_mode enums
-* cipherhalg, see  cipher_alg enums
-* ciphermode, see  cipher_mode enums
-* arc4_cipherkeylen : length of arc4 cipher key, 0 is interpreted as 32
-* arc4_keyinit :
-* cfbmask : cipher text for feedback,
-*           0(1 bit), 1(2 bits), 2(4 bits), 3(8 bits), 4(16bits), 5(32 bits),
-*           6(64 bits), 7(128 bits)
-*/
-static __inline__ uint64_t
-nlm_crypto_form_pkt_ctrl_desc(unsigned int hmac, unsigned int hashalg,
-    unsigned int hashmode, unsigned int cipheralg, unsigned int ciphermode,
-    unsigned int arc4_cipherkeylen, unsigned int arc4_keyinit,
-    unsigned int cfbmask)
-{
-	return (left_shift64(hmac, 61, 1) |
-	    left_shift64(hashalg, 52, 8) |
-	    left_shift64(hashmode, 43, 8) |
-	    left_shift64(cipheralg, 34, 8) |
-	    left_shift64(ciphermode, 25, 8) |
-	    left_shift64(arc4_cipherkeylen, 18, 5) |
-	    left_shift64(arc4_keyinit, 17, 1) |
-	    left_shift64(cfbmask, 0, 3));
-}
-/**
-* @brief Generate cypto packet descriptor 0
-* @ingroup crypto
-* tls : 1 (tls enabled) 0(tls disabled)
-* hash_source : 1 (encrypted data is sent to the auth engine)
-*               0 (plain data is sent to the auth engine)
-* hashout_l3alloc : 1 (auth output is transited through l3 cache)
-* encrypt : 1 (for encrypt) 0 (for decrypt)
-* ivlen : iv length in bytes
-* hashdst_addr : hash out physical address, byte aligned
-*/
-static __inline__ uint64_t
-nlm_crypto_form_pkt_desc0(unsigned int tls, unsigned int hash_source,
-    unsigned int hashout_l3alloc, unsigned int encrypt, unsigned int ivlen,
-    uint64_t hashdst_addr)
-{
-	return (left_shift64(tls, 63, 1) |
-	    left_shift64(hash_source, 62, 1) |
-	    left_shift64(hashout_l3alloc, 60, 1) |
-	    left_shift64(encrypt, 59, 1) |
-	    left_shift64_mask((ivlen - 1), 41, 16) |
-	    left_shift64(hashdst_addr, 0, 40));
-}
-
-/**
-* @brief Generate cypto packet descriptor 1
-* @ingroup crypto
-* cipherlen : cipher length in bytes
-* hashlen : hash length in bytes
-*/
-static __inline__ uint64_t
-nlm_crypto_form_pkt_desc1(unsigned int cipherlen, unsigned int hashlen)
-{
-	return (left_shift64_mask((cipherlen - 1), 32, 32) |
-	    left_shift64_mask((hashlen - 1), 0, 32));
-}
-
-/**
-* @brief Generate cypto packet descriptor 2
-* @ingroup crypto
-* ivoff : iv offset, offset from start of src data addr
-* ciperbit_cnt : number of valid bits in the last input byte to the cipher,
-*                0 (8 bits), 1 (1 bit)..7 (7 bits)
-* cipheroff : cipher offset, offset from start of src data addr
-* hashbit_cnt : number of valid bits in the last input byte to the auth
-*              0 (8 bits), 1 (1 bit)..7 (7 bits)
-* hashclobber : 1 (hash output will be written as multiples of cachelines, no
-*              read modify write)
-* hashoff : hash offset, offset from start of src data addr
-*/
-
-static __inline__ uint64_t
-nlm_crypto_form_pkt_desc2(unsigned int ivoff, unsigned int cipherbit_cnt,
-    unsigned int cipheroff, unsigned int hashbit_cnt, unsigned int hashclobber,
-    unsigned int hashoff)
-{
-	return (left_shift64(ivoff , 45, 16) |
-	    left_shift64(cipherbit_cnt, 42, 3) |
-	    left_shift64(cipheroff, 22, 16) |
-	    left_shift64(hashbit_cnt, 19, 3) |
-	    left_shift64(hashclobber, 18, 1) |
-	    left_shift64(hashoff, 0, 16));
-}
-
-/**
-* @brief Generate cypto packet descriptor 3
-* @ingroup crypto
-* designer_vc : designer freeback fmn destination id
-* taglen : length in bits of the tag generated by the auth engine
-*          md5 (128 bits), sha1 (160), sha224 (224), sha384 (384),
-*          sha512 (512), Kasumi (32), snow3g (32), gcm (128)
-* hmacpad : 1 if hmac padding is already done
-*/
-static  __inline__ uint64_t
-nlm_crypto_form_pkt_desc3(unsigned int designer_vc, unsigned int taglen,
-    unsigned int arc4_state_save_l3, unsigned int arc4_save_state,
-    unsigned int hmacpad)
-{
-	return (left_shift64(designer_vc, 48, 16) |
-	    left_shift64(taglen, 11, 16) |
-	    left_shift64(arc4_state_save_l3, 8, 1) |
-	    left_shift64(arc4_save_state, 6, 1) |
-	    left_shift64(hmacpad, 5, 1));
-}
-
-/**
-* @brief Generate cypto packet descriptor 4
-* @ingroup crypto
-* srcfraglen : length of the source fragment(header + data + tail) in bytes
-* srcfragaddr : physical address of the srouce fragment
-*/
-static __inline__ uint64_t
-nlm_crypto_form_pkt_desc4(uint64_t srcfraglen,
-    unsigned int srcfragaddr )
-{
-	return (left_shift64_mask((srcfraglen - 1), 48, 16) |
-	    left_shift64(srcfragaddr, 0, 40));
-}
-
-/**
-* @brief Generate cypto packet descriptor 5
-* @ingroup crypto
-* dstfraglen : length of the dst fragment(header + data + tail) in bytes
-* chipherout_l3alloc : 1(cipher output is transited through l3 cache)
-* cipherclobber : 1 (cipher output will be written as multiples of cachelines,
-*                 no read modify write)
-* chiperdst_addr : physical address of the cipher destination address
-*/
-static __inline__ uint64_t
-nlm_crypto_form_pkt_desc5(unsigned int dstfraglen,
-    unsigned int cipherout_l3alloc, unsigned int cipherclobber,
-    uint64_t cipherdst_addr)
-
-{
-	return (left_shift64_mask((dstfraglen - 1), 48, 16) |
-	    left_shift64(cipherout_l3alloc, 46, 1) |
-	    left_shift64(cipherclobber, 41, 1) |
-	    left_shift64(cipherdst_addr, 0, 40));
-}
-
-/**
-  * @brief Generate crypto packet fmn message entry 0
-  * @ingroup crypto
-  * freeback_vc: freeback response destination address
-  * designer_fblen : Designer freeback length, 1 - 4
-  * designerdesc_valid : designer desc valid or not
-  * cipher_keylen : cipher key length in bytes
-  * ctrldesc_addr : physicall address of the control descriptor
-  */
-static __inline__ uint64_t
-nlm_crypto_form_pkt_fmn_entry0(unsigned int freeback_vc,
-    unsigned int designer_fblen, unsigned int designerdesc_valid,
-    unsigned int cipher_keylen, uint64_t cntldesc_addr)
-{
-	return (left_shift64(freeback_vc, 48, 16) |
-	    left_shift64_mask(designer_fblen - 1, 46, 2) |
-	    left_shift64(designerdesc_valid, 45, 1) |
-	    left_shift64_mask(((cipher_keylen + 7) >> 3), 40, 5) |
-	    left_shift64(cntldesc_addr >> 6, 0, 34));
-}
-
-/**
-  * @brief Generate crypto packet fmn message entry 1
-  * @ingroup crypto
-  * arc4load_state : 1 if load state required 0 otherwise
-  * hash_keylen : hash key length in bytes
-  * pktdesc_size : packet descriptor size in bytes
-  * pktdesc_addr : physicall address of the packet descriptor
-  */
-static __inline__ uint64_t
-nlm_crypto_form_pkt_fmn_entry1(unsigned int arc4load_state,
-    unsigned int hash_keylen, unsigned int pktdesc_size,
-    uint64_t pktdesc_addr)
-{
-	return (left_shift64(arc4load_state, 63, 1) |
-	    left_shift64_mask(((hash_keylen + 7) >> 3), 56, 5) |
-	    left_shift64_mask(((pktdesc_size >> 4) - 1), 43, 12) |
-	    left_shift64(pktdesc_addr >> 6, 0, 34));
-}
-
-static __inline__ int
-nlm_crypto_get_hklen_taglen(enum nlm_hash_algo hashalg,
-    enum nlm_hash_mode hashmode, unsigned int *taglen, unsigned int *hklen)
-{
-	if (hashalg == NLM_HASH_MD5) {
-		*taglen = 128;
-		*hklen  = 64;
-	} else if (hashalg == NLM_HASH_SHA) {
-		switch (hashmode) {
-		case NLM_HASH_MODE_SHA1:
-			*taglen = 160;
-			*hklen  = 64;
-			break;
-		case NLM_HASH_MODE_SHA224:
-			*taglen = 224;
-			*hklen  = 64;
-			break;
-		case NLM_HASH_MODE_SHA256:
-			*taglen = 256;
-			*hklen  = 64;
-			break;
-		case NLM_HASH_MODE_SHA384:
-			*taglen = 384;
-			*hklen  = 128;
-			break;
-		case NLM_HASH_MODE_SHA512:
-			*taglen = 512;
-			*hklen  = 128;
-			break;
-		default:
-			printf("Error : invalid shaid (%s)\n", __func__);
-			return (-1);
-		}
-	} else if (hashalg == NLM_HASH_KASUMI_F9) {
-		*taglen = 32;
-		*hklen  = 0;
-	} else if (hashalg == NLM_HASH_SNOW3G_F9) {
-		*taglen = 32;
-		*hklen  = 0;
-	} else if (hashmode == NLM_HASH_MODE_XCBC) {
-		*taglen = 128;
-		*hklen  = 0;
-	} else if (hashmode == NLM_HASH_MODE_GCM) {
-		*taglen = 128;
-		*hklen  = 0;
-	} else if (hashalg == NLM_HASH_BYPASS) {
-		*taglen = 0;
-		*hklen  = 0;
-	} else {
-		printf("Error:Hash alg/mode not found\n");
-		return (-1);
-	}
-
-	/* TODO : Add remaining cases */
-	return (0);
-}
-
-/**
-* @brief Generate fill cryto control info structure
-* @ingroup crypto
-* hmac : 1 for hash with hmac
-* hashalg: see above,  hash_alg enums
-* hashmode: see above, hash_mode enums
-* cipherhalg: see above,  cipher_alg enums
-* ciphermode: see above, cipher_mode enums
-*
-*/
-static __inline__ int
-nlm_crypto_fill_pkt_ctrl(struct nlm_crypto_pkt_ctrl *ctrl, unsigned int hmac,
-    enum nlm_hash_algo hashalg, enum nlm_hash_mode hashmode,
-    enum nlm_cipher_algo cipheralg, enum nlm_cipher_mode ciphermode,
-    const unsigned char *cipherkey, unsigned int cipherkeylen,
-    const unsigned char *hashkey, unsigned int hashkeylen)
-{
-	unsigned int taglen = 0, hklen = 0;
-
-	ctrl->desc0 = nlm_crypto_form_pkt_ctrl_desc(hmac, hashalg, hashmode,
-	    cipheralg, ciphermode, 0, 0, 0);
-	memset(ctrl->key, 0, sizeof(ctrl->key));
-	if (cipherkey)
-		memcpy(ctrl->key, cipherkey, cipherkeylen);
-	if (hashkey)
-		memcpy((unsigned char *)&ctrl->key[(cipherkeylen + 7) / 8],
-			    hashkey, hashkeylen);
-	if (nlm_crypto_get_hklen_taglen(hashalg, hashmode, &taglen, &hklen)
-	    < 0)
-		return (-1);
-
-	ctrl->cipherkeylen = cipherkeylen;
-	ctrl->hashkeylen = hklen;
-	ctrl->taglen = taglen;
-
-	/* TODO : add the invalid checks and return error */
-	return (0);
-}
-
-/**
-* @brief Top level function for generation pkt desc 0 to 3 for cipher auth
-* @ingroup crypto
-* ctrl : pointer to control structure
-* param : pointer to the param structure
-* encrypt : 1(for encrypt) 0(for decrypt)
-* hash_source : 1(encrypted data is sent to the auth engine) 0(plain data is
-*		sent to the auth engine)
-* ivoff : iv offset from start of data
-* ivlen : iv length in bytes
-* hashoff : hash offset from start of data
-* hashlen : hash length in bytes
-* hmacpad : hmac padding required or not, 1 if already padded
-* cipheroff : cipher offset from start of data
-* cipherlen : cipher length in bytes
-* hashdst_addr : hash destination physical address
-*/
-static __inline__ void
-nlm_crypto_fill_cipher_auth_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl,
-    struct nlm_crypto_pkt_param *param, unsigned int encrypt,
-    unsigned int hash_source, unsigned int ivoff, unsigned int ivlen,
-    unsigned int hashoff, unsigned int hashlen, unsigned int hmacpad,
-    unsigned int cipheroff, unsigned int cipherlen, unsigned char *hashdst_addr)
-{
-	param->desc0 = nlm_crypto_form_pkt_desc0(0, hash_source, 1, encrypt,
-			   ivlen, vtophys(hashdst_addr));
-	param->desc1 = nlm_crypto_form_pkt_desc1(cipherlen, hashlen);
-	param->desc2 = nlm_crypto_form_pkt_desc2(ivoff, 0, cipheroff, 0, 0,
-			   hashoff);
-	param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0,
-			   hmacpad);
-}
-
-/**
-* @brief Top level function for generation pkt desc 0 to 3 for cipher operation
-* @ingroup crypto
-* ctrl : pointer to control structure
-* param : pointer to the param structure
-* encrypt : 1(for encrypt) 0(for decrypt)
-* ivoff : iv offset from start of data
-* ivlen : iv length in bytes
-* cipheroff : cipher offset from start of data
-* cipherlen : cipher length in bytes
-*/
-static __inline__ void
-nlm_crypto_fill_cipher_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl,
-    struct nlm_crypto_pkt_param *param, unsigned int encrypt,
-    unsigned int ivoff, unsigned int ivlen, unsigned int cipheroff,
-    unsigned int cipherlen)
-{
-	param->desc0 = nlm_crypto_form_pkt_desc0(0, 0, 0, encrypt, ivlen, 0ULL);
-	param->desc1 = nlm_crypto_form_pkt_desc1(cipherlen, 1);
-	param->desc2 = nlm_crypto_form_pkt_desc2(ivoff, 0, cipheroff, 0, 0, 0);
-	param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0, 0);
-}
-
-/**
-* @brief Top level function for generation pkt desc 0 to 3 for auth operation
-* @ingroup crypto
-* ctrl : pointer to control structure
-* param : pointer to the param structure
-* hashoff : hash offset from start of data
-* hashlen : hash length in bytes
-* hmacpad : hmac padding required or not, 1 if already padded
-* hashdst_addr : hash destination physical address
-*/
-static __inline__ void
-nlm_crypto_fill_auth_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl,
-    struct nlm_crypto_pkt_param *param, unsigned int hashoff,
-    unsigned int hashlen, unsigned int hmacpad, unsigned char *hashdst_addr)
-{
-	param->desc0 = nlm_crypto_form_pkt_desc0(0, 0, 1, 0, 1,
-			   vtophys(hashdst_addr));
-	param->desc1 = nlm_crypto_form_pkt_desc1(1, hashlen);
-	param->desc2 = nlm_crypto_form_pkt_desc2(0, 0, 0, 0, 0, hashoff);
-	param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0,
-			   hmacpad);
-}
-
-static __inline__ unsigned int
-nlm_crypto_fill_src_seg(struct nlm_crypto_pkt_param *param, int seg,
-    unsigned char *input, unsigned int inlen)
-{
-	unsigned off = 0, len = 0;
-	unsigned int remlen = inlen;
-
-	for (; remlen > 0;) {
-		len = remlen > NLM_CRYPTO_MAX_SEG_LEN ?
-		    NLM_CRYPTO_MAX_SEG_LEN : remlen;
-		param->segment[seg][0] = nlm_crypto_form_pkt_desc4(len,
-		    vtophys(input + off));
-		remlen -= len;
-		off += len;
-		seg++;
-	}
-	return (seg);
-}
-
-static __inline__ unsigned int
-nlm_crypto_fill_dst_seg(struct nlm_crypto_pkt_param *param,
-		int seg, unsigned char *output, unsigned int outlen)
-{
-	unsigned off = 0, len = 0;
-	unsigned int remlen = outlen;
-
-	for (; remlen > 0;) {
-		len = remlen > NLM_CRYPTO_MAX_SEG_LEN ?
-		    NLM_CRYPTO_MAX_SEG_LEN : remlen;
-		param->segment[seg][1] = nlm_crypto_form_pkt_desc5(len, 1, 0,
-		    vtophys(output + off));
-		remlen -= len;
-		off += len;
-		seg++;
-	}
-	return (seg);
-}
-
-#endif
diff --git a/sys/mips/nlm/hal/pcibus.h b/sys/mips/nlm/hal/pcibus.h
deleted file mode 100644
index e6e0a3cdfa29..000000000000
--- a/sys/mips/nlm/hal/pcibus.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __XLP_PCIBUS_H__
-#define	__XLP_PCIBUS_H__
-
-#define	MSI_MIPS_ADDR_BASE              0xfee00000
-/* MSI support */
-#define	MSI_MIPS_ADDR_DEST		0x000ff000
-#define	MSI_MIPS_ADDR_RH		0x00000008
-#define	MSI_MIPS_ADDR_RH_OFF		0x00000000
-#define	MSI_MIPS_ADDR_RH_ON		0x00000008
-#define	MSI_MIPS_ADDR_DM		0x00000004
-#define	MSI_MIPS_ADDR_DM_PHYSICAL	0x00000000
-#define	MSI_MIPS_ADDR_DM_LOGICAL	0x00000004
-
-/* Fields in data for Intel MSI messages. */
-#define	MSI_MIPS_DATA_TRGRMOD		0x00008000	/* Trigger mode */
-#define	MSI_MIPS_DATA_TRGREDG		0x00000000	/* edge */
-#define	MSI_MIPS_DATA_TRGRLVL		0x00008000	/* level */
-
-#define	MSI_MIPS_DATA_LEVEL		0x00004000	/* Polarity. */
-#define	MSI_MIPS_DATA_DEASSERT		0x00000000
-#define	MSI_MIPS_DATA_ASSERT		0x00004000
-
-#define	MSI_MIPS_DATA_DELMOD		0x00000700	/* Delivery Mode */
-#define	MSI_MIPS_DATA_DELFIXED		0x00000000	/* fixed */
-#define	MSI_MIPS_DATA_DELLOPRI		0x00000100	/* lowest priority */
-
-#define	MSI_MIPS_DATA_INTVEC		0x000000ff
-
-/* PCIE Memory and IO regions */
-#define	PCIE_MEM_BASE			0xd0000000ULL
-#define	PCIE_MEM_LIMIT			0xdfffffffULL
-#define	PCIE_IO_BASE			0x14000000ULL
-#define	PCIE_IO_LIMIT			0x15ffffffULL
-
-#define	PCIE_BRIDGE_CMD			0x1
-#define	PCIE_BRIDGE_MSI_CAP		0x14
-#define	PCIE_BRIDGE_MSI_ADDRL		0x15
-#define	PCIE_BRIDGE_MSI_ADDRH		0x16
-#define	PCIE_BRIDGE_MSI_DATA		0x17
-
-/* XLP Global PCIE configuration space registers */
-#define	PCIE_BYTE_SWAP_MEM_BASE		0x247
-#define	PCIE_BYTE_SWAP_MEM_LIM		0x248
-#define	PCIE_BYTE_SWAP_IO_BASE		0x249
-#define	PCIE_BYTE_SWAP_IO_LIM		0x24A
-#define	PCIE_MSI_STATUS			0x25A
-#define	PCIE_MSI_EN			0x25B
-#define	PCIE_INT_EN0			0x261
-
-/* PCIE_MSI_EN */
-#define	PCIE_MSI_VECTOR_INT_EN		0xFFFFFFFF
-
-/* PCIE_INT_EN0 */
-#define	PCIE_MSI_INT_EN			(1 << 9)
-
-/* XXXJC: Ax workaround */
-#define	PCIE_LINK0_IRT			78
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_pcie_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_pcie_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_get_pcie_base(node, inst)	\
-				nlm_pcicfg_base(XLP_IO_PCIE_OFFSET(node, inst))
-#define	nlm_get_pcie_regbase(node, inst)	\
-				(nlm_get_pcie_base(node, inst) + XLP_IO_PCI_HDRSZ)
-
-static __inline int
-xlp_pcie_link_irt(int link)
-{
-	if ((link < 0) || (link > 3))
-		return (-1);
-
-	return (PCIE_LINK0_IRT + link);
-}
-
-/*
- * Build Intel MSI message and data values from a source.  AMD64 systems
- * seem to be compatible, so we use the same function for both.
- */
-#define	MIPS_MSI_ADDR(cpu)					       \
-        (MSI_MIPS_ADDR_BASE | (cpu) << 12 |			       \
-	 MSI_MIPS_ADDR_RH_OFF | MSI_MIPS_ADDR_DM_PHYSICAL)
-
-#define	MIPS_MSI_DATA(irq)					       \
-        (MSI_MIPS_DATA_TRGRLVL | MSI_MIPS_DATA_DELFIXED |	       \
-	 MSI_MIPS_DATA_ASSERT | (irq))
-
-#endif
-#endif /* __XLP_PCIBUS_H__ */
diff --git a/sys/mips/nlm/hal/pic.h b/sys/mips/nlm/hal/pic.h
deleted file mode 100644
index c36e71383dba..000000000000
--- a/sys/mips/nlm/hal/pic.h
+++ /dev/null
@@ -1,313 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef _NLM_HAL_PIC_H
-#define	_NLM_HAL_PIC_H
-
-/* PIC Specific registers */
-#define	PIC_CTRL                0x00
-
-/* PIC control register defines */
-#define	PIC_CTRL_ITV		32 /* interrupt timeout value */
-#define	PIC_CTRL_ICI		19 /* ICI interrupt timeout enable */
-#define	PIC_CTRL_ITE		18 /* interrupt timeout enable */
-#define	PIC_CTRL_STE		10 /* system timer interrupt enable */
-#define	PIC_CTRL_WWR1		8  /* watchdog 1 wraparound count for reset */
-#define	PIC_CTRL_WWR0		6  /* watchdog 0 wraparound count for reset */
-#define	PIC_CTRL_WWN1		4  /* watchdog 1 wraparound count for NMI */
-#define	PIC_CTRL_WWN0		2  /* watchdog 0 wraparound count for NMI */
-#define	PIC_CTRL_WTE		0  /* watchdog timer enable */
-
-/* PIC Status register defines */
-#define	PIC_ICI_STATUS		33 /* ICI interrupt timeout status */
-#define	PIC_ITE_STATUS		32 /* interrupt timeout status */
-#define	PIC_STS_STATUS		4  /* System timer interrupt status */
-#define	PIC_WNS_STATUS		2  /* NMI status for watchdog timers */
-#define	PIC_WIS_STATUS		0  /* Interrupt status for watchdog timers */
-
-/* PIC IPI control register offsets */
-#define	PIC_IPICTRL_NMI		32
-#define	PIC_IPICTRL_RIV		20 /* received interrupt vector */
-#define	PIC_IPICTRL_IDB		16 /* interrupt destination base */
-#define	PIC_IPICTRL_DTE		 0 /* interrupt destination thread enables */
-
-/* PIC IRT register offsets */
-#define	PIC_IRT_ENABLE		31
-#define	PIC_IRT_NMI		29
-#define	PIC_IRT_SCH		28 /* Scheduling scheme */
-#define	PIC_IRT_RVEC		20 /* Interrupt receive vectors */
-#define	PIC_IRT_DT		19 /* Destination type */
-#define	PIC_IRT_DB		16 /* Destination base */
-#define	PIC_IRT_DTE		0  /* Destination thread enables */
-
-#define	PIC_BYTESWAP		0x02
-#define	PIC_STATUS		0x04
-#define	PIC_INTR_TIMEOUT	0x06
-#define	PIC_ICI0_INTR_TIMEOUT	0x08
-#define	PIC_ICI1_INTR_TIMEOUT	0x0a
-#define	PIC_ICI2_INTR_TIMEOUT	0x0c
-#define	PIC_IPI_CTL		0x0e
-#define	PIC_INT_ACK		0x10
-#define	PIC_INT_PENDING0	0x12
-#define	PIC_INT_PENDING1	0x14
-#define	PIC_INT_PENDING2	0x16
-
-#define	PIC_WDOG0_MAXVAL	0x18
-#define	PIC_WDOG0_COUNT		0x1a
-#define	PIC_WDOG0_ENABLE0	0x1c
-#define	PIC_WDOG0_ENABLE1	0x1e
-#define	PIC_WDOG0_BEATCMD	0x20
-#define	PIC_WDOG0_BEAT0		0x22
-#define	PIC_WDOG0_BEAT1		0x24
-
-#define	PIC_WDOG1_MAXVAL	0x26
-#define	PIC_WDOG1_COUNT		0x28
-#define	PIC_WDOG1_ENABLE0	0x2a
-#define	PIC_WDOG1_ENABLE1	0x2c
-#define	PIC_WDOG1_BEATCMD	0x2e
-#define	PIC_WDOG1_BEAT0		0x30
-#define	PIC_WDOG1_BEAT1		0x32
-
-#define	PIC_WDOG_MAXVAL(i)	(PIC_WDOG0_MAXVAL + ((i) ? 7 : 0))
-#define	PIC_WDOG_COUNT(i)	(PIC_WDOG0_COUNT + ((i) ? 7 : 0))
-#define	PIC_WDOG_ENABLE0(i)	(PIC_WDOG0_ENABLE0 + ((i) ? 7 : 0))
-#define	PIC_WDOG_ENABLE1(i)	(PIC_WDOG0_ENABLE1 + ((i) ? 7 : 0))
-#define	PIC_WDOG_BEATCMD(i)	(PIC_WDOG0_BEATCMD + ((i) ? 7 : 0))
-#define	PIC_WDOG_BEAT0(i)	(PIC_WDOG0_BEAT0 + ((i) ? 7 : 0))
-#define	PIC_WDOG_BEAT1(i)	(PIC_WDOG0_BEAT1 + ((i) ? 7 : 0))
-
-#define	PIC_TIMER0_MAXVAL	0x34
-#define	PIC_TIMER1_MAXVAL	0x36
-#define	PIC_TIMER2_MAXVAL	0x38
-#define	PIC_TIMER3_MAXVAL	0x3a
-#define	PIC_TIMER4_MAXVAL	0x3c
-#define	PIC_TIMER5_MAXVAL	0x3e
-#define	PIC_TIMER6_MAXVAL	0x40
-#define	PIC_TIMER7_MAXVAL	0x42
-#define	PIC_TIMER_MAXVAL(i)	(PIC_TIMER0_MAXVAL + ((i) * 2))
-
-#define	PIC_TIMER0_COUNT	0x44
-#define	PIC_TIMER1_COUNT	0x46
-#define	PIC_TIMER2_COUNT	0x48
-#define	PIC_TIMER3_COUNT	0x4a
-#define	PIC_TIMER4_COUNT	0x4c
-#define	PIC_TIMER5_COUNT	0x4e
-#define	PIC_TIMER6_COUNT	0x50
-#define	PIC_TIMER7_COUNT	0x52
-#define	PIC_TIMER_COUNT(i)	(PIC_TIMER0_COUNT + ((i) * 2))
-
-#define	PIC_ITE0_N0_N1		0x54
-#define	PIC_ITE1_N0_N1		0x58
-#define	PIC_ITE2_N0_N1		0x5c
-#define	PIC_ITE3_N0_N1		0x60
-#define	PIC_ITE4_N0_N1		0x64
-#define	PIC_ITE5_N0_N1		0x68
-#define	PIC_ITE6_N0_N1		0x6c
-#define	PIC_ITE7_N0_N1		0x70
-#define	PIC_ITE_N0_N1(i)	(PIC_ITE0_N0_N1 + ((i) * 4))
-
-#define	PIC_ITE0_N2_N3		0x56
-#define	PIC_ITE1_N2_N3		0x5a
-#define	PIC_ITE2_N2_N3		0x5e
-#define	PIC_ITE3_N2_N3		0x62
-#define	PIC_ITE4_N2_N3		0x66
-#define	PIC_ITE5_N2_N3		0x6a
-#define	PIC_ITE6_N2_N3		0x6e
-#define	PIC_ITE7_N2_N3		0x72
-#define	PIC_ITE_N2_N3(i)		(PIC_ITE0_N2_N3 + ((i) * 4))
-
-#define	PIC_IRT0		0x74
-#define	PIC_IRT(i)		(PIC_IRT0 + ((i) * 2))
-
-#define	TIMER_CYCLES_MAXVAL	0xffffffffffffffffULL
-
-/*
- *    IRT Map
- */
-#define	PIC_IRT_WD_0_INDEX	0
-#define	PIC_IRT_WD_1_INDEX	1
-#define	PIC_IRT_WD_NMI_0_INDEX	2
-#define	PIC_IRT_WD_NMI_1_INDEX	3
-#define	PIC_IRT_TIMER_0_INDEX	4
-#define	PIC_IRT_TIMER_1_INDEX	5
-#define	PIC_IRT_TIMER_2_INDEX	6
-#define	PIC_IRT_TIMER_3_INDEX	7
-#define	PIC_IRT_TIMER_4_INDEX	8
-#define	PIC_IRT_TIMER_5_INDEX	9
-#define	PIC_IRT_TIMER_6_INDEX	10
-#define	PIC_IRT_TIMER_7_INDEX	11
-#define	PIC_IRT_CLOCK_INDEX	PIC_IRT_TIMER_7_INDEX
-#define	PIC_IRT_TIMER_INDEX(num)	((num) + PIC_IRT_TIMER_0_INDEX)
-
-#define	PIC_CLOCK_TIMER			7
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-/*
- *   Misc
- */
-#define	PIC_IRT_VALID			1
-#define	PIC_LOCAL_SCHEDULING		1
-#define	PIC_GLOBAL_SCHEDULING		0
-
-#define	nlm_read_pic_reg(b, r)	nlm_read_reg64(b, r)
-#define	nlm_write_pic_reg(b, r, v) nlm_write_reg64(b, r, v)
-#define	nlm_get_pic_pcibase(node) nlm_pcicfg_base(XLP_IO_PIC_OFFSET(node))
-#define	nlm_get_pic_regbase(node) (nlm_get_pic_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-/* IRT and h/w interrupt routines */
-static inline int
-nlm_pic_read_irt(uint64_t base, int irt_index)
-{
-	return nlm_read_pic_reg(base, PIC_IRT(irt_index));
-}
-
-static inline void
-nlm_pic_send_ipi(uint64_t base, int cpu, int vec, int nmi)
-{
-	uint64_t ipi;
-	int	node, ncpu;
-
-	node = cpu / 32;
-	ncpu = cpu & 0x1f;
-	ipi = ((uint64_t)nmi << 31) | (vec << 20) | (node << 17) |
-		(1 << (cpu & 0xf));
-	if (ncpu > 15)
-		ipi |= 0x10000; /* Setting bit 16 to select cpus 16-31 */
-
-	nlm_write_pic_reg(base, PIC_IPI_CTL, ipi);
-}
-
-static inline uint64_t
-nlm_pic_read_control(uint64_t base)
-{
-	return nlm_read_pic_reg(base, PIC_CTRL);
-}
-
-static inline void
-nlm_pic_write_control(uint64_t base, uint64_t control)
-{
-	nlm_write_pic_reg(base, PIC_CTRL, control);
-}
-
-static inline void
-nlm_pic_update_control(uint64_t base, uint64_t control)
-{
-	uint64_t val;
-
-	val = nlm_read_pic_reg(base, PIC_CTRL);
-	nlm_write_pic_reg(base, PIC_CTRL, control | val);
-}
-
-static inline void
-nlm_pic_ack(uint64_t base, int irt_num)
-{
-	nlm_write_pic_reg(base, PIC_INT_ACK, irt_num);
-
-	/* Ack the Status register for Watchdog & System timers */
-	if (irt_num < 12)
-		nlm_write_pic_reg(base, PIC_STATUS, (1 << irt_num));
-}
-
-static inline void
-nlm_set_irt_to_cpu(uint64_t base, int irt, int cpu)
-{
-	uint64_t val;
-
-	val = nlm_read_pic_reg(base, PIC_IRT(irt));
-	val |= cpu & 0xf;
-	if (cpu > 15)
-		val |= 1 << 16;
-	nlm_write_pic_reg(base, PIC_IRT(irt), val);
-}
-
-static inline void
-nlm_pic_write_irt(uint64_t base, int irt_num, int en, int nmi,
-	int sch, int vec, int dt, int db, int dte)
-{
-	uint64_t val;
-
-	val = (((uint64_t)en & 0x1) << 31) | ((nmi & 0x1) << 29) |
-			((sch & 0x1) << 28) | ((vec & 0x3f) << 20) |
-			((dt & 0x1) << 19) | ((db & 0x7) << 16) |
-			(dte & 0xffff);
-
-	nlm_write_pic_reg(base, PIC_IRT(irt_num), val);
-}
-
-static inline void
-nlm_pic_write_irt_direct(uint64_t base, int irt_num, int en, int nmi,
-	int sch, int vec, int cpu)
-{
-	nlm_pic_write_irt(base, irt_num, en, nmi, sch, vec, 1,
-		(cpu >> 4),		/* thread group */
-		1 << (cpu & 0xf));	/* thread mask */
-}
-
-static inline uint64_t
-nlm_pic_read_timer(uint64_t base, int timer)
-{
-	return nlm_read_pic_reg(base, PIC_TIMER_COUNT(timer));
-}
-
-static inline void
-nlm_pic_write_timer(uint64_t base, int timer, uint64_t value)
-{
-	nlm_write_pic_reg(base, PIC_TIMER_COUNT(timer), value);
-}
-
-static inline void
-nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu)
-{
-	uint64_t pic_ctrl;
-	int en, nmi;
-
-	en = nmi = 0;
-	if (irq > 0)
-		en = 1;
-	else if (irq < 0) {
-		en = nmi = 1;
-		irq = -irq;
-	}
-	nlm_write_pic_reg(base, PIC_TIMER_MAXVAL(timer), value);
-	nlm_pic_write_irt_direct(base, PIC_IRT_TIMER_INDEX(timer),
-		en, nmi, 0, irq, cpu);
-
-	/* enable the timer */
-	pic_ctrl = nlm_read_pic_reg(base, PIC_CTRL);
-	pic_ctrl |= (1 << (PIC_CTRL_STE + timer));
-	nlm_write_pic_reg(base, PIC_CTRL, pic_ctrl);
-}
-
-#endif /* __ASSEMBLY__ */
-#endif /* _NLM_HAL_PIC_H */
diff --git a/sys/mips/nlm/hal/poe.h b/sys/mips/nlm/hal/poe.h
deleted file mode 100644
index 688d476cf838..000000000000
--- a/sys/mips/nlm/hal/poe.h
+++ /dev/null
@@ -1,354 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __NLM_POE_H__
-#define	__NLM_POE_H__
-
-/**
-* @file_name poe.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP Packet Order Engine
-*/
-
-/* POE specific registers */
-#define	POE_CL0_ENQ_SPILL_BASE_LO	0x0
-#define	POE_CL1_ENQ_SPILL_BASE_LO	0x2
-#define	POE_CL2_ENQ_SPILL_BASE_LO	0x4
-#define	POE_CL3_ENQ_SPILL_BASE_LO	0x6
-#define	POE_CL4_ENQ_SPILL_BASE_LO	0x8
-#define	POE_CL5_ENQ_SPILL_BASE_LO	0xa
-#define	POE_CL6_ENQ_SPILL_BASE_LO	0xc
-#define	POE_CL7_ENQ_SPILL_BASE_LO	0xe
-#define	POE_CL0_ENQ_SPILL_BASE_HI	0x1
-#define	POE_CL1_ENQ_SPILL_BASE_HI	0x3
-#define	POE_CL2_ENQ_SPILL_BASE_HI	0x5
-#define	POE_CL3_ENQ_SPILL_BASE_HI	0x7
-#define	POE_CL4_ENQ_SPILL_BASE_HI	0x9
-#define	POE_CL5_ENQ_SPILL_BASE_HI	0xb
-#define	POE_CL6_ENQ_SPILL_BASE_HI	0xd
-#define	POE_CL7_ENQ_SPILL_BASE_HI	0xf
-#define	POE_CL0_DEQ_SPILL_BASE_LO	0x10
-#define	POE_CL1_DEQ_SPILL_BASE_LO	0x12
-#define	POE_CL2_DEQ_SPILL_BASE_LO	0x14
-#define	POE_CL3_DEQ_SPILL_BASE_LO	0x16
-#define	POE_CL4_DEQ_SPILL_BASE_LO	0x18
-#define	POE_CL5_DEQ_SPILL_BASE_LO	0x1a
-#define	POE_CL6_DEQ_SPILL_BASE_LO	0x1c
-#define	POE_CL7_DEQ_SPILL_BASE_LO	0x1e
-#define	POE_CL0_DEQ_SPILL_BASE_HI	0x11
-#define	POE_CL1_DEQ_SPILL_BASE_HI	0x13
-#define	POE_CL2_DEQ_SPILL_BASE_HI	0x15
-#define	POE_CL3_DEQ_SPILL_BASE_HI	0x17
-#define	POE_CL4_DEQ_SPILL_BASE_HI	0x19
-#define	POE_CL5_DEQ_SPILL_BASE_HI	0x1b
-#define	POE_CL6_DEQ_SPILL_BASE_HI	0x1d
-#define	POE_CL7_DEQ_SPILL_BASE_HI	0x1f
-#define	POE_MSG_STORAGE_BASE_ADDR_LO	0x20
-#define	POE_MSG_STORAGE_BASE_ADDR_HI	0x21
-#define	POE_FBP_BASE_ADDR_LO		0x22
-#define	POE_FBP_BASE_ADDR_HI		0x23
-#define	POE_CL0_ENQ_SPILL_MAXLINE_LO	0x24
-#define	POE_CL1_ENQ_SPILL_MAXLINE_LO	0x25
-#define	POE_CL2_ENQ_SPILL_MAXLINE_LO	0x26
-#define	POE_CL3_ENQ_SPILL_MAXLINE_LO	0x27
-#define	POE_CL4_ENQ_SPILL_MAXLINE_LO	0x28
-#define	POE_CL5_ENQ_SPILL_MAXLINE_LO	0x29
-#define	POE_CL6_ENQ_SPILL_MAXLINE_LO	0x2a
-#define	POE_CL7_ENQ_SPILL_MAXLINE_LO	0x2b
-#define	POE_CL0_ENQ_SPILL_MAXLINE_HI	0x2c
-#define	POE_CL1_ENQ_SPILL_MAXLINE_HI	0x2d
-#define	POE_CL2_ENQ_SPILL_MAXLINE_HI	0x2e
-#define	POE_CL3_ENQ_SPILL_MAXLINE_HI	0x2f
-#define	POE_CL4_ENQ_SPILL_MAXLINE_HI	0x30
-#define	POE_CL5_ENQ_SPILL_MAXLINE_HI	0x31
-#define	POE_CL6_ENQ_SPILL_MAXLINE_HI	0x32
-#define	POE_CL7_ENQ_SPILL_MAXLINE_HI	0x33
-#define	POE_MAX_FLOW_MSG0		0x40
-#define	POE_MAX_FLOW_MSG1		0x41
-#define	POE_MAX_FLOW_MSG2		0x42
-#define	POE_MAX_FLOW_MSG3		0x43
-#define	POE_MAX_FLOW_MSG4		0x44
-#define	POE_MAX_FLOW_MSG5		0x45
-#define	POE_MAX_FLOW_MSG6		0x46
-#define	POE_MAX_FLOW_MSG7		0x47
-#define	POE_MAX_MSG_CL0			0x48
-#define	POE_MAX_MSG_CL1			0x49
-#define	POE_MAX_MSG_CL2			0x4a
-#define	POE_MAX_MSG_CL3			0x4b
-#define	POE_MAX_MSG_CL4			0x4c
-#define	POE_MAX_MSG_CL5			0x4d
-#define	POE_MAX_MSG_CL6			0x4e
-#define	POE_MAX_MSG_CL7			0x4f
-#define	POE_MAX_LOC_BUF_STG_CL0		0x50
-#define	POE_MAX_LOC_BUF_STG_CL1		0x51
-#define	POE_MAX_LOC_BUF_STG_CL2		0x52
-#define	POE_MAX_LOC_BUF_STG_CL3		0x53
-#define	POE_MAX_LOC_BUF_STG_CL4		0x54
-#define	POE_MAX_LOC_BUF_STG_CL5		0x55
-#define	POE_MAX_LOC_BUF_STG_CL6		0x56
-#define	POE_MAX_LOC_BUF_STG_CL7		0x57
-#define	POE_ENQ_MSG_COUNT0_SIZE		0x58
-#define	POE_ENQ_MSG_COUNT1_SIZE		0x59
-#define	POE_ENQ_MSG_COUNT2_SIZE		0x5a
-#define	POE_ENQ_MSG_COUNT3_SIZE		0x5b
-#define	POE_ENQ_MSG_COUNT4_SIZE		0x5c
-#define	POE_ENQ_MSG_COUNT5_SIZE		0x5d
-#define	POE_ENQ_MSG_COUNT6_SIZE		0x5e
-#define	POE_ENQ_MSG_COUNT7_SIZE		0x5f
-#define	POE_ERR_MSG_DESCRIP_LO0		0x60
-#define	POE_ERR_MSG_DESCRIP_LO1		0x62
-#define	POE_ERR_MSG_DESCRIP_LO2		0x64
-#define	POE_ERR_MSG_DESCRIP_LO3		0x66
-#define	POE_ERR_MSG_DESCRIP_HI0		0x61
-#define	POE_ERR_MSG_DESCRIP_HI1		0x63
-#define	POE_ERR_MSG_DESCRIP_HI2		0x65
-#define	POE_ERR_MSG_DESCRIP_HI3		0x67
-#define	POE_OOO_MSG_CNT_LO		0x68
-#define	POE_IN_ORDER_MSG_CNT_LO		0x69
-#define	POE_LOC_BUF_STOR_CNT_LO		0x6a
-#define	POE_EXT_BUF_STOR_CNT_LO		0x6b
-#define	POE_LOC_BUF_ALLOC_CNT_LO	0x6c
-#define	POE_EXT_BUF_ALLOC_CNT_LO	0x6d
-#define	POE_OOO_MSG_CNT_HI		0x6e
-#define	POE_IN_ORDER_MSG_CNT_HI		0x6f
-#define	POE_LOC_BUF_STOR_CNT_HI		0x70
-#define	POE_EXT_BUF_STOR_CNT_HI		0x71
-#define	POE_LOC_BUF_ALLOC_CNT_HI	0x72
-#define	POE_EXT_BUF_ALLOC_CNT_HI	0x73
-#define	POE_MODE_ERR_FLOW_ID		0x74
-#define	POE_STATISTICS_ENABLE		0x75
-#define	POE_MAX_SIZE_FLOW		0x76
-#define	POE_MAX_SIZE			0x77
-#define	POE_FBP_SP			0x78
-#define	POE_FBP_SP_EN			0x79
-#define	POE_LOC_ALLOC_EN		0x7a
-#define	POE_EXT_ALLOC_EN		0x7b
-#define	POE_DISTR_0_DROP_CNT		0xc0
-#define	POE_DISTR_1_DROP_CNT		0xc1
-#define	POE_DISTR_2_DROP_CNT		0xc2
-#define	POE_DISTR_3_DROP_CNT		0xc3
-#define	POE_DISTR_4_DROP_CNT		0xc4
-#define	POE_DISTR_5_DROP_CNT		0xc5
-#define	POE_DISTR_6_DROP_CNT		0xc6
-#define	POE_DISTR_7_DROP_CNT		0xc7
-#define	POE_DISTR_8_DROP_CNT		0xc8
-#define	POE_DISTR_9_DROP_CNT		0xc9
-#define	POE_DISTR_10_DROP_CNT		0xca
-#define	POE_DISTR_11_DROP_CNT		0xcb
-#define	POE_DISTR_12_DROP_CNT		0xcc
-#define	POE_DISTR_13_DROP_CNT		0xcd
-#define	POE_DISTR_14_DROP_CNT		0xce
-#define	POE_DISTR_15_DROP_CNT		0xcf
-#define	POE_CLASS_0_DROP_CNT		0xd0
-#define	POE_CLASS_1_DROP_CNT		0xd1
-#define	POE_CLASS_2_DROP_CNT		0xd2
-#define	POE_CLASS_3_DROP_CNT		0xd3
-#define	POE_CLASS_4_DROP_CNT		0xd4
-#define	POE_CLASS_5_DROP_CNT		0xd5
-#define	POE_CLASS_6_DROP_CNT		0xd6
-#define	POE_CLASS_7_DROP_CNT		0xd7
-#define	POE_DISTR_C0_DROP_CNT		0xd8
-#define	POE_DISTR_C1_DROP_CNT		0xd9
-#define	POE_DISTR_C2_DROP_CNT		0xda
-#define	POE_DISTR_C3_DROP_CNT		0xdb
-#define	POE_DISTR_C4_DROP_CNT		0xdc
-#define	POE_DISTR_C5_DROP_CNT		0xdd
-#define	POE_DISTR_C6_DROP_CNT		0xde
-#define	POE_DISTR_C7_DROP_CNT		0xdf
-#define	POE_CPU_DROP_CNT		0xe0
-#define	POE_MAX_FLOW_DROP_CNT		0xe1
-#define	POE_INTERRUPT_VEC		0x140
-#define	POE_INTERRUPT_MASK		0x141
-#define	POE_FATALERR_MASK		0x142
-#define	POE_IDI_CFG			0x143
-#define	POE_TIMEOUT_VALUE		0x144
-#define	POE_CACHE_ALLOC_EN		0x145
-#define	POE_FBP_ECC_ERR_CNT		0x146
-#define	POE_MSG_STRG_ECC_ERR_CNT	0x147
-#define	POE_FID_INFO_ECC_ERR_CNT	0x148
-#define	POE_MSG_INFO_ECC_ERR_CNT	0x149
-#define	POE_LL_ECC_ERR_CNT		0x14a
-#define	POE_SIZE_ECC_ERR_CNT		0x14b
-#define	POE_FMN_TXCR_ECC_ERR_CNT	0x14c
-#define	POE_ENQ_INSPIL_ECC_ERR_CNT	0x14d
-#define	POE_ENQ_OUTSPIL_ECC_ERR_CNT	0x14e
-#define	POE_DEQ_OUTSPIL_ECC_ERR_CNT	0x14f
-#define	POE_ENQ_MSG_SENT		0x150
-#define	POE_ENQ_MSG_CNT			0x151
-#define	POE_FID_RDATA			0x152
-#define	POE_FID_WDATA			0x153
-#define	POE_FID_CMD			0x154
-#define	POE_FID_ADDR			0x155
-#define	POE_MSG_INFO_CMD		0x156
-#define	POE_MSG_INFO_ADDR		0x157
-#define	POE_MSG_INFO_RDATA		0x158
-#define	POE_LL_CMD			0x159
-#define	POE_LL_ADDR			0x15a
-#define	POE_LL_RDATA			0x15b
-#define	POE_MSG_STG_CMD			0x15c
-#define	POE_MSG_STG_ADDR		0x15d
-#define	POE_MSG_STG_RDATA		0x15e
-#define	POE_DISTR_THRESHOLD_0		0x1c0
-#define	POE_DISTR_THRESHOLD_1		0x1c1
-#define	POE_DISTR_THRESHOLD_2		0x1c2
-#define	POE_DISTR_THRESHOLD_3		0x1c3
-#define	POE_DISTR_THRESHOLD_4		0x1c4
-#define	POE_DISTR_THRESHOLD(i)		(0x1c0 + (i))
-#define	POE_DISTR_EN			0x1c5
-#define	POE_ENQ_SPILL_THOLD		0x1c8
-#define	POE_DEQ_SPILL_THOLD		0x1c9
-#define	POE_DEQ_SPILL_TIMER		0x1ca
-#define	POE_DISTR_CLASS_DROP_EN		0x1cb
-#define	POE_DISTR_VEC_DROP_EN		0x1cc
-#define	POE_DISTR_DROP_TIMER		0x1cd
-#define	POE_ERROR_LOG_W0		0x1ce
-#define	POE_ERROR_LOG_W1		0x1cf
-#define	POE_ERROR_LOG_W2		0x1d0
-#define	POE_ERR_INJ_CTRL0		0x1d1
-#define	POE_TX_TIMER			0x1d4
-
-#define	NUM_DIST_VEC			16
-#define	NUM_WORDS_PER_DV		16
-#define	MAX_DV_TBL_ENTRIES		(NUM_DIST_VEC * NUM_WORDS_PER_DV)
-#define	POE_DIST_THRESHOLD_VAL		0xa
-
-/*
- * POE distribution vectors
- *
- * Each vector is 512 bit with msb indicating vc 512 and lsb indicating vc 0
- * 512-bit-vector is specified as 16 32-bit words.
- * Left most word has the vc range 511-479 right most word has vc range 31 - 0
- * Each word has the MSB select higer vc number and LSB select lower vc num
- */
-#define	POE_DISTVECT_BASE		0x100
-#define	POE_DISTVECT(vec)		(POE_DISTVECT_BASE + 16 * (vec))
-#define	POE_DISTVECT_OFFSET(node,cpu)	(4 * (3 - (node)) + (3 - (cpu)/8))
-#define	POE_DISTVECT_SHIFT(node,cpu)	(((cpu) % 8 ) * 4)
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_poe_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_poe_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_read_poedv_reg(b, r)	nlm_read_reg_xkphys(b, r)
-#define	nlm_write_poedv_reg(b, r, v)	nlm_write_reg_xkphys(b, r, v)
-#define	nlm_get_poe_pcibase(node)	\
-				nlm_pcicfg_base(XLP_IO_POE_OFFSET(node))
-#define	nlm_get_poe_regbase(node)	\
-			(nlm_get_poe_pcibase(node) + XLP_IO_PCI_HDRSZ)
-#define	nlm_get_poedv_regbase(node)	\
-			nlm_xkphys_map_pcibar0(nlm_get_poe_pcibase(node))
-
-static __inline int
-nlm_poe_max_flows(uint64_t poe_pcibase)
-{
-	return (nlm_read_reg(poe_pcibase, XLP_PCI_DEVINFO_REG0));
-}
-
-/*
- * Helper function, calculate the distribution vector
- * cm0, cm1, cm2, cm3 : CPU masks for nodes 0..3
- * thr_vcmask: destination VCs for a thread
- */
-static __inline void
-nlm_calc_poe_distvec(uint32_t cm0, uint32_t cm1, uint32_t cm2, uint32_t cm3,
-    uint32_t thr_vcmask, uint32_t *distvec)
-{
-	uint32_t cpumask = 0, val;
-	int i, cpu, node, startcpu, index;
-
-	thr_vcmask &= 0xf;
-	for (node = 0; node < XLP_MAX_NODES; node++) {
-		switch (node) {
-		case 0: cpumask = cm0; break;
-		case 1: cpumask = cm1; break;
-		case 2: cpumask = cm2; break;
-		case 3: cpumask = cm3; break;
-		}
-
-		for (i = 0; i < 4; i++) {
-			val = 0;
-			startcpu = 31 - i * 8;
-			for (cpu = startcpu; cpu >= startcpu - 7; cpu--) {
-				val <<= 4;
-				if (cpumask & (1U << cpu))
-				    val |= thr_vcmask;
-			}
-			index = POE_DISTVECT_OFFSET(node, startcpu);
-			distvec[index] = val;
-		}
-	}
-}
-
-static __inline int
-nlm_write_poe_distvec(uint64_t poedv_base, int vec, uint32_t *distvec)
-{
-	uint32_t reg;
-	int i;
-
-	if (vec < 0 || vec >= NUM_DIST_VEC)
-		return (-1);
-
-	for (i = 0; i < NUM_WORDS_PER_DV; i++) {
-		reg = POE_DISTVECT(vec) + i;
-		nlm_write_poedv_reg(poedv_base, reg, distvec[i]);
-	}
-
-	return (0);
-}
-
-static __inline void
-nlm_config_poe(uint64_t poe_base, uint64_t poedv_base)
-{
-	uint32_t zerodv[NUM_WORDS_PER_DV];
-	int i;
-
-	/* First disable distribution vector logic */
-	nlm_write_poe_reg(poe_base, POE_DISTR_EN, 0);
-
-	memset(zerodv, 0, sizeof(zerodv));
-	for (i = 0; i < NUM_DIST_VEC; i++)
-		nlm_write_poe_distvec(poedv_base, i, zerodv);
-
-	/* set the threshold */
-	for (i = 0; i < 5; i++)
-		nlm_write_poe_reg(poe_base, POE_DISTR_THRESHOLD(i),
-		    POE_DIST_THRESHOLD_VAL);
-
-	nlm_write_poe_reg(poe_base, POE_DISTR_EN, 1);
-
-	/* always enable local message store */
-	nlm_write_poe_reg(poe_base, POE_LOC_ALLOC_EN, 1);
-
-	nlm_write_poe_reg(poe_base, POE_TX_TIMER, 0x3);
-}
-#endif /* !(LOCORE) && !(__ASSEMBLY__) */
-#endif
diff --git a/sys/mips/nlm/hal/sgmii.h b/sys/mips/nlm/hal/sgmii.h
deleted file mode 100644
index 2059a40aa74d..000000000000
--- a/sys/mips/nlm/hal/sgmii.h
+++ /dev/null
@@ -1,219 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __NLM_SGMII_H__
-#define	__NLM_SGMII_H__
-
-/**
-* @file_name sgmii.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP SGMII ports
-*/
-
-#define	SGMII_MAC_CONF1(block, i)		NAE_REG(block, i, 0x00)
-#define	SGMII_MAC_CONF2(block, i)		NAE_REG(block, i, 0x01)
-#define	SGMII_IPG_IFG(block, i)			NAE_REG(block, i, 0x02)
-#define	SGMII_HLF_DUP(block, i)			NAE_REG(block, i, 0x03)
-#define	SGMII_MAX_FRAME(block, i)		NAE_REG(block, i, 0x04)
-#define	SGMII_TEST(block, i)			NAE_REG(block, i, 0x07)
-#define	SGMII_MIIM_CONF(block, i)		NAE_REG(block, i, 0x08)
-#define	SGMII_MIIM_CMD(block, i)		NAE_REG(block, i, 0x09)
-#define	SGMII_MIIM_ADDR(block, i)		NAE_REG(block, i, 0x0a)
-#define	SGMII_MIIM_CTRL(block, i)		NAE_REG(block, i, 0x0b)
-#define	SGMII_MIIM_STAT(block, i)		NAE_REG(block, i, 0x0c)
-#define	SGMII_MIIM_IND(block, i)		NAE_REG(block, i, 0x0d)
-#define	SGMII_IO_CTRL(block, i)			NAE_REG(block, i, 0x0e)
-#define	SGMII_IO_STAT(block, i)			NAE_REG(block, i, 0x0f)
-#define	SGMII_STATS_MLR(block, i)		NAE_REG(block, i, 0x1f)
-#define	SGMII_STATS_TR64(block, i)		NAE_REG(block, i, 0x20)
-#define	SGMII_STATS_TR127(block, i)		NAE_REG(block, i, 0x21)
-#define	SGMII_STATS_TR255(block, i)		NAE_REG(block, i, 0x22)
-#define	SGMII_STATS_TR511(block, i)		NAE_REG(block, i, 0x23)
-#define	SGMII_STATS_TR1K(block, i)		NAE_REG(block, i, 0x24)
-#define	SGMII_STATS_TRMAX(block, i)		NAE_REG(block, i, 0x25)
-#define	SGMII_STATS_TRMGV(block, i)		NAE_REG(block, i, 0x26)
-#define	SGMII_STATS_RBYT(block, i)		NAE_REG(block, i, 0x27)
-#define	SGMII_STATS_RPKT(block, i)		NAE_REG(block, i, 0x28)
-#define	SGMII_STATS_RFCS(block, i)		NAE_REG(block, i, 0x29)
-#define	SGMII_STATS_RMCA(block, i)		NAE_REG(block, i, 0x2a)
-#define	SGMII_STATS_RBCA(block, i)		NAE_REG(block, i, 0x2b)
-#define	SGMII_STATS_RXCF(block, i)		NAE_REG(block, i, 0x2c)
-#define	SGMII_STATS_RXPF(block, i)		NAE_REG(block, i, 0x2d)
-#define	SGMII_STATS_RXUO(block, i)		NAE_REG(block, i, 0x2e)
-#define	SGMII_STATS_RALN(block, i)		NAE_REG(block, i, 0x2f)
-#define	SGMII_STATS_RFLR(block, i)		NAE_REG(block, i, 0x30)
-#define	SGMII_STATS_RCDE(block, i)		NAE_REG(block, i, 0x31)
-#define	SGMII_STATS_RCSE(block, i)		NAE_REG(block, i, 0x32)
-#define	SGMII_STATS_RUND(block, i)		NAE_REG(block, i, 0x33)
-#define	SGMII_STATS_ROVR(block, i)		NAE_REG(block, i, 0x34)
-#define	SGMII_STATS_RFRG(block, i)		NAE_REG(block, i, 0x35)
-#define	SGMII_STATS_RJBR(block, i)		NAE_REG(block, i, 0x36)
-#define	SGMII_STATS_TBYT(block, i)		NAE_REG(block, i, 0x38)
-#define	SGMII_STATS_TPKT(block, i)		NAE_REG(block, i, 0x39)
-#define	SGMII_STATS_TMCA(block, i)		NAE_REG(block, i, 0x3a)
-#define	SGMII_STATS_TBCA(block, i)		NAE_REG(block, i, 0x3b)
-#define	SGMII_STATS_TXPF(block, i)		NAE_REG(block, i, 0x3c)
-#define	SGMII_STATS_TDFR(block, i)		NAE_REG(block, i, 0x3d)
-#define	SGMII_STATS_TEDF(block, i)		NAE_REG(block, i, 0x3e)
-#define	SGMII_STATS_TSCL(block, i)		NAE_REG(block, i, 0x3f)
-#define	SGMII_STATS_TMCL(block, i)		NAE_REG(block, i, 0x40)
-#define	SGMII_STATS_TLCL(block, i)		NAE_REG(block, i, 0x41)
-#define	SGMII_STATS_TXCL(block, i)		NAE_REG(block, i, 0x42)
-#define	SGMII_STATS_TNCL(block, i)		NAE_REG(block, i, 0x43)
-#define	SGMII_STATS_TJBR(block, i)		NAE_REG(block, i, 0x46)
-#define	SGMII_STATS_TFCS(block, i)		NAE_REG(block, i, 0x47)
-#define	SGMII_STATS_TXCF(block, i)		NAE_REG(block, i, 0x48)
-#define	SGMII_STATS_TOVR(block, i)		NAE_REG(block, i, 0x49)
-#define	SGMII_STATS_TUND(block, i)		NAE_REG(block, i, 0x4a)
-#define	SGMII_STATS_TFRG(block, i)		NAE_REG(block, i, 0x4b)
-#define	SGMII_STATS_CAR1(block, i)		NAE_REG(block, i, 0x4c)
-#define	SGMII_STATS_CAR2(block, i)		NAE_REG(block, i, 0x4d)
-#define	SGMII_STATS_CAM1(block, i)		NAE_REG(block, i, 0x4e)
-#define	SGMII_STATS_CAM2(block, i)		NAE_REG(block, i, 0x4f)
-#define	SGMII_MAC_ADDR0_LO(block, i)		NAE_REG(block, i, 0x50)
-#define	SGMII_MAC_ADDR0_HI(block, i)		NAE_REG(block, i, 0x51)
-#define	SGMII_MAC_ADDR1_LO(block, i)		NAE_REG(block, i, 0x52)
-#define	SGMII_MAC_ADDR1_HI(block, i)		NAE_REG(block, i, 0x53)
-#define	SGMII_MAC_ADDR2_LO(block, i)		NAE_REG(block, i, 0x54)
-#define	SGMII_MAC_ADDR2_HI(block, i)		NAE_REG(block, i, 0x55)
-#define	SGMII_MAC_ADDR3_LO(block, i)		NAE_REG(block, i, 0x56)
-#define	SGMII_MAC_ADDR3_HI(block, i)		NAE_REG(block, i, 0x57)
-#define	SGMII_MAC_ADDR_MASK0_LO(block, i)	NAE_REG(block, i, 0x58)
-#define	SGMII_MAC_ADDR_MASK0_HI(block, i)	NAE_REG(block, i, 0x59)
-#define	SGMII_MAC_ADDR_MASK1_LO(block, i)	NAE_REG(block, i, 0x5a)
-#define	SGMII_MAC_ADDR_MASK1_HI(block, i)	NAE_REG(block, i, 0x5b)
-#define	SGMII_MAC_FILTER_CONFIG(block, i)	NAE_REG(block, i, 0x5c)
-#define	SGMII_HASHTBL_VEC_B31_0(block, i)	NAE_REG(block, i, 0x60)
-#define	SGMII_HASHTBL_VEC_B63_32(block, i)	NAE_REG(block, i, 0x61)
-#define	SGMII_HASHTBL_VEC_B95_64(block, i)	NAE_REG(block, i, 0x62)
-#define	SGMII_HASHTBL_VEC_B127_96(block, i)	NAE_REG(block, i, 0x63)
-#define	SGMII_HASHTBL_VEC_B159_128(block, i)	NAE_REG(block, i, 0x64)
-#define	SGMII_HASHTBL_VEC_B191_160(block, i)	NAE_REG(block, i, 0x65)
-#define	SGMII_HASHTBL_VEC_B223_192(block, i)	NAE_REG(block, i, 0x66)
-#define	SGMII_HASHTBL_VEC_B255_224(block, i)	NAE_REG(block, i, 0x67)
-#define	SGMII_HASHTBL_VEC_B287_256(block, i)	NAE_REG(block, i, 0x68)
-#define	SGMII_HASHTBL_VEC_B319_288(block, i)	NAE_REG(block, i, 0x69)
-#define	SGMII_HASHTBL_VEC_B351_320(block, i)	NAE_REG(block, i, 0x6a)
-#define	SGMII_HASHTBL_VEC_B383_352(block, i)	NAE_REG(block, i, 0x6b)
-#define	SGMII_HASHTBL_VEC_B415_384(block, i)	NAE_REG(block, i, 0x6c)
-#define	SGMII_HASHTBL_VEC_B447_416(block, i)	NAE_REG(block, i, 0x6d)
-#define	SGMII_HASHTBL_VEC_B479_448(block, i)	NAE_REG(block, i, 0x6e)
-#define	SGMII_HASHTBL_VEC_B511_480(block, i)	NAE_REG(block, i, 0x6f)
-
-#define	SGMII_NETIOR_VLANTYPE_FILTER(block, i)	NAE_REG(block, i, 0x76)
-#define	SGMII_NETIOR_RXDROP_CNTR(block, i)	NAE_REG(block, i, 0x77)
-#define	SGMII_NETIOR_PAUSE_QUANTAMULT(block, i)	NAE_REG(block, i, 0x78)
-#define	SGMII_NETIOR_MAC_CTRL_OPCODE(block, i)	NAE_REG(block, i, 0x79)
-#define	SGMII_NETIOR_MAC_DA_H(block, i)		NAE_REG(block, i, 0x7a)
-#define	SGMII_NETIOR_MAC_DA_L(block, i)		NAE_REG(block, i, 0x7b)
-#define	SGMII_NET_IFACE_CTRL3(block, i)		NAE_REG(block, i, 0x7c)
-#define	SGMII_NETIOR_GMAC_STAT(block, i)	NAE_REG(block, i, 0x7d)
-#define	SGMII_NET_IFACE_CTRL2(block, i)		NAE_REG(block, i, 0x7e)
-#define	SGMII_NET_IFACE_CTRL(block, i)		NAE_REG(block, i, 0x7f)
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-/* speed */
-enum nlm_sgmii_speed {
-	NLM_SGMII_SPEED_10,
-	NLM_SGMII_SPEED_100,
-	NLM_SGMII_SPEED_1000,
-	NLM_SGMII_SPEED_RSVD
-};
-
-/* duplexity */
-enum nlm_sgmii_duplex_mode {
-	NLM_SGMII_DUPLEX_AUTO,
-	NLM_SGMII_DUPLEX_HALF,
-	NLM_SGMII_DUPLEX_FULL
-};
-
-/* stats */
-enum {
-	nlm_sgmii_stats_mlr,
-	nlm_sgmii_stats_tr64,
-	nlm_sgmii_stats_tr127,
-	nlm_sgmii_stats_tr255,
-	nlm_sgmii_stats_tr511,
-	nlm_sgmii_stats_tr1k,
-	nlm_sgmii_stats_trmax,
-	nlm_sgmii_stats_trmgv,
-	nlm_sgmii_stats_rbyt,
-	nlm_sgmii_stats_rpkt,
-	nlm_sgmii_stats_rfcs,
-	nlm_sgmii_stats_rmca,
-	nlm_sgmii_stats_rbca,
-	nlm_sgmii_stats_rxcf,
-	nlm_sgmii_stats_rxpf,
-	nlm_sgmii_stats_rxuo,
-	nlm_sgmii_stats_raln,
-	nlm_sgmii_stats_rflr,
-	nlm_sgmii_stats_rcde,
-	nlm_sgmii_stats_rcse,
-	nlm_sgmii_stats_rund,
-	nlm_sgmii_stats_rovr,
-	nlm_sgmii_stats_rfrg,
-	nlm_sgmii_stats_rjbr,
-	nlm_sgmii_stats_rdummy, /* not used */
-	nlm_sgmii_stats_tbyt,
-	nlm_sgmii_stats_tpkt,
-	nlm_sgmii_stats_tmca,
-	nlm_sgmii_stats_tbca,
-	nlm_sgmii_stats_txpf,
-	nlm_sgmii_stats_tdfr,
-	nlm_sgmii_stats_tedf,
-	nlm_sgmii_stats_tscl,
-	nlm_sgmii_stats_tmcl,
-	nlm_sgmii_stats_tlcl,
-	nlm_sgmii_stats_txcl,
-	nlm_sgmii_stats_tncl,
-	nlm_sgmii_stats_tjbr,
-	nlm_sgmii_stats_tfcs,
-	nlm_sgmii_stats_txcf,
-	nlm_sgmii_stats_tovr,
-	nlm_sgmii_stats_tund,
-	nlm_sgmii_stats_tfrg,
-	nlm_sgmii_stats_car1,
-	nlm_sgmii_stats_car2,
-	nlm_sgmii_stats_cam1,
-	nlm_sgmii_stats_cam2
-};
-
-void nlm_configure_sgmii_interface(uint64_t, int, int, int, int);
-void nlm_sgmii_pcs_init(uint64_t, uint32_t);
-void nlm_nae_setup_mac(uint64_t, int, int, int, int, int, int, int);
-void nlm_nae_setup_rx_mode_sgmii(uint64_t, int, int, int, int, int,
-    int, int);
-void nlm_nae_setup_mac_addr_sgmii(uint64_t, int, int, int, uint8_t *);
-
-#endif /* !(LOCORE) && !(__ASSEMBLY__) */
-
-#endif
diff --git a/sys/mips/nlm/hal/sys.h b/sys/mips/nlm/hal/sys.h
deleted file mode 100644
index 39fda2b9064a..000000000000
--- a/sys/mips/nlm/hal/sys.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_HAL_SYS_H__
-#define	__NLM_HAL_SYS_H__
-
-/**
-* @file_name sys.h
-* @author Netlogic Microsystems
-* @brief HAL for System configuration registers
-*/
-#define	SYS_CHIP_RESET				0x00
-#define	SYS_POWER_ON_RESET_CFG			0x01
-#define	SYS_EFUSE_DEVICE_CFG_STATUS0		0x02
-#define	SYS_EFUSE_DEVICE_CFG_STATUS1		0x03
-#define	SYS_EFUSE_DEVICE_CFG_STATUS2		0x04
-#define	SYS_EFUSE_DEVICE_CFG3			0x05
-#define	SYS_EFUSE_DEVICE_CFG4			0x06
-#define	SYS_EFUSE_DEVICE_CFG5			0x07
-#define	SYS_EFUSE_DEVICE_CFG6			0x08
-#define	SYS_EFUSE_DEVICE_CFG7			0x09
-#define	SYS_PLL_CTRL				0x0a
-#define	SYS_CPU_RESET				0x0b
-#define	SYS_CPU_NONCOHERENT_MODE		0x0d
-#define	SYS_CORE_DFS_DIS_CTRL			0x0e
-#define	SYS_CORE_DFS_RST_CTRL			0x0f
-#define	SYS_CORE_DFS_BYP_CTRL			0x10
-#define	SYS_CORE_DFS_PHA_CTRL			0x11
-#define	SYS_CORE_DFS_DIV_INC_CTRL		0x12
-#define	SYS_CORE_DFS_DIV_DEC_CTRL		0x13
-#define	SYS_CORE_DFS_DIV_VALUE			0x14
-#define	SYS_RESET				0x15
-#define	SYS_DFS_DIS_CTRL			0x16
-#define	SYS_DFS_RST_CTRL			0x17
-#define	SYS_DFS_BYP_CTRL			0x18
-#define	SYS_DFS_DIV_INC_CTRL			0x19
-#define	SYS_DFS_DIV_DEC_CTRL			0x1a
-#define	SYS_DFS_DIV_VALUE0			0x1b
-#define	SYS_DFS_DIV_VALUE1			0x1c
-#define	SYS_SENSE_AMP_DLY			0x1d
-#define	SYS_SOC_SENSE_AMP_DLY			0x1e
-#define	SYS_CTRL0				0x1f
-#define	SYS_CTRL1				0x20
-#define	SYS_TIMEOUT_BS1				0x21
-#define	SYS_BYTE_SWAP				0x22
-#define	SYS_VRM_VID				0x23
-#define	SYS_PWR_RAM_CMD				0x24
-#define	SYS_PWR_RAM_ADDR			0x25
-#define	SYS_PWR_RAM_DATA0			0x26
-#define	SYS_PWR_RAM_DATA1			0x27
-#define	SYS_PWR_RAM_DATA2			0x28
-#define	SYS_PWR_UCODE				0x29
-#define	SYS_CPU0_PWR_STATUS			0x2a
-#define	SYS_CPU1_PWR_STATUS			0x2b
-#define	SYS_CPU2_PWR_STATUS			0x2c
-#define	SYS_CPU3_PWR_STATUS			0x2d
-#define	SYS_CPU4_PWR_STATUS			0x2e
-#define	SYS_CPU5_PWR_STATUS			0x2f
-#define	SYS_CPU6_PWR_STATUS			0x30
-#define	SYS_CPU7_PWR_STATUS			0x31
-#define	SYS_STATUS				0x32
-#define	SYS_INT_POL				0x33
-#define	SYS_INT_TYPE				0x34
-#define	SYS_INT_STATUS				0x35
-#define	SYS_INT_MASK0				0x36
-#define	SYS_INT_MASK1				0x37
-#define	SYS_UCO_S_ECC				0x38
-#define	SYS_UCO_M_ECC				0x39
-#define	SYS_UCO_ADDR				0x3a
-#define	SYS_PLL_DFS_BYP_CTRL			0x3a /* Bx stepping */
-#define	SYS_UCO_INSTR				0x3b
-#define	SYS_MEM_BIST0				0x3c
-#define	SYS_MEM_BIST1				0x3d
-#define	SYS_PLL_DFS_DIV_VALUE			0x3d /* Bx stepping */
-#define	SYS_MEM_BIST2				0x3e
-#define	SYS_MEM_BIST3				0x3f
-#define	SYS_MEM_BIST4				0x40
-#define	SYS_MEM_BIST5				0x41
-#define	SYS_MEM_BIST6				0x42
-#define	SYS_MEM_BIST7				0x43
-#define	SYS_MEM_BIST8				0x44
-#define	SYS_MEM_BIST9				0x45
-#define	SYS_MEM_BIST10				0x46
-#define	SYS_MEM_BIST11				0x47
-#define	SYS_MEM_BIST12				0x48
-#define	SYS_SCRTCH0				0x49
-#define	SYS_SCRTCH1				0x4a
-#define	SYS_SCRTCH2				0x4b
-#define	SYS_SCRTCH3				0x4c
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_sys_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_sys_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_get_sys_pcibase(node) nlm_pcicfg_base(XLP_IO_SYS_OFFSET(node))
-#define	nlm_get_sys_regbase(node) (nlm_get_sys_pcibase(node) + XLP_IO_PCI_HDRSZ)
-
-enum {
-	/* Don't change order and it must start from zero */
-	DFS_DEVICE_NAE = 0,
-	DFS_DEVICE_SAE,
-	DFS_DEVICE_RSA,
-	DFS_DEVICE_DTRE,
-	DFS_DEVICE_CMP,
-	DFS_DEVICE_KBP,
-	DFS_DEVICE_DMC,
-	DFS_DEVICE_NAND,
-	DFS_DEVICE_MMC,
-	DFS_DEVICE_NOR,
-	DFS_DEVICE_CORE,
-	DFS_DEVICE_REGEX_SLOW,
-	DFS_DEVICE_REGEX_FAST,
-	DFS_DEVICE_SATA,
-	INVALID_DFS_DEVICE = 0xFF
-};
-
-static __inline
-void nlm_sys_enable_block(uint64_t sys_base, int block)
-{
-	uint32_t dfsdis, mask;
-
-	mask = 1 << block;
-	dfsdis = nlm_read_sys_reg(sys_base, SYS_DFS_DIS_CTRL);
-	if ((dfsdis & mask) == 0)
-		return;			/* already enabled, nothing to do */
-	dfsdis &= ~mask;
-	nlm_write_sys_reg(sys_base, SYS_DFS_DIS_CTRL, dfsdis);
-}
-
-#endif
-#endif
diff --git a/sys/mips/nlm/hal/uart.h b/sys/mips/nlm/hal/uart.h
deleted file mode 100644
index 4783ccd7d4ce..000000000000
--- a/sys/mips/nlm/hal/uart.h
+++ /dev/null
@@ -1,190 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __XLP_HAL_UART_H__
-#define	__XLP_HAL_UART_H__
-
-/* UART Specific registers */
-#define	UART_RX_DATA		0x00
-#define	UART_TX_DATA		0x00
-
-#define	UART_INT_EN		0x01
-#define	UART_INT_ID		0x02
-#define	UART_FIFO_CTL		0x02
-#define	UART_LINE_CTL		0x03
-#define	UART_MODEM_CTL		0x04
-#define	UART_LINE_STS		0x05
-#define	UART_MODEM_STS		0x06
-
-#define	UART_DIVISOR0		0x00
-#define	UART_DIVISOR1		0x01
-
-#define	BASE_BAUD		(XLP_IO_CLK/16)
-#define	BAUD_DIVISOR(baud)	(BASE_BAUD / baud)
-
-/* LCR mask values */
-#define	LCR_5BITS		0x00
-#define	LCR_6BITS		0x01
-#define	LCR_7BITS		0x02
-#define	LCR_8BITS		0x03
-#define	LCR_STOPB		0x04
-#define	LCR_PENAB		0x08
-#define	LCR_PODD		0x00
-#define	LCR_PEVEN		0x10
-#define	LCR_PONE		0x20
-#define	LCR_PZERO		0x30
-#define	LCR_SBREAK		0x40
-#define	LCR_EFR_ENABLE		0xbf
-#define	LCR_DLAB		0x80
-
-/* MCR mask values */
-#define	MCR_DTR			0x01
-#define	MCR_RTS			0x02
-#define	MCR_DRS			0x04
-#define	MCR_IE			0x08
-#define	MCR_LOOPBACK		0x10
-
-/* FCR mask values */
-#define	FCR_RCV_RST		0x02
-#define	FCR_XMT_RST		0x04
-#define	FCR_RX_LOW		0x00
-#define	FCR_RX_MEDL		0x40
-#define	FCR_RX_MEDH		0x80
-#define	FCR_RX_HIGH		0xc0
-
-/* IER mask values */
-#define	IER_ERXRDY		0x1
-#define	IER_ETXRDY		0x2
-#define	IER_ERLS		0x4
-#define	IER_EMSC		0x8
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define	nlm_read_uart_reg(b, r)		nlm_read_reg(b, r)
-#define	nlm_write_uart_reg(b, r, v)	nlm_write_reg(b, r, v)
-#define	nlm_get_uart_pcibase(node, inst)	\
-		nlm_pcicfg_base(XLP_IO_UART_OFFSET(node, inst))
-#define	nlm_get_uart_regbase(node, inst)	\
-			(nlm_get_uart_pcibase(node, inst) + XLP_IO_PCI_HDRSZ)
-
-static inline void
-nlm_uart_set_baudrate(uint64_t base, int baud)
-{
-	uint32_t lcr;
-
-	lcr = nlm_read_uart_reg(base, UART_LINE_CTL);
-
-	/* enable divisor register, and write baud values */
-	nlm_write_uart_reg(base, UART_LINE_CTL, lcr | (1 << 7));
-	nlm_write_uart_reg(base, UART_DIVISOR0,
-			(BAUD_DIVISOR(baud) & 0xff));
-	nlm_write_uart_reg(base, UART_DIVISOR1,
-			((BAUD_DIVISOR(baud) >> 8) & 0xff));
-
-	/* restore default lcr */
-	nlm_write_uart_reg(base, UART_LINE_CTL, lcr);
-}
-
-static inline void
-nlm_uart_outbyte(uint64_t base, char c)
-{
-	uint32_t lsr;
-
-	for (;;) {
-		lsr = nlm_read_uart_reg(base, UART_LINE_STS);
-		if (lsr & 0x20)
-			break;
-	}
-
-	nlm_write_uart_reg(base, UART_TX_DATA, (int)c);
-}
-
-static inline char
-nlm_uart_inbyte(uint64_t base)
-{
-	int data, lsr;
-
-	for (;;) {
-		lsr = nlm_read_uart_reg(base, UART_LINE_STS);
-		if (lsr & 0x80) { /* parity/frame/break-error - push a zero */
-			data = 0;
-			break;
-		}
-		if (lsr & 0x01) {	/* Rx data */
-			data = nlm_read_uart_reg(base, UART_RX_DATA);
-			break;
-		}
-	}
-
-	return (char)data;
-}
-
-static inline int
-nlm_uart_init(uint64_t base, int baud, int databits, int stopbits,
-	int parity, int int_en, int loopback)
-{
-	uint32_t lcr;
-
-	lcr = 0;
-	if (databits >= 8)
-		lcr |= LCR_8BITS;
-	else if (databits == 7)
-		lcr |= LCR_7BITS;
-	else if (databits == 6)
-		lcr |= LCR_6BITS;
-	else
-		lcr |= LCR_5BITS;
-
-	if (stopbits > 1)
-		lcr |= LCR_STOPB;
-
-	lcr |= parity << 3;
-
-	/* setup default lcr */
-	nlm_write_uart_reg(base, UART_LINE_CTL, lcr);
-
-	/* Reset the FIFOs */
-	nlm_write_uart_reg(base, UART_LINE_CTL, FCR_RCV_RST | FCR_XMT_RST);
-
-	nlm_uart_set_baudrate(base, baud);
-
-	if (loopback)
-		nlm_write_uart_reg(base, UART_MODEM_CTL, 0x1f);
-
-	if (int_en)
-		nlm_write_uart_reg(base, UART_INT_EN, IER_ERXRDY | IER_ETXRDY);
-
-	return 0;
-}
-#endif /* !LOCORE && !__ASSEMBLY__ */
-#endif /* __XLP_HAL_UART_H__ */
diff --git a/sys/mips/nlm/hal/ucore_loader.h b/sys/mips/nlm/hal/ucore_loader.h
deleted file mode 100644
index 95f2caf0bea8..000000000000
--- a/sys/mips/nlm/hal/ucore_loader.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef __NLM_UCORE_LOADER_H__
-#define	__NLM_UCORE_LOADER_H__
-
-/**
-* @file_name ucore_loader.h
-* @author Netlogic Microsystems
-* @brief Ucore loader API header
-*/
-
-#define	CODE_SIZE_PER_UCORE	(4 << 10)
-
-static __inline__ void
-nlm_ucore_load_image(uint64_t nae_base, int ucore)
-{
-	uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET +
-	    (ucore * CODE_SIZE_PER_UCORE);
-	uint32_t *p = (uint32_t *)ucore_app_bin;
-	int i, size;
-
-	size = sizeof(ucore_app_bin)/sizeof(uint32_t);
-	for (i = 0; i < size; i++, addr += 4)
-		nlm_store_word_daddr(addr, htobe32(p[i]));
-
-	/* add a 'nop' if number of instructions are odd */
-	if (size & 0x1)
-		nlm_store_word_daddr(addr, 0x0);
-}
-
-static __inline int
-nlm_ucore_write_sharedmem(uint64_t nae_base, int index, uint32_t data)
-{
-	uint32_t ucore_cfg;
-	uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET;
-
-	if (index > 128)
-		return (-1);
-
-	ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG);
-	/* set iram to zero */
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
-	    (ucore_cfg & ~(0x1 << 7)));
-
-	nlm_store_word_daddr(addr + (index * 4), data);
-
-	/* restore ucore config */
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
-	return (0);
-}
-
-static __inline uint32_t
-nlm_ucore_read_sharedmem(uint64_t nae_base, int index)
-{
-	uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET;
-	uint32_t ucore_cfg, val;
-
-	ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG);
-	/* set iram to zero */
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
-	    (ucore_cfg & ~(0x1 << 7)));
-
-	val = nlm_load_word_daddr(addr + (index * 4));
-
-	/* restore ucore config */
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
-
-	return val;
-}
-
-static __inline__ int
-nlm_ucore_load_all(uint64_t nae_base, uint32_t ucore_mask, int nae_reset_done)
-{
-	int i, count = 0;
-	uint32_t mask;
-	uint32_t ucore_cfg = 0;
-
-	mask = ucore_mask & 0xffff;
-
-	/* Stop all ucores */
-	if (nae_reset_done == 0) { /* Skip the Ucore reset if NAE reset is done */
-		ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG);
-		nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
-		    ucore_cfg | (1 << 24));
-
-		/* poll for ucore to get in to a wait state */
-		do {
-			ucore_cfg = nlm_read_nae_reg(nae_base,
-			    NAE_RX_UCORE_CFG);
-		} while ((ucore_cfg & (1 << 25)) == 0);
-	}
-
-	for (i = 0; i < sizeof(ucore_mask) * NBBY; i++) {
-		if ((mask & (1 << i)) == 0)
-			continue;
-		nlm_ucore_load_image(nae_base, i);
-		count++;
-	}
-
-	/* Enable per-domain ucores */
-	ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG);
-
-	/* write one to reset bits to put the ucores in reset */
-	ucore_cfg = ucore_cfg | (((mask) & 0xffff) << 8);
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
-
-	/* write zero to reset bits to pull them out of reset */
-	ucore_cfg = ucore_cfg & (~(((mask) & 0xffff) << 8)) & ~(1 << 24);
-	nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
-
-	return (count);
-}
-#endif
diff --git a/sys/mips/nlm/hal/usb.h b/sys/mips/nlm/hal/usb.h
deleted file mode 100644
index 170d84232025..000000000000
--- a/sys/mips/nlm/hal/usb.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_USB_H__
-#define __NLM_USB_H__
-
-#define USB_CTL_0			0x01
-#define USB_PHY_0			0x0A
-#define USB_PHY_RESET			0x01
-#define USB_PHY_PORT_RESET_0		0x10
-#define USB_PHY_PORT_RESET_1		0x20
-#define USB_CONTROLLER_RESET		0x01
-#define USB_INT_STATUS			0x0E
-#define USB_INT_EN			0x0F
-#define USB_PHY_INTERRUPT_EN		0x01
-#define USB_OHCI_INTERRUPT_EN		0x02
-#define USB_OHCI_INTERRUPT1_EN		0x04
-#define USB_OHCI_INTERRUPT2_EN		0x08
-#define USB_CTRL_INTERRUPT_EN		0x10
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-#define nlm_read_usb_reg(b, r)		nlm_read_reg(b,r)
-#define nlm_write_usb_reg(b, r, v)	nlm_write_reg(b,r,v)
-#define	nlm_get_usb_pcibase(node, inst)	nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst))
-#define	nlm_get_usb_hcd_base(node, inst) nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst))
-#define	nlm_get_usb_regbase(node, inst)	(nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ)
-
-#endif
-#endif
diff --git a/sys/mips/nlm/hal/xaui.h b/sys/mips/nlm/hal/xaui.h
deleted file mode 100644
index db422844711b..000000000000
--- a/sys/mips/nlm/hal/xaui.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#ifndef __NLM_XAUI_H__
-#define	__NLM_XAUI_H__
-
-/**
-* @file_name xaui.h
-* @author Netlogic Microsystems
-* @brief Basic definitions of XLP XAUI ports
-*/
-#define	XAUI_CONFIG0(block)			NAE_REG(block, 4, 0x00)
-#define	XAUI_CONFIG1(block)			NAE_REG(block, 4, 0x01)
-#define	XAUI_CONFIG2(block)			NAE_REG(block, 4, 0x02)
-#define	XAUI_CONFIG3(block)			NAE_REG(block, 4, 0x03)
-/*
-#define	XAUI_MAC_ADDR0_LO(block)		NAE_REG(block, 4, 0x04)
-#define	XAUI_MAC_ADDR0_HI(block)		NAE_REG(block, 4, 0x05)
-*/
-#define	XAUI_MAX_FRAME_LEN(block)		NAE_REG(block, 4, 0x08)
-#define	XAUI_REVISION_LVL(block)		NAE_REG(block, 4, 0x0b)
-#define	XAUI_MII_MGMT_CMD(block)		NAE_REG(block, 4, 0x10)
-#define	XAUI_MII_MGMT_FIELD(block)		NAE_REG(block, 4, 0x11)
-#define	XAUI_MII_MGMT_CFG(block)		NAE_REG(block, 4, 0x12)
-#define	XAUI_MIIM_LINK_FALL_VEC(block)		NAE_REG(block, 4, 0x13)
-#define	XAUI_MII_MGMT_IND(block)		NAE_REG(block, 4, 0x14)
-#define	XAUI_STATS_MLR(block)			NAE_REG(block, 4, 0x1f)
-#define	XAUI_STATS_TR64(block)			NAE_REG(block, 4, 0x20)
-#define	XAUI_STATS_TR127(block)			NAE_REG(block, 4, 0x21)
-#define	XAUI_STATS_TR255(block)			NAE_REG(block, 4, 0x22)
-#define	XAUI_STATS_TR511(block)			NAE_REG(block, 4, 0x23)
-#define	XAUI_STATS_TR1K(block)			NAE_REG(block, 4, 0x24)
-#define	XAUI_STATS_TRMAX(block)			NAE_REG(block, 4, 0x25)
-#define	XAUI_STATS_TRMGV(block)			NAE_REG(block, 4, 0x26)
-#define	XAUI_STATS_RBYT(block)			NAE_REG(block, 4, 0x27)
-#define	XAUI_STATS_RPKT(block)			NAE_REG(block, 4, 0x28)
-#define	XAUI_STATS_RFCS(block)			NAE_REG(block, 4, 0x29)
-#define	XAUI_STATS_RMCA(block)			NAE_REG(block, 4, 0x2a)
-#define	XAUI_STATS_RBCA(block)			NAE_REG(block, 4, 0x2b)
-#define	XAUI_STATS_RXCF(block)			NAE_REG(block, 4, 0x2c)
-#define	XAUI_STATS_RXPF(block)			NAE_REG(block, 4, 0x2d)
-#define	XAUI_STATS_RXUO(block)			NAE_REG(block, 4, 0x2e)
-#define	XAUI_STATS_RALN(block)			NAE_REG(block, 4, 0x2f)
-#define	XAUI_STATS_RFLR(block)			NAE_REG(block, 4, 0x30)
-#define	XAUI_STATS_RCDE(block)			NAE_REG(block, 4, 0x31)
-#define	XAUI_STATS_RCSE(block)			NAE_REG(block, 4, 0x32)
-#define	XAUI_STATS_RUND(block)			NAE_REG(block, 4, 0x33)
-#define	XAUI_STATS_ROVR(block)			NAE_REG(block, 4, 0x34)
-#define	XAUI_STATS_RFRG(block)			NAE_REG(block, 4, 0x35)
-#define	XAUI_STATS_RJBR(block)			NAE_REG(block, 4, 0x36)
-#define	XAUI_STATS_TBYT(block)			NAE_REG(block, 4, 0x38)
-#define	XAUI_STATS_TPKT(block)			NAE_REG(block, 4, 0x39)
-#define	XAUI_STATS_TMCA(block)			NAE_REG(block, 4, 0x3a)
-#define	XAUI_STATS_TBCA(block)			NAE_REG(block, 4, 0x3b)
-#define	XAUI_STATS_TXPF(block)			NAE_REG(block, 4, 0x3c)
-#define	XAUI_STATS_TDFR(block)			NAE_REG(block, 4, 0x3d)
-#define	XAUI_STATS_TEDF(block)			NAE_REG(block, 4, 0x3e)
-#define	XAUI_STATS_TSCL(block)			NAE_REG(block, 4, 0x3f)
-#define	XAUI_STATS_TMCL(block)			NAE_REG(block, 4, 0x40)
-#define	XAUI_STATS_TLCL(block)			NAE_REG(block, 4, 0x41)
-#define	XAUI_STATS_TXCL(block)			NAE_REG(block, 4, 0x42)
-#define	XAUI_STATS_TNCL(block)			NAE_REG(block, 4, 0x43)
-#define	XAUI_STATS_TJBR(block)			NAE_REG(block, 4, 0x46)
-#define	XAUI_STATS_TFCS(block)			NAE_REG(block, 4, 0x47)
-#define	XAUI_STATS_TXCF(block)			NAE_REG(block, 4, 0x48)
-#define	XAUI_STATS_TOVR(block)			NAE_REG(block, 4, 0x49)
-#define	XAUI_STATS_TUND(block)			NAE_REG(block, 4, 0x4a)
-#define	XAUI_STATS_TFRG(block)			NAE_REG(block, 4, 0x4b)
-#define	XAUI_STATS_CAR1(block)			NAE_REG(block, 4, 0x4c)
-#define	XAUI_STATS_CAR2(block)			NAE_REG(block, 4, 0x4d)
-#define	XAUI_STATS_CAM1(block)			NAE_REG(block, 4, 0x4e)
-#define	XAUI_STATS_CAM2(block)			NAE_REG(block, 4, 0x4f)
-#define	XAUI_MAC_ADDR0_LO(block)		NAE_REG(block, 4, 0x50)
-#define	XAUI_MAC_ADDR0_HI(block)		NAE_REG(block, 4, 0x51)
-#define	XAUI_MAC_ADDR1_LO(block)		NAE_REG(block, 4, 0x52)
-#define	XAUI_MAC_ADDR1_HI(block)		NAE_REG(block, 4, 0x53)
-#define	XAUI_MAC_ADDR2_LO(block)		NAE_REG(block, 4, 0x54)
-#define	XAUI_MAC_ADDR2_HI(block)		NAE_REG(block, 4, 0x55)
-#define	XAUI_MAC_ADDR3_LO(block)		NAE_REG(block, 4, 0x56)
-#define	XAUI_MAC_ADDR3_HI(block)		NAE_REG(block, 4, 0x57)
-#define	XAUI_MAC_ADDR_MASK0_LO(block)		NAE_REG(block, 4, 0x58)
-#define	XAUI_MAC_ADDR_MASK0_HI(block)		NAE_REG(block, 4, 0x59)
-#define	XAUI_MAC_ADDR_MASK1_LO(block)		NAE_REG(block, 4, 0x5a)
-#define	XAUI_MAC_ADDR_MASK1_HI(block)		NAE_REG(block, 4, 0x5b)
-#define	XAUI_MAC_FILTER_CFG(block)		NAE_REG(block, 4, 0x5c)
-#define	XAUI_HASHTBL_VEC_B31_0(block)		NAE_REG(block, 4, 0x60)
-#define	XAUI_HASHTBL_VEC_B63_32(block)		NAE_REG(block, 4, 0x61)
-#define	XAUI_HASHTBL_VEC_B95_64(block)		NAE_REG(block, 4, 0x62)
-#define	XAUI_HASHTBL_VEC_B127_96(block)		NAE_REG(block, 4, 0x63)
-#define	XAUI_HASHTBL_VEC_B159_128(block)	NAE_REG(block, 4, 0x64)
-#define	XAUI_HASHTBL_VEC_B191_160(block)	NAE_REG(block, 4, 0x65)
-#define	XAUI_HASHTBL_VEC_B223_192(block)	NAE_REG(block, 4, 0x66)
-#define	XAUI_HASHTBL_VEC_B255_224(block)	NAE_REG(block, 4, 0x67)
-#define	XAUI_HASHTBL_VEC_B287_256(block)	NAE_REG(block, 4, 0x68)
-#define	XAUI_HASHTBL_VEC_B319_288(block)	NAE_REG(block, 4, 0x69)
-#define	XAUI_HASHTBL_VEC_B351_320(block)	NAE_REG(block, 4, 0x6a)
-#define	XAUI_HASHTBL_VEC_B383_352(block)	NAE_REG(block, 4, 0x6b)
-#define	XAUI_HASHTBL_VEC_B415_384(block)	NAE_REG(block, 4, 0x6c)
-#define	XAUI_HASHTBL_VEC_B447_416(block)	NAE_REG(block, 4, 0x6d)
-#define	XAUI_HASHTBL_VEC_B479_448(block)	NAE_REG(block, 4, 0x6e)
-#define	XAUI_HASHTBL_VEC_B511_480(block)	NAE_REG(block, 4, 0x6f)
-
-#define	XAUI_NETIOR_XGMAC_MISC0(block)		NAE_REG(block, 4, 0x76)
-#define	XAUI_NETIOR_RX_ABORT_DROP_COUNT(block)	NAE_REG(block, 4, 0x77)
-#define	XAUI_NETIOR_MACCTRL_PAUSE_QUANTA(block)	NAE_REG(block, 4, 0x78)
-#define	XAUI_NETIOR_MACCTRL_OPCODE(block)	NAE_REG(block, 4, 0x79)
-#define	XAUI_NETIOR_MAC_DA_H(block)		NAE_REG(block, 4, 0x7a)
-#define	XAUI_NETIOR_MAC_DA_L(block)		NAE_REG(block, 4, 0x7b)
-#define	XAUI_NETIOR_XGMAC_STAT(block)		NAE_REG(block, 4, 0x7c)
-#define	XAUI_NETIOR_XGMAC_CTRL3(block)		NAE_REG(block, 4, 0x7d)
-#define	XAUI_NETIOR_XGMAC_CTRL2(block)		NAE_REG(block, 4, 0x7e)
-#define	XAUI_NETIOR_XGMAC_CTRL1(block)		NAE_REG(block, 4, 0x7f)
-
-#define	LANE_RX_CLK				(1 << 0)
-#define	LANE_TX_CLK				(1 << 6)
-
-#define	XAUI_LANE_FAULT				0x400
-#define	XAUI_CONFIG_0				0
-
-#define	XAUI_CONFIG_MACRST			0x80000000
-#define	XAUI_CONFIG_RSTRCTL			0x00400000
-#define	XAUI_CONFIG_RSTRFN			0x00200000
-#define	XAUI_CONFIG_RSTTCTL			0x00040000
-#define	XAUI_CONFIG_RSTTFN			0x00020000
-#define	XAUI_CONFIG_RSTMIIM			0x00010000
-
-#define	XAUI_CONFIG_1				1
-
-#define	XAUI_CONFIG_TCTLEN			0x80000000
-#define	XAUI_CONFIG_TFEN			0x40000000
-#define	XAUI_CONFIG_RCTLEN			0x20000000
-#define	XAUI_CONFIG_RFEN			0x10000000
-#define	XAUI_CONFIG_DRPLT64			0x00000020
-#define	XAUI_CONFIG_LENCHK			0x00000008
-#define	XAUI_CONFIG_GENFCS			0x00000004
-#define	XAUI_CONFIG_PAD_0			0x00000000
-#define	XAUI_CONFIG_PAD_64			0x00000001
-#define	XAUI_CONFIG_PAD_COND			0x00000002
-#define	XAUI_CONFIG_PAD_68			0x00000003
-
-#define	XAUI_PHY_CTRL_1				0x00
-
-#define	NETIOR_XGMAC_CTRL1			0x7F
-#define	NETIOR_XGMAC_CTRL3			0x7D
-
-#define	NETIOR_XGMAC_VLAN_DC_POS		28
-#define	NETIOR_XGMAC_PHYADDR_POS		23
-#define	NETIOR_XGMAC_DEVID_POS			18
-#define	NETIOR_XGMAC_STATS_EN_POS		17
-#define	NETIOR_XGMAC_TX_PFC_EN_POS		14
-#define	NETIOR_XGMAC_RX_PFC_EN_POS		13
-#define	NETIOR_XGMAC_SOFT_RST_POS		11
-#define	NETIOR_XGMAC_TX_PAUSE_POS		10
-
-#define	NETIOR_XGMAC_STATS_CLR_POS		16
-
-#if !defined(LOCORE) && !defined(__ASSEMBLY__)
-
-void nlm_xaui_pcs_init(uint64_t, int);
-void nlm_nae_setup_rx_mode_xaui(uint64_t, int, int, int, int, int, int, int);
-void nlm_nae_setup_mac_addr_xaui(uint64_t, int, int, int, unsigned char *);
-void nlm_config_xaui_mtu(uint64_t, int, int, int);
-void nlm_config_xaui(uint64_t, int, int, int, int);
-
-#endif /* !(LOCORE) && !(__ASSEMBLY__) */
-
-#endif
diff --git a/sys/mips/nlm/interrupt.h b/sys/mips/nlm/interrupt.h
deleted file mode 100644
index ba502f3f7767..000000000000
--- a/sys/mips/nlm/interrupt.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef _RMI_INTERRUPT_H_
-#define _RMI_INTERRUPT_H_
-
-/* Defines for the IRQ numbers */
-
-#define	IRQ_IPI			41  /* 8-39 are used by PIC interrupts */
-#define	IRQ_MSGRING		6
-#define	IRQ_TIMER		7
-
-#define	PIC_IRQ_BASE		8
-#define	PIC_IRT_LAST_IRQ	39
-#define	XLP_IRQ_IS_PICINTR(irq)	((irq) >= PIC_IRQ_BASE && \
-				    (irq) <= PIC_IRT_LAST_IRQ)
-
-#define	PIC_UART_0_IRQ		17
-#define	PIC_UART_1_IRQ		18
-
-#define	PIC_PCIE_0_IRQ		19
-#define	PIC_PCIE_1_IRQ		20
-#define	PIC_PCIE_2_IRQ		21
-#define	PIC_PCIE_3_IRQ		22
-#define	PIC_PCIE_IRQ(l)		(PIC_PCIE_0_IRQ + (l))
-
-#define	PIC_USB_0_IRQ		23
-#define	PIC_USB_1_IRQ		24
-#define	PIC_USB_2_IRQ		25
-#define	PIC_USB_3_IRQ		26
-#define	PIC_USB_4_IRQ		27
-#define	PIC_USB_IRQ(n)		(PIC_USB_0_IRQ + (n))
-
-#define	PIC_MMC_IRQ		29
-#define	PIC_I2C_0_IRQ		30
-#define	PIC_I2C_1_IRQ		31
-#define	PIC_I2C_IRQ(n)		(PIC_I2C_0_IRQ + (n))
-
-/*
- * XLR needs custom pre and post handlers for PCI/PCI-e interrupts
- * XXX: maybe follow i386 intsrc model
- */
-void xlp_enable_irq(int irq);
-void xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg);
-
-#endif				/* _RMI_INTERRUPT_H_ */
diff --git a/sys/mips/nlm/intr_machdep.c b/sys/mips/nlm/intr_machdep.c
deleted file mode 100644
index 33bfad1fe882..000000000000
--- a/sys/mips/nlm/intr_machdep.c
+++ /dev/null
@@ -1,360 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/intr_machdep.h>
-#include <machine/md_var.h>
-#include <machine/trap.h>
-#include <machine/hwfunc.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/interrupt.h>
-#include <mips/nlm/hal/pic.h>
-#include <mips/nlm/xlp.h>
-
-#define INTRCNT_COUNT	256
-#define	INTRNAME_LEN	(2*MAXCOMLEN + 1)
-
-MALLOC_DECLARE(M_MIPSINTR);
-MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling");
-
-u_long *intrcnt;
-char *intrnames;
-size_t sintrcnt;
-size_t sintrnames;
-
-struct xlp_intrsrc {
-	void (*bus_ack)(int, void *);	/* Additional ack */
-	void *bus_ack_arg;		/* arg for additional ack */
-	struct intr_event *ie;		/* event corresponding to intr */
-	int irq;
-	int irt;
-};
-
-static struct xlp_intrsrc xlp_interrupts[XLR_MAX_INTR];
-static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR];
-static int intrcnt_index;
-
-int
-xlp_irq_to_irt(int irq)
-{
-	uint32_t offset;
-
-	switch (irq) {
-	case PIC_UART_0_IRQ:
-	case PIC_UART_1_IRQ:
-		offset =  XLP_IO_UART_OFFSET(0, irq - PIC_UART_0_IRQ);
-		return (xlp_socdev_irt(offset));
-	case PIC_PCIE_0_IRQ:
-	case PIC_PCIE_1_IRQ:
-	case PIC_PCIE_2_IRQ:
-	case PIC_PCIE_3_IRQ:
-		offset = XLP_IO_PCIE_OFFSET(0, irq - PIC_PCIE_0_IRQ);
-		return (xlp_socdev_irt(offset));
-	case PIC_USB_0_IRQ:
-	case PIC_USB_1_IRQ:
-	case PIC_USB_2_IRQ:
-	case PIC_USB_3_IRQ:
-	case PIC_USB_4_IRQ:
-		offset = XLP_IO_USB_OFFSET(0, irq - PIC_USB_0_IRQ);
-		return (xlp_socdev_irt(offset));
-	case PIC_I2C_0_IRQ:
-	case PIC_I2C_1_IRQ:
-		offset = XLP_IO_I2C0_OFFSET(0);
-		return (xlp_socdev_irt(offset) + irq - PIC_I2C_0_IRQ);
-	default:
-		printf("ERROR: %s: unknown irq %d\n", __func__, irq);
-		return (-1);
-	}
-}
-
-void
-xlp_enable_irq(int irq)
-{
-	uint64_t eimr;
-
-	eimr = nlm_read_c0_eimr();
-	nlm_write_c0_eimr(eimr | (1ULL << irq));
-}
-
-void
-cpu_establish_softintr(const char *name, driver_filter_t * filt,
-    void (*handler) (void *), void *arg, int irq, int flags,
-    void **cookiep)
-{
-
-	panic("Soft interrupts unsupported!\n");
-}
-
-static void
-xlp_post_filter(void *source)
-{
-	struct xlp_intrsrc *src = source;
-
-	if (src->bus_ack)
-		src->bus_ack(src->irq, src->bus_ack_arg);
-	nlm_pic_ack(xlp_pic_base, src->irt);
-}
-
-static void
-xlp_pre_ithread(void *source)
-{
-	struct xlp_intrsrc *src = source;
-
-	if (src->bus_ack)
-		src->bus_ack(src->irq, src->bus_ack_arg);
-}
-
-static void
-xlp_post_ithread(void *source)
-{
-	struct xlp_intrsrc *src = source;
-
-	nlm_pic_ack(xlp_pic_base, src->irt);
-}
-
-void
-xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg)
-{
-	struct xlp_intrsrc *src;
-
-	KASSERT(irq > 0 && irq <= XLR_MAX_INTR,
-	    ("%s called for bad hard intr %d", __func__, irq));
-
-	/* no locking needed - this will called early in boot */
-	src = &xlp_interrupts[irq];
-	KASSERT(src->ie != NULL,
-	    ("%s called after IRQ enable for %d.", __func__, irq));
-	src->bus_ack_arg = arg;
-	src->bus_ack = ack;
-}
-
-void
-cpu_establish_hardintr(const char *name, driver_filter_t * filt,
-    void (*handler) (void *), void *arg, int irq, int flags,
-    void **cookiep)
-{
-	struct intr_event *ie;	/* descriptor for the IRQ */
-	struct xlp_intrsrc *src = NULL;
-	int errcode;
-
-	KASSERT(irq > 0 && irq <= XLR_MAX_INTR ,
-	    ("%s called for bad hard intr %d", __func__, irq));
-
-	/*
-	 * Locking - not needed now, because we do this only on
-	 * startup from CPU0
-	 */
-	src = &xlp_interrupts[irq];
-	ie = src->ie;
-	if (ie == NULL) {
-		/*
-		 * PIC based interrupts need ack in PIC, and some SoC
-		 * components need additional acks (e.g. PCI)
-		 */
-		if (XLP_IRQ_IS_PICINTR(irq))
-			errcode = intr_event_create(&ie, src, 0, irq,
-			    xlp_pre_ithread, xlp_post_ithread, xlp_post_filter,
-			    NULL, "hard intr%d:", irq);
-		else {
-			if (filt == NULL)
-				panic("Unsupported non filter percpu intr %d", irq);
-			errcode = intr_event_create(&ie, src, 0, irq,
-			    NULL, NULL, NULL, NULL, "hard intr%d:", irq);
-		}
-		if (errcode) {
-			printf("Could not create event for intr %d\n", irq);
-			return;
-		}
-		src->irq = irq;
-		src->ie = ie;
-	}
-	if (XLP_IRQ_IS_PICINTR(irq)) {
-		/* Set all irqs to CPU 0 for now */
-		src->irt = xlp_irq_to_irt(irq);
-		nlm_pic_write_irt_direct(xlp_pic_base, src->irt, 1, 0,
-		    PIC_LOCAL_SCHEDULING, irq, 0);
-	}
-
-	intr_event_add_handler(ie, name, filt, handler, arg,
-	    intr_priority(flags), flags, cookiep);
-	xlp_enable_irq(irq);
-}
-
-void
-cpu_intr(struct trapframe *tf)
-{
-	struct intr_event *ie;
-	uint64_t eirr, eimr;
-	int i;
-
-	critical_enter();
-
-	/* find a list of enabled interrupts */
-	eirr = nlm_read_c0_eirr();
-	eimr = nlm_read_c0_eimr();
-	eirr &= eimr;
-
-	if (eirr == 0) {
-		critical_exit();
-		return;
-	}
-	/*
-	 * No need to clear the EIRR here as the handler writes to
-	 * compare which ACKs the interrupt.
-	 */
-	if (eirr & (1 << IRQ_TIMER)) {
-		intr_event_handle(xlp_interrupts[IRQ_TIMER].ie, tf);
-		critical_exit();
-		return;
-	}
-
-	/* FIXME sched pin >? LOCK>? */
-	for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
-		if ((eirr & (1ULL << i)) == 0)
-			continue;
-
-		ie = xlp_interrupts[i].ie;
-		/* Don't account special IRQs */
-		switch (i) {
-		case IRQ_IPI:
-		case IRQ_MSGRING:
-			break;
-		default:
-			mips_intrcnt_inc(mips_intr_counters[i]);
-		}
-
-		/* Ack the IRQ on the CPU */
-		nlm_write_c0_eirr(1ULL << i);
-		if (intr_event_handle(ie, tf) != 0) {
-			printf("stray interrupt %d\n", i);
-		}
-	}
-	critical_exit();
-}
-
-void
-mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
-{
-	int idx = counter - intrcnt;
-
-	KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
-
-	snprintf(intrnames + (MAXCOMLEN + 1) * idx,
-	    MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
-}
-
-mips_intrcnt_t
-mips_intrcnt_create(const char* name)
-{
-	mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
-
-	mips_intrcnt_setname(counter, name);
-	return counter;
-}
-
-void
-cpu_init_interrupts()
-{
-	int i;
-	char name[MAXCOMLEN + 1];
-
-	intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR,
-	    M_WAITOK | M_ZERO);
-	intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR,
-	    M_WAITOK | M_ZERO);
-	sintrcnt = INTRCNT_COUNT * sizeof(u_long);
-	sintrnames = INTRCNT_COUNT * INTRNAME_LEN;
-
-	/*
-	 * Initialize all available vectors so spare IRQ
-	 * would show up in systat output
-	 */
-	for (i = 0; i < XLR_MAX_INTR; i++) {
-		snprintf(name, MAXCOMLEN + 1, "int%d:", i);
-		mips_intr_counters[i] = mips_intrcnt_create(name);
-	}
-}
-
-static int	xlp_pic_probe(device_t);
-static int	xlp_pic_attach(device_t);
-
-static int
-xlp_pic_probe(device_t dev)
-{
-
-	if (!ofw_bus_is_compatible(dev, "netlogic,xlp-pic"))
-		return (ENXIO);
-	device_set_desc(dev, "XLP PIC");
-	return (0);
-}
-
-static int
-xlp_pic_attach(device_t dev)
-{
-
-	return (0);
-}
-
-static device_method_t xlp_pic_methods[] = {
-	DEVMETHOD(device_probe,		xlp_pic_probe),
-	DEVMETHOD(device_attach,	xlp_pic_attach),
-
-	DEVMETHOD_END
-};
-
-static driver_t xlp_pic_driver = {
-	"xlp_pic",
-	xlp_pic_methods,
-	1,		/* no softc */
-};
-
-static devclass_t xlp_pic_devclass;
-DRIVER_MODULE(xlp_pic, simplebus, xlp_pic_driver, xlp_pic_devclass, 0, 0);
diff --git a/sys/mips/nlm/mpreset.S b/sys/mips/nlm/mpreset.S
deleted file mode 100644
index 2a31aaf5776b..000000000000
--- a/sys/mips/nlm/mpreset.S
+++ /dev/null
@@ -1,201 +0,0 @@
-/*-
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/cpuregs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/cpucontrol.h>
-
-#define SYS_REG_KSEG1(node, reg)	(0xa0000000 + XLP_DEFAULT_IO_BASE + \
-		XLP_IO_SYS_OFFSET(node)  + XLP_IO_PCI_HDRSZ + (reg) * 4)
-#include "assym.inc"
-
-	.text
-	.set	noat
-	.set	noreorder
-	.set	mips64
-
-#define	MFCR(rt,rs)	.word	((0x1c<<26)|((rs)<<21)|((rt)<<16)|(0x18))
-#define	MTCR(rt,rs)	.word	((0x1c<<26)|((rs)<<21)|((rt)<<16)|(0x19))
-/*
- * We need to do this to really flush the dcache before splitting it
- */
-.macro flush_l1_dcache
-	.set	push
-	.set	noreorder
-	li	$8, LSU_DEBUG_DATA0 /* use register number to handle */
-	li	$9, LSU_DEBUG_ADDR  /* different ABIs */
-	li	t2, 0		/* index */
-	li	t3, 0x1000	/* loop count, 512 sets * 8 whatever? */
-1:
-	sll	v0, t2, 5
-	MTCR(0, 8)
-	ori	v1, v0, 0x3	/* way0 | write_enable | write_active */
-	MTCR(3, 9)
-2:
-	MFCR(3, 9)
-	andi	v1, 0x1		/* wait for write_active == 0 */
-	bnez	v1, 2b
-	nop
-	MTCR(0, 8)
-	ori	v1, v0, 0x7	/* way1 | write_enable | write_active */
-	MTCR(3, 9)
-3:
-	MFCR(3, 9)
-	andi	v1, 0x1		/* wait for write_active == 0 */
-	bnez	v1, 3b
-	nop
-	addi	t2, 1
-	bne	t3, t2, 1b
-	nop
-	.set pop
-.endm
-
-VECTOR(XLPResetEntry, unknown)
-	mfc0	t0, MIPS_COP_0_STATUS
-	li	t1, 0x80000
-	and	t1, t0, t1
-	bnez	t1, nmi_handler
-	nop
-
-#ifdef SMP
-	/* Reset entry for secordary cores */
-	mfc0	t0, MIPS_COP_0_PRID, 1
-	srl	t0, t0, 2		/* discard thread id */
-	andi	t0, t0, 0x7		/* core id */
-	li	t1, 1
-	sll	t0, t1, t0
-	nor     t0, t0, zero		/* mask with core id bit clear */
-
-	/* clear CPU non-coherent bit */
-	li	t2, SYS_REG_KSEG1(0, SYS_CPU_NONCOHERENT_MODE)
-	lw	t1, 0(t2)
-	and	t1, t1, t0
-	sw	t1, 0(t2)
-	lw	t1, 0(t2)	/* read-back ensures operation complete */
-	sync
-
-	dla	t2, mpentry
-	jr	t2
-	nop
-#endif
-	nop
-	/* NOT REACHED */
-VECTOR_END(XLPResetEntry)
-
-
-	/* Not yet */
-nmi_handler:
-	nop
-	nop
-	j	nmi_handler
-
-#ifdef SMP
-	/*
-	 * Enable other threads in the core, called from thread 0
-	 * of the core
-	 */
-LEAF(xlp_enable_threads)
-	/*
-	 * Save and restore callee saved registers of all ABIs
-	 * Enabling threads trashes the registers
-	 */
-	dmtc0	sp, $4, 2	/* SP saved in UserLocal */
-	ori	sp, sp, 0x7
-	xori	sp, sp, 0x7	/* align 64 bit */
-	addiu	sp, sp, -128
-	mfc0	t1, MIPS_COP_0_STATUS
-	sd	s0, 0(sp)
-	sd	s1, 8(sp)
-	sd	s2, 16(sp)
-	sd	s3, 24(sp)
-	sd	s4, 32(sp)
-	sd	s5, 40(sp)
-	sd	s6, 48(sp)
-	sd	s7, 56(sp)
-	sd	s8, 64(sp)
-	sd	t1, 72(sp)
-	sd	gp, 80(sp)
-	sd	ra, 88(sp)
-
-	flush_l1_dcache
-
-	/* Use register number to work in o32 and n32 */
-	li	$9, ((CPU_BLOCKID_MAP << 8) | MAP_THREADMODE)
-	move	$8, a0
-	sync
-	MTCR(8, 9)
-	mfc0	t0, MIPS_COP_0_PRID, 1
-	andi	t0, 0x3
-	beqz	t0, 2f
-	nop
-	dla	t1, mpentry	/* child thread, go to hardware init */
-	jr	t1
-	nop
-
-
-2:	/*
-	 * Parent hardware thread, restore registers, return
-	 */
-#if 1
-	/*
-	 * A0 Errata - Write MMU_SETUP after changing thread mode register.
-	 */
-	li	$9, 0x400
-	li	$8, 0
-	MTCR(8, 9)
-	sll	zero,3		/* ehb */
-#endif
-	dmfc0	t0, $4, 2	/* SP saved in UserLocal */
-	ori	sp, t0, 0x7
-	xori	sp, sp, 0x7	/* align 64 bit */
-	addiu	sp, sp, -128
-	ld	s0, 0(sp)
-	ld	s1, 8(sp)
-	ld	s2, 16(sp)
-	ld	s3, 24(sp)
-	ld	s4, 32(sp)
-	ld	s5, 40(sp)
-	ld	s6, 48(sp)
-	ld	s7, 56(sp)
-	ld	s8, 64(sp)
-	ld	t1, 72(sp)
-	ld	gp, 80(sp)
-	ld	ra, 88(sp)
-	mfc0	t1, MIPS_COP_0_STATUS
-
-	move	sp, t0		/* Restore the real SP */
-	jr.hb	ra
-	nop
-END(xlp_enable_threads)
-#endif
diff --git a/sys/mips/nlm/msgring.h b/sys/mips/nlm/msgring.h
deleted file mode 100644
index deef2215209e..000000000000
--- a/sys/mips/nlm/msgring.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef _NLM_MSGRING_H
-#define	_NLM_MSGRING_H
-#define	CMS_DEFAULT_CREDIT	50
-/*
- * packets are sent to VC 0 of a thread
- * freebacks are sent to VC 3 of a thread
- */
-#define	XLPGE_RX_VC		0
-#define	XLPGE_FB_VC		3
-
-extern uint32_t xlp_msg_thread_mask;
-
-struct nlm_fmn_msg;
-typedef void (*msgring_handler)(int, int, int, int, struct nlm_fmn_msg *, void *);
-
-int register_msgring_handler(int startb, int endb, msgring_handler action,
-		                    void *arg);
-int xlp_handle_msg_vc(u_int vcmask, int max_msgs);
-void xlp_msgring_cpu_init(int, int, int);
-void xlp_cms_enable_intr(int , int , int , int);
-#endif /* _NLM_MSGRING_H */
diff --git a/sys/mips/nlm/std.xlp b/sys/mips/nlm/std.xlp
deleted file mode 100644
index cef006ba692e..000000000000
--- a/sys/mips/nlm/std.xlp
+++ /dev/null
@@ -1,7 +0,0 @@
-# $FreeBSD$
-files	"../nlm/files.xlp"
-cpu	CPU_NLM
-
-# Devices needed always
-device		uart
-device		pci
diff --git a/sys/mips/nlm/tick.c b/sys/mips/nlm/tick.c
deleted file mode 100644
index c80567b7187b..000000000000
--- a/sys/mips/nlm/tick.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-/*
- * Simple driver for the 32-bit interval counter built in to all
- * MIPS32 CPUs.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/power.h>
-#include <sys/smp.h>
-#include <sys/time.h>
-#include <sys/timeet.h>
-#include <sys/timetc.h>
-
-#include <machine/hwfunc.h>
-#include <machine/clock.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/intr_machdep.h>
-
-#include <mips/nlm/interrupt.h>
-
-uint64_t counter_freq;
-
-struct timecounter *platform_timecounter;
-
-DPCPU_DEFINE_STATIC(uint32_t, cycles_per_tick);
-static uint32_t cycles_per_usec;
-
-DPCPU_DEFINE_STATIC(volatile uint32_t, counter_upper);
-DPCPU_DEFINE_STATIC(volatile uint32_t, counter_lower_last);
-DPCPU_DEFINE_STATIC(uint32_t, compare_ticks);
-DPCPU_DEFINE_STATIC(uint32_t, lost_ticks);
-
-struct clock_softc {
-	int intr_rid;
-	struct resource *intr_res;
-	void *intr_handler;
-	struct timecounter tc;
-	struct eventtimer et;
-};
-static struct clock_softc *softc;
-
-/*
- * Device methods
- */
-static int clock_probe(device_t);
-static void clock_identify(driver_t *, device_t);
-static int clock_attach(device_t);
-static unsigned counter_get_timecount(struct timecounter *tc);
-
-void
-mips_timer_early_init(uint64_t clock_hz)
-{
-	/* Initialize clock early so that we can use DELAY sooner */
-	counter_freq = clock_hz;
-	cycles_per_usec = (clock_hz / (1000 * 1000));
-}
-
-void
-platform_initclocks(void)
-{
-
-	if (platform_timecounter != NULL)
-		tc_init(platform_timecounter);
-}
-
-static uint64_t
-tick_ticker(void)
-{
-	uint64_t ret;
-	uint32_t ticktock;
-	uint32_t t_lower_last, t_upper;
-
-	/*
-	 * Disable preemption because we are working with cpu specific data.
-	 */
-	critical_enter();
-
-	/*
-	 * Note that even though preemption is disabled, interrupts are
-	 * still enabled. In particular there is a race with clock_intr()
-	 * reading the values of 'counter_upper' and 'counter_lower_last'.
-	 *
-	 * XXX this depends on clock_intr() being executed periodically
-	 * so that 'counter_upper' and 'counter_lower_last' are not stale.
-	 */
-	do {
-		t_upper = DPCPU_GET(counter_upper);
-		t_lower_last = DPCPU_GET(counter_lower_last);
-	} while (t_upper != DPCPU_GET(counter_upper));
-
-	ticktock = mips_rd_count();
-
-	critical_exit();
-
-	/* COUNT register wrapped around */
-	if (ticktock < t_lower_last)
-		t_upper++;
-
-	ret = ((uint64_t)t_upper << 32) | ticktock;
-	return (ret);
-}
-
-void
-mips_timer_init_params(uint64_t platform_counter_freq, int double_count)
-{
-
-	/*
-	 * XXX: Do not use printf here: uart code 8250 may use DELAY so this
-	 * function should  be called before cninit.
-	 */
-	counter_freq = platform_counter_freq;
-	/*
-	 * XXX: Some MIPS32 cores update the Count register only every two
-	 * pipeline cycles.
-	 * We know this because of status registers in CP0, make it automatic.
-	 */
-	if (double_count != 0)
-		counter_freq /= 2;
-
-	cycles_per_usec = counter_freq / (1 * 1000 * 1000);
-	set_cputicker(tick_ticker, counter_freq, 1);
-}
-
-static int
-sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS)
-{
-	int error;
-	uint64_t freq;
-
-	if (softc == NULL)
-		return (EOPNOTSUPP);
-	freq = counter_freq;
-	error = sysctl_handle_64(oidp, &freq, sizeof(freq), req);
-	if (error == 0 && req->newptr != NULL) {
-		counter_freq = freq;
-		softc->et.et_frequency = counter_freq;
-		softc->tc.tc_frequency = counter_freq;
-	}
-	return (error);
-}
-
-SYSCTL_PROC(_machdep, OID_AUTO, counter_freq,
-    CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, NULL, 0,
-    sysctl_machdep_counter_freq, "QU",
-    "Timecounter frequency in Hz");
-
-static unsigned
-counter_get_timecount(struct timecounter *tc)
-{
-
-	return (mips_rd_count());
-}
-
-/*
- * Wait for about n microseconds (at least!).
- */
-void
-DELAY(int n)
-{
-	uint32_t cur, last, delta, usecs;
-
-	TSENTER();
-	/*
-	 * This works by polling the timer and counting the number of
-	 * microseconds that go by.
-	 */
-	last = mips_rd_count();
-	delta = usecs = 0;
-
-	while (n > usecs) {
-		cur = mips_rd_count();
-
-		/* Check to see if the timer has wrapped around. */
-		if (cur < last)
-			delta += cur + (0xffffffff - last) + 1;
-		else
-			delta += cur - last;
-
-		last = cur;
-
-		if (delta >= cycles_per_usec) {
-			usecs += delta / cycles_per_usec;
-			delta %= cycles_per_usec;
-		}
-	}
-	TSEXIT();
-}
-
-static int
-clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
-{
-	uint32_t fdiv, div, next;
-
-	if (period != 0)
-		div = (et->et_frequency * period) >> 32;
-	else
-		div = 0;
-	if (first != 0)
-		fdiv = (et->et_frequency * first) >> 32;
-	else
-		fdiv = div;
-	DPCPU_SET(cycles_per_tick, div);
-	next = mips_rd_count() + fdiv;
-	DPCPU_SET(compare_ticks, next);
-	mips_wr_compare(next);
-	return (0);
-}
-
-static int
-clock_stop(struct eventtimer *et)
-{
-
-	DPCPU_SET(cycles_per_tick, 0);
-	mips_wr_compare(0xffffffff);
-	return (0);
-}
-
-/*
- * Device section of file below
- */
-static int
-clock_intr(void *arg)
-{
-	struct clock_softc *sc = (struct clock_softc *)arg;
-	uint32_t cycles_per_tick;
-	uint32_t count, compare_last, compare_next, lost_ticks;
-
-	cycles_per_tick = DPCPU_GET(cycles_per_tick);
-	/*
-	 * Set next clock edge.
-	 */
-	count = mips_rd_count();
-	compare_last = DPCPU_GET(compare_ticks);
-	if (cycles_per_tick > 0) {
-		compare_next = count + cycles_per_tick;
-		DPCPU_SET(compare_ticks, compare_next);
-		mips_wr_compare(compare_next);
-	} else	/* In one-shot mode timer should be stopped after the event. */
-		mips_wr_compare(0xffffffff);
-
-	/* COUNT register wrapped around */
-	if (count < DPCPU_GET(counter_lower_last)) {
-		DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1);
-	}
-	DPCPU_SET(counter_lower_last, count);
-
-	if (cycles_per_tick > 0) {
-		/*
-		 * Account for the "lost time" between when the timer interrupt
-		 * fired and when 'clock_intr' actually started executing.
-		 */
-		lost_ticks = DPCPU_GET(lost_ticks);
-		lost_ticks += count - compare_last;
-
-		/*
-		 * If the COUNT and COMPARE registers are no longer in sync
-		 * then make up some reasonable value for the 'lost_ticks'.
-		 *
-		 * This could happen, for e.g., after we resume normal
-		 * operations after exiting the debugger.
-		 */
-		if (lost_ticks > 2 * cycles_per_tick)
-			lost_ticks = cycles_per_tick;
-
-		while (lost_ticks >= cycles_per_tick) {
-			if (sc->et.et_active)
-				sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-			lost_ticks -= cycles_per_tick;
-		}
-		DPCPU_SET(lost_ticks, lost_ticks);
-	}
-	if (sc->et.et_active)
-		sc->et.et_event_cb(&sc->et, sc->et.et_arg);
-	return (FILTER_HANDLED);
-}
-
-static int
-clock_probe(device_t dev)
-{
-
-	device_set_desc(dev, "Generic MIPS32 ticker");
-	return (BUS_PROBE_NOWILDCARD);
-}
-
-static void
-clock_identify(driver_t * drv, device_t parent)
-{
-
-	BUS_ADD_CHILD(parent, 0, "clock", 0);
-}
-
-static int
-clock_attach(device_t dev)
-{
-	struct clock_softc *sc;
-
-	if (device_get_unit(dev) != 0)
-		panic("can't attach more clocks");
-
-	softc = sc = device_get_softc(dev);
-	cpu_establish_hardintr("compare", clock_intr, NULL,
-	    sc, IRQ_TIMER, INTR_TYPE_CLK, &sc->intr_handler);
-
-	sc->tc.tc_get_timecount = counter_get_timecount;
-	sc->tc.tc_counter_mask = 0xffffffff;
-	sc->tc.tc_frequency = counter_freq;
-	sc->tc.tc_name = "MIPS32";
-	sc->tc.tc_quality = 800;
-	sc->tc.tc_priv = sc;
-	tc_init(&sc->tc);
-	sc->et.et_name = "MIPS32";
-#if 0
-	sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
-	    ET_FLAGS_PERCPU;
-#endif
-	sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_PERCPU;
-	sc->et.et_quality = 800;
-	sc->et.et_frequency = counter_freq;
-	sc->et.et_min_period = 0x00004000LLU; /* To be safe. */
-	sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
-	sc->et.et_start = clock_start;
-	sc->et.et_stop = clock_stop;
-	sc->et.et_priv = sc;
-	et_register(&sc->et);
-	return (0);
-}
-
-static device_method_t clock_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, clock_probe),
-	DEVMETHOD(device_identify, clock_identify),
-	DEVMETHOD(device_attach, clock_attach),
-	DEVMETHOD(device_detach, bus_generic_detach),
-	DEVMETHOD(device_shutdown, bus_generic_shutdown),
-	{0, 0}
-};
-
-static driver_t clock_driver = {
-	"clock",
-	clock_methods,
-	sizeof(struct clock_softc),
-};
-
-static devclass_t clock_devclass;
-
-DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0);
diff --git a/sys/mips/nlm/uart_cpu_xlp.c b/sys/mips/nlm/uart_cpu_xlp.c
deleted file mode 100644
index 773cf28a76ae..000000000000
--- a/sys/mips/nlm/uart_cpu_xlp.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-/*
- * Skeleton of this file was based on respective code for ARM
- * code written by Olivier Houchard.
- */
-/*
- * XLRMIPS: This file is hacked from arm/...
- */
-#include "opt_platform.h"
-
-#ifndef	FDT			/* use FDT uart when fdt is enable */
-#include "opt_uart.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/uart.h>
-
-#include <mips/nlm/board.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
-	return (b1->bsh == b2->bsh && b1->bst == b2->bst);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
-	di->ops = uart_getops(&uart_ns8250_class);
-	di->bas.chan = 0;
-	di->bas.bst = rmi_uart_bus_space;
-	di->bas.bsh = nlm_get_uart_regbase(0, BOARD_CONSOLE_UART);
-
-	di->bas.regshft = 2;
-	/* divisor = rclk / (baudrate * 16); */
-	di->bas.rclk = XLP_IO_CLK;
-	di->baudrate = BOARD_CONSOLE_SPEED;
-	di->databits = 8;
-	di->stopbits = 1;
-	di->parity = UART_PARITY_NONE;
-
-	uart_bus_space_io = NULL;
-	uart_bus_space_mem = rmi_uart_bus_space;
-	return (0);
-}
-#endif
diff --git a/sys/mips/nlm/usb_init.c b/sys/mips/nlm/usb_init.c
deleted file mode 100644
index 4c389e9f88be..000000000000
--- a/sys/mips/nlm/usb_init.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/param.h>
-#include <sys/kernel.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/usb.h>
-
-#include <mips/nlm/xlp.h>
-
-static void
-nlm_usb_intr_en(int node, int port)
-{
-	uint32_t val;
-	uint64_t port_addr;
-
-	port_addr = nlm_get_usb_regbase(node, port);
-	val = nlm_read_usb_reg(port_addr, USB_INT_EN);
-	val = USB_CTRL_INTERRUPT_EN  | USB_OHCI_INTERRUPT_EN |
-		USB_OHCI_INTERRUPT1_EN | USB_OHCI_INTERRUPT2_EN;
-        nlm_write_usb_reg(port_addr, USB_INT_EN, val);
-}
-
-static void
-nlm_usb_hw_reset(int node, int port)
-{
-	uint64_t port_addr;
-	uint32_t val;
-
-	/* reset USB phy */
-	port_addr = nlm_get_usb_regbase(node, port);
-	val = nlm_read_usb_reg(port_addr, USB_PHY_0);
-	val &= ~(USB_PHY_RESET | USB_PHY_PORT_RESET_0 | USB_PHY_PORT_RESET_1);
-	nlm_write_usb_reg(port_addr, USB_PHY_0, val);
-
-	DELAY(100);
-	val = nlm_read_usb_reg(port_addr, USB_CTL_0);
-	val &= ~(USB_CONTROLLER_RESET);
-	val |= 0x4;
-	nlm_write_usb_reg(port_addr, USB_CTL_0, val);
-}
-
-static void
-nlm_usb_init(void)
-{
-	/* XXX: should be checking if these are in Device mode here */
-	printf("Initialize USB Interface\n");
-	nlm_usb_hw_reset(0, 0);
-	nlm_usb_hw_reset(0, 3);
-
-	/* Enable PHY interrupts */
-	nlm_usb_intr_en(0, 0);
-	nlm_usb_intr_en(0, 3);
-}
-
-SYSINIT(nlm_usb_init, SI_SUB_CPU, SI_ORDER_MIDDLE,
-    nlm_usb_init, NULL);
diff --git a/sys/mips/nlm/xlp.h b/sys/mips/nlm/xlp.h
deleted file mode 100644
index 2ace3112fbe9..000000000000
--- a/sys/mips/nlm/xlp.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD
- * $FreeBSD$
- */
-
-#ifndef __NLM_XLP_H__
-#define __NLM_XLP_H__
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/iomap.h>
-
-/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
-#define	CHIP_PROCESSOR_ID_XLP_8XX		0x10
-#define	CHIP_PROCESSOR_ID_XLP_3XX		0x11
-#define	CHIP_PROCESSOR_ID_XLP_416		0x94
-#define	CHIP_PROCESSOR_ID_XLP_432		0x14
-
-/* Revision id's */
-#define	XLP_REVISION_A0				0x00
-#define	XLP_REVISION_A1				0x01
-#define	XLP_REVISION_A2				0x02
-#define	XLP_REVISION_B0				0x03
-#define	XLP_REVISION_B1				0x04
-
-#ifndef LOCORE
-/*
- * FreeBSD can be started with few threads and cores turned off,
- * so have a hardware thread id to FreeBSD cpuid mapping.
- */
-extern int xlp_ncores;
-extern int xlp_threads_per_core;
-extern uint32_t xlp_hw_thread_mask;
-extern int xlp_cpuid_to_hwtid[];
-extern int xlp_hwtid_to_cpuid[];
-#ifdef SMP
-extern void xlp_enable_threads(int code);
-#endif
-uint32_t xlp_get_cpu_frequency(int node, int core);
-int nlm_set_device_frequency(int node, int devtype, int frequency);
-int xlp_irq_to_irt(int irq);
-
-static __inline int nlm_processor_id(void)
-{
-	return ((mips_rd_prid() >> 8) & 0xff);
-}
-
-static __inline int nlm_is_xlp3xx(void)
-{
-
-	return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX);
-}
-
-static __inline int nlm_is_xlp3xx_ax(void)
-{
-	uint32_t procid = mips_rd_prid();
-	int prid = (procid >> 8) & 0xff;
-	int rev = procid & 0xff;
-
-	return (prid == CHIP_PROCESSOR_ID_XLP_3XX &&
-		rev < XLP_REVISION_B0);
-}
-
-static __inline int nlm_is_xlp4xx(void)
-{
-	int prid = nlm_processor_id();
-
-	return (prid == CHIP_PROCESSOR_ID_XLP_432 ||
-	    prid == CHIP_PROCESSOR_ID_XLP_416);
-}
-
-static __inline int nlm_is_xlp8xx(void)
-{
-	int prid = nlm_processor_id();
-
-	return (prid == CHIP_PROCESSOR_ID_XLP_8XX ||
-	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
-	    prid == CHIP_PROCESSOR_ID_XLP_416);
-}
-
-static __inline int nlm_is_xlp8xx_ax(void)
-{
-	uint32_t procid = mips_rd_prid();
-	int prid = (procid >> 8) & 0xff;
-	int rev = procid & 0xff;
-
-	return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
-	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
-	    prid == CHIP_PROCESSOR_ID_XLP_416) &&
-	    (rev < XLP_REVISION_B0));
-}
-
-static __inline int nlm_is_xlp8xx_b0(void)
-{
-	uint32_t procid = mips_rd_prid();
-	int prid = (procid >> 8) & 0xff;
-	int rev = procid & 0xff;
-
-	return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
-	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
-	    prid == CHIP_PROCESSOR_ID_XLP_416) &&
-		rev == XLP_REVISION_B0);
-}
-
-static __inline int xlp_socdev_irt(uint32_t offset)
-{
-	uint64_t base;
-
-	base = nlm_pcicfg_base(offset);
-	return (nlm_irtstart(base));
-}
-#endif /* LOCORE */
-#endif /* __NLM_XLP_H__ */
diff --git a/sys/mips/nlm/xlp_machdep.c b/sys/mips/nlm/xlp_machdep.c
deleted file mode 100644
index 14022df2bd51..000000000000
--- a/sys/mips/nlm/xlp_machdep.c
+++ /dev/null
@@ -1,717 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
- * reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * NETLOGIC_BSD */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-#include "opt_platform.h"
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/rtprio.h>
-#include <sys/systm.h>
-#include <sys/interrupt.h>
-#include <sys/limits.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/random.h>
-
-#include <sys/cons.h>		/* cinit() */
-#include <sys/kdb.h>
-#include <sys/boot.h>
-#include <sys/reboot.h>
-#include <sys/queue.h>
-#include <sys/smp.h>
-#include <sys/timetc.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuinfo.h>
-#include <machine/tlb.h>
-#include <machine/cpuregs.h>
-#include <machine/frame.h>
-#include <machine/hwfunc.h>
-#include <machine/md_var.h>
-#include <machine/asm.h>
-#include <machine/pmap.h>
-#include <machine/trap.h>
-#include <machine/clock.h>
-#include <machine/fls64.h>
-#include <machine/intr_machdep.h>
-#include <machine/smp.h>
-
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/sys.h>
-#include <mips/nlm/hal/pic.h>
-#include <mips/nlm/hal/uart.h>
-#include <mips/nlm/hal/mmu.h>
-#include <mips/nlm/hal/bridge.h>
-#include <mips/nlm/hal/cpucontrol.h>
-#include <mips/nlm/hal/cop2.h>
-
-#include <mips/nlm/clock.h>
-#include <mips/nlm/interrupt.h>
-#include <mips/nlm/board.h>
-#include <mips/nlm/xlp.h>
-#include <mips/nlm/msgring.h>
-
-#ifdef FDT
-#include <dev/fdt/fdt_common.h>
-#include <dev/ofw/openfirm.h>
-#endif
-
-/* 4KB static data aread to keep a copy of the bootload env until
-   the dynamic kenv is setup */
-char boot1_env[4096];
-
-uint64_t xlp_cpu_frequency;
-uint64_t xlp_io_base = MIPS_PHYS_TO_DIRECT_UNCACHED(XLP_DEFAULT_IO_BASE);
-
-int xlp_ncores;
-int xlp_threads_per_core;
-uint32_t xlp_hw_thread_mask;
-int xlp_cpuid_to_hwtid[MAXCPU];
-int xlp_hwtid_to_cpuid[MAXCPU];
-uint64_t xlp_pic_base;
-
-static int xlp_mmuval;
-
-extern uint32_t _end;
-extern char XLPResetEntry[], XLPResetEntryEnd[];
-
-static void
-xlp_setup_core(void)
-{
-	uint64_t reg;
-
-	reg = nlm_mfcr(LSU_DEFEATURE);
-	/* Enable Unaligned and L2HPE */
-	reg |= (1 << 30) | (1 << 23);
-	/*
-	 * Experimental : Enable SUE
-	 * Speculative Unmap Enable. Enable speculative L2 cache request for
-	 * unmapped access.
-	 */
-	reg |= (1ull << 31);
-	/* Clear S1RCM  - A0 errata */
-	reg &= ~0xeull;
-	nlm_mtcr(LSU_DEFEATURE, reg);
-
-	reg = nlm_mfcr(SCHED_DEFEATURE);
-	/* Experimental: Disable BRU accepting ALU ops - A0 errata */
-	reg |= (1 << 24);
-	nlm_mtcr(SCHED_DEFEATURE, reg);
-}
-
-static void
-xlp_setup_mmu(void)
-{
-	uint32_t pagegrain;
-
-	if (nlm_threadid() == 0) {
-		nlm_setup_extended_pagemask(0);
-		nlm_large_variable_tlb_en(1);
-		nlm_extended_tlb_en(1);
-		nlm_mmu_setup(0, 0, 0);
-	}
-
-	/* Enable no-read, no-exec, large-physical-address */
-	pagegrain = mips_rd_pagegrain();
-	pagegrain |= (1U << 31)	|	/* RIE */
-	    (1 << 30)		|	/* XIE */
-	    (1 << 29);			/* ELPA */
-	mips_wr_pagegrain(pagegrain);
-}
-
-static void
-xlp_enable_blocks(void)
-{
-	uint64_t sysbase;
-	int i;
-
-	for (i = 0; i < XLP_MAX_NODES; i++) {
-		if (!nlm_dev_exists(XLP_IO_SYS_OFFSET(i)))
-			continue;
-		sysbase = nlm_get_sys_regbase(i);
-		nlm_sys_enable_block(sysbase, DFS_DEVICE_RSA);
-	}
-}
-
-static void
-xlp_parse_mmu_options(void)
-{
-	uint64_t sysbase;
-	uint32_t cpu_map = xlp_hw_thread_mask;
-	uint32_t core0_thr_mask, core_thr_mask, cpu_rst_mask;
-	int i, j, k;
-
-#ifdef SMP
-	if (cpu_map == 0)
-		cpu_map = 0xffffffff;
-#else /* Uniprocessor! */
-	if (cpu_map == 0)
-		cpu_map = 0x1;
-	else if (cpu_map != 0x1) {
-		printf("WARNING: Starting uniprocessor kernel on cpumask [0x%lx]!\n"
-		    "WARNING: Other CPUs will be unused.\n", (u_long)cpu_map);
-		cpu_map = 0x1;
-	}
-#endif
-
-	xlp_ncores = 1;
-	core0_thr_mask = cpu_map & 0xf;
-	switch (core0_thr_mask) {
-	case 1:
-		xlp_threads_per_core = 1;
-		xlp_mmuval = 0;
-		break;
-	case 3:
-		xlp_threads_per_core = 2;
-		xlp_mmuval = 2;
-		break;
-	case 0xf:
-		xlp_threads_per_core = 4;
-		xlp_mmuval = 3;
-		break;
-	default:
-		goto unsupp;
-	}
-
-	/* Try to find the enabled cores from SYS block */
-	sysbase = nlm_get_sys_regbase(0);
-	cpu_rst_mask = nlm_read_sys_reg(sysbase, SYS_CPU_RESET) & 0xff;
-
-	/* XLP 416 does not report this correctly, fix */
-	if (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_416)
-		cpu_rst_mask = 0xe;
-
-	/* Take out cores which do not exist on chip */
-	for (i = 1; i < XLP_MAX_CORES; i++) {
-		if ((cpu_rst_mask & (1 << i)) == 0)
-			cpu_map &= ~(0xfu << (4 * i));
-	}
-
-	/* Verify other cores' CPU masks */
-	for (i = 1; i < XLP_MAX_CORES; i++) {
-		core_thr_mask = (cpu_map >> (4 * i)) & 0xf;
-		if (core_thr_mask == 0)
-			continue;
-		if (core_thr_mask != core0_thr_mask)
-			goto unsupp;
-		xlp_ncores++;
-	}
-
-	xlp_hw_thread_mask = cpu_map;
-	/* setup hardware processor id to cpu id mapping */
-	for (i = 0; i< MAXCPU; i++)
-		xlp_cpuid_to_hwtid[i] =
-		    xlp_hwtid_to_cpuid[i] = -1;
-	for (i = 0, k = 0; i < XLP_MAX_CORES; i++) {
-		if (((cpu_map >> (i * 4)) & 0xf) == 0)
-			continue;
-		for (j = 0; j < xlp_threads_per_core; j++) {
-			xlp_cpuid_to_hwtid[k] = i * 4 + j;
-			xlp_hwtid_to_cpuid[i * 4 + j] = k;
-			k++;
-		}
-	}
-
-	return;
-
-unsupp:
-	printf("ERROR : Unsupported CPU mask [use 1,2 or 4 threads per core].\n"
-	    "\tcore0 thread mask [%lx], boot cpu mask [%lx].\n",
-	    (u_long)core0_thr_mask, (u_long)cpu_map);
-	panic("Invalid CPU mask - halting.\n");
-	return;
-}
-
-#ifdef FDT
-static void
-xlp_bootargs_init(__register_t arg)
-{
-	char	buf[2048]; /* early stack is big enough */
-	void	*dtbp;
-	phandle_t chosen;
-	ihandle_t mask;
-
-	dtbp = (void *)(intptr_t)arg;
-#if defined(FDT_DTB_STATIC)
-	/*
-	 * In case the device tree blob was not passed as argument try
-	 * to use the statically embedded one.
-	 */
-	if (dtbp == NULL)
-		dtbp = &fdt_static_dtb;
-#endif
-	if (OF_install(OFW_FDT, 0) == FALSE)
-		while (1);
-	if (OF_init((void *)dtbp) != 0)
-		while (1);
-	OF_interpret("perform-fixup", 0);
-
-	chosen = OF_finddevice("/chosen");
-	if (OF_getprop(chosen, "cpumask", &mask, sizeof(mask)) != -1) {
-		xlp_hw_thread_mask = mask;
-	}
-
-	if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
-		boothowto |= boot_parse_cmdline(buf);
-}
-#else
-/*
- * arg is a pointer to the environment block, the format of the block is
- * a=xyz\0b=pqr\0\0
- */
-static void
-xlp_bootargs_init(__register_t arg)
-{
-	char	buf[2048]; /* early stack is big enough */
-	char	*p, *v, *n;
-	uint32_t mask;
-
-	/*
-	 * provide backward compat for passing cpu mask as arg
-	 */
-	if (arg & 1) {
-		xlp_hw_thread_mask = arg;
-		return;
-	}
-
-	p = (void *)(intptr_t)arg;
-	while (*p != '\0') {
-		strlcpy(buf, p, sizeof(buf));
-		v = buf;
-		n = strsep(&v, "=");
-		if (v == NULL)
-			kern_setenv(n, "1");
-		else
-			kern_setenv(n, v);
-		p += strlen(p) + 1;
-	}
-
-	/* CPU mask can be passed thru env */
-	if (getenv_uint("cpumask", &mask) != 0)
-		xlp_hw_thread_mask = mask;
-
-	/* command line argument */
-	v = kern_getenv("bootargs");
-	if (v != NULL) {
-		strlcpy(buf, v, sizeof(buf));
-		boothowto |= boot_parse_cmdline(buf);
-		freeenv(v);
-	}
-}
-#endif
-
-static void
-mips_init(void)
-{
-	init_param1();
-	init_param2(physmem);
-
-	mips_cpu_init();
-	cpuinfo.cache_coherent_dma = TRUE;
-	pmap_bootstrap();
-	mips_proc0_init();
-	mutex_init();
-#ifdef DDB
-	kdb_init();
-	if (boothowto & RB_KDB) {
-		kdb_enter("Boot flags requested debugger", NULL);
-	}
-#endif
-}
-
-unsigned int
-platform_get_timecount(struct timecounter *tc __unused)
-{
-	uint64_t count = nlm_pic_read_timer(xlp_pic_base, PIC_CLOCK_TIMER);
-
-	return (unsigned int)~count;
-}
-
-static void
-xlp_pic_init(void)
-{
-	struct timecounter pic_timecounter = {
-		platform_get_timecount, /* get_timecount */
-		0,                      /* no poll_pps */
-		~0U,                    /* counter_mask */
-		XLP_IO_CLK,            /* frequency */
-		"XLRPIC",               /* name */
-		2000,                   /* quality (adjusted in code) */
-	};
-        int i;
-	int maxirt;
-
-	xlp_pic_base = nlm_get_pic_regbase(0);  /* TOOD: Add other nodes */
-	maxirt = nlm_read_reg(nlm_get_pic_pcibase(nlm_nodeid()),
-	    XLP_PCI_DEVINFO_REG0);
-        printf("Initializing PIC...@%jx %d IRTs\n", (uintmax_t)xlp_pic_base,
-	    maxirt);
-	/* Bind all PIC irqs to cpu 0 */
-        for (i = 0; i < maxirt; i++)
-	    nlm_pic_write_irt(xlp_pic_base, i, 0, 0, 1, 0,
-	    1, 0, 0x1);
-
-	nlm_pic_set_timer(xlp_pic_base, PIC_CLOCK_TIMER, ~0ULL, 0, 0);
-	platform_timecounter = &pic_timecounter;
-}
-
-#if defined(__mips_n32) || defined(__mips_n64) /* PHYSADDR_64_BIT */
-#ifdef XLP_SIM
-#define	XLP_MEM_LIM	0x200000000ULL
-#else
-#define	XLP_MEM_LIM	0x10000000000ULL
-#endif
-#else
-#define	XLP_MEM_LIM	0xfffff000UL
-#endif
-static vm_paddr_t xlp_mem_excl[] = {
-	0,          0,		/* for kernel image region, see xlp_mem_init */
-	0x0c000000, 0x14000000,	/* uboot area, cms queue and other stuff */
-	0x1fc00000, 0x1fd00000,	/* reset vec */
-	0x1e000000, 0x1e200000,	/* poe buffers */
-};
-
-static int
-mem_exclude_add(vm_paddr_t *avail, vm_paddr_t mstart, vm_paddr_t mend)
-{
-	int i, pos;
-
-	pos = 0;
-	for (i = 0; i < nitems(xlp_mem_excl); i += 2) {
-		if (mstart > xlp_mem_excl[i + 1])
-			continue;
-		if (mstart < xlp_mem_excl[i]) {
-			avail[pos++] = mstart;
-			if (mend < xlp_mem_excl[i])
-				avail[pos++] = mend;
-			else
-				avail[pos++] = xlp_mem_excl[i];
-		}
-		mstart = xlp_mem_excl[i + 1];
-		if (mend <= mstart)
-			break;
-	}
-	if (mstart < mend) {
-		avail[pos++] = mstart;
-		avail[pos++] = mend;
-	}
-	return (pos);
-}
-
-static void
-xlp_mem_init(void)
-{
-	vm_paddr_t physsz, tmp;
-	uint64_t bridgebase, base, lim, val;
-	int i, j, k, n;
-
-	/* update kernel image area in exclude regions */
-	tmp = (vm_paddr_t)MIPS_KSEG0_TO_PHYS(&_end);
-	tmp = round_page(tmp) + 0x20000; /* round up */
-	xlp_mem_excl[1] = tmp;
-
-	printf("Memory (from DRAM BARs):\n");
-	bridgebase = nlm_get_bridge_regbase(0); /* TODO: Add other nodes */
-	physsz = 0;
-        for (i = 0, j = 0; i < 8; i++) {
-		val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_BAR(i));
-                val = (val >>  12) & 0xfffff;
-		base = val << 20;
-		val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_LIMIT(i));
-                val = (val >>  12) & 0xfffff;
-		if (val == 0)	/* BAR not enabled */
-			continue;
-                lim = (val + 1) << 20;
-		printf("  BAR %d: %#jx - %#jx : ", i, (intmax_t)base,
-		    (intmax_t)lim);
-
-		if (lim <= base) {
-			printf("\tskipped - malformed %#jx -> %#jx\n",
-			    (intmax_t)base, (intmax_t)lim);
-			continue;
-		} else if (base >= XLP_MEM_LIM) {
-			printf(" skipped - outside usable limit %#jx.\n",
-			    (intmax_t)XLP_MEM_LIM);
-			continue;
-		} else if (lim >= XLP_MEM_LIM) {
-			lim = XLP_MEM_LIM;
-			printf(" truncated to %#jx.\n", (intmax_t)XLP_MEM_LIM);
-		} else
-			printf(" usable\n");
-
-		/* exclude unusable regions from BAR and add rest */
-		n = mem_exclude_add(&phys_avail[j], base, lim);
-		for (k = j; k < j + n; k += 2) {
-			physsz += phys_avail[k + 1] - phys_avail[k];
-			printf("\tMem[%d]: %#jx - %#jx\n", k/2,
-			    (intmax_t)phys_avail[k], (intmax_t)phys_avail[k+1]);
-		}
-		j = k;
-        }
-
-	/* setup final entry with 0 */
-	phys_avail[j] = phys_avail[j + 1] = 0;
-
-	/* copy phys_avail to dump_avail */
-	for (i = 0; i <= j + 1; i++)
-		dump_avail[i] = phys_avail[i];
-
-	realmem = physmem = btoc(physsz);
-}
-
-void
-platform_start(__register_t a0 __unused,
-    __register_t a1 __unused,
-    __register_t a2 __unused,
-    __register_t a3 __unused)
-{
-
-	/* Initialize pcpu stuff */
-	mips_pcpu0_init();
-
-	/* initialize console so that we have printf */
-	boothowto |= (RB_SERIAL | RB_MULTIPLE);	/* Use multiple consoles */
-
-	init_static_kenv(boot1_env, sizeof(boot1_env));
-	xlp_bootargs_init(a0);
-
-	/* clockrate used by delay, so initialize it here */
-	xlp_cpu_frequency = xlp_get_cpu_frequency(0, 0);
-	cpu_clock = xlp_cpu_frequency / 1000000;
-	mips_timer_early_init(xlp_cpu_frequency);
-
-	/* Init console please */
-	cninit();
-
-	/* Early core init and fixes for errata */
-	xlp_setup_core();
-
-	xlp_parse_mmu_options();
-	xlp_mem_init();
-
-	bcopy(XLPResetEntry, (void *)MIPS_RESET_EXC_VEC,
-              XLPResetEntryEnd - XLPResetEntry);
-#ifdef SMP
-	/*
-	 * We will enable the other threads in core 0 here
-	 * so that the TLB and cache info is correct when
-	 * mips_init runs
-	 */
-	xlp_enable_threads(xlp_mmuval);
-#endif
-	/* setup for the startup core */
-	xlp_setup_mmu();
-
-	xlp_enable_blocks();
-
-	/* Read/Guess/setup board information */
-	nlm_board_info_setup();
-
-	/* MIPS generic init */
-	mips_init();
-
-	/*
-	 * XLP specific post initialization
-	 * initialize other on chip stuff
-	 */
-	xlp_pic_init();
-
-	mips_timer_init_params(xlp_cpu_frequency, 0);
-}
-
-void
-platform_cpu_init()
-{
-}
-
-void
-platform_reset(void)
-{
-	uint64_t sysbase = nlm_get_sys_regbase(0);
-
-	nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
-	for( ; ; )
-		__asm __volatile("wait");
-}
-
-#ifdef SMP
-/*
- * XLP threads are started simultaneously when we enable threads, this will
- * ensure that the threads are blocked in platform_init_ap, until they are
- * ready to proceed to smp_init_secondary()
- */
-static volatile int thr_unblock[4];
-
-int
-platform_start_ap(int cpuid)
-{
-	uint32_t coremask, val;
-	uint64_t sysbase = nlm_get_sys_regbase(0);
-	int hwtid = xlp_cpuid_to_hwtid[cpuid];
-	int core, thr;
-
-	core = hwtid / 4;
-	thr = hwtid % 4;
-	if (thr == 0) {
-		/* First thread in core, do core wake up */
-		coremask = 1u << core;
-
-		/* Enable core clock */
-		val = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL);
-		val &= ~coremask;
-		nlm_write_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL, val);
-
-		/* Remove CPU Reset */
-		val = nlm_read_sys_reg(sysbase, SYS_CPU_RESET);
-		val &=  ~coremask & 0xff;
-		nlm_write_sys_reg(sysbase, SYS_CPU_RESET, val);
-
-		if (bootverbose)
-			printf("Waking up core %d ...", core);
-
-		/* Poll for CPU to mark itself coherent */
-		do {
-			val = nlm_read_sys_reg(sysbase, SYS_CPU_NONCOHERENT_MODE);
-		} while ((val & coremask) != 0);
-		if (bootverbose)
-			printf("Done\n");
-        } else {
-		/* otherwise release the threads stuck in platform_init_ap */
-		thr_unblock[thr] = 1;
-	}
-
-	return (0);
-}
-
-void
-platform_init_ap(int cpuid)
-{
-	uint32_t stat;
-	int thr;
-
-	/* The first thread has to setup the MMU and enable other threads */
-	thr = nlm_threadid();
-	if (thr == 0) {
-		xlp_setup_core();
-		xlp_enable_threads(xlp_mmuval);
-	} else {
-		/*
-		 * FIXME busy wait here eats too many cycles, especially
-		 * in the core 0 while bootup
-		 */
-		while (thr_unblock[thr] == 0)
-			__asm__ __volatile__ ("nop;nop;nop;nop");
-		thr_unblock[thr] = 0;
-	}
-
-	xlp_setup_mmu();
-	stat = mips_rd_status();
-	KASSERT((stat & MIPS_SR_INT_IE) == 0,
-	    ("Interrupts enabled in %s!", __func__));
-	stat |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT;
-	mips_wr_status(stat);
-
-	nlm_write_c0_eimr(0ull);
-	xlp_enable_irq(IRQ_IPI);
-	xlp_enable_irq(IRQ_TIMER);
-	xlp_enable_irq(IRQ_MSGRING);
-
-	return;
-}
-
-int
-platform_ipi_hardintr_num(void)
-{
-
-	return (IRQ_IPI);
-}
-
-int
-platform_ipi_softintr_num(void)
-{
-
-	return (-1);
-}
-
-void
-platform_ipi_send(int cpuid)
-{
-
-	nlm_pic_send_ipi(xlp_pic_base, xlp_cpuid_to_hwtid[cpuid],
-	    platform_ipi_hardintr_num(), 0);
-}
-
-void
-platform_ipi_clear(void)
-{
-}
-
-int
-platform_processor_id(void)
-{
-
-	return (xlp_hwtid_to_cpuid[nlm_cpuid()]);
-}
-
-void
-platform_cpu_mask(cpuset_t *mask)
-{
-	int i, s;
-
-	CPU_ZERO(mask);
-	s = xlp_ncores * xlp_threads_per_core;
-	for (i = 0; i < s; i++)
-		CPU_SET(i, mask);
-}
-
-struct cpu_group *
-platform_smp_topo()
-{
-
-	return (smp_topo_2level(CG_SHARE_L2, xlp_ncores, CG_SHARE_L1,
-		xlp_threads_per_core, CG_FLAG_THREAD));
-}
-#endif
diff --git a/sys/mips/nlm/xlp_pci.c b/sys/mips/nlm/xlp_pci.c
deleted file mode 100644
index 7e71a334dcb2..000000000000
--- a/sys/mips/nlm/xlp_pci.c
+++ /dev/null
@@ -1,579 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2003-2012 Broadcom Corporation
- * All Rights Reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/types.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/endian.h>
-#include <sys/rman.h>
-#include <sys/pciio.h>
-
-#include <machine/bus.h>
-#include <machine/md_var.h>
-#include <machine/intr_machdep.h>
-#include <machine/cpuregs.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pci_private.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/interrupt.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/pic.h>
-#include <mips/nlm/hal/bridge.h>
-#include <mips/nlm/hal/gbu.h>
-#include <mips/nlm/hal/pcibus.h>
-#include <mips/nlm/hal/uart.h>
-#include <mips/nlm/xlp.h>
-
-#include "pcib_if.h"
-#include <dev/pci/pcib_private.h>
-#include "pci_if.h"
-
-static int
-xlp_pci_attach(device_t dev)
-{
-	struct pci_devinfo *dinfo;
-	device_t pcib;
-	int maxslots, s, f, pcifunchigh, irq;
-	int busno, node, devoffset;
-	uint16_t devid;
-	uint8_t hdrtype;
-
-	/*
-	 * The on-chip devices are on a bus that is almost, but not
-	 * quite, completely like PCI. Add those things by hand.
-	 */
-	pcib = device_get_parent(dev);
-	busno = pcib_get_bus(dev);
-	maxslots = PCIB_MAXSLOTS(pcib);
-	for (s = 0; s <= maxslots; s++) {
-		pcifunchigh = 0;
-		f = 0;
-		hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
-		if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
-			continue;
-		if (hdrtype & PCIM_MFDEV)
-			pcifunchigh = PCI_FUNCMAX;
-		node = s / 8;
-		for (f = 0; f <= pcifunchigh; f++) {
-			devoffset = XLP_HDR_OFFSET(node, 0, s % 8, f);
-			if (!nlm_dev_exists(devoffset))
-				continue;
-
-			/* Find if there is a desc for the SoC device */
-			devid = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_DEVICE, 2);
-
-			/* Skip devices that don't have a proper PCI header */
-			switch (devid) {
-			case PCI_DEVICE_ID_NLM_ICI:
-			case PCI_DEVICE_ID_NLM_PIC:
-			case PCI_DEVICE_ID_NLM_FMN:
-			case PCI_DEVICE_ID_NLM_UART:
-			case PCI_DEVICE_ID_NLM_I2C:
-			case PCI_DEVICE_ID_NLM_NOR:
-			case PCI_DEVICE_ID_NLM_MMC:
-				continue;
-			case PCI_DEVICE_ID_NLM_EHCI:
-				irq = PIC_USB_IRQ(f);
-				PCIB_WRITE_CONFIG(pcib, busno, s, f,
-				    XLP_PCI_DEVSCRATCH_REG0 << 2,
-				    (1 << 8) | irq, 4);
-			}
-			dinfo = pci_read_device(pcib, dev, pcib_get_domain(dev),
-			    busno, s, f);
-			pci_add_child(dev, dinfo);
-		}
-	}
-	return (bus_generic_attach(dev));
-}
-
-static int
-xlp_pci_probe(device_t dev)
-{
-	device_t pcib;
-
-	pcib = device_get_parent(dev);
-	/*
-	 * Only the top level bus has SoC devices, leave the rest to
-	 * Generic PCI code
-	 */
-	if (strcmp(device_get_nameunit(pcib), "pcib0") != 0)
-		return (ENXIO);
-	device_set_desc(dev, "XLP SoCbus");
-	return (BUS_PROBE_DEFAULT);
-}
-
-static devclass_t pci_devclass;
-static device_method_t xlp_pci_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		xlp_pci_probe),
-	DEVMETHOD(device_attach,	xlp_pci_attach),
-	DEVMETHOD(bus_rescan,		bus_null_rescan),
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_1(pci, xlp_pci_driver, xlp_pci_methods, sizeof(struct pci_softc),
-    pci_driver);
-DRIVER_MODULE(xlp_pci, pcib, xlp_pci_driver, pci_devclass, 0, 0);
-
-static int
-xlp_pcib_probe(device_t dev)
-{
-
-	if (ofw_bus_is_compatible(dev, "netlogic,xlp-pci")) {
-		device_set_desc(dev, "XLP PCI bus");
-		return (BUS_PROBE_DEFAULT);
-	}
-	return (ENXIO);
-}
-
-static int
-xlp_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
-
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		*result = 0;
-		return (0);
-	case PCIB_IVAR_BUS:
-		*result = 0;
-		return (0);
-	}
-	return (ENOENT);
-}
-
-static int
-xlp_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
-	switch (which) {
-	case PCIB_IVAR_DOMAIN:
-		return (EINVAL);
-	case PCIB_IVAR_BUS:
-		return (EINVAL);
-	}
-	return (ENOENT);
-}
-
-static int
-xlp_pcib_maxslots(device_t dev)
-{
-
-	return (PCI_SLOTMAX);
-}
-
-static u_int32_t
-xlp_pcib_read_config(device_t dev, u_int b, u_int s, u_int f,
-    u_int reg, int width)
-{
-	uint32_t data = 0;
-	uint64_t cfgaddr;
-	int	regindex = reg/sizeof(uint32_t);
-
-	cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f));
-	if ((width == 2) && (reg & 1))
-		return 0xFFFFFFFF;
-	else if ((width == 4) && (reg & 3))
-		return 0xFFFFFFFF;
-
-	/*
-	 * The intline and int pin of SoC devices are DOA, except
-	 * for bridges (slot %8 == 1).
-	 * use the values we stashed in a writable PCI scratch reg.
-	 */
-	if (b == 0 && regindex == 0xf && s % 8 > 1)
-		regindex = XLP_PCI_DEVSCRATCH_REG0;
-
-	data = nlm_read_pci_reg(cfgaddr, regindex);
-	if (width == 1)
-		return ((data >> ((reg & 3) << 3)) & 0xff);
-	else if (width == 2)
-		return ((data >> ((reg & 3) << 3)) & 0xffff);
-	else
-		return (data);
-}
-
-static void
-xlp_pcib_write_config(device_t dev, u_int b, u_int s, u_int f,
-    u_int reg, u_int32_t val, int width)
-{
-	uint64_t cfgaddr;
-	uint32_t data = 0;
-	int	regindex = reg / sizeof(uint32_t);
-
-	cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f));
-	if ((width == 2) && (reg & 1))
-		return;
-	else if ((width == 4) && (reg & 3))
-		return;
-
-	if (width == 1) {
-		data = nlm_read_pci_reg(cfgaddr, regindex);
-		data = (data & ~(0xff << ((reg & 3) << 3))) |
-		    (val << ((reg & 3) << 3));
-	} else if (width == 2) {
-		data = nlm_read_pci_reg(cfgaddr, regindex);
-		data = (data & ~(0xffff << ((reg & 3) << 3))) |
-		    (val << ((reg & 3) << 3));
-	} else {
-		data = val;
-	}
-
-	/*
-	 * use shadow reg for intpin/intline which are dead
-	 */
-	if (b == 0 && regindex == 0xf && s % 8 > 1)
-		regindex = XLP_PCI_DEVSCRATCH_REG0;
-	nlm_write_pci_reg(cfgaddr, regindex, data);
-}
-
-/*
- * Enable byte swap in hardware when compiled big-endian.
- * Programs a link's PCIe SWAP regions from the link's IO and MEM address
- * ranges.
- */
-static void
-xlp_pcib_hardware_swap_enable(int node, int link)
-{
-#if BYTE_ORDER == BIG_ENDIAN
-	uint64_t bbase, linkpcibase;
-	uint32_t bar;
-	int pcieoffset;
-
-	pcieoffset = XLP_IO_PCIE_OFFSET(node, link);
-	if (!nlm_dev_exists(pcieoffset))
-		return;
-
-	bbase = nlm_get_bridge_regbase(node);
-	linkpcibase = nlm_pcicfg_base(pcieoffset);
-	bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEMEM_BASE0 + link);
-	nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_MEM_BASE, bar);
-
-	bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEMEM_LIMIT0 + link);
-	nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_MEM_LIM, bar | 0xFFF);
-
-	bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEIO_BASE0 + link);
-	nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_IO_BASE, bar);
-
-	bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEIO_LIMIT0 + link);
-	nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_IO_LIM, bar | 0xFFF);
-#endif
-}
-
-static int
-xlp_pcib_attach(device_t dev)
-{
-	int node, link;
-
-	/* enable hardware swap on all nodes/links */
-	for (node = 0; node < XLP_MAX_NODES; node++)
-		for (link = 0; link < 4; link++)
-			xlp_pcib_hardware_swap_enable(node, link);
-
-	device_add_child(dev, "pci", -1);
-	bus_generic_attach(dev);
-	return (0);
-}
-
-/*
- * XLS PCIe can have upto 4 links, and each link has its on IRQ
- * Find the link on which the device is on
- */
-static int
-xlp_pcie_link(device_t pcib, device_t dev)
-{
-	device_t parent, tmp;
-
-	/* find the lane on which the slot is connected to */
-	tmp = dev;
-	while (1) {
-		parent = device_get_parent(tmp);
-		if (parent == NULL || parent == pcib) {
-			device_printf(dev, "Cannot find parent bus\n");
-			return (-1);
-		}
-		if (strcmp(device_get_nameunit(parent), "pci0") == 0)
-			break;
-		tmp = parent;
-	}
-	return (pci_get_function(tmp));
-}
-
-static int
-xlp_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
-{
-	int i, link;
-
-	/*
-	 * Each link has 32 MSIs that can be allocated, but for now
-	 * we only support one device per link.
-	 * msi_alloc() equivalent is needed when we start supporting
-	 * bridges on the PCIe link.
-	 */
-	link = xlp_pcie_link(pcib, dev);
-	if (link == -1)
-		return (ENXIO);
-
-	/*
-	 * encode the irq so that we know it is a MSI interrupt when we
-	 * setup interrupts
-	 */
-	for (i = 0; i < count; i++)
-		irqs[i] = 64 + link * 32 + i;
-
-	return (0);
-}
-
-static int
-xlp_release_msi(device_t pcib, device_t dev, int count, int *irqs)
-{
-	return (0);
-}
-
-static int
-xlp_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
-    uint32_t *data)
-{
-	int link;
-
-	if (irq < 64) {
-		device_printf(dev, "%s: map_msi for irq %d  - ignored",
-		    device_get_nameunit(pcib), irq);
-		return (ENXIO);
-	}
-	link = (irq - 64) / 32;
-	*addr = MIPS_MSI_ADDR(0);
-	*data = MIPS_MSI_DATA(PIC_PCIE_IRQ(link));
-	return (0);
-}
-
-static void
-bridge_pcie_ack(int irq, void *arg)
-{
-	uint32_t node,reg;
-	uint64_t base;
-
-	node = nlm_nodeid();
-	reg = PCIE_MSI_STATUS;
-
-	switch (irq) {
-		case PIC_PCIE_0_IRQ:
-			base = nlm_pcicfg_base(XLP_IO_PCIE0_OFFSET(node));
-			break;
-		case PIC_PCIE_1_IRQ:
-			base = nlm_pcicfg_base(XLP_IO_PCIE1_OFFSET(node));
-			break;
-		case PIC_PCIE_2_IRQ:
-			base = nlm_pcicfg_base(XLP_IO_PCIE2_OFFSET(node));
-			break;
-		case PIC_PCIE_3_IRQ:
-			base = nlm_pcicfg_base(XLP_IO_PCIE3_OFFSET(node));
-			break;
-		default:
-			return;
-	}
-
-	nlm_write_pci_reg(base, reg, 0xFFFFFFFF);
-	return;
-}
-
-static int
-mips_platform_pcib_setup_intr(device_t dev, device_t child,
-    struct resource *irq, int flags, driver_filter_t *filt,
-    driver_intr_t *intr, void *arg, void **cookiep)
-{
-	int error = 0;
-	int xlpirq;
-
-	error = rman_activate_resource(irq);
-	if (error)
-		return error;
-	if (rman_get_start(irq) != rman_get_end(irq)) {
-		device_printf(dev, "Interrupt allocation %ju != %ju\n",
-		    rman_get_start(irq), rman_get_end(irq));
-		return (EINVAL);
-	}
-	xlpirq = rman_get_start(irq);
-	if (xlpirq == 0)
-		return (0);
-
-	if (strcmp(device_get_name(dev), "pcib") != 0)
-		return (0);
-
-	/*
-	 * temporary hack for MSI, we support just one device per
-	 * link, and assign the link interrupt to the device interrupt
-	 */
-	if (xlpirq >= 64) {
-		int node, val, link;
-		uint64_t base;
-
-		xlpirq -= 64;
-		if (xlpirq % 32 != 0)
-			return (0);
-
-		node = nlm_nodeid();
-		link = xlpirq / 32;
-		base = nlm_pcicfg_base(XLP_IO_PCIE_OFFSET(node,link));
-
-		/* MSI Interrupt Vector enable at bridge's configuration */
-		nlm_write_pci_reg(base, PCIE_MSI_EN, PCIE_MSI_VECTOR_INT_EN);
-
-		val = nlm_read_pci_reg(base, PCIE_INT_EN0);
-		/* MSI Interrupt enable at bridge's configuration */
-		nlm_write_pci_reg(base, PCIE_INT_EN0,
-		    (val | PCIE_MSI_INT_EN));
-
-		/* legacy interrupt disable at bridge */
-		val = nlm_read_pci_reg(base, PCIE_BRIDGE_CMD);
-		nlm_write_pci_reg(base, PCIE_BRIDGE_CMD,
-		    (val | PCIM_CMD_INTxDIS));
-
-		/* MSI address update at bridge */
-		nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_ADDRL,
-		    MSI_MIPS_ADDR_BASE);
-		nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_ADDRH, 0);
-
-		val = nlm_read_pci_reg(base, PCIE_BRIDGE_MSI_CAP);
-		/* MSI capability enable at bridge */
-		nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_CAP,
-		    (val | (PCIM_MSICTRL_MSI_ENABLE << 16) |
-		        (PCIM_MSICTRL_MMC_32 << 16)));
-		xlpirq = PIC_PCIE_IRQ(link);
-	}
-
-	/* if it is for real PCIe, we need to ack at bridge too */
-	if (xlpirq >= PIC_PCIE_IRQ(0) && xlpirq <= PIC_PCIE_IRQ(3))
-		xlp_set_bus_ack(xlpirq, bridge_pcie_ack, NULL);
-	cpu_establish_hardintr(device_get_name(child), filt, intr, arg,
-	    xlpirq, flags, cookiep);
-
-	return (0);
-}
-
-static int
-mips_platform_pcib_teardown_intr(device_t dev, device_t child,
-    struct resource *irq, void *cookie)
-{
-	if (strcmp(device_get_name(child), "pci") == 0) {
-		/* if needed reprogram the pic to clear pcix related entry */
-		device_printf(dev, "teardown intr\n");
-	}
-	return (bus_generic_teardown_intr(dev, child, irq, cookie));
-}
-
-static int
-mips_pcib_route_interrupt(device_t bus, device_t dev, int pin)
-{
-	int f, d;
-
-	/*
-	 * Validate requested pin number.
-	 */
-	if ((pin < 1) || (pin > 4))
-		return (255);
-
-	if (pci_get_bus(dev) == 0 &&
-	    pci_get_vendor(dev) == PCI_VENDOR_NETLOGIC) {
-		f = pci_get_function(dev);
-		d = pci_get_slot(dev) % 8;
-
-		/*
-		 * For PCIe links, return link IRT, for other SoC devices
-		 * get the IRT from its PCIe header
-		 */
-		if (d == 1)
-			return (PIC_PCIE_IRQ(f));
-		else
-			return (255);	/* use intline, don't reroute */
-	} else {
-		/* Regular PCI devices */
-		return (PIC_PCIE_IRQ(xlp_pcie_link(bus, dev)));
-	}
-}
-
-static device_method_t xlp_pcib_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe, xlp_pcib_probe),
-	DEVMETHOD(device_attach, xlp_pcib_attach),
-
-	/* Bus interface */
-	DEVMETHOD(bus_read_ivar, xlp_pcib_read_ivar),
-	DEVMETHOD(bus_write_ivar, xlp_pcib_write_ivar),
-	DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
-	DEVMETHOD(bus_release_resource, bus_generic_release_resource),
-	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
-	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
-	DEVMETHOD(bus_setup_intr, mips_platform_pcib_setup_intr),
-	DEVMETHOD(bus_teardown_intr, mips_platform_pcib_teardown_intr),
-
-	/* pcib interface */
-	DEVMETHOD(pcib_maxslots, xlp_pcib_maxslots),
-	DEVMETHOD(pcib_read_config, xlp_pcib_read_config),
-	DEVMETHOD(pcib_write_config, xlp_pcib_write_config),
-	DEVMETHOD(pcib_route_interrupt, mips_pcib_route_interrupt),
-	DEVMETHOD(pcib_request_feature,	pcib_request_feature_allow),
-
-	DEVMETHOD(pcib_alloc_msi, xlp_alloc_msi),
-	DEVMETHOD(pcib_release_msi, xlp_release_msi),
-	DEVMETHOD(pcib_map_msi, xlp_map_msi),
-
-	DEVMETHOD_END
-};
-
-static driver_t xlp_pcib_driver = {
-	"pcib",
-	xlp_pcib_methods,
-	1, /* no softc */
-};
-
-static devclass_t pcib_devclass;
-DRIVER_MODULE(xlp_pcib, simplebus, xlp_pcib_driver, pcib_devclass, 0, 0);
diff --git a/sys/mips/nlm/xlp_simplebus.c b/sys/mips/nlm/xlp_simplebus.c
deleted file mode 100644
index eb42a864a54e..000000000000
--- a/sys/mips/nlm/xlp_simplebus.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/*-
- * Copyright (c) 2015 Broadcom Corporation
- * (based on sys/dev/fdt/simplebus.c)
- * Copyright (c) 2013 Nathan Whitehorn
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-
-#include <machine/bus.h>
-#include <machine/intr_machdep.h>
-
-#include <mips/nlm/hal/haldefs.h>
-#include <mips/nlm/interrupt.h>
-#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/pcibus.h>
-#include <mips/nlm/xlp.h>
-
-#include <dev/ofw/openfirm.h>
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-
-#include <dev/fdt/simplebus.h>
-
-/* flash memory region for chipselects */
-#define	GBU_MEM_BASE	0x16000000UL
-#define	GBU_MEM_LIMIT	0x17ffffffUL
-
-/*
- * Device registers in pci ecfg memory region for devices without regular PCI BARs
- */
-#define	PCI_ECFG_BASE	XLP_DEFAULT_IO_BASE
-#define	PCI_ECFG_LIMIT	(XLP_DEFAULT_IO_BASE + 0x0fffffff)
-
-/*
- * Bus interface.
- */
-static int		xlp_simplebus_probe(device_t dev);
-static struct resource *xlp_simplebus_alloc_resource(device_t, device_t, int,
-    int *, rman_res_t, rman_res_t, rman_res_t, u_int);
-static int		xlp_simplebus_activate_resource(device_t, device_t, int,
-    int, struct resource *);
-static int		xlp_simplebus_setup_intr(device_t, device_t,
-    struct resource *, int, driver_filter_t *, driver_intr_t *, void *, void **);
-
-/*
- * ofw_bus interface
- */
-static int		xlp_simplebus_ofw_map_intr(device_t, device_t, phandle_t,
-    int, pcell_t *);
-
-static devclass_t simplebus_devclass;
-static device_method_t xlp_simplebus_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		xlp_simplebus_probe),
-
-	DEVMETHOD(bus_alloc_resource,	xlp_simplebus_alloc_resource),
-	DEVMETHOD(bus_activate_resource, xlp_simplebus_activate_resource),
-	DEVMETHOD(bus_setup_intr,	xlp_simplebus_setup_intr),
-
-	DEVMETHOD(ofw_bus_map_intr,	xlp_simplebus_ofw_map_intr),
-	DEVMETHOD_END
-};
-
-DEFINE_CLASS_1(simplebus, xlp_simplebus_driver, xlp_simplebus_methods,
-    sizeof(struct simplebus_softc), simplebus_driver);
-DRIVER_MODULE(xlp_simplebus, ofwbus, xlp_simplebus_driver, simplebus_devclass,
-    0, 0);
-
-static struct rman irq_rman, port_rman, mem_rman, pci_ecfg_rman, gbu_rman;
-
-static void
-xlp_simplebus_init_resources(void)
-{
-	irq_rman.rm_start = 0;
-	irq_rman.rm_end = 255;
-	irq_rman.rm_type = RMAN_ARRAY;
-	irq_rman.rm_descr = "PCI Mapped Interrupts";
-	if (rman_init(&irq_rman)
-	    || rman_manage_region(&irq_rman, 0, 255))
-		panic("xlp_simplebus_init_resources irq_rman");
-
-	port_rman.rm_type = RMAN_ARRAY;
-	port_rman.rm_descr = "I/O ports";
-	if (rman_init(&port_rman)
-	    || rman_manage_region(&port_rman, PCIE_IO_BASE, PCIE_IO_LIMIT))
-		panic("xlp_simplebus_init_resources port_rman");
-
-	mem_rman.rm_type = RMAN_ARRAY;
-	mem_rman.rm_descr = "I/O memory";
-	if (rman_init(&mem_rman)
-	    || rman_manage_region(&mem_rman, PCIE_MEM_BASE, PCIE_MEM_LIMIT))
-		panic("xlp_simplebus_init_resources mem_rman");
-
-	pci_ecfg_rman.rm_type = RMAN_ARRAY;
-	pci_ecfg_rman.rm_descr = "PCI ECFG IO";
-	if (rman_init(&pci_ecfg_rman) || rman_manage_region(&pci_ecfg_rman,
-	    PCI_ECFG_BASE, PCI_ECFG_LIMIT))
-		panic("xlp_simplebus_init_resources pci_ecfg_rman");
-
-	gbu_rman.rm_type = RMAN_ARRAY;
-	gbu_rman.rm_descr = "Flash region";
-	if (rman_init(&gbu_rman)
-	    || rman_manage_region(&gbu_rman, GBU_MEM_BASE, GBU_MEM_LIMIT))
-		panic("xlp_simplebus_init_resources gbu_rman");
-}
-
-static int
-xlp_simplebus_probe(device_t dev)
-{
-
-	if (!ofw_bus_status_okay(dev))
-		return (ENXIO);
-
-	/*
-	 * FDT data puts a "simple-bus" compatible string on many things that
-	 * have children but aren't really busses in our world.  Without a
-	 * ranges property we will fail to attach, so just fail to probe too.
-	 */
-	if (!(ofw_bus_is_compatible(dev, "simple-bus") &&
-	    ofw_bus_has_prop(dev, "ranges")) &&
-	    (ofw_bus_get_type(dev) == NULL || strcmp(ofw_bus_get_type(dev),
-	     "soc") != 0))
-		return (ENXIO);
-
-	xlp_simplebus_init_resources();
-	device_set_desc(dev, "XLP SoC bus");
-
-	return (BUS_PROBE_SPECIFIC);
-}
-
-static struct resource *
-xlp_simplebus_alloc_resource(device_t bus, device_t child, int type, int *rid,
-    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
-	struct rman			*rm;
-	struct resource			*rv;
-	struct resource_list_entry	*rle;
-	struct simplebus_softc		*sc;
-	struct simplebus_devinfo	*di;
-	bus_space_tag_t			bustag;
-	int j, isdefault, passthrough, needsactivate;
-
-	passthrough = (device_get_parent(child) != bus);
-	needsactivate = flags & RF_ACTIVE;
-	sc = device_get_softc(bus);
-        di = device_get_ivars(child);
-	rle = NULL;
-	bustag = NULL;
-
-	if (!passthrough) {
-		isdefault = RMAN_IS_DEFAULT_RANGE(start, end);
-		if (isdefault) {
-			rle = resource_list_find(&di->rl, type, *rid);
-			if (rle == NULL)
-				return (NULL);
-			if (rle->res != NULL)
-				panic("%s: resource entry is busy", __func__);
-			start = rle->start;
-			count = ulmax(count, rle->count);
-			end = ulmax(rle->end, start + count - 1);
-		}
-		if (type == SYS_RES_MEMORY) {
-			/* Remap through ranges property */
-			for (j = 0; j < sc->nranges; j++) {
-				if (start >= sc->ranges[j].bus && end <
-				    sc->ranges[j].bus + sc->ranges[j].size) {
-					start -= sc->ranges[j].bus;
-					start += sc->ranges[j].host;
-					end -= sc->ranges[j].bus;
-					end += sc->ranges[j].host;
-					break;
-				}
-			}
-			if (j == sc->nranges && sc->nranges != 0) {
-				if (bootverbose)
-					device_printf(bus, "Could not map resource "
-					    "%#jx-%#jx\n", start, end);
-				return (NULL);
-			}
-		}
-	}
-	switch (type) {
-	case SYS_RES_IRQ:
-		rm = &irq_rman;
-		break;
-	case SYS_RES_IOPORT:
-		rm = &port_rman;
-		bustag = rmi_bus_space;
-		break;
-	case SYS_RES_MEMORY:
-		if (start >= GBU_MEM_BASE && end <= GBU_MEM_LIMIT) {
-			rm = &gbu_rman;
-			bustag = rmi_bus_space;
-		} else if (start >= PCI_ECFG_BASE && end <= PCI_ECFG_LIMIT) {
-			rm = &pci_ecfg_rman;
-			bustag = rmi_uart_bus_space;
-		} else if (start >= PCIE_MEM_BASE && end <= PCIE_MEM_LIMIT) {
-			rm = &mem_rman;
-			bustag = rmi_bus_space;
-		} else {
-			if (bootverbose)
-				device_printf(bus, "Invalid MEM range"
-					    "%#jx-%#jx\n", start, end);
-			return (NULL);
-		}
-		break;
-	default:
-		return (NULL);
-	}
-
-	rv = rman_reserve_resource(rm, start, end, count, flags, child);
-	if (rv == NULL) {
-		device_printf(bus, "%s: could not reserve resource for %s\n",
-		    __func__, device_get_nameunit(child));
-		return (NULL);
-	}
-
-	rman_set_rid(rv, *rid);
-	if (bustag != NULL)
-		rman_set_bustag(rv, bustag);
-
-	if (needsactivate) {
-		if (bus_activate_resource(child, type, *rid, rv)) {
-			device_printf(bus, "%s: could not activate resource\n",
-			    __func__);
-			rman_release_resource(rv);
-			return (NULL);
-		}
-	}
-
-	return (rv);
-}
-
-static int
-xlp_simplebus_activate_resource(device_t bus, device_t child, int type, int rid,
-    struct resource *r)
-{
-	void *vaddr;
-	vm_paddr_t paddr;
-	vm_size_t psize;
-
-	/*
-	 * If this is a memory resource, use pmap_mapdev to map it.
-	 */
-	if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
-		paddr = rman_get_start(r);
-		psize = rman_get_size(r);
-		vaddr = pmap_mapdev(paddr, psize);
-
-		rman_set_virtual(r, vaddr);
-		rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr);
-	}
-
-	return (rman_activate_resource(r));
-}
-
-static int
-xlp_simplebus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
-    driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
-{
-	register_t s;
-	int irq;
-
-	/* setup irq */
-	s = intr_disable();
-	irq = rman_get_start(res);
-	cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg,
-	    irq, flags, cookiep);
-	intr_restore(s);
-	return (0);
-}
-
-static int
-xlp_simplebus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells,
-    pcell_t *irq)
-{
-
-	return ((int)irq[0]);
-}