diff options
Diffstat (limited to 'contrib/arm-optimized-routines')
537 files changed, 39609 insertions, 4709 deletions
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SUBS = math string networking +PLSUBS = math HOST_CC = cc HOST_CFLAGS = -std=c99 -O2 HOST_LDFLAGS = @@ -20,6 +21,7 @@ CPPFLAGS = CFLAGS = -std=c99 -O2 CFLAGS_SHARED = -fPIC CFLAGS_ALL = -Ibuild/include $(CPPFLAGS) $(CFLAGS) +CFLAGS_PL = -Ibuild/pl/include $(CPPFLAGS) $(CFLAGS) -DPL LDFLAGS = LDLIBS = AR = $(CROSS_COMPILE)ar @@ -51,6 +53,7 @@ $(DIRS): mkdir -p $@ $(filter %.os,$(ALL_FILES)): CFLAGS_ALL += $(CFLAGS_SHARED) +$(filter %.os,$(ALL_FILES)): CFLAGS_PL += $(CFLAGS_SHARED) build/%.o: $(srcdir)/%.S $(CC) $(CFLAGS_ALL) -c -o $@ $< diff --git a/contrib/arm-optimized-routines/README b/contrib/arm-optimized-routines/README index ae465e93fea7..651ebdc84bc8 100644 --- a/contrib/arm-optimized-routines/README +++ b/contrib/arm-optimized-routines/README @@ -2,14 +2,17 @@ Arm Optimized Routines ---------------------- This repository contains implementations of library functions -provided by Arm under MIT License (See LICENSE). Contributions -to this project are accepted, but Contributors have to sign an -Assignment Agreement, please follow the instructions in +provided by Arm. The outbound license is available under a dual +license, at the user’s election, as reflected in the LICENSE file. +Contributions to this project are accepted, but Contributors have +to sign an Assignment Agreement, please follow the instructions in contributor-agreement.pdf. This is needed so upstreaming code -to projects that require copyright assignment is possible. +to projects that require copyright assignment is possible. Further +contribution requirements are documented in README.contributors of +the appropriate subdirectory. Regular quarterly releases are tagged as vYY.MM, the latest -release is v20.11. +release is v24.01. Source code layout: @@ -24,6 +27,7 @@ networking/test/ - networking test and benchmark related sources. string/ - string routines subproject sources. string/include/ - string library public headers. string/test/ - string test and benchmark related sources. +pl/... - separately maintained performance library code. The steps to build the target libraries and run the tests: diff --git a/contrib/arm-optimized-routines/README.contributors b/contrib/arm-optimized-routines/README.contributors new file mode 100644 index 000000000000..f8fcdde432e1 --- /dev/null +++ b/contrib/arm-optimized-routines/README.contributors @@ -0,0 +1,44 @@ +GENERIC CONTRIBUTION GUIDELINES +=============================== + +1. Sub-projects are maintained independently and thus have independent + contribution rules. If there exists a README.contributors in the + sub-directory to which the contribution is made, it must be followed. + +2. Legal: + - Contributors who are not employed by Arm must sign an Assignment Agreement. + See contributor-agreement.pdf. + - All code must be copyright owned by Arm Limited and the appropriate + copyright notice and license identifier must be present in every source + file. + +3. Build: + - Build should only depend on GNU make and posix utilities (shell, awk, sed, + etc) and on a C toolchain. + - Build should pass with the default configuration (see config.mk.dist) + and other supported configurations, with both gcc and clang based + toolchains. (The build should not depend on a recent toolchain, the use + of a new feature should be possible to disable.) + - Currently there is no automated configuration, target specific configuration + should be done via make variables in config.mk. This is the user interface + to the build system, so it should be documented in sufficient detail and + kept reasonably stable. + +4. Testing: + - On aarch64 the tests must pass. If the code may behave differently under + some supported configurations (e.g. CFLAGS) those should be tested. + - New symbols are expected to have new associated test code and ideally + benchmark code too. + +4. Commits: + - Commit message should be descriptive and should not refer to Arm internal + information (such as Jira tickets, or internal discussions). Non-obvious + decisions should be recorded or explained in the commit message if they are + not explained in source comments. + - Ideally tools and scripts used to write the code should be added to the + repository or at least mentioned in the commit. + - Logically independent changes should not be mixed into the same commit. + +5. Style: + - Unless otherwise required differently by the sub-project, follow the + clang-format tool using the style from the gcc contrib/ directory. diff --git a/contrib/arm-optimized-routines/config.mk.dist b/contrib/arm-optimized-routines/config.mk.dist index 177e1ac4f53a..03fb54db52fa 100644 --- a/contrib/arm-optimized-routines/config.mk.dist +++ b/contrib/arm-optimized-routines/config.mk.dist @@ -1,11 +1,14 @@ # Example config.mk # -# Copyright (c) 2018-2020, Arm Limited. -# SPDX-License-Identifier: MIT +# Copyright (c) 2018-2023, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception # Subprojects to build SUBS = math string networking +# Subsubprojects to build if subproject pl is built +PLSUBS = math + # Target architecture: aarch64, arm or x86_64 ARCH = aarch64 @@ -56,8 +59,26 @@ math-cflags += -ffp-contract=fast -fno-math-errno # Use with clang. #math-cflags += -ffp-contract=fast -# Disable vector math code -#math-cflags += -DWANT_VMATH=0 +# Disable/enable SVE vector math code and tests. +# If WANT_SVE_MATH is enabled, math-sve-cflags is added for SVE +# routines only so that SVE code does not leak into scalar +# routines. It is also necessary to add it for tools (e.g. ulp, +# mathbench) +WANT_SVE_MATH = 0 +ifeq ($(WANT_SVE_MATH), 1) + math-sve-cflags = -march=armv8-a+sve +endif +math-cflags += -DWANT_SVE_MATH=$(WANT_SVE_MATH) + +# If defined to 1, set errno in math functions according to ISO C. Many math +# libraries do not set errno, so this is 0 by default. It may need to be +# set to 1 if math.h has (math_errhandling & MATH_ERRNO) != 0. +WANT_ERRNO = 0 +math-cflags += -DWANT_ERRNO=$(WANT_ERRNO) + +# If set to 1, set fenv in vector math routines. +WANT_SIMD_EXCEPT = 0 +math-cflags += -DWANT_SIMD_EXCEPT=$(WANT_SIMD_EXCEPT) # Disable fenv checks #math-ulpflags = -q -f diff --git a/contrib/arm-optimized-routines/math/Dir.mk b/contrib/arm-optimized-routines/math/Dir.mk index 3b841ab71955..5e9494a7bd3c 100644 --- a/contrib/arm-optimized-routines/math/Dir.mk +++ b/contrib/arm-optimized-routines/math/Dir.mk @@ -1,12 +1,14 @@ # Makefile fragment - requires GNU make # -# Copyright (c) 2019, Arm Limited. -# SPDX-License-Identifier: MIT +# Copyright (c) 2019-2023, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception S := $(srcdir)/math B := build/math math-lib-srcs := $(wildcard $(S)/*.[cS]) +math-lib-srcs += $(wildcard $(S)/$(ARCH)/*.[cS]) + math-test-srcs := \ $(S)/test/mathtest.c \ $(S)/test/mathbench.c \ @@ -15,6 +17,7 @@ math-test-srcs := \ math-test-host-srcs := $(wildcard $(S)/test/rtest/*.[cS]) math-includes := $(patsubst $(S)/%,build/%,$(wildcard $(S)/include/*.h)) +math-test-includes := $(patsubst $(S)/%,build/include/%,$(wildcard $(S)/test/*.h)) math-libs := \ build/lib/libmathlib.so \ @@ -42,10 +45,11 @@ math-files := \ $(math-tools) \ $(math-host-tools) \ $(math-includes) \ + $(math-test-includes) \ -all-math: $(math-libs) $(math-tools) $(math-includes) +all-math: $(math-libs) $(math-tools) $(math-includes) $(math-test-includes) -$(math-objs): $(math-includes) +$(math-objs): $(math-includes) $(math-test-includes) $(math-objs): CFLAGS_ALL += $(math-cflags) $(B)/test/mathtest.o: CFLAGS_ALL += -fmath-errno $(math-host-objs): CC = $(HOST_CC) @@ -63,6 +67,8 @@ build/lib/libmathlib.a: $(math-lib-objs) $(math-host-tools): HOST_LDLIBS += -lm -lmpfr -lmpc $(math-tools): LDLIBS += $(math-ldlibs) -lm +# math-sve-cflags should be empty if WANT_SVE_MATH is not enabled +$(math-tools): CFLAGS_ALL += $(math-sve-cflags) build/bin/rtest: $(math-host-objs) $(HOST_CC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $@ $^ $(HOST_LDLIBS) @@ -83,6 +89,9 @@ build/bin/ulp: $(B)/test/ulp.o build/lib/libmathlib.a build/include/%.h: $(S)/include/%.h cp $< $@ +build/include/test/%.h: $(S)/test/%.h + cp $< $@ + build/bin/%.sh: $(S)/test/%.sh cp $< $@ @@ -96,7 +105,7 @@ check-math-rtest: $(math-host-tools) $(math-tools) cat $(math-rtests) | build/bin/rtest | $(EMULATOR) build/bin/mathtest $(math-testflags) check-math-ulp: $(math-tools) - ULPFLAGS="$(math-ulpflags)" build/bin/runulp.sh $(EMULATOR) + ULPFLAGS="$(math-ulpflags)" WANT_SIMD_EXCEPT="$(WANT_SIMD_EXCEPT)" build/bin/runulp.sh $(EMULATOR) check-math: check-math-test check-math-rtest check-math-ulp diff --git a/contrib/arm-optimized-routines/math/README.contributors b/contrib/arm-optimized-routines/math/README.contributors new file mode 100644 index 000000000000..33e7ba376e41 --- /dev/null +++ b/contrib/arm-optimized-routines/math/README.contributors @@ -0,0 +1,78 @@ +STYLE REQUIREMENTS +================== + +1. Most code in this sub-directory is expected to be upstreamed into glibc so + the GNU Coding Standard and glibc specific conventions should be followed + to ease upstreaming. + +2. ABI and symbols: the code should be written so it is suitable for inclusion + into a libc with minimal changes. This e.g. means that internal symbols + should be hidden and in the implementation reserved namespace according to + ISO C and POSIX rules. If possible the built shared libraries and static + library archives should be usable to override libc symbols at link time (or + at runtime via LD_PRELOAD). This requires the symbols to follow the glibc ABI + (other than symbol versioning), this cannot be done reliably for static + linking so this is a best effort requirement. + +3. API: include headers should be suitable for benchmarking and testing code + and should not conflict with libc headers. + + +CONTRIBUTION GUIDELINES FOR math SUB-DIRECTORY +============================================== + +1. Math functions have quality and performance requirements. + +2. Quality: + - Worst-case ULP error should be small in the entire input domain (for most + common double precision scalar functions the target is < 0.66 ULP error, + and < 1 ULP for single precision, even performance optimized function + variant should not have > 5 ULP error if the goal is to be a drop in + replacement for a standard math function), this should be tested + statistically (or on all inputs if possible in reasonable amount of time). + The ulp tool is for this and runulp.sh should be updated for new functions. + + - All standard rounding modes need to be supported but in non-default rounding + modes the quality requirement can be relaxed. (Non-nearest rounded + computation can be slow and inaccurate but has to be correct for conformance + reasons.) + + - Special cases and error handling need to follow ISO C Annex F requirements, + POSIX requirements, IEEE 754-2008 requirements and Glibc requiremnts: + https://www.gnu.org/software/libc/manual/html_mono/libc.html#Errors-in-Math-Functions + this should be tested by direct tests (glibc test system may be used for it). + + - Error handling code should be decoupled from the approximation code as much + as possible. (There are helper functions, these take care of errno as well + as exception raising.) + + - Vector math code does not need to work in non-nearest rounding mode and error + handling side effects need not happen (fenv exceptions and errno), but the + result should be correct (within quality requirements, which are lower for + vector code than for scalar code). + + - Error bounds of the approximation should be clearly documented. + + - The code should build and pass tests on arm, aarch64 and x86_64 GNU linux + systems. (Routines and features can be disabled on specific targets, but + the build must complete). On aarch64, both little- and big-endian targets + are supported as well as valid combinations of architecture extensions. + The configurations that should be tested depend on the contribution. + +3. Performance: + - Common math code should be benchmarked on modern aarch64 microarchitectures + over typical inputs. + + - Performance improvements should be documented (relative numbers can be + published; it is enough to use the mathbench microbenchmark tool which should + be updated for new functions). + + - Attention should be paid to the compilation flags: for aarch64 fma + contraction should be on and math errno turned off so some builtins can be + inlined. + + - The code should be reasonably performant on x86_64 too, e.g. some rounding + instructions and fma may not be available on x86_64, such builtins turn into + libc calls with slow code. Such slowdown is not acceptable, a faster fallback + should be present: glibc and bionic use the same code on all targets. (This + does not apply to vector math code). diff --git a/contrib/arm-optimized-routines/math/aarch64/v_cos.c b/contrib/arm-optimized-routines/math/aarch64/v_cos.c new file mode 100644 index 000000000000..9a73575bce89 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_cos.c @@ -0,0 +1,87 @@ +/* + * Double-precision vector cos function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float64x2_t poly[7]; + float64x2_t range_val, shift, inv_pi, half_pi, pi_1, pi_2, pi_3; +} data = { + /* Worst-case error is 3.3 ulp in [-pi/2, pi/2]. */ + .poly = { V2 (-0x1.555555555547bp-3), V2 (0x1.1111111108a4dp-7), + V2 (-0x1.a01a019936f27p-13), V2 (0x1.71de37a97d93ep-19), + V2 (-0x1.ae633919987c6p-26), V2 (0x1.60e277ae07cecp-33), + V2 (-0x1.9e9540300a1p-41) }, + .inv_pi = V2 (0x1.45f306dc9c883p-2), + .half_pi = V2 (0x1.921fb54442d18p+0), + .pi_1 = V2 (0x1.921fb54442d18p+1), + .pi_2 = V2 (0x1.1a62633145c06p-53), + .pi_3 = V2 (0x1.c1cd129024e09p-106), + .shift = V2 (0x1.8p52), + .range_val = V2 (0x1p23) +}; + +#define C(i) d->poly[i] + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t odd, uint64x2_t cmp) +{ + y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); + return v_call_f64 (cos, x, y, cmp); +} + +float64x2_t VPCS_ATTR V_NAME_D1 (cos) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + float64x2_t n, r, r2, r3, r4, t1, t2, t3, y; + uint64x2_t odd, cmp; + +#if WANT_SIMD_EXCEPT + r = vabsq_f64 (x); + cmp = vcgeq_u64 (vreinterpretq_u64_f64 (r), + vreinterpretq_u64_f64 (d->range_val)); + if (unlikely (v_any_u64 (cmp))) + /* If fenv exceptions are to be triggered correctly, set any special lanes + to 1 (which is neutral w.r.t. fenv). These lanes will be fixed by + special-case handler later. */ + r = vbslq_f64 (cmp, v_f64 (1.0), r); +#else + cmp = vcageq_f64 (x, d->range_val); + r = x; +#endif + + /* n = rint((|x|+pi/2)/pi) - 0.5. */ + n = vfmaq_f64 (d->shift, d->inv_pi, vaddq_f64 (r, d->half_pi)); + odd = vshlq_n_u64 (vreinterpretq_u64_f64 (n), 63); + n = vsubq_f64 (n, d->shift); + n = vsubq_f64 (n, v_f64 (0.5)); + + /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ + r = vfmsq_f64 (r, d->pi_1, n); + r = vfmsq_f64 (r, d->pi_2, n); + r = vfmsq_f64 (r, d->pi_3, n); + + /* sin(r) poly approx. */ + r2 = vmulq_f64 (r, r); + r3 = vmulq_f64 (r2, r); + r4 = vmulq_f64 (r2, r2); + + t1 = vfmaq_f64 (C (4), C (5), r2); + t2 = vfmaq_f64 (C (2), C (3), r2); + t3 = vfmaq_f64 (C (0), C (1), r2); + + y = vfmaq_f64 (t1, C (6), r4); + y = vfmaq_f64 (t2, y, r4); + y = vfmaq_f64 (t3, y, r4); + y = vfmaq_f64 (r, y, r3); + + if (unlikely (v_any_u64 (cmp))) + return special_case (x, y, odd, cmp); + return vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_cosf.c b/contrib/arm-optimized-routines/math/aarch64/v_cosf.c new file mode 100644 index 000000000000..b9890b2998ad --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_cosf.c @@ -0,0 +1,82 @@ +/* + * Single-precision vector cos function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float32x4_t poly[4]; + float32x4_t range_val, inv_pi, half_pi, shift, pi_1, pi_2, pi_3; +} data = { + /* 1.886 ulp error. */ + .poly = { V4 (-0x1.555548p-3f), V4 (0x1.110df4p-7f), V4 (-0x1.9f42eap-13f), + V4 (0x1.5b2e76p-19f) }, + + .pi_1 = V4 (0x1.921fb6p+1f), + .pi_2 = V4 (-0x1.777a5cp-24f), + .pi_3 = V4 (-0x1.ee59dap-49f), + + .inv_pi = V4 (0x1.45f306p-2f), + .shift = V4 (0x1.8p+23f), + .half_pi = V4 (0x1.921fb6p0f), + .range_val = V4 (0x1p20f) +}; + +#define C(i) d->poly[i] + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp) +{ + /* Fall back to scalar code. */ + y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); + return v_call_f32 (cosf, x, y, cmp); +} + +float32x4_t VPCS_ATTR V_NAME_F1 (cos) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t n, r, r2, r3, y; + uint32x4_t odd, cmp; + +#if WANT_SIMD_EXCEPT + r = vabsq_f32 (x); + cmp = vcgeq_u32 (vreinterpretq_u32_f32 (r), + vreinterpretq_u32_f32 (d->range_val)); + if (unlikely (v_any_u32 (cmp))) + /* If fenv exceptions are to be triggered correctly, set any special lanes + to 1 (which is neutral w.r.t. fenv). These lanes will be fixed by + special-case handler later. */ + r = vbslq_f32 (cmp, v_f32 (1.0f), r); +#else + cmp = vcageq_f32 (x, d->range_val); + r = x; +#endif + + /* n = rint((|x|+pi/2)/pi) - 0.5. */ + n = vfmaq_f32 (d->shift, d->inv_pi, vaddq_f32 (r, d->half_pi)); + odd = vshlq_n_u32 (vreinterpretq_u32_f32 (n), 31); + n = vsubq_f32 (n, d->shift); + n = vsubq_f32 (n, v_f32 (0.5f)); + + /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ + r = vfmsq_f32 (r, d->pi_1, n); + r = vfmsq_f32 (r, d->pi_2, n); + r = vfmsq_f32 (r, d->pi_3, n); + + /* y = sin(r). */ + r2 = vmulq_f32 (r, r); + r3 = vmulq_f32 (r2, r); + y = vfmaq_f32 (C (2), C (3), r2); + y = vfmaq_f32 (C (1), y, r2); + y = vfmaq_f32 (C (0), y, r2); + y = vfmaq_f32 (r, y, r3); + + if (unlikely (v_any_u32 (cmp))) + return special_case (x, y, odd, cmp); + return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_exp.c b/contrib/arm-optimized-routines/math/aarch64/v_exp.c new file mode 100644 index 000000000000..bc5609faf4fc --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_exp.c @@ -0,0 +1,125 @@ +/* + * Double-precision vector e^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +#define N (1 << V_EXP_TABLE_BITS) +#define IndexMask (N - 1) + +const static volatile struct +{ + float64x2_t poly[3]; + float64x2_t inv_ln2, ln2_hi, ln2_lo, shift; +#if !WANT_SIMD_EXCEPT + float64x2_t special_bound, scale_thresh; +#endif +} data = { + /* maxerr: 1.88 +0.5 ulp + rel error: 1.4337*2^-53 + abs error: 1.4299*2^-53 in [ -ln2/256, ln2/256 ]. */ + .poly = { V2 (0x1.ffffffffffd43p-2), V2 (0x1.55555c75adbb2p-3), + V2 (0x1.55555da646206p-5) }, +#if !WANT_SIMD_EXCEPT + .scale_thresh = V2 (163840.0), /* 1280.0 * N. */ + .special_bound = V2 (704.0), +#endif + .inv_ln2 = V2 (0x1.71547652b82fep7), /* N/ln2. */ + .ln2_hi = V2 (0x1.62e42fefa39efp-8), /* ln2/N. */ + .ln2_lo = V2 (0x1.abc9e3b39803f3p-63), + .shift = V2 (0x1.8p+52) +}; + +#define C(i) data.poly[i] +#define Tab __v_exp_data + +#if WANT_SIMD_EXCEPT + +# define TinyBound v_u64 (0x2000000000000000) /* asuint64 (0x1p-511). */ +# define BigBound v_u64 (0x4080000000000000) /* asuint64 (0x1p9). */ +# define SpecialBound v_u64 (0x2080000000000000) /* BigBound - TinyBound. */ + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine to special lanes. */ + return v_call_f64 (exp, x, y, cmp); +} + +#else + +# define SpecialOffset v_u64 (0x6000000000000000) /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +# define SpecialBias1 v_u64 (0x7000000000000000) /* 0x1p769. */ +# define SpecialBias2 v_u64 (0x3010000000000000) /* 0x1p-254. */ + +static inline float64x2_t VPCS_ATTR +special_case (float64x2_t s, float64x2_t y, float64x2_t n) +{ + /* 2^(n/N) may overflow, break it up into s1*s2. */ + uint64x2_t b = vandq_u64 (vcltzq_f64 (n), SpecialOffset); + float64x2_t s1 = vreinterpretq_f64_u64 (vsubq_u64 (SpecialBias1, b)); + float64x2_t s2 = vreinterpretq_f64_u64 ( + vaddq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (s), SpecialBias2), b)); + uint64x2_t cmp = vcagtq_f64 (n, data.scale_thresh); + float64x2_t r1 = vmulq_f64 (s1, s1); + float64x2_t r0 = vmulq_f64 (vfmaq_f64 (s2, y, s2), s1); + return vbslq_f64 (cmp, r1, r0); +} + +#endif + +float64x2_t VPCS_ATTR V_NAME_D1 (exp) (float64x2_t x) +{ + float64x2_t n, r, r2, s, y, z; + uint64x2_t cmp, u, e; + +#if WANT_SIMD_EXCEPT + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special_case to fix special lanes later. This is only necessary if fenv + exceptions are to be triggered correctly. */ + float64x2_t xm = x; + uint64x2_t iax = vreinterpretq_u64_f64 (vabsq_f64 (x)); + cmp = vcgeq_u64 (vsubq_u64 (iax, TinyBound), SpecialBound); + if (unlikely (v_any_u64 (cmp))) + x = vbslq_f64 (cmp, v_f64 (1), x); +#else + cmp = vcagtq_f64 (x, data.special_bound); +#endif + + /* n = round(x/(ln2/N)). */ + z = vfmaq_f64 (data.shift, x, data.inv_ln2); + u = vreinterpretq_u64_f64 (z); + n = vsubq_f64 (z, data.shift); + + /* r = x - n*ln2/N. */ + r = x; + r = vfmsq_f64 (r, data.ln2_hi, n); + r = vfmsq_f64 (r, data.ln2_lo, n); + + e = vshlq_n_u64 (u, 52 - V_EXP_TABLE_BITS); + + /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4. */ + r2 = vmulq_f64 (r, r); + y = vfmaq_f64 (C (0), C (1), r); + y = vfmaq_f64 (y, C (2), r2); + y = vfmaq_f64 (r, y, r2); + + /* s = 2^(n/N). */ + u = (uint64x2_t){ Tab[u[0] & IndexMask], Tab[u[1] & IndexMask] }; + s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); + + if (unlikely (v_any_u64 (cmp))) +#if WANT_SIMD_EXCEPT + return special_case (xm, vfmaq_f64 (s, y, s), cmp); +#else + return special_case (s, y, n); +#endif + + return vfmaq_f64 (s, y, s); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_exp2f.c b/contrib/arm-optimized-routines/math/aarch64/v_exp2f.c new file mode 100644 index 000000000000..e402205e98e6 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_exp2f.c @@ -0,0 +1,113 @@ +/* + * Single-precision vector 2^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float32x4_t poly[5]; + uint32x4_t exponent_bias; +#if !WANT_SIMD_EXCEPT + float32x4_t special_bound, scale_thresh; +#endif +} data = { + /* maxerr: 1.962 ulp. */ + .poly = { V4 (0x1.59977ap-10f), V4 (0x1.3ce9e4p-7f), V4 (0x1.c6bd32p-5f), + V4 (0x1.ebf9bcp-3f), V4 (0x1.62e422p-1f) }, + .exponent_bias = V4 (0x3f800000), +#if !WANT_SIMD_EXCEPT + .special_bound = V4 (126.0f), + .scale_thresh = V4 (192.0f), +#endif +}; + +#define C(i) d->poly[i] + +#if WANT_SIMD_EXCEPT + +# define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */ +# define BigBound v_u32 (0x42800000) /* asuint (0x1p6). */ +# define SpecialBound v_u32 (0x22800000) /* BigBound - TinyBound. */ + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine for special lanes. */ + return v_call_f32 (exp2f, x, y, cmp); +} + +#else + +# define SpecialOffset v_u32 (0x82000000) +# define SpecialBias v_u32 (0x7f000000) + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1, + float32x4_t scale, const struct data *d) +{ + /* 2^n may overflow, break it up into s1*s2. */ + uint32x4_t b = vandq_u32 (vclezq_f32 (n), SpecialOffset); + float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, SpecialBias)); + float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b)); + uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh); + float32x4_t r2 = vmulq_f32 (s1, s1); + float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1); + /* Similar to r1 but avoids double rounding in the subnormal range. */ + float32x4_t r0 = vfmaq_f32 (scale, poly, scale); + float32x4_t r = vbslq_f32 (cmp1, r1, r0); + return vbslq_f32 (cmp2, r2, r); +} + +#endif + +float32x4_t VPCS_ATTR V_NAME_F1 (exp2) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t n, r, r2, scale, p, q, poly; + uint32x4_t cmp, e; + +#if WANT_SIMD_EXCEPT + /* asuint(|x|) - TinyBound >= BigBound - TinyBound. */ + uint32x4_t ia = vreinterpretq_u32_f32 (vabsq_f32 (x)); + cmp = vcgeq_u32 (vsubq_u32 (ia, TinyBound), SpecialBound); + float32x4_t xm = x; + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special_case to fix special lanes later. This is only necessary if fenv + exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = vbslq_f32 (cmp, v_f32 (1), x); +#endif + + /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = n + r, with r in [-1/2, 1/2]. */ + n = vrndaq_f32 (x); + r = vsubq_f32 (x, n); + e = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtaq_s32_f32 (x)), 23); + scale = vreinterpretq_f32_u32 (vaddq_u32 (e, d->exponent_bias)); + +#if !WANT_SIMD_EXCEPT + cmp = vcagtq_f32 (n, d->special_bound); +#endif + + r2 = vmulq_f32 (r, r); + p = vfmaq_f32 (C (1), C (0), r); + q = vfmaq_f32 (C (3), C (2), r); + q = vfmaq_f32 (q, p, r2); + p = vmulq_f32 (C (4), r); + poly = vfmaq_f32 (p, q, r2); + + if (unlikely (v_any_u32 (cmp))) +#if WANT_SIMD_EXCEPT + return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp); +#else + return special_case (poly, n, e, cmp, scale, d); +#endif + + return vfmaq_f32 (scale, poly, scale); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_exp2f_1u.c b/contrib/arm-optimized-routines/math/aarch64/v_exp2f_1u.c new file mode 100644 index 000000000000..ba6b02fbb4bc --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_exp2f_1u.c @@ -0,0 +1,72 @@ +/* + * Single-precision vector 2^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const float Poly[] = { + /* maxerr: 0.878 ulp. */ + 0x1.416b5ep-13f, 0x1.5f082ep-10f, 0x1.3b2dep-7f, 0x1.c6af7cp-5f, 0x1.ebfbdcp-3f, 0x1.62e43p-1f +}; +#define C0 v_f32 (Poly[0]) +#define C1 v_f32 (Poly[1]) +#define C2 v_f32 (Poly[2]) +#define C3 v_f32 (Poly[3]) +#define C4 v_f32 (Poly[4]) +#define C5 v_f32 (Poly[5]) + +#define Shift v_f32 (0x1.8p23f) +#define InvLn2 v_f32 (0x1.715476p+0f) +#define Ln2hi v_f32 (0x1.62e4p-1f) +#define Ln2lo v_f32 (0x1.7f7d1cp-20f) + +static float32x4_t VPCS_ATTR NOINLINE +specialcase (float32x4_t poly, float32x4_t n, uint32x4_t e, float32x4_t absn) +{ + /* 2^n may overflow, break it up into s1*s2. */ + uint32x4_t b = (n <= v_f32 (0.0f)) & v_u32 (0x83000000); + float32x4_t s1 = vreinterpretq_f32_u32 (v_u32 (0x7f000000) + b); + float32x4_t s2 = vreinterpretq_f32_u32 (e - b); + uint32x4_t cmp = absn > v_f32 (192.0f); + float32x4_t r1 = s1 * s1; + float32x4_t r0 = poly * s1 * s2; + return vreinterpretq_f32_u32 ((cmp & vreinterpretq_u32_f32 (r1)) + | (~cmp & vreinterpretq_u32_f32 (r0))); +} + +float32x4_t VPCS_ATTR +_ZGVnN4v_exp2f_1u (float32x4_t x) +{ + float32x4_t n, r, scale, poly, absn; + uint32x4_t cmp, e; + + /* exp2(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)] + x = n + r, with r in [-1/2, 1/2]. */ +#if 0 + float32x4_t z; + z = x + Shift; + n = z - Shift; + r = x - n; + e = vreinterpretq_u32_f32 (z) << 23; +#else + n = vrndaq_f32 (x); + r = x - n; + e = vreinterpretq_u32_s32 (vcvtaq_s32_f32 (x)) << 23; +#endif + scale = vreinterpretq_f32_u32 (e + v_u32 (0x3f800000)); + absn = vabsq_f32 (n); + cmp = absn > v_f32 (126.0f); + poly = vfmaq_f32 (C1, C0, r); + poly = vfmaq_f32 (C2, poly, r); + poly = vfmaq_f32 (C3, poly, r); + poly = vfmaq_f32 (C4, poly, r); + poly = vfmaq_f32 (C5, poly, r); + poly = vfmaq_f32 (v_f32 (1.0f), poly, r); + if (unlikely (v_any_u32 (cmp))) + return specialcase (poly, n, e, absn); + return scale * poly; +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_exp_data.c b/contrib/arm-optimized-routines/math/aarch64/v_exp_data.c new file mode 100644 index 000000000000..45f0848cac5b --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_exp_data.c @@ -0,0 +1,146 @@ +/* + * Lookup table for double-precision e^x vector function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" + +# define N (1 << V_EXP_TABLE_BITS) + +/* 2^(j/N), j=0..N. */ +const uint64_t __v_exp_data[] = { +# if N == 128 + 0x3ff0000000000000, 0x3feff63da9fb3335, 0x3fefec9a3e778061, + 0x3fefe315e86e7f85, 0x3fefd9b0d3158574, 0x3fefd06b29ddf6de, + 0x3fefc74518759bc8, 0x3fefbe3ecac6f383, 0x3fefb5586cf9890f, + 0x3fefac922b7247f7, 0x3fefa3ec32d3d1a2, 0x3fef9b66affed31b, + 0x3fef9301d0125b51, 0x3fef8abdc06c31cc, 0x3fef829aaea92de0, + 0x3fef7a98c8a58e51, 0x3fef72b83c7d517b, 0x3fef6af9388c8dea, + 0x3fef635beb6fcb75, 0x3fef5be084045cd4, 0x3fef54873168b9aa, + 0x3fef4d5022fcd91d, 0x3fef463b88628cd6, 0x3fef3f49917ddc96, + 0x3fef387a6e756238, 0x3fef31ce4fb2a63f, 0x3fef2b4565e27cdd, + 0x3fef24dfe1f56381, 0x3fef1e9df51fdee1, 0x3fef187fd0dad990, + 0x3fef1285a6e4030b, 0x3fef0cafa93e2f56, 0x3fef06fe0a31b715, + 0x3fef0170fc4cd831, 0x3feefc08b26416ff, 0x3feef6c55f929ff1, + 0x3feef1a7373aa9cb, 0x3feeecae6d05d866, 0x3feee7db34e59ff7, + 0x3feee32dc313a8e5, 0x3feedea64c123422, 0x3feeda4504ac801c, + 0x3feed60a21f72e2a, 0x3feed1f5d950a897, 0x3feece086061892d, + 0x3feeca41ed1d0057, 0x3feec6a2b5c13cd0, 0x3feec32af0d7d3de, + 0x3feebfdad5362a27, 0x3feebcb299fddd0d, 0x3feeb9b2769d2ca7, + 0x3feeb6daa2cf6642, 0x3feeb42b569d4f82, 0x3feeb1a4ca5d920f, + 0x3feeaf4736b527da, 0x3feead12d497c7fd, 0x3feeab07dd485429, + 0x3feea9268a5946b7, 0x3feea76f15ad2148, 0x3feea5e1b976dc09, + 0x3feea47eb03a5585, 0x3feea34634ccc320, 0x3feea23882552225, + 0x3feea155d44ca973, 0x3feea09e667f3bcd, 0x3feea012750bdabf, + 0x3fee9fb23c651a2f, 0x3fee9f7df9519484, 0x3fee9f75e8ec5f74, + 0x3fee9f9a48a58174, 0x3fee9feb564267c9, 0x3feea0694fde5d3f, + 0x3feea11473eb0187, 0x3feea1ed0130c132, 0x3feea2f336cf4e62, + 0x3feea427543e1a12, 0x3feea589994cce13, 0x3feea71a4623c7ad, + 0x3feea8d99b4492ed, 0x3feeaac7d98a6699, 0x3feeace5422aa0db, + 0x3feeaf3216b5448c, 0x3feeb1ae99157736, 0x3feeb45b0b91ffc6, + 0x3feeb737b0cdc5e5, 0x3feeba44cbc8520f, 0x3feebd829fde4e50, + 0x3feec0f170ca07ba, 0x3feec49182a3f090, 0x3feec86319e32323, + 0x3feecc667b5de565, 0x3feed09bec4a2d33, 0x3feed503b23e255d, + 0x3feed99e1330b358, 0x3feede6b5579fdbf, 0x3feee36bbfd3f37a, + 0x3feee89f995ad3ad, 0x3feeee07298db666, 0x3feef3a2b84f15fb, + 0x3feef9728de5593a, 0x3feeff76f2fb5e47, 0x3fef05b030a1064a, + 0x3fef0c1e904bc1d2, 0x3fef12c25bd71e09, 0x3fef199bdd85529c, + 0x3fef20ab5fffd07a, 0x3fef27f12e57d14b, 0x3fef2f6d9406e7b5, + 0x3fef3720dcef9069, 0x3fef3f0b555dc3fa, 0x3fef472d4a07897c, + 0x3fef4f87080d89f2, 0x3fef5818dcfba487, 0x3fef60e316c98398, + 0x3fef69e603db3285, 0x3fef7321f301b460, 0x3fef7c97337b9b5f, + 0x3fef864614f5a129, 0x3fef902ee78b3ff6, 0x3fef9a51fbc74c83, + 0x3fefa4afa2a490da, 0x3fefaf482d8e67f1, 0x3fefba1bee615a27, + 0x3fefc52b376bba97, 0x3fefd0765b6e4540, 0x3fefdbfdad9cbe14, + 0x3fefe7c1819e90d8, 0x3feff3c22b8f71f1, +# elif N == 256 + 0x3ff0000000000000, 0x3feffb1afa5abcbf, 0x3feff63da9fb3335, + 0x3feff168143b0281, 0x3fefec9a3e778061, 0x3fefe7d42e11bbcc, + 0x3fefe315e86e7f85, 0x3fefde5f72f654b1, 0x3fefd9b0d3158574, + 0x3fefd50a0e3c1f89, 0x3fefd06b29ddf6de, 0x3fefcbd42b72a836, + 0x3fefc74518759bc8, 0x3fefc2bdf66607e0, 0x3fefbe3ecac6f383, + 0x3fefb9c79b1f3919, 0x3fefb5586cf9890f, 0x3fefb0f145e46c85, + 0x3fefac922b7247f7, 0x3fefa83b23395dec, 0x3fefa3ec32d3d1a2, + 0x3fef9fa55fdfa9c5, 0x3fef9b66affed31b, 0x3fef973028d7233e, + 0x3fef9301d0125b51, 0x3fef8edbab5e2ab6, 0x3fef8abdc06c31cc, + 0x3fef86a814f204ab, 0x3fef829aaea92de0, 0x3fef7e95934f312e, + 0x3fef7a98c8a58e51, 0x3fef76a45471c3c2, 0x3fef72b83c7d517b, + 0x3fef6ed48695bbc0, 0x3fef6af9388c8dea, 0x3fef672658375d2f, + 0x3fef635beb6fcb75, 0x3fef5f99f8138a1c, 0x3fef5be084045cd4, + 0x3fef582f95281c6b, 0x3fef54873168b9aa, 0x3fef50e75eb44027, + 0x3fef4d5022fcd91d, 0x3fef49c18438ce4d, 0x3fef463b88628cd6, + 0x3fef42be3578a819, 0x3fef3f49917ddc96, 0x3fef3bdda27912d1, + 0x3fef387a6e756238, 0x3fef351ffb82140a, 0x3fef31ce4fb2a63f, + 0x3fef2e85711ece75, 0x3fef2b4565e27cdd, 0x3fef280e341ddf29, + 0x3fef24dfe1f56381, 0x3fef21ba7591bb70, 0x3fef1e9df51fdee1, + 0x3fef1b8a66d10f13, 0x3fef187fd0dad990, 0x3fef157e39771b2f, + 0x3fef1285a6e4030b, 0x3fef0f961f641589, 0x3fef0cafa93e2f56, + 0x3fef09d24abd886b, 0x3fef06fe0a31b715, 0x3fef0432edeeb2fd, + 0x3fef0170fc4cd831, 0x3feefeb83ba8ea32, 0x3feefc08b26416ff, + 0x3feef96266e3fa2d, 0x3feef6c55f929ff1, 0x3feef431a2de883b, + 0x3feef1a7373aa9cb, 0x3feeef26231e754a, 0x3feeecae6d05d866, + 0x3feeea401b7140ef, 0x3feee7db34e59ff7, 0x3feee57fbfec6cf4, + 0x3feee32dc313a8e5, 0x3feee0e544ede173, 0x3feedea64c123422, + 0x3feedc70df1c5175, 0x3feeda4504ac801c, 0x3feed822c367a024, + 0x3feed60a21f72e2a, 0x3feed3fb2709468a, 0x3feed1f5d950a897, + 0x3feecffa3f84b9d4, 0x3feece086061892d, 0x3feecc2042a7d232, + 0x3feeca41ed1d0057, 0x3feec86d668b3237, 0x3feec6a2b5c13cd0, + 0x3feec4e1e192aed2, 0x3feec32af0d7d3de, 0x3feec17dea6db7d7, + 0x3feebfdad5362a27, 0x3feebe41b817c114, 0x3feebcb299fddd0d, + 0x3feebb2d81d8abff, 0x3feeb9b2769d2ca7, 0x3feeb8417f4531ee, + 0x3feeb6daa2cf6642, 0x3feeb57de83f4eef, 0x3feeb42b569d4f82, + 0x3feeb2e2f4f6ad27, 0x3feeb1a4ca5d920f, 0x3feeb070dde910d2, + 0x3feeaf4736b527da, 0x3feeae27dbe2c4cf, 0x3feead12d497c7fd, + 0x3feeac0827ff07cc, 0x3feeab07dd485429, 0x3feeaa11fba87a03, + 0x3feea9268a5946b7, 0x3feea84590998b93, 0x3feea76f15ad2148, + 0x3feea6a320dceb71, 0x3feea5e1b976dc09, 0x3feea52ae6cdf6f4, + 0x3feea47eb03a5585, 0x3feea3dd1d1929fd, 0x3feea34634ccc320, + 0x3feea2b9febc8fb7, 0x3feea23882552225, 0x3feea1c1c70833f6, + 0x3feea155d44ca973, 0x3feea0f4b19e9538, 0x3feea09e667f3bcd, + 0x3feea052fa75173e, 0x3feea012750bdabf, 0x3fee9fdcddd47645, + 0x3fee9fb23c651a2f, 0x3fee9f9298593ae5, 0x3fee9f7df9519484, + 0x3fee9f7466f42e87, 0x3fee9f75e8ec5f74, 0x3fee9f8286ead08a, + 0x3fee9f9a48a58174, 0x3fee9fbd35d7cbfd, 0x3fee9feb564267c9, + 0x3feea024b1ab6e09, 0x3feea0694fde5d3f, 0x3feea0b938ac1cf6, + 0x3feea11473eb0187, 0x3feea17b0976cfdb, 0x3feea1ed0130c132, + 0x3feea26a62ff86f0, 0x3feea2f336cf4e62, 0x3feea3878491c491, + 0x3feea427543e1a12, 0x3feea4d2add106d9, 0x3feea589994cce13, + 0x3feea64c1eb941f7, 0x3feea71a4623c7ad, 0x3feea7f4179f5b21, + 0x3feea8d99b4492ed, 0x3feea9cad931a436, 0x3feeaac7d98a6699, + 0x3feeabd0a478580f, 0x3feeace5422aa0db, 0x3feeae05bad61778, + 0x3feeaf3216b5448c, 0x3feeb06a5e0866d9, 0x3feeb1ae99157736, + 0x3feeb2fed0282c8a, 0x3feeb45b0b91ffc6, 0x3feeb5c353aa2fe2, + 0x3feeb737b0cdc5e5, 0x3feeb8b82b5f98e5, 0x3feeba44cbc8520f, + 0x3feebbdd9a7670b3, 0x3feebd829fde4e50, 0x3feebf33e47a22a2, + 0x3feec0f170ca07ba, 0x3feec2bb4d53fe0d, 0x3feec49182a3f090, + 0x3feec674194bb8d5, 0x3feec86319e32323, 0x3feeca5e8d07f29e, + 0x3feecc667b5de565, 0x3feece7aed8eb8bb, 0x3feed09bec4a2d33, + 0x3feed2c980460ad8, 0x3feed503b23e255d, 0x3feed74a8af46052, + 0x3feed99e1330b358, 0x3feedbfe53c12e59, 0x3feede6b5579fdbf, + 0x3feee0e521356eba, 0x3feee36bbfd3f37a, 0x3feee5ff3a3c2774, + 0x3feee89f995ad3ad, 0x3feeeb4ce622f2ff, 0x3feeee07298db666, + 0x3feef0ce6c9a8952, 0x3feef3a2b84f15fb, 0x3feef68415b749b1, + 0x3feef9728de5593a, 0x3feefc6e29f1c52a, 0x3feeff76f2fb5e47, + 0x3fef028cf22749e4, 0x3fef05b030a1064a, 0x3fef08e0b79a6f1f, + 0x3fef0c1e904bc1d2, 0x3fef0f69c3f3a207, 0x3fef12c25bd71e09, + 0x3fef16286141b33d, 0x3fef199bdd85529c, 0x3fef1d1cd9fa652c, + 0x3fef20ab5fffd07a, 0x3fef244778fafb22, 0x3fef27f12e57d14b, + 0x3fef2ba88988c933, 0x3fef2f6d9406e7b5, 0x3fef33405751c4db, + 0x3fef3720dcef9069, 0x3fef3b0f2e6d1675, 0x3fef3f0b555dc3fa, + 0x3fef43155b5bab74, 0x3fef472d4a07897c, 0x3fef4b532b08c968, + 0x3fef4f87080d89f2, 0x3fef53c8eacaa1d6, 0x3fef5818dcfba487, + 0x3fef5c76e862e6d3, 0x3fef60e316c98398, 0x3fef655d71ff6075, + 0x3fef69e603db3285, 0x3fef6e7cd63a8315, 0x3fef7321f301b460, + 0x3fef77d5641c0658, 0x3fef7c97337b9b5f, 0x3fef81676b197d17, + 0x3fef864614f5a129, 0x3fef8b333b16ee12, 0x3fef902ee78b3ff6, + 0x3fef953924676d76, 0x3fef9a51fbc74c83, 0x3fef9f7977cdb740, + 0x3fefa4afa2a490da, 0x3fefa9f4867cca6e, 0x3fefaf482d8e67f1, + 0x3fefb4aaa2188510, 0x3fefba1bee615a27, 0x3fefbf9c1cb6412a, + 0x3fefc52b376bba97, 0x3fefcac948dd7274, 0x3fefd0765b6e4540, + 0x3fefd632798844f8, 0x3fefdbfdad9cbe14, 0x3fefe1d802243c89, + 0x3fefe7c1819e90d8, 0x3fefedba3692d514, 0x3feff3c22b8f71f1, + 0x3feff9d96b2a23d9, +# endif +}; diff --git a/contrib/arm-optimized-routines/math/aarch64/v_expf.c b/contrib/arm-optimized-routines/math/aarch64/v_expf.c new file mode 100644 index 000000000000..34e8b6081bcd --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_expf.c @@ -0,0 +1,122 @@ +/* + * Single-precision vector e^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float32x4_t poly[5]; + float32x4_t shift, inv_ln2, ln2_hi, ln2_lo; + uint32x4_t exponent_bias; +#if !WANT_SIMD_EXCEPT + float32x4_t special_bound, scale_thresh; +#endif +} data = { + /* maxerr: 1.45358 +0.5 ulp. */ + .poly = { V4 (0x1.0e4020p-7f), V4 (0x1.573e2ep-5f), V4 (0x1.555e66p-3f), + V4 (0x1.fffdb6p-2f), V4 (0x1.ffffecp-1f) }, + .shift = V4 (0x1.8p23f), + .inv_ln2 = V4 (0x1.715476p+0f), + .ln2_hi = V4 (0x1.62e4p-1f), + .ln2_lo = V4 (0x1.7f7d1cp-20f), + .exponent_bias = V4 (0x3f800000), +#if !WANT_SIMD_EXCEPT + .special_bound = V4 (126.0f), + .scale_thresh = V4 (192.0f), +#endif +}; + +#define C(i) d->poly[i] + +#if WANT_SIMD_EXCEPT + +# define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */ +# define BigBound v_u32 (0x42800000) /* asuint (0x1p6). */ +# define SpecialBound v_u32 (0x22800000) /* BigBound - TinyBound. */ + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine to special lanes. */ + return v_call_f32 (expf, x, y, cmp); +} + +#else + +# define SpecialOffset v_u32 (0x82000000) +# define SpecialBias v_u32 (0x7f000000) + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1, + float32x4_t scale, const struct data *d) +{ + /* 2^n may overflow, break it up into s1*s2. */ + uint32x4_t b = vandq_u32 (vclezq_f32 (n), SpecialOffset); + float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, SpecialBias)); + float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b)); + uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh); + float32x4_t r2 = vmulq_f32 (s1, s1); + float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1); + /* Similar to r1 but avoids double rounding in the subnormal range. */ + float32x4_t r0 = vfmaq_f32 (scale, poly, scale); + float32x4_t r = vbslq_f32 (cmp1, r1, r0); + return vbslq_f32 (cmp2, r2, r); +} + +#endif + +float32x4_t VPCS_ATTR V_NAME_F1 (exp) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t n, r, r2, scale, p, q, poly, z; + uint32x4_t cmp, e; + +#if WANT_SIMD_EXCEPT + /* asuint(x) - TinyBound >= BigBound - TinyBound. */ + cmp = vcgeq_u32 ( + vsubq_u32 (vandq_u32 (vreinterpretq_u32_f32 (x), v_u32 (0x7fffffff)), + TinyBound), + SpecialBound); + float32x4_t xm = x; + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special case handler to fix special lanes later. This is only necessary if + fenv exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = vbslq_f32 (cmp, v_f32 (1), x); +#endif + + /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ + z = vfmaq_f32 (d->shift, x, d->inv_ln2); + n = vsubq_f32 (z, d->shift); + r = vfmsq_f32 (x, n, d->ln2_hi); + r = vfmsq_f32 (r, n, d->ln2_lo); + e = vshlq_n_u32 (vreinterpretq_u32_f32 (z), 23); + scale = vreinterpretq_f32_u32 (vaddq_u32 (e, d->exponent_bias)); + +#if !WANT_SIMD_EXCEPT + cmp = vcagtq_f32 (n, d->special_bound); +#endif + + r2 = vmulq_f32 (r, r); + p = vfmaq_f32 (C (1), C (0), r); + q = vfmaq_f32 (C (3), C (2), r); + q = vfmaq_f32 (q, p, r2); + p = vmulq_f32 (C (4), r); + poly = vfmaq_f32 (p, q, r2); + + if (unlikely (v_any_u32 (cmp))) +#if WANT_SIMD_EXCEPT + return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp); +#else + return special_case (poly, n, e, cmp, scale, d); +#endif + + return vfmaq_f32 (scale, poly, scale); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_expf_1u.c b/contrib/arm-optimized-routines/math/aarch64/v_expf_1u.c new file mode 100644 index 000000000000..43d03fa34efa --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_expf_1u.c @@ -0,0 +1,77 @@ +/* + * Single-precision vector e^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const float Poly[] = { + /* maxerr: 0.36565 +0.5 ulp. */ + 0x1.6a6000p-10f, + 0x1.12718ep-7f, + 0x1.555af0p-5f, + 0x1.555430p-3f, + 0x1.fffff4p-2f, +}; +#define C0 v_f32 (Poly[0]) +#define C1 v_f32 (Poly[1]) +#define C2 v_f32 (Poly[2]) +#define C3 v_f32 (Poly[3]) +#define C4 v_f32 (Poly[4]) + +#define Shift v_f32 (0x1.8p23f) +#define InvLn2 v_f32 (0x1.715476p+0f) +#define Ln2hi v_f32 (0x1.62e4p-1f) +#define Ln2lo v_f32 (0x1.7f7d1cp-20f) + +static float32x4_t VPCS_ATTR NOINLINE +specialcase (float32x4_t poly, float32x4_t n, uint32x4_t e, float32x4_t absn) +{ + /* 2^n may overflow, break it up into s1*s2. */ + uint32x4_t b = (n <= v_f32 (0.0f)) & v_u32 (0x83000000); + float32x4_t s1 = vreinterpretq_f32_u32 (v_u32 (0x7f000000) + b); + float32x4_t s2 = vreinterpretq_f32_u32 (e - b); + uint32x4_t cmp = absn > v_f32 (192.0f); + float32x4_t r1 = s1 * s1; + float32x4_t r0 = poly * s1 * s2; + return vreinterpretq_f32_u32 ((cmp & vreinterpretq_u32_f32 (r1)) + | (~cmp & vreinterpretq_u32_f32 (r0))); +} + +float32x4_t VPCS_ATTR +_ZGVnN4v_expf_1u (float32x4_t x) +{ + float32x4_t n, r, scale, poly, absn, z; + uint32x4_t cmp, e; + + /* exp(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)] + x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ +#if 1 + z = vfmaq_f32 (Shift, x, InvLn2); + n = z - Shift; + r = vfmaq_f32 (x, n, -Ln2hi); + r = vfmaq_f32 (r, n, -Ln2lo); + e = vreinterpretq_u32_f32 (z) << 23; +#else + z = x * InvLn2; + n = vrndaq_f32 (z); + r = vfmaq_f32 (x, n, -Ln2hi); + r = vfmaq_f32 (r, n, -Ln2lo); + e = vreinterpretq_u32_s32 (vcvtaq_s32_f32 (z)) << 23; +#endif + scale = vreinterpretq_f32_u32 (e + v_u32 (0x3f800000)); + absn = vabsq_f32 (n); + cmp = absn > v_f32 (126.0f); + poly = vfmaq_f32 (C1, C0, r); + poly = vfmaq_f32 (C2, poly, r); + poly = vfmaq_f32 (C3, poly, r); + poly = vfmaq_f32 (C4, poly, r); + poly = vfmaq_f32 (v_f32 (1.0f), poly, r); + poly = vfmaq_f32 (v_f32 (1.0f), poly, r); + if (unlikely (v_any_u32 (cmp))) + return specialcase (poly, n, e, absn); + return scale * poly; +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_log.c b/contrib/arm-optimized-routines/math/aarch64/v_log.c new file mode 100644 index 000000000000..1d1c1fa62c04 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_log.c @@ -0,0 +1,100 @@ +/* + * Double-precision vector log(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + uint64x2_t min_norm; + uint32x4_t special_bound; + float64x2_t poly[5]; + float64x2_t ln2; + uint64x2_t sign_exp_mask; +} data = { + /* Worst-case error: 1.17 + 0.5 ulp. + Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */ + .poly = { V2 (-0x1.ffffffffffff7p-2), V2 (0x1.55555555170d4p-2), + V2 (-0x1.0000000399c27p-2), V2 (0x1.999b2e90e94cap-3), + V2 (-0x1.554e550bd501ep-3) }, + .ln2 = V2 (0x1.62e42fefa39efp-1), + .min_norm = V2 (0x0010000000000000), + .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */ + .sign_exp_mask = V2 (0xfff0000000000000) +}; + +#define A(i) d->poly[i] +#define N (1 << V_LOG_TABLE_BITS) +#define IndexMask (N - 1) +#define Off v_u64 (0x3fe6900900000000) + +struct entry +{ + float64x2_t invc; + float64x2_t logc; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + /* Since N is a power of 2, n % N = n & (N - 1). */ + struct entry e; + uint64_t i0 = (i[0] >> (52 - V_LOG_TABLE_BITS)) & IndexMask; + uint64_t i1 = (i[1] >> (52 - V_LOG_TABLE_BITS)) & IndexMask; + float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc); + float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc); + e.invc = vuzp1q_f64 (e0, e1); + e.logc = vuzp2q_f64 (e0, e1); + return e; +} + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, float64x2_t hi, float64x2_t r2, + uint32x2_t cmp) +{ + return v_call_f64 (log, x, vfmaq_f64 (hi, y, r2), vmovl_u32 (cmp)); +} + +float64x2_t VPCS_ATTR V_NAME_D1 (log) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + float64x2_t z, r, r2, p, y, kd, hi; + uint64x2_t ix, iz, tmp; + uint32x2_t cmp; + int64x2_t k; + struct entry e; + + ix = vreinterpretq_u64_f64 (x); + cmp = vcge_u32 (vsubhn_u64 (ix, d->min_norm), + vget_low_u32 (d->special_bound)); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = vsubq_u64 (ix, Off); + k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */ + iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask)); + z = vreinterpretq_f64_u64 (iz); + e = lookup (tmp); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); + kd = vcvtq_f64_s64 (k); + + /* hi = r + log(c) + k*Ln2. */ + hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2); + /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ + r2 = vmulq_f64 (r, r); + y = vfmaq_f64 (A (2), A (3), r); + p = vfmaq_f64 (A (0), A (1), r); + y = vfmaq_f64 (y, A (4), r2); + y = vfmaq_f64 (p, y, r2); + + if (unlikely (v_any_u32h (cmp))) + return special_case (x, y, hi, r2, cmp); + return vfmaq_f64 (hi, y, r2); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_log_data.c b/contrib/arm-optimized-routines/math/aarch64/v_log_data.c new file mode 100644 index 000000000000..82351bb14766 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_log_data.c @@ -0,0 +1,156 @@ +/* + * Lookup table for double-precision log(x) vector function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" + +#define N (1 << V_LOG_TABLE_BITS) + +const struct v_log_data __v_log_data = { + /* Algorithm: + + x = 2^k z + log(x) = k ln2 + log(c) + poly(z/c - 1) + + where z is in [a;2a) which is split into N subintervals (a=0x1.69009p-1, + N=128) and log(c) and 1/c for the ith subinterval comes from lookup tables: + + table[i].invc = 1/c + table[i].logc = (double)log(c) + + where c is near the center of the subinterval and is chosen by trying several + floating point invc candidates around 1/center and selecting one for which + the error in (double)log(c) is minimized (< 0x1p-74), except the subinterval + that contains 1 and the previous one got tweaked to avoid cancellation. */ + .table = { { 0x1.6a133d0dec120p+0, -0x1.62fe995eb963ap-2 }, + { 0x1.6815f2f3e42edp+0, -0x1.5d5a48dad6b67p-2 }, + { 0x1.661e39be1ac9ep+0, -0x1.57bde257d2769p-2 }, + { 0x1.642bfa30ac371p+0, -0x1.52294fbf2af55p-2 }, + { 0x1.623f1d916f323p+0, -0x1.4c9c7b598aa38p-2 }, + { 0x1.60578da220f65p+0, -0x1.47174fc5ff560p-2 }, + { 0x1.5e75349dea571p+0, -0x1.4199b7fa7b5cap-2 }, + { 0x1.5c97fd387a75ap+0, -0x1.3c239f48cfb99p-2 }, + { 0x1.5abfd2981f200p+0, -0x1.36b4f154d2aebp-2 }, + { 0x1.58eca051dc99cp+0, -0x1.314d9a0ff32fbp-2 }, + { 0x1.571e526d9df12p+0, -0x1.2bed85cca3cffp-2 }, + { 0x1.5554d555b3fcbp+0, -0x1.2694a11421af9p-2 }, + { 0x1.539015e2a20cdp+0, -0x1.2142d8d014fb2p-2 }, + { 0x1.51d0014ee0164p+0, -0x1.1bf81a2c77776p-2 }, + { 0x1.50148538cd9eep+0, -0x1.16b452a39c6a4p-2 }, + { 0x1.4e5d8f9f698a1p+0, -0x1.11776ffa6c67ep-2 }, + { 0x1.4cab0edca66bep+0, -0x1.0c416035020e0p-2 }, + { 0x1.4afcf1a9db874p+0, -0x1.071211aa10fdap-2 }, + { 0x1.495327136e16fp+0, -0x1.01e972e293b1bp-2 }, + { 0x1.47ad9e84af28fp+0, -0x1.f98ee587fd434p-3 }, + { 0x1.460c47b39ae15p+0, -0x1.ef5800ad716fbp-3 }, + { 0x1.446f12b278001p+0, -0x1.e52e160484698p-3 }, + { 0x1.42d5efdd720ecp+0, -0x1.db1104b19352ep-3 }, + { 0x1.4140cfe001a0fp+0, -0x1.d100ac59e0bd6p-3 }, + { 0x1.3fafa3b421f69p+0, -0x1.c6fced287c3bdp-3 }, + { 0x1.3e225c9c8ece5p+0, -0x1.bd05a7b317c29p-3 }, + { 0x1.3c98ec29a211ap+0, -0x1.b31abd229164fp-3 }, + { 0x1.3b13442a413fep+0, -0x1.a93c0edadb0a3p-3 }, + { 0x1.399156baa3c54p+0, -0x1.9f697ee30d7ddp-3 }, + { 0x1.38131639b4cdbp+0, -0x1.95a2efa9aa40ap-3 }, + { 0x1.36987540fbf53p+0, -0x1.8be843d796044p-3 }, + { 0x1.352166b648f61p+0, -0x1.82395ecc477edp-3 }, + { 0x1.33adddb3eb575p+0, -0x1.7896240966422p-3 }, + { 0x1.323dcd99fc1d3p+0, -0x1.6efe77aca8c55p-3 }, + { 0x1.30d129fefc7d2p+0, -0x1.65723e117ec5cp-3 }, + { 0x1.2f67e6b72fe7dp+0, -0x1.5bf15c0955706p-3 }, + { 0x1.2e01f7cf8b187p+0, -0x1.527bb6c111da1p-3 }, + { 0x1.2c9f518ddc86ep+0, -0x1.491133c939f8fp-3 }, + { 0x1.2b3fe86e5f413p+0, -0x1.3fb1b90c7fc58p-3 }, + { 0x1.29e3b1211b25cp+0, -0x1.365d2cc485f8dp-3 }, + { 0x1.288aa08b373cfp+0, -0x1.2d13758970de7p-3 }, + { 0x1.2734abcaa8467p+0, -0x1.23d47a721fd47p-3 }, + { 0x1.25e1c82459b81p+0, -0x1.1aa0229f25ec2p-3 }, + { 0x1.2491eb1ad59c5p+0, -0x1.117655ddebc3bp-3 }, + { 0x1.23450a54048b5p+0, -0x1.0856fbf83ab6bp-3 }, + { 0x1.21fb1bb09e578p+0, -0x1.fe83fabbaa106p-4 }, + { 0x1.20b415346d8f7p+0, -0x1.ec6e8507a56cdp-4 }, + { 0x1.1f6fed179a1acp+0, -0x1.da6d68c7cc2eap-4 }, + { 0x1.1e2e99b93c7b3p+0, -0x1.c88078462be0cp-4 }, + { 0x1.1cf011a7a882ap+0, -0x1.b6a786a423565p-4 }, + { 0x1.1bb44b97dba5ap+0, -0x1.a4e2676ac7f85p-4 }, + { 0x1.1a7b3e66cdd4fp+0, -0x1.9330eea777e76p-4 }, + { 0x1.1944e11dc56cdp+0, -0x1.8192f134d5ad9p-4 }, + { 0x1.18112aebb1a6ep+0, -0x1.70084464f0538p-4 }, + { 0x1.16e013231b7e9p+0, -0x1.5e90bdec5cb1fp-4 }, + { 0x1.15b1913f156cfp+0, -0x1.4d2c3433c5536p-4 }, + { 0x1.14859cdedde13p+0, -0x1.3bda7e219879ap-4 }, + { 0x1.135c2dc68cfa4p+0, -0x1.2a9b732d27194p-4 }, + { 0x1.12353bdb01684p+0, -0x1.196eeb2b10807p-4 }, + { 0x1.1110bf25b85b4p+0, -0x1.0854be8ef8a7ep-4 }, + { 0x1.0feeafd2f8577p+0, -0x1.ee998cb277432p-5 }, + { 0x1.0ecf062c51c3bp+0, -0x1.ccadb79919fb9p-5 }, + { 0x1.0db1baa076c8bp+0, -0x1.aae5b1d8618b0p-5 }, + { 0x1.0c96c5bb3048ep+0, -0x1.89413015d7442p-5 }, + { 0x1.0b7e20263e070p+0, -0x1.67bfe7bf158dep-5 }, + { 0x1.0a67c2acd0ce3p+0, -0x1.46618f83941bep-5 }, + { 0x1.0953a6391e982p+0, -0x1.2525df1b0618ap-5 }, + { 0x1.0841c3caea380p+0, -0x1.040c8e2f77c6ap-5 }, + { 0x1.07321489b13eap+0, -0x1.c62aad39f738ap-6 }, + { 0x1.062491aee9904p+0, -0x1.847fe3bdead9cp-6 }, + { 0x1.05193497a7cc5p+0, -0x1.43183683400acp-6 }, + { 0x1.040ff6b5f5e9fp+0, -0x1.01f31c4e1d544p-6 }, + { 0x1.0308d19aa6127p+0, -0x1.82201d1e6b69ap-7 }, + { 0x1.0203beedb0c67p+0, -0x1.00dd0f3e1bfd6p-7 }, + { 0x1.010037d38bcc2p+0, -0x1.ff6fe1feb4e53p-9 }, + { 1.0, 0.0 }, + { 0x1.fc06d493cca10p-1, 0x1.fe91885ec8e20p-8 }, + { 0x1.f81e6ac3b918fp-1, 0x1.fc516f716296dp-7 }, + { 0x1.f44546ef18996p-1, 0x1.7bb4dd70a015bp-6 }, + { 0x1.f07b10382c84bp-1, 0x1.f84c99b34b674p-6 }, + { 0x1.ecbf7070e59d4p-1, 0x1.39f9ce4fb2d71p-5 }, + { 0x1.e91213f715939p-1, 0x1.7756c0fd22e78p-5 }, + { 0x1.e572a9a75f7b7p-1, 0x1.b43ee82db8f3ap-5 }, + { 0x1.e1e0e2c530207p-1, 0x1.f0b3fced60034p-5 }, + { 0x1.de5c72d8a8be3p-1, 0x1.165bd78d4878ep-4 }, + { 0x1.dae50fa5658ccp-1, 0x1.3425d2715ebe6p-4 }, + { 0x1.d77a71145a2dap-1, 0x1.51b8bd91b7915p-4 }, + { 0x1.d41c51166623ep-1, 0x1.6f15632c76a47p-4 }, + { 0x1.d0ca6ba0bb29fp-1, 0x1.8c3c88ecbe503p-4 }, + { 0x1.cd847e8e59681p-1, 0x1.a92ef077625dap-4 }, + { 0x1.ca4a499693e00p-1, 0x1.c5ed5745fa006p-4 }, + { 0x1.c71b8e399e821p-1, 0x1.e27876de1c993p-4 }, + { 0x1.c3f80faf19077p-1, 0x1.fed104fce4cdcp-4 }, + { 0x1.c0df92dc2b0ecp-1, 0x1.0d7bd9c17d78bp-3 }, + { 0x1.bdd1de3cbb542p-1, 0x1.1b76986cef97bp-3 }, + { 0x1.baceb9e1007a3p-1, 0x1.295913d24f750p-3 }, + { 0x1.b7d5ef543e55ep-1, 0x1.37239fa295d17p-3 }, + { 0x1.b4e749977d953p-1, 0x1.44d68dd78714bp-3 }, + { 0x1.b20295155478ep-1, 0x1.52722ebe5d780p-3 }, + { 0x1.af279f8e82be2p-1, 0x1.5ff6d12671f98p-3 }, + { 0x1.ac5638197fdf3p-1, 0x1.6d64c2389484bp-3 }, + { 0x1.a98e2f102e087p-1, 0x1.7abc4da40fddap-3 }, + { 0x1.a6cf5606d05c1p-1, 0x1.87fdbda1e8452p-3 }, + { 0x1.a4197fc04d746p-1, 0x1.95295b06a5f37p-3 }, + { 0x1.a16c80293dc01p-1, 0x1.a23f6d34abbc5p-3 }, + { 0x1.9ec82c4dc5bc9p-1, 0x1.af403a28e04f2p-3 }, + { 0x1.9c2c5a491f534p-1, 0x1.bc2c06a85721ap-3 }, + { 0x1.9998e1480b618p-1, 0x1.c903161240163p-3 }, + { 0x1.970d9977c6c2dp-1, 0x1.d5c5aa93287ebp-3 }, + { 0x1.948a5c023d212p-1, 0x1.e274051823fa9p-3 }, + { 0x1.920f0303d6809p-1, 0x1.ef0e656300c16p-3 }, + { 0x1.8f9b698a98b45p-1, 0x1.fb9509f05aa2ap-3 }, + { 0x1.8d2f6b81726f6p-1, 0x1.04041821f37afp-2 }, + { 0x1.8acae5bb55badp-1, 0x1.0a340a49b3029p-2 }, + { 0x1.886db5d9275b8p-1, 0x1.105a7918a126dp-2 }, + { 0x1.8617ba567c13cp-1, 0x1.1677819812b84p-2 }, + { 0x1.83c8d27487800p-1, 0x1.1c8b405b40c0ep-2 }, + { 0x1.8180de3c5dbe7p-1, 0x1.2295d16cfa6b1p-2 }, + { 0x1.7f3fbe71cdb71p-1, 0x1.28975066318a2p-2 }, + { 0x1.7d055498071c1p-1, 0x1.2e8fd855d86fcp-2 }, + { 0x1.7ad182e54f65ap-1, 0x1.347f83d605e59p-2 }, + { 0x1.78a42c3c90125p-1, 0x1.3a666d1244588p-2 }, + { 0x1.767d342f76944p-1, 0x1.4044adb6f8ec4p-2 }, + { 0x1.745c7ef26b00ap-1, 0x1.461a5f077558cp-2 }, + { 0x1.7241f15769d0fp-1, 0x1.4be799e20b9c8p-2 }, + { 0x1.702d70d396e41p-1, 0x1.51ac76a6b79dfp-2 }, + { 0x1.6e1ee3700cd11p-1, 0x1.57690d5744a45p-2 }, + { 0x1.6c162fc9cbe02p-1, 0x1.5d1d758e45217p-2 } } +}; diff --git a/contrib/arm-optimized-routines/math/aarch64/v_logf.c b/contrib/arm-optimized-routines/math/aarch64/v_logf.c new file mode 100644 index 000000000000..66ebbbcd2b5a --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_logf.c @@ -0,0 +1,74 @@ +/* + * Single-precision vector log function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + uint32x4_t min_norm; + uint16x8_t special_bound; + float32x4_t poly[7]; + float32x4_t ln2, tiny_bound; + uint32x4_t off, mantissa_mask; +} data = { + /* 3.34 ulp error. */ + .poly = { V4 (-0x1.3e737cp-3f), V4 (0x1.5a9aa2p-3f), V4 (-0x1.4f9934p-3f), + V4 (0x1.961348p-3f), V4 (-0x1.00187cp-2f), V4 (0x1.555d7cp-2f), + V4 (-0x1.ffffc8p-2f) }, + .ln2 = V4 (0x1.62e43p-1f), + .tiny_bound = V4 (0x1p-126), + .min_norm = V4 (0x00800000), + .special_bound = V8 (0x7f00), /* asuint32(inf) - min_norm. */ + .off = V4 (0x3f2aaaab), /* 0.666667. */ + .mantissa_mask = V4 (0x007fffff) +}; + +#define P(i) d->poly[7 - i] + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, float32x4_t r2, float32x4_t p, + uint16x4_t cmp) +{ + /* Fall back to scalar code. */ + return v_call_f32 (logf, x, vfmaq_f32 (p, y, r2), vmovl_u16 (cmp)); +} + +float32x4_t VPCS_ATTR V_NAME_F1 (log) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t n, p, q, r, r2, y; + uint32x4_t u; + uint16x4_t cmp; + + u = vreinterpretq_u32_f32 (x); + cmp = vcge_u16 (vsubhn_u32 (u, d->min_norm), + vget_low_u16 (d->special_bound)); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = vsubq_u32 (u, d->off); + n = vcvtq_f32_s32 ( + vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend. */ + u = vandq_u32 (u, d->mantissa_mask); + u = vaddq_u32 (u, d->off); + r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f)); + + /* y = log(1+r) + n*ln2. */ + r2 = vmulq_f32 (r, r); + /* n*ln2 + r + r2*(P1 + r*P2 + r2*(P3 + r*P4 + r2*(P5 + r*P6 + r2*P7))). */ + p = vfmaq_f32 (P (5), P (6), r); + q = vfmaq_f32 (P (3), P (4), r); + y = vfmaq_f32 (P (1), P (2), r); + p = vfmaq_f32 (p, P (7), r2); + q = vfmaq_f32 (q, p, r2); + y = vfmaq_f32 (y, q, r2); + p = vfmaq_f32 (r, d->ln2, n); + + if (unlikely (v_any_u16h (cmp))) + return special_case (x, y, r2, p, cmp); + return vfmaq_f32 (p, y, r2); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_math.h b/contrib/arm-optimized-routines/math/aarch64/v_math.h new file mode 100644 index 000000000000..1dc9916c6fb0 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_math.h @@ -0,0 +1,135 @@ +/* + * Vector math abstractions. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef _V_MATH_H +#define _V_MATH_H + +#if !__aarch64__ +# error "Cannot build without AArch64" +#endif + +#define VPCS_ATTR __attribute__ ((aarch64_vector_pcs)) + +#define V_NAME_F1(fun) _ZGVnN4v_##fun##f +#define V_NAME_D1(fun) _ZGVnN2v_##fun +#define V_NAME_F2(fun) _ZGVnN4vv_##fun##f +#define V_NAME_D2(fun) _ZGVnN2vv_##fun + +#include <stdint.h> +#include "../math_config.h" +#include <arm_neon.h> + +/* Shorthand helpers for declaring constants. */ +# define V2(X) { X, X } +# define V4(X) { X, X, X, X } +# define V8(X) { X, X, X, X, X, X, X, X } + +static inline int +v_any_u16h (uint16x4_t x) +{ + return vget_lane_u64 (vreinterpret_u64_u16 (x), 0) != 0; +} + +static inline int +v_lanes32 (void) +{ + return 4; +} + +static inline float32x4_t +v_f32 (float x) +{ + return (float32x4_t) V4 (x); +} +static inline uint32x4_t +v_u32 (uint32_t x) +{ + return (uint32x4_t) V4 (x); +} +/* true if any elements of a v_cond result is non-zero. */ +static inline int +v_any_u32 (uint32x4_t x) +{ + /* assume elements in x are either 0 or -1u. */ + return vpaddd_u64 (vreinterpretq_u64_u32 (x)) != 0; +} +static inline int +v_any_u32h (uint32x2_t x) +{ + return vget_lane_u64 (vreinterpret_u64_u32 (x), 0) != 0; +} +static inline float32x4_t +v_lookup_f32 (const float *tab, uint32x4_t idx) +{ + return (float32x4_t){tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]]}; +} +static inline uint32x4_t +v_lookup_u32 (const uint32_t *tab, uint32x4_t idx) +{ + return (uint32x4_t){tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]]}; +} +static inline float32x4_t +v_call_f32 (float (*f) (float), float32x4_t x, float32x4_t y, uint32x4_t p) +{ + return (float32x4_t){p[0] ? f (x[0]) : y[0], p[1] ? f (x[1]) : y[1], + p[2] ? f (x[2]) : y[2], p[3] ? f (x[3]) : y[3]}; +} +static inline float32x4_t +v_call2_f32 (float (*f) (float, float), float32x4_t x1, float32x4_t x2, + float32x4_t y, uint32x4_t p) +{ + return (float32x4_t){p[0] ? f (x1[0], x2[0]) : y[0], + p[1] ? f (x1[1], x2[1]) : y[1], + p[2] ? f (x1[2], x2[2]) : y[2], + p[3] ? f (x1[3], x2[3]) : y[3]}; +} + +static inline int +v_lanes64 (void) +{ + return 2; +} +static inline float64x2_t +v_f64 (double x) +{ + return (float64x2_t) V2 (x); +} +static inline uint64x2_t +v_u64 (uint64_t x) +{ + return (uint64x2_t) V2 (x); +} +/* true if any elements of a v_cond result is non-zero. */ +static inline int +v_any_u64 (uint64x2_t x) +{ + /* assume elements in x are either 0 or -1u. */ + return vpaddd_u64 (x) != 0; +} +static inline float64x2_t +v_lookup_f64 (const double *tab, uint64x2_t idx) +{ + return (float64x2_t){tab[idx[0]], tab[idx[1]]}; +} +static inline uint64x2_t +v_lookup_u64 (const uint64_t *tab, uint64x2_t idx) +{ + return (uint64x2_t){tab[idx[0]], tab[idx[1]]}; +} +static inline float64x2_t +v_call_f64 (double (*f) (double), float64x2_t x, float64x2_t y, uint64x2_t p) +{ + double p1 = p[1]; + double x1 = x[1]; + if (likely (p[0])) + y[0] = f (x[0]); + if (likely (p1)) + y[1] = f (x1); + return y; +} + +#endif diff --git a/contrib/arm-optimized-routines/math/aarch64/v_pow.c b/contrib/arm-optimized-routines/math/aarch64/v_pow.c new file mode 100644 index 000000000000..734f1663a283 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_pow.c @@ -0,0 +1,22 @@ +/* + * Double-precision vector pow function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +float64x2_t VPCS_ATTR V_NAME_D2 (pow) (float64x2_t x, float64x2_t y) +{ + float64x2_t z; + for (int lane = 0; lane < v_lanes64 (); lane++) + { + double sx = x[lane]; + double sy = y[lane]; + double sz = pow (sx, sy); + z[lane] = sz; + } + return z; +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_powf.c b/contrib/arm-optimized-routines/math/aarch64/v_powf.c new file mode 100644 index 000000000000..3a4163ab0558 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_powf.c @@ -0,0 +1,148 @@ +/* + * Single-precision vector powf function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" + +#define Min v_u32 (0x00800000) +#define Max v_u32 (0x7f800000) +#define Thresh v_u32 (0x7f000000) /* Max - Min. */ +#define MantissaMask v_u32 (0x007fffff) + +#define A data.log2_poly +#define C data.exp2f_poly + +/* 2.6 ulp ~ 0.5 + 2^24 (128*Ln2*relerr_log2 + relerr_exp2). */ +#define Off v_u32 (0x3f35d000) + +#define V_POWF_LOG2_TABLE_BITS 5 +#define V_EXP2F_TABLE_BITS 5 +#define Log2IdxMask v_u32 ((1 << V_POWF_LOG2_TABLE_BITS) - 1) +#define Scale ((double) (1 << V_EXP2F_TABLE_BITS)) + +static const struct +{ + struct + { + double invc, logc; + } log2_tab[1 << V_POWF_LOG2_TABLE_BITS]; + double log2_poly[4]; + uint64_t exp2f_tab[1 << V_EXP2F_TABLE_BITS]; + double exp2f_poly[3]; +} data = { + .log2_tab = {{0x1.6489890582816p+0, -0x1.e960f97b22702p-2 * Scale}, + {0x1.5cf19b35e3472p+0, -0x1.c993406cd4db6p-2 * Scale}, + {0x1.55aac0e956d65p+0, -0x1.aa711d9a7d0f3p-2 * Scale}, + {0x1.4eb0022977e01p+0, -0x1.8bf37bacdce9bp-2 * Scale}, + {0x1.47fcccda1dd1fp+0, -0x1.6e13b3519946ep-2 * Scale}, + {0x1.418ceabab68c1p+0, -0x1.50cb8281e4089p-2 * Scale}, + {0x1.3b5c788f1edb3p+0, -0x1.341504a237e2bp-2 * Scale}, + {0x1.3567de48e9c9ap+0, -0x1.17eaab624ffbbp-2 * Scale}, + {0x1.2fabc80fd19bap+0, -0x1.f88e708f8c853p-3 * Scale}, + {0x1.2a25200ce536bp+0, -0x1.c24b6da113914p-3 * Scale}, + {0x1.24d108e0152e3p+0, -0x1.8d02ee397cb1dp-3 * Scale}, + {0x1.1facd8ab2fbe1p+0, -0x1.58ac1223408b3p-3 * Scale}, + {0x1.1ab614a03efdfp+0, -0x1.253e6fd190e89p-3 * Scale}, + {0x1.15ea6d03af9ffp+0, -0x1.e5641882c12ffp-4 * Scale}, + {0x1.1147b994bb776p+0, -0x1.81fea712926f7p-4 * Scale}, + {0x1.0ccbf650593aap+0, -0x1.203e240de64a3p-4 * Scale}, + {0x1.0875408477302p+0, -0x1.8029b86a78281p-5 * Scale}, + {0x1.0441d42a93328p+0, -0x1.85d713190fb9p-6 * Scale}, + {0x1p+0, 0x0p+0 * Scale}, + {0x1.f1d006c855e86p-1, 0x1.4c1cc07312997p-5 * Scale}, + {0x1.e28c3341aa301p-1, 0x1.5e1848ccec948p-4 * Scale}, + {0x1.d4bdf9aa64747p-1, 0x1.04cfcb7f1196fp-3 * Scale}, + {0x1.c7b45a24e5803p-1, 0x1.582813d463c21p-3 * Scale}, + {0x1.bb5f5eb2ed60ap-1, 0x1.a936fa68760ccp-3 * Scale}, + {0x1.afb0bff8fe6b4p-1, 0x1.f81bc31d6cc4ep-3 * Scale}, + {0x1.a49badf7ab1f5p-1, 0x1.2279a09fae6b1p-2 * Scale}, + {0x1.9a14a111fc4c9p-1, 0x1.47ec0b6df5526p-2 * Scale}, + {0x1.901131f5b2fdcp-1, 0x1.6c71762280f1p-2 * Scale}, + {0x1.8687f73f6d865p-1, 0x1.90155070798dap-2 * Scale}, + {0x1.7d7067eb77986p-1, 0x1.b2e23b1d3068cp-2 * Scale}, + {0x1.74c2c1cf97b65p-1, 0x1.d4e21b0daa86ap-2 * Scale}, + {0x1.6c77f37cff2a1p-1, 0x1.f61e2a2f67f3fp-2 * Scale},}, + .log2_poly = { /* rel err: 1.5 * 2^-30. */ + -0x1.6ff5daa3b3d7cp-2 * Scale, 0x1.ec81d03c01aebp-2 * Scale, + -0x1.71547bb43f101p-1 * Scale, 0x1.7154764a815cbp0 * Scale,}, + .exp2f_tab = {0x3ff0000000000000, 0x3fefd9b0d3158574, 0x3fefb5586cf9890f, + 0x3fef9301d0125b51, 0x3fef72b83c7d517b, 0x3fef54873168b9aa, + 0x3fef387a6e756238, 0x3fef1e9df51fdee1, 0x3fef06fe0a31b715, + 0x3feef1a7373aa9cb, 0x3feedea64c123422, 0x3feece086061892d, + 0x3feebfdad5362a27, 0x3feeb42b569d4f82, 0x3feeab07dd485429, + 0x3feea47eb03a5585, 0x3feea09e667f3bcd, 0x3fee9f75e8ec5f74, + 0x3feea11473eb0187, 0x3feea589994cce13, 0x3feeace5422aa0db, + 0x3feeb737b0cdc5e5, 0x3feec49182a3f090, 0x3feed503b23e255d, + 0x3feee89f995ad3ad, 0x3feeff76f2fb5e47, 0x3fef199bdd85529c, + 0x3fef3720dcef9069, 0x3fef5818dcfba487, 0x3fef7c97337b9b5f, + 0x3fefa4afa2a490da, 0x3fefd0765b6e4540,}, + .exp2f_poly = { /* rel err: 1.69 * 2^-34. */ + 0x1.c6af84b912394p-5 / Scale / Scale / Scale, + 0x1.ebfce50fac4f3p-3 / Scale / Scale, + 0x1.62e42ff0c52d6p-1 / Scale}}; + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, float32x4_t ret, uint32x4_t cmp) +{ + return v_call2_f32 (powf, x, y, ret, cmp); +} + +float32x4_t VPCS_ATTR V_NAME_F2 (pow) (float32x4_t x, float32x4_t y) +{ + uint32x4_t u = vreinterpretq_u32_f32 (x); + uint32x4_t cmp = vcgeq_u32 (vsubq_u32 (u, Min), Thresh); + uint32x4_t tmp = vsubq_u32 (u, Off); + uint32x4_t i = vandq_u32 (vshrq_n_u32 (tmp, (23 - V_POWF_LOG2_TABLE_BITS)), + Log2IdxMask); + uint32x4_t top = vbicq_u32 (tmp, MantissaMask); + uint32x4_t iz = vsubq_u32 (u, top); + int32x4_t k = vshrq_n_s32 (vreinterpretq_s32_u32 (top), + 23 - V_EXP2F_TABLE_BITS); /* arithmetic shift. */ + + float32x4_t ret; + for (int lane = 0; lane < 4; lane++) + { + /* Use double precision for each lane. */ + double invc = data.log2_tab[i[lane]].invc; + double logc = data.log2_tab[i[lane]].logc; + double z = (double) asfloat (iz[lane]); + + /* log2(x) = log1p(z/c-1)/ln2 + log2(c) + k. */ + double r = __builtin_fma (z, invc, -1.0); + double y0 = logc + (double) k[lane]; + + /* Polynomial to approximate log1p(r)/ln2. */ + double logx = A[0]; + logx = r * logx + A[1]; + logx = r * logx + A[2]; + logx = r * logx + A[3]; + logx = r * logx + y0; + double ylogx = y[lane] * logx; + cmp[lane] = (asuint64 (ylogx) >> 47 & 0xffff) + >= asuint64 (126.0 * (1 << V_EXP2F_TABLE_BITS)) >> 47 + ? 1 + : cmp[lane]; + + /* N*x = k + r with r in [-1/2, 1/2]. */ + double kd = round (ylogx); + uint64_t ki = lround (ylogx); + r = ylogx - kd; + + /* exp2(x) = 2^(k/N) * 2^r ~= s * (C0*r^3 + C1*r^2 + C2*r + 1). */ + uint64_t t = data.exp2f_tab[ki % (1 << V_EXP2F_TABLE_BITS)]; + t += ki << (52 - V_EXP2F_TABLE_BITS); + double s = asdouble (t); + double p = C[0]; + p = __builtin_fma (p, r, C[1]); + p = __builtin_fma (p, r, C[2]); + p = __builtin_fma (p, s * r, s); + + ret[lane] = p; + } + if (unlikely (v_any_u32 (cmp))) + return special_case (x, y, ret, cmp); + return ret; +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_sin.c b/contrib/arm-optimized-routines/math/aarch64/v_sin.c new file mode 100644 index 000000000000..04129c31133d --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_sin.c @@ -0,0 +1,97 @@ +/* + * Double-precision vector sin function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float64x2_t poly[7]; + float64x2_t range_val, inv_pi, shift, pi_1, pi_2, pi_3; +} data = { + .poly = { V2 (-0x1.555555555547bp-3), V2 (0x1.1111111108a4dp-7), + V2 (-0x1.a01a019936f27p-13), V2 (0x1.71de37a97d93ep-19), + V2 (-0x1.ae633919987c6p-26), V2 (0x1.60e277ae07cecp-33), + V2 (-0x1.9e9540300a1p-41) }, + + .range_val = V2 (0x1p23), + .inv_pi = V2 (0x1.45f306dc9c883p-2), + .pi_1 = V2 (0x1.921fb54442d18p+1), + .pi_2 = V2 (0x1.1a62633145c06p-53), + .pi_3 = V2 (0x1.c1cd129024e09p-106), + .shift = V2 (0x1.8p52), +}; + +#if WANT_SIMD_EXCEPT +# define TinyBound v_u64 (0x3000000000000000) /* asuint64 (0x1p-255). */ +# define Thresh v_u64 (0x1160000000000000) /* RangeVal - TinyBound. */ +#endif + +#define C(i) d->poly[i] + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t odd, uint64x2_t cmp) +{ + y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); + return v_call_f64 (sin, x, y, cmp); +} + +/* Vector (AdvSIMD) sin approximation. + Maximum observed error in [-pi/2, pi/2], where argument is not reduced, + is 2.87 ULP: + _ZGVnN2v_sin (0x1.921d5c6a07142p+0) got 0x1.fffffffa7dc02p-1 + want 0x1.fffffffa7dc05p-1 + Maximum observed error in the entire non-special domain ([-2^23, 2^23]) + is 3.22 ULP: + _ZGVnN2v_sin (0x1.5702447b6f17bp+22) got 0x1.ffdcd125c84fbp-3 + want 0x1.ffdcd125c84f8p-3. */ +float64x2_t VPCS_ATTR V_NAME_D1 (sin) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + float64x2_t n, r, r2, r3, r4, y, t1, t2, t3; + uint64x2_t odd, cmp; + +#if WANT_SIMD_EXCEPT + /* Detect |x| <= TinyBound or |x| >= RangeVal. If fenv exceptions are to be + triggered correctly, set any special lanes to 1 (which is neutral w.r.t. + fenv). These lanes will be fixed by special-case handler later. */ + uint64x2_t ir = vreinterpretq_u64_f64 (vabsq_f64 (x)); + cmp = vcgeq_u64 (vsubq_u64 (ir, TinyBound), Thresh); + r = vbslq_f64 (cmp, vreinterpretq_f64_u64 (cmp), x); +#else + r = x; + cmp = vcageq_f64 (x, d->range_val); +#endif + + /* n = rint(|x|/pi). */ + n = vfmaq_f64 (d->shift, d->inv_pi, r); + odd = vshlq_n_u64 (vreinterpretq_u64_f64 (n), 63); + n = vsubq_f64 (n, d->shift); + + /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ + r = vfmsq_f64 (r, d->pi_1, n); + r = vfmsq_f64 (r, d->pi_2, n); + r = vfmsq_f64 (r, d->pi_3, n); + + /* sin(r) poly approx. */ + r2 = vmulq_f64 (r, r); + r3 = vmulq_f64 (r2, r); + r4 = vmulq_f64 (r2, r2); + + t1 = vfmaq_f64 (C (4), C (5), r2); + t2 = vfmaq_f64 (C (2), C (3), r2); + t3 = vfmaq_f64 (C (0), C (1), r2); + + y = vfmaq_f64 (t1, C (6), r4); + y = vfmaq_f64 (t2, y, r4); + y = vfmaq_f64 (t3, y, r4); + y = vfmaq_f64 (r, y, r3); + + if (unlikely (v_any_u64 (cmp))) + return special_case (x, y, odd, cmp); + return vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); +} diff --git a/contrib/arm-optimized-routines/math/aarch64/v_sinf.c b/contrib/arm-optimized-routines/math/aarch64/v_sinf.c new file mode 100644 index 000000000000..336879844459 --- /dev/null +++ b/contrib/arm-optimized-routines/math/aarch64/v_sinf.c @@ -0,0 +1,82 @@ +/* + * Single-precision vector sin function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" + +static const struct data +{ + float32x4_t poly[4]; + float32x4_t range_val, inv_pi, shift, pi_1, pi_2, pi_3; +} data = { + /* 1.886 ulp error. */ + .poly = { V4 (-0x1.555548p-3f), V4 (0x1.110df4p-7f), V4 (-0x1.9f42eap-13f), + V4 (0x1.5b2e76p-19f) }, + + .pi_1 = V4 (0x1.921fb6p+1f), + .pi_2 = V4 (-0x1.777a5cp-24f), + .pi_3 = V4 (-0x1.ee59dap-49f), + + .inv_pi = V4 (0x1.45f306p-2f), + .shift = V4 (0x1.8p+23f), + .range_val = V4 (0x1p20f) +}; + +#if WANT_SIMD_EXCEPT +# define TinyBound v_u32 (0x21000000) /* asuint32(0x1p-61f). */ +# define Thresh v_u32 (0x28800000) /* RangeVal - TinyBound. */ +#endif + +#define C(i) d->poly[i] + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp) +{ + /* Fall back to scalar code. */ + y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); + return v_call_f32 (sinf, x, y, cmp); +} + +float32x4_t VPCS_ATTR V_NAME_F1 (sin) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t n, r, r2, y; + uint32x4_t odd, cmp; + +#if WANT_SIMD_EXCEPT + uint32x4_t ir = vreinterpretq_u32_f32 (vabsq_f32 (x)); + cmp = vcgeq_u32 (vsubq_u32 (ir, TinyBound), Thresh); + /* If fenv exceptions are to be triggered correctly, set any special lanes + to 1 (which is neutral w.r.t. fenv). These lanes will be fixed by + special-case handler later. */ + r = vbslq_f32 (cmp, vreinterpretq_f32_u32 (cmp), x); +#else + r = x; + cmp = vcageq_f32 (x, d->range_val); +#endif + + /* n = rint(|x|/pi) */ + n = vfmaq_f32 (d->shift, d->inv_pi, r); + odd = vshlq_n_u32 (vreinterpretq_u32_f32 (n), 31); + n = vsubq_f32 (n, d->shift); + + /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2) */ + r = vfmsq_f32 (r, d->pi_1, n); + r = vfmsq_f32 (r, d->pi_2, n); + r = vfmsq_f32 (r, d->pi_3, n); + + /* y = sin(r) */ + r2 = vmulq_f32 (r, r); + y = vfmaq_f32 (C (2), C (3), r2); + y = vfmaq_f32 (C (1), y, r2); + y = vfmaq_f32 (C (0), y, r2); + y = vfmaq_f32 (r, vmulq_f32 (y, r2), r); + + if (unlikely (v_any_u32 (cmp))) + return special_case (x, y, odd, cmp); + return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); +} diff --git a/contrib/arm-optimized-routines/math/cosf.c b/contrib/arm-optimized-routines/math/cosf.c index f29f19474e23..6293ce8f1b7d 100644 --- a/contrib/arm-optimized-routines/math/cosf.c +++ b/contrib/arm-optimized-routines/math/cosf.c @@ -1,8 +1,8 @@ /* * Single-precision cos function. * - * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -22,7 +22,7 @@ cosf (float y) int n; const sincos_t *p = &__sincosf_table[0]; - if (abstop12 (y) < abstop12 (pio4)) + if (abstop12 (y) < abstop12 (pio4f)) { double x2 = x * x; diff --git a/contrib/arm-optimized-routines/math/erf.c b/contrib/arm-optimized-routines/math/erf.c index 12d7e5160df7..5f9f40dda264 100644 --- a/contrib/arm-optimized-routines/math/erf.c +++ b/contrib/arm-optimized-routines/math/erf.c @@ -2,7 +2,7 @@ * Double-precision erf(x) function. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/erf_data.c b/contrib/arm-optimized-routines/math/erf_data.c index 807875bdd7f5..10cf1fae93e0 100644 --- a/contrib/arm-optimized-routines/math/erf_data.c +++ b/contrib/arm-optimized-routines/math/erf_data.c @@ -2,7 +2,7 @@ * Shared data between erf and erfc. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/erff.c b/contrib/arm-optimized-routines/math/erff.c index a58e82565dc3..9fa476dbbab2 100644 --- a/contrib/arm-optimized-routines/math/erff.c +++ b/contrib/arm-optimized-routines/math/erff.c @@ -2,7 +2,7 @@ * Single-precision erf(x) function. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/math/erff_data.c b/contrib/arm-optimized-routines/math/erff_data.c index fa6b1ef4dedb..f822788d0dd8 100644 --- a/contrib/arm-optimized-routines/math/erff_data.c +++ b/contrib/arm-optimized-routines/math/erff_data.c @@ -2,7 +2,7 @@ * Data for approximation of erff. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/exp.c b/contrib/arm-optimized-routines/math/exp.c index 7f5024cd8792..1de500c31f3e 100644 --- a/contrib/arm-optimized-routines/math/exp.c +++ b/contrib/arm-optimized-routines/math/exp.c @@ -2,7 +2,7 @@ * Double-precision e^x function. * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <float.h> diff --git a/contrib/arm-optimized-routines/math/exp10.c b/contrib/arm-optimized-routines/math/exp10.c new file mode 100644 index 000000000000..0fbec4c694ca --- /dev/null +++ b/contrib/arm-optimized-routines/math/exp10.c @@ -0,0 +1,129 @@ +/* + * Double-precision 10^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << EXP_TABLE_BITS) +#define IndexMask (N - 1) +#define OFlowBound 0x1.34413509f79ffp8 /* log10(DBL_MAX). */ +#define UFlowBound -0x1.5ep+8 /* -350. */ +#define SmallTop 0x3c6 /* top12(0x1p-57). */ +#define BigTop 0x407 /* top12(0x1p8). */ +#define Thresh 0x41 /* BigTop - SmallTop. */ +#define Shift __exp_data.shift +#define C(i) __exp_data.exp10_poly[i] + +static double +special_case (uint64_t sbits, double_t tmp, uint64_t ki) +{ + double_t scale, y; + + if (ki - (1ull << 16) < 0x80000000) + { + /* The exponent of scale might have overflowed by 1. */ + sbits -= 1ull << 52; + scale = asdouble (sbits); + y = 2 * (scale + scale * tmp); + return check_oflow (eval_as_double (y)); + } + + /* n < 0, need special care in the subnormal range. */ + sbits += 1022ull << 52; + scale = asdouble (sbits); + y = scale + scale * tmp; + + if (y < 1.0) + { + /* Round y to the right precision before scaling it into the subnormal + range to avoid double rounding that can cause 0.5+E/2 ulp error where + E is the worst-case ulp error outside the subnormal range. So this + is only useful if the goal is better than 1 ulp worst-case error. */ + double_t lo = scale - y + scale * tmp; + double_t hi = 1.0 + y; + lo = 1.0 - hi + y + lo; + y = eval_as_double (hi + lo) - 1.0; + /* Avoid -0.0 with downward rounding. */ + if (WANT_ROUNDING && y == 0.0) + y = 0.0; + /* The underflow exception needs to be signaled explicitly. */ + force_eval_double (opt_barrier_double (0x1p-1022) * 0x1p-1022); + } + y = 0x1p-1022 * y; + + return check_uflow (y); +} + +/* Double-precision 10^x approximation. Largest observed error is ~0.513 ULP. */ +double +exp10 (double x) +{ + uint64_t ix = asuint64 (x); + uint32_t abstop = (ix >> 52) & 0x7ff; + + if (unlikely (abstop - SmallTop >= Thresh)) + { + if (abstop - SmallTop >= 0x80000000) + /* Avoid spurious underflow for tiny x. + Note: 0 is common input. */ + return x + 1; + if (abstop == 0x7ff) + return ix == asuint64 (-INFINITY) ? 0.0 : x + 1.0; + if (x >= OFlowBound) + return __math_oflow (0); + if (x < UFlowBound) + return __math_uflow (0); + + /* Large x is special-cased below. */ + abstop = 0; + } + + /* Reduce x: z = x * N / log10(2), k = round(z). */ + double_t z = __exp_data.invlog10_2N * x; + double_t kd; + int64_t ki; +#if TOINT_INTRINSICS + kd = roundtoint (z); + ki = converttoint (z); +#else + kd = eval_as_double (z + Shift); + kd -= Shift; + ki = kd; +#endif + + /* r = x - k * log10(2), r in [-0.5, 0.5]. */ + double_t r = x; + r = __exp_data.neglog10_2hiN * kd + r; + r = __exp_data.neglog10_2loN * kd + r; + + /* exp10(x) = 2^(k/N) * 2^(r/N). + Approximate the two components separately. */ + + /* s = 2^(k/N), using lookup table. */ + uint64_t e = ki << (52 - EXP_TABLE_BITS); + uint64_t i = (ki & IndexMask) * 2; + uint64_t u = __exp_data.tab[i + 1]; + uint64_t sbits = u + e; + + double_t tail = asdouble (__exp_data.tab[i]); + + /* 2^(r/N) ~= 1 + r * Poly(r). */ + double_t r2 = r * r; + double_t p = C (0) + r * C (1); + double_t y = C (2) + r * C (3); + y = y + r2 * C (4); + y = p + r2 * y; + y = tail + y * r; + + if (unlikely (abstop == 0)) + return special_case (sbits, y, ki); + + /* Assemble components: + y = 2^(r/N) * 2^(k/N) + ~= (y + 1) * s. */ + double_t s = asdouble (sbits); + return eval_as_double (s * y + s); +} diff --git a/contrib/arm-optimized-routines/math/exp2.c b/contrib/arm-optimized-routines/math/exp2.c index 35ab39f22ed5..a1eee44f1f48 100644 --- a/contrib/arm-optimized-routines/math/exp2.c +++ b/contrib/arm-optimized-routines/math/exp2.c @@ -2,7 +2,7 @@ * Double-precision 2^x function. * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <float.h> diff --git a/contrib/arm-optimized-routines/math/exp2f.c b/contrib/arm-optimized-routines/math/exp2f.c index 94b32538aa0d..776c3ddf7663 100644 --- a/contrib/arm-optimized-routines/math/exp2f.c +++ b/contrib/arm-optimized-routines/math/exp2f.c @@ -2,7 +2,7 @@ * Single-precision 2^x function. * * Copyright (c) 2017-2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> diff --git a/contrib/arm-optimized-routines/math/exp2f_data.c b/contrib/arm-optimized-routines/math/exp2f_data.c index 3fb0ad11b15a..f0cb7fccacd1 100644 --- a/contrib/arm-optimized-routines/math/exp2f_data.c +++ b/contrib/arm-optimized-routines/math/exp2f_data.c @@ -2,7 +2,7 @@ * Shared data between expf, exp2f and powf. * * Copyright (c) 2017-2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/exp_data.c b/contrib/arm-optimized-routines/math/exp_data.c index cba76832566f..c20b1b2d3e06 100644 --- a/contrib/arm-optimized-routines/math/exp_data.c +++ b/contrib/arm-optimized-routines/math/exp_data.c @@ -1,8 +1,8 @@ /* * Shared data between exp, exp2 and pow. * - * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" @@ -12,6 +12,7 @@ const struct exp_data __exp_data = { // N/ln2 .invln2N = 0x1.71547652b82fep0 * N, +.invlog10_2N = 0x1.a934f0979a371p1 * N, // -ln2/N #if N == 64 .negln2hiN = -0x1.62e42fefa0000p-7, @@ -26,6 +27,8 @@ const struct exp_data __exp_data = { .negln2hiN = -0x1.62e42fef80000p-10, .negln2loN = -0x1.1cf79abc9e3b4p-45, #endif +.neglog10_2hiN = -0x1.3441350ap-2 / N, +.neglog10_2loN = 0x1.0c0219dc1da99p-39 / N, // Used for rounding when !TOINT_INTRINSICS #if EXP_USE_TOINT_NARROW .shift = 0x1800000000.8p0, @@ -147,6 +150,24 @@ const struct exp_data __exp_data = { 0x1.3b2ab786ee1dap-7, #endif }, +.exp10_poly = { +#if EXP10_POLY_WIDE +/* Range is wider if using shift-based reduction: coeffs generated + using Remez in [-log10(2)/128, log10(2)/128 ]. */ +0x1.26bb1bbb55515p1, +0x1.53524c73cd32bp1, +0x1.0470591e1a108p1, +0x1.2bd77b12fe9a8p0, +0x1.14289fef24b78p-1 +#else +/* Coeffs generated using Remez in [-log10(2)/256, log10(2)/256 ]. */ +0x1.26bb1bbb55516p1, +0x1.53524c73ce9fep1, +0x1.0470591ce4b26p1, +0x1.2bd76577fe684p0, +0x1.1446eeccd0efbp-1 +#endif +}, // 2^(k/N) ~= H[k]*(1 + T[k]) for int k in [0,N) // tab[2*k] = asuint64(T[k]) // tab[2*k+1] = asuint64(H[k]) - (k << 52)/N diff --git a/contrib/arm-optimized-routines/math/expf.c b/contrib/arm-optimized-routines/math/expf.c index 9b2f0c3d8c56..08a20d59e491 100644 --- a/contrib/arm-optimized-routines/math/expf.c +++ b/contrib/arm-optimized-routines/math/expf.c @@ -2,7 +2,7 @@ * Single-precision e^x function. * * Copyright (c) 2017-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> diff --git a/contrib/arm-optimized-routines/math/include/mathlib.h b/contrib/arm-optimized-routines/math/include/mathlib.h index 279d829d8ea1..64cbb9c1f850 100644 --- a/contrib/arm-optimized-routines/math/include/mathlib.h +++ b/contrib/arm-optimized-routines/math/include/mathlib.h @@ -1,8 +1,8 @@ /* * Public API. * - * Copyright (c) 2015-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2015-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _MATHLIB_H @@ -18,74 +18,33 @@ float cosf (float); void sincosf (float, float*, float*); double exp (double); +double exp10 (double); double exp2 (double); double log (double); double log2 (double); double pow (double, double); -/* Scalar functions using the vector algorithm with identical result. */ -float __s_sinf (float); -float __s_cosf (float); -float __s_expf (float); -float __s_expf_1u (float); -float __s_exp2f (float); -float __s_exp2f_1u (float); -float __s_logf (float); -float __s_powf (float, float); -double __s_sin (double); -double __s_cos (double); -double __s_exp (double); -double __s_log (double); -double __s_pow (double, double); - #if __aarch64__ -#if __GNUC__ >= 5 +# if __GNUC__ >= 5 typedef __Float32x4_t __f32x4_t; typedef __Float64x2_t __f64x2_t; -#elif __clang_major__*100+__clang_minor__ >= 305 +# elif __clang_major__*100+__clang_minor__ >= 305 typedef __attribute__((__neon_vector_type__(4))) float __f32x4_t; typedef __attribute__((__neon_vector_type__(2))) double __f64x2_t; -#else -#error Unsupported compiler -#endif - -/* Vector functions following the base PCS. */ -__f32x4_t __v_sinf (__f32x4_t); -__f32x4_t __v_cosf (__f32x4_t); -__f32x4_t __v_expf (__f32x4_t); -__f32x4_t __v_expf_1u (__f32x4_t); -__f32x4_t __v_exp2f (__f32x4_t); -__f32x4_t __v_exp2f_1u (__f32x4_t); -__f32x4_t __v_logf (__f32x4_t); -__f32x4_t __v_powf (__f32x4_t, __f32x4_t); -__f64x2_t __v_sin (__f64x2_t); -__f64x2_t __v_cos (__f64x2_t); -__f64x2_t __v_exp (__f64x2_t); -__f64x2_t __v_log (__f64x2_t); -__f64x2_t __v_pow (__f64x2_t, __f64x2_t); +# else +# error Unsupported compiler +# endif -#if __GNUC__ >= 9 || __clang_major__ >= 8 -#define __vpcs __attribute__((__aarch64_vector_pcs__)) - -/* Vector functions following the vector PCS. */ -__vpcs __f32x4_t __vn_sinf (__f32x4_t); -__vpcs __f32x4_t __vn_cosf (__f32x4_t); -__vpcs __f32x4_t __vn_expf (__f32x4_t); -__vpcs __f32x4_t __vn_expf_1u (__f32x4_t); -__vpcs __f32x4_t __vn_exp2f (__f32x4_t); -__vpcs __f32x4_t __vn_exp2f_1u (__f32x4_t); -__vpcs __f32x4_t __vn_logf (__f32x4_t); -__vpcs __f32x4_t __vn_powf (__f32x4_t, __f32x4_t); -__vpcs __f64x2_t __vn_sin (__f64x2_t); -__vpcs __f64x2_t __vn_cos (__f64x2_t); -__vpcs __f64x2_t __vn_exp (__f64x2_t); -__vpcs __f64x2_t __vn_log (__f64x2_t); -__vpcs __f64x2_t __vn_pow (__f64x2_t, __f64x2_t); +# if __GNUC__ >= 9 || __clang_major__ >= 8 +# undef __vpcs +# define __vpcs __attribute__((__aarch64_vector_pcs__)) /* Vector functions following the vector PCS using ABI names. */ __vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t); +__vpcs __f32x4_t _ZGVnN4v_expf_1u (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t); +__vpcs __f32x4_t _ZGVnN4v_exp2f_1u (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_exp2f (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_logf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4vv_powf (__f32x4_t, __f32x4_t); @@ -94,7 +53,7 @@ __vpcs __f64x2_t _ZGVnN2v_cos (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t); __vpcs __f64x2_t _ZGVnN2vv_pow (__f64x2_t, __f64x2_t); -#endif +# endif #endif #endif diff --git a/contrib/arm-optimized-routines/math/log.c b/contrib/arm-optimized-routines/math/log.c index d3b7bc60747c..43dfc2a744f0 100644 --- a/contrib/arm-optimized-routines/math/log.c +++ b/contrib/arm-optimized-routines/math/log.c @@ -2,7 +2,7 @@ * Double-precision log(x) function. * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <float.h> diff --git a/contrib/arm-optimized-routines/math/log2.c b/contrib/arm-optimized-routines/math/log2.c index 55102b772969..3f9c21b03962 100644 --- a/contrib/arm-optimized-routines/math/log2.c +++ b/contrib/arm-optimized-routines/math/log2.c @@ -2,7 +2,7 @@ * Double-precision log2(x) function. * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <float.h> diff --git a/contrib/arm-optimized-routines/math/log2_data.c b/contrib/arm-optimized-routines/math/log2_data.c index 3fc9b47c1f03..293bd7df4118 100644 --- a/contrib/arm-optimized-routines/math/log2_data.c +++ b/contrib/arm-optimized-routines/math/log2_data.c @@ -2,7 +2,7 @@ * Data for log2. * * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/log2f.c b/contrib/arm-optimized-routines/math/log2f.c index acb629e6846c..0a44fa2024f6 100644 --- a/contrib/arm-optimized-routines/math/log2f.c +++ b/contrib/arm-optimized-routines/math/log2f.c @@ -2,7 +2,7 @@ * Single-precision log2 function. * * Copyright (c) 2017-2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> diff --git a/contrib/arm-optimized-routines/math/log2f_data.c b/contrib/arm-optimized-routines/math/log2f_data.c index f3546d730aba..4866ef7f8171 100644 --- a/contrib/arm-optimized-routines/math/log2f_data.c +++ b/contrib/arm-optimized-routines/math/log2f_data.c @@ -2,7 +2,7 @@ * Data definition for log2f. * * Copyright (c) 2017-2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/log_data.c b/contrib/arm-optimized-routines/math/log_data.c index 96a098d42c16..3ecc1f40a822 100644 --- a/contrib/arm-optimized-routines/math/log_data.c +++ b/contrib/arm-optimized-routines/math/log_data.c @@ -2,7 +2,7 @@ * Data for log. * * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/logf.c b/contrib/arm-optimized-routines/math/logf.c index cfbaee12df10..820f74c3e66a 100644 --- a/contrib/arm-optimized-routines/math/logf.c +++ b/contrib/arm-optimized-routines/math/logf.c @@ -1,8 +1,8 @@ /* * Single-precision log function. * - * Copyright (c) 2017-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> @@ -57,7 +57,7 @@ logf (float x) tmp = ix - OFF; i = (tmp >> (23 - LOGF_TABLE_BITS)) % N; k = (int32_t) tmp >> 23; /* arithmetic shift */ - iz = ix - (tmp & 0x1ff << 23); + iz = ix - (tmp & 0xff800000); invc = T[i].invc; logc = T[i].logc; z = (double_t) asfloat (iz); diff --git a/contrib/arm-optimized-routines/math/logf_data.c b/contrib/arm-optimized-routines/math/logf_data.c index e8973ce4fedc..04247684755f 100644 --- a/contrib/arm-optimized-routines/math/logf_data.c +++ b/contrib/arm-optimized-routines/math/logf_data.c @@ -2,7 +2,7 @@ * Data definition for logf. * * Copyright (c) 2017-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/math_config.h b/contrib/arm-optimized-routines/math/math_config.h index e85104337048..faf77b31fc99 100644 --- a/contrib/arm-optimized-routines/math/math_config.h +++ b/contrib/arm-optimized-routines/math/math_config.h @@ -1,8 +1,8 @@ /* * Configuration for math routines. * - * Copyright (c) 2017-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _MATH_CONFIG_H @@ -92,6 +92,46 @@ # define unlikely(x) (x) #endif +/* Return ptr but hide its value from the compiler so accesses through it + cannot be optimized based on the contents. */ +#define ptr_barrier(ptr) \ + ({ \ + __typeof (ptr) __ptr = (ptr); \ + __asm("" : "+r"(__ptr)); \ + __ptr; \ + }) + +/* Symbol renames to avoid libc conflicts. */ +#define __math_oflowf arm_math_oflowf +#define __math_uflowf arm_math_uflowf +#define __math_may_uflowf arm_math_may_uflowf +#define __math_divzerof arm_math_divzerof +#define __math_oflow arm_math_oflow +#define __math_uflow arm_math_uflow +#define __math_may_uflow arm_math_may_uflow +#define __math_divzero arm_math_divzero +#define __math_invalidf arm_math_invalidf +#define __math_invalid arm_math_invalid +#define __math_check_oflow arm_math_check_oflow +#define __math_check_uflow arm_math_check_uflow +#define __math_check_oflowf arm_math_check_oflowf +#define __math_check_uflowf arm_math_check_uflowf + +#define __sincosf_table arm_math_sincosf_table +#define __inv_pio4 arm_math_inv_pio4 +#define __exp2f_data arm_math_exp2f_data +#define __logf_data arm_math_logf_data +#define __log2f_data arm_math_log2f_data +#define __powf_log2_data arm_math_powf_log2_data +#define __exp_data arm_math_exp_data +#define __log_data arm_math_log_data +#define __log2_data arm_math_log2_data +#define __pow_log_data arm_math_pow_log_data +#define __erff_data arm_math_erff_data +#define __erf_data arm_math_erf_data +#define __v_exp_data arm_math_v_exp_data +#define __v_log_data arm_math_v_log_data + #if HAVE_FAST_ROUND /* When set, the roundtoint and converttoint functions are provided with the semantics documented below. */ @@ -381,15 +421,22 @@ extern const struct powf_log2_data #define EXP_USE_TOINT_NARROW 0 #define EXP2_POLY_ORDER 5 #define EXP2_POLY_WIDE 0 +/* Wider exp10 polynomial necessary for good precision in non-nearest rounding + and !TOINT_INTRINSICS. */ +#define EXP10_POLY_WIDE 0 extern const struct exp_data { double invln2N; + double invlog10_2N; double shift; double negln2hiN; double negln2loN; + double neglog10_2hiN; + double neglog10_2loN; double poly[4]; /* Last four coefficients. */ double exp2_shift; double exp2_poly[EXP2_POLY_ORDER]; + double exp10_poly[5]; uint64_t tab[2*(1 << EXP_TABLE_BITS)]; } __exp_data HIDDEN; @@ -459,4 +506,16 @@ extern const struct erf_data double erfc_poly_F[ERFC_POLY_F_NCOEFFS]; } __erf_data HIDDEN; +#define V_EXP_TABLE_BITS 7 +extern const uint64_t __v_exp_data[1 << V_EXP_TABLE_BITS] HIDDEN; + +#define V_LOG_TABLE_BITS 7 +extern const struct v_log_data +{ + struct + { + double invc, logc; + } table[1 << V_LOG_TABLE_BITS]; +} __v_log_data HIDDEN; + #endif diff --git a/contrib/arm-optimized-routines/math/math_err.c b/contrib/arm-optimized-routines/math/math_err.c index 1bf9538a1ab1..cfe072809cf4 100644 --- a/contrib/arm-optimized-routines/math/math_err.c +++ b/contrib/arm-optimized-routines/math/math_err.c @@ -2,7 +2,7 @@ * Double-precision math error handling. * * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/math_errf.c b/contrib/arm-optimized-routines/math/math_errf.c index d5350b819ab1..4233918b1eae 100644 --- a/contrib/arm-optimized-routines/math/math_errf.c +++ b/contrib/arm-optimized-routines/math/math_errf.c @@ -2,7 +2,7 @@ * Single-precision math error handling. * * Copyright (c) 2017-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/pow.c b/contrib/arm-optimized-routines/math/pow.c index 86842c6abacd..af719fe5ab10 100644 --- a/contrib/arm-optimized-routines/math/pow.c +++ b/contrib/arm-optimized-routines/math/pow.c @@ -2,7 +2,7 @@ * Double-precision x^y function. * * Copyright (c) 2018-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <float.h> diff --git a/contrib/arm-optimized-routines/math/pow_log_data.c b/contrib/arm-optimized-routines/math/pow_log_data.c index 45569c5cc064..2a4c250d85c3 100644 --- a/contrib/arm-optimized-routines/math/pow_log_data.c +++ b/contrib/arm-optimized-routines/math/pow_log_data.c @@ -2,7 +2,7 @@ * Data for the log part of pow. * * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/powf.c b/contrib/arm-optimized-routines/math/powf.c index 6ba45d3852a5..05c80bb2eb67 100644 --- a/contrib/arm-optimized-routines/math/powf.c +++ b/contrib/arm-optimized-routines/math/powf.c @@ -2,7 +2,7 @@ * Single-precision pow function. * * Copyright (c) 2017-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> diff --git a/contrib/arm-optimized-routines/math/powf_log2_data.c b/contrib/arm-optimized-routines/math/powf_log2_data.c index 97e0d98cdbab..243836a549fd 100644 --- a/contrib/arm-optimized-routines/math/powf_log2_data.c +++ b/contrib/arm-optimized-routines/math/powf_log2_data.c @@ -2,7 +2,7 @@ * Data definition for powf. * * Copyright (c) 2017-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "math_config.h" diff --git a/contrib/arm-optimized-routines/math/s_cos.c b/contrib/arm-optimized-routines/math/s_cos.c deleted file mode 100644 index 53a95b0adfde..000000000000 --- a/contrib/arm-optimized-routines/math/s_cos.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_cos.c" diff --git a/contrib/arm-optimized-routines/math/s_cosf.c b/contrib/arm-optimized-routines/math/s_cosf.c deleted file mode 100644 index 914c02eba651..000000000000 --- a/contrib/arm-optimized-routines/math/s_cosf.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_cosf.c" diff --git a/contrib/arm-optimized-routines/math/s_exp.c b/contrib/arm-optimized-routines/math/s_exp.c deleted file mode 100644 index ac7246b2c100..000000000000 --- a/contrib/arm-optimized-routines/math/s_exp.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_exp.c" diff --git a/contrib/arm-optimized-routines/math/s_exp2f.c b/contrib/arm-optimized-routines/math/s_exp2f.c deleted file mode 100644 index df7dfd680ff4..000000000000 --- a/contrib/arm-optimized-routines/math/s_exp2f.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_exp2f.c" diff --git a/contrib/arm-optimized-routines/math/s_exp2f_1u.c b/contrib/arm-optimized-routines/math/s_exp2f_1u.c deleted file mode 100644 index 5e3852b41d83..000000000000 --- a/contrib/arm-optimized-routines/math/s_exp2f_1u.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_exp2f_1u.c" diff --git a/contrib/arm-optimized-routines/math/s_expf.c b/contrib/arm-optimized-routines/math/s_expf.c deleted file mode 100644 index 3492c460733d..000000000000 --- a/contrib/arm-optimized-routines/math/s_expf.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_expf.c" diff --git a/contrib/arm-optimized-routines/math/s_expf_1u.c b/contrib/arm-optimized-routines/math/s_expf_1u.c deleted file mode 100644 index eb7bbcba5566..000000000000 --- a/contrib/arm-optimized-routines/math/s_expf_1u.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_expf_1u.c" diff --git a/contrib/arm-optimized-routines/math/s_log.c b/contrib/arm-optimized-routines/math/s_log.c deleted file mode 100644 index 23289cf948ec..000000000000 --- a/contrib/arm-optimized-routines/math/s_log.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_log.c" diff --git a/contrib/arm-optimized-routines/math/s_logf.c b/contrib/arm-optimized-routines/math/s_logf.c deleted file mode 100644 index 9399350fc1ee..000000000000 --- a/contrib/arm-optimized-routines/math/s_logf.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_logf.c" diff --git a/contrib/arm-optimized-routines/math/s_pow.c b/contrib/arm-optimized-routines/math/s_pow.c deleted file mode 100644 index 2e34c9f896d6..000000000000 --- a/contrib/arm-optimized-routines/math/s_pow.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_pow.c" diff --git a/contrib/arm-optimized-routines/math/s_powf.c b/contrib/arm-optimized-routines/math/s_powf.c deleted file mode 100644 index 6d91a4a72b37..000000000000 --- a/contrib/arm-optimized-routines/math/s_powf.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_powf.c" diff --git a/contrib/arm-optimized-routines/math/s_sin.c b/contrib/arm-optimized-routines/math/s_sin.c deleted file mode 100644 index 06982c2018c6..000000000000 --- a/contrib/arm-optimized-routines/math/s_sin.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_sin.c" diff --git a/contrib/arm-optimized-routines/math/s_sinf.c b/contrib/arm-optimized-routines/math/s_sinf.c deleted file mode 100644 index 68ca90853736..000000000000 --- a/contrib/arm-optimized-routines/math/s_sinf.c +++ /dev/null @@ -1,6 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#define SCALAR 1 -#include "v_sinf.c" diff --git a/contrib/arm-optimized-routines/math/sincosf.c b/contrib/arm-optimized-routines/math/sincosf.c index 9746f1c22e6c..446f21d60faf 100644 --- a/contrib/arm-optimized-routines/math/sincosf.c +++ b/contrib/arm-optimized-routines/math/sincosf.c @@ -1,8 +1,8 @@ /* * Single-precision sin/cos function. * - * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -22,7 +22,7 @@ sincosf (float y, float *sinp, float *cosp) int n; const sincos_t *p = &__sincosf_table[0]; - if (abstop12 (y) < abstop12 (pio4)) + if (abstop12 (y) < abstop12 (pio4f)) { double x2 = x * x; diff --git a/contrib/arm-optimized-routines/math/sincosf.h b/contrib/arm-optimized-routines/math/sincosf.h index 1e80fc9ba8e1..ec23ed7aeb26 100644 --- a/contrib/arm-optimized-routines/math/sincosf.h +++ b/contrib/arm-optimized-routines/math/sincosf.h @@ -1,8 +1,8 @@ /* * Header for sinf, cosf and sincosf. * - * Copyright (c) 2018, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -12,7 +12,7 @@ /* 2PI * 2^-64. */ static const double pi63 = 0x1.921FB54442D18p-62; /* PI / 4. */ -static const double pio4 = 0x1.921FB54442D18p-1; +static const float pio4f = 0x1.921FB6p-1f; /* The constants and polynomials for sine and cosine. */ typedef struct diff --git a/contrib/arm-optimized-routines/math/sincosf_data.c b/contrib/arm-optimized-routines/math/sincosf_data.c index ab4ac4710fef..22525290ab08 100644 --- a/contrib/arm-optimized-routines/math/sincosf_data.c +++ b/contrib/arm-optimized-routines/math/sincosf_data.c @@ -2,7 +2,7 @@ * Data definition for sinf, cosf and sincosf. * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/math/sinf.c b/contrib/arm-optimized-routines/math/sinf.c index ddbc1daf74a9..8dd8ae458794 100644 --- a/contrib/arm-optimized-routines/math/sinf.c +++ b/contrib/arm-optimized-routines/math/sinf.c @@ -1,8 +1,8 @@ /* * Single-precision sin function. * - * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <math.h> @@ -21,7 +21,7 @@ sinf (float y) int n; const sincos_t *p = &__sincosf_table[0]; - if (abstop12 (y) < abstop12 (pio4)) + if (abstop12 (y) < abstop12 (pio4f)) { s = x * x; diff --git a/contrib/arm-optimized-routines/math/test/mathbench.c b/contrib/arm-optimized-routines/math/test/mathbench.c index 0c17826e5296..ed7e89bb7710 100644 --- a/contrib/arm-optimized-routines/math/test/mathbench.c +++ b/contrib/arm-optimized-routines/math/test/mathbench.c @@ -1,8 +1,8 @@ /* * Microbenchmark for math functions. * - * Copyright (c) 2018-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #undef _GNU_SOURCE @@ -15,11 +15,6 @@ #include <math.h> #include "mathlib.h" -#ifndef WANT_VMATH -/* Enable the build of vector math code. */ -# define WANT_VMATH 1 -#endif - /* Number of measurements, best result is reported. */ #define MEASURE 60 /* Array size. */ @@ -34,8 +29,9 @@ static float Af[N]; static long measurecount = MEASURE; static long itercount = ITER; -#if __aarch64__ && WANT_VMATH -typedef __f64x2_t v_double; +#ifdef __vpcs +#include <arm_neon.h> +typedef float64x2_t v_double; #define v_double_len() 2 @@ -51,7 +47,7 @@ v_double_dup (double x) return (v_double){x, x}; } -typedef __f32x4_t v_float; +typedef float32x4_t v_float; #define v_float_len() 4 @@ -76,141 +72,91 @@ typedef float v_float; #define v_float_len(x) 1 #define v_float_load(x) (x)[0] #define v_float_dup(x) (x) -#endif - -static double -dummy (double x) -{ - return x; -} - -static float -dummyf (float x) -{ - return x; -} - -#if WANT_VMATH -#if __aarch64__ -static v_double -__v_dummy (v_double x) -{ - return x; -} -static v_float -__v_dummyf (v_float x) -{ - return x; -} - -#ifdef __vpcs -__vpcs static v_double -__vn_dummy (v_double x) -{ - return x; -} +#endif -__vpcs static v_float -__vn_dummyf (v_float x) -{ - return x; -} +#if WANT_SVE_MATH +#include <arm_sve.h> +typedef svbool_t sv_bool; +typedef svfloat64_t sv_double; -__vpcs static v_float -xy__vn_powf (v_float x) -{ - return __vn_powf (x, x); -} +#define sv_double_len() svcntd() -__vpcs static v_float -xy_Z_powf (v_float x) +static inline sv_double +sv_double_load (const double *p) { - return _ZGVnN4vv_powf (x, x); + svbool_t pg = svptrue_b64(); + return svld1(pg, p); } -__vpcs static v_double -xy__vn_pow (v_double x) +static inline sv_double +sv_double_dup (double x) { - return __vn_pow (x, x); + return svdup_n_f64(x); } -__vpcs static v_double -xy_Z_pow (v_double x) -{ - return _ZGVnN2vv_pow (x, x); -} -#endif +typedef svfloat32_t sv_float; -static v_float -xy__v_powf (v_float x) -{ - return __v_powf (x, x); -} +#define sv_float_len() svcntw() -static v_double -xy__v_pow (v_double x) +static inline sv_float +sv_float_load (const float *p) { - return __v_pow (x, x); + svbool_t pg = svptrue_b32(); + return svld1(pg, p); } -#endif -static float -xy__s_powf (float x) +static inline sv_float +sv_float_dup (float x) { - return __s_powf (x, x); -} - -static double -xy__s_pow (double x) -{ - return __s_pow (x, x); + return svdup_n_f32(x); } +#else +/* dummy definitions to make things compile. */ +#define sv_double_len(x) 1 +#define sv_float_len(x) 1 #endif static double -xypow (double x) +dummy (double x) { - return pow (x, x); + return x; } static float -xypowf (float x) +dummyf (float x) { - return powf (x, x); + return x; } - -static double -xpow (double x) +#ifdef __vpcs +__vpcs static v_double +__vn_dummy (v_double x) { - return pow (x, 23.4); + return x; } -static float -xpowf (float x) +__vpcs static v_float +__vn_dummyf (v_float x) { - return powf (x, 23.4f); + return x; } - -static double -ypow (double x) +#endif +#if WANT_SVE_MATH +static sv_double +__sv_dummy (sv_double x, sv_bool pg) { - return pow (2.34, x); + return x; } -static float -ypowf (float x) +static sv_float +__sv_dummyf (sv_float x, sv_bool pg) { - return powf (2.34f, x); + return x; } -static float -sincosf_wrap (float x) -{ - float s, c; - sincosf (x, &s, &c); - return s + c; -} +#endif + +#include "test/mathbench_wrappers.h" static const struct fun { @@ -223,127 +169,40 @@ static const struct fun { double (*d) (double); float (*f) (float); - v_double (*vd) (v_double); - v_float (*vf) (v_float); #ifdef __vpcs __vpcs v_double (*vnd) (v_double); __vpcs v_float (*vnf) (v_float); #endif +#if WANT_SVE_MATH + sv_double (*svd) (sv_double, sv_bool); + sv_float (*svf) (sv_float, sv_bool); +#endif } fun; } funtab[] = { #define D(func, lo, hi) {#func, 'd', 0, lo, hi, {.d = func}}, #define F(func, lo, hi) {#func, 'f', 0, lo, hi, {.f = func}}, -#define VD(func, lo, hi) {#func, 'd', 'v', lo, hi, {.vd = func}}, -#define VF(func, lo, hi) {#func, 'f', 'v', lo, hi, {.vf = func}}, #define VND(func, lo, hi) {#func, 'd', 'n', lo, hi, {.vnd = func}}, #define VNF(func, lo, hi) {#func, 'f', 'n', lo, hi, {.vnf = func}}, +#define SVD(func, lo, hi) {#func, 'd', 's', lo, hi, {.svd = func}}, +#define SVF(func, lo, hi) {#func, 'f', 's', lo, hi, {.svf = func}}, D (dummy, 1.0, 2.0) -D (exp, -9.9, 9.9) -D (exp, 0.5, 1.0) -D (exp2, -9.9, 9.9) -D (log, 0.01, 11.1) -D (log, 0.999, 1.001) -D (log2, 0.01, 11.1) -D (log2, 0.999, 1.001) -{"pow", 'd', 0, 0.01, 11.1, {.d = xypow}}, -D (xpow, 0.01, 11.1) -D (ypow, -9.9, 9.9) -D (erf, -6.0, 6.0) - F (dummyf, 1.0, 2.0) -F (expf, -9.9, 9.9) -F (exp2f, -9.9, 9.9) -F (logf, 0.01, 11.1) -F (log2f, 0.01, 11.1) -{"powf", 'f', 0, 0.01, 11.1, {.f = xypowf}}, -F (xpowf, 0.01, 11.1) -F (ypowf, -9.9, 9.9) -{"sincosf", 'f', 0, 0.1, 0.7, {.f = sincosf_wrap}}, -{"sincosf", 'f', 0, 0.8, 3.1, {.f = sincosf_wrap}}, -{"sincosf", 'f', 0, -3.1, 3.1, {.f = sincosf_wrap}}, -{"sincosf", 'f', 0, 3.3, 33.3, {.f = sincosf_wrap}}, -{"sincosf", 'f', 0, 100, 1000, {.f = sincosf_wrap}}, -{"sincosf", 'f', 0, 1e6, 1e32, {.f = sincosf_wrap}}, -F (sinf, 0.1, 0.7) -F (sinf, 0.8, 3.1) -F (sinf, -3.1, 3.1) -F (sinf, 3.3, 33.3) -F (sinf, 100, 1000) -F (sinf, 1e6, 1e32) -F (cosf, 0.1, 0.7) -F (cosf, 0.8, 3.1) -F (cosf, -3.1, 3.1) -F (cosf, 3.3, 33.3) -F (cosf, 100, 1000) -F (cosf, 1e6, 1e32) -F (erff, -4.0, 4.0) -#if WANT_VMATH -D (__s_sin, -3.1, 3.1) -D (__s_cos, -3.1, 3.1) -D (__s_exp, -9.9, 9.9) -D (__s_log, 0.01, 11.1) -{"__s_pow", 'd', 0, 0.01, 11.1, {.d = xy__s_pow}}, -F (__s_expf, -9.9, 9.9) -F (__s_expf_1u, -9.9, 9.9) -F (__s_exp2f, -9.9, 9.9) -F (__s_exp2f_1u, -9.9, 9.9) -F (__s_logf, 0.01, 11.1) -{"__s_powf", 'f', 0, 0.01, 11.1, {.f = xy__s_powf}}, -F (__s_sinf, -3.1, 3.1) -F (__s_cosf, -3.1, 3.1) -#if __aarch64__ -VD (__v_dummy, 1.0, 2.0) -VD (__v_sin, -3.1, 3.1) -VD (__v_cos, -3.1, 3.1) -VD (__v_exp, -9.9, 9.9) -VD (__v_log, 0.01, 11.1) -{"__v_pow", 'd', 'v', 0.01, 11.1, {.vd = xy__v_pow}}, -VF (__v_dummyf, 1.0, 2.0) -VF (__v_expf, -9.9, 9.9) -VF (__v_expf_1u, -9.9, 9.9) -VF (__v_exp2f, -9.9, 9.9) -VF (__v_exp2f_1u, -9.9, 9.9) -VF (__v_logf, 0.01, 11.1) -{"__v_powf", 'f', 'v', 0.01, 11.1, {.vf = xy__v_powf}}, -VF (__v_sinf, -3.1, 3.1) -VF (__v_cosf, -3.1, 3.1) #ifdef __vpcs VND (__vn_dummy, 1.0, 2.0) -VND (__vn_exp, -9.9, 9.9) -VND (_ZGVnN2v_exp, -9.9, 9.9) -VND (__vn_log, 0.01, 11.1) -VND (_ZGVnN2v_log, 0.01, 11.1) -{"__vn_pow", 'd', 'n', 0.01, 11.1, {.vnd = xy__vn_pow}}, -{"_ZGVnN2vv_pow", 'd', 'n', 0.01, 11.1, {.vnd = xy_Z_pow}}, -VND (__vn_sin, -3.1, 3.1) -VND (_ZGVnN2v_sin, -3.1, 3.1) -VND (__vn_cos, -3.1, 3.1) -VND (_ZGVnN2v_cos, -3.1, 3.1) VNF (__vn_dummyf, 1.0, 2.0) -VNF (__vn_expf, -9.9, 9.9) -VNF (_ZGVnN4v_expf, -9.9, 9.9) -VNF (__vn_expf_1u, -9.9, 9.9) -VNF (__vn_exp2f, -9.9, 9.9) -VNF (_ZGVnN4v_exp2f, -9.9, 9.9) -VNF (__vn_exp2f_1u, -9.9, 9.9) -VNF (__vn_logf, 0.01, 11.1) -VNF (_ZGVnN4v_logf, 0.01, 11.1) -{"__vn_powf", 'f', 'n', 0.01, 11.1, {.vnf = xy__vn_powf}}, -{"_ZGVnN4vv_powf", 'f', 'n', 0.01, 11.1, {.vnf = xy_Z_powf}}, -VNF (__vn_sinf, -3.1, 3.1) -VNF (_ZGVnN4v_sinf, -3.1, 3.1) -VNF (__vn_cosf, -3.1, 3.1) -VNF (_ZGVnN4v_cosf, -3.1, 3.1) -#endif #endif +#if WANT_SVE_MATH +SVD (__sv_dummy, 1.0, 2.0) +SVF (__sv_dummyf, 1.0, 2.0) #endif +#include "test/mathbench_funcs.h" {0}, #undef F #undef D -#undef VF -#undef VD #undef VNF #undef VND +#undef SVF +#undef SVD }; static void @@ -442,69 +301,75 @@ runf_latency (float f (float)) prev = f (Af[i] + prev * z); } +#ifdef __vpcs static void -run_v_thruput (v_double f (v_double)) +run_vn_thruput (__vpcs v_double f (v_double)) { for (int i = 0; i < N; i += v_double_len ()) f (v_double_load (A+i)); } static void -runf_v_thruput (v_float f (v_float)) +runf_vn_thruput (__vpcs v_float f (v_float)) { for (int i = 0; i < N; i += v_float_len ()) f (v_float_load (Af+i)); } static void -run_v_latency (v_double f (v_double)) +run_vn_latency (__vpcs v_double f (v_double)) { - v_double z = v_double_dup (zero); - v_double prev = z; + volatile uint64x2_t vsel = (uint64x2_t) { 0, 0 }; + uint64x2_t sel = vsel; + v_double prev = v_double_dup (0); for (int i = 0; i < N; i += v_double_len ()) - prev = f (v_double_load (A+i) + prev * z); + prev = f (vbslq_f64 (sel, prev, v_double_load (A+i))); } static void -runf_v_latency (v_float f (v_float)) +runf_vn_latency (__vpcs v_float f (v_float)) { - v_float z = v_float_dup (zero); - v_float prev = z; + volatile uint32x4_t vsel = (uint32x4_t) { 0, 0, 0, 0 }; + uint32x4_t sel = vsel; + v_float prev = v_float_dup (0); for (int i = 0; i < N; i += v_float_len ()) - prev = f (v_float_load (Af+i) + prev * z); + prev = f (vbslq_f32 (sel, prev, v_float_load (Af+i))); } +#endif -#ifdef __vpcs +#if WANT_SVE_MATH static void -run_vn_thruput (__vpcs v_double f (v_double)) +run_sv_thruput (sv_double f (sv_double, sv_bool)) { - for (int i = 0; i < N; i += v_double_len ()) - f (v_double_load (A+i)); + for (int i = 0; i < N; i += sv_double_len ()) + f (sv_double_load (A+i), svptrue_b64 ()); } static void -runf_vn_thruput (__vpcs v_float f (v_float)) +runf_sv_thruput (sv_float f (sv_float, sv_bool)) { - for (int i = 0; i < N; i += v_float_len ()) - f (v_float_load (Af+i)); + for (int i = 0; i < N; i += sv_float_len ()) + f (sv_float_load (Af+i), svptrue_b32 ()); } static void -run_vn_latency (__vpcs v_double f (v_double)) +run_sv_latency (sv_double f (sv_double, sv_bool)) { - v_double z = v_double_dup (zero); - v_double prev = z; - for (int i = 0; i < N; i += v_double_len ()) - prev = f (v_double_load (A+i) + prev * z); + volatile sv_bool vsel = svptrue_b64 (); + sv_bool sel = vsel; + sv_double prev = sv_double_dup (0); + for (int i = 0; i < N; i += sv_double_len ()) + prev = f (svsel_f64 (sel, sv_double_load (A+i), prev), svptrue_b64 ()); } static void -runf_vn_latency (__vpcs v_float f (v_float)) +runf_sv_latency (sv_float f (sv_float, sv_bool)) { - v_float z = v_float_dup (zero); - v_float prev = z; - for (int i = 0; i < N; i += v_float_len ()) - prev = f (v_float_load (Af+i) + prev * z); + volatile sv_bool vsel = svptrue_b32 (); + sv_bool sel = vsel; + sv_float prev = sv_float_dup (0); + for (int i = 0; i < N; i += sv_float_len ()) + prev = f (svsel_f32 (sel, sv_float_load (Af+i), prev), svptrue_b32 ()); } #endif @@ -539,10 +404,10 @@ bench1 (const struct fun *f, int type, double lo, double hi) const char *s = type == 't' ? "rthruput" : "latency"; int vlen = 1; - if (f->vec && f->prec == 'd') - vlen = v_double_len(); - else if (f->vec && f->prec == 'f') - vlen = v_float_len(); + if (f->vec == 'n') + vlen = f->prec == 'd' ? v_double_len() : v_float_len(); + else if (f->vec == 's') + vlen = f->prec == 'd' ? sv_double_len() : sv_float_len(); if (f->prec == 'd' && type == 't' && f->vec == 0) TIMEIT (run_thruput, f->fun.d); @@ -552,14 +417,6 @@ bench1 (const struct fun *f, int type, double lo, double hi) TIMEIT (runf_thruput, f->fun.f); else if (f->prec == 'f' && type == 'l' && f->vec == 0) TIMEIT (runf_latency, f->fun.f); - else if (f->prec == 'd' && type == 't' && f->vec == 'v') - TIMEIT (run_v_thruput, f->fun.vd); - else if (f->prec == 'd' && type == 'l' && f->vec == 'v') - TIMEIT (run_v_latency, f->fun.vd); - else if (f->prec == 'f' && type == 't' && f->vec == 'v') - TIMEIT (runf_v_thruput, f->fun.vf); - else if (f->prec == 'f' && type == 'l' && f->vec == 'v') - TIMEIT (runf_v_latency, f->fun.vf); #ifdef __vpcs else if (f->prec == 'd' && type == 't' && f->vec == 'n') TIMEIT (run_vn_thruput, f->fun.vnd); @@ -570,20 +427,32 @@ bench1 (const struct fun *f, int type, double lo, double hi) else if (f->prec == 'f' && type == 'l' && f->vec == 'n') TIMEIT (runf_vn_latency, f->fun.vnf); #endif +#if WANT_SVE_MATH + else if (f->prec == 'd' && type == 't' && f->vec == 's') + TIMEIT (run_sv_thruput, f->fun.svd); + else if (f->prec == 'd' && type == 'l' && f->vec == 's') + TIMEIT (run_sv_latency, f->fun.svd); + else if (f->prec == 'f' && type == 't' && f->vec == 's') + TIMEIT (runf_sv_thruput, f->fun.svf); + else if (f->prec == 'f' && type == 'l' && f->vec == 's') + TIMEIT (runf_sv_latency, f->fun.svf); +#endif if (type == 't') { ns100 = (100 * dt + itercount * N / 2) / (itercount * N); - printf ("%9s %8s: %4u.%02u ns/elem %10llu ns in [%g %g]\n", f->name, s, + printf ("%9s %8s: %4u.%02u ns/elem %10llu ns in [%g %g] vlen %d\n", + f->name, s, (unsigned) (ns100 / 100), (unsigned) (ns100 % 100), - (unsigned long long) dt, lo, hi); + (unsigned long long) dt, lo, hi, vlen); } else if (type == 'l') { ns100 = (100 * dt + itercount * N / vlen / 2) / (itercount * N / vlen); - printf ("%9s %8s: %4u.%02u ns/call %10llu ns in [%g %g]\n", f->name, s, + printf ("%9s %8s: %4u.%02u ns/call %10llu ns in [%g %g] vlen %d\n", + f->name, s, (unsigned) (ns100 / 100), (unsigned) (ns100 % 100), - (unsigned long long) dt, lo, hi); + (unsigned long long) dt, lo, hi, vlen); } fflush (stdout); } diff --git a/contrib/arm-optimized-routines/math/test/mathbench_funcs.h b/contrib/arm-optimized-routines/math/test/mathbench_funcs.h new file mode 100644 index 000000000000..84c4e68650ac --- /dev/null +++ b/contrib/arm-optimized-routines/math/test/mathbench_funcs.h @@ -0,0 +1,62 @@ +/* + * Function entries for mathbench. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +/* clang-format off */ +D (exp, -9.9, 9.9) +D (exp, 0.5, 1.0) +D (exp10, -9.9, 9.9) +D (exp2, -9.9, 9.9) +D (log, 0.01, 11.1) +D (log, 0.999, 1.001) +D (log2, 0.01, 11.1) +D (log2, 0.999, 1.001) +{"pow", 'd', 0, 0.01, 11.1, {.d = xypow}}, +D (xpow, 0.01, 11.1) +D (ypow, -9.9, 9.9) +D (erf, -6.0, 6.0) + +F (expf, -9.9, 9.9) +F (exp2f, -9.9, 9.9) +F (logf, 0.01, 11.1) +F (log2f, 0.01, 11.1) +{"powf", 'f', 0, 0.01, 11.1, {.f = xypowf}}, +F (xpowf, 0.01, 11.1) +F (ypowf, -9.9, 9.9) +{"sincosf", 'f', 0, 0.1, 0.7, {.f = sincosf_wrap}}, +{"sincosf", 'f', 0, 0.8, 3.1, {.f = sincosf_wrap}}, +{"sincosf", 'f', 0, -3.1, 3.1, {.f = sincosf_wrap}}, +{"sincosf", 'f', 0, 3.3, 33.3, {.f = sincosf_wrap}}, +{"sincosf", 'f', 0, 100, 1000, {.f = sincosf_wrap}}, +{"sincosf", 'f', 0, 1e6, 1e32, {.f = sincosf_wrap}}, +F (sinf, 0.1, 0.7) +F (sinf, 0.8, 3.1) +F (sinf, -3.1, 3.1) +F (sinf, 3.3, 33.3) +F (sinf, 100, 1000) +F (sinf, 1e6, 1e32) +F (cosf, 0.1, 0.7) +F (cosf, 0.8, 3.1) +F (cosf, -3.1, 3.1) +F (cosf, 3.3, 33.3) +F (cosf, 100, 1000) +F (cosf, 1e6, 1e32) +F (erff, -4.0, 4.0) +#ifdef __vpcs +VND (_ZGVnN2v_exp, -9.9, 9.9) +VND (_ZGVnN2v_log, 0.01, 11.1) +{"_ZGVnN2vv_pow", 'd', 'n', 0.01, 11.1, {.vnd = xy_Z_pow}}, +VND (_ZGVnN2v_sin, -3.1, 3.1) +VND (_ZGVnN2v_cos, -3.1, 3.1) +VNF (_ZGVnN4v_expf, -9.9, 9.9) +VNF (_ZGVnN4v_expf_1u, -9.9, 9.9) +VNF (_ZGVnN4v_exp2f, -9.9, 9.9) +VNF (_ZGVnN4v_exp2f_1u, -9.9, 9.9) +VNF (_ZGVnN4v_logf, 0.01, 11.1) +{"_ZGVnN4vv_powf", 'f', 'n', 0.01, 11.1, {.vnf = xy_Z_powf}}, +VNF (_ZGVnN4v_sinf, -3.1, 3.1) +VNF (_ZGVnN4v_cosf, -3.1, 3.1) +#endif + /* clang-format on */ diff --git a/contrib/arm-optimized-routines/math/test/mathbench_wrappers.h b/contrib/arm-optimized-routines/math/test/mathbench_wrappers.h new file mode 100644 index 000000000000..062b9db56de5 --- /dev/null +++ b/contrib/arm-optimized-routines/math/test/mathbench_wrappers.h @@ -0,0 +1,66 @@ +/* + * Function wrappers for mathbench. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifdef __vpcs + +__vpcs static v_float +xy_Z_powf (v_float x) +{ + return _ZGVnN4vv_powf (x, x); +} + +__vpcs static v_double +xy_Z_pow (v_double x) +{ + return _ZGVnN2vv_pow (x, x); +} + +#endif + +static double +xypow (double x) +{ + return pow (x, x); +} + +static float +xypowf (float x) +{ + return powf (x, x); +} + +static double +xpow (double x) +{ + return pow (x, 23.4); +} + +static float +xpowf (float x) +{ + return powf (x, 23.4f); +} + +static double +ypow (double x) +{ + return pow (2.34, x); +} + +static float +ypowf (float x) +{ + return powf (2.34f, x); +} + +static float +sincosf_wrap (float x) +{ + float s, c; + sincosf (x, &s, &c); + return s + c; +} diff --git a/contrib/arm-optimized-routines/math/test/mathtest.c b/contrib/arm-optimized-routines/math/test/mathtest.c index 310896738e47..834233fdde9d 100644 --- a/contrib/arm-optimized-routines/math/test/mathtest.c +++ b/contrib/arm-optimized-routines/math/test/mathtest.c @@ -1,8 +1,8 @@ /* * mathtest.c - test rig for mathlib * - * Copyright (c) 1998-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 1998-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <assert.h> @@ -196,9 +196,11 @@ int is_complex_rettype(int rettype) { #define TFUNCARM(arg,ret,name,tolerance) { t_func, arg, ret, (void*)& ARM_PREFIX(name), m_none, tolerance, #name } #define MFUNC(arg,ret,name,tolerance) { t_macro, arg, ret, NULL, m_##name, tolerance, #name } +#ifndef PL /* sincosf wrappers for easier testing. */ static float sincosf_sinf(float x) { float s,c; sincosf(x, &s, &c); return s; } static float sincosf_cosf(float x) { float s,c; sincosf(x, &s, &c); return c; } +#endif test_func tfuncs[] = { /* trigonometric */ @@ -218,9 +220,10 @@ test_func tfuncs[] = { TFUNCARM(at_s,rt_s, tanf, 4*ULPUNIT), TFUNCARM(at_s,rt_s, sinf, 3*ULPUNIT/4), TFUNCARM(at_s,rt_s, cosf, 3*ULPUNIT/4), +#ifndef PL TFUNCARM(at_s,rt_s, sincosf_sinf, 3*ULPUNIT/4), TFUNCARM(at_s,rt_s, sincosf_cosf, 3*ULPUNIT/4), - +#endif /* hyperbolic */ TFUNC(at_d, rt_d, atanh, 4*ULPUNIT), TFUNC(at_d, rt_d, asinh, 4*ULPUNIT), @@ -251,6 +254,7 @@ test_func tfuncs[] = { TFUNCARM(at_s,rt_s, expf, 3*ULPUNIT/4), TFUNCARM(at_s,rt_s, exp2f, 3*ULPUNIT/4), TFUNC(at_s,rt_s, expm1f, ULPUNIT), + TFUNC(at_d,rt_d, exp10, ULPUNIT), /* power */ TFUNC(at_d2,rt_d, pow, 3*ULPUNIT/4), @@ -1018,6 +1022,7 @@ int runtest(testdetail t) { DO_DOP(d_arg1,op1r); DO_DOP(d_arg2,op2r); s_arg1.i = t.op1r[0]; s_arg2.i = t.op2r[0]; + s_res.i = 0; /* * Detect NaNs, infinities and denormals on input, and set a @@ -1152,22 +1157,25 @@ int runtest(testdetail t) { tresultr[0] = t.resultr[0]; tresultr[1] = t.resultr[1]; resultr[0] = d_res.i[dmsd]; resultr[1] = d_res.i[dlsd]; + resulti[0] = resulti[1] = 0; wres = 2; break; case rt_i: tresultr[0] = t.resultr[0]; resultr[0] = intres; + resulti[0] = 0; wres = 1; break; case rt_s: case rt_s2: tresultr[0] = t.resultr[0]; resultr[0] = s_res.i; + resulti[0] = 0; wres = 1; break; default: puts("unhandled rettype in runtest"); - wres = 0; + abort (); } if(t.resultc != rc_none) { int err = 0; diff --git a/contrib/arm-optimized-routines/math/test/rtest/dotest.c b/contrib/arm-optimized-routines/math/test/rtest/dotest.c index 6be79e1df0d1..5b3e9b4f18e4 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/dotest.c +++ b/contrib/arm-optimized-routines/math/test/rtest/dotest.c @@ -2,7 +2,7 @@ * dotest.c - actually generate mathlib test cases * * Copyright (c) 1999-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdio.h> diff --git a/contrib/arm-optimized-routines/math/test/rtest/intern.h b/contrib/arm-optimized-routines/math/test/rtest/intern.h index 12a9c749e18e..3ebd7ddaf85d 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/intern.h +++ b/contrib/arm-optimized-routines/math/test/rtest/intern.h @@ -2,7 +2,7 @@ * intern.h * * Copyright (c) 1999-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef mathtest_intern_h diff --git a/contrib/arm-optimized-routines/math/test/rtest/main.c b/contrib/arm-optimized-routines/math/test/rtest/main.c index 0d8ead891320..3d533c946f79 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/main.c +++ b/contrib/arm-optimized-routines/math/test/rtest/main.c @@ -2,7 +2,7 @@ * main.c * * Copyright (c) 1999-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <assert.h> diff --git a/contrib/arm-optimized-routines/math/test/rtest/random.c b/contrib/arm-optimized-routines/math/test/rtest/random.c index 56123966b8c4..1de32580b733 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/random.c +++ b/contrib/arm-optimized-routines/math/test/rtest/random.c @@ -2,7 +2,7 @@ * random.c - random number generator for producing mathlib test cases * * Copyright (c) 1998-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "types.h" diff --git a/contrib/arm-optimized-routines/math/test/rtest/random.h b/contrib/arm-optimized-routines/math/test/rtest/random.h index b4b22df82a3d..0b477d72b234 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/random.h +++ b/contrib/arm-optimized-routines/math/test/rtest/random.h @@ -2,7 +2,7 @@ * random.h - header for random.c * * Copyright (c) 2009-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "types.h" diff --git a/contrib/arm-optimized-routines/math/test/rtest/semi.c b/contrib/arm-optimized-routines/math/test/rtest/semi.c index c9f0daf76508..70a7844a48d6 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/semi.c +++ b/contrib/arm-optimized-routines/math/test/rtest/semi.c @@ -2,7 +2,7 @@ * semi.c: test implementations of mathlib seminumerical functions * * Copyright (c) 1999-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdio.h> diff --git a/contrib/arm-optimized-routines/math/test/rtest/semi.h b/contrib/arm-optimized-routines/math/test/rtest/semi.h index 17dc4158fb51..7a1444e55d28 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/semi.h +++ b/contrib/arm-optimized-routines/math/test/rtest/semi.h @@ -2,7 +2,7 @@ * semi.h: header for semi.c * * Copyright (c) 1999-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef test_semi_h diff --git a/contrib/arm-optimized-routines/math/test/rtest/types.h b/contrib/arm-optimized-routines/math/test/rtest/types.h index 53cd557fa4cf..e15b4e06a0d4 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/types.h +++ b/contrib/arm-optimized-routines/math/test/rtest/types.h @@ -2,7 +2,7 @@ * types.h * * Copyright (c) 2005-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef mathtest_types_h diff --git a/contrib/arm-optimized-routines/math/test/rtest/wrappers.c b/contrib/arm-optimized-routines/math/test/rtest/wrappers.c index de45ac5768d0..441017192ab4 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/wrappers.c +++ b/contrib/arm-optimized-routines/math/test/rtest/wrappers.c @@ -2,7 +2,7 @@ * wrappers.c - wrappers to modify output of MPFR/MPC test functions * * Copyright (c) 2014-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <assert.h> diff --git a/contrib/arm-optimized-routines/math/test/rtest/wrappers.h b/contrib/arm-optimized-routines/math/test/rtest/wrappers.h index 7b09c85a59f1..0a8a58777d8a 100644 --- a/contrib/arm-optimized-routines/math/test/rtest/wrappers.h +++ b/contrib/arm-optimized-routines/math/test/rtest/wrappers.h @@ -2,7 +2,7 @@ * wrappers.h - wrappers to modify output of MPFR/MPC test functions * * Copyright (c) 2014-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ typedef struct { diff --git a/contrib/arm-optimized-routines/math/test/runulp.sh b/contrib/arm-optimized-routines/math/test/runulp.sh index 0190d9ab27fb..e2e03e3ae761 100755 --- a/contrib/arm-optimized-routines/math/test/runulp.sh +++ b/contrib/arm-optimized-routines/math/test/runulp.sh @@ -2,8 +2,8 @@ # ULP error check script. # -# Copyright (c) 2019-2020, Arm Limited. -# SPDX-License-Identifier: MIT +# Copyright (c) 2019-2023, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception #set -x set -eu @@ -72,6 +72,16 @@ t pow 0x1.ffffffffffff0p-1 0x1.0000000000008p0 x 0x1p60 0x1p68 50000 t pow 0x1.ffffffffff000p-1 0x1p0 x 0x1p50 0x1p52 50000 t pow -0x1.ffffffffff000p-1 -0x1p0 x 0x1p50 0x1p52 50000 +L=0.02 +t exp10 0 0x1p-47 5000 +t exp10 -0 -0x1p-47 5000 +t exp10 0x1p-47 1 50000 +t exp10 -0x1p-47 -1 50000 +t exp10 1 0x1.34413509f79ffp8 50000 +t exp10 -1 -0x1.434e6420f4374p8 50000 +t exp10 0x1.34413509f79ffp8 inf 5000 +t exp10 -0x1.434e6420f4374p8 -inf 5000 + L=1.0 Ldir=0.9 t erf 0 0xffff000000000000 10000 @@ -143,15 +153,10 @@ Ldir=0.5 done # vector functions + Ldir=0.5 r='n' -flags="${ULPFLAGS:--q} -f" -runs= -check __s_exp 1 && runs=1 -runv= -check __v_exp 1 && runv=1 -runvn= -check __vn_exp 1 && runvn=1 +flags="${ULPFLAGS:--q}" range_exp=' 0 0xffff000000000000 10000 @@ -177,9 +182,10 @@ range_pow=' ' range_sin=' - 0 0xffff000000000000 10000 - 0x1p-4 0x1p4 400000 - -0x1p-23 0x1p23 400000 + 0 0x1p23 500000 + -0 -0x1p23 500000 + 0x1p23 inf 10000 + -0x1p23 -inf 10000 ' range_cos="$range_sin" @@ -199,9 +205,10 @@ range_logf=' ' range_sinf=' - 0 0xffff0000 10000 - 0x1p-4 0x1p4 300000 --0x1p-9 -0x1p9 300000 + 0 0x1p20 500000 + -0 -0x1p20 500000 + 0x1p20 inf 10000 + -0x1p20 -inf 10000 ' range_cosf="$range_sinf" @@ -229,9 +236,8 @@ L_sinf=1.4 L_cosf=1.4 L_powf=2.1 -while read G F R +while read G F D do - [ "$R" = 1 ] || continue case "$G" in \#*) continue ;; esac eval range="\${range_$G}" eval L="\${L_$G}" @@ -239,74 +245,35 @@ do do [ -n "$X" ] || continue case "$X" in \#*) continue ;; esac - t $F $X + disable_fenv="" + if [ -z "$WANT_SIMD_EXCEPT" ] || [ $WANT_SIMD_EXCEPT -eq 0 ]; then + # If library was built with SIMD exceptions + # disabled, disable fenv checking in ulp + # tool. Otherwise, fenv checking may still be + # disabled by adding -f to the end of the run + # line. + disable_fenv="-f" + fi + t $D $disable_fenv $F $X done << EOF $range + EOF done << EOF # group symbol run -exp __s_exp $runs -exp __v_exp $runv -exp __vn_exp $runvn -exp _ZGVnN2v_exp $runvn - -log __s_log $runs -log __v_log $runv -log __vn_log $runvn -log _ZGVnN2v_log $runvn - -pow __s_pow $runs -pow __v_pow $runv -pow __vn_pow $runvn -pow _ZGVnN2vv_pow $runvn - -sin __s_sin $runs -sin __v_sin $runv -sin __vn_sin $runvn -sin _ZGVnN2v_sin $runvn - -cos __s_cos $runs -cos __v_cos $runv -cos __vn_cos $runvn -cos _ZGVnN2v_cos $runvn - -expf __s_expf $runs -expf __v_expf $runv -expf __vn_expf $runvn -expf _ZGVnN4v_expf $runvn - -expf_1u __s_expf_1u $runs -expf_1u __v_expf_1u $runv -expf_1u __vn_expf_1u $runvn - -exp2f __s_exp2f $runs -exp2f __v_exp2f $runv -exp2f __vn_exp2f $runvn -exp2f _ZGVnN4v_exp2f $runvn - -exp2f_1u __s_exp2f_1u $runs -exp2f_1u __v_exp2f_1u $runv -exp2f_1u __vn_exp2f_1u $runvn - -logf __s_logf $runs -logf __v_logf $runv -logf __vn_logf $runvn -logf _ZGVnN4v_logf $runvn - -sinf __s_sinf $runs -sinf __v_sinf $runv -sinf __vn_sinf $runvn -sinf _ZGVnN4v_sinf $runvn - -cosf __s_cosf $runs -cosf __v_cosf $runv -cosf __vn_cosf $runvn -cosf _ZGVnN4v_cosf $runvn - -powf __s_powf $runs -powf __v_powf $runv -powf __vn_powf $runvn -powf _ZGVnN4vv_powf $runvn +exp _ZGVnN2v_exp +log _ZGVnN2v_log +pow _ZGVnN2vv_pow -f +sin _ZGVnN2v_sin -z +cos _ZGVnN2v_cos +expf _ZGVnN4v_expf +expf_1u _ZGVnN4v_expf_1u -f +exp2f _ZGVnN4v_exp2f +exp2f_1u _ZGVnN4v_exp2f_1u -f +logf _ZGVnN4v_logf +sinf _ZGVnN4v_sinf -z +cosf _ZGVnN4v_cosf +powf _ZGVnN4vv_powf -f EOF [ 0 -eq $FAIL ] || { diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/cosf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/cosf.tst index 79160443f099..7ea0d45795a3 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/cosf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/cosf.tst @@ -1,7 +1,7 @@ ; cosf.tst - Directed test cases for SP cosine ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=cosf op1=7fc00001 result=7fc00001 errno=0 func=cosf op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/erf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/erf.tst index 7fa4d1868c0e..12384cef0dd9 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/erf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/erf.tst @@ -1,7 +1,7 @@ ; erf.tst - Directed test cases for erf ; ; Copyright (c) 2007-2020, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=erf op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 func=erf op1=fff80000.00000001 result=7ff80000.00000001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/erff.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/erff.tst index d05b7b1119c4..28f8fa37f5aa 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/erff.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/erff.tst @@ -1,7 +1,7 @@ ; erff.tst ; ; Copyright (c) 2007-2020, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=erff op1=7fc00001 result=7fc00001 errno=0 func=erff op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/exp.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/exp.tst index 85d556cd1e00..0bb2ef4579cc 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/exp.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/exp.tst @@ -1,7 +1,7 @@ ; Directed test cases for exp ; ; Copyright (c) 2018-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=exp op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 func=exp op1=fff80000.00000001 result=7ff80000.00000001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/exp10.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/exp10.tst new file mode 100644 index 000000000000..2cf4273bd1d7 --- /dev/null +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/exp10.tst @@ -0,0 +1,15 @@ +; Directed test cases for exp10 +; +; Copyright (c) 2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=exp10 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=exp10 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=exp10 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=exp10 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=exp10 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=exp10 op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox +func=exp10 op1=fff00000.00000000 result=00000000.00000000 errno=0 +func=exp10 op1=ffefffff.ffffffff result=00000000.00000000 errno=ERANGE status=ux +func=exp10 op1=00000000.00000000 result=3ff00000.00000000 errno=0 +func=exp10 op1=80000000.00000000 result=3ff00000.00000000 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/exp2.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/exp2.tst index fa56c9f8be4b..7069f9010c8c 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/exp2.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/exp2.tst @@ -1,7 +1,7 @@ ; Directed test cases for exp2 ; ; Copyright (c) 2018-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=exp2 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 func=exp2 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/exp2f.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/exp2f.tst index 38cfc3f78ac6..6ca2eeab4e12 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/exp2f.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/exp2f.tst @@ -1,7 +1,7 @@ ; exp2f.tst - Directed test cases for exp2f ; ; Copyright (c) 2017-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=exp2f op1=7fc00001 result=7fc00001 errno=0 func=exp2f op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/expf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/expf.tst index ff0f671c2656..89ae8fe78e6c 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/expf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/expf.tst @@ -1,7 +1,7 @@ ; expf.tst - Directed test cases for expf ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=expf op1=7fc00001 result=7fc00001 errno=0 func=expf op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/log.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/log.tst index a0aa398cbf73..686ea835645b 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/log.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/log.tst @@ -1,7 +1,7 @@ ; Directed test cases for log ; ; Copyright (c) 2018-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=log op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 func=log op1=fff80000.00000001 result=7ff80000.00000001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/log2.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/log2.tst index ff1286cbd53e..361bddec374b 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/log2.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/log2.tst @@ -1,7 +1,7 @@ ; Directed test cases for log2 ; ; Copyright (c) 2018-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=log2 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 func=log2 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/log2f.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/log2f.tst index 5832c4f08f1e..5fce051cddba 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/log2f.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/log2f.tst @@ -1,7 +1,7 @@ ; log2f.tst - Directed test cases for log2f ; ; Copyright (c) 2017-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=log2f op1=7fc00001 result=7fc00001 errno=0 func=log2f op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/logf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/logf.tst index 6e68a36e0f6a..a6d1b9d5c51f 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/logf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/logf.tst @@ -1,7 +1,7 @@ ; logf.tst - Directed test cases for logf ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=logf op1=7fc00001 result=7fc00001 errno=0 func=logf op1=ffc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/pow.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/pow.tst index 19665817153d..879d12864afe 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/pow.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/pow.tst @@ -1,7 +1,7 @@ ; Directed test cases for pow ; ; Copyright (c) 2018-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=pow op1=00000000.00000000 op2=00000000.00000000 result=3ff00000.00000000 errno=0 func=pow op1=00000000.00000000 op2=00000000.00000001 result=00000000.00000000 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/powf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/powf.tst index 3fa8b110f8bc..46d522400871 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/powf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/powf.tst @@ -1,7 +1,7 @@ ; powf.tst - Directed test cases for powf ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=powf op1=7f800001 op2=7f800001 result=7fc00001 errno=0 status=i func=powf op1=7f800001 op2=ff800001 result=7fc00001 errno=0 status=i diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/sincosf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/sincosf.tst index 4b33d2291c66..cddb346558ea 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/sincosf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/sincosf.tst @@ -1,7 +1,7 @@ ; Directed test cases for SP sincos ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=sincosf_sinf op1=7fc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/directed/sinf.tst b/contrib/arm-optimized-routines/math/test/testcases/directed/sinf.tst index ded80b1598c6..041b13d5d6cb 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/directed/sinf.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/directed/sinf.tst @@ -1,7 +1,7 @@ ; sinf.tst - Directed test cases for SP sine ; ; Copyright (c) 2007-2019, Arm Limited. -; SPDX-License-Identifier: MIT +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception func=sinf op1=7fc00001 result=7fc00001 errno=0 diff --git a/contrib/arm-optimized-routines/math/test/testcases/random/double.tst b/contrib/arm-optimized-routines/math/test/testcases/random/double.tst index c24ff80d5d95..8e885d61722a 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/random/double.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/random/double.tst @@ -1,7 +1,7 @@ !! double.tst - Random test case specification for DP functions !! !! Copyright (c) 1999-2019, Arm Limited. -!! SPDX-License-Identifier: MIT +!! SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception test exp 10000 test exp2 10000 diff --git a/contrib/arm-optimized-routines/math/test/testcases/random/float.tst b/contrib/arm-optimized-routines/math/test/testcases/random/float.tst index d02a22750abe..ea4a5a015214 100644 --- a/contrib/arm-optimized-routines/math/test/testcases/random/float.tst +++ b/contrib/arm-optimized-routines/math/test/testcases/random/float.tst @@ -1,7 +1,7 @@ !! single.tst - Random test case specification for SP functions !! !! Copyright (c) 1999-2019, Arm Limited. -!! SPDX-License-Identifier: MIT +!! SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception test sinf 10000 test cosf 10000 diff --git a/contrib/arm-optimized-routines/math/test/ulp.c b/contrib/arm-optimized-routines/math/test/ulp.c index 51479b87a0fd..5ff29972e50e 100644 --- a/contrib/arm-optimized-routines/math/test/ulp.c +++ b/contrib/arm-optimized-routines/math/test/ulp.c @@ -1,10 +1,11 @@ /* * ULP error checking tool for math functions. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ +#define _GNU_SOURCE #include <ctype.h> #include <fenv.h> #include <float.h> @@ -23,11 +24,6 @@ # include <mpfr.h> #endif -#ifndef WANT_VMATH -/* Enable the build of vector math code. */ -# define WANT_VMATH 1 -#endif - static inline uint64_t asuint64 (double f) { @@ -212,73 +208,61 @@ struct conf unsigned long long n; double softlim; double errlim; + int ignore_zero_sign; }; -/* Wrappers for sincos. */ -static float sincosf_sinf(float x) {(void)cosf(x); return sinf(x);} -static float sincosf_cosf(float x) {(void)sinf(x); return cosf(x);} -static double sincos_sin(double x) {(void)cos(x); return sin(x);} -static double sincos_cos(double x) {(void)sin(x); return cos(x);} -#if USE_MPFR -static int sincos_mpfr_sin(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { mpfr_cos(y,x,r); return mpfr_sin(y,x,r); } -static int sincos_mpfr_cos(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { mpfr_sin(y,x,r); return mpfr_cos(y,x,r); } -#endif - /* A bit of a hack: call vector functions twice with the same input in lane 0 but a different value in other lanes: once with an in-range value and then with a special case value. */ static int secondcall; /* Wrappers for vector functions. */ -#if __aarch64__ && WANT_VMATH +#ifdef __vpcs typedef __f32x4_t v_float; typedef __f64x2_t v_double; -static const float fv[2] = {1.0f, -INFINITY}; -static const double dv[2] = {1.0, -INFINITY}; +/* First element of fv and dv may be changed by -c argument. */ +static float fv[2] = {1.0f, -INFINITY}; +static double dv[2] = {1.0, -INFINITY}; static inline v_float argf(float x) { return (v_float){x,x,x,fv[secondcall]}; } static inline v_double argd(double x) { return (v_double){x,dv[secondcall]}; } - -static float v_sinf(float x) { return __v_sinf(argf(x))[0]; } -static float v_cosf(float x) { return __v_cosf(argf(x))[0]; } -static float v_expf_1u(float x) { return __v_expf_1u(argf(x))[0]; } -static float v_expf(float x) { return __v_expf(argf(x))[0]; } -static float v_exp2f_1u(float x) { return __v_exp2f_1u(argf(x))[0]; } -static float v_exp2f(float x) { return __v_exp2f(argf(x))[0]; } -static float v_logf(float x) { return __v_logf(argf(x))[0]; } -static float v_powf(float x, float y) { return __v_powf(argf(x),argf(y))[0]; } -static double v_sin(double x) { return __v_sin(argd(x))[0]; } -static double v_cos(double x) { return __v_cos(argd(x))[0]; } -static double v_exp(double x) { return __v_exp(argd(x))[0]; } -static double v_log(double x) { return __v_log(argd(x))[0]; } -static double v_pow(double x, double y) { return __v_pow(argd(x),argd(y))[0]; } -#ifdef __vpcs -static float vn_sinf(float x) { return __vn_sinf(argf(x))[0]; } -static float vn_cosf(float x) { return __vn_cosf(argf(x))[0]; } -static float vn_expf_1u(float x) { return __vn_expf_1u(argf(x))[0]; } -static float vn_expf(float x) { return __vn_expf(argf(x))[0]; } -static float vn_exp2f_1u(float x) { return __vn_exp2f_1u(argf(x))[0]; } -static float vn_exp2f(float x) { return __vn_exp2f(argf(x))[0]; } -static float vn_logf(float x) { return __vn_logf(argf(x))[0]; } -static float vn_powf(float x, float y) { return __vn_powf(argf(x),argf(y))[0]; } -static double vn_sin(double x) { return __vn_sin(argd(x))[0]; } -static double vn_cos(double x) { return __vn_cos(argd(x))[0]; } -static double vn_exp(double x) { return __vn_exp(argd(x))[0]; } -static double vn_log(double x) { return __vn_log(argd(x))[0]; } -static double vn_pow(double x, double y) { return __vn_pow(argd(x),argd(y))[0]; } -static float Z_sinf(float x) { return _ZGVnN4v_sinf(argf(x))[0]; } -static float Z_cosf(float x) { return _ZGVnN4v_cosf(argf(x))[0]; } -static float Z_expf(float x) { return _ZGVnN4v_expf(argf(x))[0]; } -static float Z_exp2f(float x) { return _ZGVnN4v_exp2f(argf(x))[0]; } -static float Z_logf(float x) { return _ZGVnN4v_logf(argf(x))[0]; } -static float Z_powf(float x, float y) { return _ZGVnN4vv_powf(argf(x),argf(y))[0]; } -static double Z_sin(double x) { return _ZGVnN2v_sin(argd(x))[0]; } -static double Z_cos(double x) { return _ZGVnN2v_cos(argd(x))[0]; } -static double Z_exp(double x) { return _ZGVnN2v_exp(argd(x))[0]; } -static double Z_log(double x) { return _ZGVnN2v_log(argd(x))[0]; } -static double Z_pow(double x, double y) { return _ZGVnN2vv_pow(argd(x),argd(y))[0]; } +#if WANT_SVE_MATH +#include <arm_sve.h> +typedef __SVFloat32_t sv_float; +typedef __SVFloat64_t sv_double; + +static inline sv_float svargf(float x) { + int n = svcntw(); + float base[n]; + for (int i=0; i<n; i++) + base[i] = (float)x; + base[n-1] = (float) fv[secondcall]; + return svld1(svptrue_b32(), base); +} +static inline sv_double svargd(double x) { + int n = svcntd(); + double base[n]; + for (int i=0; i<n; i++) + base[i] = x; + base[n-1] = dv[secondcall]; + return svld1(svptrue_b64(), base); +} +static inline float svretf(sv_float vec) { + int n = svcntw(); + float res[n]; + svst1(svptrue_b32(), res, vec); + return res[0]; +} +static inline double svretd(sv_double vec) { + int n = svcntd(); + double res[n]; + svst1(svptrue_b64(), res, vec); + return res[0]; +} #endif #endif +#include "test/ulp_wrappers.h" + struct fun { const char *name; @@ -322,83 +306,44 @@ static const struct fun fun[] = { #define F2(x) F (x##f, x##f, x, mpfr_##x, 2, 1, f2, 0) #define D1(x) F (x, x, x##l, mpfr_##x, 1, 0, d1, 0) #define D2(x) F (x, x, x##l, mpfr_##x, 2, 0, d2, 0) - F1 (sin) - F1 (cos) - F (sincosf_sinf, sincosf_sinf, sincos_sin, sincos_mpfr_sin, 1, 1, f1, 0) - F (sincosf_cosf, sincosf_cosf, sincos_cos, sincos_mpfr_cos, 1, 1, f1, 0) - F1 (exp) - F1 (exp2) - F1 (log) - F1 (log2) - F2 (pow) - F1 (erf) - D1 (exp) - D1 (exp2) - D1 (log) - D1 (log2) - D2 (pow) - D1 (erf) -#if WANT_VMATH - F (__s_sinf, __s_sinf, sin, mpfr_sin, 1, 1, f1, 0) - F (__s_cosf, __s_cosf, cos, mpfr_cos, 1, 1, f1, 0) - F (__s_expf_1u, __s_expf_1u, exp, mpfr_exp, 1, 1, f1, 0) - F (__s_expf, __s_expf, exp, mpfr_exp, 1, 1, f1, 0) - F (__s_exp2f_1u, __s_exp2f_1u, exp2, mpfr_exp2, 1, 1, f1, 0) - F (__s_exp2f, __s_exp2f, exp2, mpfr_exp2, 1, 1, f1, 0) - F (__s_powf, __s_powf, pow, mpfr_pow, 2, 1, f2, 0) - F (__s_logf, __s_logf, log, mpfr_log, 1, 1, f1, 0) - F (__s_sin, __s_sin, sinl, mpfr_sin, 1, 0, d1, 0) - F (__s_cos, __s_cos, cosl, mpfr_cos, 1, 0, d1, 0) - F (__s_exp, __s_exp, expl, mpfr_exp, 1, 0, d1, 0) - F (__s_log, __s_log, logl, mpfr_log, 1, 0, d1, 0) - F (__s_pow, __s_pow, powl, mpfr_pow, 2, 0, d2, 0) -#if __aarch64__ - F (__v_sinf, v_sinf, sin, mpfr_sin, 1, 1, f1, 1) - F (__v_cosf, v_cosf, cos, mpfr_cos, 1, 1, f1, 1) - F (__v_expf_1u, v_expf_1u, exp, mpfr_exp, 1, 1, f1, 1) - F (__v_expf, v_expf, exp, mpfr_exp, 1, 1, f1, 1) - F (__v_exp2f_1u, v_exp2f_1u, exp2, mpfr_exp2, 1, 1, f1, 1) - F (__v_exp2f, v_exp2f, exp2, mpfr_exp2, 1, 1, f1, 1) - F (__v_logf, v_logf, log, mpfr_log, 1, 1, f1, 1) - F (__v_powf, v_powf, pow, mpfr_pow, 2, 1, f2, 1) - F (__v_sin, v_sin, sinl, mpfr_sin, 1, 0, d1, 1) - F (__v_cos, v_cos, cosl, mpfr_cos, 1, 0, d1, 1) - F (__v_exp, v_exp, expl, mpfr_exp, 1, 0, d1, 1) - F (__v_log, v_log, logl, mpfr_log, 1, 0, d1, 1) - F (__v_pow, v_pow, powl, mpfr_pow, 2, 0, d2, 1) -#ifdef __vpcs - F (__vn_sinf, vn_sinf, sin, mpfr_sin, 1, 1, f1, 1) - F (__vn_cosf, vn_cosf, cos, mpfr_cos, 1, 1, f1, 1) - F (__vn_expf_1u, vn_expf_1u, exp, mpfr_exp, 1, 1, f1, 1) - F (__vn_expf, vn_expf, exp, mpfr_exp, 1, 1, f1, 1) - F (__vn_exp2f_1u, vn_exp2f_1u, exp2, mpfr_exp2, 1, 1, f1, 1) - F (__vn_exp2f, vn_exp2f, exp2, mpfr_exp2, 1, 1, f1, 1) - F (__vn_logf, vn_logf, log, mpfr_log, 1, 1, f1, 1) - F (__vn_powf, vn_powf, pow, mpfr_pow, 2, 1, f2, 1) - F (__vn_sin, vn_sin, sinl, mpfr_sin, 1, 0, d1, 1) - F (__vn_cos, vn_cos, cosl, mpfr_cos, 1, 0, d1, 1) - F (__vn_exp, vn_exp, expl, mpfr_exp, 1, 0, d1, 1) - F (__vn_log, vn_log, logl, mpfr_log, 1, 0, d1, 1) - F (__vn_pow, vn_pow, powl, mpfr_pow, 2, 0, d2, 1) - F (_ZGVnN4v_sinf, Z_sinf, sin, mpfr_sin, 1, 1, f1, 1) - F (_ZGVnN4v_cosf, Z_cosf, cos, mpfr_cos, 1, 1, f1, 1) - F (_ZGVnN4v_expf, Z_expf, exp, mpfr_exp, 1, 1, f1, 1) - F (_ZGVnN4v_exp2f, Z_exp2f, exp2, mpfr_exp2, 1, 1, f1, 1) - F (_ZGVnN4v_logf, Z_logf, log, mpfr_log, 1, 1, f1, 1) - F (_ZGVnN4vv_powf, Z_powf, pow, mpfr_pow, 2, 1, f2, 1) - F (_ZGVnN2v_sin, Z_sin, sinl, mpfr_sin, 1, 0, d1, 1) - F (_ZGVnN2v_cos, Z_cos, cosl, mpfr_cos, 1, 0, d1, 1) - F (_ZGVnN2v_exp, Z_exp, expl, mpfr_exp, 1, 0, d1, 1) - F (_ZGVnN2v_log, Z_log, logl, mpfr_log, 1, 0, d1, 1) - F (_ZGVnN2vv_pow, Z_pow, powl, mpfr_pow, 2, 0, d2, 1) -#endif -#endif -#endif +/* Neon routines. */ +#define VF1(x) F (__v_##x##f, v_##x##f, x, mpfr_##x, 1, 1, f1, 0) +#define VF2(x) F (__v_##x##f, v_##x##f, x, mpfr_##x, 2, 1, f2, 0) +#define VD1(x) F (__v_##x, v_##x, x##l, mpfr_##x, 1, 0, d1, 0) +#define VD2(x) F (__v_##x, v_##x, x##l, mpfr_##x, 2, 0, d2, 0) +#define VNF1(x) F (__vn_##x##f, vn_##x##f, x, mpfr_##x, 1, 1, f1, 0) +#define VNF2(x) F (__vn_##x##f, vn_##x##f, x, mpfr_##x, 2, 1, f2, 0) +#define VND1(x) F (__vn_##x, vn_##x, x##l, mpfr_##x, 1, 0, d1, 0) +#define VND2(x) F (__vn_##x, vn_##x, x##l, mpfr_##x, 2, 0, d2, 0) +#define ZVF1(x) F (_ZGVnN4v_##x##f, Z_##x##f, x, mpfr_##x, 1, 1, f1, 0) +#define ZVF2(x) F (_ZGVnN4vv_##x##f, Z_##x##f, x, mpfr_##x, 2, 1, f2, 0) +#define ZVD1(x) F (_ZGVnN2v_##x, Z_##x, x##l, mpfr_##x, 1, 0, d1, 0) +#define ZVD2(x) F (_ZGVnN2vv_##x, Z_##x, x##l, mpfr_##x, 2, 0, d2, 0) +#define ZVNF1(x) VNF1 (x) ZVF1 (x) +#define ZVNF2(x) VNF2 (x) ZVF2 (x) +#define ZVND1(x) VND1 (x) ZVD1 (x) +#define ZVND2(x) VND2 (x) ZVD2 (x) +/* SVE routines. */ +#define SVF1(x) F (__sv_##x##f, sv_##x##f, x, mpfr_##x, 1, 1, f1, 0) +#define SVF2(x) F (__sv_##x##f, sv_##x##f, x, mpfr_##x, 2, 1, f2, 0) +#define SVD1(x) F (__sv_##x, sv_##x, x##l, mpfr_##x, 1, 0, d1, 0) +#define SVD2(x) F (__sv_##x, sv_##x, x##l, mpfr_##x, 2, 0, d2, 0) +#define ZSVF1(x) F (_ZGVsMxv_##x##f, Z_sv_##x##f, x, mpfr_##x, 1, 1, f1, 0) +#define ZSVF2(x) F (_ZGVsMxvv_##x##f, Z_sv_##x##f, x, mpfr_##x, 2, 1, f2, 0) +#define ZSVD1(x) F (_ZGVsMxv_##x, Z_sv_##x, x##l, mpfr_##x, 1, 0, d1, 0) +#define ZSVD2(x) F (_ZGVsMxvv_##x, Z_sv_##x, x##l, mpfr_##x, 2, 0, d2, 0) + +#include "test/ulp_funcs.h" + #undef F #undef F1 #undef F2 #undef D1 #undef D2 +#undef SVF1 +#undef SVF2 +#undef SVD1 +#undef SVD2 {0}}; /* Boilerplate for generic calls. */ @@ -639,12 +584,18 @@ call_mpfr_d2 (mpfr_t y, const struct fun *f, struct args_d2 a, mpfr_rnd_t r) static void usage (void) { - puts ("./ulp [-q] [-m] [-f] [-r nudz] [-l soft-ulplimit] [-e ulplimit] func " + puts ("./ulp [-q] [-m] [-f] [-r {n|u|d|z}] [-l soft-ulplimit] [-e ulplimit] func " "lo [hi [x lo2 hi2] [count]]"); puts ("Compares func against a higher precision implementation in [lo; hi]."); puts ("-q: quiet."); puts ("-m: use mpfr even if faster method is available."); - puts ("-f: disable fenv testing (rounding modes and exceptions)."); + puts ("-f: disable fenv exceptions testing."); +#ifdef ___vpcs + puts ("-c: neutral 'control value' to test behaviour when one lane can affect another. \n" + " This should be different from tested input in other lanes, and non-special \n" + " (i.e. should not trigger fenv exceptions). Default is 1."); +#endif + puts ("-z: ignore sign of 0."); puts ("Supported func:"); for (const struct fun *f = fun; f->name; f++) printf ("\t%s\n", f->name); @@ -768,6 +719,7 @@ main (int argc, char *argv[]) conf.fenv = 1; conf.softlim = 0; conf.errlim = INFINITY; + conf.ignore_zero_sign = 0; for (;;) { argc--; @@ -807,11 +759,22 @@ main (int argc, char *argv[]) { argc--; argv++; - if (argc < 1) + if (argc < 1 || argv[0][1] != '\0') usage (); conf.rc = argv[0][0]; } break; + case 'z': + conf.ignore_zero_sign = 1; + break; +#ifdef __vpcs + case 'c': + argc--; + argv++; + fv[0] = strtof(argv[0], 0); + dv[0] = strtod(argv[0], 0); + break; +#endif default: usage (); } @@ -837,7 +800,19 @@ main (int argc, char *argv[]) if (strcmp (argv[0], f->name) == 0) break; if (!f->name) - usage (); + { +#ifndef __vpcs + /* Ignore vector math functions if vector math is not supported. */ + if (strncmp (argv[0], "_ZGVnN", 6) == 0) + exit (0); +#endif +#if !WANT_SVE_MATH + if (strncmp (argv[0], "_ZGVsMxv", 8) == 0) + exit (0); +#endif + printf ("math function %s not supported\n", argv[0]); + exit (1); + } if (!f->singleprec && LDBL_MANT_DIG == DBL_MANT_DIG) conf.mpfr = 1; /* Use mpfr if long double has no extra precision. */ if (!USE_MPFR && conf.mpfr) diff --git a/contrib/arm-optimized-routines/math/test/ulp.h b/contrib/arm-optimized-routines/math/test/ulp.h index a0c301664321..b0bc59aeef8d 100644 --- a/contrib/arm-optimized-routines/math/test/ulp.h +++ b/contrib/arm-optimized-routines/math/test/ulp.h @@ -1,8 +1,8 @@ /* * Generic functions for ULP error estimation. * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* For each different math function type, @@ -37,7 +37,8 @@ static int RT(ulpscale_mpfr) (mpfr_t x, int t) /* Difference between exact result and closest real number that gets rounded to got, i.e. error before rounding, for a correctly rounded result the difference is 0. */ -static double RT(ulperr) (RT(float) got, const struct RT(ret) * p, int r) +static double RT (ulperr) (RT (float) got, const struct RT (ret) * p, int r, + int ignore_zero_sign) { RT(float) want = p->y; RT(float) d; @@ -45,10 +46,18 @@ static double RT(ulperr) (RT(float) got, const struct RT(ret) * p, int r) if (RT(asuint) (got) == RT(asuint) (want)) return 0.0; + if (isnan (got) && isnan (want)) + /* Ignore sign of NaN. */ + return RT (issignaling) (got) == RT (issignaling) (want) ? 0 : INFINITY; if (signbit (got) != signbit (want)) - /* May have false positives with NaN. */ - //return isnan(got) && isnan(want) ? 0 : INFINITY; - return INFINITY; + { + /* Fall through to ULP calculation if ignoring sign of zero and at + exactly one of want and got is non-zero. */ + if (ignore_zero_sign && want == got) + return 0.0; + if (!ignore_zero_sign || (want != 0 && got != 0)) + return INFINITY; + } if (!isfinite (want) || !isfinite (got)) { if (isnan (got) != isnan (want)) @@ -114,8 +123,12 @@ static inline void T(call_fenv) (const struct fun *f, struct T(args) a, int r, static inline void T(call_nofenv) (const struct fun *f, struct T(args) a, int r, RT(float) * y, int *ex) { + if (r != FE_TONEAREST) + fesetround (r); *y = T(call) (f, a); *ex = 0; + if (r != FE_TONEAREST) + fesetround (FE_TONEAREST); } static inline int T(call_long_fenv) (const struct fun *f, struct T(args) a, @@ -155,8 +168,12 @@ static inline int T(call_long_nofenv) (const struct fun *f, struct T(args) a, int r, struct RT(ret) * p, RT(float) ygot, int exgot) { + if (r != FE_TONEAREST) + fesetround (r); RT(double) yl = T(call_long) (f, a); p->y = (RT(float)) yl; + if (r != FE_TONEAREST) + fesetround (FE_TONEAREST); if (RT(isok_nofenv) (ygot, p->y)) return 1; p->ulpexp = RT(ulpscale) (p->y); @@ -288,7 +305,7 @@ static int T(cmp) (const struct fun *f, struct gen *gen, if (!ok) { int print = 0; - double err = RT(ulperr) (ygot, &want, r); + double err = RT (ulperr) (ygot, &want, r, conf->ignore_zero_sign); double abserr = fabs (err); // TODO: count errors below accuracy limit. if (abserr > 0) diff --git a/contrib/arm-optimized-routines/math/test/ulp_funcs.h b/contrib/arm-optimized-routines/math/test/ulp_funcs.h new file mode 100644 index 000000000000..84f7927d3935 --- /dev/null +++ b/contrib/arm-optimized-routines/math/test/ulp_funcs.h @@ -0,0 +1,40 @@ +/* + * Function entries for ulp. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +/* clang-format off */ + F1 (sin) + F1 (cos) + F (sincosf_sinf, sincosf_sinf, sincos_sin, sincos_mpfr_sin, 1, 1, f1, 0) + F (sincosf_cosf, sincosf_cosf, sincos_cos, sincos_mpfr_cos, 1, 1, f1, 0) + F1 (exp) + F1 (exp2) + F1 (log) + F1 (log2) + F2 (pow) + F1 (erf) + D1 (exp) + D1 (exp10) + D1 (exp2) + D1 (log) + D1 (log2) + D2 (pow) + D1 (erf) +#ifdef __vpcs + F (_ZGVnN4v_sinf, Z_sinf, sin, mpfr_sin, 1, 1, f1, 1) + F (_ZGVnN4v_cosf, Z_cosf, cos, mpfr_cos, 1, 1, f1, 1) + F (_ZGVnN4v_expf_1u, Z_expf_1u, exp, mpfr_exp, 1, 1, f1, 1) + F (_ZGVnN4v_expf, Z_expf, exp, mpfr_exp, 1, 1, f1, 1) + F (_ZGVnN4v_exp2f_1u, Z_exp2f_1u, exp2, mpfr_exp2, 1, 1, f1, 1) + F (_ZGVnN4v_exp2f, Z_exp2f, exp2, mpfr_exp2, 1, 1, f1, 1) + F (_ZGVnN4v_logf, Z_logf, log, mpfr_log, 1, 1, f1, 1) + F (_ZGVnN4vv_powf, Z_powf, pow, mpfr_pow, 2, 1, f2, 1) + F (_ZGVnN2v_sin, Z_sin, sinl, mpfr_sin, 1, 0, d1, 1) + F (_ZGVnN2v_cos, Z_cos, cosl, mpfr_cos, 1, 0, d1, 1) + F (_ZGVnN2v_exp, Z_exp, expl, mpfr_exp, 1, 0, d1, 1) + F (_ZGVnN2v_log, Z_log, logl, mpfr_log, 1, 0, d1, 1) + F (_ZGVnN2vv_pow, Z_pow, powl, mpfr_pow, 2, 0, d2, 1) +#endif +/* clang-format on */ diff --git a/contrib/arm-optimized-routines/math/test/ulp_wrappers.h b/contrib/arm-optimized-routines/math/test/ulp_wrappers.h new file mode 100644 index 000000000000..60dc3d6dd652 --- /dev/null +++ b/contrib/arm-optimized-routines/math/test/ulp_wrappers.h @@ -0,0 +1,37 @@ +/* + * Function wrappers for ulp. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* clang-format off */ + +/* Wrappers for sincos. */ +static float sincosf_sinf(float x) {(void)cosf(x); return sinf(x);} +static float sincosf_cosf(float x) {(void)sinf(x); return cosf(x);} +static double sincos_sin(double x) {(void)cos(x); return sin(x);} +static double sincos_cos(double x) {(void)sin(x); return cos(x);} +#if USE_MPFR +static int sincos_mpfr_sin(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { mpfr_cos(y,x,r); return mpfr_sin(y,x,r); } +static int sincos_mpfr_cos(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { mpfr_sin(y,x,r); return mpfr_cos(y,x,r); } +#endif + +/* Wrappers for vector functions. */ +#ifdef __vpcs +static float Z_sinf(float x) { return _ZGVnN4v_sinf(argf(x))[0]; } +static float Z_cosf(float x) { return _ZGVnN4v_cosf(argf(x))[0]; } +static float Z_expf_1u(float x) { return _ZGVnN4v_expf_1u(argf(x))[0]; } +static float Z_expf(float x) { return _ZGVnN4v_expf(argf(x))[0]; } +static float Z_exp2f_1u(float x) { return _ZGVnN4v_exp2f_1u(argf(x))[0]; } +static float Z_exp2f(float x) { return _ZGVnN4v_exp2f(argf(x))[0]; } +static float Z_logf(float x) { return _ZGVnN4v_logf(argf(x))[0]; } +static float Z_powf(float x, float y) { return _ZGVnN4vv_powf(argf(x),argf(y))[0]; } +static double Z_sin(double x) { return _ZGVnN2v_sin(argd(x))[0]; } +static double Z_cos(double x) { return _ZGVnN2v_cos(argd(x))[0]; } +static double Z_exp(double x) { return _ZGVnN2v_exp(argd(x))[0]; } +static double Z_log(double x) { return _ZGVnN2v_log(argd(x))[0]; } +static double Z_pow(double x, double y) { return _ZGVnN2vv_pow(argd(x),argd(y))[0]; } +#endif + +/* clang-format on */ diff --git a/contrib/arm-optimized-routines/math/tgamma128.c b/contrib/arm-optimized-routines/math/tgamma128.c new file mode 100644 index 000000000000..65deacc49d99 --- /dev/null +++ b/contrib/arm-optimized-routines/math/tgamma128.c @@ -0,0 +1,356 @@ +/* + * Implementation of the true gamma function (as opposed to lgamma) + * for 128-bit long double. + * + * Copyright (c) 2006-2024, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* + * This module implements the float128 gamma function under the name + * tgamma128. It's expected to be suitable for integration into system + * maths libraries under the standard name tgammal, if long double is + * 128-bit. Such a library will probably want to check the error + * handling and optimize the initial process of extracting the + * exponent, which is done here by simple and portable (but + * potentially slower) methods. + */ + +#include <float.h> +#include <math.h> +#include <stdbool.h> +#include <stddef.h> + +/* Only binary128 format is supported. */ +#if LDBL_MANT_DIG == 113 + +#include "tgamma128.h" + +#define lenof(x) (sizeof(x)/sizeof(*(x))) + +/* + * Helper routine to evaluate a polynomial via Horner's rule + */ +static long double poly(const long double *coeffs, size_t n, long double x) +{ + long double result = coeffs[--n]; + + while (n > 0) + result = (result * x) + coeffs[--n]; + + return result; +} + +/* + * Compute sin(pi*x) / pi, for use in the reflection formula that + * relates gamma(-x) and gamma(x). + */ +static long double sin_pi_x_over_pi(long double x) +{ + int quo; + long double fracpart = remquol(x, 0.5L, &quo); + + long double sign = 1.0L; + if (quo & 2) + sign = -sign; + quo &= 1; + + if (quo == 0 && fabsl(fracpart) < 0x1.p-58L) { + /* For numbers this size, sin(pi*x) is so close to pi*x that + * sin(pi*x)/pi is indistinguishable from x in float128 */ + return sign * fracpart; + } + + if (quo == 0) { + return sign * sinl(pi*fracpart) / pi; + } else { + return sign * cosl(pi*fracpart) / pi; + } +} + +/* Return tgamma(x) on the assumption that x >= 8. */ +static long double tgamma_large(long double x, + bool negative, long double negadjust) +{ + /* + * In this range we compute gamma(x) as x^(x-1/2) * e^-x * K, + * where K is a correction factor computed as a polynomial in 1/x. + * + * (Vaguely inspired by the form of the Lanczos approximation, but + * I tried the Lanczos approximation itself and it suffers badly + * from big cancellation leading to loss of significance.) + */ + long double t = 1/x; + long double p = poly(coeffs_large, lenof(coeffs_large), t); + + /* + * To avoid overflow in cases where x^(x-0.5) does overflow + * but gamma(x) does not, we split x^(x-0.5) in half and + * multiply back up _after_ multiplying the shrinking factor + * of exp(-(x-0.5)). + * + * Note that computing x-0.5 and (x-0.5)/2 is exact for the + * relevant range of x, so the only sources of error are pow + * and exp themselves, plus the multiplications. + */ + long double powhalf = powl(x, (x-0.5L)/2.0L); + long double expret = expl(-(x-0.5L)); + + if (!negative) { + return (expret * powhalf) * powhalf * p; + } else { + /* + * Apply the reflection formula as commented below, but + * carefully: negadjust has magnitude less than 1, so it can + * turn a case where gamma(+x) would overflow into a case + * where gamma(-x) doesn't underflow. Not only that, but the + * FP format has greater range in the tiny domain due to + * denormals. For both reasons, it's not good enough to + * compute the positive result and then adjust it. + */ + long double ret = 1 / ((expret * powhalf) * (x * negadjust) * p); + return ret / powhalf; + } +} + +/* Return tgamma(x) on the assumption that 0 <= x < 1/32. */ +static long double tgamma_tiny(long double x, + bool negative, long double negadjust) +{ + /* + * For x near zero, we use a polynomial approximation to + * g = 1/(x*gamma(x)), and then return 1/(g*x). + */ + long double g = poly(coeffs_tiny, lenof(coeffs_tiny), x); + if (!negative) + return 1.0L / (g*x); + else + return g / negadjust; +} + +/* Return tgamma(x) on the assumption that 0 <= x < 2^-113. */ +static long double tgamma_ultratiny(long double x, bool negative, + long double negadjust) +{ + /* On this interval, gamma can't even be distinguished from 1/x, + * so we skip the polynomial evaluation in tgamma_tiny, partly to + * save time and partly to avoid the tiny intermediate values + * setting the underflow exception flag. */ + if (!negative) + return 1.0L / x; + else + return 1.0L / negadjust; +} + +/* Return tgamma(x) on the assumption that 1 <= x <= 2. */ +static long double tgamma_central(long double x) +{ + /* + * In this central interval, our strategy is to finding the + * difference between x and the point where gamma has a minimum, + * and approximate based on that. + */ + + /* The difference between the input x and the minimum x. The first + * subtraction is expected to be exact, since x and min_hi have + * the same exponent (unless x=2, in which case it will still be + * exact). */ + long double t = (x - min_x_hi) - min_x_lo; + + /* + * Now use two different polynomials for the intervals [1,m] and + * [m,2]. + */ + long double p; + if (t < 0) + p = poly(coeffs_central_neg, lenof(coeffs_central_neg), -t); + else + p = poly(coeffs_central_pos, lenof(coeffs_central_pos), t); + + return (min_y_lo + p * (t*t)) + min_y_hi; +} + +long double tgamma128(long double x) +{ + /* + * Start by extracting the number's sign and exponent, and ruling + * out cases of non-normalized numbers. + * + * For an implementation integrated into a system libm, it would + * almost certainly be quicker to do this by direct bitwise access + * to the input float128 value, using whatever is the local idiom + * for knowing its endianness. + * + * Integration into a system libc may also need to worry about + * setting errno, if that's the locally preferred way to report + * math.h errors. + */ + int sign = signbit(x); + int exponent; + switch (fpclassify(x)) { + case FP_NAN: + return x+x; /* propagate QNaN, make SNaN throw an exception */ + case FP_ZERO: + return 1/x; /* divide by zero on purpose to indicate a pole */ + case FP_INFINITE: + if (sign) { + return x-x; /* gamma(-inf) has indeterminate sign, so provoke an + * IEEE invalid operation exception to indicate that */ + } + return x; /* but gamma(+inf) is just +inf with no error */ + case FP_SUBNORMAL: + exponent = -16384; + break; + default: + frexpl(x, &exponent); + exponent--; + break; + } + + bool negative = false; + long double negadjust = 0.0L; + + if (sign) { + /* + * Euler's reflection formula is + * + * gamma(1-x) gamma(x) = pi/sin(pi*x) + * + * pi + * => gamma(x) = -------------------- + * gamma(1-x) sin(pi*x) + * + * But computing 1-x is going to lose a lot of accuracy when x + * is very small, so instead we transform using the recurrence + * gamma(t+1)=t gamma(t). Setting t=-x, this gives us + * gamma(1-x) = -x gamma(-x), so we now have + * + * pi + * gamma(x) = ---------------------- + * -x gamma(-x) sin(pi*x) + * + * which relates gamma(x) to gamma(-x), which is much nicer, + * since x can be turned into -x without rounding. + */ + negadjust = sin_pi_x_over_pi(x); + negative = true; + x = -x; + + /* + * Now the ultimate answer we want is + * + * 1 / (gamma(x) * x * negadjust) + * + * where x is the positive value we've just turned it into. + * + * For some of the cases below, we'll compute gamma(x) + * normally and then compute this adjusted value afterwards. + * But for others, we can implement the reciprocal operation + * in this formula by _avoiding_ an inversion that the + * sub-case was going to do anyway. + */ + + if (negadjust == 0) { + /* + * Special case for negative integers. Applying the + * reflection formula would cause division by zero, but + * standards would prefer we treat this error case as an + * invalid operation and return NaN instead. (Possibly + * because otherwise you'd have to decide which sign of + * infinity to return, and unlike the x=0 case, there's no + * sign of zero available to disambiguate.) + */ + return negadjust / negadjust; + } + } + + /* + * Split the positive domain into various cases. For cases where + * we do the negative-number adjustment the usual way, we'll leave + * the answer in 'g' and drop out of the if statement. + */ + long double g; + + if (exponent >= 11) { + /* + * gamma of any positive value this large overflows, and gamma + * of any negative value underflows. + */ + if (!negative) { + long double huge = 0x1p+12288L; + return huge * huge; /* provoke an overflow */ + } else { + long double tiny = 0x1p-12288L; + return tiny * tiny * negadjust; /* underflow, of the right sign */ + } + } else if (exponent >= 3) { + /* Negative-number adjustment happens inside here */ + return tgamma_large(x, negative, negadjust); + } else if (exponent < -113) { + /* Negative-number adjustment happens inside here */ + return tgamma_ultratiny(x, negative, negadjust); + } else if (exponent < -5) { + /* Negative-number adjustment happens inside here */ + return tgamma_tiny(x, negative, negadjust); + } else if (exponent == 0) { + g = tgamma_central(x); + } else if (exponent < 0) { + /* + * For x in [1/32,1) we range-reduce upwards to the interval + * [1,2), using the inverse of the normal recurrence formula: + * gamma(x) = gamma(x+1)/x. + */ + g = tgamma_central(1+x) / x; + } else { + /* + * For x in [2,8) we range-reduce downwards to the interval + * [1,2) by repeated application of the recurrence formula. + * + * Actually multiplying (x-1) by (x-2) by (x-3) and so on + * would introduce multiple ULPs of rounding error. We can get + * better accuracy by writing x = (k+1/2) + t, where k is an + * integer and |t|<1/2, and expanding out the obvious factor + * (x-1)(x-2)...(x-k+1) as a polynomial in t. + */ + long double mult; + int i = x; + if (i == 2) { /* x in [2,3) */ + mult = (x-1); + } else { + long double t = x - (i + 0.5L); + switch (i) { + /* E.g. for x=3.5+t, we want + * (x-1)(x-2) = (2.5+t)(1.5+t) = 3.75 + 4t + t^2 */ + case 3: + mult = 3.75L+t*(4.0L+t); + break; + case 4: + mult = 13.125L+t*(17.75L+t*(7.5L+t)); + break; + case 5: + mult = 59.0625L+t*(93.0L+t*(51.50L+t*(12.0L+t))); + break; + case 6: + mult = 324.84375L+t*(570.5625L+t*(376.250L+t*( + 117.5L+t*(17.5L+t)))); + break; + case 7: + mult = 2111.484375L+t*(4033.5L+t*(3016.1875L+t*( + 1140.0L+t*(231.25L+t*(24.0L+t))))); + break; + } + } + + g = tgamma_central(x - (i-1)) * mult; + } + + if (!negative) { + /* Positive domain: return g unmodified */ + return g; + } else { + /* Negative domain: apply the reflection formula as commented above */ + return 1.0L / (g * x * negadjust); + } +} + +#endif diff --git a/contrib/arm-optimized-routines/math/tgamma128.h b/contrib/arm-optimized-routines/math/tgamma128.h new file mode 100644 index 000000000000..90875a22dce4 --- /dev/null +++ b/contrib/arm-optimized-routines/math/tgamma128.h @@ -0,0 +1,141 @@ +/* + * Polynomial coefficients and other constants for tgamma128.c. + * + * Copyright (c) 2006-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* The largest positive value for which 128-bit tgamma does not overflow. */ +static const long double max_x = 0x1.b6e3180cd66a5c4206f128ba77f4p+10L; + +/* Coefficients of the polynomial used in the tgamma_large() subroutine */ +static const long double coeffs_large[] = { + 0x1.8535745aa79569579b9eec0f3bbcp+0L, + 0x1.0378f83c6fb8f0e51269f2b4a973p-3L, + 0x1.59f6a05094f69686c3380f4e2783p-8L, + -0x1.0b291dee952a82764a4859b081a6p-8L, + -0x1.6dd301b2205bf936b5a3eaad0dbbp-12L, + 0x1.387a8b5f38dd77e7f139b1021e86p-10L, + 0x1.bca46637f65b13750c728cc29e40p-14L, + -0x1.d80401c00aef998c9e303151a51cp-11L, + -0x1.49cb6bb09f935a2053ccc2cf3711p-14L, + 0x1.4e950204437dcaf2be77f73a6f45p-10L, + 0x1.cb711a2d65f188bf60110934d6bep-14L, + -0x1.7d7ff4bc95dc7faefc5e767f70f1p-9L, + -0x1.0305ab9760cddb0d833e73766836p-12L, + 0x1.3ef6c84bf1cd5c3f65ac2693bb5bp-7L, + 0x1.bb4144740ad9290123fdcea684aap-11L, + -0x1.72ab4e88272a229bfafd192450f0p-5L, + 0x1.80c70ac6eb3b7a698983d25a62b8p-12L, + 0x1.e222791c6743ce3e3cae220fb236p-3L, + 0x1.1a2dca1c82a9326c52b465f7cb7ap-2L, + -0x1.9d204fa235a42cd901b123d2ad47p+1L, + 0x1.55b56d1158f77ddb1c95fc44ab02p+0L, + 0x1.37f900a11dbd892abd7dde533e2dp+5L, + -0x1.2da49f4188dd89cb958369ef2401p+7L, + 0x1.fdae5ec3ec6eb7dffc09edbe6c14p+7L, + -0x1.61433cebe649098c9611c4c7774ap+7L, +}; + +/* Coefficients of the polynomial used in the tgamma_tiny() subroutine */ +static const long double coeffs_tiny[] = { + 0x1.0000000000000000000000000000p+0L, + 0x1.2788cfc6fb618f49a37c7f0201fep-1L, + -0x1.4fcf4026afa2dceb8490ade22796p-1L, + -0x1.5815e8fa27047c8f42b5d9217244p-5L, + 0x1.5512320b43fbe5dfa771333518f7p-3L, + -0x1.59af103c340927bffdd44f954bfcp-5L, + -0x1.3b4af28483e210479657e5543366p-7L, + 0x1.d919c527f6070bfce9b29c2ace9cp-8L, + -0x1.317112ce35337def3556a18aa178p-10L, + -0x1.c364fe77a6f27677b985b1fa2e1dp-13L, + 0x1.0c8a7a19a3fd40fe1f7e867efe7bp-13L, + -0x1.51cf9f090b5dc398ba86305e3634p-16L, + -0x1.4e80f64c04a339740de06ca9fa4ap-20L, + 0x1.241ddc2aef2ec20e58b08f2fda17p-20L, +}; + +/* The location within the interval [1,2] where gamma has a minimum. + * Specified as the sum of two 128-bit values, for extra precision. */ +static const long double min_x_hi = 0x1.762d86356be3f6e1a9c8865e0a4fp+0L; +static const long double min_x_lo = 0x1.ac54d7d218de21303a7c60f08840p-118L; + +/* The actual minimum value that gamma takes at that location. + * Again specified as the sum of two 128-bit values. */ +static const long double min_y_hi = 0x1.c56dc82a74aee8d8851566d40f32p-1L; +static const long double min_y_lo = 0x1.8ed98685742c353ce55e5794686fp-114L; + +/* Coefficients of the polynomial used in the tgamma_central() subroutine + * for computing gamma on the interval [1,min_x] */ +static const long double coeffs_central_neg[] = { + 0x1.b6c53f7377b83839c8a292e43b69p-2L, + 0x1.0bae9f40c7d09ed76e732045850ap-3L, + 0x1.4981175e14d04c3530e51d01c5fep-3L, + 0x1.79f77aaf032c948af3a9edbd2061p-4L, + 0x1.1e97bd10821095a5b79fbfdfa1a3p-4L, + 0x1.8071ce0935e4dcf0b33b0fbec7c1p-5L, + 0x1.0b44c2f92982f887b55ec36dfdb0p-5L, + 0x1.6df1de1e178ef72ca7bd63d40870p-6L, + 0x1.f63f502bde27e81c0f5e13479b43p-7L, + 0x1.57fd67d901f40ea011353ad89a0ap-7L, + 0x1.d7151376eed187eb753e2273cafcp-8L, + 0x1.427162b5c6ff1d904c71ef53e37cp-8L, + 0x1.b954b8c3a56cf93e49ef6538928ap-9L, + 0x1.2dff2ec26a3ae5cd3aaccae7a09ep-9L, + 0x1.9d35250d9b9378d9b59df734537ap-10L, + 0x1.1b2c0c48b9855a28f6dbd6fdff3cp-10L, + 0x1.7e0db39bb99cdb52b028d9359380p-11L, + 0x1.2164b5e1d364a0b5eaf97c436aa7p-11L, + 0x1.27521cf5fd24dcdf43524e6add11p-13L, + 0x1.06461d62243bf9a826b42349672fp-10L, + -0x1.2b852abead28209b4e0c756dc46ep-9L, + 0x1.be673c11a72c826115ec6d286c14p-8L, + -0x1.fd9ce330c215c31fcd3cb53c42ebp-7L, + 0x1.fa362bd2dc68f41abef2d8600acdp-6L, + -0x1.a21585b2f52f8b23855de8e452edp-5L, + 0x1.1f234431ed032052fc92e64e0493p-4L, + -0x1.40d332476ca0199c60cdae3f9132p-4L, + 0x1.1d45dc665d86012eba2eea199cefp-4L, + -0x1.8491016cdd08dc9be7ade9b5fef3p-5L, + 0x1.7e7e2fbc6d49ad484300d6add324p-6L, + -0x1.e63fe3f874a37276a8d7d8b705ecp-8L, + 0x1.30a2a73944f8c84998314d69c23fp-10L, +}; + +/* Coefficients of the polynomial used in the tgamma_central() subroutine + * for computing gamma on the interval [min_x,2] */ +static const long double coeffs_central_pos[] = { + 0x1.b6c53f7377b83839c8a292e22aa2p-2L, + -0x1.0bae9f40c7d09ed76e72e1c955dep-3L, + 0x1.4981175e14d04c3530ee5e1ecebcp-3L, + -0x1.79f77aaf032c948ac983d77f3e07p-4L, + 0x1.1e97bd10821095ab7dc94936cc11p-4L, + -0x1.8071ce0935e4d7edef8cbf2a1cf1p-5L, + 0x1.0b44c2f929837fafef7b5d9e80f1p-5L, + -0x1.6df1de1e175fe2a51faa25cddbb4p-6L, + 0x1.f63f502be57d11aed2cfe90843ffp-7L, + -0x1.57fd67d852f230015b9f64770273p-7L, + 0x1.d715138adc07e5fce81077070357p-8L, + -0x1.4271618e9fda8992a667adb15f4fp-8L, + 0x1.b954d15d9eb772e80fdd760672d7p-9L, + -0x1.2dfe391241d3cb79c8c15182843dp-9L, + 0x1.9d44396fcd48451c3ba924cee814p-10L, + -0x1.1ac195fb99739e341589e39803e6p-10L, + 0x1.82e46127b68f002770826e25f146p-11L, + -0x1.089dacd90d9f41493119ac178359p-11L, + 0x1.6993c007b20394a057d21f3d37f8p-12L, + -0x1.ec43a709f4446560c099dec8e31bp-13L, + 0x1.4ba36322f4074e9add9450f003cap-13L, + -0x1.b3f83a977965ca1b7937bf5b34cap-14L, + 0x1.10af346abc09cb25a6d9fe810b6ep-14L, + -0x1.38d8ea1188f242f50203edc395bdp-15L, + 0x1.39add987a948ec56f62b721a4475p-16L, + -0x1.02a4e141f286c8a967e2df9bc9adp-17L, + 0x1.433b50af22425f546e87113062d7p-19L, + -0x1.0c7b73cb0013f00aafc103e8e382p-21L, + 0x1.b852de313ec38da2297f6deaa6b4p-25L, +}; + +/* 128-bit float value of pi, used by the sin_pi_x_over_pi subroutine + */ +static const long double pi = 0x1.921fb54442d18469898cc51701b8p+1L; diff --git a/contrib/arm-optimized-routines/math/tools/cos.sollya b/contrib/arm-optimized-routines/math/tools/cos.sollya index bd72d6b74820..6690adfcbb9b 100644 --- a/contrib/arm-optimized-routines/math/tools/cos.sollya +++ b/contrib/arm-optimized-routines/math/tools/cos.sollya @@ -1,7 +1,7 @@ // polynomial for approximating cos(x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 8; // polynomial degree a = -pi/4; // interval diff --git a/contrib/arm-optimized-routines/math/tools/exp.sollya b/contrib/arm-optimized-routines/math/tools/exp.sollya index b7a462cda5a4..0668bdb5b3d3 100644 --- a/contrib/arm-optimized-routines/math/tools/exp.sollya +++ b/contrib/arm-optimized-routines/math/tools/exp.sollya @@ -1,7 +1,7 @@ // polynomial for approximating e^x // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 5; // poly degree N = 128; // table entries diff --git a/contrib/arm-optimized-routines/math/tools/exp2.sollya b/contrib/arm-optimized-routines/math/tools/exp2.sollya index e760769601d4..bd0a42d6bbcb 100644 --- a/contrib/arm-optimized-routines/math/tools/exp2.sollya +++ b/contrib/arm-optimized-routines/math/tools/exp2.sollya @@ -1,7 +1,7 @@ // polynomial for approximating 2^x // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception // exp2f parameters deg = 3; // poly degree diff --git a/contrib/arm-optimized-routines/math/tools/log.sollya b/contrib/arm-optimized-routines/math/tools/log.sollya index 6df4db44b6f3..5288f5572925 100644 --- a/contrib/arm-optimized-routines/math/tools/log.sollya +++ b/contrib/arm-optimized-routines/math/tools/log.sollya @@ -1,7 +1,7 @@ // polynomial for approximating log(1+x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 12; // poly degree // |log(1+x)| > 0x1p-4 outside the interval diff --git a/contrib/arm-optimized-routines/math/tools/log2.sollya b/contrib/arm-optimized-routines/math/tools/log2.sollya index 4a364c0f111f..85811be5d90c 100644 --- a/contrib/arm-optimized-routines/math/tools/log2.sollya +++ b/contrib/arm-optimized-routines/math/tools/log2.sollya @@ -1,7 +1,7 @@ // polynomial for approximating log2(1+x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 11; // poly degree // |log2(1+x)| > 0x1p-4 outside the interval diff --git a/contrib/arm-optimized-routines/math/tools/log2_abs.sollya b/contrib/arm-optimized-routines/math/tools/log2_abs.sollya index 82c4dac26fa1..d018ba0145d2 100644 --- a/contrib/arm-optimized-routines/math/tools/log2_abs.sollya +++ b/contrib/arm-optimized-routines/math/tools/log2_abs.sollya @@ -1,7 +1,7 @@ // polynomial for approximating log2(1+x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 7; // poly degree // interval ~= 1/(2*N), where N is the table entries diff --git a/contrib/arm-optimized-routines/math/tools/log_abs.sollya b/contrib/arm-optimized-routines/math/tools/log_abs.sollya index a2ac190fc497..5f9bfe41a683 100644 --- a/contrib/arm-optimized-routines/math/tools/log_abs.sollya +++ b/contrib/arm-optimized-routines/math/tools/log_abs.sollya @@ -1,7 +1,7 @@ // polynomial for approximating log(1+x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 6; // poly degree // interval ~= 1/(2*N), where N is the table entries diff --git a/contrib/arm-optimized-routines/math/tools/plot.py b/contrib/arm-optimized-routines/math/tools/plot.py index 6c8b89ff284b..a0fa02322560 100755 --- a/contrib/arm-optimized-routines/math/tools/plot.py +++ b/contrib/arm-optimized-routines/math/tools/plot.py @@ -3,7 +3,7 @@ # ULP error plot tool. # # Copyright (c) 2019, Arm Limited. -# SPDX-License-Identifier: MIT +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception import numpy as np import matplotlib.pyplot as plt diff --git a/contrib/arm-optimized-routines/math/tools/remez.jl b/contrib/arm-optimized-routines/math/tools/remez.jl index 2ff436f5287f..1deab67d0660 100755 --- a/contrib/arm-optimized-routines/math/tools/remez.jl +++ b/contrib/arm-optimized-routines/math/tools/remez.jl @@ -4,7 +4,7 @@ # remez.jl - implementation of the Remez algorithm for polynomial approximation # # Copyright (c) 2015-2019, Arm Limited. -# SPDX-License-Identifier: MIT +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception import Base.\ diff --git a/contrib/arm-optimized-routines/math/tools/sin.sollya b/contrib/arm-optimized-routines/math/tools/sin.sollya index a6e851145c11..a19300019867 100644 --- a/contrib/arm-optimized-routines/math/tools/sin.sollya +++ b/contrib/arm-optimized-routines/math/tools/sin.sollya @@ -1,7 +1,7 @@ // polynomial for approximating sin(x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 7; // polynomial degree a = -pi/4; // interval diff --git a/contrib/arm-optimized-routines/math/tools/tgamma128_gen.jl b/contrib/arm-optimized-routines/math/tools/tgamma128_gen.jl new file mode 100644 index 000000000000..ecec174110ea --- /dev/null +++ b/contrib/arm-optimized-routines/math/tools/tgamma128_gen.jl @@ -0,0 +1,212 @@ +# -*- julia -*- +# +# Generate tgamma128.h, containing polynomials and constants used by +# tgamma128.c. +# +# Copyright (c) 2006-2023, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +# This Julia program depends on the 'Remez' and 'SpecialFunctions' +# library packages. To install them, run this at the interactive Julia +# prompt: +# +# import Pkg; Pkg.add(["Remez", "SpecialFunctions"]) +# +# Tested on Julia 1.4.1 (Ubuntu 20.04) and 1.9.0 (22.04). + +import Printf +import Remez +import SpecialFunctions + +# Round a BigFloat to 128-bit long double and format it as a C99 hex +# float literal. +function quadhex(x) + sign = " " + if x < 0 + sign = "-" + x = -x + end + + exponent = BigInt(floor(log2(x))) + exponent = max(exponent, -16382) + @assert(exponent <= 16383) # else overflow + + x /= BigFloat(2)^exponent + @assert(1 <= x < 2) + x *= BigFloat(2)^112 + mantissa = BigInt(round(x)) + + mantstr = string(mantissa, base=16, pad=29) + return Printf.@sprintf("%s0x%s.%sp%+dL", sign, mantstr[1], mantstr[2:end], + exponent) +end + +# Round a BigFloat to 128-bit long double and return it still as a +# BigFloat. +function quadval(x, round=0) + sign = +1 + if x.sign < 0 + sign = -1 + x = -x + end + + exponent = BigInt(floor(log2(x))) + exponent = max(exponent, -16382) + @assert(exponent <= 16383) # else overflow + + x /= BigFloat(2)^exponent + @assert(1 <= x < 2) + x *= BigFloat(2)^112 + if round < 0 + mantissa = floor(x) + elseif round > 0 + mantissa = ceil(x) + else + mantissa = round(x) + end + + return sign * mantissa * BigFloat(2)^(exponent - 112) +end + +# Output an array of BigFloats as a C array declaration. +function dumparray(a, name) + println("static const long double ", name, "[] = {") + for x in N + println(" ", quadhex(x), ",") + end + println("};") +end + +print("/* + * Polynomial coefficients and other constants for tgamma128.c. + * + * Copyright (c) 2006,2009,2023 Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +") + +Base.MPFR.setprecision(512) + +e = exp(BigFloat(1)) + +print(" +/* The largest positive value for which 128-bit tgamma does not overflow. */ +") +lo = BigFloat("1000") +hi = BigFloat("2000") +while true + global lo + global hi + global max_x + + mid = (lo + hi) / 2 + if mid == lo || mid == hi + max_x = mid + break + end + if SpecialFunctions.logabsgamma(mid)[1] < 16384 * log(BigFloat(2)) + lo = mid + else + hi = mid + end +end +max_x = quadval(max_x, -1) +println("static const long double max_x = ", quadhex(max_x), ";") + +print(" +/* Coefficients of the polynomial used in the tgamma_large() subroutine */ +") +N, D, E, X = Remez.ratfn_minimax( + x -> x==0 ? sqrt(BigFloat(2)*pi/e) : + exp(SpecialFunctions.logabsgamma(1/x)[1] + + (1/x-0.5)*(1+log(x))), + (0, 1/BigFloat(8)), + 24, 0, + (x, y) -> 1/y +) +dumparray(N, "coeffs_large") + +print(" +/* Coefficients of the polynomial used in the tgamma_tiny() subroutine */ +") +N, D, E, X = Remez.ratfn_minimax( + x -> x==0 ? 1 : 1/(x*SpecialFunctions.gamma(x)), + (0, 1/BigFloat(32)), + 13, 0, +) +dumparray(N, "coeffs_tiny") + +print(" +/* The location within the interval [1,2] where gamma has a minimum. + * Specified as the sum of two 128-bit values, for extra precision. */ +") +lo = BigFloat("1.4") +hi = BigFloat("1.5") +while true + global lo + global hi + global min_x + + mid = (lo + hi) / 2 + if mid == lo || mid == hi + min_x = mid + break + end + if SpecialFunctions.digamma(mid) < 0 + lo = mid + else + hi = mid + end +end +min_x_hi = quadval(min_x, -1) +println("static const long double min_x_hi = ", quadhex(min_x_hi), ";") +println("static const long double min_x_lo = ", quadhex(min_x - min_x_hi), ";") + +print(" +/* The actual minimum value that gamma takes at that location. + * Again specified as the sum of two 128-bit values. */ +") +min_y = SpecialFunctions.gamma(min_x) +min_y_hi = quadval(min_y, -1) +println("static const long double min_y_hi = ", quadhex(min_y_hi), ";") +println("static const long double min_y_lo = ", quadhex(min_y - min_y_hi), ";") + +function taylor_bodge(x) + # Taylor series generated by Wolfram Alpha for (gamma(min_x+x)-min_y)/x^2. + # Used in the Remez calls below for x values very near the origin, to avoid + # significance loss problems when trying to compute it directly via that + # formula (even in MPFR's extra precision). + return BigFloat("0.428486815855585429730209907810650582960483696962660010556335457558784421896667728014324097132413696263704801646004585959298743677879606168187061990204432200")+x*(-BigFloat("0.130704158939785761928008749242671025181542078105370084716141350308119418619652583986015464395882363802104154017741656168641240436089858504560718773026275797")+x*(BigFloat("0.160890753325112844190519489594363387594505844658437718135952967735294789599989664428071656484587979507034160383271974554122934842441540146372016567834062876")+x*(-BigFloat("0.092277030213334350126864106458600575084335085690780082222880945224248438672595248111704471182201673989215223667543694847795410779036800385804729955729659506")))) +end + +print(" +/* Coefficients of the polynomial used in the tgamma_central() subroutine + * for computing gamma on the interval [1,min_x] */ +") +N, D, E, X = Remez.ratfn_minimax( + x -> x < BigFloat(0x1p-64) ? taylor_bodge(-x) : + (SpecialFunctions.gamma(min_x - x) - min_y) / (x*x), + (0, min_x - 1), + 31, 0, + (x, y) -> x^2, +) +dumparray(N, "coeffs_central_neg") + +print(" +/* Coefficients of the polynomial used in the tgamma_central() subroutine + * for computing gamma on the interval [min_x,2] */ +") +N, D, E, X = Remez.ratfn_minimax( + x -> x < BigFloat(0x1p-64) ? taylor_bodge(x) : + (SpecialFunctions.gamma(min_x + x) - min_y) / (x*x), + (0, 2 - min_x), + 28, 0, + (x, y) -> x^2, +) +dumparray(N, "coeffs_central_pos") + +print(" +/* 128-bit float value of pi, used by the sin_pi_x_over_pi subroutine + */ +") +println("static const long double pi = ", quadhex(BigFloat(pi)), ";") diff --git a/contrib/arm-optimized-routines/math/tools/v_exp.sollya b/contrib/arm-optimized-routines/math/tools/v_exp.sollya index c0abb63fb642..5fa7de7435a9 100644 --- a/contrib/arm-optimized-routines/math/tools/v_exp.sollya +++ b/contrib/arm-optimized-routines/math/tools/v_exp.sollya @@ -1,7 +1,7 @@ // polynomial for approximating e^x // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 4; // poly degree N = 128; // table entries diff --git a/contrib/arm-optimized-routines/math/tools/v_log.sollya b/contrib/arm-optimized-routines/math/tools/v_log.sollya index cc3d2c4ae72a..d982524eb920 100644 --- a/contrib/arm-optimized-routines/math/tools/v_log.sollya +++ b/contrib/arm-optimized-routines/math/tools/v_log.sollya @@ -1,7 +1,7 @@ // polynomial used for __v_log(x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 6; // poly degree a = -0x1.fc1p-9; diff --git a/contrib/arm-optimized-routines/math/tools/v_sin.sollya b/contrib/arm-optimized-routines/math/tools/v_sin.sollya index 65cc9957c624..63b9d65a1ac3 100644 --- a/contrib/arm-optimized-routines/math/tools/v_sin.sollya +++ b/contrib/arm-optimized-routines/math/tools/v_sin.sollya @@ -1,7 +1,7 @@ // polynomial for approximating sin(x) // // Copyright (c) 2019, Arm Limited. -// SPDX-License-Identifier: MIT +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception deg = 15; // polynomial degree a = -pi/2; // interval diff --git a/contrib/arm-optimized-routines/math/v_cos.c b/contrib/arm-optimized-routines/math/v_cos.c deleted file mode 100644 index 20ba6bd0d0d9..000000000000 --- a/contrib/arm-optimized-routines/math/v_cos.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Double-precision vector cos function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const double Poly[] = { -/* worst-case error is 3.5 ulp. - abs error: 0x1.be222a58p-53 in [-pi/2, pi/2]. */ --0x1.9f4a9c8b21dc9p-41, - 0x1.60e88a10163f2p-33, --0x1.ae6361b7254e7p-26, - 0x1.71de382e8d62bp-19, --0x1.a01a019aeb4ffp-13, - 0x1.111111110b25ep-7, --0x1.55555555554c3p-3, -}; - -#define C7 v_f64 (Poly[0]) -#define C6 v_f64 (Poly[1]) -#define C5 v_f64 (Poly[2]) -#define C4 v_f64 (Poly[3]) -#define C3 v_f64 (Poly[4]) -#define C2 v_f64 (Poly[5]) -#define C1 v_f64 (Poly[6]) - -#define InvPi v_f64 (0x1.45f306dc9c883p-2) -#define HalfPi v_f64 (0x1.921fb54442d18p+0) -#define Pi1 v_f64 (0x1.921fb54442d18p+1) -#define Pi2 v_f64 (0x1.1a62633145c06p-53) -#define Pi3 v_f64 (0x1.c1cd129024e09p-106) -#define Shift v_f64 (0x1.8p52) -#define RangeVal v_f64 (0x1p23) -#define AbsMask v_u64 (0x7fffffffffffffff) - -VPCS_ATTR -__attribute__ ((noinline)) static v_f64_t -specialcase (v_f64_t x, v_f64_t y, v_u64_t cmp) -{ - return v_call_f64 (cos, x, y, cmp); -} - -VPCS_ATTR -v_f64_t -V_NAME(cos) (v_f64_t x) -{ - v_f64_t n, r, r2, y; - v_u64_t odd, cmp; - - r = v_as_f64_u64 (v_as_u64_f64 (x) & AbsMask); - cmp = v_cond_u64 (v_as_u64_f64 (r) >= v_as_u64_f64 (RangeVal)); - - /* n = rint((|x|+pi/2)/pi) - 0.5. */ - n = v_fma_f64 (InvPi, r + HalfPi, Shift); - odd = v_as_u64_f64 (n) << 63; - n -= Shift; - n -= v_f64 (0.5); - - /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ - r = v_fma_f64 (-Pi1, n, r); - r = v_fma_f64 (-Pi2, n, r); - r = v_fma_f64 (-Pi3, n, r); - - /* sin(r) poly approx. */ - r2 = r * r; - y = v_fma_f64 (C7, r2, C6); - y = v_fma_f64 (y, r2, C5); - y = v_fma_f64 (y, r2, C4); - y = v_fma_f64 (y, r2, C3); - y = v_fma_f64 (y, r2, C2); - y = v_fma_f64 (y, r2, C1); - y = v_fma_f64 (y * r2, r, r); - - /* sign. */ - y = v_as_f64_u64 (v_as_u64_f64 (y) ^ odd); - - if (unlikely (v_any_u64 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_cosf.c b/contrib/arm-optimized-routines/math/v_cosf.c deleted file mode 100644 index 150294b8845e..000000000000 --- a/contrib/arm-optimized-routines/math/v_cosf.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Single-precision vector cos function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* 1.886 ulp error */ - 0x1.5b2e76p-19f, - -0x1.9f42eap-13f, - 0x1.110df4p-7f, - -0x1.555548p-3f, -}; -#define Pi1 v_f32 (0x1.921fb6p+1f) -#define Pi2 v_f32 (-0x1.777a5cp-24f) -#define Pi3 v_f32 (-0x1.ee59dap-49f) -#define A3 v_f32 (Poly[3]) -#define A5 v_f32 (Poly[2]) -#define A7 v_f32 (Poly[1]) -#define A9 v_f32 (Poly[0]) -#define RangeVal v_f32 (0x1p20f) -#define InvPi v_f32 (0x1.45f306p-2f) -#define Shift v_f32 (0x1.8p+23f) -#define AbsMask v_u32 (0x7fffffff) -#define HalfPi v_f32 (0x1.921fb6p0f) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t x, v_f32_t y, v_u32_t cmp) -{ - /* Fall back to scalar code. */ - return v_call_f32 (cosf, x, y, cmp); -} - -VPCS_ATTR -v_f32_t -V_NAME(cosf) (v_f32_t x) -{ - v_f32_t n, r, r2, y; - v_u32_t odd, cmp; - - r = v_as_f32_u32 (v_as_u32_f32 (x) & AbsMask); - cmp = v_cond_u32 (v_as_u32_f32 (r) >= v_as_u32_f32 (RangeVal)); - - /* n = rint((|x|+pi/2)/pi) - 0.5 */ - n = v_fma_f32 (InvPi, r + HalfPi, Shift); - odd = v_as_u32_f32 (n) << 31; - n -= Shift; - n -= v_f32 (0.5f); - - /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2) */ - r = v_fma_f32 (-Pi1, n, r); - r = v_fma_f32 (-Pi2, n, r); - r = v_fma_f32 (-Pi3, n, r); - - /* y = sin(r) */ - r2 = r * r; - y = v_fma_f32 (A9, r2, A7); - y = v_fma_f32 (y, r2, A5); - y = v_fma_f32 (y, r2, A3); - y = v_fma_f32 (y * r2, r, r); - - /* sign fix */ - y = v_as_f32_u32 (v_as_u32_f32 (y) ^ odd); - - if (unlikely (v_any_u32 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_exp.c b/contrib/arm-optimized-routines/math/v_exp.c deleted file mode 100644 index e459d53fddd2..000000000000 --- a/contrib/arm-optimized-routines/math/v_exp.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Double-precision vector e^x function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED -#include "v_exp.h" - -#if V_EXP_TABLE_BITS == 7 -/* maxerr: 1.88 +0.5 ulp - rel error: 1.4337*2^-53 - abs error: 1.4299*2^-53 in [ -ln2/256, ln2/256 ]. */ -#define C1 v_f64 (0x1.ffffffffffd43p-2) -#define C2 v_f64 (0x1.55555c75adbb2p-3) -#define C3 v_f64 (0x1.55555da646206p-5) -#define InvLn2 v_f64 (0x1.71547652b82fep7) /* N/ln2. */ -#define Ln2hi v_f64 (0x1.62e42fefa39efp-8) /* ln2/N. */ -#define Ln2lo v_f64 (0x1.abc9e3b39803f3p-63) -#elif V_EXP_TABLE_BITS == 8 -/* maxerr: 0.54 +0.5 ulp - rel error: 1.4318*2^-58 - abs error: 1.4299*2^-58 in [ -ln2/512, ln2/512 ]. */ -#define C1 v_f64 (0x1.fffffffffffd4p-2) -#define C2 v_f64 (0x1.5555571d6b68cp-3) -#define C3 v_f64 (0x1.5555576a59599p-5) -#define InvLn2 v_f64 (0x1.71547652b82fep8) -#define Ln2hi v_f64 (0x1.62e42fefa39efp-9) -#define Ln2lo v_f64 (0x1.abc9e3b39803f3p-64) -#endif - -#define N (1 << V_EXP_TABLE_BITS) -#define Tab __v_exp_data -#define IndexMask v_u64 (N - 1) -#define Shift v_f64 (0x1.8p+52) -#define Thres v_f64 (704.0) - -VPCS_ATTR -static v_f64_t -specialcase (v_f64_t s, v_f64_t y, v_f64_t n) -{ - v_f64_t absn = v_abs_f64 (n); - - /* 2^(n/N) may overflow, break it up into s1*s2. */ - v_u64_t b = v_cond_u64 (n <= v_f64 (0.0)) & v_u64 (0x6000000000000000); - v_f64_t s1 = v_as_f64_u64 (v_u64 (0x7000000000000000) - b); - v_f64_t s2 = v_as_f64_u64 (v_as_u64_f64 (s) - v_u64 (0x3010000000000000) + b); - v_u64_t cmp = v_cond_u64 (absn > v_f64 (1280.0 * N)); - v_f64_t r1 = s1 * s1; - v_f64_t r0 = v_fma_f64 (y, s2, s2) * s1; - return v_as_f64_u64 ((cmp & v_as_u64_f64 (r1)) | (~cmp & v_as_u64_f64 (r0))); -} - -VPCS_ATTR -v_f64_t -V_NAME(exp) (v_f64_t x) -{ - v_f64_t n, r, r2, s, y, z; - v_u64_t cmp, u, e, i; - - cmp = v_cond_u64 (v_abs_f64 (x) > Thres); - - /* n = round(x/(ln2/N)). */ - z = v_fma_f64 (x, InvLn2, Shift); - u = v_as_u64_f64 (z); - n = z - Shift; - - /* r = x - n*ln2/N. */ - r = x; - r = v_fma_f64 (-Ln2hi, n, r); - r = v_fma_f64 (-Ln2lo, n, r); - - e = u << (52 - V_EXP_TABLE_BITS); - i = u & IndexMask; - - /* y = exp(r) - 1 ~= r + C1 r^2 + C2 r^3 + C3 r^4. */ - r2 = r * r; - y = v_fma_f64 (C2, r, C1); - y = v_fma_f64 (C3, r2, y); - y = v_fma_f64 (y, r2, r); - - /* s = 2^(n/N). */ - u = v_lookup_u64 (Tab, i); - s = v_as_f64_u64 (u + e); - - if (unlikely (v_any_u64 (cmp))) - return specialcase (s, y, n); - return v_fma_f64 (y, s, s); -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_exp.h b/contrib/arm-optimized-routines/math/v_exp.h deleted file mode 100644 index 305da19c0a53..000000000000 --- a/contrib/arm-optimized-routines/math/v_exp.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Declarations for double-precision e^x vector function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "v_math.h" -#if WANT_VMATH - -#define V_EXP_TABLE_BITS 7 - -extern const u64_t __v_exp_data[1 << V_EXP_TABLE_BITS] HIDDEN; -#endif diff --git a/contrib/arm-optimized-routines/math/v_exp2f.c b/contrib/arm-optimized-routines/math/v_exp2f.c deleted file mode 100644 index e3ea5af3414d..000000000000 --- a/contrib/arm-optimized-routines/math/v_exp2f.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Single-precision vector 2^x function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* maxerr: 1.962 ulp. */ - 0x1.59977ap-10f, - 0x1.3ce9e4p-7f, - 0x1.c6bd32p-5f, - 0x1.ebf9bcp-3f, - 0x1.62e422p-1f, -}; -#define C0 v_f32 (Poly[0]) -#define C1 v_f32 (Poly[1]) -#define C2 v_f32 (Poly[2]) -#define C3 v_f32 (Poly[3]) -#define C4 v_f32 (Poly[4]) - -#define Shift v_f32 (0x1.8p23f) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn, v_u32_t cmp1, v_f32_t scale) -{ - /* 2^n may overflow, break it up into s1*s2. */ - v_u32_t b = v_cond_u32 (n <= v_f32 (0.0f)) & v_u32 (0x82000000); - v_f32_t s1 = v_as_f32_u32 (v_u32 (0x7f000000) + b); - v_f32_t s2 = v_as_f32_u32 (e - b); - v_u32_t cmp2 = v_cond_u32 (absn > v_f32 (192.0f)); - v_u32_t r2 = v_as_u32_f32 (s1 * s1); - v_u32_t r1 = v_as_u32_f32 (v_fma_f32 (poly, s2, s2) * s1); - /* Similar to r1 but avoids double rounding in the subnormal range. */ - v_u32_t r0 = v_as_u32_f32 (v_fma_f32 (poly, scale, scale)); - return v_as_f32_u32 ((cmp2 & r2) | (~cmp2 & cmp1 & r1) | (~cmp1 & r0)); -} - -VPCS_ATTR -v_f32_t -V_NAME(exp2f) (v_f32_t x) -{ - v_f32_t n, r, r2, scale, p, q, poly, absn; - v_u32_t cmp, e; - - /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] - x = n + r, with r in [-1/2, 1/2]. */ -#if 0 - v_f32_t z; - z = x + Shift; - n = z - Shift; - r = x - n; - e = v_as_u32_f32 (z) << 23; -#else - n = v_round_f32 (x); - r = x - n; - e = v_as_u32_s32 (v_round_s32 (x)) << 23; -#endif - scale = v_as_f32_u32 (e + v_u32 (0x3f800000)); - absn = v_abs_f32 (n); - cmp = v_cond_u32 (absn > v_f32 (126.0f)); - r2 = r * r; - p = v_fma_f32 (C0, r, C1); - q = v_fma_f32 (C2, r, C3); - q = v_fma_f32 (p, r2, q); - p = C4 * r; - poly = v_fma_f32 (q, r2, p); - if (unlikely (v_any_u32 (cmp))) - return specialcase (poly, n, e, absn, cmp, scale); - return v_fma_f32 (poly, scale, scale); -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_exp2f_1u.c b/contrib/arm-optimized-routines/math/v_exp2f_1u.c deleted file mode 100644 index 1caa14d9bfff..000000000000 --- a/contrib/arm-optimized-routines/math/v_exp2f_1u.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Single-precision vector 2^x function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* maxerr: 0.878 ulp. */ - 0x1.416b5ep-13f, 0x1.5f082ep-10f, 0x1.3b2dep-7f, 0x1.c6af7cp-5f, 0x1.ebfbdcp-3f, 0x1.62e43p-1f -}; -#define C0 v_f32 (Poly[0]) -#define C1 v_f32 (Poly[1]) -#define C2 v_f32 (Poly[2]) -#define C3 v_f32 (Poly[3]) -#define C4 v_f32 (Poly[4]) -#define C5 v_f32 (Poly[5]) - -#define Shift v_f32 (0x1.8p23f) -#define InvLn2 v_f32 (0x1.715476p+0f) -#define Ln2hi v_f32 (0x1.62e4p-1f) -#define Ln2lo v_f32 (0x1.7f7d1cp-20f) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn) -{ - /* 2^n may overflow, break it up into s1*s2. */ - v_u32_t b = v_cond_u32 (n <= v_f32 (0.0f)) & v_u32 (0x83000000); - v_f32_t s1 = v_as_f32_u32 (v_u32 (0x7f000000) + b); - v_f32_t s2 = v_as_f32_u32 (e - b); - v_u32_t cmp = v_cond_u32 (absn > v_f32 (192.0f)); - v_f32_t r1 = s1 * s1; - v_f32_t r0 = poly * s1 * s2; - return v_as_f32_u32 ((cmp & v_as_u32_f32 (r1)) | (~cmp & v_as_u32_f32 (r0))); -} - -VPCS_ATTR -v_f32_t -V_NAME(exp2f_1u) (v_f32_t x) -{ - v_f32_t n, r, scale, poly, absn; - v_u32_t cmp, e; - - /* exp2(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)] - x = n + r, with r in [-1/2, 1/2]. */ -#if 0 - v_f32_t z; - z = x + Shift; - n = z - Shift; - r = x - n; - e = v_as_u32_f32 (z) << 23; -#else - n = v_round_f32 (x); - r = x - n; - e = v_as_u32_s32 (v_round_s32 (x)) << 23; -#endif - scale = v_as_f32_u32 (e + v_u32 (0x3f800000)); - absn = v_abs_f32 (n); - cmp = v_cond_u32 (absn > v_f32 (126.0f)); - poly = v_fma_f32 (C0, r, C1); - poly = v_fma_f32 (poly, r, C2); - poly = v_fma_f32 (poly, r, C3); - poly = v_fma_f32 (poly, r, C4); - poly = v_fma_f32 (poly, r, C5); - poly = v_fma_f32 (poly, r, v_f32 (1.0f)); - if (unlikely (v_any_u32 (cmp))) - return specialcase (poly, n, e, absn); - return scale * poly; -} -#endif diff --git a/contrib/arm-optimized-routines/math/v_expf.c b/contrib/arm-optimized-routines/math/v_expf.c deleted file mode 100644 index d403e00534f0..000000000000 --- a/contrib/arm-optimized-routines/math/v_expf.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Single-precision vector e^x function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* maxerr: 1.45358 +0.5 ulp. */ - 0x1.0e4020p-7f, - 0x1.573e2ep-5f, - 0x1.555e66p-3f, - 0x1.fffdb6p-2f, - 0x1.ffffecp-1f, -}; -#define C0 v_f32 (Poly[0]) -#define C1 v_f32 (Poly[1]) -#define C2 v_f32 (Poly[2]) -#define C3 v_f32 (Poly[3]) -#define C4 v_f32 (Poly[4]) - -#define Shift v_f32 (0x1.8p23f) -#define InvLn2 v_f32 (0x1.715476p+0f) -#define Ln2hi v_f32 (0x1.62e4p-1f) -#define Ln2lo v_f32 (0x1.7f7d1cp-20f) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn, v_u32_t cmp1, v_f32_t scale) -{ - /* 2^n may overflow, break it up into s1*s2. */ - v_u32_t b = v_cond_u32 (n <= v_f32 (0.0f)) & v_u32 (0x82000000); - v_f32_t s1 = v_as_f32_u32 (v_u32 (0x7f000000) + b); - v_f32_t s2 = v_as_f32_u32 (e - b); - v_u32_t cmp2 = v_cond_u32 (absn > v_f32 (192.0f)); - v_u32_t r2 = v_as_u32_f32 (s1 * s1); - v_u32_t r1 = v_as_u32_f32 (v_fma_f32 (poly, s2, s2) * s1); - /* Similar to r1 but avoids double rounding in the subnormal range. */ - v_u32_t r0 = v_as_u32_f32 (v_fma_f32 (poly, scale, scale)); - return v_as_f32_u32 ((cmp2 & r2) | (~cmp2 & cmp1 & r1) | (~cmp1 & r0)); -} - -VPCS_ATTR -v_f32_t -V_NAME(expf) (v_f32_t x) -{ - v_f32_t n, r, r2, scale, p, q, poly, absn, z; - v_u32_t cmp, e; - - /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] - x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ -#if 1 - z = v_fma_f32 (x, InvLn2, Shift); - n = z - Shift; - r = v_fma_f32 (n, -Ln2hi, x); - r = v_fma_f32 (n, -Ln2lo, r); - e = v_as_u32_f32 (z) << 23; -#else - z = x * InvLn2; - n = v_round_f32 (z); - r = v_fma_f32 (n, -Ln2hi, x); - r = v_fma_f32 (n, -Ln2lo, r); - e = v_as_u32_s32 (v_round_s32 (z)) << 23; -#endif - scale = v_as_f32_u32 (e + v_u32 (0x3f800000)); - absn = v_abs_f32 (n); - cmp = v_cond_u32 (absn > v_f32 (126.0f)); - r2 = r * r; - p = v_fma_f32 (C0, r, C1); - q = v_fma_f32 (C2, r, C3); - q = v_fma_f32 (p, r2, q); - p = C4 * r; - poly = v_fma_f32 (q, r2, p); - if (unlikely (v_any_u32 (cmp))) - return specialcase (poly, n, e, absn, cmp, scale); - return v_fma_f32 (poly, scale, scale); -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_expf_1u.c b/contrib/arm-optimized-routines/math/v_expf_1u.c deleted file mode 100644 index 023bd248c9ac..000000000000 --- a/contrib/arm-optimized-routines/math/v_expf_1u.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Single-precision vector e^x function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* maxerr: 0.36565 +0.5 ulp. */ - 0x1.6a6000p-10f, - 0x1.12718ep-7f, - 0x1.555af0p-5f, - 0x1.555430p-3f, - 0x1.fffff4p-2f, -}; -#define C0 v_f32 (Poly[0]) -#define C1 v_f32 (Poly[1]) -#define C2 v_f32 (Poly[2]) -#define C3 v_f32 (Poly[3]) -#define C4 v_f32 (Poly[4]) - -#define Shift v_f32 (0x1.8p23f) -#define InvLn2 v_f32 (0x1.715476p+0f) -#define Ln2hi v_f32 (0x1.62e4p-1f) -#define Ln2lo v_f32 (0x1.7f7d1cp-20f) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn) -{ - /* 2^n may overflow, break it up into s1*s2. */ - v_u32_t b = v_cond_u32 (n <= v_f32 (0.0f)) & v_u32 (0x83000000); - v_f32_t s1 = v_as_f32_u32 (v_u32 (0x7f000000) + b); - v_f32_t s2 = v_as_f32_u32 (e - b); - v_u32_t cmp = v_cond_u32 (absn > v_f32 (192.0f)); - v_f32_t r1 = s1 * s1; - v_f32_t r0 = poly * s1 * s2; - return v_as_f32_u32 ((cmp & v_as_u32_f32 (r1)) | (~cmp & v_as_u32_f32 (r0))); -} - -VPCS_ATTR -v_f32_t -V_NAME(expf_1u) (v_f32_t x) -{ - v_f32_t n, r, scale, poly, absn, z; - v_u32_t cmp, e; - - /* exp(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)] - x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ -#if 1 - z = v_fma_f32 (x, InvLn2, Shift); - n = z - Shift; - r = v_fma_f32 (n, -Ln2hi, x); - r = v_fma_f32 (n, -Ln2lo, r); - e = v_as_u32_f32 (z) << 23; -#else - z = x * InvLn2; - n = v_round_f32 (z); - r = v_fma_f32 (n, -Ln2hi, x); - r = v_fma_f32 (n, -Ln2lo, r); - e = v_as_u32_s32 (v_round_s32 (z)) << 23; -#endif - scale = v_as_f32_u32 (e + v_u32 (0x3f800000)); - absn = v_abs_f32 (n); - cmp = v_cond_u32 (absn > v_f32 (126.0f)); - poly = v_fma_f32 (C0, r, C1); - poly = v_fma_f32 (poly, r, C2); - poly = v_fma_f32 (poly, r, C3); - poly = v_fma_f32 (poly, r, C4); - poly = v_fma_f32 (poly, r, v_f32 (1.0f)); - poly = v_fma_f32 (poly, r, v_f32 (1.0f)); - if (unlikely (v_any_u32 (cmp))) - return specialcase (poly, n, e, absn); - return scale * poly; -} -#endif diff --git a/contrib/arm-optimized-routines/math/v_log.c b/contrib/arm-optimized-routines/math/v_log.c deleted file mode 100644 index d84c740d2b6b..000000000000 --- a/contrib/arm-optimized-routines/math/v_log.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Double-precision vector log(x) function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#include "v_log.h" -#if V_SUPPORTED - -/* Worst-case error: 1.17 + 0.5 ulp. */ - -static const f64_t Poly[] = { - /* rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */ - -0x1.ffffffffffff7p-2, - 0x1.55555555170d4p-2, - -0x1.0000000399c27p-2, - 0x1.999b2e90e94cap-3, - -0x1.554e550bd501ep-3, -}; - -#define A0 v_f64 (Poly[0]) -#define A1 v_f64 (Poly[1]) -#define A2 v_f64 (Poly[2]) -#define A3 v_f64 (Poly[3]) -#define A4 v_f64 (Poly[4]) -#define Ln2 v_f64 (0x1.62e42fefa39efp-1) -#define N (1 << V_LOG_TABLE_BITS) -#define OFF v_u64 (0x3fe6900900000000) - -struct entry -{ - v_f64_t invc; - v_f64_t logc; -}; - -static inline struct entry -lookup (v_u64_t i) -{ - struct entry e; -#ifdef SCALAR - e.invc = __v_log_data[i].invc; - e.logc = __v_log_data[i].logc; -#else - e.invc[0] = __v_log_data[i[0]].invc; - e.logc[0] = __v_log_data[i[0]].logc; - e.invc[1] = __v_log_data[i[1]].invc; - e.logc[1] = __v_log_data[i[1]].logc; -#endif - return e; -} - -VPCS_ATTR -__attribute__ ((noinline)) static v_f64_t -specialcase (v_f64_t x, v_f64_t y, v_u64_t cmp) -{ - return v_call_f64 (log, x, y, cmp); -} - -VPCS_ATTR -v_f64_t -V_NAME(log) (v_f64_t x) -{ - v_f64_t z, r, r2, p, y, kd, hi; - v_u64_t ix, iz, tmp, top, i, cmp; - v_s64_t k; - struct entry e; - - ix = v_as_u64_f64 (x); - top = ix >> 48; - cmp = v_cond_u64 (top - v_u64 (0x0010) >= v_u64 (0x7ff0 - 0x0010)); - - /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. - The range is split into N subintervals. - The ith subinterval contains z and c is near its center. */ - tmp = ix - OFF; - i = (tmp >> (52 - V_LOG_TABLE_BITS)) % N; - k = v_as_s64_u64 (tmp) >> 52; /* arithmetic shift */ - iz = ix - (tmp & v_u64 (0xfffULL << 52)); - z = v_as_f64_u64 (iz); - e = lookup (i); - - /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ - r = v_fma_f64 (z, e.invc, v_f64 (-1.0)); - kd = v_to_f64_s64 (k); - - /* hi = r + log(c) + k*Ln2. */ - hi = v_fma_f64 (kd, Ln2, e.logc + r); - /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ - r2 = r * r; - y = v_fma_f64 (A3, r, A2); - p = v_fma_f64 (A1, r, A0); - y = v_fma_f64 (A4, r2, y); - y = v_fma_f64 (y, r2, p); - y = v_fma_f64 (y, r2, hi); - - if (unlikely (v_any_u64 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_log.h b/contrib/arm-optimized-routines/math/v_log.h deleted file mode 100644 index bcc2fa6fa930..000000000000 --- a/contrib/arm-optimized-routines/math/v_log.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Declarations for double-precision log(x) vector function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "v_math.h" -#if WANT_VMATH - -#define V_LOG_TABLE_BITS 7 - -extern const struct v_log_data -{ - f64_t invc; - f64_t logc; -} __v_log_data[1 << V_LOG_TABLE_BITS] HIDDEN; -#endif diff --git a/contrib/arm-optimized-routines/math/v_log_data.c b/contrib/arm-optimized-routines/math/v_log_data.c deleted file mode 100644 index 97ee5b09c6a9..000000000000 --- a/contrib/arm-optimized-routines/math/v_log_data.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Lookup table for double-precision log(x) vector function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "v_log.h" -#if WANT_VMATH - -#define N (1 << V_LOG_TABLE_BITS) - -/* Algorithm: - - x = 2^k z - log(x) = k ln2 + log(c) + poly(z/c - 1) - -where z is in [a;2a) which is split into N subintervals (a=0x1.69009p-1,N=128) -and log(c) and 1/c for the ith subinterval comes from a lookup table: - - tab[i].invc = 1/c - tab[i].logc = (double)log(c) - -where c is near the center of the subinterval and is chosen by trying several -floating point invc candidates around 1/center and selecting one for which -the error in (double)log(c) is minimized (< 0x1p-74), except the subinterval -that contains 1 and the previous one got tweaked to avoid cancellation. */ -const struct v_log_data __v_log_data[N] = { -{0x1.6a133d0dec120p+0, -0x1.62fe995eb963ap-2}, -{0x1.6815f2f3e42edp+0, -0x1.5d5a48dad6b67p-2}, -{0x1.661e39be1ac9ep+0, -0x1.57bde257d2769p-2}, -{0x1.642bfa30ac371p+0, -0x1.52294fbf2af55p-2}, -{0x1.623f1d916f323p+0, -0x1.4c9c7b598aa38p-2}, -{0x1.60578da220f65p+0, -0x1.47174fc5ff560p-2}, -{0x1.5e75349dea571p+0, -0x1.4199b7fa7b5cap-2}, -{0x1.5c97fd387a75ap+0, -0x1.3c239f48cfb99p-2}, -{0x1.5abfd2981f200p+0, -0x1.36b4f154d2aebp-2}, -{0x1.58eca051dc99cp+0, -0x1.314d9a0ff32fbp-2}, -{0x1.571e526d9df12p+0, -0x1.2bed85cca3cffp-2}, -{0x1.5554d555b3fcbp+0, -0x1.2694a11421af9p-2}, -{0x1.539015e2a20cdp+0, -0x1.2142d8d014fb2p-2}, -{0x1.51d0014ee0164p+0, -0x1.1bf81a2c77776p-2}, -{0x1.50148538cd9eep+0, -0x1.16b452a39c6a4p-2}, -{0x1.4e5d8f9f698a1p+0, -0x1.11776ffa6c67ep-2}, -{0x1.4cab0edca66bep+0, -0x1.0c416035020e0p-2}, -{0x1.4afcf1a9db874p+0, -0x1.071211aa10fdap-2}, -{0x1.495327136e16fp+0, -0x1.01e972e293b1bp-2}, -{0x1.47ad9e84af28fp+0, -0x1.f98ee587fd434p-3}, -{0x1.460c47b39ae15p+0, -0x1.ef5800ad716fbp-3}, -{0x1.446f12b278001p+0, -0x1.e52e160484698p-3}, -{0x1.42d5efdd720ecp+0, -0x1.db1104b19352ep-3}, -{0x1.4140cfe001a0fp+0, -0x1.d100ac59e0bd6p-3}, -{0x1.3fafa3b421f69p+0, -0x1.c6fced287c3bdp-3}, -{0x1.3e225c9c8ece5p+0, -0x1.bd05a7b317c29p-3}, -{0x1.3c98ec29a211ap+0, -0x1.b31abd229164fp-3}, -{0x1.3b13442a413fep+0, -0x1.a93c0edadb0a3p-3}, -{0x1.399156baa3c54p+0, -0x1.9f697ee30d7ddp-3}, -{0x1.38131639b4cdbp+0, -0x1.95a2efa9aa40ap-3}, -{0x1.36987540fbf53p+0, -0x1.8be843d796044p-3}, -{0x1.352166b648f61p+0, -0x1.82395ecc477edp-3}, -{0x1.33adddb3eb575p+0, -0x1.7896240966422p-3}, -{0x1.323dcd99fc1d3p+0, -0x1.6efe77aca8c55p-3}, -{0x1.30d129fefc7d2p+0, -0x1.65723e117ec5cp-3}, -{0x1.2f67e6b72fe7dp+0, -0x1.5bf15c0955706p-3}, -{0x1.2e01f7cf8b187p+0, -0x1.527bb6c111da1p-3}, -{0x1.2c9f518ddc86ep+0, -0x1.491133c939f8fp-3}, -{0x1.2b3fe86e5f413p+0, -0x1.3fb1b90c7fc58p-3}, -{0x1.29e3b1211b25cp+0, -0x1.365d2cc485f8dp-3}, -{0x1.288aa08b373cfp+0, -0x1.2d13758970de7p-3}, -{0x1.2734abcaa8467p+0, -0x1.23d47a721fd47p-3}, -{0x1.25e1c82459b81p+0, -0x1.1aa0229f25ec2p-3}, -{0x1.2491eb1ad59c5p+0, -0x1.117655ddebc3bp-3}, -{0x1.23450a54048b5p+0, -0x1.0856fbf83ab6bp-3}, -{0x1.21fb1bb09e578p+0, -0x1.fe83fabbaa106p-4}, -{0x1.20b415346d8f7p+0, -0x1.ec6e8507a56cdp-4}, -{0x1.1f6fed179a1acp+0, -0x1.da6d68c7cc2eap-4}, -{0x1.1e2e99b93c7b3p+0, -0x1.c88078462be0cp-4}, -{0x1.1cf011a7a882ap+0, -0x1.b6a786a423565p-4}, -{0x1.1bb44b97dba5ap+0, -0x1.a4e2676ac7f85p-4}, -{0x1.1a7b3e66cdd4fp+0, -0x1.9330eea777e76p-4}, -{0x1.1944e11dc56cdp+0, -0x1.8192f134d5ad9p-4}, -{0x1.18112aebb1a6ep+0, -0x1.70084464f0538p-4}, -{0x1.16e013231b7e9p+0, -0x1.5e90bdec5cb1fp-4}, -{0x1.15b1913f156cfp+0, -0x1.4d2c3433c5536p-4}, -{0x1.14859cdedde13p+0, -0x1.3bda7e219879ap-4}, -{0x1.135c2dc68cfa4p+0, -0x1.2a9b732d27194p-4}, -{0x1.12353bdb01684p+0, -0x1.196eeb2b10807p-4}, -{0x1.1110bf25b85b4p+0, -0x1.0854be8ef8a7ep-4}, -{0x1.0feeafd2f8577p+0, -0x1.ee998cb277432p-5}, -{0x1.0ecf062c51c3bp+0, -0x1.ccadb79919fb9p-5}, -{0x1.0db1baa076c8bp+0, -0x1.aae5b1d8618b0p-5}, -{0x1.0c96c5bb3048ep+0, -0x1.89413015d7442p-5}, -{0x1.0b7e20263e070p+0, -0x1.67bfe7bf158dep-5}, -{0x1.0a67c2acd0ce3p+0, -0x1.46618f83941bep-5}, -{0x1.0953a6391e982p+0, -0x1.2525df1b0618ap-5}, -{0x1.0841c3caea380p+0, -0x1.040c8e2f77c6ap-5}, -{0x1.07321489b13eap+0, -0x1.c62aad39f738ap-6}, -{0x1.062491aee9904p+0, -0x1.847fe3bdead9cp-6}, -{0x1.05193497a7cc5p+0, -0x1.43183683400acp-6}, -{0x1.040ff6b5f5e9fp+0, -0x1.01f31c4e1d544p-6}, -{0x1.0308d19aa6127p+0, -0x1.82201d1e6b69ap-7}, -{0x1.0203beedb0c67p+0, -0x1.00dd0f3e1bfd6p-7}, -{0x1.010037d38bcc2p+0, -0x1.ff6fe1feb4e53p-9}, -{1.0, 0.0}, -{0x1.fc06d493cca10p-1, 0x1.fe91885ec8e20p-8}, -{0x1.f81e6ac3b918fp-1, 0x1.fc516f716296dp-7}, -{0x1.f44546ef18996p-1, 0x1.7bb4dd70a015bp-6}, -{0x1.f07b10382c84bp-1, 0x1.f84c99b34b674p-6}, -{0x1.ecbf7070e59d4p-1, 0x1.39f9ce4fb2d71p-5}, -{0x1.e91213f715939p-1, 0x1.7756c0fd22e78p-5}, -{0x1.e572a9a75f7b7p-1, 0x1.b43ee82db8f3ap-5}, -{0x1.e1e0e2c530207p-1, 0x1.f0b3fced60034p-5}, -{0x1.de5c72d8a8be3p-1, 0x1.165bd78d4878ep-4}, -{0x1.dae50fa5658ccp-1, 0x1.3425d2715ebe6p-4}, -{0x1.d77a71145a2dap-1, 0x1.51b8bd91b7915p-4}, -{0x1.d41c51166623ep-1, 0x1.6f15632c76a47p-4}, -{0x1.d0ca6ba0bb29fp-1, 0x1.8c3c88ecbe503p-4}, -{0x1.cd847e8e59681p-1, 0x1.a92ef077625dap-4}, -{0x1.ca4a499693e00p-1, 0x1.c5ed5745fa006p-4}, -{0x1.c71b8e399e821p-1, 0x1.e27876de1c993p-4}, -{0x1.c3f80faf19077p-1, 0x1.fed104fce4cdcp-4}, -{0x1.c0df92dc2b0ecp-1, 0x1.0d7bd9c17d78bp-3}, -{0x1.bdd1de3cbb542p-1, 0x1.1b76986cef97bp-3}, -{0x1.baceb9e1007a3p-1, 0x1.295913d24f750p-3}, -{0x1.b7d5ef543e55ep-1, 0x1.37239fa295d17p-3}, -{0x1.b4e749977d953p-1, 0x1.44d68dd78714bp-3}, -{0x1.b20295155478ep-1, 0x1.52722ebe5d780p-3}, -{0x1.af279f8e82be2p-1, 0x1.5ff6d12671f98p-3}, -{0x1.ac5638197fdf3p-1, 0x1.6d64c2389484bp-3}, -{0x1.a98e2f102e087p-1, 0x1.7abc4da40fddap-3}, -{0x1.a6cf5606d05c1p-1, 0x1.87fdbda1e8452p-3}, -{0x1.a4197fc04d746p-1, 0x1.95295b06a5f37p-3}, -{0x1.a16c80293dc01p-1, 0x1.a23f6d34abbc5p-3}, -{0x1.9ec82c4dc5bc9p-1, 0x1.af403a28e04f2p-3}, -{0x1.9c2c5a491f534p-1, 0x1.bc2c06a85721ap-3}, -{0x1.9998e1480b618p-1, 0x1.c903161240163p-3}, -{0x1.970d9977c6c2dp-1, 0x1.d5c5aa93287ebp-3}, -{0x1.948a5c023d212p-1, 0x1.e274051823fa9p-3}, -{0x1.920f0303d6809p-1, 0x1.ef0e656300c16p-3}, -{0x1.8f9b698a98b45p-1, 0x1.fb9509f05aa2ap-3}, -{0x1.8d2f6b81726f6p-1, 0x1.04041821f37afp-2}, -{0x1.8acae5bb55badp-1, 0x1.0a340a49b3029p-2}, -{0x1.886db5d9275b8p-1, 0x1.105a7918a126dp-2}, -{0x1.8617ba567c13cp-1, 0x1.1677819812b84p-2}, -{0x1.83c8d27487800p-1, 0x1.1c8b405b40c0ep-2}, -{0x1.8180de3c5dbe7p-1, 0x1.2295d16cfa6b1p-2}, -{0x1.7f3fbe71cdb71p-1, 0x1.28975066318a2p-2}, -{0x1.7d055498071c1p-1, 0x1.2e8fd855d86fcp-2}, -{0x1.7ad182e54f65ap-1, 0x1.347f83d605e59p-2}, -{0x1.78a42c3c90125p-1, 0x1.3a666d1244588p-2}, -{0x1.767d342f76944p-1, 0x1.4044adb6f8ec4p-2}, -{0x1.745c7ef26b00ap-1, 0x1.461a5f077558cp-2}, -{0x1.7241f15769d0fp-1, 0x1.4be799e20b9c8p-2}, -{0x1.702d70d396e41p-1, 0x1.51ac76a6b79dfp-2}, -{0x1.6e1ee3700cd11p-1, 0x1.57690d5744a45p-2}, -{0x1.6c162fc9cbe02p-1, 0x1.5d1d758e45217p-2}, -}; -#endif diff --git a/contrib/arm-optimized-routines/math/v_logf.c b/contrib/arm-optimized-routines/math/v_logf.c deleted file mode 100644 index 7373192f03fa..000000000000 --- a/contrib/arm-optimized-routines/math/v_logf.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Single-precision vector log function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* 3.34 ulp error */ - -0x1.3e737cp-3f, 0x1.5a9aa2p-3f, -0x1.4f9934p-3f, 0x1.961348p-3f, - -0x1.00187cp-2f, 0x1.555d7cp-2f, -0x1.ffffc8p-2f, -}; -#define P7 v_f32 (Poly[0]) -#define P6 v_f32 (Poly[1]) -#define P5 v_f32 (Poly[2]) -#define P4 v_f32 (Poly[3]) -#define P3 v_f32 (Poly[4]) -#define P2 v_f32 (Poly[5]) -#define P1 v_f32 (Poly[6]) - -#define Ln2 v_f32 (0x1.62e43p-1f) /* 0x3f317218 */ -#define Min v_u32 (0x00800000) -#define Max v_u32 (0x7f800000) -#define Mask v_u32 (0x007fffff) -#define Off v_u32 (0x3f2aaaab) /* 0.666667 */ - -VPCS_ATTR -__attribute__ ((noinline)) static v_f32_t -specialcase (v_f32_t x, v_f32_t y, v_u32_t cmp) -{ - /* Fall back to scalar code. */ - return v_call_f32 (logf, x, y, cmp); -} - -VPCS_ATTR -v_f32_t -V_NAME(logf) (v_f32_t x) -{ - v_f32_t n, p, q, r, r2, y; - v_u32_t u, cmp; - - u = v_as_u32_f32 (x); - cmp = v_cond_u32 (u - Min >= Max - Min); - - /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3 */ - u -= Off; - n = v_to_f32_s32 (v_as_s32_u32 (u) >> 23); /* signextend */ - u &= Mask; - u += Off; - r = v_as_f32_u32 (u) - v_f32 (1.0f); - - /* y = log(1+r) + n*ln2. */ - r2 = r * r; - /* n*ln2 + r + r2*(P1 + r*P2 + r2*(P3 + r*P4 + r2*(P5 + r*P6 + r2*P7))). */ - p = v_fma_f32 (P6, r, P5); - q = v_fma_f32 (P4, r, P3); - y = v_fma_f32 (P2, r, P1); - p = v_fma_f32 (P7, r2, p); - q = v_fma_f32 (p, r2, q); - y = v_fma_f32 (q, r2, y); - p = v_fma_f32 (Ln2, n, r); - y = v_fma_f32 (y, r2, p); - - if (unlikely (v_any_u32 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_math.h b/contrib/arm-optimized-routines/math/v_math.h deleted file mode 100644 index f2cc4670bb9b..000000000000 --- a/contrib/arm-optimized-routines/math/v_math.h +++ /dev/null @@ -1,641 +0,0 @@ -/* - * Vector math abstractions. - * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#ifndef _V_MATH_H -#define _V_MATH_H - -#ifndef WANT_VMATH -/* Enable the build of vector math code. */ -# define WANT_VMATH 1 -#endif -#if WANT_VMATH - -/* The goal of this header is to allow vector and scalar - build of the same algorithm, the provided intrinsic - wrappers are also vector length agnostic so they can - be implemented for SVE too (or other simd architectures) - and then the code should work on those targets too. */ - -#if SCALAR -#define V_NAME(x) __s_##x -#elif VPCS && __aarch64__ -#define V_NAME(x) __vn_##x -#define VPCS_ATTR __attribute__ ((aarch64_vector_pcs)) -#else -#define V_NAME(x) __v_##x -#endif - -#ifndef VPCS_ATTR -#define VPCS_ATTR -#endif -#ifndef VPCS_ALIAS -#define VPCS_ALIAS -#endif - -#include <stdint.h> -#include "math_config.h" - -typedef float f32_t; -typedef uint32_t u32_t; -typedef int32_t s32_t; -typedef double f64_t; -typedef uint64_t u64_t; -typedef int64_t s64_t; - -/* reinterpret as type1 from type2. */ -static inline u32_t -as_u32_f32 (f32_t x) -{ - union { f32_t f; u32_t u; } r = {x}; - return r.u; -} -static inline f32_t -as_f32_u32 (u32_t x) -{ - union { u32_t u; f32_t f; } r = {x}; - return r.f; -} -static inline s32_t -as_s32_u32 (u32_t x) -{ - union { u32_t u; s32_t i; } r = {x}; - return r.i; -} -static inline u32_t -as_u32_s32 (s32_t x) -{ - union { s32_t i; u32_t u; } r = {x}; - return r.u; -} -static inline u64_t -as_u64_f64 (f64_t x) -{ - union { f64_t f; u64_t u; } r = {x}; - return r.u; -} -static inline f64_t -as_f64_u64 (u64_t x) -{ - union { u64_t u; f64_t f; } r = {x}; - return r.f; -} -static inline s64_t -as_s64_u64 (u64_t x) -{ - union { u64_t u; s64_t i; } r = {x}; - return r.i; -} -static inline u64_t -as_u64_s64 (s64_t x) -{ - union { s64_t i; u64_t u; } r = {x}; - return r.u; -} - -#if SCALAR -#define V_SUPPORTED 1 -typedef f32_t v_f32_t; -typedef u32_t v_u32_t; -typedef s32_t v_s32_t; -typedef f64_t v_f64_t; -typedef u64_t v_u64_t; -typedef s64_t v_s64_t; - -static inline int -v_lanes32 (void) -{ - return 1; -} - -static inline v_f32_t -v_f32 (f32_t x) -{ - return x; -} -static inline v_u32_t -v_u32 (u32_t x) -{ - return x; -} -static inline v_s32_t -v_s32 (s32_t x) -{ - return x; -} - -static inline f32_t -v_get_f32 (v_f32_t x, int i) -{ - return x; -} -static inline u32_t -v_get_u32 (v_u32_t x, int i) -{ - return x; -} -static inline s32_t -v_get_s32 (v_s32_t x, int i) -{ - return x; -} - -static inline void -v_set_f32 (v_f32_t *x, int i, f32_t v) -{ - *x = v; -} -static inline void -v_set_u32 (v_u32_t *x, int i, u32_t v) -{ - *x = v; -} -static inline void -v_set_s32 (v_s32_t *x, int i, s32_t v) -{ - *x = v; -} - -/* true if any elements of a v_cond result is non-zero. */ -static inline int -v_any_u32 (v_u32_t x) -{ - return x != 0; -} -/* to wrap the result of relational operators. */ -static inline v_u32_t -v_cond_u32 (v_u32_t x) -{ - return x ? -1 : 0; -} -static inline v_f32_t -v_abs_f32 (v_f32_t x) -{ - return __builtin_fabsf (x); -} -static inline v_f32_t -v_fma_f32 (v_f32_t x, v_f32_t y, v_f32_t z) -{ - return __builtin_fmaf (x, y, z); -} -static inline v_f32_t -v_round_f32 (v_f32_t x) -{ - return __builtin_roundf (x); -} -static inline v_s32_t -v_round_s32 (v_f32_t x) -{ - return __builtin_lroundf (x); /* relies on -fno-math-errno. */ -} -/* convert to type1 from type2. */ -static inline v_f32_t -v_to_f32_s32 (v_s32_t x) -{ - return x; -} -static inline v_f32_t -v_to_f32_u32 (v_u32_t x) -{ - return x; -} -/* reinterpret as type1 from type2. */ -static inline v_u32_t -v_as_u32_f32 (v_f32_t x) -{ - union { v_f32_t f; v_u32_t u; } r = {x}; - return r.u; -} -static inline v_f32_t -v_as_f32_u32 (v_u32_t x) -{ - union { v_u32_t u; v_f32_t f; } r = {x}; - return r.f; -} -static inline v_s32_t -v_as_s32_u32 (v_u32_t x) -{ - union { v_u32_t u; v_s32_t i; } r = {x}; - return r.i; -} -static inline v_u32_t -v_as_u32_s32 (v_s32_t x) -{ - union { v_s32_t i; v_u32_t u; } r = {x}; - return r.u; -} -static inline v_f32_t -v_lookup_f32 (const f32_t *tab, v_u32_t idx) -{ - return tab[idx]; -} -static inline v_u32_t -v_lookup_u32 (const u32_t *tab, v_u32_t idx) -{ - return tab[idx]; -} -static inline v_f32_t -v_call_f32 (f32_t (*f) (f32_t), v_f32_t x, v_f32_t y, v_u32_t p) -{ - return f (x); -} -static inline v_f32_t -v_call2_f32 (f32_t (*f) (f32_t, f32_t), v_f32_t x1, v_f32_t x2, v_f32_t y, - v_u32_t p) -{ - return f (x1, x2); -} - -static inline int -v_lanes64 (void) -{ - return 1; -} -static inline v_f64_t -v_f64 (f64_t x) -{ - return x; -} -static inline v_u64_t -v_u64 (u64_t x) -{ - return x; -} -static inline v_s64_t -v_s64 (s64_t x) -{ - return x; -} -static inline f64_t -v_get_f64 (v_f64_t x, int i) -{ - return x; -} -static inline void -v_set_f64 (v_f64_t *x, int i, f64_t v) -{ - *x = v; -} -/* true if any elements of a v_cond result is non-zero. */ -static inline int -v_any_u64 (v_u64_t x) -{ - return x != 0; -} -/* to wrap the result of relational operators. */ -static inline v_u64_t -v_cond_u64 (v_u64_t x) -{ - return x ? -1 : 0; -} -static inline v_f64_t -v_abs_f64 (v_f64_t x) -{ - return __builtin_fabs (x); -} -static inline v_f64_t -v_fma_f64 (v_f64_t x, v_f64_t y, v_f64_t z) -{ - return __builtin_fma (x, y, z); -} -static inline v_f64_t -v_round_f64 (v_f64_t x) -{ - return __builtin_round (x); -} -static inline v_s64_t -v_round_s64 (v_f64_t x) -{ - return __builtin_lround (x); /* relies on -fno-math-errno. */ -} -/* convert to type1 from type2. */ -static inline v_f64_t -v_to_f64_s64 (v_s64_t x) -{ - return x; -} -static inline v_f64_t -v_to_f64_u64 (v_u64_t x) -{ - return x; -} -/* reinterpret as type1 from type2. */ -static inline v_u64_t -v_as_u64_f64 (v_f64_t x) -{ - union { v_f64_t f; v_u64_t u; } r = {x}; - return r.u; -} -static inline v_f64_t -v_as_f64_u64 (v_u64_t x) -{ - union { v_u64_t u; v_f64_t f; } r = {x}; - return r.f; -} -static inline v_s64_t -v_as_s64_u64 (v_u64_t x) -{ - union { v_u64_t u; v_s64_t i; } r = {x}; - return r.i; -} -static inline v_u64_t -v_as_u64_s64 (v_s64_t x) -{ - union { v_s64_t i; v_u64_t u; } r = {x}; - return r.u; -} -static inline v_f64_t -v_lookup_f64 (const f64_t *tab, v_u64_t idx) -{ - return tab[idx]; -} -static inline v_u64_t -v_lookup_u64 (const u64_t *tab, v_u64_t idx) -{ - return tab[idx]; -} -static inline v_f64_t -v_call_f64 (f64_t (*f) (f64_t), v_f64_t x, v_f64_t y, v_u64_t p) -{ - return f (x); -} - -#elif __aarch64__ -#define V_SUPPORTED 1 -#include <arm_neon.h> -typedef float32x4_t v_f32_t; -typedef uint32x4_t v_u32_t; -typedef int32x4_t v_s32_t; -typedef float64x2_t v_f64_t; -typedef uint64x2_t v_u64_t; -typedef int64x2_t v_s64_t; - -static inline int -v_lanes32 (void) -{ - return 4; -} - -static inline v_f32_t -v_f32 (f32_t x) -{ - return (v_f32_t){x, x, x, x}; -} -static inline v_u32_t -v_u32 (u32_t x) -{ - return (v_u32_t){x, x, x, x}; -} -static inline v_s32_t -v_s32 (s32_t x) -{ - return (v_s32_t){x, x, x, x}; -} - -static inline f32_t -v_get_f32 (v_f32_t x, int i) -{ - return x[i]; -} -static inline u32_t -v_get_u32 (v_u32_t x, int i) -{ - return x[i]; -} -static inline s32_t -v_get_s32 (v_s32_t x, int i) -{ - return x[i]; -} - -static inline void -v_set_f32 (v_f32_t *x, int i, f32_t v) -{ - (*x)[i] = v; -} -static inline void -v_set_u32 (v_u32_t *x, int i, u32_t v) -{ - (*x)[i] = v; -} -static inline void -v_set_s32 (v_s32_t *x, int i, s32_t v) -{ - (*x)[i] = v; -} - -/* true if any elements of a v_cond result is non-zero. */ -static inline int -v_any_u32 (v_u32_t x) -{ - /* assume elements in x are either 0 or -1u. */ - return vpaddd_u64 (vreinterpretq_u64_u32 (x)) != 0; -} -/* to wrap the result of relational operators. */ -static inline v_u32_t -v_cond_u32 (v_u32_t x) -{ - return x; -} -static inline v_f32_t -v_abs_f32 (v_f32_t x) -{ - return vabsq_f32 (x); -} -static inline v_f32_t -v_fma_f32 (v_f32_t x, v_f32_t y, v_f32_t z) -{ - return vfmaq_f32 (z, x, y); -} -static inline v_f32_t -v_round_f32 (v_f32_t x) -{ - return vrndaq_f32 (x); -} -static inline v_s32_t -v_round_s32 (v_f32_t x) -{ - return vcvtaq_s32_f32 (x); -} -/* convert to type1 from type2. */ -static inline v_f32_t -v_to_f32_s32 (v_s32_t x) -{ - return (v_f32_t){x[0], x[1], x[2], x[3]}; -} -static inline v_f32_t -v_to_f32_u32 (v_u32_t x) -{ - return (v_f32_t){x[0], x[1], x[2], x[3]}; -} -/* reinterpret as type1 from type2. */ -static inline v_u32_t -v_as_u32_f32 (v_f32_t x) -{ - union { v_f32_t f; v_u32_t u; } r = {x}; - return r.u; -} -static inline v_f32_t -v_as_f32_u32 (v_u32_t x) -{ - union { v_u32_t u; v_f32_t f; } r = {x}; - return r.f; -} -static inline v_s32_t -v_as_s32_u32 (v_u32_t x) -{ - union { v_u32_t u; v_s32_t i; } r = {x}; - return r.i; -} -static inline v_u32_t -v_as_u32_s32 (v_s32_t x) -{ - union { v_s32_t i; v_u32_t u; } r = {x}; - return r.u; -} -static inline v_f32_t -v_lookup_f32 (const f32_t *tab, v_u32_t idx) -{ - return (v_f32_t){tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]]}; -} -static inline v_u32_t -v_lookup_u32 (const u32_t *tab, v_u32_t idx) -{ - return (v_u32_t){tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]]}; -} -static inline v_f32_t -v_call_f32 (f32_t (*f) (f32_t), v_f32_t x, v_f32_t y, v_u32_t p) -{ - return (v_f32_t){p[0] ? f (x[0]) : y[0], p[1] ? f (x[1]) : y[1], - p[2] ? f (x[2]) : y[2], p[3] ? f (x[3]) : y[3]}; -} -static inline v_f32_t -v_call2_f32 (f32_t (*f) (f32_t, f32_t), v_f32_t x1, v_f32_t x2, v_f32_t y, - v_u32_t p) -{ - return ( - v_f32_t){p[0] ? f (x1[0], x2[0]) : y[0], p[1] ? f (x1[1], x2[1]) : y[1], - p[2] ? f (x1[2], x2[2]) : y[2], p[3] ? f (x1[3], x2[3]) : y[3]}; -} - -static inline int -v_lanes64 (void) -{ - return 2; -} -static inline v_f64_t -v_f64 (f64_t x) -{ - return (v_f64_t){x, x}; -} -static inline v_u64_t -v_u64 (u64_t x) -{ - return (v_u64_t){x, x}; -} -static inline v_s64_t -v_s64 (s64_t x) -{ - return (v_s64_t){x, x}; -} -static inline f64_t -v_get_f64 (v_f64_t x, int i) -{ - return x[i]; -} -static inline void -v_set_f64 (v_f64_t *x, int i, f64_t v) -{ - (*x)[i] = v; -} -/* true if any elements of a v_cond result is non-zero. */ -static inline int -v_any_u64 (v_u64_t x) -{ - /* assume elements in x are either 0 or -1u. */ - return vpaddd_u64 (x) != 0; -} -/* to wrap the result of relational operators. */ -static inline v_u64_t -v_cond_u64 (v_u64_t x) -{ - return x; -} -static inline v_f64_t -v_abs_f64 (v_f64_t x) -{ - return vabsq_f64 (x); -} -static inline v_f64_t -v_fma_f64 (v_f64_t x, v_f64_t y, v_f64_t z) -{ - return vfmaq_f64 (z, x, y); -} -static inline v_f64_t -v_round_f64 (v_f64_t x) -{ - return vrndaq_f64 (x); -} -static inline v_s64_t -v_round_s64 (v_f64_t x) -{ - return vcvtaq_s64_f64 (x); -} -/* convert to type1 from type2. */ -static inline v_f64_t -v_to_f64_s64 (v_s64_t x) -{ - return (v_f64_t){x[0], x[1]}; -} -static inline v_f64_t -v_to_f64_u64 (v_u64_t x) -{ - return (v_f64_t){x[0], x[1]}; -} -/* reinterpret as type1 from type2. */ -static inline v_u64_t -v_as_u64_f64 (v_f64_t x) -{ - union { v_f64_t f; v_u64_t u; } r = {x}; - return r.u; -} -static inline v_f64_t -v_as_f64_u64 (v_u64_t x) -{ - union { v_u64_t u; v_f64_t f; } r = {x}; - return r.f; -} -static inline v_s64_t -v_as_s64_u64 (v_u64_t x) -{ - union { v_u64_t u; v_s64_t i; } r = {x}; - return r.i; -} -static inline v_u64_t -v_as_u64_s64 (v_s64_t x) -{ - union { v_s64_t i; v_u64_t u; } r = {x}; - return r.u; -} -static inline v_f64_t -v_lookup_f64 (const f64_t *tab, v_u64_t idx) -{ - return (v_f64_t){tab[idx[0]], tab[idx[1]]}; -} -static inline v_u64_t -v_lookup_u64 (const u64_t *tab, v_u64_t idx) -{ - return (v_u64_t){tab[idx[0]], tab[idx[1]]}; -} -static inline v_f64_t -v_call_f64 (f64_t (*f) (f64_t), v_f64_t x, v_f64_t y, v_u64_t p) -{ - return (v_f64_t){p[0] ? f (x[0]) : y[0], p[1] ? f (x[1]) : y[1]}; -} -#endif - -#endif -#endif diff --git a/contrib/arm-optimized-routines/math/v_pow.c b/contrib/arm-optimized-routines/math/v_pow.c deleted file mode 100644 index a209d57f41ce..000000000000 --- a/contrib/arm-optimized-routines/math/v_pow.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Double-precision vector pow function. - * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -VPCS_ATTR -v_f64_t -V_NAME(pow) (v_f64_t x, v_f64_t y) -{ - v_f64_t z; - for (int lane = 0; lane < v_lanes64 (); lane++) - { - f64_t sx = v_get_f64 (x, lane); - f64_t sy = v_get_f64 (y, lane); - f64_t sz = pow (sx, sy); - v_set_f64 (&z, lane, sz); - } - return z; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_powf.c b/contrib/arm-optimized-routines/math/v_powf.c deleted file mode 100644 index fb80fa6f1846..000000000000 --- a/contrib/arm-optimized-routines/math/v_powf.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Single-precision vector powf function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -#define Min v_u32 (0x00800000) -#define Max v_u32 (0x7f800000) -#define SBITS 5 -#define Tlog v__powf_log2_data.tab -#define Texp v__exp2f_data.tab -#define A v__powf_log2_data.poly -#define C v__exp2f_data.poly -#define LOGDEG 4 - -#if LOGDEG == 5 -/* 1.01 ulp */ -#define OFF v_u32 (0x3f330000) -#define TBITS 4 -#elif LOGDEG == 4 -/* 2.6 ulp ~ 0.5 + 2^24 (128*Ln2*relerr_log2 + relerr_exp2) */ -#define OFF v_u32 (0x3f35d000) -#define TBITS 5 -#endif - -#define V_EXP2F_TABLE_BITS SBITS -#define V_EXP2F_POLY_ORDER 3 -struct v_exp2f_data -{ - uint64_t tab[1 << V_EXP2F_TABLE_BITS]; - double poly[V_EXP2F_POLY_ORDER]; -}; - -#define V_POWF_LOG2_TABLE_BITS TBITS -#define V_POWF_LOG2_POLY_ORDER LOGDEG -#define SCALE ((double) (1 << SBITS)) -struct v_powf_log2_data -{ - struct - { - double invc, logc; - } tab[1 << V_POWF_LOG2_TABLE_BITS]; - double poly[V_POWF_LOG2_POLY_ORDER]; -}; - -static const struct v_powf_log2_data v__powf_log2_data = { -#if LOGDEG == 5 - .tab = { -{ 0x1.661ec79f8f3bep+0, -0x1.efec65b963019p-2 * SCALE }, -{ 0x1.571ed4aaf883dp+0, -0x1.b0b6832d4fca4p-2 * SCALE }, -{ 0x1.49539f0f010bp+0, -0x1.7418b0a1fb77bp-2 * SCALE }, -{ 0x1.3c995b0b80385p+0, -0x1.39de91a6dcf7bp-2 * SCALE }, -{ 0x1.30d190c8864a5p+0, -0x1.01d9bf3f2b631p-2 * SCALE }, -{ 0x1.25e227b0b8eap+0, -0x1.97c1d1b3b7afp-3 * SCALE }, -{ 0x1.1bb4a4a1a343fp+0, -0x1.2f9e393af3c9fp-3 * SCALE }, -{ 0x1.12358f08ae5bap+0, -0x1.960cbbf788d5cp-4 * SCALE }, -{ 0x1.0953f419900a7p+0, -0x1.a6f9db6475fcep-5 * SCALE }, -{ 0x1p+0, 0x0p+0 * SCALE }, -{ 0x1.e608cfd9a47acp-1, 0x1.338ca9f24f53dp-4 * SCALE }, -{ 0x1.ca4b31f026aap-1, 0x1.476a9543891bap-3 * SCALE }, -{ 0x1.b2036576afce6p-1, 0x1.e840b4ac4e4d2p-3 * SCALE }, -{ 0x1.9c2d163a1aa2dp-1, 0x1.40645f0c6651cp-2 * SCALE }, -{ 0x1.886e6037841edp-1, 0x1.88e9c2c1b9ff8p-2 * SCALE }, -{ 0x1.767dcf5534862p-1, 0x1.ce0a44eb17bccp-2 * SCALE }, - }, -/* rel err: 1.46 * 2^-32 */ - .poly = { -0x1.27616c9496e0bp-2 * SCALE, -0x1.71969a075c67ap-2 * SCALE, -0x1.ec70a6ca7baddp-2 * SCALE, -0x1.7154748bef6c8p-1 * SCALE, -0x1.71547652ab82bp0 * SCALE, - } -#elif LOGDEG == 4 - .tab = { -{0x1.6489890582816p+0, -0x1.e960f97b22702p-2 * SCALE}, -{0x1.5cf19b35e3472p+0, -0x1.c993406cd4db6p-2 * SCALE}, -{0x1.55aac0e956d65p+0, -0x1.aa711d9a7d0f3p-2 * SCALE}, -{0x1.4eb0022977e01p+0, -0x1.8bf37bacdce9bp-2 * SCALE}, -{0x1.47fcccda1dd1fp+0, -0x1.6e13b3519946ep-2 * SCALE}, -{0x1.418ceabab68c1p+0, -0x1.50cb8281e4089p-2 * SCALE}, -{0x1.3b5c788f1edb3p+0, -0x1.341504a237e2bp-2 * SCALE}, -{0x1.3567de48e9c9ap+0, -0x1.17eaab624ffbbp-2 * SCALE}, -{0x1.2fabc80fd19bap+0, -0x1.f88e708f8c853p-3 * SCALE}, -{0x1.2a25200ce536bp+0, -0x1.c24b6da113914p-3 * SCALE}, -{0x1.24d108e0152e3p+0, -0x1.8d02ee397cb1dp-3 * SCALE}, -{0x1.1facd8ab2fbe1p+0, -0x1.58ac1223408b3p-3 * SCALE}, -{0x1.1ab614a03efdfp+0, -0x1.253e6fd190e89p-3 * SCALE}, -{0x1.15ea6d03af9ffp+0, -0x1.e5641882c12ffp-4 * SCALE}, -{0x1.1147b994bb776p+0, -0x1.81fea712926f7p-4 * SCALE}, -{0x1.0ccbf650593aap+0, -0x1.203e240de64a3p-4 * SCALE}, -{0x1.0875408477302p+0, -0x1.8029b86a78281p-5 * SCALE}, -{0x1.0441d42a93328p+0, -0x1.85d713190fb9p-6 * SCALE}, -{0x1p+0, 0x0p+0 * SCALE}, -{0x1.f1d006c855e86p-1, 0x1.4c1cc07312997p-5 * SCALE}, -{0x1.e28c3341aa301p-1, 0x1.5e1848ccec948p-4 * SCALE}, -{0x1.d4bdf9aa64747p-1, 0x1.04cfcb7f1196fp-3 * SCALE}, -{0x1.c7b45a24e5803p-1, 0x1.582813d463c21p-3 * SCALE}, -{0x1.bb5f5eb2ed60ap-1, 0x1.a936fa68760ccp-3 * SCALE}, -{0x1.afb0bff8fe6b4p-1, 0x1.f81bc31d6cc4ep-3 * SCALE}, -{0x1.a49badf7ab1f5p-1, 0x1.2279a09fae6b1p-2 * SCALE}, -{0x1.9a14a111fc4c9p-1, 0x1.47ec0b6df5526p-2 * SCALE}, -{0x1.901131f5b2fdcp-1, 0x1.6c71762280f1p-2 * SCALE}, -{0x1.8687f73f6d865p-1, 0x1.90155070798dap-2 * SCALE}, -{0x1.7d7067eb77986p-1, 0x1.b2e23b1d3068cp-2 * SCALE}, -{0x1.74c2c1cf97b65p-1, 0x1.d4e21b0daa86ap-2 * SCALE}, -{0x1.6c77f37cff2a1p-1, 0x1.f61e2a2f67f3fp-2 * SCALE}, - }, -/* rel err: 1.5 * 2^-30 */ - .poly = { - -0x1.6ff5daa3b3d7cp-2 * SCALE, - 0x1.ec81d03c01aebp-2 * SCALE, - -0x1.71547bb43f101p-1 * SCALE, - 0x1.7154764a815cbp0 * SCALE, - } -#endif -}; - -static const struct v_exp2f_data v__exp2f_data = { - .tab = { -0x3ff0000000000000, 0x3fefd9b0d3158574, 0x3fefb5586cf9890f, 0x3fef9301d0125b51, -0x3fef72b83c7d517b, 0x3fef54873168b9aa, 0x3fef387a6e756238, 0x3fef1e9df51fdee1, -0x3fef06fe0a31b715, 0x3feef1a7373aa9cb, 0x3feedea64c123422, 0x3feece086061892d, -0x3feebfdad5362a27, 0x3feeb42b569d4f82, 0x3feeab07dd485429, 0x3feea47eb03a5585, -0x3feea09e667f3bcd, 0x3fee9f75e8ec5f74, 0x3feea11473eb0187, 0x3feea589994cce13, -0x3feeace5422aa0db, 0x3feeb737b0cdc5e5, 0x3feec49182a3f090, 0x3feed503b23e255d, -0x3feee89f995ad3ad, 0x3feeff76f2fb5e47, 0x3fef199bdd85529c, 0x3fef3720dcef9069, -0x3fef5818dcfba487, 0x3fef7c97337b9b5f, 0x3fefa4afa2a490da, 0x3fefd0765b6e4540, - }, -/* rel err: 1.69 * 2^-34 */ - .poly = { -0x1.c6af84b912394p-5/SCALE/SCALE/SCALE, 0x1.ebfce50fac4f3p-3/SCALE/SCALE, 0x1.62e42ff0c52d6p-1/SCALE - }, -}; - -VPCS_ATTR -__attribute__ ((noinline)) static v_f32_t -specialcase (v_f32_t x, v_f32_t y, v_f32_t ret, v_u32_t cmp) -{ - return v_call2_f32 (powf, x, y, ret, cmp); -} - -VPCS_ATTR -v_f32_t -V_NAME(powf) (v_f32_t x, v_f32_t y) -{ - v_u32_t u, tmp, cmp, i, top, iz; - v_s32_t k; - v_f32_t ret; - - u = v_as_u32_f32 (x); - cmp = v_cond_u32 (u - Min >= Max - Min); - tmp = u - OFF; - i = (tmp >> (23 - TBITS)) % (1 << TBITS); - top = tmp & 0xff800000; - iz = u - top; - k = v_as_s32_u32 (top) >> (23 - SBITS); /* arithmetic shift */ - - for (int lane = 0; lane < v_lanes32 (); lane++) - { - uint32_t si, siz; - int32_t sk; - float sy; - - /* Use double precision for each lane. */ - double invc, logc, z, r, p, y0, logx, ylogx, kd, s; - uint64_t ki, t; - - si = v_get_u32 (i, lane); - siz = v_get_u32 (iz, lane); - sk = v_get_s32 (k, lane); - sy = v_get_f32 (y, lane); - - invc = Tlog[si].invc; - logc = Tlog[si].logc; - z = (double) as_f32_u32 (siz); - - /* log2(x) = log1p(z/c-1)/ln2 + log2(c) + k */ - r = __builtin_fma (z, invc, -1.0); - y0 = logc + (double) sk; - - /* Polynomial to approximate log1p(r)/ln2. */ -#if LOGDEG == 5 - logx = A[0]; - logx = r * logx + A[1]; - logx = r * logx + A[2]; - logx = r * logx + A[3]; - logx = r * logx + A[4]; - logx = r * logx + y0; -#elif LOGDEG == 4 - logx = A[0]; - logx = r * logx + A[1]; - logx = r * logx + A[2]; - logx = r * logx + A[3]; - logx = r * logx + y0; -#endif - ylogx = sy * logx; - v_set_u32 (&cmp, lane, - (as_u64_f64 (ylogx) >> 47 & 0xffff) - >= as_u64_f64 (126.0 * (1 << SBITS)) >> 47 - ? 1 - : v_get_u32 (cmp, lane)); - - /* N*x = k + r with r in [-1/2, 1/2] */ -#if TOINT_INTRINSICS - kd = roundtoint (ylogx); /* k */ - ki = converttoint (ylogx); -#else -# define SHIFT 0x1.8p52 - kd = eval_as_double (ylogx + SHIFT); - ki = asuint64 (kd); - kd -= SHIFT; -#endif - r = ylogx - kd; - - /* exp2(x) = 2^(k/N) * 2^r ~= s * (C0*r^3 + C1*r^2 + C2*r + 1) */ - t = Texp[ki % (1 << SBITS)]; - t += ki << (52 - SBITS); - s = as_f64_u64 (t); - p = C[0]; - p = __builtin_fma (p, r, C[1]); - p = __builtin_fma (p, r, C[2]); - p = __builtin_fma (p, s * r, s); - - v_set_f32 (&ret, lane, p); - } - if (unlikely (v_any_u32 (cmp))) - return specialcase (x, y, ret, cmp); - return ret; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_sin.c b/contrib/arm-optimized-routines/math/v_sin.c deleted file mode 100644 index 2b9ed059189c..000000000000 --- a/contrib/arm-optimized-routines/math/v_sin.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Double-precision vector sin function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const double Poly[] = { -/* worst-case error is 3.5 ulp. - abs error: 0x1.be222a58p-53 in [-pi/2, pi/2]. */ --0x1.9f4a9c8b21dc9p-41, - 0x1.60e88a10163f2p-33, --0x1.ae6361b7254e7p-26, - 0x1.71de382e8d62bp-19, --0x1.a01a019aeb4ffp-13, - 0x1.111111110b25ep-7, --0x1.55555555554c3p-3, -}; - -#define C7 v_f64 (Poly[0]) -#define C6 v_f64 (Poly[1]) -#define C5 v_f64 (Poly[2]) -#define C4 v_f64 (Poly[3]) -#define C3 v_f64 (Poly[4]) -#define C2 v_f64 (Poly[5]) -#define C1 v_f64 (Poly[6]) - -#define InvPi v_f64 (0x1.45f306dc9c883p-2) -#define Pi1 v_f64 (0x1.921fb54442d18p+1) -#define Pi2 v_f64 (0x1.1a62633145c06p-53) -#define Pi3 v_f64 (0x1.c1cd129024e09p-106) -#define Shift v_f64 (0x1.8p52) -#define RangeVal v_f64 (0x1p23) -#define AbsMask v_u64 (0x7fffffffffffffff) - -VPCS_ATTR -__attribute__ ((noinline)) static v_f64_t -specialcase (v_f64_t x, v_f64_t y, v_u64_t cmp) -{ - return v_call_f64 (sin, x, y, cmp); -} - -VPCS_ATTR -v_f64_t -V_NAME(sin) (v_f64_t x) -{ - v_f64_t n, r, r2, y; - v_u64_t sign, odd, cmp; - - r = v_as_f64_u64 (v_as_u64_f64 (x) & AbsMask); - sign = v_as_u64_f64 (x) & ~AbsMask; - cmp = v_cond_u64 (v_as_u64_f64 (r) >= v_as_u64_f64 (RangeVal)); - - /* n = rint(|x|/pi). */ - n = v_fma_f64 (InvPi, r, Shift); - odd = v_as_u64_f64 (n) << 63; - n -= Shift; - - /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ - r = v_fma_f64 (-Pi1, n, r); - r = v_fma_f64 (-Pi2, n, r); - r = v_fma_f64 (-Pi3, n, r); - - /* sin(r) poly approx. */ - r2 = r * r; - y = v_fma_f64 (C7, r2, C6); - y = v_fma_f64 (y, r2, C5); - y = v_fma_f64 (y, r2, C4); - y = v_fma_f64 (y, r2, C3); - y = v_fma_f64 (y, r2, C2); - y = v_fma_f64 (y, r2, C1); - y = v_fma_f64 (y * r2, r, r); - - /* sign. */ - y = v_as_f64_u64 (v_as_u64_f64 (y) ^ sign ^ odd); - - if (unlikely (v_any_u64 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/v_sinf.c b/contrib/arm-optimized-routines/math/v_sinf.c deleted file mode 100644 index e66bfce6d8aa..000000000000 --- a/contrib/arm-optimized-routines/math/v_sinf.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Single-precision vector sin function. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#include "mathlib.h" -#include "v_math.h" -#if V_SUPPORTED - -static const float Poly[] = { - /* 1.886 ulp error */ - 0x1.5b2e76p-19f, - -0x1.9f42eap-13f, - 0x1.110df4p-7f, - -0x1.555548p-3f, -}; -#define Pi1 v_f32 (0x1.921fb6p+1f) -#define Pi2 v_f32 (-0x1.777a5cp-24f) -#define Pi3 v_f32 (-0x1.ee59dap-49f) -#define A3 v_f32 (Poly[3]) -#define A5 v_f32 (Poly[2]) -#define A7 v_f32 (Poly[1]) -#define A9 v_f32 (Poly[0]) -#define RangeVal v_f32 (0x1p20f) -#define InvPi v_f32 (0x1.45f306p-2f) -#define Shift v_f32 (0x1.8p+23f) -#define AbsMask v_u32 (0x7fffffff) - -VPCS_ATTR -static v_f32_t -specialcase (v_f32_t x, v_f32_t y, v_u32_t cmp) -{ - /* Fall back to scalar code. */ - return v_call_f32 (sinf, x, y, cmp); -} - -VPCS_ATTR -v_f32_t -V_NAME(sinf) (v_f32_t x) -{ - v_f32_t n, r, r2, y; - v_u32_t sign, odd, cmp; - - r = v_as_f32_u32 (v_as_u32_f32 (x) & AbsMask); - sign = v_as_u32_f32 (x) & ~AbsMask; - cmp = v_cond_u32 (v_as_u32_f32 (r) >= v_as_u32_f32 (RangeVal)); - - /* n = rint(|x|/pi) */ - n = v_fma_f32 (InvPi, r, Shift); - odd = v_as_u32_f32 (n) << 31; - n -= Shift; - - /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2) */ - r = v_fma_f32 (-Pi1, n, r); - r = v_fma_f32 (-Pi2, n, r); - r = v_fma_f32 (-Pi3, n, r); - - /* y = sin(r) */ - r2 = r * r; - y = v_fma_f32 (A9, r2, A7); - y = v_fma_f32 (y, r2, A5); - y = v_fma_f32 (y, r2, A3); - y = v_fma_f32 (y * r2, r, r); - - /* sign fix */ - y = v_as_f32_u32 (v_as_u32_f32 (y) ^ sign ^ odd); - - if (unlikely (v_any_u32 (cmp))) - return specialcase (x, y, cmp); - return y; -} -VPCS_ALIAS -#endif diff --git a/contrib/arm-optimized-routines/math/vn_cos.c b/contrib/arm-optimized-routines/math/vn_cos.c deleted file mode 100644 index b57a549eba68..000000000000 --- a/contrib/arm-optimized-routines/math/vn_cos.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_cos. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_cos, _ZGVnN2v_cos) -#include "v_cos.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_cosf.c b/contrib/arm-optimized-routines/math/vn_cosf.c deleted file mode 100644 index 6321d4620fa7..000000000000 --- a/contrib/arm-optimized-routines/math/vn_cosf.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_cosf. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_cosf, _ZGVnN4v_cosf) -#include "v_cosf.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_exp.c b/contrib/arm-optimized-routines/math/vn_exp.c deleted file mode 100644 index 06e269d41766..000000000000 --- a/contrib/arm-optimized-routines/math/vn_exp.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_exp. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_exp, _ZGVnN2v_exp) -#include "v_exp.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_exp2f.c b/contrib/arm-optimized-routines/math/vn_exp2f.c deleted file mode 100644 index db9707e86f16..000000000000 --- a/contrib/arm-optimized-routines/math/vn_exp2f.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_exp2f. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_exp2f, _ZGVnN4v_exp2f) -#include "v_exp2f.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_exp2f_1u.c b/contrib/arm-optimized-routines/math/vn_exp2f_1u.c deleted file mode 100644 index 17bd0abd7a60..000000000000 --- a/contrib/arm-optimized-routines/math/vn_exp2f_1u.c +++ /dev/null @@ -1,11 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_exp2f_1u. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#include "v_exp2f_1u.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_expf.c b/contrib/arm-optimized-routines/math/vn_expf.c deleted file mode 100644 index 0652907225d9..000000000000 --- a/contrib/arm-optimized-routines/math/vn_expf.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_expf. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_expf, _ZGVnN4v_expf) -#include "v_expf.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_expf_1u.c b/contrib/arm-optimized-routines/math/vn_expf_1u.c deleted file mode 100644 index 3be776814822..000000000000 --- a/contrib/arm-optimized-routines/math/vn_expf_1u.c +++ /dev/null @@ -1,11 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_expf_1u. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#include "v_expf_1u.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_log.c b/contrib/arm-optimized-routines/math/vn_log.c deleted file mode 100644 index b58fe8ff820a..000000000000 --- a/contrib/arm-optimized-routines/math/vn_log.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_log. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_log, _ZGVnN2v_log) -#include "v_log.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_logf.c b/contrib/arm-optimized-routines/math/vn_logf.c deleted file mode 100644 index cc5b8ae3ed55..000000000000 --- a/contrib/arm-optimized-routines/math/vn_logf.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_logf. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_logf, _ZGVnN4v_logf) -#include "v_logf.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_pow.c b/contrib/arm-optimized-routines/math/vn_pow.c deleted file mode 100644 index 260950113b04..000000000000 --- a/contrib/arm-optimized-routines/math/vn_pow.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_pow. - * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_pow, _ZGVnN2vv_pow) -#include "v_pow.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_powf.c b/contrib/arm-optimized-routines/math/vn_powf.c deleted file mode 100644 index 095d07e337ad..000000000000 --- a/contrib/arm-optimized-routines/math/vn_powf.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_powf. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_powf, _ZGVnN4vv_powf) -#include "v_powf.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_sin.c b/contrib/arm-optimized-routines/math/vn_sin.c deleted file mode 100644 index 905c79623350..000000000000 --- a/contrib/arm-optimized-routines/math/vn_sin.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_sin. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_sin, _ZGVnN2v_sin) -#include "v_sin.c" -#endif diff --git a/contrib/arm-optimized-routines/math/vn_sinf.c b/contrib/arm-optimized-routines/math/vn_sinf.c deleted file mode 100644 index 1214e1a55638..000000000000 --- a/contrib/arm-optimized-routines/math/vn_sinf.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * AdvSIMD vector PCS variant of __v_sinf. - * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT - */ -#include "mathlib.h" -#ifdef __vpcs -#define VPCS 1 -#define VPCS_ALIAS strong_alias (__vn_sinf, _ZGVnN4v_sinf) -#include "v_sinf.c" -#endif diff --git a/contrib/arm-optimized-routines/networking/Dir.mk b/contrib/arm-optimized-routines/networking/Dir.mk index b49610341171..2589e0a1f91c 100644 --- a/contrib/arm-optimized-routines/networking/Dir.mk +++ b/contrib/arm-optimized-routines/networking/Dir.mk @@ -1,7 +1,7 @@ # Makefile fragment - requires GNU make # # Copyright (c) 2019-2020, Arm Limited. -# SPDX-License-Identifier: MIT +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception S := $(srcdir)/networking B := build/networking diff --git a/contrib/arm-optimized-routines/networking/aarch64/chksum_simd.c b/contrib/arm-optimized-routines/networking/aarch64/chksum_simd.c index 6d5be58b1f32..90c00eb7cabe 100644 --- a/contrib/arm-optimized-routines/networking/aarch64/chksum_simd.c +++ b/contrib/arm-optimized-routines/networking/aarch64/chksum_simd.c @@ -2,7 +2,7 @@ * AArch64-specific checksum implementation using NEON * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "networking.h" diff --git a/contrib/arm-optimized-routines/networking/arm/chksum_simd.c b/contrib/arm-optimized-routines/networking/arm/chksum_simd.c index 7f69adfc963c..ae08fe5dd056 100644 --- a/contrib/arm-optimized-routines/networking/arm/chksum_simd.c +++ b/contrib/arm-optimized-routines/networking/arm/chksum_simd.c @@ -2,7 +2,7 @@ * Armv7-A specific checksum implementation using NEON * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "networking.h" diff --git a/contrib/arm-optimized-routines/networking/chksum.c b/contrib/arm-optimized-routines/networking/chksum.c index 95ce5baa94e4..329482ffdcee 100644 --- a/contrib/arm-optimized-routines/networking/chksum.c +++ b/contrib/arm-optimized-routines/networking/chksum.c @@ -3,7 +3,7 @@ * This sum is often used as a simple checksum in networking. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "networking.h" diff --git a/contrib/arm-optimized-routines/networking/chksum_common.h b/contrib/arm-optimized-routines/networking/chksum_common.h index 958c8cc0742e..16f0f6c11df7 100644 --- a/contrib/arm-optimized-routines/networking/chksum_common.h +++ b/contrib/arm-optimized-routines/networking/chksum_common.h @@ -2,7 +2,7 @@ * Common code for checksum implementations * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef CHKSUM_COMMON_H diff --git a/contrib/arm-optimized-routines/networking/include/networking.h b/contrib/arm-optimized-routines/networking/include/networking.h index a88feff88339..297dd4bfab02 100644 --- a/contrib/arm-optimized-routines/networking/include/networking.h +++ b/contrib/arm-optimized-routines/networking/include/networking.h @@ -2,7 +2,7 @@ * Public API. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ unsigned short __chksum (const void *, unsigned int); diff --git a/contrib/arm-optimized-routines/networking/test/chksum.c b/contrib/arm-optimized-routines/networking/test/chksum.c index 41b98120f275..239b5b88777b 100644 --- a/contrib/arm-optimized-routines/networking/test/chksum.c +++ b/contrib/arm-optimized-routines/networking/test/chksum.c @@ -2,7 +2,7 @@ * Ones' complement checksum test & benchmark * * Copyright (c) 2016-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define _GNU_SOURCE diff --git a/contrib/arm-optimized-routines/pl/Dir.mk b/contrib/arm-optimized-routines/pl/Dir.mk new file mode 100644 index 000000000000..2d007790d241 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/Dir.mk @@ -0,0 +1,21 @@ +# Makefile fragment - requires GNU make +# +# Copyright (c) 2022, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +# These targets are defined if we prescribe pl in SUBS. +# It requires PLSUBS to be set. + +$(foreach sub,$(PLSUBS),$(eval include $(srcdir)/pl/$(sub)/Dir.mk)) + +pl-files := $($(PLSUBS:%=pl/%-files)) + +all-pl: $(PLSUBS:%=all-pl/%) + +check-pl: $(PLSUBS:%=check-pl/%) + +install-pl: $(PLSUBS:%=install-pl/%) + +clean-pl: $(PLSUBS:%=clean-pl/%) + +.PHONY: all-pl check-pl install-pl clean-pl diff --git a/contrib/arm-optimized-routines/pl/README.contributors b/contrib/arm-optimized-routines/pl/README.contributors new file mode 100644 index 000000000000..3af9b1fc7741 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/README.contributors @@ -0,0 +1,23 @@ +Code in this sub-directory should follow the GNU Coding Standard, but it is +not expected to be upstreamed into glibc without modification, so +glibc-specific conventions need not be followed. + +The requirements for portable code apply to non-portable code with the +following differences: + + +1. Worst-case ULP error should be encoded in filenames (e.g. sin_u35.c). There + are no specific restrictions on acceptable ULP error, but if functions + provide significantly less accuracy than portable equivalents then a clear + justification for inclusion should be stated in comments at the top of the + source file. Error bounds of the approximation should be clearly documented + in comments. + +2. Functions are assumed to support round-to-nearest mode by default, unless + stated; other rounding modes are not required to be provided. + +3. Handling of special cases may be relaxed for vector functions. Checking + whether each vector lane contains special values such as NaN, Inf or + denormal numbers can prove too costly for vector functions. This is often + not required since vector functions are typically used along with aggressive + compiler optimization flags. diff --git a/contrib/arm-optimized-routines/pl/math/Dir.mk b/contrib/arm-optimized-routines/pl/math/Dir.mk new file mode 100644 index 000000000000..94b26cf3309c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/Dir.mk @@ -0,0 +1,216 @@ +# Makefile fragment - requires GNU make +# +# Copyright (c) 2019-2024, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +PLM := $(srcdir)/pl/math +AOR := $(srcdir)/math +B := build/pl/math + +pl-lib-srcs := $(wildcard $(PLM)/*.[cS]) + +ifeq ($(WANT_SVE_MATH), 0) +pl-lib-srcs := $(filter-out $(PLM)/sv_%, $(pl-lib-srcs)) +endif + +math-test-srcs := \ + $(AOR)/test/mathtest.c \ + $(AOR)/test/mathbench.c \ + $(AOR)/test/ulp.c \ + +math-test-host-srcs := $(wildcard $(AOR)/test/rtest/*.[cS]) + +pl-includes := $(patsubst $(PLM)/%,build/pl/%,$(wildcard $(PLM)/include/*.h)) +pl-test-includes := $(patsubst $(PLM)/%,build/pl/include/%,$(wildcard $(PLM)/test/*.h)) + +pl-libs := \ + build/pl/lib/libmathlib.so \ + build/pl/lib/libmathlib.a \ + +math-tools := \ + build/pl/bin/mathtest \ + build/pl/bin/mathbench \ + build/pl/bin/mathbench_libc \ + build/pl/bin/runulp.sh \ + build/pl/bin/ulp \ + +math-host-tools := \ + build/pl/bin/rtest \ + +pl-lib-objs := $(patsubst $(PLM)/%,$(B)/%.o,$(basename $(pl-lib-srcs))) +math-test-objs := $(patsubst $(AOR)/%,$(B)/%.o,$(basename $(math-test-srcs))) +math-host-objs := $(patsubst $(AOR)/%,$(B)/%.o,$(basename $(math-test-host-srcs))) +pl-target-objs := $(pl-lib-objs) $(math-test-objs) +pl-objs := $(pl-target-objs) $(pl-target-objs:%.o=%.os) $(math-host-objs) + +pl/math-files := \ + $(pl-objs) \ + $(pl-libs) \ + $(math-tools) \ + $(math-host-tools) \ + $(pl-includes) \ + $(pl-test-includes) \ + +all-pl/math: $(pl-libs) $(math-tools) $(pl-includes) $(pl-test-includes) + +$(pl-objs): $(pl-includes) $(pl-test-includes) +$(pl-objs): CFLAGS_PL += $(math-cflags) +$(B)/test/mathtest.o: CFLAGS_PL += -fmath-errno +$(math-host-objs): CC = $(HOST_CC) +$(math-host-objs): CFLAGS_PL = $(HOST_CFLAGS) + +$(B)/sv_%: CFLAGS_PL += $(math-sve-cflags) + +build/pl/include/test/ulp_funcs_gen.h: $(pl-lib-srcs) + # Replace PL_SIG + cat $^ | grep PL_SIG | $(CC) -xc - -o - -E "-DPL_SIG(v, t, a, f, ...)=_Z##v##t##a(f)" -P > $@ + +build/pl/include/test/mathbench_funcs_gen.h: $(pl-lib-srcs) + # Replace PL_SIG macros with mathbench func entries + cat $^ | grep PL_SIG | $(CC) -xc - -o - -E "-DPL_SIG(v, t, a, f, ...)=_Z##v##t##a(f, ##__VA_ARGS__)" -P > $@ + +build/pl/include/test/ulp_wrappers_gen.h: $(pl-lib-srcs) + # Replace PL_SIG macros with ULP wrapper declarations + cat $^ | grep PL_SIG | $(CC) -xc - -o - -E "-DPL_SIG(v, t, a, f, ...)=Z##v##N##t##a##_WRAP(f)" -P > $@ + +$(B)/test/ulp.o: $(AOR)/test/ulp.h build/pl/include/test/ulp_funcs_gen.h build/pl/include/test/ulp_wrappers_gen.h +$(B)/test/ulp.o: CFLAGS_PL += -I build/pl/include/test + +$(B)/test/mathbench.o: build/pl/include/test/mathbench_funcs_gen.h +$(B)/test/mathbench.o: CFLAGS_PL += -I build/pl/include/test + +build/pl/lib/libmathlib.so: $(pl-lib-objs:%.o=%.os) + $(CC) $(CFLAGS_PL) $(LDFLAGS) -shared -o $@ $^ + +build/pl/lib/libmathlib.a: $(pl-lib-objs) + rm -f $@ + $(AR) rc $@ $^ + $(RANLIB) $@ + +$(math-host-tools): HOST_LDLIBS += -lm -lmpfr -lmpc +$(math-tools): LDLIBS += $(math-ldlibs) -lm +# math-sve-cflags should be empty if WANT_SVE_MATH is not enabled +$(math-tools): CFLAGS_PL += $(math-sve-cflags) + +# Some targets to build pl/math/test from math/test sources +build/pl/math/test/%.o: $(srcdir)/math/test/%.S + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/math/test/%.o: $(srcdir)/math/test/%.c + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/math/test/%.os: $(srcdir)/math/test/%.S + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/math/test/%.os: $(srcdir)/math/test/%.c + $(CC) $(CFLAGS_PL) -c -o $@ $< + +# Some targets to build pl/ sources using appropriate flags +build/pl/%.o: $(srcdir)/pl/%.S + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/%.o: $(srcdir)/pl/%.c + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/%.os: $(srcdir)/pl/%.S + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/%.os: $(srcdir)/pl/%.c + $(CC) $(CFLAGS_PL) -c -o $@ $< + +build/pl/bin/rtest: $(math-host-objs) + $(HOST_CC) $(HOST_CFLAGS) $(HOST_LDFLAGS) -o $@ $^ $(HOST_LDLIBS) + +build/pl/bin/mathtest: $(B)/test/mathtest.o build/pl/lib/libmathlib.a + $(CC) $(CFLAGS_PL) $(LDFLAGS) -static -o $@ $^ $(LDLIBS) + +build/pl/bin/mathbench: $(B)/test/mathbench.o build/pl/lib/libmathlib.a + $(CC) $(CFLAGS_PL) $(LDFLAGS) -static -o $@ $^ $(LDLIBS) + +# This is not ideal, but allows custom symbols in mathbench to get resolved. +build/pl/bin/mathbench_libc: $(B)/test/mathbench.o build/pl/lib/libmathlib.a + $(CC) $(CFLAGS_PL) $(LDFLAGS) -static -o $@ $< $(LDLIBS) -lc build/pl/lib/libmathlib.a -lm + +build/pl/bin/ulp: $(B)/test/ulp.o build/pl/lib/libmathlib.a + $(CC) $(CFLAGS_PL) $(LDFLAGS) -static -o $@ $^ $(LDLIBS) + +build/pl/include/%.h: $(PLM)/include/%.h + cp $< $@ + +build/pl/include/test/%.h: $(PLM)/test/%.h + cp $< $@ + +build/pl/bin/%.sh: $(PLM)/test/%.sh + cp $< $@ + +pl-math-tests := $(wildcard $(PLM)/test/testcases/directed/*.tst) +pl-math-rtests := $(wildcard $(PLM)/test/testcases/random/*.tst) + +check-pl/math-test: $(math-tools) + cat $(pl-math-tests) | $(EMULATOR) build/pl/bin/mathtest $(math-testflags) + +check-pl/math-rtest: $(math-host-tools) $(math-tools) + cat $(pl-math-rtests) | build/pl/bin/rtest | $(EMULATOR) build/pl/bin/mathtest $(math-testflags) + +ulp-input-dir=$(B)/test/inputs + +math-lib-lims = $(patsubst $(PLM)/%,$(ulp-input-dir)/%.ulp,$(basename $(pl-lib-srcs))) +math-lib-fenvs = $(patsubst $(PLM)/%,$(ulp-input-dir)/%.fenv,$(basename $(pl-lib-srcs))) +math-lib-itvs = $(patsubst $(PLM)/%,$(ulp-input-dir)/%.itv,$(basename $(pl-lib-srcs))) + +ulp-inputs = $(math-lib-lims) $(math-lib-fenvs) $(math-lib-itvs) + +$(ulp-inputs): CFLAGS_PL += -I$(PLM) -I$(PLM)/include $(math-cflags) + +$(ulp-input-dir)/%.ulp: $(PLM)/%.c + mkdir -p $(@D) + $(CC) -I$(PLM)/test $(CFLAGS_PL) $< -o - -E | { grep -o "PL_TEST_ULP [^ ]* [^ ]*" || true; } > $@ + +$(ulp-input-dir)/%.fenv: $(PLM)/%.c + mkdir -p $(@D) + $(CC) -I$(PLM)/test $(CFLAGS_PL) $< -o - -E | { grep -o "PL_TEST_EXPECT_FENV_ENABLED [^ ]*" || true; } > $@ + +$(ulp-input-dir)/%.itv: $(PLM)/%.c + mkdir -p $(dir $@) + $(CC) -I$(PLM)/test $(CFLAGS_PL) $< -o - -E | { grep "PL_TEST_INTERVAL " || true; } | sed "s/ PL_TEST_INTERVAL/\nPL_TEST_INTERVAL/g" > $@ + +ulp-lims := $(ulp-input-dir)/limits +$(ulp-lims): $(math-lib-lims) + cat $^ | sed "s/PL_TEST_ULP //g;s/^ *//g" > $@ + +fenv-exps := $(ulp-input-dir)/fenv +$(fenv-exps): $(math-lib-fenvs) + cat $^ | sed "s/PL_TEST_EXPECT_FENV_ENABLED //g;s/^ *//g" > $@ + +ulp-itvs := $(ulp-input-dir)/intervals +$(ulp-itvs): $(math-lib-itvs) + cat $^ | sort -u | sed "s/PL_TEST_INTERVAL //g" > $@ + +check-pl/math-ulp: $(math-tools) $(ulp-lims) $(fenv-exps) $(ulp-itvs) + WANT_SVE_MATH=$(WANT_SVE_MATH) \ + ULPFLAGS="$(math-ulpflags)" \ + LIMITS=../../../$(ulp-lims) \ + INTERVALS=../../../$(ulp-itvs) \ + FENV=../../../$(fenv-exps) \ + FUNC=$(func) \ + build/pl/bin/runulp.sh $(EMULATOR) + +check-pl/math: check-pl/math-test check-pl/math-rtest check-pl/math-ulp + +$(DESTDIR)$(libdir)/pl/%.so: build/pl/lib/%.so + $(INSTALL) -D $< $@ + +$(DESTDIR)$(libdir)/pl/%: build/pl/lib/% + $(INSTALL) -m 644 -D $< $@ + +$(DESTDIR)$(includedir)/pl/%: build/pl/include/% + $(INSTALL) -m 644 -D $< $@ + +install-pl/math: \ + $(pl-libs:build/pl/lib/%=$(DESTDIR)$(libdir)/pl/%) \ + $(pl-includes:build/pl/include/%=$(DESTDIR)$(includedir)/pl/%) + +clean-pl/math: + rm -f $(pl/math-files) + +.PHONY: all-pl/math check-pl/math-test check-pl/math-rtest check-pl/math-ulp check-pl/math install-pl/math clean-pl/math diff --git a/contrib/arm-optimized-routines/pl/math/acos_2u.c b/contrib/arm-optimized-routines/pl/math/acos_2u.c new file mode 100644 index 000000000000..9ec6894f1d81 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/acos_2u.c @@ -0,0 +1,100 @@ +/* + * Double-precision acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "poly_scalar_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask (0x7fffffffffffffff) +#define Half (0x3fe0000000000000) +#define One (0x3ff0000000000000) +#define PiOver2 (0x1.921fb54442d18p+0) +#define Pi (0x1.921fb54442d18p+1) +#define Small (0x3c90000000000000) /* 2^-53. */ +#define Small16 (0x3c90) +#define QNaN (0x7ff8) + +/* Fast implementation of double-precision acos(x) based on polynomial + approximation of double-precision asin(x). + + For x < Small, approximate acos(x) by pi/2 - x. Small = 2^-53 for correct + rounding. + + For |x| in [Small, 0.5], use the trigonometric identity + + acos(x) = pi/2 - asin(x) + + and use an order 11 polynomial P such that the final approximation of asin is + an odd polynomial: asin(x) ~ x + x^3 * P(x^2). + + The largest observed error in this region is 1.18 ulps, + acos(0x1.fbab0a7c460f6p-2) got 0x1.0d54d1985c068p+0 + want 0x1.0d54d1985c069p+0. + + For |x| in [0.5, 1.0], use the following development of acos(x) near x = 1 + + acos(x) ~ pi/2 - 2 * sqrt(z) (1 + z * P(z)) + + where z = (1-x)/2, z is near 0 when x approaches 1, and P contributes to the + approximation of asin near 0. + + The largest observed error in this region is 1.52 ulps, + acos(0x1.23d362722f591p-1) got 0x1.edbbedf8a7d6ep-1 + want 0x1.edbbedf8a7d6cp-1. + + For x in [-1.0, -0.5], use this other identity to deduce the negative inputs + from their absolute value: acos(x) = pi - acos(-x). */ +double +acos (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & AbsMask; + uint64_t ia16 = ia >> 48; + double ax = asdouble (ia); + uint64_t sign = ix & ~AbsMask; + + /* Special values and invalid range. */ + if (unlikely (ia16 == QNaN)) + return x; + if (ia > One) + return __math_invalid (x); + if (ia16 < Small16) + return PiOver2 - x; + + /* Evaluate polynomial Q(|x|) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + double z2 = ax < 0.5 ? x * x : fma (-0.5, ax, 0.5); + double z = ax < 0.5 ? ax : sqrt (z2); + + /* Use a single polynomial approximation P for both intervals. */ + double z4 = z2 * z2; + double z8 = z4 * z4; + double z16 = z8 * z8; + double p = estrin_11_f64 (z2, z4, z8, z16, __asin_poly); + + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = fma (z * z2, p, z); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = pi - 2 Q(|x|), for -1.0 < x <= -0.5 + = 2 Q(|x|) , for -0.5 < x < 0.0. */ + if (ax < 0.5) + return PiOver2 - asdouble (asuint64 (p) | sign); + + return (x <= -0.5) ? fma (-2.0, p, Pi) : 2.0 * p; +} + +PL_SIG (S, D, 1, acos, -1.0, 1.0) +PL_TEST_ULP (acos, 1.02) +PL_TEST_INTERVAL (acos, 0, Small, 5000) +PL_TEST_INTERVAL (acos, Small, 0.5, 50000) +PL_TEST_INTERVAL (acos, 0.5, 1.0, 50000) +PL_TEST_INTERVAL (acos, 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (acos, 0x1p11, inf, 20000) +PL_TEST_INTERVAL (acos, -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/acosf_1u4.c b/contrib/arm-optimized-routines/pl/math/acosf_1u4.c new file mode 100644 index 000000000000..6dde422ef85a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/acosf_1u4.c @@ -0,0 +1,99 @@ +/* + * Single-precision acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask (0x7fffffff) +#define Half (0x3f000000) +#define One (0x3f800000) +#define PiOver2f (0x1.921fb6p+0f) +#define Pif (0x1.921fb6p+1f) +#define Small (0x32800000) /* 2^-26. */ +#define Small12 (0x328) +#define QNaN (0x7fc) + +/* Fast implementation of single-precision acos(x) based on polynomial + approximation of single-precision asin(x). + + For x < Small, approximate acos(x) by pi/2 - x. Small = 2^-26 for correct + rounding. + + For |x| in [Small, 0.5], use the trigonometric identity + + acos(x) = pi/2 - asin(x) + + and use an order 4 polynomial P such that the final approximation of asin is + an odd polynomial: asin(x) ~ x + x^3 * P(x^2). + + The largest observed error in this region is 1.16 ulps, + acosf(0x1.ffbeccp-2) got 0x1.0c27f8p+0 want 0x1.0c27f6p+0. + + For |x| in [0.5, 1.0], use the following development of acos(x) near x = 1 + + acos(x) ~ pi/2 - 2 * sqrt(z) (1 + z * P(z)) + + where z = (1-x)/2, z is near 0 when x approaches 1, and P contributes to the + approximation of asin near 0. + + The largest observed error in this region is 1.32 ulps, + acosf(0x1.15ba56p-1) got 0x1.feb33p-1 want 0x1.feb32ep-1. + + For x in [-1.0, -0.5], use this other identity to deduce the negative inputs + from their absolute value. + + acos(x) = pi - acos(-x) + + The largest observed error in this region is 1.28 ulps, + acosf(-0x1.002072p-1) got 0x1.0c1e84p+1 want 0x1.0c1e82p+1. */ +float +acosf (float x) +{ + uint32_t ix = asuint (x); + uint32_t ia = ix & AbsMask; + uint32_t ia12 = ia >> 20; + float ax = asfloat (ia); + uint32_t sign = ix & ~AbsMask; + + /* Special values and invalid range. */ + if (unlikely (ia12 == QNaN)) + return x; + if (ia > One) + return __math_invalidf (x); + if (ia12 < Small12) + return PiOver2f - x; + + /* Evaluate polynomial Q(|x|) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + float z2 = ax < 0.5 ? x * x : fmaf (-0.5f, ax, 0.5f); + float z = ax < 0.5 ? ax : sqrtf (z2); + + /* Use a single polynomial approximation P for both intervals. */ + float p = horner_4_f32 (z2, __asinf_poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = fmaf (z * z2, p, z); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = pi - 2 Q(|x|), for -1.0 < x <= -0.5 + = 2 Q(|x|) , for -0.5 < x < 0.0. */ + if (ax < 0.5) + return PiOver2f - asfloat (asuint (p) | sign); + + return (x <= -0.5) ? fmaf (-2.0f, p, Pif) : 2.0f * p; +} + +PL_SIG (S, F, 1, acos, -1.0, 1.0) +PL_TEST_ULP (acosf, 0.82) +PL_TEST_INTERVAL (acosf, 0, Small, 5000) +PL_TEST_INTERVAL (acosf, Small, 0.5, 50000) +PL_TEST_INTERVAL (acosf, 0.5, 1.0, 50000) +PL_TEST_INTERVAL (acosf, 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (acosf, 0x1p11, inf, 20000) +PL_TEST_INTERVAL (acosf, -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/acosh_3u.c b/contrib/arm-optimized-routines/pl/math/acosh_3u.c new file mode 100644 index 000000000000..4e2cb6737ba8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/acosh_3u.c @@ -0,0 +1,66 @@ +/* + * Double-precision acosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Ln2 (0x1.62e42fefa39efp-1) +#define MinusZero (0x8000000000000000) +#define SquareLim (0x5fe0000000000000) /* asuint64(0x1.0p511). */ +#define Two (0x4000000000000000) /* asuint64(2.0). */ + +double +optr_aor_log_f64 (double); + +double +log1p (double); + +/* acosh approximation using a variety of approaches on different intervals: + + acosh(x) = ln(x + sqrt(x * x - 1)). + + x >= 2^511: We cannot square x without overflow. For huge x, sqrt(x*x - 1) is + close enough to x that we can calculate the result by ln(2x) == ln(x) + + ln(2). The greatest observed error in this region is 0.98 ULP: + acosh(0x1.1b9bf42923d1dp+853) got 0x1.28066a11a7c7fp+9 + want 0x1.28066a11a7c8p+9. + + x > 2: Calculate the result directly using definition of acosh(x). Greatest + observed error in this region is 1.33 ULP: + acosh(0x1.1e45d14bfcfa2p+1) got 0x1.71a06f50c34b5p+0 + want 0x1.71a06f50c34b6p+0. + + 0 <= x <= 2: Calculate the result using log1p. For x < 1, acosh(x) is + undefined. For 1 <= x <= 2, the largest observed error is 2.69 ULP: + acosh(0x1.073528248093p+0) got 0x1.e4d9bd20684f3p-3 + want 0x1.e4d9bd20684f6p-3. */ +double +acosh (double x) +{ + uint64_t ix = asuint64 (x); + + if (unlikely (ix >= MinusZero)) + return __math_invalid (x); + + if (unlikely (ix >= SquareLim)) + return optr_aor_log_f64 (x) + Ln2; + + if (ix >= Two) + return optr_aor_log_f64 (x + sqrt (x * x - 1)); + + double xm1 = x - 1; + return log1p (xm1 + sqrt (2 * xm1 + xm1 * xm1)); +} + +PL_SIG (S, D, 1, acosh, 1.0, 10.0) +PL_TEST_ULP (acosh, 2.19) +PL_TEST_INTERVAL (acosh, 0, 1, 10000) +PL_TEST_INTERVAL (acosh, 1, 2, 100000) +PL_TEST_INTERVAL (acosh, 2, 0x1p511, 100000) +PL_TEST_INTERVAL (acosh, 0x1p511, inf, 100000) +PL_TEST_INTERVAL (acosh, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/acoshf_2u8.c b/contrib/arm-optimized-routines/pl/math/acoshf_2u8.c new file mode 100644 index 000000000000..c9cded7fd2ff --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/acoshf_2u8.c @@ -0,0 +1,63 @@ +/* + * Single-precision acosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Ln2 (0x1.62e4p-1f) +#define MinusZero 0x80000000 +#define SquareLim 0x5f800000 /* asuint(0x1p64). */ +#define Two 0x40000000 + +/* Single-precision log from math/. */ +float +optr_aor_log_f32 (float); + +/* Single-precision log(1+x) from pl/math. */ +float +log1pf (float); + +/* acoshf approximation using a variety of approaches on different intervals: + + x >= 2^64: We cannot square x without overflow. For huge x, sqrt(x*x - 1) is + close enough to x that we can calculate the result by ln(2x) == ln(x) + + ln(2). The greatest error in the region is 0.94 ULP: + acoshf(0x1.15f706p+92) got 0x1.022e14p+6 want 0x1.022e16p+6. + + x > 2: Calculate the result directly using definition of asinh(x) = ln(x + + sqrt(x*x - 1)). Greatest error in this region is 1.30 ULP: + acoshf(0x1.249d8p+1) got 0x1.77e1aep+0 want 0x1.77e1bp+0. + + 0 <= x <= 2: Calculate the result using log1p. For x < 1, acosh(x) is + undefined. For 1 <= x <= 2, the greatest error is 2.78 ULP: + acoshf(0x1.07887p+0) got 0x1.ef9e9cp-3 want 0x1.ef9ea2p-3. */ +float +acoshf (float x) +{ + uint32_t ix = asuint (x); + + if (unlikely (ix >= MinusZero)) + return __math_invalidf (x); + + if (unlikely (ix >= SquareLim)) + return optr_aor_log_f32 (x) + Ln2; + + if (ix > Two) + return optr_aor_log_f32 (x + sqrtf (x * x - 1)); + + float xm1 = x - 1; + return log1pf (xm1 + sqrtf (2 * xm1 + xm1 * xm1)); +} + +PL_SIG (S, F, 1, acosh, 1.0, 10.0) +PL_TEST_ULP (acoshf, 2.30) +PL_TEST_INTERVAL (acoshf, 0, 1, 100) +PL_TEST_INTERVAL (acoshf, 1, 2, 10000) +PL_TEST_INTERVAL (acoshf, 2, 0x1p64, 100000) +PL_TEST_INTERVAL (acoshf, 0x1p64, inf, 100000) +PL_TEST_INTERVAL (acoshf, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/asin_3u.c b/contrib/arm-optimized-routines/pl/math/asin_3u.c new file mode 100644 index 000000000000..0b50995449ce --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asin_3u.c @@ -0,0 +1,106 @@ +/* + * Double-precision asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f64.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask (0x7fffffffffffffff) +#define Half (0x3fe0000000000000) +#define One (0x3ff0000000000000) +#define PiOver2 (0x1.921fb54442d18p+0) +#define Small (0x3e50000000000000) /* 2^-26. */ +#define Small16 (0x3e50) +#define QNaN (0x7ff8) + +/* Fast implementation of double-precision asin(x) based on polynomial + approximation. + + For x < Small, approximate asin(x) by x. Small = 2^-26 for correct rounding. + + For x in [Small, 0.5], use an order 11 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 1.01 ulps, + asin(0x1.da9735b5a9277p-2) got 0x1.ed78525a927efp-2 + want 0x1.ed78525a927eep-2. + + No cheap approximation can be obtained near x = 1, since the function is not + continuously differentiable on 1. + + For x in [0.5, 1.0], we use a method based on a trigonometric identity + + asin(x) = pi/2 - acos(x) + + and a generalized power series expansion of acos(y) near y=1, that reads as + + acos(y)/sqrt(2y) ~ 1 + 1/12 * y + 3/160 * y^2 + ... (1) + + The Taylor series of asin(z) near z = 0, reads as + + asin(z) ~ z + z^3 P(z^2) = z + z^3 * (1/6 + 3/40 z^2 + ...). + + Therefore, (1) can be written in terms of P(y/2) or even asin(y/2) + + acos(y) ~ sqrt(2y) (1 + y/2 * P(y/2)) = 2 * sqrt(y/2) (1 + y/2 * P(y/2) + + Hence, if we write z = (1-x)/2, z is near 0 when x approaches 1 and + + asin(x) ~ pi/2 - acos(x) ~ pi/2 - 2 * sqrt(z) (1 + z * P(z)). + + The largest observed error in this region is 2.69 ulps, + asin(0x1.044ac9819f573p-1) got 0x1.110d7e85fdd5p-1 + want 0x1.110d7e85fdd53p-1. */ +double +asin (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & AbsMask; + uint64_t ia16 = ia >> 48; + double ax = asdouble (ia); + uint64_t sign = ix & ~AbsMask; + + /* Special values and invalid range. */ + if (unlikely (ia16 == QNaN)) + return x; + if (ia > One) + return __math_invalid (x); + if (ia16 < Small16) + return x; + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + double z2 = ax < 0.5 ? x * x : fma (-0.5, ax, 0.5); + double z = ax < 0.5 ? ax : sqrt (z2); + + /* Use a single polynomial approximation P for both intervals. */ + double z4 = z2 * z2; + double z8 = z4 * z4; + double z16 = z8 * z8; + double p = estrin_11_f64 (z2, z4, z8, z16, __asin_poly); + + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = fma (z * z2, p, z); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + double y = ax < 0.5 ? p : fma (-2.0, p, PiOver2); + + /* Copy sign. */ + return asdouble (asuint64 (y) | sign); +} + +PL_SIG (S, D, 1, asin, -1.0, 1.0) +PL_TEST_ULP (asin, 2.19) +PL_TEST_INTERVAL (asin, 0, Small, 5000) +PL_TEST_INTERVAL (asin, Small, 0.5, 50000) +PL_TEST_INTERVAL (asin, 0.5, 1.0, 50000) +PL_TEST_INTERVAL (asin, 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (asin, 0x1p11, inf, 20000) +PL_TEST_INTERVAL (asin, -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/asin_data.c b/contrib/arm-optimized-routines/pl/math/asin_data.c new file mode 100644 index 000000000000..b5517731c7f4 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asin_data.c @@ -0,0 +1,19 @@ +/* + * Coefficients for single-precision asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Approximate asin(x) directly in [0x1p-106, 0.25]. See tools/asin.sollya + for these coeffcients were generated. */ +const double __asin_poly[] = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) + on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57. */ + 0x1.555555555554ep-3, 0x1.3333333337233p-4, 0x1.6db6db67f6d9fp-5, + 0x1.f1c71fbd29fbbp-6, 0x1.6e8b264d467d6p-6, 0x1.1c5997c357e9dp-6, + 0x1.c86a22cd9389dp-7, 0x1.856073c22ebbep-7, 0x1.fd1151acb6bedp-8, + 0x1.087182f799c1dp-6, -0x1.6602748120927p-7, 0x1.cfa0dd1f9478p-6, +}; diff --git a/contrib/arm-optimized-routines/pl/math/asinf_2u5.c b/contrib/arm-optimized-routines/pl/math/asinf_2u5.c new file mode 100644 index 000000000000..ec608146ff66 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinf_2u5.c @@ -0,0 +1,100 @@ +/* + * Single-precision asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask (0x7fffffff) +#define Half (0x3f000000) +#define One (0x3f800000) +#define PiOver2f (0x1.921fb6p+0f) +#define Small (0x39800000) /* 2^-12. */ +#define Small12 (0x398) +#define QNaN (0x7fc) + +/* Fast implementation of single-precision asin(x) based on polynomial + approximation. + + For x < Small, approximate asin(x) by x. Small = 2^-12 for correct rounding. + + For x in [Small, 0.5], use order 4 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 0.83 ulps, + asinf(0x1.ea00f4p-2) got 0x1.fef15ep-2 want 0x1.fef15cp-2. + + No cheap approximation can be obtained near x = 1, since the function is not + continuously differentiable on 1. + + For x in [0.5, 1.0], we use a method based on a trigonometric identity + + asin(x) = pi/2 - acos(x) + + and a generalized power series expansion of acos(y) near y=1, that reads as + + acos(y)/sqrt(2y) ~ 1 + 1/12 * y + 3/160 * y^2 + ... (1) + + The Taylor series of asin(z) near z = 0, reads as + + asin(z) ~ z + z^3 P(z^2) = z + z^3 * (1/6 + 3/40 z^2 + ...). + + Therefore, (1) can be written in terms of P(y/2) or even asin(y/2) + + acos(y) ~ sqrt(2y) (1 + y/2 * P(y/2)) = 2 * sqrt(y/2) (1 + y/2 * P(y/2) + + Hence, if we write z = (1-x)/2, z is near 0 when x approaches 1 and + + asin(x) ~ pi/2 - acos(x) ~ pi/2 - 2 * sqrt(z) (1 + z * P(z)). + + The largest observed error in this region is 2.41 ulps, + asinf(0x1.00203ep-1) got 0x1.0c3a64p-1 want 0x1.0c3a6p-1. */ +float +asinf (float x) +{ + uint32_t ix = asuint (x); + uint32_t ia = ix & AbsMask; + uint32_t ia12 = ia >> 20; + float ax = asfloat (ia); + uint32_t sign = ix & ~AbsMask; + + /* Special values and invalid range. */ + if (unlikely (ia12 == QNaN)) + return x; + if (ia > One) + return __math_invalidf (x); + if (ia12 < Small12) + return x; + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + float z2 = ax < 0.5 ? x * x : fmaf (-0.5f, ax, 0.5f); + float z = ax < 0.5 ? ax : sqrtf (z2); + + /* Use a single polynomial approximation P for both intervals. */ + float p = horner_4_f32 (z2, __asinf_poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = fmaf (z * z2, p, z); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + float y = ax < 0.5 ? p : fmaf (-2.0f, p, PiOver2f); + + /* Copy sign. */ + return asfloat (asuint (y) | sign); +} + +PL_SIG (S, F, 1, asin, -1.0, 1.0) +PL_TEST_ULP (asinf, 1.91) +PL_TEST_INTERVAL (asinf, 0, Small, 5000) +PL_TEST_INTERVAL (asinf, Small, 0.5, 50000) +PL_TEST_INTERVAL (asinf, 0.5, 1.0, 50000) +PL_TEST_INTERVAL (asinf, 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (asinf, 0x1p11, inf, 20000) +PL_TEST_INTERVAL (asinf, -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/asinf_data.c b/contrib/arm-optimized-routines/pl/math/asinf_data.c new file mode 100644 index 000000000000..1652025e2920 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinf_data.c @@ -0,0 +1,16 @@ +/* + * Coefficients for single-precision asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Approximate asinf(x) directly in [0x1p-24, 0.25]. See for tools/asinf.sollya + for these coeffs were generated. */ +const float __asinf_poly[] = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on + [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */ + 0x1.55555ep-3, 0x1.33261ap-4, 0x1.70d7dcp-5, 0x1.b059dp-6, 0x1.3af7d8p-5, +}; diff --git a/contrib/arm-optimized-routines/pl/math/asinh_2u5.c b/contrib/arm-optimized-routines/pl/math/asinh_2u5.c new file mode 100644 index 000000000000..b7fc81a2b94f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinh_2u5.c @@ -0,0 +1,85 @@ +/* + * Double-precision asinh(x) function + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "poly_scalar_f64.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffffffffffff +#define ExpM26 0x3e50000000000000 /* asuint64(0x1.0p-26). */ +#define One 0x3ff0000000000000 /* asuint64(1.0). */ +#define Exp511 0x5fe0000000000000 /* asuint64(0x1.0p511). */ +#define Ln2 0x1.62e42fefa39efp-1 + +double +optr_aor_log_f64 (double); + +/* Scalar double-precision asinh implementation. This routine uses different + approaches on different intervals: + + |x| < 2^-26: Return x. Function is exact in this region. + + |x| < 1: Use custom order-17 polynomial. This is least accurate close to 1. + The largest observed error in this region is 1.47 ULPs: + asinh(0x1.fdfcd00cc1e6ap-1) got 0x1.c1d6bf874019bp-1 + want 0x1.c1d6bf874019cp-1. + + |x| < 2^511: Upper bound of this region is close to sqrt(DBL_MAX). Calculate + the result directly using the definition asinh(x) = ln(x + sqrt(x*x + 1)). + The largest observed error in this region is 2.03 ULPs: + asinh(-0x1.00094e0f39574p+0) got -0x1.c3508eb6a681ep-1 + want -0x1.c3508eb6a682p-1. + + |x| >= 2^511: We cannot square x without overflow at a low + cost. At very large x, asinh(x) ~= ln(2x). At huge x we cannot + even double x without overflow, so calculate this as ln(x) + + ln(2). The largest observed error in this region is 0.98 ULPs at many + values, for instance: + asinh(0x1.5255a4cf10319p+975) got 0x1.52652f4cb26cbp+9 + want 0x1.52652f4cb26ccp+9. */ +double +asinh (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & AbsMask; + double ax = asdouble (ia); + uint64_t sign = ix & ~AbsMask; + + if (ia < ExpM26) + { + return x; + } + + if (ia < One) + { + double x2 = x * x; + double z2 = x2 * x2; + double z4 = z2 * z2; + double z8 = z4 * z4; + double p = estrin_17_f64 (x2, z2, z4, z8, z8 * z8, __asinh_data.poly); + double y = fma (p, x2 * ax, ax); + return asdouble (asuint64 (y) | sign); + } + + if (unlikely (ia >= Exp511)) + { + return asdouble (asuint64 (optr_aor_log_f64 (ax) + Ln2) | sign); + } + + return asdouble (asuint64 (optr_aor_log_f64 (ax + sqrt (ax * ax + 1))) + | sign); +} + +PL_SIG (S, D, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (asinh, 1.54) +PL_TEST_INTERVAL (asinh, -0x1p-26, 0x1p-26, 50000) +PL_TEST_INTERVAL (asinh, 0x1p-26, 1.0, 40000) +PL_TEST_INTERVAL (asinh, -0x1p-26, -1.0, 10000) +PL_TEST_INTERVAL (asinh, 1.0, 100.0, 40000) +PL_TEST_INTERVAL (asinh, -1.0, -100.0, 10000) +PL_TEST_INTERVAL (asinh, 100.0, inf, 50000) +PL_TEST_INTERVAL (asinh, -100.0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/asinh_data.c b/contrib/arm-optimized-routines/pl/math/asinh_data.c new file mode 100644 index 000000000000..073b19799bda --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinh_data.c @@ -0,0 +1,22 @@ +/* + * Double-precision polynomial coefficients for scalar asinh(x) + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* asinh(x) is odd, and the first term of the Taylor expansion is x, so we can + approximate the function by x + x^3 * P(x^2), where P(z) has the form: + C0 + C1 * z + C2 * z^2 + C3 * z^3 + ... + Note P is evaluated on even powers of x only. See tools/asinh.sollya for the + algorithm used to generate these coefficients. */ +const struct asinh_data __asinh_data + = {.poly + = {-0x1.55555555554a7p-3, 0x1.3333333326c7p-4, -0x1.6db6db68332e6p-5, + 0x1.f1c71b26fb40dp-6, -0x1.6e8b8b654a621p-6, 0x1.1c4daa9e67871p-6, + -0x1.c9871d10885afp-7, 0x1.7a16e8d9d2ecfp-7, -0x1.3ddca533e9f54p-7, + 0x1.0becef748dafcp-7, -0x1.b90c7099dd397p-8, 0x1.541f2bb1ffe51p-8, + -0x1.d217026a669ecp-9, 0x1.0b5c7977aaf7p-9, -0x1.e0f37daef9127p-11, + 0x1.388b5fe542a6p-12, -0x1.021a48685e287p-14, 0x1.93d4ba83d34dap-18}}; diff --git a/contrib/arm-optimized-routines/pl/math/asinhf_3u5.c b/contrib/arm-optimized-routines/pl/math/asinhf_3u5.c new file mode 100644 index 000000000000..ec26b80ec2ec --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinhf_3u5.c @@ -0,0 +1,76 @@ +/* + * Single-precision asinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask (0x7fffffff) +#define SqrtFltMax (0x1.749e96p+10f) +#define Ln2 (0x1.62e4p-1f) +#define One (0x3f8) +#define ExpM12 (0x398) + +float +optr_aor_log_f32 (float); + +/* asinhf approximation using a variety of approaches on different intervals: + + |x| < 2^-12: Return x. Function is exactly rounded in this region. + + |x| < 1.0: Use custom order-8 polynomial. The largest observed + error in this region is 1.3ulps: + asinhf(0x1.f0f74cp-1) got 0x1.b88de4p-1 want 0x1.b88de2p-1. + + |x| <= SqrtFltMax: Calculate the result directly using the + definition of asinh(x) = ln(x + sqrt(x*x + 1)). The largest + observed error in this region is 1.99ulps. + asinhf(0x1.00e358p+0) got 0x1.c4849ep-1 want 0x1.c484a2p-1. + + |x| > SqrtFltMax: We cannot square x without overflow at a low + cost. At very large x, asinh(x) ~= ln(2x). At huge x we cannot + even double x without overflow, so calculate this as ln(x) + + ln(2). This largest observed error in this region is 3.39ulps. + asinhf(0x1.749e9ep+10) got 0x1.fffff8p+2 want 0x1.fffffep+2. */ +float +asinhf (float x) +{ + uint32_t ix = asuint (x); + uint32_t ia = ix & AbsMask; + uint32_t ia12 = ia >> 20; + float ax = asfloat (ia); + uint32_t sign = ix & ~AbsMask; + + if (unlikely (ia12 < ExpM12 || ia == 0x7f800000)) + return x; + + if (unlikely (ia12 >= 0x7f8)) + return __math_invalidf (x); + + if (ia12 < One) + { + float x2 = ax * ax; + float p = estrin_7_f32 (ax, x2, x2 * x2, __asinhf_data.coeffs); + float y = fmaf (x2, p, ax); + return asfloat (asuint (y) | sign); + } + + if (unlikely (ax > SqrtFltMax)) + { + return asfloat (asuint (optr_aor_log_f32 (ax) + Ln2) | sign); + } + + return asfloat (asuint (optr_aor_log_f32 (ax + sqrtf (ax * ax + 1))) | sign); +} + +PL_SIG (S, F, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (asinhf, 2.9) +PL_TEST_INTERVAL (asinhf, 0, 0x1p-12, 5000) +PL_TEST_INTERVAL (asinhf, 0x1p-12, 1.0, 50000) +PL_TEST_INTERVAL (asinhf, 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (asinhf, 0x1p11, 0x1p127, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/asinhf_data.c b/contrib/arm-optimized-routines/pl/math/asinhf_data.c new file mode 100644 index 000000000000..cd1ef16b3b6a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/asinhf_data.c @@ -0,0 +1,15 @@ +/* + * Coefficients for single-precision asinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Approximate asinhf(x) directly in [2^-12, 1]. See for tools/asinhf.sollya for + these coeffs were generated. */ +const struct asinhf_data __asinhf_data + = {.coeffs + = {-0x1.9b16fap-19f, -0x1.552baap-3f, -0x1.4e572ap-11f, 0x1.3a81dcp-4f, + 0x1.65bbaap-10f, -0x1.057f1p-4f, 0x1.6c1d46p-5f, -0x1.4cafe8p-7f}}; diff --git a/contrib/arm-optimized-routines/pl/math/atan2_2u5.c b/contrib/arm-optimized-routines/pl/math/atan2_2u5.c new file mode 100644 index 000000000000..c909ac99fa22 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atan2_2u5.c @@ -0,0 +1,159 @@ +/* + * Double-precision scalar atan2(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <stdbool.h> + +#include "atan_common.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Pi (0x1.921fb54442d18p+1) +#define PiOver2 (0x1.921fb54442d18p+0) +#define PiOver4 (0x1.921fb54442d18p-1) +#define SignMask (0x8000000000000000) +#define ExpMask (0x7ff0000000000000) + +/* We calculate atan2 by P(n/d), where n and d are similar to the input + arguments, and P is a polynomial. Evaluating P(x) requires calculating x^8, + which may underflow if n and d have very different magnitude. + POW8_EXP_UFLOW_BOUND is the lower bound of the difference in exponents of n + and d for which P underflows, and is used to special-case such inputs. */ +#define POW8_EXP_UFLOW_BOUND 62 + +static inline int64_t +biased_exponent (double f) +{ + uint64_t fi = asuint64 (f); + return (fi & ExpMask) >> 52; +} + +/* Fast implementation of scalar atan2. Largest errors are when y and x are + close together. The greatest observed error is 2.28 ULP: + atan2(-0x1.5915b1498e82fp+732, 0x1.54d11ef838826p+732) + got -0x1.954f42f1fa841p-1 want -0x1.954f42f1fa843p-1. */ +double +atan2 (double y, double x) +{ + uint64_t ix = asuint64 (x); + uint64_t iy = asuint64 (y); + + uint64_t sign_x = ix & SignMask; + uint64_t sign_y = iy & SignMask; + + uint64_t iax = ix & ~SignMask; + uint64_t iay = iy & ~SignMask; + + bool xisnan = isnan (x); + if (unlikely (isnan (y) && !xisnan)) + return __math_invalid (y); + if (unlikely (xisnan)) + return __math_invalid (x); + + /* m = 2 * sign(x) + sign(y). */ + uint32_t m = ((iy >> 63) & 1) | ((ix >> 62) & 2); + + int64_t exp_diff = biased_exponent (x) - biased_exponent (y); + + /* y = 0. */ + if (iay == 0) + { + switch (m) + { + case 0: + case 1: + return y; /* atan(+-0,+anything)=+-0. */ + case 2: + return Pi; /* atan(+0,-anything) = pi. */ + case 3: + return -Pi; /* atan(-0,-anything) =-pi. */ + } + } + /* Special case for (x, y) either on or very close to the y axis. Either x = + 0, or y is much larger than x (difference in exponents >= + POW8_EXP_UFLOW_BOUND). */ + if (unlikely (iax == 0 || exp_diff <= -POW8_EXP_UFLOW_BOUND)) + return sign_y ? -PiOver2 : PiOver2; + + /* Special case for either x is INF or (x, y) is very close to x axis and x is + negative. */ + if (unlikely (iax == 0x7ff0000000000000 + || (exp_diff >= POW8_EXP_UFLOW_BOUND && m >= 2))) + { + if (iay == 0x7ff0000000000000) + { + switch (m) + { + case 0: + return PiOver4; /* atan(+INF,+INF). */ + case 1: + return -PiOver4; /* atan(-INF,+INF). */ + case 2: + return 3.0 * PiOver4; /* atan(+INF,-INF). */ + case 3: + return -3.0 * PiOver4; /* atan(-INF,-INF). */ + } + } + else + { + switch (m) + { + case 0: + return 0.0; /* atan(+...,+INF). */ + case 1: + return -0.0; /* atan(-...,+INF). */ + case 2: + return Pi; /* atan(+...,-INF). */ + case 3: + return -Pi; /* atan(-...,-INF). */ + } + } + } + /* y is INF. */ + if (iay == 0x7ff0000000000000) + return sign_y ? -PiOver2 : PiOver2; + + uint64_t sign_xy = sign_x ^ sign_y; + + double ax = asdouble (iax); + double ay = asdouble (iay); + uint64_t pred_aygtax = (ay > ax); + + /* Set up z for call to atan. */ + double n = pred_aygtax ? -ax : ay; + double d = pred_aygtax ? ay : ax; + double z = n / d; + + double ret; + if (unlikely (m < 2 && exp_diff >= POW8_EXP_UFLOW_BOUND)) + { + /* If (x, y) is very close to x axis and x is positive, the polynomial + will underflow and evaluate to z. */ + ret = z; + } + else + { + /* Work out the correct shift. */ + double shift = sign_x ? -2.0 : 0.0; + shift = pred_aygtax ? shift + 1.0 : shift; + shift *= PiOver2; + + ret = eval_poly (z, z, shift); + } + + /* Account for the sign of x and y. */ + return asdouble (asuint64 (ret) ^ sign_xy); +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (S, D, 2, atan2) +PL_TEST_ULP (atan2, 1.78) +PL_TEST_INTERVAL (atan2, -10.0, 10.0, 50000) +PL_TEST_INTERVAL (atan2, -1.0, 1.0, 40000) +PL_TEST_INTERVAL (atan2, 0.0, 1.0, 40000) +PL_TEST_INTERVAL (atan2, 1.0, 100.0, 40000) +PL_TEST_INTERVAL (atan2, 1e6, 1e32, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/atan2f_3u.c b/contrib/arm-optimized-routines/pl/math/atan2f_3u.c new file mode 100644 index 000000000000..38e1df59c102 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atan2f_3u.c @@ -0,0 +1,167 @@ +/* + * Single-precision scalar atan2(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <stdbool.h> + +#include "atanf_common.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Pi (0x1.921fb6p+1f) +#define PiOver2 (0x1.921fb6p+0f) +#define PiOver4 (0x1.921fb6p-1f) +#define SignMask (0x80000000) + +/* We calculate atan2f by P(n/d), where n and d are similar to the input + arguments, and P is a polynomial. The polynomial may underflow. + POLY_UFLOW_BOUND is the lower bound of the difference in exponents of n and d + for which P underflows, and is used to special-case such inputs. */ +#define POLY_UFLOW_BOUND 24 + +static inline int32_t +biased_exponent (float f) +{ + uint32_t fi = asuint (f); + int32_t ex = (int32_t) ((fi & 0x7f800000) >> 23); + if (unlikely (ex == 0)) + { + /* Subnormal case - we still need to get the exponent right for subnormal + numbers as division may take us back inside the normal range. */ + return ex - __builtin_clz (fi << 9); + } + return ex; +} + +/* Fast implementation of scalar atan2f. Largest observed error is + 2.88ulps in [99.0, 101.0] x [99.0, 101.0]: + atan2f(0x1.9332d8p+6, 0x1.8cb6c4p+6) got 0x1.964646p-1 + want 0x1.964640p-1. */ +float +atan2f (float y, float x) +{ + uint32_t ix = asuint (x); + uint32_t iy = asuint (y); + + uint32_t sign_x = ix & SignMask; + uint32_t sign_y = iy & SignMask; + + uint32_t iax = ix & ~SignMask; + uint32_t iay = iy & ~SignMask; + + /* x or y is NaN. */ + if ((iax > 0x7f800000) || (iay > 0x7f800000)) + return x + y; + + /* m = 2 * sign(x) + sign(y). */ + uint32_t m = ((iy >> 31) & 1) | ((ix >> 30) & 2); + + /* The following follows glibc ieee754 implementation, except + that we do not use +-tiny shifts (non-nearest rounding mode). */ + + int32_t exp_diff = biased_exponent (x) - biased_exponent (y); + + /* Special case for (x, y) either on or very close to the x axis. Either y = + 0, or y is tiny and x is huge (difference in exponents >= + POLY_UFLOW_BOUND). In the second case, we only want to use this special + case when x is negative (i.e. quadrants 2 or 3). */ + if (unlikely (iay == 0 || (exp_diff >= POLY_UFLOW_BOUND && m >= 2))) + { + switch (m) + { + case 0: + case 1: + return y; /* atan(+-0,+anything)=+-0. */ + case 2: + return Pi; /* atan(+0,-anything) = pi. */ + case 3: + return -Pi; /* atan(-0,-anything) =-pi. */ + } + } + /* Special case for (x, y) either on or very close to the y axis. Either x = + 0, or x is tiny and y is huge (difference in exponents >= + POLY_UFLOW_BOUND). */ + if (unlikely (iax == 0 || exp_diff <= -POLY_UFLOW_BOUND)) + return sign_y ? -PiOver2 : PiOver2; + + /* x is INF. */ + if (iax == 0x7f800000) + { + if (iay == 0x7f800000) + { + switch (m) + { + case 0: + return PiOver4; /* atan(+INF,+INF). */ + case 1: + return -PiOver4; /* atan(-INF,+INF). */ + case 2: + return 3.0f * PiOver4; /* atan(+INF,-INF). */ + case 3: + return -3.0f * PiOver4; /* atan(-INF,-INF). */ + } + } + else + { + switch (m) + { + case 0: + return 0.0f; /* atan(+...,+INF). */ + case 1: + return -0.0f; /* atan(-...,+INF). */ + case 2: + return Pi; /* atan(+...,-INF). */ + case 3: + return -Pi; /* atan(-...,-INF). */ + } + } + } + /* y is INF. */ + if (iay == 0x7f800000) + return sign_y ? -PiOver2 : PiOver2; + + uint32_t sign_xy = sign_x ^ sign_y; + + float ax = asfloat (iax); + float ay = asfloat (iay); + + bool pred_aygtax = (ay > ax); + + /* Set up z for call to atanf. */ + float n = pred_aygtax ? -ax : ay; + float d = pred_aygtax ? ay : ax; + float z = n / d; + + float ret; + if (unlikely (m < 2 && exp_diff >= POLY_UFLOW_BOUND)) + { + /* If (x, y) is very close to x axis and x is positive, the polynomial + will underflow and evaluate to z. */ + ret = z; + } + else + { + /* Work out the correct shift. */ + float shift = sign_x ? -2.0f : 0.0f; + shift = pred_aygtax ? shift + 1.0f : shift; + shift *= PiOver2; + + ret = eval_poly (z, z, shift); + } + + /* Account for the sign of x and y. */ + return asfloat (asuint (ret) ^ sign_xy); +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (S, F, 2, atan2) +PL_TEST_ULP (atan2f, 2.4) +PL_TEST_INTERVAL (atan2f, -10.0, 10.0, 50000) +PL_TEST_INTERVAL (atan2f, -1.0, 1.0, 40000) +PL_TEST_INTERVAL (atan2f, 0.0, 1.0, 40000) +PL_TEST_INTERVAL (atan2f, 1.0, 100.0, 40000) +PL_TEST_INTERVAL (atan2f, 1e6, 1e32, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/atan_2u5.c b/contrib/arm-optimized-routines/pl/math/atan_2u5.c new file mode 100644 index 000000000000..ee4770101758 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atan_2u5.c @@ -0,0 +1,73 @@ +/* + * Double-precision atan(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "pl_sig.h" +#include "pl_test.h" +#include "atan_common.h" + +#define AbsMask 0x7fffffffffffffff +#define PiOver2 0x1.921fb54442d18p+0 +#define TinyBound 0x3e1 /* top12(asuint64(0x1p-30)). */ +#define BigBound 0x434 /* top12(asuint64(0x1p53)). */ +#define OneTop 0x3ff + +/* Fast implementation of double-precision atan. + Based on atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] using + z=1/x and shift = pi/2. Maximum observed error is 2.27 ulps: + atan(0x1.0005af27c23e9p+0) got 0x1.9225645bdd7c1p-1 + want 0x1.9225645bdd7c3p-1. */ +double +atan (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t sign = ix & ~AbsMask; + uint64_t ia = ix & AbsMask; + uint32_t ia12 = ia >> 52; + + if (unlikely (ia12 >= BigBound || ia12 < TinyBound)) + { + if (ia12 < TinyBound) + /* Avoid underflow by returning x. */ + return x; + if (ia > 0x7ff0000000000000) + /* Propagate NaN. */ + return __math_invalid (x); + /* atan(x) rounds to PiOver2 for large x. */ + return asdouble (asuint64 (PiOver2) ^ sign); + } + + double z, az, shift; + if (ia12 >= OneTop) + { + /* For x > 1, use atan(x) = pi / 2 + atan(-1 / x). */ + z = -1.0 / x; + shift = PiOver2; + /* Use absolute value only when needed (odd powers of z). */ + az = -fabs (z); + } + else + { + /* For x < 1, approximate atan(x) directly. */ + z = x; + shift = 0; + az = asdouble (ia); + } + + /* Calculate polynomial, shift + z + z^3 * P(z^2). */ + double y = eval_poly (z, az, shift); + /* Copy sign. */ + return asdouble (asuint64 (y) ^ sign); +} + +PL_SIG (S, D, 1, atan, -10.0, 10.0) +PL_TEST_ULP (atan, 1.78) +PL_TEST_INTERVAL (atan, 0, 0x1p-30, 10000) +PL_TEST_INTERVAL (atan, -0, -0x1p-30, 1000) +PL_TEST_INTERVAL (atan, 0x1p-30, 0x1p53, 900000) +PL_TEST_INTERVAL (atan, -0x1p-30, -0x1p53, 90000) +PL_TEST_INTERVAL (atan, 0x1p53, inf, 10000) +PL_TEST_INTERVAL (atan, -0x1p53, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/atan_common.h b/contrib/arm-optimized-routines/pl/math/atan_common.h new file mode 100644 index 000000000000..798cc22cc40a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atan_common.h @@ -0,0 +1,33 @@ +/* + * Double-precision polynomial evaluation function for scalar + * atan(x) and atan2(y,x). + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "poly_scalar_f64.h" + +/* Polynomial used in fast atan(x) and atan2(y,x) implementations + The order 19 polynomial P approximates (atan(sqrt(x))-sqrt(x))/x^(3/2). */ +static inline double +eval_poly (double z, double az, double shift) +{ + /* Use split Estrin scheme for P(z^2) with deg(P)=19. Use split instead of + full scheme to avoid underflow in x^16. */ + double z2 = z * z; + double x2 = z2 * z2; + double x4 = x2 * x2; + double x8 = x4 * x4; + double y = fma (estrin_11_f64 (z2, x2, x4, x8, __atan_poly_data.poly + 8), + x8, estrin_7_f64 (z2, x2, x4, __atan_poly_data.poly)); + + /* Finalize. y = shift + z + z^3 * P(z^2). */ + y = fma (y, z2 * az, az); + y = y + shift; + + return y; +} + +#undef P diff --git a/contrib/arm-optimized-routines/pl/math/atan_data.c b/contrib/arm-optimized-routines/pl/math/atan_data.c new file mode 100644 index 000000000000..91d0f61d2eaf --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atan_data.c @@ -0,0 +1,20 @@ +/* + * Double-precision polynomial coefficients for vector atan(x) and atan2(y,x). + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct atan_poly_data __atan_poly_data = { + .poly = {/* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-1022, 1.0]. See atan.sollya for details of how these were + generated. */ + -0x1.5555555555555p-2, 0x1.99999999996c1p-3, -0x1.2492492478f88p-3, + 0x1.c71c71bc3951cp-4, -0x1.745d160a7e368p-4, 0x1.3b139b6a88ba1p-4, + -0x1.11100ee084227p-4, 0x1.e1d0f9696f63bp-5, -0x1.aebfe7b418581p-5, + 0x1.842dbe9b0d916p-5, -0x1.5d30140ae5e99p-5, 0x1.338e31eb2fbbcp-5, + -0x1.00e6eece7de8p-5, 0x1.860897b29e5efp-6, -0x1.0051381722a59p-6, + 0x1.14e9dc19a4a4ep-7, -0x1.d0062b42fe3bfp-9, 0x1.17739e210171ap-10, + -0x1.ab24da7be7402p-13, 0x1.358851160a528p-16}}; diff --git a/contrib/arm-optimized-routines/pl/math/atanf_2u9.c b/contrib/arm-optimized-routines/pl/math/atanf_2u9.c new file mode 100644 index 000000000000..ba6f68089de1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atanf_2u9.c @@ -0,0 +1,72 @@ +/* + * Single-precision atan(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "atanf_common.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define PiOver2 0x1.921fb6p+0f +#define AbsMask 0x7fffffff +#define TinyBound 0x30800000 /* asuint(0x1p-30). */ +#define BigBound 0x4e800000 /* asuint(0x1p30). */ +#define One 0x3f800000 + +/* Approximation of single-precision atan(x) based on + atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] + using z=-1/x and shift = pi/2. + Maximum error is 2.88 ulps: + atanf(0x1.0565ccp+0) got 0x1.97771p-1 + want 0x1.97770ap-1. */ +float +atanf (float x) +{ + uint32_t ix = asuint (x); + uint32_t sign = ix & ~AbsMask; + uint32_t ia = ix & AbsMask; + + if (unlikely (ia < TinyBound)) + /* Avoid underflow by returning x. */ + return x; + + if (unlikely (ia > BigBound)) + { + if (ia > 0x7f800000) + /* Propagate NaN. */ + return __math_invalidf (x); + /* atan(x) rounds to PiOver2 for large x. */ + return asfloat (asuint (PiOver2) ^ sign); + } + + float z, az, shift; + if (ia > One) + { + /* For x > 1, use atan(x) = pi / 2 + atan(-1 / x). */ + z = -1.0f / x; + shift = PiOver2; + /* Use absolute value only when needed (odd powers of z). */ + az = -fabsf (z); + } + else + { + /* For x < 1, approximate atan(x) directly. */ + z = x; + az = asfloat (ia); + shift = 0; + } + + /* Calculate polynomial, shift + z + z^3 * P(z^2). */ + float y = eval_poly (z, az, shift); + /* Copy sign. */ + return asfloat (asuint (y) ^ sign); +} + +PL_SIG (S, F, 1, atan, -10.0, 10.0) +PL_TEST_ULP (atanf, 2.38) +PL_TEST_SYM_INTERVAL (atanf, 0, 0x1p-30, 5000) +PL_TEST_SYM_INTERVAL (atanf, 0x1p-30, 1, 40000) +PL_TEST_SYM_INTERVAL (atanf, 1, 0x1p30, 40000) +PL_TEST_SYM_INTERVAL (atanf, 0x1p30, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/atanf_common.h b/contrib/arm-optimized-routines/pl/math/atanf_common.h new file mode 100644 index 000000000000..8952e7e0078b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atanf_common.h @@ -0,0 +1,38 @@ +/* + * Single-precision polynomial evaluation function for scalar + * atan(x) and atan2(y,x). + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_ATANF_COMMON_H +#define PL_MATH_ATANF_COMMON_H + +#include "math_config.h" +#include "poly_scalar_f32.h" + +/* Polynomial used in fast atanf(x) and atan2f(y,x) implementations + The order 7 polynomial P approximates (atan(sqrt(x))-sqrt(x))/x^(3/2). */ +static inline float +eval_poly (float z, float az, float shift) +{ + /* Use 2-level Estrin scheme for P(z^2) with deg(P)=7. However, + a standard implementation using z8 creates spurious underflow + in the very last fma (when z^8 is small enough). + Therefore, we split the last fma into a mul and and an fma. + Horner and single-level Estrin have higher errors that exceed + threshold. */ + float z2 = z * z; + float z4 = z2 * z2; + + /* Then assemble polynomial. */ + float y = fmaf ( + z4, z4 * pairwise_poly_3_f32 (z2, z4, __atanf_poly_data.poly + 4), + pairwise_poly_3_f32 (z2, z4, __atanf_poly_data.poly)); + /* Finalize: + y = shift + z * P(z^2). */ + return fmaf (y, z2 * az, az) + shift; +} + +#endif // PL_MATH_ATANF_COMMON_H diff --git a/contrib/arm-optimized-routines/pl/math/atanf_data.c b/contrib/arm-optimized-routines/pl/math/atanf_data.c new file mode 100644 index 000000000000..c4cba2378cea --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atanf_data.c @@ -0,0 +1,15 @@ +/* + * Single-precision polynomial coefficients for vector atan(x) and atan2(y,x). + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on [2**-128, 1.0]. + */ +const struct atanf_poly_data __atanf_poly_data = { + .poly = {/* See atanf.sollya for details of how these were generated. */ + -0x1.55555p-2f, 0x1.99935ep-3f, -0x1.24051ep-3f, 0x1.bd7368p-4f, + -0x1.491f0ep-4f, 0x1.93a2c0p-5f, -0x1.4c3c60p-6f, 0x1.01fd88p-8f}}; diff --git a/contrib/arm-optimized-routines/pl/math/atanh_3u.c b/contrib/arm-optimized-routines/pl/math/atanh_3u.c new file mode 100644 index 000000000000..dcfbe8192a22 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atanh_3u.c @@ -0,0 +1,83 @@ +/* + * Double-precision atanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "poly_scalar_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffffffffffff +#define Half 0x3fe0000000000000 +#define One 0x3ff0000000000000 +#define Ln2Hi 0x1.62e42fefa3800p-1 +#define Ln2Lo 0x1.ef35793c76730p-45 +#define OneMHfRt2Top \ + 0x00095f62 /* top32(asuint64(1)) - top32(asuint64(sqrt(2)/2)). */ +#define OneTop12 0x3ff +#define HfRt2Top 0x3fe6a09e /* top32(asuint64(sqrt(2)/2)). */ +#define BottomMask 0xffffffff + +static inline double +log1p_inline (double x) +{ + /* Helper for calculating log(1 + x) using order-18 polynomial on a reduced + interval. Copied from log1p_2u.c, with no special-case handling. See that + file for details of the algorithm. */ + double m = x + 1; + uint64_t mi = asuint64 (m); + + /* Decompose x + 1 into (f + 1) * 2^k, with k chosen such that f is in + [sqrt(2)/2, sqrt(2)]. */ + uint32_t u = (mi >> 32) + OneMHfRt2Top; + int32_t k = (int32_t) (u >> 20) - OneTop12; + uint32_t utop = (u & 0x000fffff) + HfRt2Top; + uint64_t u_red = ((uint64_t) utop << 32) | (mi & BottomMask); + double f = asdouble (u_red) - 1; + + /* Correction term for round-off in f. */ + double cm = (x - (m - 1)) / m; + + /* Approximate log1p(f) with polynomial. */ + double f2 = f * f; + double f4 = f2 * f2; + double f8 = f4 * f4; + double p = fma ( + f, estrin_18_f64 (f, f2, f4, f8, f8 * f8, __log1p_data.coeffs) * f, f); + + /* Recombine log1p(x) = k*log2 + log1p(f) + c/m. */ + double kd = k; + double y = fma (Ln2Lo, kd, cm); + return y + fma (Ln2Hi, kd, p); +} + +/* Approximation for double-precision inverse tanh(x), using a simplified + version of log1p. Greatest observed error is 3.00 ULP: + atanh(0x1.e58f3c108d714p-4) got 0x1.e7da77672a647p-4 + want 0x1.e7da77672a64ap-4. */ +double +atanh (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t sign = ix & ~AbsMask; + uint64_t ia = ix & AbsMask; + + if (unlikely (ia == One)) + return __math_divzero (sign >> 32); + + if (unlikely (ia > One)) + return __math_invalid (x); + + double halfsign = asdouble (Half | sign); + double ax = asdouble (ia); + return halfsign * log1p_inline ((2 * ax) / (1 - ax)); +} + +PL_SIG (S, D, 1, atanh, -1.0, 1.0) +PL_TEST_ULP (atanh, 3.00) +PL_TEST_SYM_INTERVAL (atanh, 0, 0x1p-23, 10000) +PL_TEST_SYM_INTERVAL (atanh, 0x1p-23, 1, 90000) +PL_TEST_SYM_INTERVAL (atanh, 1, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/atanhf_3u1.c b/contrib/arm-optimized-routines/pl/math/atanhf_3u1.c new file mode 100644 index 000000000000..e99d5a9900a9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/atanhf_3u1.c @@ -0,0 +1,86 @@ +/* + * Single-precision atanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffff +#define Half 0x3f000000 +#define One 0x3f800000 +#define Four 0x40800000 +#define Ln2 0x1.62e43p-1f +/* asuint(0x1p-12), below which atanhf(x) rounds to x. */ +#define TinyBound 0x39800000 + +#define C(i) __log1pf_data.coeffs[i] + +static inline float +eval_poly (float m) +{ + /* Approximate log(1+m) on [-0.25, 0.5] using Estrin scheme. */ + float p_12 = fmaf (m, C (1), C (0)); + float p_34 = fmaf (m, C (3), C (2)); + float p_56 = fmaf (m, C (5), C (4)); + float p_78 = fmaf (m, C (7), C (6)); + + float m2 = m * m; + float p_02 = fmaf (m2, p_12, m); + float p_36 = fmaf (m2, p_56, p_34); + float p_79 = fmaf (m2, C (8), p_78); + + float m4 = m2 * m2; + float p_06 = fmaf (m4, p_36, p_02); + + return fmaf (m4 * p_79, m4, p_06); +} + +static inline float +log1pf_inline (float x) +{ + /* Helper for calculating log(x + 1). Copied from log1pf_2u1.c, with no + special-case handling. See that file for details of the algorithm. */ + float m = x + 1.0f; + int k = (asuint (m) - 0x3f400000) & 0xff800000; + float s = asfloat (Four - k); + float m_scale = asfloat (asuint (x) - k) + fmaf (0.25f, s, -1.0f); + float p = eval_poly (m_scale); + float scale_back = (float) k * 0x1.0p-23f; + return fmaf (scale_back, Ln2, p); +} + +/* Approximation for single-precision inverse tanh(x), using a simplified + version of log1p. Maximum error is 3.08 ULP: + atanhf(0x1.ff0d5p-5) got 0x1.ffb768p-5 + want 0x1.ffb76ep-5. */ +float +atanhf (float x) +{ + uint32_t ix = asuint (x); + uint32_t iax = ix & AbsMask; + uint32_t sign = ix & ~AbsMask; + + if (unlikely (iax < TinyBound)) + return x; + + if (iax == One) + return __math_divzero (sign); + + if (unlikely (iax > One)) + return __math_invalidf (x); + + float halfsign = asfloat (Half | sign); + float ax = asfloat (iax); + return halfsign * log1pf_inline ((2 * ax) / (1 - ax)); +} + +PL_SIG (S, F, 1, atanh, -1.0, 1.0) +PL_TEST_ULP (atanhf, 2.59) +PL_TEST_SYM_INTERVAL (atanhf, 0, 0x1p-12, 500) +PL_TEST_SYM_INTERVAL (atanhf, 0x1p-12, 1, 200000) +PL_TEST_SYM_INTERVAL (atanhf, 1, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/cbrt_2u.c b/contrib/arm-optimized-routines/pl/math/cbrt_2u.c new file mode 100644 index 000000000000..80be83c4470c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cbrt_2u.c @@ -0,0 +1,69 @@ +/* + * Double-precision cbrt(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +PL_SIG (S, D, 1, cbrt, -10.0, 10.0) + +#define AbsMask 0x7fffffffffffffff +#define TwoThirds 0x1.5555555555555p-1 + +#define C(i) __cbrt_data.poly[i] +#define T(i) __cbrt_data.table[i] + +/* Approximation for double-precision cbrt(x), using low-order polynomial and + two Newton iterations. Greatest observed error is 1.79 ULP. Errors repeat + according to the exponent, for instance an error observed for double value + m * 2^e will be observed for any input m * 2^(e + 3*i), where i is an + integer. + cbrt(0x1.fffff403f0bc6p+1) got 0x1.965fe72821e9bp+0 + want 0x1.965fe72821e99p+0. */ +double +cbrt (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t iax = ix & AbsMask; + uint64_t sign = ix & ~AbsMask; + + if (unlikely (iax == 0 || iax == 0x7ff0000000000000)) + return x; + + /* |x| = m * 2^e, where m is in [0.5, 1.0]. + We can easily decompose x into m and e using frexp. */ + int e; + double m = frexp (asdouble (iax), &e); + + /* Calculate rough approximation for cbrt(m) in [0.5, 1.0], starting point for + Newton iterations. */ + double p_01 = fma (C (1), m, C (0)); + double p_23 = fma (C (3), m, C (2)); + double p = fma (p_23, m * m, p_01); + + /* Two iterations of Newton's method for iteratively approximating cbrt. */ + double m_by_3 = m / 3; + double a = fma (TwoThirds, p, m_by_3 / (p * p)); + a = fma (TwoThirds, a, m_by_3 / (a * a)); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + Let t = (2 ^ (e / 3)) / (2 ^ round(e / 3)). + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3. + i is an integer in [-2, 2], so t can be looked up in the table T. + Hence the result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. + Which can be done easily using ldexp. */ + return asdouble (asuint64 (ldexp (a * T (2 + e % 3), e / 3)) | sign); +} + +PL_TEST_ULP (cbrt, 1.30) +PL_TEST_SYM_INTERVAL (cbrt, 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/cbrt_data.c b/contrib/arm-optimized-routines/pl/math/cbrt_data.c new file mode 100644 index 000000000000..3d484c2779e2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cbrt_data.c @@ -0,0 +1,15 @@ +/* + * Coefficients and table entries for double-precision cbrt(x). + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct cbrt_data __cbrt_data + = {.poly = { /* Coefficients for very rough approximation of cbrt(x) in [0.5, 1]. + See cbrt.sollya for details of generation. */ + 0x1.c14e8ee44767p-2, 0x1.dd2d3f99e4c0ep-1, -0x1.08e83026b7e74p-1, 0x1.2c74eaa3ba428p-3}, + .table = { /* table[i] = 2^((i - 2) / 3). */ + 0x1.428a2f98d728bp-1, 0x1.965fea53d6e3dp-1, 0x1p0, 0x1.428a2f98d728bp0, 0x1.965fea53d6e3dp0}}; diff --git a/contrib/arm-optimized-routines/pl/math/cbrtf_1u5.c b/contrib/arm-optimized-routines/pl/math/cbrtf_1u5.c new file mode 100644 index 000000000000..88fcb7162ef6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cbrtf_1u5.c @@ -0,0 +1,66 @@ +/* + * Single-precision cbrt(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffff +#define SignMask 0x80000000 +#define TwoThirds 0x1.555556p-1f + +#define T(i) __cbrtf_data.table[i] + +/* Approximation for single-precision cbrt(x), using low-order polynomial and + one Newton iteration on a reduced interval. Greatest error is 1.5 ULP. This + is observed for every value where the mantissa is 0x1.81410e and the exponent + is a multiple of 3, for example: + cbrtf(0x1.81410ep+30) got 0x1.255d96p+10 + want 0x1.255d92p+10. */ +float +cbrtf (float x) +{ + uint32_t ix = asuint (x); + uint32_t iax = ix & AbsMask; + uint32_t sign = ix & SignMask; + + if (unlikely (iax == 0 || iax == 0x7f800000)) + return x; + + /* |x| = m * 2^e, where m is in [0.5, 1.0]. + We can easily decompose x into m and e using frexpf. */ + int e; + float m = frexpf (asfloat (iax), &e); + + /* p is a rough approximation for cbrt(m) in [0.5, 1.0]. The better this is, + the less accurate the next stage of the algorithm needs to be. An order-4 + polynomial is enough for one Newton iteration. */ + float p = pairwise_poly_3_f32 (m, m * m, __cbrtf_data.poly); + + /* One iteration of Newton's method for iteratively approximating cbrt. */ + float m_by_3 = m / 3; + float a = fmaf (TwoThirds, p, m_by_3 / (p * p)); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + Let t = (2 ^ (e / 3)) / (2 ^ round(e / 3)). + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3. + i is an integer in [-2, 2], so t can be looked up in the table T. + Hence the result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. + Which can be done easily using ldexpf. */ + return asfloat (asuint (ldexpf (a * T (2 + e % 3), e / 3)) | sign); +} + +PL_SIG (S, F, 1, cbrt, -10.0, 10.0) +PL_TEST_ULP (cbrtf, 1.03) +PL_TEST_SYM_INTERVAL (cbrtf, 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/cbrtf_data.c b/contrib/arm-optimized-routines/pl/math/cbrtf_data.c new file mode 100644 index 000000000000..c6cdb4de0d65 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cbrtf_data.c @@ -0,0 +1,15 @@ +/* + * Coefficients and table entries for single-precision cbrt(x). + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct cbrtf_data __cbrtf_data + = {.poly = { /* Coefficients for very rough approximation of cbrt(x) in [0.5, 1]. + See cbrtf.sollya for details of generation. */ + 0x1.c14e96p-2, 0x1.dd2d3p-1, -0x1.08e81ap-1, 0x1.2c74c2p-3}, + .table = { /* table[i] = 2^((i - 2) / 3). */ + 0x1.428a3p-1, 0x1.965feap-1, 0x1p0, 0x1.428a3p0, 0x1.965feap0}}; diff --git a/contrib/arm-optimized-routines/pl/math/cosh_2u.c b/contrib/arm-optimized-routines/pl/math/cosh_2u.c new file mode 100644 index 000000000000..2240a9c56f15 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cosh_2u.c @@ -0,0 +1,63 @@ +/* + * Double-precision cosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffffffffffff +#define SpecialBound \ + 0x40861da04cbafe44 /* 0x1.61da04cbafe44p+9, above which exp overflows. */ + +double +__exp_dd (double, double); + +static double +specialcase (double x, uint64_t iax) +{ + if (iax == 0x7ff0000000000000) + return INFINITY; + if (iax > 0x7ff0000000000000) + return __math_invalid (x); + /* exp overflows above SpecialBound. At this magnitude cosh(x) is dominated by + exp(x), so we can approximate cosh(x) by (exp(|x|/2)) ^ 2 / 2. */ + double t = __exp_dd (asdouble (iax) / 2, 0); + return (0.5 * t) * t; +} + +/* Approximation for double-precision cosh(x). + cosh(x) = (exp(x) + exp(-x)) / 2. + The greatest observed error is in the special region, 1.93 ULP: + cosh(0x1.628af341989dap+9) got 0x1.fdf28623ef921p+1021 + want 0x1.fdf28623ef923p+1021. + + The greatest observed error in the non-special region is 1.03 ULP: + cosh(0x1.502cd8e56ab3bp+0) got 0x1.fe54962842d0ep+0 + want 0x1.fe54962842d0fp+0. */ +double +cosh (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t iax = ix & AbsMask; + + /* exp overflows a little bit before cosh, so use special-case handler for the + gap, as well as special values. */ + if (unlikely (iax >= SpecialBound)) + return specialcase (x, iax); + + double ax = asdouble (iax); + /* Use double-precision exp helper to calculate exp(x), then: + cosh(x) = exp(|x|) / 2 + 1 / (exp(|x| * 2). */ + double t = __exp_dd (ax, 0); + return 0.5 * t + 0.5 / t; +} + +PL_SIG (S, D, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (cosh, 1.43) +PL_TEST_SYM_INTERVAL (cosh, 0, 0x1.61da04cbafe44p+9, 100000) +PL_TEST_SYM_INTERVAL (cosh, 0x1.61da04cbafe44p+9, 0x1p10, 1000) +PL_TEST_SYM_INTERVAL (cosh, 0x1p10, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/coshf_1u9.c b/contrib/arm-optimized-routines/pl/math/coshf_1u9.c new file mode 100644 index 000000000000..cf737840e0d6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/coshf_1u9.c @@ -0,0 +1,68 @@ +/* + * Single-precision cosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffff +#define TinyBound 0x20000000 /* 0x1p-63: Round to 1 below this. */ +#define SpecialBound \ + 0x42ad496c /* 0x1.5a92d8p+6: expf overflows above this, so have to use \ + special case. */ + +float +optr_aor_exp_f32 (float); + +static NOINLINE float +specialcase (float x, uint32_t iax) +{ + if (iax == 0x7f800000) + return INFINITY; + if (iax > 0x7f800000) + return __math_invalidf (x); + if (iax <= TinyBound) + /* For tiny x, avoid underflow by just returning 1. */ + return 1; + /* Otherwise SpecialBound <= |x| < Inf. x is too large to calculate exp(x) + without overflow, so use exp(|x|/2) instead. For large x cosh(x) is + dominated by exp(x), so return: + cosh(x) ~= (exp(|x|/2))^2 / 2. */ + float t = optr_aor_exp_f32 (asfloat (iax) / 2); + return (0.5 * t) * t; +} + +/* Approximation for single-precision cosh(x) using exp. + cosh(x) = (exp(x) + exp(-x)) / 2. + The maximum error is 1.89 ULP, observed for |x| > SpecialBound: + coshf(0x1.65898cp+6) got 0x1.f00aep+127 want 0x1.f00adcp+127. + The maximum error observed for TinyBound < |x| < SpecialBound is 1.02 ULP: + coshf(0x1.50a3cp+0) got 0x1.ff21dcp+0 want 0x1.ff21dap+0. */ +float +coshf (float x) +{ + uint32_t ix = asuint (x); + uint32_t iax = ix & AbsMask; + float ax = asfloat (iax); + + if (unlikely (iax <= TinyBound || iax >= SpecialBound)) + { + /* x is tiny, large or special. */ + return specialcase (x, iax); + } + + /* Compute cosh using the definition: + coshf(x) = exp(x) / 2 + exp(-x) / 2. */ + float t = optr_aor_exp_f32 (ax); + return 0.5f * t + 0.5f / t; +} + +PL_SIG (S, F, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (coshf, 1.89) +PL_TEST_SYM_INTERVAL (coshf, 0, 0x1p-63, 100) +PL_TEST_SYM_INTERVAL (coshf, 0, 0x1.5a92d8p+6, 80000) +PL_TEST_SYM_INTERVAL (coshf, 0x1.5a92d8p+6, inf, 2000) diff --git a/contrib/arm-optimized-routines/pl/math/cospi_3u1.c b/contrib/arm-optimized-routines/pl/math/cospi_3u1.c new file mode 100644 index 000000000000..4a688a076829 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cospi_3u1.c @@ -0,0 +1,89 @@ +/* + * Double-precision scalar cospi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_scalar_f64.h" + +/* Taylor series coefficents for sin(pi * x). + C2 coefficient (orginally ~=5.16771278) has been split into two parts: + C2_hi = 4, C2_lo = C2 - C2_hi (~=1.16771278) + This change in magnitude reduces floating point rounding errors. + C2_hi is then reintroduced after the polynomial approxmation. */ +static const double poly[] + = { 0x1.921fb54442d184p1, -0x1.2aef39896f94bp0, 0x1.466bc6775ab16p1, + -0x1.32d2cce62dc33p-1, 0x1.507834891188ep-4, -0x1.e30750a28c88ep-8, + 0x1.e8f48308acda4p-12, -0x1.6fc0032b3c29fp-16, 0x1.af86ae521260bp-21, + -0x1.012a9870eeb7dp-25 }; + +#define Shift 0x1.8p+52 + +/* Approximation for scalar double-precision cospi(x). + Maximum error: 3.13 ULP: + cospi(0x1.160b129300112p-21) got 0x1.fffffffffd16bp-1 + want 0x1.fffffffffd16ep-1. */ +double +cospi (double x) +{ + if (isinf (x)) + return __math_invalid (x); + + double ax = asdouble (asuint64 (x) & ~0x8000000000000000); + + /* Edge cases for when cospif should be exactly 1. (Integers) + 0x1p53 is the limit for single precision to store any decimal places. */ + if (ax >= 0x1p53) + return 1; + + /* If x is an integer, return +- 1, based upon if x is odd. */ + uint64_t m = (uint64_t) ax; + if (m == ax) + return (m & 1) ? -1 : 1; + + /* For very small inputs, squaring r causes underflow. + Values below this threshold can be approximated via + cospi(x) ~= 1. */ + if (ax < 0x1p-63) + return 1; + + /* Any non-integer values >= 0x1x51 will be int +0.5. + These values should return exactly 0. */ + if (ax >= 0x1p51) + return 0; + + /* n = rint(|x|). */ + double n = ax + Shift; + uint64_t sign = asuint64 (n) << 63; + n = n - Shift; + + /* We know that cospi(x) = sinpi(0.5 - x) + range reduction and offset into sinpi range -1/2 .. 1/2 + r = 0.5 - |x - rint(x)|. */ + double r = 0.5 - fabs (ax - n); + + /* y = sin(r). */ + double r2 = r * r; + double y = horner_9_f64 (r2, poly); + y = y * r; + + /* Reintroduce C2_hi. */ + y = fma (-4 * r2, r, y); + + /* As all values are reduced to -1/2 .. 1/2, the result of cos(x) always be + positive, therefore, the sign must be introduced based upon if x rounds to + odd or even. */ + return asdouble (asuint64 (y) ^ sign); +} + +PL_SIG (S, D, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (cospi, 2.63) +PL_TEST_SYM_INTERVAL (cospi, 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (cospi, 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (cospi, 0.5, 0x1p51f, 10000) +PL_TEST_SYM_INTERVAL (cospi, 0x1p51f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/cospif_2u6.c b/contrib/arm-optimized-routines/pl/math/cospif_2u6.c new file mode 100644 index 000000000000..d78a98ed8b2d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/cospif_2u6.c @@ -0,0 +1,84 @@ +/* + * Single-precision scalar cospi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Taylor series coefficents for sin(pi * x). */ +#define C0 0x1.921fb6p1f +#define C1 -0x1.4abbcep2f +#define C2 0x1.466bc6p1f +#define C3 -0x1.32d2ccp-1f +#define C4 0x1.50783p-4f +#define C5 -0x1.e30750p-8f + +#define Shift 0x1.0p+23f + +/* Approximation for scalar single-precision cospi(x) - cospif. + Maximum error: 2.64 ULP: + cospif(0x1.37e844p-4) got 0x1.f16b3p-1 + want 0x1.f16b2ap-1. */ +float +cospif (float x) +{ + if (isinf (x)) + return __math_invalidf (x); + + float ax = asfloat (asuint (x) & ~0x80000000); + + /* Edge cases for when cospif should be exactly +/- 1. (Integers) + 0x1p23 is the limit for single precision to store any decimal places. */ + if (ax >= 0x1p24f) + return 1; + + uint32_t m = roundf (ax); + if (m == ax) + return (m & 1) ? -1 : 1; + + /* Any non-integer values >= 0x1p22f will be int +0.5. + These values should return exactly 0. */ + if (ax >= 0x1p22f) + return 0; + + /* For very small inputs, squaring r causes underflow. + Values below this threshold can be approximated via cospi(x) ~= 1 - + (pi*x). */ + if (ax < 0x1p-31f) + return 1 - (C0 * x); + + /* n = rint(|x|). */ + float n = ax + Shift; + uint32_t sign = asuint (n) << 31; + n = n - Shift; + + /* We know that cospi(x) = sinpi(0.5 - x) + range reduction and offset into sinpi range -1/2 .. 1/2 + r = 0.5 - |x - rint(x)|. */ + float r = 0.5f - fabs (ax - n); + + /* y = sin(pi * r). */ + float r2 = r * r; + float y = fmaf (C5, r2, C4); + y = fmaf (y, r2, C3); + y = fmaf (y, r2, C2); + y = fmaf (y, r2, C1); + y = fmaf (y, r2, C0); + + /* As all values are reduced to -1/2 .. 1/2, the result of cos(x) always be + positive, therefore, the sign must be introduced based upon if x rounds to + odd or even. */ + return asfloat (asuint (y * r) ^ sign); +} + +PL_SIG (S, F, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (cospif, 2.15) +PL_TEST_SYM_INTERVAL (cospif, 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (cospif, 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (cospif, 0.5, 0x1p22f, 10000) +PL_TEST_SYM_INTERVAL (cospif, 0x1p22f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/erf_2u5.c b/contrib/arm-optimized-routines/pl/math/erf_2u5.c new file mode 100644 index 000000000000..3ca2a1332c1f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erf_2u5.c @@ -0,0 +1,102 @@ +/* + * Double-precision erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define TwoOverSqrtPiMinusOne 0x1.06eba8214db69p-3 +#define Shift 0x1p45 + +/* Polynomial coefficients. */ +#define OneThird 0x1.5555555555555p-2 +#define TwoThird 0x1.5555555555555p-1 + +#define TwoOverFifteen 0x1.1111111111111p-3 +#define TwoOverFive 0x1.999999999999ap-2 +#define Tenth 0x1.999999999999ap-4 + +#define TwoOverNine 0x1.c71c71c71c71cp-3 +#define TwoOverFortyFive 0x1.6c16c16c16c17p-5 +#define Sixth 0x1.555555555555p-3 + +/* Fast erf approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erf(x) ~ erf(r) + + scale * d * [ + + 1 + - r d + + 1/3 (2 r^2 - 1) d^2 + - 1/6 (r (2 r^2 - 3)) d^3 + + 1/30 (4 r^4 - 12 r^2 + 3) d^4 + - 1/90 (4 r^4 - 20 r^2 + 15) d^5 + ] + + Maximum measure error: 2.29 ULP + erf(-0x1.00003c924e5d1p-8) got -0x1.20dd59132ebadp-8 + want -0x1.20dd59132ebafp-8. */ +double +erf (double x) +{ + /* Get absolute value and sign. */ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & 0x7fffffffffffffff; + uint64_t sign = ix & ~0x7fffffffffffffff; + + /* |x| < 0x1p-508. Triggers exceptions. */ + if (unlikely (ia < 0x2030000000000000)) + return fma (TwoOverSqrtPiMinusOne, x, x); + + if (ia < 0x4017f80000000000) /* |x| < 6 - 1 / 128 = 5.9921875. */ + { + /* Set r to multiple of 1/128 nearest to |x|. */ + double a = asdouble (ia); + double z = a + Shift; + uint64_t i = asuint64 (z) - asuint64 (Shift); + double r = z - Shift; + /* Lookup erf(r) and scale(r) in table. + Set erf(r) to 0 and scale to 2/sqrt(pi) for |x| <= 0x1.cp-9. */ + double erfr = __erf_data.tab[i].erf; + double scale = __erf_data.tab[i].scale; + + /* erf(x) ~ erf(r) + scale * d * poly (d, r). */ + double d = a - r; + double r2 = r * r; + double d2 = d * d; + + /* poly (d, r) = 1 + p1(r) * d + p2(r) * d^2 + ... + p5(r) * d^5. */ + double p1 = -r; + double p2 = fma (TwoThird, r2, -OneThird); + double p3 = -r * fma (OneThird, r2, -0.5); + double p4 = fma (fma (TwoOverFifteen, r2, -TwoOverFive), r2, Tenth); + double p5 + = -r * fma (fma (TwoOverFortyFive, r2, -TwoOverNine), r2, Sixth); + + double p34 = fma (p4, d, p3); + double p12 = fma (p2, d, p1); + double y = fma (p5, d2, p34); + y = fma (y, d2, p12); + + y = fma (fma (y, d2, d), scale, erfr); + return asdouble (asuint64 (y) | sign); + } + + /* Special cases : erf(nan)=nan, erf(+inf)=+1 and erf(-inf)=-1. */ + if (unlikely (ia >= 0x7ff0000000000000)) + return (1.0 - (double) (sign >> 62)) + 1.0 / x; + + /* Boring domain (|x| >= 6.0). */ + return asdouble (sign | asuint64 (1.0)); +} + +PL_SIG (S, D, 1, erf, -6.0, 6.0) +PL_TEST_ULP (erf, 1.79) +PL_TEST_SYM_INTERVAL (erf, 0, 5.9921875, 40000) +PL_TEST_SYM_INTERVAL (erf, 5.9921875, inf, 40000) +PL_TEST_SYM_INTERVAL (erf, 0, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erf_data.c b/contrib/arm-optimized-routines/pl/math/erf_data.c new file mode 100644 index 000000000000..138e03578e77 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erf_data.c @@ -0,0 +1,788 @@ +/* + * Data for approximation of erf. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in erf. + For each possible rounded input r (multiples of 1/128), between + r = 0.0 and r = 6.0 (769 values): + - the first entry __erff_data.tab.erf contains the values of erf(r), + - the second entry __erff_data.tab.scale contains the values of + 2/sqrt(pi)*exp(-r^2). Note that indices 0 and 1 are never hit by the + algorithm, since lookup is performed only for x >= 1/64-1/512. */ +const struct erf_data __erf_data = { + .tab = { { 0x0.0000000000000p+0, 0x1.20dd750429b6dp+0 }, + { 0x1.20dbf3deb1340p-7, 0x1.20d8f1975c85dp+0 }, + { 0x1.20d77083f17a0p-6, 0x1.20cb67bd452c7p+0 }, + { 0x1.b137e0cf584dcp-6, 0x1.20b4d8bac36c1p+0 }, + { 0x1.20c5645dd2538p-5, 0x1.209546ad13ccfp+0 }, + { 0x1.68e5d3bbc9526p-5, 0x1.206cb4897b148p+0 }, + { 0x1.b0fafef135745p-5, 0x1.203b261cd0052p+0 }, + { 0x1.f902a77bd3821p-5, 0x1.2000a00ae3804p+0 }, + { 0x1.207d480e90658p-4, 0x1.1fbd27cdc72d3p+0 }, + { 0x1.44703e87e8593p-4, 0x1.1f70c3b4f2cc7p+0 }, + { 0x1.68591a1e83b5dp-4, 0x1.1f1b7ae44867fp+0 }, + { 0x1.8c36beb8a8d23p-4, 0x1.1ebd5552f795bp+0 }, + { 0x1.b0081148a873ap-4, 0x1.1e565bca400d4p+0 }, + { 0x1.d3cbf7e70a4b3p-4, 0x1.1de697e413d28p+0 }, + { 0x1.f78159ec8bb50p-4, 0x1.1d6e14099944ap+0 }, + { 0x1.0d939005f65e5p-3, 0x1.1cecdb718d61cp+0 }, + { 0x1.1f5e1a35c3b89p-3, 0x1.1c62fa1e869b6p+0 }, + { 0x1.311fc15f56d14p-3, 0x1.1bd07cdd189acp+0 }, + { 0x1.42d7fc2f64959p-3, 0x1.1b357141d95d5p+0 }, + { 0x1.548642321d7c6p-3, 0x1.1a91e5a748165p+0 }, + { 0x1.662a0bdf7a89fp-3, 0x1.19e5e92b964abp+0 }, + { 0x1.77c2d2a765f9ep-3, 0x1.19318bae53a04p+0 }, + { 0x1.895010fdbdbfdp-3, 0x1.1874ddcdfce24p+0 }, + { 0x1.9ad142662e14dp-3, 0x1.17aff0e56ec10p+0 }, + { 0x1.ac45e37fe2526p-3, 0x1.16e2d7093cd8cp+0 }, + { 0x1.bdad72110a648p-3, 0x1.160da304ed92fp+0 }, + { 0x1.cf076d1233237p-3, 0x1.153068581b781p+0 }, + { 0x1.e05354b96ff36p-3, 0x1.144b3b337c90cp+0 }, + { 0x1.f190aa85540e2p-3, 0x1.135e3075d076bp+0 }, + { 0x1.015f78a3dcf3dp-2, 0x1.12695da8b5bdep+0 }, + { 0x1.09eed6982b948p-2, 0x1.116cd8fd67618p+0 }, + { 0x1.127631eb8de32p-2, 0x1.1068b94962e5ep+0 }, + { 0x1.1af54e232d609p-2, 0x1.0f5d1602f7e41p+0 }, + { 0x1.236bef825d9a2p-2, 0x1.0e4a073dc1b91p+0 }, + { 0x1.2bd9db0f7827fp-2, 0x1.0d2fa5a70c168p+0 }, + { 0x1.343ed6989b7d9p-2, 0x1.0c0e0a8223359p+0 }, + { 0x1.3c9aa8b84bedap-2, 0x1.0ae54fa490722p+0 }, + { 0x1.44ed18d9f6462p-2, 0x1.09b58f724416bp+0 }, + { 0x1.4d35ef3e5372ep-2, 0x1.087ee4d9ad247p+0 }, + { 0x1.5574f4ffac98ep-2, 0x1.07416b4fbfe7cp+0 }, + { 0x1.5da9f415ff23fp-2, 0x1.05fd3ecbec297p+0 }, + { 0x1.65d4b75b00471p-2, 0x1.04b27bc403d30p+0 }, + { 0x1.6df50a8dff772p-2, 0x1.03613f2812dafp+0 }, + { 0x1.760aba57a76bfp-2, 0x1.0209a65e29545p+0 }, + { 0x1.7e15944d9d3e4p-2, 0x1.00abcf3e187a9p+0 }, + { 0x1.861566f5fd3c0p-2, 0x1.fe8fb01a47307p-1 }, + { 0x1.8e0a01cab516bp-2, 0x1.fbbbbef34b4b2p-1 }, + { 0x1.95f3353cbb146p-2, 0x1.f8dc092d58ff8p-1 }, + { 0x1.9dd0d2b721f39p-2, 0x1.f5f0cdaf15313p-1 }, + { 0x1.a5a2aca209394p-2, 0x1.f2fa4c16c0019p-1 }, + { 0x1.ad68966569a87p-2, 0x1.eff8c4b1375dbp-1 }, + { 0x1.b522646bbda68p-2, 0x1.ecec7870ebca7p-1 }, + { 0x1.bccfec24855b8p-2, 0x1.e9d5a8e4c934ep-1 }, + { 0x1.c4710406a65fcp-2, 0x1.e6b4982f158b9p-1 }, + { 0x1.cc058392a6d2dp-2, 0x1.e38988fc46e72p-1 }, + { 0x1.d38d4354c3bd0p-2, 0x1.e054be79d3042p-1 }, + { 0x1.db081ce6e2a48p-2, 0x1.dd167c4cf9d2ap-1 }, + { 0x1.e275eaf25e458p-2, 0x1.d9cf06898cdafp-1 }, + { 0x1.e9d68931ae650p-2, 0x1.d67ea1a8b5368p-1 }, + { 0x1.f129d471eabb1p-2, 0x1.d325927fb9d89p-1 }, + { 0x1.f86faa9428f9dp-2, 0x1.cfc41e36c7df9p-1 }, + { 0x1.ffa7ea8eb5fd0p-2, 0x1.cc5a8a3fbea40p-1 }, + { 0x1.03693a371519cp-1, 0x1.c8e91c4d01368p-1 }, + { 0x1.06f794ab2cae7p-1, 0x1.c5701a484ef9dp-1 }, + { 0x1.0a7ef5c18edd2p-1, 0x1.c1efca49a5011p-1 }, + { 0x1.0dff4f247f6c6p-1, 0x1.be68728e29d5dp-1 }, + { 0x1.1178930ada115p-1, 0x1.bada596f25436p-1 }, + { 0x1.14eab43841b55p-1, 0x1.b745c55905bf8p-1 }, + { 0x1.1855a5fd3dd50p-1, 0x1.b3aafcc27502ep-1 }, + { 0x1.1bb95c3746199p-1, 0x1.b00a46237d5bep-1 }, + { 0x1.1f15cb50bc4dep-1, 0x1.ac63e7ecc1411p-1 }, + { 0x1.226ae840d4d70p-1, 0x1.a8b8287ec6a09p-1 }, + { 0x1.25b8a88b6dd7fp-1, 0x1.a5074e2157620p-1 }, + { 0x1.28ff0240d52cdp-1, 0x1.a1519efaf889ep-1 }, + { 0x1.2c3debfd7d6c1p-1, 0x1.9d97610879642p-1 }, + { 0x1.2f755ce9a21f4p-1, 0x1.99d8da149c13fp-1 }, + { 0x1.32a54cb8db67bp-1, 0x1.96164fafd8de3p-1 }, + { 0x1.35cdb3a9a144dp-1, 0x1.925007283d7aap-1 }, + { 0x1.38ee8a84beb71p-1, 0x1.8e86458169af8p-1 }, + { 0x1.3c07ca9cb4f9ep-1, 0x1.8ab94f6caa71dp-1 }, + { 0x1.3f196dcd0f135p-1, 0x1.86e9694134b9ep-1 }, + { 0x1.42236e79a5fa6p-1, 0x1.8316d6f48133dp-1 }, + { 0x1.4525c78dd5966p-1, 0x1.7f41dc12c9e89p-1 }, + { 0x1.4820747ba2dc2p-1, 0x1.7b6abbb7aaf19p-1 }, + { 0x1.4b13713ad3513p-1, 0x1.7791b886e7403p-1 }, + { 0x1.4dfeba47f63ccp-1, 0x1.73b714a552763p-1 }, + { 0x1.50e24ca35fd2cp-1, 0x1.6fdb11b1e0c34p-1 }, + { 0x1.53be25d016a4fp-1, 0x1.6bfdf0beddaf5p-1 }, + { 0x1.569243d2b3a9bp-1, 0x1.681ff24b4ab04p-1 }, + { 0x1.595ea53035283p-1, 0x1.6441563c665d4p-1 }, + { 0x1.5c2348ecc4dc3p-1, 0x1.60625bd75d07bp-1 }, + { 0x1.5ee02e8a71a53p-1, 0x1.5c8341bb23767p-1 }, + { 0x1.61955607dd15dp-1, 0x1.58a445da7c74cp-1 }, + { 0x1.6442bfdedd397p-1, 0x1.54c5a57629db0p-1 }, + { 0x1.66e86d0312e82p-1, 0x1.50e79d1749ac9p-1 }, + { 0x1.69865ee075011p-1, 0x1.4d0a6889dfd9fp-1 }, + { 0x1.6c1c9759d0e5fp-1, 0x1.492e42d78d2c5p-1 }, + { 0x1.6eab18c74091bp-1, 0x1.4553664273d24p-1 }, + { 0x1.7131e5f496a5ap-1, 0x1.417a0c4049fd0p-1 }, + { 0x1.73b1021fc0cb8p-1, 0x1.3da26d759aef5p-1 }, + { 0x1.762870f720c6fp-1, 0x1.39ccc1b136d5ap-1 }, + { 0x1.78983697dc96fp-1, 0x1.35f93fe7d1b3dp-1 }, + { 0x1.7b00578c26037p-1, 0x1.32281e2fd1a92p-1 }, + { 0x1.7d60d8c979f7bp-1, 0x1.2e5991bd4cbfcp-1 }, + { 0x1.7fb9bfaed8078p-1, 0x1.2a8dcede3673bp-1 }, + { 0x1.820b1202f27fbp-1, 0x1.26c508f6bd0ffp-1 }, + { 0x1.8454d5f25760dp-1, 0x1.22ff727dd6f7bp-1 }, + { 0x1.8697120d92a4ap-1, 0x1.1f3d3cf9ffe5ap-1 }, + { 0x1.88d1cd474a2e0p-1, 0x1.1b7e98fe26217p-1 }, + { 0x1.8b050ef253c37p-1, 0x1.17c3b626c7a11p-1 }, + { 0x1.8d30debfc572ep-1, 0x1.140cc3173f007p-1 }, + { 0x1.8f5544bd00c04p-1, 0x1.1059ed7740313p-1 }, + { 0x1.91724951b8fc6p-1, 0x1.0cab61f084b93p-1 }, + { 0x1.9387f53df5238p-1, 0x1.09014c2ca74dap-1 }, + { 0x1.959651980da31p-1, 0x1.055bd6d32e8d7p-1 }, + { 0x1.979d67caa6631p-1, 0x1.01bb2b87c6968p-1 }, + { 0x1.999d4192a5715p-1, 0x1.fc3ee5d1524b0p-2 }, + { 0x1.9b95e8fd26abap-1, 0x1.f511a91a67d2ap-2 }, + { 0x1.9d8768656cc42p-1, 0x1.edeeee0959518p-2 }, + { 0x1.9f71ca72cffb6p-1, 0x1.e6d6ffaa65a25p-2 }, + { 0x1.a1551a16aaeafp-1, 0x1.dfca26f5bbf88p-2 }, + { 0x1.a331628a45b92p-1, 0x1.d8c8aace11e63p-2 }, + { 0x1.a506af4cc00f4p-1, 0x1.d1d2cfff91594p-2 }, + { 0x1.a6d50c20fa293p-1, 0x1.cae8d93f1d7b6p-2 }, + { 0x1.a89c850b7d54dp-1, 0x1.c40b0729ed547p-2 }, + { 0x1.aa5d265064366p-1, 0x1.bd3998457afdap-2 }, + { 0x1.ac16fc7143263p-1, 0x1.b674c8ffc6283p-2 }, + { 0x1.adca142b10f98p-1, 0x1.afbcd3afe8ab6p-2 }, + { 0x1.af767a741088bp-1, 0x1.a911f096fbc26p-2 }, + { 0x1.b11c3c79bb424p-1, 0x1.a27455e14c93cp-2 }, + { 0x1.b2bb679ead19cp-1, 0x1.9be437a7de946p-2 }, + { 0x1.b4540978921eep-1, 0x1.9561c7f23a47bp-2 }, + { 0x1.b5e62fce16095p-1, 0x1.8eed36b886d93p-2 }, + { 0x1.b771e894d602ep-1, 0x1.8886b1e5ecfd1p-2 }, + { 0x1.b8f741ef54f83p-1, 0x1.822e655b417e6p-2 }, + { 0x1.ba764a2af2b78p-1, 0x1.7be47af1f5d89p-2 }, + { 0x1.bbef0fbde6221p-1, 0x1.75a91a7f4d2edp-2 }, + { 0x1.bd61a1453ab44p-1, 0x1.6f7c69d7d3ef8p-2 }, + { 0x1.bece0d82d1a5cp-1, 0x1.695e8cd31867ep-2 }, + { 0x1.c034635b66e23p-1, 0x1.634fa54fa285fp-2 }, + { 0x1.c194b1d49a184p-1, 0x1.5d4fd33729015p-2 }, + { 0x1.c2ef0812fc1bdp-1, 0x1.575f3483021c3p-2 }, + { 0x1.c443755820d64p-1, 0x1.517de540ce2a3p-2 }, + { 0x1.c5920900b5fd1p-1, 0x1.4babff975a04cp-2 }, + { 0x1.c6dad2829ec62p-1, 0x1.45e99bcbb7915p-2 }, + { 0x1.c81de16b14cefp-1, 0x1.4036d0468a7a2p-2 }, + { 0x1.c95b455cce69dp-1, 0x1.3a93b1998736cp-2 }, + { 0x1.ca930e0e2a825p-1, 0x1.35005285227f1p-2 }, + { 0x1.cbc54b476248dp-1, 0x1.2f7cc3fe6f423p-2 }, + { 0x1.ccf20ce0c0d27p-1, 0x1.2a09153529381p-2 }, + { 0x1.ce1962c0e0d8bp-1, 0x1.24a55399ea239p-2 }, + { 0x1.cf3b5cdaf0c39p-1, 0x1.1f518ae487dc8p-2 }, + { 0x1.d0580b2cfd249p-1, 0x1.1a0dc51a9934dp-2 }, + { 0x1.d16f7dbe41ca0p-1, 0x1.14da0a961fd14p-2 }, + { 0x1.d281c49d818d0p-1, 0x1.0fb6620c550afp-2 }, + { 0x1.d38eefdf64fddp-1, 0x1.0aa2d09497f2bp-2 }, + { 0x1.d4970f9ce00d9p-1, 0x1.059f59af7a906p-2 }, + { 0x1.d59a33f19ed42p-1, 0x1.00abff4dec7a3p-2 }, + { 0x1.d6986cfa798e7p-1, 0x1.f79183b101c5bp-3 }, + { 0x1.d791cad3eff01p-1, 0x1.edeb406d9c824p-3 }, + { 0x1.d8865d98abe01p-1, 0x1.e4652fadcb6b2p-3 }, + { 0x1.d97635600bb89p-1, 0x1.daff4969c0b04p-3 }, + { 0x1.da61623cb41e0p-1, 0x1.d1b982c501370p-3 }, + { 0x1.db47f43b2980dp-1, 0x1.c893ce1dcbef7p-3 }, + { 0x1.dc29fb60715afp-1, 0x1.bf8e1b1ca2279p-3 }, + { 0x1.dd0787a8bb39dp-1, 0x1.b6a856c3ed54fp-3 }, + { 0x1.dde0a90611a0dp-1, 0x1.ade26b7fbed95p-3 }, + { 0x1.deb56f5f12d28p-1, 0x1.a53c4135a6526p-3 }, + { 0x1.df85ea8db188ep-1, 0x1.9cb5bd549b111p-3 }, + { 0x1.e0522a5dfda73p-1, 0x1.944ec2e4f5630p-3 }, + { 0x1.e11a3e8cf4eb8p-1, 0x1.8c07329874652p-3 }, + { 0x1.e1de36c75ba58p-1, 0x1.83deeada4d25ap-3 }, + { 0x1.e29e22a89d766p-1, 0x1.7bd5c7df3fe9cp-3 }, + { 0x1.e35a11b9b61cep-1, 0x1.73eba3b5b07b7p-3 }, + { 0x1.e4121370224ccp-1, 0x1.6c205655be71fp-3 }, + { 0x1.e4c6372cd8927p-1, 0x1.6473b5b15a7a1p-3 }, + { 0x1.e5768c3b4a3fcp-1, 0x1.5ce595c455b0ap-3 }, + { 0x1.e62321d06c5e0p-1, 0x1.5575c8a468361p-3 }, + { 0x1.e6cc0709c8a0dp-1, 0x1.4e241e912c305p-3 }, + { 0x1.e7714aec96534p-1, 0x1.46f066040a832p-3 }, + { 0x1.e812fc64db369p-1, 0x1.3fda6bc016994p-3 }, + { 0x1.e8b12a44944a8p-1, 0x1.38e1fae1d6a9dp-3 }, + { 0x1.e94be342e6743p-1, 0x1.3206dceef5f87p-3 }, + { 0x1.e9e335fb56f87p-1, 0x1.2b48d9e5dea1cp-3 }, + { 0x1.ea7730ed0bbb9p-1, 0x1.24a7b84d38971p-3 }, + { 0x1.eb07e27a133aap-1, 0x1.1e233d434b813p-3 }, + { 0x1.eb9558e6b42cep-1, 0x1.17bb2c8d41535p-3 }, + { 0x1.ec1fa258c4beap-1, 0x1.116f48a6476ccp-3 }, + { 0x1.eca6ccd709544p-1, 0x1.0b3f52ce8c383p-3 }, + { 0x1.ed2ae6489ac1ep-1, 0x1.052b0b1a174eap-3 }, + { 0x1.edabfc7453e63p-1, 0x1.fe6460fef4680p-4 }, + { 0x1.ee2a1d004692cp-1, 0x1.f2a901ccafb37p-4 }, + { 0x1.eea5557137ae0p-1, 0x1.e723726b824a9p-4 }, + { 0x1.ef1db32a2277cp-1, 0x1.dbd32ac4c99b0p-4 }, + { 0x1.ef93436bc2daap-1, 0x1.d0b7a0f921e7cp-4 }, + { 0x1.f006135426b26p-1, 0x1.c5d0497c09e74p-4 }, + { 0x1.f0762fde45ee6p-1, 0x1.bb1c972f23e50p-4 }, + { 0x1.f0e3a5e1a1788p-1, 0x1.b09bfb7d11a83p-4 }, + { 0x1.f14e8211e8c55p-1, 0x1.a64de673e8837p-4 }, + { 0x1.f1b6d0fea5f4dp-1, 0x1.9c31c6df3b1b8p-4 }, + { 0x1.f21c9f12f0677p-1, 0x1.92470a61b6965p-4 }, + { 0x1.f27ff89525acfp-1, 0x1.888d1d8e510a3p-4 }, + { 0x1.f2e0e9a6a8b09p-1, 0x1.7f036c0107294p-4 }, + { 0x1.f33f7e43a706bp-1, 0x1.75a96077274bap-4 }, + { 0x1.f39bc242e43e6p-1, 0x1.6c7e64e7281cbp-4 }, + { 0x1.f3f5c1558b19ep-1, 0x1.6381e2980956bp-4 }, + { 0x1.f44d870704911p-1, 0x1.5ab342383d177p-4 }, + { 0x1.f4a31ebcd47dfp-1, 0x1.5211ebf41880bp-4 }, + { 0x1.f4f693b67bd77p-1, 0x1.499d478bca735p-4 }, + { 0x1.f547f10d60597p-1, 0x1.4154bc68d75c3p-4 }, + { 0x1.f59741b4b97cfp-1, 0x1.3937b1b319259p-4 }, + { 0x1.f5e4907982a07p-1, 0x1.31458e6542847p-4 }, + { 0x1.f62fe80272419p-1, 0x1.297db960e4f63p-4 }, + { 0x1.f67952cff6282p-1, 0x1.21df9981f8e53p-4 }, + { 0x1.f6c0db3c34641p-1, 0x1.1a6a95b1e786fp-4 }, + { 0x1.f7068b7b10fd9p-1, 0x1.131e14fa1625dp-4 }, + { 0x1.f74a6d9a38383p-1, 0x1.0bf97e95f2a64p-4 }, + { 0x1.f78c8b812d498p-1, 0x1.04fc3a0481321p-4 }, + { 0x1.f7cceef15d631p-1, 0x1.fc4b5e32d6259p-5 }, + { 0x1.f80ba18636f07p-1, 0x1.eeea8c1b1db93p-5 }, + { 0x1.f848acb544e95p-1, 0x1.e1d4cf1e2450ap-5 }, + { 0x1.f88419ce4e184p-1, 0x1.d508f9a1ea64ep-5 }, + { 0x1.f8bdf1fb78370p-1, 0x1.c885df3451a07p-5 }, + { 0x1.f8f63e416ebffp-1, 0x1.bc4a54a84e834p-5 }, + { 0x1.f92d077f8d56dp-1, 0x1.b055303221015p-5 }, + { 0x1.f96256700da8ep-1, 0x1.a4a549829587ep-5 }, + { 0x1.f99633a838a57p-1, 0x1.993979e14fffdp-5 }, + { 0x1.f9c8a7989af0dp-1, 0x1.8e109c4622913p-5 }, + { 0x1.f9f9ba8d3c733p-1, 0x1.83298d717210ep-5 }, + { 0x1.fa2974addae45p-1, 0x1.78832c03aa2b1p-5 }, + { 0x1.fa57ddfe27376p-1, 0x1.6e1c5893c380bp-5 }, + { 0x1.fa84fe5e05c8dp-1, 0x1.63f3f5c4de13bp-5 }, + { 0x1.fab0dd89d1309p-1, 0x1.5a08e85af27e0p-5 }, + { 0x1.fadb831a9f9c3p-1, 0x1.505a174e9c929p-5 }, + { 0x1.fb04f6868a944p-1, 0x1.46e66be002240p-5 }, + { 0x1.fb2d3f20f9101p-1, 0x1.3dacd1a8d8ccdp-5 }, + { 0x1.fb54641aebbc9p-1, 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0x1.fffffffffe380p-1, 0x1.25f9ee0b923dcp-37 }, + { 0x1.fffffffffe5b6p-1, 0x1.0f9a0686531ffp-37 }, + { 0x1.fffffffffe7c0p-1, 0x1.f5cc7718082afp-38 }, + { 0x1.fffffffffe9a2p-1, 0x1.cf7e53d6a2ca5p-38 }, + { 0x1.fffffffffeb60p-1, 0x1.ac0f5f3229372p-38 }, + { 0x1.fffffffffecfbp-1, 0x1.8b498644847eap-38 }, + { 0x1.fffffffffee77p-1, 0x1.6cfa9bcca59dcp-38 }, + { 0x1.fffffffffefd6p-1, 0x1.50f411d4fd2cdp-38 }, + { 0x1.ffffffffff11ap-1, 0x1.370ab8327af5ep-38 }, + { 0x1.ffffffffff245p-1, 0x1.1f167f88c6b6ep-38 }, + { 0x1.ffffffffff359p-1, 0x1.08f24085d4597p-38 }, + { 0x1.ffffffffff457p-1, 0x1.e8f70e181d619p-39 }, + { 0x1.ffffffffff542p-1, 0x1.c324c20e337dcp-39 }, + { 0x1.ffffffffff61bp-1, 0x1.a03261574b54ep-39 }, + { 0x1.ffffffffff6e3p-1, 0x1.7fe903cdf5855p-39 }, + { 0x1.ffffffffff79bp-1, 0x1.6215c58da3450p-39 }, + { 0x1.ffffffffff845p-1, 0x1.46897d4b69fc6p-39 }, + { 0x1.ffffffffff8e2p-1, 0x1.2d1877d731b7bp-39 }, + { 0x1.ffffffffff973p-1, 0x1.159a386b11517p-39 }, + { 0x1.ffffffffff9f8p-1, 0x1.ffd27ae9393cep-40 }, + { 0x1.ffffffffffa73p-1, 0x1.d7c593130dd0bp-40 }, + { 0x1.ffffffffffae4p-1, 0x1.b2cd607c79bcfp-40 }, + { 0x1.ffffffffffb4cp-1, 0x1.90ae4d3405651p-40 }, + { 0x1.ffffffffffbadp-1, 0x1.71312dd1759e2p-40 }, + { 0x1.ffffffffffc05p-1, 0x1.5422ef5d8949dp-40 }, + { 0x1.ffffffffffc57p-1, 0x1.39544b0ecc957p-40 }, + { 0x1.ffffffffffca2p-1, 0x1.20997f73e73ddp-40 }, + { 0x1.ffffffffffce7p-1, 0x1.09ca0eaacd277p-40 }, + { 0x1.ffffffffffd27p-1, 0x1.e9810295890ecp-41 }, + { 0x1.ffffffffffd62p-1, 0x1.c2b45b5aa4a1dp-41 }, + { 0x1.ffffffffffd98p-1, 0x1.9eee068fa7596p-41 }, + { 0x1.ffffffffffdcap-1, 0x1.7df2b399c10a8p-41 }, + { 0x1.ffffffffffdf8p-1, 0x1.5f8b87a31bd85p-41 }, + { 0x1.ffffffffffe22p-1, 0x1.4385c96e9a2d9p-41 }, + { 0x1.ffffffffffe49p-1, 0x1.29b2933ef4cbcp-41 }, + { 0x1.ffffffffffe6cp-1, 0x1.11e68a6378f8ap-41 }, + { 0x1.ffffffffffe8dp-1, 0x1.f7f338086a86bp-42 }, + { 0x1.ffffffffffeabp-1, 0x1.cf8d7d9ce040ap-42 }, + { 0x1.ffffffffffec7p-1, 0x1.aa577251ae484p-42 }, + { 0x1.ffffffffffee1p-1, 0x1.8811d739efb5ep-42 }, + { 0x1.ffffffffffef8p-1, 0x1.68823e52970bep-42 }, + { 0x1.fffffffffff0ep-1, 0x1.4b72ae68e8b4cp-42 }, + { 0x1.fffffffffff22p-1, 0x1.30b14dbe876bcp-42 }, + { 0x1.fffffffffff34p-1, 0x1.181012ef86610p-42 }, + { 0x1.fffffffffff45p-1, 0x1.01647ba798744p-42 }, + { 0x1.fffffffffff54p-1, 0x1.d90e917701675p-43 }, + { 0x1.fffffffffff62p-1, 0x1.b2a87e86d0c8ap-43 }, + { 0x1.fffffffffff6fp-1, 0x1.8f53dcb377293p-43 }, + { 0x1.fffffffffff7bp-1, 0x1.6ed2f2515e933p-43 }, + { 0x1.fffffffffff86p-1, 0x1.50ecc9ed47f19p-43 }, + { 0x1.fffffffffff90p-1, 0x1.356cd5ce7799ep-43 }, + { 0x1.fffffffffff9ap-1, 0x1.1c229a587ab78p-43 }, + { 0x1.fffffffffffa2p-1, 0x1.04e15ecc7f3f6p-43 }, + { 0x1.fffffffffffaap-1, 0x1.deffc7e6a6017p-44 }, + { 0x1.fffffffffffb1p-1, 0x1.b7b040832f310p-44 }, + { 0x1.fffffffffffb8p-1, 0x1.938e021f36d76p-44 }, + { 0x1.fffffffffffbep-1, 0x1.7258610b3b233p-44 }, + { 0x1.fffffffffffc3p-1, 0x1.53d3bfc82a909p-44 }, + { 0x1.fffffffffffc8p-1, 0x1.37c92babdc2fdp-44 }, + { 0x1.fffffffffffcdp-1, 0x1.1e06010120f6ap-44 }, + { 0x1.fffffffffffd1p-1, 0x1.065b9616170d4p-44 }, + { 0x1.fffffffffffd5p-1, 0x1.e13dd96b3753ap-45 }, + { 0x1.fffffffffffd9p-1, 0x1.b950d32467392p-45 }, + { 0x1.fffffffffffdcp-1, 0x1.94a72263259a5p-45 }, + { 0x1.fffffffffffdfp-1, 0x1.72fd93e036cdcp-45 }, + { 0x1.fffffffffffe2p-1, 0x1.54164576929abp-45 }, + { 0x1.fffffffffffe4p-1, 0x1.37b83c521fe96p-45 }, + { 0x1.fffffffffffe7p-1, 0x1.1daf033182e96p-45 }, + { 0x1.fffffffffffe9p-1, 0x1.05ca50205d26ap-45 }, + { 0x1.fffffffffffebp-1, 0x1.dfbb6235639fap-46 }, + { 0x1.fffffffffffedp-1, 0x1.b7807e294781fp-46 }, + { 0x1.fffffffffffeep-1, 0x1.9298add70a734p-46 }, + { 0x1.ffffffffffff0p-1, 0x1.70beaf9c7ffb6p-46 }, + { 0x1.ffffffffffff1p-1, 0x1.51b2cd6709222p-46 }, + { 0x1.ffffffffffff3p-1, 0x1.353a6cf7f7fffp-46 }, + { 0x1.ffffffffffff4p-1, 0x1.1b1fa8cbe84a7p-46 }, + { 0x1.ffffffffffff5p-1, 0x1.0330f0fd69921p-46 }, + { 0x1.ffffffffffff6p-1, 0x1.da81670f96f9bp-47 }, + { 0x1.ffffffffffff7p-1, 0x1.b24a16b4d09aap-47 }, + { 0x1.ffffffffffff7p-1, 0x1.8d6eeb6efdbd6p-47 }, + { 0x1.ffffffffffff8p-1, 0x1.6ba91ac734785p-47 }, + { 0x1.ffffffffffff9p-1, 0x1.4cb7966770ab5p-47 }, + { 0x1.ffffffffffff9p-1, 0x1.305e9721d0981p-47 }, + { 0x1.ffffffffffffap-1, 0x1.1667311fff70ap-47 }, + { 0x1.ffffffffffffbp-1, 0x1.fd3de10d62855p-48 }, + { 0x1.ffffffffffffbp-1, 0x1.d1aefbcd48d0cp-48 }, + { 0x1.ffffffffffffbp-1, 0x1.a9cc93c25aca9p-48 }, + { 0x1.ffffffffffffcp-1, 0x1.85487ee3ea735p-48 }, + { 0x1.ffffffffffffcp-1, 0x1.63daf8b4b1e0cp-48 }, + { 0x1.ffffffffffffdp-1, 0x1.45421e69a6ca1p-48 }, + { 0x1.ffffffffffffdp-1, 0x1.294175802d99ap-48 }, + { 0x1.ffffffffffffdp-1, 0x1.0fa17bf41068fp-48 }, + { 0x1.ffffffffffffdp-1, 0x1.f05e82aae2bb9p-49 }, + { 0x1.ffffffffffffep-1, 0x1.c578101b29058p-49 }, + { 0x1.ffffffffffffep-1, 0x1.9e39dc5dd2f7cp-49 }, + { 0x1.ffffffffffffep-1, 0x1.7a553a728bbf2p-49 }, + { 0x1.ffffffffffffep-1, 0x1.5982008db1304p-49 }, + { 0x1.ffffffffffffep-1, 0x1.3b7e00422e51bp-49 }, + { 0x1.ffffffffffffep-1, 0x1.200c898d9ee3ep-49 }, + { 0x1.fffffffffffffp-1, 0x1.06f5f7eb65a56p-49 }, + { 0x1.fffffffffffffp-1, 0x1.e00e9148a1d25p-50 }, + { 0x1.fffffffffffffp-1, 0x1.b623734024e92p-50 }, + { 0x1.fffffffffffffp-1, 0x1.8fd4e01891bf8p-50 }, + { 0x1.fffffffffffffp-1, 0x1.6cd44c7470d89p-50 }, + { 0x1.fffffffffffffp-1, 0x1.4cd9c04158cd7p-50 }, + { 0x1.fffffffffffffp-1, 0x1.2fa34bf5c8344p-50 }, + { 0x1.fffffffffffffp-1, 0x1.14f4890ff2461p-50 }, + { 0x1.fffffffffffffp-1, 0x1.f92c49dfa4df5p-51 }, + { 0x1.fffffffffffffp-1, 0x1.ccaaea71ab0dfp-51 }, + { 0x1.fffffffffffffp-1, 0x1.a40829f001197p-51 }, + { 0x1.0000000000000p+0, 0x1.7eef13b59e96cp-51 }, + { 0x1.0000000000000p+0, 0x1.5d11e1a252bf5p-51 }, + { 0x1.0000000000000p+0, 0x1.3e296303b2297p-51 }, + { 0x1.0000000000000p+0, 0x1.21f47009f43cep-51 }, + { 0x1.0000000000000p+0, 0x1.083768c5e4541p-51 }, + { 0x1.0000000000000p+0, 0x1.e1777d831265ep-52 }, + { 0x1.0000000000000p+0, 0x1.b69f10b0191b5p-52 }, + { 0x1.0000000000000p+0, 0x1.8f8a3a05b5b52p-52 }, + { 0x1.0000000000000p+0, 0x1.6be573c40c8e7p-52 }, + { 0x1.0000000000000p+0, 0x1.4b645ba991fdbp-52 }, + { 0x1.0000000000000p+0, 0x1.2dc119095729fp-52 }, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/erfc_1u8.c b/contrib/arm-optimized-routines/pl/math/erfc_1u8.c new file mode 100644 index 000000000000..7f2004e9335d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfc_1u8.c @@ -0,0 +1,153 @@ +/* + * Double-precision erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Shift 0x1p45 +#define P20 0x1.5555555555555p-2 /* 1/3. */ +#define P21 0x1.5555555555555p-1 /* 2/3. */ + +#define P40 0x1.999999999999ap-4 /* 1/10. */ +#define P41 0x1.999999999999ap-2 /* 2/5. */ +#define P42 0x1.11111111111111p-3 /* 2/15. */ + +#define P50 0x1.5555555555555p-3 /* 1/6. */ +#define P51 0x1.c71c71c71c71cp-3 /* 2/9. */ +#define P52 0x1.6c16c16c16c17p-5 /* 2/45. */ + +/* Qi = (i+1) / i. */ +#define Q5 0x1.3333333333333p0 +#define Q6 0x1.2aaaaaaaaaaabp0 +#define Q7 0x1.2492492492492p0 +#define Q8 0x1.2p0 +#define Q9 0x1.1c71c71c71c72p0 + +/* Ri = -2 * i / ((i+1)*(i+2)). */ +#define R5 -0x1.e79e79e79e79ep-3 +#define R6 -0x1.b6db6db6db6dbp-3 +#define R7 -0x1.8e38e38e38e39p-3 +#define R8 -0x1.6c16c16c16c17p-3 +#define R9 -0x1.4f2094f2094f2p-3 + +/* Fast erfc approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + - r * (2/45 r^4 - 2/9 r^2 + 1/6) d^5 + + p6(r) d^6 + ... + p10(r) d^10 + + Polynomials p6(r) to p10(r) are computed using recurrence relation + + 2(i+1)p_i + 2r(i+2)p_{i+1} + (i+2)(i+3)p_{i+2} = 0, + with p0 = 1, and p1(r) = -r. + + Values of erfc(r) and scale(r) are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + + Maximum measured error: 1.71 ULP + erfc(0x1.46cfe976733p+4) got 0x1.e15fcbea3e7afp-608 + want 0x1.e15fcbea3e7adp-608. */ +double +erfc (double x) +{ + /* Get top words and sign. */ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & 0x7fffffffffffffff; + double a = asdouble (ia); + uint64_t sign = ix & ~0x7fffffffffffffff; + + /* erfc(nan)=nan, erfc(+inf)=0 and erfc(-inf)=2. */ + if (unlikely (ia >= 0x7ff0000000000000)) + return asdouble (sign >> 1) + 1.0 / x; /* Special cases. */ + + /* Return early for large enough negative values. */ + if (x < -6.0) + return 2.0; + + /* For |x| < 3487.0/128.0, the following approximation holds. */ + if (likely (ia < 0x403b3e0000000000)) + { + /* |x| < 0x1p-511 => accurate to 0.5 ULP. */ + if (unlikely (ia < asuint64 (0x1p-511))) + return 1.0 - x; + + /* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 1 and scale + to 2/sqrt(pi), when x reduced to r = 0. */ + double z = a + Shift; + uint64_t i = asuint64 (z); + double r = z - Shift; + /* These values are scaled by 2^128. */ + double erfcr = __erfc_data.tab[i].erfc; + double scale = __erfc_data.tab[i].scale; + + /* erfc(x) ~ erfc(r) - scale * d * poly (r, d). */ + double d = a - r; + double d2 = d * d; + double r2 = r * r; + /* Compute p_i as a regular (low-order) polynomial. */ + double p1 = -r; + double p2 = fma (P21, r2, -P20); + double p3 = -r * fma (P20, r2, -0.5); + double p4 = fma (fma (P42, r2, -P41), r2, P40); + double p5 = -r * fma (fma (P52, r2, -P51), r2, P50); + /* Compute p_i using recurrence relation: + p_{i+2} = (p_i + r * Q_{i+1} * p_{i+1}) * R_{i+1}. */ + double p6 = fma (Q5 * r, p5, p4) * R5; + double p7 = fma (Q6 * r, p6, p5) * R6; + double p8 = fma (Q7 * r, p7, p6) * R7; + double p9 = fma (Q8 * r, p8, p7) * R8; + double p10 = fma (Q9 * r, p9, p8) * R9; + /* Compute polynomial in d using pairwise Horner scheme. */ + double p90 = fma (p10, d, p9); + double p78 = fma (p8, d, p7); + double p56 = fma (p6, d, p5); + double p34 = fma (p4, d, p3); + double p12 = fma (p2, d, p1); + double y = fma (p90, d2, p78); + y = fma (y, d2, p56); + y = fma (y, d2, p34); + y = fma (y, d2, p12); + + y = fma (-fma (y, d2, d), scale, erfcr); + + /* Handle sign and scale back in a single fma. */ + double off = asdouble (sign >> 1); + double fac = asdouble (asuint64 (0x1p-128) | sign); + y = fma (y, fac, off); + + if (unlikely (x > 26.0)) + { + /* The underflow exception needs to be signaled explicitly when + result gets into the subnormal range. */ + if (unlikely (y < 0x1p-1022)) + force_eval_double (opt_barrier_double (0x1p-1022) * 0x1p-1022); + /* Set errno to ERANGE if result rounds to 0. */ + return __math_check_uflow (y); + } + + return y; + } + /* Above the threshold (x > 3487.0/128.0) erfc is constant and needs to raise + underflow exception for positive x. */ + return __math_uflow (0); +} + +PL_SIG (S, D, 1, erfc, -6.0, 28.0) +PL_TEST_ULP (erfc, 1.21) +PL_TEST_SYM_INTERVAL (erfc, 0, 0x1p-26, 40000) +PL_TEST_INTERVAL (erfc, 0x1p-26, 28.0, 100000) +PL_TEST_INTERVAL (erfc, -0x1p-26, -6.0, 100000) +PL_TEST_INTERVAL (erfc, 28.0, inf, 40000) +PL_TEST_INTERVAL (erfc, -6.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erfc_data.c b/contrib/arm-optimized-routines/pl/math/erfc_data.c new file mode 100644 index 000000000000..40f72a4d6d5b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfc_data.c @@ -0,0 +1,3507 @@ +/* + * Data used in double-precision erfc(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in erfc. + For each possible rounded input r (multiples of 1/128), between + r = 0.0 and r = ~27.0 (3488 values): + - the first entry __erfc_data.tab.erfc contains the values of erfc(r), + - the second entry __erfc_data.tab.scale contains the values of + 2/sqrt(pi)*exp(-r^2). Both values may go into subnormal range, therefore + they are scaled by a large enough value 2^128 (fits in 8bit). */ +const struct erfc_data __erfc_data = { + .tab = { { 0x1p128, 0x1.20dd750429b6dp128 }, + { 0x1.fb7c9030853b3p127, 0x1.20d8f1975c85dp128 }, + { 0x1.f6f9447be0743p127, 0x1.20cb67bd452c7p128 }, + { 0x1.f27640f9853d9p127, 0x1.20b4d8bac36c1p128 }, + { 0x1.edf3a9ba22dadp127, 0x1.209546ad13ccfp128 }, + { 0x1.e971a2c4436aep127, 0x1.206cb4897b148p128 }, + { 0x1.e4f05010eca8cp127, 0x1.203b261cd0053p128 }, + { 0x1.e06fd58842c7ep127, 0x1.2000a00ae3804p128 }, + { 0x1.dbf056fe2df35p127, 0x1.1fbd27cdc72d3p128 }, + { 0x1.d771f82f02f4ep127, 0x1.1f70c3b4f2cc8p128 }, + { 0x1.d2f4dcbc2f894p127, 0x1.1f1b7ae44867fp128 }, + { 0x1.ce792828eae5cp127, 0x1.1ebd5552f795bp128 }, + { 0x1.c9fefdd6eaf19p127, 0x1.1e565bca400d4p128 }, + { 0x1.c58681031eb6ap127, 0x1.1de697e413d29p128 }, + { 0x1.c10fd4c26e896p127, 0x1.1d6e14099944ap128 }, + { 0x1.bc9b1bfe82687p127, 0x1.1cecdb718d61cp128 }, + { 0x1.b82879728f11ep127, 0x1.1c62fa1e869b6p128 }, + { 0x1.b3b80fa82a4bbp127, 0x1.1bd07cdd189acp128 }, + { 0x1.af4a00f426daap127, 0x1.1b357141d95d5p128 }, + { 0x1.aade6f7378a0ep127, 0x1.1a91e5a748165p128 }, + { 0x1.a6757d08215d8p127, 0x1.19e5e92b964abp128 }, + { 0x1.a20f4b5626818p127, 0x1.19318bae53a04p128 }, + { 0x1.9dabfbc090901p127, 0x1.1874ddcdfce24p128 }, + { 0x1.994baf66747adp127, 0x1.17aff0e56ec1p128 }, + { 0x1.94ee8720076b6p127, 0x1.16e2d7093cd8cp128 }, + { 0x1.9094a37bbd66ep127, 0x1.160da304ed92fp128 }, + { 0x1.8c3e24bb73372p127, 0x1.153068581b781p128 }, + { 0x1.87eb2ad1a4032p127, 0x1.144b3b337c90cp128 }, + { 0x1.839bd55eaafc8p127, 0x1.135e3075d076bp128 }, + { 0x1.7f5043ae11862p127, 0x1.12695da8b5bdep128 }, + { 0x1.7b0894b3ea35cp127, 0x1.116cd8fd67618p128 }, + { 0x1.76c4e70a390e7p127, 0x1.1068b94962e5ep128 }, + { 0x1.728558ee694fcp127, 0x1.0f5d1602f7e41p128 }, + { 0x1.6e4a083ed132fp127, 0x1.0e4a073dc1b91p128 }, + { 0x1.6a13127843ec1p127, 0x1.0d2fa5a70c168p128 }, + { 0x1.65e094b3b2413p127, 0x1.0c0e0a8223359p128 }, + { 0x1.61b2aba3da093p127, 0x1.0ae54fa490723p128 }, + { 0x1.5d89739304dcfp127, 0x1.09b58f724416bp128 }, + { 0x1.59650860d6469p127, 0x1.087ee4d9ad247p128 }, + { 0x1.5545858029b39p127, 0x1.07416b4fbfe7cp128 }, + { 0x1.512b05f5006e1p127, 0x1.05fd3ecbec298p128 }, + { 0x1.4d15a4527fdc7p127, 0x1.04b27bc403d3p128 }, + { 0x1.49057ab900447p127, 0x1.03613f2812dafp128 }, + { 0x1.44faa2d42c4ap127, 0x1.0209a65e29545p128 }, + { 0x1.40f535d93160ep127, 0x1.00abcf3e187a9p128 }, + { 0x1.3cf54c850162p127, 0x1.fe8fb01a47307p127 }, + { 0x1.38faff1aa574ap127, 0x1.fbbbbef34b4b2p127 }, + { 0x1.35066561a275dp127, 0x1.f8dc092d58ff8p127 }, + { 0x1.311796a46f064p127, 0x1.f5f0cdaf15313p127 }, + { 0x1.2d2ea9aefb636p127, 0x1.f2fa4c16c0019p127 }, + { 0x1.294bb4cd4b2bdp127, 0x1.eff8c4b1375dbp127 }, + { 0x1.256ecdca212ccp127, 0x1.ecec7870ebca8p127 }, + { 0x1.219809edbd524p127, 0x1.e9d5a8e4c934ep127 }, + { 0x1.1dc77dfcacd02p127, 0x1.e6b4982f158b9p127 }, + { 0x1.19fd3e36ac96ap127, 0x1.e38988fc46e72p127 }, + { 0x1.16395e559e218p127, 0x1.e054be79d3042p127 }, + { 0x1.127bf18c8eadcp127, 0x1.dd167c4cf9d2ap127 }, + { 0x1.0ec50a86d0dd4p127, 0x1.d9cf06898cdafp127 }, + { 0x1.0b14bb6728cd8p127, 0x1.d67ea1a8b5368p127 }, + { 0x1.076b15c70aa28p127, 0x1.d325927fb9d89p127 }, + { 0x1.03c82ab5eb831p127, 0x1.cfc41e36c7df9p127 }, + { 0x1.002c0ab8a5018p127, 0x1.cc5a8a3fbea4p127 }, + { 0x1.f92d8b91d5cc7p126, 0x1.c8e91c4d01368p127 }, + { 0x1.f210d6a9a6a31p126, 0x1.c5701a484ef9dp127 }, + { 0x1.eb02147ce245cp126, 0x1.c1efca49a5011p127 }, + { 0x1.e40161b701275p126, 0x1.be68728e29d5ep127 }, + { 0x1.dd0ed9ea4bdd6p126, 0x1.bada596f25436p127 }, + { 0x1.d62a978f7c957p126, 0x1.b745c55905bf8p127 }, + { 0x1.cf54b4058455fp126, 0x1.b3aafcc27502ep127 }, + { 0x1.c88d479173ccep126, 0x1.b00a46237d5bep127 }, + { 0x1.c1d4695e87644p126, 0x1.ac63e7ecc1411p127 }, + { 0x1.bb2a2f7e5652p126, 0x1.a8b8287ec6a09p127 }, + { 0x1.b48eaee924501p126, 0x1.a5074e215762p127 }, + { 0x1.ae01fb7e55a66p126, 0x1.a1519efaf889ep127 }, + { 0x1.a78428050527ep126, 0x1.9d97610879642p127 }, + { 0x1.a115462cbbc17p126, 0x1.99d8da149c13fp127 }, + { 0x1.9ab5668e4930ap126, 0x1.96164fafd8de3p127 }, + { 0x1.946498acbd766p126, 0x1.925007283d7aap127 }, + { 0x1.8e22eaf68291ep126, 0x1.8e86458169af8p127 }, + { 0x1.87f06ac6960c4p126, 0x1.8ab94f6caa71dp127 }, + { 0x1.81cd2465e1d96p126, 0x1.86e9694134b9ep127 }, + { 0x1.7bb9230cb40b4p126, 0x1.8316d6f48133dp127 }, + { 0x1.75b470e454d35p126, 0x1.7f41dc12c9e89p127 }, + { 0x1.6fbf1708ba47cp126, 0x1.7b6abbb7aaf19p127 }, + { 0x1.69d91d8a595dap126, 0x1.7791b886e7403p127 }, + { 0x1.64028b7013867p126, 0x1.73b714a552763p127 }, + { 0x1.5e3b66b9405a9p126, 0x1.6fdb11b1e0c34p127 }, + { 0x1.5883b45fd2b63p126, 0x1.6bfdf0beddaf5p127 }, + { 0x1.52db785a98acap126, 0x1.681ff24b4ab04p127 }, + { 0x1.4d42b59f95afap126, 0x1.6441563c665d4p127 }, + { 0x1.47b96e267647ap126, 0x1.60625bd75d07bp127 }, + { 0x1.423fa2eb1cb59p126, 0x1.5c8341bb23767p127 }, + { 0x1.3cd553f045d45p126, 0x1.58a445da7c74cp127 }, + { 0x1.377a8042458d1p126, 0x1.54c5a57629dbp127 }, + { 0x1.322f25f9da2fdp126, 0x1.50e79d1749ac9p127 }, + { 0x1.2cf3423f15fdfp126, 0x1.4d0a6889dfd9fp127 }, + { 0x1.27c6d14c5e341p126, 0x1.492e42d78d2c5p127 }, + { 0x1.22a9ce717edcbp126, 0x1.4553664273d24p127 }, + { 0x1.1d9c3416d2b4bp126, 0x1.417a0c4049fdp127 }, + { 0x1.189dfbc07e69p126, 0x1.3da26d759aef5p127 }, + { 0x1.13af1e11be721p126, 0x1.39ccc1b136d5ap127 }, + { 0x1.0ecf92d046d22p126, 0x1.35f93fe7d1b3dp127 }, + { 0x1.09ff50e7b3f93p126, 0x1.32281e2fd1a92p127 }, + { 0x1.053e4e6d0c10bp126, 0x1.2e5991bd4cbfcp127 }, + { 0x1.008c80a24ff1p126, 0x1.2a8dcede3673bp127 }, + { 0x1.f7d3b7f436013p125, 0x1.26c508f6bd0ffp127 }, + { 0x1.eeaca836a27ccp125, 0x1.22ff727dd6f7bp127 }, + { 0x1.e5a3b7c9b56dap125, 0x1.1f3d3cf9ffe5ap127 }, + { 0x1.dcb8cae2d747fp125, 0x1.1b7e98fe26217p127 }, + { 0x1.d3ebc436b0f26p125, 0x1.17c3b626c7a12p127 }, + { 0x1.cb3c8500ea349p125, 0x1.140cc3173f007p127 }, + { 0x1.c2aaed0bfcfeep125, 0x1.1059ed7740313p127 }, + { 0x1.ba36dab91c0e9p125, 0x1.0cab61f084b93p127 }, + { 0x1.b1e02b082b72p125, 0x1.09014c2ca74dap127 }, + { 0x1.a9a6b99fc973bp125, 0x1.055bd6d32e8d7p127 }, + { 0x1.a18a60d56673ep125, 0x1.01bb2b87c6968p127 }, + { 0x1.998af9b56a3aep125, 0x1.fc3ee5d1524bp126 }, + { 0x1.91a85c0b65519p125, 0x1.f511a91a67d2ap126 }, + { 0x1.89e25e6a4cef9p125, 0x1.edeeee0959518p126 }, + { 0x1.8238d634c0127p125, 0x1.e6d6ffaa65a25p126 }, + { 0x1.7aab97a554544p125, 0x1.dfca26f5bbf88p126 }, + { 0x1.733a75d6e91b8p125, 0x1.d8c8aace11e63p126 }, + { 0x1.6be542ccffc2fp125, 0x1.d1d2cfff91594p126 }, + { 0x1.64abcf7c175b4p125, 0x1.cae8d93f1d7b7p126 }, + { 0x1.5d8debd20aacep125, 0x1.c40b0729ed548p126 }, + { 0x1.568b66be6f268p125, 0x1.bd3998457afdbp126 }, + { 0x1.4fa40e3af3674p125, 0x1.b674c8ffc6283p126 }, + { 0x1.48d7af53bc19fp125, 0x1.afbcd3afe8ab6p126 }, + { 0x1.4226162fbddd5p125, 0x1.a911f096fbc26p126 }, + { 0x1.3b8f0e1912f7p125, 0x1.a27455e14c93cp126 }, + { 0x1.351261854b991p125, 0x1.9be437a7de946p126 }, + { 0x1.2eafda1db784ap125, 0x1.9561c7f23a47bp126 }, + { 0x1.286740c7a7dabp125, 0x1.8eed36b886d93p126 }, + { 0x1.22385daca7f47p125, 0x1.8886b1e5ecfd1p126 }, + { 0x1.1c22f842ac1f2p125, 0x1.822e655b417e7p126 }, + { 0x1.1626d7543522p125, 0x1.7be47af1f5d89p126 }, + { 0x1.1043c1086777dp125, 0x1.75a91a7f4d2edp126 }, + { 0x1.0a797aeb152f2p125, 0x1.6f7c69d7d3ef8p126 }, + { 0x1.04c7c9f4b969p125, 0x1.695e8cd31867ep126 }, + { 0x1.fe5ce524c8ee5p124, 0x1.634fa54fa285fp126 }, + { 0x1.f35a715b2f3e1p124, 0x1.5d4fd33729015p126 }, + { 0x1.e887bf681f218p124, 0x1.575f3483021c3p126 }, + { 0x1.dde4553ef94dep124, 0x1.517de540ce2a3p126 }, + { 0x1.d36fb7fa50177p124, 0x1.4babff975a04cp126 }, + { 0x1.c9296beb09cf1p124, 0x1.45e99bcbb7915p126 }, + { 0x1.bf10f4a759889p124, 0x1.4036d0468a7a2p126 }, + { 0x1.b525d5198cb1cp124, 0x1.3a93b1998736cp126 }, + { 0x1.ab678f8eabedbp124, 0x1.35005285227f1p126 }, + { 0x1.a1d5a5c4edb96p124, 0x1.2f7cc3fe6f423p126 }, + { 0x1.986f98f9f96c8p124, 0x1.2a09153529381p126 }, + { 0x1.8f34e9f8f93a6p124, 0x1.24a55399ea239p126 }, + { 0x1.8625192879e39p124, 0x1.1f518ae487dc8p126 }, + { 0x1.7d3fa69816db5p124, 0x1.1a0dc51a9934dp126 }, + { 0x1.7484120df1b01p124, 0x1.14da0a961fd14p126 }, + { 0x1.6bf1db13f3983p124, 0x1.0fb6620c550afp126 }, + { 0x1.63888104d811ap124, 0x1.0aa2d09497f2bp126 }, + { 0x1.5b478318ff939p124, 0x1.059f59af7a906p126 }, + { 0x1.532e6073095f2p124, 0x1.00abff4dec7a3p126 }, + { 0x1.4b3c982c338c7p124, 0x1.f79183b101c5bp125 }, + { 0x1.4371a960807f8p124, 0x1.edeb406d9c825p125 }, + { 0x1.3bcd133aa0ffcp124, 0x1.e4652fadcb6b2p125 }, + { 0x1.344e54ffa23b9p124, 0x1.daff4969c0b04p125 }, + { 0x1.2cf4ee1a5f0fcp124, 0x1.d1b982c50137p125 }, + { 0x1.25c05e26b3f99p124, 0x1.c893ce1dcbef7p125 }, + { 0x1.1eb024fc75285p124, 0x1.bf8e1b1ca2279p125 }, + { 0x1.17c3c2ba26319p124, 0x1.b6a856c3ed54fp125 }, + { 0x1.10fab7cf72f94p124, 0x1.ade26b7fbed95p125 }, + { 0x1.0a548507696cp124, 0x1.a53c4135a6526p125 }, + { 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0x1.8c9c8347a2863p-833, 0x1.3f1926f0c2aa4p-827 }, + { 0x1.093c166d47d9p-833, 0x1.aaecb94ca24e1p-828 }, + { 0x1.62b5957e6b822p-834, 0x1.1d8efbbc88d6cp-828 }, + { 0x1.da4f3c5b8c56fp-835, 0x1.7df554174928cp-829 }, + { 0x1.3d1457a1afdaep-835, 0x1.fed6b4a9440a8p-830 }, + { 0x1.a7e3665ffae25p-836, 0x1.558fae0fed7aap-830 }, + { 0x1.1b4da97b89113p-836, 0x1.c8b307e047613p-831 }, + { 0x1.7aa46b2ec675cp-837, 0x1.3149a005e5984p-831 }, + { 0x1.fa00e080e536p-838, 0x1.9819329634547p-832 }, + { 0x1.520f92dcad4a2p-838, 0x1.10bba52994e8ep-832 }, + { 0x1.c3a9666328faap-839, 0x1.6c7dd2d93c0f9p-833 }, + { 0x1.2dae795ce73b6p-839, 0x1.e70fd5d6d806dp-834 }, + { 0x1.92f5963d343cfp-840, 0x1.45629dffe1fa7p-834 }, + { 0x1.0d15f439254bep-840, 0x1.b2b2e959996bp-835 }, + { 0x1.675546ac2c967p-841, 0x1.2255364dfcfd7p-835 }, + { 0x1.dfca1ff236f02p-842, 0x1.83c6a3841fccap-836 }, + { 0x1.4046155930cfbp-842, 0x1.02ee197efc99dp-836 }, + { 0x1.ab8846c89a496p-843, 0x1.59bfc8bdbfffep-837 }, + { 0x1.1d5226b496f7ep-843, 0x1.cd9f4c973304p-838 }, + { 0x1.7cc7edd2bedd1p-844, 0x1.3420703d360eap-838 }, + { 0x1.fc1e021531b11p-845, 0x1.9b4a6e4580455p-839 }, + { 0x1.52f9fd29afa7bp-845, 0x1.1276cde31355ep-839 }, + { 0x1.c439018f9e7bp-846, 0x1.6e44a0da72dedp-840 }, + { 0x1.2d9d4a3bfacfap-846, 0x1.e8b82d35e9882p-841 }, + { 0x1.9247c7d6b7109p-847, 0x1.4603c1a2de688p-841 }, + { 0x1.0c3d4d5746632p-847, 0x1.b2e6fa531d555p-842 }, + { 0x1.65add59367765p-848, 0x1.220b241172407p-842 }, + { 0x1.dce1e8301e6efp-849, 0x1.82d28ae825549p-843 }, + { 0x1.3dde18cb97a8dp-849, 0x1.01ea51e3f541cp-843 }, + { 0x1.a7b31ccb0b2f4p-850, 0x1.57e3d8e31e749p-844 }, + { 0x1.1a59798dd7aa2p-850, 0x1.ca77ce984ce61p-845 }, + { 0x1.7843a7981f8e3p-851, 0x1.3192c63185ef2p-845 }, + { 0x1.f55b0f3ffe463p-852, 0x1.974911a73b1a7p-846 }, + { 0x1.4df9fe655b0fbp-852, 0x1.0f64b579273f6p-846 }, + { 0x1.bce68ce6bcfedp-853, 0x1.69a3e1bad13dap-847 }, + { 0x1.284bfe1cdea24p-853, 0x1.e1d6859c11527p-848 }, + { 0x1.8a9c29acbf47dp-854, 0x1.40f425a16dca3p-848 }, + { 0x1.06bd70b72892bp-854, 0x1.ab8633790b1e2p-849 }, + { 0x1.5dd55c1a48477p-855, 0x1.1cb4a43b9229fp-849 }, + { 0x1.d1bd6b173b9f2p-856, 0x1.7b25cc6523c3bp-850 }, + { 0x1.35fc8451ff49ep-856, 0x1.f8db2dc70232bp-851 }, + { 0x1.9c9712232f548p-857, 0x1.5014bc06e7f91p-851 }, + { 0x1.128b47439dcd5p-857, 0x1.bf66ba3b9066cp-852 }, + { 0x1.6d53d2be0a0b6p-858, 0x1.29c2c1dc958dbp-852 }, + { 0x1.e6122171333dfp-859, 0x1.8c4a9d76af90fp-853 }, + { 0x1.435229d0cc681p-859, 0x1.07ae5a7347d0bp-853 }, + { 0x1.ae1371b74ea2dp-860, 0x1.5ed9539dfd0c9p-854 }, + { 0x1.1e01427183001p-860, 0x1.d2c69c7599edcp-855 }, + { 0x1.7c589442700ecp-861, 0x1.3677341a98a13p-855 }, + { 0x1.f9be9e1d7b4e4p-862, 0x1.9cf2c5625685ep-856 }, + { 0x1.5033c96eb757p-862, 0x1.1298aebe8af0fp-856 }, + { 0x1.bef014f36ffa9p-863, 0x1.6d2655c8560ebp-857 }, + { 0x1.290979be09b3bp-863, 0x1.e58166789d0bcp-858 }, + { 0x1.8ac6ba86dcc3cp-864, 0x1.42b9e90b536b6p-858 }, + { 0x1.064e638fb2517p-864, 0x1.acfe7e64002b1p-859 }, + { 0x1.5c884857d8adep-865, 0x1.1d179e12ade6ep-859 }, + { 0x1.cf0beaeb1b319p-866, 0x1.7ae01eb0f55cbp-860 }, + { 0x1.338e29511ffcdp-866, 0x1.f772a9e0423a1p-861 }, + { 0x1.9881a23b2ff9bp-867, 0x1.4e72e15f0f016p-861 }, + { 0x1.0f43798c4f845p-867, 0x1.bc4e2f5a8c9afp-862 }, + { 0x1.6836e63bd7d88p-868, 0x1.27165d875ec78p-862 }, + { 0x1.de466f9c32fdap-869, 0x1.87eb54ae1860dp-863 }, + { 0x1.3d79f883687bfp-869, 0x1.043b38d103ec9p-863 }, + { 0x1.a56d48500b8a3p-870, 0x1.598a7d65e3b67p-864 }, + { 0x1.17ac327f9b5e5p-870, 0x1.cac2d1ee89db1p-865 }, + { 0x1.73278f241bb95p-871, 0x1.308090afcd9f3p-865 }, + { 0x1.ec801820c3f3dp-872, 0x1.942d41e7bf2a3p-866 }, + { 0x1.46b841565ab3ep-872, 0x1.0c34dc595f4bfp-866 }, + { 0x1.b16ea850bfa34p-873, 0x1.63e9cb83e74b2p-867 }, + { 0x1.1f76e44abf0ecp-873, 0x1.d83e5a3ffd7adp-868 }, + { 0x1.7d432d7dd0ca1p-874, 0x1.39428e0fd00c5p-868 }, + { 0x1.f99abec00b682p-875, 0x1.9f8c2eadfb109p-869 }, + { 0x1.4f35579392d4bp-875, 0x1.13957092e7741p-869 }, + { 0x1.bc6c19eee10e8p-876, 0x1.6d7ad6ac744f9p-870 }, + { 0x1.2692d6adc530fp-876, 0x1.e4a41e3c393c2p-871 }, + { 0x1.8673fad41c337p-877, 0x1.4149a31665d1ep-871 }, + { 0x1.02bd066e6e446p-877, 0x1.a9efbad7c9909p-872 }, + { 0x1.56dece3f159c3p-878, 0x1.1a4d14ca40e6p-872 }, + { 0x1.c64dabfd6babdp-879, 0x1.7628f37011dc7p-873 }, + { 0x1.2cf07ed3ac7cap-879, 0x1.efd93aae49244p-874 }, + { 0x1.8ea5cdb1b77f8p-880, 0x1.4884565714d83p-874 }, + { 0x1.0801f05da3babp-880, 0x1.b341347ab9d2ep-875 }, + { 0x1.5da3ba0723cbcp-881, 0x1.204d0f497ca7dp-875 }, + { 0x1.cefd7b19fc691p-882, 0x1.7de10a24a9be3p-876 }, + { 0x1.3281b7ca3d771p-882, 0x1.f9c4f419d97b9p-877 }, + { 0x1.95c663259c5d8p-883, 0x1.4ee2a6bb63f1dp-877 }, + { 0x1.0c90568fe453bp-883, 0x1.bb6bea4d790c6p-878 }, + { 0x1.6374ef6370a23p-884, 0x1.258802fee3a1bp-878 }, + { 0x1.d668024e6e773p-885, 0x1.8491dcb50d65p-879 }, + { 0x1.3739f6c74a992p-885, 0x1.012888bcf5e1bp-879 }, + { 0x1.9bc5a2748239p-886, 0x1.5456466d99824p-880 }, + { 0x1.105de86fb726ep-886, 0x1.c25d7813e5a28p-881 }, + { 0x1.68453b252f9afp-887, 0x1.29f220ff323bdp-881 }, + { 0x1.dc7c640bf856fp-888, 0x1.8a2c46b36447dp-882 }, + { 0x1.3b0e7a2d8004dp-888, 0x1.04b5178932d9ep-882 }, + { 0x1.a095d99893beap-889, 0x1.58d2d04dcdef9p-883 }, + { 0x1.1361f24d04a1ep-889, 0x1.c8060b8a624d8p-884 }, + { 0x1.6c0994513d45bp-890, 0x1.2d8154e3020f5p-884 }, + { 0x1.e12caa0268707p-891, 0x1.8ea37661d565fp-885 }, + { 0x1.3df6725a60cf5p-891, 0x1.078003d294269p-885 }, + { 0x1.a42bf15180a09p-892, 0x1.5c4df6da1a5fp-886 }, + { 0x1.15957e82800c6p-892, 0x1.cc58a0676d26ep-887 }, + { 0x1.6eb9463d29a0dp-893, 0x1.302d6b1661efp-887 }, + { 0x1.e46dfa81a2018p-894, 0x1.91ed1d851d1ddp-888 }, + { 0x1.3feb236502138p-894, 0x1.0982d94421652p-888 }, + { 0x1.a67f97b02e026p-895, 0x1.5ebfab91b4a2bp-889 }, + { 0x1.16f37032d6085p-895, 0x1.cf4b3235443f5p-890 }, + { 0x1.704e120e656fdp-896, 0x1.31f0304f01ddbp-890 }, + { 0x1.e638c247f445dp-897, 0x1.940198fd0e1c2p-891 }, + { 0x1.40e7ff18c854cp-897, 0x1.0ab8eaa8fae67p-891 }, + { 0x1.a78b6039c7039p-898, 0x1.60223e0067b2cp-892 }, + { 0x1.1778970df4481p-898, 0x1.d0d6e2f89dd66p-893 }, + { 0x1.70c446e7535ccp-899, 0x1.32c589802b4bap-893 }, + { 0x1.e688d1dc06742p-900, 0x1.94dc0e4e3bd62p-894 }, + { 0x1.40eab69ffb357p-900, 0x1.0b1f64079cf15p-894 }, + { 0x1.a74cd8f49285bp-901, 0x1.607271cb1c23p-895 }, + { 0x1.1723bbb37e71p-901, 0x1.d0f815d3e30e4p-896 }, + { 0x1.701ad03f5aba2p-902, 0x1.32ab83cb1b9aap-896 }, + { 0x1.e55d6dd34aeb5p-903, 0x1.947a7e7d08e62p-897 }, + { 0x1.3ff3437e5e592p-903, 0x1.0ab555a059592p-897 }, + { 0x1.a5c493ec4b75bp-904, 0x1.5faf8b45ee11cp-898 }, + { 0x1.15f5a46f2a8c5p-904, 0x1.cfae7d166a387p-899 }, + { 0x1.6e533a1804da5p-905, 0x1.31a25c153692fp-899 }, + { 0x1.e2b951ac76b4bp-906, 0x1.92ddcdd3a585ap-900 }, + { 0x1.3e03e7aaf4a23p-906, 0x1.097bb793410b5p-900 }, + { 0x1.a2f624fa2da41p-907, 0x1.5ddb524f58124p-901 }, + { 0x1.13f112353b2e2p-907, 0x1.ccfd1b6b2b0d1p-902 }, + { 0x1.6b71aaf8395acp-908, 0x1.2fac7e1ac1a55p-902 }, + { 0x1.dea2a52e6f8d6p-909, 0x1.9009c068a7447p-903 }, + { 0x1.3b2124c85eb7dp-909, 0x1.077566199da13p-903 }, + { 0x1.9ee813dcc82f4p-910, 0x1.5afa0b60e30adp-904 }, + { 0x1.111ab5ef7d9cep-910, 0x1.c8ea38207b48cp-905 }, + { 0x1.677cd3ce598a2p-911, 0x1.2cce7b0334e93p-905 }, + { 0x1.d922e485849dfp-912, 0x1.8c04eb792831bp-906 }, + { 0x1.3751aaab95803p-912, 0x1.04a716678c7d9p-906 }, + { 0x1.99a3c2eb312dfp-913, 0x1.571266fb205e7p-907 }, + { 0x1.0d791e54efc95p-913, 0x1.c37f46c8a36cep-908 }, + { 0x1.627dd610c1f2fp-914, 0x1.290ef7aa6784ep-908 }, + { 0x1.d246bba093dddp-915, 0x1.86d89be61c44fp-909 }, + { 0x1.329e3d8fc35e5p-915, 0x1.011744722e8f8p-909 }, + { 0x1.93354aecb0f91p-916, 0x1.522d67c700dd9p-910 }, + { 0x1.09149eae599f4p-916, 0x1.bcc8c2b79e5e6p-911 }, + { 0x1.5c8020a89d6a7p-917, 0x1.247692feaf7c7p-911 }, + { 0x1.ca1dd59404578p-918, 0x1.8090b25f1fb1cp-912 }, + { 0x1.2d1194826d1d9p-918, 0x1.f99c33fa36826p-913 }, + { 0x1.8bab4cd7bc185p-919, 0x1.4c563ff8738edp-913 }, + { 0x1.03f72f0fa181cp-919, 0x1.b4d5ff233ee8bp-914 }, + { 0x1.559144638d7d2p-920, 0x1.1f0fc4fe41aefp-914 }, + { 0x1.c0baa10766979p-921, 0x1.793b75fbd2367p-915 }, + { 0x1.26b830bbc4f33p-921, 0x1.efaa9eeaa4992p-916 }, + { 0x1.8316ba6f8ef74p-922, 0x1.459a26ac43fcfp-916 }, + { 0x1.fc588d5eeb3p-923, 0x1.abb8ece685efep-917 }, + { 0x1.4dc0c0d42f863p-923, 0x1.18e6b704952c1p-917 }, + { 0x1.b6320aea7077ap-924, 0x1.70e95e366ca95p-918 }, + { 0x1.1fa02ebad6485p-924, 0x1.e4700e7fab75ep-919 }, + { 0x1.798a96e59845bp-925, 0x1.3e0826243926dp-919 }, + { 0x1.ef81624855ca5p-926, 0x1.a185d71d9ae78p-920 }, + { 0x1.451fcaaed5e7p-926, 0x1.1209163a43d8ap-920 }, + { 0x1.aa9b30dd7b333p-927, 0x1.67acd56555624p-921 }, + { 0x1.17d9121b4ff43p-927, 0x1.d805487b20ec2p-922 }, + { 0x1.6f1bb0c9eff18p-928, 0x1.35b0e3e76f72ap-922 }, + { 0x1.e184bec96bcc5p-929, 0x1.965317fc3f8ebp-923 }, + { 0x1.3bc10ccdff1d7p-929, 0x1.0a85e11600392p-923 }, + { 0x1.9e0f0cdf83a76p-930, 0x1.5d99f4f4fa7a2p-924 }, + { 0x1.0f738d3253e75p-930, 0x1.ca8538b911cc2p-925 }, + { 0x1.63e056b37b486p-931, 0x1.2ca663e8f6c6ep-925 }, + { 0x1.d2806afda0512p-932, 0x1.8a38c763ae5p-926 }, + { 0x1.31b865207923bp-932, 0x1.026d30f31261ep-926 }, + { 0x1.90a81bef15367p-933, 0x1.52c63cbe5201dp-927 }, + { 0x1.068145905baddp-933, 0x1.bc0c903e2dd51p-928 }, + { 0x1.57f0081c7461bp-934, 0x1.22fbc7eb40c8ep-928 }, + { 0x1.c293abfeb81c1p-935, 0x1.7d5064d5d2e6ap-929 }, + { 0x1.271a9ed146425p-935, 0x1.f3a001a1da12ap-930 }, + { 0x1.8282015bfd093p-936, 0x1.474846e880b8p-930 }, + { 0x1.fa292d1f4b615p-937, 0x1.acb96019278e3p-931 }, + { 0x1.4b6323fa7fafcp-937, 0x1.18c50c637e437p-931 }, + { 0x1.b1ded81f6cf48p-938, 0x1.6fb47e7243b1p-932 }, + { 0x1.1bfd2aff12d23p-938, 0x1.e17fe4af1cdcdp-933 }, + { 0x1.73b9288cf980bp-939, 0x1.3b3779cd081bcp-933 }, + { 0x1.e680a6315c8f9p-940, 0x1.9caab20737c4bp-934 }, + { 0x1.3e52969a46a03p-940, 0x1.0e16c42489121p-934 }, + { 0x1.a082ea93d471fp-941, 0x1.618056ad2fa0dp-935 }, + { 0x1.1075d9566cab2p-941, 0x1.ce9e247afa7efp-936 }, + { 0x1.646a66f6fb197p-942, 0x1.2eabb9557e4c3p-936 }, + { 0x1.d22f0f82317a8p-943, 0x1.8c0020c90fd02p-937 }, + { 0x1.30d7883df3e07p-943, 0x1.0305d4157bdecp-937 }, + { 0x1.8ea1187daf8b3p-944, 0x1.52cf8a69cbdeep-938 }, + { 0x1.049a91d747c02p-944, 0x1.bb1f3a4ce848cp-939 }, + { 0x1.54b29ff375e83p-945, 0x1.21bd19407d3a8p-939 }, + { 0x1.bd5a7cbaf896dp-946, 0x1.7ad97206eb3e9p-940 }, + { 0x1.230b0dec754dap-946, 0x1.ef4e6059f1fe4p-941 }, + { 0x1.7c5a693980a4p-947, 0x1.43bdb9112e65bp-941 }, + { 0x1.f10221f87a1cap-948, 0x1.a7278c0b2c815p-942 }, + { 0x1.44ae6c097e3b8p-948, 0x1.148391a9b5b7p-942 }, + { 0x1.a8288818abb4p-949, 0x1.69563388e87eep-943 }, +}, +}; diff --git a/contrib/arm-optimized-routines/pl/math/erfcf_1u7.c b/contrib/arm-optimized-routines/pl/math/erfcf_1u7.c new file mode 100644 index 000000000000..c8ce95cca058 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfcf_1u7.c @@ -0,0 +1,103 @@ +/* + * Single-precision erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Shift 0x1p17f +#define OneThird 0x1.555556p-2f +#define TwoThird 0x1.555556p-1f + +#define TwoOverFifteen 0x1.111112p-3f +#define TwoOverFive 0x1.99999ap-2f +#define Tenth 0x1.99999ap-4f + +#define SignMask 0x7fffffff + +/* Fast erfcf approximation based on series expansion near x rounded to + nearest multiple of 1/64. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + + Values of erfc(r) and scale are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + + Maximum error: 1.63 ULP (~1.0 ULP for x < 0.0). + erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120 + want 0x1.f51216p-120. */ +float +erfcf (float x) +{ + /* Get top words and sign. */ + uint32_t ix = asuint (x); + uint32_t ia = ix & SignMask; + uint32_t sign = ix & ~SignMask; + + /* |x| < 0x1.0p-26 => accurate to 0.5 ULP (top12(0x1p-26) = 0x328). */ + if (unlikely (ia < 0x32800000)) + return 1.0f - x; /* Small case. */ + + /* For |x| < 10.0625, the following approximation holds. */ + if (likely (ia < 0x41210000)) + { + /* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 1 and scale + to 2/sqrt(pi), when x reduced to r = 0. */ + float a = asfloat (ia); + float z = a + Shift; + uint32_t i = asuint (z) - asuint (Shift); + float r = z - Shift; + + /* These values are scaled by 2^-47. */ + float erfcr = __erfcf_data.tab[i].erfc; + float scale = __erfcf_data.tab[i].scale; + + /* erfc(x) ~ erfc(r) - scale * d * poly (r, d). */ + float d = a - r; + float d2 = d * d; + float r2 = r * r; + float p1 = -r; + float p2 = fmaf (TwoThird, r2, -OneThird); + float p3 = -r * fmaf (OneThird, r2, -0.5f); + float p4 = fmaf (fmaf (TwoOverFifteen, r2, -TwoOverFive), r2, Tenth); + float y = fmaf (p4, d, p3); + y = fmaf (y, d, p2); + y = fmaf (y, d, p1); + y = fmaf (-fmaf (y, d2, d), scale, erfcr); + /* Handle sign and scale back in a single fma. */ + float off = asfloat (sign >> 1); + float fac = asfloat (asuint (0x1p-47f) | sign); + y = fmaf (y, fac, off); + /* The underflow exception needs to be signaled explicitly when + result gets into subormnal range. */ + if (x >= 0x1.2639cp+3f) + force_eval_float (opt_barrier_float (0x1p-123f) * 0x1p-123f); + return y; + } + + /* erfcf(nan)=nan, erfcf(+inf)=0 and erfcf(-inf)=2. */ + if (unlikely (ia >= 0x7f800000)) + return asfloat (sign >> 1) + 1.0f / x; /* Special cases. */ + + /* Above this threshold erfcf is constant and needs to raise underflow + exception for positive x. */ + return sign ? 2.0f : __math_uflowf (0); +} + +PL_SIG (S, F, 1, erfc, -4.0, 10.0) +PL_TEST_ULP (erfcf, 1.14) +PL_TEST_SYM_INTERVAL (erfcf, 0, 0x1p-26, 40000) +PL_TEST_INTERVAL (erfcf, 0x1p-26, 10.0625, 40000) +PL_TEST_INTERVAL (erfcf, -0x1p-26, -4.0, 40000) +PL_TEST_INTERVAL (erfcf, 10.0625, inf, 40000) +PL_TEST_INTERVAL (erfcf, -4.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erfcf_data.c b/contrib/arm-optimized-routines/pl/math/erfcf_data.c new file mode 100644 index 000000000000..a54e11973819 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfcf_data.c @@ -0,0 +1,664 @@ +/* + * Data used in single-precision erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in erfcf. + For each possible rounded input r (multiples of 1/64), between + r = 0.0 and r = 10.0625 (645 values): + - the first entry __erfcf_data.tab.erfc contains the values of erfc(r), + - the second entry __erfcf_data.tab.scale contains the values of + 2/sqrt(pi)*exp(-r^2). Both values may go into subnormal range, therefore + they are scaled by a large enough value 2^47 (fits in 8 bits). */ +const struct erfcf_data __erfcf_data = { + .tab = { { 0x1p47, 0x1.20dd76p47 }, + { 0x1.f6f944p46, 0x1.20cb68p47 }, + { 0x1.edf3aap46, 0x1.209546p47 }, + { 0x1.e4f05p46, 0x1.203b26p47 }, + { 0x1.dbf056p46, 0x1.1fbd28p47 }, + { 0x1.d2f4dcp46, 0x1.1f1b7ap47 }, + { 0x1.c9fefep46, 0x1.1e565cp47 }, + { 0x1.c10fd4p46, 0x1.1d6e14p47 }, + { 0x1.b8287ap46, 0x1.1c62fap47 }, + { 0x1.af4ap46, 0x1.1b3572p47 }, + { 0x1.a6757ep46, 0x1.19e5eap47 }, + { 0x1.9dabfcp46, 0x1.1874dep47 }, + { 0x1.94ee88p46, 0x1.16e2d8p47 }, + { 0x1.8c3e24p46, 0x1.153068p47 }, + { 0x1.839bd6p46, 0x1.135e3p47 }, + { 0x1.7b0894p46, 0x1.116cd8p47 }, + { 0x1.728558p46, 0x1.0f5d16p47 }, + { 0x1.6a1312p46, 0x1.0d2fa6p47 }, + { 0x1.61b2acp46, 0x1.0ae55p47 }, + { 0x1.596508p46, 0x1.087ee4p47 }, + { 0x1.512b06p46, 0x1.05fd3ep47 }, + { 0x1.49057ap46, 0x1.03614p47 }, + { 0x1.40f536p46, 0x1.00abdp47 }, + { 0x1.38fbp46, 0x1.fbbbbep46 }, + { 0x1.311796p46, 0x1.f5f0cep46 }, + { 0x1.294bb4p46, 0x1.eff8c4p46 }, + { 0x1.21980ap46, 0x1.e9d5a8p46 }, + { 0x1.19fd3ep46, 0x1.e38988p46 }, + { 0x1.127bf2p46, 0x1.dd167cp46 }, + { 0x1.0b14bcp46, 0x1.d67ea2p46 }, + { 0x1.03c82ap46, 0x1.cfc41ep46 }, + { 0x1.f92d8cp45, 0x1.c8e91cp46 }, + { 0x1.eb0214p45, 0x1.c1efcap46 }, + { 0x1.dd0edap45, 0x1.bada5ap46 }, + { 0x1.cf54b4p45, 0x1.b3aafcp46 }, + { 0x1.c1d46ap45, 0x1.ac63e8p46 }, + { 0x1.b48eaep45, 0x1.a5074ep46 }, + { 0x1.a78428p45, 0x1.9d9762p46 }, + { 0x1.9ab566p45, 0x1.96165p46 }, + { 0x1.8e22eap45, 0x1.8e8646p46 }, + { 0x1.81cd24p45, 0x1.86e96ap46 }, + { 0x1.75b47p45, 0x1.7f41dcp46 }, + { 0x1.69d91ep45, 0x1.7791b8p46 }, + { 0x1.5e3b66p45, 0x1.6fdb12p46 }, + { 0x1.52db78p45, 0x1.681ff2p46 }, + { 0x1.47b96ep45, 0x1.60625cp46 }, + { 0x1.3cd554p45, 0x1.58a446p46 }, + { 0x1.322f26p45, 0x1.50e79ep46 }, + { 0x1.27c6d2p45, 0x1.492e42p46 }, + { 0x1.1d9c34p45, 0x1.417a0cp46 }, + { 0x1.13af1ep45, 0x1.39ccc2p46 }, + { 0x1.09ff5p45, 0x1.32281ep46 }, + { 0x1.008c8p45, 0x1.2a8dcep46 }, + { 0x1.eeaca8p44, 0x1.22ff72p46 }, + { 0x1.dcb8cap44, 0x1.1b7e98p46 }, + { 0x1.cb3c86p44, 0x1.140cc4p46 }, + { 0x1.ba36dap44, 0x1.0cab62p46 }, + { 0x1.a9a6bap44, 0x1.055bd6p46 }, + { 0x1.998afap44, 0x1.fc3ee6p45 }, + { 0x1.89e25ep44, 0x1.edeeeep45 }, + { 0x1.7aab98p44, 0x1.dfca26p45 }, + { 0x1.6be542p44, 0x1.d1d2dp45 }, + { 0x1.5d8decp44, 0x1.c40b08p45 }, + { 0x1.4fa40ep44, 0x1.b674c8p45 }, + { 0x1.422616p44, 0x1.a911fp45 }, + { 0x1.351262p44, 0x1.9be438p45 }, + { 0x1.28674p44, 0x1.8eed36p45 }, + { 0x1.1c22f8p44, 0x1.822e66p45 }, + { 0x1.1043c2p44, 0x1.75a91ap45 }, + { 0x1.04c7cap44, 0x1.695e8cp45 }, + { 0x1.f35a72p43, 0x1.5d4fd4p45 }, + { 0x1.dde456p43, 0x1.517de6p45 }, + { 0x1.c9296cp43, 0x1.45e99cp45 }, + { 0x1.b525d6p43, 0x1.3a93b2p45 }, + { 0x1.a1d5a6p43, 0x1.2f7cc4p45 }, + { 0x1.8f34eap43, 0x1.24a554p45 }, + { 0x1.7d3fa6p43, 0x1.1a0dc6p45 }, + { 0x1.6bf1dcp43, 0x1.0fb662p45 }, + { 0x1.5b4784p43, 0x1.059f5ap45 }, + { 0x1.4b3c98p43, 0x1.f79184p44 }, + { 0x1.3bcd14p43, 0x1.e4653p44 }, + { 0x1.2cf4eep43, 0x1.d1b982p44 }, + { 0x1.1eb024p43, 0x1.bf8e1cp44 }, + { 0x1.10fab8p43, 0x1.ade26cp44 }, + { 0x1.03d0acp43, 0x1.9cb5bep44 }, + { 0x1.ee5c18p42, 0x1.8c0732p44 }, + { 0x1.d61dd6p42, 0x1.7bd5c8p44 }, + { 0x1.bedec8p42, 0x1.6c2056p44 }, + { 0x1.a8973cp42, 0x1.5ce596p44 }, + { 0x1.933f9p42, 0x1.4e241ep44 }, + { 0x1.7ed03ap42, 0x1.3fda6cp44 }, + { 0x1.6b41ccp42, 0x1.3206dcp44 }, + { 0x1.588cf2p42, 0x1.24a7b8p44 }, + { 0x1.46aa72p42, 0x1.17bb2cp44 }, + { 0x1.359332p42, 0x1.0b3f52p44 }, + { 0x1.254038p42, 0x1.fe646p43 }, + { 0x1.15aaa8p42, 0x1.e72372p43 }, + { 0x1.06cbcap42, 0x1.d0b7ap43 }, + { 0x1.f13a04p41, 0x1.bb1c98p43 }, + { 0x1.d62fbep41, 0x1.a64de6p43 }, + { 0x1.bc6c1ep41, 0x1.92470ap43 }, + { 0x1.a3e2ccp41, 0x1.7f036cp43 }, + { 0x1.8c87b8p41, 0x1.6c7e64p43 }, + { 0x1.764f2p41, 0x1.5ab342p43 }, + { 0x1.612d8ap41, 0x1.499d48p43 }, + { 0x1.4d17cap41, 0x1.3937b2p43 }, + { 0x1.3a03p41, 0x1.297dbap43 }, + { 0x1.27e498p41, 0x1.1a6a96p43 }, + { 0x1.16b24cp41, 0x1.0bf97ep43 }, + { 0x1.066222p41, 0x1.fc4b5ep42 }, + { 0x1.edd4d2p40, 0x1.e1d4dp42 }, + { 0x1.d08382p40, 0x1.c885ep42 }, + { 0x1.b4be2p40, 0x1.b0553p42 }, + { 0x1.9a7316p40, 0x1.99397ap42 }, + { 0x1.81915cp40, 0x1.83298ep42 }, + { 0x1.6a088p40, 0x1.6e1c58p42 }, + { 0x1.53c89ep40, 0x1.5a08e8p42 }, + { 0x1.3ec25ep40, 0x1.46e66cp42 }, + { 0x1.2ae6fap40, 0x1.34ac36p42 }, + { 0x1.18282ep40, 0x1.2351c2p42 }, + { 0x1.067844p40, 0x1.12ceb4p42 }, + { 0x1.eb940ep39, 0x1.031ad6p42 }, + { 0x1.cc2186p39, 0x1.e85c44p41 }, + { 0x1.ae808cp39, 0x1.cc018p41 }, + { 0x1.9299bp39, 0x1.b1160ap41 }, + { 0x1.785674p39, 0x1.978ae8p41 }, + { 0x1.5fa14ap39, 0x1.7f5188p41 }, + { 0x1.486586p39, 0x1.685bb6p41 }, + { 0x1.328f5ep39, 0x1.529b9ep41 }, + { 0x1.1e0be6p39, 0x1.3e03d8p41 }, + { 0x1.0ac8fcp39, 0x1.2a875cp41 }, + { 0x1.f16aaep38, 0x1.181984p41 }, + { 0x1.cf80d4p38, 0x1.06ae14p41 }, + { 0x1.afb4e2p38, 0x1.ec7262p40 }, + { 0x1.91e8bep38, 0x1.cd5ecap40 }, + { 0x1.75ffb4p38, 0x1.b00b38p40 }, + { 0x1.5bde72p38, 0x1.94624ep40 }, + { 0x1.436af4p38, 0x1.7a4f6ap40 }, + { 0x1.2c8c7ap38, 0x1.61beaep40 }, + { 0x1.172b7ap38, 0x1.4a9cf6p40 }, + { 0x1.033198p38, 0x1.34d7dcp40 }, + { 0x1.e11332p37, 0x1.205dacp40 }, + { 0x1.be3ebp37, 0x1.0d1d6ap40 }, + { 0x1.9dbf72p37, 0x1.f60d8ap39 }, + { 0x1.7f714p37, 0x1.d4143ap39 }, + { 0x1.6331cap37, 0x1.b430ecp39 }, + { 0x1.48e09cp37, 0x1.9646f4p39 }, + { 0x1.305ef8p37, 0x1.7a3adep39 }, + { 0x1.198fd6p37, 0x1.5ff276p39 }, + { 0x1.0457c6p37, 0x1.4754acp39 }, + { 0x1.e139bcp36, 0x1.30499cp39 }, + { 0x1.bc8d52p36, 0x1.1aba78p39 }, + { 0x1.9a7c3p36, 0x1.06918cp39 }, + { 0x1.7adadep36, 0x1.e77448p38 }, + { 0x1.5d806ap36, 0x1.c4412cp38 }, + { 0x1.424642p36, 0x1.a36454p38 }, + { 0x1.290826p36, 0x1.84ba3p38 }, + { 0x1.11a3f8p36, 0x1.6821p38 }, + { 0x1.f7f358p35, 0x1.4d78bcp38 }, + { 0x1.cfd652p35, 0x1.34a306p38 }, + { 0x1.aab85ap35, 0x1.1d8318p38 }, + { 0x1.88647p35, 0x1.07fdb4p38 }, + { 0x1.68a8e4p35, 0x1.e7f232p37 }, + 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0x1.e07ab4p-44, 0x1.d458ap-40 }, + { 0x1.7879ecp-44, 0x1.6fb2eap-40 }, + { 0x1.26d7bp-44, 0x1.208a2cp-40 }, + { 0x1.cd98a2p-45, 0x1.c49f8ap-41 }, + { 0x1.6927c2p-45, 0x1.62d5aap-41 }, + { 0x1.1a6ed6p-45, 0x1.16098ep-41 }, + { 0x1.b986acp-46, 0x1.b3828ep-42 }, + { 0x1.58f35ap-46, 0x1.54eb3ep-42 }, + { 0x1.0d5e6p-46, 0x1.0abe0ep-42 }, + { 0x1.a47db6p-47, 0x1.a134d4p-43 }, + { 0x1.480a18p-47, 0x1.461cdap-43 }, + { 0x1.ff94e4p-48, 0x1.fd9182p-44 }, + { 0x1.8eb738p-48, 0x1.8deb62p-44 }, + { 0x1.369994p-48, 0x1.3694e8p-44 }, + { 0x1.e3ae4ap-49, 0x1.e49706p-45 }, + { 0x1.786c3ep-49, 0x1.79dc28p-45 }, + { 0x1.24cec8p-49, 0x1.267e46p-45 }, + { 0x1.c74fc4p-50, 0x1.cad0bp-46 }, + { 0x1.61d46cp-50, 0x1.653d08p-46 }, + { 0x1.12d55cp-50, 0x1.16038cp-46 }, + { 0x1.aabdacp-51, 0x1.b081aap-47 }, + { 0x1.4b252ep-51, 0x1.5042e2p-47 }, + { 0x1.00d6f8p-51, 0x1.054e44p-47 }, + { 0x1.8e38ep-52, 0x1.95eb2cp-48 }, + { 0x1.3490e8p-52, 0x1.3b20c6p-48 }, + { 0x1.ddf56ap-53, 0x1.e90cb6p-49 }, + { 0x1.71fdep-53, 0x1.7b4b76p-49 }, + { 0x1.1e465ap-53, 0x1.26072ap-49 }, + { 0x1.bac92ep-54, 0x1.c7a2ecp-50 }, + { 0x1.56441cp-54, 0x1.60dcfp-50 }, + { 0x1.08700cp-54, 0x1.112346p-50 }, + { 0x1.986a66p-55, 0x1.a6a50ap-51 }, + { 0x1.3b3d56p-55, 0x1.46d572p-51 }, + { 0x1.e667dap-56, 0x1.f93d0ep-52 }, + { 0x1.7712b8p-56, 0x1.86529ep-52 }, + { 0x1.211544p-56, 0x1.2d65aep-52 }, + { 0x1.bd660ap-57, 0x1.d13c32p-53 }, + { 0x1.56f3eep-57, 0x1.66e45ap-53 }, + { 0x1.07f14ap-57, 0x1.14b8b6p-53 }, + { 0x1.96129cp-58, 0x1.aa854cp-54 }, + { 0x1.3837cp-58, 0x1.488b94p-54 }, + { 0x1.dfe0c2p-59, 0x1.f9e772p-55 }, + { 0x1.709b5ap-59, 0x1.85503p-55 }, + { 0x1.1affd2p-59, 0x1.2b7218p-55 }, + { 0x1.b2564p-60, 0x1.cc6bb6p-56 }, + { 0x1.4d23fap-60, 0x1.61cb1ap-56 }, + { 0x1.fecbdp-61, 0x1.0fba0ep-56 }, + { 0x1.8767d8p-61, 0x1.a13072p-57 }, + { 0x1.2bc67ep-61, 0x1.401abcp-57 }, + { 0x1.caf846p-62, 0x1.eafc2cp-58 }, + { 0x1.5f2e7ap-62, 0x1.785cp-58 }, + { 0x1.0c93acp-62, 0x1.205a7ep-58 }, + { 0x1.9a9b06p-63, 0x1.b9a31ap-59 }, + { 0x1.39b7fcp-63, 0x1.520968p-59 }, + { 0x1.df277ap-64, 0x1.029ce6p-59 }, + { 0x1.6dbcdp-64, 0x1.8b81d6p-60 }, + { 0x1.17080ap-64, 0x1.2e48f2p-60 }, + { 0x1.a98e26p-65, 0x1.cdd86cp-61 }, + { 0x1.445a6ap-65, 0x1.60a47ap-61 }, + { 0x1.ee324ep-66, 0x1.0d210cp-61 }, + { 0x1.784e3p-66, 0x1.9a961ep-62 }, + { 0x1.1e65fep-66, 0x1.390b74p-62 }, + { 0x1.b3bb86p-67, 0x1.dd1e52p-63 }, + { 0x1.4b4e36p-67, 0x1.6b6a7ap-63 }, + { 0x1.f790f6p-68, 0x1.14acc2p-63 }, + { 0x1.7e82cep-68, 0x1.a511aap-64 }, + { 0x1.226a7ap-68, 0x1.404114p-64 }, + { 0x1.b8c634p-69, 0x1.e6ea96p-65 }, + { 0x1.4e53acp-69, 0x1.71f97ap-65 }, + { 0x1.faed5cp-70, 0x1.18fb2ep-65 }, + { 0x1.80217ep-70, 0x1.aa947ep-66 }, + { 0x1.22f066p-70, 0x1.43a796p-66 }, + { 0x1.b87f86p-71, 0x1.eae2fp-67 }, + { 0x1.4d4ec8p-71, 0x1.7414e6p-67 }, + { 0x1.f8283ep-72, 0x1.19e474p-67 }, + { 0x1.7d1b22p-72, 0x1.aaeb7ep-68 }, + { 0x1.1ff2dp-72, 0x1.431f66p-68 }, + { 0x1.b2e9e8p-73, 0x1.e8e272p-69 }, + { 0x1.4848dep-73, 0x1.71a91ep-69 }, + { 0x1.ef5b16p-74, 0x1.176014p-69 }, + { 0x1.758b92p-74, 0x1.a6137cp-70 }, + { 0x1.198d42p-74, 0x1.3ead74p-70 }, + { 0x1.a838bp-75, 0x1.e0fbc2p-71 }, + { 0x1.3f700cp-75, 0x1.6accaep-71 }, + { 0x1.e0d68ep-76, 0x1.118578p-71 }, + { 0x1.69b7f4p-76, 0x1.9c3974p-72 }, + { 0x1.0ffa12p-76, 0x1.367afap-72 }, + { 0x1.98cd1cp-77, 0x1.d377fap-73 }, + { 0x1.33148p-77, 0x1.5fbee6p-73 }, + { 0x1.cd1dbap-78, 0x1.088a8p-73 }, + { 0x1.5a0a9cp-78, 0x1.8db7ccp-74 }, + { 0x1.038ef4p-78, 0x1.2ad2ecp-74 }, + { 0x1.85308ap-79, 0x1.c0d23ep-75 }, + { 0x1.23a3cp-79, 0x1.50e41ap-75 }, + { 0x1.b4de68p-80, 0x1.f980a8p-76 }, + { 0x1.470ce4p-80, 0x1.7b10fep-76 }, + { 0x1.e9700cp-81, 0x1.1c1d98p-76 }, + { 0x1.6e0c9p-81, 0x1.a9b08p-77 }, + { 0x1.11a25ap-81, 0x1.3ebfb4p-77 }, + { 0x1.98e73ap-82, 0x1.dd1d36p-78 }, + { 0x1.315f58p-82, 0x1.64e7fp-78 }, + { 0x1.c7e35cp-83, 0x1.0ada94p-78 }, + { 0x1.542176p-83, 0x1.8ed9e8p-79 }, + { 0x1.fb491ep-84, 0x1.29ecb2p-79 }, + { 0x1.7a1c34p-84, 0x1.bcdb34p-80 }, + { 0x1.19b0f2p-84, 0x1.4bf6cap-80 }, + { 0x1.a383cap-85, 0x1.ef3318p-81 }, + { 0x1.383bf2p-85, 0x1.712bc2p-81 }, + { 0x1.d08cdap-86, 0x1.13151p-81 }, + { 0x1.596adp-86, 0x1.99bf36p-82 }, + { 0x1.00b602p-86, 0x1.3104d6p-82 }, + { 0x1.7d62a2p-87, 0x1.c5e534p-83 }, + { 0x1.1b2abcp-87, 0x1.518db2p-83 }, + { 0x1.a4480ep-88, 0x1.f5d1c6p-84 }, + { 0x1.37be42p-88, 0x1.74d45ap-84 }, + { 0x1.ce3ee4p-89, 0x1.14dc4ap-84 }, + { 0x1.568986p-89, 0x1.9afd0ep-85 }, + { 0x1.fb69c6p-90, 0x1.30e632p-85 }, + { 0x1.77a47ep-90, 0x1.c42b48p-86 }, + { 0x1.15f4ep-90, 0x1.4f1f52p-86 }, + { 0x1.9b25dcp-91, 0x1.f08156p-87 }, + { 0x1.2feeeep-91, 0x1.6f9f62p-87 }, + { 0x1.c122bcp-92, 0x1.100ffap-87 }, + { 0x1.4bb154p-92, 0x1.927ce6p-88 }, + { 0x1.e9ae56p-93, 0x1.2992f4p-88 }, + { 0x1.6948e8p-93, 0x1.b7cccap-89 }, + { 0x1.0a6cd2p-93, 0x1.44d7c4p-89 }, + { 0x1.88c0cap-94, 0x1.dfa22p-90 }, + { 0x1.215988p-94, 0x1.61eb26p-90 }, + { 0x1.aa222ap-95, 0x1.0506e2p-90 }, + { 0x1.39a30ep-95, 0x1.80d828p-91 }, + { 0x1.cd740ep-96, 0x1.1b8f04p-91 }, + { 0x1.534d82p-96, 0x1.a1a7ecp-92 }, + { 0x1.f2bb06p-97, 0x1.336f3p-92 }, + { 0x1.6e5b34p-97, 0x1.c46172p-93 }, + { 0x1.0cfc82p-97, 0x1.4cab82p-93 }, + { 0x1.8acc82p-98, 0x1.e9094cp-94 }, + { 0x1.219686p-98, 0x1.67465p-94 }, + { 0x1.a89fa6p-99, 0x1.07d0b8p-94 }, + { 0x1.372982p-99, 0x1.833ffap-95 }, + { 0x1.c7d094p-100, 0x1.1c147ap-95 }, + { 0x1.4db1c8p-100, 0x1.a096ccp-96 }, + { 0x1.e858d8p-101, 0x1.314decp-96 }, + { 0x1.6529ep-101, 0x1.bf46cep-97 }, + { 0x1.0517bap-101, 0x1.47796ap-97 }, + { 0x1.7d8a8p-102, 0x1.df49a2p-98 }, + { 0x1.16a46p-102, 0x1.5e9198p-98 }, + { 0x1.96ca76p-103, 0x1.004b34p-98 }, + { 0x1.28cb2cp-103, 0x1.768f3ep-99 }, + { 0x1.b0de98p-104, 0x1.1190d2p-99 }, + }, + }; diff --git a/contrib/arm-optimized-routines/pl/math/erff_2u.c b/contrib/arm-optimized-routines/pl/math/erff_2u.c new file mode 100644 index 000000000000..f43e647072f8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erff_2u.c @@ -0,0 +1,82 @@ +/* + * Single-precision erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define TwoOverSqrtPiMinusOne 0x1.06eba8p-3f +#define Shift 0x1p16f +#define OneThird 0x1.555556p-2f + +/* Fast erff approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erf(x) ~ erf(r) + + scale * d * [ + + 1 + - r d + + 1/3 (2 r^2 - 1) d^2 + - 1/6 (r (2 r^2 - 3) ) d^3 + + 1/30 (4 r^4 - 12 r^2 + 3) d^4 + ] + + This single precision implementation uses only the following terms: + + erf(x) ~ erf(r) + scale * d * [1 - r * d - 1/3 * d^2] + + Values of erf(r) and scale are read from lookup tables. + For |x| > 3.9375, erf(|x|) rounds to 1.0f. + + Maximum error: 1.93 ULP + erff(0x1.c373e6p-9) got 0x1.fd686cp-9 + want 0x1.fd6868p-9. */ +float +erff (float x) +{ + /* Get absolute value and sign. */ + uint32_t ix = asuint (x); + uint32_t ia = ix & 0x7fffffff; + uint32_t sign = ix & ~0x7fffffff; + + /* |x| < 0x1p-62. Triggers exceptions. */ + if (unlikely (ia < 0x20800000)) + return fmaf (TwoOverSqrtPiMinusOne, x, x); + + if (ia < 0x407b8000) /* |x| < 4 - 8 / 128 = 3.9375. */ + { + /* Lookup erf(r) and scale(r) in tables, e.g. set erf(r) to 0 and scale + to 2/sqrt(pi), when x reduced to r = 0. */ + float a = asfloat (ia); + float z = a + Shift; + uint32_t i = asuint (z) - asuint (Shift); + float r = z - Shift; + float erfr = __erff_data.tab[i].erf; + float scale = __erff_data.tab[i].scale; + + /* erf(x) ~ erf(r) + scale * d * (1 - r * d - 1/3 * d^2). */ + float d = a - r; + float d2 = d * d; + float y = -fmaf (OneThird, d, r); + y = fmaf (fmaf (y, d2, d), scale, erfr); + return asfloat (asuint (y) | sign); + } + + /* Special cases : erff(nan)=nan, erff(+inf)=+1 and erff(-inf)=-1. */ + if (unlikely (ia >= 0x7f800000)) + return (1.0f - (float) (sign >> 30)) + 1.0f / x; + + /* Boring domain (|x| >= 4.0). */ + return asfloat (sign | asuint (1.0f)); +} + +PL_SIG (S, F, 1, erf, -4.0, 4.0) +PL_TEST_ULP (erff, 1.43) +PL_TEST_SYM_INTERVAL (erff, 0, 3.9375, 40000) +PL_TEST_SYM_INTERVAL (erff, 3.9375, inf, 40000) +PL_TEST_SYM_INTERVAL (erff, 0, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erff_data.c b/contrib/arm-optimized-routines/pl/math/erff_data.c new file mode 100644 index 000000000000..84c0d2e95463 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erff_data.c @@ -0,0 +1,532 @@ +/* + * Data for approximation of erff. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in erff. + For each possible rounded input r (multiples of 1/128), between + r = 0.0 and r = 4.0 (513 values): + - the first entry __erff_data.tab.erf contains the values of erf(r), + - the second entry __erff_data.tab.scale contains the values of + 2/sqrt(pi)*exp(-r^2). Note that indices 0 and 1 are never hit by the + algorithm, since lookup is performed only for x >= 1/64-1/512. */ +const struct erff_data __erff_data = { + .tab = { { 0x0.000000p+0, 0x1.20dd76p+0 }, + { 0x1.20dbf4p-7, 0x1.20d8f2p+0 }, + { 0x1.20d770p-6, 0x1.20cb68p+0 }, + { 0x1.b137e0p-6, 0x1.20b4d8p+0 }, + { 0x1.20c564p-5, 0x1.209546p+0 }, + { 0x1.68e5d4p-5, 0x1.206cb4p+0 }, + { 0x1.b0fafep-5, 0x1.203b26p+0 }, + { 0x1.f902a8p-5, 0x1.2000a0p+0 }, + { 0x1.207d48p-4, 0x1.1fbd28p+0 }, + { 0x1.44703ep-4, 0x1.1f70c4p+0 }, + { 0x1.68591ap-4, 0x1.1f1b7ap+0 }, + { 0x1.8c36bep-4, 0x1.1ebd56p+0 }, + { 0x1.b00812p-4, 0x1.1e565cp+0 }, + { 0x1.d3cbf8p-4, 0x1.1de698p+0 }, + { 0x1.f7815ap-4, 0x1.1d6e14p+0 }, + { 0x1.0d9390p-3, 0x1.1cecdcp+0 }, + { 0x1.1f5e1ap-3, 0x1.1c62fap+0 }, + { 0x1.311fc2p-3, 0x1.1bd07cp+0 }, + { 0x1.42d7fcp-3, 0x1.1b3572p+0 }, + { 0x1.548642p-3, 0x1.1a91e6p+0 }, + { 0x1.662a0cp-3, 0x1.19e5eap+0 }, + { 0x1.77c2d2p-3, 0x1.19318cp+0 }, + { 0x1.895010p-3, 0x1.1874dep+0 }, + { 0x1.9ad142p-3, 0x1.17aff0p+0 }, + { 0x1.ac45e4p-3, 0x1.16e2d8p+0 }, + { 0x1.bdad72p-3, 0x1.160da4p+0 }, + { 0x1.cf076ep-3, 0x1.153068p+0 }, + { 0x1.e05354p-3, 0x1.144b3cp+0 }, + { 0x1.f190aap-3, 0x1.135e30p+0 }, + { 0x1.015f78p-2, 0x1.12695ep+0 }, + { 0x1.09eed6p-2, 0x1.116cd8p+0 }, + { 0x1.127632p-2, 0x1.1068bap+0 }, + { 0x1.1af54ep-2, 0x1.0f5d16p+0 }, + { 0x1.236bf0p-2, 0x1.0e4a08p+0 }, + { 0x1.2bd9dcp-2, 0x1.0d2fa6p+0 }, + { 0x1.343ed6p-2, 0x1.0c0e0ap+0 }, + { 0x1.3c9aa8p-2, 0x1.0ae550p+0 }, + { 0x1.44ed18p-2, 0x1.09b590p+0 }, + { 0x1.4d35f0p-2, 0x1.087ee4p+0 }, + { 0x1.5574f4p-2, 0x1.07416cp+0 }, + { 0x1.5da9f4p-2, 0x1.05fd3ep+0 }, + { 0x1.65d4b8p-2, 0x1.04b27cp+0 }, + { 0x1.6df50ap-2, 0x1.036140p+0 }, + { 0x1.760abap-2, 0x1.0209a6p+0 }, + { 0x1.7e1594p-2, 0x1.00abd0p+0 }, + { 0x1.861566p-2, 0x1.fe8fb0p-1 }, + { 0x1.8e0a02p-2, 0x1.fbbbbep-1 }, + { 0x1.95f336p-2, 0x1.f8dc0ap-1 }, + { 0x1.9dd0d2p-2, 0x1.f5f0cep-1 }, + { 0x1.a5a2acp-2, 0x1.f2fa4cp-1 }, + { 0x1.ad6896p-2, 0x1.eff8c4p-1 }, + { 0x1.b52264p-2, 0x1.ecec78p-1 }, + { 0x1.bccfecp-2, 0x1.e9d5a8p-1 }, + { 0x1.c47104p-2, 0x1.e6b498p-1 }, + { 0x1.cc0584p-2, 0x1.e38988p-1 }, + { 0x1.d38d44p-2, 0x1.e054bep-1 }, + { 0x1.db081cp-2, 0x1.dd167cp-1 }, + { 0x1.e275eap-2, 0x1.d9cf06p-1 }, + { 0x1.e9d68ap-2, 0x1.d67ea2p-1 }, + { 0x1.f129d4p-2, 0x1.d32592p-1 }, + { 0x1.f86faap-2, 0x1.cfc41ep-1 }, + { 0x1.ffa7eap-2, 0x1.cc5a8ap-1 }, + { 0x1.03693ap-1, 0x1.c8e91cp-1 }, + { 0x1.06f794p-1, 0x1.c5701ap-1 }, + { 0x1.0a7ef6p-1, 0x1.c1efcap-1 }, + { 0x1.0dff50p-1, 0x1.be6872p-1 }, + { 0x1.117894p-1, 0x1.bada5ap-1 }, + { 0x1.14eab4p-1, 0x1.b745c6p-1 }, + { 0x1.1855a6p-1, 0x1.b3aafcp-1 }, + { 0x1.1bb95cp-1, 0x1.b00a46p-1 }, + { 0x1.1f15ccp-1, 0x1.ac63e8p-1 }, + { 0x1.226ae8p-1, 0x1.a8b828p-1 }, + { 0x1.25b8a8p-1, 0x1.a5074ep-1 }, + { 0x1.28ff02p-1, 0x1.a1519ep-1 }, + { 0x1.2c3decp-1, 0x1.9d9762p-1 }, + { 0x1.2f755cp-1, 0x1.99d8dap-1 }, + { 0x1.32a54cp-1, 0x1.961650p-1 }, + { 0x1.35cdb4p-1, 0x1.925008p-1 }, + { 0x1.38ee8ap-1, 0x1.8e8646p-1 }, + { 0x1.3c07cap-1, 0x1.8ab950p-1 }, + { 0x1.3f196ep-1, 0x1.86e96ap-1 }, + { 0x1.42236ep-1, 0x1.8316d6p-1 }, + { 0x1.4525c8p-1, 0x1.7f41dcp-1 }, + { 0x1.482074p-1, 0x1.7b6abcp-1 }, + { 0x1.4b1372p-1, 0x1.7791b8p-1 }, + { 0x1.4dfebap-1, 0x1.73b714p-1 }, + { 0x1.50e24cp-1, 0x1.6fdb12p-1 }, + { 0x1.53be26p-1, 0x1.6bfdf0p-1 }, + { 0x1.569244p-1, 0x1.681ff2p-1 }, + { 0x1.595ea6p-1, 0x1.644156p-1 }, + { 0x1.5c2348p-1, 0x1.60625cp-1 }, + { 0x1.5ee02ep-1, 0x1.5c8342p-1 }, + { 0x1.619556p-1, 0x1.58a446p-1 }, + { 0x1.6442c0p-1, 0x1.54c5a6p-1 }, + { 0x1.66e86ep-1, 0x1.50e79ep-1 }, + { 0x1.69865ep-1, 0x1.4d0a68p-1 }, + { 0x1.6c1c98p-1, 0x1.492e42p-1 }, + { 0x1.6eab18p-1, 0x1.455366p-1 }, + { 0x1.7131e6p-1, 0x1.417a0cp-1 }, + { 0x1.73b102p-1, 0x1.3da26ep-1 }, + { 0x1.762870p-1, 0x1.39ccc2p-1 }, + { 0x1.789836p-1, 0x1.35f940p-1 }, + { 0x1.7b0058p-1, 0x1.32281ep-1 }, + { 0x1.7d60d8p-1, 0x1.2e5992p-1 }, + { 0x1.7fb9c0p-1, 0x1.2a8dcep-1 }, + { 0x1.820b12p-1, 0x1.26c508p-1 }, + { 0x1.8454d6p-1, 0x1.22ff72p-1 }, + { 0x1.869712p-1, 0x1.1f3d3cp-1 }, + { 0x1.88d1cep-1, 0x1.1b7e98p-1 }, + { 0x1.8b050ep-1, 0x1.17c3b6p-1 }, + { 0x1.8d30dep-1, 0x1.140cc4p-1 }, + { 0x1.8f5544p-1, 0x1.1059eep-1 }, + { 0x1.91724ap-1, 0x1.0cab62p-1 }, + { 0x1.9387f6p-1, 0x1.09014cp-1 }, + { 0x1.959652p-1, 0x1.055bd6p-1 }, + { 0x1.979d68p-1, 0x1.01bb2cp-1 }, + { 0x1.999d42p-1, 0x1.fc3ee6p-2 }, + { 0x1.9b95e8p-1, 0x1.f511aap-2 }, + { 0x1.9d8768p-1, 0x1.edeeeep-2 }, + { 0x1.9f71cap-1, 0x1.e6d700p-2 }, + { 0x1.a1551ap-1, 0x1.dfca26p-2 }, + { 0x1.a33162p-1, 0x1.d8c8aap-2 }, + { 0x1.a506b0p-1, 0x1.d1d2d0p-2 }, + { 0x1.a6d50cp-1, 0x1.cae8dap-2 }, + { 0x1.a89c86p-1, 0x1.c40b08p-2 }, + { 0x1.aa5d26p-1, 0x1.bd3998p-2 }, + { 0x1.ac16fcp-1, 0x1.b674c8p-2 }, + { 0x1.adca14p-1, 0x1.afbcd4p-2 }, + { 0x1.af767ap-1, 0x1.a911f0p-2 }, + { 0x1.b11c3cp-1, 0x1.a27456p-2 }, + { 0x1.b2bb68p-1, 0x1.9be438p-2 }, + { 0x1.b4540ap-1, 0x1.9561c8p-2 }, + { 0x1.b5e630p-1, 0x1.8eed36p-2 }, + { 0x1.b771e8p-1, 0x1.8886b2p-2 }, + { 0x1.b8f742p-1, 0x1.822e66p-2 }, + { 0x1.ba764ap-1, 0x1.7be47ap-2 }, + { 0x1.bbef10p-1, 0x1.75a91ap-2 }, + { 0x1.bd61a2p-1, 0x1.6f7c6ap-2 }, + { 0x1.bece0ep-1, 0x1.695e8cp-2 }, + { 0x1.c03464p-1, 0x1.634fa6p-2 }, + { 0x1.c194b2p-1, 0x1.5d4fd4p-2 }, + { 0x1.c2ef08p-1, 0x1.575f34p-2 }, + { 0x1.c44376p-1, 0x1.517de6p-2 }, + { 0x1.c5920ap-1, 0x1.4bac00p-2 }, + { 0x1.c6dad2p-1, 0x1.45e99cp-2 }, + { 0x1.c81de2p-1, 0x1.4036d0p-2 }, + { 0x1.c95b46p-1, 0x1.3a93b2p-2 }, + { 0x1.ca930ep-1, 0x1.350052p-2 }, + { 0x1.cbc54cp-1, 0x1.2f7cc4p-2 }, + { 0x1.ccf20cp-1, 0x1.2a0916p-2 }, + { 0x1.ce1962p-1, 0x1.24a554p-2 }, + { 0x1.cf3b5cp-1, 0x1.1f518ap-2 }, + { 0x1.d0580cp-1, 0x1.1a0dc6p-2 }, + { 0x1.d16f7ep-1, 0x1.14da0ap-2 }, + { 0x1.d281c4p-1, 0x1.0fb662p-2 }, + { 0x1.d38ef0p-1, 0x1.0aa2d0p-2 }, + { 0x1.d49710p-1, 0x1.059f5ap-2 }, + { 0x1.d59a34p-1, 0x1.00ac00p-2 }, + { 0x1.d6986cp-1, 0x1.f79184p-3 }, + { 0x1.d791cap-1, 0x1.edeb40p-3 }, + { 0x1.d8865ep-1, 0x1.e46530p-3 }, + { 0x1.d97636p-1, 0x1.daff4ap-3 }, + { 0x1.da6162p-1, 0x1.d1b982p-3 }, + { 0x1.db47f4p-1, 0x1.c893cep-3 }, + { 0x1.dc29fcp-1, 0x1.bf8e1cp-3 }, + { 0x1.dd0788p-1, 0x1.b6a856p-3 }, + { 0x1.dde0aap-1, 0x1.ade26cp-3 }, + { 0x1.deb570p-1, 0x1.a53c42p-3 }, + { 0x1.df85eap-1, 0x1.9cb5bep-3 }, + { 0x1.e0522ap-1, 0x1.944ec2p-3 }, + { 0x1.e11a3ep-1, 0x1.8c0732p-3 }, + { 0x1.e1de36p-1, 0x1.83deeap-3 }, + { 0x1.e29e22p-1, 0x1.7bd5c8p-3 }, + { 0x1.e35a12p-1, 0x1.73eba4p-3 }, + { 0x1.e41214p-1, 0x1.6c2056p-3 }, + { 0x1.e4c638p-1, 0x1.6473b6p-3 }, + { 0x1.e5768cp-1, 0x1.5ce596p-3 }, + { 0x1.e62322p-1, 0x1.5575c8p-3 }, + { 0x1.e6cc08p-1, 0x1.4e241ep-3 }, + { 0x1.e7714ap-1, 0x1.46f066p-3 }, + { 0x1.e812fcp-1, 0x1.3fda6cp-3 }, + { 0x1.e8b12ap-1, 0x1.38e1fap-3 }, + { 0x1.e94be4p-1, 0x1.3206dcp-3 }, + { 0x1.e9e336p-1, 0x1.2b48dap-3 }, + { 0x1.ea7730p-1, 0x1.24a7b8p-3 }, + { 0x1.eb07e2p-1, 0x1.1e233ep-3 }, + { 0x1.eb9558p-1, 0x1.17bb2cp-3 }, + { 0x1.ec1fa2p-1, 0x1.116f48p-3 }, + { 0x1.eca6ccp-1, 0x1.0b3f52p-3 }, + { 0x1.ed2ae6p-1, 0x1.052b0cp-3 }, + { 0x1.edabfcp-1, 0x1.fe6460p-4 }, + { 0x1.ee2a1ep-1, 0x1.f2a902p-4 }, + { 0x1.eea556p-1, 0x1.e72372p-4 }, + { 0x1.ef1db4p-1, 0x1.dbd32ap-4 }, + { 0x1.ef9344p-1, 0x1.d0b7a0p-4 }, + { 0x1.f00614p-1, 0x1.c5d04ap-4 }, + { 0x1.f07630p-1, 0x1.bb1c98p-4 }, + { 0x1.f0e3a6p-1, 0x1.b09bfcp-4 }, + { 0x1.f14e82p-1, 0x1.a64de6p-4 }, + { 0x1.f1b6d0p-1, 0x1.9c31c6p-4 }, + { 0x1.f21ca0p-1, 0x1.92470ap-4 }, + { 0x1.f27ff8p-1, 0x1.888d1ep-4 }, + { 0x1.f2e0eap-1, 0x1.7f036cp-4 }, + { 0x1.f33f7ep-1, 0x1.75a960p-4 }, + { 0x1.f39bc2p-1, 0x1.6c7e64p-4 }, + { 0x1.f3f5c2p-1, 0x1.6381e2p-4 }, + { 0x1.f44d88p-1, 0x1.5ab342p-4 }, + { 0x1.f4a31ep-1, 0x1.5211ecp-4 }, + { 0x1.f4f694p-1, 0x1.499d48p-4 }, + { 0x1.f547f2p-1, 0x1.4154bcp-4 }, + { 0x1.f59742p-1, 0x1.3937b2p-4 }, + { 0x1.f5e490p-1, 0x1.31458ep-4 }, + { 0x1.f62fe8p-1, 0x1.297dbap-4 }, + { 0x1.f67952p-1, 0x1.21df9ap-4 }, + { 0x1.f6c0dcp-1, 0x1.1a6a96p-4 }, + { 0x1.f7068cp-1, 0x1.131e14p-4 }, + { 0x1.f74a6ep-1, 0x1.0bf97ep-4 }, + { 0x1.f78c8cp-1, 0x1.04fc3ap-4 }, + { 0x1.f7cceep-1, 0x1.fc4b5ep-5 }, + { 0x1.f80ba2p-1, 0x1.eeea8cp-5 }, + { 0x1.f848acp-1, 0x1.e1d4d0p-5 }, + { 0x1.f8841ap-1, 0x1.d508fap-5 }, + { 0x1.f8bdf2p-1, 0x1.c885e0p-5 }, + { 0x1.f8f63ep-1, 0x1.bc4a54p-5 }, + { 0x1.f92d08p-1, 0x1.b05530p-5 }, + { 0x1.f96256p-1, 0x1.a4a54ap-5 }, + { 0x1.f99634p-1, 0x1.99397ap-5 }, + { 0x1.f9c8a8p-1, 0x1.8e109cp-5 }, + { 0x1.f9f9bap-1, 0x1.83298ep-5 }, + { 0x1.fa2974p-1, 0x1.78832cp-5 }, + { 0x1.fa57dep-1, 0x1.6e1c58p-5 }, + { 0x1.fa84fep-1, 0x1.63f3f6p-5 }, + { 0x1.fab0dep-1, 0x1.5a08e8p-5 }, + { 0x1.fadb84p-1, 0x1.505a18p-5 }, + { 0x1.fb04f6p-1, 0x1.46e66cp-5 }, + { 0x1.fb2d40p-1, 0x1.3dacd2p-5 }, + { 0x1.fb5464p-1, 0x1.34ac36p-5 }, + { 0x1.fb7a6cp-1, 0x1.2be38cp-5 }, + { 0x1.fb9f60p-1, 0x1.2351c2p-5 }, + { 0x1.fbc344p-1, 0x1.1af5d2p-5 }, + { 0x1.fbe61ep-1, 0x1.12ceb4p-5 }, + { 0x1.fc07fap-1, 0x1.0adb60p-5 }, + { 0x1.fc28d8p-1, 0x1.031ad6p-5 }, + { 0x1.fc48c2p-1, 0x1.f7182ap-6 }, + { 0x1.fc67bcp-1, 0x1.e85c44p-6 }, + { 0x1.fc85d0p-1, 0x1.da0006p-6 }, + { 0x1.fca2fep-1, 0x1.cc0180p-6 }, + { 0x1.fcbf52p-1, 0x1.be5ecep-6 }, + { 0x1.fcdaccp-1, 0x1.b1160ap-6 }, + { 0x1.fcf576p-1, 0x1.a4255ap-6 }, + { 0x1.fd0f54p-1, 0x1.978ae8p-6 }, + { 0x1.fd286ap-1, 0x1.8b44e6p-6 }, + { 0x1.fd40bep-1, 0x1.7f5188p-6 }, + { 0x1.fd5856p-1, 0x1.73af0cp-6 }, + { 0x1.fd6f34p-1, 0x1.685bb6p-6 }, + { 0x1.fd8562p-1, 0x1.5d55ccp-6 }, + { 0x1.fd9ae2p-1, 0x1.529b9ep-6 }, + { 0x1.fdafb8p-1, 0x1.482b84p-6 }, + { 0x1.fdc3e8p-1, 0x1.3e03d8p-6 }, + { 0x1.fdd77ap-1, 0x1.3422fep-6 }, + { 0x1.fdea6ep-1, 0x1.2a875cp-6 }, + { 0x1.fdfcccp-1, 0x1.212f62p-6 }, + { 0x1.fe0e96p-1, 0x1.181984p-6 }, + { 0x1.fe1fd0p-1, 0x1.0f443ep-6 }, + { 0x1.fe3080p-1, 0x1.06ae14p-6 }, + { 0x1.fe40a6p-1, 0x1.fcab14p-7 }, + { 0x1.fe504cp-1, 0x1.ec7262p-7 }, + { 0x1.fe5f70p-1, 0x1.dcaf36p-7 }, + { 0x1.fe6e18p-1, 0x1.cd5ecap-7 }, + { 0x1.fe7c46p-1, 0x1.be7e5ap-7 }, + { 0x1.fe8a00p-1, 0x1.b00b38p-7 }, + { 0x1.fe9748p-1, 0x1.a202bep-7 }, + { 0x1.fea422p-1, 0x1.94624ep-7 }, + { 0x1.feb090p-1, 0x1.87275ep-7 }, + { 0x1.febc96p-1, 0x1.7a4f6ap-7 }, + { 0x1.fec836p-1, 0x1.6dd7fep-7 }, + { 0x1.fed374p-1, 0x1.61beaep-7 }, + { 0x1.fede52p-1, 0x1.56011cp-7 }, + { 0x1.fee8d4p-1, 0x1.4a9cf6p-7 }, + { 0x1.fef2fep-1, 0x1.3f8ff6p-7 }, + { 0x1.fefccep-1, 0x1.34d7dcp-7 }, + { 0x1.ff064cp-1, 0x1.2a727ap-7 }, + { 0x1.ff0f76p-1, 0x1.205dacp-7 }, + { 0x1.ff1852p-1, 0x1.169756p-7 }, + { 0x1.ff20e0p-1, 0x1.0d1d6ap-7 }, + { 0x1.ff2924p-1, 0x1.03ede2p-7 }, + { 0x1.ff3120p-1, 0x1.f60d8ap-8 }, + { 0x1.ff38d6p-1, 0x1.e4cc4ap-8 }, + { 0x1.ff4048p-1, 0x1.d4143ap-8 }, + { 0x1.ff4778p-1, 0x1.c3e1a6p-8 }, + { 0x1.ff4e68p-1, 0x1.b430ecp-8 }, + { 0x1.ff551ap-1, 0x1.a4fe84p-8 }, + { 0x1.ff5b90p-1, 0x1.9646f4p-8 }, + { 0x1.ff61ccp-1, 0x1.8806d8p-8 }, + { 0x1.ff67d0p-1, 0x1.7a3adep-8 }, + { 0x1.ff6d9ep-1, 0x1.6cdfccp-8 }, + { 0x1.ff7338p-1, 0x1.5ff276p-8 }, + { 0x1.ff789ep-1, 0x1.536fc2p-8 }, + { 0x1.ff7dd4p-1, 0x1.4754acp-8 }, + { 0x1.ff82dap-1, 0x1.3b9e40p-8 }, + { 0x1.ff87b2p-1, 0x1.30499cp-8 }, + { 0x1.ff8c5cp-1, 0x1.2553eep-8 }, + { 0x1.ff90dcp-1, 0x1.1aba78p-8 }, + { 0x1.ff9532p-1, 0x1.107a8cp-8 }, + { 0x1.ff9960p-1, 0x1.06918cp-8 }, + { 0x1.ff9d68p-1, 0x1.f9f9d0p-9 }, + { 0x1.ffa14ap-1, 0x1.e77448p-9 }, + { 0x1.ffa506p-1, 0x1.d58da6p-9 }, + { 0x1.ffa8a0p-1, 0x1.c4412cp-9 }, + { 0x1.ffac18p-1, 0x1.b38a3ap-9 }, + { 0x1.ffaf6ep-1, 0x1.a36454p-9 }, + { 0x1.ffb2a6p-1, 0x1.93cb12p-9 }, + { 0x1.ffb5bep-1, 0x1.84ba30p-9 }, + { 0x1.ffb8b8p-1, 0x1.762d84p-9 }, + { 0x1.ffbb98p-1, 0x1.682100p-9 }, + { 0x1.ffbe5ap-1, 0x1.5a90b0p-9 }, + { 0x1.ffc102p-1, 0x1.4d78bcp-9 }, + { 0x1.ffc390p-1, 0x1.40d564p-9 }, + { 0x1.ffc606p-1, 0x1.34a306p-9 }, + { 0x1.ffc862p-1, 0x1.28de12p-9 }, + { 0x1.ffcaa8p-1, 0x1.1d8318p-9 }, + { 0x1.ffccd8p-1, 0x1.128ebap-9 }, + { 0x1.ffcef4p-1, 0x1.07fdb4p-9 }, + { 0x1.ffd0fap-1, 0x1.fb99b8p-10 }, + { 0x1.ffd2eap-1, 0x1.e7f232p-10 }, + { 0x1.ffd4cap-1, 0x1.d4fed8p-10 }, + { 0x1.ffd696p-1, 0x1.c2b9d0p-10 }, + { 0x1.ffd84ep-1, 0x1.b11d70p-10 }, + { 0x1.ffd9f8p-1, 0x1.a02436p-10 }, + { 0x1.ffdb90p-1, 0x1.8fc8c8p-10 }, + { 0x1.ffdd18p-1, 0x1.8005f0p-10 }, + { 0x1.ffde90p-1, 0x1.70d6a4p-10 }, + { 0x1.ffdffap-1, 0x1.6235fcp-10 }, + { 0x1.ffe154p-1, 0x1.541f34p-10 }, + { 0x1.ffe2a2p-1, 0x1.468daep-10 }, + { 0x1.ffe3e2p-1, 0x1.397ceep-10 }, + { 0x1.ffe514p-1, 0x1.2ce898p-10 }, + { 0x1.ffe63cp-1, 0x1.20cc76p-10 }, + { 0x1.ffe756p-1, 0x1.15246ep-10 }, + { 0x1.ffe866p-1, 0x1.09ec86p-10 }, + { 0x1.ffe96ap-1, 0x1.fe41cep-11 }, + { 0x1.ffea64p-1, 0x1.e97ba4p-11 }, + { 0x1.ffeb54p-1, 0x1.d57f52p-11 }, + { 0x1.ffec3ap-1, 0x1.c245d4p-11 }, + { 0x1.ffed16p-1, 0x1.afc85ep-11 }, + { 0x1.ffedeap-1, 0x1.9e0058p-11 }, + { 0x1.ffeeb4p-1, 0x1.8ce75ep-11 }, + { 0x1.ffef76p-1, 0x1.7c7744p-11 }, + { 0x1.fff032p-1, 0x1.6caa0ep-11 }, + { 0x1.fff0e4p-1, 0x1.5d79ecp-11 }, + { 0x1.fff18ep-1, 0x1.4ee142p-11 }, + { 0x1.fff232p-1, 0x1.40daa4p-11 }, + { 0x1.fff2d0p-1, 0x1.3360ccp-11 }, + { 0x1.fff366p-1, 0x1.266ea8p-11 }, + { 0x1.fff3f6p-1, 0x1.19ff46p-11 }, + { 0x1.fff480p-1, 0x1.0e0de8p-11 }, + { 0x1.fff504p-1, 0x1.0295f0p-11 }, + { 0x1.fff582p-1, 0x1.ef25d4p-12 }, + { 0x1.fff5fcp-1, 0x1.da0110p-12 }, + { 0x1.fff670p-1, 0x1.c5b542p-12 }, + { 0x1.fff6dep-1, 0x1.b23a5ap-12 }, + { 0x1.fff74ap-1, 0x1.9f8894p-12 }, + { 0x1.fff7aep-1, 0x1.8d986ap-12 }, + { 0x1.fff810p-1, 0x1.7c629ap-12 }, + { 0x1.fff86cp-1, 0x1.6be022p-12 }, + { 0x1.fff8c6p-1, 0x1.5c0a38p-12 }, + { 0x1.fff91cp-1, 0x1.4cda54p-12 }, + { 0x1.fff96cp-1, 0x1.3e4a24p-12 }, + { 0x1.fff9bap-1, 0x1.305390p-12 }, + { 0x1.fffa04p-1, 0x1.22f0b4p-12 }, + { 0x1.fffa4cp-1, 0x1.161be4p-12 }, + { 0x1.fffa90p-1, 0x1.09cfa4p-12 }, + { 0x1.fffad0p-1, 0x1.fc0d56p-13 }, + { 0x1.fffb0ep-1, 0x1.e577bcp-13 }, + { 0x1.fffb4ap-1, 0x1.cfd4a6p-13 }, + { 0x1.fffb82p-1, 0x1.bb1a96p-13 }, + { 0x1.fffbb8p-1, 0x1.a74068p-13 }, + { 0x1.fffbecp-1, 0x1.943d4ap-13 }, + { 0x1.fffc1ep-1, 0x1.8208bcp-13 }, + { 0x1.fffc4ep-1, 0x1.709a8ep-13 }, + { 0x1.fffc7ap-1, 0x1.5feadap-13 }, + { 0x1.fffca6p-1, 0x1.4ff208p-13 }, + { 0x1.fffccep-1, 0x1.40a8c2p-13 }, + { 0x1.fffcf6p-1, 0x1.3207fcp-13 }, + { 0x1.fffd1ap-1, 0x1.2408eap-13 }, + { 0x1.fffd3ep-1, 0x1.16a502p-13 }, + { 0x1.fffd60p-1, 0x1.09d5f8p-13 }, + { 0x1.fffd80p-1, 0x1.fb2b7ap-14 }, + { 0x1.fffda0p-1, 0x1.e3bcf4p-14 }, + { 0x1.fffdbep-1, 0x1.cd5528p-14 }, + { 0x1.fffddap-1, 0x1.b7e946p-14 }, + { 0x1.fffdf4p-1, 0x1.a36eecp-14 }, + { 0x1.fffe0ep-1, 0x1.8fdc1cp-14 }, + { 0x1.fffe26p-1, 0x1.7d2738p-14 }, + { 0x1.fffe3ep-1, 0x1.6b4702p-14 }, + { 0x1.fffe54p-1, 0x1.5a329cp-14 }, + { 0x1.fffe68p-1, 0x1.49e178p-14 }, + { 0x1.fffe7ep-1, 0x1.3a4b60p-14 }, + { 0x1.fffe90p-1, 0x1.2b6876p-14 }, + { 0x1.fffea2p-1, 0x1.1d3120p-14 }, + { 0x1.fffeb4p-1, 0x1.0f9e1cp-14 }, + { 0x1.fffec4p-1, 0x1.02a868p-14 }, + { 0x1.fffed4p-1, 0x1.ec929ap-15 }, + { 0x1.fffee4p-1, 0x1.d4f4b4p-15 }, + { 0x1.fffef2p-1, 0x1.be6abcp-15 }, + { 0x1.ffff00p-1, 0x1.a8e8ccp-15 }, + { 0x1.ffff0cp-1, 0x1.94637ep-15 }, + { 0x1.ffff18p-1, 0x1.80cfdcp-15 }, + { 0x1.ffff24p-1, 0x1.6e2368p-15 }, + { 0x1.ffff30p-1, 0x1.5c540cp-15 }, + { 0x1.ffff3ap-1, 0x1.4b581cp-15 }, + { 0x1.ffff44p-1, 0x1.3b2652p-15 }, + { 0x1.ffff4ep-1, 0x1.2bb5ccp-15 }, + { 0x1.ffff56p-1, 0x1.1cfe02p-15 }, + { 0x1.ffff60p-1, 0x1.0ef6c4p-15 }, + { 0x1.ffff68p-1, 0x1.019842p-15 }, + { 0x1.ffff70p-1, 0x1.e9b5e8p-16 }, + { 0x1.ffff78p-1, 0x1.d16f58p-16 }, + { 0x1.ffff7ep-1, 0x1.ba4f04p-16 }, + { 0x1.ffff84p-1, 0x1.a447b8p-16 }, + { 0x1.ffff8cp-1, 0x1.8f4cccp-16 }, + { 0x1.ffff92p-1, 0x1.7b5224p-16 }, + { 0x1.ffff98p-1, 0x1.684c22p-16 }, + { 0x1.ffff9cp-1, 0x1.562facp-16 }, + { 0x1.ffffa2p-1, 0x1.44f21ep-16 }, + { 0x1.ffffa6p-1, 0x1.34894ap-16 }, + { 0x1.ffffacp-1, 0x1.24eb72p-16 }, + { 0x1.ffffb0p-1, 0x1.160f44p-16 }, + { 0x1.ffffb4p-1, 0x1.07ebd2p-16 }, + { 0x1.ffffb8p-1, 0x1.f4f12ep-17 }, + { 0x1.ffffbcp-1, 0x1.db5ad0p-17 }, + { 0x1.ffffc0p-1, 0x1.c304f0p-17 }, + { 0x1.ffffc4p-1, 0x1.abe09ep-17 }, + { 0x1.ffffc6p-1, 0x1.95df98p-17 }, + { 0x1.ffffcap-1, 0x1.80f43ap-17 }, + { 0x1.ffffccp-1, 0x1.6d1178p-17 }, + { 0x1.ffffd0p-1, 0x1.5a2ae0p-17 }, + { 0x1.ffffd2p-1, 0x1.483488p-17 }, + { 0x1.ffffd4p-1, 0x1.372310p-17 }, + { 0x1.ffffd6p-1, 0x1.26eb9ep-17 }, + { 0x1.ffffd8p-1, 0x1.1783cep-17 }, + { 0x1.ffffdcp-1, 0x1.08e1bap-17 }, + { 0x1.ffffdep-1, 0x1.f5f7d8p-18 }, + { 0x1.ffffdep-1, 0x1.db92b6p-18 }, + { 0x1.ffffe0p-1, 0x1.c282cep-18 }, + { 0x1.ffffe2p-1, 0x1.aab7acp-18 }, + { 0x1.ffffe4p-1, 0x1.94219cp-18 }, + { 0x1.ffffe6p-1, 0x1.7eb1a2p-18 }, + { 0x1.ffffe8p-1, 0x1.6a5972p-18 }, + { 0x1.ffffe8p-1, 0x1.570b6ap-18 }, + { 0x1.ffffeap-1, 0x1.44ba86p-18 }, + { 0x1.ffffeap-1, 0x1.335a62p-18 }, + { 0x1.ffffecp-1, 0x1.22df2ap-18 }, + { 0x1.ffffeep-1, 0x1.133d96p-18 }, + { 0x1.ffffeep-1, 0x1.046aeap-18 }, + { 0x1.fffff0p-1, 0x1.ecb9d0p-19 }, + { 0x1.fffff0p-1, 0x1.d21398p-19 }, + { 0x1.fffff2p-1, 0x1.b8d094p-19 }, + { 0x1.fffff2p-1, 0x1.a0df10p-19 }, + { 0x1.fffff2p-1, 0x1.8a2e26p-19 }, + { 0x1.fffff4p-1, 0x1.74adc8p-19 }, + { 0x1.fffff4p-1, 0x1.604ea8p-19 }, + { 0x1.fffff4p-1, 0x1.4d0232p-19 }, + { 0x1.fffff6p-1, 0x1.3aba86p-19 }, + { 0x1.fffff6p-1, 0x1.296a70p-19 }, + { 0x1.fffff6p-1, 0x1.190562p-19 }, + { 0x1.fffff8p-1, 0x1.097f62p-19 }, + { 0x1.fffff8p-1, 0x1.f59a20p-20 }, + { 0x1.fffff8p-1, 0x1.d9c736p-20 }, + { 0x1.fffff8p-1, 0x1.bf716cp-20 }, + { 0x1.fffffap-1, 0x1.a6852cp-20 }, + { 0x1.fffffap-1, 0x1.8eefd8p-20 }, + { 0x1.fffffap-1, 0x1.789fb8p-20 }, + { 0x1.fffffap-1, 0x1.6383f8p-20 }, + { 0x1.fffffap-1, 0x1.4f8c96p-20 }, + { 0x1.fffffap-1, 0x1.3caa62p-20 }, + { 0x1.fffffcp-1, 0x1.2acee2p-20 }, + { 0x1.fffffcp-1, 0x1.19ec60p-20 }, + { 0x1.fffffcp-1, 0x1.09f5d0p-20 }, + { 0x1.fffffcp-1, 0x1.f5bd96p-21 }, + { 0x1.fffffcp-1, 0x1.d9371ep-21 }, + { 0x1.fffffcp-1, 0x1.be41dep-21 }, + { 0x1.fffffcp-1, 0x1.a4c89ep-21 }, + { 0x1.fffffcp-1, 0x1.8cb738p-21 }, + { 0x1.fffffep-1, 0x1.75fa8ep-21 }, + { 0x1.fffffep-1, 0x1.608078p-21 }, + { 0x1.fffffep-1, 0x1.4c37c0p-21 }, + { 0x1.fffffep-1, 0x1.39100ep-21 }, + { 0x1.fffffep-1, 0x1.26f9e0p-21 }, + { 0x1.fffffep-1, 0x1.15e682p-21 }, + { 0x1.fffffep-1, 0x1.05c804p-21 }, + { 0x1.fffffep-1, 0x1.ed2254p-22 }, + { 0x1.fffffep-1, 0x1.d06ad6p-22 }, + { 0x1.fffffep-1, 0x1.b551c8p-22 }, + { 0x1.fffffep-1, 0x1.9bc0a0p-22 }, + { 0x1.fffffep-1, 0x1.83a200p-22 }, + { 0x1.fffffep-1, 0x1.6ce1aap-22 }, + { 0x1.fffffep-1, 0x1.576c72p-22 }, + { 0x1.fffffep-1, 0x1.43302cp-22 }, + { 0x1.fffffep-1, 0x1.301ba2p-22 }, + { 0x1.fffffep-1, 0x1.1e1e86p-22 }, + { 0x1.fffffep-1, 0x1.0d2966p-22 }, + { 0x1.000000p+0, 0x1.fa5b50p-23 }, + { 0x1.000000p+0, 0x1.dc3ae4p-23 }, + { 0x1.000000p+0, 0x1.bfd756p-23 }, + { 0x1.000000p+0, 0x1.a517dap-23 }, + { 0x1.000000p+0, 0x1.8be4f8p-23 }, + { 0x1.000000p+0, 0x1.74287ep-23 }, + { 0x1.000000p+0, 0x1.5dcd66p-23 }, + { 0x1.000000p+0, 0x1.48bfd4p-23 }, + { 0x1.000000p+0, 0x1.34ecf8p-23 }, + { 0x1.000000p+0, 0x1.224310p-23 }, + { 0x1.000000p+0, 0x1.10b148p-23 }, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/erfinv_24u5.c b/contrib/arm-optimized-routines/pl/math/erfinv_24u5.c new file mode 100644 index 000000000000..20e1e361befc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfinv_24u5.c @@ -0,0 +1,81 @@ +/* + * Double-precision inverse error function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "math_config.h" +#include "poly_scalar_f64.h" +#include "pl_sig.h" +#define IGNORE_SCALAR_FENV +#include "pl_test.h" + +const static struct +{ + /* We use P_N and Q_N to refer to arrays of coefficients, where P_N is the + coeffs of the numerator in table N of Blair et al, and Q_N is the coeffs + of the denominator. */ + double P_17[7], Q_17[7], P_37[8], Q_37[8], P_57[9], Q_57[10]; +} data = { + .P_17 = { 0x1.007ce8f01b2e8p+4, -0x1.6b23cc5c6c6d7p+6, 0x1.74e5f6ceb3548p+7, + -0x1.5200bb15cc6bbp+7, 0x1.05d193233a849p+6, -0x1.148c5474ee5e1p+3, + 0x1.689181bbafd0cp-3 }, + .Q_17 = { 0x1.d8fb0f913bd7bp+3, -0x1.6d7f25a3f1c24p+6, 0x1.a450d8e7f4cbbp+7, + -0x1.bc3480485857p+7, 0x1.ae6b0c504ee02p+6, -0x1.499dfec1a7f5fp+4, + 0x1p+0 }, + .P_37 = { -0x1.f3596123109edp-7, 0x1.60b8fe375999ep-2, -0x1.779bb9bef7c0fp+1, + 0x1.786ea384470a2p+3, -0x1.6a7c1453c85d3p+4, 0x1.31f0fc5613142p+4, + -0x1.5ea6c007d4dbbp+2, 0x1.e66f265ce9e5p-3 }, + .Q_37 = { -0x1.636b2dcf4edbep-7, 0x1.0b5411e2acf29p-2, -0x1.3413109467a0bp+1, + 0x1.563e8136c554ap+3, -0x1.7b77aab1dcafbp+4, 0x1.8a3e174e05ddcp+4, + -0x1.4075c56404eecp+3, 0x1p+0 }, + .P_57 = { 0x1.b874f9516f7f1p-14, 0x1.5921f2916c1c4p-7, 0x1.145ae7d5b8fa4p-2, + 0x1.29d6dcc3b2fb7p+1, 0x1.cabe2209a7985p+2, 0x1.11859f0745c4p+3, + 0x1.b7ec7bc6a2ce5p+2, 0x1.d0419e0bb42aep+1, 0x1.c5aa03eef7258p-1 }, + .Q_57 = { 0x1.b8747e12691f1p-14, 0x1.59240d8ed1e0ap-7, 0x1.14aef2b181e2p-2, + 0x1.2cd181bcea52p+1, 0x1.e6e63e0b7aa4cp+2, 0x1.65cf8da94aa3ap+3, + 0x1.7e5c787b10a36p+3, 0x1.0626d68b6cea3p+3, 0x1.065c5f193abf6p+2, + 0x1p+0 } +}; + +/* Inverse error function approximation, based on rational approximation as + described in + J. M. Blair, C. A. Edwards, and J. H. Johnson, + "Rational Chebyshev approximations for the inverse of the error function", + Math. Comp. 30, pp. 827--830 (1976). + https://doi.org/10.1090/S0025-5718-1976-0421040-7 + Largest observed error is 24.46 ULP, in the extreme tail: + erfinv(0x1.fd9504351b757p-1) got 0x1.ff72c1092917p+0 + want 0x1.ff72c10929158p+0. */ +double +erfinv (double x) +{ + double a = fabs (x); + + if (a <= 0.75) + { + /* Largest observed error in this region is 6.06 ULP: + erfinv(0x1.1884650fd2d41p-2) got 0x1.fb65998cbd3fep-3 + want 0x1.fb65998cbd404p-3. */ + double t = x * x - 0.5625; + return x * horner_6_f64 (t, data.P_17) / horner_6_f64 (t, data.Q_17); + } + + if (a <= 0.9375) + { + /* Largest observed error in this region is 6.95 ULP: + erfinv(0x1.a8d65b94d8c6p-1) got 0x1.f08325591b54p-1 + want 0x1.f08325591b547p-1. */ + double t = x * x - 0.87890625; + return x * horner_7_f64 (t, data.P_37) / horner_7_f64 (t, data.Q_37); + } + + double t = 1.0 / (sqrt (-log (1 - a))); + return horner_8_f64 (t, data.P_57) + / (copysign (t, x) * horner_9_f64 (t, data.Q_57)); +} + +PL_SIG (S, D, 1, erfinv, -0.99, 0.99) +PL_TEST_ULP (erfinv, 24.0) +PL_TEST_INTERVAL (erfinv, 0, 1, 40000) +PL_TEST_INTERVAL (erfinv, -0x1p-1022, -1, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erfinvf_4u7.c b/contrib/arm-optimized-routines/pl/math/erfinvf_4u7.c new file mode 100644 index 000000000000..40736da08be8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfinvf_4u7.c @@ -0,0 +1,74 @@ +/* + * Single-precision inverse error function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +const static struct +{ + /* We use P_N and Q_N to refer to arrays of coefficients, where P_N is the + coeffs of the numerator in table N of Blair et al, and Q_N is the coeffs + of the denominator. */ + float P_10[3], Q_10[4], P_29[4], Q_29[4], P_50[6], Q_50[3]; +} data = { .P_10 = { -0x1.a31268p+3, 0x1.ac9048p+4, -0x1.293ff6p+3 }, + .Q_10 = { -0x1.8265eep+3, 0x1.ef5eaep+4, -0x1.12665p+4, 0x1p+0 }, + .P_29 + = { -0x1.fc0252p-4, 0x1.119d44p+0, -0x1.f59ee2p+0, 0x1.b13626p-2 }, + .Q_29 = { -0x1.69952p-4, 0x1.c7b7d2p-1, -0x1.167d7p+1, 0x1p+0 }, + .P_50 = { 0x1.3d8948p-3, 0x1.61f9eap+0, 0x1.61c6bcp-1, + -0x1.20c9f2p+0, 0x1.5c704cp-1, -0x1.50c6bep-3 }, + .Q_50 = { 0x1.3d7dacp-3, 0x1.629e5p+0, 0x1p+0 } }; + +/* Inverse error function approximation, based on rational approximation as + described in + J. M. Blair, C. A. Edwards, and J. H. Johnson, + "Rational Chebyshev approximations for the inverse of the error function", + Math. Comp. 30, pp. 827--830 (1976). + https://doi.org/10.1090/S0025-5718-1976-0421040-7 + Largest error is 4.71 ULP, in the tail region: + erfinvf(0x1.f84e9ap-1) got 0x1.b8326ap+0 + want 0x1.b83274p+0. */ +float +erfinvf (float x) +{ + if (x == 1.0f) + return __math_oflowf (0); + if (x == -1.0f) + return __math_oflowf (1); + + float a = fabsf (x); + if (a > 1.0f) + return __math_invalidf (x); + + if (a <= 0.75f) + { + /* Greatest error in this region is 4.60 ULP: + erfinvf(0x1.0a98bap-5) got 0x1.d8a93ep-6 + want 0x1.d8a948p-6. */ + float t = x * x - 0.5625f; + return x * horner_2_f32 (t, data.P_10) / horner_3_f32 (t, data.Q_10); + } + if (a < 0.9375f) + { + /* Greatest error in this region is 3.79 ULP: + erfinvf(0x1.ac82d6p-1) got 0x1.f8fc54p-1 + want 0x1.f8fc5cp-1. */ + float t = x * x - 0.87890625f; + return x * horner_3_f32 (t, data.P_29) / horner_3_f32 (t, data.Q_29); + } + + /* Tail region, where error is greatest (and sensitive to sqrt and log1p + implementations. */ + float t = 1.0 / sqrtf (-log1pf (-a)); + return horner_5_f32 (t, data.P_50) + / (copysignf (t, x) * horner_2_f32 (t, data.Q_50)); +} + +PL_SIG (S, F, 1, erfinv, -0.99, 0.99) +PL_TEST_ULP (erfinvf, 4.09) +PL_TEST_SYM_INTERVAL (erfinvf, 0, 1, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/erfinvl.c b/contrib/arm-optimized-routines/pl/math/erfinvl.c new file mode 100644 index 000000000000..ea4aadfccd00 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/erfinvl.c @@ -0,0 +1,114 @@ +/* + * Extended precision inverse error function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#define _GNU_SOURCE +#include <math.h> +#include <stdbool.h> +#include <float.h> + +#include "math_config.h" +#include "poly_scalar_f64.h" + +#define SQRT_PIl 0x1.c5bf891b4ef6aa79c3b0520d5db9p0l +#define HF_SQRT_PIl 0x1.c5bf891b4ef6aa79c3b0520d5db9p-1l + +const static struct +{ + /* We use P_N and Q_N to refer to arrays of coefficients, where P_N is the + coeffs of the numerator in table N of Blair et al, and Q_N is the coeffs + of the denominator. */ + double P_17[7], Q_17[7], P_37[8], Q_37[8], P_57[9], Q_57[10]; +} data = { + .P_17 = { 0x1.007ce8f01b2e8p+4, -0x1.6b23cc5c6c6d7p+6, 0x1.74e5f6ceb3548p+7, + -0x1.5200bb15cc6bbp+7, 0x1.05d193233a849p+6, -0x1.148c5474ee5e1p+3, + 0x1.689181bbafd0cp-3 }, + .Q_17 = { 0x1.d8fb0f913bd7bp+3, -0x1.6d7f25a3f1c24p+6, 0x1.a450d8e7f4cbbp+7, + -0x1.bc3480485857p+7, 0x1.ae6b0c504ee02p+6, -0x1.499dfec1a7f5fp+4, + 0x1p+0 }, + .P_37 = { -0x1.f3596123109edp-7, 0x1.60b8fe375999ep-2, -0x1.779bb9bef7c0fp+1, + 0x1.786ea384470a2p+3, -0x1.6a7c1453c85d3p+4, 0x1.31f0fc5613142p+4, + -0x1.5ea6c007d4dbbp+2, 0x1.e66f265ce9e5p-3 }, + .Q_37 = { -0x1.636b2dcf4edbep-7, 0x1.0b5411e2acf29p-2, -0x1.3413109467a0bp+1, + 0x1.563e8136c554ap+3, -0x1.7b77aab1dcafbp+4, 0x1.8a3e174e05ddcp+4, + -0x1.4075c56404eecp+3, 0x1p+0 }, + .P_57 = { 0x1.b874f9516f7f1p-14, 0x1.5921f2916c1c4p-7, 0x1.145ae7d5b8fa4p-2, + 0x1.29d6dcc3b2fb7p+1, 0x1.cabe2209a7985p+2, 0x1.11859f0745c4p+3, + 0x1.b7ec7bc6a2ce5p+2, 0x1.d0419e0bb42aep+1, 0x1.c5aa03eef7258p-1 }, + .Q_57 = { 0x1.b8747e12691f1p-14, 0x1.59240d8ed1e0ap-7, 0x1.14aef2b181e2p-2, + 0x1.2cd181bcea52p+1, 0x1.e6e63e0b7aa4cp+2, 0x1.65cf8da94aa3ap+3, + 0x1.7e5c787b10a36p+3, 0x1.0626d68b6cea3p+3, 0x1.065c5f193abf6p+2, + 0x1p+0 } +}; + +/* Inverse error function approximation, based on rational approximation as + described in + J. M. Blair, C. A. Edwards, and J. H. Johnson, + "Rational Chebyshev approximations for the inverse of the error function", + Math. Comp. 30, pp. 827--830 (1976). + https://doi.org/10.1090/S0025-5718-1976-0421040-7. */ +static inline double +__erfinv (double x) +{ + if (x == 1.0) + return __math_oflow (0); + if (x == -1.0) + return __math_oflow (1); + + double a = fabs (x); + if (a > 1) + return __math_invalid (x); + + if (a <= 0.75) + { + double t = x * x - 0.5625; + return x * horner_6_f64 (t, data.P_17) / horner_6_f64 (t, data.Q_17); + } + + if (a <= 0.9375) + { + double t = x * x - 0.87890625; + return x * horner_7_f64 (t, data.P_37) / horner_7_f64 (t, data.Q_37); + } + + double t = 1.0 / (sqrtl (-log1pl (-a))); + return horner_8_f64 (t, data.P_57) + / (copysign (t, x) * horner_9_f64 (t, data.Q_57)); +} + +/* Extended-precision variant, which uses the above (or asymptotic estimate) as + starting point for Newton refinement. This implementation is a port to C of + the version in the SpecialFunctions.jl Julia package, with relaxed stopping + criteria for the Newton refinement. */ +long double +erfinvl (long double x) +{ + if (x == 0) + return 0; + + double yf = __erfinv (x); + long double y; + if (isfinite (yf)) + y = yf; + else + { + /* Double overflowed, use asymptotic estimate instead. */ + y = copysignl (sqrtl (-logl (1.0l - fabsl (x)) * SQRT_PIl), x); + if (!isfinite (y)) + return y; + } + + double eps = fabs (yf - nextafter (yf, 0)); + while (true) + { + long double dy = HF_SQRT_PIl * (erfl (y) - x) * exp (y * y); + y -= dy; + /* Stopping criterion is different to Julia implementation, but is enough + to ensure result is accurate when rounded to double-precision. */ + if (fabsl (dy) < eps) + break; + } + return y; +} diff --git a/contrib/arm-optimized-routines/pl/math/exp.c b/contrib/arm-optimized-routines/pl/math/exp.c new file mode 100644 index 000000000000..90253b68875d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/exp.c @@ -0,0 +1,163 @@ +/* + * Double-precision e^x function. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <float.h> +#include <math.h> +#include <stdint.h> +#include "math_config.h" + +#define N (1 << EXP_TABLE_BITS) +#define InvLn2N __exp_data.invln2N +#define NegLn2hiN __exp_data.negln2hiN +#define NegLn2loN __exp_data.negln2loN +#define Shift __exp_data.shift +#define T __exp_data.tab +#define C2 __exp_data.poly[5 - EXP_POLY_ORDER] +#define C3 __exp_data.poly[6 - EXP_POLY_ORDER] +#define C4 __exp_data.poly[7 - EXP_POLY_ORDER] +#define C5 __exp_data.poly[8 - EXP_POLY_ORDER] +#define C6 __exp_data.poly[9 - EXP_POLY_ORDER] + +/* Handle cases that may overflow or underflow when computing the result that + is scale*(1+TMP) without intermediate rounding. The bit representation of + scale is in SBITS, however it has a computed exponent that may have + overflown into the sign bit so that needs to be adjusted before using it as + a double. (int32_t)KI is the k used in the argument reduction and exponent + adjustment of scale, positive k here means the result may overflow and + negative k means the result may underflow. */ +static inline double +specialcase (double_t tmp, uint64_t sbits, uint64_t ki) +{ + double_t scale, y; + + if ((ki & 0x80000000) == 0) + { + /* k > 0, the exponent of scale might have overflowed by <= 460. */ + sbits -= 1009ull << 52; + scale = asdouble (sbits); + y = 0x1p1009 * (scale + scale * tmp); + return check_oflow (eval_as_double (y)); + } + /* k < 0, need special care in the subnormal range. */ + sbits += 1022ull << 52; + scale = asdouble (sbits); + y = scale + scale * tmp; + if (y < 1.0) + { + /* Round y to the right precision before scaling it into the subnormal + range to avoid double rounding that can cause 0.5+E/2 ulp error where + E is the worst-case ulp error outside the subnormal range. So this + is only useful if the goal is better than 1 ulp worst-case error. */ + double_t hi, lo; + lo = scale - y + scale * tmp; + hi = 1.0 + y; + lo = 1.0 - hi + y + lo; + y = eval_as_double (hi + lo) - 1.0; + /* Avoid -0.0 with downward rounding. */ + if (WANT_ROUNDING && y == 0.0) + y = 0.0; + /* The underflow exception needs to be signaled explicitly. */ + force_eval_double (opt_barrier_double (0x1p-1022) * 0x1p-1022); + } + y = 0x1p-1022 * y; + return check_uflow (eval_as_double (y)); +} + +/* Top 12 bits of a double (sign and exponent bits). */ +static inline uint32_t +top12 (double x) +{ + return asuint64 (x) >> 52; +} + +/* Computes exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. + If hastail is 0 then xtail is assumed to be 0 too. */ +static inline double +exp_inline (double x, double xtail, int hastail) +{ + uint32_t abstop; + uint64_t ki, idx, top, sbits; + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t kd, z, r, r2, scale, tail, tmp; + + abstop = top12 (x) & 0x7ff; + if (unlikely (abstop - top12 (0x1p-54) >= top12 (512.0) - top12 (0x1p-54))) + { + if (abstop - top12 (0x1p-54) >= 0x80000000) + /* Avoid spurious underflow for tiny x. */ + /* Note: 0 is common input. */ + return WANT_ROUNDING ? 1.0 + x : 1.0; + if (abstop >= top12 (1024.0)) + { + if (asuint64 (x) == asuint64 (-INFINITY)) + return 0.0; + if (abstop >= top12 (INFINITY)) + return 1.0 + x; + if (asuint64 (x) >> 63) + return __math_uflow (0); + else + return __math_oflow (0); + } + /* Large x is special cased below. */ + abstop = 0; + } + + /* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */ + /* x = ln2/N*k + r, with int k and r in [-ln2/2N, ln2/2N]. */ + z = InvLn2N * x; +#if TOINT_INTRINSICS + kd = roundtoint (z); + ki = converttoint (z); +#elif EXP_USE_TOINT_NARROW + /* z - kd is in [-0.5-2^-16, 0.5] in all rounding modes. */ + kd = eval_as_double (z + Shift); + ki = asuint64 (kd) >> 16; + kd = (double_t) (int32_t) ki; +#else + /* z - kd is in [-1, 1] in non-nearest rounding modes. */ + kd = eval_as_double (z + Shift); + ki = asuint64 (kd); + kd -= Shift; +#endif + r = x + kd * NegLn2hiN + kd * NegLn2loN; + /* The code assumes 2^-200 < |xtail| < 2^-8/N. */ + if (hastail) + r += xtail; + /* 2^(k/N) ~= scale * (1 + tail). */ + idx = 2 * (ki % N); + top = ki << (52 - EXP_TABLE_BITS); + tail = asdouble (T[idx]); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + sbits = T[idx + 1] + top; + /* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (tail + exp(r) - 1). */ + /* Evaluation is optimized assuming superscalar pipelined execution. */ + r2 = r * r; + /* Without fma the worst case error is 0.25/N ulp larger. */ + /* Worst case error is less than 0.5+1.11/N+(abs poly error * 2^53) ulp. */ +#if EXP_POLY_ORDER == 4 + tmp = tail + r + r2 * C2 + r * r2 * (C3 + r * C4); +#elif EXP_POLY_ORDER == 5 + tmp = tail + r + r2 * (C2 + r * C3) + r2 * r2 * (C4 + r * C5); +#elif EXP_POLY_ORDER == 6 + tmp = tail + r + r2 * (0.5 + r * C3) + r2 * r2 * (C4 + r * C5 + r2 * C6); +#endif + if (unlikely (abstop == 0)) + return specialcase (tmp, sbits, ki); + scale = asdouble (sbits); + /* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there + is no spurious underflow here even without fma. */ + return eval_as_double (scale + scale * tmp); +} + +/* May be useful for implementing pow where more than double + precision input is needed. */ +double +__exp_dd (double x, double xtail) +{ + return exp_inline (x, xtail, 1); +} + diff --git a/contrib/arm-optimized-routines/pl/math/exp_data.c b/contrib/arm-optimized-routines/pl/math/exp_data.c new file mode 100644 index 000000000000..2354be76cfab --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/exp_data.c @@ -0,0 +1,1120 @@ +/* + * Shared data between exp, exp2 and pow. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << EXP_TABLE_BITS) + +const struct exp_data __exp_data = { +// N/ln2 +.invln2N = 0x1.71547652b82fep0 * N, +// -ln2/N +#if N == 64 +.negln2hiN = -0x1.62e42fefa0000p-7, +.negln2loN = -0x1.cf79abc9e3b3ap-46, +#elif N == 128 +.negln2hiN = -0x1.62e42fefa0000p-8, +.negln2loN = -0x1.cf79abc9e3b3ap-47, +#elif N == 256 +.negln2hiN = -0x1.62e42fefc0000p-9, +.negln2loN = 0x1.c610ca86c3899p-45, +#elif N == 512 +.negln2hiN = -0x1.62e42fef80000p-10, +.negln2loN = -0x1.1cf79abc9e3b4p-45, +#endif +// Used for rounding when !TOINT_INTRINSICS +#if EXP_USE_TOINT_NARROW +.shift = 0x1800000000.8p0, +#else +.shift = 0x1.8p52, +#endif +// exp polynomial coefficients. +.poly = { +#if N == 64 && EXP_POLY_ORDER == 5 && !EXP_POLY_WIDE +// abs error: 1.5543*2^-60 +// ulp error: 0.529 (0.533 without fma) +// if |x| < ln2/128+eps +// abs error if |x| < ln2/64: 1.7157*2^-50 +0x1.fffffffffdbcdp-2, +0x1.555555555444cp-3, +0x1.555573c6a9f7dp-5, +0x1.1111266d28935p-7, +#elif N == 64 && EXP_POLY_ORDER == 6 && EXP_POLY_WIDE +// abs error: 1.6735*2^-64 +// ulp error: 0.518 (0.522 without fma) +// if |x| < ln2/64 +0x1.5555555548f9ap-3, +0x1.555555554bf5dp-5, +0x1.11115b75f0f4dp-7, +0x1.6c171a6b6303ep-10, +#elif N == 128 && EXP_POLY_ORDER == 5 && !EXP_POLY_WIDE +// abs error: 1.555*2^-66 +// ulp error: 0.509 (0.511 without fma) +// if |x| < ln2/256+eps +// abs error if |x| < ln2/256+0x1p-15: 1.09*2^-65 +// abs error if |x| < ln2/128: 1.7145*2^-56 +0x1.ffffffffffdbdp-2, +0x1.555555555543cp-3, +0x1.55555cf172b91p-5, +0x1.1111167a4d017p-7, +#elif N == 128 && EXP_POLY_ORDER == 5 && EXP_POLY_WIDE +// abs error: 1.5542*2^-60 +// ulp error: 0.521 (0.523 without fma) +// if |x| < ln2/128 +0x1.fffffffffdbcep-2, +0x1.55555555543c2p-3, +0x1.555573c64f2e3p-5, +0x1.111126b4eff73p-7, +#elif N == 128 && EXP_POLY_ORDER == 6 && EXP_POLY_WIDE +// abs error: 1.6861*2^-71 +// ulp error: 0.509 (0.511 without fma) +// if |x| < ln2/128 +0x1.55555555548fdp-3, +0x1.555555555658fp-5, +0x1.111123a859bb6p-7, +0x1.6c16ba6920cabp-10, +#elif N == 256 && EXP_POLY_ORDER == 4 && !EXP_POLY_WIDE +// abs error: 1.43*2^-58 +// ulp error: 0.549 (0.550 without fma) +// if |x| < ln2/512 +0x1p0, // unused +0x1.fffffffffffd4p-2, +0x1.5555571d6ef9p-3, +0x1.5555576a5adcep-5, +#elif N == 256 && EXP_POLY_ORDER == 5 && EXP_POLY_WIDE +// abs error: 1.5547*2^-66 +// ulp error: 0.505 (0.506 without fma) +// if |x| < ln2/256 +0x1.ffffffffffdbdp-2, +0x1.555555555543cp-3, +0x1.55555cf16e1edp-5, +0x1.1111167a4b553p-7, +#elif N == 512 && EXP_POLY_ORDER == 4 && !EXP_POLY_WIDE +// abs error: 1.4300*2^-63 +// ulp error: 0.504 +// if |x| < ln2/1024 +// abs error if |x| < ln2/512: 1.0689*2^-55 +0x1p0, // unused +0x1.ffffffffffffdp-2, +0x1.555555c75bb6p-3, +0x1.555555dec04a8p-5, +#endif +}, +.exp2_shift = 0x1.8p52 / N, +// exp2 polynomial coefficients. +.exp2_poly = { +#if N == 64 && EXP2_POLY_ORDER == 6 && EXP2_POLY_WIDE +// abs error: 1.3054*2^-63 +// ulp error: 0.515 +// if |x| < 1/64 +0x1.62e42fefa39efp-1, +0x1.ebfbdff82c58fp-3, +0x1.c6b08d7045cf1p-5, +0x1.3b2ab6fb8fd0ep-7, +0x1.5d884afec48d7p-10, +0x1.43097dc684ae1p-13, +#elif N == 128 && EXP2_POLY_ORDER == 5 && !EXP2_POLY_WIDE +// abs error: 1.2195*2^-65 +// ulp error: 0.507 (0.511 without fma) +// if |x| < 1/256 +// abs error if |x| < 1/128: 1.9941*2^-56 +0x1.62e42fefa39efp-1, +0x1.ebfbdff82c424p-3, +0x1.c6b08d70cf4b5p-5, +0x1.3b2abd24650ccp-7, +0x1.5d7e09b4e3a84p-10, +#elif N == 256 && EXP2_POLY_ORDER == 5 && EXP2_POLY_WIDE +// abs error: 1.2195*2^-65 +// ulp error: 0.504 (0.508 without fma) +// if |x| < 1/256 +0x1.62e42fefa39efp-1, +0x1.ebfbdff82c424p-3, +0x1.c6b08d70cf4b5p-5, +0x1.3b2abd24650ccp-7, +0x1.5d7e09b4e3a84p-10, +#elif N == 512 && EXP2_POLY_ORDER == 4 && !EXP2_POLY_WIDE +// abs error: 1.4411*2^-64 +// ulp error: 0.5024 (0.5063 without fma) +// if |x| < 1/1024 +// abs error if |x| < 1/512: 1.9430*2^-56 +0x1.62e42fefa39ecp-1, +0x1.ebfbdff82c58bp-3, +0x1.c6b08e46de41fp-5, +0x1.3b2ab786ee1dap-7, +#endif +}, +// 2^(k/N) ~= H[k]*(1 + T[k]) for int k in [0,N) +// tab[2*k] = asuint64(T[k]) +// tab[2*k+1] = asuint64(H[k]) - (k << 52)/N +.tab = { +#if N == 64 +0x0, 0x3ff0000000000000, +0xbc7160139cd8dc5d, 0x3fefec9a3e778061, +0x3c8cd2523567f613, 0x3fefd9b0d3158574, +0x3c60f74e61e6c861, 0x3fefc74518759bc8, +0x3c979aa65d837b6d, 0x3fefb5586cf9890f, +0x3c3ebe3d702f9cd1, 0x3fefa3ec32d3d1a2, +0xbc9556522a2fbd0e, 0x3fef9301d0125b51, +0xbc91c923b9d5f416, 0x3fef829aaea92de0, +0xbc801b15eaa59348, 0x3fef72b83c7d517b, +0x3c8b898c3f1353bf, 0x3fef635beb6fcb75, +0x3c9aecf73e3a2f60, 0x3fef54873168b9aa, +0x3c8a6f4144a6c38d, 0x3fef463b88628cd6, +0x3c968efde3a8a894, 0x3fef387a6e756238, +0x3c80472b981fe7f2, 0x3fef2b4565e27cdd, +0x3c82f7e16d09ab31, 0x3fef1e9df51fdee1, +0x3c8b3782720c0ab4, 0x3fef1285a6e4030b, +0x3c834d754db0abb6, 0x3fef06fe0a31b715, +0x3c8fdd395dd3f84a, 0x3feefc08b26416ff, +0xbc924aedcc4b5068, 0x3feef1a7373aa9cb, +0xbc71d1e83e9436d2, 0x3feee7db34e59ff7, +0x3c859f48a72a4c6d, 0x3feedea64c123422, +0xbc58a78f4817895b, 0x3feed60a21f72e2a, +0x3c4363ed60c2ac11, 0x3feece086061892d, +0x3c6ecce1daa10379, 0x3feec6a2b5c13cd0, +0x3c7690cebb7aafb0, 0x3feebfdad5362a27, +0xbc8f94340071a38e, 0x3feeb9b2769d2ca7, +0xbc78dec6bd0f385f, 0x3feeb42b569d4f82, +0x3c93350518fdd78e, 0x3feeaf4736b527da, +0x3c9063e1e21c5409, 0x3feeab07dd485429, +0x3c9432e62b64c035, 0x3feea76f15ad2148, +0xbc8c33c53bef4da8, 0x3feea47eb03a5585, +0xbc93cedd78565858, 0x3feea23882552225, +0xbc93b3efbf5e2228, 0x3feea09e667f3bcd, +0xbc6367efb86da9ee, 0x3fee9fb23c651a2f, +0xbc781f647e5a3ecf, 0x3fee9f75e8ec5f74, +0xbc8619321e55e68a, 0x3fee9feb564267c9, +0xbc7b32dcb94da51d, 0x3feea11473eb0187, +0x3c65ebe1abd66c55, 0x3feea2f336cf4e62, +0xbc9369b6f13b3734, 0x3feea589994cce13, +0xbc94d450d872576e, 0x3feea8d99b4492ed, +0x3c8db72fc1f0eab4, 0x3feeace5422aa0db, +0x3c7bf68359f35f44, 0x3feeb1ae99157736, +0xbc5da9b88b6c1e29, 0x3feeb737b0cdc5e5, +0xbc92434322f4f9aa, 0x3feebd829fde4e50, +0x3c71affc2b91ce27, 0x3feec49182a3f090, +0xbc87c50422622263, 0x3feecc667b5de565, +0xbc91bbd1d3bcbb15, 0x3feed503b23e255d, +0x3c8469846e735ab3, 0x3feede6b5579fdbf, +0x3c8c1a7792cb3387, 0x3feee89f995ad3ad, +0xbc55c3d956dcaeba, 0x3feef3a2b84f15fb, +0xbc68d6f438ad9334, 0x3feeff76f2fb5e47, +0x3c74ffd70a5fddcd, 0x3fef0c1e904bc1d2, +0x3c736eae30af0cb3, 0x3fef199bdd85529c, +0x3c84e08fd10959ac, 0x3fef27f12e57d14b, +0x3c676b2c6c921968, 0x3fef3720dcef9069, +0xbc8fad5d3ffffa6f, 0x3fef472d4a07897c, +0x3c74a385a63d07a7, 0x3fef5818dcfba487, +0x3c8e5a50d5c192ac, 0x3fef69e603db3285, +0xbc82d52107b43e1f, 0x3fef7c97337b9b5f, +0x3c74b604603a88d3, 0x3fef902ee78b3ff6, +0xbc8ff7128fd391f0, 0x3fefa4afa2a490da, +0x3c8ec3bc41aa2008, 0x3fefba1bee615a27, +0x3c8a64a931d185ee, 0x3fefd0765b6e4540, +0x3c77893b4d91cd9d, 0x3fefe7c1819e90d8, +#elif N == 128 +0x0, 0x3ff0000000000000, +0x3c9b3b4f1a88bf6e, 0x3feff63da9fb3335, +0xbc7160139cd8dc5d, 0x3fefec9a3e778061, +0xbc905e7a108766d1, 0x3fefe315e86e7f85, +0x3c8cd2523567f613, 0x3fefd9b0d3158574, +0xbc8bce8023f98efa, 0x3fefd06b29ddf6de, +0x3c60f74e61e6c861, 0x3fefc74518759bc8, +0x3c90a3e45b33d399, 0x3fefbe3ecac6f383, +0x3c979aa65d837b6d, 0x3fefb5586cf9890f, +0x3c8eb51a92fdeffc, 0x3fefac922b7247f7, +0x3c3ebe3d702f9cd1, 0x3fefa3ec32d3d1a2, +0xbc6a033489906e0b, 0x3fef9b66affed31b, +0xbc9556522a2fbd0e, 0x3fef9301d0125b51, +0xbc5080ef8c4eea55, 0x3fef8abdc06c31cc, +0xbc91c923b9d5f416, 0x3fef829aaea92de0, +0x3c80d3e3e95c55af, 0x3fef7a98c8a58e51, +0xbc801b15eaa59348, 0x3fef72b83c7d517b, +0xbc8f1ff055de323d, 0x3fef6af9388c8dea, +0x3c8b898c3f1353bf, 0x3fef635beb6fcb75, +0xbc96d99c7611eb26, 0x3fef5be084045cd4, +0x3c9aecf73e3a2f60, 0x3fef54873168b9aa, +0xbc8fe782cb86389d, 0x3fef4d5022fcd91d, +0x3c8a6f4144a6c38d, 0x3fef463b88628cd6, +0x3c807a05b0e4047d, 0x3fef3f49917ddc96, +0x3c968efde3a8a894, 0x3fef387a6e756238, +0x3c875e18f274487d, 0x3fef31ce4fb2a63f, +0x3c80472b981fe7f2, 0x3fef2b4565e27cdd, +0xbc96b87b3f71085e, 0x3fef24dfe1f56381, +0x3c82f7e16d09ab31, 0x3fef1e9df51fdee1, +0xbc3d219b1a6fbffa, 0x3fef187fd0dad990, +0x3c8b3782720c0ab4, 0x3fef1285a6e4030b, +0x3c6e149289cecb8f, 0x3fef0cafa93e2f56, +0x3c834d754db0abb6, 0x3fef06fe0a31b715, +0x3c864201e2ac744c, 0x3fef0170fc4cd831, +0x3c8fdd395dd3f84a, 0x3feefc08b26416ff, +0xbc86a3803b8e5b04, 0x3feef6c55f929ff1, +0xbc924aedcc4b5068, 0x3feef1a7373aa9cb, +0xbc9907f81b512d8e, 0x3feeecae6d05d866, +0xbc71d1e83e9436d2, 0x3feee7db34e59ff7, +0xbc991919b3ce1b15, 0x3feee32dc313a8e5, +0x3c859f48a72a4c6d, 0x3feedea64c123422, +0xbc9312607a28698a, 0x3feeda4504ac801c, +0xbc58a78f4817895b, 0x3feed60a21f72e2a, +0xbc7c2c9b67499a1b, 0x3feed1f5d950a897, +0x3c4363ed60c2ac11, 0x3feece086061892d, +0x3c9666093b0664ef, 0x3feeca41ed1d0057, +0x3c6ecce1daa10379, 0x3feec6a2b5c13cd0, +0x3c93ff8e3f0f1230, 0x3feec32af0d7d3de, +0x3c7690cebb7aafb0, 0x3feebfdad5362a27, +0x3c931dbdeb54e077, 0x3feebcb299fddd0d, +0xbc8f94340071a38e, 0x3feeb9b2769d2ca7, +0xbc87deccdc93a349, 0x3feeb6daa2cf6642, +0xbc78dec6bd0f385f, 0x3feeb42b569d4f82, +0xbc861246ec7b5cf6, 0x3feeb1a4ca5d920f, +0x3c93350518fdd78e, 0x3feeaf4736b527da, +0x3c7b98b72f8a9b05, 0x3feead12d497c7fd, +0x3c9063e1e21c5409, 0x3feeab07dd485429, +0x3c34c7855019c6ea, 0x3feea9268a5946b7, +0x3c9432e62b64c035, 0x3feea76f15ad2148, +0xbc8ce44a6199769f, 0x3feea5e1b976dc09, +0xbc8c33c53bef4da8, 0x3feea47eb03a5585, +0xbc845378892be9ae, 0x3feea34634ccc320, +0xbc93cedd78565858, 0x3feea23882552225, +0x3c5710aa807e1964, 0x3feea155d44ca973, +0xbc93b3efbf5e2228, 0x3feea09e667f3bcd, +0xbc6a12ad8734b982, 0x3feea012750bdabf, +0xbc6367efb86da9ee, 0x3fee9fb23c651a2f, +0xbc80dc3d54e08851, 0x3fee9f7df9519484, +0xbc781f647e5a3ecf, 0x3fee9f75e8ec5f74, +0xbc86ee4ac08b7db0, 0x3fee9f9a48a58174, +0xbc8619321e55e68a, 0x3fee9feb564267c9, +0x3c909ccb5e09d4d3, 0x3feea0694fde5d3f, +0xbc7b32dcb94da51d, 0x3feea11473eb0187, +0x3c94ecfd5467c06b, 0x3feea1ed0130c132, +0x3c65ebe1abd66c55, 0x3feea2f336cf4e62, +0xbc88a1c52fb3cf42, 0x3feea427543e1a12, +0xbc9369b6f13b3734, 0x3feea589994cce13, +0xbc805e843a19ff1e, 0x3feea71a4623c7ad, +0xbc94d450d872576e, 0x3feea8d99b4492ed, +0x3c90ad675b0e8a00, 0x3feeaac7d98a6699, +0x3c8db72fc1f0eab4, 0x3feeace5422aa0db, +0xbc65b6609cc5e7ff, 0x3feeaf3216b5448c, +0x3c7bf68359f35f44, 0x3feeb1ae99157736, +0xbc93091fa71e3d83, 0x3feeb45b0b91ffc6, +0xbc5da9b88b6c1e29, 0x3feeb737b0cdc5e5, +0xbc6c23f97c90b959, 0x3feeba44cbc8520f, +0xbc92434322f4f9aa, 0x3feebd829fde4e50, +0xbc85ca6cd7668e4b, 0x3feec0f170ca07ba, +0x3c71affc2b91ce27, 0x3feec49182a3f090, +0x3c6dd235e10a73bb, 0x3feec86319e32323, +0xbc87c50422622263, 0x3feecc667b5de565, +0x3c8b1c86e3e231d5, 0x3feed09bec4a2d33, +0xbc91bbd1d3bcbb15, 0x3feed503b23e255d, +0x3c90cc319cee31d2, 0x3feed99e1330b358, +0x3c8469846e735ab3, 0x3feede6b5579fdbf, +0xbc82dfcd978e9db4, 0x3feee36bbfd3f37a, +0x3c8c1a7792cb3387, 0x3feee89f995ad3ad, +0xbc907b8f4ad1d9fa, 0x3feeee07298db666, +0xbc55c3d956dcaeba, 0x3feef3a2b84f15fb, +0xbc90a40e3da6f640, 0x3feef9728de5593a, +0xbc68d6f438ad9334, 0x3feeff76f2fb5e47, +0xbc91eee26b588a35, 0x3fef05b030a1064a, +0x3c74ffd70a5fddcd, 0x3fef0c1e904bc1d2, +0xbc91bdfbfa9298ac, 0x3fef12c25bd71e09, +0x3c736eae30af0cb3, 0x3fef199bdd85529c, +0x3c8ee3325c9ffd94, 0x3fef20ab5fffd07a, +0x3c84e08fd10959ac, 0x3fef27f12e57d14b, +0x3c63cdaf384e1a67, 0x3fef2f6d9406e7b5, +0x3c676b2c6c921968, 0x3fef3720dcef9069, +0xbc808a1883ccb5d2, 0x3fef3f0b555dc3fa, +0xbc8fad5d3ffffa6f, 0x3fef472d4a07897c, +0xbc900dae3875a949, 0x3fef4f87080d89f2, +0x3c74a385a63d07a7, 0x3fef5818dcfba487, +0xbc82919e2040220f, 0x3fef60e316c98398, +0x3c8e5a50d5c192ac, 0x3fef69e603db3285, +0x3c843a59ac016b4b, 0x3fef7321f301b460, +0xbc82d52107b43e1f, 0x3fef7c97337b9b5f, +0xbc892ab93b470dc9, 0x3fef864614f5a129, +0x3c74b604603a88d3, 0x3fef902ee78b3ff6, +0x3c83c5ec519d7271, 0x3fef9a51fbc74c83, +0xbc8ff7128fd391f0, 0x3fefa4afa2a490da, +0xbc8dae98e223747d, 0x3fefaf482d8e67f1, +0x3c8ec3bc41aa2008, 0x3fefba1bee615a27, +0x3c842b94c3a9eb32, 0x3fefc52b376bba97, +0x3c8a64a931d185ee, 0x3fefd0765b6e4540, +0xbc8e37bae43be3ed, 0x3fefdbfdad9cbe14, +0x3c77893b4d91cd9d, 0x3fefe7c1819e90d8, +0x3c5305c14160cc89, 0x3feff3c22b8f71f1, +#elif N == 256 +0x0, 0x3ff0000000000000, +0xbc84e82fc61851ac, 0x3feffb1afa5abcbf, +0x3c9b3b4f1a88bf6e, 0x3feff63da9fb3335, +0xbc82985dd8521d32, 0x3feff168143b0281, +0xbc7160139cd8dc5d, 0x3fefec9a3e778061, +0x3c651e617061bfbd, 0x3fefe7d42e11bbcc, +0xbc905e7a108766d1, 0x3fefe315e86e7f85, +0x3c845fad437fa426, 0x3fefde5f72f654b1, +0x3c8cd2523567f613, 0x3fefd9b0d3158574, +0xbc954529642b232f, 0x3fefd50a0e3c1f89, +0xbc8bce8023f98efa, 0x3fefd06b29ddf6de, +0x3c8293708ef5c32e, 0x3fefcbd42b72a836, +0x3c60f74e61e6c861, 0x3fefc74518759bc8, +0xbc95b9280905b2a4, 0x3fefc2bdf66607e0, +0x3c90a3e45b33d399, 0x3fefbe3ecac6f383, +0x3c84f31f32c4b7e7, 0x3fefb9c79b1f3919, +0x3c979aa65d837b6d, 0x3fefb5586cf9890f, +0x3c9407fb30d06420, 0x3fefb0f145e46c85, +0x3c8eb51a92fdeffc, 0x3fefac922b7247f7, +0xbc9a5d04b3b9911b, 0x3fefa83b23395dec, +0x3c3ebe3d702f9cd1, 0x3fefa3ec32d3d1a2, +0xbc937a01f0739546, 0x3fef9fa55fdfa9c5, +0xbc6a033489906e0b, 0x3fef9b66affed31b, +0x3c8b8268b04ef0a5, 0x3fef973028d7233e, +0xbc9556522a2fbd0e, 0x3fef9301d0125b51, +0xbc9ac46e44a2ebcc, 0x3fef8edbab5e2ab6, +0xbc5080ef8c4eea55, 0x3fef8abdc06c31cc, +0xbc65704e90c9f860, 0x3fef86a814f204ab, +0xbc91c923b9d5f416, 0x3fef829aaea92de0, +0xbc897cea57e46280, 0x3fef7e95934f312e, +0x3c80d3e3e95c55af, 0x3fef7a98c8a58e51, +0x3c56f01429e2b9d2, 0x3fef76a45471c3c2, +0xbc801b15eaa59348, 0x3fef72b83c7d517b, +0x3c6e653b2459034b, 0x3fef6ed48695bbc0, +0xbc8f1ff055de323d, 0x3fef6af9388c8dea, +0x3c92cc7ea345b7dc, 0x3fef672658375d2f, +0x3c8b898c3f1353bf, 0x3fef635beb6fcb75, +0x3c957bfb2876ea9e, 0x3fef5f99f8138a1c, +0xbc96d99c7611eb26, 0x3fef5be084045cd4, +0x3c8cdc1873af2155, 0x3fef582f95281c6b, +0x3c9aecf73e3a2f60, 0x3fef54873168b9aa, +0xbc9493684653a131, 0x3fef50e75eb44027, +0xbc8fe782cb86389d, 0x3fef4d5022fcd91d, +0xbc98e2899077520a, 0x3fef49c18438ce4d, +0x3c8a6f4144a6c38d, 0x3fef463b88628cd6, +0x3c9120fcd4f59273, 0x3fef42be3578a819, +0x3c807a05b0e4047d, 0x3fef3f49917ddc96, +0x3c89b788c188c9b8, 0x3fef3bdda27912d1, +0x3c968efde3a8a894, 0x3fef387a6e756238, +0x3c877afbca90ef84, 0x3fef351ffb82140a, +0x3c875e18f274487d, 0x3fef31ce4fb2a63f, +0x3c91512f082876ee, 0x3fef2e85711ece75, +0x3c80472b981fe7f2, 0x3fef2b4565e27cdd, +0x3c9a02f0c7d75ec6, 0x3fef280e341ddf29, +0xbc96b87b3f71085e, 0x3fef24dfe1f56381, +0xbc803297e78260bf, 0x3fef21ba7591bb70, +0x3c82f7e16d09ab31, 0x3fef1e9df51fdee1, +0xbc95b77e5ccd9fbf, 0x3fef1b8a66d10f13, +0xbc3d219b1a6fbffa, 0x3fef187fd0dad990, +0xbc91e75c40b4251e, 0x3fef157e39771b2f, +0x3c8b3782720c0ab4, 0x3fef1285a6e4030b, +0x3c98a911f1f7785a, 0x3fef0f961f641589, +0x3c6e149289cecb8f, 0x3fef0cafa93e2f56, +0xbc61e7c998db7dbb, 0x3fef09d24abd886b, +0x3c834d754db0abb6, 0x3fef06fe0a31b715, +0x3c85425c11faadf4, 0x3fef0432edeeb2fd, +0x3c864201e2ac744c, 0x3fef0170fc4cd831, +0xbc979517a03e2847, 0x3feefeb83ba8ea32, +0x3c8fdd395dd3f84a, 0x3feefc08b26416ff, +0xbc800e2a46da4bee, 0x3feef96266e3fa2d, +0xbc86a3803b8e5b04, 0x3feef6c55f929ff1, +0xbc87430803972b34, 0x3feef431a2de883b, +0xbc924aedcc4b5068, 0x3feef1a7373aa9cb, +0xbc954de30ae02d94, 0x3feeef26231e754a, +0xbc9907f81b512d8e, 0x3feeecae6d05d866, +0xbc94f2487e1c03ec, 0x3feeea401b7140ef, +0xbc71d1e83e9436d2, 0x3feee7db34e59ff7, +0x3c914a5432fcb2f4, 0x3feee57fbfec6cf4, +0xbc991919b3ce1b15, 0x3feee32dc313a8e5, +0x3c79c3bba5562a2f, 0x3feee0e544ede173, +0x3c859f48a72a4c6d, 0x3feedea64c123422, +0xbc85a71612e21658, 0x3feedc70df1c5175, +0xbc9312607a28698a, 0x3feeda4504ac801c, +0x3c86421f6f1d24d6, 0x3feed822c367a024, +0xbc58a78f4817895b, 0x3feed60a21f72e2a, +0xbc9348a6815fce65, 0x3feed3fb2709468a, +0xbc7c2c9b67499a1b, 0x3feed1f5d950a897, +0x3c835c43984d9871, 0x3feecffa3f84b9d4, +0x3c4363ed60c2ac11, 0x3feece086061892d, +0xbc632afc8d9473a0, 0x3feecc2042a7d232, +0x3c9666093b0664ef, 0x3feeca41ed1d0057, +0xbc95fc5e44de020e, 0x3feec86d668b3237, +0x3c6ecce1daa10379, 0x3feec6a2b5c13cd0, +0xbc7ea0148327c42f, 0x3feec4e1e192aed2, +0x3c93ff8e3f0f1230, 0x3feec32af0d7d3de, +0xbc7a843ad1a88022, 0x3feec17dea6db7d7, +0x3c7690cebb7aafb0, 0x3feebfdad5362a27, +0x3c892ca3bf144e63, 0x3feebe41b817c114, +0x3c931dbdeb54e077, 0x3feebcb299fddd0d, +0xbc902c99b04aa8b0, 0x3feebb2d81d8abff, +0xbc8f94340071a38e, 0x3feeb9b2769d2ca7, +0x3c73e34f67e67118, 0x3feeb8417f4531ee, +0xbc87deccdc93a349, 0x3feeb6daa2cf6642, +0xbc75a3b1197ba0f0, 0x3feeb57de83f4eef, +0xbc78dec6bd0f385f, 0x3feeb42b569d4f82, +0x3c81bd2888075068, 0x3feeb2e2f4f6ad27, +0xbc861246ec7b5cf6, 0x3feeb1a4ca5d920f, +0xbc896be8ae89ef8f, 0x3feeb070dde910d2, +0x3c93350518fdd78e, 0x3feeaf4736b527da, +0xbc88e6ac90348602, 0x3feeae27dbe2c4cf, +0x3c7b98b72f8a9b05, 0x3feead12d497c7fd, +0xbc91af7f1365c3ac, 0x3feeac0827ff07cc, +0x3c9063e1e21c5409, 0x3feeab07dd485429, +0xbc943a3540d1898a, 0x3feeaa11fba87a03, +0x3c34c7855019c6ea, 0x3feea9268a5946b7, +0xbc951f58ddaa8090, 0x3feea84590998b93, +0x3c9432e62b64c035, 0x3feea76f15ad2148, +0xbc82e1648e50a17c, 0x3feea6a320dceb71, +0xbc8ce44a6199769f, 0x3feea5e1b976dc09, +0x3c95f30eda98a575, 0x3feea52ae6cdf6f4, +0xbc8c33c53bef4da8, 0x3feea47eb03a5585, +0x3c917ecda8a72159, 0x3feea3dd1d1929fd, +0xbc845378892be9ae, 0x3feea34634ccc320, +0xbc9345f3cee1ae6e, 0x3feea2b9febc8fb7, +0xbc93cedd78565858, 0x3feea23882552225, +0xbc85c33fdf910406, 0x3feea1c1c70833f6, +0x3c5710aa807e1964, 0x3feea155d44ca973, +0x3c81079ab5789604, 0x3feea0f4b19e9538, +0xbc93b3efbf5e2228, 0x3feea09e667f3bcd, +0x3c727df161cd7778, 0x3feea052fa75173e, +0xbc6a12ad8734b982, 0x3feea012750bdabf, +0x3c93f9924a05b767, 0x3fee9fdcddd47645, +0xbc6367efb86da9ee, 0x3fee9fb23c651a2f, +0xbc87557939a8b5ef, 0x3fee9f9298593ae5, +0xbc80dc3d54e08851, 0x3fee9f7df9519484, +0x3c51ed2f56fa9d1a, 0x3fee9f7466f42e87, +0xbc781f647e5a3ecf, 0x3fee9f75e8ec5f74, +0xbc88e67a9006c909, 0x3fee9f8286ead08a, +0xbc86ee4ac08b7db0, 0x3fee9f9a48a58174, +0x3c86597566977ac8, 0x3fee9fbd35d7cbfd, +0xbc8619321e55e68a, 0x3fee9feb564267c9, +0x3c92c0b7028a5c3a, 0x3feea024b1ab6e09, +0x3c909ccb5e09d4d3, 0x3feea0694fde5d3f, +0x3c8a30faf49cc78c, 0x3feea0b938ac1cf6, +0xbc7b32dcb94da51d, 0x3feea11473eb0187, +0xbc92dad3519d7b5b, 0x3feea17b0976cfdb, +0x3c94ecfd5467c06b, 0x3feea1ed0130c132, +0x3c87d51410fd15c2, 0x3feea26a62ff86f0, +0x3c65ebe1abd66c55, 0x3feea2f336cf4e62, +0xbc760a3629969871, 0x3feea3878491c491, +0xbc88a1c52fb3cf42, 0x3feea427543e1a12, +0x3c8b18c6e3fdef5d, 0x3feea4d2add106d9, +0xbc9369b6f13b3734, 0x3feea589994cce13, +0x3c90ec1ddcb1390a, 0x3feea64c1eb941f7, +0xbc805e843a19ff1e, 0x3feea71a4623c7ad, +0xbc522cea4f3afa1e, 0x3feea7f4179f5b21, +0xbc94d450d872576e, 0x3feea8d99b4492ed, +0x3c7c88549b958471, 0x3feea9cad931a436, +0x3c90ad675b0e8a00, 0x3feeaac7d98a6699, +0x3c931143962f7877, 0x3feeabd0a478580f, +0x3c8db72fc1f0eab4, 0x3feeace5422aa0db, +0x3c93e9e96f112479, 0x3feeae05bad61778, +0xbc65b6609cc5e7ff, 0x3feeaf3216b5448c, +0xbc8dac42a4a38df0, 0x3feeb06a5e0866d9, +0x3c7bf68359f35f44, 0x3feeb1ae99157736, +0x3c8b99dd98b1ed84, 0x3feeb2fed0282c8a, +0xbc93091fa71e3d83, 0x3feeb45b0b91ffc6, +0xbc7885ad50cbb750, 0x3feeb5c353aa2fe2, +0xbc5da9b88b6c1e29, 0x3feeb737b0cdc5e5, +0xbc82d5e85f3e0301, 0x3feeb8b82b5f98e5, +0xbc6c23f97c90b959, 0x3feeba44cbc8520f, +0xbc51669428996971, 0x3feebbdd9a7670b3, +0xbc92434322f4f9aa, 0x3feebd829fde4e50, +0x3c71f2b2c1c4c014, 0x3feebf33e47a22a2, +0xbc85ca6cd7668e4b, 0x3feec0f170ca07ba, +0xbc9294f304f166b6, 0x3feec2bb4d53fe0d, +0x3c71affc2b91ce27, 0x3feec49182a3f090, +0xbc8a1e58414c07d3, 0x3feec674194bb8d5, +0x3c6dd235e10a73bb, 0x3feec86319e32323, +0xbc79740b58a20091, 0x3feeca5e8d07f29e, +0xbc87c50422622263, 0x3feecc667b5de565, +0x3c9165830a2b96c2, 0x3feece7aed8eb8bb, +0x3c8b1c86e3e231d5, 0x3feed09bec4a2d33, +0xbc903d5cbe27874b, 0x3feed2c980460ad8, +0xbc91bbd1d3bcbb15, 0x3feed503b23e255d, +0x3c5986178980fce0, 0x3feed74a8af46052, +0x3c90cc319cee31d2, 0x3feed99e1330b358, +0xbc89472975b1f2a5, 0x3feedbfe53c12e59, +0x3c8469846e735ab3, 0x3feede6b5579fdbf, +0x3c7d8157a34b7e7f, 0x3feee0e521356eba, +0xbc82dfcd978e9db4, 0x3feee36bbfd3f37a, +0x3c8c8a4e231ebb7d, 0x3feee5ff3a3c2774, +0x3c8c1a7792cb3387, 0x3feee89f995ad3ad, +0xbc888c8d11a142e5, 0x3feeeb4ce622f2ff, +0xbc907b8f4ad1d9fa, 0x3feeee07298db666, +0x3c889c2ea41433c7, 0x3feef0ce6c9a8952, +0xbc55c3d956dcaeba, 0x3feef3a2b84f15fb, +0xbc7274aedac8ff80, 0x3feef68415b749b1, +0xbc90a40e3da6f640, 0x3feef9728de5593a, +0x3c85c620ce76df06, 0x3feefc6e29f1c52a, +0xbc68d6f438ad9334, 0x3feeff76f2fb5e47, +0xbc8fda52e1b51e41, 0x3fef028cf22749e4, +0xbc91eee26b588a35, 0x3fef05b030a1064a, +0xbc32141a7b3e2cd8, 0x3fef08e0b79a6f1f, +0x3c74ffd70a5fddcd, 0x3fef0c1e904bc1d2, +0xbc302899507554e5, 0x3fef0f69c3f3a207, +0xbc91bdfbfa9298ac, 0x3fef12c25bd71e09, +0xbc80dda2d4c0010c, 0x3fef16286141b33d, +0x3c736eae30af0cb3, 0x3fef199bdd85529c, +0xbc8a007daadf8d68, 0x3fef1d1cd9fa652c, +0x3c8ee3325c9ffd94, 0x3fef20ab5fffd07a, +0x3c836909391181d3, 0x3fef244778fafb22, +0x3c84e08fd10959ac, 0x3fef27f12e57d14b, +0xbc811cd7dbdf9547, 0x3fef2ba88988c933, +0x3c63cdaf384e1a67, 0x3fef2f6d9406e7b5, +0xbc7ac28b7bef6621, 0x3fef33405751c4db, +0x3c676b2c6c921968, 0x3fef3720dcef9069, +0xbc7030587207b9e1, 0x3fef3b0f2e6d1675, +0xbc808a1883ccb5d2, 0x3fef3f0b555dc3fa, +0xbc8cc734592af7fc, 0x3fef43155b5bab74, +0xbc8fad5d3ffffa6f, 0x3fef472d4a07897c, +0x3c87752a44f587e8, 0x3fef4b532b08c968, +0xbc900dae3875a949, 0x3fef4f87080d89f2, +0x3c85b66fefeef52e, 0x3fef53c8eacaa1d6, +0x3c74a385a63d07a7, 0x3fef5818dcfba487, +0x3c5159d9d908a96e, 0x3fef5c76e862e6d3, +0xbc82919e2040220f, 0x3fef60e316c98398, +0x3c8c254d16117a68, 0x3fef655d71ff6075, +0x3c8e5a50d5c192ac, 0x3fef69e603db3285, +0xbc8d8c329fbd0e03, 0x3fef6e7cd63a8315, +0x3c843a59ac016b4b, 0x3fef7321f301b460, +0xbc8ea6e6fbd5f2a6, 0x3fef77d5641c0658, +0xbc82d52107b43e1f, 0x3fef7c97337b9b5f, +0xbc63e8e3eab2cbb4, 0x3fef81676b197d17, +0xbc892ab93b470dc9, 0x3fef864614f5a129, +0xbc8b7966cd0d2cd9, 0x3fef8b333b16ee12, +0x3c74b604603a88d3, 0x3fef902ee78b3ff6, +0xbc776caa4c2ff1cf, 0x3fef953924676d76, +0x3c83c5ec519d7271, 0x3fef9a51fbc74c83, +0xbc81d5fc525d9940, 0x3fef9f7977cdb740, +0xbc8ff7128fd391f0, 0x3fefa4afa2a490da, +0x3c855cd8aaea3d21, 0x3fefa9f4867cca6e, +0xbc8dae98e223747d, 0x3fefaf482d8e67f1, +0x3c8269947c2bed4a, 0x3fefb4aaa2188510, +0x3c8ec3bc41aa2008, 0x3fefba1bee615a27, +0xbc83b6137e9afe9e, 0x3fefbf9c1cb6412a, +0x3c842b94c3a9eb32, 0x3fefc52b376bba97, +0xbc69fa74878ba7c7, 0x3fefcac948dd7274, +0x3c8a64a931d185ee, 0x3fefd0765b6e4540, +0x3c901f3a75ee0efe, 0x3fefd632798844f8, +0xbc8e37bae43be3ed, 0x3fefdbfdad9cbe14, +0xbc516a9ce6ed84fa, 0x3fefe1d802243c89, +0x3c77893b4d91cd9d, 0x3fefe7c1819e90d8, +0xbc699c7db2effc76, 0x3fefedba3692d514, +0x3c5305c14160cc89, 0x3feff3c22b8f71f1, +0x3c64b458677f9840, 0x3feff9d96b2a23d9, +#elif N == 512 +0x0, 0x3ff0000000000000, +0xbc75d87ade1f60d5, 0x3feffd8c86da1c0a, +0xbc84e82fc61851ac, 0x3feffb1afa5abcbf, +0x3c9bffdaa7ac4bac, 0x3feff8ab5b2cbd11, +0x3c9b3b4f1a88bf6e, 0x3feff63da9fb3335, +0x3c75c18e5ae0563a, 0x3feff3d1e77170b4, +0xbc82985dd8521d32, 0x3feff168143b0281, +0xbc705b1125cf49a5, 0x3fefef003103b10e, +0xbc7160139cd8dc5d, 0x3fefec9a3e778061, +0x3c9f879abbff3f87, 0x3fefea363d42b027, +0x3c651e617061bfbd, 0x3fefe7d42e11bbcc, +0x3c9b14003824712a, 0x3fefe57411915a8a, +0xbc905e7a108766d1, 0x3fefe315e86e7f85, +0x3c61cbf0f38af658, 0x3fefe0b9b35659d8, +0x3c845fad437fa426, 0x3fefde5f72f654b1, +0xbc9a3316383dcbc5, 0x3fefdc0727fc1762, +0x3c8cd2523567f613, 0x3fefd9b0d3158574, +0x3c9901c9e0e797fd, 0x3fefd75c74f0bec2, +0xbc954529642b232f, 0x3fefd50a0e3c1f89, +0xbc89b3236d111646, 0x3fefd2b99fa6407c, +0xbc8bce8023f98efa, 0x3fefd06b29ddf6de, +0xbc8cb191be99b1b0, 0x3fefce1ead925493, +0x3c8293708ef5c32e, 0x3fefcbd42b72a836, +0xbc9acb71e83765b7, 0x3fefc98ba42e7d30, +0x3c60f74e61e6c861, 0x3fefc74518759bc8, +0x3c5cd3e58b03697e, 0x3fefc50088f8093f, +0xbc95b9280905b2a4, 0x3fefc2bdf66607e0, +0xbc8bfb07d4755452, 0x3fefc07d61701716, +0x3c90a3e45b33d399, 0x3fefbe3ecac6f383, +0x3c8aedeb3e7b14cd, 0x3fefbc02331b9715, +0x3c84f31f32c4b7e7, 0x3fefb9c79b1f3919, +0x3c9a8eb1f3d914b4, 0x3fefb78f03834e52, +0x3c979aa65d837b6d, 0x3fefb5586cf9890f, +0xbc85b9eb0402507b, 0x3fefb323d833d93f, +0x3c9407fb30d06420, 0x3fefb0f145e46c85, +0xbc93f0f225bbf3ee, 0x3fefaec0b6bdae53, +0x3c8eb51a92fdeffc, 0x3fefac922b7247f7, +0xbc9c3fe7282d1784, 0x3fefaa65a4b520ba, +0xbc9a5d04b3b9911b, 0x3fefa83b23395dec, +0x3c9c8be44bf4cde8, 0x3fefa612a7b26300, +0x3c3ebe3d702f9cd1, 0x3fefa3ec32d3d1a2, +0x3c820c5444c93c44, 0x3fefa1c7c55189c6, +0xbc937a01f0739546, 0x3fef9fa55fdfa9c5, +0xbc84c6baeb580d7a, 0x3fef9d8503328e6d, +0xbc6a033489906e0b, 0x3fef9b66affed31b, +0x3c8657aa1b0d9f83, 0x3fef994a66f951ce, +0x3c8b8268b04ef0a5, 0x3fef973028d7233e, +0x3c62f2c7fd6ee145, 0x3fef9517f64d9ef1, +0xbc9556522a2fbd0e, 0x3fef9301d0125b51, +0xbc6b0b2789925e90, 0x3fef90edb6db2dc1, +0xbc9ac46e44a2ebcc, 0x3fef8edbab5e2ab6, +0xbc93aad17d197fae, 0x3fef8ccbae51a5c8, +0xbc5080ef8c4eea55, 0x3fef8abdc06c31cc, +0xbc989c464a07ad70, 0x3fef88b1e264a0e9, +0xbc65704e90c9f860, 0x3fef86a814f204ab, +0xbc72c338fce197f4, 0x3fef84a058cbae1e, +0xbc91c923b9d5f416, 0x3fef829aaea92de0, +0xbc6dca724cea0eb6, 0x3fef809717425438, +0xbc897cea57e46280, 0x3fef7e95934f312e, +0x3c464770b955d34d, 0x3fef7c962388149e, +0x3c80d3e3e95c55af, 0x3fef7a98c8a58e51, +0xbc962811c114424f, 0x3fef789d83606e12, +0x3c56f01429e2b9d2, 0x3fef76a45471c3c2, +0x3c8ec58e74904dd4, 0x3fef74ad3c92df73, +0xbc801b15eaa59348, 0x3fef72b83c7d517b, +0x3c8d63b0ab2d5bbf, 0x3fef70c554eaea89, +0x3c6e653b2459034b, 0x3fef6ed48695bbc0, +0xbc9ca9effbeeac92, 0x3fef6ce5d23816c9, +0xbc8f1ff055de323d, 0x3fef6af9388c8dea, +0x3c8bda920de0f6e2, 0x3fef690eba4df41f, +0x3c92cc7ea345b7dc, 0x3fef672658375d2f, +0xbc9a597f9a5ff71c, 0x3fef654013041dc2, +0x3c8b898c3f1353bf, 0x3fef635beb6fcb75, +0x3c50835b125aa573, 0x3fef6179e2363cf8, +0x3c957bfb2876ea9e, 0x3fef5f99f8138a1c, +0x3c8aaa13d61aec1f, 0x3fef5dbc2dc40bf0, +0xbc96d99c7611eb26, 0x3fef5be084045cd4, +0x3c8a4f81aa7110bd, 0x3fef5a06fb91588f, +0x3c8cdc1873af2155, 0x3fef582f95281c6b, +0xbc6817fd6a313e3e, 0x3fef565a51860746, +0x3c9aecf73e3a2f60, 0x3fef54873168b9aa, +0xbc96236af85fd26a, 0x3fef52b6358e15e8, +0xbc9493684653a131, 0x3fef50e75eb44027, +0x3c7795eb4523abe7, 0x3fef4f1aad999e82, +0xbc8fe782cb86389d, 0x3fef4d5022fcd91d, +0x3c8fe58b91b40095, 0x3fef4b87bf9cda38, +0xbc98e2899077520a, 0x3fef49c18438ce4d, +0x3c91ecaa860c614a, 0x3fef47fd7190241e, +0x3c8a6f4144a6c38d, 0x3fef463b88628cd6, +0xbc3e45c83ba0bbcb, 0x3fef447bc96ffc18, +0x3c9120fcd4f59273, 0x3fef42be3578a819, +0xbc29fd3bea07b4ee, 0x3fef4102cd3d09b9, +0x3c807a05b0e4047d, 0x3fef3f49917ddc96, +0x3c87f1c7350e256d, 0x3fef3d9282fc1f27, +0x3c89b788c188c9b8, 0x3fef3bdda27912d1, +0x3c420dac6c124f4f, 0x3fef3a2af0b63bff, +0x3c968efde3a8a894, 0x3fef387a6e756238, +0xbc99501d09bc09fd, 0x3fef36cc1c78903a, +0x3c877afbca90ef84, 0x3fef351ffb82140a, +0x3c73baf864dc8675, 0x3fef33760c547f15, +0x3c875e18f274487d, 0x3fef31ce4fb2a63f, +0x3c91b0575c1eaf54, 0x3fef3028c65fa1ff, +0x3c91512f082876ee, 0x3fef2e85711ece75, +0xbc90364bc9ce33ab, 0x3fef2ce450b3cb82, +0x3c80472b981fe7f2, 0x3fef2b4565e27cdd, +0xbc7548165d85ed32, 0x3fef29a8b16f0a30, +0x3c9a02f0c7d75ec6, 0x3fef280e341ddf29, +0x3c7c3b977a68e32c, 0x3fef2675eeb3ab98, +0xbc96b87b3f71085e, 0x3fef24dfe1f56381, +0xbc93a255f697ecfe, 0x3fef234c0ea83f36, +0xbc803297e78260bf, 0x3fef21ba7591bb70, +0x3c8d2d19edc1e550, 0x3fef202b17779965, +0x3c82f7e16d09ab31, 0x3fef1e9df51fdee1, +0xbc76b2173113dd8c, 0x3fef1d130f50d65c, +0xbc95b77e5ccd9fbf, 0x3fef1b8a66d10f13, +0x3c811aa5f853590b, 0x3fef1a03fc675d1f, +0xbc3d219b1a6fbffa, 0x3fef187fd0dad990, +0x3c61d61a34c8aa02, 0x3fef16fde4f2e280, +0xbc91e75c40b4251e, 0x3fef157e39771b2f, +0xbc91f892bf6b286d, 0x3fef1400cf2f6c18, +0x3c8b3782720c0ab4, 0x3fef1285a6e4030b, +0x3c7590c65c20e680, 0x3fef110cc15d5346, +0x3c98a911f1f7785a, 0x3fef0f961f641589, +0x3c86fe320b5c1e9d, 0x3fef0e21c1c14833, +0x3c6e149289cecb8f, 0x3fef0cafa93e2f56, +0xbc903cd8b2f25790, 0x3fef0b3fd6a454d2, +0xbc61e7c998db7dbb, 0x3fef09d24abd886b, +0x3c7b3bf786a54a87, 0x3fef08670653dfe4, +0x3c834d754db0abb6, 0x3fef06fe0a31b715, +0x3c74bb6c41732885, 0x3fef05975721b004, +0x3c85425c11faadf4, 0x3fef0432edeeb2fd, +0xbc99d7399abb9a8b, 0x3fef02d0cf63eeac, +0x3c864201e2ac744c, 0x3fef0170fc4cd831, +0xbc5451d60c6ac9eb, 0x3fef001375752b40, +0xbc979517a03e2847, 0x3feefeb83ba8ea32, +0x3c8787a210ceafd9, 0x3feefd5f4fb45e20, +0x3c8fdd395dd3f84a, 0x3feefc08b26416ff, +0xbc888d1e4629943d, 0x3feefab46484ebb4, +0xbc800e2a46da4bee, 0x3feef96266e3fa2d, +0xbc93369c544088b6, 0x3feef812ba4ea77d, +0xbc86a3803b8e5b04, 0x3feef6c55f929ff1, +0x3c85373ce4eb6dfb, 0x3feef57a577dd72b, +0xbc87430803972b34, 0x3feef431a2de883b, +0x3c83adec8265a67f, 0x3feef2eb428335b4, +0xbc924aedcc4b5068, 0x3feef1a7373aa9cb, +0xbc835388bcac6bc5, 0x3feef06581d3f669, +0xbc954de30ae02d94, 0x3feeef26231e754a, +0x3c727cdb4e4b6640, 0x3feeede91be9c811, +0xbc9907f81b512d8e, 0x3feeecae6d05d866, +0x3c86c2696a26af35, 0x3feeeb761742d808, +0xbc94f2487e1c03ec, 0x3feeea401b7140ef, +0x3c888f6ff06b979a, 0x3feee90c7a61d55b, +0xbc71d1e83e9436d2, 0x3feee7db34e59ff7, +0xbc89d5efaabc2030, 0x3feee6ac4bcdf3ea, +0x3c914a5432fcb2f4, 0x3feee57fbfec6cf4, +0xbc76b8867f91c9d6, 0x3feee4559212ef89, +0xbc991919b3ce1b15, 0x3feee32dc313a8e5, +0x3c94c9c0b5157fe6, 0x3feee20853c10f28, +0x3c79c3bba5562a2f, 0x3feee0e544ede173, +0xbc62455345b51c8e, 0x3feedfc4976d27fa, +0x3c859f48a72a4c6d, 0x3feedea64c123422, +0xbc93331de45477d0, 0x3feedd8a63b0a09b, +0xbc85a71612e21658, 0x3feedc70df1c5175, +0xbc95f84d39b39b16, 0x3feedb59bf29743f, +0xbc9312607a28698a, 0x3feeda4504ac801c, +0xbc72ba4dc7c4d562, 0x3feed932b07a35df, +0x3c86421f6f1d24d6, 0x3feed822c367a024, +0xbc844f25dc02691f, 0x3feed7153e4a136a, +0xbc58a78f4817895b, 0x3feed60a21f72e2a, +0xbc888d328eb9b501, 0x3feed5016f44d8f5, +0xbc9348a6815fce65, 0x3feed3fb2709468a, +0x3c7f0bec42ddb15a, 0x3feed2f74a1af3f1, +0xbc7c2c9b67499a1b, 0x3feed1f5d950a897, +0xbc615f0a2b9cd452, 0x3feed0f6d5817663, +0x3c835c43984d9871, 0x3feecffa3f84b9d4, +0xbc8c2e465a919e1d, 0x3feecf0018321a1a, +0x3c4363ed60c2ac11, 0x3feece086061892d, +0xbc865dfd02bd08f1, 0x3feecd1318eb43ec, +0xbc632afc8d9473a0, 0x3feecc2042a7d232, +0xbc8e68cec89b1762, 0x3feecb2fde7006f4, +0x3c9666093b0664ef, 0x3feeca41ed1d0057, +0xbc48ae858eb682ca, 0x3feec9566f8827d0, +0xbc95fc5e44de020e, 0x3feec86d668b3237, +0x3c5dd71277c0915f, 0x3feec786d3001fe5, +0x3c6ecce1daa10379, 0x3feec6a2b5c13cd0, +0x3c92001325ecd7fb, 0x3feec5c10fa920a1, +0xbc7ea0148327c42f, 0x3feec4e1e192aed2, +0x3c65ace6e2870332, 0x3feec4052c5916c4, +0x3c93ff8e3f0f1230, 0x3feec32af0d7d3de, +0xbc9595c55690ffaf, 0x3feec2532feaada6, +0xbc7a843ad1a88022, 0x3feec17dea6db7d7, +0xbc8b401ba9fb5199, 0x3feec0ab213d5283, +0x3c7690cebb7aafb0, 0x3feebfdad5362a27, +0x3c6df82bf324cc57, 0x3feebf0d073537ca, +0x3c892ca3bf144e63, 0x3feebe41b817c114, +0x3c97cae38641c7bb, 0x3feebd78e8bb586b, +0x3c931dbdeb54e077, 0x3feebcb299fddd0d, +0x3c62d80c5c4a2b67, 0x3feebbeeccbd7b2a, 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+0x3c8269947c2bed4a, 0x3fefb4aaa2188510, +0x3c737e8ae802b851, 0x3fefb7616ca06dd6, +0x3c8ec3bc41aa2008, 0x3fefba1bee615a27, +0x3c875119560e34af, 0x3fefbcda28a52e59, +0xbc83b6137e9afe9e, 0x3fefbf9c1cb6412a, +0xbc7431c3840929c6, 0x3fefc261cbdf5be7, +0x3c842b94c3a9eb32, 0x3fefc52b376bba97, +0xbc8cb472d2e86b99, 0x3fefc7f860a70c22, +0xbc69fa74878ba7c7, 0x3fefcac948dd7274, +0x3c83f5df2fde16a8, 0x3fefcd9df15b82ac, +0x3c8a64a931d185ee, 0x3fefd0765b6e4540, +0x3c8eef18336b62e3, 0x3fefd35288633625, +0x3c901f3a75ee0efe, 0x3fefd632798844f8, +0x3c80d23f87b50a2a, 0x3fefd916302bd526, +0xbc8e37bae43be3ed, 0x3fefdbfdad9cbe14, +0x3c8302dee657c8e6, 0x3fefdee8f32a4b45, +0xbc516a9ce6ed84fa, 0x3fefe1d802243c89, +0xbc7b0caa080df170, 0x3fefe4cadbdac61d, +0x3c77893b4d91cd9d, 0x3fefe7c1819e90d8, +0x3c7617a9f2fd24e5, 0x3fefeabbf4c0ba54, +0xbc699c7db2effc76, 0x3fefedba3692d514, +0x3c75f103b8fd5ca7, 0x3feff0bc4866e8ad, +0x3c5305c14160cc89, 0x3feff3c22b8f71f1, +0x3c8e70b094fa075a, 0x3feff6cbe15f6314, +0x3c64b458677f9840, 0x3feff9d96b2a23d9, +0xbc72ec9a3e5d680a, 0x3feffceaca4391b6, +#endif +}, +}; diff --git a/contrib/arm-optimized-routines/pl/math/expf.c b/contrib/arm-optimized-routines/pl/math/expf.c new file mode 100644 index 000000000000..cd3cfa925c64 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expf.c @@ -0,0 +1,76 @@ +/* + * Single-precision e^x function. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <math.h> +#include <stdint.h> +#include "math_config.h" + +/* +EXPF_TABLE_BITS = 5 +EXPF_POLY_ORDER = 3 + +ULP error: 0.502 (nearest rounding.) +Relative error: 1.69 * 2^-34 in [-ln2/64, ln2/64] (before rounding.) +Wrong count: 170635 (all nearest rounding wrong results with fma.) +Non-nearest ULP error: 1 (rounded ULP error) +*/ + +#define N (1 << EXPF_TABLE_BITS) +#define InvLn2N __expf_data.invln2_scaled +#define T __expf_data.tab +#define C __expf_data.poly_scaled + +static inline uint32_t +top12 (float x) +{ + return asuint (x) >> 20; +} + +float +optr_aor_exp_f32 (float x) +{ + uint32_t abstop; + uint64_t ki, t; + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t kd, xd, z, r, r2, y, s; + + xd = (double_t) x; + abstop = top12 (x) & 0x7ff; + if (unlikely (abstop >= top12 (88.0f))) + { + /* |x| >= 88 or x is nan. */ + if (asuint (x) == asuint (-INFINITY)) + return 0.0f; + if (abstop >= top12 (INFINITY)) + return x + x; + if (x > 0x1.62e42ep6f) /* x > log(0x1p128) ~= 88.72 */ + return __math_oflowf (0); + if (x < -0x1.9fe368p6f) /* x < log(0x1p-150) ~= -103.97 */ + return __math_uflowf (0); + } + + /* x*N/Ln2 = k + r with r in [-1/2, 1/2] and int k. */ + z = InvLn2N * xd; + + /* Round and convert z to int, the result is in [-150*N, 128*N] and + ideally nearest int is used, otherwise the magnitude of r can be + bigger which gives larger approximation error. */ + kd = round (z); + ki = lround (z); + r = z - kd; + + /* exp(x) = 2^(k/N) * 2^(r/N) ~= s * (C0*r^3 + C1*r^2 + C2*r + 1) */ + t = T[ki % N]; + t += ki << (52 - EXPF_TABLE_BITS); + s = asdouble (t); + z = C[0] * r + C[1]; + r2 = r * r; + y = C[2] * r + 1; + y = z * r2 + y; + y = y * s; + return eval_as_float (y); +} diff --git a/contrib/arm-optimized-routines/pl/math/expf_data.c b/contrib/arm-optimized-routines/pl/math/expf_data.c new file mode 100644 index 000000000000..474ad57a29a0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expf_data.c @@ -0,0 +1,31 @@ +/* + * Coeffs and table entries for single-precision exp. Copied from + * math/exp2f_data.c, with EXP2F_TABLE_BITS == 32. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << EXPF_TABLE_BITS) + +const struct expf_data __expf_data = { + /* tab[i] = uint(2^(i/N)) - (i << 52-BITS) + used for computing 2^(k/N) for an int |k| < 150 N as + double(tab[k%N] + (k << 52-BITS)) */ + .tab = { +0x3ff0000000000000, 0x3fefd9b0d3158574, 0x3fefb5586cf9890f, 0x3fef9301d0125b51, +0x3fef72b83c7d517b, 0x3fef54873168b9aa, 0x3fef387a6e756238, 0x3fef1e9df51fdee1, +0x3fef06fe0a31b715, 0x3feef1a7373aa9cb, 0x3feedea64c123422, 0x3feece086061892d, +0x3feebfdad5362a27, 0x3feeb42b569d4f82, 0x3feeab07dd485429, 0x3feea47eb03a5585, +0x3feea09e667f3bcd, 0x3fee9f75e8ec5f74, 0x3feea11473eb0187, 0x3feea589994cce13, +0x3feeace5422aa0db, 0x3feeb737b0cdc5e5, 0x3feec49182a3f090, 0x3feed503b23e255d, +0x3feee89f995ad3ad, 0x3feeff76f2fb5e47, 0x3fef199bdd85529c, 0x3fef3720dcef9069, +0x3fef5818dcfba487, 0x3fef7c97337b9b5f, 0x3fefa4afa2a490da, 0x3fefd0765b6e4540, + }, + .invln2_scaled = 0x1.71547652b82fep+0 * N, + .poly_scaled = { + 0x1.c6af84b912394p-5/N/N/N, 0x1.ebfce50fac4f3p-3/N/N, 0x1.62e42ff0c52d6p-1/N, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/expm1_2u5.c b/contrib/arm-optimized-routines/pl/math/expm1_2u5.c new file mode 100644 index 000000000000..f7d431198614 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expm1_2u5.c @@ -0,0 +1,85 @@ +/* + * Double-precision e^x - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f64.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define InvLn2 0x1.71547652b82fep0 +#define Ln2hi 0x1.62e42fefa39efp-1 +#define Ln2lo 0x1.abc9e3b39803fp-56 +#define Shift 0x1.8p52 +/* 0x1p-51, below which expm1(x) is within 2 ULP of x. */ +#define TinyBound 0x3cc0000000000000 +/* Above which expm1(x) overflows. */ +#define BigBound 0x1.63108c75a1937p+9 +/* Below which expm1(x) rounds to 1. */ +#define NegBound -0x1.740bf7c0d927dp+9 +#define AbsMask 0x7fffffffffffffff + +/* Approximation for exp(x) - 1 using polynomial on a reduced interval. + The maximum error observed error is 2.17 ULP: + expm1(0x1.63f90a866748dp-2) got 0x1.a9af56603878ap-2 + want 0x1.a9af566038788p-2. */ +double +expm1 (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ax = ix & AbsMask; + + /* Tiny, +Infinity. */ + if (ax <= TinyBound || ix == 0x7ff0000000000000) + return x; + + /* +/-NaN. */ + if (ax > 0x7ff0000000000000) + return __math_invalid (x); + + /* Result is too large to be represented as a double. */ + if (x >= 0x1.63108c75a1937p+9) + return __math_oflow (0); + + /* Result rounds to -1 in double precision. */ + if (x <= NegBound) + return -1; + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + double j = fma (InvLn2, x, Shift) - Shift; + int64_t i = j; + double f = fma (j, -Ln2hi, x); + f = fma (j, -Ln2lo, f); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + double f2 = f * f; + double f4 = f2 * f2; + double p = fma (f2, estrin_10_f64 (f, f2, f4, f4 * f4, __expm1_poly), f); + + /* Assemble the result, using a slight rearrangement to achieve acceptable + accuracy. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^(i - 1). */ + double t = ldexp (0.5, i); + /* expm1(x) ~= 2 * (p * t + (t - 1/2)). */ + return 2 * fma (p, t, t - 0.5); +} + +PL_SIG (S, D, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (expm1, 1.68) +PL_TEST_SYM_INTERVAL (expm1, 0, 0x1p-51, 1000) +PL_TEST_INTERVAL (expm1, 0x1p-51, 0x1.63108c75a1937p+9, 100000) +PL_TEST_INTERVAL (expm1, -0x1p-51, -0x1.740bf7c0d927dp+9, 100000) +PL_TEST_INTERVAL (expm1, 0x1.63108c75a1937p+9, inf, 100) +PL_TEST_INTERVAL (expm1, -0x1.740bf7c0d927dp+9, -inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/expm1_data.c b/contrib/arm-optimized-routines/pl/math/expm1_data.c new file mode 100644 index 000000000000..ff7426b90135 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expm1_data.c @@ -0,0 +1,21 @@ +/* + * Coefficients for double-precision e^x - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Generated using fpminimax, see tools/expm1.sollya for details. */ +const double __expm1_poly[] = {0x1p-1, + 0x1.5555555555559p-3, + 0x1.555555555554bp-5, + 0x1.111111110f663p-7, + 0x1.6c16c16c1b5f3p-10, + 0x1.a01a01affa35dp-13, + 0x1.a01a018b4ecbbp-16, + 0x1.71ddf82db5bb4p-19, + 0x1.27e517fc0d54bp-22, + 0x1.af5eedae67435p-26, + 0x1.1f143d060a28ap-29}; diff --git a/contrib/arm-optimized-routines/pl/math/expm1f_1u6.c b/contrib/arm-optimized-routines/pl/math/expm1f_1u6.c new file mode 100644 index 000000000000..e12c9ba9a8a2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expm1f_1u6.c @@ -0,0 +1,79 @@ +/* + * Single-precision e^x - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Shift (0x1.8p23f) +#define InvLn2 (0x1.715476p+0f) +#define Ln2hi (0x1.62e4p-1f) +#define Ln2lo (0x1.7f7d1cp-20f) +#define AbsMask (0x7fffffff) +#define InfLimit \ + (0x1.644716p6) /* Smallest value of x for which expm1(x) overflows. */ +#define NegLimit \ + (-0x1.9bbabcp+6) /* Largest value of x for which expm1(x) rounds to 1. */ + +/* Approximation for exp(x) - 1 using polynomial on a reduced interval. + The maximum error is 1.51 ULP: + expm1f(0x1.8baa96p-2) got 0x1.e2fb9p-2 + want 0x1.e2fb94p-2. */ +float +expm1f (float x) +{ + uint32_t ix = asuint (x); + uint32_t ax = ix & AbsMask; + + /* Tiny: |x| < 0x1p-23. expm1(x) is closely approximated by x. + Inf: x == +Inf => expm1(x) = x. */ + if (ax <= 0x34000000 || (ix == 0x7f800000)) + return x; + + /* +/-NaN. */ + if (ax > 0x7f800000) + return __math_invalidf (x); + + if (x >= InfLimit) + return __math_oflowf (0); + + if (x <= NegLimit || ix == 0xff800000) + return -1; + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + float j = fmaf (InvLn2, x, Shift) - Shift; + int32_t i = j; + float f = fmaf (j, -Ln2hi, x); + f = fmaf (j, -Ln2lo, f); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + float p = fmaf (f * f, horner_4_f32 (f, __expm1f_poly), f); + /* Assemble the result, using a slight rearrangement to achieve acceptable + accuracy. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^(i - 1). */ + float t = ldexpf (0.5f, i); + /* expm1(x) ~= 2 * (p * t + (t - 1/2)). */ + return 2 * fmaf (p, t, t - 0.5f); +} + +PL_SIG (S, F, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (expm1f, 1.02) +PL_TEST_SYM_INTERVAL (expm1f, 0, 0x1p-23, 1000) +PL_TEST_INTERVAL (expm1f, 0x1p-23, 0x1.644716p6, 100000) +PL_TEST_INTERVAL (expm1f, 0x1.644716p6, inf, 1000) +PL_TEST_INTERVAL (expm1f, -0x1p-23, -0x1.9bbabcp+6, 100000) +PL_TEST_INTERVAL (expm1f, -0x1.9bbabcp+6, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/expm1f_data.c b/contrib/arm-optimized-routines/pl/math/expm1f_data.c new file mode 100644 index 000000000000..9d02dc448ebb --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/expm1f_data.c @@ -0,0 +1,12 @@ +/* + * Coefficients for single-precision e^x - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Generated using fpminimax, see tools/expm1f.sollya for details. */ +const float __expm1f_poly[] = {0x1.fffffep-2, 0x1.5554aep-3, 0x1.555736p-5, + 0x1.12287cp-7, 0x1.6b55a2p-10}; diff --git a/contrib/arm-optimized-routines/pl/math/finite_pow.h b/contrib/arm-optimized-routines/pl/math/finite_pow.h new file mode 100644 index 000000000000..8944d4fae625 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/finite_pow.h @@ -0,0 +1,365 @@ +/* + * Double-precision x^y function. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Scalar version of pow used for fallbacks in vector implementations. */ + +/* Data is defined in v_pow_log_data.c. */ +#define N_LOG (1 << V_POW_LOG_TABLE_BITS) +#define Off 0x3fe6955500000000 +#define As __v_pow_log_data.poly + +/* Data is defined in v_pow_exp_data.c. */ +#define N_EXP (1 << V_POW_EXP_TABLE_BITS) +#define SignBias (0x800 << V_POW_EXP_TABLE_BITS) +#define SmallExp 0x3c9 /* top12(0x1p-54). */ +#define BigExp 0x408 /* top12(512.0). */ +#define ThresExp 0x03f /* BigExp - SmallExp. */ +#define InvLn2N __v_pow_exp_data.n_over_ln2 +#define Ln2HiN __v_pow_exp_data.ln2_over_n_hi +#define Ln2LoN __v_pow_exp_data.ln2_over_n_lo +#define SBits __v_pow_exp_data.sbits +#define Cs __v_pow_exp_data.poly + +/* Constants associated with pow. */ +#define SmallPowX 0x001 /* top12(0x1p-126). */ +#define BigPowX 0x7ff /* top12(INFINITY). */ +#define ThresPowX 0x7fe /* BigPowX - SmallPowX. */ +#define SmallPowY 0x3be /* top12(0x1.e7b6p-65). */ +#define BigPowY 0x43e /* top12(0x1.749p62). */ +#define ThresPowY 0x080 /* BigPowY - SmallPowY. */ + +/* Top 12 bits of a double (sign and exponent bits). */ +static inline uint32_t +top12 (double x) +{ + return asuint64 (x) >> 52; +} + +/* Compute y+TAIL = log(x) where the rounded result is y and TAIL has about + additional 15 bits precision. IX is the bit representation of x, but + normalized in the subnormal range using the sign bit for the exponent. */ +static inline double +log_inline (uint64_t ix, double *tail) +{ + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + uint64_t tmp = ix - Off; + int i = (tmp >> (52 - V_POW_LOG_TABLE_BITS)) & (N_LOG - 1); + int k = (int64_t) tmp >> 52; /* arithmetic shift. */ + uint64_t iz = ix - (tmp & 0xfffULL << 52); + double z = asdouble (iz); + double kd = (double) k; + + /* log(x) = k*Ln2 + log(c) + log1p(z/c-1). */ + double invc = __v_pow_log_data.invc[i]; + double logc = __v_pow_log_data.logc[i]; + double logctail = __v_pow_log_data.logctail[i]; + + /* Note: 1/c is j/N or j/N/2 where j is an integer in [N,2N) and + |z/c - 1| < 1/N, so r = z/c - 1 is exactly representible. */ + double r = fma (z, invc, -1.0); + + /* k*Ln2 + log(c) + r. */ + double t1 = kd * __v_pow_log_data.ln2_hi + logc; + double t2 = t1 + r; + double lo1 = kd * __v_pow_log_data.ln2_lo + logctail; + double lo2 = t1 - t2 + r; + + /* Evaluation is optimized assuming superscalar pipelined execution. */ + double ar = As[0] * r; + double ar2 = r * ar; + double ar3 = r * ar2; + /* k*Ln2 + log(c) + r + A[0]*r*r. */ + double hi = t2 + ar2; + double lo3 = fma (ar, r, -ar2); + double lo4 = t2 - hi + ar2; + /* p = log1p(r) - r - A[0]*r*r. */ + double p = (ar3 + * (As[1] + r * As[2] + + ar2 * (As[3] + r * As[4] + ar2 * (As[5] + r * As[6])))); + double lo = lo1 + lo2 + lo3 + lo4 + p; + double y = hi + lo; + *tail = hi - y + lo; + return y; +} + +/* Handle cases that may overflow or underflow when computing the result that + is scale*(1+TMP) without intermediate rounding. The bit representation of + scale is in SBITS, however it has a computed exponent that may have + overflown into the sign bit so that needs to be adjusted before using it as + a double. (int32_t)KI is the k used in the argument reduction and exponent + adjustment of scale, positive k here means the result may overflow and + negative k means the result may underflow. */ +static inline double +special_case (double tmp, uint64_t sbits, uint64_t ki) +{ + double scale, y; + + if ((ki & 0x80000000) == 0) + { + /* k > 0, the exponent of scale might have overflowed by <= 460. */ + sbits -= 1009ull << 52; + scale = asdouble (sbits); + y = 0x1p1009 * (scale + scale * tmp); + return check_oflow (eval_as_double (y)); + } + /* k < 0, need special care in the subnormal range. */ + sbits += 1022ull << 52; + /* Note: sbits is signed scale. */ + scale = asdouble (sbits); + y = scale + scale * tmp; +#if WANT_SIMD_EXCEPT + if (fabs (y) < 1.0) + { + /* Round y to the right precision before scaling it into the subnormal + range to avoid double rounding that can cause 0.5+E/2 ulp error where + E is the worst-case ulp error outside the subnormal range. So this + is only useful if the goal is better than 1 ulp worst-case error. */ + double hi, lo, one = 1.0; + if (y < 0.0) + one = -1.0; + lo = scale - y + scale * tmp; + hi = one + y; + lo = one - hi + y + lo; + y = eval_as_double (hi + lo) - one; + /* Fix the sign of 0. */ + if (y == 0.0) + y = asdouble (sbits & 0x8000000000000000); + /* The underflow exception needs to be signaled explicitly. */ + force_eval_double (opt_barrier_double (0x1p-1022) * 0x1p-1022); + } +#endif + y = 0x1p-1022 * y; + return check_uflow (eval_as_double (y)); +} + +/* Computes sign*exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. + The sign_bias argument is SignBias or 0 and sets the sign to -1 or 1. */ +static inline double +exp_inline (double x, double xtail, uint32_t sign_bias) +{ + uint32_t abstop = top12 (x) & 0x7ff; + if (unlikely (abstop - SmallExp >= ThresExp)) + { + if (abstop - SmallExp >= 0x80000000) + { + /* Avoid spurious underflow for tiny x. */ + /* Note: 0 is common input. */ + return sign_bias ? -1.0 : 1.0; + } + if (abstop >= top12 (1024.0)) + { + /* Note: inf and nan are already handled. */ + /* Skip errno handling. */ +#if WANT_SIMD_EXCEPT + return asuint64 (x) >> 63 ? __math_uflow (sign_bias) + : __math_oflow (sign_bias); +#else + double res_uoflow = asuint64 (x) >> 63 ? 0.0 : INFINITY; + return sign_bias ? -res_uoflow : res_uoflow; +#endif + } + /* Large x is special cased below. */ + abstop = 0; + } + + /* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */ + /* x = ln2/N*k + r, with int k and r in [-ln2/2N, ln2/2N]. */ + double z = InvLn2N * x; + double kd = round (z); + uint64_t ki = lround (z); + double r = x - kd * Ln2HiN - kd * Ln2LoN; + /* The code assumes 2^-200 < |xtail| < 2^-8/N. */ + r += xtail; + /* 2^(k/N) ~= scale. */ + uint64_t idx = ki & (N_EXP - 1); + uint64_t top = (ki + sign_bias) << (52 - V_POW_EXP_TABLE_BITS); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + uint64_t sbits = SBits[idx] + top; + /* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (exp(r) - 1). */ + /* Evaluation is optimized assuming superscalar pipelined execution. */ + double r2 = r * r; + double tmp = r + r2 * Cs[0] + r * r2 * (Cs[1] + r * Cs[2]); + if (unlikely (abstop == 0)) + return special_case (tmp, sbits, ki); + double scale = asdouble (sbits); + /* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there + is no spurious underflow here even without fma. */ + return eval_as_double (scale + scale * tmp); +} + +/* Computes exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. + A version of exp_inline that is not inlined and for which sign_bias is + equal to 0. */ +static double NOINLINE +exp_nosignbias (double x, double xtail) +{ + uint32_t abstop = top12 (x) & 0x7ff; + if (unlikely (abstop - SmallExp >= ThresExp)) + { + /* Avoid spurious underflow for tiny x. */ + if (abstop - SmallExp >= 0x80000000) + return 1.0; + /* Note: inf and nan are already handled. */ + if (abstop >= top12 (1024.0)) +#if WANT_SIMD_EXCEPT + return asuint64 (x) >> 63 ? __math_uflow (0) : __math_oflow (0); +#else + return asuint64 (x) >> 63 ? 0.0 : INFINITY; +#endif + /* Large x is special cased below. */ + abstop = 0; + } + + /* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */ + /* x = ln2/N*k + r, with k integer and r in [-ln2/2N, ln2/2N]. */ + double z = InvLn2N * x; + double kd = round (z); + uint64_t ki = lround (z); + double r = x - kd * Ln2HiN - kd * Ln2LoN; + /* The code assumes 2^-200 < |xtail| < 2^-8/N. */ + r += xtail; + /* 2^(k/N) ~= scale. */ + uint64_t idx = ki & (N_EXP - 1); + uint64_t top = ki << (52 - V_POW_EXP_TABLE_BITS); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + uint64_t sbits = SBits[idx] + top; + /* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (tail + exp(r) - 1). */ + double r2 = r * r; + double tmp = r + r2 * Cs[0] + r * r2 * (Cs[1] + r * Cs[2]); + if (unlikely (abstop == 0)) + return special_case (tmp, sbits, ki); + double scale = asdouble (sbits); + /* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there + is no spurious underflow here even without fma. */ + return eval_as_double (scale + scale * tmp); +} + +/* Returns 0 if not int, 1 if odd int, 2 if even int. The argument is + the bit representation of a non-zero finite floating-point value. */ +static inline int +checkint (uint64_t iy) +{ + int e = iy >> 52 & 0x7ff; + if (e < 0x3ff) + return 0; + if (e > 0x3ff + 52) + return 2; + if (iy & ((1ULL << (0x3ff + 52 - e)) - 1)) + return 0; + if (iy & (1ULL << (0x3ff + 52 - e))) + return 1; + return 2; +} + +/* Returns 1 if input is the bit representation of 0, infinity or nan. */ +static inline int +zeroinfnan (uint64_t i) +{ + return 2 * i - 1 >= 2 * asuint64 (INFINITY) - 1; +} + +static double NOINLINE +__pl_finite_pow (double x, double y) +{ + uint32_t sign_bias = 0; + uint64_t ix, iy; + uint32_t topx, topy; + + ix = asuint64 (x); + iy = asuint64 (y); + topx = top12 (x); + topy = top12 (y); + if (unlikely (topx - SmallPowX >= ThresPowX + || (topy & 0x7ff) - SmallPowY >= ThresPowY)) + { + /* Note: if |y| > 1075 * ln2 * 2^53 ~= 0x1.749p62 then pow(x,y) = inf/0 + and if |y| < 2^-54 / 1075 ~= 0x1.e7b6p-65 then pow(x,y) = +-1. */ + /* Special cases: (x < 0x1p-126 or inf or nan) or + (|y| < 0x1p-65 or |y| >= 0x1p63 or nan). */ + if (unlikely (zeroinfnan (iy))) + { + if (2 * iy == 0) + return issignaling_inline (x) ? x + y : 1.0; + if (ix == asuint64 (1.0)) + return issignaling_inline (y) ? x + y : 1.0; + if (2 * ix > 2 * asuint64 (INFINITY) + || 2 * iy > 2 * asuint64 (INFINITY)) + return x + y; + if (2 * ix == 2 * asuint64 (1.0)) + return 1.0; + if ((2 * ix < 2 * asuint64 (1.0)) == !(iy >> 63)) + return 0.0; /* |x|<1 && y==inf or |x|>1 && y==-inf. */ + return y * y; + } + if (unlikely (zeroinfnan (ix))) + { + double x2 = x * x; + if (ix >> 63 && checkint (iy) == 1) + { + x2 = -x2; + sign_bias = 1; + } +#if WANT_SIMD_EXCEPT + if (2 * ix == 0 && iy >> 63) + return __math_divzero (sign_bias); +#endif + /* Without the barrier some versions of clang hoist the 1/x2 and + thus division by zero exception can be signaled spuriously. */ + return iy >> 63 ? opt_barrier_double (1 / x2) : x2; + } + /* Here x and y are non-zero finite. */ + if (ix >> 63) + { + /* Finite x < 0. */ + int yint = checkint (iy); + if (yint == 0) +#if WANT_SIMD_EXCEPT + return __math_invalid (x); +#else + return __builtin_nan (""); +#endif + if (yint == 1) + sign_bias = SignBias; + ix &= 0x7fffffffffffffff; + topx &= 0x7ff; + } + if ((topy & 0x7ff) - SmallPowY >= ThresPowY) + { + /* Note: sign_bias == 0 here because y is not odd. */ + if (ix == asuint64 (1.0)) + return 1.0; + /* |y| < 2^-65, x^y ~= 1 + y*log(x). */ + if ((topy & 0x7ff) < SmallPowY) + return 1.0; +#if WANT_SIMD_EXCEPT + return (ix > asuint64 (1.0)) == (topy < 0x800) ? __math_oflow (0) + : __math_uflow (0); +#else + return (ix > asuint64 (1.0)) == (topy < 0x800) ? INFINITY : 0; +#endif + } + if (topx == 0) + { + /* Normalize subnormal x so exponent becomes negative. */ + /* Without the barrier some versions of clang evalutate the mul + unconditionally causing spurious overflow exceptions. */ + ix = asuint64 (opt_barrier_double (x) * 0x1p52); + ix &= 0x7fffffffffffffff; + ix -= 52ULL << 52; + } + } + + double lo; + double hi = log_inline (ix, &lo); + double ehi = y * hi; + double elo = y * lo + fma (y, hi, -ehi); + return exp_inline (ehi, elo, sign_bias); +} diff --git a/contrib/arm-optimized-routines/pl/math/include/mathlib.h b/contrib/arm-optimized-routines/pl/math/include/mathlib.h new file mode 100644 index 000000000000..f886e7f8c07a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/include/mathlib.h @@ -0,0 +1,206 @@ +/* + * Public API. + * + * Copyright (c) 2015-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef _MATHLIB_H +#define _MATHLIB_H + +float acosf (float); +float acoshf (float); +float asinf (float); +float asinhf (float); +float atan2f (float, float); +float atanf (float); +float atanhf (float); +float cbrtf (float); +float coshf (float); +float cospif (float); +float erfcf (float); +float erff (float); +float erfinvf (float); +float exp10f (float); +float expm1f (float); +float log10f (float); +float log1pf (float); +float sinhf (float); +float sinpif (float); +float tanf (float); +float tanhf (float); + +double acos (double); +double acosh (double); +double asin (double); +double asinh (double); +double atan (double); +double atan2 (double, double); +double atanh (double); +double cbrt (double); +double cosh (double); +double cospi (double); +double erfc (double); +double erfinv (double); +double exp10 (double); +double expm1 (double); +double log10 (double); +double log1p (double); +double sinh (double); +double sinpi (double); +double tanh (double); + +long double cospil (long double); +long double erfinvl (long double); +long double exp10l (long double); +long double sinpil (long double); + +#if __aarch64__ +# if __GNUC__ >= 5 +typedef __Float32x4_t __f32x4_t; +typedef __Float64x2_t __f64x2_t; +# elif __clang_major__ * 100 + __clang_minor__ >= 305 +typedef __attribute__ ((__neon_vector_type__ (4))) float __f32x4_t; +typedef __attribute__ ((__neon_vector_type__ (2))) double __f64x2_t; +# else +# error Unsupported compiler +# endif + +# if __GNUC__ >= 9 || __clang_major__ >= 8 +# define __vpcs __attribute__ ((__aarch64_vector_pcs__)) + +typedef struct __f32x4x2_t +{ + __f32x4_t val[2]; +} __f32x4x2_t; + +typedef struct __f64x2x2_t +{ + __f64x2_t val[2]; +} __f64x2x2_t; + +/* Vector functions following the vector PCS using ABI names. */ +__vpcs __f32x4_t _ZGVnN4v_acoshf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_acosh (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_acosf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_acos (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_asinf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_asin (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_asinhf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_asinh (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_atanf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_atan (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4vv_atan2f (__f32x4_t, __f32x4_t); +__vpcs __f64x2_t _ZGVnN2vv_atan2 (__f64x2_t, __f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_atanhf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_atanh (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_cbrtf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_cbrt (__f64x2_t); +__vpcs __f32x4x2_t _ZGVnN4v_cexpif (__f32x4_t); +__vpcs __f64x2x2_t _ZGVnN2v_cexpi (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_coshf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_cosh (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_cospif (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_cospi (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_erff (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_erf (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_erfcf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_erfc (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_erfinvf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_erfinv (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_exp10f (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_exp10 (__f64x2_t); +__vpcs __f64x2_t _ZGVnN2v_exp2 (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_expm1f (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_expm1 (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4vv_hypotf (__f32x4_t, __f32x4_t); +__vpcs __f64x2_t _ZGVnN2vv_hypot (__f64x2_t, __f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_log10f (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_log10 (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_log1pf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_log1p (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_log2f (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_log2 (__f64x2_t); +__vpcs __f64x2_t _ZGVnN2vv_pow (__f64x2_t, __f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_sinhf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_sinh (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_sinpif (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_sinpi (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_tanf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_tan (__f64x2_t); +__vpcs __f32x4_t _ZGVnN4v_tanhf (__f32x4_t); +__vpcs __f64x2_t _ZGVnN2v_tanh (__f64x2_t); +__vpcs void _ZGVnN4vl4l4_sincosf (__f32x4_t, __f32x4_t *, __f32x4_t *); +__vpcs void _ZGVnN2vl8l8_sincos (__f64x2_t, __f64x2_t *, __f64x2_t *); + +# endif + +# if WANT_SVE_MATH +# include <arm_sve.h> +svfloat32_t _ZGVsMxv_acoshf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_acosh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_acosf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_acos (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_asinhf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_asinh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_asinf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_asin (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_atanhf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_atanh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxvv_atan2f (svfloat32_t, svfloat32_t, svbool_t); +svfloat32_t _ZGVsMxv_atanf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_atan (svfloat64_t, svbool_t); +svfloat64_t _ZGVsMxvv_atan2 (svfloat64_t, svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_cbrtf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_cbrt (svfloat64_t, svbool_t); +svfloat32x2_t _ZGVsMxv_cexpif (svfloat32_t, svbool_t); +svfloat64x2_t _ZGVsMxv_cexpi (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_coshf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_cosh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_cosf (svfloat32_t, svbool_t); +svfloat32_t _ZGVsMxv_cospif (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_cos (svfloat64_t, svbool_t); +svfloat64_t _ZGVsMxv_cospi (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_erff (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_erf (svfloat64_t, svbool_t); +svfloat64_t _ZGVsMxv_erfc (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_erfcf (svfloat32_t, svbool_t); +svfloat32_t _ZGVsMxv_expf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_exp (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_exp10f (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_exp10 (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_exp2f (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_exp2 (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_expm1f (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_expm1 (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxvv_hypotf (svfloat32_t, svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxvv_hypot (svfloat64_t, svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_logf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_log (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_log10f (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_log10 (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_log1pf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_log1p (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_log2f (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_log2 (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxvv_powi (svfloat32_t, svint32_t, svbool_t); +svfloat64_t _ZGVsMxvv_powk (svfloat64_t, svint64_t, svbool_t); +svfloat32_t _ZGVsMxvv_powf (svfloat32_t, svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxvv_pow (svfloat64_t, svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_sinhf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_sinh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_sinf (svfloat32_t, svbool_t); +svfloat32_t _ZGVsMxv_sinpif (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_sin (svfloat64_t, svbool_t); +svfloat64_t _ZGVsMxv_sinpi (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_tanhf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_tanh (svfloat64_t, svbool_t); +svfloat32_t _ZGVsMxv_tanf (svfloat32_t, svbool_t); +svfloat64_t _ZGVsMxv_tan (svfloat64_t, svbool_t); +void _ZGVsMxvl4l4_sincosf (svfloat32_t, float *, float *, svbool_t); +void _ZGVsMxvl8l8_sincos (svfloat64_t, double *, double *, svbool_t); +# endif + +#endif + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/include/pl_test.h b/contrib/arm-optimized-routines/pl/math/include/pl_test.h new file mode 100644 index 000000000000..3a3407e337b8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/include/pl_test.h @@ -0,0 +1,24 @@ +/* + * PL macros to aid testing. This version of this file is used for building the + * routine, not the tests. Separate definitions are found in test/pl_test.h + * which emit test parameters. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception. + */ + +/* Emit max ULP threshold - silenced for building the routine. */ +#define PL_TEST_ULP(f, l) + +/* Emit routine name if e == 1 and f is expected to correctly trigger fenv + exceptions. e allows declaration to be emitted conditionally upon certain + build flags - defer expansion by one pass to allow those flags to be expanded + properly. */ +#define PL_TEST_EXPECT_FENV(f, e) +#define PL_TEST_EXPECT_FENV_ALWAYS(f) + +#define PL_TEST_INTERVAL(f, lo, hi, n) +#define PL_TEST_SYM_INTERVAL(f, lo, hi, n) +#define PL_TEST_INTERVAL_C(f, lo, hi, n, c) +#define PL_TEST_SYM_INTERVAL_C(f, lo, hi, n, c) +#define PL_TEST_INTERVAL2(f, xlo, xhi, ylo, yhi, n) diff --git a/contrib/arm-optimized-routines/pl/math/log.c b/contrib/arm-optimized-routines/pl/math/log.c new file mode 100644 index 000000000000..40b0441d981d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log.c @@ -0,0 +1,161 @@ +/* + * Double-precision log(x) function. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <float.h> +#include <math.h> +#include <stdint.h> +#include "math_config.h" + +#define T __log_data.tab +#define T2 __log_data.tab2 +#define B __log_data.poly1 +#define A __log_data.poly +#define Ln2hi __log_data.ln2hi +#define Ln2lo __log_data.ln2lo +#define N (1 << LOG_TABLE_BITS) +#define OFF 0x3fe6000000000000 + +/* Top 16 bits of a double. */ +static inline uint32_t +top16 (double x) +{ + return asuint64 (x) >> 48; +} + +double +optr_aor_log_f64 (double x) +{ + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t w, z, r, r2, r3, y, invc, logc, kd, hi, lo; + uint64_t ix, iz, tmp; + uint32_t top; + int k, i; + + ix = asuint64 (x); + top = top16 (x); + +#if LOG_POLY1_ORDER == 10 || LOG_POLY1_ORDER == 11 +#define LO asuint64 (1.0 - 0x1p-5) +#define HI asuint64 (1.0 + 0x1.1p-5) +#elif LOG_POLY1_ORDER == 12 +#define LO asuint64 (1.0 - 0x1p-4) +#define HI asuint64 (1.0 + 0x1.09p-4) +#endif + if (unlikely (ix - LO < HI - LO)) + { + /* Handle close to 1.0 inputs separately. */ + /* Fix sign of zero with downward rounding when x==1. */ + if (WANT_ROUNDING && unlikely (ix == asuint64 (1.0))) + return 0; + r = x - 1.0; + r2 = r * r; + r3 = r * r2; +#if LOG_POLY1_ORDER == 10 + /* Worst-case error is around 0.516 ULP. */ + y = r3 + * (B[1] + r * B[2] + r2 * B[3] + + r3 * (B[4] + r * B[5] + r2 * B[6] + r3 * (B[7] + r * B[8]))); + w = B[0] * r2; /* B[0] == -0.5. */ + hi = r + w; + y += r - hi + w; + y += hi; +#elif LOG_POLY1_ORDER == 11 + /* Worst-case error is around 0.516 ULP. */ + y = r3 + * (B[1] + r * B[2] + + r2 + * (B[3] + r * B[4] + r2 * B[5] + + r3 * (B[6] + r * B[7] + r2 * B[8] + r3 * B[9]))); + w = B[0] * r2; /* B[0] == -0.5. */ + hi = r + w; + y += r - hi + w; + y += hi; +#elif LOG_POLY1_ORDER == 12 + y = r3 + * (B[1] + r * B[2] + r2 * B[3] + + r3 + * (B[4] + r * B[5] + r2 * B[6] + + r3 * (B[7] + r * B[8] + r2 * B[9] + r3 * B[10]))); +#if N <= 64 + /* Worst-case error is around 0.532 ULP. */ + w = B[0] * r2; /* B[0] == -0.5. */ + hi = r + w; + y += r - hi + w; + y += hi; +#else + /* Worst-case error is around 0.507 ULP. */ + w = r * 0x1p27; + double_t rhi = r + w - w; + double_t rlo = r - rhi; + w = rhi * rhi * B[0]; /* B[0] == -0.5. */ + hi = r + w; + lo = r - hi + w; + lo += B[0] * rlo * (rhi + r); + y += lo; + y += hi; +#endif +#endif + return eval_as_double (y); + } + if (unlikely (top - 0x0010 >= 0x7ff0 - 0x0010)) + { + /* x < 0x1p-1022 or inf or nan. */ + if (ix * 2 == 0) + return __math_divzero (1); + if (ix == asuint64 (INFINITY)) /* log(inf) == inf. */ + return x; + if ((top & 0x8000) || (top & 0x7ff0) == 0x7ff0) + return __math_invalid (x); + /* x is subnormal, normalize it. */ + ix = asuint64 (x * 0x1p52); + ix -= 52ULL << 52; + } + + /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = ix - OFF; + i = (tmp >> (52 - LOG_TABLE_BITS)) % N; + k = (int64_t) tmp >> 52; /* arithmetic shift */ + iz = ix - (tmp & 0xfffULL << 52); + invc = T[i].invc; + logc = T[i].logc; + z = asdouble (iz); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + /* r ~= z/c - 1, |r| < 1/(2*N). */ +#if HAVE_FAST_FMA + /* rounding error: 0x1p-55/N. */ + r = fma (z, invc, -1.0); +#else + /* rounding error: 0x1p-55/N + 0x1p-66. */ + r = (z - T2[i].chi - T2[i].clo) * invc; +#endif + kd = (double_t) k; + + /* hi + lo = r + log(c) + k*Ln2. */ + w = kd * Ln2hi + logc; + hi = w + r; + lo = w - hi + r + kd * Ln2lo; + + /* log(x) = lo + (log1p(r) - r) + hi. */ + r2 = r * r; /* rounding error: 0x1p-54/N^2. */ + /* Worst case error if |y| > 0x1p-5: + 0.5 + 4.13/N + abs-poly-error*2^57 ULP (+ 0.002 ULP without fma) + Worst case error if |y| > 0x1p-4: + 0.5 + 2.06/N + abs-poly-error*2^56 ULP (+ 0.001 ULP without fma). */ +#if LOG_POLY_ORDER == 6 + y = lo + r2 * A[0] + r * r2 * (A[1] + r * A[2] + r2 * (A[3] + r * A[4])) + hi; +#elif LOG_POLY_ORDER == 7 + y = lo + + r2 + * (A[0] + r * A[1] + r2 * (A[2] + r * A[3]) + + r2 * r2 * (A[4] + r * A[5])) + + hi; +#endif + return eval_as_double (y); +} diff --git a/contrib/arm-optimized-routines/pl/math/log10_2u.c b/contrib/arm-optimized-routines/pl/math/log10_2u.c new file mode 100644 index 000000000000..74828ea9ef3c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log10_2u.c @@ -0,0 +1,150 @@ +/* + * Double-precision log10(x) function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Polynomial coefficients and lookup tables. */ +#define T __log10_data.tab +#define T2 __log10_data.tab2 +#define B __log10_data.poly1 +#define A __log10_data.poly +#define Ln2hi __log10_data.ln2hi +#define Ln2lo __log10_data.ln2lo +#define InvLn10 __log10_data.invln10 +#define N (1 << LOG10_TABLE_BITS) +#define OFF 0x3fe6000000000000 +#define LO asuint64 (1.0 - 0x1p-4) +#define HI asuint64 (1.0 + 0x1.09p-4) + +/* Top 16 bits of a double. */ +static inline uint32_t +top16 (double x) +{ + return asuint64 (x) >> 48; +} + +/* Fast and low accuracy implementation of log10. + The implementation is similar to that of math/log, except that: + - Polynomials are computed for log10(1+r) with r on same intervals as log. + - Lookup parameters are scaled (at runtime) to switch from base e to base 10. + Many errors above 1.59 ulp are observed across the whole range of doubles. + The greatest observed error is 1.61 ulp, at around 0.965: + log10(0x1.dc8710333a29bp-1) got -0x1.fee26884905a6p-6 + want -0x1.fee26884905a8p-6. */ +double +log10 (double x) +{ + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t w, z, r, r2, r3, y, invc, logc, kd, hi, lo; + uint64_t ix, iz, tmp; + uint32_t top; + int k, i; + + ix = asuint64 (x); + top = top16 (x); + + if (unlikely (ix - LO < HI - LO)) + { + /* Handle close to 1.0 inputs separately. */ + /* Fix sign of zero with downward rounding when x==1. */ + if (WANT_ROUNDING && unlikely (ix == asuint64 (1.0))) + return 0; + r = x - 1.0; + r2 = r * r; + r3 = r * r2; + y = r3 + * (B[1] + r * B[2] + r2 * B[3] + + r3 + * (B[4] + r * B[5] + r2 * B[6] + + r3 * (B[7] + r * B[8] + r2 * B[9] + r3 * B[10]))); + /* Worst-case error is around 0.507 ULP. */ + w = r * 0x1p27; + double_t rhi = r + w - w; + double_t rlo = r - rhi; + w = rhi * rhi * B[0]; + hi = r + w; + lo = r - hi + w; + lo += B[0] * rlo * (rhi + r); + y += lo; + y += hi; + /* Scale by 1/ln(10). Polynomial already contains scaling. */ + y = y * InvLn10; + + return eval_as_double (y); + } + if (unlikely (top - 0x0010 >= 0x7ff0 - 0x0010)) + { + /* x < 0x1p-1022 or inf or nan. */ + if (ix * 2 == 0) + return __math_divzero (1); + if (ix == asuint64 (INFINITY)) /* log10(inf) == inf. */ + return x; + if ((top & 0x8000) || (top & 0x7ff0) == 0x7ff0) + return __math_invalid (x); + /* x is subnormal, normalize it. */ + ix = asuint64 (x * 0x1p52); + ix -= 52ULL << 52; + } + + /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = ix - OFF; + i = (tmp >> (52 - LOG10_TABLE_BITS)) % N; + k = (int64_t) tmp >> 52; /* arithmetic shift. */ + iz = ix - (tmp & 0xfffULL << 52); + invc = T[i].invc; + logc = T[i].logc; + z = asdouble (iz); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + /* r ~= z/c - 1, |r| < 1/(2*N). */ +#if HAVE_FAST_FMA + /* rounding error: 0x1p-55/N. */ + r = fma (z, invc, -1.0); +#else + /* rounding error: 0x1p-55/N + 0x1p-66. */ + r = (z - T2[i].chi - T2[i].clo) * invc; +#endif + kd = (double_t) k; + + /* w = log(c) + k*Ln2hi. */ + w = kd * Ln2hi + logc; + hi = w + r; + lo = w - hi + r + kd * Ln2lo; + + /* log10(x) = (w + r)/log(10) + (log10(1+r) - r/log(10)). */ + r2 = r * r; /* rounding error: 0x1p-54/N^2. */ + + /* Scale by 1/ln(10). Polynomial already contains scaling. */ + y = lo + r2 * A[0] + r * r2 * (A[1] + r * A[2] + r2 * (A[3] + r * A[4])) + hi; + y = y * InvLn10; + + return eval_as_double (y); +} + +// clang-format off +#if USE_GLIBC_ABI +strong_alias (log10, __log10_finite) +hidden_alias (log10, __ieee754_log10) +#if LDBL_MANT_DIG == 53 +long double +log10l (long double x) +{ + return log10 (x); +} +#endif +#endif +// clang-format on + +PL_SIG (S, D, 1, log10, 0.01, 11.1) +PL_TEST_ULP (log10, 1.11) +PL_TEST_INTERVAL (log10, 0, 0xffff000000000000, 10000) +PL_TEST_INTERVAL (log10, 0x1p-4, 0x1p4, 40000) +PL_TEST_INTERVAL (log10, 0, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/log10_data.c b/contrib/arm-optimized-routines/pl/math/log10_data.c new file mode 100644 index 000000000000..9976f19cd6df --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log10_data.c @@ -0,0 +1,337 @@ +/* + * Data for log10. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << LOG10_TABLE_BITS) + +const struct log10_data __log10_data = { +.ln2hi = 0x1.62e42fefa3800p-1, +.ln2lo = 0x1.ef35793c76730p-45, +.invln10 = 0x1.bcb7b1526e50ep-2, +.poly1 = { +#if LOG10_POLY1_ORDER == 12 +// relative error: 0x1.c04d76cp-63 +// in -0x1p-4 0x1.09p-4 (|log(1+x)| > 0x1p-4 outside the interval) +-0x1p-1, +0x1.5555555555577p-2, +-0x1.ffffffffffdcbp-3, +0x1.999999995dd0cp-3, +-0x1.55555556745a7p-3, +0x1.24924a344de3p-3, +-0x1.fffffa4423d65p-4, +0x1.c7184282ad6cap-4, +-0x1.999eb43b068ffp-4, +0x1.78182f7afd085p-4, +-0x1.5521375d145cdp-4, +#endif +}, +.poly = { +#if N == 128 && LOG10_POLY_ORDER == 6 +// relative error: 0x1.926199e8p-56 +// abs error: 0x1.882ff33p-65 +// in -0x1.fp-9 0x1.fp-9 +-0x1.0000000000001p-1, +0x1.555555551305bp-2, +-0x1.fffffffeb459p-3, +0x1.999b324f10111p-3, +-0x1.55575e506c89fp-3, +#endif +}, +/* Algorithm: + + x = 2^k z + log(x) = k ln2 + log(c) + log(z/c) + log(z/c) = poly(z/c - 1) + +where z is in [1.6p-1; 1.6p0] which is split into N subintervals and z falls +into the ith one, then table entries are computed as + + tab[i].invc = 1/c + tab[i].logc = (double)log(c) + tab2[i].chi = (double)c + tab2[i].clo = (double)(c - (double)c) + +where c is near the center of the subinterval and is chosen by trying +-2^29 +floating point invc candidates around 1/center and selecting one for which + + 1) the rounding error in 0x1.8p9 + logc is 0, + 2) the rounding error in z - chi - clo is < 0x1p-66 and + 3) the rounding error in (double)log(c) is minimized (< 0x1p-66). + +Note: 1) ensures that k*ln2hi + logc can be computed without rounding error, +2) ensures that z/c - 1 can be computed as (z - chi - clo)*invc with close to +a single rounding error when there is no fast fma for z*invc - 1, 3) ensures +that logc + poly(z/c - 1) has small error, however near x == 1 when +|log(x)| < 0x1p-4, this is not enough so that is special cased. */ +.tab = { +#if N == 128 +{0x1.734f0c3e0de9fp+0, -0x1.7cc7f79e69000p-2}, +{0x1.713786a2ce91fp+0, -0x1.76feec20d0000p-2}, +{0x1.6f26008fab5a0p+0, -0x1.713e31351e000p-2}, +{0x1.6d1a61f138c7dp+0, -0x1.6b85b38287800p-2}, +{0x1.6b1490bc5b4d1p+0, -0x1.65d5590807800p-2}, +{0x1.69147332f0cbap+0, -0x1.602d076180000p-2}, +{0x1.6719f18224223p+0, -0x1.5a8ca86909000p-2}, +{0x1.6524f99a51ed9p+0, -0x1.54f4356035000p-2}, +{0x1.63356aa8f24c4p+0, -0x1.4f637c36b4000p-2}, +{0x1.614b36b9ddc14p+0, -0x1.49da7fda85000p-2}, +{0x1.5f66452c65c4cp+0, -0x1.445923989a800p-2}, +{0x1.5d867b5912c4fp+0, -0x1.3edf439b0b800p-2}, +{0x1.5babccb5b90dep+0, -0x1.396ce448f7000p-2}, +{0x1.59d61f2d91a78p+0, -0x1.3401e17bda000p-2}, +{0x1.5805612465687p+0, -0x1.2e9e2ef468000p-2}, +{0x1.56397cee76bd3p+0, -0x1.2941b3830e000p-2}, +{0x1.54725e2a77f93p+0, -0x1.23ec58cda8800p-2}, +{0x1.52aff42064583p+0, -0x1.1e9e129279000p-2}, +{0x1.50f22dbb2bddfp+0, -0x1.1956d2b48f800p-2}, +{0x1.4f38f4734ded7p+0, -0x1.141679ab9f800p-2}, +{0x1.4d843cfde2840p+0, -0x1.0edd094ef9800p-2}, +{0x1.4bd3ec078a3c8p+0, -0x1.09aa518db1000p-2}, +{0x1.4a27fc3e0258ap+0, -0x1.047e65263b800p-2}, +{0x1.4880524d48434p+0, -0x1.feb224586f000p-3}, +{0x1.46dce1b192d0bp+0, -0x1.f474a7517b000p-3}, +{0x1.453d9d3391854p+0, -0x1.ea4443d103000p-3}, +{0x1.43a2744b4845ap+0, -0x1.e020d44e9b000p-3}, +{0x1.420b54115f8fbp+0, -0x1.d60a22977f000p-3}, +{0x1.40782da3ef4b1p+0, -0x1.cc00104959000p-3}, +{0x1.3ee8f5d57fe8fp+0, -0x1.c202956891000p-3}, +{0x1.3d5d9a00b4ce9p+0, -0x1.b81178d811000p-3}, +{0x1.3bd60c010c12bp+0, -0x1.ae2c9ccd3d000p-3}, +{0x1.3a5242b75dab8p+0, -0x1.a45402e129000p-3}, +{0x1.38d22cd9fd002p+0, -0x1.9a877681df000p-3}, +{0x1.3755bc5847a1cp+0, -0x1.90c6d69483000p-3}, +{0x1.35dce49ad36e2p+0, -0x1.87120a645c000p-3}, +{0x1.34679984dd440p+0, -0x1.7d68fb4143000p-3}, +{0x1.32f5cceffcb24p+0, -0x1.73cb83c627000p-3}, +{0x1.3187775a10d49p+0, -0x1.6a39a9b376000p-3}, +{0x1.301c8373e3990p+0, -0x1.60b3154b7a000p-3}, +{0x1.2eb4ebb95f841p+0, -0x1.5737d76243000p-3}, +{0x1.2d50a0219a9d1p+0, -0x1.4dc7b8fc23000p-3}, +{0x1.2bef9a8b7fd2ap+0, -0x1.4462c51d20000p-3}, +{0x1.2a91c7a0c1babp+0, -0x1.3b08abc830000p-3}, +{0x1.293726014b530p+0, -0x1.31b996b490000p-3}, +{0x1.27dfa5757a1f5p+0, -0x1.2875490a44000p-3}, +{0x1.268b39b1d3bbfp+0, -0x1.1f3b9f879a000p-3}, +{0x1.2539d838ff5bdp+0, -0x1.160c8252ca000p-3}, +{0x1.23eb7aac9083bp+0, -0x1.0ce7f57f72000p-3}, +{0x1.22a012ba940b6p+0, -0x1.03cdc49fea000p-3}, +{0x1.2157996cc4132p+0, -0x1.f57bdbc4b8000p-4}, +{0x1.201201dd2fc9bp+0, -0x1.e370896404000p-4}, +{0x1.1ecf4494d480bp+0, -0x1.d17983ef94000p-4}, +{0x1.1d8f5528f6569p+0, -0x1.bf9674ed8a000p-4}, +{0x1.1c52311577e7cp+0, -0x1.adc79202f6000p-4}, +{0x1.1b17c74cb26e9p+0, -0x1.9c0c3e7288000p-4}, +{0x1.19e010c2c1ab6p+0, -0x1.8a646b372c000p-4}, +{0x1.18ab07bb670bdp+0, -0x1.78d01b3ac0000p-4}, +{0x1.1778a25efbcb6p+0, -0x1.674f145380000p-4}, +{0x1.1648d354c31dap+0, -0x1.55e0e6d878000p-4}, +{0x1.151b990275fddp+0, -0x1.4485cdea1e000p-4}, +{0x1.13f0ea432d24cp+0, -0x1.333d94d6aa000p-4}, +{0x1.12c8b7210f9dap+0, -0x1.22079f8c56000p-4}, +{0x1.11a3028ecb531p+0, -0x1.10e4698622000p-4}, +{0x1.107fbda8434afp+0, -0x1.ffa6c6ad20000p-5}, +{0x1.0f5ee0f4e6bb3p+0, -0x1.dda8d4a774000p-5}, +{0x1.0e4065d2a9fcep+0, -0x1.bbcece4850000p-5}, +{0x1.0d244632ca521p+0, -0x1.9a1894012c000p-5}, +{0x1.0c0a77ce2981ap+0, -0x1.788583302c000p-5}, +{0x1.0af2f83c636d1p+0, -0x1.5715e67d68000p-5}, +{0x1.09ddb98a01339p+0, -0x1.35c8a49658000p-5}, +{0x1.08cabaf52e7dfp+0, -0x1.149e364154000p-5}, +{0x1.07b9f2f4e28fbp+0, -0x1.e72c082eb8000p-6}, +{0x1.06ab58c358f19p+0, -0x1.a55f152528000p-6}, +{0x1.059eea5ecf92cp+0, -0x1.63d62cf818000p-6}, +{0x1.04949cdd12c90p+0, -0x1.228fb8caa0000p-6}, +{0x1.038c6c6f0ada9p+0, -0x1.c317b20f90000p-7}, +{0x1.02865137932a9p+0, -0x1.419355daa0000p-7}, +{0x1.0182427ea7348p+0, -0x1.81203c2ec0000p-8}, +{0x1.008040614b195p+0, -0x1.0040979240000p-9}, +{0x1.fe01ff726fa1ap-1, 0x1.feff384900000p-9}, +{0x1.fa11cc261ea74p-1, 0x1.7dc41353d0000p-7}, +{0x1.f6310b081992ep-1, 0x1.3cea3c4c28000p-6}, +{0x1.f25f63ceeadcdp-1, 0x1.b9fc114890000p-6}, +{0x1.ee9c8039113e7p-1, 0x1.1b0d8ce110000p-5}, +{0x1.eae8078cbb1abp-1, 0x1.58a5bd001c000p-5}, +{0x1.e741aa29d0c9bp-1, 0x1.95c8340d88000p-5}, +{0x1.e3a91830a99b5p-1, 0x1.d276aef578000p-5}, +{0x1.e01e009609a56p-1, 0x1.07598e598c000p-4}, +{0x1.dca01e577bb98p-1, 0x1.253f5e30d2000p-4}, +{0x1.d92f20b7c9103p-1, 0x1.42edd8b380000p-4}, +{0x1.d5cac66fb5ccep-1, 0x1.606598757c000p-4}, +{0x1.d272caa5ede9dp-1, 0x1.7da76356a0000p-4}, +{0x1.cf26e3e6b2ccdp-1, 0x1.9ab434e1c6000p-4}, +{0x1.cbe6da2a77902p-1, 0x1.b78c7bb0d6000p-4}, +{0x1.c8b266d37086dp-1, 0x1.d431332e72000p-4}, +{0x1.c5894bd5d5804p-1, 0x1.f0a3171de6000p-4}, +{0x1.c26b533bb9f8cp-1, 0x1.067152b914000p-3}, +{0x1.bf583eeece73fp-1, 0x1.147858292b000p-3}, +{0x1.bc4fd75db96c1p-1, 0x1.2266ecdca3000p-3}, +{0x1.b951e0c864a28p-1, 0x1.303d7a6c55000p-3}, +{0x1.b65e2c5ef3e2cp-1, 0x1.3dfc33c331000p-3}, +{0x1.b374867c9888bp-1, 0x1.4ba366b7a8000p-3}, +{0x1.b094b211d304ap-1, 0x1.5933928d1f000p-3}, +{0x1.adbe885f2ef7ep-1, 0x1.66acd2418f000p-3}, +{0x1.aaf1d31603da2p-1, 0x1.740f8ec669000p-3}, +{0x1.a82e63fd358a7p-1, 0x1.815c0f51af000p-3}, +{0x1.a5740ef09738bp-1, 0x1.8e92954f68000p-3}, +{0x1.a2c2a90ab4b27p-1, 0x1.9bb3602f84000p-3}, +{0x1.a01a01393f2d1p-1, 0x1.a8bed1c2c0000p-3}, +{0x1.9d79f24db3c1bp-1, 0x1.b5b515c01d000p-3}, +{0x1.9ae2505c7b190p-1, 0x1.c2967ccbcc000p-3}, +{0x1.9852ef297ce2fp-1, 0x1.cf635d5486000p-3}, +{0x1.95cbaeea44b75p-1, 0x1.dc1bd3446c000p-3}, +{0x1.934c69de74838p-1, 0x1.e8c01b8cfe000p-3}, +{0x1.90d4f2f6752e6p-1, 0x1.f5509c0179000p-3}, +{0x1.8e6528effd79dp-1, 0x1.00e6c121fb800p-2}, +{0x1.8bfce9fcc007cp-1, 0x1.071b80e93d000p-2}, +{0x1.899c0dabec30ep-1, 0x1.0d46b9e867000p-2}, +{0x1.87427aa2317fbp-1, 0x1.13687334bd000p-2}, +{0x1.84f00acb39a08p-1, 0x1.1980d67234800p-2}, +{0x1.82a49e8653e55p-1, 0x1.1f8ffe0cc8000p-2}, +{0x1.8060195f40260p-1, 0x1.2595fd7636800p-2}, +{0x1.7e22563e0a329p-1, 0x1.2b9300914a800p-2}, +{0x1.7beb377dcb5adp-1, 0x1.3187210436000p-2}, +{0x1.79baa679725c2p-1, 0x1.377266dec1800p-2}, +{0x1.77907f2170657p-1, 0x1.3d54ffbaf3000p-2}, +{0x1.756cadbd6130cp-1, 0x1.432eee32fe000p-2}, +#endif +}, +#if !HAVE_FAST_FMA +.tab2 = { +#if N == 128 +{0x1.61000014fb66bp-1, 0x1.e026c91425b3cp-56}, +{0x1.63000034db495p-1, 0x1.dbfea48005d41p-55}, +{0x1.650000d94d478p-1, 0x1.e7fa786d6a5b7p-55}, +{0x1.67000074e6fadp-1, 0x1.1fcea6b54254cp-57}, +{0x1.68ffffedf0faep-1, -0x1.c7e274c590efdp-56}, +{0x1.6b0000763c5bcp-1, -0x1.ac16848dcda01p-55}, +{0x1.6d0001e5cc1f6p-1, 0x1.33f1c9d499311p-55}, +{0x1.6efffeb05f63ep-1, -0x1.e80041ae22d53p-56}, +{0x1.710000e86978p-1, 0x1.bff6671097952p-56}, +{0x1.72ffffc67e912p-1, 0x1.c00e226bd8724p-55}, +{0x1.74fffdf81116ap-1, -0x1.e02916ef101d2p-57}, +{0x1.770000f679c9p-1, -0x1.7fc71cd549c74p-57}, +{0x1.78ffffa7ec835p-1, 0x1.1bec19ef50483p-55}, +{0x1.7affffe20c2e6p-1, -0x1.07e1729cc6465p-56}, +{0x1.7cfffed3fc9p-1, -0x1.08072087b8b1cp-55}, +{0x1.7efffe9261a76p-1, 0x1.dc0286d9df9aep-55}, +{0x1.81000049ca3e8p-1, 0x1.97fd251e54c33p-55}, +{0x1.8300017932c8fp-1, -0x1.afee9b630f381p-55}, +{0x1.850000633739cp-1, 0x1.9bfbf6b6535bcp-55}, +{0x1.87000204289c6p-1, -0x1.bbf65f3117b75p-55}, +{0x1.88fffebf57904p-1, -0x1.9006ea23dcb57p-55}, +{0x1.8b00022bc04dfp-1, -0x1.d00df38e04b0ap-56}, +{0x1.8cfffe50c1b8ap-1, -0x1.8007146ff9f05p-55}, +{0x1.8effffc918e43p-1, 0x1.3817bd07a7038p-55}, +{0x1.910001efa5fc7p-1, 0x1.93e9176dfb403p-55}, +{0x1.9300013467bb9p-1, 0x1.f804e4b980276p-56}, +{0x1.94fffe6ee076fp-1, -0x1.f7ef0d9ff622ep-55}, +{0x1.96fffde3c12d1p-1, -0x1.082aa962638bap-56}, +{0x1.98ffff4458a0dp-1, -0x1.7801b9164a8efp-55}, +{0x1.9afffdd982e3ep-1, -0x1.740e08a5a9337p-55}, +{0x1.9cfffed49fb66p-1, 0x1.fce08c19bep-60}, +{0x1.9f00020f19c51p-1, -0x1.a3faa27885b0ap-55}, +{0x1.a10001145b006p-1, 0x1.4ff489958da56p-56}, +{0x1.a300007bbf6fap-1, 0x1.cbeab8a2b6d18p-55}, +{0x1.a500010971d79p-1, 0x1.8fecadd78793p-55}, +{0x1.a70001df52e48p-1, -0x1.f41763dd8abdbp-55}, +{0x1.a90001c593352p-1, -0x1.ebf0284c27612p-55}, +{0x1.ab0002a4f3e4bp-1, -0x1.9fd043cff3f5fp-57}, +{0x1.acfffd7ae1ed1p-1, -0x1.23ee7129070b4p-55}, +{0x1.aefffee510478p-1, 0x1.a063ee00edea3p-57}, +{0x1.b0fffdb650d5bp-1, 0x1.a06c8381f0ab9p-58}, +{0x1.b2ffffeaaca57p-1, -0x1.9011e74233c1dp-56}, +{0x1.b4fffd995badcp-1, -0x1.9ff1068862a9fp-56}, +{0x1.b7000249e659cp-1, 0x1.aff45d0864f3ep-55}, +{0x1.b8ffff987164p-1, 0x1.cfe7796c2c3f9p-56}, +{0x1.bafffd204cb4fp-1, -0x1.3ff27eef22bc4p-57}, +{0x1.bcfffd2415c45p-1, -0x1.cffb7ee3bea21p-57}, +{0x1.beffff86309dfp-1, -0x1.14103972e0b5cp-55}, +{0x1.c0fffe1b57653p-1, 0x1.bc16494b76a19p-55}, +{0x1.c2ffff1fa57e3p-1, -0x1.4feef8d30c6edp-57}, +{0x1.c4fffdcbfe424p-1, -0x1.43f68bcec4775p-55}, +{0x1.c6fffed54b9f7p-1, 0x1.47ea3f053e0ecp-55}, +{0x1.c8fffeb998fd5p-1, 0x1.383068df992f1p-56}, +{0x1.cb0002125219ap-1, -0x1.8fd8e64180e04p-57}, +{0x1.ccfffdd94469cp-1, 0x1.e7ebe1cc7ea72p-55}, +{0x1.cefffeafdc476p-1, 0x1.ebe39ad9f88fep-55}, +{0x1.d1000169af82bp-1, 0x1.57d91a8b95a71p-56}, +{0x1.d30000d0ff71dp-1, 0x1.9c1906970c7dap-55}, +{0x1.d4fffea790fc4p-1, -0x1.80e37c558fe0cp-58}, +{0x1.d70002edc87e5p-1, -0x1.f80d64dc10f44p-56}, +{0x1.d900021dc82aap-1, -0x1.47c8f94fd5c5cp-56}, +{0x1.dafffd86b0283p-1, 0x1.c7f1dc521617ep-55}, +{0x1.dd000296c4739p-1, 0x1.8019eb2ffb153p-55}, +{0x1.defffe54490f5p-1, 0x1.e00d2c652cc89p-57}, +{0x1.e0fffcdabf694p-1, -0x1.f8340202d69d2p-56}, +{0x1.e2fffdb52c8ddp-1, 0x1.b00c1ca1b0864p-56}, +{0x1.e4ffff24216efp-1, 0x1.2ffa8b094ab51p-56}, +{0x1.e6fffe88a5e11p-1, -0x1.7f673b1efbe59p-58}, +{0x1.e9000119eff0dp-1, -0x1.4808d5e0bc801p-55}, +{0x1.eafffdfa51744p-1, 0x1.80006d54320b5p-56}, +{0x1.ed0001a127fa1p-1, -0x1.002f860565c92p-58}, +{0x1.ef00007babcc4p-1, -0x1.540445d35e611p-55}, +{0x1.f0ffff57a8d02p-1, -0x1.ffb3139ef9105p-59}, +{0x1.f30001ee58ac7p-1, 0x1.a81acf2731155p-55}, +{0x1.f4ffff5823494p-1, 0x1.a3f41d4d7c743p-55}, +{0x1.f6ffffca94c6bp-1, -0x1.202f41c987875p-57}, +{0x1.f8fffe1f9c441p-1, 0x1.77dd1f477e74bp-56}, +{0x1.fafffd2e0e37ep-1, -0x1.f01199a7ca331p-57}, +{0x1.fd0001c77e49ep-1, 0x1.181ee4bceacb1p-56}, +{0x1.feffff7e0c331p-1, -0x1.e05370170875ap-57}, +{0x1.00ffff465606ep+0, -0x1.a7ead491c0adap-55}, +{0x1.02ffff3867a58p+0, -0x1.77f69c3fcb2ep-54}, +{0x1.04ffffdfc0d17p+0, 0x1.7bffe34cb945bp-54}, +{0x1.0700003cd4d82p+0, 0x1.20083c0e456cbp-55}, +{0x1.08ffff9f2cbe8p+0, -0x1.dffdfbe37751ap-57}, +{0x1.0b000010cda65p+0, -0x1.13f7faee626ebp-54}, +{0x1.0d00001a4d338p+0, 0x1.07dfa79489ff7p-55}, +{0x1.0effffadafdfdp+0, -0x1.7040570d66bcp-56}, +{0x1.110000bbafd96p+0, 0x1.e80d4846d0b62p-55}, +{0x1.12ffffae5f45dp+0, 0x1.dbffa64fd36efp-54}, +{0x1.150000dd59ad9p+0, 0x1.a0077701250aep-54}, +{0x1.170000f21559ap+0, 0x1.dfdf9e2e3deeep-55}, +{0x1.18ffffc275426p+0, 0x1.10030dc3b7273p-54}, +{0x1.1b000123d3c59p+0, 0x1.97f7980030188p-54}, +{0x1.1cffff8299eb7p+0, -0x1.5f932ab9f8c67p-57}, +{0x1.1effff48ad4p+0, 0x1.37fbf9da75bebp-54}, +{0x1.210000c8b86a4p+0, 0x1.f806b91fd5b22p-54}, +{0x1.2300003854303p+0, 0x1.3ffc2eb9fbf33p-54}, +{0x1.24fffffbcf684p+0, 0x1.601e77e2e2e72p-56}, +{0x1.26ffff52921d9p+0, 0x1.ffcbb767f0c61p-56}, +{0x1.2900014933a3cp+0, -0x1.202ca3c02412bp-56}, +{0x1.2b00014556313p+0, -0x1.2808233f21f02p-54}, +{0x1.2cfffebfe523bp+0, -0x1.8ff7e384fdcf2p-55}, +{0x1.2f0000bb8ad96p+0, -0x1.5ff51503041c5p-55}, +{0x1.30ffffb7ae2afp+0, -0x1.10071885e289dp-55}, +{0x1.32ffffeac5f7fp+0, -0x1.1ff5d3fb7b715p-54}, +{0x1.350000ca66756p+0, 0x1.57f82228b82bdp-54}, +{0x1.3700011fbf721p+0, 0x1.000bac40dd5ccp-55}, +{0x1.38ffff9592fb9p+0, -0x1.43f9d2db2a751p-54}, +{0x1.3b00004ddd242p+0, 0x1.57f6b707638e1p-55}, +{0x1.3cffff5b2c957p+0, 0x1.a023a10bf1231p-56}, +{0x1.3efffeab0b418p+0, 0x1.87f6d66b152bp-54}, +{0x1.410001532aff4p+0, 0x1.7f8375f198524p-57}, +{0x1.4300017478b29p+0, 0x1.301e672dc5143p-55}, +{0x1.44fffe795b463p+0, 0x1.9ff69b8b2895ap-55}, +{0x1.46fffe80475ep+0, -0x1.5c0b19bc2f254p-54}, +{0x1.48fffef6fc1e7p+0, 0x1.b4009f23a2a72p-54}, +{0x1.4afffe5bea704p+0, -0x1.4ffb7bf0d7d45p-54}, +{0x1.4d000171027dep+0, -0x1.9c06471dc6a3dp-54}, +{0x1.4f0000ff03ee2p+0, 0x1.77f890b85531cp-54}, +{0x1.5100012dc4bd1p+0, 0x1.004657166a436p-57}, +{0x1.530001605277ap+0, -0x1.6bfcece233209p-54}, +{0x1.54fffecdb704cp+0, -0x1.902720505a1d7p-55}, +{0x1.56fffef5f54a9p+0, 0x1.bbfe60ec96412p-54}, +{0x1.5900017e61012p+0, 0x1.87ec581afef9p-55}, +{0x1.5b00003c93e92p+0, -0x1.f41080abf0ccp-54}, +{0x1.5d0001d4919bcp+0, -0x1.8812afb254729p-54}, +{0x1.5efffe7b87a89p+0, -0x1.47eb780ed6904p-54}, +#endif +}, +#endif /* !HAVE_FAST_FMA */ +}; diff --git a/contrib/arm-optimized-routines/pl/math/log10f.c b/contrib/arm-optimized-routines/pl/math/log10f.c new file mode 100644 index 000000000000..5c80008e4e57 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log10f.c @@ -0,0 +1,97 @@ +/* + * Single-precision log10 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <math.h> +#include <stdint.h> + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Data associated to logf: + + LOGF_TABLE_BITS = 4 + LOGF_POLY_ORDER = 4 + + ULP error: 0.818 (nearest rounding.) + Relative error: 1.957 * 2^-26 (before rounding.). */ + +#define T __logf_data.tab +#define A __logf_data.poly +#define Ln2 __logf_data.ln2 +#define InvLn10 __logf_data.invln10 +#define N (1 << LOGF_TABLE_BITS) +#define OFF 0x3f330000 + +/* This naive implementation of log10f mimics that of log + then simply scales the result by 1/log(10) to switch from base e to + base 10. Hence, most computations are carried out in double precision. + Scaling before rounding to single precision is both faster and more accurate. + + ULP error: 0.797 ulp (nearest rounding.). */ +float +log10f (float x) +{ + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t z, r, r2, y, y0, invc, logc; + uint32_t ix, iz, tmp; + int k, i; + + ix = asuint (x); +#if WANT_ROUNDING + /* Fix sign of zero with downward rounding when x==1. */ + if (unlikely (ix == 0x3f800000)) + return 0; +#endif + if (unlikely (ix - 0x00800000 >= 0x7f800000 - 0x00800000)) + { + /* x < 0x1p-126 or inf or nan. */ + if (ix * 2 == 0) + return __math_divzerof (1); + if (ix == 0x7f800000) /* log(inf) == inf. */ + return x; + if ((ix & 0x80000000) || ix * 2 >= 0xff000000) + return __math_invalidf (x); + /* x is subnormal, normalize it. */ + ix = asuint (x * 0x1p23f); + ix -= 23 << 23; + } + + /* x = 2^k z; where z is in range [OFF,2*OFF] and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = ix - OFF; + i = (tmp >> (23 - LOGF_TABLE_BITS)) % N; + k = (int32_t) tmp >> 23; /* arithmetic shift. */ + iz = ix - (tmp & 0xff800000); + invc = T[i].invc; + logc = T[i].logc; + z = (double_t) asfloat (iz); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + r = z * invc - 1; + y0 = logc + (double_t) k * Ln2; + + /* Pipelined polynomial evaluation to approximate log1p(r). */ + r2 = r * r; + y = A[1] * r + A[2]; + y = A[0] * r2 + y; + y = y * r2 + (y0 + r); + + /* Multiply by 1/log(10). */ + y = y * InvLn10; + + return eval_as_float (y); +} + +PL_SIG (S, F, 1, log10, 0.01, 11.1) +PL_TEST_ULP (log10f, 0.30) +PL_TEST_INTERVAL (log10f, 0, 0xffff0000, 10000) +PL_TEST_INTERVAL (log10f, 0x1p-127, 0x1p-26, 50000) +PL_TEST_INTERVAL (log10f, 0x1p-26, 0x1p3, 50000) +PL_TEST_INTERVAL (log10f, 0x1p-4, 0x1p4, 50000) +PL_TEST_INTERVAL (log10f, 0, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/log1p_2u.c b/contrib/arm-optimized-routines/pl/math/log1p_2u.c new file mode 100644 index 000000000000..f9491ce52b44 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log1p_2u.c @@ -0,0 +1,131 @@ +/* + * Double-precision log(1+x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f64.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Ln2Hi 0x1.62e42fefa3800p-1 +#define Ln2Lo 0x1.ef35793c76730p-45 +#define HfRt2Top 0x3fe6a09e /* top32(asuint64(sqrt(2)/2)). */ +#define OneMHfRt2Top \ + 0x00095f62 /* top32(asuint64(1)) - top32(asuint64(sqrt(2)/2)). */ +#define OneTop12 0x3ff +#define BottomMask 0xffffffff +#define OneMHfRt2 0x3fd2bec333018866 +#define Rt2MOne 0x3fda827999fcef32 +#define AbsMask 0x7fffffffffffffff +#define ExpM63 0x3c00 + +static inline double +eval_poly (double f) +{ + double f2 = f * f; + double f4 = f2 * f2; + double f8 = f4 * f4; + return estrin_18_f64 (f, f2, f4, f8, f8 * f8, __log1p_data.coeffs); +} + +/* log1p approximation using polynomial on reduced interval. Largest + observed errors are near the lower boundary of the region where k + is 0. + Maximum measured error: 1.75ULP. + log1p(-0x1.2e1aea97b3e5cp-2) got -0x1.65fb8659a2f9p-2 + want -0x1.65fb8659a2f92p-2. */ +double +log1p (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & AbsMask; + uint32_t ia16 = ia >> 48; + + /* Handle special cases first. */ + if (unlikely (ia16 >= 0x7ff0 || ix >= 0xbff0000000000000 + || ix == 0x8000000000000000)) + { + if (ix == 0x8000000000000000 || ix == 0x7ff0000000000000) + { + /* x == -0 => log1p(x) = -0. + x == Inf => log1p(x) = Inf. */ + return x; + } + if (ix == 0xbff0000000000000) + { + /* x == -1 => log1p(x) = -Inf. */ + return __math_divzero (-1); + ; + } + if (ia16 >= 0x7ff0) + { + /* x == +/-NaN => log1p(x) = NaN. */ + return __math_invalid (asdouble (ia)); + } + /* x < -1 => log1p(x) = NaN. + x == -Inf => log1p(x) = NaN. */ + return __math_invalid (x); + } + + /* With x + 1 = t * 2^k (where t = f + 1 and k is chosen such that f + is in [sqrt(2)/2, sqrt(2)]): + log1p(x) = k*log(2) + log1p(f). + + f may not be representable exactly, so we need a correction term: + let m = round(1 + x), c = (1 + x) - m. + c << m: at very small x, log1p(x) ~ x, hence: + log(1+x) - log(m) ~ c/m. + + We therefore calculate log1p(x) by k*log2 + log1p(f) + c/m. */ + + uint64_t sign = ix & ~AbsMask; + if (ia <= OneMHfRt2 || (!sign && ia <= Rt2MOne)) + { + if (unlikely (ia16 <= ExpM63)) + { + /* If exponent of x <= -63 then shortcut the polynomial and avoid + underflow by just returning x, which is exactly rounded in this + region. */ + return x; + } + /* If x is in [sqrt(2)/2 - 1, sqrt(2) - 1] then we can shortcut all the + logic below, as k = 0 and f = x and therefore representable exactly. + All we need is to return the polynomial. */ + return fma (x, eval_poly (x) * x, x); + } + + /* Obtain correctly scaled k by manipulation in the exponent. */ + double m = x + 1; + uint64_t mi = asuint64 (m); + uint32_t u = (mi >> 32) + OneMHfRt2Top; + int32_t k = (int32_t) (u >> 20) - OneTop12; + + /* Correction term c/m. */ + double cm = (x - (m - 1)) / m; + + /* Reduce x to f in [sqrt(2)/2, sqrt(2)]. */ + uint32_t utop = (u & 0x000fffff) + HfRt2Top; + uint64_t u_red = ((uint64_t) utop << 32) | (mi & BottomMask); + double f = asdouble (u_red) - 1; + + /* Approximate log1p(x) on the reduced input using a polynomial. Because + log1p(0)=0 we choose an approximation of the form: + x + C0*x^2 + C1*x^3 + C2x^4 + ... + Hence approximation has the form f + f^2 * P(f) + where P(x) = C0 + C1*x + C2x^2 + ... */ + double p = fma (f, eval_poly (f) * f, f); + + double kd = k; + double y = fma (Ln2Lo, kd, cm); + return y + fma (Ln2Hi, kd, p); +} + +PL_SIG (S, D, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (log1p, 1.26) +PL_TEST_SYM_INTERVAL (log1p, 0.0, 0x1p-23, 50000) +PL_TEST_SYM_INTERVAL (log1p, 0x1p-23, 0.001, 50000) +PL_TEST_SYM_INTERVAL (log1p, 0.001, 1.0, 50000) +PL_TEST_SYM_INTERVAL (log1p, 1.0, inf, 5000) diff --git a/contrib/arm-optimized-routines/pl/math/log1p_data.c b/contrib/arm-optimized-routines/pl/math/log1p_data.c new file mode 100644 index 000000000000..6168a0c9a214 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log1p_data.c @@ -0,0 +1,19 @@ +/* + * Data used in double-precision log(1+x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Polynomial coefficients generated using Remez algorithm, see + log1p.sollya for details. */ +const struct log1p_data __log1p_data = { + .coeffs = {-0x1.ffffffffffffbp-2, 0x1.55555555551a9p-2, -0x1.00000000008e3p-2, + 0x1.9999999a32797p-3, -0x1.555555552fecfp-3, 0x1.249248e071e5ap-3, + -0x1.ffffff8bf8482p-4, 0x1.c71c8f07da57ap-4, -0x1.9999ca4ccb617p-4, + 0x1.7459ad2e1dfa3p-4, -0x1.554d2680a3ff2p-4, 0x1.3b4c54d487455p-4, + -0x1.2548a9ffe80e6p-4, 0x1.0f389a24b2e07p-4, -0x1.eee4db15db335p-5, + 0x1.e95b494d4a5ddp-5, -0x1.15fdf07cb7c73p-4, 0x1.0310b70800fcfp-4, + -0x1.cfa7385bdb37ep-6}}; diff --git a/contrib/arm-optimized-routines/pl/math/log1pf_2u1.c b/contrib/arm-optimized-routines/pl/math/log1pf_2u1.c new file mode 100644 index 000000000000..e99174853720 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log1pf_2u1.c @@ -0,0 +1,161 @@ +/* + * Single-precision log(1+x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "poly_scalar_f32.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define Ln2 (0x1.62e43p-1f) +#define SignMask (0x80000000) + +/* Biased exponent of the largest float m for which m^8 underflows. */ +#define M8UFLOW_BOUND_BEXP 112 +/* Biased exponent of the largest float for which we just return x. */ +#define TINY_BOUND_BEXP 103 + +#define C(i) __log1pf_data.coeffs[i] + +static inline float +eval_poly (float m, uint32_t e) +{ +#ifdef LOG1PF_2U5 + + /* 2.5 ulp variant. Approximate log(1+m) on [-0.25, 0.5] using + slightly modified Estrin scheme (no x^0 term, and x term is just x). */ + float p_12 = fmaf (m, C (1), C (0)); + float p_34 = fmaf (m, C (3), C (2)); + float p_56 = fmaf (m, C (5), C (4)); + float p_78 = fmaf (m, C (7), C (6)); + + float m2 = m * m; + float p_02 = fmaf (m2, p_12, m); + float p_36 = fmaf (m2, p_56, p_34); + float p_79 = fmaf (m2, C (8), p_78); + + float m4 = m2 * m2; + float p_06 = fmaf (m4, p_36, p_02); + + if (unlikely (e < M8UFLOW_BOUND_BEXP)) + return p_06; + + float m8 = m4 * m4; + return fmaf (m8, p_79, p_06); + +#elif defined(LOG1PF_1U3) + + /* 1.3 ulp variant. Approximate log(1+m) on [-0.25, 0.5] using Horner + scheme. Our polynomial approximation for log1p has the form + x + C1 * x^2 + C2 * x^3 + C3 * x^4 + ... + Hence approximation has the form m + m^2 * P(m) + where P(x) = C1 + C2 * x + C3 * x^2 + ... . */ + return fmaf (m, m * horner_8_f32 (m, __log1pf_data.coeffs), m); + +#else +#error No log1pf approximation exists with the requested precision. Options are 13 or 25. +#endif +} + +static inline uint32_t +biased_exponent (uint32_t ix) +{ + return (ix & 0x7f800000) >> 23; +} + +/* log1pf approximation using polynomial on reduced interval. Worst-case error + when using Estrin is roughly 2.02 ULP: + log1pf(0x1.21e13ap-2) got 0x1.fe8028p-3 want 0x1.fe802cp-3. */ +float +log1pf (float x) +{ + uint32_t ix = asuint (x); + uint32_t ia = ix & ~SignMask; + uint32_t ia12 = ia >> 20; + uint32_t e = biased_exponent (ix); + + /* Handle special cases first. */ + if (unlikely (ia12 >= 0x7f8 || ix >= 0xbf800000 || ix == 0x80000000 + || e <= TINY_BOUND_BEXP)) + { + if (ix == 0xff800000) + { + /* x == -Inf => log1pf(x) = NaN. */ + return NAN; + } + if ((ix == 0x7f800000 || e <= TINY_BOUND_BEXP) && ia12 <= 0x7f8) + { + /* |x| < TinyBound => log1p(x) = x. + x == Inf => log1pf(x) = Inf. */ + return x; + } + if (ix == 0xbf800000) + { + /* x == -1.0 => log1pf(x) = -Inf. */ + return __math_divzerof (-1); + } + if (ia12 >= 0x7f8) + { + /* x == +/-NaN => log1pf(x) = NaN. */ + return __math_invalidf (asfloat (ia)); + } + /* x < -1.0 => log1pf(x) = NaN. */ + return __math_invalidf (x); + } + + /* With x + 1 = t * 2^k (where t = m + 1 and k is chosen such that m + is in [-0.25, 0.5]): + log1p(x) = log(t) + log(2^k) = log1p(m) + k*log(2). + + We approximate log1p(m) with a polynomial, then scale by + k*log(2). Instead of doing this directly, we use an intermediate + scale factor s = 4*k*log(2) to ensure the scale is representable + as a normalised fp32 number. */ + + if (ix <= 0x3f000000 || ia <= 0x3e800000) + { + /* If x is in [-0.25, 0.5] then we can shortcut all the logic + below, as k = 0 and m = x. All we need is to return the + polynomial. */ + return eval_poly (x, e); + } + + float m = x + 1.0f; + + /* k is used scale the input. 0x3f400000 is chosen as we are trying to + reduce x to the range [-0.25, 0.5]. Inside this range, k is 0. + Outside this range, if k is reinterpreted as (NOT CONVERTED TO) float: + let k = sign * 2^p where sign = -1 if x < 0 + 1 otherwise + and p is a negative integer whose magnitude increases with the + magnitude of x. */ + int k = (asuint (m) - 0x3f400000) & 0xff800000; + + /* By using integer arithmetic, we obtain the necessary scaling by + subtracting the unbiased exponent of k from the exponent of x. */ + float m_scale = asfloat (asuint (x) - k); + + /* Scale up to ensure that the scale factor is representable as normalised + fp32 number (s in [2**-126,2**26]), and scale m down accordingly. */ + float s = asfloat (asuint (4.0f) - k); + m_scale = m_scale + fmaf (0.25f, s, -1.0f); + + float p = eval_poly (m_scale, biased_exponent (asuint (m_scale))); + + /* The scale factor to be applied back at the end - by multiplying float(k) + by 2^-23 we get the unbiased exponent of k. */ + float scale_back = (float) k * 0x1.0p-23f; + + /* Apply the scaling back. */ + return fmaf (scale_back, Ln2, p); +} + +PL_SIG (S, F, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (log1pf, 1.52) +PL_TEST_SYM_INTERVAL (log1pf, 0.0, 0x1p-23, 50000) +PL_TEST_SYM_INTERVAL (log1pf, 0x1p-23, 0.001, 50000) +PL_TEST_SYM_INTERVAL (log1pf, 0.001, 1.0, 50000) +PL_TEST_SYM_INTERVAL (log1pf, 1.0, inf, 5000) diff --git a/contrib/arm-optimized-routines/pl/math/log1pf_data.c b/contrib/arm-optimized-routines/pl/math/log1pf_data.c new file mode 100644 index 000000000000..8c92d5738fe8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log1pf_data.c @@ -0,0 +1,14 @@ +/* + * Data used in single-precision log1p(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "math_config.h" + +/* Polynomial coefficients generated using floating-point minimax + algorithm, see tools/log1pf.sollya for details. */ +const struct log1pf_data __log1pf_data + = {.coeffs = {-0x1p-1f, 0x1.5555aap-2f, -0x1.000038p-2f, 0x1.99675cp-3f, + -0x1.54ef78p-3f, 0x1.28a1f4p-3f, -0x1.0da91p-3f, 0x1.abcb6p-4f, + -0x1.6f0d5ep-5f}}; diff --git a/contrib/arm-optimized-routines/pl/math/log_data.c b/contrib/arm-optimized-routines/pl/math/log_data.c new file mode 100644 index 000000000000..34715e5036a3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/log_data.c @@ -0,0 +1,511 @@ +/* + * Data for log. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << LOG_TABLE_BITS) + +const struct log_data __log_data = { +.ln2hi = 0x1.62e42fefa3800p-1, +.ln2lo = 0x1.ef35793c76730p-45, +.poly1 = { +#if LOG_POLY1_ORDER == 10 +// relative error: 0x1.32eccc6p-62 +// in -0x1p-5 0x1.1p-5 (|log(1+x)| > 0x1p-5 outside this interval) +-0x1p-1, +0x1.55555555554e5p-2, +-0x1.0000000000af2p-2, +0x1.9999999bbe436p-3, +-0x1.55555537f9cdep-3, +0x1.24922fc8127cfp-3, +-0x1.0000b7d6bb612p-3, +0x1.c806ee1ddbcafp-4, +-0x1.972335a9c2d6ep-4, +#elif LOG_POLY1_ORDER == 11 +// relative error: 0x1.52c8b708p-68 +// in -0x1p-5 0x1.1p-5 (|log(1+x)| > 0x1p-5 outside this interval) +-0x1p-1, +0x1.5555555555555p-2, +-0x1.ffffffffffea9p-3, +0x1.999999999c4d4p-3, +-0x1.55555557f5541p-3, +0x1.249248fbe33e4p-3, +-0x1.ffffc9a3c825bp-4, +0x1.c71e1f204435dp-4, +-0x1.9a7f26377d06ep-4, +0x1.71c30cf8f7364p-4, +#elif LOG_POLY1_ORDER == 12 +// relative error: 0x1.c04d76cp-63 +// in -0x1p-4 0x1.09p-4 (|log(1+x)| > 0x1p-4 outside the interval) +-0x1p-1, +0x1.5555555555577p-2, +-0x1.ffffffffffdcbp-3, +0x1.999999995dd0cp-3, +-0x1.55555556745a7p-3, +0x1.24924a344de3p-3, +-0x1.fffffa4423d65p-4, +0x1.c7184282ad6cap-4, +-0x1.999eb43b068ffp-4, +0x1.78182f7afd085p-4, +-0x1.5521375d145cdp-4, +#endif +}, +.poly = { +#if N == 64 && LOG_POLY_ORDER == 7 +// relative error: 0x1.906eb8ap-58 +// abs error: 0x1.d2cad5a8p-67 +// in -0x1.fp-8 0x1.fp-8 +-0x1.0000000000027p-1, +0x1.555555555556ap-2, +-0x1.fffffff0440bap-3, +0x1.99999991906c3p-3, +-0x1.555c8d7e8201ep-3, +0x1.24978c59151fap-3, +#elif N == 128 && LOG_POLY_ORDER == 6 +// relative error: 0x1.926199e8p-56 +// abs error: 0x1.882ff33p-65 +// in -0x1.fp-9 0x1.fp-9 +-0x1.0000000000001p-1, +0x1.555555551305bp-2, +-0x1.fffffffeb459p-3, +0x1.999b324f10111p-3, +-0x1.55575e506c89fp-3, +#elif N == 128 && LOG_POLY_ORDER == 7 +// relative error: 0x1.649fc4bp-64 +// abs error: 0x1.c3b5769p-74 +// in -0x1.fp-9 0x1.fp-9 +-0x1.0000000000001p-1, +0x1.5555555555556p-2, +-0x1.fffffffea1a8p-3, +0x1.99999998e9139p-3, +-0x1.555776801b968p-3, +0x1.2493c29331a5cp-3, +#endif +}, +/* Algorithm: + + x = 2^k z + log(x) = k ln2 + log(c) + log(z/c) + log(z/c) = poly(z/c - 1) + +where z is in [1.6p-1; 1.6p0] which is split into N subintervals and z falls +into the ith one, then table entries are computed as + + tab[i].invc = 1/c + tab[i].logc = (double)log(c) + tab2[i].chi = (double)c + tab2[i].clo = (double)(c - (double)c) + +where c is near the center of the subinterval and is chosen by trying +-2^29 +floating point invc candidates around 1/center and selecting one for which + + 1) the rounding error in 0x1.8p9 + logc is 0, + 2) the rounding error in z - chi - clo is < 0x1p-66 and + 3) the rounding error in (double)log(c) is minimized (< 0x1p-66). + +Note: 1) ensures that k*ln2hi + logc can be computed without rounding error, +2) ensures that z/c - 1 can be computed as (z - chi - clo)*invc with close to +a single rounding error when there is no fast fma for z*invc - 1, 3) ensures +that logc + poly(z/c - 1) has small error, however near x == 1 when +|log(x)| < 0x1p-4, this is not enough so that is special cased. */ +.tab = { +#if N == 64 +{0x1.7242886495cd8p+0, -0x1.79e267bdfe000p-2}, +{0x1.6e1f769340dc9p+0, -0x1.6e60ee0ecb000p-2}, +{0x1.6a13ccc8f195cp+0, -0x1.63002fdbf6000p-2}, +{0x1.661ec72e86f3ap+0, -0x1.57bf76c597000p-2}, +{0x1.623fa6c447b16p+0, -0x1.4c9e07f0d2000p-2}, +{0x1.5e75bbca31702p+0, -0x1.419b42f027000p-2}, +{0x1.5ac05655adb10p+0, -0x1.36b67660e6000p-2}, +{0x1.571ed3e940191p+0, -0x1.2bef0839e4800p-2}, +{0x1.539094ac0fbbfp+0, -0x1.21445727cb000p-2}, +{0x1.5015007e7fc42p+0, -0x1.16b5ca3c3d000p-2}, +{0x1.4cab877c31cf9p+0, -0x1.0c42d3805f800p-2}, +{0x1.49539e76a88d3p+0, -0x1.01eae61b60800p-2}, +{0x1.460cbc12211dap+0, -0x1.ef5adb9fb0000p-3}, +{0x1.42d6624debe3ap+0, -0x1.db13daab99000p-3}, +{0x1.3fb0144f0d462p+0, -0x1.c6ffbe896e000p-3}, +{0x1.3c995a1f9a9b4p+0, -0x1.b31d84722d000p-3}, +{0x1.3991c23952500p+0, -0x1.9f6c3cf6eb000p-3}, +{0x1.3698df35eaa14p+0, -0x1.8beafe7f13000p-3}, +{0x1.33ae463091760p+0, -0x1.7898db878d000p-3}, +{0x1.30d190aae3d72p+0, -0x1.6574efe4ec000p-3}, +{0x1.2e025c9203c89p+0, -0x1.527e620845000p-3}, +{0x1.2b404a7244988p+0, -0x1.3fb457d798000p-3}, +{0x1.288b01dc19544p+0, -0x1.2d1615a077000p-3}, +{0x1.25e2268085f69p+0, -0x1.1aa2b431e5000p-3}, +{0x1.23456812abb74p+0, -0x1.08598f1d2b000p-3}, +{0x1.20b4703174157p+0, -0x1.ec738fee40000p-4}, +{0x1.1e2ef308b4e9bp+0, -0x1.c885768862000p-4}, +{0x1.1bb4a36b70a3fp+0, -0x1.a4e75b6a46000p-4}, +{0x1.194538e960658p+0, -0x1.8197efba9a000p-4}, +{0x1.16e0692a10ac8p+0, -0x1.5e95ad734e000p-4}, +{0x1.1485f1ba1568bp+0, -0x1.3bdf67117c000p-4}, +{0x1.12358e123ed6fp+0, -0x1.1973b744f0000p-4}, +{0x1.0fef01de37c8dp+0, -0x1.eea33446bc000p-5}, +{0x1.0db20b82be414p+0, -0x1.aaef4ab304000p-5}, +{0x1.0b7e6f67f69b3p+0, -0x1.67c962fd2c000p-5}, +{0x1.0953f342fc108p+0, -0x1.252f29acf8000p-5}, +{0x1.0732604ec956bp+0, -0x1.c63d19e9c0000p-6}, +{0x1.051980117f9b0p+0, -0x1.432ab6a388000p-6}, +{0x1.03091aa6810f1p+0, -0x1.8244357f50000p-7}, +{0x1.01010152cf066p+0, -0x1.0080a711c0000p-8}, +{0x1.fc07ef6b6e30bp-1, 0x1.fe03018e80000p-8}, +{0x1.f4465aa1024afp-1, 0x1.7b91986450000p-6}, +{0x1.ecc07a8fd3f5ep-1, 0x1.39e88608c8000p-5}, +{0x1.e573ad856b537p-1, 0x1.b42dc6e624000p-5}, +{0x1.de5d6dc7b8057p-1, 0x1.165372ec20000p-4}, +{0x1.d77b6498bddf7p-1, 0x1.51b07a0170000p-4}, +{0x1.d0cb580315c0fp-1, 0x1.8c3465c7ea000p-4}, +{0x1.ca4b30d1cf449p-1, 0x1.c5e544a290000p-4}, +{0x1.c3f8ef4810d8ep-1, 0x1.fec91aa0a6000p-4}, +{0x1.bdd2b8b311f44p-1, 0x1.1b72acdc5c000p-3}, +{0x1.b7d6c2eeac054p-1, 0x1.371fc65a98000p-3}, +{0x1.b20363474c8f5p-1, 0x1.526e61c1aa000p-3}, +{0x1.ac570165eeab1p-1, 0x1.6d60ffc240000p-3}, +{0x1.a6d019f331df4p-1, 0x1.87fa08a013000p-3}, +{0x1.a16d3ebc9e3c3p-1, 0x1.a23bc630c3000p-3}, +{0x1.9c2d14567ef45p-1, 0x1.bc286a3512000p-3}, +{0x1.970e4efae9169p-1, 0x1.d5c2195697000p-3}, +{0x1.920fb3bd0b802p-1, 0x1.ef0ae132d3000p-3}, +{0x1.8d3018b58699ap-1, 0x1.040259974e000p-2}, +{0x1.886e5ff170ee6p-1, 0x1.1058bd40e2000p-2}, +{0x1.83c977ad35d27p-1, 0x1.1c898c1137800p-2}, +{0x1.7f405ed16c520p-1, 0x1.2895a3e65b000p-2}, +{0x1.7ad220d0335c4p-1, 0x1.347dd8f6bd000p-2}, +{0x1.767dce53474fdp-1, 0x1.4043083cb3800p-2}, +#elif N == 128 +{0x1.734f0c3e0de9fp+0, -0x1.7cc7f79e69000p-2}, +{0x1.713786a2ce91fp+0, -0x1.76feec20d0000p-2}, +{0x1.6f26008fab5a0p+0, -0x1.713e31351e000p-2}, +{0x1.6d1a61f138c7dp+0, -0x1.6b85b38287800p-2}, +{0x1.6b1490bc5b4d1p+0, -0x1.65d5590807800p-2}, +{0x1.69147332f0cbap+0, -0x1.602d076180000p-2}, +{0x1.6719f18224223p+0, -0x1.5a8ca86909000p-2}, +{0x1.6524f99a51ed9p+0, -0x1.54f4356035000p-2}, +{0x1.63356aa8f24c4p+0, -0x1.4f637c36b4000p-2}, +{0x1.614b36b9ddc14p+0, -0x1.49da7fda85000p-2}, +{0x1.5f66452c65c4cp+0, -0x1.445923989a800p-2}, +{0x1.5d867b5912c4fp+0, -0x1.3edf439b0b800p-2}, +{0x1.5babccb5b90dep+0, -0x1.396ce448f7000p-2}, +{0x1.59d61f2d91a78p+0, -0x1.3401e17bda000p-2}, +{0x1.5805612465687p+0, -0x1.2e9e2ef468000p-2}, +{0x1.56397cee76bd3p+0, -0x1.2941b3830e000p-2}, +{0x1.54725e2a77f93p+0, -0x1.23ec58cda8800p-2}, +{0x1.52aff42064583p+0, -0x1.1e9e129279000p-2}, +{0x1.50f22dbb2bddfp+0, -0x1.1956d2b48f800p-2}, +{0x1.4f38f4734ded7p+0, -0x1.141679ab9f800p-2}, +{0x1.4d843cfde2840p+0, -0x1.0edd094ef9800p-2}, +{0x1.4bd3ec078a3c8p+0, -0x1.09aa518db1000p-2}, +{0x1.4a27fc3e0258ap+0, -0x1.047e65263b800p-2}, +{0x1.4880524d48434p+0, -0x1.feb224586f000p-3}, +{0x1.46dce1b192d0bp+0, -0x1.f474a7517b000p-3}, +{0x1.453d9d3391854p+0, -0x1.ea4443d103000p-3}, +{0x1.43a2744b4845ap+0, -0x1.e020d44e9b000p-3}, +{0x1.420b54115f8fbp+0, -0x1.d60a22977f000p-3}, +{0x1.40782da3ef4b1p+0, -0x1.cc00104959000p-3}, +{0x1.3ee8f5d57fe8fp+0, -0x1.c202956891000p-3}, +{0x1.3d5d9a00b4ce9p+0, -0x1.b81178d811000p-3}, +{0x1.3bd60c010c12bp+0, -0x1.ae2c9ccd3d000p-3}, +{0x1.3a5242b75dab8p+0, -0x1.a45402e129000p-3}, +{0x1.38d22cd9fd002p+0, -0x1.9a877681df000p-3}, +{0x1.3755bc5847a1cp+0, -0x1.90c6d69483000p-3}, +{0x1.35dce49ad36e2p+0, -0x1.87120a645c000p-3}, +{0x1.34679984dd440p+0, -0x1.7d68fb4143000p-3}, +{0x1.32f5cceffcb24p+0, -0x1.73cb83c627000p-3}, +{0x1.3187775a10d49p+0, -0x1.6a39a9b376000p-3}, +{0x1.301c8373e3990p+0, -0x1.60b3154b7a000p-3}, +{0x1.2eb4ebb95f841p+0, -0x1.5737d76243000p-3}, +{0x1.2d50a0219a9d1p+0, -0x1.4dc7b8fc23000p-3}, +{0x1.2bef9a8b7fd2ap+0, -0x1.4462c51d20000p-3}, +{0x1.2a91c7a0c1babp+0, -0x1.3b08abc830000p-3}, +{0x1.293726014b530p+0, -0x1.31b996b490000p-3}, +{0x1.27dfa5757a1f5p+0, -0x1.2875490a44000p-3}, +{0x1.268b39b1d3bbfp+0, -0x1.1f3b9f879a000p-3}, +{0x1.2539d838ff5bdp+0, -0x1.160c8252ca000p-3}, +{0x1.23eb7aac9083bp+0, -0x1.0ce7f57f72000p-3}, +{0x1.22a012ba940b6p+0, -0x1.03cdc49fea000p-3}, +{0x1.2157996cc4132p+0, -0x1.f57bdbc4b8000p-4}, +{0x1.201201dd2fc9bp+0, -0x1.e370896404000p-4}, +{0x1.1ecf4494d480bp+0, -0x1.d17983ef94000p-4}, +{0x1.1d8f5528f6569p+0, -0x1.bf9674ed8a000p-4}, +{0x1.1c52311577e7cp+0, -0x1.adc79202f6000p-4}, +{0x1.1b17c74cb26e9p+0, -0x1.9c0c3e7288000p-4}, +{0x1.19e010c2c1ab6p+0, -0x1.8a646b372c000p-4}, +{0x1.18ab07bb670bdp+0, -0x1.78d01b3ac0000p-4}, +{0x1.1778a25efbcb6p+0, -0x1.674f145380000p-4}, +{0x1.1648d354c31dap+0, -0x1.55e0e6d878000p-4}, +{0x1.151b990275fddp+0, -0x1.4485cdea1e000p-4}, +{0x1.13f0ea432d24cp+0, -0x1.333d94d6aa000p-4}, +{0x1.12c8b7210f9dap+0, -0x1.22079f8c56000p-4}, +{0x1.11a3028ecb531p+0, -0x1.10e4698622000p-4}, +{0x1.107fbda8434afp+0, -0x1.ffa6c6ad20000p-5}, +{0x1.0f5ee0f4e6bb3p+0, -0x1.dda8d4a774000p-5}, +{0x1.0e4065d2a9fcep+0, -0x1.bbcece4850000p-5}, +{0x1.0d244632ca521p+0, -0x1.9a1894012c000p-5}, +{0x1.0c0a77ce2981ap+0, -0x1.788583302c000p-5}, +{0x1.0af2f83c636d1p+0, -0x1.5715e67d68000p-5}, +{0x1.09ddb98a01339p+0, -0x1.35c8a49658000p-5}, +{0x1.08cabaf52e7dfp+0, -0x1.149e364154000p-5}, +{0x1.07b9f2f4e28fbp+0, -0x1.e72c082eb8000p-6}, +{0x1.06ab58c358f19p+0, -0x1.a55f152528000p-6}, +{0x1.059eea5ecf92cp+0, -0x1.63d62cf818000p-6}, +{0x1.04949cdd12c90p+0, -0x1.228fb8caa0000p-6}, +{0x1.038c6c6f0ada9p+0, -0x1.c317b20f90000p-7}, +{0x1.02865137932a9p+0, -0x1.419355daa0000p-7}, +{0x1.0182427ea7348p+0, -0x1.81203c2ec0000p-8}, +{0x1.008040614b195p+0, -0x1.0040979240000p-9}, +{0x1.fe01ff726fa1ap-1, 0x1.feff384900000p-9}, +{0x1.fa11cc261ea74p-1, 0x1.7dc41353d0000p-7}, +{0x1.f6310b081992ep-1, 0x1.3cea3c4c28000p-6}, +{0x1.f25f63ceeadcdp-1, 0x1.b9fc114890000p-6}, +{0x1.ee9c8039113e7p-1, 0x1.1b0d8ce110000p-5}, +{0x1.eae8078cbb1abp-1, 0x1.58a5bd001c000p-5}, +{0x1.e741aa29d0c9bp-1, 0x1.95c8340d88000p-5}, +{0x1.e3a91830a99b5p-1, 0x1.d276aef578000p-5}, +{0x1.e01e009609a56p-1, 0x1.07598e598c000p-4}, +{0x1.dca01e577bb98p-1, 0x1.253f5e30d2000p-4}, +{0x1.d92f20b7c9103p-1, 0x1.42edd8b380000p-4}, +{0x1.d5cac66fb5ccep-1, 0x1.606598757c000p-4}, +{0x1.d272caa5ede9dp-1, 0x1.7da76356a0000p-4}, +{0x1.cf26e3e6b2ccdp-1, 0x1.9ab434e1c6000p-4}, +{0x1.cbe6da2a77902p-1, 0x1.b78c7bb0d6000p-4}, +{0x1.c8b266d37086dp-1, 0x1.d431332e72000p-4}, +{0x1.c5894bd5d5804p-1, 0x1.f0a3171de6000p-4}, +{0x1.c26b533bb9f8cp-1, 0x1.067152b914000p-3}, +{0x1.bf583eeece73fp-1, 0x1.147858292b000p-3}, +{0x1.bc4fd75db96c1p-1, 0x1.2266ecdca3000p-3}, +{0x1.b951e0c864a28p-1, 0x1.303d7a6c55000p-3}, +{0x1.b65e2c5ef3e2cp-1, 0x1.3dfc33c331000p-3}, +{0x1.b374867c9888bp-1, 0x1.4ba366b7a8000p-3}, +{0x1.b094b211d304ap-1, 0x1.5933928d1f000p-3}, +{0x1.adbe885f2ef7ep-1, 0x1.66acd2418f000p-3}, +{0x1.aaf1d31603da2p-1, 0x1.740f8ec669000p-3}, +{0x1.a82e63fd358a7p-1, 0x1.815c0f51af000p-3}, +{0x1.a5740ef09738bp-1, 0x1.8e92954f68000p-3}, +{0x1.a2c2a90ab4b27p-1, 0x1.9bb3602f84000p-3}, +{0x1.a01a01393f2d1p-1, 0x1.a8bed1c2c0000p-3}, +{0x1.9d79f24db3c1bp-1, 0x1.b5b515c01d000p-3}, +{0x1.9ae2505c7b190p-1, 0x1.c2967ccbcc000p-3}, +{0x1.9852ef297ce2fp-1, 0x1.cf635d5486000p-3}, +{0x1.95cbaeea44b75p-1, 0x1.dc1bd3446c000p-3}, +{0x1.934c69de74838p-1, 0x1.e8c01b8cfe000p-3}, +{0x1.90d4f2f6752e6p-1, 0x1.f5509c0179000p-3}, +{0x1.8e6528effd79dp-1, 0x1.00e6c121fb800p-2}, +{0x1.8bfce9fcc007cp-1, 0x1.071b80e93d000p-2}, +{0x1.899c0dabec30ep-1, 0x1.0d46b9e867000p-2}, +{0x1.87427aa2317fbp-1, 0x1.13687334bd000p-2}, +{0x1.84f00acb39a08p-1, 0x1.1980d67234800p-2}, +{0x1.82a49e8653e55p-1, 0x1.1f8ffe0cc8000p-2}, +{0x1.8060195f40260p-1, 0x1.2595fd7636800p-2}, +{0x1.7e22563e0a329p-1, 0x1.2b9300914a800p-2}, +{0x1.7beb377dcb5adp-1, 0x1.3187210436000p-2}, +{0x1.79baa679725c2p-1, 0x1.377266dec1800p-2}, +{0x1.77907f2170657p-1, 0x1.3d54ffbaf3000p-2}, +{0x1.756cadbd6130cp-1, 0x1.432eee32fe000p-2}, +#endif +}, +#if !HAVE_FAST_FMA +.tab2 = { +#if N == 64 +{0x1.61ffff94c4fecp-1, -0x1.9fe4fc998f325p-56}, +{0x1.66000020377ddp-1, 0x1.e804c7a9519f2p-55}, +{0x1.6a00004c41678p-1, 0x1.902c675d9ecfep-55}, +{0x1.6dffff7384f87p-1, -0x1.2fd6b95e55043p-56}, +{0x1.720000b37216ep-1, 0x1.802bc8d437043p-55}, +{0x1.75ffffbeb3c9dp-1, 0x1.6047ad0a0d4e4p-57}, +{0x1.7a0000628daep-1, -0x1.e00434b49313dp-56}, +{0x1.7dffffd7abd1ap-1, -0x1.6015f8a083576p-56}, +{0x1.81ffffdf40c54p-1, 0x1.7f54bf76a42c9p-57}, +{0x1.860000f334e11p-1, 0x1.60054cb5344d7p-56}, +{0x1.8a0001238aca7p-1, 0x1.c03c9bd132f55p-57}, +{0x1.8dffffb81d212p-1, -0x1.001e519f2764fp-55}, +{0x1.92000086adc7cp-1, 0x1.1fe40f88f49c6p-55}, +{0x1.960000135d8eap-1, -0x1.f832268dc3095p-55}, +{0x1.99ffff9435acp-1, 0x1.7031d8b835edcp-56}, +{0x1.9e00003478565p-1, -0x1.0030b221ce3eep-58}, +{0x1.a20000b592948p-1, 0x1.8fd2f1dbd4639p-55}, +{0x1.a600000ad0bcfp-1, 0x1.901d6a974e6bep-55}, +{0x1.a9ffff55953a5p-1, 0x1.a07556192db98p-57}, +{0x1.adffff29ce03dp-1, -0x1.fff0717ec71c2p-56}, +{0x1.b1ffff34f3ac8p-1, 0x1.8005573de89d1p-57}, +{0x1.b60000894c55bp-1, -0x1.ff2fb51b044c7p-57}, +{0x1.b9fffef45ec7dp-1, -0x1.9ff7c4e8730fp-56}, +{0x1.be0000cda7b2ap-1, 0x1.57d058dbf3c1dp-55}, +{0x1.c1ffff2c57917p-1, 0x1.7e66d7e48dbc9p-58}, +{0x1.c60000ea5b82ap-1, -0x1.47f5e132ed4bep-55}, +{0x1.ca0001121ae98p-1, -0x1.40958c8d5e00ap-58}, +{0x1.ce0000f9241cbp-1, -0x1.7da063caa81c8p-59}, +{0x1.d1fffe8be95a4p-1, -0x1.82e3a411afcd9p-59}, +{0x1.d5ffff035932bp-1, -0x1.00f901b3fe87dp-58}, +{0x1.d9fffe8b54ba7p-1, 0x1.ffef55d6e3a4p-55}, +{0x1.de0000ad95d19p-1, 0x1.5feb2efd4c7c7p-55}, +{0x1.e1fffe925ce47p-1, 0x1.c8085484eaf08p-55}, +{0x1.e5fffe3ddf853p-1, -0x1.fd5ed02c5cadp-60}, +{0x1.e9fffed0a0e5fp-1, -0x1.a80aaef411586p-55}, +{0x1.ee00008f82eep-1, -0x1.b000aeaf97276p-55}, +{0x1.f20000a22d2f4p-1, -0x1.8f8906e13eba3p-56}, +{0x1.f5fffee35b57dp-1, 0x1.1fdd33b2d3714p-57}, +{0x1.fa00014eec3a6p-1, -0x1.3ee0b7a18c1a5p-58}, +{0x1.fdffff5daa89fp-1, -0x1.c1e24c8e3b503p-58}, +{0x1.0200005b93349p+0, -0x1.50197fe6bedcap-54}, +{0x1.05ffff9d597acp+0, 0x1.20160d062d0dcp-55}, +{0x1.0a00005687a63p+0, -0x1.27f3f9307696ep-54}, +{0x1.0dffff779164ep+0, 0x1.b7eb40bb9c4f4p-54}, +{0x1.12000044a0aa8p+0, 0x1.efbc914d512c4p-55}, +{0x1.16000069685bcp+0, -0x1.c0bea3eb2d82cp-57}, +{0x1.1a000093f0d78p+0, 0x1.1fecbf1e8c52p-54}, +{0x1.1dffffb2b1457p+0, -0x1.3fc91365637d6p-55}, +{0x1.2200008824a1p+0, -0x1.dff7e9feb578ap-54}, +{0x1.25ffffeef953p+0, -0x1.b00a61ec912f7p-55}, +{0x1.2a0000a1e7783p+0, 0x1.60048318b0483p-56}, +{0x1.2e0000853d4c7p+0, -0x1.77fbedf2c8cf3p-54}, +{0x1.320000324c55bp+0, 0x1.f81983997354fp-54}, +{0x1.360000594f796p+0, -0x1.cfe4beff900a9p-54}, +{0x1.3a0000a4c1c0fp+0, 0x1.07dbb2e268d0ep-54}, +{0x1.3e0000751c61bp+0, 0x1.80583ed1c566ep-56}, +{0x1.42000069e8a9fp+0, 0x1.f01f1edf82045p-54}, +{0x1.460000b5a1e34p+0, -0x1.dfdf0cf45c14ap-55}, +{0x1.4a0000187e513p+0, 0x1.401306b83a98dp-55}, +{0x1.4dffff3ba420bp+0, 0x1.9fc6539a6454ep-56}, +{0x1.51fffffe391c9p+0, -0x1.601ef3353ac83p-54}, +{0x1.560000e342455p+0, 0x1.3fb7fac8ac151p-55}, +{0x1.59ffffc39676fp+0, 0x1.4fe7dd6659cc2p-55}, +{0x1.5dfffff10ef42p+0, -0x1.48154cb592bcbp-54}, +#elif N == 128 +{0x1.61000014fb66bp-1, 0x1.e026c91425b3cp-56}, +{0x1.63000034db495p-1, 0x1.dbfea48005d41p-55}, +{0x1.650000d94d478p-1, 0x1.e7fa786d6a5b7p-55}, +{0x1.67000074e6fadp-1, 0x1.1fcea6b54254cp-57}, +{0x1.68ffffedf0faep-1, -0x1.c7e274c590efdp-56}, +{0x1.6b0000763c5bcp-1, -0x1.ac16848dcda01p-55}, +{0x1.6d0001e5cc1f6p-1, 0x1.33f1c9d499311p-55}, +{0x1.6efffeb05f63ep-1, -0x1.e80041ae22d53p-56}, +{0x1.710000e86978p-1, 0x1.bff6671097952p-56}, +{0x1.72ffffc67e912p-1, 0x1.c00e226bd8724p-55}, +{0x1.74fffdf81116ap-1, -0x1.e02916ef101d2p-57}, +{0x1.770000f679c9p-1, -0x1.7fc71cd549c74p-57}, +{0x1.78ffffa7ec835p-1, 0x1.1bec19ef50483p-55}, +{0x1.7affffe20c2e6p-1, -0x1.07e1729cc6465p-56}, +{0x1.7cfffed3fc9p-1, -0x1.08072087b8b1cp-55}, +{0x1.7efffe9261a76p-1, 0x1.dc0286d9df9aep-55}, +{0x1.81000049ca3e8p-1, 0x1.97fd251e54c33p-55}, +{0x1.8300017932c8fp-1, -0x1.afee9b630f381p-55}, +{0x1.850000633739cp-1, 0x1.9bfbf6b6535bcp-55}, +{0x1.87000204289c6p-1, -0x1.bbf65f3117b75p-55}, +{0x1.88fffebf57904p-1, -0x1.9006ea23dcb57p-55}, +{0x1.8b00022bc04dfp-1, -0x1.d00df38e04b0ap-56}, +{0x1.8cfffe50c1b8ap-1, -0x1.8007146ff9f05p-55}, +{0x1.8effffc918e43p-1, 0x1.3817bd07a7038p-55}, +{0x1.910001efa5fc7p-1, 0x1.93e9176dfb403p-55}, +{0x1.9300013467bb9p-1, 0x1.f804e4b980276p-56}, +{0x1.94fffe6ee076fp-1, -0x1.f7ef0d9ff622ep-55}, +{0x1.96fffde3c12d1p-1, -0x1.082aa962638bap-56}, +{0x1.98ffff4458a0dp-1, -0x1.7801b9164a8efp-55}, +{0x1.9afffdd982e3ep-1, -0x1.740e08a5a9337p-55}, +{0x1.9cfffed49fb66p-1, 0x1.fce08c19bep-60}, +{0x1.9f00020f19c51p-1, -0x1.a3faa27885b0ap-55}, +{0x1.a10001145b006p-1, 0x1.4ff489958da56p-56}, +{0x1.a300007bbf6fap-1, 0x1.cbeab8a2b6d18p-55}, +{0x1.a500010971d79p-1, 0x1.8fecadd78793p-55}, +{0x1.a70001df52e48p-1, -0x1.f41763dd8abdbp-55}, +{0x1.a90001c593352p-1, -0x1.ebf0284c27612p-55}, +{0x1.ab0002a4f3e4bp-1, -0x1.9fd043cff3f5fp-57}, +{0x1.acfffd7ae1ed1p-1, -0x1.23ee7129070b4p-55}, +{0x1.aefffee510478p-1, 0x1.a063ee00edea3p-57}, +{0x1.b0fffdb650d5bp-1, 0x1.a06c8381f0ab9p-58}, +{0x1.b2ffffeaaca57p-1, -0x1.9011e74233c1dp-56}, +{0x1.b4fffd995badcp-1, -0x1.9ff1068862a9fp-56}, +{0x1.b7000249e659cp-1, 0x1.aff45d0864f3ep-55}, +{0x1.b8ffff987164p-1, 0x1.cfe7796c2c3f9p-56}, +{0x1.bafffd204cb4fp-1, -0x1.3ff27eef22bc4p-57}, +{0x1.bcfffd2415c45p-1, -0x1.cffb7ee3bea21p-57}, +{0x1.beffff86309dfp-1, -0x1.14103972e0b5cp-55}, +{0x1.c0fffe1b57653p-1, 0x1.bc16494b76a19p-55}, +{0x1.c2ffff1fa57e3p-1, -0x1.4feef8d30c6edp-57}, +{0x1.c4fffdcbfe424p-1, -0x1.43f68bcec4775p-55}, +{0x1.c6fffed54b9f7p-1, 0x1.47ea3f053e0ecp-55}, +{0x1.c8fffeb998fd5p-1, 0x1.383068df992f1p-56}, +{0x1.cb0002125219ap-1, -0x1.8fd8e64180e04p-57}, +{0x1.ccfffdd94469cp-1, 0x1.e7ebe1cc7ea72p-55}, +{0x1.cefffeafdc476p-1, 0x1.ebe39ad9f88fep-55}, +{0x1.d1000169af82bp-1, 0x1.57d91a8b95a71p-56}, +{0x1.d30000d0ff71dp-1, 0x1.9c1906970c7dap-55}, +{0x1.d4fffea790fc4p-1, -0x1.80e37c558fe0cp-58}, +{0x1.d70002edc87e5p-1, -0x1.f80d64dc10f44p-56}, +{0x1.d900021dc82aap-1, -0x1.47c8f94fd5c5cp-56}, +{0x1.dafffd86b0283p-1, 0x1.c7f1dc521617ep-55}, +{0x1.dd000296c4739p-1, 0x1.8019eb2ffb153p-55}, +{0x1.defffe54490f5p-1, 0x1.e00d2c652cc89p-57}, +{0x1.e0fffcdabf694p-1, -0x1.f8340202d69d2p-56}, +{0x1.e2fffdb52c8ddp-1, 0x1.b00c1ca1b0864p-56}, +{0x1.e4ffff24216efp-1, 0x1.2ffa8b094ab51p-56}, +{0x1.e6fffe88a5e11p-1, -0x1.7f673b1efbe59p-58}, +{0x1.e9000119eff0dp-1, -0x1.4808d5e0bc801p-55}, +{0x1.eafffdfa51744p-1, 0x1.80006d54320b5p-56}, +{0x1.ed0001a127fa1p-1, -0x1.002f860565c92p-58}, +{0x1.ef00007babcc4p-1, -0x1.540445d35e611p-55}, +{0x1.f0ffff57a8d02p-1, -0x1.ffb3139ef9105p-59}, +{0x1.f30001ee58ac7p-1, 0x1.a81acf2731155p-55}, +{0x1.f4ffff5823494p-1, 0x1.a3f41d4d7c743p-55}, +{0x1.f6ffffca94c6bp-1, -0x1.202f41c987875p-57}, +{0x1.f8fffe1f9c441p-1, 0x1.77dd1f477e74bp-56}, +{0x1.fafffd2e0e37ep-1, -0x1.f01199a7ca331p-57}, +{0x1.fd0001c77e49ep-1, 0x1.181ee4bceacb1p-56}, +{0x1.feffff7e0c331p-1, -0x1.e05370170875ap-57}, +{0x1.00ffff465606ep+0, -0x1.a7ead491c0adap-55}, +{0x1.02ffff3867a58p+0, -0x1.77f69c3fcb2ep-54}, +{0x1.04ffffdfc0d17p+0, 0x1.7bffe34cb945bp-54}, +{0x1.0700003cd4d82p+0, 0x1.20083c0e456cbp-55}, +{0x1.08ffff9f2cbe8p+0, -0x1.dffdfbe37751ap-57}, +{0x1.0b000010cda65p+0, -0x1.13f7faee626ebp-54}, +{0x1.0d00001a4d338p+0, 0x1.07dfa79489ff7p-55}, +{0x1.0effffadafdfdp+0, -0x1.7040570d66bcp-56}, +{0x1.110000bbafd96p+0, 0x1.e80d4846d0b62p-55}, +{0x1.12ffffae5f45dp+0, 0x1.dbffa64fd36efp-54}, +{0x1.150000dd59ad9p+0, 0x1.a0077701250aep-54}, +{0x1.170000f21559ap+0, 0x1.dfdf9e2e3deeep-55}, +{0x1.18ffffc275426p+0, 0x1.10030dc3b7273p-54}, +{0x1.1b000123d3c59p+0, 0x1.97f7980030188p-54}, +{0x1.1cffff8299eb7p+0, -0x1.5f932ab9f8c67p-57}, +{0x1.1effff48ad4p+0, 0x1.37fbf9da75bebp-54}, +{0x1.210000c8b86a4p+0, 0x1.f806b91fd5b22p-54}, +{0x1.2300003854303p+0, 0x1.3ffc2eb9fbf33p-54}, +{0x1.24fffffbcf684p+0, 0x1.601e77e2e2e72p-56}, +{0x1.26ffff52921d9p+0, 0x1.ffcbb767f0c61p-56}, +{0x1.2900014933a3cp+0, -0x1.202ca3c02412bp-56}, +{0x1.2b00014556313p+0, -0x1.2808233f21f02p-54}, +{0x1.2cfffebfe523bp+0, -0x1.8ff7e384fdcf2p-55}, +{0x1.2f0000bb8ad96p+0, -0x1.5ff51503041c5p-55}, +{0x1.30ffffb7ae2afp+0, -0x1.10071885e289dp-55}, +{0x1.32ffffeac5f7fp+0, -0x1.1ff5d3fb7b715p-54}, +{0x1.350000ca66756p+0, 0x1.57f82228b82bdp-54}, +{0x1.3700011fbf721p+0, 0x1.000bac40dd5ccp-55}, +{0x1.38ffff9592fb9p+0, -0x1.43f9d2db2a751p-54}, +{0x1.3b00004ddd242p+0, 0x1.57f6b707638e1p-55}, +{0x1.3cffff5b2c957p+0, 0x1.a023a10bf1231p-56}, +{0x1.3efffeab0b418p+0, 0x1.87f6d66b152bp-54}, +{0x1.410001532aff4p+0, 0x1.7f8375f198524p-57}, +{0x1.4300017478b29p+0, 0x1.301e672dc5143p-55}, +{0x1.44fffe795b463p+0, 0x1.9ff69b8b2895ap-55}, +{0x1.46fffe80475ep+0, -0x1.5c0b19bc2f254p-54}, +{0x1.48fffef6fc1e7p+0, 0x1.b4009f23a2a72p-54}, +{0x1.4afffe5bea704p+0, -0x1.4ffb7bf0d7d45p-54}, +{0x1.4d000171027dep+0, -0x1.9c06471dc6a3dp-54}, +{0x1.4f0000ff03ee2p+0, 0x1.77f890b85531cp-54}, +{0x1.5100012dc4bd1p+0, 0x1.004657166a436p-57}, +{0x1.530001605277ap+0, -0x1.6bfcece233209p-54}, +{0x1.54fffecdb704cp+0, -0x1.902720505a1d7p-55}, +{0x1.56fffef5f54a9p+0, 0x1.bbfe60ec96412p-54}, +{0x1.5900017e61012p+0, 0x1.87ec581afef9p-55}, +{0x1.5b00003c93e92p+0, -0x1.f41080abf0ccp-54}, +{0x1.5d0001d4919bcp+0, -0x1.8812afb254729p-54}, +{0x1.5efffe7b87a89p+0, -0x1.47eb780ed6904p-54}, +#endif +}, +#endif /* !HAVE_FAST_FMA */ +}; diff --git a/contrib/arm-optimized-routines/pl/math/logf.c b/contrib/arm-optimized-routines/pl/math/logf.c new file mode 100644 index 000000000000..17a74ed6d28f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/logf.c @@ -0,0 +1,75 @@ +/* + * Single-precision log function. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include <math.h> +#include <stdint.h> +#include "math_config.h" + +/* +LOGF_TABLE_BITS = 4 +LOGF_POLY_ORDER = 4 + +ULP error: 0.818 (nearest rounding.) +Relative error: 1.957 * 2^-26 (before rounding.) +*/ + +#define T __logf_data.tab +#define A __logf_data.poly +#define Ln2 __logf_data.ln2 +#define N (1 << LOGF_TABLE_BITS) +#define OFF 0x3f330000 + +float +optr_aor_log_f32 (float x) +{ + /* double_t for better performance on targets with FLT_EVAL_METHOD==2. */ + double_t z, r, r2, y, y0, invc, logc; + uint32_t ix, iz, tmp; + int k, i; + + ix = asuint (x); +#if WANT_ROUNDING + /* Fix sign of zero with downward rounding when x==1. */ + if (unlikely (ix == 0x3f800000)) + return 0; +#endif + if (unlikely (ix - 0x00800000 >= 0x7f800000 - 0x00800000)) + { + /* x < 0x1p-126 or inf or nan. */ + if (ix * 2 == 0) + return __math_divzerof (1); + if (ix == 0x7f800000) /* log(inf) == inf. */ + return x; + if ((ix & 0x80000000) || ix * 2 >= 0xff000000) + return __math_invalidf (x); + /* x is subnormal, normalize it. */ + ix = asuint (x * 0x1p23f); + ix -= 23 << 23; + } + + /* x = 2^k z; where z is in range [OFF,2*OFF] and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = ix - OFF; + i = (tmp >> (23 - LOGF_TABLE_BITS)) % N; + k = (int32_t) tmp >> 23; /* arithmetic shift */ + iz = ix - (tmp & 0x1ff << 23); + invc = T[i].invc; + logc = T[i].logc; + z = (double_t) asfloat (iz); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2 */ + r = z * invc - 1; + y0 = logc + (double_t) k * Ln2; + + /* Pipelined polynomial evaluation to approximate log1p(r). */ + r2 = r * r; + y = A[1] * r + A[2]; + y = A[0] * r2 + y; + y = y * r2 + (y0 + r); + return eval_as_float (y); +} diff --git a/contrib/arm-optimized-routines/pl/math/logf_data.c b/contrib/arm-optimized-routines/pl/math/logf_data.c new file mode 100644 index 000000000000..97d9eb8d0097 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/logf_data.c @@ -0,0 +1,36 @@ +/* + * Data definition for logf and log10f. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct logf_data __logf_data = { + .tab = + { + {0x1.661ec79f8f3bep+0, -0x1.57bf7808caadep-2}, + {0x1.571ed4aaf883dp+0, -0x1.2bef0a7c06ddbp-2}, + {0x1.49539f0f010bp+0, -0x1.01eae7f513a67p-2}, + {0x1.3c995b0b80385p+0, -0x1.b31d8a68224e9p-3}, + {0x1.30d190c8864a5p+0, -0x1.6574f0ac07758p-3}, + {0x1.25e227b0b8eap+0, -0x1.1aa2bc79c81p-3}, + {0x1.1bb4a4a1a343fp+0, -0x1.a4e76ce8c0e5ep-4}, + {0x1.12358f08ae5bap+0, -0x1.1973c5a611cccp-4}, + {0x1.0953f419900a7p+0, -0x1.252f438e10c1ep-5}, + {0x1p+0, 0x0p+0}, + {0x1.e608cfd9a47acp-1, 0x1.aa5aa5df25984p-5}, + {0x1.ca4b31f026aap-1, 0x1.c5e53aa362eb4p-4}, + {0x1.b2036576afce6p-1, 0x1.526e57720db08p-3}, + {0x1.9c2d163a1aa2dp-1, 0x1.bc2860d22477p-3}, + {0x1.886e6037841edp-1, 0x1.1058bc8a07ee1p-2}, + {0x1.767dcf5534862p-1, 0x1.4043057b6ee09p-2}, + }, + .ln2 = 0x1.62e42fefa39efp-1, + .invln10 = 0x1.bcb7b1526e50ep-2, + .poly = { + -0x1.00ea348b88334p-2, + 0x1.5575b0be00b6ap-2, + -0x1.ffffef20a4123p-2, + }}; diff --git a/contrib/arm-optimized-routines/pl/math/math_config.h b/contrib/arm-optimized-routines/pl/math/math_config.h new file mode 100644 index 000000000000..c3dd8f2db8c7 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/math_config.h @@ -0,0 +1,624 @@ +/* + * Configuration for math routines. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef _MATH_CONFIG_H +#define _MATH_CONFIG_H + +#include <math.h> +#include <stdint.h> + +#ifndef WANT_ROUNDING +/* If defined to 1, return correct results for special cases in non-nearest + rounding modes (logf (1.0f) returns 0.0f with FE_DOWNWARD rather than + -0.0f). This may be set to 0 if there is no fenv support or if math + functions only get called in round to nearest mode. */ +# define WANT_ROUNDING 1 +#endif +#ifndef WANT_ERRNO +/* If defined to 1, set errno in math functions according to ISO C. Many math + libraries do not set errno, so this is 0 by default. It may need to be + set to 1 if math.h has (math_errhandling & MATH_ERRNO) != 0. */ +# define WANT_ERRNO 0 +#endif +#ifndef WANT_SIMD_EXCEPT +/* If defined to 1, trigger fp exceptions in vector routines, consistently with + behaviour expected from the corresponding scalar routine. */ +# define WANT_SIMD_EXCEPT 0 +#endif + +/* Compiler can inline round as a single instruction. */ +#ifndef HAVE_FAST_ROUND +# if __aarch64__ +# define HAVE_FAST_ROUND 1 +# else +# define HAVE_FAST_ROUND 0 +# endif +#endif + +/* Compiler can inline lround, but not (long)round(x). */ +#ifndef HAVE_FAST_LROUND +# if __aarch64__ && (100 * __GNUC__ + __GNUC_MINOR__) >= 408 \ + && __NO_MATH_ERRNO__ +# define HAVE_FAST_LROUND 1 +# else +# define HAVE_FAST_LROUND 0 +# endif +#endif + +/* Compiler can inline fma as a single instruction. */ +#ifndef HAVE_FAST_FMA +# if defined FP_FAST_FMA || __aarch64__ +# define HAVE_FAST_FMA 1 +# else +# define HAVE_FAST_FMA 0 +# endif +#endif + +/* Provide *_finite symbols and some of the glibc hidden symbols + so libmathlib can be used with binaries compiled against glibc + to interpose math functions with both static and dynamic linking. */ +#ifndef USE_GLIBC_ABI +# if __GNUC__ +# define USE_GLIBC_ABI 1 +# else +# define USE_GLIBC_ABI 0 +# endif +#endif + +/* Optionally used extensions. */ +#ifdef __GNUC__ +# define HIDDEN __attribute__ ((__visibility__ ("hidden"))) +# define NOINLINE __attribute__ ((noinline)) +# define UNUSED __attribute__ ((unused)) +# define likely(x) __builtin_expect (!!(x), 1) +# define unlikely(x) __builtin_expect (x, 0) +# if __GNUC__ >= 9 +# define attribute_copy(f) __attribute__ ((copy (f))) +# else +# define attribute_copy(f) +# endif +# define strong_alias(f, a) \ + extern __typeof (f) a __attribute__ ((alias (#f))) attribute_copy (f); +# define hidden_alias(f, a) \ + extern __typeof (f) a __attribute__ ((alias (#f), visibility ("hidden"))) \ + attribute_copy (f); +#else +# define HIDDEN +# define NOINLINE +# define UNUSED +# define likely(x) (x) +# define unlikely(x) (x) +#endif + +/* Return ptr but hide its value from the compiler so accesses through it + cannot be optimized based on the contents. */ +#define ptr_barrier(ptr) \ + ({ \ + __typeof (ptr) __ptr = (ptr); \ + __asm("" : "+r"(__ptr)); \ + __ptr; \ + }) + +/* Symbol renames to avoid libc conflicts. */ +#define __math_oflowf arm_math_oflowf +#define __math_uflowf arm_math_uflowf +#define __math_may_uflowf arm_math_may_uflowf +#define __math_divzerof arm_math_divzerof +#define __math_oflow arm_math_oflow +#define __math_uflow arm_math_uflow +#define __math_may_uflow arm_math_may_uflow +#define __math_divzero arm_math_divzero +#define __math_invalidf arm_math_invalidf +#define __math_invalid arm_math_invalid +#define __math_check_oflow arm_math_check_oflow +#define __math_check_uflow arm_math_check_uflow +#define __math_check_oflowf arm_math_check_oflowf +#define __math_check_uflowf arm_math_check_uflowf + +#if HAVE_FAST_ROUND +/* When set, the roundtoint and converttoint functions are provided with + the semantics documented below. */ +# define TOINT_INTRINSICS 1 + +/* Round x to nearest int in all rounding modes, ties have to be rounded + consistently with converttoint so the results match. If the result + would be outside of [-2^31, 2^31-1] then the semantics is unspecified. */ +static inline double_t +roundtoint (double_t x) +{ + return round (x); +} + +/* Convert x to nearest int in all rounding modes, ties have to be rounded + consistently with roundtoint. If the result is not representible in an + int32_t then the semantics is unspecified. */ +static inline int32_t +converttoint (double_t x) +{ +# if HAVE_FAST_LROUND + return lround (x); +# else + return (long) round (x); +# endif +} +#endif + +static inline uint32_t +asuint (float f) +{ + union + { + float f; + uint32_t i; + } u = { f }; + return u.i; +} + +static inline float +asfloat (uint32_t i) +{ + union + { + uint32_t i; + float f; + } u = { i }; + return u.f; +} + +static inline uint64_t +asuint64 (double f) +{ + union + { + double f; + uint64_t i; + } u = { f }; + return u.i; +} + +static inline double +asdouble (uint64_t i) +{ + union + { + uint64_t i; + double f; + } u = { i }; + return u.f; +} + +#ifndef IEEE_754_2008_SNAN +# define IEEE_754_2008_SNAN 1 +#endif +static inline int +issignalingf_inline (float x) +{ + uint32_t ix = asuint (x); + if (!IEEE_754_2008_SNAN) + return (ix & 0x7fc00000) == 0x7fc00000; + return 2 * (ix ^ 0x00400000) > 2u * 0x7fc00000; +} + +static inline int +issignaling_inline (double x) +{ + uint64_t ix = asuint64 (x); + if (!IEEE_754_2008_SNAN) + return (ix & 0x7ff8000000000000) == 0x7ff8000000000000; + return 2 * (ix ^ 0x0008000000000000) > 2 * 0x7ff8000000000000ULL; +} + +#if __aarch64__ && __GNUC__ +/* Prevent the optimization of a floating-point expression. */ +static inline float +opt_barrier_float (float x) +{ + __asm__ __volatile__ ("" : "+w" (x)); + return x; +} +static inline double +opt_barrier_double (double x) +{ + __asm__ __volatile__ ("" : "+w" (x)); + return x; +} +/* Force the evaluation of a floating-point expression for its side-effect. */ +static inline void +force_eval_float (float x) +{ + __asm__ __volatile__ ("" : "+w" (x)); +} +static inline void +force_eval_double (double x) +{ + __asm__ __volatile__ ("" : "+w" (x)); +} +#else +static inline float +opt_barrier_float (float x) +{ + volatile float y = x; + return y; +} +static inline double +opt_barrier_double (double x) +{ + volatile double y = x; + return y; +} +static inline void +force_eval_float (float x) +{ + volatile float y UNUSED = x; +} +static inline void +force_eval_double (double x) +{ + volatile double y UNUSED = x; +} +#endif + +/* Evaluate an expression as the specified type, normally a type + cast should be enough, but compilers implement non-standard + excess-precision handling, so when FLT_EVAL_METHOD != 0 then + these functions may need to be customized. */ +static inline float +eval_as_float (float x) +{ + return x; +} +static inline double +eval_as_double (double x) +{ + return x; +} + +/* Error handling tail calls for special cases, with a sign argument. + The sign of the return value is set if the argument is non-zero. */ + +/* The result overflows. */ +HIDDEN float __math_oflowf (uint32_t); +/* The result underflows to 0 in nearest rounding mode. */ +HIDDEN float __math_uflowf (uint32_t); +/* The result underflows to 0 in some directed rounding mode only. */ +HIDDEN float __math_may_uflowf (uint32_t); +/* Division by zero. */ +HIDDEN float __math_divzerof (uint32_t); +/* The result overflows. */ +HIDDEN double __math_oflow (uint32_t); +/* The result underflows to 0 in nearest rounding mode. */ +HIDDEN double __math_uflow (uint32_t); +/* The result underflows to 0 in some directed rounding mode only. */ +HIDDEN double __math_may_uflow (uint32_t); +/* Division by zero. */ +HIDDEN double __math_divzero (uint32_t); + +/* Error handling using input checking. */ + +/* Invalid input unless it is a quiet NaN. */ +HIDDEN float __math_invalidf (float); +/* Invalid input unless it is a quiet NaN. */ +HIDDEN double __math_invalid (double); + +/* Error handling using output checking, only for errno setting. */ + +/* Check if the result overflowed to infinity. */ +HIDDEN double __math_check_oflow (double); +/* Check if the result underflowed to 0. */ +HIDDEN double __math_check_uflow (double); + +/* Check if the result overflowed to infinity. */ +static inline double +check_oflow (double x) +{ + return WANT_ERRNO ? __math_check_oflow (x) : x; +} + +/* Check if the result underflowed to 0. */ +static inline double +check_uflow (double x) +{ + return WANT_ERRNO ? __math_check_uflow (x) : x; +} + +/* Check if the result overflowed to infinity. */ +HIDDEN float __math_check_oflowf (float); +/* Check if the result underflowed to 0. */ +HIDDEN float __math_check_uflowf (float); + +/* Check if the result overflowed to infinity. */ +static inline float +check_oflowf (float x) +{ + return WANT_ERRNO ? __math_check_oflowf (x) : x; +} + +/* Check if the result underflowed to 0. */ +static inline float +check_uflowf (float x) +{ + return WANT_ERRNO ? __math_check_uflowf (x) : x; +} + +extern const struct erff_data +{ + struct + { + float erf, scale; + } tab[513]; +} __erff_data HIDDEN; + +extern const struct sv_erff_data +{ + float erf[513]; + float scale[513]; +} __sv_erff_data HIDDEN; + +extern const struct erfcf_data +{ + struct + { + float erfc, scale; + } tab[645]; +} __erfcf_data HIDDEN; + +/* Data for logf and log10f. */ +#define LOGF_TABLE_BITS 4 +#define LOGF_POLY_ORDER 4 +extern const struct logf_data +{ + struct + { + double invc, logc; + } tab[1 << LOGF_TABLE_BITS]; + double ln2; + double invln10; + double poly[LOGF_POLY_ORDER - 1]; /* First order coefficient is 1. */ +} __logf_data HIDDEN; + +/* Data for low accuracy log10 (with 1/ln(10) included in coefficients). */ +#define LOG10_TABLE_BITS 7 +#define LOG10_POLY_ORDER 6 +#define LOG10_POLY1_ORDER 12 +extern const struct log10_data +{ + double ln2hi; + double ln2lo; + double invln10; + double poly[LOG10_POLY_ORDER - 1]; /* First coefficient is 1/log(10). */ + double poly1[LOG10_POLY1_ORDER - 1]; + struct + { + double invc, logc; + } tab[1 << LOG10_TABLE_BITS]; +#if !HAVE_FAST_FMA + struct + { + double chi, clo; + } tab2[1 << LOG10_TABLE_BITS]; +#endif +} __log10_data HIDDEN; + +#define EXP_TABLE_BITS 7 +#define EXP_POLY_ORDER 5 +/* Use polynomial that is optimized for a wider input range. This may be + needed for good precision in non-nearest rounding and !TOINT_INTRINSICS. */ +#define EXP_POLY_WIDE 0 +/* Use close to nearest rounding toint when !TOINT_INTRINSICS. This may be + needed for good precision in non-nearest rouning and !EXP_POLY_WIDE. */ +#define EXP_USE_TOINT_NARROW 0 +#define EXP2_POLY_ORDER 5 +#define EXP2_POLY_WIDE 0 +extern const struct exp_data +{ + double invln2N; + double shift; + double negln2hiN; + double negln2loN; + double poly[4]; /* Last four coefficients. */ + double exp2_shift; + double exp2_poly[EXP2_POLY_ORDER]; + uint64_t tab[2 * (1 << EXP_TABLE_BITS)]; +} __exp_data HIDDEN; + +/* Copied from math/v_exp.h for use in vector exp_tail. */ +#define V_EXP_TAIL_TABLE_BITS 8 +extern const uint64_t __v_exp_tail_data[1 << V_EXP_TAIL_TABLE_BITS] HIDDEN; + +/* Copied from math/v_exp.h for use in vector exp2. */ +#define V_EXP_TABLE_BITS 7 +extern const uint64_t __v_exp_data[1 << V_EXP_TABLE_BITS] HIDDEN; + +extern const struct erf_data +{ + struct + { + double erf, scale; + } tab[769]; +} __erf_data HIDDEN; + +extern const struct sv_erf_data +{ + double erf[769]; + double scale[769]; +} __sv_erf_data HIDDEN; + +extern const struct erfc_data +{ + struct + { + double erfc, scale; + } tab[3488]; +} __erfc_data HIDDEN; + +#define ATAN_POLY_NCOEFFS 20 +extern const struct atan_poly_data +{ + double poly[ATAN_POLY_NCOEFFS]; +} __atan_poly_data HIDDEN; + +#define ATANF_POLY_NCOEFFS 8 +extern const struct atanf_poly_data +{ + float poly[ATANF_POLY_NCOEFFS]; +} __atanf_poly_data HIDDEN; + +#define ASINHF_NCOEFFS 8 +extern const struct asinhf_data +{ + float coeffs[ASINHF_NCOEFFS]; +} __asinhf_data HIDDEN; + +#define LOG_TABLE_BITS 7 +#define LOG_POLY_ORDER 6 +#define LOG_POLY1_ORDER 12 +extern const struct log_data +{ + double ln2hi; + double ln2lo; + double poly[LOG_POLY_ORDER - 1]; /* First coefficient is 1. */ + double poly1[LOG_POLY1_ORDER - 1]; + struct + { + double invc, logc; + } tab[1 << LOG_TABLE_BITS]; +#if !HAVE_FAST_FMA + struct + { + double chi, clo; + } tab2[1 << LOG_TABLE_BITS]; +#endif +} __log_data HIDDEN; + +#define ASINH_NCOEFFS 18 +extern const struct asinh_data +{ + double poly[ASINH_NCOEFFS]; +} __asinh_data HIDDEN; + +#define LOG1P_NCOEFFS 19 +extern const struct log1p_data +{ + double coeffs[LOG1P_NCOEFFS]; +} __log1p_data HIDDEN; + +#define LOG1PF_2U5 +#define LOG1PF_NCOEFFS 9 +extern const struct log1pf_data +{ + float coeffs[LOG1PF_NCOEFFS]; +} __log1pf_data HIDDEN; + +#define TANF_P_POLY_NCOEFFS 6 +/* cotan approach needs order 3 on [0, pi/4] to reach <3.5ulps. */ +#define TANF_Q_POLY_NCOEFFS 4 +extern const struct tanf_poly_data +{ + float poly_tan[TANF_P_POLY_NCOEFFS]; + float poly_cotan[TANF_Q_POLY_NCOEFFS]; +} __tanf_poly_data HIDDEN; + +#define V_LOG2_TABLE_BITS 7 +extern const struct v_log2_data +{ + double poly[5]; + double invln2; + struct + { + double invc, log2c; + } table[1 << V_LOG2_TABLE_BITS]; +} __v_log2_data HIDDEN; + +#define V_LOG10_TABLE_BITS 7 +extern const struct v_log10_data +{ + double poly[5]; + double invln10, log10_2; + struct + { + double invc, log10c; + } table[1 << V_LOG10_TABLE_BITS]; +} __v_log10_data HIDDEN; + +/* Some data for SVE powf's internal exp and log. */ +#define V_POWF_EXP2_TABLE_BITS 5 +#define V_POWF_EXP2_N (1 << V_POWF_EXP2_TABLE_BITS) +#define V_POWF_LOG2_TABLE_BITS 5 +#define V_POWF_LOG2_N (1 << V_POWF_LOG2_TABLE_BITS) +extern const struct v_powf_data +{ + double invc[V_POWF_LOG2_N]; + double logc[V_POWF_LOG2_N]; + uint64_t scale[V_POWF_EXP2_N]; +} __v_powf_data HIDDEN; + +#define V_LOG_POLY_ORDER 6 +#define V_LOG_TABLE_BITS 7 +extern const struct v_log_data +{ + /* Shared data for vector log and log-derived routines (e.g. asinh). */ + double poly[V_LOG_POLY_ORDER - 1]; + double ln2; + struct + { + double invc, logc; + } table[1 << V_LOG_TABLE_BITS]; +} __v_log_data HIDDEN; + +#define EXPM1F_POLY_ORDER 5 +extern const float __expm1f_poly[EXPM1F_POLY_ORDER] HIDDEN; + +#define EXPF_TABLE_BITS 5 +#define EXPF_POLY_ORDER 3 +extern const struct expf_data +{ + uint64_t tab[1 << EXPF_TABLE_BITS]; + double invln2_scaled; + double poly_scaled[EXPF_POLY_ORDER]; +} __expf_data HIDDEN; + +#define EXPM1_POLY_ORDER 11 +extern const double __expm1_poly[EXPM1_POLY_ORDER] HIDDEN; + +extern const struct cbrtf_data +{ + float poly[4]; + float table[5]; +} __cbrtf_data HIDDEN; + +extern const struct cbrt_data +{ + double poly[4]; + double table[5]; +} __cbrt_data HIDDEN; + +#define ASINF_POLY_ORDER 4 +extern const float __asinf_poly[ASINF_POLY_ORDER + 1] HIDDEN; + +#define ASIN_POLY_ORDER 11 +extern const double __asin_poly[ASIN_POLY_ORDER + 1] HIDDEN; + +/* Some data for AdvSIMD and SVE pow's internal exp and log. */ +#define V_POW_EXP_TABLE_BITS 8 +extern const struct v_pow_exp_data +{ + double poly[3]; + double n_over_ln2, ln2_over_n_hi, ln2_over_n_lo, shift; + uint64_t sbits[1 << V_POW_EXP_TABLE_BITS]; +} __v_pow_exp_data HIDDEN; + +#define V_POW_LOG_TABLE_BITS 7 +extern const struct v_pow_log_data +{ + double poly[7]; /* First coefficient is 1. */ + double ln2_hi, ln2_lo; + double invc[1 << V_POW_LOG_TABLE_BITS]; + double logc[1 << V_POW_LOG_TABLE_BITS]; + double logctail[1 << V_POW_LOG_TABLE_BITS]; +} __v_pow_log_data HIDDEN; + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/math_err.c b/contrib/arm-optimized-routines/pl/math/math_err.c new file mode 100644 index 000000000000..74db54a5b2cd --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/math_err.c @@ -0,0 +1,78 @@ +/* + * Double-precision math error handling. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#if WANT_ERRNO +# include <errno.h> +/* NOINLINE reduces code size and avoids making math functions non-leaf + when the error handling is inlined. */ +NOINLINE static double +with_errno (double y, int e) +{ + errno = e; + return y; +} +#else +# define with_errno(x, e) (x) +#endif + +/* NOINLINE reduces code size. */ +NOINLINE static double +xflow (uint32_t sign, double y) +{ + y = eval_as_double (opt_barrier_double (sign ? -y : y) * y); + return with_errno (y, ERANGE); +} + +HIDDEN double +__math_uflow (uint32_t sign) +{ + return xflow (sign, 0x1p-767); +} + +/* Underflows to zero in some non-nearest rounding mode, setting errno + is valid even if the result is non-zero, but in the subnormal range. */ +HIDDEN double +__math_may_uflow (uint32_t sign) +{ + return xflow (sign, 0x1.8p-538); +} + +HIDDEN double +__math_oflow (uint32_t sign) +{ + return xflow (sign, 0x1p769); +} + +HIDDEN double +__math_divzero (uint32_t sign) +{ + double y = opt_barrier_double (sign ? -1.0 : 1.0) / 0.0; + return with_errno (y, ERANGE); +} + +HIDDEN double +__math_invalid (double x) +{ + double y = (x - x) / (x - x); + return isnan (x) ? y : with_errno (y, EDOM); +} + +/* Check result and set errno if necessary. */ + +HIDDEN double +__math_check_uflow (double y) +{ + return y == 0.0 ? with_errno (y, ERANGE) : y; +} + +HIDDEN double +__math_check_oflow (double y) +{ + return isinf (y) ? with_errno (y, ERANGE) : y; +} diff --git a/contrib/arm-optimized-routines/pl/math/math_errf.c b/contrib/arm-optimized-routines/pl/math/math_errf.c new file mode 100644 index 000000000000..2b8c6bd25753 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/math_errf.c @@ -0,0 +1,78 @@ +/* + * Single-precision math error handling. + * + * Copyright (c) 2017-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#if WANT_ERRNO +# include <errno.h> +/* NOINLINE reduces code size and avoids making math functions non-leaf + when the error handling is inlined. */ +NOINLINE static float +with_errnof (float y, int e) +{ + errno = e; + return y; +} +#else +# define with_errnof(x, e) (x) +#endif + +/* NOINLINE reduces code size. */ +NOINLINE static float +xflowf (uint32_t sign, float y) +{ + y = eval_as_float (opt_barrier_float (sign ? -y : y) * y); + return with_errnof (y, ERANGE); +} + +HIDDEN float +__math_uflowf (uint32_t sign) +{ + return xflowf (sign, 0x1p-95f); +} + +/* Underflows to zero in some non-nearest rounding mode, setting errno + is valid even if the result is non-zero, but in the subnormal range. */ +HIDDEN float +__math_may_uflowf (uint32_t sign) +{ + return xflowf (sign, 0x1.4p-75f); +} + +HIDDEN float +__math_oflowf (uint32_t sign) +{ + return xflowf (sign, 0x1p97f); +} + +HIDDEN float +__math_divzerof (uint32_t sign) +{ + float y = opt_barrier_float (sign ? -1.0f : 1.0f) / 0.0f; + return with_errnof (y, ERANGE); +} + +HIDDEN float +__math_invalidf (float x) +{ + float y = (x - x) / (x - x); + return isnan (x) ? y : with_errnof (y, EDOM); +} + +/* Check result and set errno if necessary. */ + +HIDDEN float +__math_check_uflowf (float y) +{ + return y == 0.0f ? with_errnof (y, ERANGE) : y; +} + +HIDDEN float +__math_check_oflowf (float y) +{ + return isinf (y) ? with_errnof (y, ERANGE) : y; +} diff --git a/contrib/arm-optimized-routines/pl/math/pl_sig.h b/contrib/arm-optimized-routines/pl/math/pl_sig.h new file mode 100644 index 000000000000..52d988f0e1ce --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/pl_sig.h @@ -0,0 +1,59 @@ +/* + * PL macros for emitting various ulp/bench entries based on function signature + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception. + */ + +#define V_NAME_F1(fun) _ZGVnN4v_##fun##f +#define V_NAME_D1(fun) _ZGVnN2v_##fun +#define V_NAME_F2(fun) _ZGVnN4vv_##fun##f +#define V_NAME_D2(fun) _ZGVnN2vv_##fun + +#define SV_NAME_F1(fun) _ZGVsMxv_##fun##f +#define SV_NAME_D1(fun) _ZGVsMxv_##fun +#define SV_NAME_F2(fun) _ZGVsMxvv_##fun##f +#define SV_NAME_D2(fun) _ZGVsMxvv_##fun + +#define PL_DECL_SF1(fun) float fun##f (float); +#define PL_DECL_SF2(fun) float fun##f (float, float); +#define PL_DECL_SD1(fun) double fun (double); +#define PL_DECL_SD2(fun) double fun (double, double); + +#if WANT_VMATH +# define PL_DECL_VF1(fun) \ + VPCS_ATTR float32x4_t V_NAME_F1 (fun##f) (float32x4_t); +# define PL_DECL_VF2(fun) \ + VPCS_ATTR float32x4_t V_NAME_F2 (fun##f) (float32x4_t, float32x4_t); +# define PL_DECL_VD1(fun) VPCS_ATTR float64x2_t V_NAME_D1 (fun) (float64x2_t); +# define PL_DECL_VD2(fun) \ + VPCS_ATTR float64x2_t V_NAME_D2 (fun) (float64x2_t, float64x2_t); +#else +# define PL_DECL_VF1(fun) +# define PL_DECL_VF2(fun) +# define PL_DECL_VD1(fun) +# define PL_DECL_VD2(fun) +#endif + +#if WANT_SVE_MATH +# define PL_DECL_SVF1(fun) \ + svfloat32_t SV_NAME_F1 (fun) (svfloat32_t, svbool_t); +# define PL_DECL_SVF2(fun) \ + svfloat32_t SV_NAME_F2 (fun) (svfloat32_t, svfloat32_t, svbool_t); +# define PL_DECL_SVD1(fun) \ + svfloat64_t SV_NAME_D1 (fun) (svfloat64_t, svbool_t); +# define PL_DECL_SVD2(fun) \ + svfloat64_t SV_NAME_D2 (fun) (svfloat64_t, svfloat64_t, svbool_t); +#else +# define PL_DECL_SVF1(fun) +# define PL_DECL_SVF2(fun) +# define PL_DECL_SVD1(fun) +# define PL_DECL_SVD2(fun) +#endif + +/* For building the routines, emit function prototype from PL_SIG. This + ensures that the correct signature has been chosen (wrong one will be a + compile error). PL_SIG is defined differently by various components of the + build system to emit entries in the wrappers and entries for mathbench and + ulp. */ +#define PL_SIG(v, t, a, f, ...) PL_DECL_##v##t##a (f) diff --git a/contrib/arm-optimized-routines/pl/math/poly_advsimd_f32.h b/contrib/arm-optimized-routines/pl/math/poly_advsimd_f32.h new file mode 100644 index 000000000000..438e153dff90 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_advsimd_f32.h @@ -0,0 +1,24 @@ +/* + * Helpers for evaluating polynomials on single-precision AdvSIMD input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_ADVSIMD_F32_H +#define PL_MATH_POLY_ADVSIMD_F32_H + +#include <arm_neon.h> + +/* Wrap AdvSIMD f32 helpers: evaluation of some scheme/order has form: + v_[scheme]_[order]_f32. */ +#define VTYPE float32x4_t +#define FMA(x, y, z) vfmaq_f32 (z, x, y) +#define VWRAP(f) v_##f##_f32 +#include "poly_generic.h" +#undef VWRAP +#undef FMA +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_advsimd_f64.h b/contrib/arm-optimized-routines/pl/math/poly_advsimd_f64.h new file mode 100644 index 000000000000..7ea249a91225 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_advsimd_f64.h @@ -0,0 +1,24 @@ +/* + * Helpers for evaluating polynomials on double-precision AdvSIMD input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_ADVSIMD_F64_H +#define PL_MATH_POLY_ADVSIMD_F64_H + +#include <arm_neon.h> + +/* Wrap AdvSIMD f64 helpers: evaluation of some scheme/order has form: + v_[scheme]_[order]_f64. */ +#define VTYPE float64x2_t +#define FMA(x, y, z) vfmaq_f64 (z, x, y) +#define VWRAP(f) v_##f##_f64 +#include "poly_generic.h" +#undef VWRAP +#undef FMA +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_generic.h b/contrib/arm-optimized-routines/pl/math/poly_generic.h new file mode 100644 index 000000000000..3fc25f8762f2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_generic.h @@ -0,0 +1,277 @@ +/* + * Generic helpers for evaluating polynomials with various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef VTYPE +# error Cannot use poly_generic without defining VTYPE +#endif +#ifndef VWRAP +# error Cannot use poly_generic without defining VWRAP +#endif +#ifndef FMA +# error Cannot use poly_generic without defining FMA +#endif + +static inline VTYPE VWRAP (pairwise_poly_3) (VTYPE x, VTYPE x2, + const VTYPE *poly) +{ + /* At order 3, Estrin and Pairwise Horner are identical. */ + VTYPE p01 = FMA (poly[1], x, poly[0]); + VTYPE p23 = FMA (poly[3], x, poly[2]); + return FMA (p23, x2, p01); +} + +static inline VTYPE VWRAP (estrin_4) (VTYPE x, VTYPE x2, VTYPE x4, + const VTYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (x, x2, poly); + return FMA (poly[4], x4, p03); +} +static inline VTYPE VWRAP (estrin_5) (VTYPE x, VTYPE x2, VTYPE x4, + const VTYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (x, x2, poly); + VTYPE p45 = FMA (poly[5], x, poly[4]); + return FMA (p45, x4, p03); +} +static inline VTYPE VWRAP (estrin_6) (VTYPE x, VTYPE x2, VTYPE x4, + const VTYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (x, x2, poly); + VTYPE p45 = FMA (poly[5], x, poly[4]); + VTYPE p46 = FMA (poly[6], x2, p45); + return FMA (p46, x4, p03); +} +static inline VTYPE VWRAP (estrin_7) (VTYPE x, VTYPE x2, VTYPE x4, + const VTYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (x, x2, poly); + VTYPE p47 = VWRAP (pairwise_poly_3) (x, x2, poly + 4); + return FMA (p47, x4, p03); +} +static inline VTYPE VWRAP (estrin_8) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + return FMA (poly[8], x8, VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_9) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + VTYPE p89 = FMA (poly[9], x, poly[8]); + return FMA (p89, x8, VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_10) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + VTYPE p89 = FMA (poly[9], x, poly[8]); + VTYPE p8_10 = FMA (poly[10], x2, p89); + return FMA (p8_10, x8, VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_11) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + VTYPE p8_11 = VWRAP (pairwise_poly_3) (x, x2, poly + 8); + return FMA (p8_11, x8, VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_12) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + return FMA (VWRAP (estrin_4) (x, x2, x4, poly + 8), x8, + VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_13) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + return FMA (VWRAP (estrin_5) (x, x2, x4, poly + 8), x8, + VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_14) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + return FMA (VWRAP (estrin_6) (x, x2, x4, poly + 8), x8, + VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_15) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + const VTYPE *poly) +{ + return FMA (VWRAP (estrin_7) (x, x2, x4, poly + 8), x8, + VWRAP (estrin_7) (x, x2, x4, poly)); +} +static inline VTYPE VWRAP (estrin_16) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + VTYPE x16, const VTYPE *poly) +{ + return FMA (poly[16], x16, VWRAP (estrin_15) (x, x2, x4, x8, poly)); +} +static inline VTYPE VWRAP (estrin_17) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + VTYPE x16, const VTYPE *poly) +{ + VTYPE p16_17 = FMA (poly[17], x, poly[16]); + return FMA (p16_17, x16, VWRAP (estrin_15) (x, x2, x4, x8, poly)); +} +static inline VTYPE VWRAP (estrin_18) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + VTYPE x16, const VTYPE *poly) +{ + VTYPE p16_17 = FMA (poly[17], x, poly[16]); + VTYPE p16_18 = FMA (poly[18], x2, p16_17); + return FMA (p16_18, x16, VWRAP (estrin_15) (x, x2, x4, x8, poly)); +} +static inline VTYPE VWRAP (estrin_19) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, + VTYPE x16, const VTYPE *poly) +{ + VTYPE p16_19 = VWRAP (pairwise_poly_3) (x, x2, poly + 16); + return FMA (p16_19, x16, VWRAP (estrin_15) (x, x2, x4, x8, poly)); +} + +static inline VTYPE VWRAP (horner_2) (VTYPE x, const VTYPE *poly) +{ + VTYPE p = FMA (poly[2], x, poly[1]); + return FMA (x, p, poly[0]); +} +static inline VTYPE VWRAP (horner_3) (VTYPE x, const VTYPE *poly) +{ + VTYPE p = FMA (poly[3], x, poly[2]); + p = FMA (x, p, poly[1]); + p = FMA (x, p, poly[0]); + return p; +} +static inline VTYPE VWRAP (horner_4) (VTYPE x, const VTYPE *poly) +{ + VTYPE p = FMA (poly[4], x, poly[3]); + p = FMA (x, p, poly[2]); + p = FMA (x, p, poly[1]); + p = FMA (x, p, poly[0]); + return p; +} +static inline VTYPE VWRAP (horner_5) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_4) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_6) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_5) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_7) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_6) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_8) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_7) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_9) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_8) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_10) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_9) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_11) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_10) (x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_12) (VTYPE x, const VTYPE *poly) +{ + return FMA (x, VWRAP (horner_11) (x, poly + 1), poly[0]); +} + +static inline VTYPE VWRAP (pw_horner_4) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p01 = FMA (poly[1], x, poly[0]); + VTYPE p23 = FMA (poly[3], x, poly[2]); + VTYPE p; + p = FMA (x2, poly[4], p23); + p = FMA (x2, p, p01); + return p; +} +static inline VTYPE VWRAP (pw_horner_5) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p01 = FMA (poly[1], x, poly[0]); + VTYPE p23 = FMA (poly[3], x, poly[2]); + VTYPE p45 = FMA (poly[5], x, poly[4]); + VTYPE p; + p = FMA (x2, p45, p23); + p = FMA (x2, p, p01); + return p; +} +static inline VTYPE VWRAP (pw_horner_6) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p26 = VWRAP (pw_horner_4) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p26, p01); +} +static inline VTYPE VWRAP (pw_horner_7) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p27 = VWRAP (pw_horner_5) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p27, p01); +} +static inline VTYPE VWRAP (pw_horner_8) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p28 = VWRAP (pw_horner_6) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p28, p01); +} +static inline VTYPE VWRAP (pw_horner_9) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p29 = VWRAP (pw_horner_7) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p29, p01); +} +static inline VTYPE VWRAP (pw_horner_10) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_10 = VWRAP (pw_horner_8) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_10, p01); +} +static inline VTYPE VWRAP (pw_horner_11) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_11 = VWRAP (pw_horner_9) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_11, p01); +} +static inline VTYPE VWRAP (pw_horner_12) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_12 = VWRAP (pw_horner_10) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_12, p01); +} +static inline VTYPE VWRAP (pw_horner_13) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_13 = VWRAP (pw_horner_11) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_13, p01); +} +static inline VTYPE VWRAP (pw_horner_14) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_14 = VWRAP (pw_horner_12) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_14, p01); +} +static inline VTYPE VWRAP (pw_horner_15) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_15 = VWRAP (pw_horner_13) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_15, p01); +} +static inline VTYPE VWRAP (pw_horner_16) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_16 = VWRAP (pw_horner_14) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_16, p01); +} +static inline VTYPE VWRAP (pw_horner_17) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_17 = VWRAP (pw_horner_15) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_17, p01); +} +static inline VTYPE VWRAP (pw_horner_18) (VTYPE x, VTYPE x2, const VTYPE *poly) +{ + VTYPE p2_18 = VWRAP (pw_horner_16) (x, x2, poly + 2); + VTYPE p01 = FMA (poly[1], x, poly[0]); + return FMA (x2, p2_18, p01); +} diff --git a/contrib/arm-optimized-routines/pl/math/poly_scalar_f32.h b/contrib/arm-optimized-routines/pl/math/poly_scalar_f32.h new file mode 100644 index 000000000000..a9b1c5544494 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_scalar_f32.h @@ -0,0 +1,24 @@ +/* + * Helpers for evaluating polynomials on siongle-precision scalar input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_SCALAR_F32_H +#define PL_MATH_POLY_SCALAR_F32_H + +#include <math.h> + +/* Wrap scalar f32 helpers: evaluation of some scheme/order has form: + [scheme]_[order]_f32. */ +#define VTYPE float +#define FMA fmaf +#define VWRAP(f) f##_f32 +#include "poly_generic.h" +#undef VWRAP +#undef FMA +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_scalar_f64.h b/contrib/arm-optimized-routines/pl/math/poly_scalar_f64.h new file mode 100644 index 000000000000..207dccee30ad --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_scalar_f64.h @@ -0,0 +1,24 @@ +/* + * Helpers for evaluating polynomials on double-precision scalar input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_SCALAR_F64_H +#define PL_MATH_POLY_SCALAR_F64_H + +#include <math.h> + +/* Wrap scalar f64 helpers: evaluation of some scheme/order has form: + [scheme]_[order]_f64. */ +#define VTYPE double +#define FMA fma +#define VWRAP(f) f##_f64 +#include "poly_generic.h" +#undef VWRAP +#undef FMA +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_sve_f32.h b/contrib/arm-optimized-routines/pl/math/poly_sve_f32.h new file mode 100644 index 000000000000..a97e2ced027a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_sve_f32.h @@ -0,0 +1,26 @@ +/* + * Helpers for evaluating polynomials on single-precision SVE input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_SVE_F32_H +#define PL_MATH_POLY_SVE_F32_H + +#include <arm_sve.h> + +/* Wrap SVE f32 helpers: evaluation of some scheme/order has form: + sv_[scheme]_[order]_f32_x. */ +#define VTYPE svfloat32_t +#define STYPE float +#define VWRAP(f) sv_##f##_f32_x +#define DUP svdup_f32 +#include "poly_sve_generic.h" +#undef DUP +#undef VWRAP +#undef STYPE +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_sve_f64.h b/contrib/arm-optimized-routines/pl/math/poly_sve_f64.h new file mode 100644 index 000000000000..5fb14b3c1700 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_sve_f64.h @@ -0,0 +1,26 @@ +/* + * Helpers for evaluating polynomials on double-precision SVE input, using + * various schemes. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_POLY_SVE_F64_H +#define PL_MATH_POLY_SVE_F64_H + +#include <arm_sve.h> + +/* Wrap SVE f64 helpers: evaluation of some scheme/order has form: + sv_[scheme]_[order]_f64_x. */ +#define VTYPE svfloat64_t +#define STYPE double +#define VWRAP(f) sv_##f##_f64_x +#define DUP svdup_f64 +#include "poly_sve_generic.h" +#undef DUP +#undef VWRAP +#undef STYPE +#undef VTYPE + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/poly_sve_generic.h b/contrib/arm-optimized-routines/pl/math/poly_sve_generic.h new file mode 100644 index 000000000000..b568e4cddff3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/poly_sve_generic.h @@ -0,0 +1,301 @@ +/* + * Helpers for evaluating polynomials with various schemes - specific to SVE + * but precision-agnostic. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef VTYPE +# error Cannot use poly_generic without defining VTYPE +#endif +#ifndef STYPE +# error Cannot use poly_generic without defining STYPE +#endif +#ifndef VWRAP +# error Cannot use poly_generic without defining VWRAP +#endif +#ifndef DUP +# error Cannot use poly_generic without defining DUP +#endif + +static inline VTYPE VWRAP (pairwise_poly_3) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + /* At order 3, Estrin and Pairwise Horner are identical. */ + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + VTYPE p23 = svmla_x (pg, DUP (poly[2]), x, poly[3]); + return svmla_x (pg, p01, p23, x2); +} + +static inline VTYPE VWRAP (estrin_4) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + const STYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (pg, x, x2, poly); + return svmla_x (pg, p03, x4, poly[4]); +} +static inline VTYPE VWRAP (estrin_5) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + const STYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (pg, x, x2, poly); + VTYPE p45 = svmla_x (pg, DUP (poly[4]), x, poly[5]); + return svmla_x (pg, p03, p45, x4); +} +static inline VTYPE VWRAP (estrin_6) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + const STYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (pg, x, x2, poly); + VTYPE p45 = svmla_x (pg, DUP (poly[4]), x, poly[5]); + VTYPE p46 = svmla_x (pg, p45, x, poly[6]); + return svmla_x (pg, p03, p46, x4); +} +static inline VTYPE VWRAP (estrin_7) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + const STYPE *poly) +{ + VTYPE p03 = VWRAP (pairwise_poly_3) (pg, x, x2, poly); + VTYPE p47 = VWRAP (pairwise_poly_3) (pg, x, x2, poly + 4); + return svmla_x (pg, p03, p47, x4); +} +static inline VTYPE VWRAP (estrin_8) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + VTYPE x8, const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), x8, poly[8]); +} +static inline VTYPE VWRAP (estrin_9) (svbool_t pg, VTYPE x, VTYPE x2, VTYPE x4, + VTYPE x8, const STYPE *poly) +{ + VTYPE p89 = svmla_x (pg, DUP (poly[8]), x, poly[9]); + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), p89, x8); +} +static inline VTYPE VWRAP (estrin_10) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + VTYPE p89 = svmla_x (pg, DUP (poly[8]), x, poly[9]); + VTYPE p8_10 = svmla_x (pg, p89, x2, poly[10]); + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), p8_10, x8); +} +static inline VTYPE VWRAP (estrin_11) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + VTYPE p8_11 = VWRAP (pairwise_poly_3) (pg, x, x2, poly + 8); + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), p8_11, x8); +} +static inline VTYPE VWRAP (estrin_12) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), + VWRAP (estrin_4) (pg, x, x2, x4, poly + 8), x8); +} +static inline VTYPE VWRAP (estrin_13) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), + VWRAP (estrin_5) (pg, x, x2, x4, poly + 8), x8); +} +static inline VTYPE VWRAP (estrin_14) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), + VWRAP (estrin_6) (pg, x, x2, x4, poly + 8), x8); +} +static inline VTYPE VWRAP (estrin_15) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_7) (pg, x, x2, x4, poly), + VWRAP (estrin_7) (pg, x, x2, x4, poly + 8), x8); +} +static inline VTYPE VWRAP (estrin_16) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, VTYPE x16, + const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_15) (pg, x, x2, x4, x8, poly), x16, + poly[16]); +} +static inline VTYPE VWRAP (estrin_17) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, VTYPE x16, + const STYPE *poly) +{ + VTYPE p16_17 = svmla_x (pg, DUP (poly[16]), x, poly[17]); + return svmla_x (pg, VWRAP (estrin_15) (pg, x, x2, x4, x8, poly), p16_17, + x16); +} +static inline VTYPE VWRAP (estrin_18) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, VTYPE x16, + const STYPE *poly) +{ + VTYPE p16_17 = svmla_x (pg, DUP (poly[16]), x, poly[17]); + VTYPE p16_18 = svmla_x (pg, p16_17, x2, poly[18]); + return svmla_x (pg, VWRAP (estrin_15) (pg, x, x2, x4, x8, poly), p16_18, + x16); +} +static inline VTYPE VWRAP (estrin_19) (svbool_t pg, VTYPE x, VTYPE x2, + VTYPE x4, VTYPE x8, VTYPE x16, + const STYPE *poly) +{ + return svmla_x (pg, VWRAP (estrin_15) (pg, x, x2, x4, x8, poly), + VWRAP (pairwise_poly_3) (pg, x, x2, poly + 16), x16); +} + +static inline VTYPE VWRAP (horner_3) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + VTYPE p = svmla_x (pg, DUP (poly[2]), x, poly[3]); + p = svmad_x (pg, x, p, poly[1]); + p = svmad_x (pg, x, p, poly[0]); + return p; +} +static inline VTYPE VWRAP (horner_4) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + VTYPE p = svmla_x (pg, DUP (poly[3]), x, poly[4]); + p = svmad_x (pg, x, p, poly[2]); + p = svmad_x (pg, x, p, poly[1]); + p = svmad_x (pg, x, p, poly[0]); + return p; +} +static inline VTYPE VWRAP (horner_5) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_4) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_6) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_5) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_7) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_6) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_8) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_7) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE VWRAP (horner_9) (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_8) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE +sv_horner_10_f32_x (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, VWRAP (horner_9) (pg, x, poly + 1), poly[0]); +} +static inline VTYPE +sv_horner_11_f32_x (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, sv_horner_10_f32_x (pg, x, poly + 1), poly[0]); +} +static inline VTYPE +sv_horner_12_f32_x (svbool_t pg, VTYPE x, const STYPE *poly) +{ + return svmad_x (pg, x, sv_horner_11_f32_x (pg, x, poly + 1), poly[0]); +} + +static inline VTYPE VWRAP (pw_horner_4) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + VTYPE p23 = svmla_x (pg, DUP (poly[2]), x, poly[3]); + VTYPE p; + p = svmla_x (pg, p23, x2, poly[4]); + p = svmla_x (pg, p01, x2, p); + return p; +} +static inline VTYPE VWRAP (pw_horner_5) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + VTYPE p23 = svmla_x (pg, DUP (poly[2]), x, poly[3]); + VTYPE p45 = svmla_x (pg, DUP (poly[4]), x, poly[5]); + VTYPE p; + p = svmla_x (pg, p23, x2, p45); + p = svmla_x (pg, p01, x2, p); + return p; +} +static inline VTYPE VWRAP (pw_horner_6) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p26 = VWRAP (pw_horner_4) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p26); +} +static inline VTYPE VWRAP (pw_horner_7) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p27 = VWRAP (pw_horner_5) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p27); +} +static inline VTYPE VWRAP (pw_horner_8) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p28 = VWRAP (pw_horner_6) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p28); +} +static inline VTYPE VWRAP (pw_horner_9) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p29 = VWRAP (pw_horner_7) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p29); +} +static inline VTYPE VWRAP (pw_horner_10) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_10 = VWRAP (pw_horner_8) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_10); +} +static inline VTYPE VWRAP (pw_horner_11) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_11 = VWRAP (pw_horner_9) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_11); +} +static inline VTYPE VWRAP (pw_horner_12) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_12 = VWRAP (pw_horner_10) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_12); +} +static inline VTYPE VWRAP (pw_horner_13) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_13 = VWRAP (pw_horner_11) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_13); +} +static inline VTYPE VWRAP (pw_horner_14) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_14 = VWRAP (pw_horner_12) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_14); +} +static inline VTYPE VWRAP (pw_horner_15) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_15 = VWRAP (pw_horner_13) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_15); +} +static inline VTYPE VWRAP (pw_horner_16) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_16 = VWRAP (pw_horner_14) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_16); +} +static inline VTYPE VWRAP (pw_horner_17) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_17 = VWRAP (pw_horner_15) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_17); +} +static inline VTYPE VWRAP (pw_horner_18) (svbool_t pg, VTYPE x, VTYPE x2, + const STYPE *poly) +{ + VTYPE p2_18 = VWRAP (pw_horner_16) (pg, x, x2, poly + 2); + VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); + return svmla_x (pg, p01, x2, p2_18); +} diff --git a/contrib/arm-optimized-routines/pl/math/sinh_3u.c b/contrib/arm-optimized-routines/pl/math/sinh_3u.c new file mode 100644 index 000000000000..1d86629ee2a3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sinh_3u.c @@ -0,0 +1,63 @@ +/* + * Double-precision sinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffffffffffff +#define Half 0x3fe0000000000000 +#define OFlowBound \ + 0x40862e42fefa39f0 /* 0x1.62e42fefa39fp+9, above which using expm1 results \ + in NaN. */ + +double +__exp_dd (double, double); + +/* Approximation for double-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The greatest observed error is 2.57 ULP: + __v_sinh(0x1.9fb1d49d1d58bp-2) got 0x1.ab34e59d678dcp-2 + want 0x1.ab34e59d678d9p-2. */ +double +sinh (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t iax = ix & AbsMask; + double ax = asdouble (iax); + uint64_t sign = ix & ~AbsMask; + double halfsign = asdouble (Half | sign); + + if (unlikely (iax >= OFlowBound)) + { + /* Special values and overflow. */ + if (unlikely (iax > 0x7ff0000000000000)) + return __math_invalidf (x); + /* expm1 overflows a little before sinh. We have to fill this + gap by using a different algorithm, in this case we use a + double-precision exp helper. For large x sinh(x) is dominated + by exp(x), however we cannot compute exp without overflow + either. We use the identity: exp(a) = (exp(a / 2)) ^ 2 + to compute sinh(x) ~= (exp(|x| / 2)) ^ 2 / 2 for x > 0 + ~= (exp(|x| / 2)) ^ 2 / -2 for x < 0. */ + double e = __exp_dd (ax / 2, 0); + return (e * halfsign) * e; + } + + /* Use expm1f to retain acceptable precision for small numbers. + Let t = e^(|x|) - 1. */ + double t = expm1 (ax); + /* Then sinh(x) = (t + t / (t + 1)) / 2 for x > 0 + (t + t / (t + 1)) / -2 for x < 0. */ + return (t + t / (t + 1)) * halfsign; +} + +PL_SIG (S, D, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (sinh, 2.08) +PL_TEST_SYM_INTERVAL (sinh, 0, 0x1p-51, 100) +PL_TEST_SYM_INTERVAL (sinh, 0x1p-51, 0x1.62e42fefa39fp+9, 100000) +PL_TEST_SYM_INTERVAL (sinh, 0x1.62e42fefa39fp+9, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sinhf_2u3.c b/contrib/arm-optimized-routines/pl/math/sinhf_2u3.c new file mode 100644 index 000000000000..aa7aadcf67c5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sinhf_2u3.c @@ -0,0 +1,73 @@ +/* + * Single-precision sinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffff +#define Half 0x3f000000 +#define Expm1OFlowLimit \ + 0x42b17218 /* 0x1.62e43p+6, 2^7*ln2, minimum value for which expm1f \ + overflows. */ +#define OFlowLimit \ + 0x42b2d4fd /* 0x1.65a9fap+6, minimum positive value for which sinhf should \ + overflow. */ + +float +optr_aor_exp_f32 (float); + +/* Approximation for single-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The maximum error is 2.26 ULP: + sinhf(0x1.e34a9ep-4) got 0x1.e469ep-4 want 0x1.e469e4p-4. */ +float +sinhf (float x) +{ + uint32_t ix = asuint (x); + uint32_t iax = ix & AbsMask; + float ax = asfloat (iax); + uint32_t sign = ix & ~AbsMask; + float halfsign = asfloat (Half | sign); + + if (unlikely (iax >= Expm1OFlowLimit)) + { + /* Special values and overflow. */ + if (iax >= 0x7fc00001 || iax == 0x7f800000) + return x; + if (iax >= 0x7f800000) + return __math_invalidf (x); + if (iax >= OFlowLimit) + return __math_oflowf (sign); + + /* expm1f overflows a little before sinhf, (~88.7 vs ~89.4). We have to + fill this gap by using a different algorithm, in this case we use a + double-precision exp helper. For large x sinh(x) dominated by exp(x), + however we cannot compute exp without overflow either. We use the + identity: + exp(a) = (exp(a / 2)) ^ 2. + to compute sinh(x) ~= (exp(|x| / 2)) ^ 2 / 2 for x > 0 + ~= (exp(|x| / 2)) ^ 2 / -2 for x < 0. + Greatest error in this region is 1.89 ULP: + sinhf(0x1.65898cp+6) got 0x1.f00aep+127 want 0x1.f00adcp+127. */ + float e = optr_aor_exp_f32 (ax / 2); + return (e * halfsign) * e; + } + + /* Use expm1f to retain acceptable precision for small numbers. + Let t = e^(|x|) - 1. */ + float t = expm1f (ax); + /* Then sinh(x) = (t + t / (t + 1)) / 2 for x > 0 + (t + t / (t + 1)) / -2 for x < 0. */ + return (t + t / (t + 1)) * halfsign; +} + +PL_SIG (S, F, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (sinhf, 1.76) +PL_TEST_SYM_INTERVAL (sinhf, 0, 0x1.62e43p+6, 100000) +PL_TEST_SYM_INTERVAL (sinhf, 0x1.62e43p+6, 0x1.65a9fap+6, 100) +PL_TEST_SYM_INTERVAL (sinhf, 0x1.65a9fap+6, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/sinpi_3u.c b/contrib/arm-optimized-routines/pl/math/sinpi_3u.c new file mode 100644 index 000000000000..a04a352a62e6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sinpi_3u.c @@ -0,0 +1,90 @@ +/* + * Double-precision scalar sinpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#define _GNU_SOURCE +#include <math.h> +#include "mathlib.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_scalar_f64.h" + +/* Taylor series coefficents for sin(pi * x). + C2 coefficient (orginally ~=5.16771278) has been split into two parts: + C2_hi = 4, C2_lo = C2 - C2_hi (~=1.16771278) + This change in magnitude reduces floating point rounding errors. + C2_hi is then reintroduced after the polynomial approxmation. */ +static const double poly[] + = { 0x1.921fb54442d184p1, -0x1.2aef39896f94bp0, 0x1.466bc6775ab16p1, + -0x1.32d2cce62dc33p-1, 0x1.507834891188ep-4, -0x1.e30750a28c88ep-8, + 0x1.e8f48308acda4p-12, -0x1.6fc0032b3c29fp-16, 0x1.af86ae521260bp-21, + -0x1.012a9870eeb7dp-25 }; + +#define Shift 0x1.8p+52 + +/* Approximation for scalar double-precision sinpi(x). + Maximum error: 3.03 ULP: + sinpi(0x1.a90da2818f8b5p+7) got 0x1.fe358f255a4b3p-1 + want 0x1.fe358f255a4b6p-1. */ +double +sinpi (double x) +{ + if (isinf (x)) + return __math_invalid (x); + + double r = asdouble (asuint64 (x) & ~0x8000000000000000); + uint64_t sign = asuint64 (x) & 0x8000000000000000; + + /* Edge cases for when sinpif should be exactly 0. (Integers) + 0x1p53 is the limit for single precision to store any decimal places. */ + if (r >= 0x1p53) + return 0; + + /* If x is an integer, return 0. */ + uint64_t m = (uint64_t) r; + if (r == m) + return 0; + + /* For very small inputs, squaring r causes underflow. + Values below this threshold can be approximated via sinpi(x) ≈ pi*x. */ + if (r < 0x1p-63) + return M_PI * x; + + /* Any non-integer values >= 0x1x51 will be int + 0.5. + These values should return exactly 1 or -1. */ + if (r >= 0x1p51) + { + uint64_t iy = ((m & 1) << 63) ^ asuint64 (1.0); + return asdouble (sign ^ iy); + } + + /* n = rint(|x|). */ + double n = r + Shift; + sign ^= (asuint64 (n) << 63); + n = n - Shift; + + /* r = |x| - n (range reduction into -1/2 .. 1/2). */ + r = r - n; + + /* y = sin(r). */ + double r2 = r * r; + double y = horner_9_f64 (r2, poly); + y = y * r; + + /* Reintroduce C2_hi. */ + y = fma (-4 * r2, r, y); + + /* Copy sign of x to sin(|x|). */ + return asdouble (asuint64 (y) ^ sign); +} + +PL_SIG (S, D, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (sinpi, 2.53) +PL_TEST_SYM_INTERVAL (sinpi, 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (sinpi, 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (sinpi, 0.5, 0x1p51, 10000) +PL_TEST_SYM_INTERVAL (sinpi, 0x1p51, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sinpif_2u5.c b/contrib/arm-optimized-routines/pl/math/sinpif_2u5.c new file mode 100644 index 000000000000..af9ca0573b37 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sinpif_2u5.c @@ -0,0 +1,83 @@ +/* + * Single-precision scalar sinpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Taylor series coefficents for sin(pi * x). */ +#define C0 0x1.921fb6p1f +#define C1 -0x1.4abbcep2f +#define C2 0x1.466bc6p1f +#define C3 -0x1.32d2ccp-1f +#define C4 0x1.50783p-4f +#define C5 -0x1.e30750p-8f + +#define Shift 0x1.0p+23f + +/* Approximation for scalar single-precision sinpi(x) - sinpif. + Maximum error: 2.48 ULP: + sinpif(0x1.d062b6p-2) got 0x1.fa8c06p-1 + want 0x1.fa8c02p-1. */ +float +sinpif (float x) +{ + if (isinf (x)) + return __math_invalidf (x); + + float r = asfloat (asuint (x) & ~0x80000000); + uint32_t sign = asuint (x) & 0x80000000; + + /* Edge cases for when sinpif should be exactly 0. (Integers) + 0x1p23 is the limit for single precision to store any decimal places. */ + if (r >= 0x1p23f) + return 0; + + int32_t m = roundf (r); + if (m == r) + return 0; + + /* For very small inputs, squaring r causes underflow. + Values below this threshold can be approximated via sinpi(x) ~= pi*x. */ + if (r < 0x1p-31f) + return C0 * x; + + /* Any non-integer values >= 0x1p22f will be int + 0.5. + These values should return exactly 1 or -1. */ + if (r >= 0x1p22f) + { + uint32_t iy = ((m & 1) << 31) ^ asuint (-1.0f); + return asfloat (sign ^ iy); + } + + /* n = rint(|x|). */ + float n = r + Shift; + sign ^= (asuint (n) << 31); + n = n - Shift; + + /* r = |x| - n (range reduction into -1/2 .. 1/2). */ + r = r - n; + + /* y = sin(pi * r). */ + float r2 = r * r; + float y = fmaf (C5, r2, C4); + y = fmaf (y, r2, C3); + y = fmaf (y, r2, C2); + y = fmaf (y, r2, C1); + y = fmaf (y, r2, C0); + + /* Copy sign of x to sin(|x|). */ + return asfloat (asuint (y * r) ^ sign); +} + +PL_SIG (S, F, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (sinpif, 1.99) +PL_TEST_SYM_INTERVAL (sinpif, 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (sinpif, 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (sinpif, 0.5, 0x1p22f, 10000) +PL_TEST_SYM_INTERVAL (sinpif, 0x1p22f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_acos_2u.c b/contrib/arm-optimized-routines/pl/math/sv_acos_2u.c new file mode 100644 index 000000000000..e06db6cae6af --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_acos_2u.c @@ -0,0 +1,91 @@ +/* + * Double-precision SVE acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64_t poly[12]; + float64_t pi, pi_over_2; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) + on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57. */ + .poly = { 0x1.555555555554ep-3, 0x1.3333333337233p-4, 0x1.6db6db67f6d9fp-5, + 0x1.f1c71fbd29fbbp-6, 0x1.6e8b264d467d6p-6, 0x1.1c5997c357e9dp-6, + 0x1.c86a22cd9389dp-7, 0x1.856073c22ebbep-7, 0x1.fd1151acb6bedp-8, + 0x1.087182f799c1dp-6, -0x1.6602748120927p-7, 0x1.cfa0dd1f9478p-6, }, + .pi = 0x1.921fb54442d18p+1, + .pi_over_2 = 0x1.921fb54442d18p+0, +}; + +/* Double-precision SVE implementation of vector acos(x). + + For |x| in [0, 0.5], use an order 11 polynomial P such that the final + approximation of asin is an odd polynomial: + + acos(x) ~ pi/2 - (x + x^3 P(x^2)). + + The largest observed error in this region is 1.18 ulps, + _ZGVsMxv_acos (0x1.fbc5fe28ee9e3p-2) got 0x1.0d4d0f55667f6p+0 + want 0x1.0d4d0f55667f7p+0. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + acos(x) = y + y * z * P(z), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 1.52 ulps, + _ZGVsMxv_acos (0x1.24024271a500ap-1) got 0x1.ed82df4243f0dp-1 + want 0x1.ed82df4243f0bp-1. */ +svfloat64_t SV_NAME_D1 (acos) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint64_t sign = svand_x (pg, svreinterpret_u64 (x), 0x8000000000000000); + svfloat64_t ax = svabs_x (pg, x); + + svbool_t a_gt_half = svacgt (pg, x, 0.5); + + /* Evaluate polynomial Q(x) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + svfloat64_t z2 = svsel (a_gt_half, svmls_x (pg, sv_f64 (0.5), ax, 0.5), + svmul_x (pg, x, x)); + svfloat64_t z = svsqrt_m (ax, a_gt_half, z2); + + /* Use a single polynomial approximation P for both intervals. */ + svfloat64_t z4 = svmul_x (pg, z2, z2); + svfloat64_t z8 = svmul_x (pg, z4, z4); + svfloat64_t z16 = svmul_x (pg, z8, z8); + svfloat64_t p = sv_estrin_11_f64_x (pg, z2, z4, z8, z16, d->poly); + + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = svmla_x (pg, z, svmul_x (pg, z, z2), p); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = 2 Q(|x|) , for 0.5 < x < 1.0 + = pi - 2 Q(|x|) , for -1.0 < x < -0.5. */ + svfloat64_t y + = svreinterpret_f64 (svorr_x (pg, svreinterpret_u64 (p), sign)); + + svbool_t is_neg = svcmplt (pg, x, 0.0); + svfloat64_t off = svdup_f64_z (is_neg, d->pi); + svfloat64_t mul = svsel (a_gt_half, sv_f64 (2.0), sv_f64 (-1.0)); + svfloat64_t add = svsel (a_gt_half, off, sv_f64 (d->pi_over_2)); + + return svmla_x (pg, add, mul, y); +} + +PL_SIG (SV, D, 1, acos, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_D1 (acos), 1.02) +PL_TEST_INTERVAL (SV_NAME_D1 (acos), 0, 0.5, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (acos), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (acos), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (acos), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (SV_NAME_D1 (acos), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_acosf_1u4.c b/contrib/arm-optimized-routines/pl/math/sv_acosf_1u4.c new file mode 100644 index 000000000000..7ac59ceedfbd --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_acosf_1u4.c @@ -0,0 +1,84 @@ +/* + * Single-precision SVE acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32_t poly[5]; + float32_t pi, pi_over_2; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on + [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */ + .poly = { 0x1.55555ep-3, 0x1.33261ap-4, 0x1.70d7dcp-5, 0x1.b059dp-6, + 0x1.3af7d8p-5, }, + .pi = 0x1.921fb6p+1f, + .pi_over_2 = 0x1.921fb6p+0f, +}; + +/* Single-precision SVE implementation of vector acos(x). + + For |x| in [0, 0.5], use order 4 polynomial P such that the final + approximation of asin is an odd polynomial: + + acos(x) ~ pi/2 - (x + x^3 P(x^2)). + + The largest observed error in this region is 1.16 ulps, + _ZGVsMxv_acosf(0x1.ffbeccp-2) got 0x1.0c27f8p+0 + want 0x1.0c27f6p+0. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + acos(x) = y + y * z * P(z), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 1.32 ulps, + _ZGVsMxv_acosf (0x1.15ba56p-1) got 0x1.feb33p-1 + want 0x1.feb32ep-1. */ +svfloat32_t SV_NAME_F1 (acos) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint32_t sign = svand_x (pg, svreinterpret_u32 (x), 0x80000000); + svfloat32_t ax = svabs_x (pg, x); + svbool_t a_gt_half = svacgt (pg, x, 0.5); + + /* Evaluate polynomial Q(x) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + svfloat32_t z2 = svsel (a_gt_half, svmls_x (pg, sv_f32 (0.5), ax, 0.5), + svmul_x (pg, x, x)); + svfloat32_t z = svsqrt_m (ax, a_gt_half, z2); + + /* Use a single polynomial approximation P for both intervals. */ + svfloat32_t p = sv_horner_4_f32_x (pg, z2, d->poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = svmla_x (pg, z, svmul_x (pg, z, z2), p); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = 2 Q(|x|) , for 0.5 < x < 1.0 + = pi - 2 Q(|x|) , for -1.0 < x < -0.5. */ + svfloat32_t y + = svreinterpret_f32 (svorr_x (pg, svreinterpret_u32 (p), sign)); + + svbool_t is_neg = svcmplt (pg, x, 0.0); + svfloat32_t off = svdup_f32_z (is_neg, d->pi); + svfloat32_t mul = svsel (a_gt_half, sv_f32 (2.0), sv_f32 (-1.0)); + svfloat32_t add = svsel (a_gt_half, off, sv_f32 (d->pi_over_2)); + + return svmla_x (pg, add, mul, y); +} + +PL_SIG (SV, F, 1, acos, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_F1 (acos), 0.82) +PL_TEST_INTERVAL (SV_NAME_F1 (acos), 0, 0.5, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (acos), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (acos), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (acos), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (SV_NAME_F1 (acos), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_acosh_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_acosh_3u5.c new file mode 100644 index 000000000000..faf351331464 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_acosh_3u5.c @@ -0,0 +1,50 @@ +/* + * Double-precision SVE acosh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define WANT_SV_LOG1P_K0_SHORTCUT 1 +#include "sv_log1p_inline.h" + +#define BigBoundTop 0x5fe /* top12 (asuint64 (0x1p511)). */ +#define OneTop 0x3ff + +static NOINLINE svfloat64_t +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (acosh, x, y, special); +} + +/* SVE approximation for double-precision acosh, based on log1p. + The largest observed error is 3.19 ULP in the region where the + argument to log1p falls in the k=0 interval, i.e. x close to 1: + SV_NAME_D1 (acosh)(0x1.1e4388d4ca821p+0) got 0x1.ed23399f5137p-2 + want 0x1.ed23399f51373p-2. */ +svfloat64_t SV_NAME_D1 (acosh) (svfloat64_t x, const svbool_t pg) +{ + svuint64_t itop = svlsr_x (pg, svreinterpret_u64 (x), 52); + /* (itop - OneTop) >= (BigBoundTop - OneTop). */ + svbool_t special = svcmpge (pg, svsub_x (pg, itop, OneTop), sv_u64 (0x1ff)); + + svfloat64_t xm1 = svsub_x (pg, x, 1); + svfloat64_t u = svmul_x (pg, xm1, svadd_x (pg, x, 1)); + svfloat64_t y = sv_log1p_inline (svadd_x (pg, xm1, svsqrt_x (pg, u)), pg); + + /* Fall back to scalar routine for special lanes. */ + if (unlikely (svptest_any (pg, special))) + return special_case (x, y, special); + + return y; +} + +PL_SIG (SV, D, 1, acosh, 1.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (acosh), 2.69) +PL_TEST_INTERVAL (SV_NAME_D1 (acosh), 1, 0x1p511, 90000) +PL_TEST_INTERVAL (SV_NAME_D1 (acosh), 0x1p511, inf, 10000) +PL_TEST_INTERVAL (SV_NAME_D1 (acosh), 0, 1, 1000) +PL_TEST_INTERVAL (SV_NAME_D1 (acosh), -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_acoshf_2u8.c b/contrib/arm-optimized-routines/pl/math/sv_acoshf_2u8.c new file mode 100644 index 000000000000..f527083af40a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_acoshf_2u8.c @@ -0,0 +1,47 @@ +/* + * Single-precision SVE acosh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define One 0x3f800000 +#define Thres 0x20000000 /* asuint(0x1p64) - One. */ + +#include "sv_log1pf_inline.h" + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (acoshf, x, y, special); +} + +/* Single-precision SVE acosh(x) routine. Implements the same algorithm as + vector acoshf and log1p. + + Maximum error is 2.78 ULPs: + SV_NAME_F1 (acosh) (0x1.01e996p+0) got 0x1.f45b42p-4 + want 0x1.f45b3cp-4. */ +svfloat32_t SV_NAME_F1 (acosh) (svfloat32_t x, const svbool_t pg) +{ + svuint32_t ix = svreinterpret_u32 (x); + svbool_t special = svcmpge (pg, svsub_x (pg, ix, One), Thres); + + svfloat32_t xm1 = svsub_x (pg, x, 1.0f); + svfloat32_t u = svmul_x (pg, xm1, svadd_x (pg, x, 1.0f)); + svfloat32_t y = sv_log1pf_inline (svadd_x (pg, xm1, svsqrt_x (pg, u)), pg); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, y, special); + return y; +} + +PL_SIG (SV, F, 1, acosh, 1.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (acosh), 2.29) +PL_TEST_INTERVAL (SV_NAME_F1 (acosh), 0, 1, 500) +PL_TEST_INTERVAL (SV_NAME_F1 (acosh), 1, 0x1p64, 100000) +PL_TEST_INTERVAL (SV_NAME_F1 (acosh), 0x1p64, inf, 1000) +PL_TEST_INTERVAL (SV_NAME_F1 (acosh), -0, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_asin_3u.c b/contrib/arm-optimized-routines/pl/math/sv_asin_3u.c new file mode 100644 index 000000000000..c3dd37b145ae --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_asin_3u.c @@ -0,0 +1,84 @@ +/* + * Double-precision SVE asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64_t poly[12]; + float64_t pi_over_2f; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) + on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57. */ + .poly = { 0x1.555555555554ep-3, 0x1.3333333337233p-4, + 0x1.6db6db67f6d9fp-5, 0x1.f1c71fbd29fbbp-6, + 0x1.6e8b264d467d6p-6, 0x1.1c5997c357e9dp-6, + 0x1.c86a22cd9389dp-7, 0x1.856073c22ebbep-7, + 0x1.fd1151acb6bedp-8, 0x1.087182f799c1dp-6, + -0x1.6602748120927p-7, 0x1.cfa0dd1f9478p-6, }, + .pi_over_2f = 0x1.921fb54442d18p+0, +}; + +#define P(i) sv_f64 (d->poly[i]) + +/* Double-precision SVE implementation of vector asin(x). + + For |x| in [0, 0.5], use an order 11 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 0.52 ulps, + _ZGVsMxv_asin(0x1.d95ae04998b6cp-2) got 0x1.ec13757305f27p-2 + want 0x1.ec13757305f26p-2. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + asin(x) = pi/2 - (y + y * z * P(z)), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 2.69 ulps, + _ZGVsMxv_asin(0x1.044ac9819f573p-1) got 0x1.110d7e85fdd5p-1 + want 0x1.110d7e85fdd53p-1. */ +svfloat64_t SV_NAME_D1 (asin) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint64_t sign = svand_x (pg, svreinterpret_u64 (x), 0x8000000000000000); + svfloat64_t ax = svabs_x (pg, x); + svbool_t a_ge_half = svacge (pg, x, 0.5); + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z = x ^ 2 and y = |x| , if |x| < 0.5 + z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5. */ + svfloat64_t z2 = svsel (a_ge_half, svmls_x (pg, sv_f64 (0.5), ax, 0.5), + svmul_x (pg, x, x)); + svfloat64_t z = svsqrt_m (ax, a_ge_half, z2); + + /* Use a single polynomial approximation P for both intervals. */ + svfloat64_t z4 = svmul_x (pg, z2, z2); + svfloat64_t z8 = svmul_x (pg, z4, z4); + svfloat64_t z16 = svmul_x (pg, z8, z8); + svfloat64_t p = sv_estrin_11_f64_x (pg, z2, z4, z8, z16, d->poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = svmla_x (pg, z, svmul_x (pg, z, z2), p); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + svfloat64_t y = svmad_m (a_ge_half, p, sv_f64 (-2.0), d->pi_over_2f); + + /* Copy sign. */ + return svreinterpret_f64 (svorr_x (pg, svreinterpret_u64 (y), sign)); +} + +PL_SIG (SV, D, 1, asin, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_D1 (asin), 2.19) +PL_TEST_INTERVAL (SV_NAME_D1 (asin), 0, 0.5, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (asin), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (asin), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (asin), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (SV_NAME_D1 (asin), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_asinf_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_asinf_2u5.c new file mode 100644 index 000000000000..8e9edc2439f5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_asinf_2u5.c @@ -0,0 +1,76 @@ +/* + * Single-precision SVE asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32_t poly[5]; + float32_t pi_over_2f; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on + [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */ + .poly = { 0x1.55555ep-3, 0x1.33261ap-4, 0x1.70d7dcp-5, 0x1.b059dp-6, + 0x1.3af7d8p-5, }, + .pi_over_2f = 0x1.921fb6p+0f, +}; + +/* Single-precision SVE implementation of vector asin(x). + + For |x| in [0, 0.5], use order 4 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 0.83 ulps, + _ZGVsMxv_asinf (0x1.ea00f4p-2) got 0x1.fef15ep-2 + want 0x1.fef15cp-2. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + asin(x) = pi/2 - (y + y * z * P(z)), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 2.41 ulps, + _ZGVsMxv_asinf (-0x1.00203ep-1) got -0x1.0c3a64p-1 + want -0x1.0c3a6p-1. */ +svfloat32_t SV_NAME_F1 (asin) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint32_t sign = svand_x (pg, svreinterpret_u32 (x), 0x80000000); + + svfloat32_t ax = svabs_x (pg, x); + svbool_t a_ge_half = svacge (pg, x, 0.5); + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z = x ^ 2 and y = |x| , if |x| < 0.5 + z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5. */ + svfloat32_t z2 = svsel (a_ge_half, svmls_x (pg, sv_f32 (0.5), ax, 0.5), + svmul_x (pg, x, x)); + svfloat32_t z = svsqrt_m (ax, a_ge_half, z2); + + /* Use a single polynomial approximation P for both intervals. */ + svfloat32_t p = sv_horner_4_f32_x (pg, z2, d->poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = svmla_x (pg, z, svmul_x (pg, z, z2), p); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + svfloat32_t y = svmad_m (a_ge_half, p, sv_f32 (-2.0), d->pi_over_2f); + + /* Copy sign. */ + return svreinterpret_f32 (svorr_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, asin, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_F1 (asin), 1.91) +PL_TEST_INTERVAL (SV_NAME_F1 (asin), 0, 0.5, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (asin), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (asin), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (asin), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (SV_NAME_F1 (asin), -0, -inf, 20000)
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/sv_asinh_3u0.c b/contrib/arm-optimized-routines/pl/math/sv_asinh_3u0.c new file mode 100644 index 000000000000..711f0dfdbedc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_asinh_3u0.c @@ -0,0 +1,129 @@ +/* + * Double-precision SVE asinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define OneTop sv_u64 (0x3ff) /* top12(asuint64(1.0f)). */ +#define HugeBound sv_u64 (0x5fe) /* top12(asuint64(0x1p511)). */ +#define TinyBound (0x3e5) /* top12(asuint64(0x1p-26)). */ +#define SignMask (0x8000000000000000) + +/* Constants & data for log. */ +#define A(i) __v_log_data.poly[i] +#define Ln2 (0x1.62e42fefa39efp-1) +#define N (1 << V_LOG_TABLE_BITS) +#define OFF (0x3fe6900900000000) + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (asinh, x, y, special); +} + +static inline svfloat64_t +__sv_log_inline (svfloat64_t x, const svbool_t pg) +{ + /* Double-precision SVE log, copied from pl/math/sv_log_2u5.c with some + cosmetic modification and special-cases removed. See that file for details + of the algorithm used. */ + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t tmp = svsub_x (pg, ix, OFF); + svuint64_t i + = svand_x (pg, svlsr_x (pg, tmp, (51 - V_LOG_TABLE_BITS)), (N - 1) << 1); + svint64_t k = svasr_x (pg, svreinterpret_s64 (tmp), 52); + svuint64_t iz = svsub_x (pg, ix, svand_x (pg, tmp, 0xfffULL << 52)); + svfloat64_t z = svreinterpret_f64 (iz); + svfloat64_t invc = svld1_gather_index (pg, &__v_log_data.table[0].invc, i); + svfloat64_t logc = svld1_gather_index (pg, &__v_log_data.table[0].logc, i); + svfloat64_t r = svmla_x (pg, sv_f64 (-1.0), invc, z); + svfloat64_t kd = svcvt_f64_x (pg, k); + svfloat64_t hi = svmla_x (pg, svadd_x (pg, logc, r), kd, Ln2); + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t y = svmla_x (pg, sv_f64 (A (2)), r, A (3)); + svfloat64_t p = svmla_x (pg, sv_f64 (A (0)), r, A (1)); + y = svmla_x (pg, y, r2, A (4)); + y = svmla_x (pg, p, r2, y); + y = svmla_x (pg, hi, r2, y); + return y; +} + +/* Double-precision implementation of SVE asinh(x). + asinh is very sensitive around 1, so it is impractical to devise a single + low-cost algorithm which is sufficiently accurate on a wide range of input. + Instead we use two different algorithms: + asinh(x) = sign(x) * log(|x| + sqrt(x^2 + 1) if |x| >= 1 + = sign(x) * (|x| + |x|^3 * P(x^2)) otherwise + where log(x) is an optimized log approximation, and P(x) is a polynomial + shared with the scalar routine. The greatest observed error 2.51 ULP, in + |x| >= 1: + _ZGVsMxv_asinh(0x1.170469d024505p+0) got 0x1.e3181c43b0f36p-1 + want 0x1.e3181c43b0f39p-1. */ +svfloat64_t SV_NAME_D1 (asinh) (svfloat64_t x, const svbool_t pg) +{ + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t iax = svbic_x (pg, ix, SignMask); + svuint64_t sign = svand_x (pg, ix, SignMask); + svfloat64_t ax = svreinterpret_f64 (iax); + svuint64_t top12 = svlsr_x (pg, iax, 52); + + svbool_t ge1 = svcmpge (pg, top12, OneTop); + svbool_t special = svcmpge (pg, top12, HugeBound); + + /* Option 1: |x| >= 1. + Compute asinh(x) according by asinh(x) = log(x + sqrt(x^2 + 1)). */ + svfloat64_t option_1 = sv_f64 (0); + if (likely (svptest_any (pg, ge1))) + { + svfloat64_t axax = svmul_x (pg, ax, ax); + option_1 = __sv_log_inline ( + svadd_x (pg, ax, svsqrt_x (pg, svadd_x (pg, axax, 1))), pg); + } + + /* Option 2: |x| < 1. + Compute asinh(x) using a polynomial. + The largest observed error in this region is 1.51 ULPs: + _ZGVsMxv_asinh(0x1.fe12bf8c616a2p-1) got 0x1.c1e649ee2681bp-1 + want 0x1.c1e649ee2681dp-1. */ + svfloat64_t option_2 = sv_f64 (0); + if (likely (svptest_any (pg, svnot_z (pg, ge1)))) + { + svfloat64_t x2 = svmul_x (pg, ax, ax); + svfloat64_t z2 = svmul_x (pg, x2, x2); + svfloat64_t z4 = svmul_x (pg, z2, z2); + svfloat64_t z8 = svmul_x (pg, z4, z4); + svfloat64_t z16 = svmul_x (pg, z8, z8); + svfloat64_t p + = sv_estrin_17_f64_x (pg, x2, z2, z4, z8, z16, __asinh_data.poly); + option_2 = svmla_x (pg, ax, p, svmul_x (pg, x2, ax)); + } + + /* Choose the right option for each lane. */ + svfloat64_t y = svsel (ge1, option_1, option_2); + + /* Apply sign of x to y. */ + y = svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (y), sign)); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, y, special); + return y; +} + +PL_SIG (SV, D, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (asinh), 2.52) +/* Test vector asinh 3 times, with control lane < 1, > 1 and special. + Ensures the svsel is choosing the right option in all cases. */ +#define SV_ASINH_INTERVAL(lo, hi, n) \ + PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (asinh), lo, hi, n, 0.5) \ + PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (asinh), lo, hi, n, 2) \ + PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (asinh), lo, hi, n, 0x1p600) +SV_ASINH_INTERVAL (0, 0x1p-26, 50000) +SV_ASINH_INTERVAL (0x1p-26, 1, 50000) +SV_ASINH_INTERVAL (1, 0x1p511, 50000) +SV_ASINH_INTERVAL (0x1p511, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_asinhf_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_asinhf_2u5.c new file mode 100644 index 000000000000..1f1f6e5c846f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_asinhf_2u5.c @@ -0,0 +1,55 @@ +/* + * Single-precision SVE asinh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "include/mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "sv_log1pf_inline.h" + +#define BigBound (0x5f800000) /* asuint(0x1p64). */ + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (asinhf, x, y, special); +} + +/* Single-precision SVE asinh(x) routine. Implements the same algorithm as + vector asinhf and log1p. + + Maximum error is 2.48 ULPs: + SV_NAME_F1 (asinh) (0x1.008864p-3) got 0x1.ffbbbcp-4 + want 0x1.ffbbb8p-4. */ +svfloat32_t SV_NAME_F1 (asinh) (svfloat32_t x, const svbool_t pg) +{ + svfloat32_t ax = svabs_x (pg, x); + svuint32_t iax = svreinterpret_u32 (ax); + svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax); + svbool_t special = svcmpge (pg, iax, BigBound); + + /* asinh(x) = log(x + sqrt(x * x + 1)). + For positive x, asinh(x) = log1p(x + x * x / (1 + sqrt(x * x + 1))). */ + svfloat32_t ax2 = svmul_x (pg, ax, ax); + svfloat32_t d = svadd_x (pg, svsqrt_x (pg, svadd_x (pg, ax2, 1.0f)), 1.0f); + svfloat32_t y + = sv_log1pf_inline (svadd_x (pg, ax, svdiv_x (pg, ax2, d)), pg); + + if (unlikely (svptest_any (pg, special))) + return special_case ( + x, svreinterpret_f32 (svorr_x (pg, sign, svreinterpret_u32 (y))), + special); + return svreinterpret_f32 (svorr_x (pg, sign, svreinterpret_u32 (y))); +} + +PL_SIG (SV, F, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (asinh), 1.98) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (asinh), 0, 0x1p-12, 4000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (asinh), 0x1p-12, 1.0, 20000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (asinh), 1.0, 0x1p64, 20000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (asinh), 0x1p64, inf, 4000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atan2_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_atan2_2u5.c new file mode 100644 index 000000000000..00530a324a76 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atan2_2u5.c @@ -0,0 +1,116 @@ +/* + * Double-precision vector atan2(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +static const struct data +{ + float64_t poly[20]; + float64_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-1022, 1.0]. */ + .poly = { -0x1.5555555555555p-2, 0x1.99999999996c1p-3, -0x1.2492492478f88p-3, + 0x1.c71c71bc3951cp-4, -0x1.745d160a7e368p-4, 0x1.3b139b6a88ba1p-4, + -0x1.11100ee084227p-4, 0x1.e1d0f9696f63bp-5, -0x1.aebfe7b418581p-5, + 0x1.842dbe9b0d916p-5, -0x1.5d30140ae5e99p-5, 0x1.338e31eb2fbbcp-5, + -0x1.00e6eece7de8p-5, 0x1.860897b29e5efp-6, -0x1.0051381722a59p-6, + 0x1.14e9dc19a4a4ep-7, -0x1.d0062b42fe3bfp-9, 0x1.17739e210171ap-10, + -0x1.ab24da7be7402p-13, 0x1.358851160a528p-16, }, + .pi_over_2 = 0x1.921fb54442d18p+0, +}; + +/* Useful constants. */ +#define SignMask sv_u64 (0x8000000000000000) + +/* Special cases i.e. 0, infinity, nan (fall back to scalar calls). */ +static svfloat64_t NOINLINE +special_case (svfloat64_t y, svfloat64_t x, svfloat64_t ret, + const svbool_t cmp) +{ + return sv_call2_f64 (atan2, y, x, ret, cmp); +} + +/* Returns a predicate indicating true if the input is the bit representation + of 0, infinity or nan. */ +static inline svbool_t +zeroinfnan (svuint64_t i, const svbool_t pg) +{ + return svcmpge (pg, svsub_x (pg, svlsl_x (pg, i, 1), 1), + sv_u64 (2 * asuint64 (INFINITY) - 1)); +} + +/* Fast implementation of SVE atan2. Errors are greatest when y and + x are reasonably close together. The greatest observed error is 2.28 ULP: + _ZGVsMxvv_atan2 (-0x1.5915b1498e82fp+732, 0x1.54d11ef838826p+732) + got -0x1.954f42f1fa841p-1 want -0x1.954f42f1fa843p-1. */ +svfloat64_t SV_NAME_D2 (atan2) (svfloat64_t y, svfloat64_t x, const svbool_t pg) +{ + const struct data *data_ptr = ptr_barrier (&data); + + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t iy = svreinterpret_u64 (y); + + svbool_t cmp_x = zeroinfnan (ix, pg); + svbool_t cmp_y = zeroinfnan (iy, pg); + svbool_t cmp_xy = svorr_z (pg, cmp_x, cmp_y); + + svuint64_t sign_x = svand_x (pg, ix, SignMask); + svuint64_t sign_y = svand_x (pg, iy, SignMask); + svuint64_t sign_xy = sveor_x (pg, sign_x, sign_y); + + svfloat64_t ax = svabs_x (pg, x); + svfloat64_t ay = svabs_x (pg, y); + + svbool_t pred_xlt0 = svcmplt (pg, x, 0.0); + svbool_t pred_aygtax = svcmpgt (pg, ay, ax); + + /* Set up z for call to atan. */ + svfloat64_t n = svsel (pred_aygtax, svneg_x (pg, ax), ay); + svfloat64_t d = svsel (pred_aygtax, ay, ax); + svfloat64_t z = svdiv_x (pg, n, d); + + /* Work out the correct shift. */ + svfloat64_t shift = svsel (pred_xlt0, sv_f64 (-2.0), sv_f64 (0.0)); + shift = svsel (pred_aygtax, svadd_x (pg, shift, 1.0), shift); + shift = svmul_x (pg, shift, data_ptr->pi_over_2); + + /* Use split Estrin scheme for P(z^2) with deg(P)=19. */ + svfloat64_t z2 = svmul_x (pg, z, z); + svfloat64_t x2 = svmul_x (pg, z2, z2); + svfloat64_t x4 = svmul_x (pg, x2, x2); + svfloat64_t x8 = svmul_x (pg, x4, x4); + + svfloat64_t ret = svmla_x ( + pg, sv_estrin_7_f64_x (pg, z2, x2, x4, data_ptr->poly), + sv_estrin_11_f64_x (pg, z2, x2, x4, x8, data_ptr->poly + 8), x8); + + /* y = shift + z + z^3 * P(z^2). */ + svfloat64_t z3 = svmul_x (pg, z2, z); + ret = svmla_x (pg, z, z3, ret); + + ret = svadd_m (pg, ret, shift); + + /* Account for the sign of x and y. */ + ret = svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (ret), sign_xy)); + + if (unlikely (svptest_any (pg, cmp_xy))) + return special_case (y, x, ret, cmp_xy); + + return ret; +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (SV, D, 2, atan2) +PL_TEST_ULP (SV_NAME_D2 (atan2), 1.78) +PL_TEST_INTERVAL (SV_NAME_D2 (atan2), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D2 (atan2), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D2 (atan2), 100, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_D2 (atan2), -0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atan2f_3u.c b/contrib/arm-optimized-routines/pl/math/sv_atan2f_3u.c new file mode 100644 index 000000000000..9ff73ecb74ba --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atan2f_3u.c @@ -0,0 +1,108 @@ +/* + * Single-precision vector atan2f(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +static const struct data +{ + float32_t poly[8]; + float32_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-128, 1.0]. */ + .poly = { -0x1.55555p-2f, 0x1.99935ep-3f, -0x1.24051ep-3f, 0x1.bd7368p-4f, + -0x1.491f0ep-4f, 0x1.93a2c0p-5f, -0x1.4c3c60p-6f, 0x1.01fd88p-8f }, + .pi_over_2 = 0x1.921fb6p+0f, +}; + +#define SignMask sv_u32 (0x80000000) + +/* Special cases i.e. 0, infinity, nan (fall back to scalar calls). */ +static inline svfloat32_t +special_case (svfloat32_t y, svfloat32_t x, svfloat32_t ret, + const svbool_t cmp) +{ + return sv_call2_f32 (atan2f, y, x, ret, cmp); +} + +/* Returns a predicate indicating true if the input is the bit representation + of 0, infinity or nan. */ +static inline svbool_t +zeroinfnan (svuint32_t i, const svbool_t pg) +{ + return svcmpge (pg, svsub_x (pg, svlsl_x (pg, i, 1), 1), + sv_u32 (2 * 0x7f800000lu - 1)); +} + +/* Fast implementation of SVE atan2f based on atan(x) ~ shift + z + z^3 * + P(z^2) with reduction to [0,1] using z=1/x and shift = pi/2. Maximum + observed error is 2.95 ULP: + _ZGVsMxvv_atan2f (0x1.93836cp+6, 0x1.8cae1p+6) got 0x1.967f06p-1 + want 0x1.967f00p-1. */ +svfloat32_t SV_NAME_F2 (atan2) (svfloat32_t y, svfloat32_t x, const svbool_t pg) +{ + const struct data *data_ptr = ptr_barrier (&data); + + svuint32_t ix = svreinterpret_u32 (x); + svuint32_t iy = svreinterpret_u32 (y); + + svbool_t cmp_x = zeroinfnan (ix, pg); + svbool_t cmp_y = zeroinfnan (iy, pg); + svbool_t cmp_xy = svorr_z (pg, cmp_x, cmp_y); + + svuint32_t sign_x = svand_x (pg, ix, SignMask); + svuint32_t sign_y = svand_x (pg, iy, SignMask); + svuint32_t sign_xy = sveor_x (pg, sign_x, sign_y); + + svfloat32_t ax = svabs_x (pg, x); + svfloat32_t ay = svabs_x (pg, y); + + svbool_t pred_xlt0 = svcmplt (pg, x, 0.0); + svbool_t pred_aygtax = svcmpgt (pg, ay, ax); + + /* Set up z for call to atan. */ + svfloat32_t n = svsel (pred_aygtax, svneg_x (pg, ax), ay); + svfloat32_t d = svsel (pred_aygtax, ay, ax); + svfloat32_t z = svdiv_x (pg, n, d); + + /* Work out the correct shift. */ + svfloat32_t shift = svsel (pred_xlt0, sv_f32 (-2.0), sv_f32 (0.0)); + shift = svsel (pred_aygtax, svadd_x (pg, shift, 1.0), shift); + shift = svmul_x (pg, shift, sv_f32 (data_ptr->pi_over_2)); + + /* Use split Estrin scheme for P(z^2) with deg(P)=7. */ + svfloat32_t z2 = svmul_x (pg, z, z); + svfloat32_t z4 = svmul_x (pg, z2, z2); + svfloat32_t z8 = svmul_x (pg, z4, z4); + + svfloat32_t ret = sv_estrin_7_f32_x (pg, z2, z4, z8, data_ptr->poly); + + /* ret = shift + z + z^3 * P(z^2). */ + svfloat32_t z3 = svmul_x (pg, z2, z); + ret = svmla_x (pg, z, z3, ret); + + ret = svadd_m (pg, ret, shift); + + /* Account for the sign of x and y. */ + ret = svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (ret), sign_xy)); + + if (unlikely (svptest_any (pg, cmp_xy))) + return special_case (y, x, ret, cmp_xy); + + return ret; +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (SV, F, 2, atan2) +PL_TEST_ULP (SV_NAME_F2 (atan2), 2.45) +PL_TEST_INTERVAL (SV_NAME_F2 (atan2), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (SV_NAME_F2 (atan2), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (SV_NAME_F2 (atan2), 100, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_F2 (atan2), -0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atan_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_atan_2u5.c new file mode 100644 index 000000000000..7ab486a4c9d2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atan_2u5.c @@ -0,0 +1,87 @@ +/* + * Double-precision vector atan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +static const struct data +{ + float64_t poly[20]; + float64_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-1022, 1.0]. */ + .poly = { -0x1.5555555555555p-2, 0x1.99999999996c1p-3, -0x1.2492492478f88p-3, + 0x1.c71c71bc3951cp-4, -0x1.745d160a7e368p-4, 0x1.3b139b6a88ba1p-4, + -0x1.11100ee084227p-4, 0x1.e1d0f9696f63bp-5, -0x1.aebfe7b418581p-5, + 0x1.842dbe9b0d916p-5, -0x1.5d30140ae5e99p-5, 0x1.338e31eb2fbbcp-5, + -0x1.00e6eece7de8p-5, 0x1.860897b29e5efp-6, -0x1.0051381722a59p-6, + 0x1.14e9dc19a4a4ep-7, -0x1.d0062b42fe3bfp-9, 0x1.17739e210171ap-10, + -0x1.ab24da7be7402p-13, 0x1.358851160a528p-16, }, + .pi_over_2 = 0x1.921fb54442d18p+0, +}; + +/* Useful constants. */ +#define SignMask (0x8000000000000000) + +/* Fast implementation of SVE atan. + Based on atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] using + z=1/x and shift = pi/2. Largest errors are close to 1. The maximum observed + error is 2.27 ulps: + _ZGVsMxv_atan (0x1.0005af27c23e9p+0) got 0x1.9225645bdd7c1p-1 + want 0x1.9225645bdd7c3p-1. */ +svfloat64_t SV_NAME_D1 (atan) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* No need to trigger special case. Small cases, infs and nans + are supported by our approximation technique. */ + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t sign = svand_x (pg, ix, SignMask); + + /* Argument reduction: + y := arctan(x) for x < 1 + y := pi/2 + arctan(-1/x) for x > 1 + Hence, use z=-1/a if x>=1, otherwise z=a. */ + svbool_t red = svacgt (pg, x, 1.0); + /* Avoid dependency in abs(x) in division (and comparison). */ + svfloat64_t z = svsel (red, svdivr_x (pg, x, 1.0), x); + /* Use absolute value only when needed (odd powers of z). */ + svfloat64_t az = svabs_x (pg, z); + az = svneg_m (az, red, az); + + /* Use split Estrin scheme for P(z^2) with deg(P)=19. */ + svfloat64_t z2 = svmul_x (pg, z, z); + svfloat64_t x2 = svmul_x (pg, z2, z2); + svfloat64_t x4 = svmul_x (pg, x2, x2); + svfloat64_t x8 = svmul_x (pg, x4, x4); + + svfloat64_t y + = svmla_x (pg, sv_estrin_7_f64_x (pg, z2, x2, x4, d->poly), + sv_estrin_11_f64_x (pg, z2, x2, x4, x8, d->poly + 8), x8); + + /* y = shift + z + z^3 * P(z^2). */ + svfloat64_t z3 = svmul_x (pg, z2, az); + y = svmla_x (pg, az, z3, y); + + /* Apply shift as indicated by `red` predicate. */ + y = svadd_m (red, y, d->pi_over_2); + + /* y = atan(x) if x>0, -atan(-x) otherwise. */ + y = svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (y), sign)); + + return y; +} + +PL_SIG (SV, D, 1, atan, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_D1 (atan), 1.78) +PL_TEST_INTERVAL (SV_NAME_D1 (atan), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (atan), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (atan), 100, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (atan), -0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atanf_2u9.c b/contrib/arm-optimized-routines/pl/math/sv_atanf_2u9.c new file mode 100644 index 000000000000..4defb356e7f9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atanf_2u9.c @@ -0,0 +1,76 @@ +/* + * Single-precision vector atan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +static const struct data +{ + float32_t poly[8]; + float32_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-128, 1.0]. */ + .poly = { -0x1.55555p-2f, 0x1.99935ep-3f, -0x1.24051ep-3f, 0x1.bd7368p-4f, + -0x1.491f0ep-4f, 0x1.93a2c0p-5f, -0x1.4c3c60p-6f, 0x1.01fd88p-8f }, + .pi_over_2 = 0x1.921fb6p+0f, +}; + +#define SignMask (0x80000000) + +/* Fast implementation of SVE atanf based on + atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] using + z=-1/x and shift = pi/2. + Largest observed error is 2.9 ULP, close to +/-1.0: + _ZGVsMxv_atanf (0x1.0468f6p+0) got -0x1.967f06p-1 + want -0x1.967fp-1. */ +svfloat32_t SV_NAME_F1 (atan) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* No need to trigger special case. Small cases, infs and nans + are supported by our approximation technique. */ + svuint32_t ix = svreinterpret_u32 (x); + svuint32_t sign = svand_x (pg, ix, SignMask); + + /* Argument reduction: + y := arctan(x) for x < 1 + y := pi/2 + arctan(-1/x) for x > 1 + Hence, use z=-1/a if x>=1, otherwise z=a. */ + svbool_t red = svacgt (pg, x, 1.0f); + /* Avoid dependency in abs(x) in division (and comparison). */ + svfloat32_t z = svsel (red, svdiv_x (pg, sv_f32 (1.0f), x), x); + /* Use absolute value only when needed (odd powers of z). */ + svfloat32_t az = svabs_x (pg, z); + az = svneg_m (az, red, az); + + /* Use split Estrin scheme for P(z^2) with deg(P)=7. */ + svfloat32_t z2 = svmul_x (pg, z, z); + svfloat32_t z4 = svmul_x (pg, z2, z2); + svfloat32_t z8 = svmul_x (pg, z4, z4); + + svfloat32_t y = sv_estrin_7_f32_x (pg, z2, z4, z8, d->poly); + + /* y = shift + z + z^3 * P(z^2). */ + svfloat32_t z3 = svmul_x (pg, z2, az); + y = svmla_x (pg, az, z3, y); + + /* Apply shift as indicated by 'red' predicate. */ + y = svadd_m (red, y, sv_f32 (d->pi_over_2)); + + /* y = atan(x) if x>0, -atan(-x) otherwise. */ + return svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, atan, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_F1 (atan), 2.9) +PL_TEST_INTERVAL (SV_NAME_F1 (atan), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (atan), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (atan), 100, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (atan), -0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atanh_3u3.c b/contrib/arm-optimized-routines/pl/math/sv_atanh_3u3.c new file mode 100644 index 000000000000..dcc9350b4962 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atanh_3u3.c @@ -0,0 +1,60 @@ +/* + * Double-precision SVE atanh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define WANT_SV_LOG1P_K0_SHORTCUT 0 +#include "sv_log1p_inline.h" + +#define One (0x3ff0000000000000) +#define Half (0x3fe0000000000000) + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (atanh, x, y, special); +} + +/* SVE approximation for double-precision atanh, based on log1p. + The greatest observed error is 2.81 ULP: + _ZGVsMxv_atanh(0x1.ffae6288b601p-6) got 0x1.ffd8ff31b5019p-6 + want 0x1.ffd8ff31b501cp-6. */ +svfloat64_t SV_NAME_D1 (atanh) (svfloat64_t x, const svbool_t pg) +{ + + svfloat64_t ax = svabs_x (pg, x); + svuint64_t iax = svreinterpret_u64 (ax); + svuint64_t sign = sveor_x (pg, svreinterpret_u64 (x), iax); + svfloat64_t halfsign = svreinterpret_f64 (svorr_x (pg, sign, Half)); + + /* It is special if iax >= 1. */ +// svbool_t special = svcmpge (pg, iax, One); + svbool_t special = svacge (pg, x, 1.0); + + /* Computation is performed based on the following sequence of equality: + (1+x)/(1-x) = 1 + 2x/(1-x). */ + svfloat64_t y; + y = svadd_x (pg, ax, ax); + y = svdiv_x (pg, y, svsub_x (pg, sv_f64 (1), ax)); + /* ln((1+x)/(1-x)) = ln(1+2x/(1-x)) = ln(1 + y). */ + y = sv_log1p_inline (y, pg); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmul_x (pg, halfsign, y), special); + return svmul_x (pg, halfsign, y); +} + +PL_SIG (SV, D, 1, atanh, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_D1 (atanh), 3.32) +/* atanh is asymptotic at 1, which is the default control value - have to set + -c 0 specially to ensure fp exceptions are triggered correctly (choice of + control lane is irrelevant if fp exceptions are disabled). */ +PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (atanh), 0, 0x1p-23, 10000, 0) +PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (atanh), 0x1p-23, 1, 90000, 0) +PL_TEST_SYM_INTERVAL_C (SV_NAME_D1 (atanh), 1, inf, 100, 0) diff --git a/contrib/arm-optimized-routines/pl/math/sv_atanhf_2u8.c b/contrib/arm-optimized-routines/pl/math/sv_atanhf_2u8.c new file mode 100644 index 000000000000..413c60ce05da --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_atanhf_2u8.c @@ -0,0 +1,56 @@ +/* + * Single-precision vector atanh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "sv_log1pf_inline.h" + +#define One (0x3f800000) +#define Half (0x3f000000) + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (atanhf, x, y, special); +} + +/* Approximation for vector single-precision atanh(x) using modified log1p. + The maximum error is 2.28 ULP: + _ZGVsMxv_atanhf(0x1.ff1194p-5) got 0x1.ffbbbcp-5 + want 0x1.ffbbb6p-5. */ +svfloat32_t SV_NAME_F1 (atanh) (svfloat32_t x, const svbool_t pg) +{ + svfloat32_t ax = svabs_x (pg, x); + svuint32_t iax = svreinterpret_u32 (ax); + svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax); + svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, Half)); + svbool_t special = svcmpge (pg, iax, One); + + /* Computation is performed based on the following sequence of equality: + * (1+x)/(1-x) = 1 + 2x/(1-x). */ + svfloat32_t y = svadd_x (pg, ax, ax); + y = svdiv_x (pg, y, svsub_x (pg, sv_f32 (1), ax)); + /* ln((1+x)/(1-x)) = ln(1+2x/(1-x)) = ln(1 + y). */ + y = sv_log1pf_inline (y, pg); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmul_x (pg, halfsign, y), special); + + return svmul_x (pg, halfsign, y); +} + +PL_SIG (SV, F, 1, atanh, -1.0, 1.0) +PL_TEST_ULP (SV_NAME_F1 (atanh), 2.59) +/* atanh is asymptotic at 1, which is the default control value - have to set + -c 0 specially to ensure fp exceptions are triggered correctly (choice of + control lane is irrelevant if fp exceptions are disabled). */ +PL_TEST_SYM_INTERVAL_C (SV_NAME_F1 (atanh), 0, 0x1p-12, 1000, 0) +PL_TEST_SYM_INTERVAL_C (SV_NAME_F1 (atanh), 0x1p-12, 1, 20000, 0) +PL_TEST_SYM_INTERVAL_C (SV_NAME_F1 (atanh), 1, inf, 1000, 0) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cbrt_2u.c b/contrib/arm-optimized-routines/pl/math/sv_cbrt_2u.c new file mode 100644 index 000000000000..192f1cd80d59 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cbrt_2u.c @@ -0,0 +1,122 @@ +/* + * Double-precision SVE cbrt(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +const static struct data +{ + float64_t poly[4]; + float64_t table[5]; + float64_t one_third, two_thirds, shift; + int64_t exp_bias; + uint64_t tiny_bound, thresh; +} data = { + /* Generated with FPMinimax in [0.5, 1]. */ + .poly = { 0x1.c14e8ee44767p-2, 0x1.dd2d3f99e4c0ep-1, -0x1.08e83026b7e74p-1, + 0x1.2c74eaa3ba428p-3, }, + /* table[i] = 2^((i - 2) / 3). */ + .table = { 0x1.428a2f98d728bp-1, 0x1.965fea53d6e3dp-1, 0x1p0, + 0x1.428a2f98d728bp0, 0x1.965fea53d6e3dp0, }, + .one_third = 0x1.5555555555555p-2, + .two_thirds = 0x1.5555555555555p-1, + .shift = 0x1.8p52, + .exp_bias = 1022, + .tiny_bound = 0x0010000000000000, /* Smallest normal. */ + .thresh = 0x7fe0000000000000, /* asuint64 (infinity) - tiny_bound. */ +}; + +#define MantissaMask 0x000fffffffffffff +#define HalfExp 0x3fe0000000000000 + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (cbrt, x, y, special); +} + +static inline svfloat64_t +shifted_lookup (const svbool_t pg, const float64_t *table, svint64_t i) +{ + return svld1_gather_index (pg, table, svadd_x (pg, i, 2)); +} + +/* Approximation for double-precision vector cbrt(x), using low-order + polynomial and two Newton iterations. Greatest observed error is 1.79 ULP. + Errors repeat according to the exponent, for instance an error observed for + double value m * 2^e will be observed for any input m * 2^(e + 3*i), where i + is an integer. + _ZGVsMxv_cbrt (0x0.3fffb8d4413f3p-1022) got 0x1.965f53b0e5d97p-342 + want 0x1.965f53b0e5d95p-342. */ +svfloat64_t SV_NAME_D1 (cbrt) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat64_t ax = svabs_x (pg, x); + svuint64_t iax = svreinterpret_u64 (ax); + svuint64_t sign = sveor_x (pg, svreinterpret_u64 (x), iax); + + /* Subnormal, +/-0 and special values. */ + svbool_t special = svcmpge (pg, svsub_x (pg, iax, d->tiny_bound), d->thresh); + + /* Decompose |x| into m * 2^e, where m is in [0.5, 1.0]. This is a vector + version of frexp, which gets subnormal values wrong - these have to be + special-cased as a result. */ + svfloat64_t m = svreinterpret_f64 (svorr_x ( + pg, svand_x (pg, svreinterpret_u64 (x), MantissaMask), HalfExp)); + svint64_t e + = svsub_x (pg, svreinterpret_s64 (svlsr_x (pg, iax, 52)), d->exp_bias); + + /* Calculate rough approximation for cbrt(m) in [0.5, 1.0], starting point + for Newton iterations. */ + svfloat64_t p + = sv_pairwise_poly_3_f64_x (pg, m, svmul_x (pg, m, m), d->poly); + + /* Two iterations of Newton's method for iteratively approximating cbrt. */ + svfloat64_t m_by_3 = svmul_x (pg, m, d->one_third); + svfloat64_t a = svmla_x (pg, svdiv_x (pg, m_by_3, svmul_x (pg, p, p)), p, + d->two_thirds); + a = svmla_x (pg, svdiv_x (pg, m_by_3, svmul_x (pg, a, a)), a, d->two_thirds); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + We can get 2 ^ round(e / 3) using ldexp and integer divide, but since e is + not necessarily a multiple of 3 we lose some information. + + Let q = 2 ^ round(e / 3), then t = 2 ^ (e / 3) / q. + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3, which + is an integer in [-2, 2], and can be looked up in the table T. Hence the + result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. */ + svfloat64_t eb3f = svmul_x (pg, svcvt_f64_x (pg, e), d->one_third); + svint64_t ey = svcvt_s64_x (pg, eb3f); + svint64_t em3 = svmls_x (pg, e, ey, 3); + + svfloat64_t my = shifted_lookup (pg, d->table, em3); + my = svmul_x (pg, my, a); + + /* Vector version of ldexp. */ + svfloat64_t y = svscale_x (pg, my, ey); + + if (unlikely (svptest_any (pg, special))) + return special_case ( + x, svreinterpret_f64 (svorr_x (pg, svreinterpret_u64 (y), sign)), + special); + + /* Copy sign. */ + return svreinterpret_f64 (svorr_x (pg, svreinterpret_u64 (y), sign)); +} + +PL_SIG (SV, D, 1, cbrt, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (cbrt), 1.30) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cbrt), 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cbrtf_1u7.c b/contrib/arm-optimized-routines/pl/math/sv_cbrtf_1u7.c new file mode 100644 index 000000000000..5b625f308827 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cbrtf_1u7.c @@ -0,0 +1,116 @@ +/* + * Single-precision SVE cbrt(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +const static struct data +{ + float32_t poly[4]; + float32_t table[5]; + float32_t one_third, two_thirds; +} data = { + /* Very rough approximation of cbrt(x) in [0.5, 1], generated with FPMinimax. + */ + .poly = { 0x1.c14e96p-2, 0x1.dd2d3p-1, -0x1.08e81ap-1, + 0x1.2c74c2p-3, }, + /* table[i] = 2^((i - 2) / 3). */ + .table = { 0x1.428a3p-1, 0x1.965feap-1, 0x1p0, 0x1.428a3p0, 0x1.965feap0 }, + .one_third = 0x1.555556p-2f, + .two_thirds = 0x1.555556p-1f, +}; + +#define SmallestNormal 0x00800000 +#define Thresh 0x7f000000 /* asuint(INFINITY) - SmallestNormal. */ +#define MantissaMask 0x007fffff +#define HalfExp 0x3f000000 + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (cbrtf, x, y, special); +} + +static inline svfloat32_t +shifted_lookup (const svbool_t pg, const float32_t *table, svint32_t i) +{ + return svld1_gather_index (pg, table, svadd_x (pg, i, 2)); +} + +/* Approximation for vector single-precision cbrt(x) using Newton iteration + with initial guess obtained by a low-order polynomial. Greatest error + is 1.64 ULP. This is observed for every value where the mantissa is + 0x1.85a2aa and the exponent is a multiple of 3, for example: + _ZGVsMxv_cbrtf (0x1.85a2aap+3) got 0x1.267936p+1 + want 0x1.267932p+1. */ +svfloat32_t SV_NAME_F1 (cbrt) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat32_t ax = svabs_x (pg, x); + svuint32_t iax = svreinterpret_u32 (ax); + svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax); + + /* Subnormal, +/-0 and special values. */ + svbool_t special = svcmpge (pg, svsub_x (pg, iax, SmallestNormal), Thresh); + + /* Decompose |x| into m * 2^e, where m is in [0.5, 1.0]. This is a vector + version of frexpf, which gets subnormal values wrong - these have to be + special-cased as a result. */ + svfloat32_t m = svreinterpret_f32 (svorr_x ( + pg, svand_x (pg, svreinterpret_u32 (x), MantissaMask), HalfExp)); + svint32_t e = svsub_x (pg, svreinterpret_s32 (svlsr_x (pg, iax, 23)), 126); + + /* p is a rough approximation for cbrt(m) in [0.5, 1.0]. The better this is, + the less accurate the next stage of the algorithm needs to be. An order-4 + polynomial is enough for one Newton iteration. */ + svfloat32_t p + = sv_pairwise_poly_3_f32_x (pg, m, svmul_x (pg, m, m), d->poly); + + /* One iteration of Newton's method for iteratively approximating cbrt. */ + svfloat32_t m_by_3 = svmul_x (pg, m, d->one_third); + svfloat32_t a = svmla_x (pg, svdiv_x (pg, m_by_3, svmul_x (pg, p, p)), p, + d->two_thirds); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + We can get 2 ^ round(e / 3) using ldexp and integer divide, but since e is + not necessarily a multiple of 3 we lose some information. + + Let q = 2 ^ round(e / 3), then t = 2 ^ (e / 3) / q. + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3, which + is an integer in [-2, 2], and can be looked up in the table T. Hence the + result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. */ + svfloat32_t ef = svmul_x (pg, svcvt_f32_x (pg, e), d->one_third); + svint32_t ey = svcvt_s32_x (pg, ef); + svint32_t em3 = svmls_x (pg, e, ey, 3); + + svfloat32_t my = shifted_lookup (pg, d->table, em3); + my = svmul_x (pg, my, a); + + /* Vector version of ldexpf. */ + svfloat32_t y = svscale_x (pg, my, ey); + + if (unlikely (svptest_any (pg, special))) + return special_case ( + x, svreinterpret_f32 (svorr_x (pg, svreinterpret_u32 (y), sign)), + special); + + /* Copy sign. */ + return svreinterpret_f32 (svorr_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, cbrt, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (cbrt), 1.15) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cbrt), 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cexpi_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_cexpi_3u5.c new file mode 100644 index 000000000000..920acfea5da0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cexpi_3u5.c @@ -0,0 +1,45 @@ +/* + * Double-precision vector cexpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_sincos_common.h" +#include "sv_math.h" +#include "pl_test.h" + +static svfloat64x2_t NOINLINE +special_case (svfloat64_t x, svbool_t special, svfloat64x2_t y) +{ + return svcreate2 (sv_call_f64 (sin, x, svget2 (y, 0), special), + sv_call_f64 (cos, x, svget2 (y, 1), special)); +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + sv_cexpi_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +svfloat64x2_t +_ZGVsMxv_cexpi (svfloat64_t x, svbool_t pg) +{ + const struct sv_sincos_data *d = ptr_barrier (&sv_sincos_data); + svbool_t special = check_ge_rangeval (pg, x, d); + + svfloat64x2_t sc = sv_sincos_inline (pg, x, d); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, special, sc); + return sc; +} + +PL_TEST_ULP (_ZGVsMxv_cexpi_sin, 2.73) +PL_TEST_ULP (_ZGVsMxv_cexpi_cos, 2.73) +#define SV_CEXPI_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_cexpi_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_cexpi_cos, lo, hi, n) +SV_CEXPI_INTERVAL (0, 0x1p23, 500000) +SV_CEXPI_INTERVAL (-0, -0x1p23, 500000) +SV_CEXPI_INTERVAL (0x1p23, inf, 10000) +SV_CEXPI_INTERVAL (-0x1p23, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cexpif_1u8.c b/contrib/arm-optimized-routines/pl/math/sv_cexpif_1u8.c new file mode 100644 index 000000000000..93f2f998cb38 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cexpif_1u8.c @@ -0,0 +1,47 @@ +/* + * Single-precision vector cexpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_sincosf_common.h" +#include "sv_math.h" +#include "pl_test.h" + +static svfloat32x2_t NOINLINE +special_case (svfloat32_t x, svbool_t special, svfloat32x2_t y) +{ + return svcreate2 (sv_call_f32 (sinf, x, svget2 (y, 0), special), + sv_call_f32 (cosf, x, svget2 (y, 1), special)); +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + v_cexpif_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + v_cexpif_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +svfloat32x2_t +_ZGVsMxv_cexpif (svfloat32_t x, svbool_t pg) +{ + const struct sv_sincosf_data *d = ptr_barrier (&sv_sincosf_data); + svbool_t special = check_ge_rangeval (pg, x, d); + + svfloat32x2_t sc = sv_sincosf_inline (pg, x, d); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, special, sc); + return sc; +} + +PL_TEST_ULP (_ZGVsMxv_cexpif_sin, 1.17) +PL_TEST_ULP (_ZGVsMxv_cexpif_cos, 1.31) +#define SV_CEXPIF_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_cexpif_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_cexpif_cos, lo, hi, n) +SV_CEXPIF_INTERVAL (0, 0x1p20, 500000) +SV_CEXPIF_INTERVAL (-0, -0x1p20, 500000) +SV_CEXPIF_INTERVAL (0x1p20, inf, 10000) +SV_CEXPIF_INTERVAL (-0x1p20, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cos_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_cos_2u5.c new file mode 100644 index 000000000000..76af3459b3f2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cos_2u5.c @@ -0,0 +1,86 @@ +/* + * Double-precision SVE cos(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double inv_pio2, pio2_1, pio2_2, pio2_3, shift; +} data = { + /* Polynomial coefficients are hardwired in FTMAD instructions. */ + .inv_pio2 = 0x1.45f306dc9c882p-1, + .pio2_1 = 0x1.921fb50000000p+0, + .pio2_2 = 0x1.110b460000000p-26, + .pio2_3 = 0x1.1a62633145c07p-54, + /* Original shift used in AdvSIMD cos, + plus a contribution to set the bit #0 of q + as expected by trigonometric instructions. */ + .shift = 0x1.8000000000001p52 +}; + +#define RangeVal 0x4160000000000000 /* asuint64 (0x1p23). */ + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t oob) +{ + return sv_call_f64 (cos, x, y, oob); +} + +/* A fast SVE implementation of cos based on trigonometric + instructions (FTMAD, FTSSEL, FTSMUL). + Maximum measured error: 2.108 ULPs. + SV_NAME_D1 (cos)(0x1.9b0ba158c98f3p+7) got -0x1.fddd4c65c7f07p-3 + want -0x1.fddd4c65c7f05p-3. */ +svfloat64_t SV_NAME_D1 (cos) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat64_t r = svabs_x (pg, x); + svbool_t oob = svcmpge (pg, svreinterpret_u64 (r), RangeVal); + + /* Load some constants in quad-word chunks to minimise memory access. */ + svbool_t ptrue = svptrue_b64 (); + svfloat64_t invpio2_and_pio2_1 = svld1rq (ptrue, &d->inv_pio2); + svfloat64_t pio2_23 = svld1rq (ptrue, &d->pio2_2); + + /* n = rint(|x|/(pi/2)). */ + svfloat64_t q = svmla_lane (sv_f64 (d->shift), r, invpio2_and_pio2_1, 0); + svfloat64_t n = svsub_x (pg, q, d->shift); + + /* r = |x| - n*(pi/2) (range reduction into -pi/4 .. pi/4). */ + r = svmls_lane (r, n, invpio2_and_pio2_1, 1); + r = svmls_lane (r, n, pio2_23, 0); + r = svmls_lane (r, n, pio2_23, 1); + + /* cos(r) poly approx. */ + svfloat64_t r2 = svtsmul (r, svreinterpret_u64 (q)); + svfloat64_t y = sv_f64 (0.0); + y = svtmad (y, r2, 7); + y = svtmad (y, r2, 6); + y = svtmad (y, r2, 5); + y = svtmad (y, r2, 4); + y = svtmad (y, r2, 3); + y = svtmad (y, r2, 2); + y = svtmad (y, r2, 1); + y = svtmad (y, r2, 0); + + /* Final multiplicative factor: 1.0 or x depending on bit #0 of q. */ + svfloat64_t f = svtssel (r, svreinterpret_u64 (q)); + + if (unlikely (svptest_any (pg, oob))) + return special_case (x, svmul_x (svnot_z (pg, oob), y, f), oob); + + /* Apply factor. */ + return svmul_x (pg, f, y); +} + +PL_SIG (SV, D, 1, cos, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_D1 (cos), 1.61) +PL_TEST_INTERVAL (SV_NAME_D1 (cos), 0, 0xffff0000, 10000) +PL_TEST_INTERVAL (SV_NAME_D1 (cos), 0x1p-4, 0x1p4, 500000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cosf_2u1.c b/contrib/arm-optimized-routines/pl/math/sv_cosf_2u1.c new file mode 100644 index 000000000000..4bdb0dd146bb --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cosf_2u1.c @@ -0,0 +1,80 @@ +/* + * Single-precision SVE cos(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float neg_pio2_1, neg_pio2_2, neg_pio2_3, inv_pio2, shift; +} data = { + /* Polynomial coefficients are hard-wired in FTMAD instructions. */ + .neg_pio2_1 = -0x1.921fb6p+0f, + .neg_pio2_2 = 0x1.777a5cp-25f, + .neg_pio2_3 = 0x1.ee59dap-50f, + .inv_pio2 = 0x1.45f306p-1f, + /* Original shift used in AdvSIMD cosf, + plus a contribution to set the bit #0 of q + as expected by trigonometric instructions. */ + .shift = 0x1.800002p+23f +}; + +#define RangeVal 0x49800000 /* asuint32(0x1p20f). */ + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t oob) +{ + return sv_call_f32 (cosf, x, y, oob); +} + +/* A fast SVE implementation of cosf based on trigonometric + instructions (FTMAD, FTSSEL, FTSMUL). + Maximum measured error: 2.06 ULPs. + SV_NAME_F1 (cos)(0x1.dea2f2p+19) got 0x1.fffe7ap-6 + want 0x1.fffe76p-6. */ +svfloat32_t SV_NAME_F1 (cos) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat32_t r = svabs_x (pg, x); + svbool_t oob = svcmpge (pg, svreinterpret_u32 (r), RangeVal); + + /* Load some constants in quad-word chunks to minimise memory access. */ + svfloat32_t negpio2_and_invpio2 = svld1rq (svptrue_b32 (), &d->neg_pio2_1); + + /* n = rint(|x|/(pi/2)). */ + svfloat32_t q = svmla_lane (sv_f32 (d->shift), r, negpio2_and_invpio2, 3); + svfloat32_t n = svsub_x (pg, q, d->shift); + + /* r = |x| - n*(pi/2) (range reduction into -pi/4 .. pi/4). */ + r = svmla_lane (r, n, negpio2_and_invpio2, 0); + r = svmla_lane (r, n, negpio2_and_invpio2, 1); + r = svmla_lane (r, n, negpio2_and_invpio2, 2); + + /* Final multiplicative factor: 1.0 or x depending on bit #0 of q. */ + svfloat32_t f = svtssel (r, svreinterpret_u32 (q)); + + /* cos(r) poly approx. */ + svfloat32_t r2 = svtsmul (r, svreinterpret_u32 (q)); + svfloat32_t y = sv_f32 (0.0f); + y = svtmad (y, r2, 4); + y = svtmad (y, r2, 3); + y = svtmad (y, r2, 2); + y = svtmad (y, r2, 1); + y = svtmad (y, r2, 0); + + if (unlikely (svptest_any (pg, oob))) + return special_case (x, svmul_x (svnot_z (pg, oob), f, y), oob); + /* Apply factor. */ + return svmul_x (pg, f, y); +} + +PL_SIG (SV, F, 1, cos, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_F1 (cos), 1.57) +PL_TEST_INTERVAL (SV_NAME_F1 (cos), 0, 0xffff0000, 10000) +PL_TEST_INTERVAL (SV_NAME_F1 (cos), 0x1p-4, 0x1p4, 500000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cosh_2u.c b/contrib/arm-optimized-routines/pl/math/sv_cosh_2u.c new file mode 100644 index 000000000000..a6d743fb9b96 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cosh_2u.c @@ -0,0 +1,100 @@ +/* + * Double-precision SVE cosh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64_t poly[3]; + float64_t inv_ln2, ln2_hi, ln2_lo, shift, thres; + uint64_t index_mask, special_bound; +} data = { + .poly = { 0x1.fffffffffffd4p-2, 0x1.5555571d6b68cp-3, + 0x1.5555576a59599p-5, }, + + .inv_ln2 = 0x1.71547652b82fep8, /* N/ln2. */ + /* -ln2/N. */ + .ln2_hi = -0x1.62e42fefa39efp-9, + .ln2_lo = -0x1.abc9e3b39803f3p-64, + .shift = 0x1.8p+52, + .thres = 704.0, + + .index_mask = 0xff, + /* 0x1.6p9, above which exp overflows. */ + .special_bound = 0x4086000000000000, +}; + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (cosh, x, y, special); +} + +/* Helper for approximating exp(x). Copied from sv_exp_tail, with no + special-case handling or tail. */ +static inline svfloat64_t +exp_inline (svfloat64_t x, const svbool_t pg, const struct data *d) +{ + /* Calculate exp(x). */ + svfloat64_t z = svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2); + svfloat64_t n = svsub_x (pg, z, d->shift); + + svfloat64_t r = svmla_x (pg, x, n, d->ln2_hi); + r = svmla_x (pg, r, n, d->ln2_lo); + + svuint64_t u = svreinterpret_u64 (z); + svuint64_t e = svlsl_x (pg, u, 52 - V_EXP_TAIL_TABLE_BITS); + svuint64_t i = svand_x (pg, u, d->index_mask); + + svfloat64_t y = svmla_x (pg, sv_f64 (d->poly[1]), r, d->poly[2]); + y = svmla_x (pg, sv_f64 (d->poly[0]), r, y); + y = svmla_x (pg, sv_f64 (1.0), r, y); + y = svmul_x (pg, r, y); + + /* s = 2^(n/N). */ + u = svld1_gather_index (pg, __v_exp_tail_data, i); + svfloat64_t s = svreinterpret_f64 (svadd_x (pg, u, e)); + + return svmla_x (pg, s, s, y); +} + +/* Approximation for SVE double-precision cosh(x) using exp_inline. + cosh(x) = (exp(x) + exp(-x)) / 2. + The greatest observed error is in the scalar fall-back region, so is the + same as the scalar routine, 1.93 ULP: + _ZGVsMxv_cosh (0x1.628ad45039d2fp+9) got 0x1.fd774e958236dp+1021 + want 0x1.fd774e958236fp+1021. + + The greatest observed error in the non-special region is 1.54 ULP: + _ZGVsMxv_cosh (0x1.ba5651dd4486bp+2) got 0x1.f5e2bb8d5c98fp+8 + want 0x1.f5e2bb8d5c991p+8. */ +svfloat64_t SV_NAME_D1 (cosh) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat64_t ax = svabs_x (pg, x); + svbool_t special = svcmpgt (pg, svreinterpret_u64 (ax), d->special_bound); + + /* Up to the point that exp overflows, we can use it to calculate cosh by + exp(|x|) / 2 + 1 / (2 * exp(|x|)). */ + svfloat64_t t = exp_inline (ax, pg, d); + svfloat64_t half_t = svmul_x (pg, t, 0.5); + svfloat64_t half_over_t = svdivr_x (pg, t, 0.5); + + /* Fall back to scalar for any special cases. */ + if (unlikely (svptest_any (pg, special))) + return special_case (x, svadd_x (pg, half_t, half_over_t), special); + + return svadd_x (pg, half_t, half_over_t); +} + +PL_SIG (SV, D, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (cosh), 1.43) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cosh), 0, 0x1.6p9, 100000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cosh), 0x1.6p9, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_coshf_2u.c b/contrib/arm-optimized-routines/pl/math/sv_coshf_2u.c new file mode 100644 index 000000000000..81680fef318e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_coshf_2u.c @@ -0,0 +1,56 @@ +/* + * Single-precision SVE cosh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "sv_expf_inline.h" + +static const struct data +{ + struct sv_expf_data expf_consts; + uint32_t special_bound; +} data = { + .expf_consts = SV_EXPF_DATA, + /* 0x1.5a92d8p+6: expf overflows above this, so have to use special case. */ + .special_bound = 0x42ad496c, +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t pg) +{ + return sv_call_f32 (coshf, x, y, pg); +} + +/* Single-precision vector cosh, using vector expf. + Maximum error is 1.89 ULP: + _ZGVsMxv_coshf (-0x1.65898cp+6) got 0x1.f00aep+127 + want 0x1.f00adcp+127. */ +svfloat32_t SV_NAME_F1 (cosh) (svfloat32_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat32_t ax = svabs_x (pg, x); + svbool_t special = svcmpge (pg, svreinterpret_u32 (ax), d->special_bound); + + /* Calculate cosh by exp(x) / 2 + exp(-x) / 2. */ + svfloat32_t t = expf_inline (ax, pg, &d->expf_consts); + svfloat32_t half_t = svmul_x (pg, t, 0.5); + svfloat32_t half_over_t = svdivr_x (pg, t, 0.5); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svadd_x (pg, half_t, half_over_t), special); + + return svadd_x (pg, half_t, half_over_t); +} + +PL_SIG (SV, F, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (cosh), 1.39) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cosh), 0, 0x1p-63, 100) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cosh), 0, 0x1.5a92d8p+6, 80000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cosh), 0x1.5a92d8p+6, inf, 2000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cospi_3u2.c b/contrib/arm-optimized-routines/pl/math/sv_cospi_3u2.c new file mode 100644 index 000000000000..d80f899c41e4 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cospi_3u2.c @@ -0,0 +1,63 @@ +/* + * Double-precision SVE cospi(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +static const struct data +{ + double poly[10]; + double range_val; +} data = { + /* Polynomial coefficients generated using Remez algorithm, + see sinpi.sollya for details. */ + .poly = { 0x1.921fb54442d184p1, -0x1.4abbce625be53p2, 0x1.466bc6775ab16p1, + -0x1.32d2cce62dc33p-1, 0x1.507834891188ep-4, -0x1.e30750a28c88ep-8, + 0x1.e8f48308acda4p-12, -0x1.6fc0032b3c29fp-16, + 0x1.af86ae521260bp-21, -0x1.012a9870eeb7dp-25 }, + .range_val = 0x1p53, +}; + +/* A fast SVE implementation of cospi. + Maximum error 3.20 ULP: + _ZGVsMxv_cospi(0x1.f18ba32c63159p-6) got 0x1.fdabf595f9763p-1 + want 0x1.fdabf595f9766p-1. */ +svfloat64_t SV_NAME_D1 (cospi) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Using cospi(x) = sinpi(0.5 - x) + range reduction and offset into sinpi range -1/2 .. 1/2 + r = 0.5 - |x - rint(x)|. */ + svfloat64_t n = svrinta_x (pg, x); + svfloat64_t r = svsub_x (pg, x, n); + r = svsub_x (pg, sv_f64 (0.5), svabs_x (pg, r)); + + /* Result should be negated based on if n is odd or not. + If ax >= 2^53, the result will always be positive. */ + svbool_t cmp = svaclt (pg, x, d->range_val); + svuint64_t intn = svreinterpret_u64 (svcvt_s64_z (pg, n)); + svuint64_t sign = svlsl_z (cmp, intn, 63); + + /* y = sin(r). */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t r4 = svmul_x (pg, r2, r2); + svfloat64_t y = sv_pw_horner_9_f64_x (pg, r2, r4, d->poly); + y = svmul_x (pg, y, r); + + return svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (y), sign)); +} + +PL_SIG (SV, D, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (SV_NAME_D1 (cospi), 2.71) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cospi), 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cospi), 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cospi), 0.5, 0x1p51, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (cospi), 0x1p51, inf, 100000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_cospif_2u6.c b/contrib/arm-optimized-routines/pl/math/sv_cospif_2u6.c new file mode 100644 index 000000000000..fb2922d0533a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_cospif_2u6.c @@ -0,0 +1,59 @@ +/* + * Single-precision SVE cospi(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +static const struct data +{ + float poly[6]; + float range_val; +} data = { + /* Taylor series coefficents for sin(pi * x). */ + .poly = { 0x1.921fb6p1f, -0x1.4abbcep2f, 0x1.466bc6p1f, -0x1.32d2ccp-1f, + 0x1.50783p-4f, -0x1.e30750p-8f }, + .range_val = 0x1p31f, +}; + +/* A fast SVE implementation of cospif. + Maximum error: 2.60 ULP: + _ZGVsMxv_cospif(+/-0x1.cae664p-4) got 0x1.e09c9ep-1 + want 0x1.e09c98p-1. */ +svfloat32_t SV_NAME_F1 (cospi) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Using cospi(x) = sinpi(0.5 - x) + range reduction and offset into sinpi range -1/2 .. 1/2 + r = 0.5 - |x - rint(x)|. */ + svfloat32_t n = svrinta_x (pg, x); + svfloat32_t r = svsub_x (pg, x, n); + r = svsub_x (pg, sv_f32 (0.5f), svabs_x (pg, r)); + + /* Result should be negated based on if n is odd or not. + If ax >= 2^31, the result will always be positive. */ + svbool_t cmp = svaclt (pg, x, d->range_val); + svuint32_t intn = svreinterpret_u32 (svcvt_s32_x (pg, n)); + svuint32_t sign = svlsl_z (cmp, intn, 31); + + /* y = sin(r). */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t y = sv_horner_5_f32_x (pg, r2, d->poly); + y = svmul_x (pg, y, r); + + return svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (SV_NAME_F1 (cospi), 2.08) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cospi), 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cospi), 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cospi), 0.5, 0x1p31f, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (cospi), 0x1p31f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_erf_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_erf_2u5.c new file mode 100644 index 000000000000..cbf9718e5bb0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erf_2u5.c @@ -0,0 +1,111 @@ +/* + * Double-precision vector erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double third; + double tenth, two_over_five, two_over_fifteen; + double two_over_nine, two_over_fortyfive; + double max, shift; +} data = { + .third = 0x1.5555555555556p-2, /* used to compute 2/3 and 1/6 too. */ + .two_over_fifteen = 0x1.1111111111111p-3, + .tenth = -0x1.999999999999ap-4, + .two_over_five = -0x1.999999999999ap-2, + .two_over_nine = -0x1.c71c71c71c71cp-3, + .two_over_fortyfive = 0x1.6c16c16c16c17p-5, + .max = 5.9921875, /* 6 - 1/128. */ + .shift = 0x1p45, +}; + +#define SignMask (0x8000000000000000) + +/* Double-precision implementation of vector erf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + erf(x) ~ erf(r) + scale * d * [ + + 1 + - r d + + 1/3 (2 r^2 - 1) d^2 + - 1/6 (r (2 r^2 - 3)) d^3 + + 1/30 (4 r^4 - 12 r^2 + 3) d^4 + - 1/90 (4 r^4 - 20 r^2 + 15) d^5 + ] + + Maximum measure error: 2.29 ULP + _ZGVsMxv_erf(-0x1.00003c924e5d1p-8) got -0x1.20dd59132ebadp-8 + want -0x1.20dd59132ebafp-8. */ +svfloat64_t SV_NAME_D1 (erf) (svfloat64_t x, const svbool_t pg) +{ + const struct data *dat = ptr_barrier (&data); + + /* |x| >= 6.0 - 1/128. Opposite conditions except none of them catch NaNs so + they can be used in lookup and BSLs to yield the expected results. */ + svbool_t a_ge_max = svacge (pg, x, dat->max); + svbool_t a_lt_max = svaclt (pg, x, dat->max); + + /* Set r to multiple of 1/128 nearest to |x|. */ + svfloat64_t a = svabs_x (pg, x); + svfloat64_t shift = sv_f64 (dat->shift); + svfloat64_t z = svadd_x (pg, a, shift); + svuint64_t i + = svsub_x (pg, svreinterpret_u64 (z), svreinterpret_u64 (shift)); + + /* Lookup without shortcut for small values but with predicate to avoid + segfault for large values and NaNs. */ + svfloat64_t r = svsub_x (pg, z, shift); + svfloat64_t erfr = svld1_gather_index (a_lt_max, __sv_erf_data.erf, i); + svfloat64_t scale = svld1_gather_index (a_lt_max, __sv_erf_data.scale, i); + + /* erf(x) ~ erf(r) + scale * d * poly (r, d). */ + svfloat64_t d = svsub_x (pg, a, r); + svfloat64_t d2 = svmul_x (pg, d, d); + svfloat64_t r2 = svmul_x (pg, r, r); + + /* poly (d, r) = 1 + p1(r) * d + p2(r) * d^2 + ... + p5(r) * d^5. */ + svfloat64_t p1 = r; + svfloat64_t third = sv_f64 (dat->third); + svfloat64_t twothird = svmul_x (pg, third, 2.0); + svfloat64_t sixth = svmul_x (pg, third, 0.5); + svfloat64_t p2 = svmls_x (pg, third, r2, twothird); + svfloat64_t p3 = svmad_x (pg, r2, third, -0.5); + p3 = svmul_x (pg, r, p3); + svfloat64_t p4 + = svmla_x (pg, sv_f64 (dat->two_over_five), r2, dat->two_over_fifteen); + p4 = svmls_x (pg, sv_f64 (dat->tenth), r2, p4); + svfloat64_t p5 + = svmla_x (pg, sv_f64 (dat->two_over_nine), r2, dat->two_over_fortyfive); + p5 = svmla_x (pg, sixth, r2, p5); + p5 = svmul_x (pg, r, p5); + + svfloat64_t p34 = svmla_x (pg, p3, d, p4); + svfloat64_t p12 = svmla_x (pg, p1, d, p2); + svfloat64_t y = svmla_x (pg, p34, d2, p5); + y = svmla_x (pg, p12, d2, y); + + y = svmla_x (pg, erfr, scale, svmls_x (pg, d, d2, y)); + + /* Solves the |x| = inf and NaN cases. */ + y = svsel (a_ge_max, sv_f64 (1.0), y); + + /* Copy sign. */ + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t iy = svreinterpret_u64 (y); + svuint64_t sign = svand_x (pg, ix, SignMask); + return svreinterpret_f64 (svorr_x (pg, sign, iy)); +} + +PL_SIG (SV, D, 1, erf, -6.0, 6.0) +PL_TEST_ULP (SV_NAME_D1 (erf), 1.79) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (erf), 0, 5.9921875, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (erf), 5.9921875, inf, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (erf), 0, inf, 4000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_erf_data.c b/contrib/arm-optimized-routines/pl/math/sv_erf_data.c new file mode 100644 index 000000000000..7244aceda5a5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erf_data.c @@ -0,0 +1,1558 @@ +/* + * Data for approximation of erf. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in vector erf. + For each possible rounded input r (multiples of 1/128), between + r = 0.0 and r = 6.0 (769 values): + - the first entry __erf_data.tab.erf contains the values of erf(r), + - the second entry __erf_data.tab.scale contains the values of + 2/sqrt(pi)*exp(-r^2). Note that indices 0 and 1 are never hit by the + algorithm, since lookup is performed only for x >= 1/64-1/512. */ +const struct sv_erf_data __sv_erf_data = { + .erf = { 0x0.0000000000000p+0, + 0x1.20dbf3deb1340p-7, + 0x1.20d77083f17a0p-6, + 0x1.b137e0cf584dcp-6, + 0x1.20c5645dd2538p-5, + 0x1.68e5d3bbc9526p-5, + 0x1.b0fafef135745p-5, + 0x1.f902a77bd3821p-5, + 0x1.207d480e90658p-4, + 0x1.44703e87e8593p-4, + 0x1.68591a1e83b5dp-4, + 0x1.8c36beb8a8d23p-4, + 0x1.b0081148a873ap-4, + 0x1.d3cbf7e70a4b3p-4, + 0x1.f78159ec8bb50p-4, + 0x1.0d939005f65e5p-3, + 0x1.1f5e1a35c3b89p-3, + 0x1.311fc15f56d14p-3, + 0x1.42d7fc2f64959p-3, + 0x1.548642321d7c6p-3, + 0x1.662a0bdf7a89fp-3, + 0x1.77c2d2a765f9ep-3, + 0x1.895010fdbdbfdp-3, + 0x1.9ad142662e14dp-3, + 0x1.ac45e37fe2526p-3, + 0x1.bdad72110a648p-3, + 0x1.cf076d1233237p-3, + 0x1.e05354b96ff36p-3, + 0x1.f190aa85540e2p-3, + 0x1.015f78a3dcf3dp-2, + 0x1.09eed6982b948p-2, + 0x1.127631eb8de32p-2, + 0x1.1af54e232d609p-2, + 0x1.236bef825d9a2p-2, + 0x1.2bd9db0f7827fp-2, + 0x1.343ed6989b7d9p-2, + 0x1.3c9aa8b84bedap-2, + 0x1.44ed18d9f6462p-2, + 0x1.4d35ef3e5372ep-2, + 0x1.5574f4ffac98ep-2, + 0x1.5da9f415ff23fp-2, + 0x1.65d4b75b00471p-2, + 0x1.6df50a8dff772p-2, + 0x1.760aba57a76bfp-2, + 0x1.7e15944d9d3e4p-2, + 0x1.861566f5fd3c0p-2, + 0x1.8e0a01cab516bp-2, + 0x1.95f3353cbb146p-2, + 0x1.9dd0d2b721f39p-2, + 0x1.a5a2aca209394p-2, + 0x1.ad68966569a87p-2, + 0x1.b522646bbda68p-2, + 0x1.bccfec24855b8p-2, + 0x1.c4710406a65fcp-2, + 0x1.cc058392a6d2dp-2, + 0x1.d38d4354c3bd0p-2, + 0x1.db081ce6e2a48p-2, + 0x1.e275eaf25e458p-2, + 0x1.e9d68931ae650p-2, + 0x1.f129d471eabb1p-2, + 0x1.f86faa9428f9dp-2, + 0x1.ffa7ea8eb5fd0p-2, + 0x1.03693a371519cp-1, + 0x1.06f794ab2cae7p-1, + 0x1.0a7ef5c18edd2p-1, + 0x1.0dff4f247f6c6p-1, + 0x1.1178930ada115p-1, + 0x1.14eab43841b55p-1, + 0x1.1855a5fd3dd50p-1, + 0x1.1bb95c3746199p-1, + 0x1.1f15cb50bc4dep-1, + 0x1.226ae840d4d70p-1, + 0x1.25b8a88b6dd7fp-1, + 0x1.28ff0240d52cdp-1, + 0x1.2c3debfd7d6c1p-1, + 0x1.2f755ce9a21f4p-1, + 0x1.32a54cb8db67bp-1, + 0x1.35cdb3a9a144dp-1, + 0x1.38ee8a84beb71p-1, + 0x1.3c07ca9cb4f9ep-1, + 0x1.3f196dcd0f135p-1, + 0x1.42236e79a5fa6p-1, + 0x1.4525c78dd5966p-1, + 0x1.4820747ba2dc2p-1, + 0x1.4b13713ad3513p-1, + 0x1.4dfeba47f63ccp-1, + 0x1.50e24ca35fd2cp-1, + 0x1.53be25d016a4fp-1, + 0x1.569243d2b3a9bp-1, + 0x1.595ea53035283p-1, + 0x1.5c2348ecc4dc3p-1, + 0x1.5ee02e8a71a53p-1, + 0x1.61955607dd15dp-1, + 0x1.6442bfdedd397p-1, + 0x1.66e86d0312e82p-1, + 0x1.69865ee075011p-1, + 0x1.6c1c9759d0e5fp-1, + 0x1.6eab18c74091bp-1, + 0x1.7131e5f496a5ap-1, + 0x1.73b1021fc0cb8p-1, + 0x1.762870f720c6fp-1, + 0x1.78983697dc96fp-1, + 0x1.7b00578c26037p-1, + 0x1.7d60d8c979f7bp-1, + 0x1.7fb9bfaed8078p-1, + 0x1.820b1202f27fbp-1, + 0x1.8454d5f25760dp-1, + 0x1.8697120d92a4ap-1, + 0x1.88d1cd474a2e0p-1, + 0x1.8b050ef253c37p-1, + 0x1.8d30debfc572ep-1, + 0x1.8f5544bd00c04p-1, + 0x1.91724951b8fc6p-1, + 0x1.9387f53df5238p-1, + 0x1.959651980da31p-1, + 0x1.979d67caa6631p-1, + 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0x1.181012ef86610p-42, + 0x1.01647ba798744p-42, + 0x1.d90e917701675p-43, + 0x1.b2a87e86d0c8ap-43, + 0x1.8f53dcb377293p-43, + 0x1.6ed2f2515e933p-43, + 0x1.50ecc9ed47f19p-43, + 0x1.356cd5ce7799ep-43, + 0x1.1c229a587ab78p-43, + 0x1.04e15ecc7f3f6p-43, + 0x1.deffc7e6a6017p-44, + 0x1.b7b040832f310p-44, + 0x1.938e021f36d76p-44, + 0x1.7258610b3b233p-44, + 0x1.53d3bfc82a909p-44, + 0x1.37c92babdc2fdp-44, + 0x1.1e06010120f6ap-44, + 0x1.065b9616170d4p-44, + 0x1.e13dd96b3753ap-45, + 0x1.b950d32467392p-45, + 0x1.94a72263259a5p-45, + 0x1.72fd93e036cdcp-45, + 0x1.54164576929abp-45, + 0x1.37b83c521fe96p-45, + 0x1.1daf033182e96p-45, + 0x1.05ca50205d26ap-45, + 0x1.dfbb6235639fap-46, + 0x1.b7807e294781fp-46, + 0x1.9298add70a734p-46, + 0x1.70beaf9c7ffb6p-46, + 0x1.51b2cd6709222p-46, + 0x1.353a6cf7f7fffp-46, + 0x1.1b1fa8cbe84a7p-46, + 0x1.0330f0fd69921p-46, + 0x1.da81670f96f9bp-47, + 0x1.b24a16b4d09aap-47, + 0x1.8d6eeb6efdbd6p-47, + 0x1.6ba91ac734785p-47, + 0x1.4cb7966770ab5p-47, + 0x1.305e9721d0981p-47, + 0x1.1667311fff70ap-47, + 0x1.fd3de10d62855p-48, + 0x1.d1aefbcd48d0cp-48, + 0x1.a9cc93c25aca9p-48, + 0x1.85487ee3ea735p-48, + 0x1.63daf8b4b1e0cp-48, + 0x1.45421e69a6ca1p-48, + 0x1.294175802d99ap-48, + 0x1.0fa17bf41068fp-48, + 0x1.f05e82aae2bb9p-49, + 0x1.c578101b29058p-49, + 0x1.9e39dc5dd2f7cp-49, + 0x1.7a553a728bbf2p-49, + 0x1.5982008db1304p-49, + 0x1.3b7e00422e51bp-49, + 0x1.200c898d9ee3ep-49, + 0x1.06f5f7eb65a56p-49, + 0x1.e00e9148a1d25p-50, + 0x1.b623734024e92p-50, + 0x1.8fd4e01891bf8p-50, + 0x1.6cd44c7470d89p-50, + 0x1.4cd9c04158cd7p-50, + 0x1.2fa34bf5c8344p-50, + 0x1.14f4890ff2461p-50, + 0x1.f92c49dfa4df5p-51, + 0x1.ccaaea71ab0dfp-51, + 0x1.a40829f001197p-51, + 0x1.7eef13b59e96cp-51, + 0x1.5d11e1a252bf5p-51, + 0x1.3e296303b2297p-51, + 0x1.21f47009f43cep-51, + 0x1.083768c5e4541p-51, + 0x1.e1777d831265ep-52, + 0x1.b69f10b0191b5p-52, + 0x1.8f8a3a05b5b52p-52, + 0x1.6be573c40c8e7p-52, + 0x1.4b645ba991fdbp-52, + 0x1.2dc119095729fp-52, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/sv_erfc_1u8.c b/contrib/arm-optimized-routines/pl/math/sv_erfc_1u8.c new file mode 100644 index 000000000000..a91bef96f2e7 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erfc_1u8.c @@ -0,0 +1,164 @@ +/* + * Double-precision vector erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint64_t off_idx, off_arr; + double max, shift; + double p20, p40, p41, p42; + double p51, p52; + double q5, r5; + double q6, r6; + double q7, r7; + double q8, r8; + double q9, r9; + uint64_t table_scale; +} data = { + /* Set an offset so the range of the index used for lookup is 3487, and it + can be clamped using a saturated add on an offset index. + Index offset is 0xffffffffffffffff - asuint64(shift) - 3487. */ + .off_idx = 0xbd3ffffffffff260, + .off_arr = 0xfffffffffffff260, /* 0xffffffffffffffff - 3487. */ + .max = 0x1.b3ep+4, /* 3487/128. */ + .shift = 0x1p45, + .table_scale = 0x37f0000000000000, /* asuint64(0x1p-128). */ + .p20 = 0x1.5555555555555p-2, /* 1/3, used to compute 2/3 and 1/6. */ + .p40 = -0x1.999999999999ap-4, /* 1/10. */ + .p41 = -0x1.999999999999ap-2, /* 2/5. */ + .p42 = 0x1.1111111111111p-3, /* 2/15. */ + .p51 = -0x1.c71c71c71c71cp-3, /* 2/9. */ + .p52 = 0x1.6c16c16c16c17p-5, /* 2/45. */ + /* Qi = (i+1) / i, for i = 5, ..., 9. */ + .q5 = 0x1.3333333333333p0, + .q6 = 0x1.2aaaaaaaaaaabp0, + .q7 = 0x1.2492492492492p0, + .q8 = 0x1.2p0, + .q9 = 0x1.1c71c71c71c72p0, + /* Ri = -2 * i / ((i+1)*(i+2)), for i = 5, ..., 9. */ + .r5 = -0x1.e79e79e79e79ep-3, + .r6 = -0x1.b6db6db6db6dbp-3, + .r7 = -0x1.8e38e38e38e39p-3, + .r8 = -0x1.6c16c16c16c17p-3, + .r9 = -0x1.4f2094f2094f2p-3, +}; + +/* Optimized double-precision vector erfc(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + - r * (2/45 r^4 - 2/9 r^2 + 1/6) d^5 + + p6(r) d^6 + ... + p10(r) d^10 + + Polynomials p6(r) to p10(r) are computed using recurrence relation + + 2(i+1)p_i + 2r(i+2)p_{i+1} + (i+2)(i+3)p_{i+2} = 0, + with p0 = 1, and p1(r) = -r. + + Values of erfc(r) and scale are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + + Maximum measured error: 1.71 ULP + _ZGVsMxv_erfc(0x1.46cfe976733p+4) got 0x1.e15fcbea3e7afp-608 + want 0x1.e15fcbea3e7adp-608. */ +svfloat64_t SV_NAME_D1 (erfc) (svfloat64_t x, const svbool_t pg) +{ + const struct data *dat = ptr_barrier (&data); + + svfloat64_t a = svabs_x (pg, x); + + /* Clamp input at |x| <= 3487/128. */ + a = svmin_x (pg, a, dat->max); + + /* Reduce x to the nearest multiple of 1/128. */ + svfloat64_t shift = sv_f64 (dat->shift); + svfloat64_t z = svadd_x (pg, a, shift); + + /* Saturate index for the NaN case. */ + svuint64_t i = svqadd (svreinterpret_u64 (z), dat->off_idx); + + /* Lookup erfc(r) and 2/sqrt(pi)*exp(-r^2) in tables. */ + i = svadd_x (pg, i, i); + const float64_t *p = &__erfc_data.tab[0].erfc - 2 * dat->off_arr; + svfloat64_t erfcr = svld1_gather_index (pg, p, i); + svfloat64_t scale = svld1_gather_index (pg, p + 1, i); + + /* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */ + svfloat64_t r = svsub_x (pg, z, shift); + svfloat64_t d = svsub_x (pg, a, r); + svfloat64_t d2 = svmul_x (pg, d, d); + svfloat64_t r2 = svmul_x (pg, r, r); + + /* poly (d, r) = 1 + p1(r) * d + p2(r) * d^2 + ... + p9(r) * d^9. */ + svfloat64_t p1 = r; + svfloat64_t third = sv_f64 (dat->p20); + svfloat64_t twothird = svmul_x (pg, third, 2.0); + svfloat64_t sixth = svmul_x (pg, third, 0.5); + svfloat64_t p2 = svmls_x (pg, third, r2, twothird); + svfloat64_t p3 = svmad_x (pg, r2, third, -0.5); + p3 = svmul_x (pg, r, p3); + svfloat64_t p4 = svmla_x (pg, sv_f64 (dat->p41), r2, dat->p42); + p4 = svmls_x (pg, sv_f64 (dat->p40), r2, p4); + svfloat64_t p5 = svmla_x (pg, sv_f64 (dat->p51), r2, dat->p52); + p5 = svmla_x (pg, sixth, r2, p5); + p5 = svmul_x (pg, r, p5); + /* Compute p_i using recurrence relation: + p_{i+2} = (p_i + r * Q_{i+1} * p_{i+1}) * R_{i+1}. */ + svfloat64_t qr5 = svld1rq (svptrue_b64 (), &dat->q5); + svfloat64_t qr6 = svld1rq (svptrue_b64 (), &dat->q6); + svfloat64_t qr7 = svld1rq (svptrue_b64 (), &dat->q7); + svfloat64_t qr8 = svld1rq (svptrue_b64 (), &dat->q8); + svfloat64_t qr9 = svld1rq (svptrue_b64 (), &dat->q9); + svfloat64_t p6 = svmla_x (pg, p4, p5, svmul_lane (r, qr5, 0)); + p6 = svmul_lane (p6, qr5, 1); + svfloat64_t p7 = svmla_x (pg, p5, p6, svmul_lane (r, qr6, 0)); + p7 = svmul_lane (p7, qr6, 1); + svfloat64_t p8 = svmla_x (pg, p6, p7, svmul_lane (r, qr7, 0)); + p8 = svmul_lane (p8, qr7, 1); + svfloat64_t p9 = svmla_x (pg, p7, p8, svmul_lane (r, qr8, 0)); + p9 = svmul_lane (p9, qr8, 1); + svfloat64_t p10 = svmla_x (pg, p8, p9, svmul_lane (r, qr9, 0)); + p10 = svmul_lane (p10, qr9, 1); + /* Compute polynomial in d using pairwise Horner scheme. */ + svfloat64_t p90 = svmla_x (pg, p9, d, p10); + svfloat64_t p78 = svmla_x (pg, p7, d, p8); + svfloat64_t p56 = svmla_x (pg, p5, d, p6); + svfloat64_t p34 = svmla_x (pg, p3, d, p4); + svfloat64_t p12 = svmla_x (pg, p1, d, p2); + svfloat64_t y = svmla_x (pg, p78, d2, p90); + y = svmla_x (pg, p56, d2, y); + y = svmla_x (pg, p34, d2, y); + y = svmla_x (pg, p12, d2, y); + + y = svmls_x (pg, erfcr, scale, svmls_x (pg, d, d2, y)); + + /* Offset equals 2.0 if sign, else 0.0. */ + svuint64_t sign = svand_x (pg, svreinterpret_u64 (x), 0x8000000000000000); + svfloat64_t off = svreinterpret_f64 (svlsr_x (pg, sign, 1)); + /* Handle sign and scale back in a single fma. */ + svfloat64_t fac = svreinterpret_f64 (svorr_x (pg, sign, dat->table_scale)); + + return svmla_x (pg, off, fac, y); +} + +PL_SIG (SV, D, 1, erfc, -6.0, 28.0) +PL_TEST_ULP (SV_NAME_D1 (erfc), 1.21) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (erfc), 0.0, 0x1p-26, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (erfc), 0x1p-26, 28.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (erfc), -0x1p-26, -6.0, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (erfc), 28.0, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_D1 (erfc), 6.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_erfcf_1u7.c b/contrib/arm-optimized-routines/pl/math/sv_erfcf_1u7.c new file mode 100644 index 000000000000..cda8f0b3752e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erfcf_1u7.c @@ -0,0 +1,111 @@ +/* + * Single-precision vector erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint32_t off_idx, off_arr; + float max, shift; + float third, two_thirds, two_over_fifteen, two_over_five, tenth; +} data = { + /* Set an offset so the range of the index used for lookup is 644, and it can + be clamped using a saturated add. */ + .off_idx = 0xb7fffd7b, /* 0xffffffff - asuint(shift) - 644. */ + .off_arr = 0xfffffd7b, /* 0xffffffff - 644. */ + .max = 10.0625f, /* 644/64. */ + .shift = 0x1p17f, + .third = 0x1.555556p-2f, + .two_thirds = 0x1.555556p-1f, + .two_over_fifteen = 0x1.111112p-3f, + .two_over_five = -0x1.99999ap-2f, + .tenth = -0x1.99999ap-4f, +}; + +#define SignMask 0x80000000 +#define TableScale 0x28000000 /* 0x1p-47. */ + +/* Optimized single-precision vector erfcf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/64. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + + Values of erfc(r) and scale are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + + Maximum error: 1.63 ULP (~1.0 ULP for x < 0.0). + _ZGVsMxv_erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120 + want 0x1.f51216p-120. */ +svfloat32_t SV_NAME_F1 (erfc) (svfloat32_t x, const svbool_t pg) +{ + const struct data *dat = ptr_barrier (&data); + + svfloat32_t a = svabs_x (pg, x); + + /* Clamp input at |x| <= 10.0 + 4/64. */ + a = svmin_x (pg, a, dat->max); + + /* Reduce x to the nearest multiple of 1/64. */ + svfloat32_t shift = sv_f32 (dat->shift); + svfloat32_t z = svadd_x (pg, a, shift); + + /* Saturate index for the NaN case. */ + svuint32_t i = svqadd (svreinterpret_u32 (z), dat->off_idx); + + /* Lookup erfc(r) and 2/sqrt(pi)*exp(-r^2) in tables. */ + i = svmul_x (pg, i, 2); + const float32_t *p = &__erfcf_data.tab[0].erfc - 2 * dat->off_arr; + svfloat32_t erfcr = svld1_gather_index (pg, p, i); + svfloat32_t scale = svld1_gather_index (pg, p + 1, i); + + /* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */ + svfloat32_t r = svsub_x (pg, z, shift); + svfloat32_t d = svsub_x (pg, a, r); + svfloat32_t d2 = svmul_x (pg, d, d); + svfloat32_t r2 = svmul_x (pg, r, r); + + svfloat32_t coeffs = svld1rq (svptrue_b32 (), &dat->third); + svfloat32_t third = svdup_lane (coeffs, 0); + + svfloat32_t p1 = r; + svfloat32_t p2 = svmls_lane (third, r2, coeffs, 1); + svfloat32_t p3 = svmul_x (pg, r, svmla_lane (sv_f32 (-0.5), r2, coeffs, 0)); + svfloat32_t p4 = svmla_lane (sv_f32 (dat->two_over_five), r2, coeffs, 2); + p4 = svmls_x (pg, sv_f32 (dat->tenth), r2, p4); + + svfloat32_t y = svmla_x (pg, p3, d, p4); + y = svmla_x (pg, p2, d, y); + y = svmla_x (pg, p1, d, y); + + /* Solves the |x| = inf/nan case. */ + y = svmls_x (pg, erfcr, scale, svmls_x (pg, d, d2, y)); + + /* Offset equals 2.0f if sign, else 0.0f. */ + svuint32_t sign = svand_x (pg, svreinterpret_u32 (x), SignMask); + svfloat32_t off = svreinterpret_f32 (svlsr_x (pg, sign, 1)); + /* Handle sign and scale back in a single fma. */ + svfloat32_t fac = svreinterpret_f32 (svorr_x (pg, sign, TableScale)); + + return svmla_x (pg, off, fac, y); +} + +PL_SIG (SV, F, 1, erfc, -4.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (erfc), 1.14) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (erfc), 0.0, 0x1p-26, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (erfc), 0x1p-26, 10.0625, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (erfc), -0x1p-26, -4.0, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (erfc), 10.0625, inf, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (erfc), -4.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_erff_2u.c b/contrib/arm-optimized-routines/pl/math/sv_erff_2u.c new file mode 100644 index 000000000000..adeee798ee2e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erff_2u.c @@ -0,0 +1,90 @@ +/* + * Single-precision vector erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float min, max, scale, shift, third; +} data = { + .min = 0x1.cp-7f, /* 1/64 - 1/512. */ + .max = 3.9375, /* 4 - 8/128. */ + .scale = 0x1.20dd76p+0f, /* 2/sqrt(pi). */ + .shift = 0x1p16f, + .third = 0x1.555556p-2f, /* 1/3. */ +}; + +#define SignMask (0x80000000) + +/* Single-precision implementation of vector erf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erf(x) ~ erf(r) + scale * d * [1 - r * d - 1/3 * d^2] + + Values of erf(r) and scale are read from lookup tables. + For |x| < 0x1.cp-7, the algorithm sets r = 0, erf(r) = 0, and scale = 2 / + sqrt(pi), so it simply boils down to a Taylor series expansion near 0. For + |x| > 3.9375, erf(|x|) rounds to 1.0f. + + Maximum error on each interval: + - [0, 0x1.cp-7]: 1.93 ULP + _ZGVsMxv_erff(0x1.c373e6p-9) got 0x1.fd686cp-9 want 0x1.fd6868p-9 + - [0x1.cp-7, 4.0]: 1.26 ULP + _ZGVsMxv_erff(0x1.1d002ep+0) got 0x1.c4eb9ap-1 want 0x1.c4eb98p-1. */ +svfloat32_t SV_NAME_F1 (erf) (svfloat32_t x, const svbool_t pg) +{ + const struct data *dat = ptr_barrier (&data); + + /* |x| > 1/64 - 1/512. */ + svbool_t a_gt_min = svacgt (pg, x, dat->min); + + /* |x| >= 4.0 - 8/128. */ + svbool_t a_ge_max = svacge (pg, x, dat->max); + svfloat32_t a = svabs_x (pg, x); + + svfloat32_t shift = sv_f32 (dat->shift); + svfloat32_t z = svadd_x (pg, a, shift); + svuint32_t i + = svsub_x (pg, svreinterpret_u32 (z), svreinterpret_u32 (shift)); + + /* Saturate lookup index. */ + i = svsel (a_ge_max, sv_u32 (512), i); + + /* r and erf(r) set to 0 for |x| below min. */ + svfloat32_t r = svsub_z (a_gt_min, z, shift); + svfloat32_t erfr = svld1_gather_index (a_gt_min, __sv_erff_data.erf, i); + + /* scale set to 2/sqrt(pi) for |x| below min. */ + svfloat32_t scale = svld1_gather_index (a_gt_min, __sv_erff_data.scale, i); + scale = svsel (a_gt_min, scale, sv_f32 (dat->scale)); + + /* erf(x) ~ erf(r) + scale * d * (1 - r * d + 1/3 * d^2). */ + svfloat32_t d = svsub_x (pg, a, r); + svfloat32_t d2 = svmul_x (pg, d, d); + svfloat32_t y = svmla_x (pg, r, d, dat->third); + y = svmla_x (pg, erfr, scale, svmls_x (pg, d, d2, y)); + + /* Solves the |x| = inf case. */ + y = svsel (a_ge_max, sv_f32 (1.0f), y); + + /* Copy sign. */ + svuint32_t ix = svreinterpret_u32 (x); + svuint32_t iy = svreinterpret_u32 (y); + svuint32_t sign = svand_x (pg, ix, SignMask); + return svreinterpret_f32 (svorr_x (pg, sign, iy)); +} + +PL_SIG (SV, F, 1, erf, -4.0, 4.0) +PL_TEST_ULP (SV_NAME_F1 (erf), 1.43) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (erf), 0, 0x1.cp-7, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (erf), 0x1.cp-7, 3.9375, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (erf), 3.9375, inf, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (erf), 0, inf, 4000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_erff_data.c b/contrib/arm-optimized-routines/pl/math/sv_erff_data.c new file mode 100644 index 000000000000..154d3c188874 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_erff_data.c @@ -0,0 +1,1046 @@ +/* + * Data for approximation of vector erff. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* Lookup table used in SVE erff. + For each possible rounded input r (multiples of 1/128), between + r = 0.0 and r = 4.0 (513 values): + - __erff_data.erf contains the values of erf(r), + - __erff_data.scale contains the values of 2/sqrt(pi)*exp(-r^2). + Note that indices 0 and 1 are never hit by the algorithm, since lookup is + performed only for x >= 1/64-1/512. */ +const struct sv_erff_data __sv_erff_data = { + .erf = { 0x0.000000p+0, + 0x1.20dbf4p-7, + 0x1.20d770p-6, + 0x1.b137e0p-6, + 0x1.20c564p-5, + 0x1.68e5d4p-5, + 0x1.b0fafep-5, + 0x1.f902a8p-5, + 0x1.207d48p-4, + 0x1.44703ep-4, + 0x1.68591ap-4, + 0x1.8c36bep-4, + 0x1.b00812p-4, + 0x1.d3cbf8p-4, + 0x1.f7815ap-4, + 0x1.0d9390p-3, + 0x1.1f5e1ap-3, + 0x1.311fc2p-3, + 0x1.42d7fcp-3, + 0x1.548642p-3, + 0x1.662a0cp-3, + 0x1.77c2d2p-3, + 0x1.895010p-3, + 0x1.9ad142p-3, + 0x1.ac45e4p-3, + 0x1.bdad72p-3, + 0x1.cf076ep-3, + 0x1.e05354p-3, + 0x1.f190aap-3, + 0x1.015f78p-2, + 0x1.09eed6p-2, + 0x1.127632p-2, + 0x1.1af54ep-2, + 0x1.236bf0p-2, + 0x1.2bd9dcp-2, + 0x1.343ed6p-2, + 0x1.3c9aa8p-2, + 0x1.44ed18p-2, + 0x1.4d35f0p-2, + 0x1.5574f4p-2, + 0x1.5da9f4p-2, + 0x1.65d4b8p-2, + 0x1.6df50ap-2, + 0x1.760abap-2, + 0x1.7e1594p-2, + 0x1.861566p-2, + 0x1.8e0a02p-2, + 0x1.95f336p-2, + 0x1.9dd0d2p-2, + 0x1.a5a2acp-2, + 0x1.ad6896p-2, + 0x1.b52264p-2, + 0x1.bccfecp-2, + 0x1.c47104p-2, + 0x1.cc0584p-2, + 0x1.d38d44p-2, + 0x1.db081cp-2, + 0x1.e275eap-2, + 0x1.e9d68ap-2, + 0x1.f129d4p-2, + 0x1.f86faap-2, + 0x1.ffa7eap-2, + 0x1.03693ap-1, + 0x1.06f794p-1, + 0x1.0a7ef6p-1, + 0x1.0dff50p-1, + 0x1.117894p-1, + 0x1.14eab4p-1, + 0x1.1855a6p-1, + 0x1.1bb95cp-1, + 0x1.1f15ccp-1, + 0x1.226ae8p-1, + 0x1.25b8a8p-1, + 0x1.28ff02p-1, + 0x1.2c3decp-1, + 0x1.2f755cp-1, + 0x1.32a54cp-1, + 0x1.35cdb4p-1, + 0x1.38ee8ap-1, + 0x1.3c07cap-1, + 0x1.3f196ep-1, + 0x1.42236ep-1, + 0x1.4525c8p-1, + 0x1.482074p-1, + 0x1.4b1372p-1, + 0x1.4dfebap-1, + 0x1.50e24cp-1, + 0x1.53be26p-1, + 0x1.569244p-1, + 0x1.595ea6p-1, + 0x1.5c2348p-1, + 0x1.5ee02ep-1, + 0x1.619556p-1, + 0x1.6442c0p-1, + 0x1.66e86ep-1, + 0x1.69865ep-1, + 0x1.6c1c98p-1, + 0x1.6eab18p-1, + 0x1.7131e6p-1, + 0x1.73b102p-1, + 0x1.762870p-1, + 0x1.789836p-1, + 0x1.7b0058p-1, + 0x1.7d60d8p-1, + 0x1.7fb9c0p-1, + 0x1.820b12p-1, + 0x1.8454d6p-1, + 0x1.869712p-1, + 0x1.88d1cep-1, + 0x1.8b050ep-1, + 0x1.8d30dep-1, + 0x1.8f5544p-1, + 0x1.91724ap-1, + 0x1.9387f6p-1, + 0x1.959652p-1, + 0x1.979d68p-1, + 0x1.999d42p-1, + 0x1.9b95e8p-1, + 0x1.9d8768p-1, + 0x1.9f71cap-1, + 0x1.a1551ap-1, + 0x1.a33162p-1, + 0x1.a506b0p-1, + 0x1.a6d50cp-1, + 0x1.a89c86p-1, + 0x1.aa5d26p-1, + 0x1.ac16fcp-1, + 0x1.adca14p-1, + 0x1.af767ap-1, + 0x1.b11c3cp-1, + 0x1.b2bb68p-1, + 0x1.b4540ap-1, + 0x1.b5e630p-1, + 0x1.b771e8p-1, + 0x1.b8f742p-1, + 0x1.ba764ap-1, + 0x1.bbef10p-1, + 0x1.bd61a2p-1, + 0x1.bece0ep-1, + 0x1.c03464p-1, + 0x1.c194b2p-1, + 0x1.c2ef08p-1, + 0x1.c44376p-1, + 0x1.c5920ap-1, + 0x1.c6dad2p-1, + 0x1.c81de2p-1, + 0x1.c95b46p-1, + 0x1.ca930ep-1, + 0x1.cbc54cp-1, + 0x1.ccf20cp-1, + 0x1.ce1962p-1, + 0x1.cf3b5cp-1, + 0x1.d0580cp-1, + 0x1.d16f7ep-1, + 0x1.d281c4p-1, + 0x1.d38ef0p-1, + 0x1.d49710p-1, + 0x1.d59a34p-1, + 0x1.d6986cp-1, + 0x1.d791cap-1, + 0x1.d8865ep-1, + 0x1.d97636p-1, + 0x1.da6162p-1, + 0x1.db47f4p-1, + 0x1.dc29fcp-1, + 0x1.dd0788p-1, + 0x1.dde0aap-1, + 0x1.deb570p-1, + 0x1.df85eap-1, + 0x1.e0522ap-1, + 0x1.e11a3ep-1, + 0x1.e1de36p-1, + 0x1.e29e22p-1, + 0x1.e35a12p-1, + 0x1.e41214p-1, + 0x1.e4c638p-1, + 0x1.e5768cp-1, + 0x1.e62322p-1, + 0x1.e6cc08p-1, + 0x1.e7714ap-1, + 0x1.e812fcp-1, + 0x1.e8b12ap-1, + 0x1.e94be4p-1, + 0x1.e9e336p-1, + 0x1.ea7730p-1, + 0x1.eb07e2p-1, + 0x1.eb9558p-1, + 0x1.ec1fa2p-1, + 0x1.eca6ccp-1, + 0x1.ed2ae6p-1, + 0x1.edabfcp-1, + 0x1.ee2a1ep-1, + 0x1.eea556p-1, + 0x1.ef1db4p-1, + 0x1.ef9344p-1, + 0x1.f00614p-1, + 0x1.f07630p-1, + 0x1.f0e3a6p-1, + 0x1.f14e82p-1, + 0x1.f1b6d0p-1, + 0x1.f21ca0p-1, + 0x1.f27ff8p-1, + 0x1.f2e0eap-1, + 0x1.f33f7ep-1, + 0x1.f39bc2p-1, + 0x1.f3f5c2p-1, + 0x1.f44d88p-1, + 0x1.f4a31ep-1, + 0x1.f4f694p-1, + 0x1.f547f2p-1, + 0x1.f59742p-1, + 0x1.f5e490p-1, + 0x1.f62fe8p-1, + 0x1.f67952p-1, + 0x1.f6c0dcp-1, + 0x1.f7068cp-1, + 0x1.f74a6ep-1, + 0x1.f78c8cp-1, + 0x1.f7cceep-1, + 0x1.f80ba2p-1, + 0x1.f848acp-1, + 0x1.f8841ap-1, + 0x1.f8bdf2p-1, + 0x1.f8f63ep-1, + 0x1.f92d08p-1, + 0x1.f96256p-1, + 0x1.f99634p-1, + 0x1.f9c8a8p-1, + 0x1.f9f9bap-1, + 0x1.fa2974p-1, + 0x1.fa57dep-1, + 0x1.fa84fep-1, + 0x1.fab0dep-1, + 0x1.fadb84p-1, + 0x1.fb04f6p-1, + 0x1.fb2d40p-1, + 0x1.fb5464p-1, + 0x1.fb7a6cp-1, + 0x1.fb9f60p-1, + 0x1.fbc344p-1, + 0x1.fbe61ep-1, + 0x1.fc07fap-1, + 0x1.fc28d8p-1, + 0x1.fc48c2p-1, + 0x1.fc67bcp-1, + 0x1.fc85d0p-1, + 0x1.fca2fep-1, + 0x1.fcbf52p-1, + 0x1.fcdaccp-1, + 0x1.fcf576p-1, + 0x1.fd0f54p-1, + 0x1.fd286ap-1, + 0x1.fd40bep-1, + 0x1.fd5856p-1, + 0x1.fd6f34p-1, + 0x1.fd8562p-1, + 0x1.fd9ae2p-1, + 0x1.fdafb8p-1, + 0x1.fdc3e8p-1, + 0x1.fdd77ap-1, + 0x1.fdea6ep-1, + 0x1.fdfcccp-1, + 0x1.fe0e96p-1, + 0x1.fe1fd0p-1, + 0x1.fe3080p-1, + 0x1.fe40a6p-1, + 0x1.fe504cp-1, + 0x1.fe5f70p-1, + 0x1.fe6e18p-1, + 0x1.fe7c46p-1, + 0x1.fe8a00p-1, + 0x1.fe9748p-1, + 0x1.fea422p-1, + 0x1.feb090p-1, + 0x1.febc96p-1, + 0x1.fec836p-1, + 0x1.fed374p-1, + 0x1.fede52p-1, + 0x1.fee8d4p-1, + 0x1.fef2fep-1, + 0x1.fefccep-1, + 0x1.ff064cp-1, + 0x1.ff0f76p-1, + 0x1.ff1852p-1, + 0x1.ff20e0p-1, + 0x1.ff2924p-1, + 0x1.ff3120p-1, + 0x1.ff38d6p-1, + 0x1.ff4048p-1, + 0x1.ff4778p-1, + 0x1.ff4e68p-1, + 0x1.ff551ap-1, + 0x1.ff5b90p-1, + 0x1.ff61ccp-1, + 0x1.ff67d0p-1, + 0x1.ff6d9ep-1, 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0x1.c4412cp-9, + 0x1.b38a3ap-9, + 0x1.a36454p-9, + 0x1.93cb12p-9, + 0x1.84ba30p-9, + 0x1.762d84p-9, + 0x1.682100p-9, + 0x1.5a90b0p-9, + 0x1.4d78bcp-9, + 0x1.40d564p-9, + 0x1.34a306p-9, + 0x1.28de12p-9, + 0x1.1d8318p-9, + 0x1.128ebap-9, + 0x1.07fdb4p-9, + 0x1.fb99b8p-10, + 0x1.e7f232p-10, + 0x1.d4fed8p-10, + 0x1.c2b9d0p-10, + 0x1.b11d70p-10, + 0x1.a02436p-10, + 0x1.8fc8c8p-10, + 0x1.8005f0p-10, + 0x1.70d6a4p-10, + 0x1.6235fcp-10, + 0x1.541f34p-10, + 0x1.468daep-10, + 0x1.397ceep-10, + 0x1.2ce898p-10, + 0x1.20cc76p-10, + 0x1.15246ep-10, + 0x1.09ec86p-10, + 0x1.fe41cep-11, + 0x1.e97ba4p-11, + 0x1.d57f52p-11, + 0x1.c245d4p-11, + 0x1.afc85ep-11, + 0x1.9e0058p-11, + 0x1.8ce75ep-11, + 0x1.7c7744p-11, + 0x1.6caa0ep-11, + 0x1.5d79ecp-11, + 0x1.4ee142p-11, + 0x1.40daa4p-11, + 0x1.3360ccp-11, + 0x1.266ea8p-11, + 0x1.19ff46p-11, + 0x1.0e0de8p-11, + 0x1.0295f0p-11, + 0x1.ef25d4p-12, + 0x1.da0110p-12, + 0x1.c5b542p-12, + 0x1.b23a5ap-12, + 0x1.9f8894p-12, + 0x1.8d986ap-12, + 0x1.7c629ap-12, + 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0x1.a447b8p-16, + 0x1.8f4cccp-16, + 0x1.7b5224p-16, + 0x1.684c22p-16, + 0x1.562facp-16, + 0x1.44f21ep-16, + 0x1.34894ap-16, + 0x1.24eb72p-16, + 0x1.160f44p-16, + 0x1.07ebd2p-16, + 0x1.f4f12ep-17, + 0x1.db5ad0p-17, + 0x1.c304f0p-17, + 0x1.abe09ep-17, + 0x1.95df98p-17, + 0x1.80f43ap-17, + 0x1.6d1178p-17, + 0x1.5a2ae0p-17, + 0x1.483488p-17, + 0x1.372310p-17, + 0x1.26eb9ep-17, + 0x1.1783cep-17, + 0x1.08e1bap-17, + 0x1.f5f7d8p-18, + 0x1.db92b6p-18, + 0x1.c282cep-18, + 0x1.aab7acp-18, + 0x1.94219cp-18, + 0x1.7eb1a2p-18, + 0x1.6a5972p-18, + 0x1.570b6ap-18, + 0x1.44ba86p-18, + 0x1.335a62p-18, + 0x1.22df2ap-18, + 0x1.133d96p-18, + 0x1.046aeap-18, + 0x1.ecb9d0p-19, + 0x1.d21398p-19, + 0x1.b8d094p-19, + 0x1.a0df10p-19, + 0x1.8a2e26p-19, + 0x1.74adc8p-19, + 0x1.604ea8p-19, + 0x1.4d0232p-19, + 0x1.3aba86p-19, + 0x1.296a70p-19, + 0x1.190562p-19, + 0x1.097f62p-19, + 0x1.f59a20p-20, + 0x1.d9c736p-20, + 0x1.bf716cp-20, + 0x1.a6852cp-20, + 0x1.8eefd8p-20, + 0x1.789fb8p-20, + 0x1.6383f8p-20, + 0x1.4f8c96p-20, + 0x1.3caa62p-20, + 0x1.2acee2p-20, + 0x1.19ec60p-20, + 0x1.09f5d0p-20, + 0x1.f5bd96p-21, + 0x1.d9371ep-21, + 0x1.be41dep-21, + 0x1.a4c89ep-21, + 0x1.8cb738p-21, + 0x1.75fa8ep-21, + 0x1.608078p-21, + 0x1.4c37c0p-21, + 0x1.39100ep-21, + 0x1.26f9e0p-21, + 0x1.15e682p-21, + 0x1.05c804p-21, + 0x1.ed2254p-22, + 0x1.d06ad6p-22, + 0x1.b551c8p-22, + 0x1.9bc0a0p-22, + 0x1.83a200p-22, + 0x1.6ce1aap-22, + 0x1.576c72p-22, + 0x1.43302cp-22, + 0x1.301ba2p-22, + 0x1.1e1e86p-22, + 0x1.0d2966p-22, + 0x1.fa5b50p-23, + 0x1.dc3ae4p-23, + 0x1.bfd756p-23, + 0x1.a517dap-23, + 0x1.8be4f8p-23, + 0x1.74287ep-23, + 0x1.5dcd66p-23, + 0x1.48bfd4p-23, + 0x1.34ecf8p-23, + 0x1.224310p-23, + 0x1.10b148p-23, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/sv_exp10_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_exp10_1u5.c new file mode 100644 index 000000000000..519693afcab0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_exp10_1u5.c @@ -0,0 +1,122 @@ +/* + * Double-precision SVE 10^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +#define SpecialBound 307.0 /* floor (log10 (2^1023)). */ + +static const struct data +{ + double poly[5]; + double shift, log10_2, log2_10_hi, log2_10_lo, scale_thres, special_bound; +} data = { + /* Coefficients generated using Remez algorithm. + rel error: 0x1.9fcb9b3p-60 + abs error: 0x1.a20d9598p-60 in [ -log10(2)/128, log10(2)/128 ] + max ulp err 0.52 +0.5. */ + .poly = { 0x1.26bb1bbb55516p1, 0x1.53524c73cd32ap1, 0x1.0470591daeafbp1, + 0x1.2bd77b1361ef6p0, 0x1.142b5d54e9621p-1 }, + /* 1.5*2^46+1023. This value is further explained below. */ + .shift = 0x1.800000000ffc0p+46, + .log10_2 = 0x1.a934f0979a371p1, /* 1/log2(10). */ + .log2_10_hi = 0x1.34413509f79ffp-2, /* log2(10). */ + .log2_10_lo = -0x1.9dc1da994fd21p-59, + .scale_thres = 1280.0, + .special_bound = SpecialBound, +}; + +#define SpecialOffset 0x6000000000000000 /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +#define SpecialBias1 0x7000000000000000 /* 0x1p769. */ +#define SpecialBias2 0x3010000000000000 /* 0x1p-254. */ + +/* Update of both special and non-special cases, if any special case is + detected. */ +static inline svfloat64_t +special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n, + const struct data *d) +{ + /* s=2^n may overflow, break it up into s=s1*s2, + such that exp = s + s*y can be computed as s1*(s2+s2*y) + and s1*s1 overflows only if n>0. */ + + /* If n<=0 then set b to 0x6, 0 otherwise. */ + svbool_t p_sign = svcmple (pg, n, 0.0); /* n <= 0. */ + svuint64_t b = svdup_u64_z (p_sign, SpecialOffset); + + /* Set s1 to generate overflow depending on sign of exponent n. */ + svfloat64_t s1 = svreinterpret_f64 (svsubr_x (pg, b, SpecialBias1)); + /* Offset s to avoid overflow in final result if n is below threshold. */ + svfloat64_t s2 = svreinterpret_f64 ( + svadd_x (pg, svsub_x (pg, svreinterpret_u64 (s), SpecialBias2), b)); + + /* |n| > 1280 => 2^(n) overflows. */ + svbool_t p_cmp = svacgt (pg, n, d->scale_thres); + + svfloat64_t r1 = svmul_x (pg, s1, s1); + svfloat64_t r2 = svmla_x (pg, s2, s2, y); + svfloat64_t r0 = svmul_x (pg, r2, s1); + + return svsel (p_cmp, r1, r0); +} + +/* Fast vector implementation of exp10 using FEXPA instruction. + Maximum measured error is 1.02 ulp. + SV_NAME_D1 (exp10)(-0x1.2862fec805e58p+2) got 0x1.885a89551d782p-16 + want 0x1.885a89551d781p-16. */ +svfloat64_t SV_NAME_D1 (exp10) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + svbool_t no_big_scale = svacle (pg, x, d->special_bound); + svbool_t special = svnot_z (pg, no_big_scale); + + /* n = round(x/(log10(2)/N)). */ + svfloat64_t shift = sv_f64 (d->shift); + svfloat64_t z = svmla_x (pg, shift, x, d->log10_2); + svfloat64_t n = svsub_x (pg, z, shift); + + /* r = x - n*log10(2)/N. */ + svfloat64_t log2_10 = svld1rq (svptrue_b64 (), &d->log2_10_hi); + svfloat64_t r = x; + r = svmls_lane (r, n, log2_10, 0); + r = svmls_lane (r, n, log2_10, 1); + + /* scale = 2^(n/N), computed using FEXPA. FEXPA does not propagate NaNs, so + for consistent NaN handling we have to manually propagate them. This + comes at significant performance cost. */ + svuint64_t u = svreinterpret_u64 (z); + svfloat64_t scale = svexpa (u); + + /* Approximate exp10(r) using polynomial. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t y = svmla_x (pg, svmul_x (pg, r, d->poly[0]), r2, + sv_pairwise_poly_3_f64_x (pg, r, r2, d->poly + 1)); + + /* Assemble result as exp10(x) = 2^n * exp10(r). If |x| > SpecialBound + multiplication may overflow, so use special case routine. */ + if (unlikely (svptest_any (pg, special))) + { + /* FEXPA zeroes the sign bit, however the sign is meaningful to the + special case function so needs to be copied. + e = sign bit of u << 46. */ + svuint64_t e = svand_x (pg, svlsl_x (pg, u, 46), 0x8000000000000000); + /* Copy sign to scale. */ + scale = svreinterpret_f64 (svadd_x (pg, e, svreinterpret_u64 (scale))); + return special_case (pg, scale, y, n, d); + } + + /* No special case. */ + return svmla_x (pg, scale, scale, y); +} + +PL_SIG (SV, D, 1, exp10, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_D1 (exp10), 0.52) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp10), 0, 307, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp10), 307, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_exp10f_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_exp10f_1u5.c new file mode 100644 index 000000000000..9ecde8f1aa52 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_exp10f_1u5.c @@ -0,0 +1,87 @@ +/* + * Single-precision SVE 2^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "include/mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +/* For x < -SpecialBound, the result is subnormal and not handled correctly by + FEXPA. */ +#define SpecialBound 37.9 + +static const struct data +{ + float poly[5]; + float shift, log10_2, log2_10_hi, log2_10_lo, special_bound; +} data = { + /* Coefficients generated using Remez algorithm with minimisation of relative + error. + rel error: 0x1.89dafa3p-24 + abs error: 0x1.167d55p-23 in [-log10(2)/2, log10(2)/2] + maxerr: 0.52 +0.5 ulp. */ + .poly = { 0x1.26bb16p+1f, 0x1.5350d2p+1f, 0x1.04744ap+1f, 0x1.2d8176p+0f, + 0x1.12b41ap-1f }, + /* 1.5*2^17 + 127, a shift value suitable for FEXPA. */ + .shift = 0x1.903f8p17f, + .log10_2 = 0x1.a934fp+1, + .log2_10_hi = 0x1.344136p-2, + .log2_10_lo = -0x1.ec10cp-27, + .special_bound = SpecialBound, +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (exp10f, x, y, special); +} + +/* Single-precision SVE exp10f routine. Implements the same algorithm + as AdvSIMD exp10f. + Worst case error is 1.02 ULPs. + _ZGVsMxv_exp10f(-0x1.040488p-4) got 0x1.ba5f9ep-1 + want 0x1.ba5f9cp-1. */ +svfloat32_t SV_NAME_F1 (exp10) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + /* exp10(x) = 2^(n/N) * 10^r = 2^n * (1 + poly (r)), + with poly(r) in [1/sqrt(2), sqrt(2)] and + x = r + n * log10(2) / N, with r in [-log10(2)/2N, log10(2)/2N]. */ + + /* Load some constants in quad-word chunks to minimise memory access (last + lane is wasted). */ + svfloat32_t log10_2_and_inv = svld1rq (svptrue_b32 (), &d->log10_2); + + /* n = round(x/(log10(2)/N)). */ + svfloat32_t shift = sv_f32 (d->shift); + svfloat32_t z = svmla_lane (shift, x, log10_2_and_inv, 0); + svfloat32_t n = svsub_x (pg, z, shift); + + /* r = x - n*log10(2)/N. */ + svfloat32_t r = svmls_lane (x, n, log10_2_and_inv, 1); + r = svmls_lane (r, n, log10_2_and_inv, 2); + + svbool_t special = svacgt (pg, x, d->special_bound); + svfloat32_t scale = svexpa (svreinterpret_u32 (z)); + + /* Polynomial evaluation: poly(r) ~ exp10(r)-1. */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t poly + = svmla_x (pg, svmul_x (pg, r, d->poly[0]), + sv_pairwise_poly_3_f32_x (pg, r, r2, d->poly + 1), r2); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (pg, scale, scale, poly), special); + + return svmla_x (pg, scale, scale, poly); +} + +PL_SIG (SV, F, 1, exp10, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_F1 (exp10), 0.52) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp10), 0, SpecialBound, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp10), SpecialBound, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_exp2_2u.c b/contrib/arm-optimized-routines/pl/math/sv_exp2_2u.c new file mode 100644 index 000000000000..dcbca8adddd1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_exp2_2u.c @@ -0,0 +1,107 @@ +/* + * Double-precision SVE 2^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define N (1 << V_EXP_TABLE_BITS) + +#define BigBound 1022 +#define UOFlowBound 1280 + +static const struct data +{ + double poly[4]; + double shift, big_bound, uoflow_bound; +} data = { + /* Coefficients are computed using Remez algorithm with + minimisation of the absolute error. */ + .poly = { 0x1.62e42fefa3686p-1, 0x1.ebfbdff82c241p-3, 0x1.c6b09b16de99ap-5, + 0x1.3b2abf5571ad8p-7 }, + .shift = 0x1.8p52 / N, + .uoflow_bound = UOFlowBound, + .big_bound = BigBound, +}; + +#define SpecialOffset 0x6000000000000000 /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +#define SpecialBias1 0x7000000000000000 /* 0x1p769. */ +#define SpecialBias2 0x3010000000000000 /* 0x1p-254. */ + +/* Update of both special and non-special cases, if any special case is + detected. */ +static inline svfloat64_t +special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n, + const struct data *d) +{ + /* s=2^n may overflow, break it up into s=s1*s2, + such that exp = s + s*y can be computed as s1*(s2+s2*y) + and s1*s1 overflows only if n>0. */ + + /* If n<=0 then set b to 0x6, 0 otherwise. */ + svbool_t p_sign = svcmple (pg, n, 0.0); /* n <= 0. */ + svuint64_t b = svdup_u64_z (p_sign, SpecialOffset); + + /* Set s1 to generate overflow depending on sign of exponent n. */ + svfloat64_t s1 = svreinterpret_f64 (svsubr_x (pg, b, SpecialBias1)); + /* Offset s to avoid overflow in final result if n is below threshold. */ + svfloat64_t s2 = svreinterpret_f64 ( + svadd_x (pg, svsub_x (pg, svreinterpret_u64 (s), SpecialBias2), b)); + + /* |n| > 1280 => 2^(n) overflows. */ + svbool_t p_cmp = svacgt (pg, n, d->uoflow_bound); + + svfloat64_t r1 = svmul_x (pg, s1, s1); + svfloat64_t r2 = svmla_x (pg, s2, s2, y); + svfloat64_t r0 = svmul_x (pg, r2, s1); + + return svsel (p_cmp, r1, r0); +} + +/* Fast vector implementation of exp2. + Maximum measured error is 1.65 ulp. + _ZGVsMxv_exp2(-0x1.4c264ab5b559bp-6) got 0x1.f8db0d4df721fp-1 + want 0x1.f8db0d4df721dp-1. */ +svfloat64_t SV_NAME_D1 (exp2) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + svbool_t no_big_scale = svacle (pg, x, d->big_bound); + svbool_t special = svnot_z (pg, no_big_scale); + + /* Reduce x to k/N + r, where k is integer and r in [-1/2N, 1/2N]. */ + svfloat64_t shift = sv_f64 (d->shift); + svfloat64_t kd = svadd_x (pg, x, shift); + svuint64_t ki = svreinterpret_u64 (kd); + /* kd = k/N. */ + kd = svsub_x (pg, kd, shift); + svfloat64_t r = svsub_x (pg, x, kd); + + /* scale ~= 2^(k/N). */ + svuint64_t idx = svand_x (pg, ki, N - 1); + svuint64_t sbits = svld1_gather_index (pg, __v_exp_data, idx); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + svuint64_t top = svlsl_x (pg, ki, 52 - V_EXP_TABLE_BITS); + svfloat64_t scale = svreinterpret_f64 (svadd_x (pg, sbits, top)); + + /* Approximate exp2(r) using polynomial. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t p = sv_pairwise_poly_3_f64_x (pg, r, r2, d->poly); + svfloat64_t y = svmul_x (pg, r, p); + + /* Assemble exp2(x) = exp2(r) * scale. */ + if (unlikely (svptest_any (pg, special))) + return special_case (pg, scale, y, kd, d); + return svmla_x (pg, scale, scale, y); +} + +PL_SIG (SV, D, 1, exp2, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_D1 (exp2), 1.15) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp2), 0, BigBound, 1000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp2), BigBound, UOFlowBound, 100000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp2), UOFlowBound, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_exp2f_1u6.c b/contrib/arm-optimized-routines/pl/math/sv_exp2f_1u6.c new file mode 100644 index 000000000000..9698ff6f0682 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_exp2f_1u6.c @@ -0,0 +1,80 @@ +/* + * Single-precision SVE 2^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly[5]; + float shift, thres; +} data = { + /* Coefficients copied from the polynomial in AdvSIMD variant, reversed for + compatibility with polynomial helpers. */ + .poly = { 0x1.62e422p-1f, 0x1.ebf9bcp-3f, 0x1.c6bd32p-5f, 0x1.3ce9e4p-7f, + 0x1.59977ap-10f }, + /* 1.5*2^17 + 127. */ + .shift = 0x1.903f8p17f, + /* Roughly 87.3. For x < -Thres, the result is subnormal and not handled + correctly by FEXPA. */ + .thres = 0x1.5d5e2ap+6f, +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (exp2f, x, y, special); +} + +/* Single-precision SVE exp2f routine. Implements the same algorithm + as AdvSIMD exp2f. + Worst case error is 1.04 ULPs. + SV_NAME_F1 (exp2)(0x1.943b9p-1) got 0x1.ba7eb2p+0 + want 0x1.ba7ebp+0. */ +svfloat32_t SV_NAME_F1 (exp2) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = n + r, with r in [-1/2, 1/2]. */ + svfloat32_t shift = sv_f32 (d->shift); + svfloat32_t z = svadd_x (pg, x, shift); + svfloat32_t n = svsub_x (pg, z, shift); + svfloat32_t r = svsub_x (pg, x, n); + + svbool_t special = svacgt (pg, x, d->thres); + svfloat32_t scale = svexpa (svreinterpret_u32 (z)); + + /* Polynomial evaluation: poly(r) ~ exp2(r)-1. + Evaluate polynomial use hybrid scheme - offset ESTRIN by 1 for + coefficients 1 to 4, and apply most significant coefficient directly. */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t p14 = sv_pairwise_poly_3_f32_x (pg, r, r2, d->poly + 1); + svfloat32_t p0 = svmul_x (pg, r, d->poly[0]); + svfloat32_t poly = svmla_x (pg, p0, r2, p14); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (pg, scale, scale, poly), special); + + return svmla_x (pg, scale, scale, poly); +} + +PL_SIG (SV, F, 1, exp2, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_F1 (exp2), 0.55) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), 0, Thres, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), Thres, 1, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), 1, Thres, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), Thres, inf, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -0, -0x1p-23, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -0x1p-23, -1, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -1, -0x1p23, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -0x1p23, -inf, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -0, ScaleThres, 40000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), ScaleThres, -1, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), -1, ScaleThres, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (exp2), ScaleThres, -inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_exp_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_exp_1u5.c new file mode 100644 index 000000000000..c187def9e625 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_exp_1u5.c @@ -0,0 +1,137 @@ +/* + * Double-precision vector e^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double poly[4]; + double ln2_hi, ln2_lo, inv_ln2, shift, thres; +} data = { + .poly = { /* ulp error: 0.53. */ + 0x1.fffffffffdbcdp-2, 0x1.555555555444cp-3, 0x1.555573c6a9f7dp-5, + 0x1.1111266d28935p-7 }, + .ln2_hi = 0x1.62e42fefa3800p-1, + .ln2_lo = 0x1.ef35793c76730p-45, + /* 1/ln2. */ + .inv_ln2 = 0x1.71547652b82fep+0, + /* 1.5*2^46+1023. This value is further explained below. */ + .shift = 0x1.800000000ffc0p+46, + .thres = 704.0, +}; + +#define C(i) sv_f64 (d->poly[i]) +#define SpecialOffset 0x6000000000000000 /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +#define SpecialBias1 0x7000000000000000 /* 0x1p769. */ +#define SpecialBias2 0x3010000000000000 /* 0x1p-254. */ + +/* Update of both special and non-special cases, if any special case is + detected. */ +static inline svfloat64_t +special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n) +{ + /* s=2^n may overflow, break it up into s=s1*s2, + such that exp = s + s*y can be computed as s1*(s2+s2*y) + and s1*s1 overflows only if n>0. */ + + /* If n<=0 then set b to 0x6, 0 otherwise. */ + svbool_t p_sign = svcmple (pg, n, 0.0); /* n <= 0. */ + svuint64_t b + = svdup_u64_z (p_sign, SpecialOffset); /* Inactive lanes set to 0. */ + + /* Set s1 to generate overflow depending on sign of exponent n. */ + svfloat64_t s1 = svreinterpret_f64 ( + svsubr_x (pg, b, SpecialBias1)); /* 0x70...0 - b. */ + /* Offset s to avoid overflow in final result if n is below threshold. */ + svfloat64_t s2 = svreinterpret_f64 ( + svadd_x (pg, svsub_x (pg, svreinterpret_u64 (s), SpecialBias2), + b)); /* as_u64 (s) - 0x3010...0 + b. */ + + /* |n| > 1280 => 2^(n) overflows. */ + svbool_t p_cmp = svacgt (pg, n, 1280.0); + + svfloat64_t r1 = svmul_x (pg, s1, s1); + svfloat64_t r2 = svmla_x (pg, s2, s2, y); + svfloat64_t r0 = svmul_x (pg, r2, s1); + + return svsel (p_cmp, r1, r0); +} + +/* SVE exp algorithm. Maximum measured error is 1.01ulps: + SV_NAME_D1 (exp)(0x1.4619d7b04da41p+6) got 0x1.885d9acc41da7p+117 + want 0x1.885d9acc41da6p+117. */ +svfloat64_t SV_NAME_D1 (exp) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svbool_t special = svacgt (pg, x, d->thres); + + /* Use a modifed version of the shift used for flooring, such that x/ln2 is + rounded to a multiple of 2^-6=1/64, shift = 1.5 * 2^52 * 2^-6 = 1.5 * + 2^46. + + n is not an integer but can be written as n = m + i/64, with i and m + integer, 0 <= i < 64 and m <= n. + + Bits 5:0 of z will be null every time x/ln2 reaches a new integer value + (n=m, i=0), and is incremented every time z (or n) is incremented by 1/64. + FEXPA expects i in bits 5:0 of the input so it can be used as index into + FEXPA hardwired table T[i] = 2^(i/64) for i = 0:63, that will in turn + populate the mantissa of the output. Therefore, we use u=asuint(z) as + input to FEXPA. + + We add 1023 to the modified shift value in order to set bits 16:6 of u to + 1, such that once these bits are moved to the exponent of the output of + FEXPA, we get the exponent of 2^n right, i.e. we get 2^m. */ + svfloat64_t z = svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2); + svuint64_t u = svreinterpret_u64 (z); + svfloat64_t n = svsub_x (pg, z, d->shift); + + /* r = x - n * ln2, r is in [-ln2/(2N), ln2/(2N)]. */ + svfloat64_t ln2 = svld1rq (svptrue_b64 (), &d->ln2_hi); + svfloat64_t r = svmls_lane (x, n, ln2, 0); + r = svmls_lane (r, n, ln2, 1); + + /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4 + C3 r^5. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t p01 = svmla_x (pg, C (0), C (1), r); + svfloat64_t p23 = svmla_x (pg, C (2), C (3), r); + svfloat64_t p04 = svmla_x (pg, p01, p23, r2); + svfloat64_t y = svmla_x (pg, r, p04, r2); + + /* s = 2^n, computed using FEXPA. FEXPA does not propagate NaNs, so for + consistent NaN handling we have to manually propagate them. This comes at + significant performance cost. */ + svfloat64_t s = svexpa (u); + + /* Assemble result as exp(x) = 2^n * exp(r). If |x| > Thresh the + multiplication may overflow, so use special case routine. */ + + if (unlikely (svptest_any (pg, special))) + { + /* FEXPA zeroes the sign bit, however the sign is meaningful to the + special case function so needs to be copied. + e = sign bit of u << 46. */ + svuint64_t e = svand_x (pg, svlsl_x (pg, u, 46), 0x8000000000000000); + /* Copy sign to s. */ + s = svreinterpret_f64 (svadd_x (pg, e, svreinterpret_u64 (s))); + return special_case (pg, s, y, n); + } + + /* No special case. */ + return svmla_x (pg, s, s, y); +} + +PL_SIG (SV, D, 1, exp, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_D1 (exp), 1.46) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp), 0, 0x1p-23, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp), 0x1p-23, 1, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp), 1, 0x1p23, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (exp), 0x1p23, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_expf_2u.c b/contrib/arm-optimized-routines/pl/math/sv_expf_2u.c new file mode 100644 index 000000000000..93d705ce420a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_expf_2u.c @@ -0,0 +1,86 @@ +/* + * Single-precision vector e^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly[5]; + float inv_ln2, ln2_hi, ln2_lo, shift, thres; +} data = { + /* Coefficients copied from the polynomial in AdvSIMD variant, reversed for + compatibility with polynomial helpers. */ + .poly = { 0x1.ffffecp-1f, 0x1.fffdb6p-2f, 0x1.555e66p-3f, 0x1.573e2ep-5f, + 0x1.0e4020p-7f }, + .inv_ln2 = 0x1.715476p+0f, + .ln2_hi = 0x1.62e4p-1f, + .ln2_lo = 0x1.7f7d1cp-20f, + /* 1.5*2^17 + 127. */ + .shift = 0x1.903f8p17f, + /* Roughly 87.3. For x < -Thres, the result is subnormal and not handled + correctly by FEXPA. */ + .thres = 0x1.5d5e2ap+6f, +}; + +#define C(i) sv_f32 (d->poly[i]) +#define ExponentBias 0x3f800000 + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (expf, x, y, special); +} + +/* Optimised single-precision SVE exp function. + Worst-case error is 1.04 ulp: + SV_NAME_F1 (exp)(0x1.a8eda4p+1) got 0x1.ba74bcp+4 + want 0x1.ba74bap+4. */ +svfloat32_t SV_NAME_F1 (exp) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ + + /* Load some constants in quad-word chunks to minimise memory access (last + lane is wasted). */ + svfloat32_t invln2_and_ln2 = svld1rq (svptrue_b32 (), &d->inv_ln2); + + /* n = round(x/(ln2/N)). */ + svfloat32_t z = svmla_lane (sv_f32 (d->shift), x, invln2_and_ln2, 0); + svfloat32_t n = svsub_x (pg, z, d->shift); + + /* r = x - n*ln2/N. */ + svfloat32_t r = svmls_lane (x, n, invln2_and_ln2, 1); + r = svmls_lane (r, n, invln2_and_ln2, 2); + + /* scale = 2^(n/N). */ + svbool_t is_special_case = svacgt (pg, x, d->thres); + svfloat32_t scale = svexpa (svreinterpret_u32 (z)); + + /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4 + C3 r^5 + C4 r^6. */ + svfloat32_t p12 = svmla_x (pg, C (1), C (2), r); + svfloat32_t p34 = svmla_x (pg, C (3), C (4), r); + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t p14 = svmla_x (pg, p12, p34, r2); + svfloat32_t p0 = svmul_x (pg, r, C (0)); + svfloat32_t poly = svmla_x (pg, p0, r2, p14); + + if (unlikely (svptest_any (pg, is_special_case))) + return special_case (x, svmla_x (pg, scale, scale, poly), is_special_case); + + return svmla_x (pg, scale, scale, poly); +} + +PL_SIG (SV, F, 1, exp, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_F1 (exp), 0.55) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp), 0, 0x1p-23, 40000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp), 0x1p-23, 1, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp), 1, 0x1p23, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (exp), 0x1p23, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_expf_inline.h b/contrib/arm-optimized-routines/pl/math/sv_expf_inline.h new file mode 100644 index 000000000000..0ef4e0fda946 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_expf_inline.h @@ -0,0 +1,66 @@ +/* + * SVE helper for single-precision routines which calculate exp(x) and do + * not need special-case handling + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_SV_EXPF_INLINE_H +#define PL_MATH_SV_EXPF_INLINE_H + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +struct sv_expf_data +{ + float poly[5]; + float inv_ln2, ln2_hi, ln2_lo, shift; +}; + +/* Coefficients copied from the polynomial in AdvSIMD variant, reversed for + compatibility with polynomial helpers. Shift is 1.5*2^17 + 127. */ +#define SV_EXPF_DATA \ + { \ + .poly = { 0x1.ffffecp-1f, 0x1.fffdb6p-2f, 0x1.555e66p-3f, 0x1.573e2ep-5f, \ + 0x1.0e4020p-7f }, \ + \ + .inv_ln2 = 0x1.715476p+0f, .ln2_hi = 0x1.62e4p-1f, \ + .ln2_lo = 0x1.7f7d1cp-20f, .shift = 0x1.803f8p17f, \ + } + +#define C(i) sv_f32 (d->poly[i]) + +static inline svfloat32_t +expf_inline (svfloat32_t x, const svbool_t pg, const struct sv_expf_data *d) +{ + /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ + + /* Load some constants in quad-word chunks to minimise memory access. */ + svfloat32_t c4_invln2_and_ln2 = svld1rq (svptrue_b32 (), &d->poly[4]); + + /* n = round(x/(ln2/N)). */ + svfloat32_t z = svmla_lane (sv_f32 (d->shift), x, c4_invln2_and_ln2, 1); + svfloat32_t n = svsub_x (pg, z, d->shift); + + /* r = x - n*ln2/N. */ + svfloat32_t r = svmls_lane (x, n, c4_invln2_and_ln2, 2); + r = svmls_lane (r, n, c4_invln2_and_ln2, 3); + + /* scale = 2^(n/N). */ + svfloat32_t scale = svexpa (svreinterpret_u32_f32 (z)); + + /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4 + C3 r^5 + C4 r^6. */ + svfloat32_t p12 = svmla_x (pg, C (1), C (2), r); + svfloat32_t p34 = svmla_lane (C (3), r, c4_invln2_and_ln2, 0); + svfloat32_t r2 = svmul_f32_x (pg, r, r); + svfloat32_t p14 = svmla_x (pg, p12, p34, r2); + svfloat32_t p0 = svmul_f32_x (pg, r, C (0)); + svfloat32_t poly = svmla_x (pg, p0, r2, p14); + + return svmla_x (pg, scale, scale, poly); +} + +#endif // PL_MATH_SV_EXPF_INLINE_H
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/sv_expm1_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_expm1_2u5.c new file mode 100644 index 000000000000..82a31f6d9c0e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_expm1_2u5.c @@ -0,0 +1,95 @@ +/* + * Double-precision vector exp(x) - 1 function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define SpecialBound 0x1.62b7d369a5aa9p+9 +#define ExponentBias 0x3ff0000000000000 + +static const struct data +{ + double poly[11]; + double shift, inv_ln2, special_bound; + /* To be loaded in one quad-word. */ + double ln2_hi, ln2_lo; +} data = { + /* Generated using fpminimax. */ + .poly = { 0x1p-1, 0x1.5555555555559p-3, 0x1.555555555554bp-5, + 0x1.111111110f663p-7, 0x1.6c16c16c1b5f3p-10, 0x1.a01a01affa35dp-13, + 0x1.a01a018b4ecbbp-16, 0x1.71ddf82db5bb4p-19, 0x1.27e517fc0d54bp-22, + 0x1.af5eedae67435p-26, 0x1.1f143d060a28ap-29, }, + + .special_bound = SpecialBound, + .inv_ln2 = 0x1.71547652b82fep0, + .ln2_hi = 0x1.62e42fefa39efp-1, + .ln2_lo = 0x1.abc9e3b39803fp-56, + .shift = 0x1.8p52, +}; + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t pg) +{ + return sv_call_f64 (expm1, x, y, pg); +} + +/* Double-precision vector exp(x) - 1 function. + The maximum error observed error is 2.18 ULP: + _ZGVsMxv_expm1(0x1.634ba0c237d7bp-2) got 0x1.a8b9ea8d66e22p-2 + want 0x1.a8b9ea8d66e2p-2. */ +svfloat64_t SV_NAME_D1 (expm1) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Large, Nan/Inf. */ + svbool_t special = svnot_z (pg, svaclt (pg, x, d->special_bound)); + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + svfloat64_t shift = sv_f64 (d->shift); + svfloat64_t n = svsub_x (pg, svmla_x (pg, shift, x, d->inv_ln2), shift); + svint64_t i = svcvt_s64_x (pg, n); + svfloat64_t ln2 = svld1rq (svptrue_b64 (), &d->ln2_hi); + svfloat64_t f = svmls_lane (x, n, ln2, 0); + f = svmls_lane (f, n, ln2, 1); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + svfloat64_t f2 = svmul_x (pg, f, f); + svfloat64_t f4 = svmul_x (pg, f2, f2); + svfloat64_t f8 = svmul_x (pg, f4, f4); + svfloat64_t p + = svmla_x (pg, f, f2, sv_estrin_10_f64_x (pg, f, f2, f4, f8, d->poly)); + + /* Assemble the result. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^i. */ + svint64_t u = svadd_x (pg, svlsl_x (pg, i, 52), ExponentBias); + svfloat64_t t = svreinterpret_f64 (u); + + /* expm1(x) ~= p * t + (t - 1). */ + svfloat64_t y = svmla_x (pg, svsub_x (pg, t, 1), p, t); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, y, special); + + return y; +} + +PL_SIG (SV, D, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_D1 (expm1), 1.68) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (expm1), 0, 0x1p-23, 1000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (expm1), 0x1p-23, SpecialBound, 200000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (expm1), SpecialBound, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_expm1f_1u6.c b/contrib/arm-optimized-routines/pl/math/sv_expm1f_1u6.c new file mode 100644 index 000000000000..0ec7c00f5300 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_expm1f_1u6.c @@ -0,0 +1,93 @@ +/* + * Single-precision vector exp(x) - 1 function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Largest value of x for which expm1(x) should round to -1. */ +#define SpecialBound 0x1.5ebc4p+6f + +static const struct data +{ + /* These 4 are grouped together so they can be loaded as one quadword, then + used with _lane forms of svmla/svmls. */ + float c2, c4, ln2_hi, ln2_lo; + float c0, c1, c3, inv_ln2, special_bound, shift; +} data = { + /* Generated using fpminimax. */ + .c0 = 0x1.fffffep-2, .c1 = 0x1.5554aep-3, + .c2 = 0x1.555736p-5, .c3 = 0x1.12287cp-7, + .c4 = 0x1.6b55a2p-10, + + .special_bound = SpecialBound, .shift = 0x1.8p23f, + .inv_ln2 = 0x1.715476p+0f, .ln2_hi = 0x1.62e4p-1f, + .ln2_lo = 0x1.7f7d1cp-20f, +}; + +#define C(i) sv_f32 (d->c##i) + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svbool_t pg) +{ + return sv_call_f32 (expm1f, x, x, pg); +} + +/* Single-precision SVE exp(x) - 1. Maximum error is 1.52 ULP: + _ZGVsMxv_expm1f(0x1.8f4ebcp-2) got 0x1.e859dp-2 + want 0x1.e859d4p-2. */ +svfloat32_t SV_NAME_F1 (expm1) (svfloat32_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Large, NaN/Inf. */ + svbool_t special = svnot_z (pg, svaclt (pg, x, d->special_bound)); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, pg); + + /* This vector is reliant on layout of data - it contains constants + that can be used with _lane forms of svmla/svmls. Values are: + [ coeff_2, coeff_4, ln2_hi, ln2_lo ]. */ + svfloat32_t lane_constants = svld1rq (svptrue_b32 (), &d->c2); + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + svfloat32_t j = svmla_x (pg, sv_f32 (d->shift), x, d->inv_ln2); + j = svsub_x (pg, j, d->shift); + svint32_t i = svcvt_s32_x (pg, j); + + svfloat32_t f = svmls_lane (x, j, lane_constants, 2); + f = svmls_lane (f, j, lane_constants, 3); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + svfloat32_t p12 = svmla_lane (C (1), f, lane_constants, 0); + svfloat32_t p34 = svmla_lane (C (3), f, lane_constants, 1); + svfloat32_t f2 = svmul_x (pg, f, f); + svfloat32_t p = svmla_x (pg, p12, f2, p34); + p = svmla_x (pg, C (0), f, p); + p = svmla_x (pg, f, f2, p); + + /* Assemble the result. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^i. */ + svfloat32_t t = svreinterpret_f32 ( + svadd_x (pg, svreinterpret_u32 (svlsl_x (pg, i, 23)), 0x3f800000)); + return svmla_x (pg, svsub_x (pg, t, 1), p, t); +} + +PL_SIG (SV, F, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (SV_NAME_F1 (expm1), 1.02) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (expm1), 0, SpecialBound, 100000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (expm1), SpecialBound, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_expm1f_inline.h b/contrib/arm-optimized-routines/pl/math/sv_expm1f_inline.h new file mode 100644 index 000000000000..a6e2050ff4a6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_expm1f_inline.h @@ -0,0 +1,73 @@ +/* + * SVE helper for single-precision routines which calculate exp(x) - 1 and do + * not need special-case handling + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_SV_EXPM1F_INLINE_H +#define PL_MATH_SV_EXPM1F_INLINE_H + +#include "sv_math.h" + +struct sv_expm1f_data +{ + /* These 4 are grouped together so they can be loaded as one quadword, then + used with _lane forms of svmla/svmls. */ + float32_t c2, c4, ln2_hi, ln2_lo; + float32_t c0, c1, c3, inv_ln2, shift; +}; + +/* Coefficients generated using fpminimax. */ +#define SV_EXPM1F_DATA \ + { \ + .c0 = 0x1.fffffep-2, .c1 = 0x1.5554aep-3, .c2 = 0x1.555736p-5, \ + .c3 = 0x1.12287cp-7, .c4 = 0x1.6b55a2p-10, \ + \ + .shift = 0x1.8p23f, .inv_ln2 = 0x1.715476p+0f, .ln2_hi = 0x1.62e4p-1f, \ + .ln2_lo = 0x1.7f7d1cp-20f, \ + } + +#define C(i) sv_f32 (d->c##i) + +static inline svfloat32_t +expm1f_inline (svfloat32_t x, svbool_t pg, const struct sv_expm1f_data *d) +{ + /* This vector is reliant on layout of data - it contains constants + that can be used with _lane forms of svmla/svmls. Values are: + [ coeff_2, coeff_4, ln2_hi, ln2_lo ]. */ + svfloat32_t lane_constants = svld1rq (svptrue_b32 (), &d->c2); + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + svfloat32_t j = svmla_x (pg, sv_f32 (d->shift), x, d->inv_ln2); + j = svsub_x (pg, j, d->shift); + svint32_t i = svcvt_s32_x (pg, j); + + svfloat32_t f = svmls_lane (x, j, lane_constants, 2); + f = svmls_lane (f, j, lane_constants, 3); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + svfloat32_t p12 = svmla_lane (C (1), f, lane_constants, 0); + svfloat32_t p34 = svmla_lane (C (3), f, lane_constants, 1); + svfloat32_t f2 = svmul_x (pg, f, f); + svfloat32_t p = svmla_x (pg, p12, f2, p34); + p = svmla_x (pg, C (0), f, p); + p = svmla_x (pg, f, f2, p); + + /* Assemble the result. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^i. */ + svfloat32_t t = svscale_x (pg, sv_f32 (1), i); + return svmla_x (pg, svsub_x (pg, t, 1), p, t); +} + +#endif // PL_MATH_SV_EXPM1F_INLINE_H
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/sv_hypot_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_hypot_1u5.c new file mode 100644 index 000000000000..cf1590e4b9ab --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_hypot_1u5.c @@ -0,0 +1,51 @@ +/* + * Double-precision SVE hypot(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint64_t tiny_bound, thres; +} data = { + .tiny_bound = 0x0c80000000000000, /* asuint (0x1p-102). */ + .thres = 0x7300000000000000, /* asuint (inf) - tiny_bound. */ +}; + +static svfloat64_t NOINLINE +special_case (svfloat64_t sqsum, svfloat64_t x, svfloat64_t y, svbool_t pg, + svbool_t special) +{ + return sv_call2_f64 (hypot, x, y, svsqrt_x (pg, sqsum), special); +} + +/* SVE implementation of double-precision hypot. + Maximum error observed is 1.21 ULP: + _ZGVsMxvv_hypot (-0x1.6a22d0412cdd3p+352, 0x1.d3d89bd66fb1ap+330) + got 0x1.6a22d0412cfp+352 + want 0x1.6a22d0412cf01p+352. */ +svfloat64_t SV_NAME_D2 (hypot) (svfloat64_t x, svfloat64_t y, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat64_t sqsum = svmla_x (pg, svmul_x (pg, x, x), y, y); + + svbool_t special = svcmpge ( + pg, svsub_x (pg, svreinterpret_u64 (sqsum), d->tiny_bound), d->thres); + + if (unlikely (svptest_any (pg, special))) + return special_case (sqsum, x, y, pg, special); + return svsqrt_x (pg, sqsum); +} + +PL_SIG (SV, D, 2, hypot, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D2 (hypot), 0.71) +PL_TEST_INTERVAL2 (SV_NAME_D2 (hypot), 0, inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (hypot), 0, inf, -0, -inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (hypot), -0, -inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (hypot), -0, -inf, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_hypotf_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_hypotf_1u5.c new file mode 100644 index 000000000000..f428832b3dbc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_hypotf_1u5.c @@ -0,0 +1,45 @@ +/* + * Single-precision SVE hypot(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define TinyBound 0x0c800000 /* asuint (0x1p-102). */ +#define Thres 0x73000000 /* 0x70000000 - TinyBound. */ + +static svfloat32_t NOINLINE +special_case (svfloat32_t sqsum, svfloat32_t x, svfloat32_t y, svbool_t pg, + svbool_t special) +{ + return sv_call2_f32 (hypotf, x, y, svsqrt_x (pg, sqsum), special); +} + +/* SVE implementation of single-precision hypot. + Maximum error observed is 1.21 ULP: + _ZGVsMxvv_hypotf (0x1.6a213cp-19, -0x1.32b982p-26) got 0x1.6a2346p-19 + want 0x1.6a2344p-19. */ +svfloat32_t SV_NAME_F2 (hypot) (svfloat32_t x, svfloat32_t y, + const svbool_t pg) +{ + svfloat32_t sqsum = svmla_x (pg, svmul_x (pg, x, x), y, y); + + svbool_t special = svcmpge ( + pg, svsub_x (pg, svreinterpret_u32 (sqsum), TinyBound), Thres); + + if (unlikely (svptest_any (pg, special))) + return special_case (sqsum, x, y, pg, special); + + return svsqrt_x (pg, sqsum); +} + +PL_SIG (SV, F, 2, hypot, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F2 (hypot), 0.71) +PL_TEST_INTERVAL2 (SV_NAME_F2 (hypot), 0, inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (hypot), 0, inf, -0, -inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (hypot), -0, -inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (hypot), -0, -inf, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log10_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_log10_2u5.c new file mode 100644 index 000000000000..f55e068fd442 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log10_2u5.c @@ -0,0 +1,75 @@ +/* + * Double-precision SVE log10(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +#define Min 0x0010000000000000 +#define Max 0x7ff0000000000000 +#define Thres 0x7fe0000000000000 /* Max - Min. */ +#define Off 0x3fe6900900000000 +#define N (1 << V_LOG10_TABLE_BITS) + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (log10, x, y, special); +} + +/* SVE log10 algorithm. + Maximum measured error is 2.46 ulps. + SV_NAME_D1 (log10)(0x1.131956cd4b627p+0) got 0x1.fffbdf6eaa669p-6 + want 0x1.fffbdf6eaa667p-6. */ +svfloat64_t SV_NAME_D1 (log10) (svfloat64_t x, const svbool_t pg) +{ + svuint64_t ix = svreinterpret_u64 (x); + svbool_t special = svcmpge (pg, svsub_x (pg, ix, Min), Thres); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + svuint64_t tmp = svsub_x (pg, ix, Off); + svuint64_t i = svlsr_x (pg, tmp, 51 - V_LOG10_TABLE_BITS); + i = svand_x (pg, i, (N - 1) << 1); + svfloat64_t k = svcvt_f64_x (pg, svasr_x (pg, svreinterpret_s64 (tmp), 52)); + svfloat64_t z = svreinterpret_f64 ( + svsub_x (pg, ix, svand_x (pg, tmp, 0xfffULL << 52))); + + /* log(x) = k*log(2) + log(c) + log(z/c). */ + svfloat64_t invc = svld1_gather_index (pg, &__v_log10_data.table[0].invc, i); + svfloat64_t logc + = svld1_gather_index (pg, &__v_log10_data.table[0].log10c, i); + + /* We approximate log(z/c) with a polynomial P(x) ~= log(x + 1): + r = z/c - 1 (we look up precomputed 1/c) + log(z/c) ~= P(r). */ + svfloat64_t r = svmad_x (pg, invc, z, -1.0); + + /* hi = log(c) + k*log(2). */ + svfloat64_t w = svmla_x (pg, logc, r, __v_log10_data.invln10); + svfloat64_t hi = svmla_x (pg, w, k, __v_log10_data.log10_2); + + /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t y = sv_pw_horner_4_f64_x (pg, r, r2, __v_log10_data.poly); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (svnot_z (pg, special), hi, r2, y), + special); + return svmla_x (pg, hi, r2, y); +} + +PL_SIG (SV, D, 1, log10, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_D1 (log10), 1.97) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), -0.0, -0x1p126, 100) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log10), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log10f_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_log10f_3u5.c new file mode 100644 index 000000000000..a685b23e5de5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log10f_3u5.c @@ -0,0 +1,93 @@ +/* + * Single-precision SVE log10 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly_0246[4]; + float poly_1357[4]; + float ln2, inv_ln10; +} data = { + .poly_1357 = { + /* Coefficients copied from the AdvSIMD routine, then rearranged so that coeffs + 1, 3, 5 and 7 can be loaded as a single quad-word, hence used with _lane + variant of MLA intrinsic. */ + 0x1.2879c8p-3f, 0x1.6408f8p-4f, 0x1.f0e514p-5f, 0x1.f5f76ap-5f + }, + .poly_0246 = { -0x1.bcb79cp-3f, -0x1.bcd472p-4f, -0x1.246f8p-4f, + -0x1.0fc92cp-4f }, + .ln2 = 0x1.62e43p-1f, + .inv_ln10 = 0x1.bcb7b2p-2f, +}; + +#define Min 0x00800000 +#define Max 0x7f800000 +#define Thres 0x7f000000 /* Max - Min. */ +#define Offset 0x3f2aaaab /* 0.666667. */ +#define MantissaMask 0x007fffff + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (log10f, x, y, special); +} + +/* Optimised implementation of SVE log10f using the same algorithm and + polynomial as AdvSIMD log10f. + Maximum error is 3.31ulps: + SV_NAME_F1 (log10)(0x1.555c16p+0) got 0x1.ffe2fap-4 + want 0x1.ffe2f4p-4. */ +svfloat32_t SV_NAME_F1 (log10) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + svuint32_t ix = svreinterpret_u32 (x); + svbool_t special = svcmpge (pg, svsub_x (pg, ix, Min), Thres); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + ix = svsub_x (pg, ix, Offset); + svfloat32_t n = svcvt_f32_x ( + pg, svasr_x (pg, svreinterpret_s32 (ix), 23)); /* signextend. */ + ix = svand_x (pg, ix, MantissaMask); + ix = svadd_x (pg, ix, Offset); + svfloat32_t r = svsub_x (pg, svreinterpret_f32 (ix), 1.0f); + + /* y = log10(1+r) + n*log10(2) + log10(1+r) ~ r * InvLn(10) + P(r) + where P(r) is a polynomial. Use order 9 for log10(1+x), i.e. order 8 for + log10(1+x)/x, with x in [-1/3, 1/3] (offset=2/3). */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t r4 = svmul_x (pg, r2, r2); + svfloat32_t p_1357 = svld1rq (svptrue_b32 (), &d->poly_1357[0]); + svfloat32_t q_01 = svmla_lane (sv_f32 (d->poly_0246[0]), r, p_1357, 0); + svfloat32_t q_23 = svmla_lane (sv_f32 (d->poly_0246[1]), r, p_1357, 1); + svfloat32_t q_45 = svmla_lane (sv_f32 (d->poly_0246[2]), r, p_1357, 2); + svfloat32_t q_67 = svmla_lane (sv_f32 (d->poly_0246[3]), r, p_1357, 3); + svfloat32_t q_47 = svmla_x (pg, q_45, r2, q_67); + svfloat32_t q_03 = svmla_x (pg, q_01, r2, q_23); + svfloat32_t y = svmla_x (pg, q_03, r4, q_47); + + /* Using hi = Log10(2)*n + r*InvLn(10) is faster but less accurate. */ + svfloat32_t hi = svmla_x (pg, r, n, d->ln2); + hi = svmul_x (pg, hi, d->inv_ln10); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (svnot_z (pg, special), hi, r2, y), + special); + return svmla_x (pg, hi, r2, y); +} + +PL_SIG (SV, F, 1, log10, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_F1 (log10), 2.82) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), -0.0, -0x1p126, 100) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log10), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log1p_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_log1p_2u5.c new file mode 100644 index 000000000000..f178ab16238a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log1p_2u5.c @@ -0,0 +1,116 @@ +/* + * Double-precision SVE log(1+x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double poly[19]; + double ln2_hi, ln2_lo; + uint64_t hfrt2_top, onemhfrt2_top, inf, mone; +} data = { + /* Generated using Remez in [ sqrt(2)/2 - 1, sqrt(2) - 1]. Order 20 + polynomial, however first 2 coefficients are 0 and 1 so are not stored. */ + .poly = { -0x1.ffffffffffffbp-2, 0x1.55555555551a9p-2, -0x1.00000000008e3p-2, + 0x1.9999999a32797p-3, -0x1.555555552fecfp-3, 0x1.249248e071e5ap-3, + -0x1.ffffff8bf8482p-4, 0x1.c71c8f07da57ap-4, -0x1.9999ca4ccb617p-4, + 0x1.7459ad2e1dfa3p-4, -0x1.554d2680a3ff2p-4, 0x1.3b4c54d487455p-4, + -0x1.2548a9ffe80e6p-4, 0x1.0f389a24b2e07p-4, -0x1.eee4db15db335p-5, + 0x1.e95b494d4a5ddp-5, -0x1.15fdf07cb7c73p-4, 0x1.0310b70800fcfp-4, + -0x1.cfa7385bdb37ep-6, }, + .ln2_hi = 0x1.62e42fefa3800p-1, + .ln2_lo = 0x1.ef35793c76730p-45, + /* top32(asuint64(sqrt(2)/2)) << 32. */ + .hfrt2_top = 0x3fe6a09e00000000, + /* (top32(asuint64(1)) - top32(asuint64(sqrt(2)/2))) << 32. */ + .onemhfrt2_top = 0x00095f6200000000, + .inf = 0x7ff0000000000000, + .mone = 0xbff0000000000000, +}; + +#define AbsMask 0x7fffffffffffffff +#define BottomMask 0xffffffff + +static svfloat64_t NOINLINE +special_case (svbool_t special, svfloat64_t x, svfloat64_t y) +{ + return sv_call_f64 (log1p, x, y, special); +} + +/* Vector approximation for log1p using polynomial on reduced interval. Maximum + observed error is 2.46 ULP: + _ZGVsMxv_log1p(0x1.654a1307242a4p+11) got 0x1.fd5565fb590f4p+2 + want 0x1.fd5565fb590f6p+2. */ +svfloat64_t SV_NAME_D1 (log1p) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t ax = svand_x (pg, ix, AbsMask); + svbool_t special + = svorr_z (pg, svcmpge (pg, ax, d->inf), svcmpge (pg, ix, d->mone)); + + /* With x + 1 = t * 2^k (where t = f + 1 and k is chosen such that f + is in [sqrt(2)/2, sqrt(2)]): + log1p(x) = k*log(2) + log1p(f). + + f may not be representable exactly, so we need a correction term: + let m = round(1 + x), c = (1 + x) - m. + c << m: at very small x, log1p(x) ~ x, hence: + log(1+x) - log(m) ~ c/m. + + We therefore calculate log1p(x) by k*log2 + log1p(f) + c/m. */ + + /* Obtain correctly scaled k by manipulation in the exponent. + The scalar algorithm casts down to 32-bit at this point to calculate k and + u_red. We stay in double-width to obtain f and k, using the same constants + as the scalar algorithm but shifted left by 32. */ + svfloat64_t m = svadd_x (pg, x, 1); + svuint64_t mi = svreinterpret_u64 (m); + svuint64_t u = svadd_x (pg, mi, d->onemhfrt2_top); + + svint64_t ki = svsub_x (pg, svreinterpret_s64 (svlsr_x (pg, u, 52)), 0x3ff); + svfloat64_t k = svcvt_f64_x (pg, ki); + + /* Reduce x to f in [sqrt(2)/2, sqrt(2)]. */ + svuint64_t utop + = svadd_x (pg, svand_x (pg, u, 0x000fffff00000000), d->hfrt2_top); + svuint64_t u_red = svorr_x (pg, utop, svand_x (pg, mi, BottomMask)); + svfloat64_t f = svsub_x (pg, svreinterpret_f64 (u_red), 1); + + /* Correction term c/m. */ + svfloat64_t cm = svdiv_x (pg, svsub_x (pg, x, svsub_x (pg, m, 1)), m); + + /* Approximate log1p(x) on the reduced input using a polynomial. Because + log1p(0)=0 we choose an approximation of the form: + x + C0*x^2 + C1*x^3 + C2x^4 + ... + Hence approximation has the form f + f^2 * P(f) + where P(x) = C0 + C1*x + C2x^2 + ... + Assembling this all correctly is dealt with at the final step. */ + svfloat64_t f2 = svmul_x (pg, f, f), f4 = svmul_x (pg, f2, f2), + f8 = svmul_x (pg, f4, f4), f16 = svmul_x (pg, f8, f8); + svfloat64_t p = sv_estrin_18_f64_x (pg, f, f2, f4, f8, f16, d->poly); + + svfloat64_t ylo = svmla_x (pg, cm, k, d->ln2_lo); + svfloat64_t yhi = svmla_x (pg, f, k, d->ln2_hi); + svfloat64_t y = svmla_x (pg, svadd_x (pg, ylo, yhi), f2, p); + + if (unlikely (svptest_any (pg, special))) + return special_case (special, x, y); + + return y; +} + +PL_SIG (SV, D, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (SV_NAME_D1 (log1p), 1.97) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (log1p), 0.0, 0x1p-23, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (log1p), 0x1p-23, 0.001, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (log1p), 0.001, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log1p), 1, inf, 10000) +PL_TEST_INTERVAL (SV_NAME_D1 (log1p), -1, -inf, 10) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log1p_inline.h b/contrib/arm-optimized-routines/pl/math/sv_log1p_inline.h new file mode 100644 index 000000000000..983f8e1b0413 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log1p_inline.h @@ -0,0 +1,96 @@ +/* + * Helper for SVE double-precision routines which calculate log(1 + x) and do + * not need special-case handling + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#ifndef PL_MATH_SV_LOG1P_INLINE_H +#define PL_MATH_SV_LOG1P_INLINE_H + +#include "sv_math.h" +#include "poly_sve_f64.h" + +static const struct sv_log1p_data +{ + double poly[19], ln2[2]; + uint64_t hf_rt2_top; + uint64_t one_m_hf_rt2_top; + uint32_t bottom_mask; + int64_t one_top; +} sv_log1p_data = { + /* Coefficients generated using Remez, deg=20, in [sqrt(2)/2-1, sqrt(2)-1]. + */ + .poly = { -0x1.ffffffffffffbp-2, 0x1.55555555551a9p-2, -0x1.00000000008e3p-2, + 0x1.9999999a32797p-3, -0x1.555555552fecfp-3, 0x1.249248e071e5ap-3, + -0x1.ffffff8bf8482p-4, 0x1.c71c8f07da57ap-4, -0x1.9999ca4ccb617p-4, + 0x1.7459ad2e1dfa3p-4, -0x1.554d2680a3ff2p-4, 0x1.3b4c54d487455p-4, + -0x1.2548a9ffe80e6p-4, 0x1.0f389a24b2e07p-4, -0x1.eee4db15db335p-5, + 0x1.e95b494d4a5ddp-5, -0x1.15fdf07cb7c73p-4, 0x1.0310b70800fcfp-4, + -0x1.cfa7385bdb37ep-6 }, + .ln2 = { 0x1.62e42fefa3800p-1, 0x1.ef35793c76730p-45 }, + .hf_rt2_top = 0x3fe6a09e00000000, + .one_m_hf_rt2_top = 0x00095f6200000000, + .bottom_mask = 0xffffffff, + .one_top = 0x3ff +}; + +static inline svfloat64_t +sv_log1p_inline (svfloat64_t x, const svbool_t pg) +{ + /* Helper for calculating log(x + 1). Adapted from v_log1p_inline.h, which + differs from v_log1p_2u5.c by: + - No special-case handling - this should be dealt with by the caller. + - Pairwise Horner polynomial evaluation for improved accuracy. + - Optionally simulate the shortcut for k=0, used in the scalar routine, + using svsel, for improved accuracy when the argument to log1p is close + to 0. This feature is enabled by defining WANT_SV_LOG1P_K0_SHORTCUT as 1 + in the source of the caller before including this file. + See sv_log1p_2u1.c for details of the algorithm. */ + const struct sv_log1p_data *d = ptr_barrier (&sv_log1p_data); + svfloat64_t m = svadd_x (pg, x, 1); + svuint64_t mi = svreinterpret_u64 (m); + svuint64_t u = svadd_x (pg, mi, d->one_m_hf_rt2_top); + + svint64_t ki + = svsub_x (pg, svreinterpret_s64 (svlsr_x (pg, u, 52)), d->one_top); + svfloat64_t k = svcvt_f64_x (pg, ki); + + /* Reduce x to f in [sqrt(2)/2, sqrt(2)]. */ + svuint64_t utop + = svadd_x (pg, svand_x (pg, u, 0x000fffff00000000), d->hf_rt2_top); + svuint64_t u_red = svorr_x (pg, utop, svand_x (pg, mi, d->bottom_mask)); + svfloat64_t f = svsub_x (pg, svreinterpret_f64 (u_red), 1); + + /* Correction term c/m. */ + svfloat64_t c = svsub_x (pg, x, svsub_x (pg, m, 1)); + svfloat64_t cm; + +#ifndef WANT_SV_LOG1P_K0_SHORTCUT +#error \ + "Cannot use sv_log1p_inline.h without specifying whether you need the k0 shortcut for greater accuracy close to 0" +#elif WANT_SV_LOG1P_K0_SHORTCUT + /* Shortcut if k is 0 - set correction term to 0 and f to x. The result is + that the approximation is solely the polynomial. */ + svbool_t knot0 = svcmpne (pg, k, 0); + cm = svdiv_z (knot0, c, m); + if (likely (!svptest_any (pg, knot0))) + { + f = svsel (knot0, f, x); + } +#else + /* No shortcut. */ + cm = svdiv_x (pg, c, m); +#endif + + /* Approximate log1p(f) on the reduced input using a polynomial. */ + svfloat64_t f2 = svmul_x (pg, f, f); + svfloat64_t p = sv_pw_horner_18_f64_x (pg, f, f2, d->poly); + + /* Assemble log1p(x) = k * log2 + log1p(f) + c/m. */ + svfloat64_t ylo = svmla_x (pg, cm, k, d->ln2[0]); + svfloat64_t yhi = svmla_x (pg, f, k, d->ln2[1]); + + return svmla_x (pg, svadd_x (pg, ylo, yhi), f2, p); +} +#endif // PL_MATH_SV_LOG1P_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/sv_log1pf_1u3.c b/contrib/arm-optimized-routines/pl/math/sv_log1pf_1u3.c new file mode 100644 index 000000000000..ea1a3dbf723a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log1pf_1u3.c @@ -0,0 +1,97 @@ +/* + * Single-precision vector log(x + 1) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +static const struct data +{ + float poly[8]; + float ln2, exp_bias; + uint32_t four, three_quarters; +} data = {.poly = {/* Do not store first term of polynomial, which is -0.5, as + this can be fmov-ed directly instead of including it in + the main load-and-mla polynomial schedule. */ + 0x1.5555aap-2f, -0x1.000038p-2f, 0x1.99675cp-3f, + -0x1.54ef78p-3f, 0x1.28a1f4p-3f, -0x1.0da91p-3f, + 0x1.abcb6p-4f, -0x1.6f0d5ep-5f}, + .ln2 = 0x1.62e43p-1f, + .exp_bias = 0x1p-23f, + .four = 0x40800000, + .three_quarters = 0x3f400000}; + +#define SignExponentMask 0xff800000 + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (log1pf, x, y, special); +} + +/* Vector log1pf approximation using polynomial on reduced interval. Worst-case + error is 1.27 ULP very close to 0.5. + _ZGVsMxv_log1pf(0x1.fffffep-2) got 0x1.9f324p-2 + want 0x1.9f323ep-2. */ +svfloat32_t SV_NAME_F1 (log1p) (svfloat32_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + /* x < -1, Inf/Nan. */ + svbool_t special = svcmpeq (pg, svreinterpret_u32 (x), 0x7f800000); + special = svorn_z (pg, special, svcmpge (pg, x, -1)); + + /* With x + 1 = t * 2^k (where t = m + 1 and k is chosen such that m + is in [-0.25, 0.5]): + log1p(x) = log(t) + log(2^k) = log1p(m) + k*log(2). + + We approximate log1p(m) with a polynomial, then scale by + k*log(2). Instead of doing this directly, we use an intermediate + scale factor s = 4*k*log(2) to ensure the scale is representable + as a normalised fp32 number. */ + svfloat32_t m = svadd_x (pg, x, 1); + + /* Choose k to scale x to the range [-1/4, 1/2]. */ + svint32_t k + = svand_x (pg, svsub_x (pg, svreinterpret_s32 (m), d->three_quarters), + sv_s32 (SignExponentMask)); + + /* Scale x by exponent manipulation. */ + svfloat32_t m_scale = svreinterpret_f32 ( + svsub_x (pg, svreinterpret_u32 (x), svreinterpret_u32 (k))); + + /* Scale up to ensure that the scale factor is representable as normalised + fp32 number, and scale m down accordingly. */ + svfloat32_t s = svreinterpret_f32 (svsubr_x (pg, k, d->four)); + m_scale = svadd_x (pg, m_scale, svmla_x (pg, sv_f32 (-1), s, 0.25)); + + /* Evaluate polynomial on reduced interval. */ + svfloat32_t ms2 = svmul_x (pg, m_scale, m_scale), + ms4 = svmul_x (pg, ms2, ms2); + svfloat32_t p = sv_estrin_7_f32_x (pg, m_scale, ms2, ms4, d->poly); + p = svmad_x (pg, m_scale, p, -0.5); + p = svmla_x (pg, m_scale, m_scale, svmul_x (pg, m_scale, p)); + + /* The scale factor to be applied back at the end - by multiplying float(k) + by 2^-23 we get the unbiased exponent of k. */ + svfloat32_t scale_back = svmul_x (pg, svcvt_f32_x (pg, k), d->exp_bias); + + /* Apply the scaling back. */ + svfloat32_t y = svmla_x (pg, p, scale_back, d->ln2); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, y, special); + + return y; +} + +PL_SIG (SV, F, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (SV_NAME_F1 (log1p), 0.77) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (log1p), 0, 0x1p-23, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (log1p), 0x1p-23, 1, 5000) +PL_TEST_INTERVAL (SV_NAME_F1 (log1p), 1, inf, 10000) +PL_TEST_INTERVAL (SV_NAME_F1 (log1p), -1, -inf, 10) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log1pf_inline.h b/contrib/arm-optimized-routines/pl/math/sv_log1pf_inline.h new file mode 100644 index 000000000000..d13b094f6b5d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log1pf_inline.h @@ -0,0 +1,65 @@ +/* + * Helper for SVE routines which calculate log(1 + x) and do not + * need special-case handling + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_SV_LOG1PF_INLINE_H +#define PL_MATH_SV_LOG1PF_INLINE_H + +#include "v_math.h" +#include "math_config.h" +#include "poly_sve_f32.h" + +static const struct sv_log1pf_data +{ + float32_t poly[9]; + float32_t ln2; + float32_t scale_back; +} sv_log1pf_data = { + /* Polynomial generated using FPMinimax in [-0.25, 0.5]. */ + .poly = { -0x1p-1f, 0x1.5555aap-2f, -0x1.000038p-2f, 0x1.99675cp-3f, + -0x1.54ef78p-3f, 0x1.28a1f4p-3f, -0x1.0da91p-3f, 0x1.abcb6p-4f, + -0x1.6f0d5ep-5f }, + .scale_back = 0x1.0p-23f, + .ln2 = 0x1.62e43p-1f, +}; + +static inline svfloat32_t +eval_poly (svfloat32_t m, const float32_t *c, svbool_t pg) +{ + svfloat32_t p_12 = svmla_x (pg, sv_f32 (c[0]), m, sv_f32 (c[1])); + svfloat32_t m2 = svmul_x (pg, m, m); + svfloat32_t q = svmla_x (pg, m, m2, p_12); + svfloat32_t p = sv_pw_horner_6_f32_x (pg, m, m2, c + 2); + p = svmul_x (pg, m2, p); + + return svmla_x (pg, q, m2, p); +} + +static inline svfloat32_t +sv_log1pf_inline (svfloat32_t x, svbool_t pg) +{ + const struct sv_log1pf_data *d = ptr_barrier (&sv_log1pf_data); + + svfloat32_t m = svadd_x (pg, x, 1.0f); + + svint32_t ks = svsub_x (pg, svreinterpret_s32 (m), + svreinterpret_s32 (svdup_f32 (0.75f))); + ks = svand_x (pg, ks, 0xff800000); + svuint32_t k = svreinterpret_u32 (ks); + svfloat32_t s = svreinterpret_f32 ( + svsub_x (pg, svreinterpret_u32 (svdup_f32 (4.0f)), k)); + + svfloat32_t m_scale + = svreinterpret_f32 (svsub_x (pg, svreinterpret_u32 (x), k)); + m_scale + = svadd_x (pg, m_scale, svmla_x (pg, sv_f32 (-1.0f), sv_f32 (0.25f), s)); + svfloat32_t p = eval_poly (m_scale, d->poly, pg); + svfloat32_t scale_back = svmul_x (pg, svcvt_f32_x (pg, k), d->scale_back); + return svmla_x (pg, p, scale_back, d->ln2); +} + +#endif // PL_MATH_SV_LOG1PF_INLINE_H
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/sv_log2_3u.c b/contrib/arm-optimized-routines/pl/math/sv_log2_3u.c new file mode 100644 index 000000000000..0775a39cc85d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log2_3u.c @@ -0,0 +1,73 @@ +/* + * Double-precision SVE log2 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +#define N (1 << V_LOG2_TABLE_BITS) +#define Off 0x3fe6900900000000 +#define Max (0x7ff0000000000000) +#define Min (0x0010000000000000) +#define Thresh (0x7fe0000000000000) /* Max - Min. */ + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t cmp) +{ + return sv_call_f64 (log2, x, y, cmp); +} + +/* Double-precision SVE log2 routine. + Implements the same algorithm as AdvSIMD log10, with coefficients and table + entries scaled in extended precision. + The maximum observed error is 2.58 ULP: + SV_NAME_D1 (log2)(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5 + want 0x1.fffb34198d9ddp-5. */ +svfloat64_t SV_NAME_D1 (log2) (svfloat64_t x, const svbool_t pg) +{ + svuint64_t ix = svreinterpret_u64 (x); + svbool_t special = svcmpge (pg, svsub_x (pg, ix, Min), Thresh); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + svuint64_t tmp = svsub_x (pg, ix, Off); + svuint64_t i = svlsr_x (pg, tmp, 51 - V_LOG2_TABLE_BITS); + i = svand_x (pg, i, (N - 1) << 1); + svfloat64_t k = svcvt_f64_x (pg, svasr_x (pg, svreinterpret_s64 (tmp), 52)); + svfloat64_t z = svreinterpret_f64 ( + svsub_x (pg, ix, svand_x (pg, tmp, 0xfffULL << 52))); + + svfloat64_t invc = svld1_gather_index (pg, &__v_log2_data.table[0].invc, i); + svfloat64_t log2c + = svld1_gather_index (pg, &__v_log2_data.table[0].log2c, i); + + /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */ + + svfloat64_t r = svmad_x (pg, invc, z, -1.0); + svfloat64_t w = svmla_x (pg, log2c, r, __v_log2_data.invln2); + + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t y = sv_pw_horner_4_f64_x (pg, r, r2, __v_log2_data.poly); + w = svadd_x (pg, k, w); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (svnot_z (pg, special), w, r2, y), + special); + return svmla_x (pg, w, r2, y); +} + +PL_SIG (SV, D, 1, log2, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_D1 (log2), 2.09) +PL_TEST_EXPECT_FENV_ALWAYS (SV_NAME_D1 (log2)) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), -0.0, -0x1p126, 1000) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), 0.0, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log2), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log2f_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_log2f_2u5.c new file mode 100644 index 000000000000..9e96c62bbcc6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log2f_2u5.c @@ -0,0 +1,86 @@ +/* + * Single-precision vector/SVE log2 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly_02468[5]; + float poly_1357[4]; +} data = { + .poly_1357 = { + /* Coefficients copied from the AdvSIMD routine, then rearranged so that coeffs + 1, 3, 5 and 7 can be loaded as a single quad-word, hence used with _lane + variant of MLA intrinsic. */ + -0x1.715458p-1f, -0x1.7171a4p-2f, -0x1.e5143ep-3f, -0x1.c675bp-3f + }, + .poly_02468 = { 0x1.715476p0f, 0x1.ec701cp-2f, 0x1.27a0b8p-2f, + 0x1.9d8ecap-3f, 0x1.9e495p-3f }, +}; + +#define Min (0x00800000) +#define Max (0x7f800000) +#define Thres (0x7f000000) /* Max - Min. */ +#define MantissaMask (0x007fffff) +#define Off (0x3f2aaaab) /* 0.666667. */ + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t cmp) +{ + return sv_call_f32 (log2f, x, y, cmp); +} + +/* Optimised implementation of SVE log2f, using the same algorithm + and polynomial as AdvSIMD log2f. + Maximum error is 2.48 ULPs: + SV_NAME_F1 (log2)(0x1.558174p+0) got 0x1.a9be84p-2 + want 0x1.a9be8p-2. */ +svfloat32_t SV_NAME_F1 (log2) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint32_t u = svreinterpret_u32 (x); + svbool_t special = svcmpge (pg, svsub_x (pg, u, Min), Thres); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = svsub_x (pg, u, Off); + svfloat32_t n = svcvt_f32_x ( + pg, svasr_x (pg, svreinterpret_s32 (u), 23)); /* Sign-extend. */ + u = svand_x (pg, u, MantissaMask); + u = svadd_x (pg, u, Off); + svfloat32_t r = svsub_x (pg, svreinterpret_f32 (u), 1.0f); + + /* y = log2(1+r) + n. */ + svfloat32_t r2 = svmul_x (pg, r, r); + + /* Evaluate polynomial using pairwise Horner scheme. */ + svfloat32_t p_1357 = svld1rq (svptrue_b32 (), &d->poly_1357[0]); + svfloat32_t q_01 = svmla_lane (sv_f32 (d->poly_02468[0]), r, p_1357, 0); + svfloat32_t q_23 = svmla_lane (sv_f32 (d->poly_02468[1]), r, p_1357, 1); + svfloat32_t q_45 = svmla_lane (sv_f32 (d->poly_02468[2]), r, p_1357, 2); + svfloat32_t q_67 = svmla_lane (sv_f32 (d->poly_02468[3]), r, p_1357, 3); + svfloat32_t y = svmla_x (pg, q_67, r2, sv_f32 (d->poly_02468[4])); + y = svmla_x (pg, q_45, r2, y); + y = svmla_x (pg, q_23, r2, y); + y = svmla_x (pg, q_01, r2, y); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmla_x (svnot_z (pg, special), n, r, y), special); + return svmla_x (pg, n, r, y); +} + +PL_SIG (SV, F, 1, log2, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_F1 (log2), 1.99) +PL_TEST_EXPECT_FENV_ALWAYS (SV_NAME_F1 (log2)) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), -0.0, -0x1p126, 4000) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), 0.0, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log2), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_log_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_log_2u5.c new file mode 100644 index 000000000000..2530c9e3f62c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_log_2u5.c @@ -0,0 +1,76 @@ +/* + * Double-precision SVE log(x) function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define P(i) sv_f64 (__v_log_data.poly[i]) +#define N (1 << V_LOG_TABLE_BITS) +#define Off (0x3fe6900900000000) +#define MaxTop (0x7ff) +#define MinTop (0x001) +#define ThreshTop (0x7fe) /* MaxTop - MinTop. */ + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t cmp) +{ + return sv_call_f64 (log, x, y, cmp); +} + +/* SVE port of AdvSIMD log algorithm. + Maximum measured error is 2.17 ulp: + SV_NAME_D1 (log)(0x1.a6129884398a3p+0) got 0x1.ffffff1cca043p-2 + want 0x1.ffffff1cca045p-2. */ +svfloat64_t SV_NAME_D1 (log) (svfloat64_t x, const svbool_t pg) +{ + svuint64_t ix = svreinterpret_u64 (x); + svuint64_t top = svlsr_x (pg, ix, 52); + svbool_t cmp = svcmpge (pg, svsub_x (pg, top, MinTop), sv_u64 (ThreshTop)); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + svuint64_t tmp = svsub_x (pg, ix, Off); + /* Calculate table index = (tmp >> (52 - V_LOG_TABLE_BITS)) % N. + The actual value of i is double this due to table layout. */ + svuint64_t i + = svand_x (pg, svlsr_x (pg, tmp, (51 - V_LOG_TABLE_BITS)), (N - 1) << 1); + svint64_t k + = svasr_x (pg, svreinterpret_s64 (tmp), 52); /* Arithmetic shift. */ + svuint64_t iz = svsub_x (pg, ix, svand_x (pg, tmp, 0xfffULL << 52)); + svfloat64_t z = svreinterpret_f64 (iz); + /* Lookup in 2 global lists (length N). */ + svfloat64_t invc = svld1_gather_index (pg, &__v_log_data.table[0].invc, i); + svfloat64_t logc = svld1_gather_index (pg, &__v_log_data.table[0].logc, i); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + svfloat64_t r = svmad_x (pg, invc, z, -1); + svfloat64_t kd = svcvt_f64_x (pg, k); + /* hi = r + log(c) + k*Ln2. */ + svfloat64_t hi = svmla_x (pg, svadd_x (pg, logc, r), kd, __v_log_data.ln2); + /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t y = svmla_x (pg, P (2), r, P (3)); + svfloat64_t p = svmla_x (pg, P (0), r, P (1)); + y = svmla_x (pg, y, r2, P (4)); + y = svmla_x (pg, p, r2, y); + + if (unlikely (svptest_any (pg, cmp))) + return special_case (x, svmla_x (svnot_z (pg, cmp), hi, r2, y), cmp); + return svmla_x (pg, hi, r2, y); +} + +PL_SIG (SV, D, 1, log, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_D1 (log), 1.68) +PL_TEST_INTERVAL (SV_NAME_D1 (log), -0.0, -inf, 1000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 0, 0x1p-149, 1000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_D1 (log), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_logf_3u4.c b/contrib/arm-optimized-routines/pl/math/sv_logf_3u4.c new file mode 100644 index 000000000000..967355247036 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_logf_3u4.c @@ -0,0 +1,86 @@ +/* + * Single-precision vector log function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly_0135[4]; + float poly_246[3]; + float ln2; +} data = { + .poly_0135 = { + /* Coefficients copied from the AdvSIMD routine in math/, then rearranged so + that coeffs 0, 1, 3 and 5 can be loaded as a single quad-word, hence used + with _lane variant of MLA intrinsic. */ + -0x1.3e737cp-3f, 0x1.5a9aa2p-3f, 0x1.961348p-3f, 0x1.555d7cp-2f + }, + .poly_246 = { -0x1.4f9934p-3f, -0x1.00187cp-2f, -0x1.ffffc8p-2f }, + .ln2 = 0x1.62e43p-1f +}; + +#define Min (0x00800000) +#define Max (0x7f800000) +#define Thresh (0x7f000000) /* Max - Min. */ +#define Mask (0x007fffff) +#define Off (0x3f2aaaab) /* 0.666667. */ + +float optr_aor_log_f32 (float); + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t cmp) +{ + return sv_call_f32 (optr_aor_log_f32, x, y, cmp); +} + +/* Optimised implementation of SVE logf, using the same algorithm and + polynomial as the AdvSIMD routine. Maximum error is 3.34 ULPs: + SV_NAME_F1 (log)(0x1.557298p+0) got 0x1.26edecp-2 + want 0x1.26ede6p-2. */ +svfloat32_t SV_NAME_F1 (log) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint32_t u = svreinterpret_u32 (x); + svbool_t cmp = svcmpge (pg, svsub_x (pg, u, Min), Thresh); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = svsub_x (pg, u, Off); + svfloat32_t n = svcvt_f32_x ( + pg, svasr_x (pg, svreinterpret_s32 (u), 23)); /* Sign-extend. */ + u = svand_x (pg, u, Mask); + u = svadd_x (pg, u, Off); + svfloat32_t r = svsub_x (pg, svreinterpret_f32 (u), 1.0f); + + /* y = log(1+r) + n*ln2. */ + svfloat32_t r2 = svmul_x (pg, r, r); + /* n*ln2 + r + r2*(P6 + r*P5 + r2*(P4 + r*P3 + r2*(P2 + r*P1 + r2*P0))). */ + svfloat32_t p_0135 = svld1rq (svptrue_b32 (), &d->poly_0135[0]); + svfloat32_t p = svmla_lane (sv_f32 (d->poly_246[0]), r, p_0135, 1); + svfloat32_t q = svmla_lane (sv_f32 (d->poly_246[1]), r, p_0135, 2); + svfloat32_t y = svmla_lane (sv_f32 (d->poly_246[2]), r, p_0135, 3); + p = svmla_lane (p, r2, p_0135, 0); + + q = svmla_x (pg, q, r2, p); + y = svmla_x (pg, y, r2, q); + p = svmla_x (pg, r, n, d->ln2); + + if (unlikely (svptest_any (pg, cmp))) + return special_case (x, svmla_x (svnot_z (pg, cmp), p, r2, y), cmp); + return svmla_x (pg, p, r2, y); +} + +PL_SIG (SV, F, 1, log, 0.01, 11.1) +PL_TEST_ULP (SV_NAME_F1 (log), 2.85) +PL_TEST_INTERVAL (SV_NAME_F1 (log), -0.0, -inf, 100) +PL_TEST_INTERVAL (SV_NAME_F1 (log), 0, 0x1p-126, 100) +PL_TEST_INTERVAL (SV_NAME_F1 (log), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log), 1.0, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (log), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_math.h b/contrib/arm-optimized-routines/pl/math/sv_math.h new file mode 100644 index 000000000000..f67fe91803ba --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_math.h @@ -0,0 +1,133 @@ +/* + * Wrapper functions for SVE ACLE. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef SV_MATH_H +#define SV_MATH_H + +#ifndef WANT_VMATH +/* Enable the build of vector math code. */ +# define WANT_VMATH 1 +#endif + +#if WANT_VMATH + +# include <arm_sve.h> +# include <stdbool.h> + +# include "math_config.h" + +/* Double precision. */ +static inline svint64_t +sv_s64 (int64_t x) +{ + return svdup_s64 (x); +} + +static inline svuint64_t +sv_u64 (uint64_t x) +{ + return svdup_u64 (x); +} + +static inline svfloat64_t +sv_f64 (double x) +{ + return svdup_f64 (x); +} + +static inline svfloat64_t +sv_call_f64 (double (*f) (double), svfloat64_t x, svfloat64_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + double elem = svclastb (p, 0, x); + elem = (*f) (elem); + svfloat64_t y2 = sv_f64 (elem); + y = svsel (p, y2, y); + p = svpnext_b64 (cmp, p); + } + return y; +} + +static inline svfloat64_t +sv_call2_f64 (double (*f) (double, double), svfloat64_t x1, svfloat64_t x2, + svfloat64_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + double elem1 = svclastb (p, 0, x1); + double elem2 = svclastb (p, 0, x2); + double ret = (*f) (elem1, elem2); + svfloat64_t y2 = sv_f64 (ret); + y = svsel (p, y2, y); + p = svpnext_b64 (cmp, p); + } + return y; +} + +static inline svuint64_t +sv_mod_n_u64_x (svbool_t pg, svuint64_t x, uint64_t y) +{ + svuint64_t q = svdiv_x (pg, x, y); + return svmls_x (pg, x, q, y); +} + +/* Single precision. */ +static inline svint32_t +sv_s32 (int32_t x) +{ + return svdup_s32 (x); +} + +static inline svuint32_t +sv_u32 (uint32_t x) +{ + return svdup_u32 (x); +} + +static inline svfloat32_t +sv_f32 (float x) +{ + return svdup_f32 (x); +} + +static inline svfloat32_t +sv_call_f32 (float (*f) (float), svfloat32_t x, svfloat32_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + float elem = svclastb (p, 0, x); + elem = (*f) (elem); + svfloat32_t y2 = sv_f32 (elem); + y = svsel (p, y2, y); + p = svpnext_b32 (cmp, p); + } + return y; +} + +static inline svfloat32_t +sv_call2_f32 (float (*f) (float, float), svfloat32_t x1, svfloat32_t x2, + svfloat32_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + float elem1 = svclastb (p, 0, x1); + float elem2 = svclastb (p, 0, x2); + float ret = (*f) (elem1, elem2); + svfloat32_t y2 = sv_f32 (ret); + y = svsel (p, y2, y); + p = svpnext_b32 (cmp, p); + } + return y; +} +#endif + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/sv_pow_1u5.c b/contrib/arm-optimized-routines/pl/math/sv_pow_1u5.c new file mode 100644 index 000000000000..0838810206a1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_pow_1u5.c @@ -0,0 +1,444 @@ +/* + * Double-precision SVE pow(x, y) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* This version share a similar algorithm as AOR scalar pow. + + The core computation consists in computing pow(x, y) as + + exp (y * log (x)). + + The algorithms for exp and log are very similar to scalar exp and log. + The log relies on table lookup for 3 variables and an order 8 polynomial. + It returns a high and a low contribution that are then passed to the exp, + to minimise the loss of accuracy in both routines. + The exp is based on 8-bit table lookup for scale and order-4 polynomial. + The SVE algorithm drops the tail in the exp computation at the price of + a lower accuracy, slightly above 1ULP. + The SVE algorithm also drops the special treatement of small (< 2^-65) and + large (> 2^63) finite values of |y|, as they only affect non-round to nearest + modes. + + Maximum measured error is 1.04 ULPs: + SV_NAME_D2 (pow) (0x1.3d2d45bc848acp+63, -0x1.a48a38b40cd43p-12) + got 0x1.f7116284221fcp-1 + want 0x1.f7116284221fdp-1. */ + +/* Data is defined in v_pow_log_data.c. */ +#define N_LOG (1 << V_POW_LOG_TABLE_BITS) +#define A __v_pow_log_data.poly +#define Off 0x3fe6955500000000 + +/* Data is defined in v_pow_exp_data.c. */ +#define N_EXP (1 << V_POW_EXP_TABLE_BITS) +#define SignBias (0x800 << V_POW_EXP_TABLE_BITS) +#define C __v_pow_exp_data.poly +#define SmallExp 0x3c9 /* top12(0x1p-54). */ +#define BigExp 0x408 /* top12(512.). */ +#define ThresExp 0x03f /* BigExp - SmallExp. */ +#define HugeExp 0x409 /* top12(1024.). */ + +/* Constants associated with pow. */ +#define SmallPowX 0x001 /* top12(0x1p-126). */ +#define BigPowX 0x7ff /* top12(INFINITY). */ +#define ThresPowX 0x7fe /* BigPowX - SmallPowX. */ +#define SmallPowY 0x3be /* top12(0x1.e7b6p-65). */ +#define BigPowY 0x43e /* top12(0x1.749p62). */ +#define ThresPowY 0x080 /* BigPowY - SmallPowY. */ + +/* Check if x is an integer. */ +static inline svbool_t +sv_isint (svbool_t pg, svfloat64_t x) +{ + return svcmpeq (pg, svrintz_z (pg, x), x); +} + +/* Check if x is real not integer valued. */ +static inline svbool_t +sv_isnotint (svbool_t pg, svfloat64_t x) +{ + return svcmpne (pg, svrintz_z (pg, x), x); +} + +/* Check if x is an odd integer. */ +static inline svbool_t +sv_isodd (svbool_t pg, svfloat64_t x) +{ + svfloat64_t y = svmul_x (pg, x, 0.5); + return sv_isnotint (pg, y); +} + +/* Returns 0 if not int, 1 if odd int, 2 if even int. The argument is + the bit representation of a non-zero finite floating-point value. */ +static inline int +checkint (uint64_t iy) +{ + int e = iy >> 52 & 0x7ff; + if (e < 0x3ff) + return 0; + if (e > 0x3ff + 52) + return 2; + if (iy & ((1ULL << (0x3ff + 52 - e)) - 1)) + return 0; + if (iy & (1ULL << (0x3ff + 52 - e))) + return 1; + return 2; +} + +/* Top 12 bits (sign and exponent of each double float lane). */ +static inline svuint64_t +sv_top12 (svfloat64_t x) +{ + return svlsr_x (svptrue_b64 (), svreinterpret_u64 (x), 52); +} + +/* Returns 1 if input is the bit representation of 0, infinity or nan. */ +static inline int +zeroinfnan (uint64_t i) +{ + return 2 * i - 1 >= 2 * asuint64 (INFINITY) - 1; +} + +/* Returns 1 if input is the bit representation of 0, infinity or nan. */ +static inline svbool_t +sv_zeroinfnan (svbool_t pg, svuint64_t i) +{ + return svcmpge (pg, svsub_x (pg, svmul_x (pg, i, 2), 1), + 2 * asuint64 (INFINITY) - 1); +} + +/* Handle cases that may overflow or underflow when computing the result that + is scale*(1+TMP) without intermediate rounding. The bit representation of + scale is in SBITS, however it has a computed exponent that may have + overflown into the sign bit so that needs to be adjusted before using it as + a double. (int32_t)KI is the k used in the argument reduction and exponent + adjustment of scale, positive k here means the result may overflow and + negative k means the result may underflow. */ +static inline double +specialcase (double tmp, uint64_t sbits, uint64_t ki) +{ + double scale; + if ((ki & 0x80000000) == 0) + { + /* k > 0, the exponent of scale might have overflowed by <= 460. */ + sbits -= 1009ull << 52; + scale = asdouble (sbits); + return 0x1p1009 * (scale + scale * tmp); + } + /* k < 0, need special care in the subnormal range. */ + sbits += 1022ull << 52; + /* Note: sbits is signed scale. */ + scale = asdouble (sbits); + double y = scale + scale * tmp; + return 0x1p-1022 * y; +} + +/* Scalar fallback for special cases of SVE pow's exp. */ +static inline svfloat64_t +sv_call_specialcase (svfloat64_t x1, svuint64_t u1, svuint64_t u2, + svfloat64_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + double sx1 = svclastb (p, 0, x1); + uint64_t su1 = svclastb (p, 0, u1); + uint64_t su2 = svclastb (p, 0, u2); + double elem = specialcase (sx1, su1, su2); + svfloat64_t y2 = sv_f64 (elem); + y = svsel (p, y2, y); + p = svpnext_b64 (cmp, p); + } + return y; +} + +/* Compute y+TAIL = log(x) where the rounded result is y and TAIL has about + additional 15 bits precision. IX is the bit representation of x, but + normalized in the subnormal range using the sign bit for the exponent. */ +static inline svfloat64_t +sv_log_inline (svbool_t pg, svuint64_t ix, svfloat64_t *tail) +{ + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + svuint64_t tmp = svsub_x (pg, ix, Off); + svuint64_t i = svand_x (pg, svlsr_x (pg, tmp, 52 - V_POW_LOG_TABLE_BITS), + sv_u64 (N_LOG - 1)); + svint64_t k = svasr_x (pg, svreinterpret_s64 (tmp), 52); + svuint64_t iz = svsub_x (pg, ix, svand_x (pg, tmp, sv_u64 (0xfffULL << 52))); + svfloat64_t z = svreinterpret_f64 (iz); + svfloat64_t kd = svcvt_f64_x (pg, k); + + /* log(x) = k*Ln2 + log(c) + log1p(z/c-1). */ + /* SVE lookup requires 3 separate lookup tables, as opposed to scalar version + that uses array of structures. We also do the lookup earlier in the code to + make sure it finishes as early as possible. */ + svfloat64_t invc = svld1_gather_index (pg, __v_pow_log_data.invc, i); + svfloat64_t logc = svld1_gather_index (pg, __v_pow_log_data.logc, i); + svfloat64_t logctail = svld1_gather_index (pg, __v_pow_log_data.logctail, i); + + /* Note: 1/c is j/N or j/N/2 where j is an integer in [N,2N) and + |z/c - 1| < 1/N, so r = z/c - 1 is exactly representible. */ + svfloat64_t r = svmad_x (pg, z, invc, -1.0); + /* k*Ln2 + log(c) + r. */ + svfloat64_t t1 = svmla_x (pg, logc, kd, __v_pow_log_data.ln2_hi); + svfloat64_t t2 = svadd_x (pg, t1, r); + svfloat64_t lo1 = svmla_x (pg, logctail, kd, __v_pow_log_data.ln2_lo); + svfloat64_t lo2 = svadd_x (pg, svsub_x (pg, t1, t2), r); + + /* Evaluation is optimized assuming superscalar pipelined execution. */ + svfloat64_t ar = svmul_x (pg, r, -0.5); /* A[0] = -0.5. */ + svfloat64_t ar2 = svmul_x (pg, r, ar); + svfloat64_t ar3 = svmul_x (pg, r, ar2); + /* k*Ln2 + log(c) + r + A[0]*r*r. */ + svfloat64_t hi = svadd_x (pg, t2, ar2); + svfloat64_t lo3 = svmla_x (pg, svneg_x (pg, ar2), ar, r); + svfloat64_t lo4 = svadd_x (pg, svsub_x (pg, t2, hi), ar2); + /* p = log1p(r) - r - A[0]*r*r. */ + /* p = (ar3 * (A[1] + r * A[2] + ar2 * (A[3] + r * A[4] + ar2 * (A[5] + r * + A[6])))). */ + svfloat64_t a56 = svmla_x (pg, sv_f64 (A[5]), r, A[6]); + svfloat64_t a34 = svmla_x (pg, sv_f64 (A[3]), r, A[4]); + svfloat64_t a12 = svmla_x (pg, sv_f64 (A[1]), r, A[2]); + svfloat64_t p = svmla_x (pg, a34, ar2, a56); + p = svmla_x (pg, a12, ar2, p); + p = svmul_x (pg, ar3, p); + svfloat64_t lo = svadd_x ( + pg, svadd_x (pg, svadd_x (pg, svadd_x (pg, lo1, lo2), lo3), lo4), p); + svfloat64_t y = svadd_x (pg, hi, lo); + *tail = svadd_x (pg, svsub_x (pg, hi, y), lo); + return y; +} + +/* Computes sign*exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. + The sign_bias argument is SignBias or 0 and sets the sign to -1 or 1. */ +static inline svfloat64_t +sv_exp_inline (svbool_t pg, svfloat64_t x, svfloat64_t xtail, + svuint64_t sign_bias) +{ + /* 3 types of special cases: tiny (uflow and spurious uflow), huge (oflow) + and other cases of large values of x (scale * (1 + TMP) oflow). */ + svuint64_t abstop = svand_x (pg, sv_top12 (x), 0x7ff); + /* |x| is large (|x| >= 512) or tiny (|x| <= 0x1p-54). */ + svbool_t uoflow = svcmpge (pg, svsub_x (pg, abstop, SmallExp), ThresExp); + + /* Conditions special, uflow and oflow are all expressed as uoflow && + something, hence do not bother computing anything if no lane in uoflow is + true. */ + svbool_t special = svpfalse_b (); + svbool_t uflow = svpfalse_b (); + svbool_t oflow = svpfalse_b (); + if (unlikely (svptest_any (pg, uoflow))) + { + /* |x| is tiny (|x| <= 0x1p-54). */ + uflow = svcmpge (pg, svsub_x (pg, abstop, SmallExp), 0x80000000); + uflow = svand_z (pg, uoflow, uflow); + /* |x| is huge (|x| >= 1024). */ + oflow = svcmpge (pg, abstop, HugeExp); + oflow = svand_z (pg, uoflow, svbic_z (pg, oflow, uflow)); + /* For large |x| values (512 < |x| < 1024) scale * (1 + TMP) can overflow + or underflow. */ + special = svbic_z (pg, uoflow, svorr_z (pg, uflow, oflow)); + } + + /* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */ + /* x = ln2/N*k + r, with int k and r in [-ln2/2N, ln2/2N]. */ + svfloat64_t z = svmul_x (pg, x, __v_pow_exp_data.n_over_ln2); + /* z - kd is in [-1, 1] in non-nearest rounding modes. */ + svfloat64_t shift = sv_f64 (__v_pow_exp_data.shift); + svfloat64_t kd = svadd_x (pg, z, shift); + svuint64_t ki = svreinterpret_u64 (kd); + kd = svsub_x (pg, kd, shift); + svfloat64_t r = x; + r = svmls_x (pg, r, kd, __v_pow_exp_data.ln2_over_n_hi); + r = svmls_x (pg, r, kd, __v_pow_exp_data.ln2_over_n_lo); + /* The code assumes 2^-200 < |xtail| < 2^-8/N. */ + r = svadd_x (pg, r, xtail); + /* 2^(k/N) ~= scale. */ + svuint64_t idx = svand_x (pg, ki, N_EXP - 1); + svuint64_t top + = svlsl_x (pg, svadd_x (pg, ki, sign_bias), 52 - V_POW_EXP_TABLE_BITS); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + svuint64_t sbits = svld1_gather_index (pg, __v_pow_exp_data.sbits, idx); + sbits = svadd_x (pg, sbits, top); + /* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (exp(r) - 1). */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t tmp = svmla_x (pg, sv_f64 (C[1]), r, C[2]); + tmp = svmla_x (pg, sv_f64 (C[0]), r, tmp); + tmp = svmla_x (pg, r, r2, tmp); + svfloat64_t scale = svreinterpret_f64 (sbits); + /* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there + is no spurious underflow here even without fma. */ + z = svmla_x (pg, scale, scale, tmp); + + /* Update result with special and large cases. */ + if (unlikely (svptest_any (pg, special))) + z = sv_call_specialcase (tmp, sbits, ki, z, special); + + /* Handle underflow and overflow. */ + svuint64_t sign_bit = svlsr_x (pg, svreinterpret_u64 (x), 63); + svbool_t x_is_neg = svcmpne (pg, sign_bit, 0); + svuint64_t sign_mask = svlsl_x (pg, sign_bias, 52 - V_POW_EXP_TABLE_BITS); + svfloat64_t res_uoflow = svsel (x_is_neg, sv_f64 (0.0), sv_f64 (INFINITY)); + res_uoflow = svreinterpret_f64 ( + svorr_x (pg, svreinterpret_u64 (res_uoflow), sign_mask)); + z = svsel (oflow, res_uoflow, z); + /* Avoid spurious underflow for tiny x. */ + svfloat64_t res_spurious_uflow + = svreinterpret_f64 (svorr_x (pg, sign_mask, 0x3ff0000000000000)); + z = svsel (uflow, res_spurious_uflow, z); + + return z; +} + +static inline double +pow_sc (double x, double y) +{ + uint64_t ix = asuint64 (x); + uint64_t iy = asuint64 (y); + /* Special cases: |x| or |y| is 0, inf or nan. */ + if (unlikely (zeroinfnan (iy))) + { + if (2 * iy == 0) + return issignaling_inline (x) ? x + y : 1.0; + if (ix == asuint64 (1.0)) + return issignaling_inline (y) ? x + y : 1.0; + if (2 * ix > 2 * asuint64 (INFINITY) || 2 * iy > 2 * asuint64 (INFINITY)) + return x + y; + if (2 * ix == 2 * asuint64 (1.0)) + return 1.0; + if ((2 * ix < 2 * asuint64 (1.0)) == !(iy >> 63)) + return 0.0; /* |x|<1 && y==inf or |x|>1 && y==-inf. */ + return y * y; + } + if (unlikely (zeroinfnan (ix))) + { + double_t x2 = x * x; + if (ix >> 63 && checkint (iy) == 1) + x2 = -x2; + /* Without the barrier some versions of clang hoist the 1/x2 and + thus division by zero exception can be signaled spuriously. */ + return (iy >> 63) ? opt_barrier_double (1 / x2) : x2; + } + return x; +} + +svfloat64_t SV_NAME_D2 (pow) (svfloat64_t x, svfloat64_t y, const svbool_t pg) +{ + /* This preamble handles special case conditions used in the final scalar + fallbacks. It also updates ix and sign_bias, that are used in the core + computation too, i.e., exp( y * log (x) ). */ + svuint64_t vix0 = svreinterpret_u64 (x); + svuint64_t viy0 = svreinterpret_u64 (y); + svuint64_t vtopx0 = svlsr_x (svptrue_b64 (), vix0, 52); + + /* Negative x cases. */ + svuint64_t sign_bit = svlsr_m (pg, vix0, 63); + svbool_t xisneg = svcmpeq (pg, sign_bit, 1); + + /* Set sign_bias and ix depending on sign of x and nature of y. */ + svbool_t yisnotint_xisneg = svpfalse_b (); + svuint64_t sign_bias = sv_u64 (0); + svuint64_t vix = vix0; + svuint64_t vtopx1 = vtopx0; + if (unlikely (svptest_any (pg, xisneg))) + { + /* Determine nature of y. */ + yisnotint_xisneg = sv_isnotint (xisneg, y); + svbool_t yisint_xisneg = sv_isint (xisneg, y); + svbool_t yisodd_xisneg = sv_isodd (xisneg, y); + /* ix set to abs(ix) if y is integer. */ + vix = svand_m (yisint_xisneg, vix0, 0x7fffffffffffffff); + vtopx1 = svand_m (yisint_xisneg, vtopx0, 0x7ff); + /* Set to SignBias if x is negative and y is odd. */ + sign_bias = svsel (yisodd_xisneg, sv_u64 (SignBias), sv_u64 (0)); + } + + /* Special cases of x or y: zero, inf and nan. */ + svbool_t xspecial = sv_zeroinfnan (pg, vix0); + svbool_t yspecial = sv_zeroinfnan (pg, viy0); + svbool_t special = svorr_z (pg, xspecial, yspecial); + + /* Small cases of x: |x| < 0x1p-126. */ + svuint64_t vabstopx0 = svand_x (pg, vtopx0, 0x7ff); + svbool_t xsmall = svcmplt (pg, vabstopx0, SmallPowX); + if (unlikely (svptest_any (pg, xsmall))) + { + /* Normalize subnormal x so exponent becomes negative. */ + svbool_t topx_is_null = svcmpeq (xsmall, vtopx1, 0); + + svuint64_t vix_norm = svreinterpret_u64 (svmul_m (xsmall, x, 0x1p52)); + vix_norm = svand_m (xsmall, vix_norm, 0x7fffffffffffffff); + vix_norm = svsub_m (xsmall, vix_norm, 52ULL << 52); + vix = svsel (topx_is_null, vix_norm, vix); + } + + /* y_hi = log(ix, &y_lo). */ + svfloat64_t vlo; + svfloat64_t vhi = sv_log_inline (pg, vix, &vlo); + + /* z = exp(y_hi, y_lo, sign_bias). */ + svfloat64_t vehi = svmul_x (pg, y, vhi); + svfloat64_t velo = svmul_x (pg, y, vlo); + svfloat64_t vemi = svmls_x (pg, vehi, y, vhi); + velo = svsub_x (pg, velo, vemi); + svfloat64_t vz = sv_exp_inline (pg, vehi, velo, sign_bias); + + /* Cases of finite y and finite negative x. */ + vz = svsel (yisnotint_xisneg, sv_f64 (__builtin_nan ("")), vz); + + /* Cases of zero/inf/nan x or y. */ + if (unlikely (svptest_any (pg, special))) + vz = sv_call2_f64 (pow_sc, x, y, vz, special); + + return vz; +} + +PL_SIG (SV, D, 2, pow) +PL_TEST_ULP (SV_NAME_D2 (pow), 0.55) +/* Wide intervals spanning the whole domain but shared between x and y. */ +#define SV_POW_INTERVAL2(xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), xlo, xhi, -ylo, -yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), -xlo, -xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), -xlo, -xhi, -ylo, -yhi, n) +#define EXPAND(str) str##000000000 +#define SHL52(str) EXPAND (str) +SV_POW_INTERVAL2 (0, SHL52 (SmallPowX), 0, inf, 40000) +SV_POW_INTERVAL2 (SHL52 (SmallPowX), SHL52 (BigPowX), 0, inf, 40000) +SV_POW_INTERVAL2 (SHL52 (BigPowX), inf, 0, inf, 40000) +SV_POW_INTERVAL2 (0, inf, 0, SHL52 (SmallPowY), 40000) +SV_POW_INTERVAL2 (0, inf, SHL52 (SmallPowY), SHL52 (BigPowY), 40000) +SV_POW_INTERVAL2 (0, inf, SHL52 (BigPowY), inf, 40000) +SV_POW_INTERVAL2 (0, inf, 0, inf, 1000) +/* x~1 or y~1. */ +SV_POW_INTERVAL2 (0x1p-1, 0x1p1, 0x1p-10, 0x1p10, 10000) +SV_POW_INTERVAL2 (0x1.ep-1, 0x1.1p0, 0x1p8, 0x1p16, 10000) +SV_POW_INTERVAL2 (0x1p-500, 0x1p500, 0x1p-1, 0x1p1, 10000) +/* around estimated argmaxs of ULP error. */ +SV_POW_INTERVAL2 (0x1p-300, 0x1p-200, 0x1p-20, 0x1p-10, 10000) +SV_POW_INTERVAL2 (0x1p50, 0x1p100, 0x1p-20, 0x1p-10, 10000) +/* x is negative, y is odd or even integer, or y is real not integer. */ +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), -0.0, -10.0, 3.0, 3.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), -0.0, -10.0, 4.0, 4.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), -0.0, -10.0, 0.0, 10.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), 0.0, 10.0, -0.0, -10.0, 10000) +/* |x| is inf, y is odd or even integer, or y is real not integer. */ +SV_POW_INTERVAL2 (inf, inf, 0.5, 0.5, 1) +SV_POW_INTERVAL2 (inf, inf, 1.0, 1.0, 1) +SV_POW_INTERVAL2 (inf, inf, 2.0, 2.0, 1) +SV_POW_INTERVAL2 (inf, inf, 3.0, 3.0, 1) +/* 0.0^y. */ +SV_POW_INTERVAL2 (0.0, 0.0, 0.0, 0x1p120, 1000) +/* 1.0^y. */ +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), 1.0, 1.0, 0.0, 0x1p-50, 1000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), 1.0, 1.0, 0x1p-50, 1.0, 1000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), 1.0, 1.0, 1.0, 0x1p100, 1000) +PL_TEST_INTERVAL2 (SV_NAME_D2 (pow), 1.0, 1.0, -1.0, -0x1p120, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_powf_2u6.c b/contrib/arm-optimized-routines/pl/math/sv_powf_2u6.c new file mode 100644 index 000000000000..2db0636aea62 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_powf_2u6.c @@ -0,0 +1,360 @@ +/* + * Single-precision SVE powf function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* The following data is used in the SVE pow core computation + and special case detection. */ +#define Tinvc __v_powf_data.invc +#define Tlogc __v_powf_data.logc +#define Texp __v_powf_data.scale +#define SignBias (1 << (V_POWF_EXP2_TABLE_BITS + 11)) +#define Shift 0x1.8p52 +#define Norm 0x1p23f /* 0x4b000000. */ + +/* Overall ULP error bound for pow is 2.6 ulp + ~ 0.5 + 2^24 (128*Ln2*relerr_log2 + relerr_exp2). */ +static const struct data +{ + double log_poly[4]; + double exp_poly[3]; + float uflow_bound, oflow_bound, small_bound; + uint32_t sign_bias, sign_mask, subnormal_bias, off; +} data = { + /* rel err: 1.5 * 2^-30. Each coefficients is multiplied the value of + V_POWF_EXP2_N. */ + .log_poly = { -0x1.6ff5daa3b3d7cp+3, 0x1.ec81d03c01aebp+3, + -0x1.71547bb43f101p+4, 0x1.7154764a815cbp+5 }, + /* rel err: 1.69 * 2^-34. */ + .exp_poly = { + 0x1.c6af84b912394p-20, /* A0 / V_POWF_EXP2_N^3. */ + 0x1.ebfce50fac4f3p-13, /* A1 / V_POWF_EXP2_N^2. */ + 0x1.62e42ff0c52d6p-6, /* A3 / V_POWF_EXP2_N. */ + }, + .uflow_bound = -0x1.2cp+12f, /* -150.0 * V_POWF_EXP2_N. */ + .oflow_bound = 0x1p+12f, /* 128.0 * V_POWF_EXP2_N. */ + .small_bound = 0x1p-126f, + .off = 0x3f35d000, + .sign_bias = SignBias, + .sign_mask = 0x80000000, + .subnormal_bias = 0x0b800000, /* 23 << 23. */ +}; + +#define A(i) sv_f64 (d->log_poly[i]) +#define C(i) sv_f64 (d->exp_poly[i]) + +/* Check if x is an integer. */ +static inline svbool_t +svisint (svbool_t pg, svfloat32_t x) +{ + return svcmpeq (pg, svrintz_z (pg, x), x); +} + +/* Check if x is real not integer valued. */ +static inline svbool_t +svisnotint (svbool_t pg, svfloat32_t x) +{ + return svcmpne (pg, svrintz_z (pg, x), x); +} + +/* Check if x is an odd integer. */ +static inline svbool_t +svisodd (svbool_t pg, svfloat32_t x) +{ + svfloat32_t y = svmul_x (pg, x, 0.5f); + return svisnotint (pg, y); +} + +/* Check if zero, inf or nan. */ +static inline svbool_t +sv_zeroinfnan (svbool_t pg, svuint32_t i) +{ + return svcmpge (pg, svsub_x (pg, svmul_x (pg, i, 2u), 1), + 2u * 0x7f800000 - 1); +} + +/* Returns 0 if not int, 1 if odd int, 2 if even int. The argument is + the bit representation of a non-zero finite floating-point value. */ +static inline int +checkint (uint32_t iy) +{ + int e = iy >> 23 & 0xff; + if (e < 0x7f) + return 0; + if (e > 0x7f + 23) + return 2; + if (iy & ((1 << (0x7f + 23 - e)) - 1)) + return 0; + if (iy & (1 << (0x7f + 23 - e))) + return 1; + return 2; +} + +/* Check if zero, inf or nan. */ +static inline int +zeroinfnan (uint32_t ix) +{ + return 2 * ix - 1 >= 2u * 0x7f800000 - 1; +} + +/* A scalar subroutine used to fix main power special cases. Similar to the + preamble of finite_powf except that we do not update ix and sign_bias. This + is done in the preamble of the SVE powf. */ +static inline float +powf_specialcase (float x, float y, float z) +{ + uint32_t ix = asuint (x); + uint32_t iy = asuint (y); + /* Either (x < 0x1p-126 or inf or nan) or (y is 0 or inf or nan). */ + if (unlikely (zeroinfnan (iy))) + { + if (2 * iy == 0) + return issignalingf_inline (x) ? x + y : 1.0f; + if (ix == 0x3f800000) + return issignalingf_inline (y) ? x + y : 1.0f; + if (2 * ix > 2u * 0x7f800000 || 2 * iy > 2u * 0x7f800000) + return x + y; + if (2 * ix == 2 * 0x3f800000) + return 1.0f; + if ((2 * ix < 2 * 0x3f800000) == !(iy & 0x80000000)) + return 0.0f; /* |x|<1 && y==inf or |x|>1 && y==-inf. */ + return y * y; + } + if (unlikely (zeroinfnan (ix))) + { + float_t x2 = x * x; + if (ix & 0x80000000 && checkint (iy) == 1) + x2 = -x2; + return iy & 0x80000000 ? 1 / x2 : x2; + } + /* We need a return here in case x<0 and y is integer, but all other tests + need to be run. */ + return z; +} + +/* Scalar fallback for special case routines with custom signature. */ +static inline svfloat32_t +sv_call_powf_sc (svfloat32_t x1, svfloat32_t x2, svfloat32_t y, svbool_t cmp) +{ + svbool_t p = svpfirst (cmp, svpfalse ()); + while (svptest_any (cmp, p)) + { + float sx1 = svclastb (p, 0, x1); + float sx2 = svclastb (p, 0, x2); + float elem = svclastb (p, 0, y); + elem = powf_specialcase (sx1, sx2, elem); + svfloat32_t y2 = sv_f32 (elem); + y = svsel (p, y2, y); + p = svpnext_b32 (cmp, p); + } + return y; +} + +/* Compute core for half of the lanes in double precision. */ +static inline svfloat64_t +sv_powf_core_ext (const svbool_t pg, svuint64_t i, svfloat64_t z, svint64_t k, + svfloat64_t y, svuint64_t sign_bias, svfloat64_t *pylogx, + const struct data *d) +{ + svfloat64_t invc = svld1_gather_index (pg, Tinvc, i); + svfloat64_t logc = svld1_gather_index (pg, Tlogc, i); + + /* log2(x) = log1p(z/c-1)/ln2 + log2(c) + k. */ + svfloat64_t r = svmla_x (pg, sv_f64 (-1.0), z, invc); + svfloat64_t y0 = svadd_x (pg, logc, svcvt_f64_x (pg, k)); + + /* Polynomial to approximate log1p(r)/ln2. */ + svfloat64_t logx = A (0); + logx = svmla_x (pg, A (1), r, logx); + logx = svmla_x (pg, A (2), r, logx); + logx = svmla_x (pg, A (3), r, logx); + logx = svmla_x (pg, y0, r, logx); + *pylogx = svmul_x (pg, y, logx); + + /* z - kd is in [-1, 1] in non-nearest rounding modes. */ + svfloat64_t kd = svadd_x (pg, *pylogx, Shift); + svuint64_t ki = svreinterpret_u64 (kd); + kd = svsub_x (pg, kd, Shift); + + r = svsub_x (pg, *pylogx, kd); + + /* exp2(x) = 2^(k/N) * 2^r ~= s * (C0*r^3 + C1*r^2 + C2*r + 1). */ + svuint64_t t + = svld1_gather_index (pg, Texp, svand_x (pg, ki, V_POWF_EXP2_N - 1)); + svuint64_t ski = svadd_x (pg, ki, sign_bias); + t = svadd_x (pg, t, svlsl_x (pg, ski, 52 - V_POWF_EXP2_TABLE_BITS)); + svfloat64_t s = svreinterpret_f64 (t); + + svfloat64_t p = C (0); + p = svmla_x (pg, C (1), p, r); + p = svmla_x (pg, C (2), p, r); + p = svmla_x (pg, s, p, svmul_x (pg, s, r)); + + return p; +} + +/* Widen vector to double precision and compute core on both halves of the + vector. Lower cost of promotion by considering all lanes active. */ +static inline svfloat32_t +sv_powf_core (const svbool_t pg, svuint32_t i, svuint32_t iz, svint32_t k, + svfloat32_t y, svuint32_t sign_bias, svfloat32_t *pylogx, + const struct data *d) +{ + const svbool_t ptrue = svptrue_b64 (); + + /* Unpack and promote input vectors (pg, y, z, i, k and sign_bias) into two in + order to perform core computation in double precision. */ + const svbool_t pg_lo = svunpklo (pg); + const svbool_t pg_hi = svunpkhi (pg); + svfloat64_t y_lo = svcvt_f64_x ( + ptrue, svreinterpret_f32 (svunpklo (svreinterpret_u32 (y)))); + svfloat64_t y_hi = svcvt_f64_x ( + ptrue, svreinterpret_f32 (svunpkhi (svreinterpret_u32 (y)))); + svfloat32_t z = svreinterpret_f32 (iz); + svfloat64_t z_lo = svcvt_f64_x ( + ptrue, svreinterpret_f32 (svunpklo (svreinterpret_u32 (z)))); + svfloat64_t z_hi = svcvt_f64_x ( + ptrue, svreinterpret_f32 (svunpkhi (svreinterpret_u32 (z)))); + svuint64_t i_lo = svunpklo (i); + svuint64_t i_hi = svunpkhi (i); + svint64_t k_lo = svunpklo (k); + svint64_t k_hi = svunpkhi (k); + svuint64_t sign_bias_lo = svunpklo (sign_bias); + svuint64_t sign_bias_hi = svunpkhi (sign_bias); + + /* Compute each part in double precision. */ + svfloat64_t ylogx_lo, ylogx_hi; + svfloat64_t lo = sv_powf_core_ext (pg_lo, i_lo, z_lo, k_lo, y_lo, + sign_bias_lo, &ylogx_lo, d); + svfloat64_t hi = sv_powf_core_ext (pg_hi, i_hi, z_hi, k_hi, y_hi, + sign_bias_hi, &ylogx_hi, d); + + /* Convert back to single-precision and interleave. */ + svfloat32_t ylogx_lo_32 = svcvt_f32_x (ptrue, ylogx_lo); + svfloat32_t ylogx_hi_32 = svcvt_f32_x (ptrue, ylogx_hi); + *pylogx = svuzp1 (ylogx_lo_32, ylogx_hi_32); + svfloat32_t lo_32 = svcvt_f32_x (ptrue, lo); + svfloat32_t hi_32 = svcvt_f32_x (ptrue, hi); + return svuzp1 (lo_32, hi_32); +} + +/* Implementation of SVE powf. + Provides the same accuracy as AdvSIMD powf, since it relies on the same + algorithm. The theoretical maximum error is under 2.60 ULPs. + Maximum measured error is 2.56 ULPs: + SV_NAME_F2 (pow) (0x1.004118p+0, 0x1.5d14a4p+16) got 0x1.fd4bp+127 + want 0x1.fd4b06p+127. */ +svfloat32_t SV_NAME_F2 (pow) (svfloat32_t x, svfloat32_t y, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint32_t vix0 = svreinterpret_u32 (x); + svuint32_t viy0 = svreinterpret_u32 (y); + + /* Negative x cases. */ + svuint32_t sign_bit = svand_m (pg, vix0, d->sign_mask); + svbool_t xisneg = svcmpeq (pg, sign_bit, d->sign_mask); + + /* Set sign_bias and ix depending on sign of x and nature of y. */ + svbool_t yisnotint_xisneg = svpfalse_b (); + svuint32_t sign_bias = sv_u32 (0); + svuint32_t vix = vix0; + if (unlikely (svptest_any (pg, xisneg))) + { + /* Determine nature of y. */ + yisnotint_xisneg = svisnotint (xisneg, y); + svbool_t yisint_xisneg = svisint (xisneg, y); + svbool_t yisodd_xisneg = svisodd (xisneg, y); + /* ix set to abs(ix) if y is integer. */ + vix = svand_m (yisint_xisneg, vix0, 0x7fffffff); + /* Set to SignBias if x is negative and y is odd. */ + sign_bias = svsel (yisodd_xisneg, sv_u32 (d->sign_bias), sv_u32 (0)); + } + + /* Special cases of x or y: zero, inf and nan. */ + svbool_t xspecial = sv_zeroinfnan (pg, vix0); + svbool_t yspecial = sv_zeroinfnan (pg, viy0); + svbool_t cmp = svorr_z (pg, xspecial, yspecial); + + /* Small cases of x: |x| < 0x1p-126. */ + svbool_t xsmall = svaclt (pg, x, d->small_bound); + if (unlikely (svptest_any (pg, xsmall))) + { + /* Normalize subnormal x so exponent becomes negative. */ + svuint32_t vix_norm = svreinterpret_u32 (svmul_x (xsmall, x, Norm)); + vix_norm = svand_x (xsmall, vix_norm, 0x7fffffff); + vix_norm = svsub_x (xsmall, vix_norm, d->subnormal_bias); + vix = svsel (xsmall, vix_norm, vix); + } + /* Part of core computation carried in working precision. */ + svuint32_t tmp = svsub_x (pg, vix, d->off); + svuint32_t i = svand_x (pg, svlsr_x (pg, tmp, (23 - V_POWF_LOG2_TABLE_BITS)), + V_POWF_LOG2_N - 1); + svuint32_t top = svand_x (pg, tmp, 0xff800000); + svuint32_t iz = svsub_x (pg, vix, top); + svint32_t k + = svasr_x (pg, svreinterpret_s32 (top), (23 - V_POWF_EXP2_TABLE_BITS)); + + /* Compute core in extended precision and return intermediate ylogx results to + handle cases of underflow and underflow in exp. */ + svfloat32_t ylogx; + svfloat32_t ret = sv_powf_core (pg, i, iz, k, y, sign_bias, &ylogx, d); + + /* Handle exp special cases of underflow and overflow. */ + svuint32_t sign = svlsl_x (pg, sign_bias, 20 - V_POWF_EXP2_TABLE_BITS); + svfloat32_t ret_oflow + = svreinterpret_f32 (svorr_x (pg, sign, asuint (INFINITY))); + svfloat32_t ret_uflow = svreinterpret_f32 (sign); + ret = svsel (svcmple (pg, ylogx, d->uflow_bound), ret_uflow, ret); + ret = svsel (svcmpgt (pg, ylogx, d->oflow_bound), ret_oflow, ret); + + /* Cases of finite y and finite negative x. */ + ret = svsel (yisnotint_xisneg, sv_f32 (__builtin_nanf ("")), ret); + + if (unlikely (svptest_any (pg, cmp))) + return sv_call_powf_sc (x, y, ret, cmp); + + return ret; +} + +PL_SIG (SV, F, 2, pow) +PL_TEST_ULP (SV_NAME_F2 (pow), 2.06) +/* Wide intervals spanning the whole domain but shared between x and y. */ +#define SV_POWF_INTERVAL2(xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), xlo, xhi, -ylo, -yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), -xlo, -xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), -xlo, -xhi, -ylo, -yhi, n) +SV_POWF_INTERVAL2 (0, 0x1p-126, 0, inf, 40000) +SV_POWF_INTERVAL2 (0x1p-126, 1, 0, inf, 50000) +SV_POWF_INTERVAL2 (1, inf, 0, inf, 50000) +/* x~1 or y~1. */ +SV_POWF_INTERVAL2 (0x1p-1, 0x1p1, 0x1p-10, 0x1p10, 10000) +SV_POWF_INTERVAL2 (0x1.ep-1, 0x1.1p0, 0x1p8, 0x1p16, 10000) +SV_POWF_INTERVAL2 (0x1p-500, 0x1p500, 0x1p-1, 0x1p1, 10000) +/* around estimated argmaxs of ULP error. */ +SV_POWF_INTERVAL2 (0x1p-300, 0x1p-200, 0x1p-20, 0x1p-10, 10000) +SV_POWF_INTERVAL2 (0x1p50, 0x1p100, 0x1p-20, 0x1p-10, 10000) +/* x is negative, y is odd or even integer, or y is real not integer. */ +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), -0.0, -10.0, 3.0, 3.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), -0.0, -10.0, 4.0, 4.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), -0.0, -10.0, 0.0, 10.0, 10000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), 0.0, 10.0, -0.0, -10.0, 10000) +/* |x| is inf, y is odd or even integer, or y is real not integer. */ +SV_POWF_INTERVAL2 (inf, inf, 0.5, 0.5, 1) +SV_POWF_INTERVAL2 (inf, inf, 1.0, 1.0, 1) +SV_POWF_INTERVAL2 (inf, inf, 2.0, 2.0, 1) +SV_POWF_INTERVAL2 (inf, inf, 3.0, 3.0, 1) +/* 0.0^y. */ +SV_POWF_INTERVAL2 (0.0, 0.0, 0.0, 0x1p120, 1000) +/* 1.0^y. */ +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), 1.0, 1.0, 0.0, 0x1p-50, 1000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), 1.0, 1.0, 0x1p-50, 1.0, 1000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), 1.0, 1.0, 1.0, 0x1p100, 1000) +PL_TEST_INTERVAL2 (SV_NAME_F2 (pow), 1.0, 1.0, -1.0, -0x1p120, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_powi.c b/contrib/arm-optimized-routines/pl/math/sv_powi.c new file mode 100644 index 000000000000..e53bf2195533 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_powi.c @@ -0,0 +1,48 @@ +/* + * Double-precision SVE powi(x, n) function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" + +/* Optimized double-precision vector powi (double base, long integer power). + powi is developed for environments in which accuracy is of much less + importance than performance, hence we provide no estimate for worst-case + error. */ +svfloat64_t +_ZGVsMxvv_powk (svfloat64_t as, svint64_t ns, svbool_t p) +{ + /* Compute powi by successive squaring, right to left. */ + svfloat64_t acc = sv_f64 (1.0); + svbool_t want_recip = svcmplt (p, ns, 0); + svuint64_t ns_abs = svreinterpret_u64 (svabs_x (p, ns)); + + /* We use a max to avoid needing to check whether any lane != 0 on each + iteration. */ + uint64_t max_n = svmaxv (p, ns_abs); + + svfloat64_t c = as; + /* Successively square c, and use merging predication (_m) to determine + whether or not to perform the multiplication or keep the previous + iteration. */ + while (true) + { + svbool_t px = svcmpeq (p, svand_x (p, ns_abs, 1ull), 1ull); + acc = svmul_m (px, acc, c); + max_n >>= 1; + if (max_n == 0) + break; + + ns_abs = svlsr_x (p, ns_abs, 1); + c = svmul_x (p, c, c); + } + + /* Negative powers are handled by computing the abs(n) version and then + taking the reciprocal. */ + if (svptest_any (want_recip, want_recip)) + acc = svdivr_m (want_recip, acc, 1.0); + + return acc; +} diff --git a/contrib/arm-optimized-routines/pl/math/sv_powif.c b/contrib/arm-optimized-routines/pl/math/sv_powif.c new file mode 100644 index 000000000000..7e032fd86a20 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_powif.c @@ -0,0 +1,48 @@ +/* + * Single-precision SVE powi(x, n) function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" + +/* Optimized single-precision vector powi (float base, integer power). + powi is developed for environments in which accuracy is of much less + importance than performance, hence we provide no estimate for worst-case + error. */ +svfloat32_t +_ZGVsMxvv_powi (svfloat32_t as, svint32_t ns, svbool_t p) +{ + /* Compute powi by successive squaring, right to left. */ + svfloat32_t acc = sv_f32 (1.f); + svbool_t want_recip = svcmplt (p, ns, 0); + svuint32_t ns_abs = svreinterpret_u32 (svabs_x (p, ns)); + + /* We use a max to avoid needing to check whether any lane != 0 on each + iteration. */ + uint32_t max_n = svmaxv (p, ns_abs); + + svfloat32_t c = as; + /* Successively square c, and use merging predication (_m) to determine + whether or not to perform the multiplication or keep the previous + iteration. */ + while (true) + { + svbool_t px = svcmpeq (p, svand_x (p, ns_abs, 1), 1); + acc = svmul_m (px, acc, c); + max_n >>= 1; + if (max_n == 0) + break; + + ns_abs = svlsr_x (p, ns_abs, 1); + c = svmul_x (p, c, c); + } + + /* Negative powers are handled by computing the abs(n) version and then + taking the reciprocal. */ + if (svptest_any (want_recip, want_recip)) + acc = svdivr_m (want_recip, acc, 1.0f); + + return acc; +} diff --git a/contrib/arm-optimized-routines/pl/math/sv_sin_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_sin_3u5.c new file mode 100644 index 000000000000..a81f3fc80f3d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sin_3u5.c @@ -0,0 +1,96 @@ +/* + * Double-precision SVE sin(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double inv_pi, pi_1, pi_2, pi_3, shift, range_val; + double poly[7]; +} data = { + .poly = { -0x1.555555555547bp-3, 0x1.1111111108a4dp-7, -0x1.a01a019936f27p-13, + 0x1.71de37a97d93ep-19, -0x1.ae633919987c6p-26, + 0x1.60e277ae07cecp-33, -0x1.9e9540300a1p-41, }, + + .inv_pi = 0x1.45f306dc9c883p-2, + .pi_1 = 0x1.921fb54442d18p+1, + .pi_2 = 0x1.1a62633145c06p-53, + .pi_3 = 0x1.c1cd129024e09p-106, + .shift = 0x1.8p52, + .range_val = 0x1p23, +}; + +#define C(i) sv_f64 (d->poly[i]) + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t cmp) +{ + return sv_call_f64 (sin, x, y, cmp); +} + +/* A fast SVE implementation of sin. + Maximum observed error in [-pi/2, pi/2], where argument is not reduced, + is 2.87 ULP: + _ZGVsMxv_sin (0x1.921d5c6a07142p+0) got 0x1.fffffffa7dc02p-1 + want 0x1.fffffffa7dc05p-1 + Maximum observed error in the entire non-special domain ([-2^23, 2^23]) + is 3.22 ULP: + _ZGVsMxv_sin (0x1.5702447b6f17bp+22) got 0x1.ffdcd125c84fbp-3 + want 0x1.ffdcd125c84f8p-3. */ +svfloat64_t SV_NAME_D1 (sin) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Load some values in quad-word chunks to minimise memory access. */ + const svbool_t ptrue = svptrue_b64 (); + svfloat64_t shift = sv_f64 (d->shift); + svfloat64_t inv_pi_and_pi1 = svld1rq (ptrue, &d->inv_pi); + svfloat64_t pi2_and_pi3 = svld1rq (ptrue, &d->pi_2); + + /* n = rint(|x|/pi). */ + svfloat64_t n = svmla_lane (shift, x, inv_pi_and_pi1, 0); + svuint64_t odd = svlsl_x (pg, svreinterpret_u64 (n), 63); + n = svsub_x (pg, n, shift); + + /* r = |x| - n*(pi/2) (range reduction into -pi/2 .. pi/2). */ + svfloat64_t r = x; + r = svmls_lane (r, n, inv_pi_and_pi1, 1); + r = svmls_lane (r, n, pi2_and_pi3, 0); + r = svmls_lane (r, n, pi2_and_pi3, 1); + + /* sin(r) poly approx. */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t r3 = svmul_x (pg, r2, r); + svfloat64_t r4 = svmul_x (pg, r2, r2); + + svfloat64_t t1 = svmla_x (pg, C (4), C (5), r2); + svfloat64_t t2 = svmla_x (pg, C (2), C (3), r2); + svfloat64_t t3 = svmla_x (pg, C (0), C (1), r2); + + svfloat64_t y = svmla_x (pg, t1, C (6), r4); + y = svmla_x (pg, t2, y, r4); + y = svmla_x (pg, t3, y, r4); + y = svmla_x (pg, r, y, r3); + + svbool_t cmp = svacle (pg, x, d->range_val); + cmp = svnot_z (pg, cmp); + if (unlikely (svptest_any (pg, cmp))) + return special_case (x, + svreinterpret_f64 (sveor_z ( + svnot_z (pg, cmp), svreinterpret_u64 (y), odd)), + cmp); + + /* Copy sign. */ + return svreinterpret_f64 (sveor_z (pg, svreinterpret_u64 (y), odd)); +} + +PL_SIG (SV, D, 1, sin, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_D1 (sin), 2.73) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sin), 0, 0x1p23, 1000000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sin), 0x1p23, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sincos_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_sincos_3u5.c new file mode 100644 index 000000000000..f73550082d5b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sincos_3u5.c @@ -0,0 +1,61 @@ +/* + * Double-precision vector sincos function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* Define _GNU_SOURCE in order to include sincos declaration. If building + pre-GLIBC 2.1, or on a non-GNU conforming system, this routine will need to + be linked against the scalar sincosf from math/. */ +#define _GNU_SOURCE +#include <math.h> +#undef _GNU_SOURCE + +#include "sv_sincos_common.h" +#include "sv_math.h" +#include "pl_test.h" + +static void NOINLINE +special_case (svfloat64_t x, svbool_t special, double *out_sin, + double *out_cos) +{ + svbool_t p = svptrue_pat_b64 (SV_VL1); + for (int i = 0; i < svcntd (); i++) + { + if (svptest_any (special, p)) + sincos (svlastb (p, x), out_sin + i, out_cos + i); + p = svpnext_b64 (svptrue_b64 (), p); + } +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + sv_sincos_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +void +_ZGVsMxvl8l8_sincos (svfloat64_t x, double *out_sin, double *out_cos, + svbool_t pg) +{ + const struct sv_sincos_data *d = ptr_barrier (&sv_sincos_data); + svbool_t special = check_ge_rangeval (pg, x, d); + + svfloat64x2_t sc = sv_sincos_inline (pg, x, d); + + svst1 (pg, out_sin, svget2 (sc, 0)); + svst1 (pg, out_cos, svget2 (sc, 1)); + + if (unlikely (svptest_any (pg, special))) + special_case (x, special, out_sin, out_cos); +} + +PL_TEST_ULP (_ZGVsMxv_sincos_sin, 2.73) +PL_TEST_ULP (_ZGVsMxv_sincos_cos, 2.73) +#define SV_SINCOS_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_sincos_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_sincos_cos, lo, hi, n) +SV_SINCOS_INTERVAL (0, 0x1p23, 500000) +SV_SINCOS_INTERVAL (-0, -0x1p23, 500000) +SV_SINCOS_INTERVAL (0x1p23, inf, 10000) +SV_SINCOS_INTERVAL (-0x1p23, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sincos_common.h b/contrib/arm-optimized-routines/pl/math/sv_sincos_common.h new file mode 100644 index 000000000000..f7b58deb90bd --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sincos_common.h @@ -0,0 +1,85 @@ +/* + * Core approximation for double-precision vector sincos + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" + +static const struct sv_sincos_data +{ + double sin_poly[7], cos_poly[6], pio2[3]; + double inv_pio2, shift, range_val; +} sv_sincos_data = { + .inv_pio2 = 0x1.45f306dc9c882p-1, + .pio2 = { 0x1.921fb50000000p+0, 0x1.110b460000000p-26, + 0x1.1a62633145c07p-54 }, + .shift = 0x1.8p52, + .sin_poly = { /* Computed using Remez in [-pi/2, pi/2]. */ + -0x1.555555555547bp-3, 0x1.1111111108a4dp-7, + -0x1.a01a019936f27p-13, 0x1.71de37a97d93ep-19, + -0x1.ae633919987c6p-26, 0x1.60e277ae07cecp-33, + -0x1.9e9540300a1p-41 }, + .cos_poly = { /* Computed using Remez in [-pi/4, pi/4]. */ + 0x1.555555555554cp-5, -0x1.6c16c16c1521fp-10, + 0x1.a01a019cbf62ap-16, -0x1.27e4f812b681ep-22, + 0x1.1ee9f152a57cdp-29, -0x1.8fb131098404bp-37 }, + .range_val = 0x1p23, }; + +static inline svbool_t +check_ge_rangeval (svbool_t pg, svfloat64_t x, const struct sv_sincos_data *d) +{ + svbool_t in_bounds = svaclt (pg, x, d->range_val); + return svnot_z (pg, in_bounds); +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + v_sincos_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +static inline svfloat64x2_t +sv_sincos_inline (svbool_t pg, svfloat64_t x, const struct sv_sincos_data *d) +{ + /* q = nearest integer to 2 * x / pi. */ + svfloat64_t q = svsub_x (pg, svmla_x (pg, sv_f64 (d->shift), x, d->inv_pio2), + d->shift); + svint64_t n = svcvt_s64_x (pg, q); + + /* Reduce x such that r is in [ -pi/4, pi/4 ]. */ + svfloat64_t r = x; + r = svmls_x (pg, r, q, d->pio2[0]); + r = svmls_x (pg, r, q, d->pio2[1]); + r = svmls_x (pg, r, q, d->pio2[2]); + + svfloat64_t r2 = svmul_x (pg, r, r), r3 = svmul_x (pg, r2, r), + r4 = svmul_x (pg, r2, r2); + + /* Approximate sin(r) ~= r + r^3 * poly_sin(r^2). */ + svfloat64_t s = sv_pw_horner_6_f64_x (pg, r2, r4, d->sin_poly); + s = svmla_x (pg, r, r3, s); + + /* Approximate cos(r) ~= 1 - (r^2)/2 + r^4 * poly_cos(r^2). */ + svfloat64_t c = sv_pw_horner_5_f64_x (pg, r2, r4, d->cos_poly); + c = svmad_x (pg, c, r2, -0.5); + c = svmad_x (pg, c, r2, 1); + + svuint64_t un = svreinterpret_u64 (n); + /* If odd quadrant, swap cos and sin. */ + svbool_t swap = svcmpeq (pg, svlsl_x (pg, un, 63), 0); + svfloat64_t ss = svsel (swap, s, c); + svfloat64_t cc = svsel (swap, c, s); + + /* Fix signs according to quadrant. + ss = asdouble(asuint64(ss) ^ ((n & 2) << 62)) + cc = asdouble(asuint64(cc) & (((n + 1) & 2) << 62)). */ + svuint64_t sin_sign = svlsl_x (pg, svand_x (pg, un, 2), 62); + svuint64_t cos_sign = svlsl_x ( + pg, svand_x (pg, svreinterpret_u64 (svadd_x (pg, n, 1)), 2), 62); + ss = svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (ss), sin_sign)); + cc = svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (cc), cos_sign)); + + return svcreate2 (ss, cc); +} diff --git a/contrib/arm-optimized-routines/pl/math/sv_sincosf_1u8.c b/contrib/arm-optimized-routines/pl/math/sv_sincosf_1u8.c new file mode 100644 index 000000000000..c335de8d3dbb --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sincosf_1u8.c @@ -0,0 +1,62 @@ +/* + * Single-precision vector sincos function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* Define _GNU_SOURCE in order to include sincosf declaration. If building + pre-GLIBC 2.1, or on a non-GNU conforming system, this routine will need to + be linked against the scalar sincosf from math/. */ +#define _GNU_SOURCE +#include <math.h> +#undef _GNU_SOURCE + +#include "sv_sincosf_common.h" +#include "sv_math.h" +#include "pl_test.h" + +static void NOINLINE +special_case (svfloat32_t x, svbool_t special, float *out_sin, float *out_cos) +{ + svbool_t p = svptrue_pat_b32 (SV_VL1); + for (int i = 0; i < svcntw (); i++) + { + if (svptest_any (special, p)) + sincosf (svlastb (p, x), out_sin + i, out_cos + i); + p = svpnext_b32 (svptrue_b32 (), p); + } +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + sv_sincosf_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + sv_sincosf_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +void +_ZGVsMxvl4l4_sincosf (svfloat32_t x, float *out_sin, float *out_cos, + svbool_t pg) +{ + const struct sv_sincosf_data *d = ptr_barrier (&sv_sincosf_data); + svbool_t special = check_ge_rangeval (pg, x, d); + + svfloat32x2_t sc = sv_sincosf_inline (pg, x, d); + + svst1_f32 (pg, out_sin, svget2 (sc, 0)); + svst1_f32 (pg, out_cos, svget2 (sc, 1)); + + if (unlikely (svptest_any (pg, special))) + special_case (x, special, out_sin, out_cos); +} + +PL_TEST_ULP (_ZGVsMxv_sincosf_sin, 1.17) +PL_TEST_ULP (_ZGVsMxv_sincosf_cos, 1.31) +#define SV_SINCOSF_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_sincosf_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVsMxv_sincosf_cos, lo, hi, n) +SV_SINCOSF_INTERVAL (0, 0x1p20, 500000) +SV_SINCOSF_INTERVAL (-0, -0x1p20, 500000) +SV_SINCOSF_INTERVAL (0x1p20, inf, 10000) +SV_SINCOSF_INTERVAL (-0x1p20, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sincosf_common.h b/contrib/arm-optimized-routines/pl/math/sv_sincosf_common.h new file mode 100644 index 000000000000..714e996443b3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sincosf_common.h @@ -0,0 +1,81 @@ +/* + * Core approximation for single-precision vector sincos + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" + +const static struct sv_sincosf_data +{ + float poly_sin[3], poly_cos[3], pio2[3], inv_pio2, shift, range_val; +} sv_sincosf_data = { + .poly_sin = { /* Generated using Remez, odd coeffs only, in [-pi/4, pi/4]. */ + -0x1.555546p-3, 0x1.11076p-7, -0x1.994eb4p-13 }, + .poly_cos = { /* Generated using Remez, even coeffs only, in [-pi/4, pi/4]. */ + 0x1.55554ap-5, -0x1.6c0c1ap-10, 0x1.99e0eep-16 }, + .pio2 = { 0x1.921fb6p+0f, -0x1.777a5cp-25f, -0x1.ee59dap-50f }, + .inv_pio2 = 0x1.45f306p-1f, + .shift = 0x1.8p23, + .range_val = 0x1p20 +}; + +static inline svbool_t +check_ge_rangeval (svbool_t pg, svfloat32_t x, const struct sv_sincosf_data *d) +{ + svbool_t in_bounds = svaclt (pg, x, d->range_val); + return svnot_z (pg, in_bounds); +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + sv_sincosf_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + sv_sincosf_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +static inline svfloat32x2_t +sv_sincosf_inline (svbool_t pg, svfloat32_t x, const struct sv_sincosf_data *d) +{ + /* n = rint ( x / (pi/2) ). */ + svfloat32_t q = svmla_x (pg, sv_f32 (d->shift), x, d->inv_pio2); + q = svsub_x (pg, q, d->shift); + svint32_t n = svcvt_s32_x (pg, q); + + /* Reduce x such that r is in [ -pi/4, pi/4 ]. */ + svfloat32_t r = x; + r = svmls_x (pg, r, q, d->pio2[0]); + r = svmls_x (pg, r, q, d->pio2[1]); + r = svmls_x (pg, r, q, d->pio2[2]); + + /* Approximate sin(r) ~= r + r^3 * poly_sin(r^2). */ + svfloat32_t r2 = svmul_x (pg, r, r), r3 = svmul_x (pg, r, r2); + svfloat32_t s = svmla_x (pg, sv_f32 (d->poly_sin[1]), r2, d->poly_sin[2]); + s = svmad_x (pg, r2, s, d->poly_sin[0]); + s = svmla_x (pg, r, r3, s); + + /* Approximate cos(r) ~= 1 - (r^2)/2 + r^4 * poly_cos(r^2). */ + svfloat32_t r4 = svmul_x (pg, r2, r2); + svfloat32_t p = svmla_x (pg, sv_f32 (d->poly_cos[1]), r2, d->poly_cos[2]); + svfloat32_t c = svmad_x (pg, sv_f32 (d->poly_cos[0]), r2, -0.5); + c = svmla_x (pg, c, r4, p); + c = svmad_x (pg, r2, c, 1); + + svuint32_t un = svreinterpret_u32 (n); + /* If odd quadrant, swap cos and sin. */ + svbool_t swap = svcmpeq (pg, svlsl_x (pg, un, 31), 0); + svfloat32_t ss = svsel (swap, s, c); + svfloat32_t cc = svsel (swap, c, s); + + /* Fix signs according to quadrant. + ss = asfloat(asuint(ss) ^ ((n & 2) << 30)) + cc = asfloat(asuint(cc) & (((n + 1) & 2) << 30)). */ + svuint32_t sin_sign = svlsl_x (pg, svand_x (pg, un, 2), 30); + svuint32_t cos_sign = svlsl_x ( + pg, svand_x (pg, svreinterpret_u32 (svadd_x (pg, n, 1)), 2), 30); + ss = svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (ss), sin_sign)); + cc = svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (cc), cos_sign)); + + return svcreate2 (ss, cc); +} diff --git a/contrib/arm-optimized-routines/pl/math/sv_sinf_1u9.c b/contrib/arm-optimized-routines/pl/math/sv_sinf_1u9.c new file mode 100644 index 000000000000..675d7b2480f7 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sinf_1u9.c @@ -0,0 +1,93 @@ +/* + * Single-precision SVE sin(x) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float poly[4]; + /* Pi-related values to be loaded as one quad-word and used with + svmla_lane. */ + float negpi1, negpi2, negpi3, invpi; + float shift; +} data = { + .poly = { + /* Non-zero coefficients from the degree 9 Taylor series expansion of + sin. */ + -0x1.555548p-3f, 0x1.110df4p-7f, -0x1.9f42eap-13f, 0x1.5b2e76p-19f + }, + .negpi1 = -0x1.921fb6p+1f, + .negpi2 = 0x1.777a5cp-24f, + .negpi3 = 0x1.ee59dap-49f, + .invpi = 0x1.45f306p-2f, + .shift = 0x1.8p+23f +}; + +#define RangeVal 0x49800000 /* asuint32 (0x1p20f). */ +#define C(i) sv_f32 (d->poly[i]) + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t cmp) +{ + return sv_call_f32 (sinf, x, y, cmp); +} + +/* A fast SVE implementation of sinf. + Maximum error: 1.89 ULPs. + This maximum error is achieved at multiple values in [-2^18, 2^18] + but one example is: + SV_NAME_F1 (sin)(0x1.9247a4p+0) got 0x1.fffff6p-1 want 0x1.fffffap-1. */ +svfloat32_t SV_NAME_F1 (sin) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat32_t ax = svabs_x (pg, x); + svuint32_t sign + = sveor_x (pg, svreinterpret_u32 (x), svreinterpret_u32 (ax)); + svbool_t cmp = svcmpge (pg, svreinterpret_u32 (ax), RangeVal); + + /* pi_vals are a quad-word of helper values - the first 3 elements contain + -pi in extended precision, the last contains 1 / pi. */ + svfloat32_t pi_vals = svld1rq (svptrue_b32 (), &d->negpi1); + + /* n = rint(|x|/pi). */ + svfloat32_t n = svmla_lane (sv_f32 (d->shift), ax, pi_vals, 3); + svuint32_t odd = svlsl_x (pg, svreinterpret_u32 (n), 31); + n = svsub_x (pg, n, d->shift); + + /* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */ + svfloat32_t r; + r = svmla_lane (ax, n, pi_vals, 0); + r = svmla_lane (r, n, pi_vals, 1); + r = svmla_lane (r, n, pi_vals, 2); + + /* sin(r) approx using a degree 9 polynomial from the Taylor series + expansion. Note that only the odd terms of this are non-zero. */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t y; + y = svmla_x (pg, C (2), r2, C (3)); + y = svmla_x (pg, C (1), r2, y); + y = svmla_x (pg, C (0), r2, y); + y = svmla_x (pg, r, r, svmul_x (pg, y, r2)); + + /* sign = y^sign^odd. */ + sign = sveor_x (pg, sign, odd); + + if (unlikely (svptest_any (pg, cmp))) + return special_case (x, + svreinterpret_f32 (sveor_x ( + svnot_z (pg, cmp), svreinterpret_u32 (y), sign)), + cmp); + return svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, sin, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_F1 (sin), 1.40) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sin), 0, 0x1p23, 1000000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sin), 0x1p23, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sinh_3u.c b/contrib/arm-optimized-routines/pl/math/sv_sinh_3u.c new file mode 100644 index 000000000000..a01e19caecda --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sinh_3u.c @@ -0,0 +1,103 @@ +/* + * Double-precision SVE sinh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64_t poly[11]; + float64_t inv_ln2, m_ln2_hi, m_ln2_lo, shift; + uint64_t halff; + int64_t onef; + uint64_t large_bound; +} data = { + /* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */ + .poly = { 0x1p-1, 0x1.5555555555559p-3, 0x1.555555555554bp-5, + 0x1.111111110f663p-7, 0x1.6c16c16c1b5f3p-10, + 0x1.a01a01affa35dp-13, 0x1.a01a018b4ecbbp-16, + 0x1.71ddf82db5bb4p-19, 0x1.27e517fc0d54bp-22, + 0x1.af5eedae67435p-26, 0x1.1f143d060a28ap-29, }, + + .inv_ln2 = 0x1.71547652b82fep0, + .m_ln2_hi = -0x1.62e42fefa39efp-1, + .m_ln2_lo = -0x1.abc9e3b39803fp-56, + .shift = 0x1.8p52, + + .halff = 0x3fe0000000000000, + .onef = 0x3ff0000000000000, + /* 2^9. expm1 helper overflows for large input. */ + .large_bound = 0x4080000000000000, +}; + +static inline svfloat64_t +expm1_inline (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Reduce argument: + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where i = round(x / ln2) + and f = x - i * ln2 (f in [-ln2/2, ln2/2]). */ + svfloat64_t j + = svsub_x (pg, svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2), d->shift); + svint64_t i = svcvt_s64_x (pg, j); + svfloat64_t f = svmla_x (pg, x, j, d->m_ln2_hi); + f = svmla_x (pg, f, j, d->m_ln2_lo); + /* Approximate expm1(f) using polynomial. */ + svfloat64_t f2 = svmul_x (pg, f, f); + svfloat64_t f4 = svmul_x (pg, f2, f2); + svfloat64_t f8 = svmul_x (pg, f4, f4); + svfloat64_t p + = svmla_x (pg, f, f2, sv_estrin_10_f64_x (pg, f, f2, f4, f8, d->poly)); + /* t = 2^i. */ + svfloat64_t t = svscale_x (pg, sv_f64 (1), i); + /* expm1(x) ~= p * t + (t - 1). */ + return svmla_x (pg, svsub_x (pg, t, 1.0), p, t); +} + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svbool_t pg) +{ + return sv_call_f64 (sinh, x, x, pg); +} + +/* Approximation for SVE double-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The greatest observed error is 2.57 ULP: + _ZGVsMxv_sinh (0x1.a008538399931p-2) got 0x1.ab929fc64bd66p-2 + want 0x1.ab929fc64bd63p-2. */ +svfloat64_t SV_NAME_D1 (sinh) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat64_t ax = svabs_x (pg, x); + svuint64_t sign + = sveor_x (pg, svreinterpret_u64 (x), svreinterpret_u64 (ax)); + svfloat64_t halfsign = svreinterpret_f64 (svorr_x (pg, sign, d->halff)); + + svbool_t special = svcmpge (pg, svreinterpret_u64 (ax), d->large_bound); + + /* Fall back to scalar variant for all lanes if any are special. */ + if (unlikely (svptest_any (pg, special))) + return special_case (x, pg); + + /* Up to the point that expm1 overflows, we can use it to calculate sinh + using a slight rearrangement of the definition of sinh. This allows us to + retain acceptable accuracy for very small inputs. */ + svfloat64_t t = expm1_inline (ax, pg); + t = svadd_x (pg, t, svdiv_x (pg, t, svadd_x (pg, t, 1.0))); + return svmul_x (pg, t, halfsign); +} + +PL_SIG (SV, D, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (sinh), 2.08) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinh), 0, 0x1p-26, 1000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinh), 0x1p-26, 0x1p9, 500000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinh), 0x1p9, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sinhf_2u3.c b/contrib/arm-optimized-routines/pl/math/sv_sinhf_2u3.c new file mode 100644 index 000000000000..e34ecf378ad3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sinhf_2u3.c @@ -0,0 +1,64 @@ +/* + * Single-precision SVE sinh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "sv_expm1f_inline.h" + +static const struct data +{ + struct sv_expm1f_data expm1f_consts; + uint32_t halff, large_bound; +} data = { + .expm1f_consts = SV_EXPM1F_DATA, + .halff = 0x3f000000, + /* 0x1.61814ep+6, above which expm1f helper overflows. */ + .large_bound = 0x42b0c0a7, +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t pg) +{ + return sv_call_f32 (sinhf, x, y, pg); +} + +/* Approximation for SVE single-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The maximum error is 2.26 ULP: + _ZGVsMxv_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4 + want 0x1.e469e4p-4. */ +svfloat32_t SV_NAME_F1 (sinh) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + svfloat32_t ax = svabs_x (pg, x); + svuint32_t sign + = sveor_x (pg, svreinterpret_u32 (x), svreinterpret_u32 (ax)); + svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, d->halff)); + + svbool_t special = svcmpge (pg, svreinterpret_u32 (ax), d->large_bound); + + /* Up to the point that expm1f overflows, we can use it to calculate sinhf + using a slight rearrangement of the definition of asinh. This allows us to + retain acceptable accuracy for very small inputs. */ + svfloat32_t t = expm1f_inline (ax, pg, &d->expm1f_consts); + t = svadd_x (pg, t, svdiv_x (pg, t, svadd_x (pg, t, 1.0))); + + /* Fall back to the scalar variant for any lanes which would cause + expm1f to overflow. */ + if (unlikely (svptest_any (pg, special))) + return special_case (x, svmul_x (pg, t, halfsign), special); + + return svmul_x (pg, t, halfsign); +} + +PL_SIG (SV, F, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (sinh), 1.76) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0, 0x1.6a09e8p-32, 1000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0x1.6a09e8p-32, 0x42b0c0a7, 100000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0x42b0c0a7, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sinpi_3u1.c b/contrib/arm-optimized-routines/pl/math/sv_sinpi_3u1.c new file mode 100644 index 000000000000..c9f23da1b19b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sinpi_3u1.c @@ -0,0 +1,57 @@ +/* + * Double-precision SVE sinpi(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f64.h" + +static const struct data +{ + double poly[10]; +} data = { + /* Polynomial coefficients generated using Remez algorithm, + see sinpi.sollya for details. */ + .poly = { 0x1.921fb54442d184p1, -0x1.4abbce625be53p2, 0x1.466bc6775ab16p1, + -0x1.32d2cce62dc33p-1, 0x1.507834891188ep-4, -0x1.e30750a28c88ep-8, + 0x1.e8f48308acda4p-12, -0x1.6fc0032b3c29fp-16, + 0x1.af86ae521260bp-21, -0x1.012a9870eeb7dp-25 }, +}; + +/* A fast SVE implementation of sinpi. + Maximum error 3.10 ULP: + _ZGVsMxv_sinpi(0x1.df1a14f1b235p-2) got 0x1.fd64f541606cp-1 + want 0x1.fd64f541606c3p-1. */ +svfloat64_t SV_NAME_D1 (sinpi) (svfloat64_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* range reduction into -1/2 .. 1/2) + with n = rint(x) and r = r - n. */ + svfloat64_t n = svrinta_x (pg, x); + svfloat64_t r = svsub_x (pg, x, n); + + /* Result should be negated based on if n is odd or not. */ + svuint64_t intn = svreinterpret_u64 (svcvt_s64_x (pg, n)); + svuint64_t sign = svlsl_z (pg, intn, 63); + + /* y = sin(r). */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t r4 = svmul_x (pg, r2, r2); + svfloat64_t y = sv_pw_horner_9_f64_x (pg, r2, r4, d->poly); + y = svmul_x (pg, y, r); + + return svreinterpret_f64 (sveor_x (pg, svreinterpret_u64 (y), sign)); +} + +PL_SIG (SV, D, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (SV_NAME_D1 (sinpi), 2.61) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinpi), 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinpi), 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinpi), 0.5, 0x1p51, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (sinpi), 0x1p51, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_sinpif_2u5.c b/contrib/arm-optimized-routines/pl/math/sv_sinpif_2u5.c new file mode 100644 index 000000000000..ac3f924bed68 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_sinpif_2u5.c @@ -0,0 +1,53 @@ +/* + * Single-precision SVE sinpi(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_sve_f32.h" + +static const struct data +{ + float poly[6]; +} data = { + /* Taylor series coefficents for sin(pi * x). */ + .poly = { 0x1.921fb6p1f, -0x1.4abbcep2f, 0x1.466bc6p1f, -0x1.32d2ccp-1f, + 0x1.50783p-4f, -0x1.e30750p-8f }, +}; + +/* A fast SVE implementation of sinpif. + Maximum error 2.48 ULP: + _ZGVsMxv_sinpif(0x1.d062b6p-2) got 0x1.fa8c06p-1 + want 0x1.fa8c02p-1. */ +svfloat32_t SV_NAME_F1 (sinpi) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* range reduction into -1/2 .. 1/2 + with n = rint(x) and r = r - n. */ + svfloat32_t n = svrinta_x (pg, x); + svfloat32_t r = svsub_x (pg, x, n); + + /* Result should be negated based on if n is odd or not. */ + svuint32_t intn = svreinterpret_u32 (svcvt_s32_x (pg, n)); + svuint32_t sign = svlsl_z (pg, intn, 31); + + /* y = sin(r). */ + svfloat32_t r2 = svmul_x (pg, r, r); + svfloat32_t y = sv_horner_5_f32_x (pg, r2, d->poly); + y = svmul_x (pg, y, r); + + return svreinterpret_f32 (sveor_x (pg, svreinterpret_u32 (y), sign)); +} + +PL_SIG (SV, F, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (SV_NAME_F1 (sinpi), 1.99) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinpi), 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinpi), 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinpi), 0.5, 0x1p22f, 10000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (sinpi), 0x1p22f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_tan_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_tan_3u5.c new file mode 100644 index 000000000000..746396e98a10 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_tan_3u5.c @@ -0,0 +1,99 @@ +/* + * Double-precision SVE tan(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + double poly[9]; + double half_pi_hi, half_pi_lo, inv_half_pi, range_val, shift; +} data = { + /* Polynomial generated with FPMinimax. */ + .poly = { 0x1.5555555555556p-2, 0x1.1111111110a63p-3, 0x1.ba1ba1bb46414p-5, + 0x1.664f47e5b5445p-6, 0x1.226e5e5ecdfa3p-7, 0x1.d6c7ddbf87047p-9, + 0x1.7ea75d05b583ep-10, 0x1.289f22964a03cp-11, + 0x1.4e4fd14147622p-12, }, + .half_pi_hi = 0x1.921fb54442d18p0, + .half_pi_lo = 0x1.1a62633145c07p-54, + .inv_half_pi = 0x1.45f306dc9c883p-1, + .range_val = 0x1p23, + .shift = 0x1.8p52, +}; + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (tan, x, y, special); +} + +/* Vector approximation for double-precision tan. + Maximum measured error is 3.48 ULP: + _ZGVsMxv_tan(0x1.4457047ef78d8p+20) got -0x1.f6ccd8ecf7dedp+37 + want -0x1.f6ccd8ecf7deap+37. */ +svfloat64_t SV_NAME_D1 (tan) (svfloat64_t x, svbool_t pg) +{ + const struct data *dat = ptr_barrier (&data); + + /* Invert condition to catch NaNs and Infs as well as large values. */ + svbool_t special = svnot_z (pg, svaclt (pg, x, dat->range_val)); + + /* q = nearest integer to 2 * x / pi. */ + svfloat64_t shift = sv_f64 (dat->shift); + svfloat64_t q = svmla_x (pg, shift, x, dat->inv_half_pi); + q = svsub_x (pg, q, shift); + svint64_t qi = svcvt_s64_x (pg, q); + + /* Use q to reduce x to r in [-pi/4, pi/4], by: + r = x - q * pi/2, in extended precision. */ + svfloat64_t r = x; + svfloat64_t half_pi = svld1rq (svptrue_b64 (), &dat->half_pi_hi); + r = svmls_lane (r, q, half_pi, 0); + r = svmls_lane (r, q, half_pi, 1); + /* Further reduce r to [-pi/8, pi/8], to be reconstructed using double angle + formula. */ + r = svmul_x (pg, r, 0.5); + + /* Approximate tan(r) using order 8 polynomial. + tan(x) is odd, so polynomial has the form: + tan(x) ~= x + C0 * x^3 + C1 * x^5 + C3 * x^7 + ... + Hence we first approximate P(r) = C1 + C2 * r^2 + C3 * r^4 + ... + Then compute the approximation by: + tan(r) ~= r + r^3 * (C0 + r^2 * P(r)). */ + svfloat64_t r2 = svmul_x (pg, r, r); + svfloat64_t r4 = svmul_x (pg, r2, r2); + svfloat64_t r8 = svmul_x (pg, r4, r4); + /* Use offset version coeff array by 1 to evaluate from C1 onwards. */ + svfloat64_t p = sv_estrin_7_f64_x (pg, r2, r4, r8, dat->poly + 1); + p = svmad_x (pg, p, r2, dat->poly[0]); + p = svmla_x (pg, r, r2, svmul_x (pg, p, r)); + + /* Recombination uses double-angle formula: + tan(2x) = 2 * tan(x) / (1 - (tan(x))^2) + and reciprocity around pi/2: + tan(x) = 1 / (tan(pi/2 - x)) + to assemble result using change-of-sign and conditional selection of + numerator/denominator dependent on odd/even-ness of q (hence quadrant). */ + svbool_t use_recip + = svcmpeq (pg, svand_x (pg, svreinterpret_u64 (qi), 1), 0); + + svfloat64_t n = svmad_x (pg, p, p, -1); + svfloat64_t d = svmul_x (pg, p, 2); + svfloat64_t swap = n; + n = svneg_m (n, use_recip, d); + d = svsel (use_recip, swap, d); + if (unlikely (svptest_any (pg, special))) + return special_case (x, svdiv_x (svnot_z (pg, special), n, d), special); + return svdiv_x (pg, n, d); +} + +PL_SIG (SV, D, 1, tan, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_D1 (tan), 2.99) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (tan), 0, 0x1p23, 500000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (tan), 0x1p23, inf, 5000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_tanf_3u5.c b/contrib/arm-optimized-routines/pl/math/sv_tanf_3u5.c new file mode 100644 index 000000000000..6b8cd1e64b44 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_tanf_3u5.c @@ -0,0 +1,119 @@ +/* + * Single-precision vector tan(x) function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float pio2_1, pio2_2, pio2_3, invpio2; + float c1, c3, c5; + float c0, c2, c4, range_val, shift; +} data = { + /* Coefficients generated using: + poly = fpminimax((tan(sqrt(x))-sqrt(x))/x^(3/2), + deg, + [|single ...|], + [a*a;b*b]); + optimize relative error + final prec : 23 bits + deg : 5 + a : 0x1p-126 ^ 2 + b : ((pi) / 0x1p2) ^ 2 + dirty rel error: 0x1.f7c2e4p-25 + dirty abs error: 0x1.f7c2ecp-25. */ + .c0 = 0x1.55555p-2, .c1 = 0x1.11166p-3, + .c2 = 0x1.b88a78p-5, .c3 = 0x1.7b5756p-6, + .c4 = 0x1.4ef4cep-8, .c5 = 0x1.0e1e74p-7, + + .pio2_1 = 0x1.921fb6p+0f, .pio2_2 = -0x1.777a5cp-25f, + .pio2_3 = -0x1.ee59dap-50f, .invpio2 = 0x1.45f306p-1f, + .range_val = 0x1p15f, .shift = 0x1.8p+23f +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t cmp) +{ + return sv_call_f32 (tanf, x, y, cmp); +} + +/* Fast implementation of SVE tanf. + Maximum error is 3.45 ULP: + SV_NAME_F1 (tan)(-0x1.e5f0cap+13) got 0x1.ff9856p-1 + want 0x1.ff9850p-1. */ +svfloat32_t SV_NAME_F1 (tan) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + /* Determine whether input is too large to perform fast regression. */ + svbool_t cmp = svacge (pg, x, d->range_val); + + svfloat32_t odd_coeffs = svld1rq (svptrue_b32 (), &d->c1); + svfloat32_t pi_vals = svld1rq (svptrue_b32 (), &d->pio2_1); + + /* n = rint(x/(pi/2)). */ + svfloat32_t q = svmla_lane (sv_f32 (d->shift), x, pi_vals, 3); + svfloat32_t n = svsub_x (pg, q, d->shift); + /* n is already a signed integer, simply convert it. */ + svint32_t in = svcvt_s32_x (pg, n); + /* Determine if x lives in an interval, where |tan(x)| grows to infinity. */ + svint32_t alt = svand_x (pg, in, 1); + svbool_t pred_alt = svcmpne (pg, alt, 0); + + /* r = x - n * (pi/2) (range reduction into 0 .. pi/4). */ + svfloat32_t r; + r = svmls_lane (x, n, pi_vals, 0); + r = svmls_lane (r, n, pi_vals, 1); + r = svmls_lane (r, n, pi_vals, 2); + + /* If x lives in an interval, where |tan(x)| + - is finite, then use a polynomial approximation of the form + tan(r) ~ r + r^3 * P(r^2) = r + r * r^2 * P(r^2). + - grows to infinity then use symmetries of tangent and the identity + tan(r) = cotan(pi/2 - r) to express tan(x) as 1/tan(-r). Finally, use + the same polynomial approximation of tan as above. */ + + /* Perform additional reduction if required. */ + svfloat32_t z = svneg_m (r, pred_alt, r); + + /* Evaluate polynomial approximation of tangent on [-pi/4, pi/4], + using Estrin on z^2. */ + svfloat32_t z2 = svmul_x (pg, z, z); + svfloat32_t p01 = svmla_lane (sv_f32 (d->c0), z2, odd_coeffs, 0); + svfloat32_t p23 = svmla_lane (sv_f32 (d->c2), z2, odd_coeffs, 1); + svfloat32_t p45 = svmla_lane (sv_f32 (d->c4), z2, odd_coeffs, 2); + + svfloat32_t z4 = svmul_x (pg, z2, z2); + svfloat32_t p = svmla_x (pg, p01, z4, p23); + + svfloat32_t z8 = svmul_x (pg, z4, z4); + p = svmla_x (pg, p, z8, p45); + + svfloat32_t y = svmla_x (pg, z, p, svmul_x (pg, z, z2)); + + /* Transform result back, if necessary. */ + svfloat32_t inv_y = svdivr_x (pg, y, 1.0f); + + /* No need to pass pg to specialcase here since cmp is a strict subset, + guaranteed by the cmpge above. */ + if (unlikely (svptest_any (pg, cmp))) + return special_case (x, svsel (pred_alt, inv_y, y), cmp); + + return svsel (pred_alt, inv_y, y); +} + +PL_SIG (SV, F, 1, tan, -3.1, 3.1) +PL_TEST_ULP (SV_NAME_F1 (tan), 2.96) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), -0.0, -0x1p126, 100) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 0x1p-23, 0.7, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 0.7, 1.5, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 1.5, 100, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 100, 0x1p17, 50000) +PL_TEST_INTERVAL (SV_NAME_F1 (tan), 0x1p17, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_tanh_3u.c b/contrib/arm-optimized-routines/pl/math/sv_tanh_3u.c new file mode 100644 index 000000000000..f54139f1ddbc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_tanh_3u.c @@ -0,0 +1,96 @@ +/* + * Double-precision SVE tanh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "poly_sve_f64.h" +#include "mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64_t poly[11]; + float64_t inv_ln2, ln2_hi, ln2_lo, shift; + uint64_t thresh, tiny_bound; +} data = { + /* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */ + .poly = { 0x1p-1, 0x1.5555555555559p-3, 0x1.555555555554bp-5, + 0x1.111111110f663p-7, 0x1.6c16c16c1b5f3p-10, + 0x1.a01a01affa35dp-13, 0x1.a01a018b4ecbbp-16, + 0x1.71ddf82db5bb4p-19, 0x1.27e517fc0d54bp-22, + 0x1.af5eedae67435p-26, 0x1.1f143d060a28ap-29, }, + + .inv_ln2 = 0x1.71547652b82fep0, + .ln2_hi = -0x1.62e42fefa39efp-1, + .ln2_lo = -0x1.abc9e3b39803fp-56, + .shift = 0x1.8p52, + + .tiny_bound = 0x3e40000000000000, /* asuint64 (0x1p-27). */ + /* asuint64(0x1.241bf835f9d5fp+4) - asuint64(tiny_bound). */ + .thresh = 0x01f241bf835f9d5f, +}; + +static inline svfloat64_t +expm1_inline (svfloat64_t x, const svbool_t pg, const struct data *d) +{ + /* Helper routine for calculating exp(x) - 1. Vector port of the helper from + the scalar variant of tanh. */ + + /* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */ + svfloat64_t j + = svsub_x (pg, svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2), d->shift); + svint64_t i = svcvt_s64_x (pg, j); + svfloat64_t f = svmla_x (pg, x, j, d->ln2_hi); + f = svmla_x (pg, f, j, d->ln2_lo); + + /* Approximate expm1(f) using polynomial. */ + svfloat64_t f2 = svmul_x (pg, f, f); + svfloat64_t f4 = svmul_x (pg, f2, f2); + svfloat64_t p = svmla_x ( + pg, f, f2, + sv_estrin_10_f64_x (pg, f, f2, f4, svmul_x (pg, f4, f4), d->poly)); + + /* t = 2 ^ i. */ + svfloat64_t t = svscale_x (pg, sv_f64 (1), i); + /* expm1(x) = p * t + (t - 1). */ + return svmla_x (pg, svsub_x (pg, t, 1), p, t); +} + +static svfloat64_t NOINLINE +special_case (svfloat64_t x, svfloat64_t y, svbool_t special) +{ + return sv_call_f64 (tanh, x, y, special); +} + +/* SVE approximation for double-precision tanh(x), using a simplified + version of expm1. The greatest observed error is 2.77 ULP: + _ZGVsMxv_tanh(-0x1.c4a4ca0f9f3b7p-3) got -0x1.bd6a21a163627p-3 + want -0x1.bd6a21a163624p-3. */ +svfloat64_t SV_NAME_D1 (tanh) (svfloat64_t x, svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svuint64_t ia = svreinterpret_u64 (svabs_x (pg, x)); + + /* Trigger special-cases for tiny, boring and infinity/NaN. */ + svbool_t special = svcmpgt (pg, svsub_x (pg, ia, d->tiny_bound), d->thresh); + + svfloat64_t u = svadd_x (pg, x, x); + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + svfloat64_t q = expm1_inline (u, pg, d); + svfloat64_t qp2 = svadd_x (pg, q, 2); + + if (unlikely (svptest_any (pg, special))) + return special_case (x, svdiv_x (pg, q, qp2), special); + return svdiv_x (pg, q, qp2); +} + +PL_SIG (SV, D, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_D1 (tanh), 2.27) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (tanh), 0, 0x1p-27, 5000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (tanh), 0x1p-27, 0x1.241bf835f9d5fp+4, 50000) +PL_TEST_SYM_INTERVAL (SV_NAME_D1 (tanh), 0x1.241bf835f9d5fp+4, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/sv_tanhf_2u6.c b/contrib/arm-optimized-routines/pl/math/sv_tanhf_2u6.c new file mode 100644 index 000000000000..988a56de0b2e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/sv_tanhf_2u6.c @@ -0,0 +1,59 @@ +/* + * Single-precision SVE tanh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "sv_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "sv_expm1f_inline.h" + +static const struct data +{ + struct sv_expm1f_data expm1f_consts; + uint32_t boring_bound, onef; +} data = { + .expm1f_consts = SV_EXPM1F_DATA, + /* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for negative). */ + .boring_bound = 0x41102cb3, + .onef = 0x3f800000, +}; + +static svfloat32_t NOINLINE +special_case (svfloat32_t x, svfloat32_t y, svbool_t special) +{ + return sv_call_f32 (tanhf, x, y, special); +} + +/* Approximation for single-precision SVE tanh(x), using a simplified + version of expm1f. The maximum error is 2.57 ULP: + _ZGVsMxv_tanhf (0x1.fc1832p-5) got 0x1.fb71a4p-5 + want 0x1.fb71aap-5. */ +svfloat32_t SV_NAME_F1 (tanh) (svfloat32_t x, const svbool_t pg) +{ + const struct data *d = ptr_barrier (&data); + + svfloat32_t ax = svabs_x (pg, x); + svuint32_t iax = svreinterpret_u32 (ax); + svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax); + svbool_t is_boring = svcmpgt (pg, iax, d->boring_bound); + svfloat32_t boring = svreinterpret_f32 (svorr_x (pg, sign, d->onef)); + + svbool_t special = svcmpgt (pg, iax, 0x7f800000); + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + svfloat32_t q = expm1f_inline (svmul_x (pg, x, 2.0), pg, &d->expm1f_consts); + svfloat32_t y = svdiv_x (pg, q, svadd_x (pg, q, 2.0)); + if (unlikely (svptest_any (pg, special))) + return special_case (x, svsel_f32 (is_boring, boring, y), special); + return svsel_f32 (is_boring, boring, y); +} + +PL_SIG (SV, F, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (SV_NAME_F1 (tanh), 2.07) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (tanh), 0, 0x1p-23, 1000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (tanh), 0x1p-23, 0x1.205966p+3, 100000) +PL_TEST_SYM_INTERVAL (SV_NAME_F1 (tanh), 0x1.205966p+3, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/tanf_3u3.c b/contrib/arm-optimized-routines/pl/math/tanf_3u3.c new file mode 100644 index 000000000000..30c86fa89730 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tanf_3u3.c @@ -0,0 +1,193 @@ +/* + * Single-precision scalar tan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_scalar_f32.h" + +/* Useful constants. */ +#define NegPio2_1 (-0x1.921fb6p+0f) +#define NegPio2_2 (0x1.777a5cp-25f) +#define NegPio2_3 (0x1.ee59dap-50f) +/* Reduced from 0x1p20 to 0x1p17 to ensure 3.5ulps. */ +#define RangeVal (0x1p17f) +#define InvPio2 ((0x1.45f306p-1f)) +#define Shift (0x1.8p+23f) +#define AbsMask (0x7fffffff) +#define Pio4 (0x1.921fb6p-1) +/* 2PI * 2^-64. */ +#define Pio2p63 (0x1.921FB54442D18p-62) + +static inline float +eval_P (float z) +{ + return pw_horner_5_f32 (z, z * z, __tanf_poly_data.poly_tan); +} + +static inline float +eval_Q (float z) +{ + return pairwise_poly_3_f32 (z, z * z, __tanf_poly_data.poly_cotan); +} + +/* Reduction of the input argument x using Cody-Waite approach, such that x = r + + n * pi/2 with r lives in [-pi/4, pi/4] and n is a signed integer. */ +static inline float +reduce (float x, int32_t *in) +{ + /* n = rint(x/(pi/2)). */ + float r = x; + float q = fmaf (InvPio2, r, Shift); + float n = q - Shift; + /* There is no rounding here, n is representable by a signed integer. */ + *in = (int32_t) n; + /* r = x - n * (pi/2) (range reduction into -pi/4 .. pi/4). */ + r = fmaf (NegPio2_1, n, r); + r = fmaf (NegPio2_2, n, r); + r = fmaf (NegPio2_3, n, r); + return r; +} + +/* Table with 4/PI to 192 bit precision. To avoid unaligned accesses + only 8 new bits are added per entry, making the table 4 times larger. */ +static const uint32_t __inv_pio4[24] + = {0x000000a2, 0x0000a2f9, 0x00a2f983, 0xa2f9836e, 0xf9836e4e, 0x836e4e44, + 0x6e4e4415, 0x4e441529, 0x441529fc, 0x1529fc27, 0x29fc2757, 0xfc2757d1, + 0x2757d1f5, 0x57d1f534, 0xd1f534dd, 0xf534ddc0, 0x34ddc0db, 0xddc0db62, + 0xc0db6295, 0xdb629599, 0x6295993c, 0x95993c43, 0x993c4390, 0x3c439041}; + +/* Reduce the range of XI to a multiple of PI/2 using fast integer arithmetic. + XI is a reinterpreted float and must be >= 2.0f (the sign bit is ignored). + Return the modulo between -PI/4 and PI/4 and store the quadrant in NP. + Reduction uses a table of 4/PI with 192 bits of precision. A 32x96->128 bit + multiply computes the exact 2.62-bit fixed-point modulo. Since the result + can have at most 29 leading zeros after the binary point, the double + precision result is accurate to 33 bits. */ +static inline double +reduce_large (uint32_t xi, int *np) +{ + const uint32_t *arr = &__inv_pio4[(xi >> 26) & 15]; + int shift = (xi >> 23) & 7; + uint64_t n, res0, res1, res2; + + xi = (xi & 0xffffff) | 0x800000; + xi <<= shift; + + res0 = xi * arr[0]; + res1 = (uint64_t) xi * arr[4]; + res2 = (uint64_t) xi * arr[8]; + res0 = (res2 >> 32) | (res0 << 32); + res0 += res1; + + n = (res0 + (1ULL << 61)) >> 62; + res0 -= n << 62; + double x = (int64_t) res0; + *np = n; + return x * Pio2p63; +} + +/* Top 12 bits of the float representation with the sign bit cleared. */ +static inline uint32_t +top12 (float x) +{ + return (asuint (x) >> 20); +} + +/* Fast single-precision tan implementation. + Maximum ULP error: 3.293ulps. + tanf(0x1.c849eap+16) got -0x1.fe8d98p-1 want -0x1.fe8d9ep-1. */ +float +tanf (float x) +{ + /* Get top words. */ + uint32_t ix = asuint (x); + uint32_t ia = ix & AbsMask; + uint32_t ia12 = ia >> 20; + + /* Dispatch between no reduction (small numbers), fast reduction and + slow large numbers reduction. The reduction step determines r float + (|r| < pi/4) and n signed integer such that x = r + n * pi/2. */ + int32_t n; + float r; + if (ia12 < top12 (Pio4)) + { + /* Optimize small values. */ + if (unlikely (ia12 < top12 (0x1p-12f))) + { + if (unlikely (ia12 < top12 (0x1p-126f))) + /* Force underflow for tiny x. */ + force_eval_float (x * x); + return x; + } + + /* tan (x) ~= x + x^3 * P(x^2). */ + float x2 = x * x; + float y = eval_P (x2); + return fmaf (x2, x * y, x); + } + /* Similar to other trigonometric routines, fast inaccurate reduction is + performed for values of x from pi/4 up to RangeVal. In order to keep errors + below 3.5ulps, we set the value of RangeVal to 2^17. This might differ for + other trigonometric routines. Above this value more advanced but slower + reduction techniques need to be implemented to reach a similar accuracy. + */ + else if (ia12 < top12 (RangeVal)) + { + /* Fast inaccurate reduction. */ + r = reduce (x, &n); + } + else if (ia12 < 0x7f8) + { + /* Slow accurate reduction. */ + uint32_t sign = ix & ~AbsMask; + double dar = reduce_large (ia, &n); + float ar = (float) dar; + r = asfloat (asuint (ar) ^ sign); + } + else + { + /* tan(Inf or NaN) is NaN. */ + return __math_invalidf (x); + } + + /* If x lives in an interval where |tan(x)| + - is finite then use an approximation of tangent in the form + tan(r) ~ r + r^3 * P(r^2) = r + r * r^2 * P(r^2). + - grows to infinity then use an approximation of cotangent in the form + cotan(z) ~ 1/z + z * Q(z^2), where the reciprocal can be computed early. + Using symmetries of tangent and the identity tan(r) = cotan(pi/2 - r), + we only need to change the sign of r to obtain tan(x) from cotan(r). + This 2-interval approach requires 2 different sets of coefficients P and + Q, where Q is a lower order polynomial than P. */ + + /* Determine if x lives in an interval where |tan(x)| grows to infinity. */ + uint32_t alt = (uint32_t) n & 1; + + /* Perform additional reduction if required. */ + float z = alt ? -r : r; + + /* Prepare backward transformation. */ + float z2 = r * r; + float offset = alt ? 1.0f / z : z; + float scale = alt ? z : z * z2; + + /* Evaluate polynomial approximation of tan or cotan. */ + float p = alt ? eval_Q (z2) : eval_P (z2); + + /* A unified way of assembling the result on both interval types. */ + return fmaf (scale, p, offset); +} + +PL_SIG (S, F, 1, tan, -3.1, 3.1) +PL_TEST_ULP (tanf, 2.80) +PL_TEST_INTERVAL (tanf, 0, 0xffff0000, 10000) +PL_TEST_SYM_INTERVAL (tanf, 0x1p-127, 0x1p-14, 50000) +PL_TEST_SYM_INTERVAL (tanf, 0x1p-14, 0.7, 50000) +PL_TEST_SYM_INTERVAL (tanf, 0.7, 1.5, 50000) +PL_TEST_SYM_INTERVAL (tanf, 1.5, 0x1p17, 50000) +PL_TEST_SYM_INTERVAL (tanf, 0x1p17, 0x1p54, 50000) +PL_TEST_SYM_INTERVAL (tanf, 0x1p54, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/tanf_data.c b/contrib/arm-optimized-routines/pl/math/tanf_data.c new file mode 100644 index 000000000000..a6b9d512eed2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tanf_data.c @@ -0,0 +1,45 @@ +/* + * Data used in single-precision tan(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct tanf_poly_data __tanf_poly_data = { +.poly_tan = { +/* Coefficients generated using: + poly = fpminimax((tan(sqrt(x))-sqrt(x))/x^(3/2), deg, [|single ...|], [a*a;b*b]); + optimize relative error + final prec : 23 bits + deg : 5 + a : 0x1p-126 ^ 2 + b : ((pi) / 0x1p2) ^ 2 + dirty rel error: 0x1.f7c2e4p-25 + dirty abs error: 0x1.f7c2ecp-25. */ +0x1.55555p-2, +0x1.11166p-3, +0x1.b88a78p-5, +0x1.7b5756p-6, +0x1.4ef4cep-8, +0x1.0e1e74p-7 +}, +.poly_cotan = { +/* Coefficients generated using: + fpminimax(f(x) = (0x1p0 / tan(sqrt(x)) - 0x1p0 / sqrt(x)) / sqrt(x), deg, [|dtype ...|], [a;b]) + optimize a single polynomial + optimize absolute error + final prec : 23 bits + working prec : 128 bits + deg : 3 + a : 0x1p-126 + b : (pi) / 0x1p2 + dirty rel error : 0x1.81298cp-25 + dirty abs error : 0x1.a8acf4p-25. */ +-0x1.55555p-2, /* -0.33333325. */ +-0x1.6c23e4p-6, /* -2.2225354e-2. */ +-0x1.12dbap-9, /* -2.0969994e-3. */ +-0x1.05a1c2p-12, /* -2.495116e-4. */ +} +}; diff --git a/contrib/arm-optimized-routines/pl/math/tanh_3u.c b/contrib/arm-optimized-routines/pl/math/tanh_3u.c new file mode 100644 index 000000000000..86f2904afc32 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tanh_3u.c @@ -0,0 +1,78 @@ +/* + * Double-precision tanh(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "math_config.h" +#include "poly_scalar_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define AbsMask 0x7fffffffffffffff +#define InvLn2 0x1.71547652b82fep0 +#define Ln2hi 0x1.62e42fefa39efp-1 +#define Ln2lo 0x1.abc9e3b39803fp-56 +#define Shift 0x1.8p52 + +#define BoringBound 0x403241bf835f9d5f /* asuint64 (0x1.241bf835f9d5fp+4). */ +#define TinyBound 0x3e40000000000000 /* asuint64 (0x1p-27). */ +#define One 0x3ff0000000000000 + +static inline double +expm1_inline (double x) +{ + /* Helper routine for calculating exp(x) - 1. Copied from expm1_2u5.c, with + several simplifications: + - No special-case handling for tiny or special values. + - Simpler combination of p and t in final stage of the algorithm. + - Use shift-and-add instead of ldexp to calculate t. */ + + /* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */ + double j = fma (InvLn2, x, Shift) - Shift; + int64_t i = j; + double f = fma (j, -Ln2hi, x); + f = fma (j, -Ln2lo, f); + + /* Approximate expm1(f) using polynomial. */ + double f2 = f * f; + double f4 = f2 * f2; + double p = fma (f2, estrin_10_f64 (f, f2, f4, f4 * f4, __expm1_poly), f); + + /* t = 2 ^ i. */ + double t = asdouble ((uint64_t) (i + 1023) << 52); + /* expm1(x) = p * t + (t - 1). */ + return fma (p, t, t - 1); +} + +/* Approximation for double-precision tanh(x), using a simplified version of + expm1. The greatest observed error is 2.77 ULP: + tanh(-0x1.c4a4ca0f9f3b7p-3) got -0x1.bd6a21a163627p-3 + want -0x1.bd6a21a163624p-3. */ +double +tanh (double x) +{ + uint64_t ix = asuint64 (x); + uint64_t ia = ix & AbsMask; + uint64_t sign = ix & ~AbsMask; + + if (unlikely (ia > BoringBound)) + { + if (ia > 0x7ff0000000000000) + return __math_invalid (x); + return asdouble (One | sign); + } + + if (unlikely (ia < TinyBound)) + return x; + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + double q = expm1_inline (2 * x); + return q / (q + 2); +} + +PL_SIG (S, D, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (tanh, 2.27) +PL_TEST_SYM_INTERVAL (tanh, 0, TinyBound, 1000) +PL_TEST_SYM_INTERVAL (tanh, TinyBound, BoringBound, 100000) +PL_TEST_SYM_INTERVAL (tanh, BoringBound, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/tanhf_2u6.c b/contrib/arm-optimized-routines/pl/math/tanhf_2u6.c new file mode 100644 index 000000000000..93ea3cf5d865 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tanhf_2u6.c @@ -0,0 +1,88 @@ +/* + * Single-precision tanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "math_config.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define BoringBound \ + 0x41102cb3 /* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for \ + negative). */ +#define AbsMask 0x7fffffff +#define One 0x3f800000 + +#define Shift (0x1.8p23f) +#define InvLn2 (0x1.715476p+0f) +#define Ln2hi (0x1.62e4p-1f) +#define Ln2lo (0x1.7f7d1cp-20f) + +#define C(i) __expm1f_poly[i] + +static inline float +expm1f_inline (float x) +{ + /* Helper routine for calculating exp(x) - 1. + Copied from expm1f_1u6.c, with several simplifications: + - No special-case handling for tiny or special values, instead return early + from the main routine. + - No special handling for large values: + - No early return for infinity. + - Simpler combination of p and t in final stage of algorithm. + - |i| < 27, so can calculate t by simpler shift-and-add, instead of + ldexpf (same as vector algorithm). */ + + /* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */ + float j = fmaf (InvLn2, x, Shift) - Shift; + int32_t i = j; + float f = fmaf (j, -Ln2hi, x); + f = fmaf (j, -Ln2lo, f); + + /* Approximate expm1(f) with polynomial P, expm1(f) ~= f + f^2 * P(f). + Uses Estrin scheme, where the main expm1f routine uses Horner. */ + float f2 = f * f; + float p_01 = fmaf (f, C (1), C (0)); + float p_23 = fmaf (f, C (3), C (2)); + float p = fmaf (f2, p_23, p_01); + p = fmaf (f2 * f2, C (4), p); + p = fmaf (f2, p, f); + + /* t = 2^i. */ + float t = asfloat ((uint32_t) (i + 127) << 23); + /* expm1(x) ~= p * t + (t - 1). */ + return fmaf (p, t, t - 1); +} + +/* Approximation for single-precision tanh(x), using a simplified version of + expm1f. The maximum error is 2.58 ULP: + tanhf(0x1.fa5eep-5) got 0x1.f9ba02p-5 + want 0x1.f9ba08p-5. */ +float +tanhf (float x) +{ + uint32_t ix = asuint (x); + uint32_t iax = ix & AbsMask; + uint32_t sign = ix & ~AbsMask; + + if (unlikely (iax > BoringBound)) + { + if (iax > 0x7f800000) + return __math_invalidf (x); + return asfloat (One | sign); + } + + if (unlikely (iax < 0x34000000)) + return x; + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + float q = expm1f_inline (2 * x); + return q / (q + 2); +} + +PL_SIG (S, F, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (tanhf, 2.09) +PL_TEST_SYM_INTERVAL (tanhf, 0, 0x1p-23, 1000) +PL_TEST_SYM_INTERVAL (tanhf, 0x1p-23, 0x1.205966p+3, 100000) +PL_TEST_SYM_INTERVAL (tanhf, 0x1.205966p+3, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/test/mathbench_funcs.h b/contrib/arm-optimized-routines/pl/math/test/mathbench_funcs.h new file mode 100644 index 000000000000..f2710a979d40 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/mathbench_funcs.h @@ -0,0 +1,87 @@ +// clang-format off +/* + * Function entries for mathbench. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#define _ZSF1(fun, a, b) F(fun##f, a, b) +#define _ZSD1(f, a, b) D(f, a, b) + +#if defined(__vpcs) && __aarch64__ + +#define _ZVF1(fun, a, b) VNF(_ZGVnN4v_##fun##f, a, b) +#define _ZVD1(f, a, b) VND(_ZGVnN2v_##f, a, b) + +#else + +#define _ZVF1(f, a, b) +#define _ZVD1(f, a, b) + +#endif + +#if WANT_SVE_MATH + +#define _ZSVF1(fun, a, b) SVF(_ZGVsMxv_##fun##f, a, b) +#define _ZSVD1(f, a, b) SVD(_ZGVsMxv_##f, a, b) + +#else + +#define _ZSVF1(f, a, b) +#define _ZSVD1(f, a, b) + +#endif + +/* No auto-generated wrappers for binary functions - they have be + manually defined in mathbench_wrappers.h. We have to define silent + macros for them anyway as they will be emitted by PL_SIG. */ +#define _ZSF2(...) +#define _ZSD2(...) +#define _ZVF2(...) +#define _ZVD2(...) +#define _ZSVF2(...) +#define _ZSVD2(...) + +#include "mathbench_funcs_gen.h" + +/* PL_SIG only emits entries for unary functions, since if a function + needs to be wrapped in mathbench there is no way for it to know the + same of the wrapper. Add entries for binary functions, or any other + exotic signatures that need wrapping, below. */ + +{"atan2f", 'f', 0, -10.0, 10.0, {.f = atan2f_wrap}}, +{"atan2", 'd', 0, -10.0, 10.0, {.d = atan2_wrap}}, +{"powi", 'd', 0, 0.01, 11.1, {.d = powi_wrap}}, + +{"_ZGVnN4vv_atan2f", 'f', 'n', -10.0, 10.0, {.vnf = _Z_atan2f_wrap}}, +{"_ZGVnN2vv_atan2", 'd', 'n', -10.0, 10.0, {.vnd = _Z_atan2_wrap}}, +{"_ZGVnN4vv_hypotf", 'f', 'n', -10.0, 10.0, {.vnf = _Z_hypotf_wrap}}, +{"_ZGVnN2vv_hypot", 'd', 'n', -10.0, 10.0, {.vnd = _Z_hypot_wrap}}, +{"_ZGVnN2vv_pow", 'd', 'n', -10.0, 10.0, {.vnd = xy_Z_pow}}, +{"x_ZGVnN2vv_pow", 'd', 'n', -10.0, 10.0, {.vnd = x_Z_pow}}, +{"y_ZGVnN2vv_pow", 'd', 'n', -10.0, 10.0, {.vnd = y_Z_pow}}, +{"_ZGVnN4vl4l4_sincosf", 'f', 'n', -3.1, 3.1, {.vnf = _Z_sincosf_wrap}}, +{"_ZGVnN2vl8l8_sincos", 'd', 'n', -3.1, 3.1, {.vnd = _Z_sincos_wrap}}, +{"_ZGVnN4v_cexpif", 'f', 'n', -3.1, 3.1, {.vnf = _Z_cexpif_wrap}}, +{"_ZGVnN2v_cexpi", 'd', 'n', -3.1, 3.1, {.vnd = _Z_cexpi_wrap}}, + +#if WANT_SVE_MATH +{"_ZGVsMxvv_atan2f", 'f', 's', -10.0, 10.0, {.svf = _Z_sv_atan2f_wrap}}, +{"_ZGVsMxvv_atan2", 'd', 's', -10.0, 10.0, {.svd = _Z_sv_atan2_wrap}}, +{"_ZGVsMxvv_hypotf", 'f', 's', -10.0, 10.0, {.svf = _Z_sv_hypotf_wrap}}, +{"_ZGVsMxvv_hypot", 'd', 's', -10.0, 10.0, {.svd = _Z_sv_hypot_wrap}}, +{"_ZGVsMxvv_powi", 'f', 's', -10.0, 10.0, {.svf = _Z_sv_powi_wrap}}, +{"_ZGVsMxvv_powk", 'd', 's', -10.0, 10.0, {.svd = _Z_sv_powk_wrap}}, +{"_ZGVsMxvv_powf", 'f', 's', -10.0, 10.0, {.svf = xy_Z_sv_powf}}, +{"x_ZGVsMxvv_powf", 'f', 's', -10.0, 10.0, {.svf = x_Z_sv_powf}}, +{"y_ZGVsMxvv_powf", 'f', 's', -10.0, 10.0, {.svf = y_Z_sv_powf}}, +{"_ZGVsMxvv_pow", 'd', 's', -10.0, 10.0, {.svd = xy_Z_sv_pow}}, +{"x_ZGVsMxvv_pow", 'd', 's', -10.0, 10.0, {.svd = x_Z_sv_pow}}, +{"y_ZGVsMxvv_pow", 'd', 's', -10.0, 10.0, {.svd = y_Z_sv_pow}}, +{"_ZGVsMxvl4l4_sincosf", 'f', 's', -3.1, 3.1, {.svf = _Z_sv_sincosf_wrap}}, +{"_ZGVsMxvl8l8_sincos", 'd', 's', -3.1, 3.1, {.svd = _Z_sv_sincos_wrap}}, +{"_ZGVsMxv_cexpif", 'f', 's', -3.1, 3.1, {.svf = _Z_sv_cexpif_wrap}}, +{"_ZGVsMxv_cexpi", 'd', 's', -3.1, 3.1, {.svd = _Z_sv_cexpi_wrap}}, +#endif + // clang-format on diff --git a/contrib/arm-optimized-routines/pl/math/test/mathbench_wrappers.h b/contrib/arm-optimized-routines/pl/math/test/mathbench_wrappers.h new file mode 100644 index 000000000000..fe7f8963cdee --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/mathbench_wrappers.h @@ -0,0 +1,206 @@ +/* + * Function wrappers for mathbench. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +static double +atan2_wrap (double x) +{ + return atan2 (5.0, x); +} + +static float +atan2f_wrap (float x) +{ + return atan2f (5.0f, x); +} + +static double +powi_wrap (double x) +{ + return __builtin_powi (x, (int) round (x)); +} + +#if __aarch64__ && defined(__vpcs) + +__vpcs static v_double +_Z_atan2_wrap (v_double x) +{ + return _ZGVnN2vv_atan2 (v_double_dup (5.0), x); +} + +__vpcs static v_float +_Z_atan2f_wrap (v_float x) +{ + return _ZGVnN4vv_atan2f (v_float_dup (5.0f), x); +} + +__vpcs static v_float +_Z_hypotf_wrap (v_float x) +{ + return _ZGVnN4vv_hypotf (v_float_dup (5.0f), x); +} + +__vpcs static v_double +_Z_hypot_wrap (v_double x) +{ + return _ZGVnN2vv_hypot (v_double_dup (5.0), x); +} + +__vpcs static v_double +xy_Z_pow (v_double x) +{ + return _ZGVnN2vv_pow (x, x); +} + +__vpcs static v_double +x_Z_pow (v_double x) +{ + return _ZGVnN2vv_pow (x, v_double_dup (23.4)); +} + +__vpcs static v_double +y_Z_pow (v_double x) +{ + return _ZGVnN2vv_pow (v_double_dup (2.34), x); +} + +__vpcs static v_float +_Z_sincosf_wrap (v_float x) +{ + v_float s, c; + _ZGVnN4vl4l4_sincosf (x, &s, &c); + return s + c; +} + +__vpcs static v_float +_Z_cexpif_wrap (v_float x) +{ + __f32x4x2_t sc = _ZGVnN4v_cexpif (x); + return sc.val[0] + sc.val[1]; +} + +__vpcs static v_double +_Z_sincos_wrap (v_double x) +{ + v_double s, c; + _ZGVnN2vl8l8_sincos (x, &s, &c); + return s + c; +} + +__vpcs static v_double +_Z_cexpi_wrap (v_double x) +{ + __f64x2x2_t sc = _ZGVnN2v_cexpi (x); + return sc.val[0] + sc.val[1]; +} + +#endif // __arch64__ && __vpcs + +#if WANT_SVE_MATH + +static sv_float +_Z_sv_atan2f_wrap (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_atan2f (x, svdup_f32 (5.0f), pg); +} + +static sv_double +_Z_sv_atan2_wrap (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_atan2 (x, svdup_f64 (5.0), pg); +} + +static sv_float +_Z_sv_hypotf_wrap (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_hypotf (x, svdup_f32 (5.0), pg); +} + +static sv_double +_Z_sv_hypot_wrap (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_hypot (x, svdup_f64 (5.0), pg); +} + +static sv_float +_Z_sv_powi_wrap (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_powi (x, svcvt_s32_f32_x (pg, x), pg); +} + +static sv_double +_Z_sv_powk_wrap (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_powk (x, svcvt_s64_f64_x (pg, x), pg); +} + +static sv_float +xy_Z_sv_powf (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_powf (x, x, pg); +} + +static sv_float +x_Z_sv_powf (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_powf (x, svdup_f32 (23.4f), pg); +} + +static sv_float +y_Z_sv_powf (sv_float x, sv_bool pg) +{ + return _ZGVsMxvv_powf (svdup_f32 (2.34f), x, pg); +} + +static sv_double +xy_Z_sv_pow (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_pow (x, x, pg); +} + +static sv_double +x_Z_sv_pow (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_pow (x, svdup_f64 (23.4), pg); +} + +static sv_double +y_Z_sv_pow (sv_double x, sv_bool pg) +{ + return _ZGVsMxvv_pow (svdup_f64 (2.34), x, pg); +} + +static sv_float +_Z_sv_sincosf_wrap (sv_float x, sv_bool pg) +{ + float s[svcntw ()], c[svcntw ()]; + _ZGVsMxvl4l4_sincosf (x, s, c, pg); + return svadd_x (pg, svld1 (pg, s), svld1 (pg, s)); +} + +static sv_float +_Z_sv_cexpif_wrap (sv_float x, sv_bool pg) +{ + svfloat32x2_t sc = _ZGVsMxv_cexpif (x, pg); + return svadd_x (pg, svget2 (sc, 0), svget2 (sc, 1)); +} + +static sv_double +_Z_sv_sincos_wrap (sv_double x, sv_bool pg) +{ + double s[svcntd ()], c[svcntd ()]; + _ZGVsMxvl8l8_sincos (x, s, c, pg); + return svadd_x (pg, svld1 (pg, s), svld1 (pg, s)); +} + +static sv_double +_Z_sv_cexpi_wrap (sv_double x, sv_bool pg) +{ + svfloat64x2_t sc = _ZGVsMxv_cexpi (x, pg); + return svadd_x (pg, svget2 (sc, 0), svget2 (sc, 1)); +} + +#endif // WANT_SVE_MATH diff --git a/contrib/arm-optimized-routines/pl/math/test/pl_test.h b/contrib/arm-optimized-routines/pl/math/test/pl_test.h new file mode 100644 index 000000000000..e7ed4eed634e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/pl_test.h @@ -0,0 +1,39 @@ +/* + * PL macros for emitting various details about routines for consumption by + * runulp.sh. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception. + */ + +/* Emit the max ULP threshold, l, for routine f. Piggy-back PL_TEST_EXPECT_FENV + on PL_TEST_ULP to add EXPECT_FENV to all scalar routines. */ +#if WANT_VMATH || defined(IGNORE_SCALAR_FENV) +# define PL_TEST_ULP(f, l) PL_TEST_ULP f l +#else +# define PL_TEST_ULP(f, l) \ + PL_TEST_EXPECT_FENV_ALWAYS (f) \ + PL_TEST_ULP f l +#endif + +/* Emit routine name if e == 1 and f is expected to correctly trigger fenv + exceptions. e allows declaration to be emitted conditionally upon certain + build flags - defer expansion by one pass to allow those flags to be expanded + properly. */ +#define PL_TEST_EXPECT_FENV(f, e) PL_TEST_EXPECT_FENV_ (f, e) +#define PL_TEST_EXPECT_FENV_(f, e) PL_TEST_EXPECT_FENV_##e (f) +#define PL_TEST_EXPECT_FENV_1(f) PL_TEST_EXPECT_FENV_ENABLED f +#define PL_TEST_EXPECT_FENV_ALWAYS(f) PL_TEST_EXPECT_FENV (f, 1) + +#define PL_TEST_INTERVAL(f, lo, hi, n) PL_TEST_INTERVAL f lo hi n +#define PL_TEST_SYM_INTERVAL(f, lo, hi, n) \ + PL_TEST_INTERVAL (f, lo, hi, n) \ + PL_TEST_INTERVAL (f, -lo, -hi, n) +#define PL_TEST_INTERVAL_C(f, lo, hi, n, c) PL_TEST_INTERVAL f lo hi n c +#define PL_TEST_SYM_INTERVAL_C(f, lo, hi, n, c) \ + PL_TEST_INTERVAL_C (f, lo, hi, n, c) \ + PL_TEST_INTERVAL_C (f, -lo, -hi, n, c) +// clang-format off +#define PL_TEST_INTERVAL2(f, xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL f xlo,ylo xhi,yhi n +// clang-format on diff --git a/contrib/arm-optimized-routines/pl/math/test/runulp.sh b/contrib/arm-optimized-routines/pl/math/test/runulp.sh new file mode 100755 index 000000000000..0f5a41f76b25 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/runulp.sh @@ -0,0 +1,78 @@ +#!/bin/bash + +# ULP error check script. +# +# Copyright (c) 2019-2023, Arm Limited. +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +#set -x +set -eu + +# cd to bin directory. +cd "${0%/*}" + +flags="${ULPFLAGS:--q}" +emu="$@" + +# Enable SVE testing +WANT_SVE_MATH=${WANT_SVE_MATH:-0} + +FAIL=0 +PASS=0 + +t() { + routine=$1 + L=$(cat $LIMITS | grep "^$routine " | awk '{print $2}') + [[ $L =~ ^[0-9]+\.[0-9]+$ ]] + extra_flags= + [[ -z "${5:-}" ]] || extra_flags="$extra_flags -c $5" + grep -q "^$routine$" $FENV || extra_flags="$extra_flags -f" + IFS=',' read -ra LO <<< "$2" + IFS=',' read -ra HI <<< "$3" + ITV="${LO[0]} ${HI[0]}" + for i in "${!LO[@]}"; do + [[ "$i" -eq "0" ]] || ITV="$ITV x ${LO[$i]} ${HI[$i]}" + done + # Add -z flag to ignore zero sign for vector routines + { echo $routine | grep -q "ZGV"; } && extra_flags="$extra_flags -z" + $emu ./ulp -e $L $flags ${extra_flags} $routine $ITV $4 && PASS=$((PASS+1)) || FAIL=$((FAIL+1)) +} + +check() { + $emu ./ulp -f -q "$@" #>/dev/null +} + +if [ "$FUNC" == "atan2" ] || [ -z "$FUNC" ]; then + # Regression-test for correct NaN handling in atan2 + check atan2 0x1p-1022 0x1p-1000 x 0 0x1p-1022 40000 + check atan2 0x1.7887a0a717aefp+1017 0x1.7887a0a717aefp+1017 x -nan -nan + check atan2 nan nan x -nan -nan +fi + +# vector functions +flags="${ULPFLAGS:--q}" +runsv= +if [ $WANT_SVE_MATH -eq 1 ]; then +# No guarantees about powi accuracy, so regression-test for exactness +# w.r.t. the custom reference impl in ulp_wrappers.h +check -q -f -e 0 _ZGVsMxvv_powi 0 inf x 0 1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powi -0 -inf x 0 1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powi 0 inf x -0 -1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powi -0 -inf x -0 -1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powk 0 inf x 0 1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powk -0 -inf x 0 1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powk 0 inf x -0 -1000 100000 && runsv=1 +check -q -f -e 0 _ZGVsMxvv_powk -0 -inf x -0 -1000 100000 && runsv=1 +fi + +while read F LO HI N C +do + t $F $LO $HI $N $C +done << EOF +$(cat $INTERVALS | grep "\b$FUNC\b") +EOF + +[ 0 -eq $FAIL ] || { + echo "FAILED $FAIL PASSED $PASS" + exit 1 +} diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acos.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acos.tst new file mode 100644 index 000000000000..a73dcd25965b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acos.tst @@ -0,0 +1,17 @@ +; acos.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=acos op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=acos op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=acos op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=acos op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=acos op1=7ff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acos op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acos op1=00000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=acos op1=80000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=acos op1=3ff00000.00000000 result=00000000.00000000 errno=0 +func=acos op1=bff00000.00000000 result=400921fb.54442d18.469 errno=0 +func=acos op1=3ff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=acos op1=bff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosf.tst new file mode 100644 index 000000000000..9e453e3bff5e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosf.tst @@ -0,0 +1,21 @@ +; acosf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=acosf op1=7fc00001 result=7fc00001 errno=0 +func=acosf op1=ffc00001 result=7fc00001 errno=0 +func=acosf op1=7f800001 result=7fc00001 errno=0 status=i +func=acosf op1=ff800001 result=7fc00001 errno=0 status=i +func=acosf op1=7f800000 result=7fc00001 errno=EDOM status=i +func=acosf op1=ff800000 result=7fc00001 errno=EDOM status=i +func=acosf op1=00000000 result=3fc90fda.a22 errno=0 +func=acosf op1=80000000 result=3fc90fda.a22 errno=0 +func=acosf op1=3f800000 result=00000000 errno=0 +func=acosf op1=bf800000 result=40490fda.a22 errno=0 +func=acosf op1=3f800001 result=7fc00001 errno=EDOM status=i +func=acosf op1=bf800001 result=7fc00001 errno=EDOM status=i +func=acosf op1=33000000 result=3fc90fda.622 error=0 +func=acosf op1=30000000 result=3fc90fda.a12 error=0 +func=acosf op1=2d000000 result=3fc90fda.a21 error=0 +func=acosf op1=2a000000 result=3fc90fda.a22 error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosh.tst new file mode 100644 index 000000000000..dd962bd391da --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acosh.tst @@ -0,0 +1,19 @@ +; acosh.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=acosh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=acosh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=acosh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=acosh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=acosh op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=acosh op1=3ff00000.00000000 result=00000000.00000000 errno=0 +func=acosh op1=3fefffff.ffffffff result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=00000000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=80000000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=bfefffff.ffffffff result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=bff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=bff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=acosh op1=7fe01ac0.7f03a83e result=40862e50.541778f1.8cc error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acoshf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acoshf.tst new file mode 100644 index 000000000000..606c615f9b74 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/acoshf.tst @@ -0,0 +1,19 @@ +; acoshf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=acoshf op1=7fc00001 result=7fc00001 errno=0 +func=acoshf op1=ffc00001 result=7fc00001 errno=0 +func=acoshf op1=7f800001 result=7fc00001 errno=0 status=i +func=acoshf op1=ff800001 result=7fc00001 errno=0 status=i +func=acoshf op1=7f800000 result=7f800000 errno=0 +func=acoshf op1=3f800000 result=00000000 errno=0 +func=acoshf op1=3f7fffff result=7fc00001 errno=EDOM status=i +func=acoshf op1=00000000 result=7fc00001 errno=EDOM status=i +func=acoshf op1=80000000 result=7fc00001 errno=EDOM status=i +func=acoshf op1=bf7fffff result=7fc00001 errno=EDOM status=i +func=acoshf op1=bf800000 result=7fc00001 errno=EDOM status=i +func=acoshf op1=bf800001 result=7fc00001 errno=EDOM status=i +func=acoshf op1=ff800000 result=7fc00001 errno=EDOM status=i +func=acoshf op1=7f767efe result=42b2c19d.83e error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asin.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asin.tst new file mode 100644 index 000000000000..6180d7849d90 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asin.tst @@ -0,0 +1,24 @@ +; asin.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=asin op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=asin op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=asin op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=asin op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=asin op1=7ff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=asin op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=asin op1=00000000.00000000 result=00000000.00000000 errno=0 +func=asin op1=80000000.00000000 result=80000000.00000000 errno=0 +; Inconsistent behavior was detected for the following 2 cases. +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=asin op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=asin op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux + +func=asin op1=3ff00000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=asin op1=bff00000.00000000 result=bff921fb.54442d18.469 errno=0 +func=asin op1=3ff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=asin op1=bff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinf.tst new file mode 100644 index 000000000000..a85b2593768d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinf.tst @@ -0,0 +1,24 @@ +; asinf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=asinf op1=7fc00001 result=7fc00001 errno=0 +func=asinf op1=ffc00001 result=7fc00001 errno=0 +func=asinf op1=7f800001 result=7fc00001 errno=0 status=i +func=asinf op1=ff800001 result=7fc00001 errno=0 status=i +func=asinf op1=7f800000 result=7fc00001 errno=EDOM status=i +func=asinf op1=ff800000 result=7fc00001 errno=EDOM status=i +func=asinf op1=00000000 result=00000000 errno=0 +func=asinf op1=80000000 result=80000000 errno=0 +; Inconsistent behavior was detected for the following 2 cases. +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=asinf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=asinf op1=80000001 result=80000001 errno=0 maybestatus=ux + +func=asinf op1=3f800000 result=3fc90fda.a22 errno=0 +func=asinf op1=bf800000 result=bfc90fda.a22 errno=0 +func=asinf op1=3f800001 result=7fc00001 errno=EDOM status=i +func=asinf op1=bf800001 result=7fc00001 errno=EDOM status=i diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinh.tst new file mode 100644 index 000000000000..1485dfeffecf --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinh.tst @@ -0,0 +1,18 @@ +; asinh.tst +; +; Copyright (c) 2022-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=asinh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=asinh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=asinh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=asinh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=asinh op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=asinh op1=fff00000.00000000 result=fff00000.00000000 errno=0 +func=asinh op1=00000000.00000000 result=00000000.00000000 errno=0 +func=asinh op1=80000000.00000000 result=80000000.00000000 errno=0 +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=asinh op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=asinh op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinhf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinhf.tst new file mode 100644 index 000000000000..eb76a5892a70 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/asinhf.tst @@ -0,0 +1,18 @@ +; asinhf.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=asinhf op1=7fc00001 result=7fc00001 errno=0 +func=asinhf op1=ffc00001 result=7fc00001 errno=0 +func=asinhf op1=7f800001 result=7fc00001 errno=0 status=i +func=asinhf op1=ff800001 result=7fc00001 errno=0 status=i +func=asinhf op1=7f800000 result=7f800000 errno=0 +func=asinhf op1=ff800000 result=ff800000 errno=0 +func=asinhf op1=00000000 result=00000000 errno=0 +func=asinhf op1=80000000 result=80000000 errno=0 +; No exception is raised on certain machines (different version of glibc) +; Same issue encountered with other function similar to x close to 0 +; Could be due to function so boring no flop is involved in some implementations +func=asinhf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=asinhf op1=80000001 result=80000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan.tst new file mode 100644 index 000000000000..4c670553d58f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan.tst @@ -0,0 +1,22 @@ +; atan.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atan op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan op1=7ff00000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan op1=fff00000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan op1=00000000.00000000 result=00000000.00000000 errno=0 +func=atan op1=80000000.00000000 result=80000000.00000000 errno=0 +; Inconsistent behavior was detected for the following 2 cases. +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=atan op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=atan op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux + +func=atan op1=3ff00000.00000000 result=3fe921fb.54442d18.469 errno=0 +func=atan op1=bff00000.00000000 result=bfe921fb.54442d18.469 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2.tst new file mode 100644 index 000000000000..647b3764072c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2.tst @@ -0,0 +1,110 @@ +; atan2.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atan2 op1=7ff00000.00000001 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=7ff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=fff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=00000000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=80000000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=3ff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000001 op2=bff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=7ff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=fff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=00000000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=80000000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=3ff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000001 op2=bff00000.00000000 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff80000.00000001 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff80000.00000001 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff80000.00000001 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=7ff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=fff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=00000000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=80000000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=3ff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff80000.00000001 op2=bff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff80000.00000001 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff80000.00000001 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=7ff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=fff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=00000000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=80000000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=3ff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff80000.00000001 op2=bff00000.00000000 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff00000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=7ff00000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff00000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=7ff00000.00000000 op2=7ff00000.00000000 result=3fe921fb.54442d18.469 errno=0 +func=atan2 op1=7ff00000.00000000 op2=fff00000.00000000 result=4002d97c.7f3321d2.34f errno=0 +func=atan2 op1=7ff00000.00000000 op2=00000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=7ff00000.00000000 op2=80000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=7ff00000.00000000 op2=3ff00000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=7ff00000.00000000 op2=bff00000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=fff00000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=fff00000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff00000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=fff00000.00000000 op2=7ff00000.00000000 result=bfe921fb.54442d18.469 errno=0 +func=atan2 op1=fff00000.00000000 op2=fff00000.00000000 result=c002d97c.7f3321d2.34f errno=0 +func=atan2 op1=fff00000.00000000 op2=00000000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=fff00000.00000000 op2=80000000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=fff00000.00000000 op2=3ff00000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=fff00000.00000000 op2=bff00000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=00000000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=00000000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=00000000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=00000000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=00000000.00000000 op2=7ff00000.00000000 result=00000000.00000000 errno=0 +func=atan2 op1=00000000.00000000 op2=fff00000.00000000 result=400921fb.54442d18.469 errno=0 +func=atan2 op1=00000000.00000000 op2=00000000.00000000 result=00000000.00000000 errno=0 +func=atan2 op1=00000000.00000000 op2=80000000.00000000 result=400921fb.54442d18.469 errno=0 +func=atan2 op1=00000000.00000000 op2=3ff00000.00000000 result=00000000.00000000 errno=0 +func=atan2 op1=00000000.00000000 op2=bff00000.00000000 result=400921fb.54442d18.469 errno=0 +; No exception is raised on certain machines (different version of glibc) +; Same issue encountered with other function similar to x close to 0 +; Could be due to function so boring no flop is involved in some implementations +func=atan2 op1=00000000.00000001 op2=3ff00000.00000000 result=00000000.00000001 errno=0 maybestatus=ux +func=atan2 op1=80000000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=80000000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=80000000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=80000000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=80000000.00000000 op2=7ff00000.00000000 result=80000000.00000000 errno=0 +func=atan2 op1=80000000.00000000 op2=fff00000.00000000 result=c00921fb.54442d18.469 errno=0 +func=atan2 op1=80000000.00000000 op2=00000000.00000000 result=80000000.00000000 errno=0 +func=atan2 op1=80000000.00000000 op2=80000000.00000000 result=c00921fb.54442d18.469 errno=0 +func=atan2 op1=80000000.00000000 op2=3ff00000.00000000 result=80000000.00000000 errno=0 +func=atan2 op1=80000000.00000000 op2=bff00000.00000000 result=c00921fb.54442d18.469 errno=0 +; No exception is raised on certain machines (different version of glibc) +; Same issue encountered with other function similar to x close to 0 +; Could be due to function so boring no flop is involved in some implementations +func=atan2 op1=80000000.00000001 op2=3ff00000.00000000 result=80000000.00000001 errno=0 maybestatus=ux +func=atan2 op1=3ff00000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=3ff00000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=3ff00000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=3ff00000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=3ff00000.00000000 op2=7ff00000.00000000 result=00000000.00000000 errno=0 +func=atan2 op1=3ff00000.00000000 op2=fff00000.00000000 result=400921fb.54442d18.469 errno=0 +func=atan2 op1=3ff00000.00000000 op2=00000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=3ff00000.00000000 op2=80000000.00000000 result=3ff921fb.54442d18.469 errno=0 +func=atan2 op1=3ff00000.00000000 op2=3ff00000.00000000 result=3fe921fb.54442d18.469 errno=0 +func=atan2 op1=3ff00000.00000000 op2=bff00000.00000000 result=4002d97c.7f3321d2.34f errno=0 +func=atan2 op1=bff00000.00000000 op2=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=bff00000.00000000 op2=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atan2 op1=bff00000.00000000 op2=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=bff00000.00000000 op2=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atan2 op1=bff00000.00000000 op2=7ff00000.00000000 result=80000000.00000000 errno=0 +func=atan2 op1=bff00000.00000000 op2=fff00000.00000000 result=c00921fb.54442d18.469 errno=0 +func=atan2 op1=bff00000.00000000 op2=00000000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=bff00000.00000000 op2=80000000.00000000 result=bff921fb.54442d18.469 errno=0 +func=atan2 op1=bff00000.00000000 op2=3ff00000.00000000 result=bfe921fb.54442d18.469 errno=0 +func=atan2 op1=bff00000.00000000 op2=bff00000.00000000 result=c002d97c.7f3321d2.34f errno=0 +func=atan2 op1=3ff00000.00000000 op2=3ff00000.00000000 result=3fe921fb.54442d18 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2f.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2f.tst new file mode 100644 index 000000000000..85c5c5d47e10 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atan2f.tst @@ -0,0 +1,121 @@ +; atan2f.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atan2f op1=7f800001 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=7fc00001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=ffc00001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=7f800000 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=ff800000 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=00000000 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=80000000 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=3f800000 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800001 op2=bf800000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=7fc00001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=ffc00001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=7f800000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=ff800000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=00000000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=80000000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=3f800000 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800001 op2=bf800000 result=7fc00001 errno=0 status=i +func=atan2f op1=7fc00001 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7fc00001 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7fc00001 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=ffc00001 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=7f800000 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=ff800000 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=00000000 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=80000000 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=3f800000 result=7fc00001 errno=0 +func=atan2f op1=7fc00001 op2=bf800000 result=7fc00001 errno=0 +func=atan2f op1=ffc00001 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ffc00001 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ffc00001 op2=7fc00001 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=7f800000 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=ff800000 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=00000000 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=80000000 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=3f800000 result=ffc00001 errno=0 +func=atan2f op1=ffc00001 op2=bf800000 result=ffc00001 errno=0 +func=atan2f op1=7f800000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=7f800000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=7f800000 op2=ffc00001 result=7fc00001 errno=0 +func=atan2f op1=7f800000 op2=7f800000 result=3f490fda.a22 errno=0 +func=atan2f op1=7f800000 op2=ff800000 result=4016cbe3.f99 errno=0 +func=atan2f op1=7f800000 op2=00000000 result=3fc90fda.a22 errno=0 +func=atan2f op1=7f800000 op2=80000000 result=3fc90fda.a22 errno=0 +func=atan2f op1=7f800000 op2=3f800000 result=3fc90fda.a22 errno=0 +func=atan2f op1=7f800000 op2=bf800000 result=3fc90fda.a22 errno=0 +func=atan2f op1=ff800000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=ff800000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=ff800000 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=ff800000 op2=7f800000 result=bf490fda.a22 errno=0 +func=atan2f op1=ff800000 op2=ff800000 result=c016cbe3.f99 errno=0 +func=atan2f op1=ff800000 op2=00000000 result=bfc90fda.a22 errno=0 +func=atan2f op1=ff800000 op2=80000000 result=bfc90fda.a22 errno=0 +func=atan2f op1=ff800000 op2=3f800000 result=bfc90fda.a22 errno=0 +func=atan2f op1=ff800000 op2=bf800000 result=bfc90fda.a22 errno=0 +func=atan2f op1=00000000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=00000000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=00000000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=00000000 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=00000000 op2=7f800000 result=00000000 errno=0 +func=atan2f op1=00000000 op2=ff800000 result=40490fda.a22 errno=0 +func=atan2f op1=00000000 op2=00000000 result=00000000 errno=0 +func=atan2f op1=00000000 op2=80000000 result=40490fda.a22 errno=0 +func=atan2f op1=00000000 op2=3f800000 result=00000000 errno=0 +func=atan2f op1=00000000 op2=bf800000 result=40490fda.a22 errno=0 +; No exception is raised on certain machines (different version of glibc) +; Same issue encountered with other function similar to x close to 0 +; Could be due to function so boring no flop is involved in some implementations +func=atan2f op1=00000001 op2=3f800000 result=00000001 errno=0 maybestatus=ux + +func=atan2f op1=80000000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=80000000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=80000000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=80000000 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=80000000 op2=7f800000 result=80000000 errno=0 +func=atan2f op1=80000000 op2=ff800000 result=c0490fda.a22 errno=0 +func=atan2f op1=80000000 op2=00000000 result=80000000 errno=0 +func=atan2f op1=80000000 op2=80000000 result=c0490fda.a22 errno=0 +func=atan2f op1=80000000 op2=3f800000 result=80000000 errno=0 +func=atan2f op1=80000000 op2=bf800000 result=c0490fda.a22 errno=0 +; No exception is raised on certain machines (different version of glibc) +; Same issue encountered with other function similar to x close to 0 +; Could be due to function so boring no flop is involved in some implementations +func=atan2f op1=80000001 op2=3f800000 result=80000001 errno=0 maybestatus=ux + +func=atan2f op1=3f800000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=3f800000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=3f800000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=3f800000 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=3f800000 op2=7f800000 result=00000000 errno=0 +func=atan2f op1=3f800000 op2=ff800000 result=40490fda.a22 errno=0 +func=atan2f op1=3f800000 op2=00000000 result=3fc90fda.a22 errno=0 +func=atan2f op1=3f800000 op2=80000000 result=3fc90fda.a22 errno=0 +func=atan2f op1=3f800000 op2=3f800000 result=3f490fda.a22 errno=0 +func=atan2f op1=3f800000 op2=bf800000 result=4016cbe3.f99 errno=0 +func=atan2f op1=bf800000 op2=7f800001 result=7fc00001 errno=0 status=i +func=atan2f op1=bf800000 op2=ff800001 result=7fc00001 errno=0 status=i +func=atan2f op1=bf800000 op2=7fc00001 result=7fc00001 errno=0 +func=atan2f op1=bf800000 op2=ffc00001 result=ffc00001 errno=0 +func=atan2f op1=bf800000 op2=7f800000 result=80000000 errno=0 +func=atan2f op1=bf800000 op2=ff800000 result=c0490fda.a22 errno=0 +func=atan2f op1=bf800000 op2=00000000 result=bfc90fda.a22 errno=0 +func=atan2f op1=bf800000 op2=80000000 result=bfc90fda.a22 errno=0 +func=atan2f op1=bf800000 op2=3f800000 result=bf490fda.a22 errno=0 +func=atan2f op1=bf800000 op2=bf800000 result=c016cbe3.f99 errno=0 +func=atan2f op1=8005f16d op2=002bb601 result=be0a60a5.d88 error=0 +func=atan2f op1=80818ec8 op2=80ba5db9 result=c0222eda.f42 error=0 + +func=atan2f op1=ff7fffff op2=ff7fffff result=c016cbe3.f99 errno=0 +func=atan2f op1=bfc00001 op2=7f7fffff result=80300000.700 errno=0 status=u +func=atan2f op1=80800001 op2=40000000 result=80400000.800 errno=0 status=u diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanf.tst new file mode 100644 index 000000000000..0a0bfc24c605 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanf.tst @@ -0,0 +1,22 @@ +; atanf.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atanf op1=7fc00001 result=7fc00001 errno=0 +func=atanf op1=ffc00001 result=7fc00001 errno=0 +func=atanf op1=7f800001 result=7fc00001 errno=0 status=i +func=atanf op1=ff800001 result=7fc00001 errno=0 status=i +func=atanf op1=7f800000 result=3fc90fda.a22 errno=0 +func=atanf op1=ff800000 result=bfc90fda.a22 errno=0 +func=atanf op1=00000000 result=00000000 errno=0 +func=atanf op1=80000000 result=80000000 errno=0 +; Inconsistent behavior was detected for the following 2 cases. +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=atanf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=atanf op1=80000001 result=80000001 errno=0 maybestatus=ux + +func=atanf op1=3f800000 result=3f490fda.a22 errno=0 +func=atanf op1=bf800000 result=bf490fda.a22 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanh.tst new file mode 100644 index 000000000000..d96ff327fcd9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanh.tst @@ -0,0 +1,22 @@ +; atanh.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atanh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=atanh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=atanh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atanh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=atanh op1=7ff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=atanh op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=atanh op1=3ff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=atanh op1=bff00000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=atanh op1=3ff00000.00000000 result=7ff00000.00000000 errno=ERANGE status=z +func=atanh op1=bff00000.00000000 result=fff00000.00000000 errno=ERANGE status=z +func=atanh op1=00000000.00000000 result=00000000.00000000 errno=0 +func=atanh op1=80000000.00000000 result=80000000.00000000 errno=0 +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=atanh op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=atanh op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanhf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanhf.tst new file mode 100644 index 000000000000..21a68a661a11 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/atanhf.tst @@ -0,0 +1,23 @@ +; atanhf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=atanhf op1=7fc00001 result=7fc00001 errno=0 +func=atanhf op1=ffc00001 result=7fc00001 errno=0 +func=atanhf op1=7f800001 result=7fc00001 errno=0 status=i +func=atanhf op1=ff800001 result=7fc00001 errno=0 status=i +func=atanhf op1=7f800000 result=7fc00001 errno=EDOM status=i +func=atanhf op1=ff800000 result=7fc00001 errno=EDOM status=i +func=atanhf op1=3f800001 result=7fc00001 errno=EDOM status=i +func=atanhf op1=bf800001 result=7fc00001 errno=EDOM status=i +func=atanhf op1=3f800000 result=7f800000 errno=ERANGE status=z +func=atanhf op1=bf800000 result=ff800000 errno=ERANGE status=z +func=atanhf op1=00000000 result=00000000 errno=0 +func=atanhf op1=80000000 result=80000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=atanhf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=atanhf op1=80000001 result=80000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cbrtf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cbrtf.tst new file mode 100644 index 000000000000..0dd8d09f1d4f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cbrtf.tst @@ -0,0 +1,29 @@ +; cbrtf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=cbrtf op1=7f800000 result=7f800000 errno=0 +func=cbrtf op1=ff800000 result=ff800000 errno=0 +func=cbrtf op1=7f800001 result=7fc00001 errno=0 status=i +func=cbrtf op1=7fc00001 result=7fc00001 errno=0 +func=cbrtf op1=00000000 result=00000000 errno=0 +func=cbrtf op1=00000001 result=26a14517.cc7 errno=0 +func=cbrtf op1=00000002 result=26cb2ff5.29f errno=0 +func=cbrtf op1=00000003 result=26e89768.579 errno=0 +func=cbrtf op1=00000004 result=27000000.000 errno=0 +func=cbrtf op1=00400000 result=2a4b2ff5.29f errno=0 +func=cbrtf op1=00800000 result=2a800000.000 errno=0 +func=cbrtf op1=3f800000 result=3f800000.000 errno=0 +func=cbrtf op1=40000000 result=3fa14517.cc7 errno=0 +func=cbrtf op1=7f7fffff result=54cb2ff4.e63 errno=0 +func=cbrtf op1=80000000 result=80000000 errno=0 +func=cbrtf op1=80000001 result=a6a14517.cc7 errno=0 +func=cbrtf op1=80000002 result=a6cb2ff5.29f errno=0 +func=cbrtf op1=80000003 result=a6e89768.579 errno=0 +func=cbrtf op1=80000004 result=a7000000.000 errno=0 +func=cbrtf op1=80400000 result=aa4b2ff5.29f errno=0 +func=cbrtf op1=80800000 result=aa800000.000 errno=0 +func=cbrtf op1=bf800000 result=bf800000.000 errno=0 +func=cbrtf op1=c0000000 result=bfa14517.cc7 errno=0 +func=cbrtf op1=ff7fffff result=d4cb2ff4.e63 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cosh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cosh.tst new file mode 100644 index 000000000000..c4efacb7272d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/cosh.tst @@ -0,0 +1,15 @@ +; cosh.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=cosh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=cosh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=cosh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=cosh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=cosh op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=cosh op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox +func=cosh op1=fff00000.00000000 result=7ff00000.00000000 errno=0 +func=cosh op1=ffefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox +func=cosh op1=00000000.00000000 result=3ff00000.00000000 errno=0 +func=cosh op1=80000000.00000000 result=3ff00000.00000000 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/coshf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/coshf.tst new file mode 100644 index 000000000000..2b967e78f4b4 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/coshf.tst @@ -0,0 +1,15 @@ +; coshf.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=coshf op1=7fc00001 result=7fc00001 errno=0 +func=coshf op1=ffc00001 result=7fc00001 errno=0 +func=coshf op1=7f800001 result=7fc00001 errno=0 status=i +func=coshf op1=ff800001 result=7fc00001 errno=0 status=i +func=coshf op1=7f800000 result=7f800000 errno=0 +func=coshf op1=7f7fffff result=7f800000 errno=ERANGE status=ox +func=coshf op1=ff800000 result=7f800000 errno=0 +func=coshf op1=ff7fffff result=7f800000 errno=ERANGE status=ox +func=coshf op1=00000000 result=3f800000 errno=0 +func=coshf op1=80000000 result=3f800000 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfc.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfc.tst new file mode 100644 index 000000000000..c03fc591da47 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfc.tst @@ -0,0 +1,23 @@ +; erfc.tst - Directed test cases for erfc +; +; Copyright (c) 2022-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=erfc op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=erfc op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=erfc op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=erfc op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=erfc op1=7ff00000.00000000 result=00000000.00000000 errno=0 +func=erfc op1=7fefffff.ffffffff result=00000000.00000000 errno=ERANGE status=ux +; We deliberately turned off errno setting in erf, as standard simply +; state that errno `may` be set to ERANGE in case of underflow. +; As a result the following condition on errno cannot be satisfied. +; +; func=erfc op1=403b44af.48b01531 result=00000000.00000000 errno=ERANGE status=ux +; +func=erfc op1=c03b44af.48b01531 result=40000000.00000000 errno=0 +func=erfc op1=403bffff.ffffffff result=00000000.00000000 errno=ERANGE status=ux +func=erfc op1=c03bffff.ffffffff result=40000000.00000000 errno=0 +func=erfc op1=fff00000.00000000 result=40000000.00000000 errno=0 +func=erfc op1=00000000.00000000 result=3ff00000.00000000 errno=0 +func=erfc op1=80000000.00000000 result=3ff00000.00000000 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfcf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfcf.tst new file mode 100644 index 000000000000..719baccb2e45 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erfcf.tst @@ -0,0 +1,14 @@ +; erfcf.tst - Directed test cases for erfcf +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=erfcf op1=7fc00001 result=7fc00001 errno=0 +func=erfcf op1=ffc00001 result=7fc00001 errno=0 +func=erfcf op1=7f800001 result=7fc00001 errno=0 status=i +func=erfcf op1=ff800001 result=7fc00001 errno=0 status=i +func=erfcf op1=7f800000 result=00000000 errno=0 +func=erfcf op1=7f7fffff result=00000000 errno=ERANGE status=ux +func=erfcf op1=ff800000 result=40000000 errno=0 +func=erfcf op1=00000000 result=3f800000 errno=0 +func=erfcf op1=80000000 result=3f800000 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erff.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erff.tst new file mode 100644 index 000000000000..9b1d3d5114ae --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/erff.tst @@ -0,0 +1,17 @@ +; erff.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=erff op1=7fc00001 result=7fc00001 errno=0 +func=erff op1=ffc00001 result=7fc00001 errno=0 +func=erff op1=7f800001 result=7fc00001 errno=0 status=i +func=erff op1=ff800001 result=7fc00001 errno=0 status=i +func=erff op1=7f800000 result=3f800000 errno=0 +func=erff op1=ff800000 result=bf800000 errno=0 +func=erff op1=00000000 result=00000000 errno=ERANGE +func=erff op1=80000000 result=80000000 errno=ERANGE +func=erff op1=00000001 result=00000001 errno=0 status=ux +func=erff op1=80000001 result=80000001 errno=0 status=ux +func=erff op1=3f800000 result=3f57bb3d.3a0 errno=0 +func=erff op1=bf800000 result=bf57bb3d.3a0 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1.tst new file mode 100644 index 000000000000..609d6f479721 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1.tst @@ -0,0 +1,21 @@ +; expm1.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=expm1 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=expm1 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=expm1 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=expm1 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=expm1 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=expm1 op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox +func=expm1 op1=fff00000.00000000 result=bff00000.00000000 errno=0 +func=expm1 op1=ffefffff.ffffffff result=bff00000.00000000 errno=0 +func=expm1 op1=00000000.00000000 result=00000000.00000000 errno=0 +func=expm1 op1=80000000.00000000 result=80000000.00000000 errno=0 +; Inconsistent behavior was detected for the following 2 cases. +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=expm1 op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=expm1 op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1f.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1f.tst new file mode 100644 index 000000000000..44c38420a617 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/expm1f.tst @@ -0,0 +1,57 @@ +; expm1f.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=expm1f op1=7fc00001 result=7fc00001 errno=0 +func=expm1f op1=ffc00001 result=7fc00001 errno=0 +func=expm1f op1=7f800001 result=7fc00001 errno=0 status=i +func=expm1f op1=ff800001 result=7fc00001 errno=0 status=i +func=expm1f op1=7f800000 result=7f800000 errno=0 +func=expm1f op1=7f7fffff result=7f800000 errno=ERANGE status=ox +func=expm1f op1=ff800000 result=bf800000 errno=0 +func=expm1f op1=ff7fffff result=bf800000 errno=0 +func=expm1f op1=00000000 result=00000000 errno=0 +func=expm1f op1=80000000 result=80000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. + +func=expm1f op1=00000001 result=00000001 errno=0 maybestatus=ux +func=expm1f op1=80000001 result=80000001 errno=0 maybestatus=ux + +func=expm1f op1=42b145c0 result=7f6ac2dd.9b8 errno=0 + +; Check both sides of the over/underflow thresholds in the code. +func=expm1f op1=c2000000 result=bf7fffff.fff error=0 +func=expm1f op1=c2000001 result=bf7fffff.fff error=0 +func=expm1f op1=43000000 result=7f800000 error=overflow +func=expm1f op1=43000001 result=7f800000 error=overflow +func=expm1f op1=c2a80000 result=bf800000.000 error=0 +func=expm1f op1=c2a80001 result=bf800000.000 error=0 + +; Check values for which exp goes denormal. expm1f should not report +; spurious overflow. +func=expm1f op1=c2b00f34 result=bf800000.000 error=0 +func=expm1f op1=c2ce8ed0 result=bf800000.000 error=0 +func=expm1f op1=c2dc6bba result=bf800000.000 error=0 + +; Regression tests for significance loss when the two components of +; the result have opposite sign but similar magnitude +func=expm1f op1=be8516c1 result=be6a652b.0dc error=0 +func=expm1f op1=be851714 result=be6a65ab.0e5 error=0 +func=expm1f op1=be851cc7 result=be6a6e75.111 error=0 +func=expm1f op1=be851d1a result=be6a6ef5.102 error=0 +func=expm1f op1=be851d6d result=be6a6f75.0f2 error=0 +func=expm1f op1=be852065 result=be6a7409.0e4 error=0 +func=expm1f op1=be8520b8 result=be6a7489.0c7 error=0 +func=expm1f op1=be85210b result=be6a7509.0a8 error=0 +func=expm1f op1=be855401 result=be6ac39b.0d5 error=0 +func=expm1f op1=be933307 result=be7fdbf0.d8d error=0 +func=expm1f op1=be92ed6b result=be7f737a.d81 error=0 +func=expm1f op1=be933b90 result=be7fe8be.d76 error=0 +func=expm1f op1=3eb11364 result=3ed38deb.0c0 error=0 +func=expm1f op1=3f28e830 result=3f6f344b.0da error=0 +func=expm1f op1=3eb1578f result=3ed3ee47.13b error=0 +func=expm1f op1=3f50176a result=3fa08e36.fea error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10.tst new file mode 100644 index 000000000000..34831436234a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10.tst @@ -0,0 +1,16 @@ +; log10.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log10 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=log10 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=log10 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log10 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log10 op1=fff02000.00000000 result=7ff80000.00000001 errno=0 status=i +func=log10 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=log10 op1=3ff00000.00000000 result=00000000.00000000 errno=0 +func=log10 op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=log10 op1=00000000.00000000 result=fff00000.00000000 errno=ERANGE status=z +func=log10 op1=80000000.00000000 result=fff00000.00000000 errno=ERANGE status=z +func=log10 op1=80000000.00000001 result=7ff80000.00000001 errno=EDOM status=i diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10f.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10f.tst new file mode 100644 index 000000000000..d5744a66f092 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log10f.tst @@ -0,0 +1,69 @@ +; log10f.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log10f op1=7fc00001 result=7fc00001 errno=0 +func=log10f op1=ffc00001 result=7fc00001 errno=0 +func=log10f op1=7f800001 result=7fc00001 errno=0 status=i +func=log10f op1=ff800001 result=7fc00001 errno=0 status=i +func=log10f op1=ff810000 result=7fc00001 errno=0 status=i +func=log10f op1=7f800000 result=7f800000 errno=0 +func=log10f op1=3f800000 result=00000000 errno=0 +func=log10f op1=ff800000 result=7fc00001 errno=EDOM status=i +func=log10f op1=00000000 result=ff800000 errno=ERANGE status=z +func=log10f op1=80000000 result=ff800000 errno=ERANGE status=z +func=log10f op1=80000001 result=7fc00001 errno=EDOM status=i + +; Directed tests for the special-case handling of log10 of things +; very near 1 +func=log10f op1=3f81a618 result=3bb62472.b92 error=0 +func=log10f op1=3f876783 result=3cc811f4.26c error=0 +func=log10f op1=3f816af8 result=3b9cc4c7.057 error=0 +func=log10f op1=3f7bed7d result=bbe432cb.e23 error=0 +func=log10f op1=3f803ece result=3a59ff3a.a84 error=0 +func=log10f op1=3f80089f result=38ef9728.aa6 error=0 +func=log10f op1=3f86ab72 result=3cb4b711.457 error=0 +func=log10f op1=3f780854 result=bc60f953.904 error=0 +func=log10f op1=3f7c6d76 result=bbc7fd01.01c error=0 +func=log10f op1=3f85dff6 result=3c9fa76f.81f error=0 +func=log10f op1=3f7b87f4 result=bbfa9edc.be4 error=0 +func=log10f op1=3f81c710 result=3bc4457b.745 error=0 +func=log10f op1=3f80946d result=3b00a140.c06 error=0 +func=log10f op1=3f7e87ea result=bb23cd70.828 error=0 +func=log10f op1=3f811437 result=3b6ee960.b40 error=0 +func=log10f op1=3f858dcf result=3c971d9b.2ea error=0 +func=log10f op1=3f7f61a3 result=ba89b814.4e0 error=0 +func=log10f op1=3f82d642 result=3c1bfb8d.517 error=0 +func=log10f op1=3f80f3bc result=3b52ebe8.c75 error=0 +func=log10f op1=3f85eff9 result=3ca150d9.7e8 error=0 +func=log10f op1=3f843eb8 result=3c68263f.771 error=0 +func=log10f op1=3f78e691 result=bc481cf4.50a error=0 +func=log10f op1=3f87c56f result=3cd1b268.5e6 error=0 +func=log10f op1=3f83b711 result=3c4b94c5.918 error=0 +func=log10f op1=3f823b2b result=3bf5eb02.e2a error=0 +func=log10f op1=3f7f2c4e result=bab82c80.519 error=0 +func=log10f op1=3f83fc92 result=3c5a3ba1.543 error=0 +func=log10f op1=3f793956 result=bc3ee04e.03c error=0 +func=log10f op1=3f839ba5 result=3c45caca.92a error=0 +func=log10f op1=3f862f30 result=3ca7de76.16f error=0 +func=log10f op1=3f832a20 result=3c2dc6e9.afd error=0 +func=log10f op1=3f810296 result=3b5fb92a.429 error=0 +func=log10f op1=3f7e58c9 result=bb38655a.0a4 error=0 +func=log10f op1=3f8362e7 result=3c39cc65.d15 error=0 +func=log10f op1=3f7fdb85 result=b97d9016.40b error=0 +func=log10f op1=3f84484e result=3c6a29f2.f74 error=0 +func=log10f op1=3f861862 result=3ca5819e.f2d error=0 +func=log10f op1=3f7c027b result=bbdf912d.440 error=0 +func=log10f op1=3f867803 result=3caf6744.34d error=0 +func=log10f op1=3f789a89 result=bc509bce.458 error=0 +func=log10f op1=3f8361d9 result=3c399347.379 error=0 +func=log10f op1=3f7d3ac3 result=bb9ad93a.93d error=0 +func=log10f op1=3f7ee241 result=baf8bd12.a62 error=0 +func=log10f op1=3f83a1fd result=3c4721bd.0a4 error=0 +func=log10f op1=3f840da3 result=3c5dd375.675 error=0 +func=log10f op1=3f79c2fe result=bc2f8a60.8c5 error=0 +func=log10f op1=3f854a93 result=3c901cc9.add error=0 +func=log10f op1=3f87a50a result=3cce6125.cd6 error=0 +func=log10f op1=3f818bf5 result=3baaee68.a55 error=0 +func=log10f op1=3f830a44 result=3c2705c4.d87 error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1p.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1p.tst new file mode 100644 index 000000000000..9ee8c62fc9c0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1p.tst @@ -0,0 +1,22 @@ +; log1p.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log1p op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=log1p op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=log1p op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log1p op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log1p op1=fff02000.00000000 result=7ff80000.00000001 errno=0 status=i +func=log1p op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +; Cases 6, 9 , 10, 11, 12 fail with certain versions of GLIBC and not others. +; The main reason seems to be the handling of errno and exceptions. + +func=log1p op1=00000000.00000000 result=00000000.00000000 errno=0 +func=log1p op1=80000000.00000000 result=80000000.00000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=log1p op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=log1p op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1pf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1pf.tst new file mode 100644 index 000000000000..aaa01d67c2b3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log1pf.tst @@ -0,0 +1,130 @@ +; log1pf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log1pf op1=7fc00001 result=7fc00001 errno=0 +func=log1pf op1=ffc00001 result=7fc00001 errno=0 +func=log1pf op1=7f800001 result=7fc00001 errno=0 status=i +func=log1pf op1=ff800001 result=7fc00001 errno=0 status=i +func=log1pf op1=ff810000 result=7fc00001 errno=0 status=i +func=log1pf op1=7f800000 result=7f800000 errno=0 + +; Cases 6, 9 , 10, 11, 12 fail with certain versions of GLIBC and not others. +; The main reason seems to be the handling of errno and exceptions. + +func=log1pf op1=00000000 result=00000000 errno=0 +func=log1pf op1=80000000 result=80000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=log1pf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=log1pf op1=80000001 result=80000001 errno=0 maybestatus=ux + +func=log1pf op1=3f1e91ee result=3ef6d127.fdb errno=0 +func=log1pf op1=3f201046 result=3ef8a881.fba errno=0 +func=log1pf op1=3f21b916 result=3efab23b.f9f errno=0 +func=log1pf op1=3f21bde6 result=3efab821.fee errno=0 +func=log1pf op1=3f22a5ee result=3efbd435.ff2 errno=0 +func=log1pf op1=3f231b56 result=3efc63b7.e26 errno=0 +func=log1pf op1=3f23ce96 result=3efd3e83.fc8 errno=0 +func=log1pf op1=3eee18c6 result=3ec38576.02e errno=0 +func=log1pf op1=3eee2f41 result=3ec394ce.057 errno=0 +func=log1pf op1=3eee770d result=3ec3c5cc.00c errno=0 +func=log1pf op1=3eee7fed result=3ec3cbda.065 errno=0 +func=log1pf op1=3eee8fb2 result=3ec3d69c.008 errno=0 +func=log1pf op1=3eeeb8eb result=3ec3f2ba.061 errno=0 +func=log1pf op1=3eeeccfd result=3ec4006a.01d errno=0 +func=log1pf op1=3eeef5f0 result=3ec41c56.020 errno=0 +func=log1pf op1=3eeeff12 result=3ec42290.00c errno=0 +func=log1pf op1=3eef05cf result=3ec42728.052 errno=0 +func=log1pf op1=3eef13d3 result=3ec430b6.00e errno=0 +func=log1pf op1=3eef2e70 result=3ec442da.04a errno=0 +func=log1pf op1=3eef3fbf result=3ec44ea6.055 errno=0 +func=log1pf op1=3eef3feb result=3ec44ec4.021 errno=0 +func=log1pf op1=3eef4399 result=3ec45146.011 errno=0 +func=log1pf op1=3eef452e result=3ec4525a.049 errno=0 +func=log1pf op1=3eef4ea9 result=3ec458d0.020 errno=0 +func=log1pf op1=3eef7365 result=3ec471d8.05e errno=0 +func=log1pf op1=3eefa38f result=3ec492a8.003 errno=0 +func=log1pf op1=3eefb1f1 result=3ec49c74.015 errno=0 +func=log1pf op1=3eefb334 result=3ec49d50.023 errno=0 +func=log1pf op1=3eefb3c1 result=3ec49db0.0bf errno=0 +func=log1pf op1=3eefb591 result=3ec49eec.15d errno=0 +func=log1pf op1=3eefd736 result=3ec4b5d6.02d errno=0 +func=log1pf op1=3eefd797 result=3ec4b618.114 errno=0 +func=log1pf op1=3eefee5d result=3ec4c59a.071 errno=0 +func=log1pf op1=3eeffff4 result=3ec4d194.0a7 errno=0 +func=log1pf op1=3ef00cd1 result=3ec4da56.025 errno=0 +func=log1pf op1=3ef0163a result=3ec4e0be.07a errno=0 +func=log1pf op1=3ef01e89 result=3ec4e666.007 errno=0 +func=log1pf op1=3ef02004 result=3ec4e768.00a errno=0 +func=log1pf op1=3ef02c40 result=3ec4efbc.017 errno=0 +func=log1pf op1=3ef05b50 result=3ec50fc4.031 errno=0 +func=log1pf op1=3ef05bb1 result=3ec51006.05f errno=0 +func=log1pf op1=3ef0651b result=3ec5166e.0d9 errno=0 +func=log1pf op1=3ef06609 result=3ec51710.02a errno=0 +func=log1pf op1=3ef0666a result=3ec51752.049 errno=0 +func=log1pf op1=3ef0791e result=3ec5240c.0a8 errno=0 +func=log1pf op1=3ef07d46 result=3ec526e0.00e errno=0 +func=log1pf op1=3ef091fd result=3ec534f8.03c errno=0 +func=log1pf op1=3ef09602 result=3ec537b4.128 errno=0 +func=log1pf op1=3ef09848 result=3ec53940.044 errno=0 +func=log1pf op1=3ef0a04f result=3ec53eb6.07d errno=0 +func=log1pf op1=3ef0ab6a result=3ec54644.062 errno=0 +func=log1pf op1=3ef0ae49 result=3ec54838.002 errno=0 +func=log1pf op1=3ef0c1b8 result=3ec55570.000 errno=0 +func=log1pf op1=3ef0ca06 result=3ec55b16.00d errno=0 +func=log1pf op1=3ef0cc29 result=3ec55c8a.095 errno=0 +func=log1pf op1=3ef0d228 result=3ec5609e.04f errno=0 +func=log1pf op1=3ef0d8c0 result=3ec5651a.05e errno=0 +func=log1pf op1=3ef0dc0c result=3ec56758.029 errno=0 +func=log1pf op1=3ef0e0e8 result=3ec56aa6.02e errno=0 +func=log1pf op1=3ef0e502 result=3ec56d70.102 errno=0 +func=log1pf op1=3ef0e754 result=3ec56f04.017 errno=0 +func=log1pf op1=3ef0efe9 result=3ec574da.01c errno=0 +func=log1pf op1=3ef0f309 result=3ec576fa.016 errno=0 +func=log1pf op1=3ef0f499 result=3ec5780a.005 errno=0 +func=log1pf op1=3ef0f6c2 result=3ec57982.083 errno=0 +func=log1pf op1=3ef0f852 result=3ec57a92.05d errno=0 +func=log1pf op1=3ef0f9e2 result=3ec57ba2.02e errno=0 +func=log1pf op1=3ef119ee result=3ec5916c.024 errno=0 +func=log1pf op1=3ef11edf result=3ec594c8.03d errno=0 +func=log1pf op1=3ef128c4 result=3ec59b82.001 errno=0 +func=log1pf op1=3ef12ac1 result=3ec59cdc.04b errno=0 +func=log1pf op1=3ef12fea result=3ec5a05e.045 errno=0 +func=log1pf op1=3ef131e7 result=3ec5a1b8.05a errno=0 +func=log1pf op1=3ef134e1 result=3ec5a3be.00e errno=0 +func=log1pf op1=3ef1397a result=3ec5a6de.127 errno=0 +func=log1pf op1=3ef13ade result=3ec5a7d0.0f6 errno=0 +func=log1pf op1=3ef13c0d result=3ec5a89e.054 errno=0 +func=log1pf op1=3ef13d71 result=3ec5a990.016 errno=0 +func=log1pf op1=3ef14074 result=3ec5ab9c.12c errno=0 +func=log1pf op1=3ef146a0 result=3ec5afce.035 errno=0 +func=log1pf op1=3ef14a39 result=3ec5b240.024 errno=0 +func=log1pf op1=3ef14d39 result=3ec5b44a.00c errno=0 +func=log1pf op1=3ef152a3 result=3ec5b7f8.04d errno=0 +func=log1pf op1=3ef170a1 result=3ec5cc5a.021 errno=0 +func=log1pf op1=3ef17855 result=3ec5d196.0dc errno=0 +func=log1pf op1=3ef17ece result=3ec5d5fc.010 errno=0 +func=log1pf op1=3ef1810c result=3ec5d782.08e errno=0 +func=log1pf op1=3ef18da9 result=3ec5e014.0ae errno=0 +func=log1pf op1=3ef19054 result=3ec5e1e4.1a2 errno=0 +func=log1pf op1=3ef190ea result=3ec5e24a.048 errno=0 +func=log1pf op1=3ef1a739 result=3ec5f172.0d8 errno=0 +func=log1pf op1=3ef1a83c result=3ec5f222.018 errno=0 +func=log1pf op1=3ef1bbcc result=3ec5ff6c.09d errno=0 +func=log1pf op1=3ef1bd3c result=3ec60066.03a errno=0 +func=log1pf op1=3ef1d6ee result=3ec611da.056 errno=0 +func=log1pf op1=3ef1de36 result=3ec616cc.01b errno=0 +func=log1pf op1=3ef1e623 result=3ec61c2e.008 errno=0 +func=log1pf op1=3ef1e9b1 result=3ec61e98.029 errno=0 +func=log1pf op1=3ef1ee19 result=3ec62196.0d8 errno=0 +func=log1pf op1=3ef1f13a result=3ec623b6.039 errno=0 +func=log1pf op1=3ef1f1a7 result=3ec62400.091 errno=0 +func=log1pf op1=3ef1f214 result=3ec6244a.0e8 errno=0 +func=log1pf op1=3ef206e1 result=3ec6326a.09b errno=0 +func=log1pf op1=3ef21245 result=3ec63a26.012 errno=0 +func=log1pf op1=3ef217fd result=3ec63e08.048 errno=0 +func=log1pf op1=3ef2186a result=3ec63e52.063 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2.tst new file mode 100644 index 000000000000..5d1eb9b877e8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2.tst @@ -0,0 +1,21 @@ +; Directed test cases for log2 +; +; Copyright (c) 2018-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log2 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=log2 op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=log2 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log2 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=log2 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=log2 op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=log2 op1=7fefffff.ffffffff result=408fffff.ffffffff.ffa errno=0 +func=log2 op1=ffefffff.ffffffff result=7ff80000.00000001 errno=EDOM status=i +func=log2 op1=3ff00000.00000000 result=00000000.00000000 errno=0 +func=log2 op1=bff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i +func=log2 op1=00000000.00000000 result=fff00000.00000000 errno=ERANGE status=z +func=log2 op1=80000000.00000000 result=fff00000.00000000 errno=ERANGE status=z +func=log2 op1=00000000.00000001 result=c090c800.00000000 errno=0 +func=log2 op1=80000000.00000001 result=7ff80000.00000001 errno=EDOM status=i +func=log2 op1=40000000.00000000 result=3ff00000.00000000 errno=0 +func=log2 op1=3fe00000.00000000 result=bff00000.00000000 errno=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2f.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2f.tst new file mode 100644 index 000000000000..4e08110878d6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/log2f.tst @@ -0,0 +1,27 @@ +; log2f.tst - Directed test cases for log2f +; +; Copyright (c) 2017-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=log2f op1=7fc00001 result=7fc00001 errno=0 +func=log2f op1=ffc00001 result=7fc00001 errno=0 +func=log2f op1=7f800001 result=7fc00001 errno=0 status=i +func=log2f op1=ff800001 result=7fc00001 errno=0 status=i +func=log2f op1=ff810000 result=7fc00001 errno=0 status=i +func=log2f op1=7f800000 result=7f800000 errno=0 +func=log2f op1=ff800000 result=7fc00001 errno=EDOM status=i +func=log2f op1=3f800000 result=00000000 errno=0 +func=log2f op1=00000000 result=ff800000 errno=ERANGE status=z +func=log2f op1=80000000 result=ff800000 errno=ERANGE status=z +func=log2f op1=80000001 result=7fc00001 errno=EDOM status=i + +func=log2f op1=3f7d70a4 result=bc6d8f8b.7d4 error=0 +func=log2f op1=3f604189 result=be4394c8.395 error=0 +func=log2f op1=3f278034 result=bf1caa73.88e error=0 +func=log2f op1=3edd3c36 result=bf9af3b9.619 error=0 +func=log2f op1=3e61259a result=c00bdb95.650 error=0 +func=log2f op1=3f8147ae result=3c6b3267.d6a error=0 +func=log2f op1=3f8fbe77 result=3e2b5fe2.a1c error=0 +func=log2f op1=3fac3eea result=3edb4d5e.1fc error=0 +func=log2f op1=3fd6e632 result=3f3f5d3a.827 error=0 +func=log2f op1=40070838 result=3f89e055.a0a error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinh.tst new file mode 100644 index 000000000000..d6a3da896693 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinh.tst @@ -0,0 +1,21 @@ +; sinh.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=sinh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=sinh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=sinh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=sinh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=sinh op1=7ff00000.00000000 result=7ff00000.00000000 errno=0 +func=sinh op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox +func=sinh op1=fff00000.00000000 result=fff00000.00000000 errno=0 +func=sinh op1=ffefffff.ffffffff result=fff00000.00000000 errno=ERANGE status=ox +func=sinh op1=00000000.00000000 result=00000000.00000000 errno=0 +func=sinh op1=80000000.00000000 result=80000000.00000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=sinh op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=sinh op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinhf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinhf.tst new file mode 100644 index 000000000000..5f7bd1b04137 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/sinhf.tst @@ -0,0 +1,21 @@ +; sinhf.tst +; +; Copyright (c) 2009-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=sinhf op1=7fc00001 result=7fc00001 errno=0 +func=sinhf op1=ffc00001 result=7fc00001 errno=0 +func=sinhf op1=7f800001 result=7fc00001 errno=0 status=i +func=sinhf op1=ff800001 result=7fc00001 errno=0 status=i +func=sinhf op1=7f800000 result=7f800000 errno=0 +func=sinhf op1=7f7fffff result=7f800000 errno=ERANGE status=ox +func=sinhf op1=ff800000 result=ff800000 errno=0 +func=sinhf op1=ff7fffff result=ff800000 errno=ERANGE status=ox +func=sinhf op1=00000000 result=00000000 errno=0 +func=sinhf op1=80000000 result=80000000 errno=0 + +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=sinhf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=sinhf op1=80000001 result=80000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanf.tst new file mode 100644 index 000000000000..3161f70f4361 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanf.tst @@ -0,0 +1,25 @@ +; tanf.tst +; +; Copyright (c) 2022-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=tanf op1=7fc00001 result=7fc00001 errno=0 +func=tanf op1=ffc00001 result=7fc00001 errno=0 +func=tanf op1=7f800001 result=7fc00001 errno=0 status=i +func=tanf op1=ff800001 result=7fc00001 errno=0 status=i +func=tanf op1=7f800000 result=7fc00001 errno=EDOM status=i +func=tanf op1=ff800000 result=7fc00001 errno=EDOM status=i +func=tanf op1=00000000 result=00000000 errno=0 +func=tanf op1=80000000 result=80000000 errno=0 +; SDCOMP-26094: check tanf in the cases for which the range reducer +; returns values furthest beyond its nominal upper bound of pi/4. +func=tanf op1=46427f1b result=3f80396d.599 error=0 +func=tanf op1=4647e568 result=3f8039a6.c9f error=0 +func=tanf op1=46428bac result=3f803a03.148 error=0 +func=tanf op1=4647f1f9 result=3f803a3c.852 error=0 +func=tanf op1=4647fe8a result=3f803ad2.410 error=0 +func=tanf op1=45d8d7f1 result=bf800669.901 error=0 +func=tanf op1=45d371a4 result=bf800686.3cd error=0 +func=tanf op1=45ce0b57 result=bf8006a2.e9a error=0 +func=tanf op1=45d35882 result=bf80071b.bc4 error=0 +func=tanf op1=45cdf235 result=bf800738.693 error=0 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanh.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanh.tst new file mode 100644 index 000000000000..78776e6f3924 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanh.tst @@ -0,0 +1,18 @@ +; tanh.tst +; +; Copyright (c) 1999-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=tanh op1=7ff80000.00000001 result=7ff80000.00000001 errno=0 +func=tanh op1=fff80000.00000001 result=7ff80000.00000001 errno=0 +func=tanh op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=tanh op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i +func=tanh op1=7ff00000.00000000 result=3ff00000.00000000 errno=0 +func=tanh op1=fff00000.00000000 result=bff00000.00000000 errno=0 +func=tanh op1=00000000.00000000 result=00000000.00000000 errno=0 +func=tanh op1=80000000.00000000 result=80000000.00000000 errno=0 +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +func=tanh op1=00000000.00000001 result=00000000.00000001 errno=0 maybestatus=ux +func=tanh op1=80000000.00000001 result=80000000.00000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanhf.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanhf.tst new file mode 100644 index 000000000000..603e3107e44f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/directed/tanhf.tst @@ -0,0 +1,20 @@ +; tanhf.tst +; +; Copyright (c) 2007-2023, Arm Limited. +; SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +func=tanhf op1=7fc00001 result=7fc00001 errno=0 +func=tanhf op1=ffc00001 result=7fc00001 errno=0 +func=tanhf op1=7f800001 result=7fc00001 errno=0 status=i +func=tanhf op1=ff800001 result=7fc00001 errno=0 status=i +func=tanhf op1=7f800000 result=3f800000 errno=0 +func=tanhf op1=ff800000 result=bf800000 errno=0 +func=tanhf op1=00000000 result=00000000 errno=0 +func=tanhf op1=80000000 result=80000000 errno=0 +; No exception is raised with certain versions of glibc. Functions +; approximated by x near zero may not generate/implement flops and +; thus may not raise exceptions. +; func=tanhf op1=00000001 result=00000001 errno=0 maybestatus=ux +; func=tanhf op1=80000001 result=80000001 errno=0 maybestatus=ux +func=tanhf op1=00000001 result=00000001 errno=0 maybestatus=ux +func=tanhf op1=80000001 result=80000001 errno=0 maybestatus=ux diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/random/double.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/random/double.tst new file mode 100644 index 000000000000..d83283ef7864 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/random/double.tst @@ -0,0 +1,6 @@ +!! double.tst - Random test case specification for DP functions +!! +!! Copyright (c) 1999-2023, Arm Limited. +!! SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +test log10 10000 diff --git a/contrib/arm-optimized-routines/pl/math/test/testcases/random/float.tst b/contrib/arm-optimized-routines/pl/math/test/testcases/random/float.tst new file mode 100644 index 000000000000..fa77efecfabb --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/testcases/random/float.tst @@ -0,0 +1,8 @@ +!! float.tst - Random test case specification for SP functions +!! +!! Copyright (c) 2022-2023, Arm Limited. +!! SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +test erff 10000 +test log10f 10000 +test tanf 10000 diff --git a/contrib/arm-optimized-routines/pl/math/test/ulp_funcs.h b/contrib/arm-optimized-routines/pl/math/test/ulp_funcs.h new file mode 100644 index 000000000000..4929b481ffe1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/ulp_funcs.h @@ -0,0 +1,70 @@ +/* + * Function entries for ulp. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#if defined(__vpcs) && __aarch64__ + +#define _ZVF1(f) ZVF1 (f) +#define _ZVD1(f) ZVD1 (f) +#define _ZVF2(f) ZVF2 (f) +#define _ZVD2(f) ZVD2 (f) + +#else + +#define _ZVF1(f) +#define _ZVD1(f) +#define _ZVF2(f) +#define _ZVD2(f) + +#endif + +#if WANT_SVE_MATH + +#define _ZSVF1(f) ZSVF1 (f) +#define _ZSVF2(f) ZSVF2 (f) +#define _ZSVD1(f) ZSVD1 (f) +#define _ZSVD2(f) ZSVD2 (f) + +#else + +#define _ZSVF1(f) +#define _ZSVF2(f) +#define _ZSVD1(f) +#define _ZSVD2(f) + +#endif + +#define _ZSF1(f) F1 (f) +#define _ZSF2(f) F2 (f) +#define _ZSD1(f) D1 (f) +#define _ZSD2(f) D2 (f) + +#include "ulp_funcs_gen.h" + +F (_ZGVnN4v_sincosf_sin, v_sincosf_sin, sin, mpfr_sin, 1, 1, f1, 0) +F (_ZGVnN4v_sincosf_cos, v_sincosf_cos, cos, mpfr_cos, 1, 1, f1, 0) +F (_ZGVnN4v_cexpif_sin, v_cexpif_sin, sin, mpfr_sin, 1, 1, f1, 0) +F (_ZGVnN4v_cexpif_cos, v_cexpif_cos, cos, mpfr_cos, 1, 1, f1, 0) + +F (_ZGVnN2v_sincos_sin, v_sincos_sin, sinl, mpfr_sin, 1, 0, d1, 0) +F (_ZGVnN2v_sincos_cos, v_sincos_cos, cosl, mpfr_cos, 1, 0, d1, 0) +F (_ZGVnN2v_cexpi_sin, v_cexpi_sin, sinl, mpfr_sin, 1, 0, d1, 0) +F (_ZGVnN2v_cexpi_cos, v_cexpi_cos, cosl, mpfr_cos, 1, 0, d1, 0) + +#if WANT_SVE_MATH +F (_ZGVsMxvv_powk, Z_sv_powk, ref_powi, mpfr_powi, 2, 0, d2, 0) +F (_ZGVsMxvv_powi, Z_sv_powi, ref_powif, mpfr_powi, 2, 1, f2, 0) + +F (_ZGVsMxv_sincosf_sin, sv_sincosf_sin, sin, mpfr_sin, 1, 1, f1, 0) +F (_ZGVsMxv_sincosf_cos, sv_sincosf_cos, cos, mpfr_cos, 1, 1, f1, 0) +F (_ZGVsMxv_cexpif_sin, sv_cexpif_sin, sin, mpfr_sin, 1, 1, f1, 0) +F (_ZGVsMxv_cexpif_cos, sv_cexpif_cos, cos, mpfr_cos, 1, 1, f1, 0) + +F (_ZGVsMxv_sincos_sin, sv_sincos_sin, sinl, mpfr_sin, 1, 0, d1, 0) +F (_ZGVsMxv_sincos_cos, sv_sincos_cos, cosl, mpfr_cos, 1, 0, d1, 0) +F (_ZGVsMxv_cexpi_sin, sv_cexpi_sin, sinl, mpfr_sin, 1, 0, d1, 0) +F (_ZGVsMxv_cexpi_cos, sv_cexpi_cos, cosl, mpfr_cos, 1, 0, d1, 0) +#endif diff --git a/contrib/arm-optimized-routines/pl/math/test/ulp_wrappers.h b/contrib/arm-optimized-routines/pl/math/test/ulp_wrappers.h new file mode 100644 index 000000000000..0f7b68949c7b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/test/ulp_wrappers.h @@ -0,0 +1,140 @@ +// clang-format off +/* + * Function wrappers for ulp. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#define _GNU_SOURCE +#include <stdbool.h> +#include <arm_neon.h> + +#if USE_MPFR +static int sincos_mpfr_sin(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { + mpfr_cos(y, x, r); + return mpfr_sin(y, x, r); +} +static int sincos_mpfr_cos(mpfr_t y, const mpfr_t x, mpfr_rnd_t r) { + mpfr_sin(y, x, r); + return mpfr_cos(y, x, r); +} +static int wrap_mpfr_powi(mpfr_t ret, const mpfr_t x, const mpfr_t y, mpfr_rnd_t rnd) { + mpfr_t y2; + mpfr_init(y2); + mpfr_trunc(y2, y); + return mpfr_pow(ret, x, y2, rnd); +} +#endif + +/* Our implementations of powi/powk are too imprecise to verify + against any established pow implementation. Instead we have the + following simple implementation, against which it is enough to + maintain bitwise reproducibility. Note the test framework expects + the reference impl to be of higher precision than the function + under test. For instance this means that the reference for + double-precision powi will be passed a long double, so to check + bitwise reproducibility we have to cast it back down to + double. This is fine since a round-trip to higher precision and + back down is correctly rounded. */ +#define DECL_POW_INT_REF(NAME, DBL_T, FLT_T, INT_T) \ + static DBL_T __attribute__((unused)) NAME (DBL_T in_val, DBL_T y) \ + { \ + INT_T n = (INT_T) round (y); \ + FLT_T acc = 1.0; \ + bool want_recip = n < 0; \ + n = n < 0 ? -n : n; \ + \ + for (FLT_T c = in_val; n; c *= c, n >>= 1) \ + { \ + if (n & 0x1) \ + { \ + acc *= c; \ + } \ + } \ + if (want_recip) \ + { \ + acc = 1.0 / acc; \ + } \ + return acc; \ + } + +DECL_POW_INT_REF(ref_powif, double, float, int) +DECL_POW_INT_REF(ref_powi, long double, double, int) + +#define ZVF1_WRAP(func) static float Z_##func##f(float x) { return _ZGVnN4v_##func##f(argf(x))[0]; } +#define ZVF2_WRAP(func) static float Z_##func##f(float x, float y) { return _ZGVnN4vv_##func##f(argf(x), argf(y))[0]; } +#define ZVD1_WRAP(func) static double Z_##func(double x) { return _ZGVnN2v_##func(argd(x))[0]; } +#define ZVD2_WRAP(func) static double Z_##func(double x, double y) { return _ZGVnN2vv_##func(argd(x), argd(y))[0]; } + +#if defined(__vpcs) && __aarch64__ + +#define ZVNF1_WRAP(func) ZVF1_WRAP(func) +#define ZVNF2_WRAP(func) ZVF2_WRAP(func) +#define ZVND1_WRAP(func) ZVD1_WRAP(func) +#define ZVND2_WRAP(func) ZVD2_WRAP(func) + +#else + +#define ZVNF1_WRAP(func) +#define ZVNF2_WRAP(func) +#define ZVND1_WRAP(func) +#define ZVND2_WRAP(func) + +#endif + +#define ZSVF1_WRAP(func) static float Z_sv_##func##f(float x) { return svretf(_ZGVsMxv_##func##f(svargf(x), svptrue_b32())); } +#define ZSVF2_WRAP(func) static float Z_sv_##func##f(float x, float y) { return svretf(_ZGVsMxvv_##func##f(svargf(x), svargf(y), svptrue_b32())); } +#define ZSVD1_WRAP(func) static double Z_sv_##func(double x) { return svretd(_ZGVsMxv_##func(svargd(x), svptrue_b64())); } +#define ZSVD2_WRAP(func) static double Z_sv_##func(double x, double y) { return svretd(_ZGVsMxvv_##func(svargd(x), svargd(y), svptrue_b64())); } + +#if WANT_SVE_MATH + +#define ZSVNF1_WRAP(func) ZSVF1_WRAP(func) +#define ZSVNF2_WRAP(func) ZSVF2_WRAP(func) +#define ZSVND1_WRAP(func) ZSVD1_WRAP(func) +#define ZSVND2_WRAP(func) ZSVD2_WRAP(func) + +#else + +#define ZSVNF1_WRAP(func) +#define ZSVNF2_WRAP(func) +#define ZSVND1_WRAP(func) +#define ZSVND2_WRAP(func) + +#endif + +/* No wrappers for scalar routines, but PL_SIG will emit them. */ +#define ZSNF1_WRAP(func) +#define ZSNF2_WRAP(func) +#define ZSND1_WRAP(func) +#define ZSND2_WRAP(func) + +#include "ulp_wrappers_gen.h" + +float v_sincosf_sin(float x) { float32x4_t s, c; _ZGVnN4vl4l4_sincosf(vdupq_n_f32(x), &s, &c); return s[0]; } +float v_sincosf_cos(float x) { float32x4_t s, c; _ZGVnN4vl4l4_sincosf(vdupq_n_f32(x), &s, &c); return c[0]; } +float v_cexpif_sin(float x) { return _ZGVnN4v_cexpif(vdupq_n_f32(x)).val[0][0]; } +float v_cexpif_cos(float x) { return _ZGVnN4v_cexpif(vdupq_n_f32(x)).val[1][0]; } + +double v_sincos_sin(double x) { float64x2_t s, c; _ZGVnN2vl8l8_sincos(vdupq_n_f64(x), &s, &c); return s[0]; } +double v_sincos_cos(double x) { float64x2_t s, c; _ZGVnN2vl8l8_sincos(vdupq_n_f64(x), &s, &c); return c[0]; } +double v_cexpi_sin(double x) { return _ZGVnN2v_cexpi(vdupq_n_f64(x)).val[0][0]; } +double v_cexpi_cos(double x) { return _ZGVnN2v_cexpi(vdupq_n_f64(x)).val[1][0]; } + +#if WANT_SVE_MATH +static float Z_sv_powi(float x, float y) { return svretf(_ZGVsMxvv_powi(svargf(x), svdup_s32((int)round(y)), svptrue_b32())); } +static double Z_sv_powk(double x, double y) { return svretd(_ZGVsMxvv_powk(svargd(x), svdup_s64((long)round(y)), svptrue_b64())); } + +float sv_sincosf_sin(float x) { float s[svcntw()], c[svcntw()]; _ZGVsMxvl4l4_sincosf(svdup_f32(x), s, c, svptrue_b32()); return s[0]; } +float sv_sincosf_cos(float x) { float s[svcntw()], c[svcntw()]; _ZGVsMxvl4l4_sincosf(svdup_f32(x), s, c, svptrue_b32()); return c[0]; } +float sv_cexpif_sin(float x) { return svretf(svget2(_ZGVsMxv_cexpif(svdup_f32(x), svptrue_b32()), 0)); } +float sv_cexpif_cos(float x) { return svretf(svget2(_ZGVsMxv_cexpif(svdup_f32(x), svptrue_b32()), 1)); } + +double sv_sincos_sin(double x) { double s[svcntd()], c[svcntd()]; _ZGVsMxvl8l8_sincos(svdup_f64(x), s, c, svptrue_b64()); return s[0]; } +double sv_sincos_cos(double x) { double s[svcntd()], c[svcntd()]; _ZGVsMxvl8l8_sincos(svdup_f64(x), s, c, svptrue_b64()); return c[0]; } +double sv_cexpi_sin(double x) { return svretd(svget2(_ZGVsMxv_cexpi(svdup_f64(x), svptrue_b64()), 0)); } +double sv_cexpi_cos(double x) { return svretd(svget2(_ZGVsMxv_cexpi(svdup_f64(x), svptrue_b64()), 1)); } + +#endif +// clang-format on diff --git a/contrib/arm-optimized-routines/pl/math/tools/asin.sollya b/contrib/arm-optimized-routines/pl/math/tools/asin.sollya new file mode 100644 index 000000000000..8ef861d0898b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/asin.sollya @@ -0,0 +1,29 @@ +// polynomial for approximating asin(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +f = asin(x); +dtype = double; + +prec=256; + +a = 0x1p-106; +b = 0.25; + +deg = 11; + +backward = proc(poly, d) { + return d + d ^ 3 * poly(d * d); +}; + +forward = proc(f, d) { + return (f(sqrt(d))-sqrt(d))/(d*sqrt(d)); +}; + +poly = fpminimax(forward(f, x), [|0,...,deg|], [|dtype ...|], [a;b], relative, floating); + +display = hexadecimal!; +print("rel error:", dirtyinfnorm(1-backward(poly, x)/f(x), [a;b])); +print("in [", a, b, "]"); +for i from 0 to deg do print(coeff(poly, i)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/asinf.sollya b/contrib/arm-optimized-routines/pl/math/tools/asinf.sollya new file mode 100644 index 000000000000..5b627e546c73 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/asinf.sollya @@ -0,0 +1,36 @@ +// polynomial for approximating asinf(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +f = asin(x); +dtype = single; + +a = 0x1p-24; +b = 0.25; + +deg = 4; + +backward = proc(poly, d) { + return d + d ^ 3 * poly(d * d); +}; + +forward = proc(f, d) { + return (f(sqrt(d))-sqrt(d))/(d*sqrt(d)); +}; + +approx = proc(poly, d) { + return remez(1 - poly(x) / forward(f, x), deg - d, [a;b], x^d/forward(f, x), 1e-16); +}; + +poly = 0; +for i from 0 to deg do { + i; + p = roundcoefficients(approx(poly,i), [|dtype ...|]); + poly = poly + x^i*coeff(p,0); +}; + +display = hexadecimal!; +print("rel error:", accurateinfnorm(1-backward(poly, x)/f(x), [a;b], 30)); +print("in [", a, b, "]"); +for i from 0 to deg do print(coeff(poly, i)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/asinh.sollya b/contrib/arm-optimized-routines/pl/math/tools/asinh.sollya new file mode 100644 index 000000000000..663ee92f3f34 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/asinh.sollya @@ -0,0 +1,28 @@ +// polynomial for approximating asinh(x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// Polynomial is used in [2^-26, 1]. However it is least accurate close to 1, so +// we use 2^-6 as the lower bound for coeff generation, which yields sufficiently +// accurate results in [2^-26, 2^-6]. +a = 0x1p-6; +b = 1.0; + +f = (asinh(sqrt(x)) - sqrt(x))/x^(3/2); + +approx = proc(poly, d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +poly = 0; +for i from 0 to deg do { + i; + p = roundcoefficients(approx(poly,i), [|D ...|]); + poly = poly + x^i*coeff(p,0); +}; + + +display = hexadecimal; +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/asinhf.sollya b/contrib/arm-optimized-routines/pl/math/tools/asinhf.sollya new file mode 100644 index 000000000000..ab115b53b8dc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/asinhf.sollya @@ -0,0 +1,29 @@ +// polynomial for approximating asinh(x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 9; + +a = 0x1.0p-12; +b = 1.0; + +f = proc(y) { + return asinh(x); +}; + +approx = proc(poly, d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +poly = x; +for i from 2 to deg do { + p = roundcoefficients(approx(poly,i), [|SG ...|]); + poly = poly + x^i*coeff(p,0); +}; + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 2 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/atan.sollya b/contrib/arm-optimized-routines/pl/math/tools/atan.sollya new file mode 100644 index 000000000000..ad4f33b8516a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/atan.sollya @@ -0,0 +1,23 @@ +// polynomial for approximating atan(x) and atan2(y, x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// atan is odd, so approximate with an odd polynomial: +// x + ax^3 + bx^5 + cx^7 + ... +// We generate a, b, c, ... such that we can approximate atan(x) by: +// x + x^3 * (a + bx^2 + cx^4 + ...) + +// Assemble monomials +deg = 20; +mons = [|1,...,deg|]; +for i from 0 to deg-1 do mons[i] = mons[i] * 2 + 1; + +a = 0x1.0p-1022; +b = 1; + +poly = fpminimax(atan(x)-x, mons, [|double ...|], [a;b]); + +display = hexadecimal; +print("coeffs:"); +for i from 0 to deg-1 do coeff(poly,mons[i]); diff --git a/contrib/arm-optimized-routines/pl/math/tools/atanf.sollya b/contrib/arm-optimized-routines/pl/math/tools/atanf.sollya new file mode 100644 index 000000000000..ed88d0ba90f9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/atanf.sollya @@ -0,0 +1,20 @@ +// polynomial for approximating atanf(x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// Generate list of monomials: +// Taylor series of atan is of the form x + ax^3 + bx^5 + cx^7 + ... +// So generate a, b, c, ... such that we can approximate atan(x) by: +// x + x^3 * (a + bx^2 + cx^4 + ...) + +deg = 7; + +a = 1.1754943508222875e-38; +b = 1; + +poly = fpminimax((atan(sqrt(x))-sqrt(x))/x^(3/2), deg, [|single ...|], [a;b]); + +display = hexadecimal; +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/cbrt.sollya b/contrib/arm-optimized-routines/pl/math/tools/cbrt.sollya new file mode 100644 index 000000000000..1d43dc73d8cd --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/cbrt.sollya @@ -0,0 +1,20 @@ +// polynomial for approximating cbrt(x) in double precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 3; + +a = 0.5; +b = 1; + + +f = x^(1/3); + +poly = fpminimax(f, deg, [|double ...|], [a;b]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do round(coeff(poly,i), D, RN); diff --git a/contrib/arm-optimized-routines/pl/math/tools/cbrtf.sollya b/contrib/arm-optimized-routines/pl/math/tools/cbrtf.sollya new file mode 100644 index 000000000000..4e0cc69b46a5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/cbrtf.sollya @@ -0,0 +1,20 @@ +// polynomial for approximating cbrt(x) in single precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 3; + +a = 0.5; +b = 1; + + +f = x^(1/3); + +poly = fpminimax(f, deg, [|single ...|], [a;b]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do round(coeff(poly,i), SG, RN); diff --git a/contrib/arm-optimized-routines/pl/math/tools/erf.sollya b/contrib/arm-optimized-routines/pl/math/tools/erf.sollya new file mode 100644 index 000000000000..b2fc559b511e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/erf.sollya @@ -0,0 +1,25 @@ +// tables and constants for approximating erf(x). +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +display = hexadecimal; +prec=128; + +// Tables +print("{ i, r, erf(r), 2/sqrt(pi) * exp(-r^2)}"); +for i from 0 to 768 do { + r = i / 128; + t0 = double(erf(r)); + t1 = double(2/sqrt(pi) * exp(-r * r)); + print("{ " @ i @ ",\t" @ r @ ",\t" @ t0 @ ",\t" @ t1 @ " },"); +}; + +// Constants +double(1/3); +double(1/10); +double(2/15); +double(2/9); +double(2/45); +double(2/sqrt(pi)); + diff --git a/contrib/arm-optimized-routines/pl/math/tools/erfc.sollya b/contrib/arm-optimized-routines/pl/math/tools/erfc.sollya new file mode 100644 index 000000000000..1e2791291ebb --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/erfc.sollya @@ -0,0 +1,51 @@ +// tables and constants for approximating erfc(x). +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +display = hexadecimal; +prec=128; + +// Tables +print("{ i, r, erfc(r), 2/sqrt(pi) * exp(-r^2) }"); +for i from 0 to 3787 do { + r = 0.0 + i / 128; + t0 = double(erfc(r) * 2^128); + t1 = double(2/sqrt(pi) * exp(-r * r) * 2^128); + print("{ " @ t0 @ ",\t" @ t1 @ " },"); +}; + +// Constants +print("> 2/sqrt(pi)"); +double(2/sqrt(pi)); + +print("> 1/3"); +double(1/3); + +print("> P5"); +double(2/15); +double(1/10); +double(2/9); +double(2/45); + +print("> P6"); +double(1/42); +double(1/7); +double(2/21); +double(4/315); + +print("> Q"); +double( 5.0 / 4.0); +double( 6.0 / 5.0); +double( 7.0 / 6.0); +double( 8.0 / 7.0); +double( 9.0 / 8.0); +double(10.0 / 9.0); + +print("> R"); +double(-2.0 * 4.0 / (5.0 * 6.0)); +double(-2.0 * 5.0 / (6.0 * 7.0)); +double(-2.0 * 6.0 / (7.0 * 8.0)); +double(-2.0 * 7.0 / (8.0 * 9.0)); +double(-2.0 * 8.0 / (9.0 * 10.0)); +double(-2.0 * 9.0 / (10.0 * 11.0)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/erfcf.sollya b/contrib/arm-optimized-routines/pl/math/tools/erfcf.sollya new file mode 100644 index 000000000000..1d7fc264d99d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/erfcf.sollya @@ -0,0 +1,22 @@ +// tables and constants for approximating erfcf(x). +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +display = hexadecimal; +prec=128; + +// Tables +print("{ i, r, erfc(r), 2/sqrt(pi) * exp(-r^2) }"); +for i from 0 to 644 do { + r = 0.0 + i / 64; + t0 = single(erfc(r) * 2^47); + t1 = single(2/sqrt(pi) * exp(-r * r) * 2^47); + print("{ " @ t0 @ ",\t" @ t1 @ " },"); +}; + +// Constants +single(1/3); +single(2/15); +single(1/10); +single(2/sqrt(pi)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/erff.sollya b/contrib/arm-optimized-routines/pl/math/tools/erff.sollya new file mode 100644 index 000000000000..59b23ef021f0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/erff.sollya @@ -0,0 +1,20 @@ +// tables and constants for approximating erff(x). +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +display = hexadecimal; +prec=128; + +// Tables +print("{ i, r, erf(r), 2/sqrt(pi) * exp(-r^2)}"); +for i from 0 to 512 do { + r = i / 128; + t0 = single(erf(r)); + t1 = single(2/sqrt(pi) * exp(-r * r)); + print("{ " @ i @ ",\t" @ r @ ",\t" @ t0 @ ",\t" @ t1 @ " },"); +}; + +// Constants +single(1/3); +single(2/sqrt(pi)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/exp10.sollya b/contrib/arm-optimized-routines/pl/math/tools/exp10.sollya new file mode 100644 index 000000000000..9f30b4018209 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/exp10.sollya @@ -0,0 +1,55 @@ +// polynomial for approximating 10^x +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// exp10f parameters +deg = 5; // poly degree +N = 1; // Neon 1, SVE 64 +b = log(2)/(2 * N * log(10)); // interval +a = -b; +wp = single; + +// exp10 parameters +//deg = 4; // poly degree - bump to 5 for ~1 ULP +//N = 128; // table size +//b = log(2)/(2 * N * log(10)); // interval +//a = -b; +//wp = D; + + +// find polynomial with minimal relative error + +f = 10^x; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; +// return p that minimizes |f(x) - poly(x) - x^d*p(x)| +approx_abs = proc(poly,d) { + return remez(f(x) - poly(x), deg-d, [a;b], x^d, 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = 1; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|wp ...|]); +// p = roundcoefficients(approx_abs(poly,i), [|wp ...|]); + poly = poly + x^i*coeff(p,0); +}; + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/10^x, [a;b], 30)); +print("abs error:", accurateinfnorm(10^x-poly(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); + +log10_2 = round(N * log(10) / log(2), wp, RN); +log2_10 = log(2) / (N * log(10)); +log2_10_hi = round(log2_10, wp, RN); +log2_10_lo = round(log2_10 - log2_10_hi, wp, RN); +print(log10_2); +print(log2_10_hi); +print(log2_10_lo); diff --git a/contrib/arm-optimized-routines/pl/math/tools/expm1.sollya b/contrib/arm-optimized-routines/pl/math/tools/expm1.sollya new file mode 100644 index 000000000000..7b6f324eb247 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/expm1.sollya @@ -0,0 +1,21 @@ +// polynomial for approximating exp(x)-1 in double precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 12; + +a = -log(2)/2; +b = log(2)/2; + +f = proc(y) { + return exp(y)-1; +}; + +poly = fpminimax(f(x), deg, [|double ...|], [a;b]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 2 to deg do round(coeff(poly,i), D, RN); diff --git a/contrib/arm-optimized-routines/pl/math/tools/expm1f.sollya b/contrib/arm-optimized-routines/pl/math/tools/expm1f.sollya new file mode 100644 index 000000000000..efdf1bd301e0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/expm1f.sollya @@ -0,0 +1,21 @@ +// polynomial for approximating exp(x)-1 in single precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 5; + +a = -log(2)/2; +b = log(2)/2; + +f = proc(y) { + return exp(y)-1; +}; + +poly = fpminimax(f(x), deg, [|single ...|], [a;b]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 2 to deg do round(coeff(poly,i), SG, RN); diff --git a/contrib/arm-optimized-routines/pl/math/tools/log10.sollya b/contrib/arm-optimized-routines/pl/math/tools/log10.sollya new file mode 100644 index 000000000000..85d1d15c1698 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/log10.sollya @@ -0,0 +1,44 @@ +// polynomial for approximating log10(1+x) +// +// Copyright (c) 2019-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 6; // poly degree +// |log10(1+x)| > 0x1p-5 outside the interval +a = -0x1.p-5; +b = 0x1.p-5; + +ln10 = evaluate(log(10),0); +invln10hi = double(1/ln10 + 0x1p21) - 0x1p21; // round away last 21 bits +invln10lo = double(1/ln10 - invln10hi); + +// find log10(1+x)/x polynomial with minimal relative error +// (minimal relative error polynomial for log10(1+x) is the same * x) +deg = deg-1; // because of /x + +// f = log(1+x)/x; using taylor series +f = 0; +for i from 0 to 60 do { f = f + (-x)^i/(i+1); }; +f = f/ln10; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = invln10hi + invln10lo; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|D ...|]); + poly = poly + x^i*coeff(p,0); +}; +display = hexadecimal; +print("invln10hi:", invln10hi); +print("invln10lo:", invln10lo); +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); + +display = decimal; +print("in [",a,b,"]"); diff --git a/contrib/arm-optimized-routines/pl/math/tools/log10f.sollya b/contrib/arm-optimized-routines/pl/math/tools/log10f.sollya new file mode 100644 index 000000000000..94bf32f2c449 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/log10f.sollya @@ -0,0 +1,37 @@ +// polynomial for approximating log10f(1+x) +// +// Copyright (c) 2019-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// Computation of log10f(1+x) will be carried out in double precision + +deg = 4; // poly degree +// [OFF; 2*OFF] is divided in 2^4 intervals with OFF~0.7 +a = -0.04375; +b = 0.04375; + +// find log(1+x)/x polynomial with minimal relative error +// (minimal relative error polynomial for log(1+x) is the same * x) +deg = deg-1; // because of /x + +// f = log(1+x)/x; using taylor series +f = 0; +for i from 0 to 60 do { f = f + (-x)^i/(i+1); }; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = 1; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|D ...|]); + poly = poly + x^i*coeff(p,0); +}; + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do double(coeff(poly,i)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/log1p.sollya b/contrib/arm-optimized-routines/pl/math/tools/log1p.sollya new file mode 100644 index 000000000000..598a36af0339 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/log1p.sollya @@ -0,0 +1,30 @@ +// polynomial for approximating log(1+x) in double precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 20; + +a = sqrt(2)/2-1; +b = sqrt(2)-1; + +f = proc(y) { + return log(1+y); +}; + +approx = proc(poly, d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +poly = x; +for i from 2 to deg do { + p = roundcoefficients(approx(poly,i), [|D ...|]); + poly = poly + x^i*coeff(p,0); +}; + + +print("coeffs:"); +display = hexadecimal; +for i from 2 to deg do coeff(poly,i); +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); diff --git a/contrib/arm-optimized-routines/pl/math/tools/log1pf.sollya b/contrib/arm-optimized-routines/pl/math/tools/log1pf.sollya new file mode 100644 index 000000000000..cc1db10e4c0c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/log1pf.sollya @@ -0,0 +1,21 @@ +// polynomial for approximating log(1+x) in single precision +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 10; + +a = -0.25; +b = 0.5; + +f = proc(y) { + return log(1+y); +}; + +poly = fpminimax(f(x), deg, [|single ...|], [a;b]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 2 to deg do round(coeff(poly,i), SG, RN); diff --git a/contrib/arm-optimized-routines/pl/math/tools/sincos.sollya b/contrib/arm-optimized-routines/pl/math/tools/sincos.sollya new file mode 100644 index 000000000000..7d36266b446b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/sincos.sollya @@ -0,0 +1,33 @@ +// polynomial for approximating cos(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// This script only finds the coeffs for cos - see math/aarch64/v_sin.c for sin coeffs + +deg = 14; // polynomial degree +a = -pi/4; // interval +b = pi/4; + +// find even polynomial with minimal abs error compared to cos(x) + +f = cos(x); + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)| +approx = proc(poly,d) { + return remez(f(x)-poly(x), deg-d, [a;b], x^d, 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = 1; +for i from 1 to deg/2 do { + p = roundcoefficients(approx(poly,2*i), [|double ...|]); + poly = poly + x^(2*i)*coeff(p,0); +}; + +display = hexadecimal; +//print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +//print("abs error:", accurateinfnorm(f(x)-poly(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/sincosf.sollya b/contrib/arm-optimized-routines/pl/math/tools/sincosf.sollya new file mode 100644 index 000000000000..178ee83ac196 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/sincosf.sollya @@ -0,0 +1,33 @@ +// polynomial for approximating cos(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +// This script only finds the coeffs for cos - see math/tools/sin.sollya for sin coeffs. + +deg = 8; // polynomial degree +a = -pi/4; // interval +b = pi/4; + +// find even polynomial with minimal abs error compared to cos(x) + +f = cos(x); + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)| +approx = proc(poly,d) { + return remez(f(x)-poly(x), deg-d, [a;b], x^d, 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = 1; +for i from 1 to deg/2 do { + p = roundcoefficients(approx(poly,2*i), [|single ...|]); + poly = poly + x^(2*i)*coeff(p,0); +}; + +display = hexadecimal; +//print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +//print("abs error:", accurateinfnorm(f(x)-poly(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/sinpi.sollya b/contrib/arm-optimized-routines/pl/math/tools/sinpi.sollya new file mode 100644 index 000000000000..62cc87e7697d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/sinpi.sollya @@ -0,0 +1,33 @@ +// polynomial for approximating sinpi(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 19; // polynomial degree +a = -1/2; // interval +b = 1/2; + +// find even polynomial with minimal abs error compared to sinpi(x) + +// f = sin(pi* x); +f = pi*x; +c = 1; +for i from 1 to 80 do { c = 2*i*(2*i + 1)*c; f = f + (-1)^i*(pi*x)^(2*i+1)/c; }; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)| +approx = proc(poly,d) { + return remez(f(x)-poly(x), deg-d, [a;b], x^d, 1e-10); +}; + +// first coeff is predefine, iteratively find optimal double prec coeffs +poly = pi*x; +for i from 0 to (deg-1)/2 do { + p = roundcoefficients(approx(poly,2*i+1), [|D ...|]); + poly = poly + x^(2*i+1)*coeff(p,0); +}; + +display = hexadecimal; +print("abs error:", accurateinfnorm(sin(pi*x)-poly(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/tan.sollya b/contrib/arm-optimized-routines/pl/math/tools/tan.sollya new file mode 100644 index 000000000000..bb0bb28270e3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/tan.sollya @@ -0,0 +1,20 @@ +// polynomial for approximating double precision tan(x) +// +// Copyright (c) 2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 8; + +// interval bounds +a = 0x1.0p-126; +b = pi / 8; + +display = hexadecimal; + +f = (tan(sqrt(x))-sqrt(x))/x^(3/2); +poly = fpminimax(f, deg, [|double ...|], [a*a;b*b]); + +//print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/tanf.sollya b/contrib/arm-optimized-routines/pl/math/tools/tanf.sollya new file mode 100644 index 000000000000..f4b49b40ae64 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/tanf.sollya @@ -0,0 +1,78 @@ +// polynomial for approximating single precision tan(x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +dtype = single; + +mthd = 0; // approximate tan +deg = 5; // poly degree + +// // Uncomment for cotan +// mthd = 1; // approximate cotan +// deg = 3; // poly degree + +// interval bounds +a = 0x1.0p-126; +b = pi / 4; + +print("Print some useful constants"); +display = hexadecimal!; +if (dtype==double) then { prec = 53!; } +else if (dtype==single) then { prec = 23!; }; + +print("pi/4"); +pi/4; + +// Setup precisions (display and computation) +display = decimal!; +prec=128!; +save_prec=prec; + +// +// Select function to approximate with Sollya +// +if(mthd==0) then { + s = "x + x^3 * P(x^2)"; + g = tan(x); + F = proc(P) { return x + x^3 * P(x^2); }; + f = (g(sqrt(x))-sqrt(x))/(x*sqrt(x)); + init_poly = 0; + // Display info + print("Approximate g(x) =", g, "as F(x)=", s, "."); + poly = fpminimax(f, deg, [|dtype ...|], [a*a;b*b]); +} +else if (mthd==1) then { + s = "1/x + x * P(x^2)"; + g = 1 / tan(x); + F = proc(P) { return 1/x + x * P(x^2); }; + f = (g(sqrt(x))-1/sqrt(x))/(sqrt(x)); + init_poly = 0; + deg_init_poly = -1; // a value such that we actually start by building constant coefficient + // Display info + print("Approximate g(x) =", g, "as F(x)=", s, "."); + // Fpminimax used to minimise absolute error + approx_fpminimax = proc(func, poly, d) { + return fpminimax(func - poly / x^-(deg-d), 0, [|dtype|], [a;b], absolute, floating); + }; + // Optimise all coefficients at once + poly = fpminimax(f, [|0,...,deg|], [|dtype ...|], [a;b], absolute, floating); +}; + + +// +// Display coefficients in Sollya +// +display = hexadecimal!; +if (dtype==double) then { prec = 53!; } +else if (dtype==single) then { prec = 23!; }; +print("_coeffs :_ hex"); +for i from 0 to deg do coeff(poly, i); + +// Compute errors +display = hexadecimal!; +d_rel_err = dirtyinfnorm(1-F(poly)/g(x), [a;b]); +d_abs_err = dirtyinfnorm(g(x)-F(poly), [a;b]); +print("dirty rel error:", d_rel_err); +print("dirty abs error:", d_abs_err); +print("in [",a,b,"]"); diff --git a/contrib/arm-optimized-routines/pl/math/tools/v_erf.sollya b/contrib/arm-optimized-routines/pl/math/tools/v_erf.sollya new file mode 100644 index 000000000000..394ba377df12 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/v_erf.sollya @@ -0,0 +1,20 @@ +// polynomial for approximating erf(x). +// To generate coefficients for interval i (0 to 47) do: +// $ sollya v_erf.sollya $i +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +scale = 1/8; +deg = 9; + +itv = parse(__argv[0]); +if (itv == 0) then { a = 0x1p-1022; } +else { a = itv * scale; }; + +prec=256; + +poly = fpminimax(erf(scale*x+a), deg, [|D ...|], [0; 1]); + +display = hexadecimal; +for i from 0 to deg do coeff(poly, i);
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/tools/v_erfc.sollya b/contrib/arm-optimized-routines/pl/math/tools/v_erfc.sollya new file mode 100644 index 000000000000..3b03ba07863d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/v_erfc.sollya @@ -0,0 +1,46 @@ +// polynomial for approximating erfc(x)*exp(x*x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 12; // poly degree + +itv = parse(__argv[0]); + +bounds = [|3.725290298461914e-9, + 0.18920711500272103, + 0.41421356237309515, + 0.681792830507429, + 1, + 1.378414230005442, + 1.8284271247461903, + 2.363585661014858, + 3, + 3.756828460010884, + 4.656854249492381, + 5.727171322029716, + 7, + 8.513656920021768, + 10.313708498984761, + 12.454342644059432, + 15, + 18.027313840043536, + 21.627416997969522, + 25.908685288118864, + 31|]; + +a = bounds[itv]; +b = bounds[itv + 1]; + +f = proc(y) { + t = y + a; + return erfc(t) * exp(t*t); +}; + +poly = fpminimax(f(x), deg, [|double ...|], [0;b-a]); + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly, i); diff --git a/contrib/arm-optimized-routines/pl/math/tools/v_log10.sollya b/contrib/arm-optimized-routines/pl/math/tools/v_log10.sollya new file mode 100644 index 000000000000..e2df4364ada0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/v_log10.sollya @@ -0,0 +1,38 @@ +// polynomial used for __v_log10(x) +// +// Copyright (c) 2019-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 6; // poly degree +a = -0x1.fc1p-9; +b = 0x1.009p-8; + +// find log(1+x)/x polynomial with minimal relative error +// (minimal relative error polynomial for log(1+x) is the same * x) +deg = deg-1; // because of /x + +// f = log(1+x)/x; using taylor series +f = 0; +for i from 0 to 60 do { f = f + (-x)^i/(i+1); }; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = 1; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|D ...|]); + poly = poly + x^i*coeff(p,0); +}; + +// scale coefficients by 1/ln(10) +ln10 = evaluate(log(10),0); +poly = poly/ln10; + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do double(coeff(poly,i)); diff --git a/contrib/arm-optimized-routines/pl/math/tools/v_log10f.sollya b/contrib/arm-optimized-routines/pl/math/tools/v_log10f.sollya new file mode 100644 index 000000000000..396d5a92302b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/v_log10f.sollya @@ -0,0 +1,45 @@ +// polynomial for approximating v_log10f(1+x) +// +// Copyright (c) 2019-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 9; // poly degree +// |log10(1+x)| > 0x1p-4 outside the interval +a = -1/3; +b = 1/3; + +display = hexadecimal; +print("log10(2) = ", single(log10(2))); + +ln10 = evaluate(log(10),0); +invln10 = single(1/ln10); + +// find log10(1+x)/x polynomial with minimal relative error +// (minimal relative error polynomial for log10(1+x) is the same * x) +deg = deg-1; // because of /x + +// f = log(1+x)/x; using taylor series +f = 0; +for i from 0 to 60 do { f = f + (-x)^i/(i+1); }; +f = f/ln10; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = invln10; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|SG ...|]); + poly = poly + x^i*coeff(p,0); +}; +display = hexadecimal; +print("invln10:", invln10); +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do single(coeff(poly,i)); + +display = decimal; +print("in [",a,b,"]"); diff --git a/contrib/arm-optimized-routines/pl/math/tools/v_log2f.sollya b/contrib/arm-optimized-routines/pl/math/tools/v_log2f.sollya new file mode 100644 index 000000000000..99e050c91b03 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/tools/v_log2f.sollya @@ -0,0 +1,38 @@ +// polynomial used for __v_log2f(x) +// +// Copyright (c) 2022-2023, Arm Limited. +// SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + +deg = 9; // poly degree +a = -1/3; +b = 1/3; + +ln2 = evaluate(log(2),0); +invln2 = single(1/ln2); + +// find log2(1+x)/x polynomial with minimal relative error +// (minimal relative error polynomial for log2(1+x) is the same * x) +deg = deg-1; // because of /x + +// f = log2(1+x)/x; using taylor series +f = 0; +for i from 0 to 60 do { f = f + (-x)^i/(i+1); }; +f = f * invln2; + +// return p that minimizes |f(x) - poly(x) - x^d*p(x)|/|f(x)| +approx = proc(poly,d) { + return remez(1 - poly(x)/f(x), deg-d, [a;b], x^d/f(x), 1e-10); +}; + +// first coeff is fixed, iteratively find optimal double prec coeffs +poly = invln2; +for i from 1 to deg do { + p = roundcoefficients(approx(poly,i), [|SG ...|]); + poly = poly + x^i*coeff(p,0); +}; + +display = hexadecimal; +print("rel error:", accurateinfnorm(1-poly(x)/f(x), [a;b], 30)); +print("in [",a,b,"]"); +print("coeffs:"); +for i from 0 to deg do coeff(poly,i); diff --git a/contrib/arm-optimized-routines/pl/math/trigpi_references.c b/contrib/arm-optimized-routines/pl/math/trigpi_references.c new file mode 100644 index 000000000000..4b0514b6766a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/trigpi_references.c @@ -0,0 +1,57 @@ +/* + * Extended precision scalar reference functions for trigpi. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#define _GNU_SOURCE +#include "math_config.h" +#include "mathlib.h" + +long double +sinpil (long double x) +{ + /* sin(inf) should return nan, as defined by C23. */ + if (isinf (x)) + return __math_invalid (x); + + long double ax = fabsl (x); + + /* Return 0 for all values above 2^64 to prevent + overflow when casting to uint64_t. */ + if (ax >= 0x1p64) + return 0; + + /* All integer cases should return 0. */ + if (ax == (uint64_t) ax) + return 0; + + return sinl (x * M_PIl); +} + +long double +cospil (long double x) +{ + /* cos(inf) should return nan, as defined by C23. */ + if (isinf (x)) + return __math_invalid (x); + + long double ax = fabsl (x); + + if (ax >= 0x1p64) + return 1; + + uint64_t m = (uint64_t) ax; + + /* Integer values of cospi(x) should return +/-1. + The sign depends on if x is odd or even. */ + if (m == ax) + return (m & 1) ? -1 : 1; + + /* Values of Integer + 0.5 should always return 0. */ + if (ax - 0.5 == m || ax + 0.5 == m) + return 0; + + return cosl (ax * M_PIl); +}
\ No newline at end of file diff --git a/contrib/arm-optimized-routines/pl/math/v_acos_2u.c b/contrib/arm-optimized-routines/pl/math/v_acos_2u.c new file mode 100644 index 000000000000..581f8506c0d6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_acos_2u.c @@ -0,0 +1,122 @@ +/* + * Double-precision vector acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[12]; + float64x2_t pi, pi_over_2; + uint64x2_t abs_mask; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) + on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57. */ + .poly = { V2 (0x1.555555555554ep-3), V2 (0x1.3333333337233p-4), + V2 (0x1.6db6db67f6d9fp-5), V2 (0x1.f1c71fbd29fbbp-6), + V2 (0x1.6e8b264d467d6p-6), V2 (0x1.1c5997c357e9dp-6), + V2 (0x1.c86a22cd9389dp-7), V2 (0x1.856073c22ebbep-7), + V2 (0x1.fd1151acb6bedp-8), V2 (0x1.087182f799c1dp-6), + V2 (-0x1.6602748120927p-7), V2 (0x1.cfa0dd1f9478p-6), }, + .pi = V2 (0x1.921fb54442d18p+1), + .pi_over_2 = V2 (0x1.921fb54442d18p+0), + .abs_mask = V2 (0x7fffffffffffffff), +}; + +#define AllMask v_u64 (0xffffffffffffffff) +#define Oneu (0x3ff0000000000000) +#define Small (0x3e50000000000000) /* 2^-53. */ + +#if WANT_SIMD_EXCEPT +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (acos, x, y, special); +} +#endif + +/* Double-precision implementation of vector acos(x). + + For |x| < Small, approximate acos(x) by pi/2 - x. Small = 2^-53 for correct + rounding. + If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the following + approximation. + + For |x| in [Small, 0.5], use an order 11 polynomial P such that the final + approximation of asin is an odd polynomial: + + acos(x) ~ pi/2 - (x + x^3 P(x^2)). + + The largest observed error in this region is 1.18 ulps, + _ZGVnN2v_acos (0x1.fbab0a7c460f6p-2) got 0x1.0d54d1985c068p+0 + want 0x1.0d54d1985c069p+0. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + acos(x) = y + y * z * P(z), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 1.52 ulps, + _ZGVnN2v_acos (0x1.23d362722f591p-1) got 0x1.edbbedf8a7d6ep-1 + want 0x1.edbbedf8a7d6cp-1. */ +float64x2_t VPCS_ATTR V_NAME_D1 (acos) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + +#if WANT_SIMD_EXCEPT + /* A single comparison for One, Small and QNaN. */ + uint64x2_t special + = vcgtq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (ax), v_u64 (Small)), + v_u64 (Oneu - Small)); + if (unlikely (v_any_u64 (special))) + return special_case (x, x, AllMask); +#endif + + uint64x2_t a_le_half = vcleq_f64 (ax, v_f64 (0.5)); + + /* Evaluate polynomial Q(x) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + float64x2_t z2 = vbslq_f64 (a_le_half, vmulq_f64 (x, x), + vfmaq_f64 (v_f64 (0.5), v_f64 (-0.5), ax)); + float64x2_t z = vbslq_f64 (a_le_half, ax, vsqrtq_f64 (z2)); + + /* Use a single polynomial approximation P for both intervals. */ + float64x2_t z4 = vmulq_f64 (z2, z2); + float64x2_t z8 = vmulq_f64 (z4, z4); + float64x2_t z16 = vmulq_f64 (z8, z8); + float64x2_t p = v_estrin_11_f64 (z2, z4, z8, z16, d->poly); + + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = vfmaq_f64 (z, vmulq_f64 (z, z2), p); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = 2 Q(|x|) , for 0.5 < x < 1.0 + = pi - 2 Q(|x|) , for -1.0 < x < -0.5. */ + float64x2_t y = vbslq_f64 (d->abs_mask, p, x); + + uint64x2_t is_neg = vcltzq_f64 (x); + float64x2_t off = vreinterpretq_f64_u64 ( + vandq_u64 (is_neg, vreinterpretq_u64_f64 (d->pi))); + float64x2_t mul = vbslq_f64 (a_le_half, v_f64 (-1.0), v_f64 (2.0)); + float64x2_t add = vbslq_f64 (a_le_half, d->pi_over_2, off); + + return vfmaq_f64 (add, mul, y); +} + +PL_SIG (V, D, 1, acos, -1.0, 1.0) +PL_TEST_ULP (V_NAME_D1 (acos), 1.02) +PL_TEST_EXPECT_FENV (V_NAME_D1 (acos), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_D1 (acos), 0, Small, 5000) +PL_TEST_INTERVAL (V_NAME_D1 (acos), Small, 0.5, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (acos), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (acos), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (acos), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (V_NAME_D1 (acos), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/v_acosf_1u4.c b/contrib/arm-optimized-routines/pl/math/v_acosf_1u4.c new file mode 100644 index 000000000000..bb17b1df18f3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_acosf_1u4.c @@ -0,0 +1,113 @@ +/* + * Single-precision vector acos(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[5]; + float32x4_t pi_over_2f, pif; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on + [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */ + .poly = { V4 (0x1.55555ep-3), V4 (0x1.33261ap-4), V4 (0x1.70d7dcp-5), + V4 (0x1.b059dp-6), V4 (0x1.3af7d8p-5) }, + .pi_over_2f = V4 (0x1.921fb6p+0f), + .pif = V4 (0x1.921fb6p+1f), +}; + +#define AbsMask 0x7fffffff +#define Half 0x3f000000 +#define One 0x3f800000 +#define Small 0x32800000 /* 2^-26. */ + +#if WANT_SIMD_EXCEPT +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (acosf, x, y, special); +} +#endif + +/* Single-precision implementation of vector acos(x). + + For |x| < Small, approximate acos(x) by pi/2 - x. Small = 2^-26 for correct + rounding. + If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the following + approximation. + + For |x| in [Small, 0.5], use order 4 polynomial P such that the final + approximation of asin is an odd polynomial: + + acos(x) ~ pi/2 - (x + x^3 P(x^2)). + + The largest observed error in this region is 1.26 ulps, + _ZGVnN4v_acosf (0x1.843bfcp-2) got 0x1.2e934cp+0 want 0x1.2e934ap+0. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + acos(x) = y + y * z * P(z), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 1.32 ulps, + _ZGVnN4v_acosf (0x1.15ba56p-1) got 0x1.feb33p-1 + want 0x1.feb32ep-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (acos) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t ia = vandq_u32 (ix, v_u32 (AbsMask)); + +#if WANT_SIMD_EXCEPT + /* A single comparison for One, Small and QNaN. */ + uint32x4_t special + = vcgtq_u32 (vsubq_u32 (ia, v_u32 (Small)), v_u32 (One - Small)); + if (unlikely (v_any_u32 (special))) + return special_case (x, x, v_u32 (0xffffffff)); +#endif + + float32x4_t ax = vreinterpretq_f32_u32 (ia); + uint32x4_t a_le_half = vcleq_u32 (ia, v_u32 (Half)); + + /* Evaluate polynomial Q(x) = z + z * z2 * P(z2) with + z2 = x ^ 2 and z = |x| , if |x| < 0.5 + z2 = (1 - |x|) / 2 and z = sqrt(z2), if |x| >= 0.5. */ + float32x4_t z2 = vbslq_f32 (a_le_half, vmulq_f32 (x, x), + vfmsq_n_f32 (v_f32 (0.5), ax, 0.5)); + float32x4_t z = vbslq_f32 (a_le_half, ax, vsqrtq_f32 (z2)); + + /* Use a single polynomial approximation P for both intervals. */ + float32x4_t p = v_horner_4_f32 (z2, d->poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = vfmaq_f32 (z, vmulq_f32 (z, z2), p); + + /* acos(|x|) = pi/2 - sign(x) * Q(|x|), for |x| < 0.5 + = 2 Q(|x|) , for 0.5 < x < 1.0 + = pi - 2 Q(|x|) , for -1.0 < x < -0.5. */ + float32x4_t y = vbslq_f32 (v_u32 (AbsMask), p, x); + + uint32x4_t is_neg = vcltzq_f32 (x); + float32x4_t off = vreinterpretq_f32_u32 ( + vandq_u32 (vreinterpretq_u32_f32 (d->pif), is_neg)); + float32x4_t mul = vbslq_f32 (a_le_half, v_f32 (-1.0), v_f32 (2.0)); + float32x4_t add = vbslq_f32 (a_le_half, d->pi_over_2f, off); + + return vfmaq_f32 (add, mul, y); +} + +PL_SIG (V, F, 1, acos, -1.0, 1.0) +PL_TEST_ULP (V_NAME_F1 (acos), 0.82) +PL_TEST_EXPECT_FENV (V_NAME_F1 (acos), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_F1 (acos), 0, 0x1p-26, 5000) +PL_TEST_INTERVAL (V_NAME_F1 (acos), 0x1p-26, 0.5, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (acos), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (acos), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (acos), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (V_NAME_F1 (acos), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/v_acosh_3u5.c b/contrib/arm-optimized-routines/pl/math/v_acosh_3u5.c new file mode 100644 index 000000000000..42fa2616d562 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_acosh_3u5.c @@ -0,0 +1,66 @@ +/* + * Single-precision vector acosh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define WANT_V_LOG1P_K0_SHORTCUT 1 +#include "v_log1p_inline.h" + +const static struct data +{ + struct v_log1p_data log1p_consts; + uint64x2_t one, thresh; +} data = { + .log1p_consts = V_LOG1P_CONSTANTS_TABLE, + .one = V2 (0x3ff0000000000000), + .thresh = V2 (0x1ff0000000000000) /* asuint64(0x1p511) - asuint64(1). */ +}; + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x, float64x2_t y, uint64x2_t special, + const struct v_log1p_data *d) +{ + return v_call_f64 (acosh, x, log1p_inline (y, d), special); +} + +/* Vector approximation for double-precision acosh, based on log1p. + The largest observed error is 3.02 ULP in the region where the + argument to log1p falls in the k=0 interval, i.e. x close to 1: + _ZGVnN2v_acosh(0x1.00798aaf80739p+0) got 0x1.f2d6d823bc9dfp-5 + want 0x1.f2d6d823bc9e2p-5. */ +VPCS_ATTR float64x2_t V_NAME_D1 (acosh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t special + = vcgeq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (x), d->one), d->thresh); + float64x2_t special_arg = x; + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u64 (special))) + x = vbslq_f64 (special, vreinterpretq_f64_u64 (d->one), x); +#endif + + float64x2_t xm1 = vsubq_f64 (x, v_f64 (1)); + float64x2_t y; + y = vaddq_f64 (x, v_f64 (1)); + y = vmulq_f64 (y, xm1); + y = vsqrtq_f64 (y); + y = vaddq_f64 (xm1, y); + + if (unlikely (v_any_u64 (special))) + return special_case (special_arg, y, special, &d->log1p_consts); + return log1p_inline (y, &d->log1p_consts); +} + +PL_SIG (V, D, 1, acosh, 1.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (acosh), 2.53) +PL_TEST_EXPECT_FENV (V_NAME_D1 (acosh), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_D1 (acosh), 1, 0x1p511, 90000) +PL_TEST_INTERVAL (V_NAME_D1 (acosh), 0x1p511, inf, 10000) +PL_TEST_INTERVAL (V_NAME_D1 (acosh), 0, 1, 1000) +PL_TEST_INTERVAL (V_NAME_D1 (acosh), -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_acoshf_3u1.c b/contrib/arm-optimized-routines/pl/math/v_acoshf_3u1.c new file mode 100644 index 000000000000..a2ff0f02635b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_acoshf_3u1.c @@ -0,0 +1,78 @@ +/* + * Single-precision vector acosh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "v_log1pf_inline.h" + +const static struct data +{ + struct v_log1pf_data log1pf_consts; + uint32x4_t one; + uint16x4_t thresh; +} data = { + .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE, + .one = V4 (0x3f800000), + .thresh = V4 (0x2000) /* asuint(0x1p64) - asuint(1). */ +}; + +#define SignMask 0x80000000 + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint16x4_t special, + const struct v_log1pf_data d) +{ + return v_call_f32 (acoshf, x, log1pf_inline (y, d), vmovl_u16 (special)); +} + +/* Vector approximation for single-precision acosh, based on log1p. Maximum + error depends on WANT_SIMD_EXCEPT. With SIMD fp exceptions enabled, it + is 2.78 ULP: + __v_acoshf(0x1.07887p+0) got 0x1.ef9e9cp-3 + want 0x1.ef9ea2p-3. + With exceptions disabled, we can compute u with a shorter dependency chain, + which gives maximum error of 3.07 ULP: + __v_acoshf(0x1.01f83ep+0) got 0x1.fbc7fap-4 + want 0x1.fbc7f4p-4. */ + +VPCS_ATTR float32x4_t V_NAME_F1 (acosh) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint16x4_t special = vcge_u16 (vsubhn_u32 (ix, d->one), d->thresh); + +#if WANT_SIMD_EXCEPT + /* Mask special lanes with 1 to side-step spurious invalid or overflow. Use + only xm1 to calculate u, as operating on x will trigger invalid for NaN. + Widening sign-extend special predicate in order to mask with it. */ + uint32x4_t p + = vreinterpretq_u32_s32 (vmovl_s16 (vreinterpret_s16_u16 (special))); + float32x4_t xm1 = v_zerofy_f32 (vsubq_f32 (x, v_f32 (1)), p); + float32x4_t u = vfmaq_f32 (vaddq_f32 (xm1, xm1), xm1, xm1); +#else + float32x4_t xm1 = vsubq_f32 (x, v_f32 (1)); + float32x4_t u = vmulq_f32 (xm1, vaddq_f32 (x, v_f32 (1.0f))); +#endif + + float32x4_t y = vaddq_f32 (xm1, vsqrtq_f32 (u)); + + if (unlikely (v_any_u16h (special))) + return special_case (x, y, special, d->log1pf_consts); + return log1pf_inline (y, d->log1pf_consts); +} + +PL_SIG (V, F, 1, acosh, 1.0, 10.0) +#if WANT_SIMD_EXCEPT +PL_TEST_ULP (V_NAME_F1 (acosh), 2.29) +#else +PL_TEST_ULP (V_NAME_F1 (acosh), 2.58) +#endif +PL_TEST_EXPECT_FENV (V_NAME_F1 (acosh), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_F1 (acosh), 0, 1, 500) +PL_TEST_INTERVAL (V_NAME_F1 (acosh), 1, SquareLim, 100000) +PL_TEST_INTERVAL (V_NAME_F1 (acosh), SquareLim, inf, 1000) +PL_TEST_INTERVAL (V_NAME_F1 (acosh), -0, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_asin_3u.c b/contrib/arm-optimized-routines/pl/math/v_asin_3u.c new file mode 100644 index 000000000000..756443c6b320 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_asin_3u.c @@ -0,0 +1,113 @@ +/* + * Double-precision vector asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[12]; + float64x2_t pi_over_2; + uint64x2_t abs_mask; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) + on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57. */ + .poly = { V2 (0x1.555555555554ep-3), V2 (0x1.3333333337233p-4), + V2 (0x1.6db6db67f6d9fp-5), V2 (0x1.f1c71fbd29fbbp-6), + V2 (0x1.6e8b264d467d6p-6), V2 (0x1.1c5997c357e9dp-6), + V2 (0x1.c86a22cd9389dp-7), V2 (0x1.856073c22ebbep-7), + V2 (0x1.fd1151acb6bedp-8), V2 (0x1.087182f799c1dp-6), + V2 (-0x1.6602748120927p-7), V2 (0x1.cfa0dd1f9478p-6), }, + .pi_over_2 = V2 (0x1.921fb54442d18p+0), + .abs_mask = V2 (0x7fffffffffffffff), +}; + +#define AllMask v_u64 (0xffffffffffffffff) +#define One (0x3ff0000000000000) +#define Small (0x3e50000000000000) /* 2^-12. */ + +#if WANT_SIMD_EXCEPT +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (asin, x, y, special); +} +#endif + +/* Double-precision implementation of vector asin(x). + + For |x| < Small, approximate asin(x) by x. Small = 2^-12 for correct + rounding. If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the + following approximation. + + For |x| in [Small, 0.5], use an order 11 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 1.01 ulps, + _ZGVnN2v_asin (0x1.da9735b5a9277p-2) got 0x1.ed78525a927efp-2 + want 0x1.ed78525a927eep-2. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + asin(x) = pi/2 - (y + y * z * P(z)), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 2.69 ulps, + _ZGVnN2v_asin (0x1.044ac9819f573p-1) got 0x1.110d7e85fdd5p-1 + want 0x1.110d7e85fdd53p-1. */ +float64x2_t VPCS_ATTR V_NAME_D1 (asin) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + +#if WANT_SIMD_EXCEPT + /* Special values need to be computed with scalar fallbacks so + that appropriate exceptions are raised. */ + uint64x2_t special + = vcgtq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (ax), v_u64 (Small)), + v_u64 (One - Small)); + if (unlikely (v_any_u64 (special))) + return special_case (x, x, AllMask); +#endif + + uint64x2_t a_lt_half = vcltq_f64 (ax, v_f64 (0.5)); + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z = x ^ 2 and y = |x| , if |x| < 0.5 + z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5. */ + float64x2_t z2 = vbslq_f64 (a_lt_half, vmulq_f64 (x, x), + vfmsq_n_f64 (v_f64 (0.5), ax, 0.5)); + float64x2_t z = vbslq_f64 (a_lt_half, ax, vsqrtq_f64 (z2)); + + /* Use a single polynomial approximation P for both intervals. */ + float64x2_t z4 = vmulq_f64 (z2, z2); + float64x2_t z8 = vmulq_f64 (z4, z4); + float64x2_t z16 = vmulq_f64 (z8, z8); + float64x2_t p = v_estrin_11_f64 (z2, z4, z8, z16, d->poly); + + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = vfmaq_f64 (z, vmulq_f64 (z, z2), p); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + float64x2_t y = vbslq_f64 (a_lt_half, p, vfmsq_n_f64 (d->pi_over_2, p, 2.0)); + + /* Copy sign. */ + return vbslq_f64 (d->abs_mask, y, x); +} + +PL_SIG (V, D, 1, asin, -1.0, 1.0) +PL_TEST_ULP (V_NAME_D1 (asin), 2.19) +PL_TEST_EXPECT_FENV (V_NAME_D1 (asin), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_D1 (asin), 0, Small, 5000) +PL_TEST_INTERVAL (V_NAME_D1 (asin), Small, 0.5, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (asin), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (asin), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (asin), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (V_NAME_D1 (asin), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/v_asinf_2u5.c b/contrib/arm-optimized-routines/pl/math/v_asinf_2u5.c new file mode 100644 index 000000000000..eb978cd956ab --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_asinf_2u5.c @@ -0,0 +1,104 @@ +/* + * Single-precision vector asin(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[5]; + float32x4_t pi_over_2f; +} data = { + /* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on + [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */ + .poly = { V4 (0x1.55555ep-3), V4 (0x1.33261ap-4), V4 (0x1.70d7dcp-5), + V4 (0x1.b059dp-6), V4 (0x1.3af7d8p-5) }, + .pi_over_2f = V4 (0x1.921fb6p+0f), +}; + +#define AbsMask 0x7fffffff +#define Half 0x3f000000 +#define One 0x3f800000 +#define Small 0x39800000 /* 2^-12. */ + +#if WANT_SIMD_EXCEPT +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (asinf, x, y, special); +} +#endif + +/* Single-precision implementation of vector asin(x). + + For |x| < Small, approximate asin(x) by x. Small = 2^-12 for correct + rounding. If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the + following approximation. + + For |x| in [Small, 0.5], use order 4 polynomial P such that the final + approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2). + + The largest observed error in this region is 0.83 ulps, + _ZGVnN4v_asinf (0x1.ea00f4p-2) got 0x1.fef15ep-2 want 0x1.fef15cp-2. + + For |x| in [0.5, 1.0], use same approximation with a change of variable + + asin(x) = pi/2 - (y + y * z * P(z)), with z = (1-x)/2 and y = sqrt(z). + + The largest observed error in this region is 2.41 ulps, + _ZGVnN4v_asinf (0x1.00203ep-1) got 0x1.0c3a64p-1 want 0x1.0c3a6p-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (asin) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t ia = vandq_u32 (ix, v_u32 (AbsMask)); + +#if WANT_SIMD_EXCEPT + /* Special values need to be computed with scalar fallbacks so + that appropriate fp exceptions are raised. */ + uint32x4_t special + = vcgtq_u32 (vsubq_u32 (ia, v_u32 (Small)), v_u32 (One - Small)); + if (unlikely (v_any_u32 (special))) + return special_case (x, x, v_u32 (0xffffffff)); +#endif + + float32x4_t ax = vreinterpretq_f32_u32 (ia); + uint32x4_t a_lt_half = vcltq_u32 (ia, v_u32 (Half)); + + /* Evaluate polynomial Q(x) = y + y * z * P(z) with + z = x ^ 2 and y = |x| , if |x| < 0.5 + z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5. */ + float32x4_t z2 = vbslq_f32 (a_lt_half, vmulq_f32 (x, x), + vfmsq_n_f32 (v_f32 (0.5), ax, 0.5)); + float32x4_t z = vbslq_f32 (a_lt_half, ax, vsqrtq_f32 (z2)); + + /* Use a single polynomial approximation P for both intervals. */ + float32x4_t p = v_horner_4_f32 (z2, d->poly); + /* Finalize polynomial: z + z * z2 * P(z2). */ + p = vfmaq_f32 (z, vmulq_f32 (z, z2), p); + + /* asin(|x|) = Q(|x|) , for |x| < 0.5 + = pi/2 - 2 Q(|x|), for |x| >= 0.5. */ + float32x4_t y + = vbslq_f32 (a_lt_half, p, vfmsq_n_f32 (d->pi_over_2f, p, 2.0)); + + /* Copy sign. */ + return vbslq_f32 (v_u32 (AbsMask), y, x); +} + +PL_SIG (V, F, 1, asin, -1.0, 1.0) +PL_TEST_ULP (V_NAME_F1 (asin), 1.91) +PL_TEST_EXPECT_FENV (V_NAME_F1 (asin), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_F1 (asin), 0, 0x1p-12, 5000) +PL_TEST_INTERVAL (V_NAME_F1 (asin), 0x1p-12, 0.5, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (asin), 0.5, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (asin), 1.0, 0x1p11, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (asin), 0x1p11, inf, 20000) +PL_TEST_INTERVAL (V_NAME_F1 (asin), -0, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/v_asinh_3u5.c b/contrib/arm-optimized-routines/pl/math/v_asinh_3u5.c new file mode 100644 index 000000000000..4862bef94861 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_asinh_3u5.c @@ -0,0 +1,175 @@ +/* + * Double-precision vector asinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define A(i) v_f64 (__v_log_data.poly[i]) +#define N (1 << V_LOG_TABLE_BITS) + +const static struct data +{ + float64x2_t poly[18]; + uint64x2_t off, huge_bound, abs_mask; + float64x2_t ln2, tiny_bound; +} data = { + .off = V2 (0x3fe6900900000000), + .ln2 = V2 (0x1.62e42fefa39efp-1), + .huge_bound = V2 (0x5fe0000000000000), + .tiny_bound = V2 (0x1p-26), + .abs_mask = V2 (0x7fffffffffffffff), + /* Even terms of polynomial s.t. asinh(x) is approximated by + asinh(x) ~= x + x^3 * (C0 + C1 * x + C2 * x^2 + C3 * x^3 + ...). + Generated using Remez, f = (asinh(sqrt(x)) - sqrt(x))/x^(3/2). */ + .poly = { V2 (-0x1.55555555554a7p-3), V2 (0x1.3333333326c7p-4), + V2 (-0x1.6db6db68332e6p-5), V2 (0x1.f1c71b26fb40dp-6), + V2 (-0x1.6e8b8b654a621p-6), V2 (0x1.1c4daa9e67871p-6), + V2 (-0x1.c9871d10885afp-7), V2 (0x1.7a16e8d9d2ecfp-7), + V2 (-0x1.3ddca533e9f54p-7), V2 (0x1.0becef748dafcp-7), + V2 (-0x1.b90c7099dd397p-8), V2 (0x1.541f2bb1ffe51p-8), + V2 (-0x1.d217026a669ecp-9), V2 (0x1.0b5c7977aaf7p-9), + V2 (-0x1.e0f37daef9127p-11), V2 (0x1.388b5fe542a6p-12), + V2 (-0x1.021a48685e287p-14), V2 (0x1.93d4ba83d34dap-18) }, +}; + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (asinh, x, y, special); +} + +struct entry +{ + float64x2_t invc; + float64x2_t logc; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + float64x2_t e0 = vld1q_f64 ( + &__v_log_data.table[(i[0] >> (52 - V_LOG_TABLE_BITS)) & (N - 1)].invc); + float64x2_t e1 = vld1q_f64 ( + &__v_log_data.table[(i[1] >> (52 - V_LOG_TABLE_BITS)) & (N - 1)].invc); + return (struct entry){ vuzp1q_f64 (e0, e1), vuzp2q_f64 (e0, e1) }; +} + +static inline float64x2_t +log_inline (float64x2_t x, const struct data *d) +{ + /* Double-precision vector log, copied from ordinary vector log with some + cosmetic modification and special-cases removed. */ + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint64x2_t tmp = vsubq_u64 (ix, d->off); + int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); + uint64x2_t iz + = vsubq_u64 (ix, vandq_u64 (tmp, vdupq_n_u64 (0xfffULL << 52))); + float64x2_t z = vreinterpretq_f64_u64 (iz); + struct entry e = lookup (tmp); + float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); + float64x2_t kd = vcvtq_f64_s64 (k); + float64x2_t hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2); + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t y = vfmaq_f64 (A (2), A (3), r); + float64x2_t p = vfmaq_f64 (A (0), A (1), r); + y = vfmaq_f64 (y, A (4), r2); + y = vfmaq_f64 (p, y, r2); + y = vfmaq_f64 (hi, y, r2); + return y; +} + +/* Double-precision implementation of vector asinh(x). + asinh is very sensitive around 1, so it is impractical to devise a single + low-cost algorithm which is sufficiently accurate on a wide range of input. + Instead we use two different algorithms: + asinh(x) = sign(x) * log(|x| + sqrt(x^2 + 1) if |x| >= 1 + = sign(x) * (|x| + |x|^3 * P(x^2)) otherwise + where log(x) is an optimized log approximation, and P(x) is a polynomial + shared with the scalar routine. The greatest observed error 3.29 ULP, in + |x| >= 1: + __v_asinh(0x1.2cd9d717e2c9bp+0) got 0x1.ffffcfd0e234fp-1 + want 0x1.ffffcfd0e2352p-1. */ +VPCS_ATTR float64x2_t V_NAME_D1 (asinh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + uint64x2_t iax = vreinterpretq_u64_f64 (ax); + + uint64x2_t gt1 = vcgeq_f64 (ax, v_f64 (1)); + uint64x2_t special = vcgeq_u64 (iax, d->huge_bound); + +#if WANT_SIMD_EXCEPT + uint64x2_t tiny = vcltq_f64 (ax, d->tiny_bound); + special = vorrq_u64 (special, tiny); +#endif + + /* Option 1: |x| >= 1. + Compute asinh(x) according by asinh(x) = log(x + sqrt(x^2 + 1)). + If WANT_SIMD_EXCEPT is enabled, sidestep special values, which will + overflow, by setting special lanes to 1. These will be fixed later. */ + float64x2_t option_1 = v_f64 (0); + if (likely (v_any_u64 (gt1))) + { +#if WANT_SIMD_EXCEPT + float64x2_t xm = v_zerofy_f64 (ax, special); +#else + float64x2_t xm = ax; +#endif + option_1 = log_inline ( + vaddq_f64 (xm, vsqrtq_f64 (vfmaq_f64 (v_f64 (1), xm, xm))), d); + } + + /* Option 2: |x| < 1. + Compute asinh(x) using a polynomial. + If WANT_SIMD_EXCEPT is enabled, sidestep special lanes, which will + overflow, and tiny lanes, which will underflow, by setting them to 0. They + will be fixed later, either by selecting x or falling back to the scalar + special-case. The largest observed error in this region is 1.47 ULPs: + __v_asinh(0x1.fdfcd00cc1e6ap-1) got 0x1.c1d6bf874019bp-1 + want 0x1.c1d6bf874019cp-1. */ + float64x2_t option_2 = v_f64 (0); + if (likely (v_any_u64 (vceqzq_u64 (gt1)))) + { +#if WANT_SIMD_EXCEPT + ax = v_zerofy_f64 (ax, vorrq_u64 (tiny, gt1)); +#endif + float64x2_t x2 = vmulq_f64 (ax, ax), x3 = vmulq_f64 (ax, x2), + z2 = vmulq_f64 (x2, x2), z4 = vmulq_f64 (z2, z2), + z8 = vmulq_f64 (z4, z4), z16 = vmulq_f64 (z8, z8); + float64x2_t p = v_estrin_17_f64 (x2, z2, z4, z8, z16, d->poly); + option_2 = vfmaq_f64 (ax, p, x3); +#if WANT_SIMD_EXCEPT + option_2 = vbslq_f64 (tiny, x, option_2); +#endif + } + + /* Choose the right option for each lane. */ + float64x2_t y = vbslq_f64 (gt1, option_1, option_2); + /* Copy sign. */ + y = vbslq_f64 (d->abs_mask, y, x); + + if (unlikely (v_any_u64 (special))) + return special_case (x, y, special); + return y; +} + +PL_SIG (V, D, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (asinh), 2.80) +PL_TEST_EXPECT_FENV (V_NAME_D1 (asinh), WANT_SIMD_EXCEPT) +/* Test vector asinh 3 times, with control lane < 1, > 1 and special. + Ensures the v_sel is choosing the right option in all cases. */ +#define V_ASINH_INTERVAL(lo, hi, n) \ + PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (asinh), lo, hi, n, 0.5) \ + PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (asinh), lo, hi, n, 2) \ + PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (asinh), lo, hi, n, 0x1p600) +V_ASINH_INTERVAL (0, 0x1p-26, 50000) +V_ASINH_INTERVAL (0x1p-26, 1, 50000) +V_ASINH_INTERVAL (1, 0x1p511, 50000) +V_ASINH_INTERVAL (0x1p511, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_asinhf_2u7.c b/contrib/arm-optimized-routines/pl/math/v_asinhf_2u7.c new file mode 100644 index 000000000000..1723ba90d2f3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_asinhf_2u7.c @@ -0,0 +1,80 @@ +/* + * Single-precision vector asinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "v_log1pf_inline.h" + +#define SignMask v_u32 (0x80000000) + +const static struct data +{ + struct v_log1pf_data log1pf_consts; + uint32x4_t big_bound; +#if WANT_SIMD_EXCEPT + uint32x4_t tiny_bound; +#endif +} data = { + .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE, + .big_bound = V4 (0x5f800000), /* asuint(0x1p64). */ +#if WANT_SIMD_EXCEPT + .tiny_bound = V4 (0x30800000) /* asuint(0x1p-30). */ +#endif +}; + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (asinhf, x, y, special); +} + +/* Single-precision implementation of vector asinh(x), using vector log1p. + Worst-case error is 2.66 ULP, at roughly +/-0.25: + __v_asinhf(0x1.01b04p-2) got 0x1.fe163ep-3 want 0x1.fe1638p-3. */ +VPCS_ATTR float32x4_t V_NAME_F1 (asinh) (float32x4_t x) +{ + const struct data *dat = ptr_barrier (&data); + uint32x4_t iax = vbicq_u32 (vreinterpretq_u32_f32 (x), SignMask); + float32x4_t ax = vreinterpretq_f32_u32 (iax); + uint32x4_t special = vcgeq_u32 (iax, dat->big_bound); + float32x4_t special_arg = x; + +#if WANT_SIMD_EXCEPT + /* Sidestep tiny and large values to avoid inadvertently triggering + under/overflow. */ + special = vorrq_u32 (special, vcltq_u32 (iax, dat->tiny_bound)); + if (unlikely (v_any_u32 (special))) + { + ax = v_zerofy_f32 (ax, special); + x = v_zerofy_f32 (x, special); + } +#endif + + /* asinh(x) = log(x + sqrt(x * x + 1)). + For positive x, asinh(x) = log1p(x + x * x / (1 + sqrt(x * x + 1))). */ + float32x4_t d + = vaddq_f32 (v_f32 (1), vsqrtq_f32 (vfmaq_f32 (v_f32 (1), x, x))); + float32x4_t y = log1pf_inline ( + vaddq_f32 (ax, vdivq_f32 (vmulq_f32 (ax, ax), d)), dat->log1pf_consts); + + if (unlikely (v_any_u32 (special))) + return special_case (special_arg, vbslq_f32 (SignMask, x, y), special); + return vbslq_f32 (SignMask, x, y); +} + +PL_SIG (V, F, 1, asinh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (asinh), 2.17) +PL_TEST_EXPECT_FENV (V_NAME_F1 (asinh), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0, 0x1p-12, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0x1p-12, 1.0, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), 1.0, 0x1p11, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0x1p11, inf, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0, -0x1p-12, 20000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0x1p-12, -1.0, 20000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), -1.0, -0x1p11, 20000) +PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0x1p11, -inf, 20000) diff --git a/contrib/arm-optimized-routines/pl/math/v_atan2_3u.c b/contrib/arm-optimized-routines/pl/math/v_atan2_3u.c new file mode 100644 index 000000000000..f24667682dec --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atan2_3u.c @@ -0,0 +1,121 @@ +/* + * Double-precision vector atan2(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f64.h" + +static const struct data +{ + float64x2_t pi_over_2; + float64x2_t poly[20]; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + the interval [2**-1022, 1.0]. */ + .poly = { V2 (-0x1.5555555555555p-2), V2 (0x1.99999999996c1p-3), + V2 (-0x1.2492492478f88p-3), V2 (0x1.c71c71bc3951cp-4), + V2 (-0x1.745d160a7e368p-4), V2 (0x1.3b139b6a88ba1p-4), + V2 (-0x1.11100ee084227p-4), V2 (0x1.e1d0f9696f63bp-5), + V2 (-0x1.aebfe7b418581p-5), V2 (0x1.842dbe9b0d916p-5), + V2 (-0x1.5d30140ae5e99p-5), V2 (0x1.338e31eb2fbbcp-5), + V2 (-0x1.00e6eece7de8p-5), V2 (0x1.860897b29e5efp-6), + V2 (-0x1.0051381722a59p-6), V2 (0x1.14e9dc19a4a4ep-7), + V2 (-0x1.d0062b42fe3bfp-9), V2 (0x1.17739e210171ap-10), + V2 (-0x1.ab24da7be7402p-13), V2 (0x1.358851160a528p-16), }, + .pi_over_2 = V2 (0x1.921fb54442d18p+0), +}; + +#define SignMask v_u64 (0x8000000000000000) + +/* Special cases i.e. 0, infinity, NaN (fall back to scalar calls). */ +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t y, float64x2_t x, float64x2_t ret, uint64x2_t cmp) +{ + return v_call2_f64 (atan2, y, x, ret, cmp); +} + +/* Returns 1 if input is the bit representation of 0, infinity or nan. */ +static inline uint64x2_t +zeroinfnan (uint64x2_t i) +{ + /* (2 * i - 1) >= (2 * asuint64 (INFINITY) - 1). */ + return vcgeq_u64 (vsubq_u64 (vaddq_u64 (i, i), v_u64 (1)), + v_u64 (2 * asuint64 (INFINITY) - 1)); +} + +/* Fast implementation of vector atan2. + Maximum observed error is 2.8 ulps: + _ZGVnN2vv_atan2 (0x1.9651a429a859ap+5, 0x1.953075f4ee26p+5) + got 0x1.92d628ab678ccp-1 + want 0x1.92d628ab678cfp-1. */ +float64x2_t VPCS_ATTR V_NAME_D2 (atan2) (float64x2_t y, float64x2_t x) +{ + const struct data *data_ptr = ptr_barrier (&data); + + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint64x2_t iy = vreinterpretq_u64_f64 (y); + + uint64x2_t special_cases = vorrq_u64 (zeroinfnan (ix), zeroinfnan (iy)); + + uint64x2_t sign_x = vandq_u64 (ix, SignMask); + uint64x2_t sign_y = vandq_u64 (iy, SignMask); + uint64x2_t sign_xy = veorq_u64 (sign_x, sign_y); + + float64x2_t ax = vabsq_f64 (x); + float64x2_t ay = vabsq_f64 (y); + + uint64x2_t pred_xlt0 = vcltzq_f64 (x); + uint64x2_t pred_aygtax = vcgtq_f64 (ay, ax); + + /* Set up z for call to atan. */ + float64x2_t n = vbslq_f64 (pred_aygtax, vnegq_f64 (ax), ay); + float64x2_t d = vbslq_f64 (pred_aygtax, ay, ax); + float64x2_t z = vdivq_f64 (n, d); + + /* Work out the correct shift. */ + float64x2_t shift = vreinterpretq_f64_u64 ( + vandq_u64 (pred_xlt0, vreinterpretq_u64_f64 (v_f64 (-2.0)))); + shift = vbslq_f64 (pred_aygtax, vaddq_f64 (shift, v_f64 (1.0)), shift); + shift = vmulq_f64 (shift, data_ptr->pi_over_2); + + /* Calculate the polynomial approximation. + Use split Estrin scheme for P(z^2) with deg(P)=19. Use split instead of + full scheme to avoid underflow in x^16. + The order 19 polynomial P approximates + (atan(sqrt(x))-sqrt(x))/x^(3/2). */ + float64x2_t z2 = vmulq_f64 (z, z); + float64x2_t x2 = vmulq_f64 (z2, z2); + float64x2_t x4 = vmulq_f64 (x2, x2); + float64x2_t x8 = vmulq_f64 (x4, x4); + float64x2_t ret + = vfmaq_f64 (v_estrin_7_f64 (z2, x2, x4, data_ptr->poly), + v_estrin_11_f64 (z2, x2, x4, x8, data_ptr->poly + 8), x8); + + /* Finalize. y = shift + z + z^3 * P(z^2). */ + ret = vfmaq_f64 (z, ret, vmulq_f64 (z2, z)); + ret = vaddq_f64 (ret, shift); + + /* Account for the sign of x and y. */ + ret = vreinterpretq_f64_u64 ( + veorq_u64 (vreinterpretq_u64_f64 (ret), sign_xy)); + + if (unlikely (v_any_u64 (special_cases))) + return special_case (y, x, ret, special_cases); + + return ret; +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (V, D, 2, atan2) +// TODO tighten this once __v_atan2 is fixed +PL_TEST_ULP (V_NAME_D2 (atan2), 2.9) +PL_TEST_INTERVAL (V_NAME_D2 (atan2), -10.0, 10.0, 50000) +PL_TEST_INTERVAL (V_NAME_D2 (atan2), -1.0, 1.0, 40000) +PL_TEST_INTERVAL (V_NAME_D2 (atan2), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (V_NAME_D2 (atan2), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (V_NAME_D2 (atan2), 1e6, 1e32, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_atan2f_3u.c b/contrib/arm-optimized-routines/pl/math/v_atan2f_3u.c new file mode 100644 index 000000000000..bbfc3cb552f6 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atan2f_3u.c @@ -0,0 +1,115 @@ +/* + * Single-precision vector atan2(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" + +static const struct data +{ + float32x4_t poly[8]; + float32x4_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-128, 1.0]. + Generated using fpminimax between FLT_MIN and 1. */ + .poly = { V4 (-0x1.55555p-2f), V4 (0x1.99935ep-3f), V4 (-0x1.24051ep-3f), + V4 (0x1.bd7368p-4f), V4 (-0x1.491f0ep-4f), V4 (0x1.93a2c0p-5f), + V4 (-0x1.4c3c60p-6f), V4 (0x1.01fd88p-8f) }, + .pi_over_2 = V4 (0x1.921fb6p+0f), +}; + +#define SignMask v_u32 (0x80000000) + +/* Special cases i.e. 0, infinity and nan (fall back to scalar calls). */ +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t y, float32x4_t x, float32x4_t ret, uint32x4_t cmp) +{ + return v_call2_f32 (atan2f, y, x, ret, cmp); +} + +/* Returns 1 if input is the bit representation of 0, infinity or nan. */ +static inline uint32x4_t +zeroinfnan (uint32x4_t i) +{ + /* 2 * i - 1 >= 2 * 0x7f800000lu - 1. */ + return vcgeq_u32 (vsubq_u32 (vmulq_n_u32 (i, 2), v_u32 (1)), + v_u32 (2 * 0x7f800000lu - 1)); +} + +/* Fast implementation of vector atan2f. Maximum observed error is + 2.95 ULP in [0x1.9300d6p+6 0x1.93c0c6p+6] x [0x1.8c2dbp+6 0x1.8cea6p+6]: + _ZGVnN4vv_atan2f (0x1.93836cp+6, 0x1.8cae1p+6) got 0x1.967f06p-1 + want 0x1.967f00p-1. */ +float32x4_t VPCS_ATTR V_NAME_F2 (atan2) (float32x4_t y, float32x4_t x) +{ + const struct data *data_ptr = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t iy = vreinterpretq_u32_f32 (y); + + uint32x4_t special_cases = vorrq_u32 (zeroinfnan (ix), zeroinfnan (iy)); + + uint32x4_t sign_x = vandq_u32 (ix, SignMask); + uint32x4_t sign_y = vandq_u32 (iy, SignMask); + uint32x4_t sign_xy = veorq_u32 (sign_x, sign_y); + + float32x4_t ax = vabsq_f32 (x); + float32x4_t ay = vabsq_f32 (y); + + uint32x4_t pred_xlt0 = vcltzq_f32 (x); + uint32x4_t pred_aygtax = vcgtq_f32 (ay, ax); + + /* Set up z for call to atanf. */ + float32x4_t n = vbslq_f32 (pred_aygtax, vnegq_f32 (ax), ay); + float32x4_t d = vbslq_f32 (pred_aygtax, ay, ax); + float32x4_t z = vdivq_f32 (n, d); + + /* Work out the correct shift. */ + float32x4_t shift = vreinterpretq_f32_u32 ( + vandq_u32 (pred_xlt0, vreinterpretq_u32_f32 (v_f32 (-2.0f)))); + shift = vbslq_f32 (pred_aygtax, vaddq_f32 (shift, v_f32 (1.0f)), shift); + shift = vmulq_f32 (shift, data_ptr->pi_over_2); + + /* Calculate the polynomial approximation. + Use 2-level Estrin scheme for P(z^2) with deg(P)=7. However, + a standard implementation using z8 creates spurious underflow + in the very last fma (when z^8 is small enough). + Therefore, we split the last fma into a mul and an fma. + Horner and single-level Estrin have higher errors that exceed + threshold. */ + float32x4_t z2 = vmulq_f32 (z, z); + float32x4_t z4 = vmulq_f32 (z2, z2); + + float32x4_t ret = vfmaq_f32 ( + v_pairwise_poly_3_f32 (z2, z4, data_ptr->poly), z4, + vmulq_f32 (z4, v_pairwise_poly_3_f32 (z2, z4, data_ptr->poly + 4))); + + /* y = shift + z * P(z^2). */ + ret = vaddq_f32 (vfmaq_f32 (z, ret, vmulq_f32 (z2, z)), shift); + + /* Account for the sign of y. */ + ret = vreinterpretq_f32_u32 ( + veorq_u32 (vreinterpretq_u32_f32 (ret), sign_xy)); + + if (unlikely (v_any_u32 (special_cases))) + { + return special_case (y, x, ret, special_cases); + } + + return ret; +} + +/* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ +PL_SIG (V, F, 2, atan2) +PL_TEST_ULP (V_NAME_F2 (atan2), 2.46) +PL_TEST_INTERVAL (V_NAME_F2 (atan2), -10.0, 10.0, 50000) +PL_TEST_INTERVAL (V_NAME_F2 (atan2), -1.0, 1.0, 40000) +PL_TEST_INTERVAL (V_NAME_F2 (atan2), 0.0, 1.0, 40000) +PL_TEST_INTERVAL (V_NAME_F2 (atan2), 1.0, 100.0, 40000) +PL_TEST_INTERVAL (V_NAME_F2 (atan2), 1e6, 1e32, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_atan_2u5.c b/contrib/arm-optimized-routines/pl/math/v_atan_2u5.c new file mode 100644 index 000000000000..ba68cc3cc720 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atan_2u5.c @@ -0,0 +1,104 @@ +/* + * Double-precision vector atan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f64.h" + +static const struct data +{ + float64x2_t pi_over_2; + float64x2_t poly[20]; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-1022, 1.0]. */ + .poly = { V2 (-0x1.5555555555555p-2), V2 (0x1.99999999996c1p-3), + V2 (-0x1.2492492478f88p-3), V2 (0x1.c71c71bc3951cp-4), + V2 (-0x1.745d160a7e368p-4), V2 (0x1.3b139b6a88ba1p-4), + V2 (-0x1.11100ee084227p-4), V2 (0x1.e1d0f9696f63bp-5), + V2 (-0x1.aebfe7b418581p-5), V2 (0x1.842dbe9b0d916p-5), + V2 (-0x1.5d30140ae5e99p-5), V2 (0x1.338e31eb2fbbcp-5), + V2 (-0x1.00e6eece7de8p-5), V2 (0x1.860897b29e5efp-6), + V2 (-0x1.0051381722a59p-6), V2 (0x1.14e9dc19a4a4ep-7), + V2 (-0x1.d0062b42fe3bfp-9), V2 (0x1.17739e210171ap-10), + V2 (-0x1.ab24da7be7402p-13), V2 (0x1.358851160a528p-16), }, + .pi_over_2 = V2 (0x1.921fb54442d18p+0), +}; + +#define SignMask v_u64 (0x8000000000000000) +#define TinyBound 0x3e10000000000000 /* asuint64(0x1p-30). */ +#define BigBound 0x4340000000000000 /* asuint64(0x1p53). */ + +/* Fast implementation of vector atan. + Based on atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] using + z=1/x and shift = pi/2. Maximum observed error is 2.27 ulps: + _ZGVnN2v_atan (0x1.0005af27c23e9p+0) got 0x1.9225645bdd7c1p-1 + want 0x1.9225645bdd7c3p-1. */ +float64x2_t VPCS_ATTR V_NAME_D1 (atan) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + /* Small cases, infs and nans are supported by our approximation technique, + but do not set fenv flags correctly. Only trigger special case if we need + fenv. */ + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint64x2_t sign = vandq_u64 (ix, SignMask); + +#if WANT_SIMD_EXCEPT + uint64x2_t ia12 = vandq_u64 (ix, v_u64 (0x7ff0000000000000)); + uint64x2_t special = vcgtq_u64 (vsubq_u64 (ia12, v_u64 (TinyBound)), + v_u64 (BigBound - TinyBound)); + /* If any lane is special, fall back to the scalar routine for all lanes. */ + if (unlikely (v_any_u64 (special))) + return v_call_f64 (atan, x, v_f64 (0), v_u64 (-1)); +#endif + + /* Argument reduction: + y := arctan(x) for x < 1 + y := pi/2 + arctan(-1/x) for x > 1 + Hence, use z=-1/a if x>=1, otherwise z=a. */ + uint64x2_t red = vcagtq_f64 (x, v_f64 (1.0)); + /* Avoid dependency in abs(x) in division (and comparison). */ + float64x2_t z = vbslq_f64 (red, vdivq_f64 (v_f64 (1.0), x), x); + float64x2_t shift = vreinterpretq_f64_u64 ( + vandq_u64 (red, vreinterpretq_u64_f64 (d->pi_over_2))); + /* Use absolute value only when needed (odd powers of z). */ + float64x2_t az = vbslq_f64 ( + SignMask, vreinterpretq_f64_u64 (vandq_u64 (SignMask, red)), z); + + /* Calculate the polynomial approximation. + Use split Estrin scheme for P(z^2) with deg(P)=19. Use split instead of + full scheme to avoid underflow in x^16. + The order 19 polynomial P approximates + (atan(sqrt(x))-sqrt(x))/x^(3/2). */ + float64x2_t z2 = vmulq_f64 (z, z); + float64x2_t x2 = vmulq_f64 (z2, z2); + float64x2_t x4 = vmulq_f64 (x2, x2); + float64x2_t x8 = vmulq_f64 (x4, x4); + float64x2_t y + = vfmaq_f64 (v_estrin_7_f64 (z2, x2, x4, d->poly), + v_estrin_11_f64 (z2, x2, x4, x8, d->poly + 8), x8); + + /* Finalize. y = shift + z + z^3 * P(z^2). */ + y = vfmaq_f64 (az, y, vmulq_f64 (z2, az)); + y = vaddq_f64 (y, shift); + + /* y = atan(x) if x>0, -atan(-x) otherwise. */ + y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), sign)); + return y; +} + +PL_SIG (V, D, 1, atan, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (atan), 1.78) +PL_TEST_EXPECT_FENV (V_NAME_D1 (atan), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL (V_NAME_D1 (atan), 0, 0x1p-30, 10000) +PL_TEST_INTERVAL (V_NAME_D1 (atan), -0, -0x1p-30, 1000) +PL_TEST_INTERVAL (V_NAME_D1 (atan), 0x1p-30, 0x1p53, 900000) +PL_TEST_INTERVAL (V_NAME_D1 (atan), -0x1p-30, -0x1p53, 90000) +PL_TEST_INTERVAL (V_NAME_D1 (atan), 0x1p53, inf, 10000) +PL_TEST_INTERVAL (V_NAME_D1 (atan), -0x1p53, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_atanf_3u.c b/contrib/arm-optimized-routines/pl/math/v_atanf_3u.c new file mode 100644 index 000000000000..f522d957c1cc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atanf_3u.c @@ -0,0 +1,107 @@ +/* + * Single-precision vector atan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" + +static const struct data +{ + float32x4_t poly[8]; + float32x4_t pi_over_2; +} data = { + /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on + [2**-128, 1.0]. + Generated using fpminimax between FLT_MIN and 1. */ + .poly = { V4 (-0x1.55555p-2f), V4 (0x1.99935ep-3f), V4 (-0x1.24051ep-3f), + V4 (0x1.bd7368p-4f), V4 (-0x1.491f0ep-4f), V4 (0x1.93a2c0p-5f), + V4 (-0x1.4c3c60p-6f), V4 (0x1.01fd88p-8f) }, + .pi_over_2 = V4 (0x1.921fb6p+0f), +}; + +#define SignMask v_u32 (0x80000000) + +#define P(i) d->poly[i] + +#define TinyBound 0x30800000 /* asuint(0x1p-30). */ +#define BigBound 0x4e800000 /* asuint(0x1p30). */ + +#if WANT_SIMD_EXCEPT +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (atanf, x, y, special); +} +#endif + +/* Fast implementation of vector atanf based on + atan(x) ~ shift + z + z^3 * P(z^2) with reduction to [0,1] + using z=-1/x and shift = pi/2. Maximum observed error is 2.9ulps: + _ZGVnN4v_atanf (0x1.0468f6p+0) got 0x1.967f06p-1 want 0x1.967fp-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (atan) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + /* Small cases, infs and nans are supported by our approximation technique, + but do not set fenv flags correctly. Only trigger special case if we need + fenv. */ + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t sign = vandq_u32 (ix, SignMask); + +#if WANT_SIMD_EXCEPT + uint32x4_t ia = vandq_u32 (ix, v_u32 (0x7ff00000)); + uint32x4_t special = vcgtq_u32 (vsubq_u32 (ia, v_u32 (TinyBound)), + v_u32 (BigBound - TinyBound)); + /* If any lane is special, fall back to the scalar routine for all lanes. */ + if (unlikely (v_any_u32 (special))) + return special_case (x, x, v_u32 (-1)); +#endif + + /* Argument reduction: + y := arctan(x) for x < 1 + y := pi/2 + arctan(-1/x) for x > 1 + Hence, use z=-1/a if x>=1, otherwise z=a. */ + uint32x4_t red = vcagtq_f32 (x, v_f32 (1.0)); + /* Avoid dependency in abs(x) in division (and comparison). */ + float32x4_t z = vbslq_f32 (red, vdivq_f32 (v_f32 (1.0f), x), x); + float32x4_t shift = vreinterpretq_f32_u32 ( + vandq_u32 (red, vreinterpretq_u32_f32 (d->pi_over_2))); + /* Use absolute value only when needed (odd powers of z). */ + float32x4_t az = vbslq_f32 ( + SignMask, vreinterpretq_f32_u32 (vandq_u32 (SignMask, red)), z); + + /* Calculate the polynomial approximation. + Use 2-level Estrin scheme for P(z^2) with deg(P)=7. However, + a standard implementation using z8 creates spurious underflow + in the very last fma (when z^8 is small enough). + Therefore, we split the last fma into a mul and an fma. + Horner and single-level Estrin have higher errors that exceed + threshold. */ + float32x4_t z2 = vmulq_f32 (z, z); + float32x4_t z4 = vmulq_f32 (z2, z2); + + float32x4_t y = vfmaq_f32 ( + v_pairwise_poly_3_f32 (z2, z4, d->poly), z4, + vmulq_f32 (z4, v_pairwise_poly_3_f32 (z2, z4, d->poly + 4))); + + /* y = shift + z * P(z^2). */ + y = vaddq_f32 (vfmaq_f32 (az, y, vmulq_f32 (z2, az)), shift); + + /* y = atan(x) if x>0, -atan(-x) otherwise. */ + y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), sign)); + + return y; +} + +PL_SIG (V, F, 1, atan, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (atan), 2.5) +PL_TEST_EXPECT_FENV (V_NAME_F1 (atan), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (atan), 0, 0x1p-30, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (atan), 0x1p-30, 1, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (atan), 1, 0x1p30, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (atan), 0x1p30, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_atanh_3u5.c b/contrib/arm-optimized-routines/pl/math/v_atanh_3u5.c new file mode 100644 index 000000000000..f282826a3f32 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atanh_3u5.c @@ -0,0 +1,66 @@ +/* + * Double-precision vector atanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define WANT_V_LOG1P_K0_SHORTCUT 0 +#include "v_log1p_inline.h" + +const static struct data +{ + struct v_log1p_data log1p_consts; + uint64x2_t one, half; +} data = { .log1p_consts = V_LOG1P_CONSTANTS_TABLE, + .one = V2 (0x3ff0000000000000), + .half = V2 (0x3fe0000000000000) }; + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (atanh, x, y, special); +} + +/* Approximation for vector double-precision atanh(x) using modified log1p. + The greatest observed error is 3.31 ULP: + _ZGVnN2v_atanh(0x1.ffae6288b601p-6) got 0x1.ffd8ff31b5019p-6 + want 0x1.ffd8ff31b501cp-6. */ +VPCS_ATTR +float64x2_t V_NAME_D1 (atanh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + uint64x2_t ia = vreinterpretq_u64_f64 (ax); + uint64x2_t sign = veorq_u64 (vreinterpretq_u64_f64 (x), ia); + uint64x2_t special = vcgeq_u64 (ia, d->one); + float64x2_t halfsign = vreinterpretq_f64_u64 (vorrq_u64 (sign, d->half)); + +#if WANT_SIMD_EXCEPT + ax = v_zerofy_f64 (ax, special); +#endif + + float64x2_t y; + y = vaddq_f64 (ax, ax); + y = vdivq_f64 (y, vsubq_f64 (v_f64 (1), ax)); + y = log1p_inline (y, &d->log1p_consts); + + if (unlikely (v_any_u64 (special))) + return special_case (x, vmulq_f64 (y, halfsign), special); + return vmulq_f64 (y, halfsign); +} + +PL_SIG (V, D, 1, atanh, -1.0, 1.0) +PL_TEST_EXPECT_FENV (V_NAME_D1 (atanh), WANT_SIMD_EXCEPT) +PL_TEST_ULP (V_NAME_D1 (atanh), 3.32) +/* atanh is asymptotic at 1, which is the default control value - have to set + -c 0 specially to ensure fp exceptions are triggered correctly (choice of + control lane is irrelevant if fp exceptions are disabled). */ +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (atanh), 0, 0x1p-23, 10000, 0) +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (atanh), 0x1p-23, 1, 90000, 0) +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (atanh), 1, inf, 100, 0) diff --git a/contrib/arm-optimized-routines/pl/math/v_atanhf_3u1.c b/contrib/arm-optimized-routines/pl/math/v_atanhf_3u1.c new file mode 100644 index 000000000000..f6a5f25eca9a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_atanhf_3u1.c @@ -0,0 +1,77 @@ +/* + * Single-precision vector atanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "v_log1pf_inline.h" + +const static struct data +{ + struct v_log1pf_data log1pf_consts; + uint32x4_t one; +#if WANT_SIMD_EXCEPT + uint32x4_t tiny_bound; +#endif +} data = { + .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE, + .one = V4 (0x3f800000), +#if WANT_SIMD_EXCEPT + /* 0x1p-12, below which atanhf(x) rounds to x. */ + .tiny_bound = V4 (0x39800000), +#endif +}; + +#define AbsMask v_u32 (0x7fffffff) +#define Half v_u32 (0x3f000000) + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (atanhf, x, y, special); +} + +/* Approximation for vector single-precision atanh(x) using modified log1p. + The maximum error is 3.08 ULP: + __v_atanhf(0x1.ff215p-5) got 0x1.ffcb7cp-5 + want 0x1.ffcb82p-5. */ +VPCS_ATTR float32x4_t V_NAME_F1 (atanh) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + float32x4_t halfsign = vbslq_f32 (AbsMask, v_f32 (0.5), x); + float32x4_t ax = vabsq_f32 (x); + uint32x4_t iax = vreinterpretq_u32_f32 (ax); + +#if WANT_SIMD_EXCEPT + uint32x4_t special + = vorrq_u32 (vcgeq_u32 (iax, d->one), vcltq_u32 (iax, d->tiny_bound)); + /* Side-step special cases by setting those lanes to 0, which will trigger no + exceptions. These will be fixed up later. */ + if (unlikely (v_any_u32 (special))) + ax = v_zerofy_f32 (ax, special); +#else + uint32x4_t special = vcgeq_u32 (iax, d->one); +#endif + + float32x4_t y = vdivq_f32 (vaddq_f32 (ax, ax), vsubq_f32 (v_f32 (1), ax)); + y = log1pf_inline (y, d->log1pf_consts); + + if (unlikely (v_any_u32 (special))) + return special_case (x, vmulq_f32 (halfsign, y), special); + return vmulq_f32 (halfsign, y); +} + +PL_SIG (V, F, 1, atanh, -1.0, 1.0) +PL_TEST_ULP (V_NAME_F1 (atanh), 2.59) +PL_TEST_EXPECT_FENV (V_NAME_F1 (atanh), WANT_SIMD_EXCEPT) +/* atanh is asymptotic at 1, which is the default control value - have to set + -c 0 specially to ensure fp exceptions are triggered correctly (choice of + control lane is irrelevant if fp exceptions are disabled). */ +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 0, 0x1p-12, 500, 0) +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 0x1p-12, 1, 200000, 0) +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 1, inf, 1000, 0) diff --git a/contrib/arm-optimized-routines/pl/math/v_cbrt_2u.c b/contrib/arm-optimized-routines/pl/math/v_cbrt_2u.c new file mode 100644 index 000000000000..cc7cff15dc0f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cbrt_2u.c @@ -0,0 +1,116 @@ +/* + * Double-precision vector cbrt(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f64.h" + +const static struct data +{ + float64x2_t poly[4], one_third, shift; + int64x2_t exp_bias; + uint64x2_t abs_mask, tiny_bound; + uint32x4_t thresh; + double table[5]; +} data = { + .shift = V2 (0x1.8p52), + .poly = { /* Generated with fpminimax in [0.5, 1]. */ + V2 (0x1.c14e8ee44767p-2), V2 (0x1.dd2d3f99e4c0ep-1), + V2 (-0x1.08e83026b7e74p-1), V2 (0x1.2c74eaa3ba428p-3) }, + .exp_bias = V2 (1022), + .abs_mask = V2(0x7fffffffffffffff), + .tiny_bound = V2(0x0010000000000000), /* Smallest normal. */ + .thresh = V4(0x7fe00000), /* asuint64 (infinity) - tiny_bound. */ + .one_third = V2(0x1.5555555555555p-2), + .table = { /* table[i] = 2^((i - 2) / 3). */ + 0x1.428a2f98d728bp-1, 0x1.965fea53d6e3dp-1, 0x1p0, + 0x1.428a2f98d728bp0, 0x1.965fea53d6e3dp0 } +}; + +#define MantissaMask v_u64 (0x000fffffffffffff) + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x, float64x2_t y, uint32x2_t special) +{ + return v_call_f64 (cbrt, x, y, vmovl_u32 (special)); +} + +/* Approximation for double-precision vector cbrt(x), using low-order polynomial + and two Newton iterations. Greatest observed error is 1.79 ULP. Errors repeat + according to the exponent, for instance an error observed for double value + m * 2^e will be observed for any input m * 2^(e + 3*i), where i is an + integer. + __v_cbrt(0x1.fffff403f0bc6p+1) got 0x1.965fe72821e9bp+0 + want 0x1.965fe72821e99p+0. */ +VPCS_ATTR float64x2_t V_NAME_D1 (cbrt) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t iax = vreinterpretq_u64_f64 (vabsq_f64 (x)); + + /* Subnormal, +/-0 and special values. */ + uint32x2_t special + = vcge_u32 (vsubhn_u64 (iax, d->tiny_bound), vget_low_u32 (d->thresh)); + + /* Decompose |x| into m * 2^e, where m is in [0.5, 1.0]. This is a vector + version of frexp, which gets subnormal values wrong - these have to be + special-cased as a result. */ + float64x2_t m = vbslq_f64 (MantissaMask, x, v_f64 (0.5)); + int64x2_t exp_bias = d->exp_bias; + uint64x2_t ia12 = vshrq_n_u64 (iax, 52); + int64x2_t e = vsubq_s64 (vreinterpretq_s64_u64 (ia12), exp_bias); + + /* Calculate rough approximation for cbrt(m) in [0.5, 1.0], starting point for + Newton iterations. */ + float64x2_t p = v_pairwise_poly_3_f64 (m, vmulq_f64 (m, m), d->poly); + float64x2_t one_third = d->one_third; + /* Two iterations of Newton's method for iteratively approximating cbrt. */ + float64x2_t m_by_3 = vmulq_f64 (m, one_third); + float64x2_t two_thirds = vaddq_f64 (one_third, one_third); + float64x2_t a + = vfmaq_f64 (vdivq_f64 (m_by_3, vmulq_f64 (p, p)), two_thirds, p); + a = vfmaq_f64 (vdivq_f64 (m_by_3, vmulq_f64 (a, a)), two_thirds, a); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + We can get 2 ^ round(e / 3) using ldexp and integer divide, but since e is + not necessarily a multiple of 3 we lose some information. + + Let q = 2 ^ round(e / 3), then t = 2 ^ (e / 3) / q. + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3, which is + an integer in [-2, 2], and can be looked up in the table T. Hence the + result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. */ + + float64x2_t ef = vcvtq_f64_s64 (e); + float64x2_t eb3f = vrndnq_f64 (vmulq_f64 (ef, one_third)); + int64x2_t em3 = vcvtq_s64_f64 (vfmsq_f64 (ef, eb3f, v_f64 (3))); + int64x2_t ey = vcvtq_s64_f64 (eb3f); + + float64x2_t my = (float64x2_t){ d->table[em3[0] + 2], d->table[em3[1] + 2] }; + my = vmulq_f64 (my, a); + + /* Vector version of ldexp. */ + float64x2_t y = vreinterpretq_f64_s64 ( + vshlq_n_s64 (vaddq_s64 (ey, vaddq_s64 (exp_bias, v_s64 (1))), 52)); + y = vmulq_f64 (y, my); + + if (unlikely (v_any_u32h (special))) + return special_case (x, vbslq_f64 (d->abs_mask, y, x), special); + + /* Copy sign. */ + return vbslq_f64 (d->abs_mask, y, x); +} + +PL_TEST_ULP (V_NAME_D1 (cbrt), 1.30) +PL_SIG (V, D, 1, cbrt, -10.0, 10.0) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (cbrt)) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cbrt), 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cbrtf_1u7.c b/contrib/arm-optimized-routines/pl/math/v_cbrtf_1u7.c new file mode 100644 index 000000000000..74918765209f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cbrtf_1u7.c @@ -0,0 +1,116 @@ +/* + * Single-precision vector cbrt(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" + +const static struct data +{ + float32x4_t poly[4], one_third; + float table[5]; +} data = { + .poly = { /* Very rough approximation of cbrt(x) in [0.5, 1], generated with + FPMinimax. */ + V4 (0x1.c14e96p-2), V4 (0x1.dd2d3p-1), V4 (-0x1.08e81ap-1), + V4 (0x1.2c74c2p-3) }, + .table = { /* table[i] = 2^((i - 2) / 3). */ + 0x1.428a3p-1, 0x1.965feap-1, 0x1p0, 0x1.428a3p0, 0x1.965feap0 }, + .one_third = V4 (0x1.555556p-2f), +}; + +#define SignMask v_u32 (0x80000000) +#define SmallestNormal v_u32 (0x00800000) +#define Thresh vdup_n_u16 (0x7f00) /* asuint(INFINITY) - SmallestNormal. */ +#define MantissaMask v_u32 (0x007fffff) +#define HalfExp v_u32 (0x3f000000) + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint16x4_t special) +{ + return v_call_f32 (cbrtf, x, y, vmovl_u16 (special)); +} + +static inline float32x4_t +shifted_lookup (const float *table, int32x4_t i) +{ + return (float32x4_t){ table[i[0] + 2], table[i[1] + 2], table[i[2] + 2], + table[i[3] + 2] }; +} + +/* Approximation for vector single-precision cbrt(x) using Newton iteration + with initial guess obtained by a low-order polynomial. Greatest error + is 1.64 ULP. This is observed for every value where the mantissa is + 0x1.85a2aa and the exponent is a multiple of 3, for example: + _ZGVnN4v_cbrtf(0x1.85a2aap+3) got 0x1.267936p+1 + want 0x1.267932p+1. */ +VPCS_ATTR float32x4_t V_NAME_F1 (cbrt) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + uint32x4_t iax = vreinterpretq_u32_f32 (vabsq_f32 (x)); + + /* Subnormal, +/-0 and special values. */ + uint16x4_t special = vcge_u16 (vsubhn_u32 (iax, SmallestNormal), Thresh); + + /* Decompose |x| into m * 2^e, where m is in [0.5, 1.0]. This is a vector + version of frexpf, which gets subnormal values wrong - these have to be + special-cased as a result. */ + float32x4_t m = vbslq_f32 (MantissaMask, x, v_f32 (0.5)); + int32x4_t e + = vsubq_s32 (vreinterpretq_s32_u32 (vshrq_n_u32 (iax, 23)), v_s32 (126)); + + /* p is a rough approximation for cbrt(m) in [0.5, 1.0]. The better this is, + the less accurate the next stage of the algorithm needs to be. An order-4 + polynomial is enough for one Newton iteration. */ + float32x4_t p = v_pairwise_poly_3_f32 (m, vmulq_f32 (m, m), d->poly); + + float32x4_t one_third = d->one_third; + float32x4_t two_thirds = vaddq_f32 (one_third, one_third); + + /* One iteration of Newton's method for iteratively approximating cbrt. */ + float32x4_t m_by_3 = vmulq_f32 (m, one_third); + float32x4_t a + = vfmaq_f32 (vdivq_f32 (m_by_3, vmulq_f32 (p, p)), two_thirds, p); + + /* Assemble the result by the following: + + cbrt(x) = cbrt(m) * 2 ^ (e / 3). + + We can get 2 ^ round(e / 3) using ldexp and integer divide, but since e is + not necessarily a multiple of 3 we lose some information. + + Let q = 2 ^ round(e / 3), then t = 2 ^ (e / 3) / q. + + Then we know t = 2 ^ (i / 3), where i is the remainder from e / 3, which + is an integer in [-2, 2], and can be looked up in the table T. Hence the + result is assembled as: + + cbrt(x) = cbrt(m) * t * 2 ^ round(e / 3) * sign. */ + float32x4_t ef = vmulq_f32 (vcvtq_f32_s32 (e), one_third); + int32x4_t ey = vcvtq_s32_f32 (ef); + int32x4_t em3 = vsubq_s32 (e, vmulq_s32 (ey, v_s32 (3))); + + float32x4_t my = shifted_lookup (d->table, em3); + my = vmulq_f32 (my, a); + + /* Vector version of ldexpf. */ + float32x4_t y + = vreinterpretq_f32_s32 (vshlq_n_s32 (vaddq_s32 (ey, v_s32 (127)), 23)); + y = vmulq_f32 (y, my); + + if (unlikely (v_any_u16h (special))) + return special_case (x, vbslq_f32 (SignMask, x, y), special); + + /* Copy sign. */ + return vbslq_f32 (SignMask, x, y); +} + +PL_SIG (V, F, 1, cbrt, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (cbrt), 1.15) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_F1 (cbrt)) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cbrt), 0, inf, 1000000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cexpi_3u5.c b/contrib/arm-optimized-routines/pl/math/v_cexpi_3u5.c new file mode 100644 index 000000000000..5163b15926b8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cexpi_3u5.c @@ -0,0 +1,45 @@ +/* + * Double-precision vector sincos function - return-by-value interface. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_sincos_common.h" +#include "v_math.h" +#include "pl_test.h" + +static float64x2x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, uint64x2_t special, float64x2x2_t y) +{ + return (float64x2x2_t){ v_call_f64 (sin, x, y.val[0], special), + v_call_f64 (cos, x, y.val[1], special) }; +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + v_sincos_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +VPCS_ATTR float64x2x2_t +_ZGVnN2v_cexpi (float64x2_t x) +{ + const struct v_sincos_data *d = ptr_barrier (&v_sincos_data); + uint64x2_t special = check_ge_rangeval (x, d); + + float64x2x2_t sc = v_sincos_inline (x, d); + + if (unlikely (v_any_u64 (special))) + return special_case (x, special, sc); + return sc; +} + +PL_TEST_ULP (_ZGVnN2v_cexpi_sin, 2.73) +PL_TEST_ULP (_ZGVnN2v_cexpi_cos, 2.73) +#define V_CEXPI_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN2v_cexpi_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN2v_cexpi_cos, lo, hi, n) +V_CEXPI_INTERVAL (0, 0x1p23, 500000) +V_CEXPI_INTERVAL (-0, -0x1p23, 500000) +V_CEXPI_INTERVAL (0x1p23, inf, 10000) +V_CEXPI_INTERVAL (-0x1p23, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cexpif_1u8.c b/contrib/arm-optimized-routines/pl/math/v_cexpif_1u8.c new file mode 100644 index 000000000000..4897018d3090 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cexpif_1u8.c @@ -0,0 +1,47 @@ +/* + * Single-precision vector cexpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_sincosf_common.h" +#include "v_math.h" +#include "pl_test.h" + +static float32x4x2_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, uint32x4_t special, float32x4x2_t y) +{ + return (float32x4x2_t){ v_call_f32 (sinf, x, y.val[0], special), + v_call_f32 (cosf, x, y.val[1], special) }; +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + v_cexpif_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + v_cexpif_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +VPCS_ATTR float32x4x2_t +_ZGVnN4v_cexpif (float32x4_t x) +{ + const struct v_sincosf_data *d = ptr_barrier (&v_sincosf_data); + uint32x4_t special = check_ge_rangeval (x, d); + + float32x4x2_t sc = v_sincosf_inline (x, d); + + if (unlikely (v_any_u32 (special))) + return special_case (x, special, sc); + return sc; +} + +PL_TEST_ULP (_ZGVnN4v_cexpif_sin, 1.17) +PL_TEST_ULP (_ZGVnN4v_cexpif_cos, 1.31) +#define V_CEXPIF_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN4v_cexpif_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN4v_cexpif_cos, lo, hi, n) +V_CEXPIF_INTERVAL (0, 0x1p20, 500000) +V_CEXPIF_INTERVAL (-0, -0x1p20, 500000) +V_CEXPIF_INTERVAL (0x1p20, inf, 10000) +V_CEXPIF_INTERVAL (-0x1p20, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cosh_2u.c b/contrib/arm-optimized-routines/pl/math/v_cosh_2u.c new file mode 100644 index 000000000000..649c390f4622 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cosh_2u.c @@ -0,0 +1,104 @@ +/* + * Double-precision vector cosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[3]; + float64x2_t inv_ln2, ln2, shift, thres; + uint64x2_t index_mask, special_bound; +} data = { + .poly = { V2 (0x1.fffffffffffd4p-2), V2 (0x1.5555571d6b68cp-3), + V2 (0x1.5555576a59599p-5), }, + + .inv_ln2 = V2 (0x1.71547652b82fep8), /* N/ln2. */ + /* -ln2/N. */ + .ln2 = {-0x1.62e42fefa39efp-9, -0x1.abc9e3b39803f3p-64}, + .shift = V2 (0x1.8p+52), + .thres = V2 (704.0), + + .index_mask = V2 (0xff), + /* 0x1.6p9, above which exp overflows. */ + .special_bound = V2 (0x4086000000000000), +}; + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (cosh, x, y, special); +} + +/* Helper for approximating exp(x). Copied from v_exp_tail, with no + special-case handling or tail. */ +static inline float64x2_t +exp_inline (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + /* n = round(x/(ln2/N)). */ + float64x2_t z = vfmaq_f64 (d->shift, x, d->inv_ln2); + uint64x2_t u = vreinterpretq_u64_f64 (z); + float64x2_t n = vsubq_f64 (z, d->shift); + + /* r = x - n*ln2/N. */ + float64x2_t r = vfmaq_laneq_f64 (x, n, d->ln2, 0); + r = vfmaq_laneq_f64 (r, n, d->ln2, 1); + + uint64x2_t e = vshlq_n_u64 (u, 52 - V_EXP_TAIL_TABLE_BITS); + uint64x2_t i = vandq_u64 (u, d->index_mask); + + /* y = tail + exp(r) - 1 ~= r + C1 r^2 + C2 r^3 + C3 r^4. */ + float64x2_t y = vfmaq_f64 (d->poly[1], d->poly[2], r); + y = vfmaq_f64 (d->poly[0], y, r); + y = vmulq_f64 (vfmaq_f64 (v_f64 (1), y, r), r); + + /* s = 2^(n/N). */ + u = v_lookup_u64 (__v_exp_tail_data, i); + float64x2_t s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); + + return vfmaq_f64 (s, y, s); +} + +/* Approximation for vector double-precision cosh(x) using exp_inline. + cosh(x) = (exp(x) + exp(-x)) / 2. + The greatest observed error is in the scalar fall-back region, so is the + same as the scalar routine, 1.93 ULP: + _ZGVnN2v_cosh (0x1.628af341989dap+9) got 0x1.fdf28623ef921p+1021 + want 0x1.fdf28623ef923p+1021. + + The greatest observed error in the non-special region is 1.54 ULP: + _ZGVnN2v_cosh (0x1.8e205b6ecacf7p+2) got 0x1.f711dcb0c77afp+7 + want 0x1.f711dcb0c77b1p+7. */ +float64x2_t VPCS_ATTR V_NAME_D1 (cosh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + uint64x2_t special + = vcgtq_u64 (vreinterpretq_u64_f64 (ax), d->special_bound); + + /* Up to the point that exp overflows, we can use it to calculate cosh by + exp(|x|) / 2 + 1 / (2 * exp(|x|)). */ + float64x2_t t = exp_inline (ax); + float64x2_t half_t = vmulq_n_f64 (t, 0.5); + float64x2_t half_over_t = vdivq_f64 (v_f64 (0.5), t); + + /* Fall back to scalar for any special cases. */ + if (unlikely (v_any_u64 (special))) + return special_case (x, vaddq_f64 (half_t, half_over_t), special); + + return vaddq_f64 (half_t, half_over_t); +} + +PL_SIG (V, D, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (cosh), 1.43) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (cosh)) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cosh), 0, 0x1.6p9, 100000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cosh), 0x1.6p9, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_coshf_2u4.c b/contrib/arm-optimized-routines/pl/math/v_coshf_2u4.c new file mode 100644 index 000000000000..c622b0b183f1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_coshf_2u4.c @@ -0,0 +1,80 @@ +/* + * Single-precision vector cosh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_expf_inline.h" +#include "v_math.h" +#include "mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + struct v_expf_data expf_consts; + uint32x4_t tiny_bound, special_bound; +} data = { + .expf_consts = V_EXPF_DATA, + .tiny_bound = V4 (0x20000000), /* 0x1p-63: Round to 1 below this. */ + /* 0x1.5a92d8p+6: expf overflows above this, so have to use special case. */ + .special_bound = V4 (0x42ad496c), +}; + +#if !WANT_SIMD_EXCEPT +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (coshf, x, y, special); +} +#endif + +/* Single-precision vector cosh, using vector expf. + Maximum error is 2.38 ULP: + _ZGVnN4v_coshf (0x1.e8001ep+1) got 0x1.6a491ep+4 + want 0x1.6a4922p+4. */ +float32x4_t VPCS_ATTR V_NAME_F1 (cosh) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + float32x4_t ax = vabsq_f32 (x); + uint32x4_t iax = vreinterpretq_u32_f32 (ax); + uint32x4_t special = vcgeq_u32 (iax, d->special_bound); + +#if WANT_SIMD_EXCEPT + /* If fp exceptions are to be triggered correctly, fall back to the scalar + variant for all inputs if any input is a special value or above the bound + at which expf overflows. */ + if (unlikely (v_any_u32 (special))) + return v_call_f32 (coshf, x, x, v_u32 (-1)); + + uint32x4_t tiny = vcleq_u32 (iax, d->tiny_bound); + /* If any input is tiny, avoid underflow exception by fixing tiny lanes of + input to 0, which will generate no exceptions. */ + if (unlikely (v_any_u32 (tiny))) + ax = v_zerofy_f32 (ax, tiny); +#endif + + /* Calculate cosh by exp(x) / 2 + exp(-x) / 2. */ + float32x4_t t = v_expf_inline (ax, &d->expf_consts); + float32x4_t half_t = vmulq_n_f32 (t, 0.5); + float32x4_t half_over_t = vdivq_f32 (v_f32 (0.5), t); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u32 (tiny))) + return vbslq_f32 (tiny, v_f32 (1), vaddq_f32 (half_t, half_over_t)); +#else + if (unlikely (v_any_u32 (special))) + return special_case (x, vaddq_f32 (half_t, half_over_t), special); +#endif + + return vaddq_f32 (half_t, half_over_t); +} + +PL_SIG (V, F, 1, cosh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (cosh), 1.89) +PL_TEST_EXPECT_FENV (V_NAME_F1 (cosh), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cosh), 0, 0x1p-63, 100) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cosh), 0, 0x1.5a92d8p+6, 80000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cosh), 0x1.5a92d8p+6, inf, 2000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cospi_3u1.c b/contrib/arm-optimized-routines/pl/math/v_cospi_3u1.c new file mode 100644 index 000000000000..3c2ee0b74c8e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cospi_3u1.c @@ -0,0 +1,86 @@ +/* + * Double-precision vector cospi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[10]; + float64x2_t range_val; +} data = { + /* Polynomial coefficients generated using Remez algorithm, + see sinpi.sollya for details. */ + .poly = { V2 (0x1.921fb54442d184p1), V2 (-0x1.4abbce625be53p2), + V2 (0x1.466bc6775ab16p1), V2 (-0x1.32d2cce62dc33p-1), + V2 (0x1.507834891188ep-4), V2 (-0x1.e30750a28c88ep-8), + V2 (0x1.e8f48308acda4p-12), V2 (-0x1.6fc0032b3c29fp-16), + V2 (0x1.af86ae521260bp-21), V2 (-0x1.012a9870eeb7dp-25) }, + .range_val = V2 (0x1p63), +}; + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t odd, uint64x2_t cmp) +{ + /* Fall back to scalar code. */ + y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); + return v_call_f64 (cospi, x, y, cmp); +} + +/* Approximation for vector double-precision cospi(x). + Maximum Error 3.06 ULP: + _ZGVnN2v_cospi(0x1.7dd4c0b03cc66p-5) got 0x1.fa854babfb6bep-1 + want 0x1.fa854babfb6c1p-1. */ +float64x2_t VPCS_ATTR V_NAME_D1 (cospi) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + float64x2_t r = vabsq_f64 (x); + uint64x2_t cmp = vcaleq_f64 (v_f64 (0x1p64), x); + + /* When WANT_SIMD_EXCEPT = 1, special lanes should be zero'd + to avoid them overflowing and throwing exceptions. */ + r = v_zerofy_f64 (r, cmp); + uint64x2_t odd = vshlq_n_u64 (vcvtnq_u64_f64 (r), 63); + +#else + float64x2_t r = x; + uint64x2_t cmp = vcageq_f64 (r, d->range_val); + uint64x2_t odd + = vshlq_n_u64 (vreinterpretq_u64_s64 (vcvtaq_s64_f64 (r)), 63); + +#endif + + r = vsubq_f64 (r, vrndaq_f64 (r)); + + /* cospi(x) = sinpi(0.5 - abs(x)) for values -1/2 .. 1/2. */ + r = vsubq_f64 (v_f64 (0.5), vabsq_f64 (r)); + + /* y = sin(r). */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t r4 = vmulq_f64 (r2, r2); + float64x2_t y = vmulq_f64 (v_pw_horner_9_f64 (r2, r4, d->poly), r); + + /* Fallback to scalar. */ + if (unlikely (v_any_u64 (cmp))) + return special_case (x, y, odd, cmp); + + /* Reintroduce the sign bit for inputs which round to odd. */ + return vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); +} + +PL_SIG (V, D, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (V_NAME_D1 (cospi), 2.56) +PL_TEST_EXPECT_FENV (V_NAME_D1 (cospi), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cospi), 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cospi), 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cospi), 0.5, 0x1p51, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (cospi), 0x1p51, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_cospif_3u2.c b/contrib/arm-optimized-routines/pl/math/v_cospif_3u2.c new file mode 100644 index 000000000000..d88aa828439d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_cospif_3u2.c @@ -0,0 +1,83 @@ +/* + * Single-precision vector cospi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[6]; + float32x4_t range_val; +} data = { + /* Taylor series coefficents for sin(pi * x). */ + .poly = { V4 (0x1.921fb6p1f), V4 (-0x1.4abbcep2f), V4 (0x1.466bc6p1f), + V4 (-0x1.32d2ccp-1f), V4 (0x1.50783p-4f), V4 (-0x1.e30750p-8f) }, + .range_val = V4 (0x1p31f), +}; + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp) +{ + y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); + return v_call_f32 (cospif, x, y, cmp); +} + +/* Approximation for vector single-precision cospi(x) + Maximum Error: 3.17 ULP: + _ZGVnN4v_cospif(0x1.d341a8p-5) got 0x1.f7cd56p-1 + want 0x1.f7cd5p-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (cospi) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + float32x4_t r = vabsq_f32 (x); + uint32x4_t cmp = vcaleq_f32 (v_f32 (0x1p32f), x); + + /* When WANT_SIMD_EXCEPT = 1, special lanes should be zero'd + to avoid them overflowing and throwing exceptions. */ + r = v_zerofy_f32 (r, cmp); + uint32x4_t odd = vshlq_n_u32 (vcvtnq_u32_f32 (r), 31); + +#else + float32x4_t r = x; + uint32x4_t cmp = vcageq_f32 (r, d->range_val); + + uint32x4_t odd + = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtaq_s32_f32 (r)), 31); + +#endif + + /* r = x - rint(x). */ + r = vsubq_f32 (r, vrndaq_f32 (r)); + + /* cospi(x) = sinpi(0.5 - abs(x)) for values -1/2 .. 1/2. */ + r = vsubq_f32 (v_f32 (0.5f), vabsq_f32 (r)); + + /* Pairwise Horner approximation for y = sin(r * pi). */ + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t r4 = vmulq_f32 (r2, r2); + float32x4_t y = vmulq_f32 (v_pw_horner_5_f32 (r2, r4, d->poly), r); + + /* Fallback to scalar. */ + if (unlikely (v_any_u32 (cmp))) + return special_case (x, y, odd, cmp); + + /* Reintroduce the sign bit for inputs which round to odd. */ + return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); +} + +PL_SIG (V, F, 1, cospi, -0.9, 0.9) +PL_TEST_ULP (V_NAME_F1 (cospi), 2.67) +PL_TEST_EXPECT_FENV (V_NAME_F1 (cospi), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cospi), 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cospi), 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cospi), 0.5, 0x1p32f, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (cospi), 0x1p32f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_erf_2u5.c b/contrib/arm-optimized-routines/pl/math/v_erf_2u5.c new file mode 100644 index 000000000000..e581ec5bb8a7 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erf_2u5.c @@ -0,0 +1,158 @@ +/* + * Double-precision vector erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t third; + float64x2_t tenth, two_over_five, two_over_fifteen; + float64x2_t two_over_nine, two_over_fortyfive; + float64x2_t max, shift; +#if WANT_SIMD_EXCEPT + float64x2_t tiny_bound, huge_bound, scale_minus_one; +#endif +} data = { + .third = V2 (0x1.5555555555556p-2), /* used to compute 2/3 and 1/6 too. */ + .two_over_fifteen = V2 (0x1.1111111111111p-3), + .tenth = V2 (-0x1.999999999999ap-4), + .two_over_five = V2 (-0x1.999999999999ap-2), + .two_over_nine = V2 (-0x1.c71c71c71c71cp-3), + .two_over_fortyfive = V2 (0x1.6c16c16c16c17p-5), + .max = V2 (5.9921875), /* 6 - 1/128. */ + .shift = V2 (0x1p45), +#if WANT_SIMD_EXCEPT + .huge_bound = V2 (0x1p205), + .tiny_bound = V2 (0x1p-226), + .scale_minus_one = V2 (0x1.06eba8214db69p-3), /* 2/sqrt(pi) - 1.0. */ +#endif +}; + +#define AbsMask 0x7fffffffffffffff + +struct entry +{ + float64x2_t erf; + float64x2_t scale; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + struct entry e; + float64x2_t e1 = vld1q_f64 ((float64_t *) (__erf_data.tab + i[0])), + e2 = vld1q_f64 ((float64_t *) (__erf_data.tab + i[1])); + e.erf = vuzp1q_f64 (e1, e2); + e.scale = vuzp2q_f64 (e1, e2); + return e; +} + +/* Double-precision implementation of vector erf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erf(x) ~ erf(r) + scale * d * [ + + 1 + - r d + + 1/3 (2 r^2 - 1) d^2 + - 1/6 (r (2 r^2 - 3)) d^3 + + 1/30 (4 r^4 - 12 r^2 + 3) d^4 + - 1/90 (4 r^4 - 20 r^2 + 15) d^5 + ] + + Maximum measure error: 2.29 ULP + V_NAME_D1 (erf)(-0x1.00003c924e5d1p-8) got -0x1.20dd59132ebadp-8 + want -0x1.20dd59132ebafp-8. */ +float64x2_t VPCS_ATTR V_NAME_D1 (erf) (float64x2_t x) +{ + const struct data *dat = ptr_barrier (&data); + + float64x2_t a = vabsq_f64 (x); + /* Reciprocal conditions that do not catch NaNs so they can be used in BSLs + to return expected results. */ + uint64x2_t a_le_max = vcleq_f64 (a, dat->max); + uint64x2_t a_gt_max = vcgtq_f64 (a, dat->max); + +#if WANT_SIMD_EXCEPT + /* |x| huge or tiny. */ + uint64x2_t cmp1 = vcgtq_f64 (a, dat->huge_bound); + uint64x2_t cmp2 = vcltq_f64 (a, dat->tiny_bound); + uint64x2_t cmp = vorrq_u64 (cmp1, cmp2); + /* If any lanes are special, mask them with 1 for small x or 8 for large + values and retain a copy of a to allow special case handler to fix special + lanes later. This is only necessary if fenv exceptions are to be triggered + correctly. */ + if (unlikely (v_any_u64 (cmp))) + { + a = vbslq_f64 (cmp1, v_f64 (8.0), a); + a = vbslq_f64 (cmp2, v_f64 (1.0), a); + } +#endif + + /* Set r to multiple of 1/128 nearest to |x|. */ + float64x2_t shift = dat->shift; + float64x2_t z = vaddq_f64 (a, shift); + + /* Lookup erf(r) and scale(r) in table, without shortcut for small values, + but with saturated indices for large values and NaNs in order to avoid + segfault. */ + uint64x2_t i + = vsubq_u64 (vreinterpretq_u64_f64 (z), vreinterpretq_u64_f64 (shift)); + i = vbslq_u64 (a_le_max, i, v_u64 (768)); + struct entry e = lookup (i); + + float64x2_t r = vsubq_f64 (z, shift); + + /* erf(x) ~ erf(r) + scale * d * poly (r, d). */ + float64x2_t d = vsubq_f64 (a, r); + float64x2_t d2 = vmulq_f64 (d, d); + float64x2_t r2 = vmulq_f64 (r, r); + + /* poly (d, r) = 1 + p1(r) * d + p2(r) * d^2 + ... + p5(r) * d^5. */ + float64x2_t p1 = r; + float64x2_t p2 + = vfmsq_f64 (dat->third, r2, vaddq_f64 (dat->third, dat->third)); + float64x2_t p3 = vmulq_f64 (r, vfmaq_f64 (v_f64 (-0.5), r2, dat->third)); + float64x2_t p4 = vfmaq_f64 (dat->two_over_five, r2, dat->two_over_fifteen); + p4 = vfmsq_f64 (dat->tenth, r2, p4); + float64x2_t p5 = vfmaq_f64 (dat->two_over_nine, r2, dat->two_over_fortyfive); + p5 = vmulq_f64 (r, vfmaq_f64 (vmulq_f64 (v_f64 (0.5), dat->third), r2, p5)); + + float64x2_t p34 = vfmaq_f64 (p3, d, p4); + float64x2_t p12 = vfmaq_f64 (p1, d, p2); + float64x2_t y = vfmaq_f64 (p34, d2, p5); + y = vfmaq_f64 (p12, d2, y); + + y = vfmaq_f64 (e.erf, e.scale, vfmsq_f64 (d, d2, y)); + + /* Solves the |x| = inf and NaN cases. */ + y = vbslq_f64 (a_gt_max, v_f64 (1.0), y); + + /* Copy sign. */ + y = vbslq_f64 (v_u64 (AbsMask), y, x); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u64 (cmp2))) + { + /* Neutralise huge values of x before fixing small values. */ + x = vbslq_f64 (cmp1, v_f64 (1.0), x); + /* Fix tiny values that trigger spurious underflow. */ + return vbslq_f64 (cmp2, vfmaq_f64 (x, dat->scale_minus_one, x), y); + } +#endif + return y; +} + +PL_SIG (V, D, 1, erf, -6.0, 6.0) +PL_TEST_ULP (V_NAME_D1 (erf), 1.79) +PL_TEST_EXPECT_FENV (V_NAME_D1 (erf), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (erf), 0, 5.9921875, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (erf), 5.9921875, inf, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (erf), 0, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_erfc_1u8.c b/contrib/arm-optimized-routines/pl/math/v_erfc_1u8.c new file mode 100644 index 000000000000..10ef7e6a3c34 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erfc_1u8.c @@ -0,0 +1,198 @@ +/* + * Double-precision vector erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint64x2_t offset, table_scale; + float64x2_t max, shift; + float64x2_t p20, p40, p41, p42; + float64x2_t p51, p52; + float64x2_t qr5, qr6, qr7, qr8, qr9; +#if WANT_SIMD_EXCEPT + float64x2_t uflow_bound; +#endif +} data = { + /* Set an offset so the range of the index used for lookup is 3487, and it + can be clamped using a saturated add on an offset index. + Index offset is 0xffffffffffffffff - asuint64(shift) - 3487. */ + .offset = V2 (0xbd3ffffffffff260), + .table_scale = V2 (0x37f0000000000000 << 1), /* asuint64 (2^-128) << 1. */ + .max = V2 (0x1.b3ep+4), /* 3487/128. */ + .shift = V2 (0x1p45), + .p20 = V2 (0x1.5555555555555p-2), /* 1/3, used to compute 2/3 and 1/6. */ + .p40 = V2 (-0x1.999999999999ap-4), /* 1/10. */ + .p41 = V2 (-0x1.999999999999ap-2), /* 2/5. */ + .p42 = V2 (0x1.1111111111111p-3), /* 2/15. */ + .p51 = V2 (-0x1.c71c71c71c71cp-3), /* 2/9. */ + .p52 = V2 (0x1.6c16c16c16c17p-5), /* 2/45. */ + /* Qi = (i+1) / i, Ri = -2 * i / ((i+1)*(i+2)), for i = 5, ..., 9. */ + .qr5 = { 0x1.3333333333333p0, -0x1.e79e79e79e79ep-3 }, + .qr6 = { 0x1.2aaaaaaaaaaabp0, -0x1.b6db6db6db6dbp-3 }, + .qr7 = { 0x1.2492492492492p0, -0x1.8e38e38e38e39p-3 }, + .qr8 = { 0x1.2p0, -0x1.6c16c16c16c17p-3 }, + .qr9 = { 0x1.1c71c71c71c72p0, -0x1.4f2094f2094f2p-3 }, +#if WANT_SIMD_EXCEPT + .uflow_bound = V2 (0x1.a8b12fc6e4892p+4), +#endif +}; + +#define TinyBound 0x4000000000000000 /* 0x1p-511 << 1. */ +#define Off 0xfffffffffffff260 /* 0xffffffffffffffff - 3487. */ + +struct entry +{ + float64x2_t erfc; + float64x2_t scale; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + struct entry e; + float64x2_t e1 = vld1q_f64 ((float64_t *) (__erfc_data.tab - Off + i[0])), + e2 = vld1q_f64 ((float64_t *) (__erfc_data.tab - Off + i[1])); + e.erfc = vuzp1q_f64 (e1, e2); + e.scale = vuzp2q_f64 (e1, e2); + return e; +} + +#if WANT_SIMD_EXCEPT +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t cmp) +{ + return v_call_f64 (erfc, x, y, cmp); +} +#endif + +/* Optimized double-precision vector erfc(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + - r * (2/45 r^4 - 2/9 r^2 + 1/6) d^5 + + p6(r) d^6 + ... + p10(r) d^10 + + Polynomials p6(r) to p10(r) are computed using recurrence relation + + 2(i+1)p_i + 2r(i+2)p_{i+1} + (i+2)(i+3)p_{i+2} = 0, + with p0 = 1, and p1(r) = -r. + + Values of erfc(r) and scale are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + + Maximum measured error: 1.71 ULP + V_NAME_D1 (erfc)(0x1.46cfe976733p+4) got 0x1.e15fcbea3e7afp-608 + want 0x1.e15fcbea3e7adp-608. */ +VPCS_ATTR +float64x2_t V_NAME_D1 (erfc) (float64x2_t x) +{ + const struct data *dat = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + /* |x| < 2^-511. Avoid fabs by left-shifting by 1. */ + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint64x2_t cmp = vcltq_u64 (vaddq_u64 (ix, ix), v_u64 (TinyBound)); + /* x >= ~26.54 (into subnormal case and uflow case). Comparison is done in + integer domain to avoid raising exceptions in presence of nans. */ + uint64x2_t uflow = vcgeq_s64 (vreinterpretq_s64_f64 (x), + vreinterpretq_s64_f64 (dat->uflow_bound)); + cmp = vorrq_u64 (cmp, uflow); + float64x2_t xm = x; + /* If any lanes are special, mask them with 0 and retain a copy of x to allow + special case handler to fix special lanes later. This is only necessary if + fenv exceptions are to be triggered correctly. */ + if (unlikely (v_any_u64 (cmp))) + x = v_zerofy_f64 (x, cmp); +#endif + + float64x2_t a = vabsq_f64 (x); + a = vminq_f64 (a, dat->max); + + /* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 0 and scale to + 2/sqrt(pi), when x reduced to r = 0. */ + float64x2_t shift = dat->shift; + float64x2_t z = vaddq_f64 (a, shift); + + /* Clamp index to a range of 3487. A naive approach would use a subtract and + min. Instead we offset the table address and the index, then use a + saturating add. */ + uint64x2_t i = vqaddq_u64 (vreinterpretq_u64_f64 (z), dat->offset); + + struct entry e = lookup (i); + + /* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */ + float64x2_t r = vsubq_f64 (z, shift); + float64x2_t d = vsubq_f64 (a, r); + float64x2_t d2 = vmulq_f64 (d, d); + float64x2_t r2 = vmulq_f64 (r, r); + + float64x2_t p1 = r; + float64x2_t p2 = vfmsq_f64 (dat->p20, r2, vaddq_f64 (dat->p20, dat->p20)); + float64x2_t p3 = vmulq_f64 (r, vfmaq_f64 (v_f64 (-0.5), r2, dat->p20)); + float64x2_t p4 = vfmaq_f64 (dat->p41, r2, dat->p42); + p4 = vfmsq_f64 (dat->p40, r2, p4); + float64x2_t p5 = vfmaq_f64 (dat->p51, r2, dat->p52); + p5 = vmulq_f64 (r, vfmaq_f64 (vmulq_f64 (v_f64 (0.5), dat->p20), r2, p5)); + /* Compute p_i using recurrence relation: + p_{i+2} = (p_i + r * Q_{i+1} * p_{i+1}) * R_{i+1}. */ + float64x2_t p6 = vfmaq_f64 (p4, p5, vmulq_laneq_f64 (r, dat->qr5, 0)); + p6 = vmulq_laneq_f64 (p6, dat->qr5, 1); + float64x2_t p7 = vfmaq_f64 (p5, p6, vmulq_laneq_f64 (r, dat->qr6, 0)); + p7 = vmulq_laneq_f64 (p7, dat->qr6, 1); + float64x2_t p8 = vfmaq_f64 (p6, p7, vmulq_laneq_f64 (r, dat->qr7, 0)); + p8 = vmulq_laneq_f64 (p8, dat->qr7, 1); + float64x2_t p9 = vfmaq_f64 (p7, p8, vmulq_laneq_f64 (r, dat->qr8, 0)); + p9 = vmulq_laneq_f64 (p9, dat->qr8, 1); + float64x2_t p10 = vfmaq_f64 (p8, p9, vmulq_laneq_f64 (r, dat->qr9, 0)); + p10 = vmulq_laneq_f64 (p10, dat->qr9, 1); + /* Compute polynomial in d using pairwise Horner scheme. */ + float64x2_t p90 = vfmaq_f64 (p9, d, p10); + float64x2_t p78 = vfmaq_f64 (p7, d, p8); + float64x2_t p56 = vfmaq_f64 (p5, d, p6); + float64x2_t p34 = vfmaq_f64 (p3, d, p4); + float64x2_t p12 = vfmaq_f64 (p1, d, p2); + float64x2_t y = vfmaq_f64 (p78, d2, p90); + y = vfmaq_f64 (p56, d2, y); + y = vfmaq_f64 (p34, d2, y); + y = vfmaq_f64 (p12, d2, y); + + y = vfmsq_f64 (e.erfc, e.scale, vfmsq_f64 (d, d2, y)); + + /* Offset equals 2.0 if sign, else 0.0. */ + uint64x2_t sign = vshrq_n_u64 (vreinterpretq_u64_f64 (x), 63); + float64x2_t off = vreinterpretq_f64_u64 (vshlq_n_u64 (sign, 62)); + /* Copy sign and scale back in a single fma. Since the bit patterns do not + overlap, then logical or and addition are equivalent here. */ + float64x2_t fac = vreinterpretq_f64_u64 ( + vsraq_n_u64 (vshlq_n_u64 (sign, 63), dat->table_scale, 1)); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u64 (cmp))) + return special_case (xm, vfmaq_f64 (off, fac, y), cmp); +#endif + + return vfmaq_f64 (off, fac, y); +} + +PL_SIG (V, D, 1, erfc, -6.0, 28.0) +PL_TEST_ULP (V_NAME_D1 (erfc), 1.21) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (erfc), 0, 0x1p-26, 40000) +PL_TEST_INTERVAL (V_NAME_D1 (erfc), 0x1p-26, 28.0, 40000) +PL_TEST_INTERVAL (V_NAME_D1 (erfc), -0x1p-26, -6.0, 40000) +PL_TEST_INTERVAL (V_NAME_D1 (erfc), 28.0, inf, 40000) +PL_TEST_INTERVAL (V_NAME_D1 (erfc), -6.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_erfcf_1u7.c b/contrib/arm-optimized-routines/pl/math/v_erfcf_1u7.c new file mode 100644 index 000000000000..c361d0704438 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erfcf_1u7.c @@ -0,0 +1,166 @@ +/* + * Single-precision vector erfc(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint32x4_t offset, table_scale; + float32x4_t max, shift; + float32x4_t coeffs, third, two_over_five, tenth; +#if WANT_SIMD_EXCEPT + float32x4_t uflow_bound; +#endif + +} data = { + /* Set an offset so the range of the index used for lookup is 644, and it can + be clamped using a saturated add. */ + .offset = V4 (0xb7fffd7b), /* 0xffffffff - asuint(shift) - 644. */ + .table_scale = V4 (0x28000000 << 1), /* asuint (2^-47) << 1. */ + .max = V4 (10.0625f), /* 10 + 1/16 = 644/64. */ + .shift = V4 (0x1p17f), + /* Store 1/3, 2/3 and 2/15 in a single register for use with indexed muls and + fmas. */ + .coeffs = (float32x4_t){ 0x1.555556p-2f, 0x1.555556p-1f, 0x1.111112p-3f, 0 }, + .third = V4 (0x1.555556p-2f), + .two_over_five = V4 (-0x1.99999ap-2f), + .tenth = V4 (-0x1.99999ap-4f), +#if WANT_SIMD_EXCEPT + .uflow_bound = V4 (0x1.2639cp+3f), +#endif +}; + +#define TinyBound 0x41000000 /* 0x1p-62f << 1. */ +#define Thres 0xbe000000 /* asuint(infinity) << 1 - TinyBound. */ +#define Off 0xfffffd7b /* 0xffffffff - 644. */ + +struct entry +{ + float32x4_t erfc; + float32x4_t scale; +}; + +static inline struct entry +lookup (uint32x4_t i) +{ + struct entry e; + float64_t t0 = *((float64_t *) (__erfcf_data.tab - Off + i[0])); + float64_t t1 = *((float64_t *) (__erfcf_data.tab - Off + i[1])); + float64_t t2 = *((float64_t *) (__erfcf_data.tab - Off + i[2])); + float64_t t3 = *((float64_t *) (__erfcf_data.tab - Off + i[3])); + float32x4_t e1 = vreinterpretq_f32_f64 ((float64x2_t){ t0, t1 }); + float32x4_t e2 = vreinterpretq_f32_f64 ((float64x2_t){ t2, t3 }); + e.erfc = vuzp1q_f32 (e1, e2); + e.scale = vuzp2q_f32 (e1, e2); + return e; +} + +#if WANT_SIMD_EXCEPT +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) +{ + return v_call_f32 (erfcf, x, y, cmp); +} +#endif + +/* Optimized single-precision vector erfcf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/64. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erfc(x) ~ erfc(r) - scale * d * poly(r, d), with + + poly(r, d) = 1 - r d + (2/3 r^2 - 1/3) d^2 - r (1/3 r^2 - 1/2) d^3 + + (2/15 r^4 - 2/5 r^2 + 1/10) d^4 + + Values of erfc(r) and scale are read from lookup tables. Stored values + are scaled to avoid hitting the subnormal range. + + Note that for x < 0, erfc(x) = 2.0 - erfc(-x). + Maximum error: 1.63 ULP (~1.0 ULP for x < 0.0). + _ZGVnN4v_erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120 + want 0x1.f51216p-120. */ +VPCS_ATTR +float32x4_t V_NAME_F1 (erfc) (float32x4_t x) +{ + const struct data *dat = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + /* |x| < 2^-62. Avoid fabs by left-shifting by 1. */ + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t cmp = vcltq_u32 (vaddq_u32 (ix, ix), v_u32 (TinyBound)); + /* x >= ~9.19 (into subnormal case and uflow case). Comparison is done in + integer domain to avoid raising exceptions in presence of nans. */ + uint32x4_t uflow = vcgeq_s32 (vreinterpretq_s32_f32 (x), + vreinterpretq_s32_f32 (dat->uflow_bound)); + cmp = vorrq_u32 (cmp, uflow); + float32x4_t xm = x; + /* If any lanes are special, mask them with 0 and retain a copy of x to allow + special case handler to fix special lanes later. This is only necessary if + fenv exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = v_zerofy_f32 (x, cmp); +#endif + + float32x4_t a = vabsq_f32 (x); + a = vminq_f32 (a, dat->max); + + /* Lookup erfc(r) and scale(r) in tables, e.g. set erfc(r) to 0 and scale to + 2/sqrt(pi), when x reduced to r = 0. */ + float32x4_t shift = dat->shift; + float32x4_t z = vaddq_f32 (a, shift); + + /* Clamp index to a range of 644. A naive approach would use a subtract and + min. Instead we offset the table address and the index, then use a + saturating add. */ + uint32x4_t i = vqaddq_u32 (vreinterpretq_u32_f32 (z), dat->offset); + + struct entry e = lookup (i); + + /* erfc(x) ~ erfc(r) - scale * d * poly(r, d). */ + float32x4_t r = vsubq_f32 (z, shift); + float32x4_t d = vsubq_f32 (a, r); + float32x4_t d2 = vmulq_f32 (d, d); + float32x4_t r2 = vmulq_f32 (r, r); + + float32x4_t p1 = r; + float32x4_t p2 = vfmsq_laneq_f32 (dat->third, r2, dat->coeffs, 1); + float32x4_t p3 + = vmulq_f32 (r, vfmaq_laneq_f32 (v_f32 (-0.5), r2, dat->coeffs, 0)); + float32x4_t p4 = vfmaq_laneq_f32 (dat->two_over_five, r2, dat->coeffs, 2); + p4 = vfmsq_f32 (dat->tenth, r2, p4); + + float32x4_t y = vfmaq_f32 (p3, d, p4); + y = vfmaq_f32 (p2, d, y); + y = vfmaq_f32 (p1, d, y); + y = vfmsq_f32 (e.erfc, e.scale, vfmsq_f32 (d, d2, y)); + + /* Offset equals 2.0f if sign, else 0.0f. */ + uint32x4_t sign = vshrq_n_u32 (vreinterpretq_u32_f32 (x), 31); + float32x4_t off = vreinterpretq_f32_u32 (vshlq_n_u32 (sign, 30)); + /* Copy sign and scale back in a single fma. Since the bit patterns do not + overlap, then logical or and addition are equivalent here. */ + float32x4_t fac = vreinterpretq_f32_u32 ( + vsraq_n_u32 (vshlq_n_u32 (sign, 31), dat->table_scale, 1)); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u32 (cmp))) + return special_case (xm, vfmaq_f32 (off, fac, y), cmp); +#endif + + return vfmaq_f32 (off, fac, y); +} + +PL_SIG (V, F, 1, erfc, -4.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (erfc), 1.14) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (erfc), 0, 0x1p-26, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (erfc), 0x1p-26, 10.0625, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (erfc), -0x1p-26, -4.0, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (erfc), 10.0625, inf, 40000) +PL_TEST_INTERVAL (V_NAME_F1 (erfc), -4.0, -inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_erff_2u.c b/contrib/arm-optimized-routines/pl/math/v_erff_2u.c new file mode 100644 index 000000000000..502526407df2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erff_2u.c @@ -0,0 +1,118 @@ +/* + * Single-precision vector erf(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t max, shift, third; +#if WANT_SIMD_EXCEPT + float32x4_t tiny_bound, scale_minus_one; +#endif +} data = { + .max = V4 (3.9375), /* 4 - 8/128. */ + .shift = V4 (0x1p16f), + .third = V4 (0x1.555556p-2f), /* 1/3. */ +#if WANT_SIMD_EXCEPT + .tiny_bound = V4 (0x1p-62f), + .scale_minus_one = V4 (0x1.06eba8p-3f), /* scale - 1.0. */ +#endif +}; + +#define AbsMask 0x7fffffff + +struct entry +{ + float32x4_t erf; + float32x4_t scale; +}; + +static inline struct entry +lookup (uint32x4_t i) +{ + struct entry e; + float64_t t0 = *((float64_t *) (__erff_data.tab + i[0])); + float64_t t1 = *((float64_t *) (__erff_data.tab + i[1])); + float64_t t2 = *((float64_t *) (__erff_data.tab + i[2])); + float64_t t3 = *((float64_t *) (__erff_data.tab + i[3])); + float32x4_t e1 = vreinterpretq_f32_f64 ((float64x2_t){ t0, t1 }); + float32x4_t e2 = vreinterpretq_f32_f64 ((float64x2_t){ t2, t3 }); + e.erf = vuzp1q_f32 (e1, e2); + e.scale = vuzp2q_f32 (e1, e2); + return e; +} + +/* Single-precision implementation of vector erf(x). + Approximation based on series expansion near x rounded to + nearest multiple of 1/128. + Let d = x - r, and scale = 2 / sqrt(pi) * exp(-r^2). For x near r, + + erf(x) ~ erf(r) + scale * d * [1 - r * d - 1/3 * d^2] + + Values of erf(r) and scale are read from lookup tables. + For |x| > 3.9375, erf(|x|) rounds to 1.0f. + + Maximum error: 1.93 ULP + _ZGVnN4v_erff(0x1.c373e6p-9) got 0x1.fd686cp-9 + want 0x1.fd6868p-9. */ +float32x4_t VPCS_ATTR V_NAME_F1 (erf) (float32x4_t x) +{ + const struct data *dat = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + /* |x| < 2^-62. */ + uint32x4_t cmp = vcaltq_f32 (x, dat->tiny_bound); + float32x4_t xm = x; + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special case handler to fix special lanes later. This is only necessary if + fenv exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = vbslq_f32 (cmp, v_f32 (1), x); +#endif + + float32x4_t a = vabsq_f32 (x); + uint32x4_t a_gt_max = vcgtq_f32 (a, dat->max); + + /* Lookup erf(r) and scale(r) in tables, e.g. set erf(r) to 0 and scale to + 2/sqrt(pi), when x reduced to r = 0. */ + float32x4_t shift = dat->shift; + float32x4_t z = vaddq_f32 (a, shift); + + uint32x4_t i + = vsubq_u32 (vreinterpretq_u32_f32 (z), vreinterpretq_u32_f32 (shift)); + i = vminq_u32 (i, v_u32 (512)); + struct entry e = lookup (i); + + float32x4_t r = vsubq_f32 (z, shift); + + /* erf(x) ~ erf(r) + scale * d * (1 - r * d - 1/3 * d^2). */ + float32x4_t d = vsubq_f32 (a, r); + float32x4_t d2 = vmulq_f32 (d, d); + float32x4_t y = vfmaq_f32 (r, dat->third, d); + y = vfmaq_f32 (e.erf, e.scale, vfmsq_f32 (d, d2, y)); + + /* Solves the |x| = inf case. */ + y = vbslq_f32 (a_gt_max, v_f32 (1.0f), y); + + /* Copy sign. */ + y = vbslq_f32 (v_u32 (AbsMask), y, x); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u32 (cmp))) + return vbslq_f32 (cmp, vfmaq_f32 (xm, dat->scale_minus_one, xm), y); +#endif + return y; +} + +PL_SIG (V, F, 1, erf, -4.0, 4.0) +PL_TEST_ULP (V_NAME_F1 (erf), 1.43) +PL_TEST_EXPECT_FENV (V_NAME_F1 (erf), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (erf), 0, 3.9375, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (erf), 3.9375, inf, 40000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (erf), 0, inf, 40000) diff --git a/contrib/arm-optimized-routines/pl/math/v_erfinv_25u.c b/contrib/arm-optimized-routines/pl/math/v_erfinv_25u.c new file mode 100644 index 000000000000..654a7336e85b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erfinv_25u.c @@ -0,0 +1,161 @@ +/* + * Double-precision inverse error function (AdvSIMD variant). + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "v_math.h" +#include "pl_test.h" +#include "mathlib.h" +#include "math_config.h" +#include "pl_sig.h" +#include "poly_advsimd_f64.h" +#define V_LOG_INLINE_POLY_ORDER 4 +#include "v_log_inline.h" + +const static struct data +{ + /* We use P_N and Q_N to refer to arrays of coefficients, where P_N is the + coeffs of the numerator in table N of Blair et al, and Q_N is the coeffs + of the denominator. P is interleaved P_17 and P_37, similar for Q. P17 + and Q17 are provided as homogenous vectors as well for when the shortcut + can be taken. */ + double P[8][2], Q[7][2]; + float64x2_t tailshift; + uint8x16_t idx; + struct v_log_inline_data log_tbl; + float64x2_t P_57[9], Q_57[10], P_17[7], Q_17[6]; +} data = { .P = { { 0x1.007ce8f01b2e8p+4, -0x1.f3596123109edp-7 }, + { -0x1.6b23cc5c6c6d7p+6, 0x1.60b8fe375999ep-2 }, + { 0x1.74e5f6ceb3548p+7, -0x1.779bb9bef7c0fp+1 }, + { -0x1.5200bb15cc6bbp+7, 0x1.786ea384470a2p+3 }, + { 0x1.05d193233a849p+6, -0x1.6a7c1453c85d3p+4 }, + { -0x1.148c5474ee5e1p+3, 0x1.31f0fc5613142p+4 }, + { 0x1.689181bbafd0cp-3, -0x1.5ea6c007d4dbbp+2 }, + { 0, 0x1.e66f265ce9e5p-3 } }, + .Q = { { 0x1.d8fb0f913bd7bp+3, -0x1.636b2dcf4edbep-7 }, + { -0x1.6d7f25a3f1c24p+6, 0x1.0b5411e2acf29p-2 }, + { 0x1.a450d8e7f4cbbp+7, -0x1.3413109467a0bp+1 }, + { -0x1.bc3480485857p+7, 0x1.563e8136c554ap+3 }, + { 0x1.ae6b0c504ee02p+6, -0x1.7b77aab1dcafbp+4 }, + { -0x1.499dfec1a7f5fp+4, 0x1.8a3e174e05ddcp+4 }, + { 0x1p+0, -0x1.4075c56404eecp+3 } }, + .P_57 = { V2 (0x1.b874f9516f7f1p-14), V2 (0x1.5921f2916c1c4p-7), + V2 (0x1.145ae7d5b8fa4p-2), V2 (0x1.29d6dcc3b2fb7p+1), + V2 (0x1.cabe2209a7985p+2), V2 (0x1.11859f0745c4p+3), + V2 (0x1.b7ec7bc6a2ce5p+2), V2 (0x1.d0419e0bb42aep+1), + V2 (0x1.c5aa03eef7258p-1) }, + .Q_57 = { V2 (0x1.b8747e12691f1p-14), V2 (0x1.59240d8ed1e0ap-7), + V2 (0x1.14aef2b181e2p-2), V2 (0x1.2cd181bcea52p+1), + V2 (0x1.e6e63e0b7aa4cp+2), V2 (0x1.65cf8da94aa3ap+3), + V2 (0x1.7e5c787b10a36p+3), V2 (0x1.0626d68b6cea3p+3), + V2 (0x1.065c5f193abf6p+2), V2 (0x1p+0) }, + .P_17 = { V2 (0x1.007ce8f01b2e8p+4), V2 (-0x1.6b23cc5c6c6d7p+6), + V2 (0x1.74e5f6ceb3548p+7), V2 (-0x1.5200bb15cc6bbp+7), + V2 (0x1.05d193233a849p+6), V2 (-0x1.148c5474ee5e1p+3), + V2 (0x1.689181bbafd0cp-3) }, + .Q_17 = { V2 (0x1.d8fb0f913bd7bp+3), V2 (-0x1.6d7f25a3f1c24p+6), + V2 (0x1.a450d8e7f4cbbp+7), V2 (-0x1.bc3480485857p+7), + V2 (0x1.ae6b0c504ee02p+6), V2 (-0x1.499dfec1a7f5fp+4) }, + .tailshift = V2 (-0.87890625), + .idx = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, + .log_tbl = V_LOG_CONSTANTS }; + +static inline float64x2_t +special (float64x2_t x, const struct data *d) +{ + /* Note erfinv(inf) should return NaN, and erfinv(1) should return Inf. + By using log here, instead of log1p, we return finite values for both + these inputs, and values outside [-1, 1]. This is non-compliant, but is an + acceptable optimisation at Ofast. To get correct behaviour for all finite + values use the log1p_inline helper on -abs(x) - note that erfinv(inf) + will still be finite. */ + float64x2_t t = vnegq_f64 ( + v_log_inline (vsubq_f64 (v_f64 (1), vabsq_f64 (x)), &d->log_tbl)); + t = vdivq_f64 (v_f64 (1), vsqrtq_f64 (t)); + float64x2_t ts = vbslq_f64 (v_u64 (0x7fffffffffffffff), t, x); + return vdivq_f64 (v_horner_8_f64 (t, d->P_57), + vmulq_f64 (ts, v_horner_9_f64 (t, d->Q_57))); +} + +static inline float64x2_t +lookup (const double *c, uint8x16_t idx) +{ + float64x2_t x = vld1q_f64 (c); + return vreinterpretq_f64_u8 (vqtbl1q_u8 (vreinterpretq_u8_f64 (x), idx)); +} + +static inline float64x2_t VPCS_ATTR +notails (float64x2_t x, const struct data *d) +{ + /* Shortcut when no input is in a tail region - no need to gather shift or + coefficients. */ + float64x2_t t = vfmaq_f64 (v_f64 (-0.5625), x, x); + float64x2_t p = vmulq_f64 (v_horner_6_f64 (t, d->P_17), x); + float64x2_t q = vaddq_f64 (d->Q_17[5], t); + for (int i = 4; i >= 0; i--) + q = vfmaq_f64 (d->Q_17[i], q, t); + return vdivq_f64 (p, q); +} + +/* Vector implementation of Blair et al's rational approximation to inverse + error function in single-precision. Largest observed error is 24.75 ULP: + _ZGVnN2v_erfinv(0x1.fc861d81c2ba8p-1) got 0x1.ea05472686625p+0 + want 0x1.ea0547268660cp+0. */ +float64x2_t VPCS_ATTR V_NAME_D1 (erfinv) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + /* Calculate inverse error using algorithm described in + J. M. Blair, C. A. Edwards, and J. H. Johnson, + "Rational Chebyshev approximations for the inverse of the error function", + Math. Comp. 30, pp. 827--830 (1976). + https://doi.org/10.1090/S0025-5718-1976-0421040-7. + + Algorithm has 3 intervals: + - 'Normal' region [-0.75, 0.75] + - Tail region [0.75, 0.9375] U [-0.9375, -0.75] + - Extreme tail [-1, -0.9375] U [0.9375, 1] + Normal and tail are both rational approximation of similar order on + shifted input - these are typically performed in parallel using gather + loads to obtain correct coefficients depending on interval. */ + uint64x2_t is_tail = vcagtq_f64 (x, v_f64 (0.75)); + + if (unlikely (!v_any_u64 (is_tail))) + /* If input is normally distributed in [-1, 1] then likelihood of this is + 0.75^2 ~= 0.56. */ + return notails (x, d); + + uint64x2_t extreme_tail = vcagtq_f64 (x, v_f64 (0.9375)); + + uint8x16_t off = vandq_u8 (vreinterpretq_u8_u64 (is_tail), vdupq_n_u8 (8)); + uint8x16_t idx = vaddq_u8 (d->idx, off); + + float64x2_t t = vbslq_f64 (is_tail, d->tailshift, v_f64 (-0.5625)); + t = vfmaq_f64 (t, x, x); + + float64x2_t p = lookup (&d->P[7][0], idx); + /* Last coeff of q is either 0 or 1 - use mask instead of load. */ + float64x2_t q = vreinterpretq_f64_u64 ( + vandq_u64 (is_tail, vreinterpretq_u64_f64 (v_f64 (1)))); + for (int i = 6; i >= 0; i--) + { + p = vfmaq_f64 (lookup (&d->P[i][0], idx), p, t); + q = vfmaq_f64 (lookup (&d->Q[i][0], idx), q, t); + } + p = vmulq_f64 (p, x); + + if (unlikely (v_any_u64 (extreme_tail))) + return vbslq_f64 (extreme_tail, special (x, d), vdivq_f64 (p, q)); + + return vdivq_f64 (p, q); +} + +PL_SIG (V, D, 1, erfinv, -0.99, 0.99) +PL_TEST_ULP (V_NAME_D1 (erfinv), 24.8) +/* Test with control lane in each interval. */ +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (erfinv), 0, 0x1.fffffffffffffp-1, 100000, + 0.5) +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (erfinv), 0, 0x1.fffffffffffffp-1, 100000, + 0.8) +PL_TEST_SYM_INTERVAL_C (V_NAME_D1 (erfinv), 0, 0x1.fffffffffffffp-1, 100000, + 0.95) diff --git a/contrib/arm-optimized-routines/pl/math/v_erfinvf_5u.c b/contrib/arm-optimized-routines/pl/math/v_erfinvf_5u.c new file mode 100644 index 000000000000..5a6800b86ae9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_erfinvf_5u.c @@ -0,0 +1,163 @@ +/* + * Single-precision inverse error function (AdvSIMD variant). + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" +#include "v_logf_inline.h" + +const static struct data +{ + /* We use P_N and Q_N to refer to arrays of coefficients, where P_N is the + coeffs of the numerator in table N of Blair et al, and Q_N is the coeffs + of the denominator. Coefficients are stored in various interleaved + formats to allow for table-based (vector-to-vector) lookup. + + Plo is first two coefficients of P_10 and P_29 interleaved. + PQ is third coeff of P_10 and first of Q_29 interleaved. + Qhi is second and third coeffs of Q_29 interleaved. + P29_3 is a homogenous vector with fourth coeff of P_29. + + P_10 and Q_10 are also stored in homogenous vectors to allow better + memory access when no lanes are in a tail region. */ + float32x4_t Plo, PQ, Qhi, P29_3, tailshift; + float32x4_t P_50[6], Q_50[2]; + float32x4_t P_10[3], Q_10[3]; + uint8x16_t idxhi, idxlo; + struct v_logf_data logf_tbl; +} data = { + .idxlo = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, + .idxhi = { 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 }, + .P29_3 = V4 (0x1.b13626p-2), + .tailshift = V4 (-0.87890625), + .Plo = { -0x1.a31268p+3, -0x1.fc0252p-4, 0x1.ac9048p+4, 0x1.119d44p+0 }, + .PQ = { -0x1.293ff6p+3, -0x1.f59ee2p+0, -0x1.8265eep+3, -0x1.69952p-4 }, + .Qhi = { 0x1.ef5eaep+4, 0x1.c7b7d2p-1, -0x1.12665p+4, -0x1.167d7p+1 }, + .P_50 = { V4 (0x1.3d8948p-3), V4 (0x1.61f9eap+0), V4 (0x1.61c6bcp-1), + V4 (-0x1.20c9f2p+0), V4 (0x1.5c704cp-1), V4 (-0x1.50c6bep-3) }, + .Q_50 = { V4 (0x1.3d7dacp-3), V4 (0x1.629e5p+0) }, + .P_10 = { V4 (-0x1.a31268p+3), V4 (0x1.ac9048p+4), V4 (-0x1.293ff6p+3) }, + .Q_10 = { V4 (-0x1.8265eep+3), V4 (0x1.ef5eaep+4), V4 (-0x1.12665p+4) }, + .logf_tbl = V_LOGF_CONSTANTS +}; + +static inline float32x4_t +special (float32x4_t x, const struct data *d) +{ + /* Note erfinvf(inf) should return NaN, and erfinvf(1) should return Inf. + By using log here, instead of log1p, we return finite values for both + these inputs, and values outside [-1, 1]. This is non-compliant, but is an + acceptable optimisation at Ofast. To get correct behaviour for all finite + values use the log1pf_inline helper on -abs(x) - note that erfinvf(inf) + will still be finite. */ + float32x4_t t = vdivq_f32 ( + v_f32 (1), vsqrtq_f32 (vnegq_f32 (v_logf_inline ( + vsubq_f32 (v_f32 (1), vabsq_f32 (x)), &d->logf_tbl)))); + float32x4_t ts = vbslq_f32 (v_u32 (0x7fffffff), t, x); + float32x4_t q = vfmaq_f32 (d->Q_50[0], vaddq_f32 (t, d->Q_50[1]), t); + return vdivq_f32 (v_horner_5_f32 (t, d->P_50), vmulq_f32 (ts, q)); +} + +static inline float32x4_t +notails (float32x4_t x, const struct data *d) +{ + /* Shortcut when no input is in a tail region - no need to gather shift or + coefficients. */ + float32x4_t t = vfmaq_f32 (v_f32 (-0.5625), x, x); + float32x4_t q = vaddq_f32 (t, d->Q_10[2]); + q = vfmaq_f32 (d->Q_10[1], t, q); + q = vfmaq_f32 (d->Q_10[0], t, q); + + return vdivq_f32 (vmulq_f32 (x, v_horner_2_f32 (t, d->P_10)), q); +} + +static inline float32x4_t +lookup (float32x4_t tbl, uint8x16_t idx) +{ + return vreinterpretq_f32_u8 (vqtbl1q_u8 (vreinterpretq_u8_f32 (tbl), idx)); +} + +/* Vector implementation of Blair et al's rational approximation to inverse + error function in single-precision. Worst-case error is 4.98 ULP, in the + tail region: + _ZGVnN4v_erfinvf(0x1.f7dbeep-1) got 0x1.b4793p+0 + want 0x1.b4793ap+0 . */ +float32x4_t VPCS_ATTR V_NAME_F1 (erfinv) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + /* Calculate inverse error using algorithm described in + J. M. Blair, C. A. Edwards, and J. H. Johnson, + "Rational Chebyshev approximations for the inverse of the error + function", Math. Comp. 30, pp. 827--830 (1976). + https://doi.org/10.1090/S0025-5718-1976-0421040-7. + + Algorithm has 3 intervals: + - 'Normal' region [-0.75, 0.75] + - Tail region [0.75, 0.9375] U [-0.9375, -0.75] + - Extreme tail [-1, -0.9375] U [0.9375, 1] + Normal and tail are both rational approximation of similar order on + shifted input - these are typically performed in parallel using gather + loads to obtain correct coefficients depending on interval. */ + uint32x4_t is_tail = vcageq_f32 (x, v_f32 (0.75)); + uint32x4_t extreme_tail = vcageq_f32 (x, v_f32 (0.9375)); + + if (unlikely (!v_any_u32 (is_tail))) + /* Shortcut for if all lanes are in [-0.75, 0.75] - can avoid having to + gather coefficients. If input is uniform in [-1, 1] then likelihood of + this is 0.75^4 ~= 0.31. */ + return notails (x, d); + + /* Select requisite shift depending on interval: polynomial is evaluated on + x * x - shift. + Normal shift = 0.5625 + Tail shift = 0.87890625. */ + float32x4_t t + = vfmaq_f32 (vbslq_f32 (is_tail, d->tailshift, v_f32 (-0.5625)), x, x); + + /* Calculate indexes for tbl: tbl is byte-wise, so: + [0, 1, 2, 3, 4, 5, 6, ....] copies the vector + Add 4 * i to a group of 4 lanes to copy 32-bit lane i. Each vector stores + two pairs of coeffs, so we need two idx vectors - one for each pair. */ + uint8x16_t off = vandq_u8 (vreinterpretq_u8_u32 (is_tail), vdupq_n_u8 (4)); + uint8x16_t idx_lo = vaddq_u8 (d->idxlo, off); + uint8x16_t idx_hi = vaddq_u8 (d->idxhi, off); + + /* Load the tables. */ + float32x4_t p_lo = d->Plo; + float32x4_t pq = d->PQ; + float32x4_t qhi = d->Qhi; + + /* Do the lookup (and calculate p3 by masking non-tail lanes). */ + float32x4_t p3 = vreinterpretq_f32_u32 ( + vandq_u32 (is_tail, vreinterpretq_u32_f32 (d->P29_3))); + float32x4_t p0 = lookup (p_lo, idx_lo), p1 = lookup (p_lo, idx_hi), + p2 = lookup (pq, idx_lo), q0 = lookup (pq, idx_hi), + q1 = lookup (qhi, idx_lo), q2 = lookup (qhi, idx_hi); + + float32x4_t p = vfmaq_f32 (p2, p3, t); + p = vfmaq_f32 (p1, p, t); + p = vfmaq_f32 (p0, p, t); + p = vmulq_f32 (x, p); + + float32x4_t q = vfmaq_f32 (q1, vaddq_f32 (q2, t), t); + q = vfmaq_f32 (q0, q, t); + + if (unlikely (v_any_u32 (extreme_tail))) + /* At least one lane is in the extreme tail - if input is uniform in + [-1, 1] the likelihood of this is ~0.23. */ + return vbslq_f32 (extreme_tail, special (x, d), vdivq_f32 (p, q)); + + return vdivq_f32 (p, q); +} + +PL_SIG (V, F, 1, erfinv, -0.99, 0.99) +PL_TEST_ULP (V_NAME_F1 (erfinv), 4.49) +/* Test with control lane in each interval. */ +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (erfinv), 0, 0x1.fffffep-1, 40000, 0.5) +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (erfinv), 0, 0x1.fffffep-1, 40000, 0.8) +PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (erfinv), 0, 0x1.fffffep-1, 40000, 0.95) diff --git a/contrib/arm-optimized-routines/pl/math/v_exp10_2u.c b/contrib/arm-optimized-routines/pl/math/v_exp10_2u.c new file mode 100644 index 000000000000..29072a60fb3a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp10_2u.c @@ -0,0 +1,144 @@ +/* + * Double-precision vector 10^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Value of |x| above which scale overflows without special treatment. */ +#define SpecialBound 306.0 /* floor (log10 (2^1023)) - 1. */ +/* Value of n above which scale overflows even with special treatment. */ +#define ScaleBound 163840.0 /* 1280.0 * N. */ + +const static struct data +{ + float64x2_t poly[4]; + float64x2_t log10_2, log2_10_hi, log2_10_lo, shift; +#if !WANT_SIMD_EXCEPT + float64x2_t special_bound, scale_thresh; +#endif +} data = { + /* Coefficients generated using Remez algorithm. + rel error: 0x1.5ddf8f28p-54 + abs error: 0x1.5ed266c8p-54 in [ -log10(2)/256, log10(2)/256 ] + maxerr: 1.14432 +0.5 ulp. */ + .poly = { V2 (0x1.26bb1bbb5524p1), V2 (0x1.53524c73cecdap1), + V2 (0x1.047060efb781cp1), V2 (0x1.2bd76040f0d16p0) }, + .log10_2 = V2 (0x1.a934f0979a371p8), /* N/log2(10). */ + .log2_10_hi = V2 (0x1.34413509f79ffp-9), /* log2(10)/N. */ + .log2_10_lo = V2 (-0x1.9dc1da994fd21p-66), + .shift = V2 (0x1.8p+52), +#if !WANT_SIMD_EXCEPT + .scale_thresh = V2 (ScaleBound), + .special_bound = V2 (SpecialBound), +#endif +}; + +#define N (1 << V_EXP_TABLE_BITS) +#define IndexMask v_u64 (N - 1) + +#if WANT_SIMD_EXCEPT + +# define TinyBound v_u64 (0x2000000000000000) /* asuint64 (0x1p-511). */ +# define BigBound v_u64 (0x4070000000000000) /* asuint64 (0x1p8). */ +# define Thres v_u64 (0x2070000000000000) /* BigBound - TinyBound. */ + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine for special lanes. */ + return v_call_f64 (exp10, x, y, cmp); +} + +#else + +# define SpecialOffset v_u64 (0x6000000000000000) /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +# define SpecialBias1 v_u64 (0x7000000000000000) /* 0x1p769. */ +# define SpecialBias2 v_u64 (0x3010000000000000) /* 0x1p-254. */ + +static inline float64x2_t VPCS_ATTR +special_case (float64x2_t s, float64x2_t y, float64x2_t n, + const struct data *d) +{ + /* 2^(n/N) may overflow, break it up into s1*s2. */ + uint64x2_t b = vandq_u64 (vcltzq_f64 (n), SpecialOffset); + float64x2_t s1 = vreinterpretq_f64_u64 (vsubq_u64 (SpecialBias1, b)); + float64x2_t s2 = vreinterpretq_f64_u64 ( + vaddq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (s), SpecialBias2), b)); + uint64x2_t cmp = vcagtq_f64 (n, d->scale_thresh); + float64x2_t r1 = vmulq_f64 (s1, s1); + float64x2_t r0 = vmulq_f64 (vfmaq_f64 (s2, y, s2), s1); + return vbslq_f64 (cmp, r1, r0); +} + +#endif + +/* Fast vector implementation of exp10. + Maximum measured error is 1.64 ulp. + _ZGVnN2v_exp10(0x1.ccd1c9d82cc8cp+0) got 0x1.f8dab6d7fed0cp+5 + want 0x1.f8dab6d7fed0ap+5. */ +float64x2_t VPCS_ATTR V_NAME_D1 (exp10) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t cmp; +#if WANT_SIMD_EXCEPT + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special_case to fix special lanes later. This is only necessary if fenv + exceptions are to be triggered correctly. */ + float64x2_t xm = x; + uint64x2_t iax = vreinterpretq_u64_f64 (vabsq_f64 (x)); + cmp = vcgeq_u64 (vsubq_u64 (iax, TinyBound), Thres); + if (unlikely (v_any_u64 (cmp))) + x = vbslq_f64 (cmp, v_f64 (1), x); +#else + cmp = vcageq_f64 (x, d->special_bound); +#endif + + /* n = round(x/(log10(2)/N)). */ + float64x2_t z = vfmaq_f64 (d->shift, x, d->log10_2); + uint64x2_t u = vreinterpretq_u64_f64 (z); + float64x2_t n = vsubq_f64 (z, d->shift); + + /* r = x - n*log10(2)/N. */ + float64x2_t r = x; + r = vfmsq_f64 (r, d->log2_10_hi, n); + r = vfmsq_f64 (r, d->log2_10_lo, n); + + uint64x2_t e = vshlq_n_u64 (u, 52 - V_EXP_TABLE_BITS); + uint64x2_t i = vandq_u64 (u, IndexMask); + + /* y = exp10(r) - 1 ~= C0 r + C1 r^2 + C2 r^3 + C3 r^4. */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t p = vfmaq_f64 (d->poly[0], r, d->poly[1]); + float64x2_t y = vfmaq_f64 (d->poly[2], r, d->poly[3]); + p = vfmaq_f64 (p, y, r2); + y = vmulq_f64 (r, p); + + /* s = 2^(n/N). */ + u = v_lookup_u64 (__v_exp_data, i); + float64x2_t s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); + + if (unlikely (v_any_u64 (cmp))) +#if WANT_SIMD_EXCEPT + return special_case (xm, vfmaq_f64 (s, y, s), cmp); +#else + return special_case (s, y, n, d); +#endif + + return vfmaq_f64 (s, y, s); +} + +PL_SIG (S, D, 1, exp10, -9.9, 9.9) +PL_SIG (V, D, 1, exp10, -9.9, 9.9) +PL_TEST_ULP (V_NAME_D1 (exp10), 1.15) +PL_TEST_EXPECT_FENV (V_NAME_D1 (exp10), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp10), 0, SpecialBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp10), SpecialBound, ScaleBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp10), ScaleBound, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_exp10f_2u4.c b/contrib/arm-optimized-routines/pl/math/v_exp10f_2u4.c new file mode 100644 index 000000000000..0e91becfa612 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp10f_2u4.c @@ -0,0 +1,138 @@ +/* + * Single-precision vector 10^x function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" + +#define ScaleBound 192.0f + +static const struct data +{ + float32x4_t poly[5]; + float32x4_t log10_2_and_inv, shift; + +#if !WANT_SIMD_EXCEPT + float32x4_t scale_thresh; +#endif +} data = { + /* Coefficients generated using Remez algorithm with minimisation of relative + error. + rel error: 0x1.89dafa3p-24 + abs error: 0x1.167d55p-23 in [-log10(2)/2, log10(2)/2] + maxerr: 1.85943 +0.5 ulp. */ + .poly = { V4 (0x1.26bb16p+1f), V4 (0x1.5350d2p+1f), V4 (0x1.04744ap+1f), + V4 (0x1.2d8176p+0f), V4 (0x1.12b41ap-1f) }, + .shift = V4 (0x1.8p23f), + + /* Stores constants 1/log10(2), log10(2)_high, log10(2)_low, 0. */ + .log10_2_and_inv = { 0x1.a934fp+1, 0x1.344136p-2, -0x1.ec10cp-27, 0 }, +#if !WANT_SIMD_EXCEPT + .scale_thresh = V4 (ScaleBound) +#endif +}; + +#define ExponentBias v_u32 (0x3f800000) + +#if WANT_SIMD_EXCEPT + +# define SpecialBound 38.0f /* rint(log10(2^127)). */ +# define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */ +# define BigBound v_u32 (0x42180000) /* asuint (SpecialBound). */ +# define Thres v_u32 (0x22180000) /* BigBound - TinyBound. */ + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine to special lanes. */ + return v_call_f32 (exp10f, x, y, cmp); +} + +#else + +# define SpecialBound 126.0f /* rint (log2 (2^127 / (1 + sqrt (2)))). */ +# define SpecialOffset v_u32 (0x82000000) +# define SpecialBias v_u32 (0x7f000000) + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1, + float32x4_t scale, const struct data *d) +{ + /* 2^n may overflow, break it up into s1*s2. */ + uint32x4_t b = vandq_u32 (vclezq_f32 (n), SpecialOffset); + float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, SpecialBias)); + float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b)); + uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh); + float32x4_t r2 = vmulq_f32 (s1, s1); + float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1); + /* Similar to r1 but avoids double rounding in the subnormal range. */ + float32x4_t r0 = vfmaq_f32 (scale, poly, scale); + float32x4_t r = vbslq_f32 (cmp1, r1, r0); + return vbslq_f32 (cmp2, r2, r); +} + +#endif + +/* Fast vector implementation of single-precision exp10. + Algorithm is accurate to 2.36 ULP. + _ZGVnN4v_exp10f(0x1.be2b36p+1) got 0x1.7e79c4p+11 + want 0x1.7e79cp+11. */ +float32x4_t VPCS_ATTR V_NAME_F1 (exp10) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); +#if WANT_SIMD_EXCEPT + /* asuint(x) - TinyBound >= BigBound - TinyBound. */ + uint32x4_t cmp = vcgeq_u32 ( + vsubq_u32 (vreinterpretq_u32_f32 (vabsq_f32 (x)), TinyBound), Thres); + float32x4_t xm = x; + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + special case handler to fix special lanes later. This is only necessary if + fenv exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = v_zerofy_f32 (x, cmp); +#endif + + /* exp10(x) = 2^n * 10^r = 2^n * (1 + poly (r)), + with poly(r) in [1/sqrt(2), sqrt(2)] and + x = r + n * log10 (2), with r in [-log10(2)/2, log10(2)/2]. */ + float32x4_t z = vfmaq_laneq_f32 (d->shift, x, d->log10_2_and_inv, 0); + float32x4_t n = vsubq_f32 (z, d->shift); + float32x4_t r = vfmsq_laneq_f32 (x, n, d->log10_2_and_inv, 1); + r = vfmsq_laneq_f32 (r, n, d->log10_2_and_inv, 2); + uint32x4_t e = vshlq_n_u32 (vreinterpretq_u32_f32 (z), 23); + + float32x4_t scale = vreinterpretq_f32_u32 (vaddq_u32 (e, ExponentBias)); + +#if !WANT_SIMD_EXCEPT + uint32x4_t cmp = vcagtq_f32 (n, v_f32 (SpecialBound)); +#endif + + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t poly + = vfmaq_f32 (vmulq_f32 (r, d->poly[0]), + v_pairwise_poly_3_f32 (r, r2, d->poly + 1), r2); + + if (unlikely (v_any_u32 (cmp))) +#if WANT_SIMD_EXCEPT + return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp); +#else + return special_case (poly, n, e, cmp, scale, d); +#endif + + return vfmaq_f32 (scale, poly, scale); +} + +PL_SIG (S, F, 1, exp10, -9.9, 9.9) +PL_SIG (V, F, 1, exp10, -9.9, 9.9) +PL_TEST_ULP (V_NAME_F1 (exp10), 1.86) +PL_TEST_EXPECT_FENV (V_NAME_F1 (exp10), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), 0, SpecialBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), SpecialBound, ScaleBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), ScaleBound, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_exp2_2u.c b/contrib/arm-optimized-routines/pl/math/v_exp2_2u.c new file mode 100644 index 000000000000..de59779689f5 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp2_2u.c @@ -0,0 +1,128 @@ +/* + * Double-precision vector 2^x function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +#define N (1 << V_EXP_TABLE_BITS) +#define IndexMask (N - 1) +#define BigBound 1022.0 +#define UOFlowBound 1280.0 + +static const struct data +{ + float64x2_t poly[4]; + float64x2_t shift, scale_big_bound, scale_uoflow_bound; +} data = { + /* Coefficients are computed using Remez algorithm with + minimisation of the absolute error. */ + .poly = { V2 (0x1.62e42fefa3686p-1), V2 (0x1.ebfbdff82c241p-3), + V2 (0x1.c6b09b16de99ap-5), V2 (0x1.3b2abf5571ad8p-7) }, + .shift = V2 (0x1.8p52 / N), + .scale_big_bound = V2 (BigBound), + .scale_uoflow_bound = V2 (UOFlowBound), +}; + +static inline uint64x2_t +lookup_sbits (uint64x2_t i) +{ + return (uint64x2_t){ __v_exp_data[i[0] & IndexMask], + __v_exp_data[i[1] & IndexMask] }; +} + +#if WANT_SIMD_EXCEPT + +# define TinyBound 0x2000000000000000 /* asuint64(0x1p-511). */ +# define Thres 0x2080000000000000 /* asuint64(512.0) - TinyBound. */ + +/* Call scalar exp2 as a fallback. */ +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t is_special) +{ + return v_call_f64 (exp2, x, y, is_special); +} + +#else + +# define SpecialOffset 0x6000000000000000 /* 0x1p513. */ +/* SpecialBias1 + SpecialBias1 = asuint(1.0). */ +# define SpecialBias1 0x7000000000000000 /* 0x1p769. */ +# define SpecialBias2 0x3010000000000000 /* 0x1p-254. */ + +static inline float64x2_t VPCS_ATTR +special_case (float64x2_t s, float64x2_t y, float64x2_t n, + const struct data *d) +{ + /* 2^(n/N) may overflow, break it up into s1*s2. */ + uint64x2_t b = vandq_u64 (vclezq_f64 (n), v_u64 (SpecialOffset)); + float64x2_t s1 = vreinterpretq_f64_u64 (vsubq_u64 (v_u64 (SpecialBias1), b)); + float64x2_t s2 = vreinterpretq_f64_u64 ( + vaddq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (s), v_u64 (SpecialBias2)), b)); + uint64x2_t cmp = vcagtq_f64 (n, d->scale_uoflow_bound); + float64x2_t r1 = vmulq_f64 (s1, s1); + float64x2_t r0 = vmulq_f64 (vfmaq_f64 (s2, s2, y), s1); + return vbslq_f64 (cmp, r1, r0); +} + +#endif + +/* Fast vector implementation of exp2. + Maximum measured error is 1.65 ulp. + _ZGVnN2v_exp2(-0x1.4c264ab5b559bp-6) got 0x1.f8db0d4df721fp-1 + want 0x1.f8db0d4df721dp-1. */ +VPCS_ATTR +float64x2_t V_NAME_D1 (exp2) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t cmp; +#if WANT_SIMD_EXCEPT + uint64x2_t ia = vreinterpretq_u64_f64 (vabsq_f64 (x)); + cmp = vcgeq_u64 (vsubq_u64 (ia, v_u64 (TinyBound)), v_u64 (Thres)); + /* Mask special lanes and retain a copy of x for passing to special-case + handler. */ + float64x2_t xc = x; + x = v_zerofy_f64 (x, cmp); +#else + cmp = vcagtq_f64 (x, d->scale_big_bound); +#endif + + /* n = round(x/N). */ + float64x2_t z = vaddq_f64 (d->shift, x); + uint64x2_t u = vreinterpretq_u64_f64 (z); + float64x2_t n = vsubq_f64 (z, d->shift); + + /* r = x - n/N. */ + float64x2_t r = vsubq_f64 (x, n); + + /* s = 2^(n/N). */ + uint64x2_t e = vshlq_n_u64 (u, 52 - V_EXP_TABLE_BITS); + u = lookup_sbits (u); + float64x2_t s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); + + /* y ~ exp2(r) - 1. */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t y = v_pairwise_poly_3_f64 (r, r2, d->poly); + y = vmulq_f64 (r, y); + + if (unlikely (v_any_u64 (cmp))) +#if !WANT_SIMD_EXCEPT + return special_case (s, y, n, d); +#else + return special_case (xc, vfmaq_f64 (s, s, y), cmp); +#endif + return vfmaq_f64 (s, s, y); +} + +PL_SIG (V, D, 1, exp2, -9.9, 9.9) +PL_TEST_ULP (V_NAME_D1 (exp2), 1.15) +PL_TEST_EXPECT_FENV (V_NAME_D1 (exp2), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp2), 0, TinyBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp2), TinyBound, BigBound, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp2), BigBound, UOFlowBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (exp2), UOFlowBound, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_exp_data.c b/contrib/arm-optimized-routines/pl/math/v_exp_data.c new file mode 100644 index 000000000000..fd01cf27606f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp_data.c @@ -0,0 +1,55 @@ +/* + * Scale values for vector exp and exp2 + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* 2^(j/N), j=0..N, N=2^7=128. Copied from math/v_exp_data.c. */ +const uint64_t __v_exp_data[] = { + 0x3ff0000000000000, 0x3feff63da9fb3335, 0x3fefec9a3e778061, + 0x3fefe315e86e7f85, 0x3fefd9b0d3158574, 0x3fefd06b29ddf6de, + 0x3fefc74518759bc8, 0x3fefbe3ecac6f383, 0x3fefb5586cf9890f, + 0x3fefac922b7247f7, 0x3fefa3ec32d3d1a2, 0x3fef9b66affed31b, + 0x3fef9301d0125b51, 0x3fef8abdc06c31cc, 0x3fef829aaea92de0, + 0x3fef7a98c8a58e51, 0x3fef72b83c7d517b, 0x3fef6af9388c8dea, + 0x3fef635beb6fcb75, 0x3fef5be084045cd4, 0x3fef54873168b9aa, + 0x3fef4d5022fcd91d, 0x3fef463b88628cd6, 0x3fef3f49917ddc96, + 0x3fef387a6e756238, 0x3fef31ce4fb2a63f, 0x3fef2b4565e27cdd, + 0x3fef24dfe1f56381, 0x3fef1e9df51fdee1, 0x3fef187fd0dad990, + 0x3fef1285a6e4030b, 0x3fef0cafa93e2f56, 0x3fef06fe0a31b715, + 0x3fef0170fc4cd831, 0x3feefc08b26416ff, 0x3feef6c55f929ff1, + 0x3feef1a7373aa9cb, 0x3feeecae6d05d866, 0x3feee7db34e59ff7, + 0x3feee32dc313a8e5, 0x3feedea64c123422, 0x3feeda4504ac801c, + 0x3feed60a21f72e2a, 0x3feed1f5d950a897, 0x3feece086061892d, + 0x3feeca41ed1d0057, 0x3feec6a2b5c13cd0, 0x3feec32af0d7d3de, + 0x3feebfdad5362a27, 0x3feebcb299fddd0d, 0x3feeb9b2769d2ca7, + 0x3feeb6daa2cf6642, 0x3feeb42b569d4f82, 0x3feeb1a4ca5d920f, + 0x3feeaf4736b527da, 0x3feead12d497c7fd, 0x3feeab07dd485429, + 0x3feea9268a5946b7, 0x3feea76f15ad2148, 0x3feea5e1b976dc09, + 0x3feea47eb03a5585, 0x3feea34634ccc320, 0x3feea23882552225, + 0x3feea155d44ca973, 0x3feea09e667f3bcd, 0x3feea012750bdabf, + 0x3fee9fb23c651a2f, 0x3fee9f7df9519484, 0x3fee9f75e8ec5f74, + 0x3fee9f9a48a58174, 0x3fee9feb564267c9, 0x3feea0694fde5d3f, + 0x3feea11473eb0187, 0x3feea1ed0130c132, 0x3feea2f336cf4e62, + 0x3feea427543e1a12, 0x3feea589994cce13, 0x3feea71a4623c7ad, + 0x3feea8d99b4492ed, 0x3feeaac7d98a6699, 0x3feeace5422aa0db, + 0x3feeaf3216b5448c, 0x3feeb1ae99157736, 0x3feeb45b0b91ffc6, + 0x3feeb737b0cdc5e5, 0x3feeba44cbc8520f, 0x3feebd829fde4e50, + 0x3feec0f170ca07ba, 0x3feec49182a3f090, 0x3feec86319e32323, + 0x3feecc667b5de565, 0x3feed09bec4a2d33, 0x3feed503b23e255d, + 0x3feed99e1330b358, 0x3feede6b5579fdbf, 0x3feee36bbfd3f37a, + 0x3feee89f995ad3ad, 0x3feeee07298db666, 0x3feef3a2b84f15fb, + 0x3feef9728de5593a, 0x3feeff76f2fb5e47, 0x3fef05b030a1064a, + 0x3fef0c1e904bc1d2, 0x3fef12c25bd71e09, 0x3fef199bdd85529c, + 0x3fef20ab5fffd07a, 0x3fef27f12e57d14b, 0x3fef2f6d9406e7b5, + 0x3fef3720dcef9069, 0x3fef3f0b555dc3fa, 0x3fef472d4a07897c, + 0x3fef4f87080d89f2, 0x3fef5818dcfba487, 0x3fef60e316c98398, + 0x3fef69e603db3285, 0x3fef7321f301b460, 0x3fef7c97337b9b5f, + 0x3fef864614f5a129, 0x3fef902ee78b3ff6, 0x3fef9a51fbc74c83, + 0x3fefa4afa2a490da, 0x3fefaf482d8e67f1, 0x3fefba1bee615a27, + 0x3fefc52b376bba97, 0x3fefd0765b6e4540, 0x3fefdbfdad9cbe14, + 0x3fefe7c1819e90d8, 0x3feff3c22b8f71f1, +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_exp_tail.h b/contrib/arm-optimized-routines/pl/math/v_exp_tail.h new file mode 100644 index 000000000000..903f1fd95717 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp_tail.h @@ -0,0 +1,21 @@ +/* + * Constants for double-precision e^(x+tail) vector function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define C1_scal 0x1.fffffffffffd4p-2 +#define C2_scal 0x1.5555571d6b68cp-3 +#define C3_scal 0x1.5555576a59599p-5 +#define InvLn2_scal 0x1.71547652b82fep8 /* N/ln2. */ +#define Ln2hi_scal 0x1.62e42fefa39efp-9 /* ln2/N. */ +#define Ln2lo_scal 0x1.abc9e3b39803f3p-64 + +#define N (1 << V_EXP_TAIL_TABLE_BITS) +#define Tab __v_exp_tail_data +#define IndexMask_scal (N - 1) +#define Shift_scal 0x1.8p+52 +#define Thres_scal 704.0 diff --git a/contrib/arm-optimized-routines/pl/math/v_exp_tail_data.c b/contrib/arm-optimized-routines/pl/math/v_exp_tail_data.c new file mode 100644 index 000000000000..989dd41d949a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp_tail_data.c @@ -0,0 +1,98 @@ +/* + * Lookup table for double-precision e^x vector function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +/* 2^(j/N), j=0..N, N=2^8=256. Copied from math/v_exp_data.c. */ +const uint64_t __v_exp_tail_data[] = { + 0x3ff0000000000000, 0x3feffb1afa5abcbf, 0x3feff63da9fb3335, + 0x3feff168143b0281, 0x3fefec9a3e778061, 0x3fefe7d42e11bbcc, + 0x3fefe315e86e7f85, 0x3fefde5f72f654b1, 0x3fefd9b0d3158574, + 0x3fefd50a0e3c1f89, 0x3fefd06b29ddf6de, 0x3fefcbd42b72a836, + 0x3fefc74518759bc8, 0x3fefc2bdf66607e0, 0x3fefbe3ecac6f383, + 0x3fefb9c79b1f3919, 0x3fefb5586cf9890f, 0x3fefb0f145e46c85, + 0x3fefac922b7247f7, 0x3fefa83b23395dec, 0x3fefa3ec32d3d1a2, + 0x3fef9fa55fdfa9c5, 0x3fef9b66affed31b, 0x3fef973028d7233e, + 0x3fef9301d0125b51, 0x3fef8edbab5e2ab6, 0x3fef8abdc06c31cc, + 0x3fef86a814f204ab, 0x3fef829aaea92de0, 0x3fef7e95934f312e, + 0x3fef7a98c8a58e51, 0x3fef76a45471c3c2, 0x3fef72b83c7d517b, + 0x3fef6ed48695bbc0, 0x3fef6af9388c8dea, 0x3fef672658375d2f, + 0x3fef635beb6fcb75, 0x3fef5f99f8138a1c, 0x3fef5be084045cd4, + 0x3fef582f95281c6b, 0x3fef54873168b9aa, 0x3fef50e75eb44027, + 0x3fef4d5022fcd91d, 0x3fef49c18438ce4d, 0x3fef463b88628cd6, + 0x3fef42be3578a819, 0x3fef3f49917ddc96, 0x3fef3bdda27912d1, + 0x3fef387a6e756238, 0x3fef351ffb82140a, 0x3fef31ce4fb2a63f, + 0x3fef2e85711ece75, 0x3fef2b4565e27cdd, 0x3fef280e341ddf29, + 0x3fef24dfe1f56381, 0x3fef21ba7591bb70, 0x3fef1e9df51fdee1, + 0x3fef1b8a66d10f13, 0x3fef187fd0dad990, 0x3fef157e39771b2f, + 0x3fef1285a6e4030b, 0x3fef0f961f641589, 0x3fef0cafa93e2f56, + 0x3fef09d24abd886b, 0x3fef06fe0a31b715, 0x3fef0432edeeb2fd, + 0x3fef0170fc4cd831, 0x3feefeb83ba8ea32, 0x3feefc08b26416ff, + 0x3feef96266e3fa2d, 0x3feef6c55f929ff1, 0x3feef431a2de883b, + 0x3feef1a7373aa9cb, 0x3feeef26231e754a, 0x3feeecae6d05d866, + 0x3feeea401b7140ef, 0x3feee7db34e59ff7, 0x3feee57fbfec6cf4, + 0x3feee32dc313a8e5, 0x3feee0e544ede173, 0x3feedea64c123422, + 0x3feedc70df1c5175, 0x3feeda4504ac801c, 0x3feed822c367a024, + 0x3feed60a21f72e2a, 0x3feed3fb2709468a, 0x3feed1f5d950a897, + 0x3feecffa3f84b9d4, 0x3feece086061892d, 0x3feecc2042a7d232, + 0x3feeca41ed1d0057, 0x3feec86d668b3237, 0x3feec6a2b5c13cd0, + 0x3feec4e1e192aed2, 0x3feec32af0d7d3de, 0x3feec17dea6db7d7, + 0x3feebfdad5362a27, 0x3feebe41b817c114, 0x3feebcb299fddd0d, + 0x3feebb2d81d8abff, 0x3feeb9b2769d2ca7, 0x3feeb8417f4531ee, + 0x3feeb6daa2cf6642, 0x3feeb57de83f4eef, 0x3feeb42b569d4f82, + 0x3feeb2e2f4f6ad27, 0x3feeb1a4ca5d920f, 0x3feeb070dde910d2, + 0x3feeaf4736b527da, 0x3feeae27dbe2c4cf, 0x3feead12d497c7fd, + 0x3feeac0827ff07cc, 0x3feeab07dd485429, 0x3feeaa11fba87a03, + 0x3feea9268a5946b7, 0x3feea84590998b93, 0x3feea76f15ad2148, + 0x3feea6a320dceb71, 0x3feea5e1b976dc09, 0x3feea52ae6cdf6f4, + 0x3feea47eb03a5585, 0x3feea3dd1d1929fd, 0x3feea34634ccc320, + 0x3feea2b9febc8fb7, 0x3feea23882552225, 0x3feea1c1c70833f6, + 0x3feea155d44ca973, 0x3feea0f4b19e9538, 0x3feea09e667f3bcd, + 0x3feea052fa75173e, 0x3feea012750bdabf, 0x3fee9fdcddd47645, + 0x3fee9fb23c651a2f, 0x3fee9f9298593ae5, 0x3fee9f7df9519484, + 0x3fee9f7466f42e87, 0x3fee9f75e8ec5f74, 0x3fee9f8286ead08a, + 0x3fee9f9a48a58174, 0x3fee9fbd35d7cbfd, 0x3fee9feb564267c9, + 0x3feea024b1ab6e09, 0x3feea0694fde5d3f, 0x3feea0b938ac1cf6, + 0x3feea11473eb0187, 0x3feea17b0976cfdb, 0x3feea1ed0130c132, + 0x3feea26a62ff86f0, 0x3feea2f336cf4e62, 0x3feea3878491c491, + 0x3feea427543e1a12, 0x3feea4d2add106d9, 0x3feea589994cce13, + 0x3feea64c1eb941f7, 0x3feea71a4623c7ad, 0x3feea7f4179f5b21, + 0x3feea8d99b4492ed, 0x3feea9cad931a436, 0x3feeaac7d98a6699, + 0x3feeabd0a478580f, 0x3feeace5422aa0db, 0x3feeae05bad61778, + 0x3feeaf3216b5448c, 0x3feeb06a5e0866d9, 0x3feeb1ae99157736, + 0x3feeb2fed0282c8a, 0x3feeb45b0b91ffc6, 0x3feeb5c353aa2fe2, + 0x3feeb737b0cdc5e5, 0x3feeb8b82b5f98e5, 0x3feeba44cbc8520f, + 0x3feebbdd9a7670b3, 0x3feebd829fde4e50, 0x3feebf33e47a22a2, + 0x3feec0f170ca07ba, 0x3feec2bb4d53fe0d, 0x3feec49182a3f090, + 0x3feec674194bb8d5, 0x3feec86319e32323, 0x3feeca5e8d07f29e, + 0x3feecc667b5de565, 0x3feece7aed8eb8bb, 0x3feed09bec4a2d33, + 0x3feed2c980460ad8, 0x3feed503b23e255d, 0x3feed74a8af46052, + 0x3feed99e1330b358, 0x3feedbfe53c12e59, 0x3feede6b5579fdbf, + 0x3feee0e521356eba, 0x3feee36bbfd3f37a, 0x3feee5ff3a3c2774, + 0x3feee89f995ad3ad, 0x3feeeb4ce622f2ff, 0x3feeee07298db666, + 0x3feef0ce6c9a8952, 0x3feef3a2b84f15fb, 0x3feef68415b749b1, + 0x3feef9728de5593a, 0x3feefc6e29f1c52a, 0x3feeff76f2fb5e47, + 0x3fef028cf22749e4, 0x3fef05b030a1064a, 0x3fef08e0b79a6f1f, + 0x3fef0c1e904bc1d2, 0x3fef0f69c3f3a207, 0x3fef12c25bd71e09, + 0x3fef16286141b33d, 0x3fef199bdd85529c, 0x3fef1d1cd9fa652c, + 0x3fef20ab5fffd07a, 0x3fef244778fafb22, 0x3fef27f12e57d14b, + 0x3fef2ba88988c933, 0x3fef2f6d9406e7b5, 0x3fef33405751c4db, + 0x3fef3720dcef9069, 0x3fef3b0f2e6d1675, 0x3fef3f0b555dc3fa, + 0x3fef43155b5bab74, 0x3fef472d4a07897c, 0x3fef4b532b08c968, + 0x3fef4f87080d89f2, 0x3fef53c8eacaa1d6, 0x3fef5818dcfba487, + 0x3fef5c76e862e6d3, 0x3fef60e316c98398, 0x3fef655d71ff6075, + 0x3fef69e603db3285, 0x3fef6e7cd63a8315, 0x3fef7321f301b460, + 0x3fef77d5641c0658, 0x3fef7c97337b9b5f, 0x3fef81676b197d17, + 0x3fef864614f5a129, 0x3fef8b333b16ee12, 0x3fef902ee78b3ff6, + 0x3fef953924676d76, 0x3fef9a51fbc74c83, 0x3fef9f7977cdb740, + 0x3fefa4afa2a490da, 0x3fefa9f4867cca6e, 0x3fefaf482d8e67f1, + 0x3fefb4aaa2188510, 0x3fefba1bee615a27, 0x3fefbf9c1cb6412a, + 0x3fefc52b376bba97, 0x3fefcac948dd7274, 0x3fefd0765b6e4540, + 0x3fefd632798844f8, 0x3fefdbfdad9cbe14, 0x3fefe1d802243c89, + 0x3fefe7c1819e90d8, 0x3fefedba3692d514, 0x3feff3c22b8f71f1, + 0x3feff9d96b2a23d9, +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_exp_tail_inline.h b/contrib/arm-optimized-routines/pl/math/v_exp_tail_inline.h new file mode 100644 index 000000000000..76ecc6b0a33a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_exp_tail_inline.h @@ -0,0 +1,102 @@ +/* + * Double-precision vector e^(x+tail) function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#ifndef PL_MATH_V_EXP_TAIL_INLINE_H +#define PL_MATH_V_EXP_TAIL_INLINE_H + +#include "v_math.h" +#include "poly_advsimd_f64.h" + +#ifndef WANT_V_EXP_TAIL_SPECIALCASE +#error \ + "Cannot use v_exp_tail_inline.h without specifying whether you need the special case computation." +#endif + +#define N (1 << V_EXP_TAIL_TABLE_BITS) + +static const struct data +{ + float64x2_t poly[4]; +#if WANT_V_EXP_TAIL_SPECIALCASE + float64x2_t big_bound, huge_bound; +#endif + float64x2_t shift, invln2, ln2_hi, ln2_lo; +} data = { +#if WANT_V_EXP_TAIL_SPECIALCASE + .big_bound = V2 (704.0), + .huge_bound = V2 (1280.0 * N), +#endif + .shift = V2 (0x1.8p52), + .invln2 = V2 (0x1.71547652b82fep8), /* N/ln2. */ + .ln2_hi = V2 (0x1.62e42fefa39efp-9), /* ln2/N. */ + .ln2_lo = V2 (0x1.abc9e3b39803f3p-64), + .poly = { V2 (1.0), V2 (0x1.fffffffffffd4p-2), V2 (0x1.5555571d6b68cp-3), + V2 (0x1.5555576a59599p-5) }, +}; + +static inline uint64x2_t +lookup_sbits (uint64x2_t i) +{ + return (uint64x2_t){__v_exp_tail_data[i[0]], __v_exp_tail_data[i[1]]}; +} + +#if WANT_V_EXP_TAIL_SPECIALCASE +#define SpecialOffset v_u64 (0x6000000000000000) /* 0x1p513. */ +/* The following 2 bias when combined form the exponent bias: + SpecialBias1 - SpecialBias2 = asuint64(1.0). */ +#define SpecialBias1 v_u64 (0x7000000000000000) /* 0x1p769. */ +#define SpecialBias2 v_u64 (0x3010000000000000) /* 0x1p-254. */ +static float64x2_t VPCS_ATTR +v_exp_tail_special_case (float64x2_t s, float64x2_t y, float64x2_t n, + const struct data *d) +{ + /* 2^(n/N) may overflow, break it up into s1*s2. */ + uint64x2_t b = vandq_u64 (vclezq_f64 (n), SpecialOffset); + float64x2_t s1 = vreinterpretq_f64_u64 (vsubq_u64 (SpecialBias1, b)); + float64x2_t s2 = vreinterpretq_f64_u64 ( + vaddq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (s), SpecialBias2), b)); + uint64x2_t oflow = vcagtq_f64 (n, d->huge_bound); + float64x2_t r0 = vmulq_f64 (vfmaq_f64 (s2, y, s2), s1); + float64x2_t r1 = vmulq_f64 (s1, s1); + return vbslq_f64 (oflow, r1, r0); +} +#endif + +static inline float64x2_t VPCS_ATTR +v_exp_tail_inline (float64x2_t x, float64x2_t xtail) +{ + const struct data *d = ptr_barrier (&data); +#if WANT_V_EXP_TAIL_SPECIALCASE + uint64x2_t special = vcgtq_f64 (vabsq_f64 (x), d->big_bound); +#endif + /* n = round(x/(ln2/N)). */ + float64x2_t z = vfmaq_f64 (d->shift, x, d->invln2); + uint64x2_t u = vreinterpretq_u64_f64 (z); + float64x2_t n = vsubq_f64 (z, d->shift); + + /* r = x - n*ln2/N. */ + float64x2_t r = x; + r = vfmsq_f64 (r, d->ln2_hi, n); + r = vfmsq_f64 (r, d->ln2_lo, n); + + uint64x2_t e = vshlq_n_u64 (u, 52 - V_EXP_TAIL_TABLE_BITS); + uint64x2_t i = vandq_u64 (u, v_u64 (N - 1)); + + /* y = tail + exp(r) - 1 ~= r + C1 r^2 + C2 r^3 + C3 r^4, using Horner. */ + float64x2_t y = v_horner_3_f64 (r, d->poly); + y = vfmaq_f64 (xtail, y, r); + + /* s = 2^(n/N). */ + u = lookup_sbits (i); + float64x2_t s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); + +#if WANT_V_EXP_TAIL_SPECIALCASE + if (unlikely (v_any_u64 (special))) + return v_exp_tail_special_case (s, y, n, d); +#endif + return vfmaq_f64 (s, y, s); +} +#endif // PL_MATH_V_EXP_TAIL_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/v_expf_inline.h b/contrib/arm-optimized-routines/pl/math/v_expf_inline.h new file mode 100644 index 000000000000..166683726b4d --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_expf_inline.h @@ -0,0 +1,60 @@ +/* + * Helper for single-precision routines which calculate exp(x) and do not + * need special-case handling + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_V_EXPF_INLINE_H +#define PL_MATH_V_EXPF_INLINE_H + +#include "v_math.h" + +struct v_expf_data +{ + float32x4_t poly[5]; + float32x4_t shift, invln2_and_ln2; +}; + +/* maxerr: 1.45358 +0.5 ulp. */ +#define V_EXPF_DATA \ + { \ + .poly = { V4 (0x1.0e4020p-7f), V4 (0x1.573e2ep-5f), V4 (0x1.555e66p-3f), \ + V4 (0x1.fffdb6p-2f), V4 (0x1.ffffecp-1f) }, \ + .shift = V4 (0x1.8p23f), \ + .invln2_and_ln2 = { 0x1.715476p+0f, 0x1.62e4p-1f, 0x1.7f7d1cp-20f, 0 }, \ + } + +#define ExponentBias v_u32 (0x3f800000) /* asuint(1.0f). */ +#define C(i) d->poly[i] + +static inline float32x4_t +v_expf_inline (float32x4_t x, const struct v_expf_data *d) +{ + /* Helper routine for calculating exp(x). + Copied from v_expf.c, with all special-case handling removed - the + calling routine should handle special values if required. */ + + /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ + float32x4_t n, r, z; + z = vfmaq_laneq_f32 (d->shift, x, d->invln2_and_ln2, 0); + n = vsubq_f32 (z, d->shift); + r = vfmsq_laneq_f32 (x, n, d->invln2_and_ln2, 1); + r = vfmsq_laneq_f32 (r, n, d->invln2_and_ln2, 2); + uint32x4_t e = vshlq_n_u32 (vreinterpretq_u32_f32 (z), 23); + float32x4_t scale = vreinterpretq_f32_u32 (vaddq_u32 (e, ExponentBias)); + + /* Custom order-4 Estrin avoids building high order monomial. */ + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t p, q, poly; + p = vfmaq_f32 (C (1), C (0), r); + q = vfmaq_f32 (C (3), C (2), r); + q = vfmaq_f32 (q, p, r2); + p = vmulq_f32 (C (4), r); + poly = vfmaq_f32 (p, q, r2); + return vfmaq_f32 (scale, poly, scale); +} + +#endif // PL_MATH_V_EXPF_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/v_expm1_2u5.c b/contrib/arm-optimized-routines/pl/math/v_expm1_2u5.c new file mode 100644 index 000000000000..dd255472cec0 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_expm1_2u5.c @@ -0,0 +1,118 @@ +/* + * Double-precision vector exp(x) - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[11]; + float64x2_t invln2, ln2, shift; + int64x2_t exponent_bias; +#if WANT_SIMD_EXCEPT + uint64x2_t thresh, tiny_bound; +#else + float64x2_t oflow_bound; +#endif +} data = { + /* Generated using fpminimax, with degree=12 in [log(2)/2, log(2)/2]. */ + .poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5), + V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10), + V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16), + V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22), + V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29) }, + .invln2 = V2 (0x1.71547652b82fep0), + .ln2 = { 0x1.62e42fefa39efp-1, 0x1.abc9e3b39803fp-56 }, + .shift = V2 (0x1.8p52), + .exponent_bias = V2 (0x3ff0000000000000), +#if WANT_SIMD_EXCEPT + /* asuint64(oflow_bound) - asuint64(0x1p-51), shifted left by 1 for abs + compare. */ + .thresh = V2 (0x78c56fa6d34b552), + /* asuint64(0x1p-51) << 1. */ + .tiny_bound = V2 (0x3cc0000000000000 << 1), +#else + /* Value above which expm1(x) should overflow. Absolute value of the + underflow bound is greater than this, so it catches both cases - there is + a small window where fallbacks are triggered unnecessarily. */ + .oflow_bound = V2 (0x1.62b7d369a5aa9p+9), +#endif +}; + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (expm1, x, y, special); +} + +/* Double-precision vector exp(x) - 1 function. + The maximum error observed error is 2.18 ULP: + _ZGVnN2v_expm1 (0x1.634ba0c237d7bp-2) got 0x1.a8b9ea8d66e22p-2 + want 0x1.a8b9ea8d66e2p-2. */ +float64x2_t VPCS_ATTR V_NAME_D1 (expm1) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint64x2_t ix = vreinterpretq_u64_f64 (x); + +#if WANT_SIMD_EXCEPT + /* If fp exceptions are to be triggered correctly, fall back to scalar for + |x| < 2^-51, |x| > oflow_bound, Inf & NaN. Add ix to itself for + shift-left by 1, and compare with thresh which was left-shifted offline - + this is effectively an absolute compare. */ + uint64x2_t special + = vcgeq_u64 (vsubq_u64 (vaddq_u64 (ix, ix), d->tiny_bound), d->thresh); + if (unlikely (v_any_u64 (special))) + x = v_zerofy_f64 (x, special); +#else + /* Large input, NaNs and Infs. */ + uint64x2_t special = vcageq_f64 (x, d->oflow_bound); +#endif + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + float64x2_t n = vsubq_f64 (vfmaq_f64 (d->shift, d->invln2, x), d->shift); + int64x2_t i = vcvtq_s64_f64 (n); + float64x2_t f = vfmsq_laneq_f64 (x, n, d->ln2, 0); + f = vfmsq_laneq_f64 (f, n, d->ln2, 1); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + float64x2_t f2 = vmulq_f64 (f, f); + float64x2_t f4 = vmulq_f64 (f2, f2); + float64x2_t f8 = vmulq_f64 (f4, f4); + float64x2_t p = vfmaq_f64 (f, f2, v_estrin_10_f64 (f, f2, f4, f8, d->poly)); + + /* Assemble the result. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^i. */ + int64x2_t u = vaddq_s64 (vshlq_n_s64 (i, 52), d->exponent_bias); + float64x2_t t = vreinterpretq_f64_s64 (u); + + if (unlikely (v_any_u64 (special))) + return special_case (vreinterpretq_f64_u64 (ix), + vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t), + special); + + /* expm1(x) ~= p * t + (t - 1). */ + return vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t); +} + +PL_SIG (V, D, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (V_NAME_D1 (expm1), 1.68) +PL_TEST_EXPECT_FENV (V_NAME_D1 (expm1), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0, 0x1p-51, 1000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1p-51, 0x1.62b7d369a5aa9p+9, 100000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1.62b7d369a5aa9p+9, inf, 100) diff --git a/contrib/arm-optimized-routines/pl/math/v_expm1f_1u6.c b/contrib/arm-optimized-routines/pl/math/v_expm1f_1u6.c new file mode 100644 index 000000000000..6b282d0cc00f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_expm1f_1u6.c @@ -0,0 +1,117 @@ +/* + * Single-precision vector exp(x) - 1 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[5]; + float32x4_t invln2_and_ln2; + float32x4_t shift; + int32x4_t exponent_bias; +#if WANT_SIMD_EXCEPT + uint32x4_t thresh; +#else + float32x4_t oflow_bound; +#endif +} data = { + /* Generated using fpminimax with degree=5 in [-log(2)/2, log(2)/2]. */ + .poly = { V4 (0x1.fffffep-2), V4 (0x1.5554aep-3), V4 (0x1.555736p-5), + V4 (0x1.12287cp-7), V4 (0x1.6b55a2p-10) }, + /* Stores constants: invln2, ln2_hi, ln2_lo, 0. */ + .invln2_and_ln2 = { 0x1.715476p+0f, 0x1.62e4p-1f, 0x1.7f7d1cp-20f, 0 }, + .shift = V4 (0x1.8p23f), + .exponent_bias = V4 (0x3f800000), +#if !WANT_SIMD_EXCEPT + /* Value above which expm1f(x) should overflow. Absolute value of the + underflow bound is greater than this, so it catches both cases - there is + a small window where fallbacks are triggered unnecessarily. */ + .oflow_bound = V4 (0x1.5ebc4p+6), +#else + /* asuint(oflow_bound) - asuint(0x1p-23), shifted left by 1 for absolute + compare. */ + .thresh = V4 (0x1d5ebc40), +#endif +}; + +/* asuint(0x1p-23), shifted by 1 for abs compare. */ +#define TinyBound v_u32 (0x34000000 << 1) + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (expm1f, x, y, special); +} + +/* Single-precision vector exp(x) - 1 function. + The maximum error is 1.51 ULP: + _ZGVnN4v_expm1f (0x1.8baa96p-2) got 0x1.e2fb9p-2 + want 0x1.e2fb94p-2. */ +float32x4_t VPCS_ATTR V_NAME_F1 (expm1) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + uint32x4_t ix = vreinterpretq_u32_f32 (x); + +#if WANT_SIMD_EXCEPT + /* If fp exceptions are to be triggered correctly, fall back to scalar for + |x| < 2^-23, |x| > oflow_bound, Inf & NaN. Add ix to itself for + shift-left by 1, and compare with thresh which was left-shifted offline - + this is effectively an absolute compare. */ + uint32x4_t special + = vcgeq_u32 (vsubq_u32 (vaddq_u32 (ix, ix), TinyBound), d->thresh); + if (unlikely (v_any_u32 (special))) + x = v_zerofy_f32 (x, special); +#else + /* Handles very large values (+ve and -ve), +/-NaN, +/-Inf. */ + uint32x4_t special = vcagtq_f32 (x, d->oflow_bound); +#endif + + /* Reduce argument to smaller range: + Let i = round(x / ln2) + and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where 2^i is exact because i is an integer. */ + float32x4_t j = vsubq_f32 ( + vfmaq_laneq_f32 (d->shift, x, d->invln2_and_ln2, 0), d->shift); + int32x4_t i = vcvtq_s32_f32 (j); + float32x4_t f = vfmsq_laneq_f32 (x, j, d->invln2_and_ln2, 1); + f = vfmsq_laneq_f32 (f, j, d->invln2_and_ln2, 2); + + /* Approximate expm1(f) using polynomial. + Taylor expansion for expm1(x) has the form: + x + ax^2 + bx^3 + cx^4 .... + So we calculate the polynomial P(f) = a + bf + cf^2 + ... + and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ + float32x4_t p = v_horner_4_f32 (f, d->poly); + p = vfmaq_f32 (f, vmulq_f32 (f, f), p); + + /* Assemble the result. + expm1(x) ~= 2^i * (p + 1) - 1 + Let t = 2^i. */ + int32x4_t u = vaddq_s32 (vshlq_n_s32 (i, 23), d->exponent_bias); + float32x4_t t = vreinterpretq_f32_s32 (u); + + if (unlikely (v_any_u32 (special))) + return special_case (vreinterpretq_f32_u32 (ix), + vfmaq_f32 (vsubq_f32 (t, v_f32 (1.0f)), p, t), + special); + + /* expm1(x) ~= p * t + (t - 1). */ + return vfmaq_f32 (vsubq_f32 (t, v_f32 (1.0f)), p, t); +} + +PL_SIG (V, F, 1, expm1, -9.9, 9.9) +PL_TEST_ULP (V_NAME_F1 (expm1), 1.02) +PL_TEST_EXPECT_FENV (V_NAME_F1 (expm1), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (expm1), 0, 0x1p-23, 1000) +PL_TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, 0x1.5ebc4p+6, 1000000) +PL_TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, -0x1.9bbabcp+6, 1000000) +PL_TEST_INTERVAL (V_NAME_F1 (expm1), 0x1.5ebc4p+6, inf, 1000) +PL_TEST_INTERVAL (V_NAME_F1 (expm1), -0x1.9bbabcp+6, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_expm1f_inline.h b/contrib/arm-optimized-routines/pl/math/v_expm1f_inline.h new file mode 100644 index 000000000000..6ae94c452de2 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_expm1f_inline.h @@ -0,0 +1,63 @@ +/* + * Helper for single-precision routines which calculate exp(x) - 1 and do not + * need special-case handling + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_V_EXPM1F_INLINE_H +#define PL_MATH_V_EXPM1F_INLINE_H + +#include "v_math.h" +#include "math_config.h" +#include "poly_advsimd_f32.h" + +struct v_expm1f_data +{ + float32x4_t poly[5]; + float32x4_t invln2_and_ln2, shift; + int32x4_t exponent_bias; +}; + +/* Coefficients generated using fpminimax with degree=5 in [-log(2)/2, + log(2)/2]. Exponent bias is asuint(1.0f). + invln2_and_ln2 Stores constants: invln2, ln2_lo, ln2_hi, 0. */ +#define V_EXPM1F_DATA \ + { \ + .poly = { V4 (0x1.fffffep-2), V4 (0x1.5554aep-3), V4 (0x1.555736p-5), \ + V4 (0x1.12287cp-7), V4 (0x1.6b55a2p-10) }, \ + .shift = V4 (0x1.8p23f), .exponent_bias = V4 (0x3f800000), \ + .invln2_and_ln2 = { 0x1.715476p+0f, 0x1.62e4p-1f, 0x1.7f7d1cp-20f, 0 }, \ + } + +static inline float32x4_t +expm1f_inline (float32x4_t x, const struct v_expm1f_data *d) +{ + /* Helper routine for calculating exp(x) - 1. + Copied from v_expm1f_1u6.c, with all special-case handling removed - the + calling routine should handle special values if required. */ + + /* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */ + float32x4_t j = vsubq_f32 ( + vfmaq_laneq_f32 (d->shift, x, d->invln2_and_ln2, 0), d->shift); + int32x4_t i = vcvtq_s32_f32 (j); + float32x4_t f = vfmsq_laneq_f32 (x, j, d->invln2_and_ln2, 1); + f = vfmsq_laneq_f32 (f, j, d->invln2_and_ln2, 2); + + /* Approximate expm1(f) with polynomial P, expm1(f) ~= f + f^2 * P(f). + Uses Estrin scheme, where the main _ZGVnN4v_expm1f routine uses + Horner. */ + float32x4_t f2 = vmulq_f32 (f, f); + float32x4_t f4 = vmulq_f32 (f2, f2); + float32x4_t p = v_estrin_4_f32 (f, f2, f4, d->poly); + p = vfmaq_f32 (f, f2, p); + + /* t = 2^i. */ + int32x4_t u = vaddq_s32 (vshlq_n_s32 (i, 23), d->exponent_bias); + float32x4_t t = vreinterpretq_f32_s32 (u); + /* expm1(x) ~= p * t + (t - 1). */ + return vfmaq_f32 (vsubq_f32 (t, v_f32 (1.0f)), p, t); +} + +#endif // PL_MATH_V_EXPM1F_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/v_hypot_1u5.c b/contrib/arm-optimized-routines/pl/math/v_hypot_1u5.c new file mode 100644 index 000000000000..d4ff7be89a8f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_hypot_1u5.c @@ -0,0 +1,95 @@ +/* + * Double-precision vector hypot(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#if WANT_SIMD_EXCEPT +static const struct data +{ + uint64x2_t tiny_bound, thres; +} data = { + .tiny_bound = V2 (0x2000000000000000), /* asuint (0x1p-511). */ + .thres = V2 (0x3fe0000000000000), /* asuint (0x1p511) - tiny_bound. */ +}; +#else +static const struct data +{ + uint64x2_t tiny_bound; + uint32x4_t thres; +} data = { + .tiny_bound = V2 (0x0360000000000000), /* asuint (0x1p-969). */ + .thres = V4 (0x7c900000), /* asuint (inf) - tiny_bound. */ +}; +#endif + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, float64x2_t sqsum, + uint32x2_t special) +{ + return v_call2_f64 (hypot, x, y, vsqrtq_f64 (sqsum), vmovl_u32 (special)); +} + +/* Vector implementation of double-precision hypot. + Maximum error observed is 1.21 ULP: + _ZGVnN2vv_hypot (0x1.6a1b193ff85b5p-204, 0x1.bc50676c2a447p-222) + got 0x1.6a1b19400964ep-204 + want 0x1.6a1b19400964dp-204. */ +#if WANT_SIMD_EXCEPT + +float64x2_t VPCS_ATTR V_NAME_D2 (hypot) (float64x2_t x, float64x2_t y) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + float64x2_t ay = vabsq_f64 (y); + + uint64x2_t ix = vreinterpretq_u64_f64 (ax); + uint64x2_t iy = vreinterpretq_u64_f64 (ay); + + /* Extreme values, NaNs, and infinities should be handled by the scalar + fallback for correct flag handling. */ + uint64x2_t specialx = vcgeq_u64 (vsubq_u64 (ix, d->tiny_bound), d->thres); + uint64x2_t specialy = vcgeq_u64 (vsubq_u64 (iy, d->tiny_bound), d->thres); + ax = v_zerofy_f64 (ax, specialx); + ay = v_zerofy_f64 (ay, specialy); + uint32x2_t special = vaddhn_u64 (specialx, specialy); + + float64x2_t sqsum = vfmaq_f64 (vmulq_f64 (ax, ax), ay, ay); + + if (unlikely (v_any_u32h (special))) + return special_case (x, y, sqsum, special); + + return vsqrtq_f64 (sqsum); +} +#else + +float64x2_t VPCS_ATTR V_NAME_D2 (hypot) (float64x2_t x, float64x2_t y) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t sqsum = vfmaq_f64 (vmulq_f64 (x, x), y, y); + + uint32x2_t special = vcge_u32 ( + vsubhn_u64 (vreinterpretq_u64_f64 (sqsum), d->tiny_bound), + vget_low_u32 (d->thres)); + + if (unlikely (v_any_u32h (special))) + return special_case (x, y, sqsum, special); + + return vsqrtq_f64 (sqsum); +} +#endif + +PL_SIG (V, D, 2, hypot, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D2 (hypot), 1.21) +PL_TEST_EXPECT_FENV (V_NAME_D2 (hypot), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL2 (V_NAME_D2 (hypot), 0, inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (hypot), 0, inf, -0, -inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (hypot), -0, -inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (hypot), -0, -inf, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_hypotf_1u5.c b/contrib/arm-optimized-routines/pl/math/v_hypotf_1u5.c new file mode 100644 index 000000000000..3227b0a3fd8b --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_hypotf_1u5.c @@ -0,0 +1,94 @@ +/* + * Single-precision vector hypot(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#if WANT_SIMD_EXCEPT +static const struct data +{ + uint32x4_t tiny_bound, thres; +} data = { + .tiny_bound = V4 (0x20000000), /* asuint (0x1p-63). */ + .thres = V4 (0x3f000000), /* asuint (0x1p63) - tiny_bound. */ +}; +#else +static const struct data +{ + uint32x4_t tiny_bound; + uint16x8_t thres; +} data = { + .tiny_bound = V4 (0x0C800000), /* asuint (0x1p-102). */ + .thres = V8 (0x7300), /* asuint (inf) - tiny_bound. */ +}; +#endif + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, float32x4_t sqsum, + uint16x4_t special) +{ + return v_call2_f32 (hypotf, x, y, vsqrtq_f32 (sqsum), vmovl_u16 (special)); +} + +/* Vector implementation of single-precision hypot. + Maximum error observed is 1.21 ULP: + _ZGVnN4vv_hypotf (0x1.6a419cp-13, 0x1.82a852p-22) got 0x1.6a41d2p-13 + want 0x1.6a41dp-13. */ +#if WANT_SIMD_EXCEPT + +float32x4_t VPCS_ATTR V_NAME_F2 (hypot) (float32x4_t x, float32x4_t y) +{ + const struct data *d = ptr_barrier (&data); + + float32x4_t ax = vabsq_f32 (x); + float32x4_t ay = vabsq_f32 (y); + + uint32x4_t ix = vreinterpretq_u32_f32 (ax); + uint32x4_t iy = vreinterpretq_u32_f32 (ay); + + /* Extreme values, NaNs, and infinities should be handled by the scalar + fallback for correct flag handling. */ + uint32x4_t specialx = vcgeq_u32 (vsubq_u32 (ix, d->tiny_bound), d->thres); + uint32x4_t specialy = vcgeq_u32 (vsubq_u32 (iy, d->tiny_bound), d->thres); + ax = v_zerofy_f32 (ax, specialx); + ay = v_zerofy_f32 (ay, specialy); + uint16x4_t special = vaddhn_u32 (specialx, specialy); + + float32x4_t sqsum = vfmaq_f32 (vmulq_f32 (ax, ax), ay, ay); + + if (unlikely (v_any_u16h (special))) + return special_case (x, y, sqsum, special); + + return vsqrtq_f32 (sqsum); +} +#else + +float32x4_t VPCS_ATTR V_NAME_F2 (hypot) (float32x4_t x, float32x4_t y) +{ + const struct data *d = ptr_barrier (&data); + + float32x4_t sqsum = vfmaq_f32 (vmulq_f32 (x, x), y, y); + + uint16x4_t special = vcge_u16 ( + vsubhn_u32 (vreinterpretq_u32_f32 (sqsum), d->tiny_bound), + vget_low_u16 (d->thres)); + + if (unlikely (v_any_u16h (special))) + return special_case (x, y, sqsum, special); + + return vsqrtq_f32 (sqsum); +} +#endif + +PL_SIG (V, F, 2, hypot, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F2 (hypot), 1.21) +PL_TEST_EXPECT_FENV (V_NAME_F2 (hypot), WANT_SIMD_EXCEPT) +PL_TEST_INTERVAL2 (V_NAME_F2 (hypot), 0, inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_F2 (hypot), 0, inf, -0, -inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_F2 (hypot), -0, -inf, 0, inf, 10000) +PL_TEST_INTERVAL2 (V_NAME_F2 (hypot), -0, -inf, -0, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log10_2u5.c b/contrib/arm-optimized-routines/pl/math/v_log10_2u5.c new file mode 100644 index 000000000000..35dd62fe5e3e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log10_2u5.c @@ -0,0 +1,120 @@ +/* + * Double-precision vector log10(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f64.h" + +#define N (1 << V_LOG10_TABLE_BITS) + +static const struct data +{ + uint64x2_t min_norm; + uint32x4_t special_bound; + float64x2_t poly[5]; + float64x2_t invln10, log10_2, ln2; + uint64x2_t sign_exp_mask; +} data = { + /* Computed from log coefficients divided by log(10) then rounded to double + precision. */ + .poly = { V2 (-0x1.bcb7b1526e506p-3), V2 (0x1.287a7636be1d1p-3), + V2 (-0x1.bcb7b158af938p-4), V2 (0x1.63c78734e6d07p-4), + V2 (-0x1.287461742fee4p-4) }, + .ln2 = V2 (0x1.62e42fefa39efp-1), + .invln10 = V2 (0x1.bcb7b1526e50ep-2), + .log10_2 = V2 (0x1.34413509f79ffp-2), + .min_norm = V2 (0x0010000000000000), /* asuint64(0x1p-1022). */ + .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */ + .sign_exp_mask = V2 (0xfff0000000000000), +}; + +#define Off v_u64 (0x3fe6900900000000) +#define IndexMask (N - 1) + +#define T(s, i) __v_log10_data.s[i] + +struct entry +{ + float64x2_t invc; + float64x2_t log10c; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + struct entry e; + uint64_t i0 = (i[0] >> (52 - V_LOG10_TABLE_BITS)) & IndexMask; + uint64_t i1 = (i[1] >> (52 - V_LOG10_TABLE_BITS)) & IndexMask; + float64x2_t e0 = vld1q_f64 (&__v_log10_data.table[i0].invc); + float64x2_t e1 = vld1q_f64 (&__v_log10_data.table[i1].invc); + e.invc = vuzp1q_f64 (e0, e1); + e.log10c = vuzp2q_f64 (e0, e1); + return e; +} + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, float64x2_t hi, float64x2_t r2, + uint32x2_t special) +{ + return v_call_f64 (log10, x, vfmaq_f64 (hi, r2, y), vmovl_u32 (special)); +} + +/* Fast implementation of double-precision vector log10 + is a slight modification of double-precision vector log. + Max ULP error: < 2.5 ulp (nearest rounding.) + Maximum measured at 2.46 ulp for x in [0.96, 0.97] + _ZGVnN2v_log10(0x1.13192407fcb46p+0) got 0x1.fff6be3cae4bbp-6 + want 0x1.fff6be3cae4b9p-6. */ +float64x2_t VPCS_ATTR V_NAME_D1 (log10) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint32x2_t special = vcge_u32 (vsubhn_u64 (ix, d->min_norm), + vget_low_u32 (d->special_bound)); + + /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + uint64x2_t tmp = vsubq_u64 (ix, Off); + int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); + uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask)); + float64x2_t z = vreinterpretq_f64_u64 (iz); + + struct entry e = lookup (tmp); + + /* log10(x) = log1p(z/c-1)/log(10) + log10(c) + k*log10(2). */ + float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); + float64x2_t kd = vcvtq_f64_s64 (k); + + /* hi = r / log(10) + log10(c) + k*log10(2). + Constants in v_log10_data.c are computed (in extended precision) as + e.log10c := e.logc * ivln10. */ + float64x2_t w = vfmaq_f64 (e.log10c, r, d->invln10); + + /* y = log10(1+r) + n * log10(2). */ + float64x2_t hi = vfmaq_f64 (w, kd, d->log10_2); + + /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t y = v_pw_horner_4_f64 (r, r2, d->poly); + + if (unlikely (v_any_u32h (special))) + return special_case (x, y, hi, r2, special); + return vfmaq_f64 (hi, r2, y); +} + +PL_SIG (V, D, 1, log10, 0.01, 11.1) +PL_TEST_ULP (V_NAME_D1 (log10), 1.97) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (log10)) +PL_TEST_INTERVAL (V_NAME_D1 (log10), -0.0, -inf, 1000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 0, 0x1p-149, 1000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 1.0, 100, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log10), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log10_data.c b/contrib/arm-optimized-routines/pl/math/v_log10_data.c new file mode 100644 index 000000000000..d9a624dab9ce --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log10_data.c @@ -0,0 +1,163 @@ +/* + * Lookup table for double-precision log10(x) vector function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct v_log10_data __v_log10_data = { + /* Computed from log's coefficients div by log(10) then rounded to double + precision. */ + .poly = { -0x1.bcb7b1526e506p-3, 0x1.287a7636be1d1p-3, -0x1.bcb7b158af938p-4, + 0x1.63c78734e6d07p-4, -0x1.287461742fee4p-4 }, + .invln10 = 0x1.bcb7b1526e50ep-2, + .log10_2 = 0x1.34413509f79ffp-2, + /* Algorithm: + + x = 2^k z + log10(x) = k log10(2) + log10(c) + poly(z/c - 1) / log(10) + + where z is in [a;2a) which is split into N subintervals (a=0x1.69009p-1, + N=128) and log(c) and 1/c for the ith subinterval comes from lookup + tables: + + table[i].invc = 1/c + table[i].log10c = (double)log10(c) + + where c is near the center of the subinterval and is chosen by trying + several floating point invc candidates around 1/center and selecting one + for which the error in (double)log(c) is minimized (< 0x1p-74), except the + subinterval that contains 1 and the previous one got tweaked to avoid + cancellation. NB: invc should be optimized to minimize error in + (double)log10(c) instead. */ + .table = { { 0x1.6a133d0dec120p+0, -0x1.345825f221684p-3 }, + { 0x1.6815f2f3e42edp+0, -0x1.2f71a1f0c554ep-3 }, + { 0x1.661e39be1ac9ep+0, -0x1.2a91fdb30b1f4p-3 }, + { 0x1.642bfa30ac371p+0, -0x1.25b9260981a04p-3 }, + { 0x1.623f1d916f323p+0, -0x1.20e7081762193p-3 }, + { 0x1.60578da220f65p+0, -0x1.1c1b914aeefacp-3 }, + { 0x1.5e75349dea571p+0, -0x1.1756af5de404dp-3 }, + { 0x1.5c97fd387a75ap+0, -0x1.12985059c90bfp-3 }, + { 0x1.5abfd2981f200p+0, -0x1.0de0628f63df4p-3 }, + { 0x1.58eca051dc99cp+0, -0x1.092ed492e08eep-3 }, + { 0x1.571e526d9df12p+0, -0x1.0483954caf1dfp-3 }, + { 0x1.5554d555b3fcbp+0, -0x1.ffbd27a9adbcp-4 }, + { 0x1.539015e2a20cdp+0, -0x1.f67f7f2e3d1ap-4 }, + { 0x1.51d0014ee0164p+0, -0x1.ed4e1071ceebep-4 }, + { 0x1.50148538cd9eep+0, -0x1.e428bb47413c4p-4 }, + { 0x1.4e5d8f9f698a1p+0, -0x1.db0f6003028d6p-4 }, + { 0x1.4cab0edca66bep+0, -0x1.d201df6749831p-4 }, + { 0x1.4afcf1a9db874p+0, -0x1.c9001ac5c9672p-4 }, + { 0x1.495327136e16fp+0, -0x1.c009f3c78c79p-4 }, + { 0x1.47ad9e84af28fp+0, -0x1.b71f4cb642e53p-4 }, + { 0x1.460c47b39ae15p+0, -0x1.ae400818526b2p-4 }, + { 0x1.446f12b278001p+0, -0x1.a56c091954f87p-4 }, + { 0x1.42d5efdd720ecp+0, -0x1.9ca3332f096eep-4 }, + { 0x1.4140cfe001a0fp+0, -0x1.93e56a3f23e55p-4 }, + { 0x1.3fafa3b421f69p+0, -0x1.8b3292a3903bp-4 }, + { 0x1.3e225c9c8ece5p+0, -0x1.828a9112d9618p-4 }, + { 0x1.3c98ec29a211ap+0, -0x1.79ed4ac35f5acp-4 }, + { 0x1.3b13442a413fep+0, -0x1.715aa51ed28c4p-4 }, + { 0x1.399156baa3c54p+0, -0x1.68d2861c999e9p-4 }, + { 0x1.38131639b4cdbp+0, -0x1.6054d40ded21p-4 }, + { 0x1.36987540fbf53p+0, -0x1.57e17576bc9a2p-4 }, + { 0x1.352166b648f61p+0, -0x1.4f7851798bb0bp-4 }, + { 0x1.33adddb3eb575p+0, -0x1.47194f5690ae3p-4 }, + { 0x1.323dcd99fc1d3p+0, -0x1.3ec456d58ec47p-4 }, + { 0x1.30d129fefc7d2p+0, -0x1.36794ff3e5f55p-4 }, + { 0x1.2f67e6b72fe7dp+0, -0x1.2e382315725e4p-4 }, + { 0x1.2e01f7cf8b187p+0, -0x1.2600b8ed82e91p-4 }, + { 0x1.2c9f518ddc86ep+0, -0x1.1dd2fa85efc12p-4 }, + { 0x1.2b3fe86e5f413p+0, -0x1.15aed136e3961p-4 }, + { 0x1.29e3b1211b25cp+0, -0x1.0d94269d1a30dp-4 }, + { 0x1.288aa08b373cfp+0, -0x1.0582e4a7659f5p-4 }, + { 0x1.2734abcaa8467p+0, -0x1.faf5eb655742dp-5 }, + { 0x1.25e1c82459b81p+0, -0x1.eaf888487e8eep-5 }, + { 0x1.2491eb1ad59c5p+0, -0x1.db0d75ef25a82p-5 }, + { 0x1.23450a54048b5p+0, -0x1.cb348a49e6431p-5 }, + { 0x1.21fb1bb09e578p+0, -0x1.bb6d9c69acdd8p-5 }, + { 0x1.20b415346d8f7p+0, -0x1.abb88368aa7ap-5 }, + { 0x1.1f6fed179a1acp+0, -0x1.9c1517476af14p-5 }, + { 0x1.1e2e99b93c7b3p+0, -0x1.8c833051bfa4dp-5 }, + { 0x1.1cf011a7a882ap+0, -0x1.7d02a78e7fb31p-5 }, + { 0x1.1bb44b97dba5ap+0, -0x1.6d93565e97c5fp-5 }, + { 0x1.1a7b3e66cdd4fp+0, -0x1.5e351695db0c5p-5 }, + { 0x1.1944e11dc56cdp+0, -0x1.4ee7c2ba67adcp-5 }, + { 0x1.18112aebb1a6ep+0, -0x1.3fab35ba16c01p-5 }, + { 0x1.16e013231b7e9p+0, -0x1.307f4ad854bc9p-5 }, + { 0x1.15b1913f156cfp+0, -0x1.2163ddf4f988cp-5 }, + { 0x1.14859cdedde13p+0, -0x1.1258cb5d19e22p-5 }, + { 0x1.135c2dc68cfa4p+0, -0x1.035defdba3188p-5 }, + { 0x1.12353bdb01684p+0, -0x1.e8e651191bce4p-6 }, + { 0x1.1110bf25b85b4p+0, -0x1.cb30a62be444cp-6 }, + { 0x1.0feeafd2f8577p+0, -0x1.ad9a9b3043823p-6 }, + { 0x1.0ecf062c51c3bp+0, -0x1.9023ecda1ccdep-6 }, + { 0x1.0db1baa076c8bp+0, -0x1.72cc592bd82dp-6 }, + { 0x1.0c96c5bb3048ep+0, -0x1.55939eb1f9c6ep-6 }, + { 0x1.0b7e20263e070p+0, -0x1.38797ca6cc5ap-6 }, + { 0x1.0a67c2acd0ce3p+0, -0x1.1b7db35c2c072p-6 }, + { 0x1.0953a6391e982p+0, -0x1.fd400812ee9a2p-7 }, + { 0x1.0841c3caea380p+0, -0x1.c3c05fb4620f1p-7 }, + { 0x1.07321489b13eap+0, -0x1.8a7bf3c40e2e3p-7 }, + { 0x1.062491aee9904p+0, -0x1.517249c15a75cp-7 }, + { 0x1.05193497a7cc5p+0, -0x1.18a2ea5330c91p-7 }, + { 0x1.040ff6b5f5e9fp+0, -0x1.c01abc8cdc4e2p-8 }, + { 0x1.0308d19aa6127p+0, -0x1.4f6261750dec9p-8 }, + { 0x1.0203beedb0c67p+0, -0x1.be37b6612afa7p-9 }, + { 0x1.010037d38bcc2p+0, -0x1.bc3a8398ac26p-10 }, + { 1.0, 0.0 }, + { 0x1.fc06d493cca10p-1, 0x1.bb796219f30a5p-9 }, + { 0x1.f81e6ac3b918fp-1, 0x1.b984fdcba61cep-8 }, + { 0x1.f44546ef18996p-1, 0x1.49cf12adf8e8cp-7 }, + { 0x1.f07b10382c84bp-1, 0x1.b6075b5217083p-7 }, + { 0x1.ecbf7070e59d4p-1, 0x1.10b7466fc30ddp-6 }, + { 0x1.e91213f715939p-1, 0x1.4603e4db6a3a1p-6 }, + { 0x1.e572a9a75f7b7p-1, 0x1.7aeb10e99e105p-6 }, + { 0x1.e1e0e2c530207p-1, 0x1.af6e49b0f0e36p-6 }, + { 0x1.de5c72d8a8be3p-1, 0x1.e38f064f41179p-6 }, + { 0x1.dae50fa5658ccp-1, 0x1.0ba75abbb7623p-5 }, + { 0x1.d77a71145a2dap-1, 0x1.25575ee2dba86p-5 }, + { 0x1.d41c51166623ep-1, 0x1.3ed83f477f946p-5 }, + { 0x1.d0ca6ba0bb29fp-1, 0x1.582aa79af60efp-5 }, + { 0x1.cd847e8e59681p-1, 0x1.714f400fa83aep-5 }, + { 0x1.ca4a499693e00p-1, 0x1.8a46ad3901cb9p-5 }, + { 0x1.c71b8e399e821p-1, 0x1.a311903b6b87p-5 }, + { 0x1.c3f80faf19077p-1, 0x1.bbb086f216911p-5 }, + { 0x1.c0df92dc2b0ecp-1, 0x1.d4242bdda648ep-5 }, + { 0x1.bdd1de3cbb542p-1, 0x1.ec6d167c2af1p-5 }, + { 0x1.baceb9e1007a3p-1, 0x1.0245ed8221426p-4 }, + { 0x1.b7d5ef543e55ep-1, 0x1.0e40856c74f64p-4 }, + { 0x1.b4e749977d953p-1, 0x1.1a269a31120fep-4 }, + { 0x1.b20295155478ep-1, 0x1.25f8718fc076cp-4 }, + { 0x1.af279f8e82be2p-1, 0x1.31b64ffc95bfp-4 }, + { 0x1.ac5638197fdf3p-1, 0x1.3d60787ca5063p-4 }, + { 0x1.a98e2f102e087p-1, 0x1.48f72ccd187fdp-4 }, + { 0x1.a6cf5606d05c1p-1, 0x1.547aad6602f1cp-4 }, + { 0x1.a4197fc04d746p-1, 0x1.5feb3989d3acbp-4 }, + { 0x1.a16c80293dc01p-1, 0x1.6b490f3978c79p-4 }, + { 0x1.9ec82c4dc5bc9p-1, 0x1.76946b3f5e703p-4 }, + { 0x1.9c2c5a491f534p-1, 0x1.81cd895717c83p-4 }, + { 0x1.9998e1480b618p-1, 0x1.8cf4a4055c30ep-4 }, + { 0x1.970d9977c6c2dp-1, 0x1.9809f4c48c0ebp-4 }, + { 0x1.948a5c023d212p-1, 0x1.a30db3f9899efp-4 }, + { 0x1.920f0303d6809p-1, 0x1.ae001905458fcp-4 }, + { 0x1.8f9b698a98b45p-1, 0x1.b8e15a2e3a2cdp-4 }, + { 0x1.8d2f6b81726f6p-1, 0x1.c3b1ace2b0996p-4 }, + { 0x1.8acae5bb55badp-1, 0x1.ce71456edfa62p-4 }, + { 0x1.886db5d9275b8p-1, 0x1.d9205759882c4p-4 }, + { 0x1.8617ba567c13cp-1, 0x1.e3bf1513af0dfp-4 }, + { 0x1.83c8d27487800p-1, 0x1.ee4db0412c414p-4 }, + { 0x1.8180de3c5dbe7p-1, 0x1.f8cc5998de3a5p-4 }, + { 0x1.7f3fbe71cdb71p-1, 0x1.019da085eaeb1p-3 }, + { 0x1.7d055498071c1p-1, 0x1.06cd4acdb4e3dp-3 }, + { 0x1.7ad182e54f65ap-1, 0x1.0bf542bef813fp-3 }, + { 0x1.78a42c3c90125p-1, 0x1.11159f14da262p-3 }, + { 0x1.767d342f76944p-1, 0x1.162e761c10d1cp-3 }, + { 0x1.745c7ef26b00ap-1, 0x1.1b3fddc60d43ep-3 }, + { 0x1.7241f15769d0fp-1, 0x1.2049ebac86aa6p-3 }, + { 0x1.702d70d396e41p-1, 0x1.254cb4fb7836ap-3 }, + { 0x1.6e1ee3700cd11p-1, 0x1.2a484e8d0d252p-3 }, + { 0x1.6c162fc9cbe02p-1, 0x1.2f3ccce1c860bp-3 } } +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_log10f_3u5.c b/contrib/arm-optimized-routines/pl/math/v_log10f_3u5.c new file mode 100644 index 000000000000..92bc50ba5bd9 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log10f_3u5.c @@ -0,0 +1,82 @@ +/* + * Single-precision vector log10 function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint32x4_t min_norm; + uint16x8_t special_bound; + float32x4_t poly[8]; + float32x4_t inv_ln10, ln2; + uint32x4_t off, mantissa_mask; +} data = { + /* Use order 9 for log10(1+x), i.e. order 8 for log10(1+x)/x, with x in + [-1/3, 1/3] (offset=2/3). Max. relative error: 0x1.068ee468p-25. */ + .poly = { V4 (-0x1.bcb79cp-3f), V4 (0x1.2879c8p-3f), V4 (-0x1.bcd472p-4f), + V4 (0x1.6408f8p-4f), V4 (-0x1.246f8p-4f), V4 (0x1.f0e514p-5f), + V4 (-0x1.0fc92cp-4f), V4 (0x1.f5f76ap-5f) }, + .ln2 = V4 (0x1.62e43p-1f), + .inv_ln10 = V4 (0x1.bcb7b2p-2f), + .min_norm = V4 (0x00800000), + .special_bound = V8 (0x7f00), /* asuint32(inf) - min_norm. */ + .off = V4 (0x3f2aaaab), /* 0.666667. */ + .mantissa_mask = V4 (0x007fffff), +}; + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, float32x4_t p, float32x4_t r2, + uint16x4_t cmp) +{ + /* Fall back to scalar code. */ + return v_call_f32 (log10f, x, vfmaq_f32 (y, p, r2), vmovl_u16 (cmp)); +} + +/* Fast implementation of AdvSIMD log10f, + uses a similar approach as AdvSIMD logf with the same offset (i.e., 2/3) and + an order 9 polynomial. + Maximum error: 3.305ulps (nearest rounding.) + _ZGVnN4v_log10f(0x1.555c16p+0) got 0x1.ffe2fap-4 + want 0x1.ffe2f4p-4. */ +float32x4_t VPCS_ATTR V_NAME_F1 (log10) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + uint32x4_t u = vreinterpretq_u32_f32 (x); + uint16x4_t special = vcge_u16 (vsubhn_u32 (u, d->min_norm), + vget_low_u16 (d->special_bound)); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = vsubq_u32 (u, d->off); + float32x4_t n = vcvtq_f32_s32 ( + vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend. */ + u = vaddq_u32 (vandq_u32 (u, d->mantissa_mask), d->off); + float32x4_t r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f)); + + /* y = log10(1+r) + n * log10(2). */ + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t poly = v_pw_horner_7_f32 (r, r2, d->poly); + /* y = Log10(2) * n + poly * InvLn(10). */ + float32x4_t y = vfmaq_f32 (r, d->ln2, n); + y = vmulq_f32 (y, d->inv_ln10); + + if (unlikely (v_any_u16h (special))) + return special_case (x, y, poly, r2, special); + return vfmaq_f32 (y, poly, r2); +} + +PL_SIG (V, F, 1, log10, 0.01, 11.1) +PL_TEST_ULP (V_NAME_F1 (log10), 2.81) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_F1 (log10)) +PL_TEST_INTERVAL (V_NAME_F1 (log10), -0.0, -inf, 100) +PL_TEST_INTERVAL (V_NAME_F1 (log10), 0, 0x1p-126, 100) +PL_TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log10), 1.0, 100, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log10), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log1p_2u5.c b/contrib/arm-optimized-routines/pl/math/v_log1p_2u5.c new file mode 100644 index 000000000000..face02ddc6c3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log1p_2u5.c @@ -0,0 +1,128 @@ +/* + * Double-precision vector log(1+x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +const static struct data +{ + float64x2_t poly[19], ln2[2]; + uint64x2_t hf_rt2_top, one_m_hf_rt2_top, umask, inf, minus_one; + int64x2_t one_top; +} data = { + /* Generated using Remez, deg=20, in [sqrt(2)/2-1, sqrt(2)-1]. */ + .poly = { V2 (-0x1.ffffffffffffbp-2), V2 (0x1.55555555551a9p-2), + V2 (-0x1.00000000008e3p-2), V2 (0x1.9999999a32797p-3), + V2 (-0x1.555555552fecfp-3), V2 (0x1.249248e071e5ap-3), + V2 (-0x1.ffffff8bf8482p-4), V2 (0x1.c71c8f07da57ap-4), + V2 (-0x1.9999ca4ccb617p-4), V2 (0x1.7459ad2e1dfa3p-4), + V2 (-0x1.554d2680a3ff2p-4), V2 (0x1.3b4c54d487455p-4), + V2 (-0x1.2548a9ffe80e6p-4), V2 (0x1.0f389a24b2e07p-4), + V2 (-0x1.eee4db15db335p-5), V2 (0x1.e95b494d4a5ddp-5), + V2 (-0x1.15fdf07cb7c73p-4), V2 (0x1.0310b70800fcfp-4), + V2 (-0x1.cfa7385bdb37ep-6) }, + .ln2 = { V2 (0x1.62e42fefa3800p-1), V2 (0x1.ef35793c76730p-45) }, + /* top32(asuint64(sqrt(2)/2)) << 32. */ + .hf_rt2_top = V2 (0x3fe6a09e00000000), + /* (top32(asuint64(1)) - top32(asuint64(sqrt(2)/2))) << 32. */ + .one_m_hf_rt2_top = V2 (0x00095f6200000000), + .umask = V2 (0x000fffff00000000), + .one_top = V2 (0x3ff), + .inf = V2 (0x7ff0000000000000), + .minus_one = V2 (0xbff0000000000000) +}; + +#define BottomMask v_u64 (0xffffffff) + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (log1p, x, y, special); +} + +/* Vector log1p approximation using polynomial on reduced interval. Routine is + a modification of the algorithm used in scalar log1p, with no shortcut for + k=0 and no narrowing for f and k. Maximum observed error is 2.45 ULP: + _ZGVnN2v_log1p(0x1.658f7035c4014p+11) got 0x1.fd61d0727429dp+2 + want 0x1.fd61d0727429fp+2 . */ +VPCS_ATTR float64x2_t V_NAME_D1 (log1p) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint64x2_t ia = vreinterpretq_u64_f64 (vabsq_f64 (x)); + uint64x2_t special = vcgeq_u64 (ia, d->inf); + +#if WANT_SIMD_EXCEPT + special = vorrq_u64 (special, + vcgeq_u64 (ix, vreinterpretq_u64_f64 (v_f64 (-1)))); + if (unlikely (v_any_u64 (special))) + x = v_zerofy_f64 (x, special); +#else + special = vorrq_u64 (special, vcleq_f64 (x, v_f64 (-1))); +#endif + + /* With x + 1 = t * 2^k (where t = f + 1 and k is chosen such that f + is in [sqrt(2)/2, sqrt(2)]): + log1p(x) = k*log(2) + log1p(f). + + f may not be representable exactly, so we need a correction term: + let m = round(1 + x), c = (1 + x) - m. + c << m: at very small x, log1p(x) ~ x, hence: + log(1+x) - log(m) ~ c/m. + + We therefore calculate log1p(x) by k*log2 + log1p(f) + c/m. */ + + /* Obtain correctly scaled k by manipulation in the exponent. + The scalar algorithm casts down to 32-bit at this point to calculate k and + u_red. We stay in double-width to obtain f and k, using the same constants + as the scalar algorithm but shifted left by 32. */ + float64x2_t m = vaddq_f64 (x, v_f64 (1)); + uint64x2_t mi = vreinterpretq_u64_f64 (m); + uint64x2_t u = vaddq_u64 (mi, d->one_m_hf_rt2_top); + + int64x2_t ki + = vsubq_s64 (vreinterpretq_s64_u64 (vshrq_n_u64 (u, 52)), d->one_top); + float64x2_t k = vcvtq_f64_s64 (ki); + + /* Reduce x to f in [sqrt(2)/2, sqrt(2)]. */ + uint64x2_t utop = vaddq_u64 (vandq_u64 (u, d->umask), d->hf_rt2_top); + uint64x2_t u_red = vorrq_u64 (utop, vandq_u64 (mi, BottomMask)); + float64x2_t f = vsubq_f64 (vreinterpretq_f64_u64 (u_red), v_f64 (1)); + + /* Correction term c/m. */ + float64x2_t cm = vdivq_f64 (vsubq_f64 (x, vsubq_f64 (m, v_f64 (1))), m); + + /* Approximate log1p(x) on the reduced input using a polynomial. Because + log1p(0)=0 we choose an approximation of the form: + x + C0*x^2 + C1*x^3 + C2x^4 + ... + Hence approximation has the form f + f^2 * P(f) + where P(x) = C0 + C1*x + C2x^2 + ... + Assembling this all correctly is dealt with at the final step. */ + float64x2_t f2 = vmulq_f64 (f, f); + float64x2_t p = v_pw_horner_18_f64 (f, f2, d->poly); + + float64x2_t ylo = vfmaq_f64 (cm, k, d->ln2[1]); + float64x2_t yhi = vfmaq_f64 (f, k, d->ln2[0]); + float64x2_t y = vaddq_f64 (ylo, yhi); + + if (unlikely (v_any_u64 (special))) + return special_case (vreinterpretq_f64_u64 (ix), vfmaq_f64 (y, f2, p), + special); + + return vfmaq_f64 (y, f2, p); +} + +PL_SIG (V, D, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (V_NAME_D1 (log1p), 1.97) +PL_TEST_EXPECT_FENV (V_NAME_D1 (log1p), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0.0, 0x1p-23, 50000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0x1p-23, 0.001, 50000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0.001, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log1p), 1, inf, 40000) +PL_TEST_INTERVAL (V_NAME_D1 (log1p), -1.0, -inf, 500) diff --git a/contrib/arm-optimized-routines/pl/math/v_log1p_inline.h b/contrib/arm-optimized-routines/pl/math/v_log1p_inline.h new file mode 100644 index 000000000000..bd57bfc6fe6e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log1p_inline.h @@ -0,0 +1,91 @@ +/* + * Helper for vector double-precision routines which calculate log(1 + x) and do + * not need special-case handling + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ +#ifndef PL_MATH_V_LOG1P_INLINE_H +#define PL_MATH_V_LOG1P_INLINE_H + +#include "v_math.h" +#include "poly_advsimd_f64.h" + +struct v_log1p_data +{ + float64x2_t poly[19], ln2[2]; + uint64x2_t hf_rt2_top, one_m_hf_rt2_top, umask; + int64x2_t one_top; +}; + +/* Coefficients generated using Remez, deg=20, in [sqrt(2)/2-1, sqrt(2)-1]. */ +#define V_LOG1P_CONSTANTS_TABLE \ + { \ + .poly = { V2 (-0x1.ffffffffffffbp-2), V2 (0x1.55555555551a9p-2), \ + V2 (-0x1.00000000008e3p-2), V2 (0x1.9999999a32797p-3), \ + V2 (-0x1.555555552fecfp-3), V2 (0x1.249248e071e5ap-3), \ + V2 (-0x1.ffffff8bf8482p-4), V2 (0x1.c71c8f07da57ap-4), \ + V2 (-0x1.9999ca4ccb617p-4), V2 (0x1.7459ad2e1dfa3p-4), \ + V2 (-0x1.554d2680a3ff2p-4), V2 (0x1.3b4c54d487455p-4), \ + V2 (-0x1.2548a9ffe80e6p-4), V2 (0x1.0f389a24b2e07p-4), \ + V2 (-0x1.eee4db15db335p-5), V2 (0x1.e95b494d4a5ddp-5), \ + V2 (-0x1.15fdf07cb7c73p-4), V2 (0x1.0310b70800fcfp-4), \ + V2 (-0x1.cfa7385bdb37ep-6) }, \ + .ln2 = { V2 (0x1.62e42fefa3800p-1), V2 (0x1.ef35793c76730p-45) }, \ + .hf_rt2_top = V2 (0x3fe6a09e00000000), \ + .one_m_hf_rt2_top = V2 (0x00095f6200000000), \ + .umask = V2 (0x000fffff00000000), .one_top = V2 (0x3ff) \ + } + +#define BottomMask v_u64 (0xffffffff) + +static inline float64x2_t +log1p_inline (float64x2_t x, const struct v_log1p_data *d) +{ + /* Helper for calculating log(x + 1). Copied from v_log1p_2u5.c, with several + modifications: + - No special-case handling - this should be dealt with by the caller. + - Pairwise Horner polynomial evaluation for improved accuracy. + - Optionally simulate the shortcut for k=0, used in the scalar routine, + using v_sel, for improved accuracy when the argument to log1p is close to + 0. This feature is enabled by defining WANT_V_LOG1P_K0_SHORTCUT as 1 in + the source of the caller before including this file. + See v_log1pf_2u1.c for details of the algorithm. */ + float64x2_t m = vaddq_f64 (x, v_f64 (1)); + uint64x2_t mi = vreinterpretq_u64_f64 (m); + uint64x2_t u = vaddq_u64 (mi, d->one_m_hf_rt2_top); + + int64x2_t ki + = vsubq_s64 (vreinterpretq_s64_u64 (vshrq_n_u64 (u, 52)), d->one_top); + float64x2_t k = vcvtq_f64_s64 (ki); + + /* Reduce x to f in [sqrt(2)/2, sqrt(2)]. */ + uint64x2_t utop = vaddq_u64 (vandq_u64 (u, d->umask), d->hf_rt2_top); + uint64x2_t u_red = vorrq_u64 (utop, vandq_u64 (mi, BottomMask)); + float64x2_t f = vsubq_f64 (vreinterpretq_f64_u64 (u_red), v_f64 (1)); + + /* Correction term c/m. */ + float64x2_t cm = vdivq_f64 (vsubq_f64 (x, vsubq_f64 (m, v_f64 (1))), m); + +#ifndef WANT_V_LOG1P_K0_SHORTCUT +#error \ + "Cannot use v_log1p_inline.h without specifying whether you need the k0 shortcut for greater accuracy close to 0" +#elif WANT_V_LOG1P_K0_SHORTCUT + /* Shortcut if k is 0 - set correction term to 0 and f to x. The result is + that the approximation is solely the polynomial. */ + uint64x2_t k0 = vceqzq_f64 (k); + cm = v_zerofy_f64 (cm, k0); + f = vbslq_f64 (k0, x, f); +#endif + + /* Approximate log1p(f) on the reduced input using a polynomial. */ + float64x2_t f2 = vmulq_f64 (f, f); + float64x2_t p = v_pw_horner_18_f64 (f, f2, d->poly); + + /* Assemble log1p(x) = k * log2 + log1p(f) + c/m. */ + float64x2_t ylo = vfmaq_f64 (cm, k, d->ln2[1]); + float64x2_t yhi = vfmaq_f64 (f, k, d->ln2[0]); + return vfmaq_f64 (vaddq_f64 (ylo, yhi), f2, p); +} + +#endif // PL_MATH_V_LOG1P_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/v_log1pf_2u1.c b/contrib/arm-optimized-routines/pl/math/v_log1pf_2u1.c new file mode 100644 index 000000000000..153c88da9c88 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log1pf_2u1.c @@ -0,0 +1,126 @@ +/* + * Single-precision vector log(1+x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f32.h" + +const static struct data +{ + float32x4_t poly[8], ln2; + uint32x4_t tiny_bound, minus_one, four, thresh; + int32x4_t three_quarters; +} data = { + .poly = { /* Generated using FPMinimax in [-0.25, 0.5]. First two coefficients + (1, -0.5) are not stored as they can be generated more + efficiently. */ + V4 (0x1.5555aap-2f), V4 (-0x1.000038p-2f), V4 (0x1.99675cp-3f), + V4 (-0x1.54ef78p-3f), V4 (0x1.28a1f4p-3f), V4 (-0x1.0da91p-3f), + V4 (0x1.abcb6p-4f), V4 (-0x1.6f0d5ep-5f) }, + .ln2 = V4 (0x1.62e43p-1f), + .tiny_bound = V4 (0x34000000), /* asuint32(0x1p-23). ulp=0.5 at 0x1p-23. */ + .thresh = V4 (0x4b800000), /* asuint32(INFINITY) - tiny_bound. */ + .minus_one = V4 (0xbf800000), + .four = V4 (0x40800000), + .three_quarters = V4 (0x3f400000) +}; + +static inline float32x4_t +eval_poly (float32x4_t m, const float32x4_t *p) +{ + /* Approximate log(1+m) on [-0.25, 0.5] using split Estrin scheme. */ + float32x4_t p_12 = vfmaq_f32 (v_f32 (-0.5), m, p[0]); + float32x4_t p_34 = vfmaq_f32 (p[1], m, p[2]); + float32x4_t p_56 = vfmaq_f32 (p[3], m, p[4]); + float32x4_t p_78 = vfmaq_f32 (p[5], m, p[6]); + + float32x4_t m2 = vmulq_f32 (m, m); + float32x4_t p_02 = vfmaq_f32 (m, m2, p_12); + float32x4_t p_36 = vfmaq_f32 (p_34, m2, p_56); + float32x4_t p_79 = vfmaq_f32 (p_78, m2, p[7]); + + float32x4_t m4 = vmulq_f32 (m2, m2); + float32x4_t p_06 = vfmaq_f32 (p_02, m4, p_36); + return vfmaq_f32 (p_06, m4, vmulq_f32 (m4, p_79)); +} + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (log1pf, x, y, special); +} + +/* Vector log1pf approximation using polynomial on reduced interval. Accuracy + is roughly 2.02 ULP: + log1pf(0x1.21e13ap-2) got 0x1.fe8028p-3 want 0x1.fe802cp-3. */ +VPCS_ATTR float32x4_t V_NAME_F1 (log1p) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + uint32x4_t ia = vreinterpretq_u32_f32 (vabsq_f32 (x)); + uint32x4_t special_cases + = vorrq_u32 (vcgeq_u32 (vsubq_u32 (ia, d->tiny_bound), d->thresh), + vcgeq_u32 (ix, d->minus_one)); + float32x4_t special_arg = x; + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u32 (special_cases))) + /* Side-step special lanes so fenv exceptions are not triggered + inadvertently. */ + x = v_zerofy_f32 (x, special_cases); +#endif + + /* With x + 1 = t * 2^k (where t = m + 1 and k is chosen such that m + is in [-0.25, 0.5]): + log1p(x) = log(t) + log(2^k) = log1p(m) + k*log(2). + + We approximate log1p(m) with a polynomial, then scale by + k*log(2). Instead of doing this directly, we use an intermediate + scale factor s = 4*k*log(2) to ensure the scale is representable + as a normalised fp32 number. */ + + float32x4_t m = vaddq_f32 (x, v_f32 (1.0f)); + + /* Choose k to scale x to the range [-1/4, 1/2]. */ + int32x4_t k + = vandq_s32 (vsubq_s32 (vreinterpretq_s32_f32 (m), d->three_quarters), + v_s32 (0xff800000)); + uint32x4_t ku = vreinterpretq_u32_s32 (k); + + /* Scale x by exponent manipulation. */ + float32x4_t m_scale + = vreinterpretq_f32_u32 (vsubq_u32 (vreinterpretq_u32_f32 (x), ku)); + + /* Scale up to ensure that the scale factor is representable as normalised + fp32 number, and scale m down accordingly. */ + float32x4_t s = vreinterpretq_f32_u32 (vsubq_u32 (d->four, ku)); + m_scale = vaddq_f32 (m_scale, vfmaq_f32 (v_f32 (-1.0f), v_f32 (0.25f), s)); + + /* Evaluate polynomial on the reduced interval. */ + float32x4_t p = eval_poly (m_scale, d->poly); + + /* The scale factor to be applied back at the end - by multiplying float(k) + by 2^-23 we get the unbiased exponent of k. */ + float32x4_t scale_back = vcvtq_f32_s32 (vshrq_n_s32 (k, 23)); + + /* Apply the scaling back. */ + float32x4_t y = vfmaq_f32 (p, scale_back, d->ln2); + + if (unlikely (v_any_u32 (special_cases))) + return special_case (special_arg, y, special_cases); + return y; +} + +PL_SIG (V, F, 1, log1p, -0.9, 10.0) +PL_TEST_ULP (V_NAME_F1 (log1p), 1.53) +PL_TEST_EXPECT_FENV (V_NAME_F1 (log1p), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (log1p), 0.0, 0x1p-23, 30000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (log1p), 0x1p-23, 1, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log1p), 1, inf, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log1p), -1.0, -inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log1pf_inline.h b/contrib/arm-optimized-routines/pl/math/v_log1pf_inline.h new file mode 100644 index 000000000000..c654c6bad08f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log1pf_inline.h @@ -0,0 +1,67 @@ +/* + * Helper for single-precision routines which calculate log(1 + x) and do not + * need special-case handling + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef PL_MATH_V_LOG1PF_INLINE_H +#define PL_MATH_V_LOG1PF_INLINE_H + +#include "v_math.h" +#include "poly_advsimd_f32.h" + +struct v_log1pf_data +{ + float32x4_t poly[8], ln2; + uint32x4_t four; + int32x4_t three_quarters; +}; + +/* Polynomial generated using FPMinimax in [-0.25, 0.5]. First two coefficients + (1, -0.5) are not stored as they can be generated more efficiently. */ +#define V_LOG1PF_CONSTANTS_TABLE \ + { \ + .poly \ + = { V4 (0x1.5555aap-2f), V4 (-0x1.000038p-2f), V4 (0x1.99675cp-3f), \ + V4 (-0x1.54ef78p-3f), V4 (0x1.28a1f4p-3f), V4 (-0x1.0da91p-3f), \ + V4 (0x1.abcb6p-4f), V4 (-0x1.6f0d5ep-5f) }, \ + .ln2 = V4 (0x1.62e43p-1f), .four = V4 (0x40800000), \ + .three_quarters = V4 (0x3f400000) \ + } + +static inline float32x4_t +eval_poly (float32x4_t m, const float32x4_t *c) +{ + /* Approximate log(1+m) on [-0.25, 0.5] using pairwise Horner (main routine + uses split Estrin, but this way reduces register pressure in the calling + routine). */ + float32x4_t q = vfmaq_f32 (v_f32 (-0.5), m, c[0]); + float32x4_t m2 = vmulq_f32 (m, m); + q = vfmaq_f32 (m, m2, q); + float32x4_t p = v_pw_horner_6_f32 (m, m2, c + 1); + p = vmulq_f32 (m2, p); + return vfmaq_f32 (q, m2, p); +} + +static inline float32x4_t +log1pf_inline (float32x4_t x, const struct v_log1pf_data d) +{ + /* Helper for calculating log(x + 1). Copied from log1pf_2u1.c, with no + special-case handling. See that file for details of the algorithm. */ + float32x4_t m = vaddq_f32 (x, v_f32 (1.0f)); + int32x4_t k + = vandq_s32 (vsubq_s32 (vreinterpretq_s32_f32 (m), d.three_quarters), + v_s32 (0xff800000)); + uint32x4_t ku = vreinterpretq_u32_s32 (k); + float32x4_t s = vreinterpretq_f32_u32 (vsubq_u32 (d.four, ku)); + float32x4_t m_scale + = vreinterpretq_f32_u32 (vsubq_u32 (vreinterpretq_u32_f32 (x), ku)); + m_scale = vaddq_f32 (m_scale, vfmaq_f32 (v_f32 (-1.0f), v_f32 (0.25f), s)); + float32x4_t p = eval_poly (m_scale, d.poly); + float32x4_t scale_back = vmulq_f32 (vcvtq_f32_s32 (k), v_f32 (0x1.0p-23f)); + return vfmaq_f32 (p, scale_back, d.ln2); +} + +#endif // PL_MATH_V_LOG1PF_INLINE_H diff --git a/contrib/arm-optimized-routines/pl/math/v_log2_3u.c b/contrib/arm-optimized-routines/pl/math/v_log2_3u.c new file mode 100644 index 000000000000..2dd2c34b7c97 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log2_3u.c @@ -0,0 +1,109 @@ +/* + * Double-precision vector log2 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" +#include "poly_advsimd_f64.h" + +#define N (1 << V_LOG2_TABLE_BITS) + +static const struct data +{ + uint64x2_t min_norm; + uint32x4_t special_bound; + float64x2_t poly[5]; + float64x2_t invln2; + uint64x2_t sign_exp_mask; +} data = { + /* Each coefficient was generated to approximate log(r) for |r| < 0x1.fp-9 + and N = 128, then scaled by log2(e) in extended precision and rounded back + to double precision. */ + .poly = { V2 (-0x1.71547652b83p-1), V2 (0x1.ec709dc340953p-2), + V2 (-0x1.71547651c8f35p-2), V2 (0x1.2777ebe12dda5p-2), + V2 (-0x1.ec738d616fe26p-3) }, + .invln2 = V2 (0x1.71547652b82fep0), + .min_norm = V2 (0x0010000000000000), /* asuint64(0x1p-1022). */ + .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */ + .sign_exp_mask = V2 (0xfff0000000000000), +}; + +#define Off v_u64 (0x3fe6900900000000) +#define IndexMask (N - 1) + +struct entry +{ + float64x2_t invc; + float64x2_t log2c; +}; + +static inline struct entry +lookup (uint64x2_t i) +{ + struct entry e; + uint64_t i0 = (i[0] >> (52 - V_LOG2_TABLE_BITS)) & IndexMask; + uint64_t i1 = (i[1] >> (52 - V_LOG2_TABLE_BITS)) & IndexMask; + float64x2_t e0 = vld1q_f64 (&__v_log2_data.table[i0].invc); + float64x2_t e1 = vld1q_f64 (&__v_log2_data.table[i1].invc); + e.invc = vuzp1q_f64 (e0, e1); + e.log2c = vuzp2q_f64 (e0, e1); + return e; +} + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, float64x2_t w, float64x2_t r2, + uint32x2_t special) +{ + return v_call_f64 (log2, x, vfmaq_f64 (w, r2, y), vmovl_u32 (special)); +} + +/* Double-precision vector log2 routine. Implements the same algorithm as + vector log10, with coefficients and table entries scaled in extended + precision. The maximum observed error is 2.58 ULP: + _ZGVnN2v_log2(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5 + want 0x1.fffb34198d9ddp-5. */ +float64x2_t VPCS_ATTR V_NAME_D1 (log2) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + uint64x2_t ix = vreinterpretq_u64_f64 (x); + uint32x2_t special = vcge_u32 (vsubhn_u64 (ix, d->min_norm), + vget_low_u32 (d->special_bound)); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + uint64x2_t tmp = vsubq_u64 (ix, Off); + int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); + uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask)); + float64x2_t z = vreinterpretq_f64_u64 (iz); + + struct entry e = lookup (tmp); + + /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */ + + float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); + float64x2_t kd = vcvtq_f64_s64 (k); + float64x2_t w = vfmaq_f64 (e.log2c, r, d->invln2); + + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t y = v_pw_horner_4_f64 (r, r2, d->poly); + w = vaddq_f64 (kd, w); + + if (unlikely (v_any_u32h (special))) + return special_case (x, y, w, r2, special); + return vfmaq_f64 (w, r2, y); +} + +PL_SIG (V, D, 1, log2, 0.01, 11.1) +PL_TEST_ULP (V_NAME_D1 (log2), 2.09) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (log2)) +PL_TEST_INTERVAL (V_NAME_D1 (log2), -0.0, -0x1p126, 100) +PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log2), 1.0, 100, 50000) +PL_TEST_INTERVAL (V_NAME_D1 (log2), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log2_data.c b/contrib/arm-optimized-routines/pl/math/v_log2_data.c new file mode 100644 index 000000000000..50697daff925 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log2_data.c @@ -0,0 +1,153 @@ +/* + * Coefficients and table entries for vector log2 + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << V_LOG2_TABLE_BITS) + +const struct v_log2_data __v_log2_data = { + + /* Each coefficient was generated to approximate log(r) for |r| < 0x1.fp-9 + and N = 128, then scaled by log2(e) in extended precision and rounded back + to double precision. */ + .poly = { -0x1.71547652b83p-1, 0x1.ec709dc340953p-2, -0x1.71547651c8f35p-2, + 0x1.2777ebe12dda5p-2, -0x1.ec738d616fe26p-3 }, + + .invln2 = 0x1.71547652b82fep0, + + /* Derived from tables in v_log_data.c in a similar way as v_log10_data.c. + This means invc is unchanged and log2c was calculated by scaling log(c) by + log2(e) in extended precision and rounding back to double precision. */ + .table = { { 0x1.6a133d0dec120p+0, -0x1.00130d57f5fadp-1 }, + { 0x1.6815f2f3e42edp+0, -0x1.f802661bd725ep-2 }, + { 0x1.661e39be1ac9ep+0, -0x1.efea1c6f73a5bp-2 }, + { 0x1.642bfa30ac371p+0, -0x1.e7dd1dcd06f05p-2 }, + { 0x1.623f1d916f323p+0, -0x1.dfdb4ae024809p-2 }, + { 0x1.60578da220f65p+0, -0x1.d7e484d101958p-2 }, + { 0x1.5e75349dea571p+0, -0x1.cff8ad452f6ep-2 }, + { 0x1.5c97fd387a75ap+0, -0x1.c817a666c997fp-2 }, + { 0x1.5abfd2981f200p+0, -0x1.c04152d640419p-2 }, + { 0x1.58eca051dc99cp+0, -0x1.b87595a3f64b2p-2 }, + { 0x1.571e526d9df12p+0, -0x1.b0b4526c44d07p-2 }, + { 0x1.5554d555b3fcbp+0, -0x1.a8fd6d1a90f5ep-2 }, + { 0x1.539015e2a20cdp+0, -0x1.a150ca2559fc6p-2 }, + { 0x1.51d0014ee0164p+0, -0x1.99ae4e62cca29p-2 }, + { 0x1.50148538cd9eep+0, -0x1.9215df1a1e842p-2 }, + { 0x1.4e5d8f9f698a1p+0, -0x1.8a8761fe1f0d9p-2 }, + { 0x1.4cab0edca66bep+0, -0x1.8302bd1cc9a54p-2 }, + { 0x1.4afcf1a9db874p+0, -0x1.7b87d6fb437f6p-2 }, + { 0x1.495327136e16fp+0, -0x1.741696673a86dp-2 }, + { 0x1.47ad9e84af28fp+0, -0x1.6caee2b3c6fe4p-2 }, + { 0x1.460c47b39ae15p+0, -0x1.6550a3666c27ap-2 }, + { 0x1.446f12b278001p+0, -0x1.5dfbc08de02a4p-2 }, + { 0x1.42d5efdd720ecp+0, -0x1.56b022766c84ap-2 }, + { 0x1.4140cfe001a0fp+0, -0x1.4f6db1c955536p-2 }, + { 0x1.3fafa3b421f69p+0, -0x1.4834579063054p-2 }, + { 0x1.3e225c9c8ece5p+0, -0x1.4103fd2249a76p-2 }, + { 0x1.3c98ec29a211ap+0, -0x1.39dc8c3fe6dabp-2 }, + { 0x1.3b13442a413fep+0, -0x1.32bdeed4b5c8fp-2 }, + { 0x1.399156baa3c54p+0, -0x1.2ba80f41e20ddp-2 }, + { 0x1.38131639b4cdbp+0, -0x1.249ad8332f4a7p-2 }, + { 0x1.36987540fbf53p+0, -0x1.1d96347e7f3ebp-2 }, + { 0x1.352166b648f61p+0, -0x1.169a0f7d6604ap-2 }, + { 0x1.33adddb3eb575p+0, -0x1.0fa654a221909p-2 }, + { 0x1.323dcd99fc1d3p+0, -0x1.08baefcf8251ap-2 }, + { 0x1.30d129fefc7d2p+0, -0x1.01d7cd14deecdp-2 }, + { 0x1.2f67e6b72fe7dp+0, -0x1.f5f9b1ad55495p-3 }, + { 0x1.2e01f7cf8b187p+0, -0x1.e853ff76a77afp-3 }, + { 0x1.2c9f518ddc86ep+0, -0x1.dabe5d624cba1p-3 }, + { 0x1.2b3fe86e5f413p+0, -0x1.cd38a5cef4822p-3 }, + { 0x1.29e3b1211b25cp+0, -0x1.bfc2b38d315f9p-3 }, + { 0x1.288aa08b373cfp+0, -0x1.b25c61f5edd0fp-3 }, + { 0x1.2734abcaa8467p+0, -0x1.a5058d18e9cacp-3 }, + { 0x1.25e1c82459b81p+0, -0x1.97be1113e47a3p-3 }, + { 0x1.2491eb1ad59c5p+0, -0x1.8a85cafdf5e27p-3 }, + { 0x1.23450a54048b5p+0, -0x1.7d5c97e8fc45bp-3 }, + { 0x1.21fb1bb09e578p+0, -0x1.704255d6486e4p-3 }, + { 0x1.20b415346d8f7p+0, -0x1.6336e2cedd7bfp-3 }, + { 0x1.1f6fed179a1acp+0, -0x1.563a1d9b0cc6ap-3 }, + { 0x1.1e2e99b93c7b3p+0, -0x1.494be541aaa6fp-3 }, + { 0x1.1cf011a7a882ap+0, -0x1.3c6c1964dd0f2p-3 }, + { 0x1.1bb44b97dba5ap+0, -0x1.2f9a99f19a243p-3 }, + { 0x1.1a7b3e66cdd4fp+0, -0x1.22d747344446p-3 }, + { 0x1.1944e11dc56cdp+0, -0x1.1622020d4f7f5p-3 }, + { 0x1.18112aebb1a6ep+0, -0x1.097aabb3553f3p-3 }, + { 0x1.16e013231b7e9p+0, -0x1.f9c24b48014c5p-4 }, + { 0x1.15b1913f156cfp+0, -0x1.e0aaa3bdc858ap-4 }, + { 0x1.14859cdedde13p+0, -0x1.c7ae257c952d6p-4 }, + { 0x1.135c2dc68cfa4p+0, -0x1.aecc960a03e58p-4 }, + { 0x1.12353bdb01684p+0, -0x1.9605bb724d541p-4 }, + { 0x1.1110bf25b85b4p+0, -0x1.7d595ca7147cep-4 }, + { 0x1.0feeafd2f8577p+0, -0x1.64c74165002d9p-4 }, + { 0x1.0ecf062c51c3bp+0, -0x1.4c4f31c86d344p-4 }, + { 0x1.0db1baa076c8bp+0, -0x1.33f0f70388258p-4 }, + { 0x1.0c96c5bb3048ep+0, -0x1.1bac5abb3037dp-4 }, + { 0x1.0b7e20263e070p+0, -0x1.0381272495f21p-4 }, + { 0x1.0a67c2acd0ce3p+0, -0x1.d6de4eba2de2ap-5 }, + { 0x1.0953a6391e982p+0, -0x1.a6ec4e8156898p-5 }, + { 0x1.0841c3caea380p+0, -0x1.772be542e3e1bp-5 }, + { 0x1.07321489b13eap+0, -0x1.479cadcde852dp-5 }, + { 0x1.062491aee9904p+0, -0x1.183e4265faa5p-5 }, + { 0x1.05193497a7cc5p+0, -0x1.d2207fdaa1b85p-6 }, + { 0x1.040ff6b5f5e9fp+0, -0x1.742486cb4a6a2p-6 }, + { 0x1.0308d19aa6127p+0, -0x1.1687d77cfc299p-6 }, + { 0x1.0203beedb0c67p+0, -0x1.7293623a6b5dep-7 }, + { 0x1.010037d38bcc2p+0, -0x1.70ec80ec8f25dp-8 }, + { 1.0, 0.0 }, + { 0x1.fc06d493cca10p-1, 0x1.704c1ca6b6bc9p-7 }, + { 0x1.f81e6ac3b918fp-1, 0x1.6eac8ba664beap-6 }, + { 0x1.f44546ef18996p-1, 0x1.11e67d040772dp-5 }, + { 0x1.f07b10382c84bp-1, 0x1.6bc665e2105dep-5 }, + { 0x1.ecbf7070e59d4p-1, 0x1.c4f8a9772bf1dp-5 }, + { 0x1.e91213f715939p-1, 0x1.0ebff10fbb951p-4 }, + { 0x1.e572a9a75f7b7p-1, 0x1.3aaf4d7805d11p-4 }, + { 0x1.e1e0e2c530207p-1, 0x1.664ba81a4d717p-4 }, + { 0x1.de5c72d8a8be3p-1, 0x1.9196387da6de4p-4 }, + { 0x1.dae50fa5658ccp-1, 0x1.bc902f2b7796p-4 }, + { 0x1.d77a71145a2dap-1, 0x1.e73ab5f584f28p-4 }, + { 0x1.d41c51166623ep-1, 0x1.08cb78510d232p-3 }, + { 0x1.d0ca6ba0bb29fp-1, 0x1.1dd2fe2f0dcb5p-3 }, + { 0x1.cd847e8e59681p-1, 0x1.32b4784400df4p-3 }, + { 0x1.ca4a499693e00p-1, 0x1.47706f3d49942p-3 }, + { 0x1.c71b8e399e821p-1, 0x1.5c0768ee4a4dcp-3 }, + { 0x1.c3f80faf19077p-1, 0x1.7079e86fc7c6dp-3 }, + { 0x1.c0df92dc2b0ecp-1, 0x1.84c86e1183467p-3 }, + { 0x1.bdd1de3cbb542p-1, 0x1.98f377a34b499p-3 }, + { 0x1.baceb9e1007a3p-1, 0x1.acfb803bc924bp-3 }, + { 0x1.b7d5ef543e55ep-1, 0x1.c0e10098b025fp-3 }, + { 0x1.b4e749977d953p-1, 0x1.d4a46efe103efp-3 }, + { 0x1.b20295155478ep-1, 0x1.e8463f45b8d0bp-3 }, + { 0x1.af279f8e82be2p-1, 0x1.fbc6e3228997fp-3 }, + { 0x1.ac5638197fdf3p-1, 0x1.079364f2e5aa8p-2 }, + { 0x1.a98e2f102e087p-1, 0x1.1133306010a63p-2 }, + { 0x1.a6cf5606d05c1p-1, 0x1.1ac309631bd17p-2 }, + { 0x1.a4197fc04d746p-1, 0x1.24432485370c1p-2 }, + { 0x1.a16c80293dc01p-1, 0x1.2db3b5449132fp-2 }, + { 0x1.9ec82c4dc5bc9p-1, 0x1.3714ee1d7a32p-2 }, + { 0x1.9c2c5a491f534p-1, 0x1.406700ab52c94p-2 }, + { 0x1.9998e1480b618p-1, 0x1.49aa1d87522b2p-2 }, + { 0x1.970d9977c6c2dp-1, 0x1.52de746d7ecb2p-2 }, + { 0x1.948a5c023d212p-1, 0x1.5c0434336b343p-2 }, + { 0x1.920f0303d6809p-1, 0x1.651b8ad6c90d1p-2 }, + { 0x1.8f9b698a98b45p-1, 0x1.6e24a56ab5831p-2 }, + { 0x1.8d2f6b81726f6p-1, 0x1.771fb04ec29b1p-2 }, + { 0x1.8acae5bb55badp-1, 0x1.800cd6f19c25ep-2 }, + { 0x1.886db5d9275b8p-1, 0x1.88ec441df11dfp-2 }, + { 0x1.8617ba567c13cp-1, 0x1.91be21b7c93f5p-2 }, + { 0x1.83c8d27487800p-1, 0x1.9a8298f8c7454p-2 }, + { 0x1.8180de3c5dbe7p-1, 0x1.a339d255c04ddp-2 }, + { 0x1.7f3fbe71cdb71p-1, 0x1.abe3f59f43db7p-2 }, + { 0x1.7d055498071c1p-1, 0x1.b48129deca9efp-2 }, + { 0x1.7ad182e54f65ap-1, 0x1.bd119575364c1p-2 }, + { 0x1.78a42c3c90125p-1, 0x1.c5955e23ebcbcp-2 }, + { 0x1.767d342f76944p-1, 0x1.ce0ca8f4e1557p-2 }, + { 0x1.745c7ef26b00ap-1, 0x1.d6779a5a75774p-2 }, + { 0x1.7241f15769d0fp-1, 0x1.ded6563550d27p-2 }, + { 0x1.702d70d396e41p-1, 0x1.e728ffafd840ep-2 }, + { 0x1.6e1ee3700cd11p-1, 0x1.ef6fb96c8d739p-2 }, + { 0x1.6c162fc9cbe02p-1, 0x1.f7aaa57907219p-2 } } +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_log2f_2u5.c b/contrib/arm-optimized-routines/pl/math/v_log2f_2u5.c new file mode 100644 index 000000000000..c64d88742136 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log2f_2u5.c @@ -0,0 +1,77 @@ +/* + * Single-precision vector log2 function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + uint32x4_t min_norm; + uint16x8_t special_bound; + uint32x4_t off, mantissa_mask; + float32x4_t poly[9]; +} data = { + /* Coefficients generated using Remez algorithm approximate + log2(1+r)/r for r in [ -1/3, 1/3 ]. + rel error: 0x1.c4c4b0cp-26. */ + .poly = { V4 (0x1.715476p0f), /* (float)(1 / ln(2)). */ + V4 (-0x1.715458p-1f), V4 (0x1.ec701cp-2f), V4 (-0x1.7171a4p-2f), + V4 (0x1.27a0b8p-2f), V4 (-0x1.e5143ep-3f), V4 (0x1.9d8ecap-3f), + V4 (-0x1.c675bp-3f), V4 (0x1.9e495p-3f) }, + .min_norm = V4 (0x00800000), + .special_bound = V8 (0x7f00), /* asuint32(inf) - min_norm. */ + .off = V4 (0x3f2aaaab), /* 0.666667. */ + .mantissa_mask = V4 (0x007fffff), +}; + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t n, float32x4_t p, float32x4_t r, + uint16x4_t cmp) +{ + /* Fall back to scalar code. */ + return v_call_f32 (log2f, x, vfmaq_f32 (n, p, r), vmovl_u16 (cmp)); +} + +/* Fast implementation for single precision AdvSIMD log2, + relies on same argument reduction as AdvSIMD logf. + Maximum error: 2.48 ULPs + _ZGVnN4v_log2f(0x1.558174p+0) got 0x1.a9be84p-2 + want 0x1.a9be8p-2. */ +float32x4_t VPCS_ATTR V_NAME_F1 (log2) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + uint32x4_t u = vreinterpretq_u32_f32 (x); + uint16x4_t special = vcge_u16 (vsubhn_u32 (u, d->min_norm), + vget_low_u16 (d->special_bound)); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = vsubq_u32 (u, d->off); + float32x4_t n = vcvtq_f32_s32 ( + vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend. */ + u = vaddq_u32 (vandq_u32 (u, d->mantissa_mask), d->off); + float32x4_t r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f)); + + /* y = log2(1+r) + n. */ + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t p = v_pw_horner_8_f32 (r, r2, d->poly); + + if (unlikely (v_any_u16h (special))) + return special_case (x, n, p, r, special); + return vfmaq_f32 (n, p, r); +} + +PL_SIG (V, F, 1, log2, 0.01, 11.1) +PL_TEST_ULP (V_NAME_F1 (log2), 1.99) +PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_F1 (log2)) +PL_TEST_INTERVAL (V_NAME_F1 (log2), -0.0, -0x1p126, 100) +PL_TEST_INTERVAL (V_NAME_F1 (log2), 0x1p-149, 0x1p-126, 4000) +PL_TEST_INTERVAL (V_NAME_F1 (log2), 0x1p-126, 0x1p-23, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log2), 0x1p-23, 1.0, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log2), 1.0, 100, 50000) +PL_TEST_INTERVAL (V_NAME_F1 (log2), 100, inf, 50000) diff --git a/contrib/arm-optimized-routines/pl/math/v_log_data.c b/contrib/arm-optimized-routines/pl/math/v_log_data.c new file mode 100644 index 000000000000..a26e8a051d97 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log_data.c @@ -0,0 +1,161 @@ +/* + * Lookup table for double-precision log(x) vector function. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct v_log_data __v_log_data = { + /* Worst-case error: 1.17 + 0.5 ulp. + Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */ + .poly = { -0x1.ffffffffffff7p-2, 0x1.55555555170d4p-2, -0x1.0000000399c27p-2, + 0x1.999b2e90e94cap-3, -0x1.554e550bd501ep-3 }, + .ln2 = 0x1.62e42fefa39efp-1, + /* Algorithm: + + x = 2^k z + log(x) = k ln2 + log(c) + poly(z/c - 1) + + where z is in [a;2a) which is split into N subintervals (a=0x1.69009p-1, + N=128) and log(c) and 1/c for the ith subinterval comes from two lookup + tables: + + table[i].invc = 1/c + table[i].logc = (double)log(c) + + where c is near the center of the subinterval and is chosen by trying + several floating point invc candidates around 1/center and selecting one + for which the error in (double)log(c) is minimized (< 0x1p-74), except the + subinterval that contains 1 and the previous one got tweaked to avoid + cancellation. */ + .table = { { 0x1.6a133d0dec120p+0, -0x1.62fe995eb963ap-2 }, + { 0x1.6815f2f3e42edp+0, -0x1.5d5a48dad6b67p-2 }, + { 0x1.661e39be1ac9ep+0, -0x1.57bde257d2769p-2 }, + { 0x1.642bfa30ac371p+0, -0x1.52294fbf2af55p-2 }, + { 0x1.623f1d916f323p+0, -0x1.4c9c7b598aa38p-2 }, + { 0x1.60578da220f65p+0, -0x1.47174fc5ff560p-2 }, + { 0x1.5e75349dea571p+0, -0x1.4199b7fa7b5cap-2 }, + { 0x1.5c97fd387a75ap+0, -0x1.3c239f48cfb99p-2 }, + { 0x1.5abfd2981f200p+0, -0x1.36b4f154d2aebp-2 }, + { 0x1.58eca051dc99cp+0, -0x1.314d9a0ff32fbp-2 }, + { 0x1.571e526d9df12p+0, -0x1.2bed85cca3cffp-2 }, + { 0x1.5554d555b3fcbp+0, -0x1.2694a11421af9p-2 }, + { 0x1.539015e2a20cdp+0, -0x1.2142d8d014fb2p-2 }, + { 0x1.51d0014ee0164p+0, -0x1.1bf81a2c77776p-2 }, + { 0x1.50148538cd9eep+0, -0x1.16b452a39c6a4p-2 }, + { 0x1.4e5d8f9f698a1p+0, -0x1.11776ffa6c67ep-2 }, + { 0x1.4cab0edca66bep+0, -0x1.0c416035020e0p-2 }, + { 0x1.4afcf1a9db874p+0, -0x1.071211aa10fdap-2 }, + { 0x1.495327136e16fp+0, -0x1.01e972e293b1bp-2 }, + { 0x1.47ad9e84af28fp+0, -0x1.f98ee587fd434p-3 }, + { 0x1.460c47b39ae15p+0, -0x1.ef5800ad716fbp-3 }, + { 0x1.446f12b278001p+0, -0x1.e52e160484698p-3 }, + { 0x1.42d5efdd720ecp+0, -0x1.db1104b19352ep-3 }, + { 0x1.4140cfe001a0fp+0, -0x1.d100ac59e0bd6p-3 }, + { 0x1.3fafa3b421f69p+0, -0x1.c6fced287c3bdp-3 }, + { 0x1.3e225c9c8ece5p+0, -0x1.bd05a7b317c29p-3 }, + { 0x1.3c98ec29a211ap+0, -0x1.b31abd229164fp-3 }, + { 0x1.3b13442a413fep+0, -0x1.a93c0edadb0a3p-3 }, + { 0x1.399156baa3c54p+0, -0x1.9f697ee30d7ddp-3 }, + { 0x1.38131639b4cdbp+0, -0x1.95a2efa9aa40ap-3 }, + { 0x1.36987540fbf53p+0, -0x1.8be843d796044p-3 }, + { 0x1.352166b648f61p+0, -0x1.82395ecc477edp-3 }, + { 0x1.33adddb3eb575p+0, -0x1.7896240966422p-3 }, + { 0x1.323dcd99fc1d3p+0, -0x1.6efe77aca8c55p-3 }, + { 0x1.30d129fefc7d2p+0, -0x1.65723e117ec5cp-3 }, + { 0x1.2f67e6b72fe7dp+0, -0x1.5bf15c0955706p-3 }, + { 0x1.2e01f7cf8b187p+0, -0x1.527bb6c111da1p-3 }, + { 0x1.2c9f518ddc86ep+0, -0x1.491133c939f8fp-3 }, + { 0x1.2b3fe86e5f413p+0, -0x1.3fb1b90c7fc58p-3 }, + { 0x1.29e3b1211b25cp+0, -0x1.365d2cc485f8dp-3 }, + { 0x1.288aa08b373cfp+0, -0x1.2d13758970de7p-3 }, + { 0x1.2734abcaa8467p+0, -0x1.23d47a721fd47p-3 }, + { 0x1.25e1c82459b81p+0, -0x1.1aa0229f25ec2p-3 }, + { 0x1.2491eb1ad59c5p+0, -0x1.117655ddebc3bp-3 }, + { 0x1.23450a54048b5p+0, -0x1.0856fbf83ab6bp-3 }, + { 0x1.21fb1bb09e578p+0, -0x1.fe83fabbaa106p-4 }, + { 0x1.20b415346d8f7p+0, -0x1.ec6e8507a56cdp-4 }, + { 0x1.1f6fed179a1acp+0, -0x1.da6d68c7cc2eap-4 }, + { 0x1.1e2e99b93c7b3p+0, -0x1.c88078462be0cp-4 }, + { 0x1.1cf011a7a882ap+0, -0x1.b6a786a423565p-4 }, + { 0x1.1bb44b97dba5ap+0, -0x1.a4e2676ac7f85p-4 }, + { 0x1.1a7b3e66cdd4fp+0, -0x1.9330eea777e76p-4 }, + { 0x1.1944e11dc56cdp+0, -0x1.8192f134d5ad9p-4 }, + { 0x1.18112aebb1a6ep+0, -0x1.70084464f0538p-4 }, + { 0x1.16e013231b7e9p+0, -0x1.5e90bdec5cb1fp-4 }, + { 0x1.15b1913f156cfp+0, -0x1.4d2c3433c5536p-4 }, + { 0x1.14859cdedde13p+0, -0x1.3bda7e219879ap-4 }, + { 0x1.135c2dc68cfa4p+0, -0x1.2a9b732d27194p-4 }, + { 0x1.12353bdb01684p+0, -0x1.196eeb2b10807p-4 }, + { 0x1.1110bf25b85b4p+0, -0x1.0854be8ef8a7ep-4 }, + { 0x1.0feeafd2f8577p+0, -0x1.ee998cb277432p-5 }, + { 0x1.0ecf062c51c3bp+0, -0x1.ccadb79919fb9p-5 }, + { 0x1.0db1baa076c8bp+0, -0x1.aae5b1d8618b0p-5 }, + { 0x1.0c96c5bb3048ep+0, -0x1.89413015d7442p-5 }, + { 0x1.0b7e20263e070p+0, -0x1.67bfe7bf158dep-5 }, + { 0x1.0a67c2acd0ce3p+0, -0x1.46618f83941bep-5 }, + { 0x1.0953a6391e982p+0, -0x1.2525df1b0618ap-5 }, + { 0x1.0841c3caea380p+0, -0x1.040c8e2f77c6ap-5 }, + { 0x1.07321489b13eap+0, -0x1.c62aad39f738ap-6 }, + { 0x1.062491aee9904p+0, -0x1.847fe3bdead9cp-6 }, + { 0x1.05193497a7cc5p+0, -0x1.43183683400acp-6 }, + { 0x1.040ff6b5f5e9fp+0, -0x1.01f31c4e1d544p-6 }, + { 0x1.0308d19aa6127p+0, -0x1.82201d1e6b69ap-7 }, + { 0x1.0203beedb0c67p+0, -0x1.00dd0f3e1bfd6p-7 }, + { 0x1.010037d38bcc2p+0, -0x1.ff6fe1feb4e53p-9 }, + { 1.0, 0.0 }, + { 0x1.fc06d493cca10p-1, 0x1.fe91885ec8e20p-8 }, + { 0x1.f81e6ac3b918fp-1, 0x1.fc516f716296dp-7 }, + { 0x1.f44546ef18996p-1, 0x1.7bb4dd70a015bp-6 }, + { 0x1.f07b10382c84bp-1, 0x1.f84c99b34b674p-6 }, + { 0x1.ecbf7070e59d4p-1, 0x1.39f9ce4fb2d71p-5 }, + { 0x1.e91213f715939p-1, 0x1.7756c0fd22e78p-5 }, + { 0x1.e572a9a75f7b7p-1, 0x1.b43ee82db8f3ap-5 }, + { 0x1.e1e0e2c530207p-1, 0x1.f0b3fced60034p-5 }, + { 0x1.de5c72d8a8be3p-1, 0x1.165bd78d4878ep-4 }, + { 0x1.dae50fa5658ccp-1, 0x1.3425d2715ebe6p-4 }, + { 0x1.d77a71145a2dap-1, 0x1.51b8bd91b7915p-4 }, + { 0x1.d41c51166623ep-1, 0x1.6f15632c76a47p-4 }, + { 0x1.d0ca6ba0bb29fp-1, 0x1.8c3c88ecbe503p-4 }, + { 0x1.cd847e8e59681p-1, 0x1.a92ef077625dap-4 }, + { 0x1.ca4a499693e00p-1, 0x1.c5ed5745fa006p-4 }, + { 0x1.c71b8e399e821p-1, 0x1.e27876de1c993p-4 }, + { 0x1.c3f80faf19077p-1, 0x1.fed104fce4cdcp-4 }, + { 0x1.c0df92dc2b0ecp-1, 0x1.0d7bd9c17d78bp-3 }, + { 0x1.bdd1de3cbb542p-1, 0x1.1b76986cef97bp-3 }, + { 0x1.baceb9e1007a3p-1, 0x1.295913d24f750p-3 }, + { 0x1.b7d5ef543e55ep-1, 0x1.37239fa295d17p-3 }, + { 0x1.b4e749977d953p-1, 0x1.44d68dd78714bp-3 }, + { 0x1.b20295155478ep-1, 0x1.52722ebe5d780p-3 }, + { 0x1.af279f8e82be2p-1, 0x1.5ff6d12671f98p-3 }, + { 0x1.ac5638197fdf3p-1, 0x1.6d64c2389484bp-3 }, + { 0x1.a98e2f102e087p-1, 0x1.7abc4da40fddap-3 }, + { 0x1.a6cf5606d05c1p-1, 0x1.87fdbda1e8452p-3 }, + { 0x1.a4197fc04d746p-1, 0x1.95295b06a5f37p-3 }, + { 0x1.a16c80293dc01p-1, 0x1.a23f6d34abbc5p-3 }, + { 0x1.9ec82c4dc5bc9p-1, 0x1.af403a28e04f2p-3 }, + { 0x1.9c2c5a491f534p-1, 0x1.bc2c06a85721ap-3 }, + { 0x1.9998e1480b618p-1, 0x1.c903161240163p-3 }, + { 0x1.970d9977c6c2dp-1, 0x1.d5c5aa93287ebp-3 }, + { 0x1.948a5c023d212p-1, 0x1.e274051823fa9p-3 }, + { 0x1.920f0303d6809p-1, 0x1.ef0e656300c16p-3 }, + { 0x1.8f9b698a98b45p-1, 0x1.fb9509f05aa2ap-3 }, + { 0x1.8d2f6b81726f6p-1, 0x1.04041821f37afp-2 }, + { 0x1.8acae5bb55badp-1, 0x1.0a340a49b3029p-2 }, + { 0x1.886db5d9275b8p-1, 0x1.105a7918a126dp-2 }, + { 0x1.8617ba567c13cp-1, 0x1.1677819812b84p-2 }, + { 0x1.83c8d27487800p-1, 0x1.1c8b405b40c0ep-2 }, + { 0x1.8180de3c5dbe7p-1, 0x1.2295d16cfa6b1p-2 }, + { 0x1.7f3fbe71cdb71p-1, 0x1.28975066318a2p-2 }, + { 0x1.7d055498071c1p-1, 0x1.2e8fd855d86fcp-2 }, + { 0x1.7ad182e54f65ap-1, 0x1.347f83d605e59p-2 }, + { 0x1.78a42c3c90125p-1, 0x1.3a666d1244588p-2 }, + { 0x1.767d342f76944p-1, 0x1.4044adb6f8ec4p-2 }, + { 0x1.745c7ef26b00ap-1, 0x1.461a5f077558cp-2 }, + { 0x1.7241f15769d0fp-1, 0x1.4be799e20b9c8p-2 }, + { 0x1.702d70d396e41p-1, 0x1.51ac76a6b79dfp-2 }, + { 0x1.6e1ee3700cd11p-1, 0x1.57690d5744a45p-2 }, + { 0x1.6c162fc9cbe02p-1, 0x1.5d1d758e45217p-2 } } +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_log_inline.h b/contrib/arm-optimized-routines/pl/math/v_log_inline.h new file mode 100644 index 000000000000..2df00cf4ddf4 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_log_inline.h @@ -0,0 +1,104 @@ +/* + * Double-precision vector log(x) function - inline version + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "math_config.h" + +#ifndef V_LOG_INLINE_POLY_ORDER +# error Cannot use inline log helper without specifying poly order (options are 4 or 5) +#endif + +#if V_LOG_INLINE_POLY_ORDER == 4 +# define POLY \ + { \ + V2 (-0x1.ffffffffcbad3p-2), V2 (0x1.555555578ed68p-2), \ + V2 (-0x1.0000d3a1e7055p-2), V2 (0x1.999392d02a63ep-3) \ + } +#elif V_LOG_INLINE_POLY_ORDER == 5 +# define POLY \ + { \ + V2 (-0x1.ffffffffffff7p-2), V2 (0x1.55555555170d4p-2), \ + V2 (-0x1.0000000399c27p-2), V2 (0x1.999b2e90e94cap-3), \ + V2 (-0x1.554e550bd501ep-3) \ + } +#else +# error Can only choose order 4 or 5 for log poly +#endif + +struct v_log_inline_data +{ + float64x2_t poly[V_LOG_INLINE_POLY_ORDER]; + float64x2_t ln2; + uint64x2_t off, sign_exp_mask; +}; + +#define V_LOG_CONSTANTS \ + { \ + .poly = POLY, .ln2 = V2 (0x1.62e42fefa39efp-1), \ + .sign_exp_mask = V2 (0xfff0000000000000), .off = V2 (0x3fe6900900000000) \ + } + +#define A(i) d->poly[i] +#define N (1 << V_LOG_TABLE_BITS) +#define IndexMask (N - 1) + +struct entry +{ + float64x2_t invc; + float64x2_t logc; +}; + +static inline struct entry +log_lookup (uint64x2_t i) +{ + /* Since N is a power of 2, n % N = n & (N - 1). */ + struct entry e; + uint64_t i0 = (i[0] >> (52 - V_LOG_TABLE_BITS)) & IndexMask; + uint64_t i1 = (i[1] >> (52 - V_LOG_TABLE_BITS)) & IndexMask; + float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc); + float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc); + e.invc = vuzp1q_f64 (e0, e1); + e.logc = vuzp2q_f64 (e0, e1); + return e; +} + +static inline float64x2_t +v_log_inline (float64x2_t x, const struct v_log_inline_data *d) +{ + float64x2_t z, r, r2, p, y, kd, hi; + uint64x2_t ix, iz, tmp; + int64x2_t k; + struct entry e; + + ix = vreinterpretq_u64_f64 (x); + + /* x = 2^k z; where z is in range [Off,2*Off) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + tmp = vsubq_u64 (ix, d->off); + k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */ + iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask)); + z = vreinterpretq_f64_u64 (iz); + e = log_lookup (tmp); + + /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */ + r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); + kd = vcvtq_f64_s64 (k); + + /* hi = r + log(c) + k*Ln2. */ + hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2); + /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */ + r2 = vmulq_f64 (r, r); + y = vfmaq_f64 (A (2), A (3), r); + p = vfmaq_f64 (A (0), A (1), r); +#if V_LOG_POLY_ORDER == 5 + y = vfmaq_f64 (y, A (4), r2); +#endif + y = vfmaq_f64 (p, y, r2); + + return vfmaq_f64 (hi, y, r2); +} diff --git a/contrib/arm-optimized-routines/pl/math/v_logf_inline.h b/contrib/arm-optimized-routines/pl/math/v_logf_inline.h new file mode 100644 index 000000000000..c00fe0909afc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_logf_inline.h @@ -0,0 +1,59 @@ +/* + * Single-precision vector log function - inline version + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" + +struct v_logf_data +{ + float32x4_t poly[7]; + float32x4_t ln2; + uint32x4_t off, mantissa_mask; +}; + +#define V_LOGF_CONSTANTS \ + { \ + .poly \ + = { V4 (-0x1.3e737cp-3f), V4 (0x1.5a9aa2p-3f), V4 (-0x1.4f9934p-3f), \ + V4 (0x1.961348p-3f), V4 (-0x1.00187cp-2f), V4 (0x1.555d7cp-2f), \ + V4 (-0x1.ffffc8p-2f) }, \ + .ln2 = V4 (0x1.62e43p-1f), .off = V4 (0x3f2aaaab), \ + .mantissa_mask = V4 (0x007fffff) \ + } + +#define P(i) d->poly[7 - i] + +static inline float32x4_t +v_logf_inline (float32x4_t x, const struct v_logf_data *d) +{ + float32x4_t n, p, q, r, r2, y; + uint32x4_t u; + + u = vreinterpretq_u32_f32 (x); + + /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ + u = vsubq_u32 (u, d->off); + n = vcvtq_f32_s32 ( + vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend. */ + u = vandq_u32 (u, d->mantissa_mask); + u = vaddq_u32 (u, d->off); + r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f)); + + /* y = log(1+r) + n*ln2. */ + r2 = vmulq_f32 (r, r); + /* n*ln2 + r + r2*(P1 + r*P2 + r2*(P3 + r*P4 + r2*(P5 + r*P6 + r2*P7))). */ + p = vfmaq_f32 (P (5), P (6), r); + q = vfmaq_f32 (P (3), P (4), r); + y = vfmaq_f32 (P (1), P (2), r); + p = vfmaq_f32 (p, P (7), r2); + q = vfmaq_f32 (q, p, r2); + y = vfmaq_f32 (y, q, r2); + p = vfmaq_f32 (r, d->ln2, n); + + return vfmaq_f32 (p, y, r2); +} + +#undef P diff --git a/contrib/arm-optimized-routines/pl/math/v_math.h b/contrib/arm-optimized-routines/pl/math/v_math.h new file mode 100644 index 000000000000..1b10929faccc --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_math.h @@ -0,0 +1,175 @@ +/* + * Vector math abstractions. + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef _V_MATH_H +#define _V_MATH_H + +#ifndef WANT_VMATH +/* Enable the build of vector math code. */ +# define WANT_VMATH 1 +#endif + +#if WANT_VMATH + +# if __aarch64__ +# define VPCS_ATTR __attribute__ ((aarch64_vector_pcs)) +# else +# error "Cannot build without AArch64" +# endif + +# include <stdint.h> +# include "math_config.h" +# if __aarch64__ + +# include <arm_neon.h> + +/* Shorthand helpers for declaring constants. */ +# define V2(X) { X, X } +# define V4(X) { X, X, X, X } +# define V8(X) { X, X, X, X, X, X, X, X } + +static inline int +v_any_u16h (uint16x4_t x) +{ + return vget_lane_u64 (vreinterpret_u64_u16 (x), 0) != 0; +} + +static inline float32x4_t +v_f32 (float x) +{ + return (float32x4_t) V4 (x); +} +static inline uint32x4_t +v_u32 (uint32_t x) +{ + return (uint32x4_t) V4 (x); +} +static inline int32x4_t +v_s32 (int32_t x) +{ + return (int32x4_t) V4 (x); +} + +/* true if any elements of a vector compare result is non-zero. */ +static inline int +v_any_u32 (uint32x4_t x) +{ + /* assume elements in x are either 0 or -1u. */ + return vpaddd_u64 (vreinterpretq_u64_u32 (x)) != 0; +} +static inline int +v_any_u32h (uint32x2_t x) +{ + return vget_lane_u64 (vreinterpret_u64_u32 (x), 0) != 0; +} +static inline float32x4_t +v_lookup_f32 (const float *tab, uint32x4_t idx) +{ + return (float32x4_t){ tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]] }; +} +static inline uint32x4_t +v_lookup_u32 (const uint32_t *tab, uint32x4_t idx) +{ + return (uint32x4_t){ tab[idx[0]], tab[idx[1]], tab[idx[2]], tab[idx[3]] }; +} +static inline float32x4_t +v_call_f32 (float (*f) (float), float32x4_t x, float32x4_t y, uint32x4_t p) +{ + return (float32x4_t){ p[0] ? f (x[0]) : y[0], p[1] ? f (x[1]) : y[1], + p[2] ? f (x[2]) : y[2], p[3] ? f (x[3]) : y[3] }; +} +static inline float32x4_t +v_call2_f32 (float (*f) (float, float), float32x4_t x1, float32x4_t x2, + float32x4_t y, uint32x4_t p) +{ + return (float32x4_t){ p[0] ? f (x1[0], x2[0]) : y[0], + p[1] ? f (x1[1], x2[1]) : y[1], + p[2] ? f (x1[2], x2[2]) : y[2], + p[3] ? f (x1[3], x2[3]) : y[3] }; +} +static inline float32x4_t +v_zerofy_f32 (float32x4_t x, uint32x4_t mask) +{ + return vreinterpretq_f32_u32 (vbicq_u32 (vreinterpretq_u32_f32 (x), mask)); +} + +static inline float64x2_t +v_f64 (double x) +{ + return (float64x2_t) V2 (x); +} +static inline uint64x2_t +v_u64 (uint64_t x) +{ + return (uint64x2_t) V2 (x); +} +static inline int64x2_t +v_s64 (int64_t x) +{ + return (int64x2_t) V2 (x); +} + +/* true if any elements of a vector compare result is non-zero. */ +static inline int +v_any_u64 (uint64x2_t x) +{ + /* assume elements in x are either 0 or -1u. */ + return vpaddd_u64 (x) != 0; +} +/* true if all elements of a vector compare result is 1. */ +static inline int +v_all_u64 (uint64x2_t x) +{ + /* assume elements in x are either 0 or -1u. */ + return vpaddd_s64 (vreinterpretq_s64_u64 (x)) == -2; +} +static inline float64x2_t +v_lookup_f64 (const double *tab, uint64x2_t idx) +{ + return (float64x2_t){ tab[idx[0]], tab[idx[1]] }; +} +static inline uint64x2_t +v_lookup_u64 (const uint64_t *tab, uint64x2_t idx) +{ + return (uint64x2_t){ tab[idx[0]], tab[idx[1]] }; +} + +static inline float64x2_t +v_call_f64 (double (*f) (double), float64x2_t x, float64x2_t y, uint64x2_t p) +{ + double p1 = p[1]; + double x1 = x[1]; + if (likely (p[0])) + y[0] = f (x[0]); + if (likely (p1)) + y[1] = f (x1); + return y; +} + +static inline float64x2_t +v_call2_f64 (double (*f) (double, double), float64x2_t x1, float64x2_t x2, + float64x2_t y, uint64x2_t p) +{ + double p1 = p[1]; + double x1h = x1[1]; + double x2h = x2[1]; + if (likely (p[0])) + y[0] = f (x1[0], x2[0]); + if (likely (p1)) + y[1] = f (x1h, x2h); + return y; +} +static inline float64x2_t +v_zerofy_f64 (float64x2_t x, uint64x2_t mask) +{ + return vreinterpretq_f64_u64 (vbicq_u64 (vreinterpretq_u64_f64 (x), mask)); +} + +# endif +#endif + +#endif diff --git a/contrib/arm-optimized-routines/pl/math/v_pow_1u5.c b/contrib/arm-optimized-routines/pl/math/v_pow_1u5.c new file mode 100644 index 000000000000..9053347d4e35 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_pow_1u5.c @@ -0,0 +1,259 @@ +/* + * Double-precision vector pow function. + * + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +/* Defines parameters of the approximation and scalar fallback. */ +#include "finite_pow.h" + +#define VecSmallExp v_u64 (SmallExp) +#define VecThresExp v_u64 (ThresExp) + +#define VecSmallPowX v_u64 (SmallPowX) +#define VecThresPowX v_u64 (ThresPowX) +#define VecSmallPowY v_u64 (SmallPowY) +#define VecThresPowY v_u64 (ThresPowY) + +static const struct data +{ + float64x2_t log_poly[7]; + float64x2_t exp_poly[3]; + float64x2_t ln2_hi, ln2_lo; + float64x2_t shift, inv_ln2_n, ln2_hi_n, ln2_lo_n; +} data = { + /* Coefficients copied from v_pow_log_data.c + relative error: 0x1.11922ap-70 in [-0x1.6bp-8, 0x1.6bp-8] + Coefficients are scaled to match the scaling during evaluation. */ + .log_poly = { V2 (-0x1p-1), V2 (0x1.555555555556p-2 * -2), + V2 (-0x1.0000000000006p-2 * -2), V2 (0x1.999999959554ep-3 * 4), + V2 (-0x1.555555529a47ap-3 * 4), V2 (0x1.2495b9b4845e9p-3 * -8), + V2 (-0x1.0002b8b263fc3p-3 * -8) }, + .ln2_hi = V2 (0x1.62e42fefa3800p-1), + .ln2_lo = V2 (0x1.ef35793c76730p-45), + /* Polynomial coefficients: abs error: 1.43*2^-58, ulp error: 0.549 + (0.550 without fma) if |x| < ln2/512. */ + .exp_poly = { V2 (0x1.fffffffffffd4p-2), V2 (0x1.5555571d6ef9p-3), + V2 (0x1.5555576a5adcep-5) }, + .shift = V2 (0x1.8p52), /* round to nearest int. without intrinsics. */ + .inv_ln2_n = V2 (0x1.71547652b82fep8), /* N/ln2. */ + .ln2_hi_n = V2 (0x1.62e42fefc0000p-9), /* ln2/N. */ + .ln2_lo_n = V2 (-0x1.c610ca86c3899p-45), +}; + +#define A(i) data.log_poly[i] +#define C(i) data.exp_poly[i] + +/* This version implements an algorithm close to AOR scalar pow but + - does not implement the trick in the exp's specialcase subroutine to avoid + double-rounding, + - does not use a tail in the exponential core computation, + - and pow's exp polynomial order and table bits might differ. + + Maximum measured error is 1.04 ULPs: + _ZGVnN2vv_pow(0x1.024a3e56b3c3p-136, 0x1.87910248b58acp-13) + got 0x1.f71162f473251p-1 + want 0x1.f71162f473252p-1. */ + +static inline float64x2_t +v_masked_lookup_f64 (const double *table, uint64x2_t i) +{ + return (float64x2_t){ + table[(i[0] >> (52 - V_POW_LOG_TABLE_BITS)) & (N_LOG - 1)], + table[(i[1] >> (52 - V_POW_LOG_TABLE_BITS)) & (N_LOG - 1)] + }; +} + +/* Compute y+TAIL = log(x) where the rounded result is y and TAIL has about + additional 15 bits precision. IX is the bit representation of x, but + normalized in the subnormal range using the sign bit for the exponent. */ +static inline float64x2_t +v_log_inline (uint64x2_t ix, float64x2_t *tail, const struct data *d) +{ + /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. + The range is split into N subintervals. + The ith subinterval contains z and c is near its center. */ + uint64x2_t tmp = vsubq_u64 (ix, v_u64 (Off)); + int64x2_t k + = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */ + uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, v_u64 (0xfffULL << 52))); + float64x2_t z = vreinterpretq_f64_u64 (iz); + float64x2_t kd = vcvtq_f64_s64 (k); + /* log(x) = k*Ln2 + log(c) + log1p(z/c-1). */ + float64x2_t invc = v_masked_lookup_f64 (__v_pow_log_data.invc, tmp); + float64x2_t logc = v_masked_lookup_f64 (__v_pow_log_data.logc, tmp); + float64x2_t logctail = v_masked_lookup_f64 (__v_pow_log_data.logctail, tmp); + /* Note: 1/c is j/N or j/N/2 where j is an integer in [N,2N) and + |z/c - 1| < 1/N, so r = z/c - 1 is exactly representible. */ + float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, invc); + /* k*Ln2 + log(c) + r. */ + float64x2_t t1 = vfmaq_f64 (logc, kd, d->ln2_hi); + float64x2_t t2 = vaddq_f64 (t1, r); + float64x2_t lo1 = vfmaq_f64 (logctail, kd, d->ln2_lo); + float64x2_t lo2 = vaddq_f64 (vsubq_f64 (t1, t2), r); + /* Evaluation is optimized assuming superscalar pipelined execution. */ + float64x2_t ar = vmulq_f64 (A (0), r); + float64x2_t ar2 = vmulq_f64 (r, ar); + float64x2_t ar3 = vmulq_f64 (r, ar2); + /* k*Ln2 + log(c) + r + A[0]*r*r. */ + float64x2_t hi = vaddq_f64 (t2, ar2); + float64x2_t lo3 = vfmaq_f64 (vnegq_f64 (ar2), ar, r); + float64x2_t lo4 = vaddq_f64 (vsubq_f64 (t2, hi), ar2); + /* p = log1p(r) - r - A[0]*r*r. */ + float64x2_t a56 = vfmaq_f64 (A (5), r, A (6)); + float64x2_t a34 = vfmaq_f64 (A (3), r, A (4)); + float64x2_t a12 = vfmaq_f64 (A (1), r, A (2)); + float64x2_t p = vfmaq_f64 (a34, ar2, a56); + p = vfmaq_f64 (a12, ar2, p); + p = vmulq_f64 (ar3, p); + float64x2_t lo + = vaddq_f64 (vaddq_f64 (vaddq_f64 (vaddq_f64 (lo1, lo2), lo3), lo4), p); + float64x2_t y = vaddq_f64 (hi, lo); + *tail = vaddq_f64 (vsubq_f64 (hi, y), lo); + return y; +} + +/* Computes sign*exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. */ +static inline float64x2_t +v_exp_inline (float64x2_t x, float64x2_t xtail, const struct data *d) +{ + /* Fallback to scalar exp_inline for all lanes if any lane + contains value of x s.t. |x| <= 2^-54 or >= 512. */ + uint64x2_t abstop + = vandq_u64 (vshrq_n_u64 (vreinterpretq_u64_f64 (x), 52), v_u64 (0x7ff)); + uint64x2_t uoflowx + = vcgeq_u64 (vsubq_u64 (abstop, VecSmallExp), VecThresExp); + if (unlikely (v_any_u64 (uoflowx))) + return v_call2_f64 (exp_nosignbias, x, xtail, x, v_u64 (-1)); + /* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */ + /* x = ln2/N*k + r, with k integer and r in [-ln2/2N, ln2/2N]. */ + float64x2_t z = vmulq_f64 (d->inv_ln2_n, x); + /* z - kd is in [-1, 1] in non-nearest rounding modes. */ + float64x2_t kd = vaddq_f64 (z, d->shift); + uint64x2_t ki = vreinterpretq_u64_f64 (kd); + kd = vsubq_f64 (kd, d->shift); + float64x2_t r = vfmsq_f64 (x, kd, d->ln2_hi_n); + r = vfmsq_f64 (r, kd, d->ln2_lo_n); + /* The code assumes 2^-200 < |xtail| < 2^-8/N. */ + r = vaddq_f64 (r, xtail); + /* 2^(k/N) ~= scale. */ + uint64x2_t idx = vandq_u64 (ki, v_u64 (N_EXP - 1)); + uint64x2_t top = vshlq_n_u64 (ki, 52 - V_POW_EXP_TABLE_BITS); + /* This is only a valid scale when -1023*N < k < 1024*N. */ + uint64x2_t sbits = v_lookup_u64 (SBits, idx); + sbits = vaddq_u64 (sbits, top); + /* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (exp(r) - 1). */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t tmp = vfmaq_f64 (C (1), r, C (2)); + tmp = vfmaq_f64 (C (0), r, tmp); + tmp = vfmaq_f64 (r, r2, tmp); + float64x2_t scale = vreinterpretq_f64_u64 (sbits); + /* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there + is no spurious underflow here even without fma. */ + return vfmaq_f64 (scale, scale, tmp); +} + +float64x2_t VPCS_ATTR V_NAME_D2 (pow) (float64x2_t x, float64x2_t y) +{ + const struct data *d = ptr_barrier (&data); + /* Case of x <= 0 is too complicated to be vectorised efficiently here, + fallback to scalar pow for all lanes if any x < 0 detected. */ + if (v_any_u64 (vclezq_s64 (vreinterpretq_s64_f64 (x)))) + return v_call2_f64 (__pl_finite_pow, x, y, x, v_u64 (-1)); + + uint64x2_t vix = vreinterpretq_u64_f64 (x); + uint64x2_t viy = vreinterpretq_u64_f64 (y); + uint64x2_t vtopx = vshrq_n_u64 (vix, 52); + uint64x2_t vtopy = vshrq_n_u64 (viy, 52); + uint64x2_t vabstopx = vandq_u64 (vtopx, v_u64 (0x7ff)); + uint64x2_t vabstopy = vandq_u64 (vtopy, v_u64 (0x7ff)); + + /* Special cases of x or y. */ +#if WANT_SIMD_EXCEPT + /* Small or large. */ + uint64x2_t specialx + = vcgeq_u64 (vsubq_u64 (vtopx, VecSmallPowX), VecThresPowX); + uint64x2_t specialy + = vcgeq_u64 (vsubq_u64 (vabstopy, VecSmallPowY), VecThresPowY); +#else + /* Inf or nan. */ + uint64x2_t specialx = vcgeq_u64 (vabstopx, v_u64 (0x7ff)); + uint64x2_t specialy = vcgeq_u64 (vabstopy, v_u64 (0x7ff)); + /* The case y==0 does not trigger a special case, since in this case it is + necessary to fix the result only if x is a signalling nan, which already + triggers a special case. We test y==0 directly in the scalar fallback. */ +#endif + uint64x2_t special = vorrq_u64 (specialx, specialy); + /* Fallback to scalar on all lanes if any lane is inf or nan. */ + if (unlikely (v_any_u64 (special))) + return v_call2_f64 (__pl_finite_pow, x, y, x, v_u64 (-1)); + + /* Small cases of x: |x| < 0x1p-126. */ + uint64x2_t smallx = vcltq_u64 (vabstopx, VecSmallPowX); + if (unlikely (v_any_u64 (smallx))) + { + /* Update ix if top 12 bits of x are 0. */ + uint64x2_t sub_x = vceqzq_u64 (vtopx); + if (unlikely (v_any_u64 (sub_x))) + { + /* Normalize subnormal x so exponent becomes negative. */ + uint64x2_t vix_norm + = vreinterpretq_u64_f64 (vmulq_f64 (x, v_f64 (0x1p52))); + vix_norm = vandq_u64 (vix_norm, v_u64 (0x7fffffffffffffff)); + vix_norm = vsubq_u64 (vix_norm, v_u64 (52ULL << 52)); + vix = vbslq_u64 (sub_x, vix_norm, vix); + } + } + + /* Vector Log(ix, &lo). */ + float64x2_t vlo; + float64x2_t vhi = v_log_inline (vix, &vlo, d); + + /* Vector Exp(y_loghi, y_loglo). */ + float64x2_t vehi = vmulq_f64 (y, vhi); + float64x2_t velo = vmulq_f64 (y, vlo); + float64x2_t vemi = vfmsq_f64 (vehi, y, vhi); + velo = vsubq_f64 (velo, vemi); + return v_exp_inline (vehi, velo, d); +} + +PL_SIG (V, D, 2, pow) +PL_TEST_ULP (V_NAME_D2 (pow), 0.55) +PL_TEST_EXPECT_FENV (V_NAME_D2 (pow), WANT_SIMD_EXCEPT) +/* Wide intervals spanning the whole domain but shared between x and y. */ +#define V_POW_INTERVAL2(xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (V_NAME_D2 (pow), xlo, xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (V_NAME_D2 (pow), xlo, xhi, -ylo, -yhi, n) \ + PL_TEST_INTERVAL2 (V_NAME_D2 (pow), -xlo, -xhi, ylo, yhi, n) \ + PL_TEST_INTERVAL2 (V_NAME_D2 (pow), -xlo, -xhi, -ylo, -yhi, n) +#define EXPAND(str) str##000000000 +#define SHL52(str) EXPAND (str) +V_POW_INTERVAL2 (0, SHL52 (SmallPowX), 0, inf, 40000) +V_POW_INTERVAL2 (SHL52 (SmallPowX), SHL52 (BigPowX), 0, inf, 40000) +V_POW_INTERVAL2 (SHL52 (BigPowX), inf, 0, inf, 40000) +V_POW_INTERVAL2 (0, inf, 0, SHL52 (SmallPowY), 40000) +V_POW_INTERVAL2 (0, inf, SHL52 (SmallPowY), SHL52 (BigPowY), 40000) +V_POW_INTERVAL2 (0, inf, SHL52 (BigPowY), inf, 40000) +V_POW_INTERVAL2 (0, inf, 0, inf, 1000) +/* x~1 or y~1. */ +V_POW_INTERVAL2 (0x1p-1, 0x1p1, 0x1p-10, 0x1p10, 10000) +V_POW_INTERVAL2 (0x1p-500, 0x1p500, 0x1p-1, 0x1p1, 10000) +V_POW_INTERVAL2 (0x1.ep-1, 0x1.1p0, 0x1p8, 0x1p16, 10000) +/* around argmaxs of ULP error. */ +V_POW_INTERVAL2 (0x1p-300, 0x1p-200, 0x1p-20, 0x1p-10, 10000) +V_POW_INTERVAL2 (0x1p50, 0x1p100, 0x1p-20, 0x1p-10, 10000) +/* x is negative, y is odd or even integer, or y is real not integer. */ +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), -0.0, -10.0, 3.0, 3.0, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), -0.0, -10.0, 4.0, 4.0, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), -0.0, -10.0, 0.0, 10.0, 10000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), 0.0, 10.0, -0.0, -10.0, 10000) +/* 1.0^y. */ +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), 1.0, 1.0, 0.0, 0x1p-50, 1000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), 1.0, 1.0, 0x1p-50, 1.0, 1000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), 1.0, 1.0, 1.0, 0x1p100, 1000) +PL_TEST_INTERVAL2 (V_NAME_D2 (pow), 1.0, 1.0, -1.0, -0x1p120, 1000) diff --git a/contrib/arm-optimized-routines/math/v_exp_data.c b/contrib/arm-optimized-routines/pl/math/v_pow_exp_data.c index 365355497e95..5d921ef648a4 100644 --- a/contrib/arm-optimized-routines/math/v_exp_data.c +++ b/contrib/arm-optimized-routines/pl/math/v_pow_exp_data.c @@ -1,147 +1,34 @@ /* - * Lookup table for double-precision e^x vector function. + * Shared data between exp, exp2 and pow. * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "v_exp.h" -#if WANT_VMATH +#include "math_config.h" -#define N (1 << V_EXP_TABLE_BITS) +#define N (1 << V_POW_EXP_TABLE_BITS) -/* 2^(j/N), j=0..N. */ -const u64_t __v_exp_data[] = { -#if N == 128 -0x3ff0000000000000, -0x3feff63da9fb3335, -0x3fefec9a3e778061, -0x3fefe315e86e7f85, -0x3fefd9b0d3158574, -0x3fefd06b29ddf6de, -0x3fefc74518759bc8, -0x3fefbe3ecac6f383, -0x3fefb5586cf9890f, -0x3fefac922b7247f7, -0x3fefa3ec32d3d1a2, -0x3fef9b66affed31b, -0x3fef9301d0125b51, -0x3fef8abdc06c31cc, -0x3fef829aaea92de0, -0x3fef7a98c8a58e51, -0x3fef72b83c7d517b, -0x3fef6af9388c8dea, -0x3fef635beb6fcb75, -0x3fef5be084045cd4, -0x3fef54873168b9aa, -0x3fef4d5022fcd91d, -0x3fef463b88628cd6, -0x3fef3f49917ddc96, -0x3fef387a6e756238, -0x3fef31ce4fb2a63f, -0x3fef2b4565e27cdd, -0x3fef24dfe1f56381, -0x3fef1e9df51fdee1, -0x3fef187fd0dad990, -0x3fef1285a6e4030b, -0x3fef0cafa93e2f56, -0x3fef06fe0a31b715, -0x3fef0170fc4cd831, -0x3feefc08b26416ff, -0x3feef6c55f929ff1, -0x3feef1a7373aa9cb, -0x3feeecae6d05d866, -0x3feee7db34e59ff7, -0x3feee32dc313a8e5, -0x3feedea64c123422, -0x3feeda4504ac801c, -0x3feed60a21f72e2a, -0x3feed1f5d950a897, -0x3feece086061892d, -0x3feeca41ed1d0057, -0x3feec6a2b5c13cd0, -0x3feec32af0d7d3de, -0x3feebfdad5362a27, -0x3feebcb299fddd0d, -0x3feeb9b2769d2ca7, -0x3feeb6daa2cf6642, -0x3feeb42b569d4f82, -0x3feeb1a4ca5d920f, -0x3feeaf4736b527da, -0x3feead12d497c7fd, -0x3feeab07dd485429, -0x3feea9268a5946b7, -0x3feea76f15ad2148, -0x3feea5e1b976dc09, -0x3feea47eb03a5585, -0x3feea34634ccc320, -0x3feea23882552225, -0x3feea155d44ca973, -0x3feea09e667f3bcd, -0x3feea012750bdabf, -0x3fee9fb23c651a2f, -0x3fee9f7df9519484, -0x3fee9f75e8ec5f74, -0x3fee9f9a48a58174, -0x3fee9feb564267c9, -0x3feea0694fde5d3f, -0x3feea11473eb0187, -0x3feea1ed0130c132, -0x3feea2f336cf4e62, -0x3feea427543e1a12, -0x3feea589994cce13, -0x3feea71a4623c7ad, -0x3feea8d99b4492ed, -0x3feeaac7d98a6699, -0x3feeace5422aa0db, -0x3feeaf3216b5448c, -0x3feeb1ae99157736, -0x3feeb45b0b91ffc6, -0x3feeb737b0cdc5e5, -0x3feeba44cbc8520f, -0x3feebd829fde4e50, -0x3feec0f170ca07ba, -0x3feec49182a3f090, -0x3feec86319e32323, -0x3feecc667b5de565, -0x3feed09bec4a2d33, -0x3feed503b23e255d, -0x3feed99e1330b358, -0x3feede6b5579fdbf, -0x3feee36bbfd3f37a, -0x3feee89f995ad3ad, -0x3feeee07298db666, -0x3feef3a2b84f15fb, -0x3feef9728de5593a, -0x3feeff76f2fb5e47, -0x3fef05b030a1064a, -0x3fef0c1e904bc1d2, -0x3fef12c25bd71e09, -0x3fef199bdd85529c, -0x3fef20ab5fffd07a, -0x3fef27f12e57d14b, -0x3fef2f6d9406e7b5, -0x3fef3720dcef9069, -0x3fef3f0b555dc3fa, -0x3fef472d4a07897c, -0x3fef4f87080d89f2, -0x3fef5818dcfba487, -0x3fef60e316c98398, -0x3fef69e603db3285, -0x3fef7321f301b460, -0x3fef7c97337b9b5f, -0x3fef864614f5a129, -0x3fef902ee78b3ff6, -0x3fef9a51fbc74c83, -0x3fefa4afa2a490da, -0x3fefaf482d8e67f1, -0x3fefba1bee615a27, -0x3fefc52b376bba97, -0x3fefd0765b6e4540, -0x3fefdbfdad9cbe14, -0x3fefe7c1819e90d8, -0x3feff3c22b8f71f1, -#elif N == 256 +const struct v_pow_exp_data __v_pow_exp_data = { +// exp polynomial coefficients. +.poly = { +// abs error: 1.43*2^-58 +// ulp error: 0.549 (0.550 without fma) +// if |x| < ln2/512 +0x1.fffffffffffd4p-2, +0x1.5555571d6ef9p-3, +0x1.5555576a5adcep-5, +}, +// N/ln2 +.n_over_ln2 = 0x1.71547652b82fep0 * N, +// ln2/N +.ln2_over_n_hi = 0x1.62e42fefc0000p-9, +.ln2_over_n_lo = -0x1.c610ca86c3899p-45, +// Used for rounding to nearest integer without using intrinsics. +.shift = 0x1.8p52, +// 2^(k/N) ~= H[k]*(1 + T[k]) for int k in [0,N) +// sbits[k] = asuint64(H[k]) - (k << 52)/N +.sbits = { 0x3ff0000000000000, 0x3feffb1afa5abcbf, 0x3feff63da9fb3335, @@ -398,6 +285,5 @@ const u64_t __v_exp_data[] = { 0x3fefedba3692d514, 0x3feff3c22b8f71f1, 0x3feff9d96b2a23d9, -#endif +}, }; -#endif diff --git a/contrib/arm-optimized-routines/pl/math/v_pow_log_data.c b/contrib/arm-optimized-routines/pl/math/v_pow_log_data.c new file mode 100644 index 000000000000..036faa5c97c1 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_pow_log_data.c @@ -0,0 +1,174 @@ +/* + * Data for the log part of pow. + * + * Copyright (c) 2018-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +#define N (1 << V_POW_LOG_TABLE_BITS) + +/* Algorithm: + + x = 2^k z + log(x) = k ln2 + log(c) + log(z/c) + log(z/c) = poly(z/c - 1) + + where z is in [0x1.69555p-1; 0x1.69555p0] which is split into N subintervals + and z falls into the ith one, then table entries are computed as + + tab[i].invc = 1/c + tab[i].logc = round(0x1p43*log(c))/0x1p43 + tab[i].logctail = (double)(log(c) - logc) + + where c is chosen near the center of the subinterval such that 1/c has only + a few precision bits so z/c - 1 is exactly representible as double: + + 1/c = center < 1 ? round(N/center)/N : round(2*N/center)/N/2 + + Note: |z/c - 1| < 1/N for the chosen c, |log(c) - logc - logctail| < + 0x1p-97, the last few bits of logc are rounded away so k*ln2hi + logc has no + rounding error and the interval for z is selected such that near x == 1, + where log(x) + is tiny, large cancellation error is avoided in logc + poly(z/c - 1). */ +const struct v_pow_log_data __v_pow_log_data = { + /* relative error: 0x1.11922ap-70 in [-0x1.6bp-8, 0x1.6bp-8] + Coefficients are scaled to match the scaling during evaluation. */ + .poly = { -0x1p-1, -0x1.555555555556p-1, 0x1.0000000000006p-1, + 0x1.999999959554ep-1, -0x1.555555529a47ap-1, -0x1.2495b9b4845e9p0, + 0x1.0002b8b263fc3p0, }, + .ln2_hi = 0x1.62e42fefa3800p-1, + .ln2_lo = 0x1.ef35793c76730p-45, + .invc = { 0x1.6a00000000000p+0, 0x1.6800000000000p+0, 0x1.6600000000000p+0, + 0x1.6400000000000p+0, 0x1.6200000000000p+0, 0x1.6000000000000p+0, + 0x1.5e00000000000p+0, 0x1.5c00000000000p+0, 0x1.5a00000000000p+0, + 0x1.5800000000000p+0, 0x1.5600000000000p+0, 0x1.5600000000000p+0, + 0x1.5400000000000p+0, 0x1.5200000000000p+0, 0x1.5000000000000p+0, + 0x1.4e00000000000p+0, 0x1.4c00000000000p+0, 0x1.4a00000000000p+0, + 0x1.4a00000000000p+0, 0x1.4800000000000p+0, 0x1.4600000000000p+0, + 0x1.4400000000000p+0, 0x1.4200000000000p+0, 0x1.4000000000000p+0, + 0x1.4000000000000p+0, 0x1.3e00000000000p+0, 0x1.3c00000000000p+0, + 0x1.3a00000000000p+0, 0x1.3a00000000000p+0, 0x1.3800000000000p+0, + 0x1.3600000000000p+0, 0x1.3400000000000p+0, 0x1.3400000000000p+0, + 0x1.3200000000000p+0, 0x1.3000000000000p+0, 0x1.3000000000000p+0, + 0x1.2e00000000000p+0, 0x1.2c00000000000p+0, 0x1.2c00000000000p+0, + 0x1.2a00000000000p+0, 0x1.2800000000000p+0, 0x1.2600000000000p+0, + 0x1.2600000000000p+0, 0x1.2400000000000p+0, 0x1.2400000000000p+0, + 0x1.2200000000000p+0, 0x1.2000000000000p+0, 0x1.2000000000000p+0, + 0x1.1e00000000000p+0, 0x1.1c00000000000p+0, 0x1.1c00000000000p+0, + 0x1.1a00000000000p+0, 0x1.1a00000000000p+0, 0x1.1800000000000p+0, + 0x1.1600000000000p+0, 0x1.1600000000000p+0, 0x1.1400000000000p+0, + 0x1.1400000000000p+0, 0x1.1200000000000p+0, 0x1.1000000000000p+0, + 0x1.1000000000000p+0, 0x1.0e00000000000p+0, 0x1.0e00000000000p+0, + 0x1.0c00000000000p+0, 0x1.0c00000000000p+0, 0x1.0a00000000000p+0, + 0x1.0a00000000000p+0, 0x1.0800000000000p+0, 0x1.0800000000000p+0, + 0x1.0600000000000p+0, 0x1.0400000000000p+0, 0x1.0400000000000p+0, + 0x1.0200000000000p+0, 0x1.0200000000000p+0, 0x1.0000000000000p+0, + 0x1.0000000000000p+0, 0x1.fc00000000000p-1, 0x1.f800000000000p-1, + 0x1.f400000000000p-1, 0x1.f000000000000p-1, 0x1.ec00000000000p-1, + 0x1.e800000000000p-1, 0x1.e400000000000p-1, 0x1.e200000000000p-1, + 0x1.de00000000000p-1, 0x1.da00000000000p-1, 0x1.d600000000000p-1, + 0x1.d400000000000p-1, 0x1.d000000000000p-1, 0x1.cc00000000000p-1, + 0x1.ca00000000000p-1, 0x1.c600000000000p-1, 0x1.c400000000000p-1, + 0x1.c000000000000p-1, 0x1.be00000000000p-1, 0x1.ba00000000000p-1, + 0x1.b800000000000p-1, 0x1.b400000000000p-1, 0x1.b200000000000p-1, + 0x1.ae00000000000p-1, 0x1.ac00000000000p-1, 0x1.aa00000000000p-1, + 0x1.a600000000000p-1, 0x1.a400000000000p-1, 0x1.a000000000000p-1, + 0x1.9e00000000000p-1, 0x1.9c00000000000p-1, 0x1.9a00000000000p-1, + 0x1.9600000000000p-1, 0x1.9400000000000p-1, 0x1.9200000000000p-1, + 0x1.9000000000000p-1, 0x1.8c00000000000p-1, 0x1.8a00000000000p-1, + 0x1.8800000000000p-1, 0x1.8600000000000p-1, 0x1.8400000000000p-1, + 0x1.8200000000000p-1, 0x1.7e00000000000p-1, 0x1.7c00000000000p-1, + 0x1.7a00000000000p-1, 0x1.7800000000000p-1, 0x1.7600000000000p-1, + 0x1.7400000000000p-1, 0x1.7200000000000p-1, 0x1.7000000000000p-1, + 0x1.6e00000000000p-1, 0x1.6c00000000000p-1, }, + .logc + = { -0x1.62c82f2b9c800p-2, -0x1.5d1bdbf580800p-2, -0x1.5767717455800p-2, + -0x1.51aad872df800p-2, -0x1.4be5f95777800p-2, -0x1.4618bc21c6000p-2, + -0x1.404308686a800p-2, -0x1.3a64c55694800p-2, -0x1.347dd9a988000p-2, + -0x1.2e8e2bae12000p-2, -0x1.2895a13de8800p-2, -0x1.2895a13de8800p-2, + -0x1.22941fbcf7800p-2, -0x1.1c898c1699800p-2, -0x1.1675cababa800p-2, + -0x1.1058bf9ae4800p-2, -0x1.0a324e2739000p-2, -0x1.0402594b4d000p-2, + -0x1.0402594b4d000p-2, -0x1.fb9186d5e4000p-3, -0x1.ef0adcbdc6000p-3, + -0x1.e27076e2af000p-3, -0x1.d5c216b4fc000p-3, -0x1.c8ff7c79aa000p-3, + -0x1.c8ff7c79aa000p-3, -0x1.bc286742d9000p-3, -0x1.af3c94e80c000p-3, + -0x1.a23bc1fe2b000p-3, -0x1.a23bc1fe2b000p-3, -0x1.9525a9cf45000p-3, + -0x1.87fa06520d000p-3, -0x1.7ab890210e000p-3, -0x1.7ab890210e000p-3, + -0x1.6d60fe719d000p-3, -0x1.5ff3070a79000p-3, -0x1.5ff3070a79000p-3, + -0x1.526e5e3a1b000p-3, -0x1.44d2b6ccb8000p-3, -0x1.44d2b6ccb8000p-3, + -0x1.371fc201e9000p-3, -0x1.29552f81ff000p-3, -0x1.1b72ad52f6000p-3, + -0x1.1b72ad52f6000p-3, -0x1.0d77e7cd09000p-3, -0x1.0d77e7cd09000p-3, + -0x1.fec9131dbe000p-4, -0x1.e27076e2b0000p-4, -0x1.e27076e2b0000p-4, + -0x1.c5e548f5bc000p-4, -0x1.a926d3a4ae000p-4, -0x1.a926d3a4ae000p-4, + -0x1.8c345d631a000p-4, -0x1.8c345d631a000p-4, -0x1.6f0d28ae56000p-4, + -0x1.51b073f062000p-4, -0x1.51b073f062000p-4, -0x1.341d7961be000p-4, + -0x1.341d7961be000p-4, -0x1.16536eea38000p-4, -0x1.f0a30c0118000p-5, + -0x1.f0a30c0118000p-5, -0x1.b42dd71198000p-5, -0x1.b42dd71198000p-5, + -0x1.77458f632c000p-5, -0x1.77458f632c000p-5, -0x1.39e87b9fec000p-5, + -0x1.39e87b9fec000p-5, -0x1.f829b0e780000p-6, -0x1.f829b0e780000p-6, + -0x1.7b91b07d58000p-6, -0x1.fc0a8b0fc0000p-7, -0x1.fc0a8b0fc0000p-7, + -0x1.fe02a6b100000p-8, -0x1.fe02a6b100000p-8, 0x0.0000000000000p+0, + 0x0.0000000000000p+0, 0x1.0101575890000p-7, 0x1.0205658938000p-6, + 0x1.8492528c90000p-6, 0x1.0415d89e74000p-5, 0x1.466aed42e0000p-5, + 0x1.894aa149fc000p-5, 0x1.ccb73cdddc000p-5, 0x1.eea31c006c000p-5, + 0x1.1973bd1466000p-4, 0x1.3bdf5a7d1e000p-4, 0x1.5e95a4d97a000p-4, + 0x1.700d30aeac000p-4, 0x1.9335e5d594000p-4, 0x1.b6ac88dad6000p-4, + 0x1.c885801bc4000p-4, 0x1.ec739830a2000p-4, 0x1.fe89139dbe000p-4, + 0x1.1178e8227e000p-3, 0x1.1aa2b7e23f000p-3, 0x1.2d1610c868000p-3, + 0x1.365fcb0159000p-3, 0x1.4913d8333b000p-3, 0x1.527e5e4a1b000p-3, + 0x1.6574ebe8c1000p-3, 0x1.6f0128b757000p-3, 0x1.7898d85445000p-3, + 0x1.8beafeb390000p-3, 0x1.95a5adcf70000p-3, 0x1.a93ed3c8ae000p-3, + 0x1.b31d8575bd000p-3, 0x1.bd087383be000p-3, 0x1.c6ffbc6f01000p-3, + 0x1.db13db0d49000p-3, 0x1.e530effe71000p-3, 0x1.ef5ade4dd0000p-3, + 0x1.f991c6cb3b000p-3, 0x1.07138604d5800p-2, 0x1.0c42d67616000p-2, + 0x1.1178e8227e800p-2, 0x1.16b5ccbacf800p-2, 0x1.1bf99635a6800p-2, + 0x1.214456d0eb800p-2, 0x1.2bef07cdc9000p-2, 0x1.314f1e1d36000p-2, + 0x1.36b6776be1000p-2, 0x1.3c25277333000p-2, 0x1.419b423d5e800p-2, + 0x1.4718dc271c800p-2, 0x1.4c9e09e173000p-2, 0x1.522ae0738a000p-2, + 0x1.57bf753c8d000p-2, 0x1.5d5bddf596000p-2, }, + .logctail + = { 0x1.ab42428375680p-48, -0x1.ca508d8e0f720p-46, -0x1.362a4d5b6506dp-45, + -0x1.684e49eb067d5p-49, -0x1.41b6993293ee0p-47, 0x1.3d82f484c84ccp-46, + 0x1.c42f3ed820b3ap-50, 0x1.0b1c686519460p-45, 0x1.5594dd4c58092p-45, + 0x1.67b1e99b72bd8p-45, 0x1.5ca14b6cfb03fp-46, 0x1.5ca14b6cfb03fp-46, + -0x1.65a242853da76p-46, -0x1.fafbc68e75404p-46, 0x1.f1fc63382a8f0p-46, + -0x1.6a8c4fd055a66p-45, -0x1.c6bee7ef4030ep-47, -0x1.036b89ef42d7fp-48, + -0x1.036b89ef42d7fp-48, 0x1.d572aab993c87p-47, 0x1.b26b79c86af24p-45, + -0x1.72f4f543fff10p-46, 0x1.1ba91bbca681bp-45, 0x1.7794f689f8434p-45, + 0x1.7794f689f8434p-45, 0x1.94eb0318bb78fp-46, 0x1.a4e633fcd9066p-52, + -0x1.58c64dc46c1eap-45, -0x1.58c64dc46c1eap-45, -0x1.ad1d904c1d4e3p-45, + 0x1.bbdbf7fdbfa09p-45, 0x1.bdb9072534a58p-45, 0x1.bdb9072534a58p-45, + -0x1.0e46aa3b2e266p-46, -0x1.e9e439f105039p-46, -0x1.e9e439f105039p-46, + -0x1.0de8b90075b8fp-45, 0x1.70cc16135783cp-46, 0x1.70cc16135783cp-46, + 0x1.178864d27543ap-48, -0x1.48d301771c408p-45, -0x1.e80a41811a396p-45, + -0x1.e80a41811a396p-45, 0x1.a699688e85bf4p-47, 0x1.a699688e85bf4p-47, + -0x1.575545ca333f2p-45, 0x1.a342c2af0003cp-45, 0x1.a342c2af0003cp-45, + -0x1.d0c57585fbe06p-46, 0x1.53935e85baac8p-45, 0x1.53935e85baac8p-45, + 0x1.37c294d2f5668p-46, 0x1.37c294d2f5668p-46, -0x1.69737c93373dap-45, + 0x1.f025b61c65e57p-46, 0x1.f025b61c65e57p-46, 0x1.c5edaccf913dfp-45, + 0x1.c5edaccf913dfp-45, 0x1.47c5e768fa309p-46, 0x1.d599e83368e91p-45, + 0x1.d599e83368e91p-45, 0x1.c827ae5d6704cp-46, 0x1.c827ae5d6704cp-46, + -0x1.cfc4634f2a1eep-45, -0x1.cfc4634f2a1eep-45, 0x1.502b7f526feaap-48, + 0x1.502b7f526feaap-48, -0x1.980267c7e09e4p-45, -0x1.980267c7e09e4p-45, + -0x1.88d5493faa639p-45, -0x1.f1e7cf6d3a69cp-50, -0x1.f1e7cf6d3a69cp-50, + -0x1.9e23f0dda40e4p-46, -0x1.9e23f0dda40e4p-46, 0x0.0000000000000p+0, + 0x0.0000000000000p+0, -0x1.0c76b999d2be8p-46, -0x1.3dc5b06e2f7d2p-45, + -0x1.aa0ba325a0c34p-45, 0x1.111c05cf1d753p-47, -0x1.c167375bdfd28p-45, + -0x1.97995d05a267dp-46, -0x1.a68f247d82807p-46, -0x1.e113e4fc93b7bp-47, + -0x1.5325d560d9e9bp-45, 0x1.cc85ea5db4ed7p-45, -0x1.c69063c5d1d1ep-45, + 0x1.c1e8da99ded32p-49, 0x1.3115c3abd47dap-45, -0x1.390802bf768e5p-46, + 0x1.646d1c65aacd3p-45, -0x1.dc068afe645e0p-45, -0x1.534d64fa10afdp-45, + 0x1.1ef78ce2d07f2p-45, 0x1.ca78e44389934p-45, 0x1.39d6ccb81b4a1p-47, + 0x1.62fa8234b7289p-51, 0x1.5837954fdb678p-45, 0x1.633e8e5697dc7p-45, + 0x1.9cf8b2c3c2e78p-46, -0x1.5118de59c21e1p-45, -0x1.c661070914305p-46, + -0x1.73d54aae92cd1p-47, 0x1.7f22858a0ff6fp-47, -0x1.8724350562169p-45, + -0x1.c358d4eace1aap-47, -0x1.d4bc4595412b6p-45, -0x1.1ec72c5962bd2p-48, + -0x1.aff2af715b035p-45, 0x1.212276041f430p-51, -0x1.a211565bb8e11p-51, + 0x1.bcbecca0cdf30p-46, 0x1.89cdb16ed4e91p-48, 0x1.7188b163ceae9p-45, + -0x1.c210e63a5f01cp-45, 0x1.b9acdf7a51681p-45, 0x1.ca6ed5147bdb7p-45, + 0x1.a87deba46baeap-47, 0x1.a9cfa4a5004f4p-45, -0x1.8e27ad3213cb8p-45, + 0x1.16ecdb0f177c8p-46, 0x1.83b54b606bd5cp-46, 0x1.8e436ec90e09dp-47, + -0x1.f27ce0967d675p-45, -0x1.e20891b0ad8a4p-45, 0x1.ebe708164c759p-45, + 0x1.fadedee5d40efp-46, -0x1.a0b2a08a465dcp-47, }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_powf_data.c b/contrib/arm-optimized-routines/pl/math/v_powf_data.c new file mode 100644 index 000000000000..ded211924b80 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_powf_data.c @@ -0,0 +1,89 @@ +/* + * Coefficients for single-precision SVE pow(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "math_config.h" + +const struct v_powf_data __v_powf_data = { + .invc = { 0x1.6489890582816p+0, + 0x1.5cf19b35e3472p+0, + 0x1.55aac0e956d65p+0, + 0x1.4eb0022977e01p+0, + 0x1.47fcccda1dd1fp+0, + 0x1.418ceabab68c1p+0, + 0x1.3b5c788f1edb3p+0, + 0x1.3567de48e9c9ap+0, + 0x1.2fabc80fd19bap+0, + 0x1.2a25200ce536bp+0, + 0x1.24d108e0152e3p+0, + 0x1.1facd8ab2fbe1p+0, + 0x1.1ab614a03efdfp+0, + 0x1.15ea6d03af9ffp+0, + 0x1.1147b994bb776p+0, + 0x1.0ccbf650593aap+0, + 0x1.0875408477302p+0, + 0x1.0441d42a93328p+0, + 0x1p+0, + 0x1.f1d006c855e86p-1, + 0x1.e28c3341aa301p-1, + 0x1.d4bdf9aa64747p-1, + 0x1.c7b45a24e5803p-1, + 0x1.bb5f5eb2ed60ap-1, + 0x1.afb0bff8fe6b4p-1, + 0x1.a49badf7ab1f5p-1, + 0x1.9a14a111fc4c9p-1, + 0x1.901131f5b2fdcp-1, + 0x1.8687f73f6d865p-1, + 0x1.7d7067eb77986p-1, + 0x1.74c2c1cf97b65p-1, + 0x1.6c77f37cff2a1p-1 + }, + .logc = { -0x1.e960f97b22702p+3, + -0x1.c993406cd4db6p+3, + -0x1.aa711d9a7d0f3p+3, + -0x1.8bf37bacdce9bp+3, + -0x1.6e13b3519946ep+3, + -0x1.50cb8281e4089p+3, + -0x1.341504a237e2bp+3, + -0x1.17eaab624ffbbp+3, + -0x1.f88e708f8c853p+2, + -0x1.c24b6da113914p+2, + -0x1.8d02ee397cb1dp+2, + -0x1.58ac1223408b3p+2, + -0x1.253e6fd190e89p+2, + -0x1.e5641882c12ffp+1, + -0x1.81fea712926f7p+1, + -0x1.203e240de64a3p+1, + -0x1.8029b86a78281p0, + -0x1.85d713190fb9p-1, + 0x0p+0, + 0x1.4c1cc07312997p0, + 0x1.5e1848ccec948p+1, + 0x1.04cfcb7f1196fp+2, + 0x1.582813d463c21p+2, + 0x1.a936fa68760ccp+2, + 0x1.f81bc31d6cc4ep+2, + 0x1.2279a09fae6b1p+3, + 0x1.47ec0b6df5526p+3, + 0x1.6c71762280f1p+3, + 0x1.90155070798dap+3, + 0x1.b2e23b1d3068cp+3, + 0x1.d4e21b0daa86ap+3, + 0x1.f61e2a2f67f3fp+3 + }, + .scale = { 0x3ff0000000000000, 0x3fefd9b0d3158574, 0x3fefb5586cf9890f, + 0x3fef9301d0125b51, 0x3fef72b83c7d517b, 0x3fef54873168b9aa, + 0x3fef387a6e756238, 0x3fef1e9df51fdee1, 0x3fef06fe0a31b715, + 0x3feef1a7373aa9cb, 0x3feedea64c123422, 0x3feece086061892d, + 0x3feebfdad5362a27, 0x3feeb42b569d4f82, 0x3feeab07dd485429, + 0x3feea47eb03a5585, 0x3feea09e667f3bcd, 0x3fee9f75e8ec5f74, + 0x3feea11473eb0187, 0x3feea589994cce13, 0x3feeace5422aa0db, + 0x3feeb737b0cdc5e5, 0x3feec49182a3f090, 0x3feed503b23e255d, + 0x3feee89f995ad3ad, 0x3feeff76f2fb5e47, 0x3fef199bdd85529c, + 0x3fef3720dcef9069, 0x3fef5818dcfba487, 0x3fef7c97337b9b5f, + 0x3fefa4afa2a490da, 0x3fefd0765b6e4540, + }, +}; diff --git a/contrib/arm-optimized-routines/pl/math/v_sincos_3u5.c b/contrib/arm-optimized-routines/pl/math/v_sincos_3u5.c new file mode 100644 index 000000000000..6fc014c120b8 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sincos_3u5.c @@ -0,0 +1,57 @@ +/* + * Double-precision vector sincos function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* Define _GNU_SOURCE in order to include sincos declaration. If building + pre-GLIBC 2.1, or on a non-GNU conforming system, this routine will need to + be linked against the scalar sincosf from math/. */ +#define _GNU_SOURCE +#include <math.h> +#undef _GNU_SOURCE + +#include "v_math.h" +#include "pl_test.h" +#include "v_sincos_common.h" + +static void VPCS_ATTR NOINLINE +special_case (float64x2_t x, uint64x2_t special, double *out_sin, + double *out_cos) +{ + if (special[0]) + sincos (x[0], out_sin, out_cos); + if (special[1]) + sincos (x[1], out_sin + 1, out_cos + 1); +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + v_sincos_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +VPCS_ATTR void +_ZGVnN2vl8l8_sincos (float64x2_t x, double *out_sin, double *out_cos) +{ + const struct v_sincos_data *d = ptr_barrier (&v_sincos_data); + uint64x2_t special = check_ge_rangeval (x, d); + + float64x2x2_t sc = v_sincos_inline (x, d); + + vst1q_f64 (out_sin, sc.val[0]); + vst1q_f64 (out_cos, sc.val[1]); + + if (unlikely (v_any_u64 (special))) + special_case (x, special, out_sin, out_cos); +} + +PL_TEST_ULP (_ZGVnN2v_sincos_sin, 2.73) +PL_TEST_ULP (_ZGVnN2v_sincos_cos, 2.73) +#define V_SINCOS_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN2v_sincos_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN2v_sincos_cos, lo, hi, n) +V_SINCOS_INTERVAL (0, 0x1p23, 500000) +V_SINCOS_INTERVAL (-0, -0x1p23, 500000) +V_SINCOS_INTERVAL (0x1p23, inf, 10000) +V_SINCOS_INTERVAL (-0x1p23, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_sincos_common.h b/contrib/arm-optimized-routines/pl/math/v_sincos_common.h new file mode 100644 index 000000000000..ee7937e0785a --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sincos_common.h @@ -0,0 +1,86 @@ +/* + * Core approximation for double-precision vector sincos + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" + +static const struct v_sincos_data +{ + float64x2_t sin_poly[7], cos_poly[6], pio2[3]; + float64x2_t inv_pio2, shift, range_val; +} v_sincos_data = { + .inv_pio2 = V2 (0x1.45f306dc9c882p-1), + .pio2 = { V2 (0x1.921fb50000000p+0), V2 (0x1.110b460000000p-26), + V2 (0x1.1a62633145c07p-54) }, + .shift = V2 (0x1.8p52), + .sin_poly = { /* Computed using Remez in [-pi/2, pi/2]. */ + V2 (-0x1.555555555547bp-3), V2 (0x1.1111111108a4dp-7), + V2 (-0x1.a01a019936f27p-13), V2 (0x1.71de37a97d93ep-19), + V2 (-0x1.ae633919987c6p-26), V2 (0x1.60e277ae07cecp-33), + V2 (-0x1.9e9540300a1p-41) }, + .cos_poly = { /* Computed using Remez in [-pi/4, pi/4]. */ + V2 (0x1.555555555554cp-5), V2 (-0x1.6c16c16c1521fp-10), + V2 (0x1.a01a019cbf62ap-16), V2 (-0x1.27e4f812b681ep-22), + V2 (0x1.1ee9f152a57cdp-29), V2 (-0x1.8fb131098404bp-37) }, + .range_val = V2 (0x1p23), }; + +static inline uint64x2_t +check_ge_rangeval (float64x2_t x, const struct v_sincos_data *d) +{ + return vcagtq_f64 (x, d->range_val); +} + +/* Double-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate polynomials. + Largest observed error is for sin, 3.22 ULP: + v_sincos_sin (0x1.d70eef40f39b1p+12) got -0x1.ffe9537d5dbb7p-3 + want -0x1.ffe9537d5dbb4p-3. */ +static inline float64x2x2_t +v_sincos_inline (float64x2_t x, const struct v_sincos_data *d) +{ + /* q = nearest integer to 2 * x / pi. */ + float64x2_t q = vsubq_f64 (vfmaq_f64 (d->shift, x, d->inv_pio2), d->shift); + int64x2_t n = vcvtq_s64_f64 (q); + + /* Use q to reduce x to r in [-pi/4, pi/4], by: + r = x - q * pi/2, in extended precision. */ + float64x2_t r = x; + r = vfmsq_f64 (r, q, d->pio2[0]); + r = vfmsq_f64 (r, q, d->pio2[1]); + r = vfmsq_f64 (r, q, d->pio2[2]); + + float64x2_t r2 = r * r, r3 = r2 * r, r4 = r2 * r2; + + /* Approximate sin(r) ~= r + r^3 * poly_sin(r^2). */ + float64x2_t s = v_pw_horner_6_f64 (r2, r4, d->sin_poly); + s = vfmaq_f64 (r, r3, s); + + /* Approximate cos(r) ~= 1 - (r^2)/2 + r^4 * poly_cos(r^2). */ + float64x2_t c = v_pw_horner_5_f64 (r2, r4, d->cos_poly); + c = vfmaq_f64 (v_f64 (-0.5), r2, c); + c = vfmaq_f64 (v_f64 (1), r2, c); + + /* If odd quadrant, swap cos and sin. */ + uint64x2_t swap = vtstq_s64 (n, v_s64 (1)); + float64x2_t ss = vbslq_f64 (swap, c, s); + float64x2_t cc = vbslq_f64 (swap, s, c); + + /* Fix signs according to quadrant. + ss = asdouble(asuint64(ss) ^ ((n & 2) << 62)) + cc = asdouble(asuint64(cc) & (((n + 1) & 2) << 62)). */ + uint64x2_t sin_sign + = vshlq_n_u64 (vandq_u64 (vreinterpretq_u64_s64 (n), v_u64 (2)), 62); + uint64x2_t cos_sign = vshlq_n_u64 ( + vandq_u64 (vreinterpretq_u64_s64 (vaddq_s64 (n, v_s64 (1))), v_u64 (2)), + 62); + ss = vreinterpretq_f64_u64 ( + veorq_u64 (vreinterpretq_u64_f64 (ss), sin_sign)); + cc = vreinterpretq_f64_u64 ( + veorq_u64 (vreinterpretq_u64_f64 (cc), cos_sign)); + + return (float64x2x2_t){ ss, cc }; +} diff --git a/contrib/arm-optimized-routines/pl/math/v_sincosf_1u8.c b/contrib/arm-optimized-routines/pl/math/v_sincosf_1u8.c new file mode 100644 index 000000000000..bf77afaa14db --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sincosf_1u8.c @@ -0,0 +1,58 @@ +/* + * Single-precision vector sincos function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* Define _GNU_SOURCE in order to include sincosf declaration. If building + pre-GLIBC 2.1, or on a non-GNU conforming system, this routine will need to + be linked against the scalar sincosf from math/. */ +#define _GNU_SOURCE +#include <math.h> +#undef _GNU_SOURCE + +#include "v_sincosf_common.h" +#include "v_math.h" +#include "pl_test.h" + +static void VPCS_ATTR NOINLINE +special_case (float32x4_t x, uint32x4_t special, float *out_sin, + float *out_cos) +{ + for (int i = 0; i < 4; i++) + if (special[i]) + sincosf (x[i], out_sin + i, out_cos + i); +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + v_sincosf_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + v_sincosf_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +VPCS_ATTR void +_ZGVnN4vl4l4_sincosf (float32x4_t x, float *out_sin, float *out_cos) +{ + const struct v_sincosf_data *d = ptr_barrier (&v_sincosf_data); + uint32x4_t special = check_ge_rangeval (x, d); + + float32x4x2_t sc = v_sincosf_inline (x, d); + + vst1q_f32 (out_sin, sc.val[0]); + vst1q_f32 (out_cos, sc.val[1]); + + if (unlikely (v_any_u32 (special))) + special_case (x, special, out_sin, out_cos); +} + +PL_TEST_ULP (_ZGVnN4v_sincosf_sin, 1.17) +PL_TEST_ULP (_ZGVnN4v_sincosf_cos, 1.31) +#define V_SINCOSF_INTERVAL(lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN4v_sincosf_sin, lo, hi, n) \ + PL_TEST_INTERVAL (_ZGVnN4v_sincosf_cos, lo, hi, n) +V_SINCOSF_INTERVAL (0, 0x1p20, 500000) +V_SINCOSF_INTERVAL (-0, -0x1p20, 500000) +V_SINCOSF_INTERVAL (0x1p20, inf, 10000) +V_SINCOSF_INTERVAL (-0x1p20, -inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_sincosf_common.h b/contrib/arm-optimized-routines/pl/math/v_sincosf_common.h new file mode 100644 index 000000000000..8239bd9f0176 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sincosf_common.h @@ -0,0 +1,84 @@ +/* + * Core approximation for single-precision vector sincos + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" + +const static struct v_sincosf_data +{ + float32x4_t poly_sin[3], poly_cos[3], pio2[3], inv_pio2, shift, range_val; +} v_sincosf_data = { + .poly_sin = { /* Generated using Remez, odd coeffs only, in [-pi/4, pi/4]. */ + V4 (-0x1.555546p-3), V4 (0x1.11076p-7), V4 (-0x1.994eb4p-13) }, + .poly_cos = { /* Generated using Remez, even coeffs only, in [-pi/4, pi/4]. */ + V4 (0x1.55554ap-5), V4 (-0x1.6c0c1ap-10), V4 (0x1.99e0eep-16) }, + .pio2 = { V4 (0x1.921fb6p+0f), V4 (-0x1.777a5cp-25f), V4 (-0x1.ee59dap-50f) }, + .inv_pio2 = V4 (0x1.45f306p-1f), + .shift = V4 (0x1.8p23), + .range_val = V4 (0x1p20), +}; + +static inline uint32x4_t +check_ge_rangeval (float32x4_t x, const struct v_sincosf_data *d) +{ + return vcagtq_f32 (x, d->range_val); +} + +/* Single-precision vector function allowing calculation of both sin and cos in + one function call, using shared argument reduction and separate low-order + polynomials. + Worst-case error for sin is 1.67 ULP: + v_sincosf_sin(0x1.c704c4p+19) got 0x1.fff698p-5 want 0x1.fff69cp-5 + Worst-case error for cos is 1.81 ULP: + v_sincosf_cos(0x1.e506fp+19) got -0x1.ffec6ep-6 want -0x1.ffec72p-6. */ +static inline float32x4x2_t +v_sincosf_inline (float32x4_t x, const struct v_sincosf_data *d) +{ + /* n = rint ( x / (pi/2) ). */ + float32x4_t shift = d->shift; + float32x4_t q = vfmaq_f32 (shift, x, d->inv_pio2); + q = vsubq_f32 (q, shift); + int32x4_t n = vcvtq_s32_f32 (q); + + /* Reduce x such that r is in [ -pi/4, pi/4 ]. */ + float32x4_t r = x; + r = vfmsq_f32 (r, q, d->pio2[0]); + r = vfmsq_f32 (r, q, d->pio2[1]); + r = vfmsq_f32 (r, q, d->pio2[2]); + + /* Approximate sin(r) ~= r + r^3 * poly_sin(r^2). */ + float32x4_t r2 = vmulq_f32 (r, r), r3 = vmulq_f32 (r, r2); + float32x4_t s = vfmaq_f32 (d->poly_sin[1], r2, d->poly_sin[2]); + s = vfmaq_f32 (d->poly_sin[0], r2, s); + s = vfmaq_f32 (r, r3, s); + + /* Approximate cos(r) ~= 1 - (r^2)/2 + r^4 * poly_cos(r^2). */ + float32x4_t r4 = vmulq_f32 (r2, r2); + float32x4_t p = vfmaq_f32 (d->poly_cos[1], r2, d->poly_cos[2]); + float32x4_t c = vfmaq_f32 (v_f32 (-0.5), r2, d->poly_cos[0]); + c = vfmaq_f32 (c, r4, p); + c = vfmaq_f32 (v_f32 (1), c, r2); + + /* If odd quadrant, swap cos and sin. */ + uint32x4_t swap = vtstq_u32 (vreinterpretq_u32_s32 (n), v_u32 (1)); + float32x4_t ss = vbslq_f32 (swap, c, s); + float32x4_t cc = vbslq_f32 (swap, s, c); + + /* Fix signs according to quadrant. + ss = asfloat(asuint(ss) ^ ((n & 2) << 30)) + cc = asfloat(asuint(cc) & (((n + 1) & 2) << 30)). */ + uint32x4_t sin_sign + = vshlq_n_u32 (vandq_u32 (vreinterpretq_u32_s32 (n), v_u32 (2)), 30); + uint32x4_t cos_sign = vshlq_n_u32 ( + vandq_u32 (vreinterpretq_u32_s32 (vaddq_s32 (n, v_s32 (1))), v_u32 (2)), + 30); + ss = vreinterpretq_f32_u32 ( + veorq_u32 (vreinterpretq_u32_f32 (ss), sin_sign)); + cc = vreinterpretq_f32_u32 ( + veorq_u32 (vreinterpretq_u32_f32 (cc), cos_sign)); + + return (float32x4x2_t){ ss, cc }; +} diff --git a/contrib/arm-optimized-routines/pl/math/v_sinh_3u.c b/contrib/arm-optimized-routines/pl/math/v_sinh_3u.c new file mode 100644 index 000000000000..a644f54b4a0f --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sinh_3u.c @@ -0,0 +1,118 @@ +/* + * Double-precision vector sinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[11]; + float64x2_t inv_ln2, m_ln2, shift; + uint64x2_t halff; + int64x2_t onef; +#if WANT_SIMD_EXCEPT + uint64x2_t tiny_bound, thresh; +#else + uint64x2_t large_bound; +#endif +} data = { + /* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */ + .poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5), + V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10), + V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16), + V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22), + V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29), }, + + .inv_ln2 = V2 (0x1.71547652b82fep0), + .m_ln2 = (float64x2_t) {-0x1.62e42fefa39efp-1, -0x1.abc9e3b39803fp-56}, + .shift = V2 (0x1.8p52), + + .halff = V2 (0x3fe0000000000000), + .onef = V2 (0x3ff0000000000000), +#if WANT_SIMD_EXCEPT + /* 2^-26, below which sinh(x) rounds to x. */ + .tiny_bound = V2 (0x3e50000000000000), + /* asuint(large_bound) - asuint(tiny_bound). */ + .thresh = V2 (0x0230000000000000), +#else +/* 2^9. expm1 helper overflows for large input. */ + .large_bound = V2 (0x4080000000000000), +#endif +}; + +static inline float64x2_t +expm1_inline (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + /* Reduce argument: + exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 + where i = round(x / ln2) + and f = x - i * ln2 (f in [-ln2/2, ln2/2]). */ + float64x2_t j = vsubq_f64 (vfmaq_f64 (d->shift, d->inv_ln2, x), d->shift); + int64x2_t i = vcvtq_s64_f64 (j); + float64x2_t f = vfmaq_laneq_f64 (x, j, d->m_ln2, 0); + f = vfmaq_laneq_f64 (f, j, d->m_ln2, 1); + /* Approximate expm1(f) using polynomial. */ + float64x2_t f2 = vmulq_f64 (f, f); + float64x2_t f4 = vmulq_f64 (f2, f2); + float64x2_t f8 = vmulq_f64 (f4, f4); + float64x2_t p = vfmaq_f64 (f, f2, v_estrin_10_f64 (f, f2, f4, f8, d->poly)); + /* t = 2^i. */ + float64x2_t t = vreinterpretq_f64_u64 ( + vreinterpretq_u64_s64 (vaddq_s64 (vshlq_n_s64 (i, 52), d->onef))); + /* expm1(x) ~= p * t + (t - 1). */ + return vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t); +} + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x) +{ + return v_call_f64 (sinh, x, x, v_u64 (-1)); +} + +/* Approximation for vector double-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The greatest observed error is 2.57 ULP: + _ZGVnN2v_sinh (0x1.9fb1d49d1d58bp-2) got 0x1.ab34e59d678dcp-2 + want 0x1.ab34e59d678d9p-2. */ +float64x2_t VPCS_ATTR V_NAME_D1 (sinh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + float64x2_t ax = vabsq_f64 (x); + uint64x2_t sign + = veorq_u64 (vreinterpretq_u64_f64 (x), vreinterpretq_u64_f64 (ax)); + float64x2_t halfsign = vreinterpretq_f64_u64 (vorrq_u64 (sign, d->halff)); + +#if WANT_SIMD_EXCEPT + uint64x2_t special = vcgeq_u64 ( + vsubq_u64 (vreinterpretq_u64_f64 (ax), d->tiny_bound), d->thresh); +#else + uint64x2_t special = vcgeq_u64 (vreinterpretq_u64_f64 (ax), d->large_bound); +#endif + + /* Fall back to scalar variant for all lanes if any of them are special. */ + if (unlikely (v_any_u64 (special))) + return special_case (x); + + /* Up to the point that expm1 overflows, we can use it to calculate sinh + using a slight rearrangement of the definition of sinh. This allows us to + retain acceptable accuracy for very small inputs. */ + float64x2_t t = expm1_inline (ax); + t = vaddq_f64 (t, vdivq_f64 (t, vaddq_f64 (t, v_f64 (1.0)))); + return vmulq_f64 (t, halfsign); +} + +PL_SIG (V, D, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (sinh), 2.08) +PL_TEST_EXPECT_FENV (V_NAME_D1 (sinh), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinh), 0, 0x1p-26, 1000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinh), 0x1p-26, 0x1p9, 500000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinh), 0x1p9, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_sinhf_2u3.c b/contrib/arm-optimized-routines/pl/math/v_sinhf_2u3.c new file mode 100644 index 000000000000..cd8c0f08f784 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sinhf_2u3.c @@ -0,0 +1,84 @@ +/* + * Single-precision vector sinh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "v_expm1f_inline.h" + +static const struct data +{ + struct v_expm1f_data expm1f_consts; + uint32x4_t halff; +#if WANT_SIMD_EXCEPT + uint32x4_t tiny_bound, thresh; +#else + uint32x4_t oflow_bound; +#endif +} data = { + .expm1f_consts = V_EXPM1F_DATA, + .halff = V4 (0x3f000000), +#if WANT_SIMD_EXCEPT + /* 0x1.6a09e8p-32, below which expm1f underflows. */ + .tiny_bound = V4 (0x2fb504f4), + /* asuint(oflow_bound) - asuint(tiny_bound). */ + .thresh = V4 (0x12fbbbb3), +#else + /* 0x1.61814ep+6, above which expm1f helper overflows. */ + .oflow_bound = V4 (0x42b0c0a7), +#endif +}; + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (sinhf, x, y, special); +} + +/* Approximation for vector single-precision sinh(x) using expm1. + sinh(x) = (exp(x) - exp(-x)) / 2. + The maximum error is 2.26 ULP: + _ZGVnN4v_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4 + want 0x1.e469e4p-4. */ +float32x4_t VPCS_ATTR V_NAME_F1 (sinh) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + float32x4_t ax = vabsq_f32 (x); + uint32x4_t iax = vreinterpretq_u32_f32 (ax); + uint32x4_t sign = veorq_u32 (ix, iax); + float32x4_t halfsign = vreinterpretq_f32_u32 (vorrq_u32 (sign, d->halff)); + +#if WANT_SIMD_EXCEPT + uint32x4_t special = vcgeq_u32 (vsubq_u32 (iax, d->tiny_bound), d->thresh); + ax = v_zerofy_f32 (ax, special); +#else + uint32x4_t special = vcgeq_u32 (iax, d->oflow_bound); +#endif + + /* Up to the point that expm1f overflows, we can use it to calculate sinhf + using a slight rearrangement of the definition of asinh. This allows us + to retain acceptable accuracy for very small inputs. */ + float32x4_t t = expm1f_inline (ax, &d->expm1f_consts); + t = vaddq_f32 (t, vdivq_f32 (t, vaddq_f32 (t, v_f32 (1.0)))); + + /* Fall back to the scalar variant for any lanes that should trigger an + exception. */ + if (unlikely (v_any_u32 (special))) + return special_case (x, vmulq_f32 (t, halfsign), special); + + return vmulq_f32 (t, halfsign); +} + +PL_SIG (V, F, 1, sinh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (sinh), 1.76) +PL_TEST_EXPECT_FENV (V_NAME_F1 (sinh), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0, 0x2fb504f4, 1000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0x2fb504f4, 0x42b0c0a7, 100000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinh), 0x42b0c0a7, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_sinpi_3u1.c b/contrib/arm-optimized-routines/pl/math/v_sinpi_3u1.c new file mode 100644 index 000000000000..8d2917ff8ecd --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sinpi_3u1.c @@ -0,0 +1,86 @@ +/* + * Double-precision vector sinpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[10]; +} data = { + /* Polynomial coefficients generated using Remez algorithm, + see sinpi.sollya for details. */ + .poly = { V2 (0x1.921fb54442d184p1), V2 (-0x1.4abbce625be53p2), + V2 (0x1.466bc6775ab16p1), V2 (-0x1.32d2cce62dc33p-1), + V2 (0x1.507834891188ep-4), V2 (-0x1.e30750a28c88ep-8), + V2 (0x1.e8f48308acda4p-12), V2 (-0x1.6fc0032b3c29fp-16), + V2 (0x1.af86ae521260bp-21), V2 (-0x1.012a9870eeb7dp-25) }, +}; + +#if WANT_SIMD_EXCEPT +# define TinyBound v_u64 (0x3bf0000000000000) /* asuint64(0x1p-64). */ +/* asuint64(0x1p64) - TinyBound. */ +# define Thresh v_u64 (0x07f0000000000000) + +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x, float64x2_t y, uint64x2_t odd, uint64x2_t cmp) +{ + /* Fall back to scalar code. */ + y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); + return v_call_f64 (sinpi, x, y, cmp); +} +#endif + +/* Approximation for vector double-precision sinpi(x). + Maximum Error 3.05 ULP: + _ZGVnN2v_sinpi(0x1.d32750db30b4ap-2) got 0x1.fb295878301c7p-1 + want 0x1.fb295878301cap-1. */ +float64x2_t VPCS_ATTR V_NAME_D1 (sinpi) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + uint64x2_t ir = vreinterpretq_u64_f64 (vabsq_f64 (x)); + uint64x2_t cmp = vcgeq_u64 (vsubq_u64 (ir, TinyBound), Thresh); + + /* When WANT_SIMD_EXCEPT = 1, special lanes should be set to 0 + to avoid them under/overflowing and throwing exceptions. */ + float64x2_t r = v_zerofy_f64 (x, cmp); +#else + float64x2_t r = x; +#endif + + /* If r is odd, the sign of the result should be inverted. */ + uint64x2_t odd + = vshlq_n_u64 (vreinterpretq_u64_s64 (vcvtaq_s64_f64 (r)), 63); + + /* r = x - rint(x). Range reduction to -1/2 .. 1/2. */ + r = vsubq_f64 (r, vrndaq_f64 (r)); + + /* y = sin(r). */ + float64x2_t r2 = vmulq_f64 (r, r); + float64x2_t r4 = vmulq_f64 (r2, r2); + float64x2_t y = vmulq_f64 (v_pw_horner_9_f64 (r2, r4, d->poly), r); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u64 (cmp))) + return special_case (x, y, odd, cmp); +#endif + + return vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd)); +} + +PL_SIG (V, D, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (V_NAME_D1 (sinpi), 3.06) +PL_TEST_EXPECT_FENV (V_NAME_D1 (sinpi), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0, 0x1p-63, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0x1p-63, 0.5, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0.5, 0x1p51, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0x1p51, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_sinpif_3u.c b/contrib/arm-optimized-routines/pl/math/v_sinpif_3u.c new file mode 100644 index 000000000000..3d6eeff333f7 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_sinpif_3u.c @@ -0,0 +1,81 @@ +/* + * Single-precision vector sinpi function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "mathlib.h" +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[6]; +} data = { + /* Taylor series coefficents for sin(pi * x). */ + .poly = { V4 (0x1.921fb6p1f), V4 (-0x1.4abbcep2f), V4 (0x1.466bc6p1f), + V4 (-0x1.32d2ccp-1f), V4 (0x1.50783p-4f), V4 (-0x1.e30750p-8f) }, +}; + +#if WANT_SIMD_EXCEPT +# define TinyBound v_u32 (0x30000000) /* asuint32(0x1p-31f). */ +# define Thresh v_u32 (0x1f000000) /* asuint32(0x1p31f) - TinyBound. */ + +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp) +{ + /* Fall back to scalar code. */ + y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); + return v_call_f32 (sinpif, x, y, cmp); +} +#endif + +/* Approximation for vector single-precision sinpi(x) + Maximum Error 3.03 ULP: + _ZGVnN4v_sinpif(0x1.c597ccp-2) got 0x1.f7cd56p-1 + want 0x1.f7cd5p-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (sinpi) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + +#if WANT_SIMD_EXCEPT + uint32x4_t ir = vreinterpretq_u32_f32 (vabsq_f32 (x)); + uint32x4_t cmp = vcgeq_u32 (vsubq_u32 (ir, TinyBound), Thresh); + + /* When WANT_SIMD_EXCEPT = 1, special lanes should be set to 0 + to avoid them under/overflowing and throwing exceptions. */ + float32x4_t r = v_zerofy_f32 (x, cmp); +#else + float32x4_t r = x; +#endif + + /* If r is odd, the sign of the result should be inverted. */ + uint32x4_t odd + = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtaq_s32_f32 (r)), 31); + + /* r = x - rint(x). Range reduction to -1/2 .. 1/2. */ + r = vsubq_f32 (r, vrndaq_f32 (r)); + + /* Pairwise Horner approximation for y = sin(r * pi). */ + float32x4_t r2 = vmulq_f32 (r, r); + float32x4_t r4 = vmulq_f32 (r2, r2); + float32x4_t y = vmulq_f32 (v_pw_horner_5_f32 (r2, r4, d->poly), r); + +#if WANT_SIMD_EXCEPT + if (unlikely (v_any_u32 (cmp))) + return special_case (x, y, odd, cmp); +#endif + + return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); +} + +PL_SIG (V, F, 1, sinpi, -0.9, 0.9) +PL_TEST_ULP (V_NAME_F1 (sinpi), 2.54) +PL_TEST_EXPECT_FENV (V_NAME_F1 (sinpi), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0x1p-31, 0.5, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0.5, 0x1p31f, 10000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0x1p31f, inf, 10000) diff --git a/contrib/arm-optimized-routines/pl/math/v_tan_3u5.c b/contrib/arm-optimized-routines/pl/math/v_tan_3u5.c new file mode 100644 index 000000000000..c431c8c4889e --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_tan_3u5.c @@ -0,0 +1,120 @@ +/* + * Double-precision vector tan(x) function. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[9]; + float64x2_t half_pi, two_over_pi, shift; +#if !WANT_SIMD_EXCEPT + float64x2_t range_val; +#endif +} data = { + /* Coefficients generated using FPMinimax. */ + .poly = { V2 (0x1.5555555555556p-2), V2 (0x1.1111111110a63p-3), + V2 (0x1.ba1ba1bb46414p-5), V2 (0x1.664f47e5b5445p-6), + V2 (0x1.226e5e5ecdfa3p-7), V2 (0x1.d6c7ddbf87047p-9), + V2 (0x1.7ea75d05b583ep-10), V2 (0x1.289f22964a03cp-11), + V2 (0x1.4e4fd14147622p-12) }, + .half_pi = { 0x1.921fb54442d18p0, 0x1.1a62633145c07p-54 }, + .two_over_pi = V2 (0x1.45f306dc9c883p-1), + .shift = V2 (0x1.8p52), +#if !WANT_SIMD_EXCEPT + .range_val = V2 (0x1p23), +#endif +}; + +#define RangeVal 0x4160000000000000 /* asuint64(0x1p23). */ +#define TinyBound 0x3e50000000000000 /* asuint64(2^-26). */ +#define Thresh 0x310000000000000 /* RangeVal - TinyBound. */ + +/* Special cases (fall back to scalar calls). */ +static float64x2_t VPCS_ATTR NOINLINE +special_case (float64x2_t x) +{ + return v_call_f64 (tan, x, x, v_u64 (-1)); +} + +/* Vector approximation for double-precision tan. + Maximum measured error is 3.48 ULP: + _ZGVnN2v_tan(0x1.4457047ef78d8p+20) got -0x1.f6ccd8ecf7dedp+37 + want -0x1.f6ccd8ecf7deap+37. */ +float64x2_t VPCS_ATTR V_NAME_D1 (tan) (float64x2_t x) +{ + const struct data *dat = ptr_barrier (&data); + /* Our argument reduction cannot calculate q with sufficient accuracy for + very large inputs. Fall back to scalar routine for all lanes if any are + too large, or Inf/NaN. If fenv exceptions are expected, also fall back for + tiny input to avoid underflow. */ +#if WANT_SIMD_EXCEPT + uint64x2_t iax = vreinterpretq_u64_f64 (vabsq_f64 (x)); + /* iax - tiny_bound > range_val - tiny_bound. */ + uint64x2_t special + = vcgtq_u64 (vsubq_u64 (iax, v_u64 (TinyBound)), v_u64 (Thresh)); + if (unlikely (v_any_u64 (special))) + return special_case (x); +#endif + + /* q = nearest integer to 2 * x / pi. */ + float64x2_t q + = vsubq_f64 (vfmaq_f64 (dat->shift, x, dat->two_over_pi), dat->shift); + int64x2_t qi = vcvtq_s64_f64 (q); + + /* Use q to reduce x to r in [-pi/4, pi/4], by: + r = x - q * pi/2, in extended precision. */ + float64x2_t r = x; + r = vfmsq_laneq_f64 (r, q, dat->half_pi, 0); + r = vfmsq_laneq_f64 (r, q, dat->half_pi, 1); + /* Further reduce r to [-pi/8, pi/8], to be reconstructed using double angle + formula. */ + r = vmulq_n_f64 (r, 0.5); + + /* Approximate tan(r) using order 8 polynomial. + tan(x) is odd, so polynomial has the form: + tan(x) ~= x + C0 * x^3 + C1 * x^5 + C3 * x^7 + ... + Hence we first approximate P(r) = C1 + C2 * r^2 + C3 * r^4 + ... + Then compute the approximation by: + tan(r) ~= r + r^3 * (C0 + r^2 * P(r)). */ + float64x2_t r2 = vmulq_f64 (r, r), r4 = vmulq_f64 (r2, r2), + r8 = vmulq_f64 (r4, r4); + /* Offset coefficients to evaluate from C1 onwards. */ + float64x2_t p = v_estrin_7_f64 (r2, r4, r8, dat->poly + 1); + p = vfmaq_f64 (dat->poly[0], p, r2); + p = vfmaq_f64 (r, r2, vmulq_f64 (p, r)); + + /* Recombination uses double-angle formula: + tan(2x) = 2 * tan(x) / (1 - (tan(x))^2) + and reciprocity around pi/2: + tan(x) = 1 / (tan(pi/2 - x)) + to assemble result using change-of-sign and conditional selection of + numerator/denominator, dependent on odd/even-ness of q (hence quadrant). + */ + float64x2_t n = vfmaq_f64 (v_f64 (-1), p, p); + float64x2_t d = vaddq_f64 (p, p); + + uint64x2_t no_recip = vtstq_u64 (vreinterpretq_u64_s64 (qi), v_u64 (1)); + +#if !WANT_SIMD_EXCEPT + uint64x2_t special = vcageq_f64 (x, dat->range_val); + if (unlikely (v_any_u64 (special))) + return special_case (x); +#endif + + return vdivq_f64 (vbslq_f64 (no_recip, n, vnegq_f64 (d)), + vbslq_f64 (no_recip, d, n)); +} + +PL_SIG (V, D, 1, tan, -3.1, 3.1) +PL_TEST_ULP (V_NAME_D1 (tan), 2.99) +PL_TEST_EXPECT_FENV (V_NAME_D1 (tan), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tan), 0, TinyBound, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tan), TinyBound, RangeVal, 100000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tan), RangeVal, inf, 5000) diff --git a/contrib/arm-optimized-routines/pl/math/v_tanf_3u5.c b/contrib/arm-optimized-routines/pl/math/v_tanf_3u5.c new file mode 100644 index 000000000000..98948b0a9ecf --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_tanf_3u5.c @@ -0,0 +1,127 @@ +/* + * Single-precision vector tan(x) function. + * + * Copyright (c) 2021-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f32.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float32x4_t poly[6]; + float32x4_t pi_consts; + float32x4_t shift; +#if !WANT_SIMD_EXCEPT + float32x4_t range_val; +#endif +} data = { + /* Coefficients generated using FPMinimax. */ + .poly = { V4 (0x1.55555p-2f), V4 (0x1.11166p-3f), V4 (0x1.b88a78p-5f), + V4 (0x1.7b5756p-6f), V4 (0x1.4ef4cep-8f), V4 (0x1.0e1e74p-7f) }, + /* Stores constants: (-pi/2)_high, (-pi/2)_mid, (-pi/2)_low, and 2/pi. */ + .pi_consts + = { -0x1.921fb6p+0f, 0x1.777a5cp-25f, 0x1.ee59dap-50f, 0x1.45f306p-1f }, + .shift = V4 (0x1.8p+23f), +#if !WANT_SIMD_EXCEPT + .range_val = V4 (0x1p15f), +#endif +}; + +#define RangeVal v_u32 (0x47000000) /* asuint32(0x1p15f). */ +#define TinyBound v_u32 (0x30000000) /* asuint32 (0x1p-31f). */ +#define Thresh v_u32 (0x16000000) /* asuint32(RangeVal) - TinyBound. */ + +/* Special cases (fall back to scalar calls). */ +static float32x4_t VPCS_ATTR NOINLINE +special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) +{ + return v_call_f32 (tanf, x, y, cmp); +} + +/* Use a full Estrin scheme to evaluate polynomial. */ +static inline float32x4_t +eval_poly (float32x4_t z, const struct data *d) +{ + float32x4_t z2 = vmulq_f32 (z, z); +#if WANT_SIMD_EXCEPT + /* Tiny z (<= 0x1p-31) will underflow when calculating z^4. + If fp exceptions are to be triggered correctly, + sidestep this by fixing such lanes to 0. */ + uint32x4_t will_uflow + = vcleq_u32 (vreinterpretq_u32_f32 (vabsq_f32 (z)), TinyBound); + if (unlikely (v_any_u32 (will_uflow))) + z2 = vbslq_f32 (will_uflow, v_f32 (0), z2); +#endif + float32x4_t z4 = vmulq_f32 (z2, z2); + return v_estrin_5_f32 (z, z2, z4, d->poly); +} + +/* Fast implementation of AdvSIMD tanf. + Maximum error is 3.45 ULP: + __v_tanf(-0x1.e5f0cap+13) got 0x1.ff9856p-1 + want 0x1.ff9850p-1. */ +float32x4_t VPCS_ATTR V_NAME_F1 (tan) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + float32x4_t special_arg = x; + + /* iax >= RangeVal means x, if not inf or NaN, is too large to perform fast + regression. */ +#if WANT_SIMD_EXCEPT + uint32x4_t iax = vreinterpretq_u32_f32 (vabsq_f32 (x)); + /* If fp exceptions are to be triggered correctly, also special-case tiny + input, as this will load to overflow later. Fix any special lanes to 1 to + prevent any exceptions being triggered. */ + uint32x4_t special = vcgeq_u32 (vsubq_u32 (iax, TinyBound), Thresh); + if (unlikely (v_any_u32 (special))) + x = vbslq_f32 (special, v_f32 (1.0f), x); +#else + /* Otherwise, special-case large and special values. */ + uint32x4_t special = vcageq_f32 (x, d->range_val); +#endif + + /* n = rint(x/(pi/2)). */ + float32x4_t q = vfmaq_laneq_f32 (d->shift, x, d->pi_consts, 3); + float32x4_t n = vsubq_f32 (q, d->shift); + /* Determine if x lives in an interval, where |tan(x)| grows to infinity. */ + uint32x4_t pred_alt = vtstq_u32 (vreinterpretq_u32_f32 (q), v_u32 (1)); + + /* r = x - n * (pi/2) (range reduction into -pi./4 .. pi/4). */ + float32x4_t r; + r = vfmaq_laneq_f32 (x, n, d->pi_consts, 0); + r = vfmaq_laneq_f32 (r, n, d->pi_consts, 1); + r = vfmaq_laneq_f32 (r, n, d->pi_consts, 2); + + /* If x lives in an interval, where |tan(x)| + - is finite, then use a polynomial approximation of the form + tan(r) ~ r + r^3 * P(r^2) = r + r * r^2 * P(r^2). + - grows to infinity then use symmetries of tangent and the identity + tan(r) = cotan(pi/2 - r) to express tan(x) as 1/tan(-r). Finally, use + the same polynomial approximation of tan as above. */ + + /* Invert sign of r if odd quadrant. */ + float32x4_t z = vmulq_f32 (r, vbslq_f32 (pred_alt, v_f32 (-1), v_f32 (1))); + + /* Evaluate polynomial approximation of tangent on [-pi/4, pi/4]. */ + float32x4_t z2 = vmulq_f32 (r, r); + float32x4_t p = eval_poly (z2, d); + float32x4_t y = vfmaq_f32 (z, vmulq_f32 (z, z2), p); + + /* Compute reciprocal and apply if required. */ + float32x4_t inv_y = vdivq_f32 (v_f32 (1.0f), y); + + if (unlikely (v_any_u32 (special))) + return special_case (special_arg, vbslq_f32 (pred_alt, inv_y, y), special); + return vbslq_f32 (pred_alt, inv_y, y); +} + +PL_SIG (V, F, 1, tan, -3.1, 3.1) +PL_TEST_ULP (V_NAME_F1 (tan), 2.96) +PL_TEST_EXPECT_FENV (V_NAME_F1 (tan), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tan), 0, 0x1p-31, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tan), 0x1p-31, 0x1p15, 500000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tan), 0x1p15, inf, 5000) diff --git a/contrib/arm-optimized-routines/pl/math/v_tanh_3u.c b/contrib/arm-optimized-routines/pl/math/v_tanh_3u.c new file mode 100644 index 000000000000..5de85c68da2c --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_tanh_3u.c @@ -0,0 +1,106 @@ +/* + * Double-precision vector tanh(x) function. + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "poly_advsimd_f64.h" +#include "mathlib.h" +#include "pl_sig.h" +#include "pl_test.h" + +static const struct data +{ + float64x2_t poly[11]; + float64x2_t inv_ln2, ln2_hi, ln2_lo, shift; + uint64x2_t onef; + uint64x2_t thresh, tiny_bound; +} data = { + /* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */ + .poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5), + V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10), + V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16), + V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22), + V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29), }, + + .inv_ln2 = V2 (0x1.71547652b82fep0), + .ln2_hi = V2 (-0x1.62e42fefa39efp-1), + .ln2_lo = V2 (-0x1.abc9e3b39803fp-56), + .shift = V2 (0x1.8p52), + + .onef = V2 (0x3ff0000000000000), + .tiny_bound = V2 (0x3e40000000000000), /* asuint64 (0x1p-27). */ + /* asuint64(0x1.241bf835f9d5fp+4) - asuint64(tiny_bound). */ + .thresh = V2 (0x01f241bf835f9d5f), +}; + +static inline float64x2_t +expm1_inline (float64x2_t x, const struct data *d) +{ + /* Helper routine for calculating exp(x) - 1. Vector port of the helper from + the scalar variant of tanh. */ + + /* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */ + float64x2_t j = vsubq_f64 (vfmaq_f64 (d->shift, d->inv_ln2, x), d->shift); + int64x2_t i = vcvtq_s64_f64 (j); + float64x2_t f = vfmaq_f64 (x, j, d->ln2_hi); + f = vfmaq_f64 (f, j, d->ln2_lo); + + /* Approximate expm1(f) using polynomial. */ + float64x2_t f2 = vmulq_f64 (f, f); + float64x2_t f4 = vmulq_f64 (f2, f2); + float64x2_t p = vfmaq_f64 ( + f, f2, v_estrin_10_f64 (f, f2, f4, vmulq_f64 (f4, f4), d->poly)); + + /* t = 2 ^ i. */ + float64x2_t t = vreinterpretq_f64_u64 ( + vaddq_u64 (vreinterpretq_u64_s64 (i << 52), d->onef)); + /* expm1(x) = p * t + (t - 1). */ + return vfmaq_f64 (vsubq_f64 (t, v_f64 (1)), p, t); +} + +static float64x2_t NOINLINE VPCS_ATTR +special_case (float64x2_t x, float64x2_t y, uint64x2_t special) +{ + return v_call_f64 (tanh, x, y, special); +} + +/* Vector approximation for double-precision tanh(x), using a simplified + version of expm1. The greatest observed error is 2.77 ULP: + _ZGVnN2v_tanh(-0x1.c4a4ca0f9f3b7p-3) got -0x1.bd6a21a163627p-3 + want -0x1.bd6a21a163624p-3. */ +float64x2_t VPCS_ATTR V_NAME_D1 (tanh) (float64x2_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint64x2_t ia = vreinterpretq_u64_f64 (vabsq_f64 (x)); + + float64x2_t u = x; + + /* Trigger special-cases for tiny, boring and infinity/NaN. */ + uint64x2_t special = vcgtq_u64 (vsubq_u64 (ia, d->tiny_bound), d->thresh); +#if WANT_SIMD_EXCEPT + /* To trigger fp exceptions correctly, set special lanes to a neutral value. + They will be fixed up later by the special-case handler. */ + if (unlikely (v_any_u64 (special))) + u = v_zerofy_f64 (u, special); +#endif + + u = vaddq_f64 (u, u); + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + float64x2_t q = expm1_inline (u, d); + float64x2_t qp2 = vaddq_f64 (q, v_f64 (2)); + + if (unlikely (v_any_u64 (special))) + return special_case (x, vdivq_f64 (q, qp2), special); + return vdivq_f64 (q, qp2); +} + +PL_SIG (V, D, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_D1 (tanh), 2.27) +PL_TEST_EXPECT_FENV (V_NAME_D1 (tanh), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tanh), 0, 0x1p-27, 5000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tanh), 0x1p-27, 0x1.241bf835f9d5fp+4, 50000) +PL_TEST_SYM_INTERVAL (V_NAME_D1 (tanh), 0x1.241bf835f9d5fp+4, inf, 1000) diff --git a/contrib/arm-optimized-routines/pl/math/v_tanhf_2u6.c b/contrib/arm-optimized-routines/pl/math/v_tanhf_2u6.c new file mode 100644 index 000000000000..d1cb9fb6eeb3 --- /dev/null +++ b/contrib/arm-optimized-routines/pl/math/v_tanhf_2u6.c @@ -0,0 +1,73 @@ +/* + * Single-precision vector tanh(x) function. + * + * Copyright (c) 2022-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "v_math.h" +#include "pl_sig.h" +#include "pl_test.h" + +#include "v_expm1f_inline.h" + +static const struct data +{ + struct v_expm1f_data expm1f_consts; + uint32x4_t boring_bound, large_bound, onef; +} data = { + .expm1f_consts = V_EXPM1F_DATA, + /* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for negative). */ + .boring_bound = V4 (0x41102cb3), + .large_bound = V4 (0x7f800000), + .onef = V4 (0x3f800000), +}; + +static float32x4_t NOINLINE VPCS_ATTR +special_case (float32x4_t x, float32x4_t y, uint32x4_t special) +{ + return v_call_f32 (tanhf, x, y, special); +} + +/* Approximation for single-precision vector tanh(x), using a simplified + version of expm1f. The maximum error is 2.58 ULP: + _ZGVnN4v_tanhf (0x1.fa5eep-5) got 0x1.f9ba02p-5 + want 0x1.f9ba08p-5. */ +float32x4_t VPCS_ATTR V_NAME_F1 (tanh) (float32x4_t x) +{ + const struct data *d = ptr_barrier (&data); + + uint32x4_t ix = vreinterpretq_u32_f32 (x); + float32x4_t ax = vabsq_f32 (x); + uint32x4_t iax = vreinterpretq_u32_f32 (ax); + uint32x4_t sign = veorq_u32 (ix, iax); + uint32x4_t is_boring = vcgtq_u32 (iax, d->boring_bound); + float32x4_t boring = vreinterpretq_f32_u32 (vorrq_u32 (sign, d->onef)); + +#if WANT_SIMD_EXCEPT + /* If fp exceptions are to be triggered properly, set all special and boring + lanes to 0, which will trigger no exceptions, and fix them up later. */ + uint32x4_t special = vorrq_u32 (vcgtq_u32 (iax, d->large_bound), + vcltq_u32 (iax, v_u32 (0x34000000))); + x = v_zerofy_f32 (x, is_boring); + if (unlikely (v_any_u32 (special))) + x = v_zerofy_f32 (x, special); +#else + uint32x4_t special = vcgtq_u32 (iax, d->large_bound); +#endif + + /* tanh(x) = (e^2x - 1) / (e^2x + 1). */ + float32x4_t q = expm1f_inline (vmulq_n_f32 (x, 2), &d->expm1f_consts); + float32x4_t y = vdivq_f32 (q, vaddq_f32 (q, v_f32 (2.0))); + if (unlikely (v_any_u32 (special))) + return special_case (vreinterpretq_f32_u32 (ix), + vbslq_f32 (is_boring, boring, y), special); + return vbslq_f32 (is_boring, boring, y); +} + +PL_SIG (V, F, 1, tanh, -10.0, 10.0) +PL_TEST_ULP (V_NAME_F1 (tanh), 2.09) +PL_TEST_EXPECT_FENV (V_NAME_F1 (tanh), WANT_SIMD_EXCEPT) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0, 0x1p-23, 1000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0x1p-23, 0x1.205966p+3, 100000) +PL_TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0x1.205966p+3, inf, 100) diff --git a/contrib/arm-optimized-routines/string/Dir.mk b/contrib/arm-optimized-routines/string/Dir.mk index cf3453f7580d..40ff5acc093e 100644 --- a/contrib/arm-optimized-routines/string/Dir.mk +++ b/contrib/arm-optimized-routines/string/Dir.mk @@ -1,7 +1,7 @@ # Makefile fragment - requires GNU make # # Copyright (c) 2019-2021, Arm Limited. -# SPDX-License-Identifier: MIT +# SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception S := $(srcdir)/string B := build/string diff --git a/contrib/arm-optimized-routines/string/README.contributors b/contrib/arm-optimized-routines/string/README.contributors new file mode 100644 index 000000000000..0b4a51b56366 --- /dev/null +++ b/contrib/arm-optimized-routines/string/README.contributors @@ -0,0 +1,30 @@ +STYLE REQUIREMENTS +================== + +1. Most code in this sub-directory is expected to be upstreamed into glibc so + the GNU Coding Standard and glibc specific conventions should be followed + to ease upstreaming. + +2. ABI and symbols: the code should be written so it is suitable for inclusion + into a libc with minimal changes. This e.g. means that internal symbols + should be hidden and in the implementation reserved namespace according to + ISO C and POSIX rules. If possible the built shared libraries and static + library archives should be usable to override libc symbols at link time (or + at runtime via LD_PRELOAD). This requires the symbols to follow the glibc ABI + (other than symbol versioning), this cannot be done reliably for static + linking so this is a best effort requirement. + +3. API: include headers should be suitable for benchmarking and testing code + and should not conflict with libc headers. + + +CONTRIBUTION GUIDELINES FOR string SUB-DIRECTORY +================================================ +1. Code: + - The assumptions of the code must be clearly documented. + + - Assembly style should be consistent across different implementations. + + +2. Performance: + - Benchmarking is needed on several microarchitectures. diff --git a/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_region.S b/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_region.S index 84339f73cf23..207e22950c6d 100644 --- a/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_region.S +++ b/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_region.S @@ -1,8 +1,8 @@ /* * __mtag_tag_region - tag memory * - * Copyright (c) 2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2021-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -15,7 +15,7 @@ * The memory region may remain untagged if tagging is not enabled. */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_MEMORY_TAGGING diff --git a/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_zero_region.S b/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_zero_region.S index f58364ca6fcb..44b8e0114f42 100644 --- a/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_zero_region.S +++ b/contrib/arm-optimized-routines/string/aarch64/__mtag_tag_zero_region.S @@ -1,8 +1,8 @@ /* * __mtag_tag_zero_region - tag memory and fill it with zero bytes * - * Copyright (c) 2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2021-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -15,7 +15,7 @@ * The memory region may remain untagged if tagging is not enabled. */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_MEMORY_TAGGING diff --git a/contrib/arm-optimized-routines/string/asmdefs.h b/contrib/arm-optimized-routines/string/aarch64/asmdefs.h index 340b427a505b..131b95e1fea9 100644 --- a/contrib/arm-optimized-routines/string/asmdefs.h +++ b/contrib/arm-optimized-routines/string/aarch64/asmdefs.h @@ -1,15 +1,13 @@ /* - * Macros for asm code. + * Macros for asm code. AArch64 version. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _ASMDEFS_H #define _ASMDEFS_H -#if defined(__aarch64__) - /* Branch Target Identitication support. */ #define BTI_C hint 34 #define BTI_J hint 36 @@ -23,6 +21,19 @@ #define FEATURE_1_PAC 2 /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ +#ifdef __ILP32__ +#define GNU_PROPERTY(type, value) \ + .section .note.gnu.property, "a"; \ + .p2align 2; \ + .word 4; \ + .word 12; \ + .word 5; \ + .asciz "GNU"; \ + .word type; \ + .word 4; \ + .word value; \ + .text +#else #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ .p2align 3; \ @@ -35,6 +46,7 @@ .word value; \ .word 0; \ .text +#endif /* If set then the GNU Property Note section will be added to mark objects to support BTI and PAC-RET. */ @@ -55,19 +67,6 @@ GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI|FEATURE_1_PAC) .cfi_startproc; \ BTI_C; -#else - -#define END_FILE - -#define ENTRY_ALIGN(name, alignment) \ - .global name; \ - .type name,%function; \ - .align alignment; \ - name: \ - .cfi_startproc; - -#endif - #define ENTRY(name) ENTRY_ALIGN(name, 6) #define ENTRY_ALIAS(name) \ @@ -95,4 +94,13 @@ GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI|FEATURE_1_PAC) #define SIZE_ARG(n) #endif +/* Compiler supports SVE instructions */ +#ifndef HAVE_SVE +# if __aarch64__ && (__GNUC__ >= 8 || __clang_major__ >= 5) +# define HAVE_SVE 1 +# else +# define HAVE_SVE 0 +# endif +#endif + #endif diff --git a/contrib/arm-optimized-routines/string/aarch64/check-arch.S b/contrib/arm-optimized-routines/string/aarch64/check-arch.S index 5a54242d7de6..131b7fa36ec2 100644 --- a/contrib/arm-optimized-routines/string/aarch64/check-arch.S +++ b/contrib/arm-optimized-routines/string/aarch64/check-arch.S @@ -1,8 +1,8 @@ /* * check ARCH setting. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if !__aarch64__ @@ -10,4 +10,4 @@ #endif /* Include for GNU property notes. */ -#include "../asmdefs.h" +#include "asmdefs.h" diff --git a/contrib/arm-optimized-routines/string/aarch64/memchr-mte.S b/contrib/arm-optimized-routines/string/aarch64/memchr-mte.S index c2e967d1004e..948c3cbc7dd4 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memchr-mte.S +++ b/contrib/arm-optimized-routines/string/aarch64/memchr-mte.S @@ -1,8 +1,8 @@ /* * memchr - find a character in a memory zone * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define chrin w1 @@ -23,25 +23,21 @@ #define synd x5 #define shift x6 #define tmp x7 -#define wtmp w7 #define vrepchr v0 #define qdata q1 #define vdata v1 #define vhas_chr v2 -#define vrepmask v3 -#define vend v4 -#define dend d4 +#define vend v3 +#define dend d3 /* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ + For each 16-byte chunk we calculate a 64-bit nibble mask value with four bits + per byte. We take 4 bits of every comparison byte with shift right and narrow + by 4 instruction. Since the bits in the nibble mask reflect the order in + which things occur in the original string, counting leading zeros identifies + exactly which byte matched. */ ENTRY (__memchr_aarch64_mte) PTR_ARG (0) @@ -50,55 +46,53 @@ ENTRY (__memchr_aarch64_mte) cbz cntin, L(nomatch) ld1 {vdata.16b}, [src] dup vrepchr.16b, chrin - mov wtmp, 0xf00f - dup vrepmask.8h, wtmp cmeq vhas_chr.16b, vdata.16b, vrepchr.16b lsl shift, srcin, 2 - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ fmov synd, dend lsr synd, synd, shift cbz synd, L(start_loop) rbit synd, synd clz synd, synd - add result, srcin, synd, lsr 2 cmp cntin, synd, lsr 2 + add result, srcin, synd, lsr 2 csel result, result, xzr, hi ret + .p2align 3 L(start_loop): sub tmp, src, srcin - add tmp, tmp, 16 + add tmp, tmp, 17 subs cntrem, cntin, tmp - b.ls L(nomatch) + b.lo L(nomatch) /* Make sure that it won't overread by a 16-byte chunk */ - add tmp, cntrem, 15 - tbnz tmp, 4, L(loop32_2) - + tbz cntrem, 4, L(loop32_2) + sub src, src, 16 .p2align 4 L(loop32): - ldr qdata, [src, 16]! + ldr qdata, [src, 32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbnz synd, L(end) L(loop32_2): - ldr qdata, [src, 16]! - subs cntrem, cntrem, 32 + ldr qdata, [src, 16] cmeq vhas_chr.16b, vdata.16b, vrepchr.16b - b.ls L(end) + subs cntrem, cntrem, 32 + b.lo L(end_2) umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbz synd, L(loop32) +L(end_2): + add src, src, 16 L(end): - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ + sub cntrem, src, srcin fmov synd, dend - add tmp, srcin, cntin - sub cntrem, tmp, src + sub cntrem, cntin, cntrem #ifndef __AARCH64EB__ rbit synd, synd #endif diff --git a/contrib/arm-optimized-routines/string/aarch64/memchr-sve.S b/contrib/arm-optimized-routines/string/aarch64/memchr-sve.S index c22e6596f19b..b851cf31f238 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memchr-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/memchr-sve.S @@ -1,11 +1,11 @@ /* * memchr - find a character in a memory zone * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/memchr.S b/contrib/arm-optimized-routines/string/aarch64/memchr.S index 353f0d1eac53..fe6cfe2bc0e2 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memchr.S +++ b/contrib/arm-optimized-routines/string/aarch64/memchr.S @@ -1,8 +1,8 @@ /* * memchr - find a character in a memory zone * - * Copyright (c) 2014-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2014-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * Neon Available. */ -#include "../asmdefs.h" +#include "asmdefs.h" /* Arguments and results. */ #define srcin x0 diff --git a/contrib/arm-optimized-routines/string/aarch64/memcmp-sve.S b/contrib/arm-optimized-routines/string/aarch64/memcmp-sve.S index 78c5ecaa4cdc..d52ce4555344 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memcmp-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/memcmp-sve.S @@ -1,11 +1,11 @@ /* * memcmp - compare memory * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/memcmp.S b/contrib/arm-optimized-routines/string/aarch64/memcmp.S index 3b1026642eee..35135e72cc8e 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memcmp.S +++ b/contrib/arm-optimized-routines/string/aarch64/memcmp.S @@ -1,103 +1,84 @@ /* memcmp - compare memory * - * Copyright (c) 2013-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2013-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: * - * ARMv8-a, AArch64, unaligned accesses. + * ARMv8-a, AArch64, Advanced SIMD, unaligned accesses. */ -#include "../asmdefs.h" +#include "asmdefs.h" -/* Parameters and result. */ -#define src1 x0 -#define src2 x1 -#define limit x2 -#define result w0 +#define src1 x0 +#define src2 x1 +#define limit x2 +#define result w0 + +#define data1 x3 +#define data1w w3 +#define data2 x4 +#define data2w w4 +#define data3 x5 +#define data3w w5 +#define data4 x6 +#define data4w w6 +#define tmp x6 +#define src1end x7 +#define src2end x8 -/* Internal variables. */ -#define data1 x3 -#define data1w w3 -#define data1h x4 -#define data2 x5 -#define data2w w5 -#define data2h x6 -#define tmp1 x7 -#define tmp2 x8 ENTRY (__memcmp_aarch64) PTR_ARG (0) PTR_ARG (1) SIZE_ARG (2) - subs limit, limit, 8 - b.lo L(less8) - - ldr data1, [src1], 8 - ldr data2, [src2], 8 - cmp data1, data2 - b.ne L(return) - - subs limit, limit, 8 - b.gt L(more16) - ldr data1, [src1, limit] - ldr data2, [src2, limit] - b L(return) - -L(more16): - ldr data1, [src1], 8 - ldr data2, [src2], 8 - cmp data1, data2 - bne L(return) - - /* Jump directly to comparing the last 16 bytes for 32 byte (or less) - strings. */ - subs limit, limit, 16 + cmp limit, 16 + b.lo L(less16) + ldp data1, data3, [src1] + ldp data2, data4, [src2] + ccmp data1, data2, 0, ne + ccmp data3, data4, 0, eq + b.ne L(return2) + + add src1end, src1, limit + add src2end, src2, limit + cmp limit, 32 b.ls L(last_bytes) + cmp limit, 160 + b.hs L(loop_align) + sub limit, limit, 32 - /* We overlap loads between 0-32 bytes at either side of SRC1 when we - try to align, so limit it only to strings larger than 128 bytes. */ - cmp limit, 96 - b.ls L(loop16) - - /* Align src1 and adjust src2 with bytes not yet done. */ - and tmp1, src1, 15 - add limit, limit, tmp1 - sub src1, src1, tmp1 - sub src2, src2, tmp1 - - /* Loop performing 16 bytes per iteration using aligned src1. - Limit is pre-decremented by 16 and must be larger than zero. - Exit if <= 16 bytes left to do or if the data is not equal. */ .p2align 4 -L(loop16): - ldp data1, data1h, [src1], 16 - ldp data2, data2h, [src2], 16 - subs limit, limit, 16 - ccmp data1, data2, 0, hi - ccmp data1h, data2h, 0, eq - b.eq L(loop16) - +L(loop32): + ldp data1, data3, [src1, 16] + ldp data2, data4, [src2, 16] cmp data1, data2 - bne L(return) - mov data1, data1h - mov data2, data2h + ccmp data3, data4, 0, eq + b.ne L(return2) + cmp limit, 16 + b.ls L(last_bytes) + + ldp data1, data3, [src1, 32] + ldp data2, data4, [src2, 32] cmp data1, data2 - bne L(return) + ccmp data3, data4, 0, eq + b.ne L(return2) + add src1, src1, 32 + add src2, src2, 32 +L(last64): + subs limit, limit, 32 + b.hi L(loop32) /* Compare last 1-16 bytes using unaligned access. */ L(last_bytes): - add src1, src1, limit - add src2, src2, limit - ldp data1, data1h, [src1] - ldp data2, data2h, [src2] - cmp data1, data2 - bne L(return) - mov data1, data1h - mov data2, data2h + ldp data1, data3, [src1end, -16] + ldp data2, data4, [src2end, -16] +L(return2): cmp data1, data2 + csel data1, data1, data3, ne + csel data2, data2, data4, ne /* Compare data bytes and set return value to 0, -1 or 1. */ L(return): @@ -105,33 +86,105 @@ L(return): rev data1, data1 rev data2, data2 #endif - cmp data1, data2 -L(ret_eq): + cmp data1, data2 cset result, ne cneg result, result, lo ret .p2align 4 - /* Compare up to 8 bytes. Limit is [-8..-1]. */ +L(less16): + add src1end, src1, limit + add src2end, src2, limit + tbz limit, 3, L(less8) + ldr data1, [src1] + ldr data2, [src2] + ldr data3, [src1end, -8] + ldr data4, [src2end, -8] + b L(return2) + + .p2align 4 L(less8): - adds limit, limit, 4 - b.lo L(less4) - ldr data1w, [src1], 4 - ldr data2w, [src2], 4 + tbz limit, 2, L(less4) + ldr data1w, [src1] + ldr data2w, [src2] + ldr data3w, [src1end, -4] + ldr data4w, [src2end, -4] + b L(return2) + +L(less4): + tbz limit, 1, L(less2) + ldrh data1w, [src1] + ldrh data2w, [src2] cmp data1w, data2w b.ne L(return) - sub limit, limit, 4 -L(less4): - adds limit, limit, 4 - beq L(ret_eq) -L(byte_loop): - ldrb data1w, [src1], 1 - ldrb data2w, [src2], 1 - subs limit, limit, 1 - ccmp data1w, data2w, 0, ne /* NZCV = 0b0000. */ - b.eq L(byte_loop) +L(less2): + mov result, 0 + tbz limit, 0, L(return_zero) + ldrb data1w, [src1end, -1] + ldrb data2w, [src2end, -1] sub result, data1w, data2w +L(return_zero): ret -END (__memcmp_aarch64) +L(loop_align): + ldp data1, data3, [src1, 16] + ldp data2, data4, [src2, 16] + cmp data1, data2 + ccmp data3, data4, 0, eq + b.ne L(return2) + + /* Align src2 and adjust src1, src2 and limit. */ + and tmp, src2, 15 + sub tmp, tmp, 16 + sub src2, src2, tmp + add limit, limit, tmp + sub src1, src1, tmp + sub limit, limit, 64 + 16 + + .p2align 4 +L(loop64): + ldr q0, [src1, 16] + ldr q1, [src2, 16] + subs limit, limit, 64 + ldr q2, [src1, 32] + ldr q3, [src2, 32] + eor v0.16b, v0.16b, v1.16b + eor v1.16b, v2.16b, v3.16b + ldr q2, [src1, 48] + ldr q3, [src2, 48] + umaxp v0.16b, v0.16b, v1.16b + ldr q4, [src1, 64]! + ldr q5, [src2, 64]! + eor v1.16b, v2.16b, v3.16b + eor v2.16b, v4.16b, v5.16b + umaxp v1.16b, v1.16b, v2.16b + umaxp v0.16b, v0.16b, v1.16b + umaxp v0.16b, v0.16b, v0.16b + fmov tmp, d0 + ccmp tmp, 0, 0, hi + b.eq L(loop64) + + /* If equal, process last 1-64 bytes using scalar loop. */ + add limit, limit, 64 + 16 + cbz tmp, L(last64) + + /* Determine the 8-byte aligned offset of the first difference. */ +#ifdef __AARCH64EB__ + rev16 tmp, tmp +#endif + rev tmp, tmp + clz tmp, tmp + bic tmp, tmp, 7 + sub tmp, tmp, 48 + ldr data1, [src1, tmp] + ldr data2, [src2, tmp] +#ifndef __AARCH64EB__ + rev data1, data1 + rev data2, data2 +#endif + mov result, 1 + cmp data1, data2 + cneg result, result, lo + ret +END (__memcmp_aarch64) diff --git a/contrib/arm-optimized-routines/string/aarch64/memcpy-advsimd.S b/contrib/arm-optimized-routines/string/aarch64/memcpy-advsimd.S index f97f2c3047b9..9d3027d4d3cd 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memcpy-advsimd.S +++ b/contrib/arm-optimized-routines/string/aarch64/memcpy-advsimd.S @@ -1,8 +1,8 @@ /* * memcpy - copy memory area * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * */ -#include "../asmdefs.h" +#include "asmdefs.h" #define dstin x0 #define src x1 @@ -56,11 +56,12 @@ ENTRY (__memcpy_aarch64_simd) PTR_ARG (1) SIZE_ARG (2) add srcend, src, count - add dstend, dstin, count cmp count, 128 b.hi L(copy_long) + add dstend, dstin, count cmp count, 32 b.hi L(copy32_128) + nop /* Small copies: 0..32 bytes. */ cmp count, 16 @@ -71,6 +72,18 @@ ENTRY (__memcpy_aarch64_simd) str B_q, [dstend, -16] ret + .p2align 4 + /* Medium copies: 33..128 bytes. */ +L(copy32_128): + ldp A_q, B_q, [src] + ldp C_q, D_q, [srcend, -32] + cmp count, 64 + b.hi L(copy128) + stp A_q, B_q, [dstin] + stp C_q, D_q, [dstend, -32] + ret + + .p2align 4 /* Copy 8-15 bytes. */ L(copy16): tbz count, 3, L(copy8) @@ -80,7 +93,6 @@ L(copy16): str A_h, [dstend, -8] ret - .p2align 3 /* Copy 4-7 bytes. */ L(copy8): tbz count, 2, L(copy4) @@ -90,31 +102,6 @@ L(copy8): str B_lw, [dstend, -4] ret - /* Copy 0..3 bytes using a branchless sequence. */ -L(copy4): - cbz count, L(copy0) - lsr tmp1, count, 1 - ldrb A_lw, [src] - ldrb C_lw, [srcend, -1] - ldrb B_lw, [src, tmp1] - strb A_lw, [dstin] - strb B_lw, [dstin, tmp1] - strb C_lw, [dstend, -1] -L(copy0): - ret - - .p2align 4 - /* Medium copies: 33..128 bytes. */ -L(copy32_128): - ldp A_q, B_q, [src] - ldp C_q, D_q, [srcend, -32] - cmp count, 64 - b.hi L(copy128) - stp A_q, B_q, [dstin] - stp C_q, D_q, [dstend, -32] - ret - - .p2align 4 /* Copy 65..128 bytes. */ L(copy128): ldp E_q, F_q, [src, 32] @@ -128,8 +115,24 @@ L(copy96): stp C_q, D_q, [dstend, -32] ret + /* Copy 0..3 bytes using a branchless sequence. */ +L(copy4): + cbz count, L(copy0) + lsr tmp1, count, 1 + ldrb A_lw, [src] + ldrb C_lw, [srcend, -1] + ldrb B_lw, [src, tmp1] + strb A_lw, [dstin] + strb B_lw, [dstin, tmp1] + strb C_lw, [dstend, -1] +L(copy0): + ret + + .p2align 3 /* Copy more than 128 bytes. */ L(copy_long): + add dstend, dstin, count + /* Use backwards copy if there is an overlap. */ sub tmp1, dstin, src cmp tmp1, count @@ -166,6 +169,9 @@ L(copy64_from_end): stp A_q, B_q, [dstend, -32] ret + .p2align 4 + nop + /* Large backwards copy for overlapping copies. Copy 16 bytes and then align srcend to 16-byte alignment. */ L(copy_long_backwards): diff --git a/contrib/arm-optimized-routines/string/aarch64/memcpy-mops.S b/contrib/arm-optimized-routines/string/aarch64/memcpy-mops.S new file mode 100644 index 000000000000..b45c31418717 --- /dev/null +++ b/contrib/arm-optimized-routines/string/aarch64/memcpy-mops.S @@ -0,0 +1,21 @@ +/* + * memcpy using MOPS extension. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "asmdefs.h" + +ENTRY (__memcpy_aarch64_mops) + PTR_ARG (0) + PTR_ARG (1) + SIZE_ARG (2) + + mov x3, x0 + .inst 0x19010443 /* cpyfp [x3]!, [x1]!, x2! */ + .inst 0x19410443 /* cpyfm [x3]!, [x1]!, x2! */ + .inst 0x19810443 /* cpyfe [x3]!, [x1]!, x2! */ + ret + +END (__memcpy_aarch64_mops) diff --git a/contrib/arm-optimized-routines/string/aarch64/memcpy-sve.S b/contrib/arm-optimized-routines/string/aarch64/memcpy-sve.S new file mode 100644 index 000000000000..e8a946d7db37 --- /dev/null +++ b/contrib/arm-optimized-routines/string/aarch64/memcpy-sve.S @@ -0,0 +1,177 @@ +/* + * memcpy - copy memory area + * + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +/* Assumptions: + * + * ARMv8-a, AArch64, Advanced SIMD, SVE, unaligned accesses. + * + */ + +#include "asmdefs.h" + +#ifdef HAVE_SVE + +.arch armv8-a+sve + +#define dstin x0 +#define src x1 +#define count x2 +#define dst x3 +#define srcend x4 +#define dstend x5 +#define tmp1 x6 +#define vlen x6 + +#define A_q q0 +#define B_q q1 +#define C_q q2 +#define D_q q3 +#define E_q q4 +#define F_q q5 +#define G_q q6 +#define H_q q7 + +/* This implementation handles overlaps and supports both memcpy and memmove + from a single entry point. It uses unaligned accesses and branchless + sequences to keep the code small, simple and improve performance. + SVE vectors are used to speedup small copies. + + Copies are split into 3 main cases: small copies of up to 32 bytes, medium + copies of up to 128 bytes, and large copies. The overhead of the overlap + check is negligible since it is only required for large copies. + + Large copies use a software pipelined loop processing 64 bytes per iteration. + The source pointer is 16-byte aligned to minimize unaligned accesses. + The loop tail is handled by always copying 64 bytes from the end. +*/ + +ENTRY_ALIAS (__memmove_aarch64_sve) +ENTRY (__memcpy_aarch64_sve) + PTR_ARG (0) + PTR_ARG (1) + SIZE_ARG (2) + + cmp count, 128 + b.hi L(copy_long) + cntb vlen + cmp count, vlen, lsl 1 + b.hi L(copy32_128) + + whilelo p0.b, xzr, count + whilelo p1.b, vlen, count + ld1b z0.b, p0/z, [src, 0, mul vl] + ld1b z1.b, p1/z, [src, 1, mul vl] + st1b z0.b, p0, [dstin, 0, mul vl] + st1b z1.b, p1, [dstin, 1, mul vl] + ret + + /* Medium copies: 33..128 bytes. */ +L(copy32_128): + add srcend, src, count + add dstend, dstin, count + ldp A_q, B_q, [src] + ldp C_q, D_q, [srcend, -32] + cmp count, 64 + b.hi L(copy128) + stp A_q, B_q, [dstin] + stp C_q, D_q, [dstend, -32] + ret + + /* Copy 65..128 bytes. */ +L(copy128): + ldp E_q, F_q, [src, 32] + cmp count, 96 + b.ls L(copy96) + ldp G_q, H_q, [srcend, -64] + stp G_q, H_q, [dstend, -64] +L(copy96): + stp A_q, B_q, [dstin] + stp E_q, F_q, [dstin, 32] + stp C_q, D_q, [dstend, -32] + ret + + /* Copy more than 128 bytes. */ +L(copy_long): + add srcend, src, count + add dstend, dstin, count + + /* Use backwards copy if there is an overlap. */ + sub tmp1, dstin, src + cmp tmp1, count + b.lo L(copy_long_backwards) + + /* Copy 16 bytes and then align src to 16-byte alignment. */ + ldr D_q, [src] + and tmp1, src, 15 + bic src, src, 15 + sub dst, dstin, tmp1 + add count, count, tmp1 /* Count is now 16 too large. */ + ldp A_q, B_q, [src, 16] + str D_q, [dstin] + ldp C_q, D_q, [src, 48] + subs count, count, 128 + 16 /* Test and readjust count. */ + b.ls L(copy64_from_end) +L(loop64): + stp A_q, B_q, [dst, 16] + ldp A_q, B_q, [src, 80] + stp C_q, D_q, [dst, 48] + ldp C_q, D_q, [src, 112] + add src, src, 64 + add dst, dst, 64 + subs count, count, 64 + b.hi L(loop64) + + /* Write the last iteration and copy 64 bytes from the end. */ +L(copy64_from_end): + ldp E_q, F_q, [srcend, -64] + stp A_q, B_q, [dst, 16] + ldp A_q, B_q, [srcend, -32] + stp C_q, D_q, [dst, 48] + stp E_q, F_q, [dstend, -64] + stp A_q, B_q, [dstend, -32] + ret + + /* Large backwards copy for overlapping copies. + Copy 16 bytes and then align srcend to 16-byte alignment. */ +L(copy_long_backwards): + cbz tmp1, L(return) + ldr D_q, [srcend, -16] + and tmp1, srcend, 15 + bic srcend, srcend, 15 + sub count, count, tmp1 + ldp A_q, B_q, [srcend, -32] + str D_q, [dstend, -16] + ldp C_q, D_q, [srcend, -64] + sub dstend, dstend, tmp1 + subs count, count, 128 + b.ls L(copy64_from_start) + +L(loop64_backwards): + str B_q, [dstend, -16] + str A_q, [dstend, -32] + ldp A_q, B_q, [srcend, -96] + str D_q, [dstend, -48] + str C_q, [dstend, -64]! + ldp C_q, D_q, [srcend, -128] + sub srcend, srcend, 64 + subs count, count, 64 + b.hi L(loop64_backwards) + + /* Write the last iteration and copy 64 bytes from the start. */ +L(copy64_from_start): + ldp E_q, F_q, [src, 32] + stp A_q, B_q, [dstend, -32] + ldp A_q, B_q, [src] + stp C_q, D_q, [dstend, -64] + stp E_q, F_q, [dstin, 32] + stp A_q, B_q, [dstin] +L(return): + ret + +END (__memcpy_aarch64_sve) + +#endif diff --git a/contrib/arm-optimized-routines/string/aarch64/memcpy.S b/contrib/arm-optimized-routines/string/aarch64/memcpy.S index dd254f6f9929..7c0606e2104a 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memcpy.S +++ b/contrib/arm-optimized-routines/string/aarch64/memcpy.S @@ -1,8 +1,8 @@ /* * memcpy - copy memory area * - * Copyright (c) 2012-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2012-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * */ -#include "../asmdefs.h" +#include "asmdefs.h" #define dstin x0 #define src x1 diff --git a/contrib/arm-optimized-routines/string/aarch64/memmove-mops.S b/contrib/arm-optimized-routines/string/aarch64/memmove-mops.S new file mode 100644 index 000000000000..6c73017bb16f --- /dev/null +++ b/contrib/arm-optimized-routines/string/aarch64/memmove-mops.S @@ -0,0 +1,21 @@ +/* + * memmove using MOPS extension. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "asmdefs.h" + +ENTRY (__memmove_aarch64_mops) + PTR_ARG (0) + PTR_ARG (1) + SIZE_ARG (2) + + mov x3, x0 + .inst 0x1d010443 /* cpyp [x3]!, [x1]!, x2! */ + .inst 0x1d410443 /* cpym [x3]!, [x1]!, x2! */ + .inst 0x1d810443 /* cpye [x3]!, [x1]!, x2! */ + ret + +END (__memmove_aarch64_mops) diff --git a/contrib/arm-optimized-routines/string/aarch64/memrchr.S b/contrib/arm-optimized-routines/string/aarch64/memrchr.S index 7b4be847cecb..6418bdf56f41 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memrchr.S +++ b/contrib/arm-optimized-routines/string/aarch64/memrchr.S @@ -1,8 +1,8 @@ /* * memrchr - find last character in a memory zone. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define chrin w1 @@ -23,7 +23,6 @@ #define synd x5 #define shift x6 #define tmp x7 -#define wtmp w7 #define end x8 #define endm1 x9 @@ -31,19 +30,16 @@ #define qdata q1 #define vdata v1 #define vhas_chr v2 -#define vrepmask v3 -#define vend v4 -#define dend d4 +#define vend v3 +#define dend d3 /* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ + For each 16-byte chunk we calculate a 64-bit nibble mask value with four bits + per byte. We take 4 bits of every comparison byte with shift right and narrow + by 4 instruction. Since the bits in the nibble mask reflect the order in + which things occur in the original string, counting leading zeros identifies + exactly which byte matched. */ ENTRY (__memrchr_aarch64) PTR_ARG (0) @@ -53,12 +49,9 @@ ENTRY (__memrchr_aarch64) cbz cntin, L(nomatch) ld1 {vdata.16b}, [src] dup vrepchr.16b, chrin - mov wtmp, 0xf00f - dup vrepmask.8h, wtmp cmeq vhas_chr.16b, vdata.16b, vrepchr.16b neg shift, end, lsl 2 - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ fmov synd, dend lsl synd, synd, shift cbz synd, L(start_loop) @@ -69,34 +62,36 @@ ENTRY (__memrchr_aarch64) csel result, result, xzr, hi ret + nop L(start_loop): - sub tmp, end, src - subs cntrem, cntin, tmp + subs cntrem, src, srcin b.ls L(nomatch) /* Make sure that it won't overread by a 16-byte chunk */ - add tmp, cntrem, 15 - tbnz tmp, 4, L(loop32_2) + sub cntrem, cntrem, 1 + tbz cntrem, 4, L(loop32_2) + add src, src, 16 - .p2align 4 + .p2align 5 L(loop32): - ldr qdata, [src, -16]! + ldr qdata, [src, -32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbnz synd, L(end) L(loop32_2): - ldr qdata, [src, -16]! + ldr qdata, [src, -16] subs cntrem, cntrem, 32 cmeq vhas_chr.16b, vdata.16b, vrepchr.16b - b.ls L(end) + b.lo L(end_2) umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbz synd, L(loop32) +L(end_2): + sub src, src, 16 L(end): - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ fmov synd, dend add tmp, src, 15 diff --git a/contrib/arm-optimized-routines/string/aarch64/memset-mops.S b/contrib/arm-optimized-routines/string/aarch64/memset-mops.S new file mode 100644 index 000000000000..ec791493bae9 --- /dev/null +++ b/contrib/arm-optimized-routines/string/aarch64/memset-mops.S @@ -0,0 +1,20 @@ +/* + * memset using MOPS extension. + * + * Copyright (c) 2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#include "asmdefs.h" + +ENTRY (__memset_aarch64_mops) + PTR_ARG (0) + SIZE_ARG (2) + + mov x3, x0 + .inst 0x19c10443 /* setp [x3]!, x2!, x1 */ + .inst 0x19c14443 /* setm [x3]!, x2!, x1 */ + .inst 0x19c18443 /* sete [x3]!, x2!, x1 */ + ret + +END (__memset_aarch64_mops) diff --git a/contrib/arm-optimized-routines/string/aarch64/memset.S b/contrib/arm-optimized-routines/string/aarch64/memset.S index 9fcd97579913..553b0fcaefea 100644 --- a/contrib/arm-optimized-routines/string/aarch64/memset.S +++ b/contrib/arm-optimized-routines/string/aarch64/memset.S @@ -1,8 +1,8 @@ /* * memset - fill memory with a constant byte * - * Copyright (c) 2012-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2012-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * */ -#include "../asmdefs.h" +#include "asmdefs.h" #define dstin x0 #define val x1 diff --git a/contrib/arm-optimized-routines/string/aarch64/stpcpy-mte.S b/contrib/arm-optimized-routines/string/aarch64/stpcpy-mte.S deleted file mode 100644 index f1c711906515..000000000000 --- a/contrib/arm-optimized-routines/string/aarch64/stpcpy-mte.S +++ /dev/null @@ -1,10 +0,0 @@ -/* - * stpcpy - copy a string returning pointer to end. - * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -#define BUILD_STPCPY 1 - -#include "strcpy-mte.S" diff --git a/contrib/arm-optimized-routines/string/aarch64/stpcpy-sve.S b/contrib/arm-optimized-routines/string/aarch64/stpcpy-sve.S index 82dd9717b0a0..5d3f14b86026 100644 --- a/contrib/arm-optimized-routines/string/aarch64/stpcpy-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/stpcpy-sve.S @@ -2,7 +2,7 @@ * stpcpy - copy a string returning pointer to end. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define BUILD_STPCPY 1 diff --git a/contrib/arm-optimized-routines/string/aarch64/stpcpy.S b/contrib/arm-optimized-routines/string/aarch64/stpcpy.S index 4f62aa462389..155c68d75a7b 100644 --- a/contrib/arm-optimized-routines/string/aarch64/stpcpy.S +++ b/contrib/arm-optimized-routines/string/aarch64/stpcpy.S @@ -2,7 +2,7 @@ * stpcpy - copy a string returning pointer to end. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define BUILD_STPCPY 1 diff --git a/contrib/arm-optimized-routines/string/aarch64/strchr-mte.S b/contrib/arm-optimized-routines/string/aarch64/strchr-mte.S index dcb0e4625870..6ec08f7acc76 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchr-mte.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchr-mte.S @@ -1,8 +1,8 @@ /* * strchr - find a character in a string * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define chrin w1 @@ -19,8 +19,7 @@ #define src x2 #define tmp1 x1 -#define wtmp2 w3 -#define tmp3 x3 +#define tmp2 x3 #define vrepchr v0 #define vdata v1 @@ -28,39 +27,30 @@ #define vhas_nul v2 #define vhas_chr v3 #define vrepmask v4 -#define vrepmask2 v5 -#define vend v6 -#define dend d6 +#define vend v5 +#define dend d5 /* Core algorithm. For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-1 are set if the relevant byte matched the - requested character, bits 2-3 are set if the byte is NUL (or matched), and - bits 4-7 are not used and must be zero if none of bits 0-3 are set). Odd - bytes set bits 4-7 so that adjacent bytes can be merged. Since the bits - in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ + per byte. Bits 0-1 are set if the relevant byte matched the requested + character, bits 2-3 are set if the byte is NUL or matched. Count trailing + zeroes gives the position of the matching byte if it is a multiple of 4. + If it is not a multiple of 4, there was no match. */ ENTRY (__strchr_aarch64_mte) PTR_ARG (0) bic src, srcin, 15 dup vrepchr.16b, chrin ld1 {vdata.16b}, [src] - mov wtmp2, 0x3003 - dup vrepmask.8h, wtmp2 + movi vrepmask.16b, 0x33 cmeq vhas_nul.16b, vdata.16b, 0 cmeq vhas_chr.16b, vdata.16b, vrepchr.16b - mov wtmp2, 0xf00f - dup vrepmask2.8h, wtmp2 - bit vhas_nul.16b, vhas_chr.16b, vrepmask.16b - and vhas_nul.16b, vhas_nul.16b, vrepmask2.16b - lsl tmp3, srcin, 2 - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ - + lsl tmp2, srcin, 2 + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ fmov tmp1, dend - lsr tmp1, tmp1, tmp3 + lsr tmp1, tmp1, tmp2 cbz tmp1, L(loop) rbit tmp1, tmp1 @@ -74,28 +64,34 @@ ENTRY (__strchr_aarch64_mte) .p2align 4 L(loop): - ldr qdata, [src, 16]! + ldr qdata, [src, 16] + cmeq vhas_chr.16b, vdata.16b, vrepchr.16b + cmhs vhas_nul.16b, vhas_chr.16b, vdata.16b + umaxp vend.16b, vhas_nul.16b, vhas_nul.16b + fmov tmp1, dend + cbnz tmp1, L(end) + ldr qdata, [src, 32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmhs vhas_nul.16b, vhas_chr.16b, vdata.16b umaxp vend.16b, vhas_nul.16b, vhas_nul.16b fmov tmp1, dend cbz tmp1, L(loop) + sub src, src, 16 +L(end): #ifdef __AARCH64EB__ bif vhas_nul.16b, vhas_chr.16b, vrepmask.16b - and vhas_nul.16b, vhas_nul.16b, vrepmask2.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ fmov tmp1, dend #else bit vhas_nul.16b, vhas_chr.16b, vrepmask.16b - and vhas_nul.16b, vhas_nul.16b, vrepmask2.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ fmov tmp1, dend rbit tmp1, tmp1 #endif + add src, src, 16 clz tmp1, tmp1 - /* Tmp1 is an even multiple of 2 if the target character was - found first. Otherwise we've found the end of string. */ + /* Tmp1 is a multiple of 4 if the target character was found. */ tst tmp1, 2 add result, src, tmp1, lsr 2 csel result, result, xzr, eq diff --git a/contrib/arm-optimized-routines/string/aarch64/strchr-sve.S b/contrib/arm-optimized-routines/string/aarch64/strchr-sve.S index 13ba9f44f9c5..ff075167bfef 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchr-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchr-sve.S @@ -1,11 +1,11 @@ /* * strchr/strchrnul - find a character in a string * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strchr.S b/contrib/arm-optimized-routines/string/aarch64/strchr.S index 1063cbfd77aa..37193bd947a7 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchr.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchr.S @@ -1,8 +1,8 @@ /* * strchr - find a character in a string * - * Copyright (c) 2014-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2014-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * Neon Available. */ -#include "../asmdefs.h" +#include "asmdefs.h" /* Arguments and results. */ #define srcin x0 diff --git a/contrib/arm-optimized-routines/string/aarch64/strchrnul-mte.S b/contrib/arm-optimized-routines/string/aarch64/strchrnul-mte.S index 1b0d0a63094c..543ee88bb285 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchrnul-mte.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchrnul-mte.S @@ -1,8 +1,8 @@ /* * strchrnul - find a character or nul in a string * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define chrin w1 @@ -20,38 +20,32 @@ #define src x2 #define tmp1 x1 #define tmp2 x3 -#define tmp2w w3 #define vrepchr v0 #define vdata v1 #define qdata q1 #define vhas_nul v2 #define vhas_chr v3 -#define vrepmask v4 -#define vend v5 -#define dend d5 +#define vend v4 +#define dend d4 -/* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ +/* + Core algorithm: + For each 16-byte chunk we calculate a 64-bit nibble mask value with four bits + per byte. We take 4 bits of every comparison byte with shift right and narrow + by 4 instruction. Since the bits in the nibble mask reflect the order in + which things occur in the original string, counting leading zeros identifies + exactly which byte matched. */ ENTRY (__strchrnul_aarch64_mte) PTR_ARG (0) bic src, srcin, 15 dup vrepchr.16b, chrin ld1 {vdata.16b}, [src] - mov tmp2w, 0xf00f - dup vrepmask.8h, tmp2w cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b lsl tmp2, srcin, 2 - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ fmov tmp1, dend lsr tmp1, tmp1, tmp2 /* Mask padding bits. */ cbz tmp1, L(loop) @@ -63,15 +57,22 @@ ENTRY (__strchrnul_aarch64_mte) .p2align 4 L(loop): - ldr qdata, [src, 16]! + ldr qdata, [src, 16] + cmeq vhas_chr.16b, vdata.16b, vrepchr.16b + cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b + umaxp vend.16b, vhas_chr.16b, vhas_chr.16b + fmov tmp1, dend + cbnz tmp1, L(end) + ldr qdata, [src, 32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b umaxp vend.16b, vhas_chr.16b, vhas_chr.16b fmov tmp1, dend cbz tmp1, L(loop) - - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + sub src, src, 16 +L(end): + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ + add src, src, 16 fmov tmp1, dend #ifndef __AARCH64EB__ rbit tmp1, tmp1 diff --git a/contrib/arm-optimized-routines/string/aarch64/strchrnul-sve.S b/contrib/arm-optimized-routines/string/aarch64/strchrnul-sve.S index 428ff1a3d008..0005f9177514 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchrnul-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchrnul-sve.S @@ -2,7 +2,7 @@ * strchrnul - find a character or nul in a string * * Copyright (c) 2018-2019, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define BUILD_STRCHRNUL diff --git a/contrib/arm-optimized-routines/string/aarch64/strchrnul.S b/contrib/arm-optimized-routines/string/aarch64/strchrnul.S index a4230d919b47..666e8d0304c1 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strchrnul.S +++ b/contrib/arm-optimized-routines/string/aarch64/strchrnul.S @@ -1,8 +1,8 @@ /* * strchrnul - find a character or nul in a string * - * Copyright (c) 2014-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2014-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * Neon Available. */ -#include "../asmdefs.h" +#include "asmdefs.h" /* Arguments and results. */ #define srcin x0 diff --git a/contrib/arm-optimized-routines/string/aarch64/strcmp-mte.S b/contrib/arm-optimized-routines/string/aarch64/strcmp-mte.S deleted file mode 100644 index 12d1a6b51dd3..000000000000 --- a/contrib/arm-optimized-routines/string/aarch64/strcmp-mte.S +++ /dev/null @@ -1,189 +0,0 @@ -/* - * strcmp - compare two strings - * - * Copyright (c) 2012-2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ - - -/* Assumptions: - * - * ARMv8-a, AArch64. - * MTE compatible. - */ - -#include "../asmdefs.h" - -#define REP8_01 0x0101010101010101 -#define REP8_7f 0x7f7f7f7f7f7f7f7f - -#define src1 x0 -#define src2 x1 -#define result x0 - -#define data1 x2 -#define data1w w2 -#define data2 x3 -#define data2w w3 -#define has_nul x4 -#define diff x5 -#define off1 x5 -#define syndrome x6 -#define tmp x6 -#define data3 x7 -#define zeroones x8 -#define shift x9 -#define off2 x10 - -/* On big-endian early bytes are at MSB and on little-endian LSB. - LS_FW means shifting towards early bytes. */ -#ifdef __AARCH64EB__ -# define LS_FW lsl -#else -# define LS_FW lsr -#endif - -/* NUL detection works on the principle that (X - 1) & (~X) & 0x80 - (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and - can be done in parallel across the entire word. - Since carry propagation makes 0x1 bytes before a NUL byte appear - NUL too in big-endian, byte-reverse the data before the NUL check. */ - - -ENTRY (__strcmp_aarch64_mte) - PTR_ARG (0) - PTR_ARG (1) - sub off2, src2, src1 - mov zeroones, REP8_01 - and tmp, src1, 7 - tst off2, 7 - b.ne L(misaligned8) - cbnz tmp, L(mutual_align) - - .p2align 4 - -L(loop_aligned): - ldr data2, [src1, off2] - ldr data1, [src1], 8 -L(start_realigned): -#ifdef __AARCH64EB__ - rev tmp, data1 - sub has_nul, tmp, zeroones - orr tmp, tmp, REP8_7f -#else - sub has_nul, data1, zeroones - orr tmp, data1, REP8_7f -#endif - bics has_nul, has_nul, tmp /* Non-zero if NUL terminator. */ - ccmp data1, data2, 0, eq - b.eq L(loop_aligned) -#ifdef __AARCH64EB__ - rev has_nul, has_nul -#endif - eor diff, data1, data2 - orr syndrome, diff, has_nul -L(end): -#ifndef __AARCH64EB__ - rev syndrome, syndrome - rev data1, data1 - rev data2, data2 -#endif - clz shift, syndrome - /* The most-significant-non-zero bit of the syndrome marks either the - first bit that is different, or the top bit of the first zero byte. - Shifting left now will bring the critical information into the - top bits. */ - lsl data1, data1, shift - lsl data2, data2, shift - /* But we need to zero-extend (char is unsigned) the value and then - perform a signed 32-bit subtraction. */ - lsr data1, data1, 56 - sub result, data1, data2, lsr 56 - ret - - .p2align 4 - -L(mutual_align): - /* Sources are mutually aligned, but are not currently at an - alignment boundary. Round down the addresses and then mask off - the bytes that precede the start point. */ - bic src1, src1, 7 - ldr data2, [src1, off2] - ldr data1, [src1], 8 - neg shift, src2, lsl 3 /* Bits to alignment -64. */ - mov tmp, -1 - LS_FW tmp, tmp, shift - orr data1, data1, tmp - orr data2, data2, tmp - b L(start_realigned) - -L(misaligned8): - /* Align SRC1 to 8 bytes and then compare 8 bytes at a time, always - checking to make sure that we don't access beyond the end of SRC2. */ - cbz tmp, L(src1_aligned) -L(do_misaligned): - ldrb data1w, [src1], 1 - ldrb data2w, [src2], 1 - cmp data1w, 0 - ccmp data1w, data2w, 0, ne /* NZCV = 0b0000. */ - b.ne L(done) - tst src1, 7 - b.ne L(do_misaligned) - -L(src1_aligned): - neg shift, src2, lsl 3 - bic src2, src2, 7 - ldr data3, [src2], 8 -#ifdef __AARCH64EB__ - rev data3, data3 -#endif - lsr tmp, zeroones, shift - orr data3, data3, tmp - sub has_nul, data3, zeroones - orr tmp, data3, REP8_7f - bics has_nul, has_nul, tmp - b.ne L(tail) - - sub off1, src2, src1 - - .p2align 4 - -L(loop_unaligned): - ldr data3, [src1, off1] - ldr data2, [src1, off2] -#ifdef __AARCH64EB__ - rev data3, data3 -#endif - sub has_nul, data3, zeroones - orr tmp, data3, REP8_7f - ldr data1, [src1], 8 - bics has_nul, has_nul, tmp - ccmp data1, data2, 0, eq - b.eq L(loop_unaligned) - - lsl tmp, has_nul, shift -#ifdef __AARCH64EB__ - rev tmp, tmp -#endif - eor diff, data1, data2 - orr syndrome, diff, tmp - cbnz syndrome, L(end) -L(tail): - ldr data1, [src1] - neg shift, shift - lsr data2, data3, shift - lsr has_nul, has_nul, shift -#ifdef __AARCH64EB__ - rev data2, data2 - rev has_nul, has_nul -#endif - eor diff, data1, data2 - orr syndrome, diff, has_nul - b L(end) - -L(done): - sub result, data1, data2 - ret - -END (__strcmp_aarch64_mte) - diff --git a/contrib/arm-optimized-routines/string/aarch64/strcmp-sve.S b/contrib/arm-optimized-routines/string/aarch64/strcmp-sve.S index e6d2da5411ca..eaf909a378f1 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strcmp-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strcmp-sve.S @@ -1,11 +1,11 @@ /* * __strcmp_aarch64_sve - compare two strings * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strcmp.S b/contrib/arm-optimized-routines/string/aarch64/strcmp.S index 7714ebf5577d..137a9aa06681 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strcmp.S +++ b/contrib/arm-optimized-routines/string/aarch64/strcmp.S @@ -1,168 +1,184 @@ /* * strcmp - compare two strings * - * Copyright (c) 2012-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2012-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ + /* Assumptions: * - * ARMv8-a, AArch64 + * ARMv8-a, AArch64. + * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define REP8_01 0x0101010101010101 #define REP8_7f 0x7f7f7f7f7f7f7f7f -#define REP8_80 0x8080808080808080 -/* Parameters and result. */ #define src1 x0 #define src2 x1 #define result x0 -/* Internal variables. */ #define data1 x2 #define data1w w2 #define data2 x3 #define data2w w3 #define has_nul x4 #define diff x5 +#define off1 x5 #define syndrome x6 -#define tmp1 x7 -#define tmp2 x8 -#define tmp3 x9 -#define zeroones x10 -#define pos x11 +#define tmp x6 +#define data3 x7 +#define zeroones x8 +#define shift x9 +#define off2 x10 + +/* On big-endian early bytes are at MSB and on little-endian LSB. + LS_FW means shifting towards early bytes. */ +#ifdef __AARCH64EB__ +# define LS_FW lsl +#else +# define LS_FW lsr +#endif + +/* NUL detection works on the principle that (X - 1) & (~X) & 0x80 + (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and + can be done in parallel across the entire word. + Since carry propagation makes 0x1 bytes before a NUL byte appear + NUL too in big-endian, byte-reverse the data before the NUL check. */ + - /* Start of performance-critical section -- one 64B cache line. */ ENTRY (__strcmp_aarch64) PTR_ARG (0) PTR_ARG (1) - eor tmp1, src1, src2 - mov zeroones, #REP8_01 - tst tmp1, #7 + sub off2, src2, src1 + mov zeroones, REP8_01 + and tmp, src1, 7 + tst off2, 7 b.ne L(misaligned8) - ands tmp1, src1, #7 - b.ne L(mutual_align) - /* NUL detection works on the principle that (X - 1) & (~X) & 0x80 - (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and - can be done in parallel across the entire word. */ + cbnz tmp, L(mutual_align) + + .p2align 4 + L(loop_aligned): - ldr data1, [src1], #8 - ldr data2, [src2], #8 + ldr data2, [src1, off2] + ldr data1, [src1], 8 L(start_realigned): - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - eor diff, data1, data2 /* Non-zero if differences found. */ - bic has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ +#ifdef __AARCH64EB__ + rev tmp, data1 + sub has_nul, tmp, zeroones + orr tmp, tmp, REP8_7f +#else + sub has_nul, data1, zeroones + orr tmp, data1, REP8_7f +#endif + bics has_nul, has_nul, tmp /* Non-zero if NUL terminator. */ + ccmp data1, data2, 0, eq + b.eq L(loop_aligned) +#ifdef __AARCH64EB__ + rev has_nul, has_nul +#endif + eor diff, data1, data2 orr syndrome, diff, has_nul - cbz syndrome, L(loop_aligned) - /* End of performance-critical section -- one 64B cache line. */ - L(end): -#ifndef __AARCH64EB__ +#ifndef __AARCH64EB__ rev syndrome, syndrome rev data1, data1 - /* The MS-non-zero bit of the syndrome marks either the first bit - that is different, or the top bit of the first zero byte. - Shifting left now will bring the critical information into the - top bits. */ - clz pos, syndrome rev data2, data2 - lsl data1, data1, pos - lsl data2, data2, pos - /* But we need to zero-extend (char is unsigned) the value and then - perform a signed 32-bit subtraction. */ - lsr data1, data1, #56 - sub result, data1, data2, lsr #56 - ret -#else - /* For big-endian we cannot use the trick with the syndrome value - as carry-propagation can corrupt the upper bits if the trailing - bytes in the string contain 0x01. */ - /* However, if there is no NUL byte in the dword, we can generate - the result directly. We can't just subtract the bytes as the - MSB might be significant. */ - cbnz has_nul, 1f - cmp data1, data2 - cset result, ne - cneg result, result, lo - ret -1: - /* Re-compute the NUL-byte detection, using a byte-reversed value. */ - rev tmp3, data1 - sub tmp1, tmp3, zeroones - orr tmp2, tmp3, #REP8_7f - bic has_nul, tmp1, tmp2 - rev has_nul, has_nul - orr syndrome, diff, has_nul - clz pos, syndrome - /* The MS-non-zero bit of the syndrome marks either the first bit - that is different, or the top bit of the first zero byte. +#endif + clz shift, syndrome + /* The most-significant-non-zero bit of the syndrome marks either the + first bit that is different, or the top bit of the first zero byte. Shifting left now will bring the critical information into the top bits. */ - lsl data1, data1, pos - lsl data2, data2, pos + lsl data1, data1, shift + lsl data2, data2, shift /* But we need to zero-extend (char is unsigned) the value and then perform a signed 32-bit subtraction. */ - lsr data1, data1, #56 - sub result, data1, data2, lsr #56 + lsr data1, data1, 56 + sub result, data1, data2, lsr 56 ret -#endif + + .p2align 4 L(mutual_align): /* Sources are mutually aligned, but are not currently at an alignment boundary. Round down the addresses and then mask off - the bytes that preceed the start point. */ - bic src1, src1, #7 - bic src2, src2, #7 - lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */ - ldr data1, [src1], #8 - neg tmp1, tmp1 /* Bits to alignment -64. */ - ldr data2, [src2], #8 - mov tmp2, #~0 -#ifdef __AARCH64EB__ - /* Big-endian. Early bytes are at MSB. */ - lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */ -#else - /* Little-endian. Early bytes are at LSB. */ - lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */ -#endif - orr data1, data1, tmp2 - orr data2, data2, tmp2 + the bytes that precede the start point. */ + bic src1, src1, 7 + ldr data2, [src1, off2] + ldr data1, [src1], 8 + neg shift, src2, lsl 3 /* Bits to alignment -64. */ + mov tmp, -1 + LS_FW tmp, tmp, shift + orr data1, data1, tmp + orr data2, data2, tmp b L(start_realigned) L(misaligned8): /* Align SRC1 to 8 bytes and then compare 8 bytes at a time, always - checking to make sure that we don't access beyond page boundary in - SRC2. */ - tst src1, #7 - b.eq L(loop_misaligned) + checking to make sure that we don't access beyond the end of SRC2. */ + cbz tmp, L(src1_aligned) L(do_misaligned): - ldrb data1w, [src1], #1 - ldrb data2w, [src2], #1 - cmp data1w, #1 - ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */ + ldrb data1w, [src1], 1 + ldrb data2w, [src2], 1 + cmp data1w, 0 + ccmp data1w, data2w, 0, ne /* NZCV = 0b0000. */ b.ne L(done) - tst src1, #7 + tst src1, 7 b.ne L(do_misaligned) -L(loop_misaligned): - /* Test if we are within the last dword of the end of a 4K page. If - yes then jump back to the misaligned loop to copy a byte at a time. */ - and tmp1, src2, #0xff8 - eor tmp1, tmp1, #0xff8 - cbz tmp1, L(do_misaligned) - ldr data1, [src1], #8 - ldr data2, [src2], #8 - - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - eor diff, data1, data2 /* Non-zero if differences found. */ - bic has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ +L(src1_aligned): + neg shift, src2, lsl 3 + bic src2, src2, 7 + ldr data3, [src2], 8 +#ifdef __AARCH64EB__ + rev data3, data3 +#endif + lsr tmp, zeroones, shift + orr data3, data3, tmp + sub has_nul, data3, zeroones + orr tmp, data3, REP8_7f + bics has_nul, has_nul, tmp + b.ne L(tail) + + sub off1, src2, src1 + + .p2align 4 + +L(loop_unaligned): + ldr data3, [src1, off1] + ldr data2, [src1, off2] +#ifdef __AARCH64EB__ + rev data3, data3 +#endif + sub has_nul, data3, zeroones + orr tmp, data3, REP8_7f + ldr data1, [src1], 8 + bics has_nul, has_nul, tmp + ccmp data1, data2, 0, eq + b.eq L(loop_unaligned) + + lsl tmp, has_nul, shift +#ifdef __AARCH64EB__ + rev tmp, tmp +#endif + eor diff, data1, data2 + orr syndrome, diff, tmp + cbnz syndrome, L(end) +L(tail): + ldr data1, [src1] + neg shift, shift + lsr data2, data3, shift + lsr has_nul, has_nul, shift +#ifdef __AARCH64EB__ + rev data2, data2 + rev has_nul, has_nul +#endif + eor diff, data1, data2 orr syndrome, diff, has_nul - cbz syndrome, L(loop_misaligned) b L(end) L(done): diff --git a/contrib/arm-optimized-routines/string/aarch64/strcpy-mte.S b/contrib/arm-optimized-routines/string/aarch64/strcpy-mte.S deleted file mode 100644 index 88c222d61e53..000000000000 --- a/contrib/arm-optimized-routines/string/aarch64/strcpy-mte.S +++ /dev/null @@ -1,161 +0,0 @@ -/* - * strcpy/stpcpy - copy a string returning pointer to start/end. - * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -/* Assumptions: - * - * ARMv8-a, AArch64, Advanced SIMD. - * MTE compatible. - */ - -#include "../asmdefs.h" - -#define dstin x0 -#define srcin x1 -#define result x0 - -#define src x2 -#define dst x3 -#define len x4 -#define synd x4 -#define tmp x5 -#define wtmp w5 -#define shift x5 -#define data1 x6 -#define dataw1 w6 -#define data2 x7 -#define dataw2 w7 - -#define dataq q0 -#define vdata v0 -#define vhas_nul v1 -#define vrepmask v2 -#define vend v3 -#define dend d3 -#define dataq2 q1 - -#ifdef BUILD_STPCPY -# define STRCPY __stpcpy_aarch64_mte -# define IFSTPCPY(X,...) X,__VA_ARGS__ -#else -# define STRCPY __strcpy_aarch64_mte -# define IFSTPCPY(X,...) -#endif - -/* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ - -ENTRY (STRCPY) - PTR_ARG (0) - PTR_ARG (1) - bic src, srcin, 15 - mov wtmp, 0xf00f - ld1 {vdata.16b}, [src] - dup vrepmask.8h, wtmp - cmeq vhas_nul.16b, vdata.16b, 0 - lsl shift, srcin, 2 - and vhas_nul.16b, vhas_nul.16b, vrepmask.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b - fmov synd, dend - lsr synd, synd, shift - cbnz synd, L(tail) - - ldr dataq, [src, 16]! - cmeq vhas_nul.16b, vdata.16b, 0 - and vhas_nul.16b, vhas_nul.16b, vrepmask.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b - fmov synd, dend - cbz synd, L(start_loop) - -#ifndef __AARCH64EB__ - rbit synd, synd -#endif - sub tmp, src, srcin - clz len, synd - add len, tmp, len, lsr 2 - tbz len, 4, L(less16) - sub tmp, len, 15 - ldr dataq, [srcin] - ldr dataq2, [srcin, tmp] - str dataq, [dstin] - str dataq2, [dstin, tmp] - IFSTPCPY (add result, dstin, len) - ret - - .p2align 4,,8 -L(tail): - rbit synd, synd - clz len, synd - lsr len, len, 2 - - .p2align 4 -L(less16): - tbz len, 3, L(less8) - sub tmp, len, 7 - ldr data1, [srcin] - ldr data2, [srcin, tmp] - str data1, [dstin] - str data2, [dstin, tmp] - IFSTPCPY (add result, dstin, len) - ret - - .p2align 4 -L(less8): - subs tmp, len, 3 - b.lo L(less4) - ldr dataw1, [srcin] - ldr dataw2, [srcin, tmp] - str dataw1, [dstin] - str dataw2, [dstin, tmp] - IFSTPCPY (add result, dstin, len) - ret - -L(less4): - cbz len, L(zerobyte) - ldrh dataw1, [srcin] - strh dataw1, [dstin] -L(zerobyte): - strb wzr, [dstin, len] - IFSTPCPY (add result, dstin, len) - ret - - .p2align 4 -L(start_loop): - sub len, src, srcin - ldr dataq2, [srcin] - add dst, dstin, len - str dataq2, [dstin] - - .p2align 5 -L(loop): - str dataq, [dst], 16 - ldr dataq, [src, 16]! - cmeq vhas_nul.16b, vdata.16b, 0 - umaxp vend.16b, vhas_nul.16b, vhas_nul.16b - fmov synd, dend - cbz synd, L(loop) - - and vhas_nul.16b, vhas_nul.16b, vrepmask.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ - fmov synd, dend -#ifndef __AARCH64EB__ - rbit synd, synd -#endif - clz len, synd - lsr len, len, 2 - sub tmp, len, 15 - ldr dataq, [src, tmp] - str dataq, [dst, tmp] - IFSTPCPY (add result, dst, len) - ret - -END (STRCPY) diff --git a/contrib/arm-optimized-routines/string/aarch64/strcpy-sve.S b/contrib/arm-optimized-routines/string/aarch64/strcpy-sve.S index f515462e09ae..00e72dce4451 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strcpy-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strcpy-sve.S @@ -1,11 +1,11 @@ /* * strcpy/stpcpy - copy a string returning pointer to start/end. * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strcpy.S b/contrib/arm-optimized-routines/string/aarch64/strcpy.S index 6e9ed424b693..97ae37ea4229 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strcpy.S +++ b/contrib/arm-optimized-routines/string/aarch64/strcpy.S @@ -1,311 +1,156 @@ /* * strcpy/stpcpy - copy a string returning pointer to start/end. * - * Copyright (c) 2013-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: * - * ARMv8-a, AArch64, unaligned accesses, min page size 4k. + * ARMv8-a, AArch64, Advanced SIMD. + * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" -/* To build as stpcpy, define BUILD_STPCPY before compiling this file. - - To test the page crossing code path more thoroughly, compile with - -DSTRCPY_TEST_PAGE_CROSS - this will force all copies through the slower - entry path. This option is not intended for production use. */ - -/* Arguments and results. */ #define dstin x0 #define srcin x1 +#define result x0 -/* Locals and temporaries. */ #define src x2 #define dst x3 -#define data1 x4 -#define data1w w4 -#define data2 x5 -#define data2w w5 -#define has_nul1 x6 -#define has_nul2 x7 -#define tmp1 x8 -#define tmp2 x9 -#define tmp3 x10 -#define tmp4 x11 -#define zeroones x12 -#define data1a x13 -#define data2a x14 -#define pos x15 -#define len x16 -#define to_align x17 +#define len x4 +#define synd x4 +#define tmp x5 +#define shift x5 +#define data1 x6 +#define dataw1 w6 +#define data2 x7 +#define dataw2 w7 + +#define dataq q0 +#define vdata v0 +#define vhas_nul v1 +#define vend v2 +#define dend d2 +#define dataq2 q1 #ifdef BUILD_STPCPY -#define STRCPY __stpcpy_aarch64 -#else -#define STRCPY __strcpy_aarch64 -#endif - - /* NUL detection works on the principle that (X - 1) & (~X) & 0x80 - (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and - can be done in parallel across the entire word. */ - -#define REP8_01 0x0101010101010101 -#define REP8_7f 0x7f7f7f7f7f7f7f7f -#define REP8_80 0x8080808080808080 - - /* AArch64 systems have a minimum page size of 4k. We can do a quick - page size check for crossing this boundary on entry and if we - do not, then we can short-circuit much of the entry code. We - expect early page-crossing strings to be rare (probability of - 16/MIN_PAGE_SIZE ~= 0.4%), so the branch should be quite - predictable, even with random strings. - - We don't bother checking for larger page sizes, the cost of setting - up the correct page size is just not worth the extra gain from - a small reduction in the cases taking the slow path. Note that - we only care about whether the first fetch, which may be - misaligned, crosses a page boundary - after that we move to aligned - fetches for the remainder of the string. */ - -#ifdef STRCPY_TEST_PAGE_CROSS - /* Make everything that isn't Qword aligned look like a page cross. */ -#define MIN_PAGE_P2 4 +# define STRCPY __stpcpy_aarch64 +# define IFSTPCPY(X,...) X,__VA_ARGS__ #else -#define MIN_PAGE_P2 12 +# define STRCPY __strcpy_aarch64 +# define IFSTPCPY(X,...) #endif -#define MIN_PAGE_SIZE (1 << MIN_PAGE_P2) +/* + Core algorithm: + For each 16-byte chunk we calculate a 64-bit nibble mask value with four bits + per byte. We take 4 bits of every comparison byte with shift right and narrow + by 4 instruction. Since the bits in the nibble mask reflect the order in + which things occur in the original string, counting leading zeros identifies + exactly which byte matched. */ ENTRY (STRCPY) PTR_ARG (0) PTR_ARG (1) - /* For moderately short strings, the fastest way to do the copy is to - calculate the length of the string in the same way as strlen, then - essentially do a memcpy of the result. This avoids the need for - multiple byte copies and further means that by the time we - reach the bulk copy loop we know we can always use DWord - accesses. We expect __strcpy_aarch64 to rarely be called repeatedly - with the same source string, so branch prediction is likely to - always be difficult - we mitigate against this by preferring - conditional select operations over branches whenever this is - feasible. */ - and tmp2, srcin, #(MIN_PAGE_SIZE - 1) - mov zeroones, #REP8_01 - and to_align, srcin, #15 - cmp tmp2, #(MIN_PAGE_SIZE - 16) - neg tmp1, to_align - /* The first fetch will straddle a (possible) page boundary iff - srcin + 15 causes bit[MIN_PAGE_P2] to change value. A 16-byte - aligned string will never fail the page align check, so will - always take the fast path. */ - b.gt L(page_cross) - -L(page_cross_ok): - ldp data1, data2, [srcin] -#ifdef __AARCH64EB__ - /* Because we expect the end to be found within 16 characters - (profiling shows this is the most common case), it's worth - swapping the bytes now to save having to recalculate the - termination syndrome later. We preserve data1 and data2 - so that we can re-use the values later on. */ - rev tmp2, data1 - sub tmp1, tmp2, zeroones - orr tmp2, tmp2, #REP8_7f - bics has_nul1, tmp1, tmp2 - b.ne L(fp_le8) - rev tmp4, data2 - sub tmp3, tmp4, zeroones - orr tmp4, tmp4, #REP8_7f -#else - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - bics has_nul1, tmp1, tmp2 - b.ne L(fp_le8) - sub tmp3, data2, zeroones - orr tmp4, data2, #REP8_7f + bic src, srcin, 15 + ld1 {vdata.16b}, [src] + cmeq vhas_nul.16b, vdata.16b, 0 + lsl shift, srcin, 2 + shrn vend.8b, vhas_nul.8h, 4 + fmov synd, dend + lsr synd, synd, shift + cbnz synd, L(tail) + + ldr dataq, [src, 16]! + cmeq vhas_nul.16b, vdata.16b, 0 + shrn vend.8b, vhas_nul.8h, 4 + fmov synd, dend + cbz synd, L(start_loop) + +#ifndef __AARCH64EB__ + rbit synd, synd #endif - bics has_nul2, tmp3, tmp4 - b.eq L(bulk_entry) + sub tmp, src, srcin + clz len, synd + add len, tmp, len, lsr 2 + tbz len, 4, L(less16) + sub tmp, len, 15 + ldr dataq, [srcin] + ldr dataq2, [srcin, tmp] + str dataq, [dstin] + str dataq2, [dstin, tmp] + IFSTPCPY (add result, dstin, len) + ret - /* The string is short (<=16 bytes). We don't know exactly how - short though, yet. Work out the exact length so that we can - quickly select the optimal copy strategy. */ -L(fp_gt8): - rev has_nul2, has_nul2 - clz pos, has_nul2 - mov tmp2, #56 - add dst, dstin, pos, lsr #3 /* Bits to bytes. */ - sub pos, tmp2, pos -#ifdef __AARCH64EB__ - lsr data2, data2, pos -#else - lsl data2, data2, pos -#endif - str data2, [dst, #1] +L(tail): + rbit synd, synd + clz len, synd + lsr len, len, 2 +L(less16): + tbz len, 3, L(less8) + sub tmp, len, 7 + ldr data1, [srcin] + ldr data2, [srcin, tmp] str data1, [dstin] -#ifdef BUILD_STPCPY - add dstin, dst, #8 -#endif + str data2, [dstin, tmp] + IFSTPCPY (add result, dstin, len) ret -L(fp_le8): - rev has_nul1, has_nul1 - clz pos, has_nul1 - add dst, dstin, pos, lsr #3 /* Bits to bytes. */ - subs tmp2, pos, #24 /* Pos in bits. */ - b.lt L(fp_lt4) -#ifdef __AARCH64EB__ - mov tmp2, #56 - sub pos, tmp2, pos - lsr data2, data1, pos - lsr data1, data1, #32 -#else - lsr data2, data1, tmp2 -#endif - /* 4->7 bytes to copy. */ - str data2w, [dst, #-3] - str data1w, [dstin] -#ifdef BUILD_STPCPY - mov dstin, dst -#endif + .p2align 4 +L(less8): + subs tmp, len, 3 + b.lo L(less4) + ldr dataw1, [srcin] + ldr dataw2, [srcin, tmp] + str dataw1, [dstin] + str dataw2, [dstin, tmp] + IFSTPCPY (add result, dstin, len) ret -L(fp_lt4): - cbz pos, L(fp_lt2) - /* 2->3 bytes to copy. */ -#ifdef __AARCH64EB__ - lsr data1, data1, #48 -#endif - strh data1w, [dstin] - /* Fall-through, one byte (max) to go. */ -L(fp_lt2): - /* Null-terminated string. Last character must be zero! */ - strb wzr, [dst] -#ifdef BUILD_STPCPY - mov dstin, dst -#endif - ret - - .p2align 6 - /* Aligning here ensures that the entry code and main loop all lies - within one 64-byte cache line. */ -L(bulk_entry): - sub to_align, to_align, #16 - stp data1, data2, [dstin] - sub src, srcin, to_align - sub dst, dstin, to_align - b L(entry_no_page_cross) - - /* The inner loop deals with two Dwords at a time. This has a - slightly higher start-up cost, but we should win quite quickly, - especially on cores with a high number of issue slots per - cycle, as we get much better parallelism out of the operations. */ -L(main_loop): - stp data1, data2, [dst], #16 -L(entry_no_page_cross): - ldp data1, data2, [src], #16 - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - sub tmp3, data2, zeroones - orr tmp4, data2, #REP8_7f - bic has_nul1, tmp1, tmp2 - bics has_nul2, tmp3, tmp4 - ccmp has_nul1, #0, #0, eq /* NZCV = 0000 */ - b.eq L(main_loop) - /* Since we know we are copying at least 16 bytes, the fastest way - to deal with the tail is to determine the location of the - trailing NUL, then (re)copy the 16 bytes leading up to that. */ - cmp has_nul1, #0 -#ifdef __AARCH64EB__ - /* For big-endian, carry propagation (if the final byte in the - string is 0x01) means we cannot use has_nul directly. The - easiest way to get the correct byte is to byte-swap the data - and calculate the syndrome a second time. */ - csel data1, data1, data2, ne - rev data1, data1 - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - bic has_nul1, tmp1, tmp2 -#else - csel has_nul1, has_nul1, has_nul2, ne -#endif - rev has_nul1, has_nul1 - clz pos, has_nul1 - add tmp1, pos, #72 - add pos, pos, #8 - csel pos, pos, tmp1, ne - add src, src, pos, lsr #3 - add dst, dst, pos, lsr #3 - ldp data1, data2, [src, #-32] - stp data1, data2, [dst, #-16] -#ifdef BUILD_STPCPY - sub dstin, dst, #1 -#endif +L(less4): + cbz len, L(zerobyte) + ldrh dataw1, [srcin] + strh dataw1, [dstin] +L(zerobyte): + strb wzr, [dstin, len] + IFSTPCPY (add result, dstin, len) ret -L(page_cross): - bic src, srcin, #15 - /* Start by loading two words at [srcin & ~15], then forcing the - bytes that precede srcin to 0xff. This means they never look - like termination bytes. */ - ldp data1, data2, [src] - lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */ - tst to_align, #7 - csetm tmp2, ne -#ifdef __AARCH64EB__ - lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */ -#else - lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */ + .p2align 4 +L(start_loop): + sub tmp, srcin, dstin + ldr dataq2, [srcin] + sub dst, src, tmp + str dataq2, [dstin] +L(loop): + str dataq, [dst], 32 + ldr dataq, [src, 16] + cmeq vhas_nul.16b, vdata.16b, 0 + umaxp vend.16b, vhas_nul.16b, vhas_nul.16b + fmov synd, dend + cbnz synd, L(loopend) + str dataq, [dst, -16] + ldr dataq, [src, 32]! + cmeq vhas_nul.16b, vdata.16b, 0 + umaxp vend.16b, vhas_nul.16b, vhas_nul.16b + fmov synd, dend + cbz synd, L(loop) + add dst, dst, 16 +L(loopend): + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ + fmov synd, dend + sub dst, dst, 31 +#ifndef __AARCH64EB__ + rbit synd, synd #endif - orr data1, data1, tmp2 - orr data2a, data2, tmp2 - cmp to_align, #8 - csinv data1, data1, xzr, lt - csel data2, data2, data2a, lt - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - sub tmp3, data2, zeroones - orr tmp4, data2, #REP8_7f - bic has_nul1, tmp1, tmp2 - bics has_nul2, tmp3, tmp4 - ccmp has_nul1, #0, #0, eq /* NZCV = 0000 */ - b.eq L(page_cross_ok) - /* We now need to make data1 and data2 look like they've been - loaded directly from srcin. Do a rotate on the 128-bit value. */ - lsl tmp1, to_align, #3 /* Bytes->bits. */ - neg tmp2, to_align, lsl #3 -#ifdef __AARCH64EB__ - lsl data1a, data1, tmp1 - lsr tmp4, data2, tmp2 - lsl data2, data2, tmp1 - orr tmp4, tmp4, data1a - cmp to_align, #8 - csel data1, tmp4, data2, lt - rev tmp2, data1 - rev tmp4, data2 - sub tmp1, tmp2, zeroones - orr tmp2, tmp2, #REP8_7f - sub tmp3, tmp4, zeroones - orr tmp4, tmp4, #REP8_7f -#else - lsr data1a, data1, tmp1 - lsl tmp4, data2, tmp2 - lsr data2, data2, tmp1 - orr tmp4, tmp4, data1a - cmp to_align, #8 - csel data1, tmp4, data2, lt - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - sub tmp3, data2, zeroones - orr tmp4, data2, #REP8_7f -#endif - bic has_nul1, tmp1, tmp2 - cbnz has_nul1, L(fp_le8) - bic has_nul2, tmp3, tmp4 - b L(fp_gt8) + clz len, synd + lsr len, len, 2 + add dst, dst, len + ldr dataq, [dst, tmp] + str dataq, [dst] + IFSTPCPY (add result, dst, 15) + ret END (STRCPY) - diff --git a/contrib/arm-optimized-routines/string/aarch64/strlen-mte.S b/contrib/arm-optimized-routines/string/aarch64/strlen-mte.S index 7cf41d5c1eac..77235797f7c5 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strlen-mte.S +++ b/contrib/arm-optimized-routines/string/aarch64/strlen-mte.S @@ -1,8 +1,8 @@ /* * strlen - calculate the length of a string. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define result x0 @@ -19,35 +19,26 @@ #define src x1 #define synd x2 #define tmp x3 -#define wtmp w3 #define shift x4 #define data q0 #define vdata v0 #define vhas_nul v1 -#define vrepmask v2 -#define vend v3 -#define dend d3 +#define vend v2 +#define dend d2 /* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ + Process the string in 16-byte aligned chunks. Compute a 64-bit mask with + four bits per byte using the shrn instruction. A count trailing zeros then + identifies the first zero byte. */ ENTRY (__strlen_aarch64_mte) PTR_ARG (0) bic src, srcin, 15 - mov wtmp, 0xf00f ld1 {vdata.16b}, [src] - dup vrepmask.8h, wtmp cmeq vhas_nul.16b, vdata.16b, 0 lsl shift, srcin, 2 - and vhas_nul.16b, vhas_nul.16b, vrepmask.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ fmov synd, dend lsr synd, synd, shift cbz synd, L(loop) @@ -59,19 +50,25 @@ ENTRY (__strlen_aarch64_mte) .p2align 5 L(loop): - ldr data, [src, 16]! + ldr data, [src, 16] + cmeq vhas_nul.16b, vdata.16b, 0 + umaxp vend.16b, vhas_nul.16b, vhas_nul.16b + fmov synd, dend + cbnz synd, L(loop_end) + ldr data, [src, 32]! cmeq vhas_nul.16b, vdata.16b, 0 umaxp vend.16b, vhas_nul.16b, vhas_nul.16b fmov synd, dend cbz synd, L(loop) - - and vhas_nul.16b, vhas_nul.16b, vrepmask.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */ + sub src, src, 16 +L(loop_end): + shrn vend.8b, vhas_nul.8h, 4 /* 128->64 */ sub result, src, srcin fmov synd, dend #ifndef __AARCH64EB__ rbit synd, synd #endif + add result, result, 16 clz tmp, synd add result, result, tmp, lsr 2 ret diff --git a/contrib/arm-optimized-routines/string/aarch64/strlen-sve.S b/contrib/arm-optimized-routines/string/aarch64/strlen-sve.S index 2392493f1a3c..12ebbdba5c93 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strlen-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strlen-sve.S @@ -1,11 +1,11 @@ /* * __strlen_aarch64_sve - compute the length of a string * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strlen.S b/contrib/arm-optimized-routines/string/aarch64/strlen.S index a1b164a49238..6f6f08f636b2 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strlen.S +++ b/contrib/arm-optimized-routines/string/aarch64/strlen.S @@ -1,8 +1,8 @@ /* * strlen - calculate the length of a string. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * Not MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define len x0 @@ -36,6 +36,7 @@ #define tmp x2 #define tmpw w2 #define synd x3 +#define syndw w3 #define shift x4 /* For the first 32 bytes, NUL detection works on the principle that @@ -110,7 +111,6 @@ ENTRY (__strlen_aarch64) add len, len, tmp1, lsr 3 ret - .p2align 3 /* Look for a NUL byte at offset 16..31 in the string. */ L(bytes16_31): ldp data1, data2, [srcin, 16] @@ -138,6 +138,7 @@ L(bytes16_31): add len, len, tmp1, lsr 3 ret + nop L(loop_entry): bic src, srcin, 31 @@ -153,18 +154,12 @@ L(loop): /* Low 32 bits of synd are non-zero if a NUL was found in datav1. */ cmeq maskv.16b, datav1.16b, 0 sub len, src, srcin - tst synd, 0xffffffff - b.ne 1f + cbnz syndw, 1f cmeq maskv.16b, datav2.16b, 0 add len, len, 16 1: /* Generate a bitmask and compute correct byte offset. */ -#ifdef __AARCH64EB__ - bic maskv.8h, 0xf0 -#else - bic maskv.8h, 0x0f, lsl 8 -#endif - umaxp maskv.16b, maskv.16b, maskv.16b + shrn maskv.8b, maskv.8h, 4 fmov synd, maskd #ifndef __AARCH64EB__ rbit synd, synd @@ -173,8 +168,6 @@ L(loop): add len, len, tmp, lsr 2 ret - .p2align 4 - L(page_cross): bic src, srcin, 31 mov tmpw, 0x0c03 diff --git a/contrib/arm-optimized-routines/string/aarch64/strncmp-mte.S b/contrib/arm-optimized-routines/string/aarch64/strncmp-mte.S deleted file mode 100644 index c9d6fc8a158b..000000000000 --- a/contrib/arm-optimized-routines/string/aarch64/strncmp-mte.S +++ /dev/null @@ -1,307 +0,0 @@ -/* - * strncmp - compare two strings - * - * Copyright (c) 2013-2021, Arm Limited. - * SPDX-License-Identifier: MIT - */ - -/* Assumptions: - * - * ARMv8-a, AArch64 - */ - -#include "../asmdefs.h" - -#define REP8_01 0x0101010101010101 -#define REP8_7f 0x7f7f7f7f7f7f7f7f - -/* Parameters and result. */ -#define src1 x0 -#define src2 x1 -#define limit x2 -#define result x0 - -/* Internal variables. */ -#define data1 x3 -#define data1w w3 -#define data2 x4 -#define data2w w4 -#define has_nul x5 -#define diff x6 -#define syndrome x7 -#define tmp1 x8 -#define tmp2 x9 -#define tmp3 x10 -#define zeroones x11 -#define pos x12 -#define mask x13 -#define endloop x14 -#define count mask -#define offset pos -#define neg_offset x15 - -/* Define endian dependent shift operations. - On big-endian early bytes are at MSB and on little-endian LSB. - LS_FW means shifting towards early bytes. - LS_BK means shifting towards later bytes. - */ -#ifdef __AARCH64EB__ -#define LS_FW lsl -#define LS_BK lsr -#else -#define LS_FW lsr -#define LS_BK lsl -#endif - -ENTRY (__strncmp_aarch64_mte) - PTR_ARG (0) - PTR_ARG (1) - SIZE_ARG (2) - cbz limit, L(ret0) - eor tmp1, src1, src2 - mov zeroones, #REP8_01 - tst tmp1, #7 - and count, src1, #7 - b.ne L(misaligned8) - cbnz count, L(mutual_align) - - /* NUL detection works on the principle that (X - 1) & (~X) & 0x80 - (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and - can be done in parallel across the entire word. */ - .p2align 4 -L(loop_aligned): - ldr data1, [src1], #8 - ldr data2, [src2], #8 -L(start_realigned): - subs limit, limit, #8 - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - eor diff, data1, data2 /* Non-zero if differences found. */ - csinv endloop, diff, xzr, hi /* Last Dword or differences. */ - bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ - ccmp endloop, #0, #0, eq - b.eq L(loop_aligned) - /* End of main loop */ - -L(full_check): -#ifndef __AARCH64EB__ - orr syndrome, diff, has_nul - add limit, limit, 8 /* Rewind limit to before last subs. */ -L(syndrome_check): - /* Limit was reached. Check if the NUL byte or the difference - is before the limit. */ - rev syndrome, syndrome - rev data1, data1 - clz pos, syndrome - rev data2, data2 - lsl data1, data1, pos - cmp limit, pos, lsr #3 - lsl data2, data2, pos - /* But we need to zero-extend (char is unsigned) the value and then - perform a signed 32-bit subtraction. */ - lsr data1, data1, #56 - sub result, data1, data2, lsr #56 - csel result, result, xzr, hi - ret -#else - /* Not reached the limit, must have found the end or a diff. */ - tbz limit, #63, L(not_limit) - add tmp1, limit, 8 - cbz limit, L(not_limit) - - lsl limit, tmp1, #3 /* Bits -> bytes. */ - mov mask, #~0 - lsr mask, mask, limit - bic data1, data1, mask - bic data2, data2, mask - - /* Make sure that the NUL byte is marked in the syndrome. */ - orr has_nul, has_nul, mask - -L(not_limit): - /* For big-endian we cannot use the trick with the syndrome value - as carry-propagation can corrupt the upper bits if the trailing - bytes in the string contain 0x01. */ - /* However, if there is no NUL byte in the dword, we can generate - the result directly. We can't just subtract the bytes as the - MSB might be significant. */ - cbnz has_nul, 1f - cmp data1, data2 - cset result, ne - cneg result, result, lo - ret -1: - /* Re-compute the NUL-byte detection, using a byte-reversed value. */ - rev tmp3, data1 - sub tmp1, tmp3, zeroones - orr tmp2, tmp3, #REP8_7f - bic has_nul, tmp1, tmp2 - rev has_nul, has_nul - orr syndrome, diff, has_nul - clz pos, syndrome - /* The most-significant-non-zero bit of the syndrome marks either the - first bit that is different, or the top bit of the first zero byte. - Shifting left now will bring the critical information into the - top bits. */ -L(end_quick): - lsl data1, data1, pos - lsl data2, data2, pos - /* But we need to zero-extend (char is unsigned) the value and then - perform a signed 32-bit subtraction. */ - lsr data1, data1, #56 - sub result, data1, data2, lsr #56 - ret -#endif - -L(mutual_align): - /* Sources are mutually aligned, but are not currently at an - alignment boundary. Round down the addresses and then mask off - the bytes that precede the start point. - We also need to adjust the limit calculations, but without - overflowing if the limit is near ULONG_MAX. */ - bic src1, src1, #7 - bic src2, src2, #7 - ldr data1, [src1], #8 - neg tmp3, count, lsl #3 /* 64 - bits(bytes beyond align). */ - ldr data2, [src2], #8 - mov tmp2, #~0 - LS_FW tmp2, tmp2, tmp3 /* Shift (count & 63). */ - /* Adjust the limit and ensure it doesn't overflow. */ - adds limit, limit, count - csinv limit, limit, xzr, lo - orr data1, data1, tmp2 - orr data2, data2, tmp2 - b L(start_realigned) - - .p2align 4 - /* Don't bother with dwords for up to 16 bytes. */ -L(misaligned8): - cmp limit, #16 - b.hs L(try_misaligned_words) - -L(byte_loop): - /* Perhaps we can do better than this. */ - ldrb data1w, [src1], #1 - ldrb data2w, [src2], #1 - subs limit, limit, #1 - ccmp data1w, #1, #0, hi /* NZCV = 0b0000. */ - ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */ - b.eq L(byte_loop) -L(done): - sub result, data1, data2 - ret - /* Align the SRC1 to a dword by doing a bytewise compare and then do - the dword loop. */ -L(try_misaligned_words): - cbz count, L(src1_aligned) - - neg count, count - and count, count, #7 - sub limit, limit, count - -L(page_end_loop): - ldrb data1w, [src1], #1 - ldrb data2w, [src2], #1 - cmp data1w, #1 - ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */ - b.ne L(done) - subs count, count, #1 - b.hi L(page_end_loop) - - /* The following diagram explains the comparison of misaligned strings. - The bytes are shown in natural order. For little-endian, it is - reversed in the registers. The "x" bytes are before the string. - The "|" separates data that is loaded at one time. - src1 | a a a a a a a a | b b b c c c c c | . . . - src2 | x x x x x a a a a a a a a b b b | c c c c c . . . - - After shifting in each step, the data looks like this: - STEP_A STEP_B STEP_C - data1 a a a a a a a a b b b c c c c c b b b c c c c c - data2 a a a a a a a a b b b 0 0 0 0 0 0 0 0 c c c c c - - The bytes with "0" are eliminated from the syndrome via mask. - - Align SRC2 down to 16 bytes. This way we can read 16 bytes at a - time from SRC2. The comparison happens in 3 steps. After each step - the loop can exit, or read from SRC1 or SRC2. */ -L(src1_aligned): - /* Calculate offset from 8 byte alignment to string start in bits. No - need to mask offset since shifts are ignoring upper bits. */ - lsl offset, src2, #3 - bic src2, src2, #0xf - mov mask, -1 - neg neg_offset, offset - ldr data1, [src1], #8 - ldp tmp1, tmp2, [src2], #16 - LS_BK mask, mask, neg_offset - and neg_offset, neg_offset, #63 /* Need actual value for cmp later. */ - /* Skip the first compare if data in tmp1 is irrelevant. */ - tbnz offset, 6, L(misaligned_mid_loop) - -L(loop_misaligned): - /* STEP_A: Compare full 8 bytes when there is enough data from SRC2.*/ - LS_FW data2, tmp1, offset - LS_BK tmp1, tmp2, neg_offset - subs limit, limit, #8 - orr data2, data2, tmp1 /* 8 bytes from SRC2 combined from two regs.*/ - sub has_nul, data1, zeroones - eor diff, data1, data2 /* Non-zero if differences found. */ - orr tmp3, data1, #REP8_7f - csinv endloop, diff, xzr, hi /* If limit, set to all ones. */ - bic has_nul, has_nul, tmp3 /* Non-zero if NUL byte found in SRC1. */ - orr tmp3, endloop, has_nul - cbnz tmp3, L(full_check) - - ldr data1, [src1], #8 -L(misaligned_mid_loop): - /* STEP_B: Compare first part of data1 to second part of tmp2. */ - LS_FW data2, tmp2, offset -#ifdef __AARCH64EB__ - /* For big-endian we do a byte reverse to avoid carry-propagation - problem described above. This way we can reuse the has_nul in the - next step and also use syndrome value trick at the end. */ - rev tmp3, data1 - #define data1_fixed tmp3 -#else - #define data1_fixed data1 -#endif - sub has_nul, data1_fixed, zeroones - orr tmp3, data1_fixed, #REP8_7f - eor diff, data2, data1 /* Non-zero if differences found. */ - bic has_nul, has_nul, tmp3 /* Non-zero if NUL terminator. */ -#ifdef __AARCH64EB__ - rev has_nul, has_nul -#endif - cmp limit, neg_offset, lsr #3 - orr syndrome, diff, has_nul - bic syndrome, syndrome, mask /* Ignore later bytes. */ - csinv tmp3, syndrome, xzr, hi /* If limit, set to all ones. */ - cbnz tmp3, L(syndrome_check) - - /* STEP_C: Compare second part of data1 to first part of tmp1. */ - ldp tmp1, tmp2, [src2], #16 - cmp limit, #8 - LS_BK data2, tmp1, neg_offset - eor diff, data2, data1 /* Non-zero if differences found. */ - orr syndrome, diff, has_nul - and syndrome, syndrome, mask /* Ignore earlier bytes. */ - csinv tmp3, syndrome, xzr, hi /* If limit, set to all ones. */ - cbnz tmp3, L(syndrome_check) - - ldr data1, [src1], #8 - sub limit, limit, #8 - b L(loop_misaligned) - -#ifdef __AARCH64EB__ -L(syndrome_check): - clz pos, syndrome - cmp pos, limit, lsl #3 - b.lo L(end_quick) -#endif - -L(ret0): - mov result, #0 - ret -END(__strncmp_aarch64_mte) - diff --git a/contrib/arm-optimized-routines/string/aarch64/strncmp-sve.S b/contrib/arm-optimized-routines/string/aarch64/strncmp-sve.S index 234190e245b0..6a9e9f7b6437 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strncmp-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strncmp-sve.S @@ -1,11 +1,11 @@ /* * strncmp - compare two strings with limit * - * Copyright (c) 2018-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2018-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strncmp.S b/contrib/arm-optimized-routines/string/aarch64/strncmp.S index 738b6539cab6..128a10c52bb1 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strncmp.S +++ b/contrib/arm-optimized-routines/string/aarch64/strncmp.S @@ -1,20 +1,20 @@ /* * strncmp - compare two strings * - * Copyright (c) 2013-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2013-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: * - * ARMv8-a, AArch64 + * ARMv8-a, AArch64. + * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define REP8_01 0x0101010101010101 #define REP8_7f 0x7f7f7f7f7f7f7f7f -#define REP8_80 0x8080808080808080 /* Parameters and result. */ #define src1 x0 @@ -35,10 +35,24 @@ #define tmp3 x10 #define zeroones x11 #define pos x12 -#define limit_wd x13 -#define mask x14 -#define endloop x15 +#define mask x13 +#define endloop x14 #define count mask +#define offset pos +#define neg_offset x15 + +/* Define endian dependent shift operations. + On big-endian early bytes are at MSB and on little-endian LSB. + LS_FW means shifting towards early bytes. + LS_BK means shifting towards later bytes. + */ +#ifdef __AARCH64EB__ +#define LS_FW lsl +#define LS_BK lsr +#else +#define LS_FW lsr +#define LS_BK lsl +#endif ENTRY (__strncmp_aarch64) PTR_ARG (0) @@ -51,9 +65,6 @@ ENTRY (__strncmp_aarch64) and count, src1, #7 b.ne L(misaligned8) cbnz count, L(mutual_align) - /* Calculate the number of full and partial words -1. */ - sub limit_wd, limit, #1 /* limit != 0, so no underflow. */ - lsr limit_wd, limit_wd, #3 /* Convert to Dwords. */ /* NUL detection works on the principle that (X - 1) & (~X) & 0x80 (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and @@ -63,56 +74,52 @@ L(loop_aligned): ldr data1, [src1], #8 ldr data2, [src2], #8 L(start_realigned): - subs limit_wd, limit_wd, #1 + subs limit, limit, #8 sub tmp1, data1, zeroones orr tmp2, data1, #REP8_7f eor diff, data1, data2 /* Non-zero if differences found. */ - csinv endloop, diff, xzr, pl /* Last Dword or differences. */ + csinv endloop, diff, xzr, hi /* Last Dword or differences. */ bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ ccmp endloop, #0, #0, eq b.eq L(loop_aligned) /* End of main loop */ - /* Not reached the limit, must have found the end or a diff. */ - tbz limit_wd, #63, L(not_limit) - - /* Limit % 8 == 0 => all bytes significant. */ - ands limit, limit, #7 - b.eq L(not_limit) - - lsl limit, limit, #3 /* Bits -> bytes. */ - mov mask, #~0 -#ifdef __AARCH64EB__ - lsr mask, mask, limit -#else - lsl mask, mask, limit -#endif - bic data1, data1, mask - bic data2, data2, mask - - /* Make sure that the NUL byte is marked in the syndrome. */ - orr has_nul, has_nul, mask - -L(not_limit): +L(full_check): +#ifndef __AARCH64EB__ orr syndrome, diff, has_nul - -#ifndef __AARCH64EB__ + add limit, limit, 8 /* Rewind limit to before last subs. */ +L(syndrome_check): + /* Limit was reached. Check if the NUL byte or the difference + is before the limit. */ rev syndrome, syndrome rev data1, data1 - /* The MS-non-zero bit of the syndrome marks either the first bit - that is different, or the top bit of the first zero byte. - Shifting left now will bring the critical information into the - top bits. */ clz pos, syndrome rev data2, data2 lsl data1, data1, pos + cmp limit, pos, lsr #3 lsl data2, data2, pos /* But we need to zero-extend (char is unsigned) the value and then perform a signed 32-bit subtraction. */ lsr data1, data1, #56 sub result, data1, data2, lsr #56 + csel result, result, xzr, hi ret #else + /* Not reached the limit, must have found the end or a diff. */ + tbz limit, #63, L(not_limit) + add tmp1, limit, 8 + cbz limit, L(not_limit) + + lsl limit, tmp1, #3 /* Bits -> bytes. */ + mov mask, #~0 + lsr mask, mask, limit + bic data1, data1, mask + bic data2, data2, mask + + /* Make sure that the NUL byte is marked in the syndrome. */ + orr has_nul, has_nul, mask + +L(not_limit): /* For big-endian we cannot use the trick with the syndrome value as carry-propagation can corrupt the upper bits if the trailing bytes in the string contain 0x01. */ @@ -133,10 +140,11 @@ L(not_limit): rev has_nul, has_nul orr syndrome, diff, has_nul clz pos, syndrome - /* The MS-non-zero bit of the syndrome marks either the first bit - that is different, or the top bit of the first zero byte. + /* The most-significant-non-zero bit of the syndrome marks either the + first bit that is different, or the top bit of the first zero byte. Shifting left now will bring the critical information into the top bits. */ +L(end_quick): lsl data1, data1, pos lsl data2, data2, pos /* But we need to zero-extend (char is unsigned) the value and then @@ -158,22 +166,12 @@ L(mutual_align): neg tmp3, count, lsl #3 /* 64 - bits(bytes beyond align). */ ldr data2, [src2], #8 mov tmp2, #~0 - sub limit_wd, limit, #1 /* limit != 0, so no underflow. */ -#ifdef __AARCH64EB__ - /* Big-endian. Early bytes are at MSB. */ - lsl tmp2, tmp2, tmp3 /* Shift (count & 63). */ -#else - /* Little-endian. Early bytes are at LSB. */ - lsr tmp2, tmp2, tmp3 /* Shift (count & 63). */ -#endif - and tmp3, limit_wd, #7 - lsr limit_wd, limit_wd, #3 - /* Adjust the limit. Only low 3 bits used, so overflow irrelevant. */ - add limit, limit, count - add tmp3, tmp3, count + LS_FW tmp2, tmp2, tmp3 /* Shift (count & 63). */ + /* Adjust the limit and ensure it doesn't overflow. */ + adds limit, limit, count + csinv limit, limit, xzr, lo orr data1, data1, tmp2 orr data2, data2, tmp2 - add limit_wd, limit_wd, tmp3, lsr #3 b L(start_realigned) .p2align 4 @@ -196,13 +194,11 @@ L(done): /* Align the SRC1 to a dword by doing a bytewise compare and then do the dword loop. */ L(try_misaligned_words): - lsr limit_wd, limit, #3 - cbz count, L(do_misaligned) + cbz count, L(src1_aligned) neg count, count and count, count, #7 sub limit, limit, count - lsr limit_wd, limit, #3 L(page_end_loop): ldrb data1w, [src1], #1 @@ -213,48 +209,100 @@ L(page_end_loop): subs count, count, #1 b.hi L(page_end_loop) -L(do_misaligned): - /* Prepare ourselves for the next page crossing. Unlike the aligned - loop, we fetch 1 less dword because we risk crossing bounds on - SRC2. */ - mov count, #8 - subs limit_wd, limit_wd, #1 - b.lo L(done_loop) -L(loop_misaligned): - and tmp2, src2, #0xff8 - eor tmp2, tmp2, #0xff8 - cbz tmp2, L(page_end_loop) + /* The following diagram explains the comparison of misaligned strings. + The bytes are shown in natural order. For little-endian, it is + reversed in the registers. The "x" bytes are before the string. + The "|" separates data that is loaded at one time. + src1 | a a a a a a a a | b b b c c c c c | . . . + src2 | x x x x x a a a a a a a a b b b | c c c c c . . . + + After shifting in each step, the data looks like this: + STEP_A STEP_B STEP_C + data1 a a a a a a a a b b b c c c c c b b b c c c c c + data2 a a a a a a a a b b b 0 0 0 0 0 0 0 0 c c c c c + The bytes with "0" are eliminated from the syndrome via mask. + + Align SRC2 down to 16 bytes. This way we can read 16 bytes at a + time from SRC2. The comparison happens in 3 steps. After each step + the loop can exit, or read from SRC1 or SRC2. */ +L(src1_aligned): + /* Calculate offset from 8 byte alignment to string start in bits. No + need to mask offset since shifts are ignoring upper bits. */ + lsl offset, src2, #3 + bic src2, src2, #0xf + mov mask, -1 + neg neg_offset, offset ldr data1, [src1], #8 - ldr data2, [src2], #8 - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f - eor diff, data1, data2 /* Non-zero if differences found. */ - bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ - ccmp diff, #0, #0, eq - b.ne L(not_limit) - subs limit_wd, limit_wd, #1 - b.pl L(loop_misaligned) + ldp tmp1, tmp2, [src2], #16 + LS_BK mask, mask, neg_offset + and neg_offset, neg_offset, #63 /* Need actual value for cmp later. */ + /* Skip the first compare if data in tmp1 is irrelevant. */ + tbnz offset, 6, L(misaligned_mid_loop) -L(done_loop): - /* We found a difference or a NULL before the limit was reached. */ - and limit, limit, #7 - cbz limit, L(not_limit) - /* Read the last word. */ - sub src1, src1, 8 - sub src2, src2, 8 - ldr data1, [src1, limit] - ldr data2, [src2, limit] - sub tmp1, data1, zeroones - orr tmp2, data1, #REP8_7f +L(loop_misaligned): + /* STEP_A: Compare full 8 bytes when there is enough data from SRC2.*/ + LS_FW data2, tmp1, offset + LS_BK tmp1, tmp2, neg_offset + subs limit, limit, #8 + orr data2, data2, tmp1 /* 8 bytes from SRC2 combined from two regs.*/ + sub has_nul, data1, zeroones eor diff, data1, data2 /* Non-zero if differences found. */ - bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ - ccmp diff, #0, #0, eq - b.ne L(not_limit) + orr tmp3, data1, #REP8_7f + csinv endloop, diff, xzr, hi /* If limit, set to all ones. */ + bic has_nul, has_nul, tmp3 /* Non-zero if NUL byte found in SRC1. */ + orr tmp3, endloop, has_nul + cbnz tmp3, L(full_check) + + ldr data1, [src1], #8 +L(misaligned_mid_loop): + /* STEP_B: Compare first part of data1 to second part of tmp2. */ + LS_FW data2, tmp2, offset +#ifdef __AARCH64EB__ + /* For big-endian we do a byte reverse to avoid carry-propagation + problem described above. This way we can reuse the has_nul in the + next step and also use syndrome value trick at the end. */ + rev tmp3, data1 + #define data1_fixed tmp3 +#else + #define data1_fixed data1 +#endif + sub has_nul, data1_fixed, zeroones + orr tmp3, data1_fixed, #REP8_7f + eor diff, data2, data1 /* Non-zero if differences found. */ + bic has_nul, has_nul, tmp3 /* Non-zero if NUL terminator. */ +#ifdef __AARCH64EB__ + rev has_nul, has_nul +#endif + cmp limit, neg_offset, lsr #3 + orr syndrome, diff, has_nul + bic syndrome, syndrome, mask /* Ignore later bytes. */ + csinv tmp3, syndrome, xzr, hi /* If limit, set to all ones. */ + cbnz tmp3, L(syndrome_check) + + /* STEP_C: Compare second part of data1 to first part of tmp1. */ + ldp tmp1, tmp2, [src2], #16 + cmp limit, #8 + LS_BK data2, tmp1, neg_offset + eor diff, data2, data1 /* Non-zero if differences found. */ + orr syndrome, diff, has_nul + and syndrome, syndrome, mask /* Ignore earlier bytes. */ + csinv tmp3, syndrome, xzr, hi /* If limit, set to all ones. */ + cbnz tmp3, L(syndrome_check) + + ldr data1, [src1], #8 + sub limit, limit, #8 + b L(loop_misaligned) + +#ifdef __AARCH64EB__ +L(syndrome_check): + clz pos, syndrome + cmp pos, limit, lsl #3 + b.lo L(end_quick) +#endif L(ret0): mov result, #0 ret - -END ( __strncmp_aarch64) +END(__strncmp_aarch64) diff --git a/contrib/arm-optimized-routines/string/aarch64/strnlen-sve.S b/contrib/arm-optimized-routines/string/aarch64/strnlen-sve.S index 5b9ebf7763bc..6c43dc427da7 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strnlen-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strnlen-sve.S @@ -1,11 +1,11 @@ /* * strnlen - calculate the length of a string with limit. * - * Copyright (c) 2019-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strnlen.S b/contrib/arm-optimized-routines/string/aarch64/strnlen.S index 48d2495d2082..f2090a7485a5 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strnlen.S +++ b/contrib/arm-optimized-routines/string/aarch64/strnlen.S @@ -1,8 +1,8 @@ /* * strnlen - calculate the length of a string with limit. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define cntin x1 @@ -20,39 +20,30 @@ #define src x2 #define synd x3 #define shift x4 -#define wtmp w4 #define tmp x4 #define cntrem x5 #define qdata q0 #define vdata v0 #define vhas_chr v1 -#define vrepmask v2 -#define vend v3 -#define dend d3 +#define vend v2 +#define dend d2 /* Core algorithm: - - For each 16-byte chunk we calculate a 64-bit syndrome value with four bits - per byte. For even bytes, bits 0-3 are set if the relevant byte matched the - requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are - set likewise for odd bytes so that adjacent bytes can be merged. Since the - bits in the syndrome reflect the order in which things occur in the original - string, counting trailing zeros identifies exactly which byte matched. */ + Process the string in 16-byte aligned chunks. Compute a 64-bit mask with + four bits per byte using the shrn instruction. A count trailing zeros then + identifies the first zero byte. */ ENTRY (__strnlen_aarch64) PTR_ARG (0) SIZE_ARG (1) bic src, srcin, 15 - mov wtmp, 0xf00f cbz cntin, L(nomatch) - ld1 {vdata.16b}, [src], 16 - dup vrepmask.8h, wtmp + ld1 {vdata.16b}, [src] cmeq vhas_chr.16b, vdata.16b, 0 lsl shift, srcin, 2 - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ fmov synd, dend lsr synd, synd, shift cbz synd, L(start_loop) @@ -64,37 +55,40 @@ L(finish): csel result, cntin, result, ls ret +L(nomatch): + mov result, cntin + ret + L(start_loop): sub tmp, src, srcin + add tmp, tmp, 17 subs cntrem, cntin, tmp - b.ls L(nomatch) + b.lo L(nomatch) /* Make sure that it won't overread by a 16-byte chunk */ - add tmp, cntrem, 15 - tbnz tmp, 4, L(loop32_2) - + tbz cntrem, 4, L(loop32_2) + sub src, src, 16 .p2align 5 L(loop32): - ldr qdata, [src], 16 + ldr qdata, [src, 32]! cmeq vhas_chr.16b, vdata.16b, 0 umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbnz synd, L(end) L(loop32_2): - ldr qdata, [src], 16 + ldr qdata, [src, 16] subs cntrem, cntrem, 32 cmeq vhas_chr.16b, vdata.16b, 0 - b.ls L(end) + b.lo L(end_2) umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ fmov synd, dend cbz synd, L(loop32) - +L(end_2): + add src, src, 16 L(end): - and vhas_chr.16b, vhas_chr.16b, vrepmask.16b - addp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ - sub src, src, 16 - mov synd, vend.d[0] + shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ sub result, src, srcin + fmov synd, dend #ifndef __AARCH64EB__ rbit synd, synd #endif @@ -104,9 +98,5 @@ L(end): csel result, cntin, result, ls ret -L(nomatch): - mov result, cntin - ret - END (__strnlen_aarch64) diff --git a/contrib/arm-optimized-routines/string/aarch64/strrchr-mte.S b/contrib/arm-optimized-routines/string/aarch64/strrchr-mte.S index 1e4fb1a68f7e..bb61ab9ad4e7 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strrchr-mte.S +++ b/contrib/arm-optimized-routines/string/aarch64/strrchr-mte.S @@ -1,8 +1,8 @@ /* * strrchr - find last position of a character in a string. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * MTE compatible. */ -#include "../asmdefs.h" +#include "asmdefs.h" #define srcin x0 #define chrin w1 @@ -19,7 +19,6 @@ #define src x2 #define tmp x3 -#define wtmp w3 #define synd x3 #define shift x4 #define src_match x4 @@ -31,7 +30,6 @@ #define vhas_nul v2 #define vhas_chr v3 #define vrepmask v4 -#define vrepmask2 v5 #define vend v5 #define dend d5 @@ -47,55 +45,67 @@ ENTRY (__strrchr_aarch64_mte) PTR_ARG (0) bic src, srcin, 15 dup vrepchr.16b, chrin - mov wtmp, 0x3003 - dup vrepmask.8h, wtmp - tst srcin, 15 - beq L(loop1) - - ld1 {vdata.16b}, [src], 16 + movi vrepmask.16b, 0x33 + ld1 {vdata.16b}, [src] cmeq vhas_nul.16b, vdata.16b, 0 cmeq vhas_chr.16b, vdata.16b, vrepchr.16b - mov wtmp, 0xf00f - dup vrepmask2.8h, wtmp bit vhas_nul.16b, vhas_chr.16b, vrepmask.16b - and vhas_nul.16b, vhas_nul.16b, vrepmask2.16b - addp vend.16b, vhas_nul.16b, vhas_nul.16b + shrn vend.8b, vhas_nul.8h, 4 lsl shift, srcin, 2 fmov synd, dend lsr synd, synd, shift lsl synd, synd, shift ands nul_match, synd, 0xcccccccccccccccc bne L(tail) - cbnz synd, L(loop2) + cbnz synd, L(loop2_start) - .p2align 5 + .p2align 4 L(loop1): - ld1 {vdata.16b}, [src], 16 + ldr q1, [src, 16] + cmeq vhas_chr.16b, vdata.16b, vrepchr.16b + cmhs vhas_nul.16b, vhas_chr.16b, vdata.16b + umaxp vend.16b, vhas_nul.16b, vhas_nul.16b + fmov synd, dend + cbnz synd, L(loop1_end) + ldr q1, [src, 32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmhs vhas_nul.16b, vhas_chr.16b, vdata.16b umaxp vend.16b, vhas_nul.16b, vhas_nul.16b fmov synd, dend cbz synd, L(loop1) - + sub src, src, 16 +L(loop1_end): + add src, src, 16 cmeq vhas_nul.16b, vdata.16b, 0 +#ifdef __AARCH64EB__ + bif vhas_nul.16b, vhas_chr.16b, vrepmask.16b + shrn vend.8b, vhas_nul.8h, 4 + fmov synd, dend + rbit synd, synd +#else bit vhas_nul.16b, vhas_chr.16b, vrepmask.16b - bic vhas_nul.8h, 0x0f, lsl 8 - addp vend.16b, vhas_nul.16b, vhas_nul.16b + shrn vend.8b, vhas_nul.8h, 4 fmov synd, dend +#endif ands nul_match, synd, 0xcccccccccccccccc - beq L(loop2) - + beq L(loop2_start) L(tail): sub nul_match, nul_match, 1 and chr_match, synd, 0x3333333333333333 ands chr_match, chr_match, nul_match - sub result, src, 1 + add result, src, 15 clz tmp, chr_match sub result, result, tmp, lsr 2 csel result, result, xzr, ne ret .p2align 4 + nop + nop +L(loop2_start): + add src, src, 16 + bic vrepmask.8h, 0xf0 + L(loop2): cmp synd, 0 csel src_match, src, src_match, ne diff --git a/contrib/arm-optimized-routines/string/aarch64/strrchr-sve.S b/contrib/arm-optimized-routines/string/aarch64/strrchr-sve.S index d36d69af37fd..825a7384cfc1 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strrchr-sve.S +++ b/contrib/arm-optimized-routines/string/aarch64/strrchr-sve.S @@ -1,11 +1,11 @@ /* * strrchr - find the last of a character in a string * - * Copyright (c) 2019-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ -#include "../asmdefs.h" +#include "asmdefs.h" #if __ARM_FEATURE_SVE /* Assumptions: diff --git a/contrib/arm-optimized-routines/string/aarch64/strrchr.S b/contrib/arm-optimized-routines/string/aarch64/strrchr.S index 56185ff534e3..bf9cb297b6cb 100644 --- a/contrib/arm-optimized-routines/string/aarch64/strrchr.S +++ b/contrib/arm-optimized-routines/string/aarch64/strrchr.S @@ -1,8 +1,8 @@ /* * strrchr - find last position of a character in a string. * - * Copyright (c) 2014-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2014-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* Assumptions: @@ -11,7 +11,7 @@ * Neon Available. */ -#include "../asmdefs.h" +#include "asmdefs.h" /* Arguments and results. */ #define srcin x0 diff --git a/contrib/arm-optimized-routines/string/arm/asmdefs.h b/contrib/arm-optimized-routines/string/arm/asmdefs.h new file mode 100644 index 000000000000..e31188804716 --- /dev/null +++ b/contrib/arm-optimized-routines/string/arm/asmdefs.h @@ -0,0 +1,477 @@ +/* + * Macros for asm code. Arm version. + * + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#ifndef _ASMDEFS_H +#define _ASMDEFS_H + +/* Check whether leaf function PAC signing has been requested in the + -mbranch-protect compile-time option. */ +#define LEAF_PROTECT_BIT 2 + +#ifdef __ARM_FEATURE_PAC_DEFAULT +# define HAVE_PAC_LEAF \ + ((__ARM_FEATURE_PAC_DEFAULT & (1 << LEAF_PROTECT_BIT)) && 1) +#else +# define HAVE_PAC_LEAF 0 +#endif + +/* Provide default parameters for PAC-code handling in leaf-functions. */ +#if HAVE_PAC_LEAF +# ifndef PAC_LEAF_PUSH_IP +# define PAC_LEAF_PUSH_IP 1 +# endif +#else /* !HAVE_PAC_LEAF */ +# undef PAC_LEAF_PUSH_IP +# define PAC_LEAF_PUSH_IP 0 +#endif /* HAVE_PAC_LEAF */ + +#define STACK_ALIGN_ENFORCE 0 + +/****************************************************************************** +* Implementation of the prologue and epilogue assembler macros and their +* associated helper functions. +* +* These functions add support for the following: +* +* - M-profile branch target identification (BTI) landing-pads when compiled +* with `-mbranch-protection=bti'. +* - PAC-signing and verification instructions, depending on hardware support +* and whether the PAC-signing of leaf functions has been requested via the +* `-mbranch-protection=pac-ret+leaf' compiler argument. +* - 8-byte stack alignment preservation at function entry, defaulting to the +* value of STACK_ALIGN_ENFORCE. +* +* Notes: +* - Prologue stack alignment is implemented by detecting a push with an odd +* number of registers and prepending a dummy register to the list. +* - If alignment is attempted on a list containing r0, compilation will result +* in an error. +* - If alignment is attempted in a list containing r1, r0 will be prepended to +* the register list and r0 will be restored prior to function return. for +* functions with non-void return types, this will result in the corruption of +* the result register. +* - Stack alignment is enforced via the following helper macro call-chain: +* +* {prologue|epilogue} ->_align8 -> _preprocess_reglist -> +* _preprocess_reglist1 -> {_prologue|_epilogue} +* +* - Debug CFI directives are automatically added to prologues and epilogues, +* assisted by `cfisavelist' and `cfirestorelist', respectively. +* +* Arguments: +* prologue +* -------- +* - first - If `last' specified, this serves as start of general-purpose +* register (GPR) range to push onto stack, otherwise represents +* single GPR to push onto stack. If omitted, no GPRs pushed +* onto stack at prologue. +* - last - If given, specifies inclusive upper-bound of GPR range. +* - push_ip - Determines whether IP register is to be pushed to stack at +* prologue. When pac-signing is requested, this holds the +* the pac-key. Either 1 or 0 to push or not push, respectively. +* Default behavior: Set to value of PAC_LEAF_PUSH_IP macro. +* - push_lr - Determines whether to push lr to the stack on function entry. +* Either 1 or 0 to push or not push, respectively. +* - align8 - Whether to enforce alignment. Either 1 or 0, with 1 requesting +* alignment. +* +* epilogue +* -------- +* The epilogue should be called passing the same arguments as those passed to +* the prologue to ensure the stack is not corrupted on function return. +* +* Usage examples: +* +* prologue push_ip=1 -> push {ip} +* epilogue push_ip=1, align8=1 -> pop {r2, ip} +* prologue push_ip=1, push_lr=1 -> push {ip, lr} +* epilogue 1 -> pop {r1} +* prologue 1, align8=1 -> push {r0, r1} +* epilogue 1, push_ip=1 -> pop {r1, ip} +* prologue 1, 4 -> push {r1-r4} +* epilogue 1, 4 push_ip=1 -> pop {r1-r4, ip} +* +******************************************************************************/ + +/* Emit .cfi_restore directives for a consecutive sequence of registers. */ + .macro cfirestorelist first, last + .cfi_restore \last + .if \last-\first + cfirestorelist \first, \last-1 + .endif + .endm + +/* Emit .cfi_offset directives for a consecutive sequence of registers. */ + .macro cfisavelist first, last, index=1 + .cfi_offset \last, -4*(\index) + .if \last-\first + cfisavelist \first, \last-1, \index+1 + .endif + .endm + +.macro _prologue first=-1, last=-1, push_ip=PAC_LEAF_PUSH_IP, push_lr=0 + .if \push_ip & 1 != \push_ip + .error "push_ip may be either 0 or 1" + .endif + .if \push_lr & 1 != \push_lr + .error "push_lr may be either 0 or 1" + .endif + .if \first != -1 + .if \last == -1 + /* Upper-bound not provided: Set upper = lower. */ + _prologue \first, \first, \push_ip, \push_lr + .exitm + .endif + .endif +#if HAVE_PAC_LEAF +# if __ARM_FEATURE_BTI_DEFAULT + pacbti ip, lr, sp +# else + pac ip, lr, sp +# endif /* __ARM_FEATURE_BTI_DEFAULT */ + .cfi_register 143, 12 +#else +# if __ARM_FEATURE_BTI_DEFAULT + bti +# endif /* __ARM_FEATURE_BTI_DEFAULT */ +#endif /* HAVE_PAC_LEAF */ + .if \first != -1 + .if \last != \first + .if \last >= 13 + .error "SP cannot be in the save list" + .endif + .if \push_ip + .if \push_lr + /* Case 1: push register range, ip and lr registers. */ + push {r\first-r\last, ip, lr} + .cfi_adjust_cfa_offset ((\last-\first)+3)*4 + .cfi_offset 14, -4 + .cfi_offset 143, -8 + cfisavelist \first, \last, 3 + .else // !\push_lr + /* Case 2: push register range and ip register. */ + push {r\first-r\last, ip} + .cfi_adjust_cfa_offset ((\last-\first)+2)*4 + .cfi_offset 143, -4 + cfisavelist \first, \last, 2 + .endif + .else // !\push_ip + .if \push_lr + /* Case 3: push register range and lr register. */ + push {r\first-r\last, lr} + .cfi_adjust_cfa_offset ((\last-\first)+2)*4 + .cfi_offset 14, -4 + cfisavelist \first, \last, 2 + .else // !\push_lr + /* Case 4: push register range. */ + push {r\first-r\last} + .cfi_adjust_cfa_offset ((\last-\first)+1)*4 + cfisavelist \first, \last, 1 + .endif + .endif + .else // \last == \first + .if \push_ip + .if \push_lr + /* Case 5: push single GP register plus ip and lr registers. */ + push {r\first, ip, lr} + .cfi_adjust_cfa_offset 12 + .cfi_offset 14, -4 + .cfi_offset 143, -8 + cfisavelist \first, \first, 3 + .else // !\push_lr + /* Case 6: push single GP register plus ip register. */ + push {r\first, ip} + .cfi_adjust_cfa_offset 8 + .cfi_offset 143, -4 + cfisavelist \first, \first, 2 + .endif + .else // !\push_ip + .if \push_lr + /* Case 7: push single GP register plus lr register. */ + push {r\first, lr} + .cfi_adjust_cfa_offset 8 + .cfi_offset 14, -4 + cfisavelist \first, \first, 2 + .else // !\push_lr + /* Case 8: push single GP register. */ + push {r\first} + .cfi_adjust_cfa_offset 4 + cfisavelist \first, \first, 1 + .endif + .endif + .endif + .else // \first == -1 + .if \push_ip + .if \push_lr + /* Case 9: push ip and lr registers. */ + push {ip, lr} + .cfi_adjust_cfa_offset 8 + .cfi_offset 14, -4 + .cfi_offset 143, -8 + .else // !\push_lr + /* Case 10: push ip register. */ + push {ip} + .cfi_adjust_cfa_offset 4 + .cfi_offset 143, -4 + .endif + .else // !\push_ip + .if \push_lr + /* Case 11: push lr register. */ + push {lr} + .cfi_adjust_cfa_offset 4 + .cfi_offset 14, -4 + .endif + .endif + .endif +.endm + +.macro _epilogue first=-1, last=-1, push_ip=PAC_LEAF_PUSH_IP, push_lr=0 + .if \push_ip & 1 != \push_ip + .error "push_ip may be either 0 or 1" + .endif + .if \push_lr & 1 != \push_lr + .error "push_lr may be either 0 or 1" + .endif + .if \first != -1 + .if \last == -1 + /* Upper-bound not provided: Set upper = lower. */ + _epilogue \first, \first, \push_ip, \push_lr + .exitm + .endif + .if \last != \first + .if \last >= 13 + .error "SP cannot be in the save list" + .endif + .if \push_ip + .if \push_lr + /* Case 1: pop register range, ip and lr registers. */ + pop {r\first-r\last, ip, lr} + .cfi_restore 14 + .cfi_register 143, 12 + cfirestorelist \first, \last + .else // !\push_lr + /* Case 2: pop register range and ip register. */ + pop {r\first-r\last, ip} + .cfi_register 143, 12 + cfirestorelist \first, \last + .endif + .else // !\push_ip + .if \push_lr + /* Case 3: pop register range and lr register. */ + pop {r\first-r\last, lr} + .cfi_restore 14 + cfirestorelist \first, \last + .else // !\push_lr + /* Case 4: pop register range. */ + pop {r\first-r\last} + cfirestorelist \first, \last + .endif + .endif + .else // \last == \first + .if \push_ip + .if \push_lr + /* Case 5: pop single GP register plus ip and lr registers. */ + pop {r\first, ip, lr} + .cfi_restore 14 + .cfi_register 143, 12 + cfirestorelist \first, \first + .else // !\push_lr + /* Case 6: pop single GP register plus ip register. */ + pop {r\first, ip} + .cfi_register 143, 12 + cfirestorelist \first, \first + .endif + .else // !\push_ip + .if \push_lr + /* Case 7: pop single GP register plus lr register. */ + pop {r\first, lr} + .cfi_restore 14 + cfirestorelist \first, \first + .else // !\push_lr + /* Case 8: pop single GP register. */ + pop {r\first} + cfirestorelist \first, \first + .endif + .endif + .endif + .else // \first == -1 + .if \push_ip + .if \push_lr + /* Case 9: pop ip and lr registers. */ + pop {ip, lr} + .cfi_restore 14 + .cfi_register 143, 12 + .else // !\push_lr + /* Case 10: pop ip register. */ + pop {ip} + .cfi_register 143, 12 + .endif + .else // !\push_ip + .if \push_lr + /* Case 11: pop lr register. */ + pop {lr} + .cfi_restore 14 + .endif + .endif + .endif +#if HAVE_PAC_LEAF + aut ip, lr, sp +#endif /* HAVE_PAC_LEAF */ + bx lr +.endm + +/* Clean up expressions in 'last'. */ +.macro _preprocess_reglist1 first:req, last:req, push_ip:req, push_lr:req, reglist_op:req + .if \last == 0 + \reglist_op \first, 0, \push_ip, \push_lr + .elseif \last == 1 + \reglist_op \first, 1, \push_ip, \push_lr + .elseif \last == 2 + \reglist_op \first, 2, \push_ip, \push_lr + .elseif \last == 3 + \reglist_op \first, 3, \push_ip, \push_lr + .elseif \last == 4 + \reglist_op \first, 4, \push_ip, \push_lr + .elseif \last == 5 + \reglist_op \first, 5, \push_ip, \push_lr + .elseif \last == 6 + \reglist_op \first, 6, \push_ip, \push_lr + .elseif \last == 7 + \reglist_op \first, 7, \push_ip, \push_lr + .elseif \last == 8 + \reglist_op \first, 8, \push_ip, \push_lr + .elseif \last == 9 + \reglist_op \first, 9, \push_ip, \push_lr + .elseif \last == 10 + \reglist_op \first, 10, \push_ip, \push_lr + .elseif \last == 11 + \reglist_op \first, 11, \push_ip, \push_lr + .else + .error "last (\last) out of range" + .endif +.endm + +/* Clean up expressions in 'first'. */ +.macro _preprocess_reglist first:req, last, push_ip=0, push_lr=0, reglist_op:req + .ifb \last + _preprocess_reglist \first \first \push_ip \push_lr + .else + .if \first > \last + .error "last (\last) must be at least as great as first (\first)" + .endif + .if \first == 0 + _preprocess_reglist1 0, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 1 + _preprocess_reglist1 1, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 2 + _preprocess_reglist1 2, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 3 + _preprocess_reglist1 3, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 4 + _preprocess_reglist1 4, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 5 + _preprocess_reglist1 5, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 6 + _preprocess_reglist1 6, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 7 + _preprocess_reglist1 7, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 8 + _preprocess_reglist1 8, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 9 + _preprocess_reglist1 9, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 10 + _preprocess_reglist1 10, \last, \push_ip, \push_lr, \reglist_op + .elseif \first == 11 + _preprocess_reglist1 11, \last, \push_ip, \push_lr, \reglist_op + .else + .error "first (\first) out of range" + .endif + .endif +.endm + +.macro _align8 first, last, push_ip=0, push_lr=0, reglist_op=_prologue + .ifb \first + .ifnb \last + .error "can't have last (\last) without specifying first" + .else // \last not blank + .if ((\push_ip + \push_lr) % 2) == 0 + \reglist_op first=-1, last=-1, push_ip=\push_ip, push_lr=\push_lr + .exitm + .else // ((\push_ip + \push_lr) % 2) odd + _align8 2, 2, \push_ip, \push_lr, \reglist_op + .exitm + .endif // ((\push_ip + \push_lr) % 2) == 0 + .endif // .ifnb \last + .endif // .ifb \first + + .ifb \last + _align8 \first, \first, \push_ip, \push_lr, \reglist_op + .else + .if \push_ip & 1 <> \push_ip + .error "push_ip may be 0 or 1" + .endif + .if \push_lr & 1 <> \push_lr + .error "push_lr may be 0 or 1" + .endif + .ifeq (\last - \first + \push_ip + \push_lr) % 2 + .if \first == 0 + .error "Alignment required and first register is r0" + .exitm + .endif + _preprocess_reglist \first-1, \last, \push_ip, \push_lr, \reglist_op + .else + _preprocess_reglist \first \last, \push_ip, \push_lr, \reglist_op + .endif + .endif +.endm + +.macro prologue first, last, push_ip=PAC_LEAF_PUSH_IP, push_lr=0, align8=STACK_ALIGN_ENFORCE + .if \align8 + _align8 \first, \last, \push_ip, \push_lr, _prologue + .else + _prologue first=\first, last=\last, push_ip=\push_ip, push_lr=\push_lr + .endif +.endm + +.macro epilogue first, last, push_ip=PAC_LEAF_PUSH_IP, push_lr=0, align8=STACK_ALIGN_ENFORCE + .if \align8 + _align8 \first, \last, \push_ip, \push_lr, reglist_op=_epilogue + .else + _epilogue first=\first, last=\last, push_ip=\push_ip, push_lr=\push_lr + .endif +.endm + +#define ENTRY_ALIGN(name, alignment) \ + .global name; \ + .type name,%function; \ + .align alignment; \ + name: \ + .fnstart; \ + .cfi_startproc; + +#define ENTRY(name) ENTRY_ALIGN(name, 6) + +#define ENTRY_ALIAS(name) \ + .global name; \ + .type name,%function; \ + name: + +#if defined (IS_LEAF) +# define END_UNWIND .cantunwind; +#else +# define END_UNWIND +#endif + +#define END(name) \ + .cfi_endproc; \ + END_UNWIND \ + .fnend; \ + .size name, .-name; + +#define L(l) .L ## l + +#endif diff --git a/contrib/arm-optimized-routines/string/arm/check-arch.S b/contrib/arm-optimized-routines/string/arm/check-arch.S index 1cff9345e343..95516710fb85 100644 --- a/contrib/arm-optimized-routines/string/arm/check-arch.S +++ b/contrib/arm-optimized-routines/string/arm/check-arch.S @@ -1,10 +1,13 @@ /* * check ARCH setting. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if !__arm__ # error ARCH setting does not match the compiler. #endif + +/* For attributes that may affect ABI. */ +#include "asmdefs.h" diff --git a/contrib/arm-optimized-routines/string/arm/memchr.S b/contrib/arm-optimized-routines/string/arm/memchr.S index 3f1ac4df136f..823d6013eb35 100644 --- a/contrib/arm-optimized-routines/string/arm/memchr.S +++ b/contrib/arm-optimized-routines/string/arm/memchr.S @@ -1,8 +1,8 @@ /* * memchr - scan memory for a character * - * Copyright (c) 2010-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2010-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* @@ -23,7 +23,11 @@ @ Removed unneeded cbz from align loop .syntax unified +#if __ARM_ARCH >= 8 && __ARM_ARCH_PROFILE == 'M' + /* keep config inherited from -march= */ +#else .arch armv7-a +#endif @ this lets us check a flag in a 00/ff byte easily in either endianness #ifdef __ARMEB__ @@ -32,6 +36,8 @@ #define CHARTSTMASK(c) 1<<(c*8) #endif .thumb +#include "asmdefs.h" + @ --------------------------------------------------------------------------- .thumb_func @@ -39,11 +45,14 @@ .p2align 4,,15 .global __memchr_arm .type __memchr_arm,%function + .fnstart + .cfi_startproc __memchr_arm: @ r0 = start of memory to scan @ r1 = character to look for @ r2 = length @ returns r0 = pointer to character or NULL if not found + prologue and r1,r1,#0xff @ Don't think we can trust the caller to actually pass a char cmp r2,#16 @ If it's short don't bother with anything clever @@ -64,6 +73,11 @@ __memchr_arm: 10: @ At this point, we are aligned, we know we have at least 8 bytes to work with push {r4,r5,r6,r7} + .cfi_adjust_cfa_offset 16 + .cfi_rel_offset 4, 0 + .cfi_rel_offset 5, 4 + .cfi_rel_offset 6, 8 + .cfi_rel_offset 7, 12 orr r1, r1, r1, lsl #8 @ expand the match word across to all bytes orr r1, r1, r1, lsl #16 bic r4, r2, #7 @ Number of double words to work with @@ -83,6 +97,11 @@ __memchr_arm: bne 15b @ (Flags from the subs above) If not run out of bytes then go around again pop {r4,r5,r6,r7} + .cfi_restore 7 + .cfi_restore 6 + .cfi_restore 5 + .cfi_restore 4 + .cfi_adjust_cfa_offset -16 and r1,r1,#0xff @ Get r1 back to a single character from the expansion above and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done @@ -97,16 +116,25 @@ __memchr_arm: bne 21b @ on r2 flags 40: + .cfi_remember_state movs r0,#0 @ not found - bx lr + epilogue 50: + .cfi_restore_state + .cfi_remember_state subs r0,r0,#1 @ found - bx lr + epilogue 60: @ We're here because the fast path found a hit - now we have to track down exactly which word it was @ r0 points to the start of the double word after the one that was tested @ r5 has the 00/ff pattern for the first word, r6 has the chained value + .cfi_restore_state @ Standard post-prologue state + .cfi_adjust_cfa_offset 16 + .cfi_rel_offset 4, 0 + .cfi_rel_offset 5, 4 + .cfi_rel_offset 6, 8 + .cfi_rel_offset 7, 12 cmp r5, #0 itte eq moveq r5, r6 @ the end is in the 2nd word @@ -126,7 +154,15 @@ __memchr_arm: 61: pop {r4,r5,r6,r7} + .cfi_restore 7 + .cfi_restore 6 + .cfi_restore 5 + .cfi_restore 4 + .cfi_adjust_cfa_offset -16 subs r0,r0,#1 - bx lr + epilogue + .cfi_endproc + .cantunwind + .fnend .size __memchr_arm, . - __memchr_arm diff --git a/contrib/arm-optimized-routines/string/arm/memcpy.S b/contrib/arm-optimized-routines/string/arm/memcpy.S index 86e64938edb1..2423cfd69061 100644 --- a/contrib/arm-optimized-routines/string/arm/memcpy.S +++ b/contrib/arm-optimized-routines/string/arm/memcpy.S @@ -1,8 +1,8 @@ /* * memcpy - copy memory area * - * Copyright (c) 2013-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2013-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* @@ -17,7 +17,7 @@ */ -#include "../asmdefs.h" +#include "asmdefs.h" .syntax unified /* This implementation requires ARM state. */ diff --git a/contrib/arm-optimized-routines/string/arm/memset.S b/contrib/arm-optimized-routines/string/arm/memset.S index 11e927368fd1..487b9d6a8f6c 100644 --- a/contrib/arm-optimized-routines/string/arm/memset.S +++ b/contrib/arm-optimized-routines/string/arm/memset.S @@ -2,7 +2,7 @@ * memset - fill memory with a constant * * Copyright (c) 2010-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ /* diff --git a/contrib/arm-optimized-routines/string/arm/strcmp-armv6m.S b/contrib/arm-optimized-routines/string/arm/strcmp-armv6m.S index b75d4143db57..4d55306810ad 100644 --- a/contrib/arm-optimized-routines/string/arm/strcmp-armv6m.S +++ b/contrib/arm-optimized-routines/string/arm/strcmp-armv6m.S @@ -1,10 +1,12 @@ /* * strcmp for ARMv6-M (optimized for performance, not size) * - * Copyright (c) 2014-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2014-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ +#include "asmdefs.h" + #if __ARM_ARCH == 6 && __ARM_ARCH_6M__ >= 1 .thumb_func diff --git a/contrib/arm-optimized-routines/string/arm/strcmp.S b/contrib/arm-optimized-routines/string/arm/strcmp.S index 51443e343058..74b3d235fb18 100644 --- a/contrib/arm-optimized-routines/string/arm/strcmp.S +++ b/contrib/arm-optimized-routines/string/arm/strcmp.S @@ -1,8 +1,8 @@ /* * strcmp for ARMv7 * - * Copyright (c) 2012-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2012-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if __ARM_ARCH >= 7 && __ARM_ARCH_ISA_ARM >= 1 @@ -12,7 +12,7 @@ is sufficiently aligned. Use saturating arithmetic to optimize the compares. */ -#include "../asmdefs.h" +#include "asmdefs.h" /* Build Options: STRCMP_NO_PRECHECK: Don't run a quick pre-check of the first @@ -26,6 +26,11 @@ #define STRCMP_NO_PRECHECK 0 +/* Ensure the .cantunwind directive is prepended to .fnend. + Leaf functions cannot throw exceptions - EHABI only supports + synchronous exceptions. */ +#define IS_LEAF + /* This version uses Thumb-2 code. */ .thumb .syntax unified @@ -98,8 +103,9 @@ ldrd r4, r5, [sp], #16 .cfi_restore 4 .cfi_restore 5 + .cfi_adjust_cfa_offset -16 sub result, result, r1, lsr #24 - bx lr + epilogue push_ip=HAVE_PAC_LEAF #else /* To use the big-endian trick we'd have to reverse all three words. that's slower than this approach. */ @@ -119,21 +125,15 @@ ldrd r4, r5, [sp], #16 .cfi_restore 4 .cfi_restore 5 + .cfi_adjust_cfa_offset -16 sub result, result, r1 - bx lr + epilogue push_ip=HAVE_PAC_LEAF #endif .endm - .p2align 5 -L(strcmp_start_addr): -#if STRCMP_NO_PRECHECK == 0 -L(fastpath_exit): - sub r0, r2, r3 - bx lr - nop -#endif -ENTRY_ALIGN (__strcmp_arm, 0) +ENTRY(__strcmp_arm) + prologue push_ip=HAVE_PAC_LEAF #if STRCMP_NO_PRECHECK == 0 ldrb r2, [src1] ldrb r3, [src2] @@ -143,13 +143,13 @@ ENTRY_ALIGN (__strcmp_arm, 0) bne L(fastpath_exit) #endif strd r4, r5, [sp, #-16]! - .cfi_def_cfa_offset 16 - .cfi_offset 4, -16 - .cfi_offset 5, -12 + .cfi_adjust_cfa_offset 16 + .cfi_rel_offset 4, 0 + .cfi_rel_offset 5, 4 orr tmp1, src1, src2 strd r6, r7, [sp, #8] - .cfi_offset 6, -8 - .cfi_offset 7, -4 + .cfi_rel_offset 6, 8 + .cfi_rel_offset 7, 12 mvn const_m1, #0 lsl r2, tmp1, #29 cbz r2, L(loop_aligned8) @@ -318,10 +318,19 @@ L(misaligned_exit): mov result, tmp1 ldr r4, [sp], #16 .cfi_restore 4 - bx lr + .cfi_adjust_cfa_offset -16 + epilogue push_ip=HAVE_PAC_LEAF #if STRCMP_NO_PRECHECK == 0 +L(fastpath_exit): + .cfi_restore_state + .cfi_remember_state + sub r0, r2, r3 + epilogue push_ip=HAVE_PAC_LEAF + L(aligned_m1): + .cfi_restore_state + .cfi_remember_state add src2, src2, #4 #endif L(src1_aligned): @@ -368,9 +377,9 @@ L(overlap3): /* R6/7 Not used in this sequence. */ .cfi_restore 6 .cfi_restore 7 + .cfi_adjust_cfa_offset -16 neg result, result - bx lr - + epilogue push_ip=HAVE_PAC_LEAF 6: .cfi_restore_state S2LO data1, data1, #24 @@ -445,7 +454,8 @@ L(strcmp_done_equal): /* R6/7 not used in this sequence. */ .cfi_restore 6 .cfi_restore 7 - bx lr + .cfi_adjust_cfa_offset -16 + epilogue push_ip=HAVE_PAC_LEAF L(strcmp_tail): .cfi_restore_state @@ -467,8 +477,9 @@ L(strcmp_tail): /* R6/7 not used in this sequence. */ .cfi_restore 6 .cfi_restore 7 + .cfi_adjust_cfa_offset -16 sub result, result, data2, lsr #24 - bx lr + epilogue push_ip=HAVE_PAC_LEAF END (__strcmp_arm) diff --git a/contrib/arm-optimized-routines/string/arm/strcpy.c b/contrib/arm-optimized-routines/string/arm/strcpy.c index 02cf94ff4be0..b5728a2534f0 100644 --- a/contrib/arm-optimized-routines/string/arm/strcpy.c +++ b/contrib/arm-optimized-routines/string/arm/strcpy.c @@ -2,7 +2,7 @@ * strcpy * * Copyright (c) 2008-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if defined (__thumb2__) && !defined (__thumb__) diff --git a/contrib/arm-optimized-routines/string/arm/strlen-armv6t2.S b/contrib/arm-optimized-routines/string/arm/strlen-armv6t2.S index 5ad30c941586..5eb8671bdc8b 100644 --- a/contrib/arm-optimized-routines/string/arm/strlen-armv6t2.S +++ b/contrib/arm-optimized-routines/string/arm/strlen-armv6t2.S @@ -1,8 +1,8 @@ /* * strlen - calculate the length of a string * - * Copyright (c) 2010-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2010-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if __ARM_ARCH >= 6 && __ARM_ARCH_ISA_THUMB == 2 @@ -13,7 +13,7 @@ */ -#include "../asmdefs.h" +#include "asmdefs.h" #ifdef __ARMEB__ #define S2LO lsl @@ -23,6 +23,11 @@ #define S2HI lsl #endif +/* Ensure the .cantunwind directive is prepended to .fnend. + Leaf functions cannot throw exceptions - EHABI only supports + synchronous exceptions. */ +#define IS_LEAF + /* This code requires Thumb. */ .thumb .syntax unified @@ -41,8 +46,8 @@ #define tmp2 r5 ENTRY (__strlen_armv6t2) + prologue 4 5 push_ip=HAVE_PAC_LEAF pld [srcin, #0] - strd r4, r5, [sp, #-8]! bic src, srcin, #7 mvn const_m1, #0 ands tmp1, srcin, #7 /* (8 - bytes) to alignment. */ @@ -92,6 +97,7 @@ L(start_realigned): beq L(loop_aligned) L(null_found): + .cfi_remember_state cmp data1a, #0 itt eq addeq result, result, #4 @@ -100,11 +106,11 @@ L(null_found): rev data1a, data1a #endif clz data1a, data1a - ldrd r4, r5, [sp], #8 add result, result, data1a, lsr #3 /* Bits -> Bytes. */ - bx lr + epilogue 4 5 push_ip=HAVE_PAC_LEAF L(misaligned8): + .cfi_restore_state ldrd data1a, data1b, [src] and tmp2, tmp1, #3 rsb result, tmp1, #0 diff --git a/contrib/arm-optimized-routines/string/bench/memcpy.c b/contrib/arm-optimized-routines/string/bench/memcpy.c index d5d4ea7e0309..b628f9b60d96 100644 --- a/contrib/arm-optimized-routines/string/bench/memcpy.c +++ b/contrib/arm-optimized-routines/string/bench/memcpy.c @@ -1,8 +1,8 @@ /* * memcpy benchmark. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define _GNU_SOURCE @@ -13,14 +13,15 @@ #include "stringlib.h" #include "benchlib.h" -#define ITERS 5000 +#define ITERS 5000 #define ITERS2 20000000 -#define ITERS3 500000 -#define MAX_COPIES 8192 -#define SIZE (256*1024) +#define ITERS3 200000 +#define NUM_TESTS 16384 +#define MIN_SIZE 32768 +#define MAX_SIZE (1024 * 1024) -static uint8_t a[SIZE + 4096] __attribute__((__aligned__(64))); -static uint8_t b[SIZE + 4096] __attribute__((__aligned__(64))); +static uint8_t a[MAX_SIZE + 4096 + 64] __attribute__((__aligned__(64))); +static uint8_t b[MAX_SIZE + 4096 + 64] __attribute__((__aligned__(64))); #define F(x) {#x, x}, @@ -30,15 +31,21 @@ static const struct fun void *(*fun)(void *, const void *, size_t); } funtab[] = { - F(memcpy) #if __aarch64__ F(__memcpy_aarch64) # if __ARM_NEON F(__memcpy_aarch64_simd) # endif +# if __ARM_FEATURE_SVE + F(__memcpy_aarch64_sve) +# endif +# if WANT_MOPS + F(__memcpy_aarch64_mops) +# endif #elif __arm__ F(__memcpy_arm) #endif + F(memcpy) #undef F {0, 0} }; @@ -109,7 +116,7 @@ typedef struct uint64_t len : 16; } copy_t; -static copy_t copy[MAX_COPIES]; +static copy_t test_arr[NUM_TESTS]; typedef char *(*proto_t) (char *, const char *, size_t); @@ -140,14 +147,14 @@ init_copies (size_t max_size) size_t total = 0; /* Create a random set of copies with the given size and alignment distributions. */ - for (int i = 0; i < MAX_COPIES; i++) + for (int i = 0; i < NUM_TESTS; i++) { - copy[i].dst = (rand32 (0) & (max_size - 1)); - copy[i].dst &= ~dst_align_arr[rand32 (0) & ALIGN_MASK]; - copy[i].src = (rand32 (0) & (max_size - 1)); - copy[i].src &= ~src_align_arr[rand32 (0) & ALIGN_MASK]; - copy[i].len = size_arr[rand32 (0) & SIZE_MASK]; - total += copy[i].len; + test_arr[i].dst = (rand32 (0) & (max_size - 1)); + test_arr[i].dst &= ~dst_align_arr[rand32 (0) & ALIGN_MASK]; + test_arr[i].src = (rand32 (0) & (max_size - 1)); + test_arr[i].src &= ~src_align_arr[rand32 (0) & ALIGN_MASK]; + test_arr[i].len = size_arr[rand32 (0) & SIZE_MASK]; + total += test_arr[i].len; } return total; @@ -160,25 +167,27 @@ int main (void) memset (a, 1, sizeof (a)); memset (b, 2, sizeof (b)); - printf("Random memcpy:\n"); + printf("Random memcpy (bytes/ns):\n"); for (int f = 0; funtab[f].name != 0; f++) { size_t total = 0; uint64_t tsum = 0; - printf ("%22s (B/ns) ", funtab[f].name); + printf ("%22s ", funtab[f].name); rand32 (0x12345678); - for (int size = 16384; size <= SIZE; size *= 2) + for (int size = MIN_SIZE; size <= MAX_SIZE; size *= 2) { size_t copy_size = init_copies (size) * ITERS; - for (int c = 0; c < MAX_COPIES; c++) - funtab[f].fun (b + copy[c].dst, a + copy[c].src, copy[c].len); + for (int c = 0; c < NUM_TESTS; c++) + funtab[f].fun (b + test_arr[c].dst, a + test_arr[c].src, + test_arr[c].len); uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS; i++) - for (int c = 0; c < MAX_COPIES; c++) - funtab[f].fun (b + copy[c].dst, a + copy[c].src, copy[c].len); + for (int c = 0; c < NUM_TESTS; c++) + funtab[f].fun (b + test_arr[c].dst, a + test_arr[c].src, + test_arr[c].len); t = clock_get_ns () - t; total += copy_size; tsum += t; @@ -187,74 +196,147 @@ int main (void) printf( "avg %.2f\n", (double)total / tsum); } - printf ("\nMedium memcpy:\n"); + size_t total = 0; + uint64_t tsum = 0; + printf ("%22s ", "memcpy_call"); + rand32 (0x12345678); + + for (int size = MIN_SIZE; size <= MAX_SIZE; size *= 2) + { + size_t copy_size = init_copies (size) * ITERS; + + for (int c = 0; c < NUM_TESTS; c++) + memcpy (b + test_arr[c].dst, a + test_arr[c].src, test_arr[c].len); + + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS; i++) + for (int c = 0; c < NUM_TESTS; c++) + memcpy (b + test_arr[c].dst, a + test_arr[c].src, test_arr[c].len); + t = clock_get_ns () - t; + total += copy_size; + tsum += t; + printf ("%dK: %.2f ", size / 1024, (double)copy_size / t); + } + printf( "avg %.2f\n", (double)total / tsum); + + + printf ("\nAligned medium memcpy (bytes/ns):\n"); for (int f = 0; funtab[f].name != 0; f++) { - printf ("%22s (B/ns) ", funtab[f].name); + printf ("%22s ", funtab[f].name); - for (int size = 16; size <= 512; size *= 2) + for (int size = 8; size <= 512; size *= 2) { uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS2; i++) funtab[f].fun (b, a, size); t = clock_get_ns () - t; - printf ("%d%c: %.2f ", size < 1024 ? size : size / 1024, - size < 1024 ? 'B' : 'K', (double)size * ITERS2 / t); + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); } printf ("\n"); } - printf ("\nLarge memcpy:\n"); + printf ("%22s ", "memcpy_call"); + for (int size = 8; size <= 512; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS2; i++) + memcpy (b, a, size); + t = clock_get_ns () - t; + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); + } + printf ("\n"); + + + printf ("\nUnaligned medium memcpy (bytes/ns):\n"); for (int f = 0; funtab[f].name != 0; f++) { - printf ("%22s (B/ns) ", funtab[f].name); + printf ("%22s ", funtab[f].name); - for (int size = 1024; size <= 32768; size *= 2) + for (int size = 8; size <= 512; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS2; i++) + funtab[f].fun (b + 3, a + 1, size); + t = clock_get_ns () - t; + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); + } + printf ("\n"); + } + + printf ("%22s ", "memcpy_call"); + for (int size = 8; size <= 512; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS2; i++) + memcpy (b + 3, a + 1, size); + t = clock_get_ns () - t; + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); + } + printf ("\n"); + + + printf ("\nLarge memcpy (bytes/ns):\n"); + for (int f = 0; funtab[f].name != 0; f++) + { + printf ("%22s ", funtab[f].name); + + for (int size = 1024; size <= 65536; size *= 2) { uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS3; i++) funtab[f].fun (b, a, size); t = clock_get_ns () - t; - printf ("%d%c: %.2f ", size < 1024 ? size : size / 1024, - size < 1024 ? 'B' : 'K', (double)size * ITERS3 / t); + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); } printf ("\n"); } - printf ("\nUnaligned forwards memmove:\n"); + printf ("%22s ", "memcpy_call"); + for (int size = 1024; size <= 65536; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS3; i++) + memcpy (b, a, size); + t = clock_get_ns () - t; + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); + } + printf ("\n"); + + + printf ("\nUnaligned forwards memmove (bytes/ns):\n"); for (int f = 0; funtab[f].name != 0; f++) { - printf ("%22s (B/ns) ", funtab[f].name); + printf ("%22s ", funtab[f].name); - for (int size = 1024; size <= 32768; size *= 2) + for (int size = 1024; size <= 65536; size *= 2) { uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS3; i++) funtab[f].fun (a, a + 256 + (i & 31), size); t = clock_get_ns () - t; - printf ("%d%c: %.2f ", size < 1024 ? size : size / 1024, - size < 1024 ? 'B' : 'K', (double)size * ITERS3 / t); + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); } printf ("\n"); } - printf ("\nUnaligned backwards memmove:\n"); + printf ("\nUnaligned backwards memmove (bytes/ns):\n"); for (int f = 0; funtab[f].name != 0; f++) { - printf ("%22s (B/ns) ", funtab[f].name); + printf ("%22s ", funtab[f].name); - for (int size = 1024; size <= 32768; size *= 2) + for (int size = 1024; size <= 65536; size *= 2) { uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS3; i++) funtab[f].fun (a + 256 + (i & 31), a, size); t = clock_get_ns () - t; - printf ("%d%c: %.2f ", size < 1024 ? size : size / 1024, - size < 1024 ? 'B' : 'K', (double)size * ITERS3 / t); + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); } printf ("\n"); } + printf ("\n"); return 0; } diff --git a/contrib/arm-optimized-routines/string/bench/memset.c b/contrib/arm-optimized-routines/string/bench/memset.c new file mode 100644 index 000000000000..990e23ba9a36 --- /dev/null +++ b/contrib/arm-optimized-routines/string/bench/memset.c @@ -0,0 +1,243 @@ +/* + * memset benchmark. + * + * Copyright (c) 2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception + */ + +#define _GNU_SOURCE +#include <stdint.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> +#include "stringlib.h" +#include "benchlib.h" + +#define ITERS 5000 +#define ITERS2 20000000 +#define ITERS3 1000000 +#define NUM_TESTS 16384 +#define MIN_SIZE 32768 +#define MAX_SIZE (1024 * 1024) + +static uint8_t a[MAX_SIZE + 4096] __attribute__((__aligned__(64))); + +#define F(x) {#x, x}, + +static const struct fun +{ + const char *name; + void *(*fun)(void *, int, size_t); +} funtab[] = +{ +#if __aarch64__ + F(__memset_aarch64) +#elif __arm__ + F(__memset_arm) +#endif + F(memset) +#undef F + {0, 0} +}; + +typedef struct { uint32_t offset : 20, len : 12; } memset_test_t; +static memset_test_t test_arr[NUM_TESTS]; + +typedef struct { uint16_t size; uint16_t freq; } freq_data_t; +typedef struct { uint8_t align; uint16_t freq; } align_data_t; + +#define SIZE_NUM 65536 +#define SIZE_MASK (SIZE_NUM-1) +static uint8_t len_arr[SIZE_NUM]; + +/* Frequency data for memset sizes up to 4096 based on SPEC2017. */ +static freq_data_t memset_len_freq[] = +{ +{40,28817}, {32,15336}, { 16,3823}, {296,3545}, { 24,3454}, { 8,1412}, +{292,1202}, { 48, 927}, { 12, 613}, { 11, 539}, {284, 493}, {108, 414}, +{ 88, 380}, { 20, 295}, {312, 271}, { 72, 233}, { 2, 200}, { 4, 192}, +{ 15, 180}, { 14, 174}, { 13, 160}, { 56, 151}, { 36, 144}, { 64, 140}, +{4095,133}, { 10, 130}, { 9, 124}, { 3, 124}, { 28, 120}, { 0, 118}, +{288, 110}, {1152, 96}, {104, 90}, { 1, 86}, {832, 76}, {248, 74}, +{1024, 69}, {120, 64}, {512, 63}, {384, 60}, { 6, 59}, { 80, 54}, +{ 17, 50}, { 7, 49}, {520, 47}, {2048, 39}, {256, 37}, {864, 33}, +{1440, 28}, { 22, 27}, {2056, 24}, {260, 23}, { 68, 23}, { 5, 22}, +{ 18, 21}, {200, 18}, {2120, 18}, { 60, 17}, { 52, 16}, {336, 15}, +{ 44, 13}, {192, 13}, {160, 12}, {2064, 12}, {128, 12}, { 76, 11}, +{164, 11}, {152, 10}, {136, 9}, {488, 7}, { 96, 6}, {560, 6}, +{1016, 6}, {112, 5}, {232, 5}, {168, 5}, {952, 5}, {184, 5}, +{144, 4}, {252, 4}, { 84, 3}, {960, 3}, {3808, 3}, {244, 3}, +{280, 3}, {224, 3}, {156, 3}, {1088, 3}, {440, 3}, {216, 2}, +{304, 2}, { 23, 2}, { 25, 2}, { 26, 2}, {264, 2}, {328, 2}, +{1096, 2}, {240, 2}, {1104, 2}, {704, 2}, {1664, 2}, {360, 2}, +{808, 1}, {544, 1}, {236, 1}, {720, 1}, {368, 1}, {424, 1}, +{640, 1}, {1112, 1}, {552, 1}, {272, 1}, {776, 1}, {376, 1}, +{ 92, 1}, {536, 1}, {824, 1}, {496, 1}, {760, 1}, {792, 1}, +{504, 1}, {344, 1}, {1816, 1}, {880, 1}, {176, 1}, {320, 1}, +{352, 1}, {2008, 1}, {208, 1}, {408, 1}, {228, 1}, {2072, 1}, +{568, 1}, {220, 1}, {616, 1}, {600, 1}, {392, 1}, {696, 1}, +{2144, 1}, {1280, 1}, {2136, 1}, {632, 1}, {584, 1}, {456, 1}, +{472, 1}, {3440, 1}, {2088, 1}, {680, 1}, {2928, 1}, {212, 1}, +{648, 1}, {1752, 1}, {664, 1}, {3512, 1}, {1032, 1}, {528, 1}, +{4072, 1}, {204, 1}, {2880, 1}, {3392, 1}, {712, 1}, { 59, 1}, +{736, 1}, {592, 1}, {2520, 1}, {744, 1}, {196, 1}, {172, 1}, +{728, 1}, {2040, 1}, {1192, 1}, {3600, 1}, {0, 0} +}; + +#define ALIGN_NUM 1024 +#define ALIGN_MASK (ALIGN_NUM-1) +static uint8_t align_arr[ALIGN_NUM]; + +/* Alignment data for memset based on SPEC2017. */ +static align_data_t memset_align_freq[] = +{ + {16, 338}, {8, 307}, {32, 148}, {64, 131}, {4, 72}, {1, 23}, {2, 5}, {0, 0} +}; + +static void +init_memset_distribution (void) +{ + int i, j, freq, size, n; + + for (n = i = 0; (freq = memset_len_freq[i].freq) != 0; i++) + for (j = 0, size = memset_len_freq[i].size; j < freq; j++) + len_arr[n++] = size; + assert (n == SIZE_NUM); + + for (n = i = 0; (freq = memset_align_freq[i].freq) != 0; i++) + for (j = 0, size = memset_align_freq[i].align; j < freq; j++) + align_arr[n++] = size - 1; + assert (n == ALIGN_NUM); +} + +static size_t +init_memset (size_t max_size) +{ + size_t total = 0; + /* Create a random set of memsets with the given size and alignment + distributions. */ + for (int i = 0; i < NUM_TESTS; i++) + { + test_arr[i].offset = (rand32 (0) & (max_size - 1)); + test_arr[i].offset &= ~align_arr[rand32 (0) & ALIGN_MASK]; + test_arr[i].len = len_arr[rand32 (0) & SIZE_MASK]; + total += test_arr[i].len; + } + + return total; +} + + +int main (void) +{ + init_memset_distribution (); + + memset (a, 1, sizeof (a)); + + printf("Random memset (bytes/ns):\n"); + for (int f = 0; funtab[f].name != 0; f++) + { + size_t total_size = 0; + uint64_t tsum = 0; + printf ("%22s ", funtab[f].name); + rand32 (0x12345678); + + for (int size = MIN_SIZE; size <= MAX_SIZE; size *= 2) + { + size_t memset_size = init_memset (size) * ITERS; + + for (int c = 0; c < NUM_TESTS; c++) + funtab[f].fun (a + test_arr[c].offset, 0, test_arr[c].len); + + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS; i++) + for (int c = 0; c < NUM_TESTS; c++) + funtab[f].fun (a + test_arr[c].offset, 0, test_arr[c].len); + t = clock_get_ns () - t; + total_size += memset_size; + tsum += t; + printf ("%dK: %.2f ", size / 1024, (double)memset_size / t); + } + printf( "avg %.2f\n", (double)total_size / tsum); + } + + size_t total_size = 0; + uint64_t tsum = 0; + printf ("%22s ", "memset_call"); + rand32 (0x12345678); + + for (int size = MIN_SIZE; size <= MAX_SIZE; size *= 2) + { + size_t memset_size = init_memset (size) * ITERS; + + for (int c = 0; c < NUM_TESTS; c++) + memset (a + test_arr[c].offset, 0, test_arr[c].len); + + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS; i++) + for (int c = 0; c < NUM_TESTS; c++) + memset (a + test_arr[c].offset, 0, test_arr[c].len); + t = clock_get_ns () - t; + total_size += memset_size; + tsum += t; + printf ("%dK: %.2f ", size / 1024, (double)memset_size / t); + } + printf( "avg %.2f\n", (double)total_size / tsum); + + + printf ("\nMedium memset (bytes/ns):\n"); + for (int f = 0; funtab[f].name != 0; f++) + { + printf ("%22s ", funtab[f].name); + + for (int size = 8; size <= 512; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS2; i++) + funtab[f].fun (a, 0, size); + t = clock_get_ns () - t; + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); + } + printf ("\n"); + } + + printf ("%22s ", "memset_call"); + for (int size = 8; size <= 512; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS2; i++) + memset (a, 0, size); + t = clock_get_ns () - t; + printf ("%dB: %.2f ", size, (double)size * ITERS2 / t); + } + + + printf ("\nLarge memset (bytes/ns):\n"); + for (int f = 0; funtab[f].name != 0; f++) + { + printf ("%22s ", funtab[f].name); + + for (int size = 1024; size <= 65536; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS3; i++) + funtab[f].fun (a, 0, size); + t = clock_get_ns () - t; + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); + } + printf ("\n"); + } + + printf ("%22s ", "memset_call"); + for (int size = 1024; size <= 65536; size *= 2) + { + uint64_t t = clock_get_ns (); + for (int i = 0; i < ITERS3; i++) + memset (a, 0, size); + t = clock_get_ns () - t; + printf ("%dK: %.2f ", size / 1024, (double)size * ITERS3 / t); + } + printf ("\n\n"); + + return 0; +} diff --git a/contrib/arm-optimized-routines/string/bench/strlen.c b/contrib/arm-optimized-routines/string/bench/strlen.c index cc0f04bee547..f05d0d5b89e6 100644 --- a/contrib/arm-optimized-routines/string/bench/strlen.c +++ b/contrib/arm-optimized-routines/string/bench/strlen.c @@ -1,8 +1,8 @@ /* * strlen benchmark. * - * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2020-2021, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #define _GNU_SOURCE @@ -13,10 +13,10 @@ #include "stringlib.h" #include "benchlib.h" -#define ITERS 2000 +#define ITERS 5000 #define ITERS2 20000000 #define ITERS3 2000000 -#define NUM_STRLEN 16384 +#define NUM_TESTS 16384 #define MAX_ALIGN 32 #define MAX_STRLEN 256 @@ -49,7 +49,7 @@ static const struct fun }; #undef F -static uint16_t strlen_tests[NUM_STRLEN]; +static uint16_t strlen_tests[NUM_TESTS]; typedef struct { uint16_t size; uint16_t freq; } freq_data_t; typedef struct { uint8_t align; uint16_t freq; } align_data_t; @@ -117,7 +117,7 @@ init_strlen_tests (void) /* Create a random set of strlen input strings using the string length and alignment distributions. */ - for (int n = 0; n < NUM_STRLEN; n++) + for (int n = 0; n < NUM_TESTS; n++) { int align = strlen_align_arr[rand32 (0) & ALIGN_MASK]; int exp_len = strlen_len_arr[rand32 (0) & SIZE_MASK]; @@ -141,14 +141,14 @@ int main (void) size_t res = 0, strlen_size = 0, mask = maskv; printf ("%22s ", funtab[f].name); - for (int c = 0; c < NUM_STRLEN; c++) + for (int c = 0; c < NUM_TESTS; c++) strlen_size += funtab[f].fun (a + strlen_tests[c]); strlen_size *= ITERS; /* Measure latency of strlen result with (res & mask). */ uint64_t t = clock_get_ns (); for (int i = 0; i < ITERS; i++) - for (int c = 0; c < NUM_STRLEN; c++) + for (int c = 0; c < NUM_TESTS; c++) res = funtab[f].fun (a + strlen_tests[c] + (res & mask)); t = clock_get_ns () - t; printf ("%.2f\n", (double)strlen_size / t); diff --git a/contrib/arm-optimized-routines/string/include/benchlib.h b/contrib/arm-optimized-routines/string/include/benchlib.h index 0f2ce2eb6bce..f1bbea388cd2 100644 --- a/contrib/arm-optimized-routines/string/include/benchlib.h +++ b/contrib/arm-optimized-routines/string/include/benchlib.h @@ -2,7 +2,7 @@ * Benchmark support functions. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/string/include/stringlib.h b/contrib/arm-optimized-routines/string/include/stringlib.h index 378c3cd2d645..01da7ebfc18d 100644 --- a/contrib/arm-optimized-routines/string/include/stringlib.h +++ b/contrib/arm-optimized-routines/string/include/stringlib.h @@ -1,8 +1,8 @@ /* * Public API. * - * Copyright (c) 2019-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stddef.h> @@ -29,19 +29,17 @@ size_t __strlen_aarch64 (const char *); size_t __strnlen_aarch64 (const char *, size_t); int __strncmp_aarch64 (const char *, const char *, size_t); void * __memchr_aarch64_mte (const void *, int, size_t); -char *__strcpy_aarch64_mte (char *__restrict, const char *__restrict); -char *__stpcpy_aarch64_mte (char *__restrict, const char *__restrict); char *__strchr_aarch64_mte (const char *, int); char * __strchrnul_aarch64_mte (const char *, int ); size_t __strlen_aarch64_mte (const char *); char *__strrchr_aarch64_mte (const char *, int); -int __strcmp_aarch64_mte (const char *, const char *); -int __strncmp_aarch64_mte (const char *, const char *, size_t); #if __ARM_NEON void *__memcpy_aarch64_simd (void *__restrict, const void *__restrict, size_t); void *__memmove_aarch64_simd (void *, const void *, size_t); #endif # if __ARM_FEATURE_SVE +void *__memcpy_aarch64_sve (void *__restrict, const void *__restrict, size_t); +void *__memmove_aarch64_sve (void *__restrict, const void *__restrict, size_t); void *__memchr_aarch64_sve (const void *, int, size_t); int __memcmp_aarch64_sve (const void *, const void *, size_t); char *__strchr_aarch64_sve (const char *, int); @@ -54,6 +52,11 @@ size_t __strlen_aarch64_sve (const char *); size_t __strnlen_aarch64_sve (const char *, size_t); int __strncmp_aarch64_sve (const char *, const char *, size_t); # endif +# if WANT_MOPS +void *__memcpy_aarch64_mops (void *__restrict, const void *__restrict, size_t); +void *__memmove_aarch64_mops (void *__restrict, const void *__restrict, size_t); +void *__memset_aarch64_mops (void *, int, size_t); +# endif # if __ARM_FEATURE_MEMORY_TAGGING void *__mtag_tag_region (void *, size_t); void *__mtag_tag_zero_region (void *, size_t); diff --git a/contrib/arm-optimized-routines/string/test/__mtag_tag_region.c b/contrib/arm-optimized-routines/string/test/__mtag_tag_region.c index d8c02d92d626..c45fa6662a77 100644 --- a/contrib/arm-optimized-routines/string/test/__mtag_tag_region.c +++ b/contrib/arm-optimized-routines/string/test/__mtag_tag_region.c @@ -2,7 +2,7 @@ * __mtag_tag_region test. * * Copyright (c) 2021, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if __ARM_FEATURE_MEMORY_TAGGING && WANT_MTE_TEST diff --git a/contrib/arm-optimized-routines/string/test/__mtag_tag_zero_region.c b/contrib/arm-optimized-routines/string/test/__mtag_tag_zero_region.c index 221c223a2f31..a4a7861620d1 100644 --- a/contrib/arm-optimized-routines/string/test/__mtag_tag_zero_region.c +++ b/contrib/arm-optimized-routines/string/test/__mtag_tag_zero_region.c @@ -2,7 +2,7 @@ * __mtag_tag_zero_region test. * * Copyright (c) 2021, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if __ARM_FEATURE_MEMORY_TAGGING && WANT_MTE_TEST diff --git a/contrib/arm-optimized-routines/string/test/memchr.c b/contrib/arm-optimized-routines/string/test/memchr.c index 0ff77f5710bf..c6a94481c0ad 100644 --- a/contrib/arm-optimized-routines/string/test/memchr.c +++ b/contrib/arm-optimized-routines/string/test/memchr.c @@ -2,7 +2,7 @@ * memchr test. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/string/test/memcmp.c b/contrib/arm-optimized-routines/string/test/memcmp.c index 7a7cf9cff35a..f9236b83a60d 100644 --- a/contrib/arm-optimized-routines/string/test/memcmp.c +++ b/contrib/arm-optimized-routines/string/test/memcmp.c @@ -2,7 +2,7 @@ * memcmp test. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/string/test/memcpy.c b/contrib/arm-optimized-routines/string/test/memcpy.c index ce0ceeef5ee8..dc95844bd45a 100644 --- a/contrib/arm-optimized-routines/string/test/memcpy.c +++ b/contrib/arm-optimized-routines/string/test/memcpy.c @@ -1,8 +1,8 @@ /* * memcpy test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -28,6 +28,12 @@ static const struct fun # if __ARM_NEON F(__memcpy_aarch64_simd, 1) # endif +# if __ARM_FEATURE_SVE + F(__memcpy_aarch64_sve, 1) +# endif +# if WANT_MOPS + F(__memcpy_aarch64_mops, 1) +# endif #elif __arm__ F(__memcpy_arm, 0) #endif diff --git a/contrib/arm-optimized-routines/string/test/memmove.c b/contrib/arm-optimized-routines/string/test/memmove.c index 689b68c98af2..b85dd1e864ef 100644 --- a/contrib/arm-optimized-routines/string/test/memmove.c +++ b/contrib/arm-optimized-routines/string/test/memmove.c @@ -1,8 +1,8 @@ /* * memmove test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -28,6 +28,12 @@ static const struct fun # if __ARM_NEON F(__memmove_aarch64_simd, 1) # endif +# if __ARM_FEATURE_SVE + F(__memmove_aarch64_sve, 1) +# endif +# if WANT_MOPS + F(__memmove_aarch64_mops, 1) +# endif #endif {0, 0, 0} // clang-format on diff --git a/contrib/arm-optimized-routines/string/test/memrchr.c b/contrib/arm-optimized-routines/string/test/memrchr.c index adf96f049cc9..4171a56daefd 100644 --- a/contrib/arm-optimized-routines/string/test/memrchr.c +++ b/contrib/arm-optimized-routines/string/test/memrchr.c @@ -2,7 +2,7 @@ * memchr test. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _GNU_SOURCE diff --git a/contrib/arm-optimized-routines/string/test/memset.c b/contrib/arm-optimized-routines/string/test/memset.c index f1721442dbaf..7d09c267ffec 100644 --- a/contrib/arm-optimized-routines/string/test/memset.c +++ b/contrib/arm-optimized-routines/string/test/memset.c @@ -1,8 +1,8 @@ /* * memset test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2023, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -25,6 +25,9 @@ static const struct fun F(memset, 0) #if __aarch64__ F(__memset_aarch64, 1) +# if WANT_MOPS + F(__memset_aarch64_mops, 1) +# endif #elif __arm__ F(__memset_arm, 0) #endif diff --git a/contrib/arm-optimized-routines/string/test/mte.h b/contrib/arm-optimized-routines/string/test/mte.h index e67cbd9d2d40..40b0ecf6c194 100644 --- a/contrib/arm-optimized-routines/string/test/mte.h +++ b/contrib/arm-optimized-routines/string/test/mte.h @@ -2,7 +2,7 @@ * Memory tagging testing code. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef __TEST_MTE_H diff --git a/contrib/arm-optimized-routines/string/test/stpcpy.c b/contrib/arm-optimized-routines/string/test/stpcpy.c index 1827e68c9a30..0300892a1f3c 100644 --- a/contrib/arm-optimized-routines/string/test/stpcpy.c +++ b/contrib/arm-optimized-routines/string/test/stpcpy.c @@ -1,8 +1,8 @@ /* * stpcpy test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _GNU_SOURCE @@ -28,8 +28,7 @@ static const struct fun // clang-format off F(stpcpy, 0) #if __aarch64__ - F(__stpcpy_aarch64, 0) - F(__stpcpy_aarch64_mte, 1) + F(__stpcpy_aarch64, 1) # if __ARM_FEATURE_SVE F(__stpcpy_aarch64_sve, 1) # endif diff --git a/contrib/arm-optimized-routines/string/test/strchr.c b/contrib/arm-optimized-routines/string/test/strchr.c index f3ae982ef0ad..66180acfb57c 100644 --- a/contrib/arm-optimized-routines/string/test/strchr.c +++ b/contrib/arm-optimized-routines/string/test/strchr.c @@ -2,7 +2,7 @@ * strchr test. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/string/test/strchrnul.c b/contrib/arm-optimized-routines/string/test/strchrnul.c index 6c30ab2123f1..aad0bf59da66 100644 --- a/contrib/arm-optimized-routines/string/test/strchrnul.c +++ b/contrib/arm-optimized-routines/string/test/strchrnul.c @@ -2,7 +2,7 @@ * strchrnul test. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _GNU_SOURCE diff --git a/contrib/arm-optimized-routines/string/test/strcmp.c b/contrib/arm-optimized-routines/string/test/strcmp.c index d57b54ed50a8..4aa95f4f2f1d 100644 --- a/contrib/arm-optimized-routines/string/test/strcmp.c +++ b/contrib/arm-optimized-routines/string/test/strcmp.c @@ -1,8 +1,8 @@ /* * strcmp test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -24,8 +24,7 @@ static const struct fun // clang-format off F(strcmp, 0) #if __aarch64__ - F(__strcmp_aarch64, 0) - F(__strcmp_aarch64_mte, 1) + F(__strcmp_aarch64, 1) # if __ARM_FEATURE_SVE F(__strcmp_aarch64_sve, 1) # endif diff --git a/contrib/arm-optimized-routines/string/test/strcpy.c b/contrib/arm-optimized-routines/string/test/strcpy.c index e84cace9c8c6..af297f90396a 100644 --- a/contrib/arm-optimized-routines/string/test/strcpy.c +++ b/contrib/arm-optimized-routines/string/test/strcpy.c @@ -1,8 +1,8 @@ /* * strcpy test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -24,8 +24,7 @@ static const struct fun // clang-format off F(strcpy, 0) #if __aarch64__ - F(__strcpy_aarch64, 0) - F(__strcpy_aarch64_mte, 1) + F(__strcpy_aarch64, 1) # if __ARM_FEATURE_SVE F(__strcpy_aarch64_sve, 1) # endif diff --git a/contrib/arm-optimized-routines/string/test/stringtest.h b/contrib/arm-optimized-routines/string/test/stringtest.h index fe855fc21736..6bb7e1fdfeca 100644 --- a/contrib/arm-optimized-routines/string/test/stringtest.h +++ b/contrib/arm-optimized-routines/string/test/stringtest.h @@ -2,7 +2,7 @@ * Common string test code. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <ctype.h> diff --git a/contrib/arm-optimized-routines/string/test/strlen.c b/contrib/arm-optimized-routines/string/test/strlen.c index 6278380f26df..47ef3dcf0ef0 100644 --- a/contrib/arm-optimized-routines/string/test/strlen.c +++ b/contrib/arm-optimized-routines/string/test/strlen.c @@ -1,15 +1,14 @@ /* * strlen test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <sys/mman.h> #include <limits.h> #include "mte.h" #include "stringlib.h" diff --git a/contrib/arm-optimized-routines/string/test/strncmp.c b/contrib/arm-optimized-routines/string/test/strncmp.c index 018a8a431ab8..4bbab6f93450 100644 --- a/contrib/arm-optimized-routines/string/test/strncmp.c +++ b/contrib/arm-optimized-routines/string/test/strncmp.c @@ -1,8 +1,8 @@ /* * strncmp test. * - * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> @@ -24,8 +24,7 @@ static const struct fun // clang-format off F(strncmp, 0) #if __aarch64__ - F(__strncmp_aarch64, 0) - F(__strncmp_aarch64_mte, 1) + F(__strncmp_aarch64, 1) # if __ARM_FEATURE_SVE F(__strncmp_aarch64_sve, 1) # endif diff --git a/contrib/arm-optimized-routines/string/test/strnlen.c b/contrib/arm-optimized-routines/string/test/strnlen.c index 0dea00eaf8e3..a800fd1993cd 100644 --- a/contrib/arm-optimized-routines/string/test/strnlen.c +++ b/contrib/arm-optimized-routines/string/test/strnlen.c @@ -2,7 +2,7 @@ * strnlen test. * * Copyright (c) 2019-2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #ifndef _GNU_SOURCE diff --git a/contrib/arm-optimized-routines/string/test/strrchr.c b/contrib/arm-optimized-routines/string/test/strrchr.c index fedbdc52fcc1..580ca497f8a4 100644 --- a/contrib/arm-optimized-routines/string/test/strrchr.c +++ b/contrib/arm-optimized-routines/string/test/strrchr.c @@ -2,7 +2,7 @@ * strrchr test. * * Copyright (c) 2019-2021, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include <stdint.h> diff --git a/contrib/arm-optimized-routines/string/x86_64/check-arch.S b/contrib/arm-optimized-routines/string/x86_64/check-arch.S index 26ade0a0c7db..5afcf7b7ee54 100644 --- a/contrib/arm-optimized-routines/string/x86_64/check-arch.S +++ b/contrib/arm-optimized-routines/string/x86_64/check-arch.S @@ -2,7 +2,7 @@ * check ARCH setting. * * Copyright (c) 2020, Arm Limited. - * SPDX-License-Identifier: MIT + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #if !__x86_64__ |